Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 15:52:53.637392 lava-dispatcher, installed at version: 2023.05.1
2 15:52:53.637558 start: 0 validate
3 15:52:53.637667 Start time: 2023-08-07 15:52:53.637659+00:00 (UTC)
4 15:52:53.637770 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:52:53.637877 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:52:53.900494 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:52:53.901158 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:52:54.171016 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:52:54.171665 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:52:56.831105 validate duration: 3.19
12 15:52:56.831366 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:52:56.831452 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:52:56.831531 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:52:56.831639 Not decompressing ramdisk as can be used compressed.
16 15:52:56.831714 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:52:56.831771 saving as /var/lib/lava/dispatcher/tmp/11224345/tftp-deploy-g9t3v_qh/ramdisk/rootfs.cpio.gz
18 15:52:56.831833 total size: 8418130 (8MB)
19 15:52:57.342804 progress 0% (0MB)
20 15:52:57.348349 progress 5% (0MB)
21 15:52:57.349895 progress 10% (0MB)
22 15:52:57.351470 progress 15% (1MB)
23 15:52:57.353009 progress 20% (1MB)
24 15:52:57.354534 progress 25% (2MB)
25 15:52:57.356103 progress 30% (2MB)
26 15:52:57.357521 progress 35% (2MB)
27 15:52:57.359055 progress 40% (3MB)
28 15:52:57.360583 progress 45% (3MB)
29 15:52:57.362083 progress 50% (4MB)
30 15:52:57.363581 progress 55% (4MB)
31 15:52:57.365072 progress 60% (4MB)
32 15:52:57.366449 progress 65% (5MB)
33 15:52:57.367943 progress 70% (5MB)
34 15:52:57.369428 progress 75% (6MB)
35 15:52:57.370912 progress 80% (6MB)
36 15:52:57.372437 progress 85% (6MB)
37 15:52:57.373927 progress 90% (7MB)
38 15:52:57.375434 progress 95% (7MB)
39 15:52:57.376842 progress 100% (8MB)
40 15:52:57.377008 8MB downloaded in 0.55s (14.73MB/s)
41 15:52:57.377136 end: 1.1.1 http-download (duration 00:00:01) [common]
43 15:52:57.377331 end: 1.1 download-retry (duration 00:00:01) [common]
44 15:52:57.377398 start: 1.2 download-retry (timeout 00:09:59) [common]
45 15:52:57.377463 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 15:52:57.377577 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:52:57.377636 saving as /var/lib/lava/dispatcher/tmp/11224345/tftp-deploy-g9t3v_qh/kernel/bzImage
48 15:52:57.377683 total size: 7880592 (7MB)
49 15:52:57.377729 No compression specified
50 15:52:57.378644 progress 0% (0MB)
51 15:52:57.380183 progress 5% (0MB)
52 15:52:57.381657 progress 10% (0MB)
53 15:52:57.383153 progress 15% (1MB)
54 15:52:57.384617 progress 20% (1MB)
55 15:52:57.386031 progress 25% (1MB)
56 15:52:57.387483 progress 30% (2MB)
57 15:52:57.388910 progress 35% (2MB)
58 15:52:57.390321 progress 40% (3MB)
59 15:52:57.391752 progress 45% (3MB)
60 15:52:57.393136 progress 50% (3MB)
61 15:52:57.394529 progress 55% (4MB)
62 15:52:57.395958 progress 60% (4MB)
63 15:52:57.397339 progress 65% (4MB)
64 15:52:57.398760 progress 70% (5MB)
65 15:52:57.400171 progress 75% (5MB)
66 15:52:57.401548 progress 80% (6MB)
67 15:52:57.402947 progress 85% (6MB)
68 15:52:57.404360 progress 90% (6MB)
69 15:52:57.405734 progress 95% (7MB)
70 15:52:57.407164 progress 100% (7MB)
71 15:52:57.407286 7MB downloaded in 0.03s (253.91MB/s)
72 15:52:57.407396 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:52:57.407580 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:52:57.407650 start: 1.3 download-retry (timeout 00:09:59) [common]
76 15:52:57.407714 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 15:52:57.407819 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:52:57.407875 saving as /var/lib/lava/dispatcher/tmp/11224345/tftp-deploy-g9t3v_qh/modules/modules.tar
79 15:52:57.407921 total size: 251008 (0MB)
80 15:52:57.407968 Using unxz to decompress xz
81 15:52:57.411337 progress 13% (0MB)
82 15:52:57.411674 progress 26% (0MB)
83 15:52:57.411876 progress 39% (0MB)
84 15:52:57.413603 progress 52% (0MB)
85 15:52:57.415308 progress 65% (0MB)
86 15:52:57.417001 progress 78% (0MB)
87 15:52:57.418674 progress 91% (0MB)
88 15:52:57.420271 progress 100% (0MB)
89 15:52:57.425068 0MB downloaded in 0.02s (13.97MB/s)
90 15:52:57.425285 end: 1.3.1 http-download (duration 00:00:00) [common]
92 15:52:57.425506 end: 1.3 download-retry (duration 00:00:00) [common]
93 15:52:57.425583 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 15:52:57.425655 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 15:52:57.425718 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 15:52:57.425780 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 15:52:57.425952 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h
98 15:52:57.426055 makedir: /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin
99 15:52:57.426138 makedir: /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/tests
100 15:52:57.426213 makedir: /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/results
101 15:52:57.426308 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-add-keys
102 15:52:57.426421 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-add-sources
103 15:52:57.426520 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-background-process-start
104 15:52:57.426618 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-background-process-stop
105 15:52:57.426712 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-common-functions
106 15:52:57.426804 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-echo-ipv4
107 15:52:57.426899 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-install-packages
108 15:52:57.427004 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-installed-packages
109 15:52:57.427114 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-os-build
110 15:52:57.427214 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-probe-channel
111 15:52:57.427305 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-probe-ip
112 15:52:57.427396 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-target-ip
113 15:52:57.427487 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-target-mac
114 15:52:57.427578 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-target-storage
115 15:52:57.427672 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-test-case
116 15:52:57.427763 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-test-event
117 15:52:57.427854 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-test-feedback
118 15:52:57.427946 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-test-raise
119 15:52:57.428041 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-test-reference
120 15:52:57.428136 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-test-runner
121 15:52:57.428228 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-test-set
122 15:52:57.428325 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-test-shell
123 15:52:57.428422 Updating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-install-packages (oe)
124 15:52:57.428540 Updating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/bin/lava-installed-packages (oe)
125 15:52:57.428633 Creating /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/environment
126 15:52:57.428713 LAVA metadata
127 15:52:57.428772 - LAVA_JOB_ID=11224345
128 15:52:57.428823 - LAVA_DISPATCHER_IP=192.168.201.1
129 15:52:57.428902 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 15:52:57.428956 skipped lava-vland-overlay
131 15:52:57.429013 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 15:52:57.429077 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 15:52:57.429126 skipped lava-multinode-overlay
134 15:52:57.429179 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 15:52:57.429241 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 15:52:57.429299 Loading test definitions
137 15:52:57.429370 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 15:52:57.429426 Using /lava-11224345 at stage 0
139 15:52:57.429659 uuid=11224345_1.4.2.3.1 testdef=None
140 15:52:57.429725 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 15:52:57.429787 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 15:52:57.430198 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 15:52:57.430377 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 15:52:57.430872 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 15:52:57.431100 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 15:52:57.431598 runner path: /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/0/tests/0_dmesg test_uuid 11224345_1.4.2.3.1
149 15:52:57.431717 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 15:52:57.431894 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 15:52:57.431948 Using /lava-11224345 at stage 1
153 15:52:57.432167 uuid=11224345_1.4.2.3.5 testdef=None
154 15:52:57.432239 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 15:52:57.432303 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 15:52:57.432665 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 15:52:57.432835 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 15:52:57.433320 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 15:52:57.433491 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 15:52:57.433965 runner path: /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/1/tests/1_bootrr test_uuid 11224345_1.4.2.3.5
163 15:52:57.434085 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 15:52:57.434250 Creating lava-test-runner.conf files
166 15:52:57.434298 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/0 for stage 0
167 15:52:57.434364 - 0_dmesg
168 15:52:57.434426 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224345/lava-overlay-uwib_07h/lava-11224345/1 for stage 1
169 15:52:57.434495 - 1_bootrr
170 15:52:57.434569 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 15:52:57.434635 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 15:52:57.441220 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 15:52:57.441314 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 15:52:57.441387 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 15:52:57.441453 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 15:52:57.441518 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 15:52:57.605537 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 15:52:57.605813 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 15:52:57.605929 extracting modules file /var/lib/lava/dispatcher/tmp/11224345/tftp-deploy-g9t3v_qh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224345/extract-overlay-ramdisk-dt_23g_t/ramdisk
180 15:52:57.614588 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 15:52:57.614692 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 15:52:57.614765 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224345/compress-overlay-bnrrzhwg/overlay-1.4.2.4.tar.gz to ramdisk
183 15:52:57.614823 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224345/compress-overlay-bnrrzhwg/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224345/extract-overlay-ramdisk-dt_23g_t/ramdisk
184 15:52:57.621014 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 15:52:57.621112 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 15:52:57.621188 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 15:52:57.621258 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 15:52:57.621321 Building ramdisk /var/lib/lava/dispatcher/tmp/11224345/extract-overlay-ramdisk-dt_23g_t/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224345/extract-overlay-ramdisk-dt_23g_t/ramdisk
189 15:52:57.684290 >> 49790 blocks
190 15:52:58.411634 rename /var/lib/lava/dispatcher/tmp/11224345/extract-overlay-ramdisk-dt_23g_t/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224345/tftp-deploy-g9t3v_qh/ramdisk/ramdisk.cpio.gz
191 15:52:58.411991 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 15:52:58.412111 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 15:52:58.412212 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 15:52:58.412291 No mkimage arch provided, not using FIT.
195 15:52:58.412365 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 15:52:58.412435 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 15:52:58.412519 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 15:52:58.412592 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 15:52:58.412667 No LXC device requested
200 15:52:58.412745 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 15:52:58.412816 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 15:52:58.412881 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 15:52:58.412941 Checking files for TFTP limit of 4294967296 bytes.
204 15:52:58.413287 end: 1 tftp-deploy (duration 00:00:02) [common]
205 15:52:58.413363 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 15:52:58.413430 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 15:52:58.413518 substitutions:
208 15:52:58.413570 - {DTB}: None
209 15:52:58.413619 - {INITRD}: 11224345/tftp-deploy-g9t3v_qh/ramdisk/ramdisk.cpio.gz
210 15:52:58.413664 - {KERNEL}: 11224345/tftp-deploy-g9t3v_qh/kernel/bzImage
211 15:52:58.413708 - {LAVA_MAC}: None
212 15:52:58.413751 - {PRESEED_CONFIG}: None
213 15:52:58.413795 - {PRESEED_LOCAL}: None
214 15:52:58.413838 - {RAMDISK}: 11224345/tftp-deploy-g9t3v_qh/ramdisk/ramdisk.cpio.gz
215 15:52:58.413882 - {ROOT_PART}: None
216 15:52:58.413926 - {ROOT}: None
217 15:52:58.413968 - {SERVER_IP}: 192.168.201.1
218 15:52:58.414011 - {TEE}: None
219 15:52:58.414054 Parsed boot commands:
220 15:52:58.414097 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 15:52:58.414238 Parsed boot commands: tftpboot 192.168.201.1 11224345/tftp-deploy-g9t3v_qh/kernel/bzImage 11224345/tftp-deploy-g9t3v_qh/kernel/cmdline 11224345/tftp-deploy-g9t3v_qh/ramdisk/ramdisk.cpio.gz
222 15:52:58.414310 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 15:52:58.414389 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 15:52:58.414458 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 15:52:58.414521 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 15:52:58.414573 Not connected, no need to disconnect.
227 15:52:58.414627 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 15:52:58.414688 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 15:52:58.414739 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
230 15:52:58.417487 Setting prompt string to ['lava-test: # ']
231 15:52:58.417734 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 15:52:58.417828 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 15:52:58.417904 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 15:52:58.417975 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 15:52:58.418124 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=reboot'
236 15:53:03.565893 >> Command sent successfully.
237 15:53:03.571736 Returned 0 in 5 seconds
238 15:53:03.672411 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 15:53:03.673540 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 15:53:03.673911 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 15:53:03.674236 Setting prompt string to 'Starting depthcharge on Volmar...'
243 15:53:03.674493 Changing prompt to 'Starting depthcharge on Volmar...'
244 15:53:03.674731 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
245 15:53:03.675621 [Enter `^Ec?' for help]
246 15:53:05.045600
247 15:53:05.046097
248 15:53:05.053230 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
249 15:53:05.056182 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
250 15:53:05.063766 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
251 15:53:05.067248 CPU: AES supported, TXT NOT supported, VT supported
252 15:53:05.074178 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
253 15:53:05.077405 Cache size = 10 MiB
254 15:53:05.080634 MCH: device id 4609 (rev 04) is Alderlake-P
255 15:53:05.087604 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
256 15:53:05.090859 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
257 15:53:05.094450 VBOOT: Loading verstage.
258 15:53:05.097573 FMAP: Found "FLASH" version 1.1 at 0x1804000.
259 15:53:05.105060 FMAP: base = 0x0 size = 0x2000000 #areas = 37
260 15:53:05.108327 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
261 15:53:05.115406 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
262 15:53:05.125608 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
263 15:53:05.126136
264 15:53:05.126424
265 15:53:05.135352 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
266 15:53:05.139051 Probing TPM I2C: I2C bus 1 version 0x3230302a
267 15:53:05.142333 DW I2C bus 1 at 0xfe022000 (400 KHz)
268 15:53:05.145883 I2C TX abort detected (00000001)
269 15:53:05.151962 cr50_i2c_read: Address write failed
270 15:53:05.163255 .done! DID_VID 0x00281ae0
271 15:53:05.166181 TPM ready after 0 ms
272 15:53:05.170182 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
273 15:53:05.180281 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
274 15:53:05.186944 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 15:53:05.238273 tlcl_send_startup: Startup return code is 0
276 15:53:05.238749 TPM: setup succeeded
277 15:53:05.258062 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
278 15:53:05.280004 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
279 15:53:05.284350 Chrome EC: UHEPI supported
280 15:53:05.291113 Reading cr50 boot mode
281 15:53:05.308316 Cr50 says boot_mode is VERIFIED_RW(0x00).
282 15:53:05.308857 Phase 1
283 15:53:05.311854 FMAP: area GBB found @ 1805000 (458752 bytes)
284 15:53:05.322434 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
285 15:53:05.329470 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
286 15:53:05.336423 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
287 15:53:05.336933 Phase 2
288 15:53:05.337217 Phase 3
289 15:53:05.342577 FMAP: area GBB found @ 1805000 (458752 bytes)
290 15:53:05.346154 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
291 15:53:05.352669 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
292 15:53:05.358857 VB2:vb2_verify_keyblock() Checking keyblock signature...
293 15:53:05.365651 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
294 15:53:05.369238 VB2:vb2_verify_digest() HW RSA forbidden, using SW
295 15:53:05.375939 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
296 15:53:05.388651 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 15:53:05.391847 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 15:53:05.398698 VB2:vb2_verify_fw_preamble() Verifying preamble.
299 15:53:05.405509 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
300 15:53:05.409267 VB2:vb2_verify_digest() HW RSA forbidden, using SW
301 15:53:05.415403 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
302 15:53:05.419579 Phase 4
303 15:53:05.422764 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
304 15:53:05.429289 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
305 15:53:05.655131 VB2:vb2_verify_digest() HW RSA forbidden, using SW
306 15:53:05.661455 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
307 15:53:05.664764 Saving vboot hash.
308 15:53:05.671302 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
309 15:53:05.687657 tlcl_extend: response is 0
310 15:53:05.694454 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
311 15:53:05.697713 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
312 15:53:05.716933 tlcl_extend: response is 0
313 15:53:05.723451 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
314 15:53:05.742355 tlcl_lock_nv_write: response is 0
315 15:53:05.761363 tlcl_lock_nv_write: response is 0
316 15:53:05.761861 Slot A is selected
317 15:53:05.768211 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
318 15:53:05.774356 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
319 15:53:05.781431 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
320 15:53:05.787791 BS: verstage times (exec / console): total (unknown) / 253 ms
321 15:53:05.788294
322 15:53:05.788580
323 15:53:05.794660 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
324 15:53:05.798418 Google Chrome EC: version:
325 15:53:05.801568 ro: volmar_v2.0.14126-e605144e9c
326 15:53:05.805334 rw: volmar_v0.0.55-22d1557
327 15:53:05.808266 running image: 2
328 15:53:05.811793 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
329 15:53:05.822014 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
330 15:53:05.828540 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
331 15:53:05.834892 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
332 15:53:05.845230 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
333 15:53:05.855516 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
334 15:53:05.858503 EC took 1081us to calculate image hash
335 15:53:05.868551 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
336 15:53:05.871926 VB2:sync_ec() select_rw=RW(active)
337 15:53:05.880043 Waited 270us to clear limit power flag.
338 15:53:05.886703 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 15:53:05.890024 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 15:53:05.893392 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
341 15:53:05.899706 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
342 15:53:05.903026 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
343 15:53:05.906685 TCO_STS: 0000 0000
344 15:53:05.910015 GEN_PMCON: d0015038 00002200
345 15:53:05.913229 GBLRST_CAUSE: 00000000 00000000
346 15:53:05.913729 HPR_CAUSE0: 00000000
347 15:53:05.916428 prev_sleep_state 5
348 15:53:05.920039 Abort disabling TXT, as CPU is not TXT capable.
349 15:53:05.928361 cse_lite: Number of partitions = 3
350 15:53:05.931682 cse_lite: Current partition = RO
351 15:53:05.932185 cse_lite: Next partition = RO
352 15:53:05.935158 cse_lite: Flags = 0x7
353 15:53:05.941547 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
354 15:53:05.951501 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
355 15:53:05.955322 FMAP: area SI_ME found @ 1000 (5238784 bytes)
356 15:53:05.962043 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
357 15:53:05.968351 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
358 15:53:05.975429 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
359 15:53:05.978349 cse_lite: CSE CBFS RW version : 16.1.25.2049
360 15:53:05.984875 cse_lite: Set Boot Partition Info Command (RW)
361 15:53:05.988086 HECI: Global Reset(Type:1) Command
362 15:53:07.415070 �5��tform, ucode: 00000423
363 15:53:07.421811 CPU: AES supported, TXT NOT supported, VT supported
364 15:53:07.428660 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
365 15:53:07.431819 Cache size = 10 MiB
366 15:53:07.435239 MCH: device id 4609 (rev 04) is Alderlake-P
367 15:53:07.442366 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
368 15:53:07.445242 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
369 15:53:07.448491 VBOOT: Loading verstage.
370 15:53:07.452828 FMAP: Found "FLASH" version 1.1 at 0x1804000.
371 15:53:07.455578 FMAP: base = 0x0 size = 0x2000000 #areas = 37
372 15:53:07.462919 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
373 15:53:07.470223 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
374 15:53:07.476620 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
375 15:53:07.480883
376 15:53:07.481369
377 15:53:07.487210 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
378 15:53:07.493891 Probing TPM I2C: I2C bus 1 version 0x3230302a
379 15:53:07.497374 DW I2C bus 1 at 0xfe022000 (400 KHz)
380 15:53:07.500952 done! DID_VID 0x00281ae0
381 15:53:07.504121 TPM ready after 0 ms
382 15:53:07.508094 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
383 15:53:07.519999 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
384 15:53:07.523305 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
385 15:53:07.578781 tlcl_send_startup: Startup return code is 0
386 15:53:07.579291 TPM: setup succeeded
387 15:53:07.598946 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
388 15:53:07.620992 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
389 15:53:07.624566 Chrome EC: UHEPI supported
390 15:53:07.627878 Reading cr50 boot mode
391 15:53:07.643044 Cr50 says boot_mode is VERIFIED_RW(0x00).
392 15:53:07.643532 Phase 1
393 15:53:07.649389 FMAP: area GBB found @ 1805000 (458752 bytes)
394 15:53:07.656407 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
395 15:53:07.662540 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
396 15:53:07.669526 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
397 15:53:07.672934 Phase 2
398 15:53:07.673418 Phase 3
399 15:53:07.676181 FMAP: area GBB found @ 1805000 (458752 bytes)
400 15:53:07.682621 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
401 15:53:07.686003 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
402 15:53:07.692934 VB2:vb2_verify_keyblock() Checking keyblock signature...
403 15:53:07.698946 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
404 15:53:07.705675 VB2:vb2_verify_digest() HW RSA forbidden, using SW
405 15:53:07.709171 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
406 15:53:07.723513 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
407 15:53:07.726906 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
408 15:53:07.734539 VB2:vb2_verify_fw_preamble() Verifying preamble.
409 15:53:07.740363 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
410 15:53:07.743643 VB2:vb2_verify_digest() HW RSA forbidden, using SW
411 15:53:07.750227 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
412 15:53:07.754664 Phase 4
413 15:53:07.757911 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
414 15:53:07.764785 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
415 15:53:07.989654 VB2:vb2_verify_digest() HW RSA forbidden, using SW
416 15:53:07.996534 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
417 15:53:07.999945 Saving vboot hash.
418 15:53:08.006446 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
419 15:53:08.021983 tlcl_extend: response is 0
420 15:53:08.029321 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
421 15:53:08.035612 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
422 15:53:08.050117 tlcl_extend: response is 0
423 15:53:08.056565 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
424 15:53:08.076701 tlcl_lock_nv_write: response is 0
425 15:53:08.095501 tlcl_lock_nv_write: response is 0
426 15:53:08.095987 Slot A is selected
427 15:53:08.102193 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
428 15:53:08.108898 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
429 15:53:08.115576 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
430 15:53:08.122333 BS: verstage times (exec / console): total (unknown) / 246 ms
431 15:53:08.122832
432 15:53:08.123184
433 15:53:08.128771 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
434 15:53:08.133357 Google Chrome EC: version:
435 15:53:08.136920 ro: volmar_v2.0.14126-e605144e9c
436 15:53:08.139903 rw: volmar_v0.0.55-22d1557
437 15:53:08.143311 running image: 2
438 15:53:08.146943 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
439 15:53:08.156803 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
440 15:53:08.163309 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
441 15:53:08.169775 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
442 15:53:08.179511 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
443 15:53:08.190221 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
444 15:53:08.193459 EC took 941us to calculate image hash
445 15:53:08.204016 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
446 15:53:08.207257 VB2:sync_ec() select_rw=RW(active)
447 15:53:08.220538 Waited 270us to clear limit power flag.
448 15:53:08.223960 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
449 15:53:08.227044 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
450 15:53:08.230527 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
451 15:53:08.237270 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
452 15:53:08.240494 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
453 15:53:08.243863 TCO_STS: 0000 0000
454 15:53:08.244349 GEN_PMCON: d1001038 00002200
455 15:53:08.247440 GBLRST_CAUSE: 00000040 00000000
456 15:53:08.250336 HPR_CAUSE0: 00000000
457 15:53:08.253624 prev_sleep_state 5
458 15:53:08.256822 Abort disabling TXT, as CPU is not TXT capable.
459 15:53:08.264462 cse_lite: Number of partitions = 3
460 15:53:08.267822 cse_lite: Current partition = RW
461 15:53:08.268226 cse_lite: Next partition = RW
462 15:53:08.271351 cse_lite: Flags = 0x7
463 15:53:08.278523 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
464 15:53:08.287948 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
465 15:53:08.291499 FMAP: area SI_ME found @ 1000 (5238784 bytes)
466 15:53:08.297540 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
467 15:53:08.304500 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
468 15:53:08.310749 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
469 15:53:08.314349 cse_lite: CSE CBFS RW version : 16.1.25.2049
470 15:53:08.317796 Boot Count incremented to 1174
471 15:53:08.325065 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
472 15:53:08.331335 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
473 15:53:08.344216 Probing TPM I2C: done! DID_VID 0x00281ae0
474 15:53:08.347794 Locality already claimed
475 15:53:08.350926 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
476 15:53:08.370089 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
477 15:53:08.377145 MRC: Hash idx 0x100d comparison successful.
478 15:53:08.380018 MRC cache found, size f6c8
479 15:53:08.380404 bootmode is set to: 2
480 15:53:08.384022 EC returned error result code 3
481 15:53:08.386778 FW_CONFIG value from CBI is 0x131
482 15:53:08.393967 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
483 15:53:08.397085 SPD index = 0
484 15:53:08.404220 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
485 15:53:08.404729 SPD: module type is LPDDR4X
486 15:53:08.410730 SPD: module part number is K4U6E3S4AB-MGCL
487 15:53:08.417102 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
488 15:53:08.420779 SPD: device width 16 bits, bus width 16 bits
489 15:53:08.423558 SPD: module size is 1024 MB (per channel)
490 15:53:08.493331 CBMEM:
491 15:53:08.496740 IMD: root @ 0x76fff000 254 entries.
492 15:53:08.500091 IMD: root @ 0x76ffec00 62 entries.
493 15:53:08.507826 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
494 15:53:08.511542 RO_VPD is uninitialized or empty.
495 15:53:08.514423 FMAP: area RW_VPD found @ f29000 (8192 bytes)
496 15:53:08.517828 RW_VPD is uninitialized or empty.
497 15:53:08.524527 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
498 15:53:08.527761 External stage cache:
499 15:53:08.531179 IMD: root @ 0x7bbff000 254 entries.
500 15:53:08.534425 IMD: root @ 0x7bbfec00 62 entries.
501 15:53:08.541226 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
502 15:53:08.547845 MRC: Checking cached data update for 'RW_MRC_CACHE'.
503 15:53:08.551683 MRC: 'RW_MRC_CACHE' does not need update.
504 15:53:08.552172 8 DIMMs found
505 15:53:08.554612 SMM Memory Map
506 15:53:08.557616 SMRAM : 0x7b800000 0x800000
507 15:53:08.561099 Subregion 0: 0x7b800000 0x200000
508 15:53:08.564209 Subregion 1: 0x7ba00000 0x200000
509 15:53:08.567650 Subregion 2: 0x7bc00000 0x400000
510 15:53:08.570686 top_of_ram = 0x77000000
511 15:53:08.574224 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
512 15:53:08.581045 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
513 15:53:08.587679 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
514 15:53:08.590464 MTRR Range: Start=ff000000 End=0 (Size 1000000)
515 15:53:08.590791 Normal boot
516 15:53:08.600710 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
517 15:53:08.607314 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
518 15:53:08.614426 Processing 237 relocs. Offset value of 0x74ab9000
519 15:53:08.622733 BS: romstage times (exec / console): total (unknown) / 380 ms
520 15:53:08.629742
521 15:53:08.630225
522 15:53:08.636169 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
523 15:53:08.636658 Normal boot
524 15:53:08.642908 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
525 15:53:08.649566 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
526 15:53:08.656283 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
527 15:53:08.666369 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
528 15:53:08.714241 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
529 15:53:08.721068 Processing 5931 relocs. Offset value of 0x72a2f000
530 15:53:08.724183 BS: postcar times (exec / console): total (unknown) / 51 ms
531 15:53:08.727546
532 15:53:08.728027
533 15:53:08.734043 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
534 15:53:08.737738 Reserving BERT start 76a1e000, size 10000
535 15:53:08.740515 Normal boot
536 15:53:08.744063 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
537 15:53:08.750292 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
538 15:53:08.760888 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
539 15:53:08.763840 FMAP: area RW_VPD found @ f29000 (8192 bytes)
540 15:53:08.766966 Google Chrome EC: version:
541 15:53:08.770689 ro: volmar_v2.0.14126-e605144e9c
542 15:53:08.774122 rw: volmar_v0.0.55-22d1557
543 15:53:08.777719 running image: 2
544 15:53:08.781460 ACPI _SWS is PM1 Index 8 GPE Index -1
545 15:53:08.785199 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
546 15:53:08.788666 EC returned error result code 3
547 15:53:08.792104 FW_CONFIG value from CBI is 0x131
548 15:53:08.798931 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
549 15:53:08.802153 PCI: 00:1c.2 disabled by fw_config
550 15:53:08.805768 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
551 15:53:08.812199 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
552 15:53:08.818761 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
553 15:53:08.821883 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
554 15:53:08.828939 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
555 15:53:08.835626 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
556 15:53:08.839060 microcode: sig=0x906a4 pf=0x80 revision=0x423
557 15:53:08.845732 microcode: Update skipped, already up-to-date
558 15:53:08.852298 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
559 15:53:08.884146 Detected 6 core, 8 thread CPU.
560 15:53:08.887304 Setting up SMI for CPU
561 15:53:08.890808 IED base = 0x7bc00000
562 15:53:08.891328 IED size = 0x00400000
563 15:53:08.894174 Will perform SMM setup.
564 15:53:08.897426 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
565 15:53:08.900603 LAPIC 0x0 in XAPIC mode.
566 15:53:08.910405 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
567 15:53:08.913712 Processing 18 relocs. Offset value of 0x00030000
568 15:53:08.918622 Attempting to start 7 APs
569 15:53:08.921994 Waiting for 10ms after sending INIT.
570 15:53:08.934749 Waiting for SIPI to complete...
571 15:53:08.938267 LAPIC 0x14 in XAPIC mode.
572 15:53:08.938746 done.
573 15:53:08.941315 LAPIC 0x10 in XAPIC mode.
574 15:53:08.944926 LAPIC 0x16 in XAPIC mode.
575 15:53:08.948108 LAPIC 0x8 in XAPIC mode.
576 15:53:08.951494 LAPIC 0x9 in XAPIC mode.
577 15:53:08.951983 LAPIC 0x12 in XAPIC mode.
578 15:53:08.958249 AP: slot 2 apic_id 10, MCU rev: 0x00000423
579 15:53:08.961458 AP: slot 1 apic_id 16, MCU rev: 0x00000423
580 15:53:08.964564 AP: slot 4 apic_id 14, MCU rev: 0x00000423
581 15:53:08.971437 AP: slot 3 apic_id 12, MCU rev: 0x00000423
582 15:53:08.974630 Waiting for SIPI to complete...
583 15:53:08.975154 done.
584 15:53:08.975454 LAPIC 0x1 in XAPIC mode.
585 15:53:08.980948 AP: slot 5 apic_id 9, MCU rev: 0x00000423
586 15:53:08.984759 AP: slot 6 apic_id 8, MCU rev: 0x00000423
587 15:53:08.987622 AP: slot 7 apic_id 1, MCU rev: 0x00000423
588 15:53:08.991113 smm_setup_relocation_handler: enter
589 15:53:08.994118 smm_setup_relocation_handler: exit
590 15:53:09.004482 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
591 15:53:09.007628 Processing 11 relocs. Offset value of 0x00038000
592 15:53:09.014335 smm_module_setup_stub: stack_top = 0x7b804000
593 15:53:09.017835 smm_module_setup_stub: per cpu stack_size = 0x800
594 15:53:09.024761 smm_module_setup_stub: runtime.start32_offset = 0x4c
595 15:53:09.028116 smm_module_setup_stub: runtime.smm_size = 0x10000
596 15:53:09.034754 SMM Module: stub loaded at 38000. Will call 0x76a52094
597 15:53:09.037662 Installing permanent SMM handler to 0x7b800000
598 15:53:09.044587 smm_load_module: total_smm_space_needed e468, available -> 200000
599 15:53:09.054667 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
600 15:53:09.057971 Processing 255 relocs. Offset value of 0x7b9f6000
601 15:53:09.064629 smm_load_module: smram_start: 0x7b800000
602 15:53:09.067678 smm_load_module: smram_end: 7ba00000
603 15:53:09.071028 smm_load_module: handler start 0x7b9f6d5f
604 15:53:09.074463 smm_load_module: handler_size 98d0
605 15:53:09.077742 smm_load_module: fxsave_area 0x7b9ff000
606 15:53:09.080806 smm_load_module: fxsave_size 1000
607 15:53:09.084643 smm_load_module: CONFIG_MSEG_SIZE 0x0
608 15:53:09.090942 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
609 15:53:09.097695 smm_load_module: handler_mod_params.smbase = 0x7b800000
610 15:53:09.101124 smm_load_module: per_cpu_save_state_size = 0x400
611 15:53:09.104176 smm_load_module: num_cpus = 0x8
612 15:53:09.110910 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
613 15:53:09.114228 smm_load_module: total_save_state_size = 0x2000
614 15:53:09.117619 smm_load_module: cpu0 entry: 7b9e6000
615 15:53:09.124352 smm_create_map: cpus allowed in one segment 30
616 15:53:09.127671 smm_create_map: min # of segments needed 1
617 15:53:09.128167 CPU 0x0
618 15:53:09.130940 smbase 7b9e6000 entry 7b9ee000
619 15:53:09.137759 ss_start 7b9f5c00 code_end 7b9ee208
620 15:53:09.138249 CPU 0x1
621 15:53:09.140766 smbase 7b9e5c00 entry 7b9edc00
622 15:53:09.147335 ss_start 7b9f5800 code_end 7b9ede08
623 15:53:09.147805 CPU 0x2
624 15:53:09.150797 smbase 7b9e5800 entry 7b9ed800
625 15:53:09.157571 ss_start 7b9f5400 code_end 7b9eda08
626 15:53:09.158057 CPU 0x3
627 15:53:09.160905 smbase 7b9e5400 entry 7b9ed400
628 15:53:09.164015 ss_start 7b9f5000 code_end 7b9ed608
629 15:53:09.167330 CPU 0x4
630 15:53:09.170485 smbase 7b9e5000 entry 7b9ed000
631 15:53:09.174137 ss_start 7b9f4c00 code_end 7b9ed208
632 15:53:09.174627 CPU 0x5
633 15:53:09.177840 smbase 7b9e4c00 entry 7b9ecc00
634 15:53:09.184205 ss_start 7b9f4800 code_end 7b9ece08
635 15:53:09.184695 CPU 0x6
636 15:53:09.187373 smbase 7b9e4800 entry 7b9ec800
637 15:53:09.194404 ss_start 7b9f4400 code_end 7b9eca08
638 15:53:09.194900 CPU 0x7
639 15:53:09.197177 smbase 7b9e4400 entry 7b9ec400
640 15:53:09.200954 ss_start 7b9f4000 code_end 7b9ec608
641 15:53:09.210630 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
642 15:53:09.214206 Processing 11 relocs. Offset value of 0x7b9ee000
643 15:53:09.220582 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
644 15:53:09.227104 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
645 15:53:09.234000 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
646 15:53:09.240106 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
647 15:53:09.247194 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
648 15:53:09.250392 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
649 15:53:09.257215 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
650 15:53:09.263824 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
651 15:53:09.270701 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
652 15:53:09.277189 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
653 15:53:09.283751 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
654 15:53:09.290310 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
655 15:53:09.297533 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
656 15:53:09.303760 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
657 15:53:09.310059 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
658 15:53:09.314054 smm_module_setup_stub: stack_top = 0x7b804000
659 15:53:09.317115 smm_module_setup_stub: per cpu stack_size = 0x800
660 15:53:09.323989 smm_module_setup_stub: runtime.start32_offset = 0x4c
661 15:53:09.330176 smm_module_setup_stub: runtime.smm_size = 0x200000
662 15:53:09.333895 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
663 15:53:09.338686 Clearing SMI status registers
664 15:53:09.341596 SMI_STS: PM1
665 15:53:09.342024 PM1_STS: WAK PWRBTN
666 15:53:09.352416 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
667 15:53:09.352897 In relocation handler: CPU 0
668 15:53:09.358594 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
669 15:53:09.361943 Writing SMRR. base = 0x7b800006, mask=0xff800c00
670 15:53:09.365033 Relocation complete.
671 15:53:09.371617 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
672 15:53:09.375109 In relocation handler: CPU 7
673 15:53:09.378935 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
674 15:53:09.382195 Relocation complete.
675 15:53:09.389062 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
676 15:53:09.392322 In relocation handler: CPU 3
677 15:53:09.395514 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
678 15:53:09.398638 Writing SMRR. base = 0x7b800006, mask=0xff800c00
679 15:53:09.402121 Relocation complete.
680 15:53:09.408774 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
681 15:53:09.412164 In relocation handler: CPU 2
682 15:53:09.415429 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
683 15:53:09.422216 Writing SMRR. base = 0x7b800006, mask=0xff800c00
684 15:53:09.422733 Relocation complete.
685 15:53:09.432227 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
686 15:53:09.432718 In relocation handler: CPU 4
687 15:53:09.439235 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
688 15:53:09.442180 Writing SMRR. base = 0x7b800006, mask=0xff800c00
689 15:53:09.445665 Relocation complete.
690 15:53:09.452292 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
691 15:53:09.455638 In relocation handler: CPU 1
692 15:53:09.458887 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
693 15:53:09.465457 Writing SMRR. base = 0x7b800006, mask=0xff800c00
694 15:53:09.465946 Relocation complete.
695 15:53:09.472021 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
696 15:53:09.475389 In relocation handler: CPU 6
697 15:53:09.478951 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
698 15:53:09.485510 Writing SMRR. base = 0x7b800006, mask=0xff800c00
699 15:53:09.488785 Relocation complete.
700 15:53:09.495277 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
701 15:53:09.498930 In relocation handler: CPU 5
702 15:53:09.502325 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
703 15:53:09.502810 Relocation complete.
704 15:53:09.505660 Initializing CPU #0
705 15:53:09.508977 CPU: vendor Intel device 906a4
706 15:53:09.512443 CPU: family 06, model 9a, stepping 04
707 15:53:09.515464 Clearing out pending MCEs
708 15:53:09.518608 cpu: energy policy set to 7
709 15:53:09.522206 Turbo is available but hidden
710 15:53:09.525588 Turbo is available and visible
711 15:53:09.529059 microcode: Update skipped, already up-to-date
712 15:53:09.532499 CPU #0 initialized
713 15:53:09.532984 Initializing CPU #7
714 15:53:09.535713 Initializing CPU #3
715 15:53:09.538701 Initializing CPU #5
716 15:53:09.539061 Initializing CPU #1
717 15:53:09.542113 Initializing CPU #2
718 15:53:09.542603 Initializing CPU #4
719 15:53:09.545465 CPU: vendor Intel device 906a4
720 15:53:09.548683 CPU: family 06, model 9a, stepping 04
721 15:53:09.552175 CPU: vendor Intel device 906a4
722 15:53:09.558477 CPU: family 06, model 9a, stepping 04
723 15:53:09.558934 CPU: vendor Intel device 906a4
724 15:53:09.566021 CPU: family 06, model 9a, stepping 04
725 15:53:09.568952 CPU: vendor Intel device 906a4
726 15:53:09.571836 CPU: family 06, model 9a, stepping 04
727 15:53:09.572228 Clearing out pending MCEs
728 15:53:09.575046 Clearing out pending MCEs
729 15:53:09.578747 Clearing out pending MCEs
730 15:53:09.582168 cpu: energy policy set to 7
731 15:53:09.585428 cpu: energy policy set to 7
732 15:53:09.588818 CPU: vendor Intel device 906a4
733 15:53:09.591893 CPU: family 06, model 9a, stepping 04
734 15:53:09.595499 cpu: energy policy set to 7
735 15:53:09.598472 CPU: vendor Intel device 906a4
736 15:53:09.601687 CPU: family 06, model 9a, stepping 04
737 15:53:09.602071 Initializing CPU #6
738 15:53:09.608612 microcode: Update skipped, already up-to-date
739 15:53:09.609047 CPU #2 initialized
740 15:53:09.611910 Clearing out pending MCEs
741 15:53:09.618567 microcode: Update skipped, already up-to-date
742 15:53:09.619055 CPU #1 initialized
743 15:53:09.622082 cpu: energy policy set to 7
744 15:53:09.625370 microcode: Update skipped, already up-to-date
745 15:53:09.629190 CPU #3 initialized
746 15:53:09.632398 Clearing out pending MCEs
747 15:53:09.635053 microcode: Update skipped, already up-to-date
748 15:53:09.638331 CPU #4 initialized
749 15:53:09.638679 Clearing out pending MCEs
750 15:53:09.642005 CPU: vendor Intel device 906a4
751 15:53:09.648989 CPU: family 06, model 9a, stepping 04
752 15:53:09.649480 cpu: energy policy set to 7
753 15:53:09.652103 Clearing out pending MCEs
754 15:53:09.655184 cpu: energy policy set to 7
755 15:53:09.658723 cpu: energy policy set to 7
756 15:53:09.662109 microcode: Update skipped, already up-to-date
757 15:53:09.665252 CPU #7 initialized
758 15:53:09.668641 microcode: Update skipped, already up-to-date
759 15:53:09.671956 CPU #5 initialized
760 15:53:09.675366 microcode: Update skipped, already up-to-date
761 15:53:09.678454 CPU #6 initialized
762 15:53:09.681603 bsp_do_flight_plan done after 704 msecs.
763 15:53:09.685299 CPU: frequency set to 4400 MHz
764 15:53:09.685757 Enabling SMIs.
765 15:53:09.691635 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
766 15:53:09.709217 Probing TPM I2C: done! DID_VID 0x00281ae0
767 15:53:09.712504 Locality already claimed
768 15:53:09.715877 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
769 15:53:09.727029 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
770 15:53:09.730398 Enabling GPIO PM b/c CR50 has long IRQ pulse support
771 15:53:09.737237 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
772 15:53:09.744089 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
773 15:53:09.747403 Found a VBT of 9216 bytes after decompression
774 15:53:09.750524 PCI 1.0, PIN A, using IRQ #16
775 15:53:09.754022 PCI 2.0, PIN A, using IRQ #17
776 15:53:09.757664 PCI 4.0, PIN A, using IRQ #18
777 15:53:09.761018 PCI 5.0, PIN A, using IRQ #16
778 15:53:09.763956 PCI 6.0, PIN A, using IRQ #16
779 15:53:09.767231 PCI 6.2, PIN C, using IRQ #18
780 15:53:09.770843 PCI 7.0, PIN A, using IRQ #19
781 15:53:09.773791 PCI 7.1, PIN B, using IRQ #20
782 15:53:09.777343 PCI 7.2, PIN C, using IRQ #21
783 15:53:09.780833 PCI 7.3, PIN D, using IRQ #22
784 15:53:09.783688 PCI 8.0, PIN A, using IRQ #23
785 15:53:09.787003 PCI D.0, PIN A, using IRQ #17
786 15:53:09.787435 PCI D.1, PIN B, using IRQ #19
787 15:53:09.790083 PCI 10.0, PIN A, using IRQ #24
788 15:53:09.794014 PCI 10.1, PIN B, using IRQ #25
789 15:53:09.797178 PCI 10.6, PIN C, using IRQ #20
790 15:53:09.800573 PCI 10.7, PIN D, using IRQ #21
791 15:53:09.803754 PCI 11.0, PIN A, using IRQ #26
792 15:53:09.806714 PCI 11.1, PIN B, using IRQ #27
793 15:53:09.810130 PCI 11.2, PIN C, using IRQ #28
794 15:53:09.813788 PCI 11.3, PIN D, using IRQ #29
795 15:53:09.817240 PCI 12.0, PIN A, using IRQ #30
796 15:53:09.820607 PCI 12.6, PIN B, using IRQ #31
797 15:53:09.823908 PCI 12.7, PIN C, using IRQ #22
798 15:53:09.827322 PCI 13.0, PIN A, using IRQ #32
799 15:53:09.830859 PCI 13.1, PIN B, using IRQ #33
800 15:53:09.834150 PCI 13.2, PIN C, using IRQ #34
801 15:53:09.837120 PCI 13.3, PIN D, using IRQ #35
802 15:53:09.840179 PCI 14.0, PIN B, using IRQ #23
803 15:53:09.840662 PCI 14.1, PIN A, using IRQ #36
804 15:53:09.843653 PCI 14.3, PIN C, using IRQ #17
805 15:53:09.847172 PCI 15.0, PIN A, using IRQ #37
806 15:53:09.850586 PCI 15.1, PIN B, using IRQ #38
807 15:53:09.853750 PCI 15.2, PIN C, using IRQ #39
808 15:53:09.856964 PCI 15.3, PIN D, using IRQ #40
809 15:53:09.860308 PCI 16.0, PIN A, using IRQ #18
810 15:53:09.863719 PCI 16.1, PIN B, using IRQ #19
811 15:53:09.866835 PCI 16.2, PIN C, using IRQ #20
812 15:53:09.870219 PCI 16.3, PIN D, using IRQ #21
813 15:53:09.873523 PCI 16.4, PIN A, using IRQ #18
814 15:53:09.877248 PCI 16.5, PIN B, using IRQ #19
815 15:53:09.880427 PCI 17.0, PIN A, using IRQ #22
816 15:53:09.883659 PCI 19.0, PIN A, using IRQ #41
817 15:53:09.886723 PCI 19.1, PIN B, using IRQ #42
818 15:53:09.890144 PCI 19.2, PIN C, using IRQ #43
819 15:53:09.890495 PCI 1C.0, PIN A, using IRQ #16
820 15:53:09.893468 PCI 1C.1, PIN B, using IRQ #17
821 15:53:09.896938 PCI 1C.2, PIN C, using IRQ #18
822 15:53:09.900289 PCI 1C.3, PIN D, using IRQ #19
823 15:53:09.903673 PCI 1C.4, PIN A, using IRQ #16
824 15:53:09.906600 PCI 1C.5, PIN B, using IRQ #17
825 15:53:09.910268 PCI 1C.6, PIN C, using IRQ #18
826 15:53:09.913859 PCI 1C.7, PIN D, using IRQ #19
827 15:53:09.917315 PCI 1D.0, PIN A, using IRQ #16
828 15:53:09.920621 PCI 1D.1, PIN B, using IRQ #17
829 15:53:09.923513 PCI 1D.2, PIN C, using IRQ #18
830 15:53:09.926794 PCI 1D.3, PIN D, using IRQ #19
831 15:53:09.930124 PCI 1E.0, PIN A, using IRQ #23
832 15:53:09.933742 PCI 1E.1, PIN B, using IRQ #20
833 15:53:09.937015 PCI 1E.2, PIN C, using IRQ #44
834 15:53:09.940287 PCI 1E.3, PIN D, using IRQ #45
835 15:53:09.940777 PCI 1F.3, PIN B, using IRQ #22
836 15:53:09.943537 PCI 1F.4, PIN C, using IRQ #23
837 15:53:09.946624 PCI 1F.6, PIN D, using IRQ #20
838 15:53:09.950686 PCI 1F.7, PIN A, using IRQ #21
839 15:53:09.956994 IRQ: Using dynamically assigned PCI IO-APIC IRQs
840 15:53:09.963705 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
841 15:53:10.140783 FSPS returned 0
842 15:53:10.144038 Executing Phase 1 of FspMultiPhaseSiInit
843 15:53:10.154136 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
844 15:53:10.157399 port C0 DISC req: usage 1 usb3 1 usb2 1
845 15:53:10.160700 Raw Buffer output 0 00000111
846 15:53:10.163763 Raw Buffer output 1 00000000
847 15:53:10.167623 pmc_send_ipc_cmd succeeded
848 15:53:10.174243 port C1 DISC req: usage 1 usb3 3 usb2 3
849 15:53:10.174759 Raw Buffer output 0 00000331
850 15:53:10.177328 Raw Buffer output 1 00000000
851 15:53:10.181497 pmc_send_ipc_cmd succeeded
852 15:53:10.185332 Detected 6 core, 8 thread CPU.
853 15:53:10.188392 Detected 6 core, 8 thread CPU.
854 15:53:10.194032 Detected 6 core, 8 thread CPU.
855 15:53:10.197390 Detected 6 core, 8 thread CPU.
856 15:53:10.200554 Detected 6 core, 8 thread CPU.
857 15:53:10.204243 Detected 6 core, 8 thread CPU.
858 15:53:10.207642 Detected 6 core, 8 thread CPU.
859 15:53:10.210598 Detected 6 core, 8 thread CPU.
860 15:53:10.213835 Detected 6 core, 8 thread CPU.
861 15:53:10.217166 Detected 6 core, 8 thread CPU.
862 15:53:10.220977 Detected 6 core, 8 thread CPU.
863 15:53:10.224244 Detected 6 core, 8 thread CPU.
864 15:53:10.227561 Detected 6 core, 8 thread CPU.
865 15:53:10.230487 Detected 6 core, 8 thread CPU.
866 15:53:10.233630 Detected 6 core, 8 thread CPU.
867 15:53:10.237556 Detected 6 core, 8 thread CPU.
868 15:53:10.240456 Detected 6 core, 8 thread CPU.
869 15:53:10.243884 Detected 6 core, 8 thread CPU.
870 15:53:10.247161 Detected 6 core, 8 thread CPU.
871 15:53:10.250829 Detected 6 core, 8 thread CPU.
872 15:53:10.253891 Detected 6 core, 8 thread CPU.
873 15:53:10.254376 Detected 6 core, 8 thread CPU.
874 15:53:10.546168 Detected 6 core, 8 thread CPU.
875 15:53:10.549466 Detected 6 core, 8 thread CPU.
876 15:53:10.553127 Detected 6 core, 8 thread CPU.
877 15:53:10.556362 Detected 6 core, 8 thread CPU.
878 15:53:10.559661 Detected 6 core, 8 thread CPU.
879 15:53:10.563075 Detected 6 core, 8 thread CPU.
880 15:53:10.566345 Detected 6 core, 8 thread CPU.
881 15:53:10.569683 Detected 6 core, 8 thread CPU.
882 15:53:10.573115 Detected 6 core, 8 thread CPU.
883 15:53:10.576167 Detected 6 core, 8 thread CPU.
884 15:53:10.579440 Detected 6 core, 8 thread CPU.
885 15:53:10.583292 Detected 6 core, 8 thread CPU.
886 15:53:10.586553 Detected 6 core, 8 thread CPU.
887 15:53:10.589757 Detected 6 core, 8 thread CPU.
888 15:53:10.592707 Detected 6 core, 8 thread CPU.
889 15:53:10.596221 Detected 6 core, 8 thread CPU.
890 15:53:10.599703 Detected 6 core, 8 thread CPU.
891 15:53:10.603356 Detected 6 core, 8 thread CPU.
892 15:53:10.606316 Detected 6 core, 8 thread CPU.
893 15:53:10.606803 Detected 6 core, 8 thread CPU.
894 15:53:10.609946 Display FSP Version Info HOB
895 15:53:10.613196 Reference Code - CPU = c.0.65.70
896 15:53:10.616594 uCode Version = 0.0.4.23
897 15:53:10.620104 TXT ACM version = ff.ff.ff.ffff
898 15:53:10.623115 Reference Code - ME = c.0.65.70
899 15:53:10.626247 MEBx version = 0.0.0.0
900 15:53:10.630006 ME Firmware Version = Lite SKU
901 15:53:10.633438 Reference Code - PCH = c.0.65.70
902 15:53:10.636630 PCH-CRID Status = Disabled
903 15:53:10.640463 PCH-CRID Original Value = ff.ff.ff.ffff
904 15:53:10.643345 PCH-CRID New Value = ff.ff.ff.ffff
905 15:53:10.646615 OPROM - RST - RAID = ff.ff.ff.ffff
906 15:53:10.650034 PCH Hsio Version = 4.0.0.0
907 15:53:10.653034 Reference Code - SA - System Agent = c.0.65.70
908 15:53:10.656181 Reference Code - MRC = 0.0.3.80
909 15:53:10.659712 SA - PCIe Version = c.0.65.70
910 15:53:10.662936 SA-CRID Status = Disabled
911 15:53:10.666390 SA-CRID Original Value = 0.0.0.4
912 15:53:10.669348 SA-CRID New Value = 0.0.0.4
913 15:53:10.673015 OPROM - VBIOS = ff.ff.ff.ffff
914 15:53:10.676171 IO Manageability Engine FW Version = 24.0.4.0
915 15:53:10.679543 PHY Build Version = 0.0.0.2016
916 15:53:10.682639 Thunderbolt(TM) FW Version = 0.0.0.0
917 15:53:10.689749 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
918 15:53:10.696178 BS: BS_DEV_INIT_CHIPS run times (exec / console): 488 / 507 ms
919 15:53:10.696615 Enumerating buses...
920 15:53:10.702686 Show all devs... Before device enumeration.
921 15:53:10.703154 Root Device: enabled 1
922 15:53:10.706106 CPU_CLUSTER: 0: enabled 1
923 15:53:10.709722 DOMAIN: 0000: enabled 1
924 15:53:10.713184 GPIO: 0: enabled 1
925 15:53:10.713658 PCI: 00:00.0: enabled 1
926 15:53:10.716153 PCI: 00:01.0: enabled 0
927 15:53:10.719712 PCI: 00:01.1: enabled 0
928 15:53:10.722751 PCI: 00:02.0: enabled 1
929 15:53:10.723282 PCI: 00:04.0: enabled 1
930 15:53:10.726421 PCI: 00:05.0: enabled 0
931 15:53:10.729305 PCI: 00:06.0: enabled 1
932 15:53:10.729691 PCI: 00:06.2: enabled 0
933 15:53:10.733162 PCI: 00:07.0: enabled 0
934 15:53:10.736336 PCI: 00:07.1: enabled 0
935 15:53:10.739528 PCI: 00:07.2: enabled 0
936 15:53:10.740016 PCI: 00:07.3: enabled 0
937 15:53:10.743502 PCI: 00:08.0: enabled 0
938 15:53:10.746516 PCI: 00:09.0: enabled 0
939 15:53:10.749723 PCI: 00:0a.0: enabled 1
940 15:53:10.750234 PCI: 00:0d.0: enabled 1
941 15:53:10.752780 PCI: 00:0d.1: enabled 0
942 15:53:10.755871 PCI: 00:0d.2: enabled 0
943 15:53:10.759595 PCI: 00:0d.3: enabled 0
944 15:53:10.760087 PCI: 00:0e.0: enabled 0
945 15:53:10.763192 PCI: 00:10.0: enabled 0
946 15:53:10.766426 PCI: 00:10.1: enabled 0
947 15:53:10.766903 PCI: 00:10.6: enabled 0
948 15:53:10.769313 PCI: 00:10.7: enabled 0
949 15:53:10.772839 PCI: 00:12.0: enabled 0
950 15:53:10.775777 PCI: 00:12.6: enabled 0
951 15:53:10.776164 PCI: 00:12.7: enabled 0
952 15:53:10.779360 PCI: 00:13.0: enabled 0
953 15:53:10.782454 PCI: 00:14.0: enabled 1
954 15:53:10.785779 PCI: 00:14.1: enabled 0
955 15:53:10.786131 PCI: 00:14.2: enabled 1
956 15:53:10.789728 PCI: 00:14.3: enabled 1
957 15:53:10.793076 PCI: 00:15.0: enabled 1
958 15:53:10.796226 PCI: 00:15.1: enabled 1
959 15:53:10.796594 PCI: 00:15.2: enabled 0
960 15:53:10.799593 PCI: 00:15.3: enabled 1
961 15:53:10.803201 PCI: 00:16.0: enabled 1
962 15:53:10.803690 PCI: 00:16.1: enabled 0
963 15:53:10.806269 PCI: 00:16.2: enabled 0
964 15:53:10.809489 PCI: 00:16.3: enabled 0
965 15:53:10.812702 PCI: 00:16.4: enabled 0
966 15:53:10.813103 PCI: 00:16.5: enabled 0
967 15:53:10.816103 PCI: 00:17.0: enabled 1
968 15:53:10.819418 PCI: 00:19.0: enabled 0
969 15:53:10.822957 PCI: 00:19.1: enabled 1
970 15:53:10.823478 PCI: 00:19.2: enabled 0
971 15:53:10.826451 PCI: 00:1a.0: enabled 0
972 15:53:10.829172 PCI: 00:1c.0: enabled 0
973 15:53:10.833432 PCI: 00:1c.1: enabled 0
974 15:53:10.833920 PCI: 00:1c.2: enabled 0
975 15:53:10.836352 PCI: 00:1c.3: enabled 0
976 15:53:10.839783 PCI: 00:1c.4: enabled 0
977 15:53:10.840267 PCI: 00:1c.5: enabled 0
978 15:53:10.842581 PCI: 00:1c.6: enabled 0
979 15:53:10.846041 PCI: 00:1c.7: enabled 0
980 15:53:10.849659 PCI: 00:1d.0: enabled 0
981 15:53:10.850147 PCI: 00:1d.1: enabled 0
982 15:53:10.852770 PCI: 00:1d.2: enabled 0
983 15:53:10.855602 PCI: 00:1d.3: enabled 0
984 15:53:10.859456 PCI: 00:1e.0: enabled 1
985 15:53:10.859941 PCI: 00:1e.1: enabled 0
986 15:53:10.862487 PCI: 00:1e.2: enabled 0
987 15:53:10.865970 PCI: 00:1e.3: enabled 1
988 15:53:10.869221 PCI: 00:1f.0: enabled 1
989 15:53:10.869715 PCI: 00:1f.1: enabled 0
990 15:53:10.872400 PCI: 00:1f.2: enabled 1
991 15:53:10.875868 PCI: 00:1f.3: enabled 1
992 15:53:10.879468 PCI: 00:1f.4: enabled 0
993 15:53:10.879950 PCI: 00:1f.5: enabled 1
994 15:53:10.882113 PCI: 00:1f.6: enabled 0
995 15:53:10.885778 PCI: 00:1f.7: enabled 0
996 15:53:10.886232 GENERIC: 0.0: enabled 1
997 15:53:10.889263 GENERIC: 0.0: enabled 1
998 15:53:10.892497 GENERIC: 1.0: enabled 1
999 15:53:10.895691 GENERIC: 0.0: enabled 1
1000 15:53:10.896100 GENERIC: 1.0: enabled 1
1001 15:53:10.898959 USB0 port 0: enabled 1
1002 15:53:10.902347 USB0 port 0: enabled 1
1003 15:53:10.906034 GENERIC: 0.0: enabled 1
1004 15:53:10.906522 I2C: 00:1a: enabled 1
1005 15:53:10.909454 I2C: 00:31: enabled 1
1006 15:53:10.912637 I2C: 00:32: enabled 1
1007 15:53:10.913028 I2C: 00:50: enabled 1
1008 15:53:10.916009 I2C: 00:10: enabled 1
1009 15:53:10.919374 I2C: 00:15: enabled 1
1010 15:53:10.919857 I2C: 00:2c: enabled 1
1011 15:53:10.922632 GENERIC: 0.0: enabled 1
1012 15:53:10.925789 SPI: 00: enabled 1
1013 15:53:10.926199 PNP: 0c09.0: enabled 1
1014 15:53:10.929411 GENERIC: 0.0: enabled 1
1015 15:53:10.932720 USB3 port 0: enabled 1
1016 15:53:10.933104 USB3 port 1: enabled 0
1017 15:53:10.936108 USB3 port 2: enabled 1
1018 15:53:10.939333 USB3 port 3: enabled 0
1019 15:53:10.942716 USB2 port 0: enabled 1
1020 15:53:10.943245 USB2 port 1: enabled 0
1021 15:53:10.945733 USB2 port 2: enabled 1
1022 15:53:10.949497 USB2 port 3: enabled 0
1023 15:53:10.949983 USB2 port 4: enabled 0
1024 15:53:10.952725 USB2 port 5: enabled 1
1025 15:53:10.956325 USB2 port 6: enabled 0
1026 15:53:10.956805 USB2 port 7: enabled 0
1027 15:53:10.959314 USB2 port 8: enabled 1
1028 15:53:10.962554 USB2 port 9: enabled 1
1029 15:53:10.965881 USB3 port 0: enabled 1
1030 15:53:10.966435 USB3 port 1: enabled 0
1031 15:53:10.969243 USB3 port 2: enabled 0
1032 15:53:10.972555 USB3 port 3: enabled 0
1033 15:53:10.973022 GENERIC: 0.0: enabled 1
1034 15:53:10.975873 GENERIC: 1.0: enabled 1
1035 15:53:10.979066 APIC: 00: enabled 1
1036 15:53:10.979546 APIC: 16: enabled 1
1037 15:53:10.982465 APIC: 10: enabled 1
1038 15:53:10.985762 APIC: 12: enabled 1
1039 15:53:10.986219 APIC: 14: enabled 1
1040 15:53:10.989484 APIC: 09: enabled 1
1041 15:53:10.989957 APIC: 08: enabled 1
1042 15:53:10.992226 APIC: 01: enabled 1
1043 15:53:10.995674 Compare with tree...
1044 15:53:10.996145 Root Device: enabled 1
1045 15:53:10.998923 CPU_CLUSTER: 0: enabled 1
1046 15:53:11.002275 APIC: 00: enabled 1
1047 15:53:11.005912 APIC: 16: enabled 1
1048 15:53:11.006386 APIC: 10: enabled 1
1049 15:53:11.009100 APIC: 12: enabled 1
1050 15:53:11.012455 APIC: 14: enabled 1
1051 15:53:11.012836 APIC: 09: enabled 1
1052 15:53:11.015552 APIC: 08: enabled 1
1053 15:53:11.018809 APIC: 01: enabled 1
1054 15:53:11.019234 DOMAIN: 0000: enabled 1
1055 15:53:11.022537 GPIO: 0: enabled 1
1056 15:53:11.026244 PCI: 00:00.0: enabled 1
1057 15:53:11.029228 PCI: 00:01.0: enabled 0
1058 15:53:11.029585 PCI: 00:01.1: enabled 0
1059 15:53:11.032256 PCI: 00:02.0: enabled 1
1060 15:53:11.035609 PCI: 00:04.0: enabled 1
1061 15:53:11.039336 GENERIC: 0.0: enabled 1
1062 15:53:11.042552 PCI: 00:05.0: enabled 0
1063 15:53:11.043052 PCI: 00:06.0: enabled 1
1064 15:53:11.045905 PCI: 00:06.2: enabled 0
1065 15:53:11.049113 PCI: 00:08.0: enabled 0
1066 15:53:11.052475 PCI: 00:09.0: enabled 0
1067 15:53:11.055426 PCI: 00:0a.0: enabled 1
1068 15:53:11.055769 PCI: 00:0d.0: enabled 1
1069 15:53:11.059139 USB0 port 0: enabled 1
1070 15:53:11.062547 USB3 port 0: enabled 1
1071 15:53:11.065674 USB3 port 1: enabled 0
1072 15:53:11.068801 USB3 port 2: enabled 1
1073 15:53:11.072269 USB3 port 3: enabled 0
1074 15:53:11.072621 PCI: 00:0d.1: enabled 0
1075 15:53:11.075382 PCI: 00:0d.2: enabled 0
1076 15:53:11.078848 PCI: 00:0d.3: enabled 0
1077 15:53:11.082491 PCI: 00:0e.0: enabled 0
1078 15:53:11.085397 PCI: 00:10.0: enabled 0
1079 15:53:11.085780 PCI: 00:10.1: enabled 0
1080 15:53:11.089033 PCI: 00:10.6: enabled 0
1081 15:53:11.092074 PCI: 00:10.7: enabled 0
1082 15:53:11.095508 PCI: 00:12.0: enabled 0
1083 15:53:11.095982 PCI: 00:12.6: enabled 0
1084 15:53:11.099139 PCI: 00:12.7: enabled 0
1085 15:53:11.102489 PCI: 00:13.0: enabled 0
1086 15:53:11.105974 PCI: 00:14.0: enabled 1
1087 15:53:11.108891 USB0 port 0: enabled 1
1088 15:53:11.109437 USB2 port 0: enabled 1
1089 15:53:11.112213 USB2 port 1: enabled 0
1090 15:53:11.115692 USB2 port 2: enabled 1
1091 15:53:11.118750 USB2 port 3: enabled 0
1092 15:53:11.122122 USB2 port 4: enabled 0
1093 15:53:11.125622 USB2 port 5: enabled 1
1094 15:53:11.126104 USB2 port 6: enabled 0
1095 15:53:11.128912 USB2 port 7: enabled 0
1096 15:53:11.132685 USB2 port 8: enabled 1
1097 15:53:11.136307 USB2 port 9: enabled 1
1098 15:53:11.139034 USB3 port 0: enabled 1
1099 15:53:11.142155 USB3 port 1: enabled 0
1100 15:53:11.142632 USB3 port 2: enabled 0
1101 15:53:11.145437 USB3 port 3: enabled 0
1102 15:53:11.148736 PCI: 00:14.1: enabled 0
1103 15:53:11.152835 PCI: 00:14.2: enabled 1
1104 15:53:11.155072 PCI: 00:14.3: enabled 1
1105 15:53:11.155457 GENERIC: 0.0: enabled 1
1106 15:53:11.158856 PCI: 00:15.0: enabled 1
1107 15:53:11.161922 I2C: 00:1a: enabled 1
1108 15:53:11.165314 I2C: 00:31: enabled 1
1109 15:53:11.165785 I2C: 00:32: enabled 1
1110 15:53:11.168711 PCI: 00:15.1: enabled 1
1111 15:53:11.172437 I2C: 00:50: enabled 1
1112 15:53:11.175022 PCI: 00:15.2: enabled 0
1113 15:53:11.178613 PCI: 00:15.3: enabled 1
1114 15:53:11.179119 I2C: 00:10: enabled 1
1115 15:53:11.182034 PCI: 00:16.0: enabled 1
1116 15:53:11.185391 PCI: 00:16.1: enabled 0
1117 15:53:11.188818 PCI: 00:16.2: enabled 0
1118 15:53:11.192049 PCI: 00:16.3: enabled 0
1119 15:53:11.192479 PCI: 00:16.4: enabled 0
1120 15:53:11.195612 PCI: 00:16.5: enabled 0
1121 15:53:11.198676 PCI: 00:17.0: enabled 1
1122 15:53:11.202046 PCI: 00:19.0: enabled 0
1123 15:53:11.202522 PCI: 00:19.1: enabled 1
1124 15:53:11.205512 I2C: 00:15: enabled 1
1125 15:53:11.209222 I2C: 00:2c: enabled 1
1126 15:53:11.212152 PCI: 00:19.2: enabled 0
1127 15:53:11.215448 PCI: 00:1a.0: enabled 0
1128 15:53:11.215825 PCI: 00:1e.0: enabled 1
1129 15:53:11.218760 PCI: 00:1e.1: enabled 0
1130 15:53:11.222201 PCI: 00:1e.2: enabled 0
1131 15:53:11.225449 PCI: 00:1e.3: enabled 1
1132 15:53:11.225925 SPI: 00: enabled 1
1133 15:53:11.228889 PCI: 00:1f.0: enabled 1
1134 15:53:11.231990 PNP: 0c09.0: enabled 1
1135 15:53:11.235453 PCI: 00:1f.1: enabled 0
1136 15:53:11.238828 PCI: 00:1f.2: enabled 1
1137 15:53:11.239350 GENERIC: 0.0: enabled 1
1138 15:53:11.241887 GENERIC: 0.0: enabled 1
1139 15:53:11.245017 GENERIC: 1.0: enabled 1
1140 15:53:11.248676 PCI: 00:1f.3: enabled 1
1141 15:53:11.252235 PCI: 00:1f.4: enabled 0
1142 15:53:11.252716 PCI: 00:1f.5: enabled 1
1143 15:53:11.255846 PCI: 00:1f.6: enabled 0
1144 15:53:11.258731 PCI: 00:1f.7: enabled 0
1145 15:53:11.262289 Root Device scanning...
1146 15:53:11.265445 scan_static_bus for Root Device
1147 15:53:11.265914 CPU_CLUSTER: 0 enabled
1148 15:53:11.269463 DOMAIN: 0000 enabled
1149 15:53:11.272225 DOMAIN: 0000 scanning...
1150 15:53:11.275420 PCI: pci_scan_bus for bus 00
1151 15:53:11.278732 PCI: 00:00.0 [8086/0000] ops
1152 15:53:11.282160 PCI: 00:00.0 [8086/4609] enabled
1153 15:53:11.285402 PCI: 00:02.0 [8086/0000] bus ops
1154 15:53:11.288870 PCI: 00:02.0 [8086/46b3] enabled
1155 15:53:11.292237 PCI: 00:04.0 [8086/0000] bus ops
1156 15:53:11.294875 PCI: 00:04.0 [8086/461d] enabled
1157 15:53:11.298550 PCI: 00:06.0 [8086/0000] bus ops
1158 15:53:11.301930 PCI: 00:06.0 [8086/464d] enabled
1159 15:53:11.305684 PCI: 00:08.0 [8086/464f] disabled
1160 15:53:11.308651 PCI: 00:0a.0 [8086/467d] enabled
1161 15:53:11.311964 PCI: 00:0d.0 [8086/0000] bus ops
1162 15:53:11.315427 PCI: 00:0d.0 [8086/461e] enabled
1163 15:53:11.318486 PCI: 00:14.0 [8086/0000] bus ops
1164 15:53:11.321894 PCI: 00:14.0 [8086/51ed] enabled
1165 15:53:11.324946 PCI: 00:14.2 [8086/51ef] enabled
1166 15:53:11.328346 PCI: 00:14.3 [8086/0000] bus ops
1167 15:53:11.331821 PCI: 00:14.3 [8086/51f0] enabled
1168 15:53:11.335187 PCI: 00:15.0 [8086/0000] bus ops
1169 15:53:11.338903 PCI: 00:15.0 [8086/51e8] enabled
1170 15:53:11.341811 PCI: 00:15.1 [8086/0000] bus ops
1171 15:53:11.345058 PCI: 00:15.1 [8086/51e9] enabled
1172 15:53:11.348249 PCI: 00:15.2 [8086/0000] bus ops
1173 15:53:11.351684 PCI: 00:15.2 [8086/51ea] disabled
1174 15:53:11.354827 PCI: 00:15.3 [8086/0000] bus ops
1175 15:53:11.358468 PCI: 00:15.3 [8086/51eb] enabled
1176 15:53:11.361828 PCI: 00:16.0 [8086/0000] ops
1177 15:53:11.365248 PCI: 00:16.0 [8086/51e0] enabled
1178 15:53:11.371527 PCI: Static device PCI: 00:17.0 not found, disabling it.
1179 15:53:11.375105 PCI: 00:19.0 [8086/0000] bus ops
1180 15:53:11.378303 PCI: 00:19.0 [8086/51c5] disabled
1181 15:53:11.381917 PCI: 00:19.1 [8086/0000] bus ops
1182 15:53:11.385752 PCI: 00:19.1 [8086/51c6] enabled
1183 15:53:11.388284 PCI: 00:1e.0 [8086/0000] ops
1184 15:53:11.391444 PCI: 00:1e.0 [8086/51a8] enabled
1185 15:53:11.394932 PCI: 00:1e.3 [8086/0000] bus ops
1186 15:53:11.398033 PCI: 00:1e.3 [8086/51ab] enabled
1187 15:53:11.401633 PCI: 00:1f.0 [8086/0000] bus ops
1188 15:53:11.405074 PCI: 00:1f.0 [8086/5182] enabled
1189 15:53:11.405518 RTC Init
1190 15:53:11.408506 Set power on after power failure.
1191 15:53:11.411712 Disabling Deep S3
1192 15:53:11.414953 Disabling Deep S3
1193 15:53:11.415458 Disabling Deep S4
1194 15:53:11.418304 Disabling Deep S4
1195 15:53:11.418686 Disabling Deep S5
1196 15:53:11.421789 Disabling Deep S5
1197 15:53:11.425471 PCI: 00:1f.2 [0000/0000] hidden
1198 15:53:11.428394 PCI: 00:1f.3 [8086/0000] bus ops
1199 15:53:11.431654 PCI: 00:1f.3 [8086/51c8] enabled
1200 15:53:11.434787 PCI: 00:1f.5 [8086/0000] bus ops
1201 15:53:11.438505 PCI: 00:1f.5 [8086/51a4] enabled
1202 15:53:11.439021 GPIO: 0 enabled
1203 15:53:11.441734 PCI: Leftover static devices:
1204 15:53:11.445159 PCI: 00:01.0
1205 15:53:11.445541 PCI: 00:01.1
1206 15:53:11.445816 PCI: 00:05.0
1207 15:53:11.448234 PCI: 00:06.2
1208 15:53:11.448709 PCI: 00:09.0
1209 15:53:11.452161 PCI: 00:0d.1
1210 15:53:11.452633 PCI: 00:0d.2
1211 15:53:11.452917 PCI: 00:0d.3
1212 15:53:11.455135 PCI: 00:0e.0
1213 15:53:11.455583 PCI: 00:10.0
1214 15:53:11.458199 PCI: 00:10.1
1215 15:53:11.458621 PCI: 00:10.6
1216 15:53:11.462310 PCI: 00:10.7
1217 15:53:11.462802 PCI: 00:12.0
1218 15:53:11.463125 PCI: 00:12.6
1219 15:53:11.464985 PCI: 00:12.7
1220 15:53:11.465464 PCI: 00:13.0
1221 15:53:11.467878 PCI: 00:14.1
1222 15:53:11.468257 PCI: 00:16.1
1223 15:53:11.468587 PCI: 00:16.2
1224 15:53:11.471224 PCI: 00:16.3
1225 15:53:11.471597 PCI: 00:16.4
1226 15:53:11.474803 PCI: 00:16.5
1227 15:53:11.475332 PCI: 00:17.0
1228 15:53:11.475699 PCI: 00:19.2
1229 15:53:11.477892 PCI: 00:1a.0
1230 15:53:11.478259 PCI: 00:1e.1
1231 15:53:11.481367 PCI: 00:1e.2
1232 15:53:11.481806 PCI: 00:1f.1
1233 15:53:11.484833 PCI: 00:1f.4
1234 15:53:11.485330 PCI: 00:1f.6
1235 15:53:11.485615 PCI: 00:1f.7
1236 15:53:11.487928 PCI: Check your devicetree.cb.
1237 15:53:11.490973 PCI: 00:02.0 scanning...
1238 15:53:11.494571 scan_generic_bus for PCI: 00:02.0
1239 15:53:11.498206 scan_generic_bus for PCI: 00:02.0 done
1240 15:53:11.504757 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1241 15:53:11.505230 PCI: 00:04.0 scanning...
1242 15:53:11.508345 scan_generic_bus for PCI: 00:04.0
1243 15:53:11.511581 GENERIC: 0.0 enabled
1244 15:53:11.518056 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1245 15:53:11.521484 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1246 15:53:11.524750 PCI: 00:06.0 scanning...
1247 15:53:11.528052 do_pci_scan_bridge for PCI: 00:06.0
1248 15:53:11.531293 PCI: pci_scan_bus for bus 01
1249 15:53:11.535265 PCI: 01:00.0 [15b7/5009] enabled
1250 15:53:11.538090 Enabling Common Clock Configuration
1251 15:53:11.541738 L1 Sub-State supported from root port 6
1252 15:53:11.545051 L1 Sub-State Support = 0x5
1253 15:53:11.548378 CommonModeRestoreTime = 0x6e
1254 15:53:11.551715 Power On Value = 0x5, Power On Scale = 0x2
1255 15:53:11.554858 ASPM: Enabled L1
1256 15:53:11.558252 PCIe: Max_Payload_Size adjusted to 256
1257 15:53:11.561519 PCI: 01:00.0: Enabled LTR
1258 15:53:11.564951 PCI: 01:00.0: Programmed LTR max latencies
1259 15:53:11.572002 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1260 15:53:11.572482 PCI: 00:0d.0 scanning...
1261 15:53:11.574695 scan_static_bus for PCI: 00:0d.0
1262 15:53:11.577903 USB0 port 0 enabled
1263 15:53:11.581720 USB0 port 0 scanning...
1264 15:53:11.585075 scan_static_bus for USB0 port 0
1265 15:53:11.585556 USB3 port 0 enabled
1266 15:53:11.588458 USB3 port 1 disabled
1267 15:53:11.592156 USB3 port 2 enabled
1268 15:53:11.592626 USB3 port 3 disabled
1269 15:53:11.594936 USB3 port 0 scanning...
1270 15:53:11.597977 scan_static_bus for USB3 port 0
1271 15:53:11.602235 scan_static_bus for USB3 port 0 done
1272 15:53:11.605303 scan_bus: bus USB3 port 0 finished in 6 msecs
1273 15:53:11.608541 USB3 port 2 scanning...
1274 15:53:11.611797 scan_static_bus for USB3 port 2
1275 15:53:11.614760 scan_static_bus for USB3 port 2 done
1276 15:53:11.621729 scan_bus: bus USB3 port 2 finished in 6 msecs
1277 15:53:11.624486 scan_static_bus for USB0 port 0 done
1278 15:53:11.628231 scan_bus: bus USB0 port 0 finished in 43 msecs
1279 15:53:11.631568 scan_static_bus for PCI: 00:0d.0 done
1280 15:53:11.638351 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1281 15:53:11.638839 PCI: 00:14.0 scanning...
1282 15:53:11.641930 scan_static_bus for PCI: 00:14.0
1283 15:53:11.645101 USB0 port 0 enabled
1284 15:53:11.648266 USB0 port 0 scanning...
1285 15:53:11.651788 scan_static_bus for USB0 port 0
1286 15:53:11.652261 USB2 port 0 enabled
1287 15:53:11.655171 USB2 port 1 disabled
1288 15:53:11.658219 USB2 port 2 enabled
1289 15:53:11.658695 USB2 port 3 disabled
1290 15:53:11.661454 USB2 port 4 disabled
1291 15:53:11.665306 USB2 port 5 enabled
1292 15:53:11.665782 USB2 port 6 disabled
1293 15:53:11.668117 USB2 port 7 disabled
1294 15:53:11.668491 USB2 port 8 enabled
1295 15:53:11.671843 USB2 port 9 enabled
1296 15:53:11.674789 USB3 port 0 enabled
1297 15:53:11.675304 USB3 port 1 disabled
1298 15:53:11.677815 USB3 port 2 disabled
1299 15:53:11.681810 USB3 port 3 disabled
1300 15:53:11.682302 USB2 port 0 scanning...
1301 15:53:11.684947 scan_static_bus for USB2 port 0
1302 15:53:11.688285 scan_static_bus for USB2 port 0 done
1303 15:53:11.694772 scan_bus: bus USB2 port 0 finished in 6 msecs
1304 15:53:11.697811 USB2 port 2 scanning...
1305 15:53:11.701483 scan_static_bus for USB2 port 2
1306 15:53:11.705092 scan_static_bus for USB2 port 2 done
1307 15:53:11.708052 scan_bus: bus USB2 port 2 finished in 6 msecs
1308 15:53:11.711665 USB2 port 5 scanning...
1309 15:53:11.714850 scan_static_bus for USB2 port 5
1310 15:53:11.718442 scan_static_bus for USB2 port 5 done
1311 15:53:11.721639 scan_bus: bus USB2 port 5 finished in 6 msecs
1312 15:53:11.724844 USB2 port 8 scanning...
1313 15:53:11.728249 scan_static_bus for USB2 port 8
1314 15:53:11.731350 scan_static_bus for USB2 port 8 done
1315 15:53:11.735022 scan_bus: bus USB2 port 8 finished in 6 msecs
1316 15:53:11.738189 USB2 port 9 scanning...
1317 15:53:11.742008 scan_static_bus for USB2 port 9
1318 15:53:11.744932 scan_static_bus for USB2 port 9 done
1319 15:53:11.751617 scan_bus: bus USB2 port 9 finished in 6 msecs
1320 15:53:11.752095 USB3 port 0 scanning...
1321 15:53:11.754848 scan_static_bus for USB3 port 0
1322 15:53:11.758297 scan_static_bus for USB3 port 0 done
1323 15:53:11.765170 scan_bus: bus USB3 port 0 finished in 6 msecs
1324 15:53:11.768131 scan_static_bus for USB0 port 0 done
1325 15:53:11.771426 scan_bus: bus USB0 port 0 finished in 120 msecs
1326 15:53:11.775064 scan_static_bus for PCI: 00:14.0 done
1327 15:53:11.781650 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1328 15:53:11.784959 PCI: 00:14.3 scanning...
1329 15:53:11.787897 scan_static_bus for PCI: 00:14.3
1330 15:53:11.788275 GENERIC: 0.0 enabled
1331 15:53:11.794659 scan_static_bus for PCI: 00:14.3 done
1332 15:53:11.797984 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1333 15:53:11.801342 PCI: 00:15.0 scanning...
1334 15:53:11.804656 scan_static_bus for PCI: 00:15.0
1335 15:53:11.805125 I2C: 00:1a enabled
1336 15:53:11.807766 I2C: 00:31 enabled
1337 15:53:11.808195 I2C: 00:32 enabled
1338 15:53:11.814691 scan_static_bus for PCI: 00:15.0 done
1339 15:53:11.818085 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1340 15:53:11.821695 PCI: 00:15.1 scanning...
1341 15:53:11.825055 scan_static_bus for PCI: 00:15.1
1342 15:53:11.825526 I2C: 00:50 enabled
1343 15:53:11.831197 scan_static_bus for PCI: 00:15.1 done
1344 15:53:11.834423 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1345 15:53:11.838209 PCI: 00:15.3 scanning...
1346 15:53:11.841316 scan_static_bus for PCI: 00:15.3
1347 15:53:11.841819 I2C: 00:10 enabled
1348 15:53:11.844464 scan_static_bus for PCI: 00:15.3 done
1349 15:53:11.851177 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1350 15:53:11.854701 PCI: 00:19.1 scanning...
1351 15:53:11.857746 scan_static_bus for PCI: 00:19.1
1352 15:53:11.858217 I2C: 00:15 enabled
1353 15:53:11.861427 I2C: 00:2c enabled
1354 15:53:11.864923 scan_static_bus for PCI: 00:19.1 done
1355 15:53:11.867859 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1356 15:53:11.871473 PCI: 00:1e.3 scanning...
1357 15:53:11.874323 scan_generic_bus for PCI: 00:1e.3
1358 15:53:11.877698 SPI: 00 enabled
1359 15:53:11.881081 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1360 15:53:11.887819 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1361 15:53:11.891563 PCI: 00:1f.0 scanning...
1362 15:53:11.894588 scan_static_bus for PCI: 00:1f.0
1363 15:53:11.895096 PNP: 0c09.0 enabled
1364 15:53:11.897648 PNP: 0c09.0 scanning...
1365 15:53:11.901259 scan_static_bus for PNP: 0c09.0
1366 15:53:11.904450 scan_static_bus for PNP: 0c09.0 done
1367 15:53:11.907328 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1368 15:53:11.914540 scan_static_bus for PCI: 00:1f.0 done
1369 15:53:11.917544 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1370 15:53:11.921061 PCI: 00:1f.2 scanning...
1371 15:53:11.924268 scan_static_bus for PCI: 00:1f.2
1372 15:53:11.924740 GENERIC: 0.0 enabled
1373 15:53:11.927770 GENERIC: 0.0 scanning...
1374 15:53:11.931286 scan_static_bus for GENERIC: 0.0
1375 15:53:11.934737 GENERIC: 0.0 enabled
1376 15:53:11.935264 GENERIC: 1.0 enabled
1377 15:53:11.941302 scan_static_bus for GENERIC: 0.0 done
1378 15:53:11.944430 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1379 15:53:11.948050 scan_static_bus for PCI: 00:1f.2 done
1380 15:53:11.954476 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1381 15:53:11.954956 PCI: 00:1f.3 scanning...
1382 15:53:11.957907 scan_static_bus for PCI: 00:1f.3
1383 15:53:11.964479 scan_static_bus for PCI: 00:1f.3 done
1384 15:53:11.967721 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1385 15:53:11.971083 PCI: 00:1f.5 scanning...
1386 15:53:11.974191 scan_generic_bus for PCI: 00:1f.5
1387 15:53:11.977732 scan_generic_bus for PCI: 00:1f.5 done
1388 15:53:11.980750 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1389 15:53:11.987390 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1390 15:53:11.990632 scan_static_bus for Root Device done
1391 15:53:11.994320 scan_bus: bus Root Device finished in 729 msecs
1392 15:53:11.997603 done
1393 15:53:12.000853 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1394 15:53:12.007322 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1395 15:53:12.014509 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1396 15:53:12.017641 SPI flash protection: WPSW=0 SRP0=0
1397 15:53:12.021375 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1398 15:53:12.027357 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1399 15:53:12.031174 found VGA at PCI: 00:02.0
1400 15:53:12.034502 Setting up VGA for PCI: 00:02.0
1401 15:53:12.041024 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1402 15:53:12.044260 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1403 15:53:12.047690 Allocating resources...
1404 15:53:12.048139 Reading resources...
1405 15:53:12.054235 Root Device read_resources bus 0 link: 0
1406 15:53:12.057337 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1407 15:53:12.060814 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1408 15:53:12.067603 DOMAIN: 0000 read_resources bus 0 link: 0
1409 15:53:12.074329 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1410 15:53:12.077349 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1411 15:53:12.084046 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1412 15:53:12.090812 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1413 15:53:12.097681 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1414 15:53:12.104254 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1415 15:53:12.110935 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1416 15:53:12.117322 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1417 15:53:12.123942 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1418 15:53:12.130794 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1419 15:53:12.137569 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1420 15:53:12.144123 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1421 15:53:12.147330 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1422 15:53:12.154135 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1423 15:53:12.160721 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1424 15:53:12.167175 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1425 15:53:12.174150 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1426 15:53:12.181019 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1427 15:53:12.187277 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1428 15:53:12.194349 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1429 15:53:12.197469 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1430 15:53:12.204578 PCI: 00:04.0 read_resources bus 1 link: 0
1431 15:53:12.207767 PCI: 00:04.0 read_resources bus 1 link: 0 done
1432 15:53:12.210744 PCI: 00:06.0 read_resources bus 1 link: 0
1433 15:53:12.217505 PCI: 00:06.0 read_resources bus 1 link: 0 done
1434 15:53:12.220875 PCI: 00:0d.0 read_resources bus 0 link: 0
1435 15:53:12.224368 USB0 port 0 read_resources bus 0 link: 0
1436 15:53:12.230935 USB0 port 0 read_resources bus 0 link: 0 done
1437 15:53:12.233990 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1438 15:53:12.237459 PCI: 00:14.0 read_resources bus 0 link: 0
1439 15:53:12.244295 USB0 port 0 read_resources bus 0 link: 0
1440 15:53:12.247487 USB0 port 0 read_resources bus 0 link: 0 done
1441 15:53:12.250888 PCI: 00:14.0 read_resources bus 0 link: 0 done
1442 15:53:12.257755 PCI: 00:14.3 read_resources bus 0 link: 0
1443 15:53:12.260632 PCI: 00:14.3 read_resources bus 0 link: 0 done
1444 15:53:12.264299 PCI: 00:15.0 read_resources bus 0 link: 0
1445 15:53:12.270794 PCI: 00:15.0 read_resources bus 0 link: 0 done
1446 15:53:12.274683 PCI: 00:15.1 read_resources bus 0 link: 0
1447 15:53:12.280992 PCI: 00:15.1 read_resources bus 0 link: 0 done
1448 15:53:12.284026 PCI: 00:15.3 read_resources bus 0 link: 0
1449 15:53:12.287290 PCI: 00:15.3 read_resources bus 0 link: 0 done
1450 15:53:12.294214 PCI: 00:19.1 read_resources bus 0 link: 0
1451 15:53:12.297709 PCI: 00:19.1 read_resources bus 0 link: 0 done
1452 15:53:12.301082 PCI: 00:1e.3 read_resources bus 2 link: 0
1453 15:53:12.307634 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1454 15:53:12.310778 PCI: 00:1f.0 read_resources bus 0 link: 0
1455 15:53:12.313913 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1456 15:53:12.320748 PCI: 00:1f.2 read_resources bus 0 link: 0
1457 15:53:12.323964 GENERIC: 0.0 read_resources bus 0 link: 0
1458 15:53:12.327274 GENERIC: 0.0 read_resources bus 0 link: 0 done
1459 15:53:12.334024 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1460 15:53:12.337237 DOMAIN: 0000 read_resources bus 0 link: 0 done
1461 15:53:12.343836 Root Device read_resources bus 0 link: 0 done
1462 15:53:12.344310 Done reading resources.
1463 15:53:12.350541 Show resources in subtree (Root Device)...After reading.
1464 15:53:12.354186 Root Device child on link 0 CPU_CLUSTER: 0
1465 15:53:12.360495 CPU_CLUSTER: 0 child on link 0 APIC: 00
1466 15:53:12.360970 APIC: 00
1467 15:53:12.363726 APIC: 16
1468 15:53:12.364099 APIC: 10
1469 15:53:12.364362 APIC: 12
1470 15:53:12.367030 APIC: 14
1471 15:53:12.367406 APIC: 09
1472 15:53:12.367667 APIC: 08
1473 15:53:12.370839 APIC: 01
1474 15:53:12.374035 DOMAIN: 0000 child on link 0 GPIO: 0
1475 15:53:12.383737 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1476 15:53:12.393897 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1477 15:53:12.394371 GPIO: 0
1478 15:53:12.397041 PCI: 00:00.0
1479 15:53:12.403695 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1480 15:53:12.413786 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1481 15:53:12.423735 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1482 15:53:12.434075 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1483 15:53:12.443684 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1484 15:53:12.453847 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1485 15:53:12.460679 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1486 15:53:12.470094 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1487 15:53:12.479934 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1488 15:53:12.490065 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1489 15:53:12.500036 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1490 15:53:12.509908 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1491 15:53:12.516585 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1492 15:53:12.526864 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1493 15:53:12.537173 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1494 15:53:12.547207 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1495 15:53:12.557026 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1496 15:53:12.566952 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1497 15:53:12.576969 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1498 15:53:12.587136 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1499 15:53:12.593498 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1500 15:53:12.603507 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1501 15:53:12.613480 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1502 15:53:12.623473 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1503 15:53:12.633244 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1504 15:53:12.643380 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1505 15:53:12.649891 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1506 15:53:12.659787 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1507 15:53:12.663600 PCI: 00:02.0
1508 15:53:12.673190 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1509 15:53:12.683217 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1510 15:53:12.693478 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1511 15:53:12.696611 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1512 15:53:12.706347 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1513 15:53:12.710114 GENERIC: 0.0
1514 15:53:12.713857 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1515 15:53:12.723041 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1516 15:53:12.733028 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1517 15:53:12.739668 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1518 15:53:12.743431 PCI: 01:00.0
1519 15:53:12.752933 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1520 15:53:12.763058 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1521 15:53:12.763540 PCI: 00:08.0
1522 15:53:12.766234 PCI: 00:0a.0
1523 15:53:12.776622 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1524 15:53:12.779412 PCI: 00:0d.0 child on link 0 USB0 port 0
1525 15:53:12.789722 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1526 15:53:12.792891 USB0 port 0 child on link 0 USB3 port 0
1527 15:53:12.796255 USB3 port 0
1528 15:53:12.796735 USB3 port 1
1529 15:53:12.799838 USB3 port 2
1530 15:53:12.802835 USB3 port 3
1531 15:53:12.806479 PCI: 00:14.0 child on link 0 USB0 port 0
1532 15:53:12.816411 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1533 15:53:12.819570 USB0 port 0 child on link 0 USB2 port 0
1534 15:53:12.822909 USB2 port 0
1535 15:53:12.823428 USB2 port 1
1536 15:53:12.826395 USB2 port 2
1537 15:53:12.826884 USB2 port 3
1538 15:53:12.830084 USB2 port 4
1539 15:53:12.830577 USB2 port 5
1540 15:53:12.832650 USB2 port 6
1541 15:53:12.833027 USB2 port 7
1542 15:53:12.836447 USB2 port 8
1543 15:53:12.836939 USB2 port 9
1544 15:53:12.839817 USB3 port 0
1545 15:53:12.843134 USB3 port 1
1546 15:53:12.843618 USB3 port 2
1547 15:53:12.846102 USB3 port 3
1548 15:53:12.846746 PCI: 00:14.2
1549 15:53:12.856318 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1550 15:53:12.866281 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1551 15:53:12.869775 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1552 15:53:12.879546 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1553 15:53:12.882485 GENERIC: 0.0
1554 15:53:12.885982 PCI: 00:15.0 child on link 0 I2C: 00:1a
1555 15:53:12.896406 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1556 15:53:12.899646 I2C: 00:1a
1557 15:53:12.900135 I2C: 00:31
1558 15:53:12.903276 I2C: 00:32
1559 15:53:12.906449 PCI: 00:15.1 child on link 0 I2C: 00:50
1560 15:53:12.916488 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1561 15:53:12.917000 I2C: 00:50
1562 15:53:12.919295 PCI: 00:15.2
1563 15:53:12.922944 PCI: 00:15.3 child on link 0 I2C: 00:10
1564 15:53:12.933097 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1565 15:53:12.936284 I2C: 00:10
1566 15:53:12.936775 PCI: 00:16.0
1567 15:53:12.946033 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1568 15:53:12.949551 PCI: 00:19.0
1569 15:53:12.952748 PCI: 00:19.1 child on link 0 I2C: 00:15
1570 15:53:12.962616 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1571 15:53:12.963145 I2C: 00:15
1572 15:53:12.966193 I2C: 00:2c
1573 15:53:12.966683 PCI: 00:1e.0
1574 15:53:12.979628 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1575 15:53:12.982652 PCI: 00:1e.3 child on link 0 SPI: 00
1576 15:53:12.992727 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1577 15:53:12.993238 SPI: 00
1578 15:53:12.999397 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1579 15:53:13.005784 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1580 15:53:13.009261 PNP: 0c09.0
1581 15:53:13.015896 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1582 15:53:13.023221 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1583 15:53:13.032683 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1584 15:53:13.039790 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1585 15:53:13.046120 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1586 15:53:13.046607 GENERIC: 0.0
1587 15:53:13.049430 GENERIC: 1.0
1588 15:53:13.049900 PCI: 00:1f.3
1589 15:53:13.059232 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1590 15:53:13.069042 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1591 15:53:13.072860 PCI: 00:1f.5
1592 15:53:13.082401 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1593 15:53:13.089341 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1594 15:53:13.095915 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1595 15:53:13.098768 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1596 15:53:13.105710 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1597 15:53:13.112339 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1598 15:53:13.115671 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1599 15:53:13.122008 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1600 15:53:13.128882 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1601 15:53:13.138576 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1602 15:53:13.145473 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1603 15:53:13.152073 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1604 15:53:13.158792 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1605 15:53:13.165934 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1606 15:53:13.172186 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1607 15:53:13.175821 DOMAIN: 0000: Resource ranges:
1608 15:53:13.178712 * Base: 1000, Size: 800, Tag: 100
1609 15:53:13.182078 * Base: 1900, Size: e700, Tag: 100
1610 15:53:13.188884 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1611 15:53:13.195752 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1612 15:53:13.202089 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1613 15:53:13.209205 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1614 15:53:13.218790 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1615 15:53:13.225409 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1616 15:53:13.232410 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1617 15:53:13.242115 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1618 15:53:13.248418 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1619 15:53:13.255138 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1620 15:53:13.265509 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1621 15:53:13.272227 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1622 15:53:13.278617 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1623 15:53:13.288386 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1624 15:53:13.295122 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1625 15:53:13.301779 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1626 15:53:13.312526 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1627 15:53:13.318418 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1628 15:53:13.325117 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1629 15:53:13.335250 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1630 15:53:13.341728 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1631 15:53:13.348206 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1632 15:53:13.355097 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1633 15:53:13.364659 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1634 15:53:13.371765 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1635 15:53:13.378071 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1636 15:53:13.388137 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1637 15:53:13.394784 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1638 15:53:13.401790 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1639 15:53:13.411675 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1640 15:53:13.418105 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1641 15:53:13.425025 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1642 15:53:13.434549 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1643 15:53:13.438219 DOMAIN: 0000: Resource ranges:
1644 15:53:13.441758 * Base: 80400000, Size: 3fc00000, Tag: 200
1645 15:53:13.444847 * Base: d0000000, Size: 28000000, Tag: 200
1646 15:53:13.451371 * Base: fa000000, Size: 1000000, Tag: 200
1647 15:53:13.454700 * Base: fb001000, Size: 17ff000, Tag: 200
1648 15:53:13.458143 * Base: fe800000, Size: 300000, Tag: 200
1649 15:53:13.461203 * Base: feb80000, Size: 80000, Tag: 200
1650 15:53:13.468147 * Base: fed00000, Size: 40000, Tag: 200
1651 15:53:13.471177 * Base: fed70000, Size: 10000, Tag: 200
1652 15:53:13.474527 * Base: fed88000, Size: 8000, Tag: 200
1653 15:53:13.477869 * Base: fed93000, Size: d000, Tag: 200
1654 15:53:13.481438 * Base: feda2000, Size: 1e000, Tag: 200
1655 15:53:13.487963 * Base: fede0000, Size: 1220000, Tag: 200
1656 15:53:13.491244 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1657 15:53:13.497806 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1658 15:53:13.504315 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1659 15:53:13.510653 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1660 15:53:13.517847 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1661 15:53:13.524599 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1662 15:53:13.531037 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1663 15:53:13.537663 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1664 15:53:13.544232 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1665 15:53:13.550844 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1666 15:53:13.557839 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1667 15:53:13.564129 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1668 15:53:13.571121 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1669 15:53:13.577451 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1670 15:53:13.584313 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1671 15:53:13.590607 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1672 15:53:13.597538 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1673 15:53:13.604319 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1674 15:53:13.610734 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1675 15:53:13.617227 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1676 15:53:13.627053 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1677 15:53:13.634318 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1678 15:53:13.637064 PCI: 00:06.0: Resource ranges:
1679 15:53:13.640659 * Base: 80400000, Size: 100000, Tag: 200
1680 15:53:13.647157 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1681 15:53:13.653962 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1682 15:53:13.663656 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1683 15:53:13.670695 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1684 15:53:13.673994 Root Device assign_resources, bus 0 link: 0
1685 15:53:13.680509 DOMAIN: 0000 assign_resources, bus 0 link: 0
1686 15:53:13.686794 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1687 15:53:13.697088 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1688 15:53:13.703580 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1689 15:53:13.710168 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1690 15:53:13.716674 PCI: 00:04.0 assign_resources, bus 1 link: 0
1691 15:53:13.720038 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1692 15:53:13.729951 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1693 15:53:13.740257 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1694 15:53:13.746505 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1695 15:53:13.753735 PCI: 00:06.0 assign_resources, bus 1 link: 0
1696 15:53:13.760126 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1697 15:53:13.766520 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1698 15:53:13.773605 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1699 15:53:13.780156 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1700 15:53:13.789472 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1701 15:53:13.793002 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1702 15:53:13.799536 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1703 15:53:13.806326 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1704 15:53:13.809718 PCI: 00:14.0 assign_resources, bus 0 link: 0
1705 15:53:13.816388 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1706 15:53:13.823049 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1707 15:53:13.832767 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1708 15:53:13.839455 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1709 15:53:13.846423 PCI: 00:14.3 assign_resources, bus 0 link: 0
1710 15:53:13.849734 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1711 15:53:13.856171 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1712 15:53:13.863389 PCI: 00:15.0 assign_resources, bus 0 link: 0
1713 15:53:13.866014 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1714 15:53:13.875793 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1715 15:53:13.879358 PCI: 00:15.1 assign_resources, bus 0 link: 0
1716 15:53:13.886043 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1717 15:53:13.892576 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1718 15:53:13.896120 PCI: 00:15.3 assign_resources, bus 0 link: 0
1719 15:53:13.902666 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1720 15:53:13.909218 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1721 15:53:13.919318 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1722 15:53:13.922768 PCI: 00:19.1 assign_resources, bus 0 link: 0
1723 15:53:13.926033 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1724 15:53:13.935839 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1725 15:53:13.938938 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1726 15:53:13.945814 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1727 15:53:13.948879 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1728 15:53:13.955683 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1729 15:53:13.959049 LPC: Trying to open IO window from 800 size 1ff
1730 15:53:13.969194 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1731 15:53:13.975681 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1732 15:53:13.982064 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1733 15:53:13.988838 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1734 15:53:13.991805 Root Device assign_resources, bus 0 link: 0 done
1735 15:53:13.995910 Done setting resources.
1736 15:53:14.002566 Show resources in subtree (Root Device)...After assigning values.
1737 15:53:14.005219 Root Device child on link 0 CPU_CLUSTER: 0
1738 15:53:14.012103 CPU_CLUSTER: 0 child on link 0 APIC: 00
1739 15:53:14.012597 APIC: 00
1740 15:53:14.012871 APIC: 16
1741 15:53:14.015617 APIC: 10
1742 15:53:14.016107 APIC: 12
1743 15:53:14.016385 APIC: 14
1744 15:53:14.018550 APIC: 09
1745 15:53:14.018927 APIC: 08
1746 15:53:14.021876 APIC: 01
1747 15:53:14.025291 DOMAIN: 0000 child on link 0 GPIO: 0
1748 15:53:14.035229 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1749 15:53:14.045380 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1750 15:53:14.045874 GPIO: 0
1751 15:53:14.046158 PCI: 00:00.0
1752 15:53:14.055425 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1753 15:53:14.065172 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1754 15:53:14.075114 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1755 15:53:14.085176 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1756 15:53:14.094861 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1757 15:53:14.101614 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1758 15:53:14.111670 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1759 15:53:14.121579 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1760 15:53:14.131739 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1761 15:53:14.141521 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1762 15:53:14.151443 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1763 15:53:14.161116 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1764 15:53:14.167990 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1765 15:53:14.178201 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1766 15:53:14.188045 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1767 15:53:14.197996 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1768 15:53:14.207828 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1769 15:53:14.217905 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1770 15:53:14.227687 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1771 15:53:14.234306 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1772 15:53:14.244368 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1773 15:53:14.254166 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1774 15:53:14.264351 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1775 15:53:14.274208 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1776 15:53:14.284320 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1777 15:53:14.294182 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1778 15:53:14.303854 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1779 15:53:14.310644 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1780 15:53:14.313897 PCI: 00:02.0
1781 15:53:14.323840 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1782 15:53:14.333879 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1783 15:53:14.343856 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1784 15:53:14.350448 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1785 15:53:14.360174 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1786 15:53:14.360648 GENERIC: 0.0
1787 15:53:14.367105 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1788 15:53:14.373707 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1789 15:53:14.386933 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1790 15:53:14.397316 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1791 15:53:14.400205 PCI: 01:00.0
1792 15:53:14.410180 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1793 15:53:14.420189 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1794 15:53:14.420678 PCI: 00:08.0
1795 15:53:14.423594 PCI: 00:0a.0
1796 15:53:14.433481 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1797 15:53:14.436837 PCI: 00:0d.0 child on link 0 USB0 port 0
1798 15:53:14.446875 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1799 15:53:14.453689 USB0 port 0 child on link 0 USB3 port 0
1800 15:53:14.454181 USB3 port 0
1801 15:53:14.456878 USB3 port 1
1802 15:53:14.457366 USB3 port 2
1803 15:53:14.460187 USB3 port 3
1804 15:53:14.463092 PCI: 00:14.0 child on link 0 USB0 port 0
1805 15:53:14.473270 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1806 15:53:14.479985 USB0 port 0 child on link 0 USB2 port 0
1807 15:53:14.480470 USB2 port 0
1808 15:53:14.482847 USB2 port 1
1809 15:53:14.483211 USB2 port 2
1810 15:53:14.486457 USB2 port 3
1811 15:53:14.487050 USB2 port 4
1812 15:53:14.489703 USB2 port 5
1813 15:53:14.490082 USB2 port 6
1814 15:53:14.493023 USB2 port 7
1815 15:53:14.493389 USB2 port 8
1816 15:53:14.496597 USB2 port 9
1817 15:53:14.497085 USB3 port 0
1818 15:53:14.499819 USB3 port 1
1819 15:53:14.500305 USB3 port 2
1820 15:53:14.503353 USB3 port 3
1821 15:53:14.503715 PCI: 00:14.2
1822 15:53:14.516596 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1823 15:53:14.526493 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1824 15:53:14.530140 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1825 15:53:14.540128 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1826 15:53:14.543094 GENERIC: 0.0
1827 15:53:14.546502 PCI: 00:15.0 child on link 0 I2C: 00:1a
1828 15:53:14.556330 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1829 15:53:14.559702 I2C: 00:1a
1830 15:53:14.560191 I2C: 00:31
1831 15:53:14.563043 I2C: 00:32
1832 15:53:14.566554 PCI: 00:15.1 child on link 0 I2C: 00:50
1833 15:53:14.576385 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1834 15:53:14.576882 I2C: 00:50
1835 15:53:14.579603 PCI: 00:15.2
1836 15:53:14.582878 PCI: 00:15.3 child on link 0 I2C: 00:10
1837 15:53:14.593017 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1838 15:53:14.596266 I2C: 00:10
1839 15:53:14.596750 PCI: 00:16.0
1840 15:53:14.606328 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1841 15:53:14.609777 PCI: 00:19.0
1842 15:53:14.612960 PCI: 00:19.1 child on link 0 I2C: 00:15
1843 15:53:14.622691 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1844 15:53:14.626259 I2C: 00:15
1845 15:53:14.626745 I2C: 00:2c
1846 15:53:14.629200 PCI: 00:1e.0
1847 15:53:14.639479 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1848 15:53:14.642821 PCI: 00:1e.3 child on link 0 SPI: 00
1849 15:53:14.652572 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1850 15:53:14.656009 SPI: 00
1851 15:53:14.659420 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1852 15:53:14.669604 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1853 15:53:14.670099 PNP: 0c09.0
1854 15:53:14.679372 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1855 15:53:14.682313 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1856 15:53:14.692204 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1857 15:53:14.702113 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1858 15:53:14.706031 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1859 15:53:14.709030 GENERIC: 0.0
1860 15:53:14.709358 GENERIC: 1.0
1861 15:53:14.712673 PCI: 00:1f.3
1862 15:53:14.722623 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1863 15:53:14.732466 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1864 15:53:14.736133 PCI: 00:1f.5
1865 15:53:14.746118 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1866 15:53:14.749915 Done allocating resources.
1867 15:53:14.752444 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1868 15:53:14.758971 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1869 15:53:14.765846 Configure audio over I2S with MAX98373 NAU88L25B.
1870 15:53:14.769251 Enabling BT offload
1871 15:53:14.775830 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1872 15:53:14.779161 Enabling resources...
1873 15:53:14.782831 PCI: 00:00.0 subsystem <- 8086/4609
1874 15:53:14.786007 PCI: 00:00.0 cmd <- 06
1875 15:53:14.788937 PCI: 00:02.0 subsystem <- 8086/46b3
1876 15:53:14.792727 PCI: 00:02.0 cmd <- 03
1877 15:53:14.795463 PCI: 00:04.0 subsystem <- 8086/461d
1878 15:53:14.795843 PCI: 00:04.0 cmd <- 02
1879 15:53:14.799316 PCI: 00:06.0 bridge ctrl <- 0013
1880 15:53:14.802588 PCI: 00:06.0 subsystem <- 8086/464d
1881 15:53:14.805711 PCI: 00:06.0 cmd <- 106
1882 15:53:14.809149 PCI: 00:0a.0 subsystem <- 8086/467d
1883 15:53:14.812153 PCI: 00:0a.0 cmd <- 02
1884 15:53:14.815612 PCI: 00:0d.0 subsystem <- 8086/461e
1885 15:53:14.819071 PCI: 00:0d.0 cmd <- 02
1886 15:53:14.822185 PCI: 00:14.0 subsystem <- 8086/51ed
1887 15:53:14.825459 PCI: 00:14.0 cmd <- 02
1888 15:53:14.829066 PCI: 00:14.2 subsystem <- 8086/51ef
1889 15:53:14.829559 PCI: 00:14.2 cmd <- 02
1890 15:53:14.835666 PCI: 00:14.3 subsystem <- 8086/51f0
1891 15:53:14.836165 PCI: 00:14.3 cmd <- 02
1892 15:53:14.839099 PCI: 00:15.0 subsystem <- 8086/51e8
1893 15:53:14.842535 PCI: 00:15.0 cmd <- 02
1894 15:53:14.845374 PCI: 00:15.1 subsystem <- 8086/51e9
1895 15:53:14.849197 PCI: 00:15.1 cmd <- 06
1896 15:53:14.851886 PCI: 00:15.3 subsystem <- 8086/51eb
1897 15:53:14.855579 PCI: 00:15.3 cmd <- 02
1898 15:53:14.858750 PCI: 00:16.0 subsystem <- 8086/51e0
1899 15:53:14.859279 PCI: 00:16.0 cmd <- 02
1900 15:53:14.865433 PCI: 00:19.1 subsystem <- 8086/51c6
1901 15:53:14.865959 PCI: 00:19.1 cmd <- 02
1902 15:53:14.868812 PCI: 00:1e.0 subsystem <- 8086/51a8
1903 15:53:14.872236 PCI: 00:1e.0 cmd <- 06
1904 15:53:14.875608 PCI: 00:1e.3 subsystem <- 8086/51ab
1905 15:53:14.878687 PCI: 00:1e.3 cmd <- 02
1906 15:53:14.882489 PCI: 00:1f.0 subsystem <- 8086/5182
1907 15:53:14.885497 PCI: 00:1f.0 cmd <- 407
1908 15:53:14.888588 PCI: 00:1f.3 subsystem <- 8086/51c8
1909 15:53:14.889059 PCI: 00:1f.3 cmd <- 02
1910 15:53:14.895380 PCI: 00:1f.5 subsystem <- 8086/51a4
1911 15:53:14.895870 PCI: 00:1f.5 cmd <- 406
1912 15:53:14.898447 PCI: 01:00.0 cmd <- 02
1913 15:53:14.898823 done.
1914 15:53:14.905483 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1915 15:53:14.908659 ME: Version: Unavailable
1916 15:53:14.912205 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1917 15:53:14.915333 Initializing devices...
1918 15:53:14.918441 Root Device init
1919 15:53:14.918823 mainboard: EC init
1920 15:53:14.925170 Chrome EC: Set SMI mask to 0x0000000000000000
1921 15:53:14.928253 Chrome EC: UHEPI supported
1922 15:53:14.935521 Chrome EC: clear events_b mask to 0x0000000000000000
1923 15:53:14.938496 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1924 15:53:14.945668 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1925 15:53:14.952182 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1926 15:53:14.959040 Chrome EC: Set WAKE mask to 0x0000000000000000
1927 15:53:14.965766 Root Device init finished in 42 msecs
1928 15:53:14.966257 PCI: 00:00.0 init
1929 15:53:14.968395 CPU TDP = 15 Watts
1930 15:53:14.972084 CPU PL1 = 15 Watts
1931 15:53:14.972577 CPU PL2 = 55 Watts
1932 15:53:14.975367 CPU PL4 = 123 Watts
1933 15:53:14.979153 PCI: 00:00.0 init finished in 8 msecs
1934 15:53:14.981910 PCI: 00:02.0 init
1935 15:53:14.982296 GMA: Found VBT in CBFS
1936 15:53:14.985594 GMA: Found valid VBT in CBFS
1937 15:53:14.992404 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1938 15:53:14.998793 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1939 15:53:15.002278 PCI: 00:02.0 init finished in 18 msecs
1940 15:53:15.005346 PCI: 00:06.0 init
1941 15:53:15.008814 Initializing PCH PCIe bridge.
1942 15:53:15.012190 PCI: 00:06.0 init finished in 3 msecs
1943 15:53:15.015432 PCI: 00:0a.0 init
1944 15:53:15.018397 PCI: 00:0a.0 init finished in 0 msecs
1945 15:53:15.018882 PCI: 00:14.0 init
1946 15:53:15.021771 PCI: 00:14.0 init finished in 0 msecs
1947 15:53:15.025078 PCI: 00:14.2 init
1948 15:53:15.028592 PCI: 00:14.2 init finished in 0 msecs
1949 15:53:15.031670 PCI: 00:15.0 init
1950 15:53:15.035298 I2C bus 0 version 0x3230302a
1951 15:53:15.038879 DW I2C bus 0 at 0x80655000 (400 KHz)
1952 15:53:15.042053 PCI: 00:15.0 init finished in 6 msecs
1953 15:53:15.042564 PCI: 00:15.1 init
1954 15:53:15.045257 I2C bus 1 version 0x3230302a
1955 15:53:15.048536 DW I2C bus 1 at 0x80656000 (400 KHz)
1956 15:53:15.051703 PCI: 00:15.1 init finished in 6 msecs
1957 15:53:15.055325 PCI: 00:15.3 init
1958 15:53:15.058672 I2C bus 3 version 0x3230302a
1959 15:53:15.062008 DW I2C bus 3 at 0x80657000 (400 KHz)
1960 15:53:15.065613 PCI: 00:15.3 init finished in 6 msecs
1961 15:53:15.068619 PCI: 00:16.0 init
1962 15:53:15.071636 PCI: 00:16.0 init finished in 0 msecs
1963 15:53:15.072067 PCI: 00:19.1 init
1964 15:53:15.075101 I2C bus 5 version 0x3230302a
1965 15:53:15.078561 DW I2C bus 5 at 0x80659000 (400 KHz)
1966 15:53:15.085138 PCI: 00:19.1 init finished in 6 msecs
1967 15:53:15.085615 PCI: 00:1f.0 init
1968 15:53:15.091686 IOAPIC: Initializing IOAPIC at 0xfec00000
1969 15:53:15.092182 IOAPIC: ID = 0x02
1970 15:53:15.095112 IOAPIC: Dumping registers
1971 15:53:15.098423 reg 0x0000: 0x02000000
1972 15:53:15.098893 reg 0x0001: 0x00770020
1973 15:53:15.101554 reg 0x0002: 0x00000000
1974 15:53:15.104638 IOAPIC: 120 interrupts
1975 15:53:15.108452 IOAPIC: Clearing IOAPIC at 0xfec00000
1976 15:53:15.111803 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1977 15:53:15.118219 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1978 15:53:15.121601 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1979 15:53:15.128210 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1980 15:53:15.131548 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1981 15:53:15.138297 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1982 15:53:15.141358 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1983 15:53:15.147932 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1984 15:53:15.151484 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1985 15:53:15.154576 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1986 15:53:15.161612 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1987 15:53:15.164656 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1988 15:53:15.171151 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1989 15:53:15.174651 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1990 15:53:15.181192 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1991 15:53:15.184259 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1992 15:53:15.191063 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1993 15:53:15.194770 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1994 15:53:15.197615 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1995 15:53:15.204520 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1996 15:53:15.207683 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1997 15:53:15.214420 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1998 15:53:15.217833 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1999 15:53:15.224285 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2000 15:53:15.227518 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2001 15:53:15.234961 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2002 15:53:15.237580 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2003 15:53:15.240929 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2004 15:53:15.248198 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2005 15:53:15.251822 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2006 15:53:15.258597 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2007 15:53:15.261587 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2008 15:53:15.264949 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2009 15:53:15.271515 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2010 15:53:15.274771 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2011 15:53:15.281637 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2012 15:53:15.284530 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2013 15:53:15.291439 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2014 15:53:15.294816 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2015 15:53:15.301749 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2016 15:53:15.304781 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2017 15:53:15.307812 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2018 15:53:15.314780 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2019 15:53:15.317987 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2020 15:53:15.324710 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2021 15:53:15.328065 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2022 15:53:15.334507 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2023 15:53:15.337958 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2024 15:53:15.344967 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2025 15:53:15.348063 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2026 15:53:15.351316 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2027 15:53:15.357921 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2028 15:53:15.361093 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2029 15:53:15.367616 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2030 15:53:15.370871 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2031 15:53:15.377830 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2032 15:53:15.381303 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2033 15:53:15.388039 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2034 15:53:15.390764 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2035 15:53:15.394233 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2036 15:53:15.400854 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2037 15:53:15.404398 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2038 15:53:15.411030 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2039 15:53:15.414292 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2040 15:53:15.421076 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2041 15:53:15.424538 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2042 15:53:15.431063 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2043 15:53:15.434163 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2044 15:53:15.437607 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2045 15:53:15.444590 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2046 15:53:15.447776 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2047 15:53:15.454424 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2048 15:53:15.458018 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2049 15:53:15.464105 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2050 15:53:15.467506 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2051 15:53:15.470880 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2052 15:53:15.477954 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2053 15:53:15.481116 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2054 15:53:15.487322 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2055 15:53:15.490920 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2056 15:53:15.497454 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2057 15:53:15.500723 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2058 15:53:15.507544 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2059 15:53:15.510886 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2060 15:53:15.513814 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2061 15:53:15.520651 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2062 15:53:15.523829 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2063 15:53:15.530191 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2064 15:53:15.534041 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2065 15:53:15.540689 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2066 15:53:15.543859 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2067 15:53:15.550761 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2068 15:53:15.554064 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2069 15:53:15.557702 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2070 15:53:15.564082 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2071 15:53:15.567323 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2072 15:53:15.574048 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2073 15:53:15.577122 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2074 15:53:15.583708 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2075 15:53:15.587089 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2076 15:53:15.593768 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2077 15:53:15.596917 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2078 15:53:15.600235 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2079 15:53:15.607040 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2080 15:53:15.610679 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2081 15:53:15.617154 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2082 15:53:15.620520 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2083 15:53:15.626817 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2084 15:53:15.630391 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2085 15:53:15.633588 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2086 15:53:15.640244 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2087 15:53:15.644182 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2088 15:53:15.650395 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2089 15:53:15.653466 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2090 15:53:15.660407 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2091 15:53:15.663682 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2092 15:53:15.670316 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2093 15:53:15.673461 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2094 15:53:15.677176 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2095 15:53:15.683508 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2096 15:53:15.686840 IOAPIC: Bootstrap Processor Local APIC = 0x00
2097 15:53:15.693541 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2098 15:53:15.696730 PCI: 00:1f.0 init finished in 607 msecs
2099 15:53:15.699670 PCI: 00:1f.2 init
2100 15:53:15.700059 apm_control: Disabling ACPI.
2101 15:53:15.705912 APMC done.
2102 15:53:15.709559 PCI: 00:1f.2 init finished in 6 msecs
2103 15:53:15.713235 PCI: 00:1f.3 init
2104 15:53:15.716591 PCI: 00:1f.3 init finished in 0 msecs
2105 15:53:15.717076 PCI: 01:00.0 init
2106 15:53:15.719162 PCI: 01:00.0 init finished in 0 msecs
2107 15:53:15.722656 PNP: 0c09.0 init
2108 15:53:15.726182 Google Chrome EC uptime: 12.137 seconds
2109 15:53:15.732937 Google Chrome AP resets since EC boot: 1
2110 15:53:15.736194 Google Chrome most recent AP reset causes:
2111 15:53:15.739336 0.341: 32775 shutdown: entering G3
2112 15:53:15.746049 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2113 15:53:15.749475 PNP: 0c09.0 init finished in 23 msecs
2114 15:53:15.752492 GENERIC: 0.0 init
2115 15:53:15.755944 GENERIC: 0.0 init finished in 0 msecs
2116 15:53:15.756418 GENERIC: 1.0 init
2117 15:53:15.762711 GENERIC: 1.0 init finished in 0 msecs
2118 15:53:15.763223 Devices initialized
2119 15:53:15.765910 Show all devs... After init.
2120 15:53:15.769106 Root Device: enabled 1
2121 15:53:15.772521 CPU_CLUSTER: 0: enabled 1
2122 15:53:15.773002 DOMAIN: 0000: enabled 1
2123 15:53:15.776012 GPIO: 0: enabled 1
2124 15:53:15.778960 PCI: 00:00.0: enabled 1
2125 15:53:15.779463 PCI: 00:01.0: enabled 0
2126 15:53:15.782549 PCI: 00:01.1: enabled 0
2127 15:53:15.785800 PCI: 00:02.0: enabled 1
2128 15:53:15.789222 PCI: 00:04.0: enabled 1
2129 15:53:15.789692 PCI: 00:05.0: enabled 0
2130 15:53:15.792482 PCI: 00:06.0: enabled 1
2131 15:53:15.795514 PCI: 00:06.2: enabled 0
2132 15:53:15.795828 PCI: 00:07.0: enabled 0
2133 15:53:15.799465 PCI: 00:07.1: enabled 0
2134 15:53:15.802226 PCI: 00:07.2: enabled 0
2135 15:53:15.805992 PCI: 00:07.3: enabled 0
2136 15:53:15.806470 PCI: 00:08.0: enabled 0
2137 15:53:15.809054 PCI: 00:09.0: enabled 0
2138 15:53:15.812339 PCI: 00:0a.0: enabled 1
2139 15:53:15.815552 PCI: 00:0d.0: enabled 1
2140 15:53:15.815889 PCI: 00:0d.1: enabled 0
2141 15:53:15.818892 PCI: 00:0d.2: enabled 0
2142 15:53:15.822438 PCI: 00:0d.3: enabled 0
2143 15:53:15.825646 PCI: 00:0e.0: enabled 0
2144 15:53:15.826121 PCI: 00:10.0: enabled 0
2145 15:53:15.829143 PCI: 00:10.1: enabled 0
2146 15:53:15.832703 PCI: 00:10.6: enabled 0
2147 15:53:15.833185 PCI: 00:10.7: enabled 0
2148 15:53:15.835746 PCI: 00:12.0: enabled 0
2149 15:53:15.839436 PCI: 00:12.6: enabled 0
2150 15:53:15.842552 PCI: 00:12.7: enabled 0
2151 15:53:15.843053 PCI: 00:13.0: enabled 0
2152 15:53:15.845796 PCI: 00:14.0: enabled 1
2153 15:53:15.849028 PCI: 00:14.1: enabled 0
2154 15:53:15.852379 PCI: 00:14.2: enabled 1
2155 15:53:15.852848 PCI: 00:14.3: enabled 1
2156 15:53:15.855376 PCI: 00:15.0: enabled 1
2157 15:53:15.859012 PCI: 00:15.1: enabled 1
2158 15:53:15.862848 PCI: 00:15.2: enabled 0
2159 15:53:15.863360 PCI: 00:15.3: enabled 1
2160 15:53:15.865628 PCI: 00:16.0: enabled 1
2161 15:53:15.868913 PCI: 00:16.1: enabled 0
2162 15:53:15.872209 PCI: 00:16.2: enabled 0
2163 15:53:15.872686 PCI: 00:16.3: enabled 0
2164 15:53:15.875682 PCI: 00:16.4: enabled 0
2165 15:53:15.878920 PCI: 00:16.5: enabled 0
2166 15:53:15.879456 PCI: 00:17.0: enabled 0
2167 15:53:15.882391 PCI: 00:19.0: enabled 0
2168 15:53:15.885285 PCI: 00:19.1: enabled 1
2169 15:53:15.888895 PCI: 00:19.2: enabled 0
2170 15:53:15.889368 PCI: 00:1a.0: enabled 0
2171 15:53:15.891929 PCI: 00:1c.0: enabled 0
2172 15:53:15.895424 PCI: 00:1c.1: enabled 0
2173 15:53:15.899057 PCI: 00:1c.2: enabled 0
2174 15:53:15.899562 PCI: 00:1c.3: enabled 0
2175 15:53:15.902004 PCI: 00:1c.4: enabled 0
2176 15:53:15.905570 PCI: 00:1c.5: enabled 0
2177 15:53:15.908985 PCI: 00:1c.6: enabled 0
2178 15:53:15.909466 PCI: 00:1c.7: enabled 0
2179 15:53:15.912067 PCI: 00:1d.0: enabled 0
2180 15:53:15.915420 PCI: 00:1d.1: enabled 0
2181 15:53:15.915896 PCI: 00:1d.2: enabled 0
2182 15:53:15.918907 PCI: 00:1d.3: enabled 0
2183 15:53:15.922107 PCI: 00:1e.0: enabled 1
2184 15:53:15.925192 PCI: 00:1e.1: enabled 0
2185 15:53:15.925511 PCI: 00:1e.2: enabled 0
2186 15:53:15.928912 PCI: 00:1e.3: enabled 1
2187 15:53:15.932249 PCI: 00:1f.0: enabled 1
2188 15:53:15.935241 PCI: 00:1f.1: enabled 0
2189 15:53:15.935736 PCI: 00:1f.2: enabled 1
2190 15:53:15.938719 PCI: 00:1f.3: enabled 1
2191 15:53:15.942087 PCI: 00:1f.4: enabled 0
2192 15:53:15.945495 PCI: 00:1f.5: enabled 1
2193 15:53:15.945979 PCI: 00:1f.6: enabled 0
2194 15:53:15.948661 PCI: 00:1f.7: enabled 0
2195 15:53:15.952015 GENERIC: 0.0: enabled 1
2196 15:53:15.952401 GENERIC: 0.0: enabled 1
2197 15:53:15.955311 GENERIC: 1.0: enabled 1
2198 15:53:15.958807 GENERIC: 0.0: enabled 1
2199 15:53:15.961969 GENERIC: 1.0: enabled 1
2200 15:53:15.962577 USB0 port 0: enabled 1
2201 15:53:15.965469 USB0 port 0: enabled 1
2202 15:53:15.968584 GENERIC: 0.0: enabled 1
2203 15:53:15.971755 I2C: 00:1a: enabled 1
2204 15:53:15.972245 I2C: 00:31: enabled 1
2205 15:53:15.974959 I2C: 00:32: enabled 1
2206 15:53:15.978475 I2C: 00:50: enabled 1
2207 15:53:15.978974 I2C: 00:10: enabled 1
2208 15:53:15.981790 I2C: 00:15: enabled 1
2209 15:53:15.985013 I2C: 00:2c: enabled 1
2210 15:53:15.985403 GENERIC: 0.0: enabled 1
2211 15:53:15.988390 SPI: 00: enabled 1
2212 15:53:15.991739 PNP: 0c09.0: enabled 1
2213 15:53:15.992230 GENERIC: 0.0: enabled 1
2214 15:53:15.994784 USB3 port 0: enabled 1
2215 15:53:15.998435 USB3 port 1: enabled 0
2216 15:53:16.001639 USB3 port 2: enabled 1
2217 15:53:16.001998 USB3 port 3: enabled 0
2218 15:53:16.005060 USB2 port 0: enabled 1
2219 15:53:16.008377 USB2 port 1: enabled 0
2220 15:53:16.008759 USB2 port 2: enabled 1
2221 15:53:16.012231 USB2 port 3: enabled 0
2222 15:53:16.015431 USB2 port 4: enabled 0
2223 15:53:16.015923 USB2 port 5: enabled 1
2224 15:53:16.018301 USB2 port 6: enabled 0
2225 15:53:16.022480 USB2 port 7: enabled 0
2226 15:53:16.024795 USB2 port 8: enabled 1
2227 15:53:16.025182 USB2 port 9: enabled 1
2228 15:53:16.028253 USB3 port 0: enabled 1
2229 15:53:16.031559 USB3 port 1: enabled 0
2230 15:53:16.032052 USB3 port 2: enabled 0
2231 15:53:16.034914 USB3 port 3: enabled 0
2232 15:53:16.038517 GENERIC: 0.0: enabled 1
2233 15:53:16.041575 GENERIC: 1.0: enabled 1
2234 15:53:16.042083 APIC: 00: enabled 1
2235 15:53:16.044938 APIC: 16: enabled 1
2236 15:53:16.045428 APIC: 10: enabled 1
2237 15:53:16.047993 APIC: 12: enabled 1
2238 15:53:16.052017 APIC: 14: enabled 1
2239 15:53:16.052501 APIC: 09: enabled 1
2240 15:53:16.054951 APIC: 08: enabled 1
2241 15:53:16.058281 APIC: 01: enabled 1
2242 15:53:16.058766 PCI: 01:00.0: enabled 1
2243 15:53:16.064736 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2244 15:53:16.068338 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2245 15:53:16.074925 ELOG: NV offset 0xf20000 size 0x4000
2246 15:53:16.081580 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2247 15:53:16.088151 ELOG: Event(17) added with size 13 at 2023-08-07 15:53:34 UTC
2248 15:53:16.094848 ELOG: Event(9E) added with size 10 at 2023-08-07 15:53:34 UTC
2249 15:53:16.101122 ELOG: Event(9F) added with size 14 at 2023-08-07 15:53:34 UTC
2250 15:53:16.107791 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2251 15:53:16.111121 ELOG: Event(A0) added with size 9 at 2023-08-07 15:53:34 UTC
2252 15:53:16.118139 elog_add_boot_reason: Logged dev mode boot
2253 15:53:16.124628 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2254 15:53:16.125119 Finalize devices...
2255 15:53:16.127502 PCI: 00:16.0 final
2256 15:53:16.127878 PCI: 00:1f.2 final
2257 15:53:16.131201 GENERIC: 0.0 final
2258 15:53:16.138010 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2259 15:53:16.138502 GENERIC: 1.0 final
2260 15:53:16.144670 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2261 15:53:16.147891 Devices finalized
2262 15:53:16.150979 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2263 15:53:16.158008 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2264 15:53:16.164397 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2265 15:53:16.168069 ME: HFSTS1 : 0x90000245
2266 15:53:16.171352 ME: HFSTS2 : 0x82100116
2267 15:53:16.178191 ME: HFSTS3 : 0x00000050
2268 15:53:16.181229 ME: HFSTS4 : 0x00004000
2269 15:53:16.184857 ME: HFSTS5 : 0x00000000
2270 15:53:16.191221 ME: HFSTS6 : 0x40600006
2271 15:53:16.194662 ME: Manufacturing Mode : NO
2272 15:53:16.198383 ME: SPI Protection Mode Enabled : YES
2273 15:53:16.201040 ME: FPFs Committed : YES
2274 15:53:16.204728 ME: Manufacturing Vars Locked : YES
2275 15:53:16.207514 ME: FW Partition Table : OK
2276 15:53:16.214391 ME: Bringup Loader Failure : NO
2277 15:53:16.217787 ME: Firmware Init Complete : YES
2278 15:53:16.221329 ME: Boot Options Present : NO
2279 15:53:16.224630 ME: Update In Progress : NO
2280 15:53:16.227596 ME: D0i3 Support : YES
2281 15:53:16.231347 ME: Low Power State Enabled : NO
2282 15:53:16.234521 ME: CPU Replaced : YES
2283 15:53:16.241168 ME: CPU Replacement Valid : YES
2284 15:53:16.244253 ME: Current Working State : 5
2285 15:53:16.247873 ME: Current Operation State : 1
2286 15:53:16.250640 ME: Current Operation Mode : 0
2287 15:53:16.254462 ME: Error Code : 0
2288 15:53:16.257891 ME: Enhanced Debug Mode : NO
2289 15:53:16.260718 ME: CPU Debug Disabled : YES
2290 15:53:16.264309 ME: TXT Support : NO
2291 15:53:16.267493 ME: WP for RO is enabled : YES
2292 15:53:16.274330 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2293 15:53:16.281128 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2294 15:53:16.284199 Ramoops buffer: 0x100000@0x76899000.
2295 15:53:16.290843 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2296 15:53:16.297523 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2297 15:53:16.300611 CBFS: 'fallback/slic' not found.
2298 15:53:16.303889 ACPI: Writing ACPI tables at 7686d000.
2299 15:53:16.307397 ACPI: * FACS
2300 15:53:16.307827 ACPI: * DSDT
2301 15:53:16.313708 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2302 15:53:16.319110 ACPI: * FADT
2303 15:53:16.319597 SCI is IRQ9
2304 15:53:16.325477 ACPI: added table 1/32, length now 40
2305 15:53:16.325942 ACPI: * SSDT
2306 15:53:16.332331 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2307 15:53:16.335338 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2308 15:53:16.342186 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2309 15:53:16.345393 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2310 15:53:16.352317 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2311 15:53:16.355662 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2312 15:53:16.362295 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2313 15:53:16.368939 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2314 15:53:16.372126 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2315 15:53:16.378551 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2316 15:53:16.381896 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2317 15:53:16.388735 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2318 15:53:16.392086 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2319 15:53:16.398234 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2320 15:53:16.405403 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2321 15:53:16.408365 PS2K: Passing 80 keymaps to kernel
2322 15:53:16.415023 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2323 15:53:16.421913 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2324 15:53:16.428690 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2325 15:53:16.434890 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2326 15:53:16.438329 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2327 15:53:16.445086 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2328 15:53:16.452250 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2329 15:53:16.458208 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2330 15:53:16.465266 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2331 15:53:16.471827 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2332 15:53:16.475089 ACPI: added table 2/32, length now 44
2333 15:53:16.475559 ACPI: * MCFG
2334 15:53:16.478334 ACPI: added table 3/32, length now 48
2335 15:53:16.481600 ACPI: * TPM2
2336 15:53:16.485228 TPM2 log created at 0x7685d000
2337 15:53:16.488038 ACPI: added table 4/32, length now 52
2338 15:53:16.491487 ACPI: * LPIT
2339 15:53:16.495288 ACPI: added table 5/32, length now 56
2340 15:53:16.495741 ACPI: * MADT
2341 15:53:16.498287 SCI is IRQ9
2342 15:53:16.501306 ACPI: added table 6/32, length now 60
2343 15:53:16.504803 cmd_reg from pmc_make_ipc_cmd 1052838
2344 15:53:16.511140 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2345 15:53:16.518053 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2346 15:53:16.521368 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2347 15:53:16.528347 PMC CrashLog size in discovery mode: 0xC00
2348 15:53:16.531091 cpu crashlog bar addr: 0x80640000
2349 15:53:16.534700 cpu discovery table offset: 0x6030
2350 15:53:16.537963 cpu_crashlog_discovery_table buffer count: 0x3
2351 15:53:16.544665 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2352 15:53:16.551418 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2353 15:53:16.557857 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2354 15:53:16.564901 PMC crashLog size in discovery mode : 0xC00
2355 15:53:16.571558 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2356 15:53:16.574427 discover mode PMC crashlog size adjusted to: 0x200
2357 15:53:16.581579 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2358 15:53:16.587811 discover mode PMC crashlog size adjusted to: 0x0
2359 15:53:16.590764 m_cpu_crashLog_size : 0x3480 bytes
2360 15:53:16.591129 CPU crashLog present.
2361 15:53:16.597718 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2362 15:53:16.604512 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2363 15:53:16.607826 current = 76876550
2364 15:53:16.608308 ACPI: * DMAR
2365 15:53:16.610827 ACPI: added table 7/32, length now 64
2366 15:53:16.614250 ACPI: added table 8/32, length now 68
2367 15:53:16.617555 ACPI: * HPET
2368 15:53:16.620568 ACPI: added table 9/32, length now 72
2369 15:53:16.624623 ACPI: done.
2370 15:53:16.625130 ACPI tables: 38528 bytes.
2371 15:53:16.627476 smbios_write_tables: 76857000
2372 15:53:16.631929 EC returned error result code 3
2373 15:53:16.634807 Couldn't obtain OEM name from CBI
2374 15:53:16.638654 Create SMBIOS type 16
2375 15:53:16.641469 Create SMBIOS type 17
2376 15:53:16.641956 Create SMBIOS type 20
2377 15:53:16.644768 GENERIC: 0.0 (WIFI Device)
2378 15:53:16.648119 SMBIOS tables: 2156 bytes.
2379 15:53:16.651541 Writing table forward entry at 0x00000500
2380 15:53:16.658431 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2381 15:53:16.661626 Writing coreboot table at 0x76891000
2382 15:53:16.668392 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2383 15:53:16.671443 1. 0000000000001000-000000000009ffff: RAM
2384 15:53:16.678655 2. 00000000000a0000-00000000000fffff: RESERVED
2385 15:53:16.681249 3. 0000000000100000-0000000076856fff: RAM
2386 15:53:16.687820 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2387 15:53:16.691340 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2388 15:53:16.697935 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2389 15:53:16.704591 7. 0000000077000000-00000000803fffff: RESERVED
2390 15:53:16.707325 8. 00000000c0000000-00000000cfffffff: RESERVED
2391 15:53:16.714342 9. 00000000f8000000-00000000f9ffffff: RESERVED
2392 15:53:16.717819 10. 00000000fb000000-00000000fb000fff: RESERVED
2393 15:53:16.721083 11. 00000000fc800000-00000000fe7fffff: RESERVED
2394 15:53:16.727616 12. 00000000feb00000-00000000feb7ffff: RESERVED
2395 15:53:16.730958 13. 00000000fec00000-00000000fecfffff: RESERVED
2396 15:53:16.738012 14. 00000000fed40000-00000000fed6ffff: RESERVED
2397 15:53:16.740993 15. 00000000fed80000-00000000fed87fff: RESERVED
2398 15:53:16.748084 16. 00000000fed90000-00000000fed92fff: RESERVED
2399 15:53:16.751143 17. 00000000feda0000-00000000feda1fff: RESERVED
2400 15:53:16.757719 18. 00000000fedc0000-00000000feddffff: RESERVED
2401 15:53:16.761102 19. 0000000100000000-000000027fbfffff: RAM
2402 15:53:16.764191 Passing 4 GPIOs to payload:
2403 15:53:16.767751 NAME | PORT | POLARITY | VALUE
2404 15:53:16.774169 lid | undefined | high | high
2405 15:53:16.777562 power | undefined | high | low
2406 15:53:16.784498 oprom | undefined | high | low
2407 15:53:16.790907 EC in RW | 0x00000151 | high | high
2408 15:53:16.791436 Board ID: 3
2409 15:53:16.794242 FW config: 0x131
2410 15:53:16.797722 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 2450
2411 15:53:16.800985 coreboot table: 1748 bytes.
2412 15:53:16.804221 IMD ROOT 0. 0x76fff000 0x00001000
2413 15:53:16.810813 IMD SMALL 1. 0x76ffe000 0x00001000
2414 15:53:16.814792 FSP MEMORY 2. 0x76afe000 0x00500000
2415 15:53:16.817446 CONSOLE 3. 0x76ade000 0x00020000
2416 15:53:16.820619 RW MCACHE 4. 0x76add000 0x0000043c
2417 15:53:16.823908 RO MCACHE 5. 0x76adc000 0x00000fd8
2418 15:53:16.827493 FMAP 6. 0x76adb000 0x0000064a
2419 15:53:16.830691 TIME STAMP 7. 0x76ada000 0x00000910
2420 15:53:16.834251 VBOOT WORK 8. 0x76ac6000 0x00014000
2421 15:53:16.840491 MEM INFO 9. 0x76ac5000 0x000003b8
2422 15:53:16.843841 ROMSTG STCK10. 0x76ac4000 0x00001000
2423 15:53:16.847331 AFTER CAR 11. 0x76ab8000 0x0000c000
2424 15:53:16.850623 RAMSTAGE 12. 0x76a2e000 0x0008a000
2425 15:53:16.854421 ACPI BERT 13. 0x76a1e000 0x00010000
2426 15:53:16.857585 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2427 15:53:16.861138 REFCODE 15. 0x769ae000 0x0006f000
2428 15:53:16.864197 SMM BACKUP 16. 0x7699e000 0x00010000
2429 15:53:16.870799 IGD OPREGION17. 0x76999000 0x00004203
2430 15:53:16.874409 RAMOOPS 18. 0x76899000 0x00100000
2431 15:53:16.877454 COREBOOT 19. 0x76891000 0x00008000
2432 15:53:16.880701 ACPI 20. 0x7686d000 0x00024000
2433 15:53:16.884184 TPM2 TCGLOG21. 0x7685d000 0x00010000
2434 15:53:16.887216 PMC CRASHLOG22. 0x7685c000 0x00000c00
2435 15:53:16.890650 CPU CRASHLOG23. 0x76858000 0x00003480
2436 15:53:16.894439 SMBIOS 24. 0x76857000 0x00001000
2437 15:53:16.897534 IMD small region:
2438 15:53:16.900833 IMD ROOT 0. 0x76ffec00 0x00000400
2439 15:53:16.903838 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2440 15:53:16.911104 POWER STATE 2. 0x76ffeb80 0x00000044
2441 15:53:16.914108 ROMSTAGE 3. 0x76ffeb60 0x00000004
2442 15:53:16.917545 ACPI GNVS 4. 0x76ffeb00 0x00000048
2443 15:53:16.920729 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2444 15:53:16.927728 BS: BS_WRITE_TABLES run times (exec / console): 6 / 624 ms
2445 15:53:16.930564 MTRR: Physical address space:
2446 15:53:16.937355 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2447 15:53:16.943842 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2448 15:53:16.947395 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2449 15:53:16.954462 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2450 15:53:16.960392 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2451 15:53:16.967204 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2452 15:53:16.973899 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2453 15:53:16.976933 MTRR: Fixed MSR 0x250 0x0606060606060606
2454 15:53:16.980477 MTRR: Fixed MSR 0x258 0x0606060606060606
2455 15:53:16.986862 MTRR: Fixed MSR 0x259 0x0000000000000000
2456 15:53:16.990545 MTRR: Fixed MSR 0x268 0x0606060606060606
2457 15:53:16.994128 MTRR: Fixed MSR 0x269 0x0606060606060606
2458 15:53:16.997329 MTRR: Fixed MSR 0x26a 0x0606060606060606
2459 15:53:17.003597 MTRR: Fixed MSR 0x26b 0x0606060606060606
2460 15:53:17.006944 MTRR: Fixed MSR 0x26c 0x0606060606060606
2461 15:53:17.010141 MTRR: Fixed MSR 0x26d 0x0606060606060606
2462 15:53:17.014051 MTRR: Fixed MSR 0x26e 0x0606060606060606
2463 15:53:17.020354 MTRR: Fixed MSR 0x26f 0x0606060606060606
2464 15:53:17.023597 call enable_fixed_mtrr()
2465 15:53:17.027138 CPU physical address size: 39 bits
2466 15:53:17.029973 MTRR: default type WB/UC MTRR counts: 6/6.
2467 15:53:17.033464 MTRR: UC selected as default type.
2468 15:53:17.039948 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2469 15:53:17.046644 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2470 15:53:17.053551 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2471 15:53:17.060596 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2472 15:53:17.066670 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2473 15:53:17.073172 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2474 15:53:17.076631 MTRR: Fixed MSR 0x250 0x0606060606060606
2475 15:53:17.079835 MTRR: Fixed MSR 0x258 0x0606060606060606
2476 15:53:17.086426 MTRR: Fixed MSR 0x259 0x0000000000000000
2477 15:53:17.089776 MTRR: Fixed MSR 0x268 0x0606060606060606
2478 15:53:17.093262 MTRR: Fixed MSR 0x269 0x0606060606060606
2479 15:53:17.096578 MTRR: Fixed MSR 0x26a 0x0606060606060606
2480 15:53:17.102866 MTRR: Fixed MSR 0x26b 0x0606060606060606
2481 15:53:17.106482 MTRR: Fixed MSR 0x26c 0x0606060606060606
2482 15:53:17.110029 MTRR: Fixed MSR 0x26d 0x0606060606060606
2483 15:53:17.113192 MTRR: Fixed MSR 0x26e 0x0606060606060606
2484 15:53:17.119597 MTRR: Fixed MSR 0x26f 0x0606060606060606
2485 15:53:17.122831 MTRR: Fixed MSR 0x250 0x0606060606060606
2486 15:53:17.126326 MTRR: Fixed MSR 0x250 0x0606060606060606
2487 15:53:17.129674 call enable_fixed_mtrr()
2488 15:53:17.132797 MTRR: Fixed MSR 0x258 0x0606060606060606
2489 15:53:17.136214 MTRR: Fixed MSR 0x259 0x0000000000000000
2490 15:53:17.142627 MTRR: Fixed MSR 0x268 0x0606060606060606
2491 15:53:17.146022 MTRR: Fixed MSR 0x269 0x0606060606060606
2492 15:53:17.149252 MTRR: Fixed MSR 0x250 0x0606060606060606
2493 15:53:17.152414 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 15:53:17.159287 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 15:53:17.162789 MTRR: Fixed MSR 0x258 0x0606060606060606
2496 15:53:17.166066 MTRR: Fixed MSR 0x259 0x0000000000000000
2497 15:53:17.169944 MTRR: Fixed MSR 0x268 0x0606060606060606
2498 15:53:17.175988 MTRR: Fixed MSR 0x269 0x0606060606060606
2499 15:53:17.179600 MTRR: Fixed MSR 0x26a 0x0606060606060606
2500 15:53:17.182497 MTRR: Fixed MSR 0x26b 0x0606060606060606
2501 15:53:17.185947 MTRR: Fixed MSR 0x26c 0x0606060606060606
2502 15:53:17.192374 MTRR: Fixed MSR 0x26d 0x0606060606060606
2503 15:53:17.196046 MTRR: Fixed MSR 0x26e 0x0606060606060606
2504 15:53:17.199220 MTRR: Fixed MSR 0x26f 0x0606060606060606
2505 15:53:17.202594 MTRR: Fixed MSR 0x258 0x0606060606060606
2506 15:53:17.206075 MTRR: Fixed MSR 0x258 0x0606060606060606
2507 15:53:17.212420 MTRR: Fixed MSR 0x250 0x0606060606060606
2508 15:53:17.215974 MTRR: Fixed MSR 0x259 0x0000000000000000
2509 15:53:17.219127 MTRR: Fixed MSR 0x268 0x0606060606060606
2510 15:53:17.222506 MTRR: Fixed MSR 0x269 0x0606060606060606
2511 15:53:17.229241 MTRR: Fixed MSR 0x26a 0x0606060606060606
2512 15:53:17.232500 MTRR: Fixed MSR 0x26b 0x0606060606060606
2513 15:53:17.235521 MTRR: Fixed MSR 0x26c 0x0606060606060606
2514 15:53:17.239154 MTRR: Fixed MSR 0x26d 0x0606060606060606
2515 15:53:17.245610 MTRR: Fixed MSR 0x26e 0x0606060606060606
2516 15:53:17.249172 MTRR: Fixed MSR 0x26f 0x0606060606060606
2517 15:53:17.252588 MTRR: Fixed MSR 0x259 0x0000000000000000
2518 15:53:17.255867 call enable_fixed_mtrr()
2519 15:53:17.259351 call enable_fixed_mtrr()
2520 15:53:17.262563 MTRR: Fixed MSR 0x258 0x0606060606060606
2521 15:53:17.265935 MTRR: Fixed MSR 0x258 0x0606060606060606
2522 15:53:17.269180 CPU physical address size: 39 bits
2523 15:53:17.272470 CPU physical address size: 39 bits
2524 15:53:17.275892 MTRR: Fixed MSR 0x259 0x0000000000000000
2525 15:53:17.282414 MTRR: Fixed MSR 0x268 0x0606060606060606
2526 15:53:17.285714 MTRR: Fixed MSR 0x269 0x0606060606060606
2527 15:53:17.288838 MTRR: Fixed MSR 0x26a 0x0606060606060606
2528 15:53:17.292259 MTRR: Fixed MSR 0x26b 0x0606060606060606
2529 15:53:17.298736 MTRR: Fixed MSR 0x26c 0x0606060606060606
2530 15:53:17.301950 MTRR: Fixed MSR 0x26d 0x0606060606060606
2531 15:53:17.305540 MTRR: Fixed MSR 0x26e 0x0606060606060606
2532 15:53:17.308649 MTRR: Fixed MSR 0x26f 0x0606060606060606
2533 15:53:17.315549 MTRR: Fixed MSR 0x26a 0x0606060606060606
2534 15:53:17.318791 CPU physical address size: 39 bits
2535 15:53:17.322132 MTRR: Fixed MSR 0x26b 0x0606060606060606
2536 15:53:17.325518 MTRR: Fixed MSR 0x259 0x0000000000000000
2537 15:53:17.328289 call enable_fixed_mtrr()
2538 15:53:17.331591 MTRR: Fixed MSR 0x268 0x0606060606060606
2539 15:53:17.335193 CPU physical address size: 39 bits
2540 15:53:17.341896 MTRR: Fixed MSR 0x26c 0x0606060606060606
2541 15:53:17.345616 MTRR: Fixed MSR 0x268 0x0606060606060606
2542 15:53:17.348528 MTRR: Fixed MSR 0x269 0x0606060606060606
2543 15:53:17.352126 MTRR: Fixed MSR 0x26d 0x0606060606060606
2544 15:53:17.354911 MTRR: Fixed MSR 0x26e 0x0606060606060606
2545 15:53:17.362409 MTRR: Fixed MSR 0x26f 0x0606060606060606
2546 15:53:17.365389 MTRR: Fixed MSR 0x26a 0x0606060606060606
2547 15:53:17.368939 MTRR: Fixed MSR 0x269 0x0606060606060606
2548 15:53:17.371937 call enable_fixed_mtrr()
2549 15:53:17.375086 MTRR: Fixed MSR 0x26b 0x0606060606060606
2550 15:53:17.378480 MTRR: Fixed MSR 0x26c 0x0606060606060606
2551 15:53:17.384870 MTRR: Fixed MSR 0x26d 0x0606060606060606
2552 15:53:17.388709 MTRR: Fixed MSR 0x26e 0x0606060606060606
2553 15:53:17.391388 MTRR: Fixed MSR 0x26f 0x0606060606060606
2554 15:53:17.394754 MTRR: Fixed MSR 0x26a 0x0606060606060606
2555 15:53:17.398553 call enable_fixed_mtrr()
2556 15:53:17.401781 CPU physical address size: 39 bits
2557 15:53:17.404819 CPU physical address size: 39 bits
2558 15:53:17.411494 MTRR: Fixed MSR 0x26b 0x0606060606060606
2559 15:53:17.414596 MTRR: Fixed MSR 0x26c 0x0606060606060606
2560 15:53:17.417677 MTRR: Fixed MSR 0x26d 0x0606060606060606
2561 15:53:17.421059 MTRR: Fixed MSR 0x26e 0x0606060606060606
2562 15:53:17.427750 MTRR: Fixed MSR 0x26f 0x0606060606060606
2563 15:53:17.430852 call enable_fixed_mtrr()
2564 15:53:17.434748 CPU physical address size: 39 bits
2565 15:53:17.435274
2566 15:53:17.437807 MTRR check
2567 15:53:17.438295 Fixed MTRRs : Enabled
2568 15:53:17.441210 Variable MTRRs: Enabled
2569 15:53:17.441666
2570 15:53:17.447557 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2571 15:53:17.451377 Checking cr50 for pending updates
2572 15:53:17.463043 Reading cr50 TPM mode
2573 15:53:17.478580 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2574 15:53:17.487830 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2575 15:53:17.491408 Checking segment from ROM address 0xf96cbe6c
2576 15:53:17.495075 Checking segment from ROM address 0xf96cbe88
2577 15:53:17.501695 Loading segment from ROM address 0xf96cbe6c
2578 15:53:17.502198 code (compression=1)
2579 15:53:17.511280 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2580 15:53:17.518200 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2581 15:53:17.521538 using LZMA
2582 15:53:17.544781 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2583 15:53:17.550809 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2584 15:53:17.559121 Loading segment from ROM address 0xf96cbe88
2585 15:53:17.562460 Entry Point 0x30000000
2586 15:53:17.563008 Loaded segments
2587 15:53:17.568979 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2588 15:53:17.575864 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2589 15:53:17.579050 Finalizing chipset.
2590 15:53:17.579549 apm_control: Finalizing SMM.
2591 15:53:17.582238 APMC done.
2592 15:53:17.585829 HECI: CSE device 16.1 is disabled
2593 15:53:17.588561 HECI: CSE device 16.2 is disabled
2594 15:53:17.592756 HECI: CSE device 16.3 is disabled
2595 15:53:17.595294 HECI: CSE device 16.4 is disabled
2596 15:53:17.599182 HECI: CSE device 16.5 is disabled
2597 15:53:17.602198 HECI: Sending End-of-Post
2598 15:53:17.610418 CSE: EOP requested action: continue boot
2599 15:53:17.614096 CSE EOP successful, continuing boot
2600 15:53:17.620731 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2601 15:53:17.623706 mp_park_aps done after 0 msecs.
2602 15:53:17.627258 Jumping to boot code at 0x30000000(0x76891000)
2603 15:53:17.637292 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2604 15:53:17.641014
2605 15:53:17.641510
2606 15:53:17.641789
2607 15:53:17.644403 Starting depthcharge on Volmar...
2608 15:53:17.644868
2609 15:53:17.646269 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2610 15:53:17.646690 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2611 15:53:17.647029 Setting prompt string to ['brya:']
2612 15:53:17.647342 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2613 15:53:17.651033 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2614 15:53:17.651540
2615 15:53:17.657391 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2616 15:53:17.657861
2617 15:53:17.664704 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2618 15:53:17.665206
2619 15:53:17.667666 configure_storage: Failed to remap 1C:2
2620 15:53:17.668175
2621 15:53:17.671072 Wipe memory regions:
2622 15:53:17.671566
2623 15:53:17.674198 [0x00000000001000, 0x000000000a0000)
2624 15:53:17.674687
2625 15:53:17.677380 [0x00000000100000, 0x00000030000000)
2626 15:53:17.788220
2627 15:53:17.791551 [0x00000032668e60, 0x00000076857000)
2628 15:53:17.944179
2629 15:53:17.947294 [0x00000100000000, 0x0000027fc00000)
2630 15:53:18.811041
2631 15:53:18.814465 ec_init: CrosEC protocol v3 supported (256, 256)
2632 15:53:19.422519
2633 15:53:19.423047 R8152: Initializing
2634 15:53:19.423347
2635 15:53:19.425835 Version 9 (ocp_data = 6010)
2636 15:53:19.426325
2637 15:53:19.429313 R8152: Done initializing
2638 15:53:19.429806
2639 15:53:19.432387 Adding net device
2640 15:53:19.733582
2641 15:53:19.736471 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2642 15:53:19.736856
2643 15:53:19.737121
2644 15:53:19.737356
2645 15:53:19.737951 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2647 15:53:19.839031 brya: tftpboot 192.168.201.1 11224345/tftp-deploy-g9t3v_qh/kernel/bzImage 11224345/tftp-deploy-g9t3v_qh/kernel/cmdline 11224345/tftp-deploy-g9t3v_qh/ramdisk/ramdisk.cpio.gz
2648 15:53:19.839627 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2649 15:53:19.839993 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2650 15:53:19.844940 tftpboot 192.168.201.1 11224345/tftp-deploy-g9t3v_qh/kernel/bzImloy-g9t3v_qh/kernel/cmdline 11224345/tftp-deploy-g9t3v_qh/ramdisk/ramdisk.cpio.gz
2651 15:53:19.845451
2652 15:53:19.845730 Waiting for link
2653 15:53:20.047596
2654 15:53:20.048090 done.
2655 15:53:20.048387
2656 15:53:20.048661 MAC: 00:e0:4c:68:02:ef
2657 15:53:20.048918
2658 15:53:20.050499 Sending DHCP discover... done.
2659 15:53:20.050902
2660 15:53:20.054282 Waiting for reply... done.
2661 15:53:20.054839
2662 15:53:20.057161 Sending DHCP request... done.
2663 15:53:20.057537
2664 15:53:20.063756 Waiting for reply... done.
2665 15:53:20.064229
2666 15:53:20.064505 My ip is 192.168.201.16
2667 15:53:20.064740
2668 15:53:20.067405 The DHCP server ip is 192.168.201.1
2669 15:53:20.067887
2670 15:53:20.073603 TFTP server IP predefined by user: 192.168.201.1
2671 15:53:20.074061
2672 15:53:20.080721 Bootfile predefined by user: 11224345/tftp-deploy-g9t3v_qh/kernel/bzImage
2673 15:53:20.081245
2674 15:53:20.084155 Sending tftp read request... done.
2675 15:53:20.084653
2676 15:53:20.091114 Waiting for the transfer...
2677 15:53:20.091538
2678 15:53:20.322840 00000000 ################################################################
2679 15:53:20.322957
2680 15:53:20.550926 00080000 ################################################################
2681 15:53:20.551032
2682 15:53:20.779975 00100000 ################################################################
2683 15:53:20.780152
2684 15:53:21.007009 00180000 ################################################################
2685 15:53:21.007125
2686 15:53:21.236967 00200000 ################################################################
2687 15:53:21.237071
2688 15:53:21.463636 00280000 ################################################################
2689 15:53:21.463727
2690 15:53:21.690515 00300000 ################################################################
2691 15:53:21.690645
2692 15:53:21.915281 00380000 ################################################################
2693 15:53:21.915421
2694 15:53:22.142796 00400000 ################################################################
2695 15:53:22.142904
2696 15:53:22.368041 00480000 ################################################################
2697 15:53:22.368193
2698 15:53:22.594070 00500000 ################################################################
2699 15:53:22.594186
2700 15:53:22.822066 00580000 ################################################################
2701 15:53:22.822169
2702 15:53:23.050377 00600000 ################################################################
2703 15:53:23.050469
2704 15:53:23.276807 00680000 ################################################################
2705 15:53:23.276906
2706 15:53:23.501254 00700000 ################################################################
2707 15:53:23.501354
2708 15:53:23.509264 00780000 ## done.
2709 15:53:23.509339
2710 15:53:23.512708 The bootfile was 7880592 bytes long.
2711 15:53:23.512813
2712 15:53:23.515684 Sending tftp read request... done.
2713 15:53:23.515760
2714 15:53:23.519255 Waiting for the transfer...
2715 15:53:23.519345
2716 15:53:23.747597 00000000 ################################################################
2717 15:53:23.747721
2718 15:53:23.972233 00080000 ################################################################
2719 15:53:23.972346
2720 15:53:24.196807 00100000 ################################################################
2721 15:53:24.196911
2722 15:53:24.423210 00180000 ################################################################
2723 15:53:24.423310
2724 15:53:24.650987 00200000 ################################################################
2725 15:53:24.651117
2726 15:53:24.880048 00280000 ################################################################
2727 15:53:24.880182
2728 15:53:25.106066 00300000 ################################################################
2729 15:53:25.106178
2730 15:53:25.332330 00380000 ################################################################
2731 15:53:25.332446
2732 15:53:25.560222 00400000 ################################################################
2733 15:53:25.560327
2734 15:53:25.788324 00480000 ################################################################
2735 15:53:25.788440
2736 15:53:26.015437 00500000 ################################################################
2737 15:53:26.015541
2738 15:53:26.242824 00580000 ################################################################
2739 15:53:26.242927
2740 15:53:26.472759 00600000 ################################################################
2741 15:53:26.472867
2742 15:53:26.698811 00680000 ################################################################
2743 15:53:26.698909
2744 15:53:26.924461 00700000 ################################################################
2745 15:53:26.924567
2746 15:53:27.152019 00780000 ################################################################
2747 15:53:27.152129
2748 15:53:27.338010 00800000 ##################################################### done.
2749 15:53:27.338128
2750 15:53:27.341261 Sending tftp read request... done.
2751 15:53:27.341337
2752 15:53:27.344380 Waiting for the transfer...
2753 15:53:27.344442
2754 15:53:27.348230 00000000 # done.
2755 15:53:27.348302
2756 15:53:27.355082 Command line loaded dynamically from TFTP file: 11224345/tftp-deploy-g9t3v_qh/kernel/cmdline
2757 15:53:27.355505
2758 15:53:27.371478 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2759 15:53:27.377205
2760 15:53:27.380566 Shutting down all USB controllers.
2761 15:53:27.381032
2762 15:53:27.381296 Removing current net device
2763 15:53:27.381513
2764 15:53:27.383422 Finalizing coreboot
2765 15:53:27.383768
2766 15:53:27.390214 Exiting depthcharge with code 4 at timestamp: 20001096
2767 15:53:27.390672
2768 15:53:27.390942
2769 15:53:27.391187 Starting kernel ...
2770 15:53:27.391401
2771 15:53:27.391606
2772 15:53:27.392486 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2773 15:53:27.392836 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2774 15:53:27.393102 Setting prompt string to ['Linux version [0-9]']
2775 15:53:27.393347 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2776 15:53:27.393594 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2778 15:57:58.393559 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2780 15:57:58.394376 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2782 15:57:58.394979 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2785 15:57:58.395982 end: 2 depthcharge-action (duration 00:05:00) [common]
2787 15:57:58.396732 Cleaning after the job
2788 15:57:58.397032 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224345/tftp-deploy-g9t3v_qh/ramdisk
2789 15:57:58.399085 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224345/tftp-deploy-g9t3v_qh/kernel
2790 15:57:58.399920 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224345/tftp-deploy-g9t3v_qh/modules
2791 15:57:58.400260 start: 5.1 power-off (timeout 00:00:30) [common]
2792 15:57:58.400394 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=off'
2793 15:57:58.482411 >> Command sent successfully.
2794 15:57:58.490551 Returned 0 in 0 seconds
2795 15:57:58.591612 end: 5.1 power-off (duration 00:00:00) [common]
2797 15:57:58.592895 start: 5.2 read-feedback (timeout 00:10:00) [common]
2798 15:57:58.593721 Listened to connection for namespace 'common' for up to 1s
2800 15:57:58.594828 Listened to connection for namespace 'common' for up to 1s
2801 15:57:59.594626 Finalising connection for namespace 'common'
2802 15:57:59.595187 Disconnecting from shell: Finalise
2803 15:57:59.595504
2804 15:57:59.696354 end: 5.2 read-feedback (duration 00:00:01) [common]
2805 15:57:59.696838 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224345
2806 15:57:59.721528 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224345
2807 15:57:59.721678 JobError: Your job cannot terminate cleanly.