Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 15:52:54.022516 lava-dispatcher, installed at version: 2023.05.1
2 15:52:54.022721 start: 0 validate
3 15:52:54.022855 Start time: 2023-08-07 15:52:54.022847+00:00 (UTC)
4 15:52:54.022976 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:52:54.023106 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:52:54.283727 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:52:54.283911 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:52:54.549910 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:52:54.550085 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:53:00.115268 validate duration: 6.09
12 15:53:00.115585 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:53:00.115725 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:53:00.115813 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:53:00.115944 Not decompressing ramdisk as can be used compressed.
16 15:53:00.116031 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:53:00.116096 saving as /var/lib/lava/dispatcher/tmp/11224314/tftp-deploy-wg7do0i5/ramdisk/rootfs.cpio.gz
18 15:53:00.116157 total size: 8418130 (8MB)
19 15:53:00.776461 progress 0% (0MB)
20 15:53:00.779126 progress 5% (0MB)
21 15:53:00.781452 progress 10% (0MB)
22 15:53:00.783767 progress 15% (1MB)
23 15:53:00.786051 progress 20% (1MB)
24 15:53:00.788380 progress 25% (2MB)
25 15:53:00.790660 progress 30% (2MB)
26 15:53:00.792803 progress 35% (2MB)
27 15:53:00.795073 progress 40% (3MB)
28 15:53:00.797389 progress 45% (3MB)
29 15:53:00.799679 progress 50% (4MB)
30 15:53:00.801986 progress 55% (4MB)
31 15:53:00.804293 progress 60% (4MB)
32 15:53:00.806334 progress 65% (5MB)
33 15:53:00.808592 progress 70% (5MB)
34 15:53:00.810831 progress 75% (6MB)
35 15:53:00.813107 progress 80% (6MB)
36 15:53:00.815323 progress 85% (6MB)
37 15:53:00.817610 progress 90% (7MB)
38 15:53:00.819913 progress 95% (7MB)
39 15:53:00.822061 progress 100% (8MB)
40 15:53:00.822332 8MB downloaded in 0.71s (11.37MB/s)
41 15:53:00.822481 end: 1.1.1 http-download (duration 00:00:01) [common]
43 15:53:00.822724 end: 1.1 download-retry (duration 00:00:01) [common]
44 15:53:00.822810 start: 1.2 download-retry (timeout 00:09:59) [common]
45 15:53:00.822895 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 15:53:00.823037 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:53:00.823108 saving as /var/lib/lava/dispatcher/tmp/11224314/tftp-deploy-wg7do0i5/kernel/bzImage
48 15:53:00.823168 total size: 7880592 (7MB)
49 15:53:00.823226 No compression specified
50 15:53:00.824439 progress 0% (0MB)
51 15:53:00.826628 progress 5% (0MB)
52 15:53:00.828799 progress 10% (0MB)
53 15:53:00.830905 progress 15% (1MB)
54 15:53:00.833200 progress 20% (1MB)
55 15:53:00.835356 progress 25% (1MB)
56 15:53:00.837760 progress 30% (2MB)
57 15:53:00.840040 progress 35% (2MB)
58 15:53:00.842234 progress 40% (3MB)
59 15:53:00.844576 progress 45% (3MB)
60 15:53:00.846891 progress 50% (3MB)
61 15:53:00.849096 progress 55% (4MB)
62 15:53:00.851366 progress 60% (4MB)
63 15:53:00.853602 progress 65% (4MB)
64 15:53:00.855868 progress 70% (5MB)
65 15:53:00.858241 progress 75% (5MB)
66 15:53:00.860361 progress 80% (6MB)
67 15:53:00.862472 progress 85% (6MB)
68 15:53:00.864749 progress 90% (6MB)
69 15:53:00.866916 progress 95% (7MB)
70 15:53:00.869065 progress 100% (7MB)
71 15:53:00.869274 7MB downloaded in 0.05s (163.02MB/s)
72 15:53:00.869422 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:53:00.869653 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:53:00.869746 start: 1.3 download-retry (timeout 00:09:59) [common]
76 15:53:00.869835 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 15:53:00.869970 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:53:00.870038 saving as /var/lib/lava/dispatcher/tmp/11224314/tftp-deploy-wg7do0i5/modules/modules.tar
79 15:53:00.870099 total size: 251008 (0MB)
80 15:53:00.870158 Using unxz to decompress xz
81 15:53:00.874611 progress 13% (0MB)
82 15:53:00.875042 progress 26% (0MB)
83 15:53:00.875292 progress 39% (0MB)
84 15:53:00.876968 progress 52% (0MB)
85 15:53:00.879005 progress 65% (0MB)
86 15:53:00.880962 progress 78% (0MB)
87 15:53:00.883066 progress 91% (0MB)
88 15:53:00.884976 progress 100% (0MB)
89 15:53:00.890907 0MB downloaded in 0.02s (11.51MB/s)
90 15:53:00.891213 end: 1.3.1 http-download (duration 00:00:00) [common]
92 15:53:00.891677 end: 1.3 download-retry (duration 00:00:00) [common]
93 15:53:00.891804 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 15:53:00.891913 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 15:53:00.892006 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 15:53:00.892093 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 15:53:00.892364 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax
98 15:53:00.892545 makedir: /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin
99 15:53:00.892687 makedir: /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/tests
100 15:53:00.892826 makedir: /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/results
101 15:53:00.892976 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-add-keys
102 15:53:00.893164 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-add-sources
103 15:53:00.893326 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-background-process-start
104 15:53:00.893494 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-background-process-stop
105 15:53:00.893663 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-common-functions
106 15:53:00.893822 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-echo-ipv4
107 15:53:00.893985 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-install-packages
108 15:53:00.894149 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-installed-packages
109 15:53:00.894308 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-os-build
110 15:53:00.894470 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-probe-channel
111 15:53:00.894631 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-probe-ip
112 15:53:00.894790 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-target-ip
113 15:53:00.894922 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-target-mac
114 15:53:00.895046 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-target-storage
115 15:53:00.895174 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-test-case
116 15:53:00.895336 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-test-event
117 15:53:00.895499 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-test-feedback
118 15:53:00.895686 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-test-raise
119 15:53:00.895838 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-test-reference
120 15:53:00.895973 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-test-runner
121 15:53:00.896107 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-test-set
122 15:53:00.896253 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-test-shell
123 15:53:00.896419 Updating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-install-packages (oe)
124 15:53:00.897874 Updating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/bin/lava-installed-packages (oe)
125 15:53:00.898015 Creating /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/environment
126 15:53:00.898117 LAVA metadata
127 15:53:00.898191 - LAVA_JOB_ID=11224314
128 15:53:00.898264 - LAVA_DISPATCHER_IP=192.168.201.1
129 15:53:00.898412 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 15:53:00.898515 skipped lava-vland-overlay
131 15:53:00.898622 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 15:53:00.898740 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 15:53:00.898829 skipped lava-multinode-overlay
134 15:53:00.898914 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 15:53:00.898998 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 15:53:00.899083 Loading test definitions
137 15:53:00.899177 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 15:53:00.899268 Using /lava-11224314 at stage 0
139 15:53:00.899737 uuid=11224314_1.4.2.3.1 testdef=None
140 15:53:00.899828 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 15:53:00.899912 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 15:53:00.900527 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 15:53:00.900835 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 15:53:00.903091 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 15:53:00.903453 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 15:53:00.905337 runner path: /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/0/tests/0_dmesg test_uuid 11224314_1.4.2.3.1
149 15:53:00.905494 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 15:53:00.905724 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 15:53:00.905795 Using /lava-11224314 at stage 1
153 15:53:00.906107 uuid=11224314_1.4.2.3.5 testdef=None
154 15:53:00.906194 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 15:53:00.906276 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 15:53:00.906749 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 15:53:00.906965 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 15:53:00.908635 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 15:53:00.908861 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 15:53:00.910728 runner path: /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/1/tests/1_bootrr test_uuid 11224314_1.4.2.3.5
163 15:53:00.910880 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 15:53:00.911086 Creating lava-test-runner.conf files
166 15:53:00.911151 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/0 for stage 0
167 15:53:00.911241 - 0_dmesg
168 15:53:00.911318 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224314/lava-overlay-ga2d05ax/lava-11224314/1 for stage 1
169 15:53:00.911407 - 1_bootrr
170 15:53:00.911500 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 15:53:00.911586 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 15:53:00.920139 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 15:53:00.920255 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 15:53:00.920354 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 15:53:00.920442 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 15:53:00.920526 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 15:53:01.180264 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 15:53:01.180643 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 15:53:01.180773 extracting modules file /var/lib/lava/dispatcher/tmp/11224314/tftp-deploy-wg7do0i5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224314/extract-overlay-ramdisk-w55qw7da/ramdisk
180 15:53:01.194473 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 15:53:01.194599 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 15:53:01.194687 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224314/compress-overlay-pvp_hky2/overlay-1.4.2.4.tar.gz to ramdisk
183 15:53:01.194759 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224314/compress-overlay-pvp_hky2/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224314/extract-overlay-ramdisk-w55qw7da/ramdisk
184 15:53:01.203925 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 15:53:01.204062 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 15:53:01.204159 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 15:53:01.204253 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 15:53:01.204334 Building ramdisk /var/lib/lava/dispatcher/tmp/11224314/extract-overlay-ramdisk-w55qw7da/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224314/extract-overlay-ramdisk-w55qw7da/ramdisk
189 15:53:01.337236 >> 49790 blocks
190 15:53:02.181413 rename /var/lib/lava/dispatcher/tmp/11224314/extract-overlay-ramdisk-w55qw7da/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224314/tftp-deploy-wg7do0i5/ramdisk/ramdisk.cpio.gz
191 15:53:02.181842 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 15:53:02.181972 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 15:53:02.182074 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 15:53:02.182178 No mkimage arch provided, not using FIT.
195 15:53:02.182267 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 15:53:02.182355 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 15:53:02.182461 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 15:53:02.182560 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 15:53:02.182643 No LXC device requested
200 15:53:02.182725 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 15:53:02.182811 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 15:53:02.182953 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 15:53:02.183032 Checking files for TFTP limit of 4294967296 bytes.
204 15:53:02.183441 end: 1 tftp-deploy (duration 00:00:02) [common]
205 15:53:02.183543 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 15:53:02.183640 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 15:53:02.183792 substitutions:
208 15:53:02.183857 - {DTB}: None
209 15:53:02.183918 - {INITRD}: 11224314/tftp-deploy-wg7do0i5/ramdisk/ramdisk.cpio.gz
210 15:53:02.183976 - {KERNEL}: 11224314/tftp-deploy-wg7do0i5/kernel/bzImage
211 15:53:02.184032 - {LAVA_MAC}: None
212 15:53:02.184086 - {PRESEED_CONFIG}: None
213 15:53:02.184140 - {PRESEED_LOCAL}: None
214 15:53:02.184194 - {RAMDISK}: 11224314/tftp-deploy-wg7do0i5/ramdisk/ramdisk.cpio.gz
215 15:53:02.184248 - {ROOT_PART}: None
216 15:53:02.184301 - {ROOT}: None
217 15:53:02.184353 - {SERVER_IP}: 192.168.201.1
218 15:53:02.184406 - {TEE}: None
219 15:53:02.184459 Parsed boot commands:
220 15:53:02.184512 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 15:53:02.184683 Parsed boot commands: tftpboot 192.168.201.1 11224314/tftp-deploy-wg7do0i5/kernel/bzImage 11224314/tftp-deploy-wg7do0i5/kernel/cmdline 11224314/tftp-deploy-wg7do0i5/ramdisk/ramdisk.cpio.gz
222 15:53:02.184768 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 15:53:02.184853 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 15:53:02.184945 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 15:53:02.185032 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 15:53:02.185106 Not connected, no need to disconnect.
227 15:53:02.185217 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 15:53:02.185298 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 15:53:02.185365 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
230 15:53:02.189457 Setting prompt string to ['lava-test: # ']
231 15:53:02.189834 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 15:53:02.189943 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 15:53:02.190046 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 15:53:02.190139 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 15:53:02.190367 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
236 15:53:07.346504 >> Command sent successfully.
237 15:53:07.358663 Returned 0 in 5 seconds
238 15:53:07.459955 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 15:53:07.461372 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 15:53:07.461890 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 15:53:07.462336 Setting prompt string to 'Starting depthcharge on Helios...'
243 15:53:07.462707 Changing prompt to 'Starting depthcharge on Helios...'
244 15:53:07.463165 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
245 15:53:07.464467 [Enter `^Ec?' for help]
246 15:53:08.069252
247 15:53:08.070063
248 15:53:08.079172 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
249 15:53:08.082582 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
250 15:53:08.089028 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
251 15:53:08.092346 CPU: AES supported, TXT NOT supported, VT supported
252 15:53:08.099374 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
253 15:53:08.102730 PCH: device id 0284 (rev 00) is Cometlake-U Premium
254 15:53:08.109241 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
255 15:53:08.112508 VBOOT: Loading verstage.
256 15:53:08.116089 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 15:53:08.122315 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
258 15:53:08.125753 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 15:53:08.129489 CBFS @ c08000 size 3f8000
260 15:53:08.135757 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
261 15:53:08.139186 CBFS: Locating 'fallback/verstage'
262 15:53:08.142777 CBFS: Found @ offset 10fb80 size 1072c
263 15:53:08.146086
264 15:53:08.146583
265 15:53:08.156303 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
266 15:53:08.170361 Probing TPM: . done!
267 15:53:08.173993 TPM ready after 0 ms
268 15:53:08.178635 Connected to device vid:did:rid of 1ae0:0028:00
269 15:53:08.187046 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
270 15:53:08.190672 Initialized TPM device CR50 revision 0
271 15:53:08.231735 tlcl_send_startup: Startup return code is 0
272 15:53:08.232074 TPM: setup succeeded
273 15:53:08.244179 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
274 15:53:08.248157 Chrome EC: UHEPI supported
275 15:53:08.251324 Phase 1
276 15:53:08.254772 FMAP: area GBB found @ c05000 (12288 bytes)
277 15:53:08.261546 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 15:53:08.264889 Phase 2
279 15:53:08.264977 Phase 3
280 15:53:08.267990 FMAP: area GBB found @ c05000 (12288 bytes)
281 15:53:08.274855 VB2:vb2_report_dev_firmware() This is developer signed firmware
282 15:53:08.281636 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
283 15:53:08.284922 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
284 15:53:08.291628 VB2:vb2_verify_keyblock() Checking keyblock signature...
285 15:53:08.306750 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
286 15:53:08.310133 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
287 15:53:08.316576 VB2:vb2_verify_fw_preamble() Verifying preamble.
288 15:53:08.321255 Phase 4
289 15:53:08.324389 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
290 15:53:08.331265 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
291 15:53:08.511239 VB2:vb2_rsa_verify_digest() Digest check failed!
292 15:53:08.517373 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
293 15:53:08.517813 Saving nvdata
294 15:53:08.520796 Reboot requested (10020007)
295 15:53:08.524226 board_reset() called!
296 15:53:08.524653 full_reset() called!
297 15:53:13.036343
298 15:53:13.036490
299 15:53:13.045824 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 15:53:13.049319 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 15:53:13.055938 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 15:53:13.059304 CPU: AES supported, TXT NOT supported, VT supported
303 15:53:13.065781 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 15:53:13.069109 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 15:53:13.075983 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 15:53:13.079386 VBOOT: Loading verstage.
307 15:53:13.082797 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 15:53:13.089454 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 15:53:13.092729 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 15:53:13.095947 CBFS @ c08000 size 3f8000
311 15:53:13.102359 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 15:53:13.105720 CBFS: Locating 'fallback/verstage'
313 15:53:13.109327 CBFS: Found @ offset 10fb80 size 1072c
314 15:53:13.112881
315 15:53:13.112993
316 15:53:13.122615 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 15:53:13.137750 Probing TPM: . done!
318 15:53:13.140863 TPM ready after 0 ms
319 15:53:13.144682 Connected to device vid:did:rid of 1ae0:0028:00
320 15:53:13.154336 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
321 15:53:13.157556 Initialized TPM device CR50 revision 0
322 15:53:13.198684 tlcl_send_startup: Startup return code is 0
323 15:53:13.198777 TPM: setup succeeded
324 15:53:13.211457 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 15:53:13.215034 Chrome EC: UHEPI supported
326 15:53:13.218736 Phase 1
327 15:53:13.222176 FMAP: area GBB found @ c05000 (12288 bytes)
328 15:53:13.228492 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
329 15:53:13.235208 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
330 15:53:13.238522 Recovery requested (1009000e)
331 15:53:13.244268 Saving nvdata
332 15:53:13.250151 tlcl_extend: response is 0
333 15:53:13.258952 tlcl_extend: response is 0
334 15:53:13.266150 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 15:53:13.269597 CBFS @ c08000 size 3f8000
336 15:53:13.276235 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 15:53:13.279518 CBFS: Locating 'fallback/romstage'
338 15:53:13.282779 CBFS: Found @ offset 80 size 145fc
339 15:53:13.286048 Accumulated console time in verstage 99 ms
340 15:53:13.286154
341 15:53:13.286245
342 15:53:13.299349 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
343 15:53:13.305940 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
344 15:53:13.309256 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 15:53:13.312441 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 15:53:13.319152 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
347 15:53:13.322376 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 15:53:13.325621 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
349 15:53:13.329222 TCO_STS: 0000 0000
350 15:53:13.332248 GEN_PMCON: e0015238 00000200
351 15:53:13.335627 GBLRST_CAUSE: 00000000 00000000
352 15:53:13.335710 prev_sleep_state 5
353 15:53:13.338978 Boot Count incremented to 67575
354 15:53:13.345905 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 15:53:13.349639 CBFS @ c08000 size 3f8000
356 15:53:13.355901 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 15:53:13.355979 CBFS: Locating 'fspm.bin'
358 15:53:13.362347 CBFS: Found @ offset 5ffc0 size 71000
359 15:53:13.365625 Chrome EC: UHEPI supported
360 15:53:13.372060 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
361 15:53:13.375590 Probing TPM: done!
362 15:53:13.382668 Connected to device vid:did:rid of 1ae0:0028:00
363 15:53:13.392136 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
364 15:53:13.398395 Initialized TPM device CR50 revision 0
365 15:53:13.407447 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
366 15:53:13.414500 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
367 15:53:13.417253 MRC cache found, size 1948
368 15:53:13.421282 bootmode is set to: 2
369 15:53:13.423914 PRMRR disabled by config.
370 15:53:13.424015 SPD INDEX = 1
371 15:53:13.430699 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 15:53:13.433877 CBFS @ c08000 size 3f8000
373 15:53:13.440563 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 15:53:13.440671 CBFS: Locating 'spd.bin'
375 15:53:13.443806 CBFS: Found @ offset 5fb80 size 400
376 15:53:13.447217 SPD: module type is LPDDR3
377 15:53:13.450725 SPD: module part is
378 15:53:13.457420 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
379 15:53:13.460616 SPD: device width 4 bits, bus width 8 bits
380 15:53:13.463770 SPD: module size is 4096 MB (per channel)
381 15:53:13.467084 memory slot: 0 configuration done.
382 15:53:13.470529 memory slot: 2 configuration done.
383 15:53:13.521548 CBMEM:
384 15:53:13.524886 IMD: root @ 99fff000 254 entries.
385 15:53:13.528112 IMD: root @ 99ffec00 62 entries.
386 15:53:13.531379 External stage cache:
387 15:53:13.534833 IMD: root @ 9abff000 254 entries.
388 15:53:13.538250 IMD: root @ 9abfec00 62 entries.
389 15:53:13.541650 Chrome EC: clear events_b mask to 0x0000000020004000
390 15:53:13.557543 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 15:53:13.570731 tlcl_write: response is 0
392 15:53:13.579840 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 15:53:13.586538 MRC: TPM MRC hash updated successfully.
394 15:53:13.586681 2 DIMMs found
395 15:53:13.590205 SMM Memory Map
396 15:53:13.593173 SMRAM : 0x9a000000 0x1000000
397 15:53:13.596296 Subregion 0: 0x9a000000 0xa00000
398 15:53:13.599600 Subregion 1: 0x9aa00000 0x200000
399 15:53:13.603346 Subregion 2: 0x9ac00000 0x400000
400 15:53:13.606332 top_of_ram = 0x9a000000
401 15:53:13.609624 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
402 15:53:13.616325 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
403 15:53:13.619584 MTRR Range: Start=ff000000 End=0 (Size 1000000)
404 15:53:13.626313 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 15:53:13.629936 CBFS @ c08000 size 3f8000
406 15:53:13.633260 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 15:53:13.636541 CBFS: Locating 'fallback/postcar'
408 15:53:13.643075 CBFS: Found @ offset 107000 size 4b44
409 15:53:13.646168 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 15:53:13.659149 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 15:53:13.662195 Processing 180 relocs. Offset value of 0x97c0c000
412 15:53:13.670902 Accumulated console time in romstage 286 ms
413 15:53:13.671572
414 15:53:13.672202
415 15:53:13.680513 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 15:53:13.687555 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 15:53:13.690831 CBFS @ c08000 size 3f8000
418 15:53:13.693909 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 15:53:13.700657 CBFS: Locating 'fallback/ramstage'
420 15:53:13.703995 CBFS: Found @ offset 43380 size 1b9e8
421 15:53:13.710453 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 15:53:13.742497 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 15:53:13.746055 Processing 3976 relocs. Offset value of 0x98db0000
424 15:53:13.752710 Accumulated console time in postcar 52 ms
425 15:53:13.753216
426 15:53:13.753756
427 15:53:13.762940 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
428 15:53:13.769075 FMAP: area RO_VPD found @ c00000 (16384 bytes)
429 15:53:13.772448 WARNING: RO_VPD is uninitialized or empty.
430 15:53:13.775978 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 15:53:13.782657 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 15:53:13.783268 Normal boot.
433 15:53:13.788944 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
434 15:53:13.792252 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 15:53:13.795981 CBFS @ c08000 size 3f8000
436 15:53:13.802196 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 15:53:13.805565 CBFS: Locating 'cpu_microcode_blob.bin'
438 15:53:13.809047 CBFS: Found @ offset 14700 size 2ec00
439 15:53:13.812470 microcode: sig=0x806ec pf=0x4 revision=0xc9
440 15:53:13.815858 Skip microcode update
441 15:53:13.818665 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 15:53:13.822036 CBFS @ c08000 size 3f8000
443 15:53:13.828953 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 15:53:13.832455 CBFS: Locating 'fsps.bin'
445 15:53:13.835245 CBFS: Found @ offset d1fc0 size 35000
446 15:53:13.860879 Detected 4 core, 8 thread CPU.
447 15:53:13.863968 Setting up SMI for CPU
448 15:53:13.867421 IED base = 0x9ac00000
449 15:53:13.868056 IED size = 0x00400000
450 15:53:13.870769 Will perform SMM setup.
451 15:53:13.877932 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 15:53:13.884052 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 15:53:13.887161 Processing 16 relocs. Offset value of 0x00030000
454 15:53:13.890937 Attempting to start 7 APs
455 15:53:13.894056 Waiting for 10ms after sending INIT.
456 15:53:13.910606 Waiting for 1st SIPI to complete...done.
457 15:53:13.911162 AP: slot 2 apic_id 4.
458 15:53:13.913717 AP: slot 5 apic_id 5.
459 15:53:13.917204 AP: slot 3 apic_id 6.
460 15:53:13.917593 AP: slot 6 apic_id 7.
461 15:53:13.923461 Waiting for 2nd SIPI to complete...done.
462 15:53:13.923951 AP: slot 4 apic_id 1.
463 15:53:13.926748 AP: slot 1 apic_id 2.
464 15:53:13.930328 AP: slot 7 apic_id 3.
465 15:53:13.937190 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 15:53:13.943141 Processing 13 relocs. Offset value of 0x00038000
467 15:53:13.946369 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 15:53:13.953302 Installing SMM handler to 0x9a000000
469 15:53:13.960021 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 15:53:13.963094 Processing 658 relocs. Offset value of 0x9a010000
471 15:53:13.973031 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 15:53:13.976723 Processing 13 relocs. Offset value of 0x9a008000
473 15:53:13.983029 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 15:53:13.989690 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 15:53:13.993117 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 15:53:13.999726 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 15:53:14.006298 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 15:53:14.012845 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 15:53:14.016481 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 15:53:14.022939 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 15:53:14.026226 Clearing SMI status registers
482 15:53:14.029649 SMI_STS: PM1
483 15:53:14.029761 PM1_STS: PWRBTN
484 15:53:14.032903 TCO_STS: SECOND_TO
485 15:53:14.036324 New SMBASE 0x9a000000
486 15:53:14.039723 In relocation handler: CPU 0
487 15:53:14.043083 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 15:53:14.046265 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 15:53:14.049785 Relocation complete.
490 15:53:14.052778 New SMBASE 0x99fff000
491 15:53:14.052885 In relocation handler: CPU 4
492 15:53:14.059835 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
493 15:53:14.062975 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 15:53:14.066617 Relocation complete.
495 15:53:14.069588 New SMBASE 0x99ffe400
496 15:53:14.069709 In relocation handler: CPU 7
497 15:53:14.076075 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
498 15:53:14.079293 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 15:53:14.082727 Relocation complete.
500 15:53:14.082838 New SMBASE 0x99fffc00
501 15:53:14.086439 In relocation handler: CPU 1
502 15:53:14.092943 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
503 15:53:14.096154 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 15:53:14.099404 Relocation complete.
505 15:53:14.099506 New SMBASE 0x99fff800
506 15:53:14.102580 In relocation handler: CPU 2
507 15:53:14.106048 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
508 15:53:14.112921 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 15:53:14.116125 Relocation complete.
510 15:53:14.116265 New SMBASE 0x99ffec00
511 15:53:14.119218 In relocation handler: CPU 5
512 15:53:14.123336 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
513 15:53:14.129285 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 15:53:14.132719 Relocation complete.
515 15:53:14.132836 New SMBASE 0x99fff400
516 15:53:14.136237 In relocation handler: CPU 3
517 15:53:14.139689 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
518 15:53:14.146211 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 15:53:14.146305 Relocation complete.
520 15:53:14.149163 New SMBASE 0x99ffe800
521 15:53:14.152522 In relocation handler: CPU 6
522 15:53:14.155998 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
523 15:53:14.162359 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 15:53:14.162451 Relocation complete.
525 15:53:14.165789 Initializing CPU #0
526 15:53:14.169235 CPU: vendor Intel device 806ec
527 15:53:14.172507 CPU: family 06, model 8e, stepping 0c
528 15:53:14.175853 Clearing out pending MCEs
529 15:53:14.179301 Setting up local APIC...
530 15:53:14.179411 apic_id: 0x00 done.
531 15:53:14.182957 Turbo is available but hidden
532 15:53:14.185703 Turbo is available and visible
533 15:53:14.189275 VMX status: enabled
534 15:53:14.192592 IA32_FEATURE_CONTROL status: locked
535 15:53:14.196103 Skip microcode update
536 15:53:14.196296 CPU #0 initialized
537 15:53:14.198962 Initializing CPU #4
538 15:53:14.202443 Initializing CPU #1
539 15:53:14.202743 Initializing CPU #7
540 15:53:14.205606 CPU: vendor Intel device 806ec
541 15:53:14.209280 CPU: family 06, model 8e, stepping 0c
542 15:53:14.212571 CPU: vendor Intel device 806ec
543 15:53:14.216192 CPU: family 06, model 8e, stepping 0c
544 15:53:14.219127 Clearing out pending MCEs
545 15:53:14.222590 Clearing out pending MCEs
546 15:53:14.225692 Setting up local APIC...
547 15:53:14.226137 Initializing CPU #2
548 15:53:14.229299 Initializing CPU #5
549 15:53:14.232616 CPU: vendor Intel device 806ec
550 15:53:14.235875 CPU: family 06, model 8e, stepping 0c
551 15:53:14.239134 CPU: vendor Intel device 806ec
552 15:53:14.242841 CPU: family 06, model 8e, stepping 0c
553 15:53:14.245773 Clearing out pending MCEs
554 15:53:14.249208 Clearing out pending MCEs
555 15:53:14.249774 Setting up local APIC...
556 15:53:14.252713 Setting up local APIC...
557 15:53:14.255809 Initializing CPU #6
558 15:53:14.256237 Initializing CPU #3
559 15:53:14.259297 CPU: vendor Intel device 806ec
560 15:53:14.262805 CPU: family 06, model 8e, stepping 0c
561 15:53:14.265752 CPU: vendor Intel device 806ec
562 15:53:14.272437 CPU: family 06, model 8e, stepping 0c
563 15:53:14.272896 Clearing out pending MCEs
564 15:53:14.275827 Clearing out pending MCEs
565 15:53:14.279108 Setting up local APIC...
566 15:53:14.282625 apic_id: 0x04 done.
567 15:53:14.283058 Setting up local APIC...
568 15:53:14.286052 CPU: vendor Intel device 806ec
569 15:53:14.289261 CPU: family 06, model 8e, stepping 0c
570 15:53:14.292212 Clearing out pending MCEs
571 15:53:14.295546 apic_id: 0x05 done.
572 15:53:14.296024 VMX status: enabled
573 15:53:14.298967 VMX status: enabled
574 15:53:14.302432 Setting up local APIC...
575 15:53:14.302858 apic_id: 0x07 done.
576 15:53:14.305674 Setting up local APIC...
577 15:53:14.309059 apic_id: 0x01 done.
578 15:53:14.312125 apic_id: 0x06 done.
579 15:53:14.312563 VMX status: enabled
580 15:53:14.315768 VMX status: enabled
581 15:53:14.318954 IA32_FEATURE_CONTROL status: locked
582 15:53:14.322321 IA32_FEATURE_CONTROL status: locked
583 15:53:14.325293 Skip microcode update
584 15:53:14.325879 Skip microcode update
585 15:53:14.328860 VMX status: enabled
586 15:53:14.332158 apic_id: 0x03 done.
587 15:53:14.332746 apic_id: 0x02 done.
588 15:53:14.335502 VMX status: enabled
589 15:53:14.336099 VMX status: enabled
590 15:53:14.338769 IA32_FEATURE_CONTROL status: locked
591 15:53:14.345646 IA32_FEATURE_CONTROL status: locked
592 15:53:14.346255 Skip microcode update
593 15:53:14.349010 Skip microcode update
594 15:53:14.352183 CPU #7 initialized
595 15:53:14.352646 CPU #1 initialized
596 15:53:14.355378 IA32_FEATURE_CONTROL status: locked
597 15:53:14.358850 IA32_FEATURE_CONTROL status: locked
598 15:53:14.362274 Skip microcode update
599 15:53:14.365151 Skip microcode update
600 15:53:14.365589 CPU #5 initialized
601 15:53:14.368543 CPU #2 initialized
602 15:53:14.368997 CPU #3 initialized
603 15:53:14.371826 CPU #6 initialized
604 15:53:14.375065 IA32_FEATURE_CONTROL status: locked
605 15:53:14.378634 Skip microcode update
606 15:53:14.379082 CPU #4 initialized
607 15:53:14.385529 bsp_do_flight_plan done after 459 msecs.
608 15:53:14.388353 CPU: frequency set to 4200 MHz
609 15:53:14.388808 Enabling SMIs.
610 15:53:14.389149 Locking SMM.
611 15:53:14.405300 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 15:53:14.408119 CBFS @ c08000 size 3f8000
613 15:53:14.415037 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 15:53:14.415477 CBFS: Locating 'vbt.bin'
615 15:53:14.418357 CBFS: Found @ offset 5f5c0 size 499
616 15:53:14.425045 Found a VBT of 4608 bytes after decompression
617 15:53:14.607899 Display FSP Version Info HOB
618 15:53:14.611444 Reference Code - CPU = 9.0.1e.30
619 15:53:14.614612 uCode Version = 0.0.0.ca
620 15:53:14.617990 TXT ACM version = ff.ff.ff.ffff
621 15:53:14.621783 Display FSP Version Info HOB
622 15:53:14.624668 Reference Code - ME = 9.0.1e.30
623 15:53:14.628132 MEBx version = 0.0.0.0
624 15:53:14.631627 ME Firmware Version = Consumer SKU
625 15:53:14.634292 Display FSP Version Info HOB
626 15:53:14.637857 Reference Code - CML PCH = 9.0.1e.30
627 15:53:14.641018 PCH-CRID Status = Disabled
628 15:53:14.644493 PCH-CRID Original Value = ff.ff.ff.ffff
629 15:53:14.647627 PCH-CRID New Value = ff.ff.ff.ffff
630 15:53:14.650998 OPROM - RST - RAID = ff.ff.ff.ffff
631 15:53:14.654561 ChipsetInit Base Version = ff.ff.ff.ffff
632 15:53:14.657850 ChipsetInit Oem Version = ff.ff.ff.ffff
633 15:53:14.661319 Display FSP Version Info HOB
634 15:53:14.667730 Reference Code - SA - System Agent = 9.0.1e.30
635 15:53:14.671080 Reference Code - MRC = 0.7.1.6c
636 15:53:14.671769 SA - PCIe Version = 9.0.1e.30
637 15:53:14.674092 SA-CRID Status = Disabled
638 15:53:14.677384 SA-CRID Original Value = 0.0.0.c
639 15:53:14.680858 SA-CRID New Value = 0.0.0.c
640 15:53:14.683919 OPROM - VBIOS = ff.ff.ff.ffff
641 15:53:14.687590 RTC Init
642 15:53:14.690650 Set power on after power failure.
643 15:53:14.691194 Disabling Deep S3
644 15:53:14.693907 Disabling Deep S3
645 15:53:14.694422 Disabling Deep S4
646 15:53:14.697332 Disabling Deep S4
647 15:53:14.700729 Disabling Deep S5
648 15:53:14.701265 Disabling Deep S5
649 15:53:14.707557 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
650 15:53:14.708056 Enumerating buses...
651 15:53:14.713559 Show all devs... Before device enumeration.
652 15:53:14.717299 Root Device: enabled 1
653 15:53:14.717743 CPU_CLUSTER: 0: enabled 1
654 15:53:14.720635 DOMAIN: 0000: enabled 1
655 15:53:14.723843 APIC: 00: enabled 1
656 15:53:14.724338 PCI: 00:00.0: enabled 1
657 15:53:14.727207 PCI: 00:02.0: enabled 1
658 15:53:14.730167 PCI: 00:04.0: enabled 0
659 15:53:14.733902 PCI: 00:05.0: enabled 0
660 15:53:14.734498 PCI: 00:12.0: enabled 1
661 15:53:14.736842 PCI: 00:12.5: enabled 0
662 15:53:14.740362 PCI: 00:12.6: enabled 0
663 15:53:14.743538 PCI: 00:14.0: enabled 1
664 15:53:14.744117 PCI: 00:14.1: enabled 0
665 15:53:14.746925 PCI: 00:14.3: enabled 1
666 15:53:14.750276 PCI: 00:14.5: enabled 0
667 15:53:14.753721 PCI: 00:15.0: enabled 1
668 15:53:14.754299 PCI: 00:15.1: enabled 1
669 15:53:14.757123 PCI: 00:15.2: enabled 0
670 15:53:14.760300 PCI: 00:15.3: enabled 0
671 15:53:14.760768 PCI: 00:16.0: enabled 1
672 15:53:14.763498 PCI: 00:16.1: enabled 0
673 15:53:14.766872 PCI: 00:16.2: enabled 0
674 15:53:14.770568 PCI: 00:16.3: enabled 0
675 15:53:14.771082 PCI: 00:16.4: enabled 0
676 15:53:14.773567 PCI: 00:16.5: enabled 0
677 15:53:14.776780 PCI: 00:17.0: enabled 1
678 15:53:14.780003 PCI: 00:19.0: enabled 1
679 15:53:14.780454 PCI: 00:19.1: enabled 0
680 15:53:14.783555 PCI: 00:19.2: enabled 0
681 15:53:14.786692 PCI: 00:1a.0: enabled 0
682 15:53:14.789716 PCI: 00:1c.0: enabled 0
683 15:53:14.790303 PCI: 00:1c.1: enabled 0
684 15:53:14.793216 PCI: 00:1c.2: enabled 0
685 15:53:14.796425 PCI: 00:1c.3: enabled 0
686 15:53:14.796901 PCI: 00:1c.4: enabled 0
687 15:53:14.799960 PCI: 00:1c.5: enabled 0
688 15:53:14.803267 PCI: 00:1c.6: enabled 0
689 15:53:14.806745 PCI: 00:1c.7: enabled 0
690 15:53:14.807205 PCI: 00:1d.0: enabled 1
691 15:53:14.810109 PCI: 00:1d.1: enabled 0
692 15:53:14.812785 PCI: 00:1d.2: enabled 0
693 15:53:14.816527 PCI: 00:1d.3: enabled 0
694 15:53:14.816987 PCI: 00:1d.4: enabled 0
695 15:53:14.819569 PCI: 00:1d.5: enabled 1
696 15:53:14.822872 PCI: 00:1e.0: enabled 1
697 15:53:14.826120 PCI: 00:1e.1: enabled 0
698 15:53:14.826731 PCI: 00:1e.2: enabled 1
699 15:53:14.829588 PCI: 00:1e.3: enabled 1
700 15:53:14.832971 PCI: 00:1f.0: enabled 1
701 15:53:14.836626 PCI: 00:1f.1: enabled 1
702 15:53:14.837217 PCI: 00:1f.2: enabled 1
703 15:53:14.839778 PCI: 00:1f.3: enabled 1
704 15:53:14.843243 PCI: 00:1f.4: enabled 1
705 15:53:14.843818 PCI: 00:1f.5: enabled 1
706 15:53:14.845769 PCI: 00:1f.6: enabled 0
707 15:53:14.849404 USB0 port 0: enabled 1
708 15:53:14.852774 I2C: 00:15: enabled 1
709 15:53:14.853193 I2C: 00:5d: enabled 1
710 15:53:14.856138 GENERIC: 0.0: enabled 1
711 15:53:14.859466 I2C: 00:1a: enabled 1
712 15:53:14.860072 I2C: 00:38: enabled 1
713 15:53:14.862438 I2C: 00:39: enabled 1
714 15:53:14.865788 I2C: 00:3a: enabled 1
715 15:53:14.866363 I2C: 00:3b: enabled 1
716 15:53:14.869356 PCI: 00:00.0: enabled 1
717 15:53:14.872714 SPI: 00: enabled 1
718 15:53:14.873136 SPI: 01: enabled 1
719 15:53:14.875911 PNP: 0c09.0: enabled 1
720 15:53:14.879275 USB2 port 0: enabled 1
721 15:53:14.879864 USB2 port 1: enabled 1
722 15:53:14.882410 USB2 port 2: enabled 0
723 15:53:14.885786 USB2 port 3: enabled 0
724 15:53:14.889310 USB2 port 5: enabled 0
725 15:53:14.889856 USB2 port 6: enabled 1
726 15:53:14.892419 USB2 port 9: enabled 1
727 15:53:14.895788 USB3 port 0: enabled 1
728 15:53:14.896217 USB3 port 1: enabled 1
729 15:53:14.898918 USB3 port 2: enabled 1
730 15:53:14.902277 USB3 port 3: enabled 1
731 15:53:14.905686 USB3 port 4: enabled 0
732 15:53:14.906209 APIC: 02: enabled 1
733 15:53:14.909150 APIC: 04: enabled 1
734 15:53:14.909576 APIC: 06: enabled 1
735 15:53:14.912166 APIC: 01: enabled 1
736 15:53:14.915692 APIC: 05: enabled 1
737 15:53:14.916141 APIC: 07: enabled 1
738 15:53:14.918970 APIC: 03: enabled 1
739 15:53:14.919538 Compare with tree...
740 15:53:14.922156 Root Device: enabled 1
741 15:53:14.925506 CPU_CLUSTER: 0: enabled 1
742 15:53:14.928889 APIC: 00: enabled 1
743 15:53:14.929471 APIC: 02: enabled 1
744 15:53:14.931976 APIC: 04: enabled 1
745 15:53:14.935325 APIC: 06: enabled 1
746 15:53:14.935885 APIC: 01: enabled 1
747 15:53:14.939078 APIC: 05: enabled 1
748 15:53:14.941926 APIC: 07: enabled 1
749 15:53:14.942354 APIC: 03: enabled 1
750 15:53:14.945362 DOMAIN: 0000: enabled 1
751 15:53:14.948703 PCI: 00:00.0: enabled 1
752 15:53:14.951910 PCI: 00:02.0: enabled 1
753 15:53:14.955301 PCI: 00:04.0: enabled 0
754 15:53:14.955806 PCI: 00:05.0: enabled 0
755 15:53:14.958562 PCI: 00:12.0: enabled 1
756 15:53:14.961844 PCI: 00:12.5: enabled 0
757 15:53:14.965181 PCI: 00:12.6: enabled 0
758 15:53:14.968584 PCI: 00:14.0: enabled 1
759 15:53:14.969080 USB0 port 0: enabled 1
760 15:53:14.972020 USB2 port 0: enabled 1
761 15:53:14.975069 USB2 port 1: enabled 1
762 15:53:14.978347 USB2 port 2: enabled 0
763 15:53:14.981684 USB2 port 3: enabled 0
764 15:53:14.982196 USB2 port 5: enabled 0
765 15:53:14.984910 USB2 port 6: enabled 1
766 15:53:14.988248 USB2 port 9: enabled 1
767 15:53:14.991492 USB3 port 0: enabled 1
768 15:53:14.994846 USB3 port 1: enabled 1
769 15:53:14.998228 USB3 port 2: enabled 1
770 15:53:14.998656 USB3 port 3: enabled 1
771 15:53:15.001516 USB3 port 4: enabled 0
772 15:53:15.004691 PCI: 00:14.1: enabled 0
773 15:53:15.007916 PCI: 00:14.3: enabled 1
774 15:53:15.011381 PCI: 00:14.5: enabled 0
775 15:53:15.011904 PCI: 00:15.0: enabled 1
776 15:53:15.014746 I2C: 00:15: enabled 1
777 15:53:15.018170 PCI: 00:15.1: enabled 1
778 15:53:15.021599 I2C: 00:5d: enabled 1
779 15:53:15.022024 GENERIC: 0.0: enabled 1
780 15:53:15.025162 PCI: 00:15.2: enabled 0
781 15:53:15.028181 PCI: 00:15.3: enabled 0
782 15:53:15.031343 PCI: 00:16.0: enabled 1
783 15:53:15.034462 PCI: 00:16.1: enabled 0
784 15:53:15.034921 PCI: 00:16.2: enabled 0
785 15:53:15.037879 PCI: 00:16.3: enabled 0
786 15:53:15.041433 PCI: 00:16.4: enabled 0
787 15:53:15.044538 PCI: 00:16.5: enabled 0
788 15:53:15.047824 PCI: 00:17.0: enabled 1
789 15:53:15.048364 PCI: 00:19.0: enabled 1
790 15:53:15.051152 I2C: 00:1a: enabled 1
791 15:53:15.054351 I2C: 00:38: enabled 1
792 15:53:15.057962 I2C: 00:39: enabled 1
793 15:53:15.058435 I2C: 00:3a: enabled 1
794 15:53:15.061157 I2C: 00:3b: enabled 1
795 15:53:15.064705 PCI: 00:19.1: enabled 0
796 15:53:15.067556 PCI: 00:19.2: enabled 0
797 15:53:15.071001 PCI: 00:1a.0: enabled 0
798 15:53:15.071591 PCI: 00:1c.0: enabled 0
799 15:53:15.074349 PCI: 00:1c.1: enabled 0
800 15:53:15.077966 PCI: 00:1c.2: enabled 0
801 15:53:15.081014 PCI: 00:1c.3: enabled 0
802 15:53:15.084448 PCI: 00:1c.4: enabled 0
803 15:53:15.084880 PCI: 00:1c.5: enabled 0
804 15:53:15.087711 PCI: 00:1c.6: enabled 0
805 15:53:15.091049 PCI: 00:1c.7: enabled 0
806 15:53:15.094068 PCI: 00:1d.0: enabled 1
807 15:53:15.097441 PCI: 00:1d.1: enabled 0
808 15:53:15.098016 PCI: 00:1d.2: enabled 0
809 15:53:15.100730 PCI: 00:1d.3: enabled 0
810 15:53:15.104006 PCI: 00:1d.4: enabled 0
811 15:53:15.107590 PCI: 00:1d.5: enabled 1
812 15:53:15.110613 PCI: 00:00.0: enabled 1
813 15:53:15.111042 PCI: 00:1e.0: enabled 1
814 15:53:15.113944 PCI: 00:1e.1: enabled 0
815 15:53:15.117710 PCI: 00:1e.2: enabled 1
816 15:53:15.120430 SPI: 00: enabled 1
817 15:53:15.120856 PCI: 00:1e.3: enabled 1
818 15:53:15.123834 SPI: 01: enabled 1
819 15:53:15.127536 PCI: 00:1f.0: enabled 1
820 15:53:15.130365 PNP: 0c09.0: enabled 1
821 15:53:15.130912 PCI: 00:1f.1: enabled 1
822 15:53:15.134008 PCI: 00:1f.2: enabled 1
823 15:53:15.137645 PCI: 00:1f.3: enabled 1
824 15:53:15.140291 PCI: 00:1f.4: enabled 1
825 15:53:15.143739 PCI: 00:1f.5: enabled 1
826 15:53:15.144168 PCI: 00:1f.6: enabled 0
827 15:53:15.147473 Root Device scanning...
828 15:53:15.150512 scan_static_bus for Root Device
829 15:53:15.153955 CPU_CLUSTER: 0 enabled
830 15:53:15.157233 DOMAIN: 0000 enabled
831 15:53:15.157660 DOMAIN: 0000 scanning...
832 15:53:15.160667 PCI: pci_scan_bus for bus 00
833 15:53:15.163820 PCI: 00:00.0 [8086/0000] ops
834 15:53:15.166869 PCI: 00:00.0 [8086/9b61] enabled
835 15:53:15.170355 PCI: 00:02.0 [8086/0000] bus ops
836 15:53:15.173808 PCI: 00:02.0 [8086/9b41] enabled
837 15:53:15.177019 PCI: 00:04.0 [8086/1903] disabled
838 15:53:15.180099 PCI: 00:08.0 [8086/1911] enabled
839 15:53:15.183445 PCI: 00:12.0 [8086/02f9] enabled
840 15:53:15.186929 PCI: 00:14.0 [8086/0000] bus ops
841 15:53:15.190129 PCI: 00:14.0 [8086/02ed] enabled
842 15:53:15.193049 PCI: 00:14.2 [8086/02ef] enabled
843 15:53:15.196763 PCI: 00:14.3 [8086/02f0] enabled
844 15:53:15.199610 PCI: 00:15.0 [8086/0000] bus ops
845 15:53:15.203099 PCI: 00:15.0 [8086/02e8] enabled
846 15:53:15.206522 PCI: 00:15.1 [8086/0000] bus ops
847 15:53:15.209707 PCI: 00:15.1 [8086/02e9] enabled
848 15:53:15.213177 PCI: 00:16.0 [8086/0000] ops
849 15:53:15.216188 PCI: 00:16.0 [8086/02e0] enabled
850 15:53:15.219535 PCI: 00:17.0 [8086/0000] ops
851 15:53:15.223097 PCI: 00:17.0 [8086/02d3] enabled
852 15:53:15.226918 PCI: 00:19.0 [8086/0000] bus ops
853 15:53:15.230238 PCI: 00:19.0 [8086/02c5] enabled
854 15:53:15.233892 PCI: 00:1d.0 [8086/0000] bus ops
855 15:53:15.237012 PCI: 00:1d.0 [8086/02b0] enabled
856 15:53:15.243315 PCI: Static device PCI: 00:1d.5 not found, disabling it.
857 15:53:15.247245 PCI: 00:1e.0 [8086/0000] ops
858 15:53:15.250261 PCI: 00:1e.0 [8086/02a8] enabled
859 15:53:15.253697 PCI: 00:1e.2 [8086/0000] bus ops
860 15:53:15.257174 PCI: 00:1e.2 [8086/02aa] enabled
861 15:53:15.260082 PCI: 00:1e.3 [8086/0000] bus ops
862 15:53:15.263603 PCI: 00:1e.3 [8086/02ab] enabled
863 15:53:15.266972 PCI: 00:1f.0 [8086/0000] bus ops
864 15:53:15.270201 PCI: 00:1f.0 [8086/0284] enabled
865 15:53:15.273918 PCI: Static device PCI: 00:1f.1 not found, disabling it.
866 15:53:15.280232 PCI: Static device PCI: 00:1f.2 not found, disabling it.
867 15:53:15.283509 PCI: 00:1f.3 [8086/0000] bus ops
868 15:53:15.286616 PCI: 00:1f.3 [8086/02c8] enabled
869 15:53:15.290045 PCI: 00:1f.4 [8086/0000] bus ops
870 15:53:15.293525 PCI: 00:1f.4 [8086/02a3] enabled
871 15:53:15.296754 PCI: 00:1f.5 [8086/0000] bus ops
872 15:53:15.299945 PCI: 00:1f.5 [8086/02a4] enabled
873 15:53:15.303237 PCI: Leftover static devices:
874 15:53:15.303957 PCI: 00:05.0
875 15:53:15.306778 PCI: 00:12.5
876 15:53:15.307241 PCI: 00:12.6
877 15:53:15.310088 PCI: 00:14.1
878 15:53:15.310564 PCI: 00:14.5
879 15:53:15.310930 PCI: 00:15.2
880 15:53:15.313048 PCI: 00:15.3
881 15:53:15.313512 PCI: 00:16.1
882 15:53:15.316453 PCI: 00:16.2
883 15:53:15.316918 PCI: 00:16.3
884 15:53:15.317283 PCI: 00:16.4
885 15:53:15.319882 PCI: 00:16.5
886 15:53:15.320347 PCI: 00:19.1
887 15:53:15.323360 PCI: 00:19.2
888 15:53:15.323848 PCI: 00:1a.0
889 15:53:15.326230 PCI: 00:1c.0
890 15:53:15.326929 PCI: 00:1c.1
891 15:53:15.327320 PCI: 00:1c.2
892 15:53:15.329690 PCI: 00:1c.3
893 15:53:15.330153 PCI: 00:1c.4
894 15:53:15.333306 PCI: 00:1c.5
895 15:53:15.333878 PCI: 00:1c.6
896 15:53:15.334252 PCI: 00:1c.7
897 15:53:15.336405 PCI: 00:1d.1
898 15:53:15.336869 PCI: 00:1d.2
899 15:53:15.339789 PCI: 00:1d.3
900 15:53:15.340254 PCI: 00:1d.4
901 15:53:15.340620 PCI: 00:1d.5
902 15:53:15.343378 PCI: 00:1e.1
903 15:53:15.343887 PCI: 00:1f.1
904 15:53:15.346651 PCI: 00:1f.2
905 15:53:15.347223 PCI: 00:1f.6
906 15:53:15.350003 PCI: Check your devicetree.cb.
907 15:53:15.353424 PCI: 00:02.0 scanning...
908 15:53:15.356971 scan_generic_bus for PCI: 00:02.0
909 15:53:15.359723 scan_generic_bus for PCI: 00:02.0 done
910 15:53:15.366312 scan_bus: scanning of bus PCI: 00:02.0 took 10182 usecs
911 15:53:15.369611 PCI: 00:14.0 scanning...
912 15:53:15.372706 scan_static_bus for PCI: 00:14.0
913 15:53:15.373197 USB0 port 0 enabled
914 15:53:15.376619 USB0 port 0 scanning...
915 15:53:15.379812 scan_static_bus for USB0 port 0
916 15:53:15.382758 USB2 port 0 enabled
917 15:53:15.383225 USB2 port 1 enabled
918 15:53:15.386588 USB2 port 2 disabled
919 15:53:15.389880 USB2 port 3 disabled
920 15:53:15.390462 USB2 port 5 disabled
921 15:53:15.392671 USB2 port 6 enabled
922 15:53:15.393262 USB2 port 9 enabled
923 15:53:15.395940 USB3 port 0 enabled
924 15:53:15.399532 USB3 port 1 enabled
925 15:53:15.400048 USB3 port 2 enabled
926 15:53:15.402634 USB3 port 3 enabled
927 15:53:15.406026 USB3 port 4 disabled
928 15:53:15.406489 USB2 port 0 scanning...
929 15:53:15.409096 scan_static_bus for USB2 port 0
930 15:53:15.412386 scan_static_bus for USB2 port 0 done
931 15:53:15.418984 scan_bus: scanning of bus USB2 port 0 took 9704 usecs
932 15:53:15.422356 USB2 port 1 scanning...
933 15:53:15.426209 scan_static_bus for USB2 port 1
934 15:53:15.428938 scan_static_bus for USB2 port 1 done
935 15:53:15.435752 scan_bus: scanning of bus USB2 port 1 took 9695 usecs
936 15:53:15.436400 USB2 port 6 scanning...
937 15:53:15.439245 scan_static_bus for USB2 port 6
938 15:53:15.445577 scan_static_bus for USB2 port 6 done
939 15:53:15.448746 scan_bus: scanning of bus USB2 port 6 took 9705 usecs
940 15:53:15.452197 USB2 port 9 scanning...
941 15:53:15.455880 scan_static_bus for USB2 port 9
942 15:53:15.459060 scan_static_bus for USB2 port 9 done
943 15:53:15.465441 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
944 15:53:15.465864 USB3 port 0 scanning...
945 15:53:15.468710 scan_static_bus for USB3 port 0
946 15:53:15.475368 scan_static_bus for USB3 port 0 done
947 15:53:15.478644 scan_bus: scanning of bus USB3 port 0 took 9695 usecs
948 15:53:15.482054 USB3 port 1 scanning...
949 15:53:15.485644 scan_static_bus for USB3 port 1
950 15:53:15.488739 scan_static_bus for USB3 port 1 done
951 15:53:15.495267 scan_bus: scanning of bus USB3 port 1 took 9695 usecs
952 15:53:15.495727 USB3 port 2 scanning...
953 15:53:15.499042 scan_static_bus for USB3 port 2
954 15:53:15.505500 scan_static_bus for USB3 port 2 done
955 15:53:15.508674 scan_bus: scanning of bus USB3 port 2 took 9703 usecs
956 15:53:15.512310 USB3 port 3 scanning...
957 15:53:15.515232 scan_static_bus for USB3 port 3
958 15:53:15.519097 scan_static_bus for USB3 port 3 done
959 15:53:15.525210 scan_bus: scanning of bus USB3 port 3 took 9705 usecs
960 15:53:15.528672 scan_static_bus for USB0 port 0 done
961 15:53:15.532432 scan_bus: scanning of bus USB0 port 0 took 155335 usecs
962 15:53:15.538916 scan_static_bus for PCI: 00:14.0 done
963 15:53:15.541894 scan_bus: scanning of bus PCI: 00:14.0 took 172941 usecs
964 15:53:15.545602 PCI: 00:15.0 scanning...
965 15:53:15.548906 scan_generic_bus for PCI: 00:15.0
966 15:53:15.552274 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
967 15:53:15.558597 scan_generic_bus for PCI: 00:15.0 done
968 15:53:15.562312 scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs
969 15:53:15.565509 PCI: 00:15.1 scanning...
970 15:53:15.568777 scan_generic_bus for PCI: 00:15.1
971 15:53:15.571790 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
972 15:53:15.578735 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
973 15:53:15.581828 scan_generic_bus for PCI: 00:15.1 done
974 15:53:15.588638 scan_bus: scanning of bus PCI: 00:15.1 took 18591 usecs
975 15:53:15.589144 PCI: 00:19.0 scanning...
976 15:53:15.592113 scan_generic_bus for PCI: 00:19.0
977 15:53:15.598722 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
978 15:53:15.601977 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
979 15:53:15.605367 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
980 15:53:15.608696 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
981 15:53:15.615310 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
982 15:53:15.618267 scan_generic_bus for PCI: 00:19.0 done
983 15:53:15.621747 scan_bus: scanning of bus PCI: 00:19.0 took 30710 usecs
984 15:53:15.625152 PCI: 00:1d.0 scanning...
985 15:53:15.628438 do_pci_scan_bridge for PCI: 00:1d.0
986 15:53:15.631595 PCI: pci_scan_bus for bus 01
987 15:53:15.635083 PCI: 01:00.0 [1c5c/1327] enabled
988 15:53:15.638191 Enabling Common Clock Configuration
989 15:53:15.645575 L1 Sub-State supported from root port 29
990 15:53:15.647987 L1 Sub-State Support = 0xf
991 15:53:15.648411 CommonModeRestoreTime = 0x28
992 15:53:15.654733 Power On Value = 0x16, Power On Scale = 0x0
993 15:53:15.655158 ASPM: Enabled L1
994 15:53:15.661202 scan_bus: scanning of bus PCI: 00:1d.0 took 32769 usecs
995 15:53:15.664538 PCI: 00:1e.2 scanning...
996 15:53:15.667981 scan_generic_bus for PCI: 00:1e.2
997 15:53:15.671164 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
998 15:53:15.674709 scan_generic_bus for PCI: 00:1e.2 done
999 15:53:15.681138 scan_bus: scanning of bus PCI: 00:1e.2 took 14006 usecs
1000 15:53:15.684825 PCI: 00:1e.3 scanning...
1001 15:53:15.687942 scan_generic_bus for PCI: 00:1e.3
1002 15:53:15.691420 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1003 15:53:15.694677 scan_generic_bus for PCI: 00:1e.3 done
1004 15:53:15.701192 scan_bus: scanning of bus PCI: 00:1e.3 took 13986 usecs
1005 15:53:15.701616 PCI: 00:1f.0 scanning...
1006 15:53:15.704534 scan_static_bus for PCI: 00:1f.0
1007 15:53:15.707847 PNP: 0c09.0 enabled
1008 15:53:15.711219 scan_static_bus for PCI: 00:1f.0 done
1009 15:53:15.717920 scan_bus: scanning of bus PCI: 00:1f.0 took 12043 usecs
1010 15:53:15.721235 PCI: 00:1f.3 scanning...
1011 15:53:15.724581 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1012 15:53:15.728012 PCI: 00:1f.4 scanning...
1013 15:53:15.731256 scan_generic_bus for PCI: 00:1f.4
1014 15:53:15.734444 scan_generic_bus for PCI: 00:1f.4 done
1015 15:53:15.741422 scan_bus: scanning of bus PCI: 00:1f.4 took 10182 usecs
1016 15:53:15.744641 PCI: 00:1f.5 scanning...
1017 15:53:15.747786 scan_generic_bus for PCI: 00:1f.5
1018 15:53:15.751724 scan_generic_bus for PCI: 00:1f.5 done
1019 15:53:15.757554 scan_bus: scanning of bus PCI: 00:1f.5 took 10176 usecs
1020 15:53:15.764700 scan_bus: scanning of bus DOMAIN: 0000 took 604851 usecs
1021 15:53:15.767617 scan_static_bus for Root Device done
1022 15:53:15.770992 scan_bus: scanning of bus Root Device took 624713 usecs
1023 15:53:15.774211 done
1024 15:53:15.777550 Chrome EC: UHEPI supported
1025 15:53:15.780785 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1026 15:53:15.787450 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1027 15:53:15.794458 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1028 15:53:15.801060 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1029 15:53:15.804217 SPI flash protection: WPSW=0 SRP0=0
1030 15:53:15.810745 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1031 15:53:15.814298 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1032 15:53:15.817677 found VGA at PCI: 00:02.0
1033 15:53:15.821136 Setting up VGA for PCI: 00:02.0
1034 15:53:15.827452 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1035 15:53:15.830683 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1036 15:53:15.834168 Allocating resources...
1037 15:53:15.837427 Reading resources...
1038 15:53:15.840551 Root Device read_resources bus 0 link: 0
1039 15:53:15.844045 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1040 15:53:15.850686 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1041 15:53:15.854318 DOMAIN: 0000 read_resources bus 0 link: 0
1042 15:53:15.861719 PCI: 00:14.0 read_resources bus 0 link: 0
1043 15:53:15.864283 USB0 port 0 read_resources bus 0 link: 0
1044 15:53:15.872793 USB0 port 0 read_resources bus 0 link: 0 done
1045 15:53:15.876032 PCI: 00:14.0 read_resources bus 0 link: 0 done
1046 15:53:15.883587 PCI: 00:15.0 read_resources bus 1 link: 0
1047 15:53:15.887189 PCI: 00:15.0 read_resources bus 1 link: 0 done
1048 15:53:15.893206 PCI: 00:15.1 read_resources bus 2 link: 0
1049 15:53:15.896637 PCI: 00:15.1 read_resources bus 2 link: 0 done
1050 15:53:15.904141 PCI: 00:19.0 read_resources bus 3 link: 0
1051 15:53:15.910616 PCI: 00:19.0 read_resources bus 3 link: 0 done
1052 15:53:15.913813 PCI: 00:1d.0 read_resources bus 1 link: 0
1053 15:53:15.920513 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1054 15:53:15.924199 PCI: 00:1e.2 read_resources bus 4 link: 0
1055 15:53:15.930514 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1056 15:53:15.933686 PCI: 00:1e.3 read_resources bus 5 link: 0
1057 15:53:15.940898 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1058 15:53:15.943687 PCI: 00:1f.0 read_resources bus 0 link: 0
1059 15:53:15.950666 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1060 15:53:15.957268 DOMAIN: 0000 read_resources bus 0 link: 0 done
1061 15:53:15.960413 Root Device read_resources bus 0 link: 0 done
1062 15:53:15.963601 Done reading resources.
1063 15:53:15.967184 Show resources in subtree (Root Device)...After reading.
1064 15:53:15.973479 Root Device child on link 0 CPU_CLUSTER: 0
1065 15:53:15.976692 CPU_CLUSTER: 0 child on link 0 APIC: 00
1066 15:53:15.977153 APIC: 00
1067 15:53:15.980141 APIC: 02
1068 15:53:15.980602 APIC: 04
1069 15:53:15.983964 APIC: 06
1070 15:53:15.984639 APIC: 01
1071 15:53:15.985010 APIC: 05
1072 15:53:15.986688 APIC: 07
1073 15:53:15.987146 APIC: 03
1074 15:53:15.990425 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1075 15:53:16.000279 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1076 15:53:16.056543 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1077 15:53:16.057224 PCI: 00:00.0
1078 15:53:16.058155 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1079 15:53:16.058700 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1080 15:53:16.059282 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1081 15:53:16.059688 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1082 15:53:16.106034 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1083 15:53:16.107351 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1084 15:53:16.107962 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1085 15:53:16.108470 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1086 15:53:16.108840 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1087 15:53:16.109179 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1088 15:53:16.119168 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1089 15:53:16.125272 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1090 15:53:16.134999 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1091 15:53:16.145046 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1092 15:53:16.151909 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1093 15:53:16.161698 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1094 15:53:16.164990 PCI: 00:02.0
1095 15:53:16.175234 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1096 15:53:16.184916 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1097 15:53:16.190966 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1098 15:53:16.194245 PCI: 00:04.0
1099 15:53:16.194326 PCI: 00:08.0
1100 15:53:16.204309 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1101 15:53:16.207409 PCI: 00:12.0
1102 15:53:16.217343 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 15:53:16.221114 PCI: 00:14.0 child on link 0 USB0 port 0
1104 15:53:16.231099 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1105 15:53:16.237290 USB0 port 0 child on link 0 USB2 port 0
1106 15:53:16.237516 USB2 port 0
1107 15:53:16.240638 USB2 port 1
1108 15:53:16.240812 USB2 port 2
1109 15:53:16.243872 USB2 port 3
1110 15:53:16.244043 USB2 port 5
1111 15:53:16.247971 USB2 port 6
1112 15:53:16.248182 USB2 port 9
1113 15:53:16.251319 USB3 port 0
1114 15:53:16.251669 USB3 port 1
1115 15:53:16.254545 USB3 port 2
1116 15:53:16.254874 USB3 port 3
1117 15:53:16.258019 USB3 port 4
1118 15:53:16.258412 PCI: 00:14.2
1119 15:53:16.267943 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1120 15:53:16.277736 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1121 15:53:16.281456 PCI: 00:14.3
1122 15:53:16.290909 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1123 15:53:16.294253 PCI: 00:15.0 child on link 0 I2C: 01:15
1124 15:53:16.304390 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 15:53:16.307623 I2C: 01:15
1126 15:53:16.311199 PCI: 00:15.1 child on link 0 I2C: 02:5d
1127 15:53:16.320423 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1128 15:53:16.320972 I2C: 02:5d
1129 15:53:16.324089 GENERIC: 0.0
1130 15:53:16.324547 PCI: 00:16.0
1131 15:53:16.333640 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 15:53:16.337707 PCI: 00:17.0
1133 15:53:16.346947 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1134 15:53:16.354150 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1135 15:53:16.363756 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1136 15:53:16.370223 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1137 15:53:16.380259 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1138 15:53:16.390437 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1139 15:53:16.393401 PCI: 00:19.0 child on link 0 I2C: 03:1a
1140 15:53:16.403971 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 15:53:16.404554 I2C: 03:1a
1142 15:53:16.406886 I2C: 03:38
1143 15:53:16.407449 I2C: 03:39
1144 15:53:16.409873 I2C: 03:3a
1145 15:53:16.410328 I2C: 03:3b
1146 15:53:16.416655 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1147 15:53:16.423674 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1148 15:53:16.433291 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1149 15:53:16.443366 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1150 15:53:16.443986 PCI: 01:00.0
1151 15:53:16.453194 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 15:53:16.456324 PCI: 00:1e.0
1153 15:53:16.466994 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1154 15:53:16.476091 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1155 15:53:16.483166 PCI: 00:1e.2 child on link 0 SPI: 00
1156 15:53:16.492570 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 15:53:16.493116 SPI: 00
1158 15:53:16.496459 PCI: 00:1e.3 child on link 0 SPI: 01
1159 15:53:16.506356 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 15:53:16.506914 SPI: 01
1161 15:53:16.512857 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1162 15:53:16.519197 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1163 15:53:16.529414 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1164 15:53:16.532382 PNP: 0c09.0
1165 15:53:16.538983 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1166 15:53:16.542200 PCI: 00:1f.3
1167 15:53:16.552412 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 15:53:16.562260 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1169 15:53:16.562805 PCI: 00:1f.4
1170 15:53:16.572284 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1171 15:53:16.582182 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1172 15:53:16.585557 PCI: 00:1f.5
1173 15:53:16.591980 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1174 15:53:16.598882 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1175 15:53:16.605733 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1176 15:53:16.611765 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1177 15:53:16.615208 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1178 15:53:16.618810 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1179 15:53:16.621717 PCI: 00:17.0 18 * [0x60 - 0x67] io
1180 15:53:16.628469 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1181 15:53:16.634973 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1182 15:53:16.641652 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1183 15:53:16.648349 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1184 15:53:16.658026 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1185 15:53:16.664915 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1186 15:53:16.667990 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1187 15:53:16.674549 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1188 15:53:16.680888 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1189 15:53:16.684513 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1190 15:53:16.690763 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1191 15:53:16.694292 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1192 15:53:16.697864 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1193 15:53:16.704500 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1194 15:53:16.707619 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1195 15:53:16.714458 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1196 15:53:16.717768 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1197 15:53:16.724516 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1198 15:53:16.727690 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1199 15:53:16.734428 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1200 15:53:16.737557 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1201 15:53:16.744145 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1202 15:53:16.747941 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1203 15:53:16.754059 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1204 15:53:16.757359 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1205 15:53:16.764261 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1206 15:53:16.767185 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1207 15:53:16.770574 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1208 15:53:16.777444 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1209 15:53:16.780559 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1210 15:53:16.787120 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1211 15:53:16.793969 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1212 15:53:16.800681 avoid_fixed_resources: DOMAIN: 0000
1213 15:53:16.803955 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 15:53:16.810937 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 15:53:16.816837 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 15:53:16.826842 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1217 15:53:16.833557 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1218 15:53:16.840093 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1219 15:53:16.850464 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1220 15:53:16.856818 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 15:53:16.863606 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 15:53:16.873799 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 15:53:16.879934 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 15:53:16.886508 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 15:53:16.889992 Setting resources...
1226 15:53:16.896440 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 15:53:16.899981 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 15:53:16.903227 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 15:53:16.906439 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 15:53:16.909574 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 15:53:16.916197 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 15:53:16.923098 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 15:53:16.929708 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 15:53:16.936049 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1235 15:53:16.943224 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 15:53:16.946301 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 15:53:16.952655 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 15:53:16.956209 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1239 15:53:16.962575 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1240 15:53:16.965975 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1241 15:53:16.972809 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1242 15:53:16.975768 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1243 15:53:16.982313 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1244 15:53:16.986087 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1245 15:53:16.992738 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1246 15:53:16.996010 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1247 15:53:17.002594 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1248 15:53:17.006004 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1249 15:53:17.008982 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1250 15:53:17.015600 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1251 15:53:17.019274 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1252 15:53:17.025481 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1253 15:53:17.029271 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1254 15:53:17.035593 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1255 15:53:17.039114 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1256 15:53:17.045675 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1257 15:53:17.048872 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1258 15:53:17.055564 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1259 15:53:17.065302 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1260 15:53:17.072204 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1261 15:53:17.078695 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1262 15:53:17.085375 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1263 15:53:17.092294 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1264 15:53:17.095245 Root Device assign_resources, bus 0 link: 0
1265 15:53:17.101552 DOMAIN: 0000 assign_resources, bus 0 link: 0
1266 15:53:17.108748 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1267 15:53:17.118575 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1268 15:53:17.125241 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1269 15:53:17.135069 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1270 15:53:17.141734 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1271 15:53:17.151533 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1272 15:53:17.154677 PCI: 00:14.0 assign_resources, bus 0 link: 0
1273 15:53:17.158443 PCI: 00:14.0 assign_resources, bus 0 link: 0
1274 15:53:17.168138 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1275 15:53:17.174743 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1276 15:53:17.184643 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1277 15:53:17.191480 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1278 15:53:17.197901 PCI: 00:15.0 assign_resources, bus 1 link: 0
1279 15:53:17.201647 PCI: 00:15.0 assign_resources, bus 1 link: 0
1280 15:53:17.211165 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1281 15:53:17.214499 PCI: 00:15.1 assign_resources, bus 2 link: 0
1282 15:53:17.217832 PCI: 00:15.1 assign_resources, bus 2 link: 0
1283 15:53:17.228129 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1284 15:53:17.234860 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1285 15:53:17.244293 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1286 15:53:17.251054 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1287 15:53:17.257796 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1288 15:53:17.267879 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1289 15:53:17.274073 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1290 15:53:17.280767 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1291 15:53:17.287511 PCI: 00:19.0 assign_resources, bus 3 link: 0
1292 15:53:17.291008 PCI: 00:19.0 assign_resources, bus 3 link: 0
1293 15:53:17.300714 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1294 15:53:17.310854 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1295 15:53:17.316931 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1296 15:53:17.320669 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1297 15:53:17.330431 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1298 15:53:17.333714 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1299 15:53:17.343604 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1300 15:53:17.350452 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1301 15:53:17.357044 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1302 15:53:17.360141 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1303 15:53:17.370613 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1304 15:53:17.373337 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1305 15:53:17.377317 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1306 15:53:17.383733 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1307 15:53:17.387018 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1308 15:53:17.393528 LPC: Trying to open IO window from 800 size 1ff
1309 15:53:17.400316 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1310 15:53:17.410097 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1311 15:53:17.417041 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1312 15:53:17.426931 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1313 15:53:17.430007 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 15:53:17.436395 Root Device assign_resources, bus 0 link: 0
1315 15:53:17.436851 Done setting resources.
1316 15:53:17.443288 Show resources in subtree (Root Device)...After assigning values.
1317 15:53:17.450243 Root Device child on link 0 CPU_CLUSTER: 0
1318 15:53:17.453565 CPU_CLUSTER: 0 child on link 0 APIC: 00
1319 15:53:17.454022 APIC: 00
1320 15:53:17.456276 APIC: 02
1321 15:53:17.456730 APIC: 04
1322 15:53:17.457088 APIC: 06
1323 15:53:17.460007 APIC: 01
1324 15:53:17.460560 APIC: 05
1325 15:53:17.463351 APIC: 07
1326 15:53:17.463948 APIC: 03
1327 15:53:17.466470 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1328 15:53:17.476315 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1329 15:53:17.489336 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1330 15:53:17.489891 PCI: 00:00.0
1331 15:53:17.499552 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1332 15:53:17.509301 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1333 15:53:17.519629 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1334 15:53:17.526148 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1335 15:53:17.535786 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1336 15:53:17.546072 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1337 15:53:17.555932 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1338 15:53:17.565753 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1339 15:53:17.575522 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1340 15:53:17.582232 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1341 15:53:17.592155 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1342 15:53:17.601828 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1343 15:53:17.611788 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1344 15:53:17.621935 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1345 15:53:17.631476 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1346 15:53:17.638575 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1347 15:53:17.642020 PCI: 00:02.0
1348 15:53:17.651285 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1349 15:53:17.661896 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1350 15:53:17.671510 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1351 15:53:17.674867 PCI: 00:04.0
1352 15:53:17.675421 PCI: 00:08.0
1353 15:53:17.684506 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1354 15:53:17.688236 PCI: 00:12.0
1355 15:53:17.697827 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1356 15:53:17.701225 PCI: 00:14.0 child on link 0 USB0 port 0
1357 15:53:17.710934 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1358 15:53:17.717656 USB0 port 0 child on link 0 USB2 port 0
1359 15:53:17.718201 USB2 port 0
1360 15:53:17.721081 USB2 port 1
1361 15:53:17.721677 USB2 port 2
1362 15:53:17.724051 USB2 port 3
1363 15:53:17.724509 USB2 port 5
1364 15:53:17.727991 USB2 port 6
1365 15:53:17.728547 USB2 port 9
1366 15:53:17.731096 USB3 port 0
1367 15:53:17.731740 USB3 port 1
1368 15:53:17.734184 USB3 port 2
1369 15:53:17.734734 USB3 port 3
1370 15:53:17.737892 USB3 port 4
1371 15:53:17.741181 PCI: 00:14.2
1372 15:53:17.750936 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1373 15:53:17.760614 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1374 15:53:17.761082 PCI: 00:14.3
1375 15:53:17.770713 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1376 15:53:17.777317 PCI: 00:15.0 child on link 0 I2C: 01:15
1377 15:53:17.787478 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1378 15:53:17.788079 I2C: 01:15
1379 15:53:17.793667 PCI: 00:15.1 child on link 0 I2C: 02:5d
1380 15:53:17.804050 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1381 15:53:17.804616 I2C: 02:5d
1382 15:53:17.807666 GENERIC: 0.0
1383 15:53:17.808226 PCI: 00:16.0
1384 15:53:17.816609 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1385 15:53:17.820358 PCI: 00:17.0
1386 15:53:17.830127 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1387 15:53:17.840209 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1388 15:53:17.850333 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1389 15:53:17.856651 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1390 15:53:17.866577 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1391 15:53:17.876636 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1392 15:53:17.883392 PCI: 00:19.0 child on link 0 I2C: 03:1a
1393 15:53:17.892873 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1394 15:53:17.893431 I2C: 03:1a
1395 15:53:17.896383 I2C: 03:38
1396 15:53:17.896941 I2C: 03:39
1397 15:53:17.899626 I2C: 03:3a
1398 15:53:17.900225 I2C: 03:3b
1399 15:53:17.902856 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1400 15:53:17.912671 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1401 15:53:17.922376 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1402 15:53:17.932346 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1403 15:53:17.935845 PCI: 01:00.0
1404 15:53:17.945768 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1405 15:53:17.948971 PCI: 00:1e.0
1406 15:53:17.959057 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1407 15:53:17.968973 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1408 15:53:17.972344 PCI: 00:1e.2 child on link 0 SPI: 00
1409 15:53:17.982078 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1410 15:53:17.985383 SPI: 00
1411 15:53:17.988860 PCI: 00:1e.3 child on link 0 SPI: 01
1412 15:53:17.998836 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1413 15:53:18.002300 SPI: 01
1414 15:53:18.005458 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 15:53:18.011784 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 15:53:18.021989 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1417 15:53:18.024989 PNP: 0c09.0
1418 15:53:18.031847 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 15:53:18.035014 PCI: 00:1f.3
1420 15:53:18.044384 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1421 15:53:18.054268 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1422 15:53:18.057684 PCI: 00:1f.4
1423 15:53:18.064251 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1424 15:53:18.074690 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1425 15:53:18.077625 PCI: 00:1f.5
1426 15:53:18.088015 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1427 15:53:18.091240 Done allocating resources.
1428 15:53:18.097823 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1429 15:53:18.098378 Enabling resources...
1430 15:53:18.105080 PCI: 00:00.0 subsystem <- 8086/9b61
1431 15:53:18.105649 PCI: 00:00.0 cmd <- 06
1432 15:53:18.108408 PCI: 00:02.0 subsystem <- 8086/9b41
1433 15:53:18.111823 PCI: 00:02.0 cmd <- 03
1434 15:53:18.115039 PCI: 00:08.0 cmd <- 06
1435 15:53:18.118121 PCI: 00:12.0 subsystem <- 8086/02f9
1436 15:53:18.121777 PCI: 00:12.0 cmd <- 02
1437 15:53:18.124769 PCI: 00:14.0 subsystem <- 8086/02ed
1438 15:53:18.127914 PCI: 00:14.0 cmd <- 02
1439 15:53:18.131146 PCI: 00:14.2 cmd <- 02
1440 15:53:18.134861 PCI: 00:14.3 subsystem <- 8086/02f0
1441 15:53:18.135423 PCI: 00:14.3 cmd <- 02
1442 15:53:18.141785 PCI: 00:15.0 subsystem <- 8086/02e8
1443 15:53:18.142328 PCI: 00:15.0 cmd <- 02
1444 15:53:18.144819 PCI: 00:15.1 subsystem <- 8086/02e9
1445 15:53:18.148270 PCI: 00:15.1 cmd <- 02
1446 15:53:18.151938 PCI: 00:16.0 subsystem <- 8086/02e0
1447 15:53:18.154967 PCI: 00:16.0 cmd <- 02
1448 15:53:18.158023 PCI: 00:17.0 subsystem <- 8086/02d3
1449 15:53:18.161634 PCI: 00:17.0 cmd <- 03
1450 15:53:18.164633 PCI: 00:19.0 subsystem <- 8086/02c5
1451 15:53:18.168064 PCI: 00:19.0 cmd <- 02
1452 15:53:18.171543 PCI: 00:1d.0 bridge ctrl <- 0013
1453 15:53:18.174577 PCI: 00:1d.0 subsystem <- 8086/02b0
1454 15:53:18.177756 PCI: 00:1d.0 cmd <- 06
1455 15:53:18.181398 PCI: 00:1e.0 subsystem <- 8086/02a8
1456 15:53:18.184362 PCI: 00:1e.0 cmd <- 06
1457 15:53:18.189303 PCI: 00:1e.2 subsystem <- 8086/02aa
1458 15:53:18.191146 PCI: 00:1e.2 cmd <- 06
1459 15:53:18.194602 PCI: 00:1e.3 subsystem <- 8086/02ab
1460 15:53:18.195182 PCI: 00:1e.3 cmd <- 02
1461 15:53:18.201253 PCI: 00:1f.0 subsystem <- 8086/0284
1462 15:53:18.201807 PCI: 00:1f.0 cmd <- 407
1463 15:53:18.207871 PCI: 00:1f.3 subsystem <- 8086/02c8
1464 15:53:18.208430 PCI: 00:1f.3 cmd <- 02
1465 15:53:18.211389 PCI: 00:1f.4 subsystem <- 8086/02a3
1466 15:53:18.214391 PCI: 00:1f.4 cmd <- 03
1467 15:53:18.217673 PCI: 00:1f.5 subsystem <- 8086/02a4
1468 15:53:18.221106 PCI: 00:1f.5 cmd <- 406
1469 15:53:18.230246 PCI: 01:00.0 cmd <- 02
1470 15:53:18.235531 done.
1471 15:53:18.244171 ME: Version: 14.0.39.1367
1472 15:53:18.250873 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1473 15:53:18.254219 Initializing devices...
1474 15:53:18.254789 Root Device init ...
1475 15:53:18.260699 Chrome EC: Set SMI mask to 0x0000000000000000
1476 15:53:18.264025 Chrome EC: clear events_b mask to 0x0000000000000000
1477 15:53:18.270679 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1478 15:53:18.277180 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1479 15:53:18.283559 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1480 15:53:18.286978 Chrome EC: Set WAKE mask to 0x0000000000000000
1481 15:53:18.290358 Root Device init finished in 35186 usecs
1482 15:53:18.294037 CPU_CLUSTER: 0 init ...
1483 15:53:18.300161 CPU_CLUSTER: 0 init finished in 2450 usecs
1484 15:53:18.304549 PCI: 00:00.0 init ...
1485 15:53:18.308233 CPU TDP: 15 Watts
1486 15:53:18.311289 CPU PL2 = 64 Watts
1487 15:53:18.314592 PCI: 00:00.0 init finished in 7085 usecs
1488 15:53:18.317934 PCI: 00:02.0 init ...
1489 15:53:18.321422 PCI: 00:02.0 init finished in 2247 usecs
1490 15:53:18.324184 PCI: 00:08.0 init ...
1491 15:53:18.327955 PCI: 00:08.0 init finished in 2252 usecs
1492 15:53:18.330779 PCI: 00:12.0 init ...
1493 15:53:18.334015 PCI: 00:12.0 init finished in 2253 usecs
1494 15:53:18.337262 PCI: 00:14.0 init ...
1495 15:53:18.341008 PCI: 00:14.0 init finished in 2254 usecs
1496 15:53:18.344378 PCI: 00:14.2 init ...
1497 15:53:18.347935 PCI: 00:14.2 init finished in 2253 usecs
1498 15:53:18.351226 PCI: 00:14.3 init ...
1499 15:53:18.354599 PCI: 00:14.3 init finished in 2270 usecs
1500 15:53:18.357280 PCI: 00:15.0 init ...
1501 15:53:18.360786 DW I2C bus 0 at 0xd121f000 (400 KHz)
1502 15:53:18.364439 PCI: 00:15.0 init finished in 5981 usecs
1503 15:53:18.367781 PCI: 00:15.1 init ...
1504 15:53:18.371240 DW I2C bus 1 at 0xd1220000 (400 KHz)
1505 15:53:18.377563 PCI: 00:15.1 init finished in 5974 usecs
1506 15:53:18.378123 PCI: 00:16.0 init ...
1507 15:53:18.384348 PCI: 00:16.0 init finished in 2253 usecs
1508 15:53:18.388031 PCI: 00:19.0 init ...
1509 15:53:18.390692 DW I2C bus 4 at 0xd1222000 (400 KHz)
1510 15:53:18.394143 PCI: 00:19.0 init finished in 5980 usecs
1511 15:53:18.397080 PCI: 00:1d.0 init ...
1512 15:53:18.400744 Initializing PCH PCIe bridge.
1513 15:53:18.404013 PCI: 00:1d.0 init finished in 5287 usecs
1514 15:53:18.407131 PCI: 00:1f.0 init ...
1515 15:53:18.410723 IOAPIC: Initializing IOAPIC at 0xfec00000
1516 15:53:18.416890 IOAPIC: Bootstrap Processor Local APIC = 0x00
1517 15:53:18.417350 IOAPIC: ID = 0x02
1518 15:53:18.420218 IOAPIC: Dumping registers
1519 15:53:18.423459 reg 0x0000: 0x02000000
1520 15:53:18.426737 reg 0x0001: 0x00770020
1521 15:53:18.427191 reg 0x0002: 0x00000000
1522 15:53:18.433507 PCI: 00:1f.0 init finished in 23554 usecs
1523 15:53:18.436516 PCI: 00:1f.4 init ...
1524 15:53:18.440507 PCI: 00:1f.4 init finished in 2263 usecs
1525 15:53:18.450887 PCI: 01:00.0 init ...
1526 15:53:18.454134 PCI: 01:00.0 init finished in 2253 usecs
1527 15:53:18.458426 PNP: 0c09.0 init ...
1528 15:53:18.462209 Google Chrome EC uptime: 11.087 seconds
1529 15:53:18.468376 Google Chrome AP resets since EC boot: 0
1530 15:53:18.471542 Google Chrome most recent AP reset causes:
1531 15:53:18.478200 Google Chrome EC reset flags at last EC boot: reset-pin
1532 15:53:18.481304 PNP: 0c09.0 init finished in 20621 usecs
1533 15:53:18.484616 Devices initialized
1534 15:53:18.488509 Show all devs... After init.
1535 15:53:18.489064 Root Device: enabled 1
1536 15:53:18.491565 CPU_CLUSTER: 0: enabled 1
1537 15:53:18.495193 DOMAIN: 0000: enabled 1
1538 15:53:18.495795 APIC: 00: enabled 1
1539 15:53:18.498363 PCI: 00:00.0: enabled 1
1540 15:53:18.501198 PCI: 00:02.0: enabled 1
1541 15:53:18.504957 PCI: 00:04.0: enabled 0
1542 15:53:18.505517 PCI: 00:05.0: enabled 0
1543 15:53:18.508139 PCI: 00:12.0: enabled 1
1544 15:53:18.511282 PCI: 00:12.5: enabled 0
1545 15:53:18.514725 PCI: 00:12.6: enabled 0
1546 15:53:18.515296 PCI: 00:14.0: enabled 1
1547 15:53:18.517651 PCI: 00:14.1: enabled 0
1548 15:53:18.521064 PCI: 00:14.3: enabled 1
1549 15:53:18.521715 PCI: 00:14.5: enabled 0
1550 15:53:18.524653 PCI: 00:15.0: enabled 1
1551 15:53:18.527561 PCI: 00:15.1: enabled 1
1552 15:53:18.531053 PCI: 00:15.2: enabled 0
1553 15:53:18.531675 PCI: 00:15.3: enabled 0
1554 15:53:18.534658 PCI: 00:16.0: enabled 1
1555 15:53:18.537759 PCI: 00:16.1: enabled 0
1556 15:53:18.540768 PCI: 00:16.2: enabled 0
1557 15:53:18.541223 PCI: 00:16.3: enabled 0
1558 15:53:18.544308 PCI: 00:16.4: enabled 0
1559 15:53:18.547891 PCI: 00:16.5: enabled 0
1560 15:53:18.551236 PCI: 00:17.0: enabled 1
1561 15:53:18.551835 PCI: 00:19.0: enabled 1
1562 15:53:18.554021 PCI: 00:19.1: enabled 0
1563 15:53:18.557358 PCI: 00:19.2: enabled 0
1564 15:53:18.560635 PCI: 00:1a.0: enabled 0
1565 15:53:18.561092 PCI: 00:1c.0: enabled 0
1566 15:53:18.563961 PCI: 00:1c.1: enabled 0
1567 15:53:18.567588 PCI: 00:1c.2: enabled 0
1568 15:53:18.568179 PCI: 00:1c.3: enabled 0
1569 15:53:18.570840 PCI: 00:1c.4: enabled 0
1570 15:53:18.574448 PCI: 00:1c.5: enabled 0
1571 15:53:18.577359 PCI: 00:1c.6: enabled 0
1572 15:53:18.577818 PCI: 00:1c.7: enabled 0
1573 15:53:18.581132 PCI: 00:1d.0: enabled 1
1574 15:53:18.583925 PCI: 00:1d.1: enabled 0
1575 15:53:18.587183 PCI: 00:1d.2: enabled 0
1576 15:53:18.587843 PCI: 00:1d.3: enabled 0
1577 15:53:18.590612 PCI: 00:1d.4: enabled 0
1578 15:53:18.593942 PCI: 00:1d.5: enabled 0
1579 15:53:18.597408 PCI: 00:1e.0: enabled 1
1580 15:53:18.598020 PCI: 00:1e.1: enabled 0
1581 15:53:18.600399 PCI: 00:1e.2: enabled 1
1582 15:53:18.603746 PCI: 00:1e.3: enabled 1
1583 15:53:18.604238 PCI: 00:1f.0: enabled 1
1584 15:53:18.607103 PCI: 00:1f.1: enabled 0
1585 15:53:18.610577 PCI: 00:1f.2: enabled 0
1586 15:53:18.613883 PCI: 00:1f.3: enabled 1
1587 15:53:18.614341 PCI: 00:1f.4: enabled 1
1588 15:53:18.617195 PCI: 00:1f.5: enabled 1
1589 15:53:18.620072 PCI: 00:1f.6: enabled 0
1590 15:53:18.623458 USB0 port 0: enabled 1
1591 15:53:18.624000 I2C: 01:15: enabled 1
1592 15:53:18.627257 I2C: 02:5d: enabled 1
1593 15:53:18.630016 GENERIC: 0.0: enabled 1
1594 15:53:18.630434 I2C: 03:1a: enabled 1
1595 15:53:18.633781 I2C: 03:38: enabled 1
1596 15:53:18.637054 I2C: 03:39: enabled 1
1597 15:53:18.637468 I2C: 03:3a: enabled 1
1598 15:53:18.640248 I2C: 03:3b: enabled 1
1599 15:53:18.643479 PCI: 00:00.0: enabled 1
1600 15:53:18.643959 SPI: 00: enabled 1
1601 15:53:18.647340 SPI: 01: enabled 1
1602 15:53:18.650083 PNP: 0c09.0: enabled 1
1603 15:53:18.650494 USB2 port 0: enabled 1
1604 15:53:18.653934 USB2 port 1: enabled 1
1605 15:53:18.656614 USB2 port 2: enabled 0
1606 15:53:18.657024 USB2 port 3: enabled 0
1607 15:53:18.660154 USB2 port 5: enabled 0
1608 15:53:18.663248 USB2 port 6: enabled 1
1609 15:53:18.667055 USB2 port 9: enabled 1
1610 15:53:18.667561 USB3 port 0: enabled 1
1611 15:53:18.670489 USB3 port 1: enabled 1
1612 15:53:18.673533 USB3 port 2: enabled 1
1613 15:53:18.674040 USB3 port 3: enabled 1
1614 15:53:18.676580 USB3 port 4: enabled 0
1615 15:53:18.680046 APIC: 02: enabled 1
1616 15:53:18.680597 APIC: 04: enabled 1
1617 15:53:18.683792 APIC: 06: enabled 1
1618 15:53:18.687212 APIC: 01: enabled 1
1619 15:53:18.687811 APIC: 05: enabled 1
1620 15:53:18.690234 APIC: 07: enabled 1
1621 15:53:18.690784 APIC: 03: enabled 1
1622 15:53:18.693483 PCI: 00:08.0: enabled 1
1623 15:53:18.696554 PCI: 00:14.2: enabled 1
1624 15:53:18.699999 PCI: 01:00.0: enabled 1
1625 15:53:18.703894 Disabling ACPI via APMC:
1626 15:53:18.704440 done.
1627 15:53:18.710980 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1628 15:53:18.713679 ELOG: NV offset 0xaf0000 size 0x4000
1629 15:53:18.720069 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1630 15:53:18.726366 ELOG: Event(17) added with size 13 at 2023-08-07 15:53:18 UTC
1631 15:53:18.733277 ELOG: Event(92) added with size 9 at 2023-08-07 15:53:18 UTC
1632 15:53:18.740158 ELOG: Event(93) added with size 9 at 2023-08-07 15:53:18 UTC
1633 15:53:18.746620 ELOG: Event(9A) added with size 9 at 2023-08-07 15:53:18 UTC
1634 15:53:18.753275 ELOG: Event(9E) added with size 10 at 2023-08-07 15:53:18 UTC
1635 15:53:18.759724 ELOG: Event(9F) added with size 14 at 2023-08-07 15:53:18 UTC
1636 15:53:18.763431 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1637 15:53:18.770324 ELOG: Event(A1) added with size 10 at 2023-08-07 15:53:18 UTC
1638 15:53:18.780354 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1639 15:53:18.786921 ELOG: Event(A0) added with size 9 at 2023-08-07 15:53:18 UTC
1640 15:53:18.790332 elog_add_boot_reason: Logged dev mode boot
1641 15:53:18.794128 Finalize devices...
1642 15:53:18.794641 PCI: 00:17.0 final
1643 15:53:18.797113 Devices finalized
1644 15:53:18.800319 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1645 15:53:18.806997 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1646 15:53:18.810608 ME: HFSTS1 : 0x90000245
1647 15:53:18.813544 ME: HFSTS2 : 0x3B850126
1648 15:53:18.819933 ME: HFSTS3 : 0x00000020
1649 15:53:18.823480 ME: HFSTS4 : 0x00004800
1650 15:53:18.826956 ME: HFSTS5 : 0x00000000
1651 15:53:18.829821 ME: HFSTS6 : 0x40400006
1652 15:53:18.833539 ME: Manufacturing Mode : NO
1653 15:53:18.836582 ME: FW Partition Table : OK
1654 15:53:18.840307 ME: Bringup Loader Failure : NO
1655 15:53:18.843664 ME: Firmware Init Complete : YES
1656 15:53:18.846614 ME: Boot Options Present : NO
1657 15:53:18.849635 ME: Update In Progress : NO
1658 15:53:18.852869 ME: D0i3 Support : YES
1659 15:53:18.856383 ME: Low Power State Enabled : NO
1660 15:53:18.859620 ME: CPU Replaced : NO
1661 15:53:18.862668 ME: CPU Replacement Valid : YES
1662 15:53:18.866351 ME: Current Working State : 5
1663 15:53:18.869548 ME: Current Operation State : 1
1664 15:53:18.872630 ME: Current Operation Mode : 0
1665 15:53:18.876104 ME: Error Code : 0
1666 15:53:18.879589 ME: CPU Debug Disabled : YES
1667 15:53:18.882702 ME: TXT Support : NO
1668 15:53:18.889329 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1669 15:53:18.896199 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1670 15:53:18.896660 CBFS @ c08000 size 3f8000
1671 15:53:18.902544 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1672 15:53:18.906228 CBFS: Locating 'fallback/dsdt.aml'
1673 15:53:18.909025 CBFS: Found @ offset 10bb80 size 3fa5
1674 15:53:18.915915 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1675 15:53:18.919346 CBFS @ c08000 size 3f8000
1676 15:53:18.922733 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1677 15:53:18.925910 CBFS: Locating 'fallback/slic'
1678 15:53:18.934087 CBFS: 'fallback/slic' not found.
1679 15:53:18.937256 ACPI: Writing ACPI tables at 99b3e000.
1680 15:53:18.937789 ACPI: * FACS
1681 15:53:18.941046 ACPI: * DSDT
1682 15:53:18.944127 Ramoops buffer: 0x100000@0x99a3d000.
1683 15:53:18.947162 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1684 15:53:18.953994 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1685 15:53:18.957085 Google Chrome EC: version:
1686 15:53:18.960573 ro: helios_v2.0.2659-56403530b
1687 15:53:18.964222 rw: helios_v2.0.2849-c41de27e7d
1688 15:53:18.964899 running image: 1
1689 15:53:18.968395 ACPI: * FADT
1690 15:53:18.968846 SCI is IRQ9
1691 15:53:18.975451 ACPI: added table 1/32, length now 40
1692 15:53:18.976046 ACPI: * SSDT
1693 15:53:18.978878 Found 1 CPU(s) with 8 core(s) each.
1694 15:53:18.982014 Error: Could not locate 'wifi_sar' in VPD.
1695 15:53:18.988349 Checking CBFS for default SAR values
1696 15:53:18.991464 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1697 15:53:18.994889 CBFS @ c08000 size 3f8000
1698 15:53:19.001401 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1699 15:53:19.004530 CBFS: Locating 'wifi_sar_defaults.hex'
1700 15:53:19.008213 CBFS: Found @ offset 5fac0 size 77
1701 15:53:19.011362 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1702 15:53:19.017733 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1703 15:53:19.021163 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1704 15:53:19.028191 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1705 15:53:19.031006 failed to find key in VPD: dsm_calib_r0_0
1706 15:53:19.041124 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1707 15:53:19.044281 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1708 15:53:19.047485 failed to find key in VPD: dsm_calib_r0_1
1709 15:53:19.057722 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1710 15:53:19.064513 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1711 15:53:19.067516 failed to find key in VPD: dsm_calib_r0_2
1712 15:53:19.077225 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1713 15:53:19.081163 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1714 15:53:19.087750 failed to find key in VPD: dsm_calib_r0_3
1715 15:53:19.094063 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1716 15:53:19.100643 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1717 15:53:19.104336 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1718 15:53:19.110691 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1719 15:53:19.114060 EC returned error result code 1
1720 15:53:19.117317 EC returned error result code 1
1721 15:53:19.120930 EC returned error result code 1
1722 15:53:19.124177 PS2K: Bad resp from EC. Vivaldi disabled!
1723 15:53:19.130602 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1724 15:53:19.137317 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1725 15:53:19.140649 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1726 15:53:19.147446 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1727 15:53:19.150572 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1728 15:53:19.157163 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1729 15:53:19.163695 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1730 15:53:19.170416 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1731 15:53:19.173659 ACPI: added table 2/32, length now 44
1732 15:53:19.174265 ACPI: * MCFG
1733 15:53:19.180455 ACPI: added table 3/32, length now 48
1734 15:53:19.180933 ACPI: * TPM2
1735 15:53:19.183588 TPM2 log created at 99a2d000
1736 15:53:19.186896 ACPI: added table 4/32, length now 52
1737 15:53:19.190298 ACPI: * MADT
1738 15:53:19.190710 SCI is IRQ9
1739 15:53:19.193942 ACPI: added table 5/32, length now 56
1740 15:53:19.197392 current = 99b43ac0
1741 15:53:19.197815 ACPI: * DMAR
1742 15:53:19.200364 ACPI: added table 6/32, length now 60
1743 15:53:19.203815 ACPI: * IGD OpRegion
1744 15:53:19.207517 GMA: Found VBT in CBFS
1745 15:53:19.210685 GMA: Found valid VBT in CBFS
1746 15:53:19.213577 ACPI: added table 7/32, length now 64
1747 15:53:19.214125 ACPI: * HPET
1748 15:53:19.216830 ACPI: added table 8/32, length now 68
1749 15:53:19.220258 ACPI: done.
1750 15:53:19.223438 ACPI tables: 31744 bytes.
1751 15:53:19.226851 smbios_write_tables: 99a2c000
1752 15:53:19.230072 EC returned error result code 3
1753 15:53:19.233578 Couldn't obtain OEM name from CBI
1754 15:53:19.236698 Create SMBIOS type 17
1755 15:53:19.240476 PCI: 00:00.0 (Intel Cannonlake)
1756 15:53:19.240886 PCI: 00:14.3 (Intel WiFi)
1757 15:53:19.243342 SMBIOS tables: 939 bytes.
1758 15:53:19.246687 Writing table forward entry at 0x00000500
1759 15:53:19.253337 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1760 15:53:19.256869 Writing coreboot table at 0x99b62000
1761 15:53:19.263151 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1762 15:53:19.266576 1. 0000000000001000-000000000009ffff: RAM
1763 15:53:19.273447 2. 00000000000a0000-00000000000fffff: RESERVED
1764 15:53:19.276541 3. 0000000000100000-0000000099a2bfff: RAM
1765 15:53:19.283284 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1766 15:53:19.286490 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1767 15:53:19.293096 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1768 15:53:19.299761 7. 000000009a000000-000000009f7fffff: RESERVED
1769 15:53:19.303324 8. 00000000e0000000-00000000efffffff: RESERVED
1770 15:53:19.306436 9. 00000000fc000000-00000000fc000fff: RESERVED
1771 15:53:19.312782 10. 00000000fe000000-00000000fe00ffff: RESERVED
1772 15:53:19.316204 11. 00000000fed10000-00000000fed17fff: RESERVED
1773 15:53:19.322987 12. 00000000fed80000-00000000fed83fff: RESERVED
1774 15:53:19.326633 13. 00000000fed90000-00000000fed91fff: RESERVED
1775 15:53:19.332886 14. 00000000feda0000-00000000feda1fff: RESERVED
1776 15:53:19.336060 15. 0000000100000000-000000045e7fffff: RAM
1777 15:53:19.339519 Graphics framebuffer located at 0xc0000000
1778 15:53:19.342644 Passing 5 GPIOs to payload:
1779 15:53:19.349387 NAME | PORT | POLARITY | VALUE
1780 15:53:19.352849 write protect | undefined | high | low
1781 15:53:19.359462 lid | undefined | high | high
1782 15:53:19.362766 power | undefined | high | low
1783 15:53:19.369415 oprom | undefined | high | low
1784 15:53:19.376000 EC in RW | 0x000000cb | high | low
1785 15:53:19.376694 Board ID: 4
1786 15:53:19.382365 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1787 15:53:19.382931 CBFS @ c08000 size 3f8000
1788 15:53:19.389505 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1789 15:53:19.395444 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1790 15:53:19.398843 coreboot table: 1492 bytes.
1791 15:53:19.402446 IMD ROOT 0. 99fff000 00001000
1792 15:53:19.405790 IMD SMALL 1. 99ffe000 00001000
1793 15:53:19.408981 FSP MEMORY 2. 99c4e000 003b0000
1794 15:53:19.412308 CONSOLE 3. 99c2e000 00020000
1795 15:53:19.415556 FMAP 4. 99c2d000 0000054e
1796 15:53:19.418959 TIME STAMP 5. 99c2c000 00000910
1797 15:53:19.422241 VBOOT WORK 6. 99c18000 00014000
1798 15:53:19.425432 MRC DATA 7. 99c16000 00001958
1799 15:53:19.428962 ROMSTG STCK 8. 99c15000 00001000
1800 15:53:19.432221 AFTER CAR 9. 99c0b000 0000a000
1801 15:53:19.435403 RAMSTAGE 10. 99baf000 0005c000
1802 15:53:19.438772 REFCODE 11. 99b7a000 00035000
1803 15:53:19.442387 SMM BACKUP 12. 99b6a000 00010000
1804 15:53:19.445463 COREBOOT 13. 99b62000 00008000
1805 15:53:19.449079 ACPI 14. 99b3e000 00024000
1806 15:53:19.452249 ACPI GNVS 15. 99b3d000 00001000
1807 15:53:19.455624 RAMOOPS 16. 99a3d000 00100000
1808 15:53:19.458856 TPM2 TCGLOG17. 99a2d000 00010000
1809 15:53:19.462066 SMBIOS 18. 99a2c000 00000800
1810 15:53:19.462481 IMD small region:
1811 15:53:19.465407 IMD ROOT 0. 99ffec00 00000400
1812 15:53:19.472248 FSP RUNTIME 1. 99ffebe0 00000004
1813 15:53:19.475169 EC HOSTEVENT 2. 99ffebc0 00000008
1814 15:53:19.478669 POWER STATE 3. 99ffeb80 00000040
1815 15:53:19.482201 ROMSTAGE 4. 99ffeb60 00000004
1816 15:53:19.485262 MEM INFO 5. 99ffe9a0 000001b9
1817 15:53:19.488648 VPD 6. 99ffe920 0000006c
1818 15:53:19.492036 MTRR: Physical address space:
1819 15:53:19.498824 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1820 15:53:19.505354 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1821 15:53:19.508633 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1822 15:53:19.515193 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1823 15:53:19.521468 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1824 15:53:19.528319 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1825 15:53:19.534829 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1826 15:53:19.538364 MTRR: Fixed MSR 0x250 0x0606060606060606
1827 15:53:19.544927 MTRR: Fixed MSR 0x258 0x0606060606060606
1828 15:53:19.547916 MTRR: Fixed MSR 0x259 0x0000000000000000
1829 15:53:19.551943 MTRR: Fixed MSR 0x268 0x0606060606060606
1830 15:53:19.554425 MTRR: Fixed MSR 0x269 0x0606060606060606
1831 15:53:19.557730 MTRR: Fixed MSR 0x26a 0x0606060606060606
1832 15:53:19.564791 MTRR: Fixed MSR 0x26b 0x0606060606060606
1833 15:53:19.567961 MTRR: Fixed MSR 0x26c 0x0606060606060606
1834 15:53:19.570992 MTRR: Fixed MSR 0x26d 0x0606060606060606
1835 15:53:19.574517 MTRR: Fixed MSR 0x26e 0x0606060606060606
1836 15:53:19.581104 MTRR: Fixed MSR 0x26f 0x0606060606060606
1837 15:53:19.584717 call enable_fixed_mtrr()
1838 15:53:19.587887 CPU physical address size: 39 bits
1839 15:53:19.591464 MTRR: default type WB/UC MTRR counts: 6/8.
1840 15:53:19.595023 MTRR: WB selected as default type.
1841 15:53:19.600881 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1842 15:53:19.607910 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1843 15:53:19.614632 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1844 15:53:19.621114 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1845 15:53:19.624453 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1846 15:53:19.630836 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1847 15:53:19.638247 MTRR: Fixed MSR 0x250 0x0606060606060606
1848 15:53:19.641297 MTRR: Fixed MSR 0x258 0x0606060606060606
1849 15:53:19.644343 MTRR: Fixed MSR 0x259 0x0000000000000000
1850 15:53:19.647759 MTRR: Fixed MSR 0x268 0x0606060606060606
1851 15:53:19.654207 MTRR: Fixed MSR 0x269 0x0606060606060606
1852 15:53:19.658126 MTRR: Fixed MSR 0x26a 0x0606060606060606
1853 15:53:19.661312 MTRR: Fixed MSR 0x26b 0x0606060606060606
1854 15:53:19.664180 MTRR: Fixed MSR 0x26c 0x0606060606060606
1855 15:53:19.671417 MTRR: Fixed MSR 0x26d 0x0606060606060606
1856 15:53:19.674305 MTRR: Fixed MSR 0x26e 0x0606060606060606
1857 15:53:19.677892 MTRR: Fixed MSR 0x26f 0x0606060606060606
1858 15:53:19.678303
1859 15:53:19.681019 MTRR check
1860 15:53:19.681428 Fixed MTRRs : Enabled
1861 15:53:19.684337 Variable MTRRs: Enabled
1862 15:53:19.684747
1863 15:53:19.687729 call enable_fixed_mtrr()
1864 15:53:19.691380 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1865 15:53:19.697608 CPU physical address size: 39 bits
1866 15:53:19.701009 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1867 15:53:19.703994 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 15:53:19.710820 MTRR: Fixed MSR 0x258 0x0606060606060606
1869 15:53:19.714110 MTRR: Fixed MSR 0x259 0x0000000000000000
1870 15:53:19.717213 MTRR: Fixed MSR 0x268 0x0606060606060606
1871 15:53:19.720503 MTRR: Fixed MSR 0x269 0x0606060606060606
1872 15:53:19.727330 MTRR: Fixed MSR 0x26a 0x0606060606060606
1873 15:53:19.730501 MTRR: Fixed MSR 0x26b 0x0606060606060606
1874 15:53:19.733962 MTRR: Fixed MSR 0x26c 0x0606060606060606
1875 15:53:19.737251 MTRR: Fixed MSR 0x26d 0x0606060606060606
1876 15:53:19.743853 MTRR: Fixed MSR 0x26e 0x0606060606060606
1877 15:53:19.746813 MTRR: Fixed MSR 0x26f 0x0606060606060606
1878 15:53:19.750665 MTRR: Fixed MSR 0x250 0x0606060606060606
1879 15:53:19.753842 call enable_fixed_mtrr()
1880 15:53:19.757464 MTRR: Fixed MSR 0x258 0x0606060606060606
1881 15:53:19.760373 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 15:53:19.767027 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 15:53:19.770343 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 15:53:19.773298 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 15:53:19.776904 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 15:53:19.783503 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 15:53:19.786755 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 15:53:19.790150 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 15:53:19.792945 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 15:53:19.796982 CPU physical address size: 39 bits
1891 15:53:19.803569 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 15:53:19.806713 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 15:53:19.809948 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 15:53:19.813276 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 15:53:19.819590 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 15:53:19.822915 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 15:53:19.826266 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 15:53:19.829144 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 15:53:19.832655 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 15:53:19.839462 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 15:53:19.842614 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 15:53:19.845657 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 15:53:19.848974 call enable_fixed_mtrr()
1904 15:53:19.852485 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 15:53:19.859097 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 15:53:19.862170 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 15:53:19.865535 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 15:53:19.869130 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 15:53:19.872116 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 15:53:19.879312 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 15:53:19.882280 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 15:53:19.885353 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 15:53:19.888760 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 15:53:19.895451 CPU physical address size: 39 bits
1915 15:53:19.895552 call enable_fixed_mtrr()
1916 15:53:19.898897 CBFS @ c08000 size 3f8000
1917 15:53:19.905232 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1918 15:53:19.908452 CBFS: Locating 'fallback/payload'
1919 15:53:19.911795 call enable_fixed_mtrr()
1920 15:53:19.915123 CBFS: Found @ offset 1c96c0 size 3f798
1921 15:53:19.918207 CPU physical address size: 39 bits
1922 15:53:19.921567 CPU physical address size: 39 bits
1923 15:53:19.925072 Checking segment from ROM address 0xffdd16f8
1924 15:53:19.931584 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 15:53:19.934885 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 15:53:19.938447 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 15:53:19.941815 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 15:53:19.948150 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 15:53:19.951563 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 15:53:19.954674 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 15:53:19.958404 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 15:53:19.964836 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 15:53:19.968284 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 15:53:19.971186 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 15:53:19.974447 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 15:53:19.981642 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 15:53:19.981745 call enable_fixed_mtrr()
1938 15:53:19.988358 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 15:53:19.991538 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 15:53:19.994859 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 15:53:19.998175 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 15:53:20.004745 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 15:53:20.007873 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 15:53:20.011358 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 15:53:20.014774 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 15:53:20.017910 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 15:53:20.024458 CPU physical address size: 39 bits
1948 15:53:20.027576 call enable_fixed_mtrr()
1949 15:53:20.031334 Checking segment from ROM address 0xffdd1714
1950 15:53:20.034325 CPU physical address size: 39 bits
1951 15:53:20.037745 Loading segment from ROM address 0xffdd16f8
1952 15:53:20.040834 code (compression=0)
1953 15:53:20.050832 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1954 15:53:20.057601 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1955 15:53:20.060612 it's not compressed!
1956 15:53:20.151962 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1957 15:53:20.159136 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1958 15:53:20.162077 Loading segment from ROM address 0xffdd1714
1959 15:53:20.165433 Entry Point 0x30000000
1960 15:53:20.168336 Loaded segments
1961 15:53:20.174276 Finalizing chipset.
1962 15:53:20.177814 Finalizing SMM.
1963 15:53:20.180730 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1964 15:53:20.184249 mp_park_aps done after 0 msecs.
1965 15:53:20.190771 Jumping to boot code at 30000000(99b62000)
1966 15:53:20.197187 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1967 15:53:20.197288
1968 15:53:20.197382
1969 15:53:20.197470
1970 15:53:20.200631 Starting depthcharge on Helios...
1971 15:53:20.200705
1972 15:53:20.201047 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1973 15:53:20.201150 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1974 15:53:20.201235 Setting prompt string to ['hatch:']
1975 15:53:20.201312 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1976 15:53:20.210413 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1977 15:53:20.210499
1978 15:53:20.217327 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1979 15:53:20.217407
1980 15:53:20.224000 board_setup: Info: eMMC controller not present; skipping
1981 15:53:20.224077
1982 15:53:20.226913 New NVMe Controller 0x30053ac0 @ 00:1d:00
1983 15:53:20.227013
1984 15:53:20.234063 board_setup: Info: SDHCI controller not present; skipping
1985 15:53:20.234169
1986 15:53:20.240270 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1987 15:53:20.240379
1988 15:53:20.240445 Wipe memory regions:
1989 15:53:20.240515
1990 15:53:20.243792 [0x00000000001000, 0x000000000a0000)
1991 15:53:20.243865
1992 15:53:20.247120 [0x00000000100000, 0x00000030000000)
1993 15:53:20.313250
1994 15:53:20.316178 [0x00000030657430, 0x00000099a2c000)
1995 15:53:20.454090
1996 15:53:20.457010 [0x00000100000000, 0x0000045e800000)
1997 15:53:21.840121
1998 15:53:21.840653 R8152: Initializing
1999 15:53:21.841053
2000 15:53:21.843018 Version 9 (ocp_data = 6010)
2001 15:53:21.847422
2002 15:53:21.848013 R8152: Done initializing
2003 15:53:21.848443
2004 15:53:21.850446 Adding net device
2005 15:53:22.460287
2006 15:53:22.460814 R8152: Initializing
2007 15:53:22.461178
2008 15:53:22.463322 Version 6 (ocp_data = 5c30)
2009 15:53:22.463813
2010 15:53:22.466578 R8152: Done initializing
2011 15:53:22.467030
2012 15:53:22.470038 net_add_device: Attemp to include the same device
2013 15:53:22.476233
2014 15:53:22.479315 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2015 15:53:22.480058
2016 15:53:22.480679
2017 15:53:22.481282
2018 15:53:22.482323 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2020 15:53:22.583855 hatch: tftpboot 192.168.201.1 11224314/tftp-deploy-wg7do0i5/kernel/bzImage 11224314/tftp-deploy-wg7do0i5/kernel/cmdline 11224314/tftp-deploy-wg7do0i5/ramdisk/ramdisk.cpio.gz
2021 15:53:22.584538 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2022 15:53:22.584981 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2023 15:53:22.589564 tftpboot 192.168.201.1 11224314/tftp-deploy-wg7do0i5/kernel/bzIploy-wg7do0i5/kernel/cmdline 11224314/tftp-deploy-wg7do0i5/ramdisk/ramdisk.cpio.gz
2024 15:53:22.590075
2025 15:53:22.590531 Waiting for link
2026 15:53:22.789889
2027 15:53:22.790031 done.
2028 15:53:22.790099
2029 15:53:22.790159 MAC: 00:24:32:50:1a:5f
2030 15:53:22.790220
2031 15:53:22.793167 Sending DHCP discover... done.
2032 15:53:22.793252
2033 15:53:22.796739 Waiting for reply... done.
2034 15:53:22.796825
2035 15:53:22.800848 Sending DHCP request... done.
2036 15:53:22.800935
2037 15:53:22.806697 Waiting for reply... done.
2038 15:53:22.806797
2039 15:53:22.806863 My ip is 192.168.201.21
2040 15:53:22.806924
2041 15:53:22.810628 The DHCP server ip is 192.168.201.1
2042 15:53:22.810712
2043 15:53:22.816438 TFTP server IP predefined by user: 192.168.201.1
2044 15:53:22.816527
2045 15:53:22.822994 Bootfile predefined by user: 11224314/tftp-deploy-wg7do0i5/kernel/bzImage
2046 15:53:22.823084
2047 15:53:22.826452 Sending tftp read request... done.
2048 15:53:22.826539
2049 15:53:22.829705 Waiting for the transfer...
2050 15:53:22.829792
2051 15:53:23.385330 00000000 ################################################################
2052 15:53:23.385501
2053 15:53:23.929755 00080000 ################################################################
2054 15:53:23.929920
2055 15:53:24.487030 00100000 ################################################################
2056 15:53:24.487172
2057 15:53:25.040331 00180000 ################################################################
2058 15:53:25.040474
2059 15:53:25.572685 00200000 ################################################################
2060 15:53:25.572830
2061 15:53:26.125883 00280000 ################################################################
2062 15:53:26.126042
2063 15:53:26.671855 00300000 ################################################################
2064 15:53:26.672018
2065 15:53:27.203716 00380000 ################################################################
2066 15:53:27.203864
2067 15:53:27.730289 00400000 ################################################################
2068 15:53:27.730483
2069 15:53:28.260840 00480000 ################################################################
2070 15:53:28.260996
2071 15:53:28.779841 00500000 ################################################################
2072 15:53:28.779996
2073 15:53:29.314302 00580000 ################################################################
2074 15:53:29.314449
2075 15:53:29.870173 00600000 ################################################################
2076 15:53:29.870322
2077 15:53:30.417284 00680000 ################################################################
2078 15:53:30.417431
2079 15:53:30.990005 00700000 ################################################################
2080 15:53:30.990229
2081 15:53:31.007758 00780000 ## done.
2082 15:53:31.007844
2083 15:53:31.011015 The bootfile was 7880592 bytes long.
2084 15:53:31.011114
2085 15:53:31.014702 Sending tftp read request... done.
2086 15:53:31.014800
2087 15:53:31.017664 Waiting for the transfer...
2088 15:53:31.017762
2089 15:53:31.630553 00000000 ################################################################
2090 15:53:31.630687
2091 15:53:32.227025 00080000 ################################################################
2092 15:53:32.227192
2093 15:53:32.830552 00100000 ################################################################
2094 15:53:32.830697
2095 15:53:33.434553 00180000 ################################################################
2096 15:53:33.434695
2097 15:53:34.026937 00200000 ################################################################
2098 15:53:34.027107
2099 15:53:34.626642 00280000 ################################################################
2100 15:53:34.626815
2101 15:53:35.226180 00300000 ################################################################
2102 15:53:35.226339
2103 15:53:35.819909 00380000 ################################################################
2104 15:53:35.820043
2105 15:53:36.424463 00400000 ################################################################
2106 15:53:36.424594
2107 15:53:37.022781 00480000 ################################################################
2108 15:53:37.022916
2109 15:53:37.590449 00500000 ################################################################
2110 15:53:37.590587
2111 15:53:38.202342 00580000 ################################################################
2112 15:53:38.202484
2113 15:53:38.834897 00600000 ################################################################
2114 15:53:38.835030
2115 15:53:39.465971 00680000 ################################################################
2116 15:53:39.466140
2117 15:53:40.103225 00700000 ################################################################
2118 15:53:40.103398
2119 15:53:40.724699 00780000 ################################################################
2120 15:53:40.724870
2121 15:53:41.237441 00800000 ##################################################### done.
2122 15:53:41.237599
2123 15:53:41.240954 Sending tftp read request... done.
2124 15:53:41.241041
2125 15:53:41.243945 Waiting for the transfer...
2126 15:53:41.244047
2127 15:53:41.244114 00000000 # done.
2128 15:53:41.244175
2129 15:53:41.254025 Command line loaded dynamically from TFTP file: 11224314/tftp-deploy-wg7do0i5/kernel/cmdline
2130 15:53:41.254150
2131 15:53:41.273628 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2132 15:53:41.273820
2133 15:53:41.279976 ec_init(0): CrosEC protocol v3 supported (256, 256)
2134 15:53:41.284372
2135 15:53:41.287783 Shutting down all USB controllers.
2136 15:53:41.288017
2137 15:53:41.288343 Removing current net device
2138 15:53:41.295299
2139 15:53:41.295655 Finalizing coreboot
2140 15:53:41.295911
2141 15:53:41.302096 Exiting depthcharge with code 4 at timestamp: 28440539
2142 15:53:41.302617
2143 15:53:41.303098
2144 15:53:41.303580 Starting kernel ...
2145 15:53:41.303999
2146 15:53:41.306198 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2147 15:53:41.306771 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2148 15:53:41.307247 Setting prompt string to ['Linux version [0-9]']
2149 15:53:41.307727 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2150 15:53:41.308071 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2151 15:53:41.308853
2153 15:58:02.307812 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2155 15:58:02.308898 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2157 15:58:02.309893 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2160 15:58:02.311448 end: 2 depthcharge-action (duration 00:05:00) [common]
2162 15:58:02.312594 Cleaning after the job
2163 15:58:02.312684 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224314/tftp-deploy-wg7do0i5/ramdisk
2164 15:58:02.314047 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224314/tftp-deploy-wg7do0i5/kernel
2165 15:58:02.315329 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224314/tftp-deploy-wg7do0i5/modules
2166 15:58:02.315697 start: 5.1 power-off (timeout 00:00:30) [common]
2167 15:58:02.315869 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2168 15:58:02.393918 >> Command sent successfully.
2169 15:58:02.399125 Returned 0 in 0 seconds
2170 15:58:02.500389 end: 5.1 power-off (duration 00:00:00) [common]
2172 15:58:02.501957 start: 5.2 read-feedback (timeout 00:10:00) [common]
2173 15:58:02.503266 Listened to connection for namespace 'common' for up to 1s
2175 15:58:02.504665 Listened to connection for namespace 'common' for up to 1s
2176 15:58:03.504030 Finalising connection for namespace 'common'
2177 15:58:03.504708 Disconnecting from shell: Finalise
2178 15:58:03.505132
2179 15:58:03.606303 end: 5.2 read-feedback (duration 00:00:01) [common]
2180 15:58:03.606890 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224314
2181 15:58:03.626327 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224314
2182 15:58:03.626456 JobError: Your job cannot terminate cleanly.