Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 15:52:58.361451 lava-dispatcher, installed at version: 2023.05.1
2 15:52:58.361693 start: 0 validate
3 15:52:58.361845 Start time: 2023-08-07 15:52:58.361835+00:00 (UTC)
4 15:52:58.361991 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:52:58.362137 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:52:58.624120 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:52:58.624857 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:52:58.895441 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:52:58.896192 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:53:02.175167 validate duration: 3.81
12 15:53:02.177010 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:53:02.177738 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:53:02.178343 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:53:02.179006 Not decompressing ramdisk as can be used compressed.
16 15:53:02.179728 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:53:02.180383 saving as /var/lib/lava/dispatcher/tmp/11224331/tftp-deploy-yyjp1hns/ramdisk/rootfs.cpio.gz
18 15:53:02.180976 total size: 8418130 (8MB)
19 15:53:02.834849 progress 0% (0MB)
20 15:53:02.847363 progress 5% (0MB)
21 15:53:02.859731 progress 10% (0MB)
22 15:53:02.868342 progress 15% (1MB)
23 15:53:02.874368 progress 20% (1MB)
24 15:53:02.879187 progress 25% (2MB)
25 15:53:02.883352 progress 30% (2MB)
26 15:53:02.886835 progress 35% (2MB)
27 15:53:02.890155 progress 40% (3MB)
28 15:53:02.893394 progress 45% (3MB)
29 15:53:02.896334 progress 50% (4MB)
30 15:53:02.898971 progress 55% (4MB)
31 15:53:02.901518 progress 60% (4MB)
32 15:53:02.903882 progress 65% (5MB)
33 15:53:02.906384 progress 70% (5MB)
34 15:53:02.908928 progress 75% (6MB)
35 15:53:02.911455 progress 80% (6MB)
36 15:53:02.913978 progress 85% (6MB)
37 15:53:02.916492 progress 90% (7MB)
38 15:53:02.919032 progress 95% (7MB)
39 15:53:02.921400 progress 100% (8MB)
40 15:53:02.921657 8MB downloaded in 0.74s (10.84MB/s)
41 15:53:02.921825 end: 1.1.1 http-download (duration 00:00:01) [common]
43 15:53:02.922086 end: 1.1 download-retry (duration 00:00:01) [common]
44 15:53:02.922180 start: 1.2 download-retry (timeout 00:09:59) [common]
45 15:53:02.922277 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 15:53:02.922441 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:53:02.922524 saving as /var/lib/lava/dispatcher/tmp/11224331/tftp-deploy-yyjp1hns/kernel/bzImage
48 15:53:02.922591 total size: 7880592 (7MB)
49 15:53:02.922656 No compression specified
50 15:53:02.923877 progress 0% (0MB)
51 15:53:02.926350 progress 5% (0MB)
52 15:53:02.928724 progress 10% (0MB)
53 15:53:02.931175 progress 15% (1MB)
54 15:53:02.933576 progress 20% (1MB)
55 15:53:02.935967 progress 25% (1MB)
56 15:53:02.938346 progress 30% (2MB)
57 15:53:02.940768 progress 35% (2MB)
58 15:53:02.943199 progress 40% (3MB)
59 15:53:02.945566 progress 45% (3MB)
60 15:53:02.947963 progress 50% (3MB)
61 15:53:02.950304 progress 55% (4MB)
62 15:53:02.952648 progress 60% (4MB)
63 15:53:02.955027 progress 65% (4MB)
64 15:53:02.957350 progress 70% (5MB)
65 15:53:02.959690 progress 75% (5MB)
66 15:53:02.962104 progress 80% (6MB)
67 15:53:02.964443 progress 85% (6MB)
68 15:53:02.966747 progress 90% (6MB)
69 15:53:02.969067 progress 95% (7MB)
70 15:53:02.971419 progress 100% (7MB)
71 15:53:02.971609 7MB downloaded in 0.05s (153.34MB/s)
72 15:53:02.971763 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:53:02.972013 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:53:02.972111 start: 1.3 download-retry (timeout 00:09:59) [common]
76 15:53:02.972210 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 15:53:02.972361 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:53:02.972436 saving as /var/lib/lava/dispatcher/tmp/11224331/tftp-deploy-yyjp1hns/modules/modules.tar
79 15:53:02.972502 total size: 251008 (0MB)
80 15:53:02.972566 Using unxz to decompress xz
81 15:53:02.977188 progress 13% (0MB)
82 15:53:02.977631 progress 26% (0MB)
83 15:53:02.977892 progress 39% (0MB)
84 15:53:02.979742 progress 52% (0MB)
85 15:53:02.981867 progress 65% (0MB)
86 15:53:02.983993 progress 78% (0MB)
87 15:53:02.986147 progress 91% (0MB)
88 15:53:02.988146 progress 100% (0MB)
89 15:53:02.994467 0MB downloaded in 0.02s (10.90MB/s)
90 15:53:02.994761 end: 1.3.1 http-download (duration 00:00:00) [common]
92 15:53:02.995064 end: 1.3 download-retry (duration 00:00:00) [common]
93 15:53:02.995173 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 15:53:02.995282 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 15:53:02.995374 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 15:53:02.995467 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 15:53:02.995708 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq
98 15:53:02.995854 makedir: /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin
99 15:53:02.995969 makedir: /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/tests
100 15:53:02.996078 makedir: /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/results
101 15:53:02.996209 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-add-keys
102 15:53:02.996375 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-add-sources
103 15:53:02.996520 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-background-process-start
104 15:53:02.996667 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-background-process-stop
105 15:53:02.996808 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-common-functions
106 15:53:02.996948 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-echo-ipv4
107 15:53:02.997092 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-install-packages
108 15:53:02.997258 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-installed-packages
109 15:53:02.997412 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-os-build
110 15:53:02.997556 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-probe-channel
111 15:53:02.997696 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-probe-ip
112 15:53:02.997837 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-target-ip
113 15:53:02.997976 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-target-mac
114 15:53:02.998113 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-target-storage
115 15:53:02.998257 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-test-case
116 15:53:02.998396 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-test-event
117 15:53:02.998547 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-test-feedback
118 15:53:02.998687 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-test-raise
119 15:53:02.998838 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-test-reference
120 15:53:02.998990 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-test-runner
121 15:53:02.999140 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-test-set
122 15:53:02.999283 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-test-shell
123 15:53:02.999425 Updating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-install-packages (oe)
124 15:53:02.999596 Updating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/bin/lava-installed-packages (oe)
125 15:53:02.999741 Creating /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/environment
126 15:53:02.999856 LAVA metadata
127 15:53:02.999938 - LAVA_JOB_ID=11224331
128 15:53:03.000010 - LAVA_DISPATCHER_IP=192.168.201.1
129 15:53:03.000121 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 15:53:03.000198 skipped lava-vland-overlay
131 15:53:03.000292 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 15:53:03.000387 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 15:53:03.000454 skipped lava-multinode-overlay
134 15:53:03.000533 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 15:53:03.000623 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 15:53:03.000709 Loading test definitions
137 15:53:03.000807 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 15:53:03.000889 Using /lava-11224331 at stage 0
139 15:53:03.001240 uuid=11224331_1.4.2.3.1 testdef=None
140 15:53:03.001336 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 15:53:03.001427 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 15:53:03.002030 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 15:53:03.002292 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 15:53:03.003020 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 15:53:03.003276 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 15:53:03.003991 runner path: /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/0/tests/0_dmesg test_uuid 11224331_1.4.2.3.1
149 15:53:03.004166 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 15:53:03.004416 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 15:53:03.004494 Using /lava-11224331 at stage 1
153 15:53:03.004827 uuid=11224331_1.4.2.3.5 testdef=None
154 15:53:03.004923 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 15:53:03.005015 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 15:53:03.005555 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 15:53:03.005796 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 15:53:03.006547 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 15:53:03.006799 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 15:53:03.007529 runner path: /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/1/tests/1_bootrr test_uuid 11224331_1.4.2.3.5
163 15:53:03.007698 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 15:53:03.007929 Creating lava-test-runner.conf files
166 15:53:03.007998 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/0 for stage 0
167 15:53:03.008098 - 0_dmesg
168 15:53:03.008185 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224331/lava-overlay-ik2qe_zq/lava-11224331/1 for stage 1
169 15:53:03.008285 - 1_bootrr
170 15:53:03.008397 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 15:53:03.008496 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 15:53:03.018129 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 15:53:03.018246 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 15:53:03.018339 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 15:53:03.018483 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 15:53:03.018587 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 15:53:03.302650 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 15:53:03.303054 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 15:53:03.303186 extracting modules file /var/lib/lava/dispatcher/tmp/11224331/tftp-deploy-yyjp1hns/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224331/extract-overlay-ramdisk-be4r1zsq/ramdisk
180 15:53:03.318282 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 15:53:03.318439 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 15:53:03.318545 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224331/compress-overlay-oyab48wc/overlay-1.4.2.4.tar.gz to ramdisk
183 15:53:03.318629 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224331/compress-overlay-oyab48wc/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224331/extract-overlay-ramdisk-be4r1zsq/ramdisk
184 15:53:03.328814 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 15:53:03.328983 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 15:53:03.329094 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 15:53:03.329215 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 15:53:03.329309 Building ramdisk /var/lib/lava/dispatcher/tmp/11224331/extract-overlay-ramdisk-be4r1zsq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224331/extract-overlay-ramdisk-be4r1zsq/ramdisk
189 15:53:03.480355 >> 49790 blocks
190 15:53:04.524410 rename /var/lib/lava/dispatcher/tmp/11224331/extract-overlay-ramdisk-be4r1zsq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224331/tftp-deploy-yyjp1hns/ramdisk/ramdisk.cpio.gz
191 15:53:04.524889 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 15:53:04.525029 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 15:53:04.525144 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 15:53:04.525254 No mkimage arch provided, not using FIT.
195 15:53:04.525355 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 15:53:04.525448 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 15:53:04.525566 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
198 15:53:04.525669 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 15:53:04.525766 No LXC device requested
200 15:53:04.525852 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 15:53:04.525950 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 15:53:04.526045 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 15:53:04.526125 Checking files for TFTP limit of 4294967296 bytes.
204 15:53:04.526649 end: 1 tftp-deploy (duration 00:00:02) [common]
205 15:53:04.526766 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 15:53:04.526863 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 15:53:04.527001 substitutions:
208 15:53:04.527074 - {DTB}: None
209 15:53:04.527142 - {INITRD}: 11224331/tftp-deploy-yyjp1hns/ramdisk/ramdisk.cpio.gz
210 15:53:04.527210 - {KERNEL}: 11224331/tftp-deploy-yyjp1hns/kernel/bzImage
211 15:53:04.527274 - {LAVA_MAC}: None
212 15:53:04.527337 - {PRESEED_CONFIG}: None
213 15:53:04.527397 - {PRESEED_LOCAL}: None
214 15:53:04.527458 - {RAMDISK}: 11224331/tftp-deploy-yyjp1hns/ramdisk/ramdisk.cpio.gz
215 15:53:04.527519 - {ROOT_PART}: None
216 15:53:04.527579 - {ROOT}: None
217 15:53:04.527638 - {SERVER_IP}: 192.168.201.1
218 15:53:04.527698 - {TEE}: None
219 15:53:04.527756 Parsed boot commands:
220 15:53:04.527815 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 15:53:04.528008 Parsed boot commands: tftpboot 192.168.201.1 11224331/tftp-deploy-yyjp1hns/kernel/bzImage 11224331/tftp-deploy-yyjp1hns/kernel/cmdline 11224331/tftp-deploy-yyjp1hns/ramdisk/ramdisk.cpio.gz
222 15:53:04.528106 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 15:53:04.528200 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 15:53:04.528301 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 15:53:04.528396 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 15:53:04.528474 Not connected, no need to disconnect.
227 15:53:04.528554 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 15:53:04.528645 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 15:53:04.528718 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-11'
230 15:53:04.533321 Setting prompt string to ['lava-test: # ']
231 15:53:04.533767 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 15:53:04.533889 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 15:53:04.533998 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 15:53:04.534100 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 15:53:04.534317 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
236 15:53:09.690909 >> Command sent successfully.
237 15:53:09.702785 Returned 0 in 5 seconds
238 15:53:09.803938 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 15:53:09.805348 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 15:53:09.805876 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 15:53:09.806320 Setting prompt string to 'Starting depthcharge on Voema...'
243 15:53:09.806763 Changing prompt to 'Starting depthcharge on Voema...'
244 15:53:09.807113 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 15:53:09.808361 [Enter `^Ec?' for help]
246 15:53:11.389192
247 15:53:11.389740
248 15:53:11.399135 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 15:53:11.402735 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
250 15:53:11.409306 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 15:53:11.412819 CPU: AES supported, TXT NOT supported, VT supported
252 15:53:11.419762 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 15:53:11.422997 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 15:53:11.429561 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 15:53:11.433345 VBOOT: Loading verstage.
256 15:53:11.436707 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 15:53:11.443335 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 15:53:11.446556 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 15:53:11.456733 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 15:53:11.463415 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 15:53:11.463837
262 15:53:11.464165
263 15:53:11.473208 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 15:53:11.489664 Probing TPM: . done!
265 15:53:11.493078 TPM ready after 0 ms
266 15:53:11.496631 Connected to device vid:did:rid of 1ae0:0028:00
267 15:53:11.507539 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
268 15:53:11.514233 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 15:53:11.517880 Initialized TPM device CR50 revision 0
270 15:53:11.580285 tlcl_send_startup: Startup return code is 0
271 15:53:11.580731 TPM: setup succeeded
272 15:53:11.594590 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 15:53:11.608835 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 15:53:11.621516 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 15:53:11.631667 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 15:53:11.634990 Chrome EC: UHEPI supported
277 15:53:11.638719 Phase 1
278 15:53:11.641722 FMAP: area GBB found @ 1805000 (458752 bytes)
279 15:53:11.648226 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 15:53:11.658547 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 15:53:11.664870 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 15:53:11.671907 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 15:53:11.675186 Recovery requested (1009000e)
284 15:53:11.678299 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 15:53:11.689945 tlcl_extend: response is 0
286 15:53:11.696496 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 15:53:11.706113 tlcl_extend: response is 0
288 15:53:11.712660 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 15:53:11.720038 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 15:53:11.725943 BS: verstage times (exec / console): total (unknown) / 142 ms
291 15:53:11.726365
292 15:53:11.726822
293 15:53:11.739488 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 15:53:11.746076 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 15:53:11.749408 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 15:53:11.752649 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 15:53:11.759163 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 15:53:11.762900 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 15:53:11.766186 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 15:53:11.769237 TCO_STS: 0000 0000
301 15:53:11.772562 GEN_PMCON: d0015038 00002200
302 15:53:11.775803 GBLRST_CAUSE: 00000000 00000000
303 15:53:11.776227 HPR_CAUSE0: 00000000
304 15:53:11.779378 prev_sleep_state 5
305 15:53:11.782596 Boot Count incremented to 19945
306 15:53:11.789448 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 15:53:11.796036 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 15:53:11.802378 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 15:53:11.809124 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 15:53:11.813442 Chrome EC: UHEPI supported
311 15:53:11.820043 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 15:53:11.833312 Probing TPM: done!
313 15:53:11.839928 Connected to device vid:did:rid of 1ae0:0028:00
314 15:53:11.849884 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
315 15:53:11.853504 Initialized TPM device CR50 revision 0
316 15:53:11.868537 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 15:53:11.874976 MRC: Hash idx 0x100b comparison successful.
318 15:53:11.878259 MRC cache found, size faa8
319 15:53:11.878752 bootmode is set to: 2
320 15:53:11.881742 SPD index = 2
321 15:53:11.888288 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 15:53:11.891722 SPD: module type is LPDDR4X
323 15:53:11.895145 SPD: module part number is MT53D1G64D4NW-046
324 15:53:11.901685 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
325 15:53:11.905385 SPD: device width 16 bits, bus width 16 bits
326 15:53:11.911758 SPD: module size is 2048 MB (per channel)
327 15:53:12.341038 CBMEM:
328 15:53:12.344350 IMD: root @ 0x76fff000 254 entries.
329 15:53:12.347366 IMD: root @ 0x76ffec00 62 entries.
330 15:53:12.351053 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 15:53:12.357210 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 15:53:12.360307 External stage cache:
333 15:53:12.363837 IMD: root @ 0x7b3ff000 254 entries.
334 15:53:12.367312 IMD: root @ 0x7b3fec00 62 entries.
335 15:53:12.382262 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 15:53:12.388450 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 15:53:12.395561 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 15:53:12.408743 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 15:53:12.415795 cse_lite: Skip switching to RW in the recovery path
340 15:53:12.416386 8 DIMMs found
341 15:53:12.416939 SMM Memory Map
342 15:53:12.418727 SMRAM : 0x7b000000 0x800000
343 15:53:12.425720 Subregion 0: 0x7b000000 0x200000
344 15:53:12.428663 Subregion 1: 0x7b200000 0x200000
345 15:53:12.431969 Subregion 2: 0x7b400000 0x400000
346 15:53:12.432392 top_of_ram = 0x77000000
347 15:53:12.438888 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 15:53:12.445826 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 15:53:12.448767 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 15:53:12.455743 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 15:53:12.461682 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 15:53:12.468326 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 15:53:12.478532 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 15:53:12.484816 Processing 211 relocs. Offset value of 0x74c0b000
355 15:53:12.492052 BS: romstage times (exec / console): total (unknown) / 277 ms
356 15:53:12.497884
357 15:53:12.498347
358 15:53:12.507853 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 15:53:12.510802 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 15:53:12.520868 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 15:53:12.527663 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 15:53:12.533773 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 15:53:12.540724 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 15:53:12.583669 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 15:53:12.590181 Processing 5008 relocs. Offset value of 0x75d98000
366 15:53:12.593740 BS: postcar times (exec / console): total (unknown) / 59 ms
367 15:53:12.597222
368 15:53:12.597338
369 15:53:12.607418 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 15:53:12.607542 Normal boot
371 15:53:12.610361 FW_CONFIG value is 0x804c02
372 15:53:12.614055 PCI: 00:07.0 disabled by fw_config
373 15:53:12.617250 PCI: 00:07.1 disabled by fw_config
374 15:53:12.620457 PCI: 00:0d.2 disabled by fw_config
375 15:53:12.623670 PCI: 00:1c.7 disabled by fw_config
376 15:53:12.630357 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 15:53:12.636737 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 15:53:12.640611 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 15:53:12.643441 GENERIC: 0.0 disabled by fw_config
380 15:53:12.650077 GENERIC: 1.0 disabled by fw_config
381 15:53:12.653727 fw_config match found: DB_USB=USB3_ACTIVE
382 15:53:12.656614 fw_config match found: DB_USB=USB3_ACTIVE
383 15:53:12.660259 fw_config match found: DB_USB=USB3_ACTIVE
384 15:53:12.666794 fw_config match found: DB_USB=USB3_ACTIVE
385 15:53:12.670299 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 15:53:12.676807 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 15:53:12.686587 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 15:53:12.693665 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 15:53:12.696947 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 15:53:12.703393 microcode: Update skipped, already up-to-date
391 15:53:12.709921 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 15:53:12.737612 Detected 4 core, 8 thread CPU.
393 15:53:12.741112 Setting up SMI for CPU
394 15:53:12.744775 IED base = 0x7b400000
395 15:53:12.745203 IED size = 0x00400000
396 15:53:12.747778 Will perform SMM setup.
397 15:53:12.754606 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
398 15:53:12.761292 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 15:53:12.767635 Processing 16 relocs. Offset value of 0x00030000
400 15:53:12.771281 Attempting to start 7 APs
401 15:53:12.774247 Waiting for 10ms after sending INIT.
402 15:53:12.789746 Waiting for 1st SIPI to complete...done.
403 15:53:12.790279 AP: slot 1 apic_id 1.
404 15:53:12.796236 Waiting for 2nd SIPI to complete...done.
405 15:53:12.796787 AP: slot 4 apic_id 7.
406 15:53:12.799490 AP: slot 5 apic_id 6.
407 15:53:12.802946 AP: slot 6 apic_id 2.
408 15:53:12.803371 AP: slot 2 apic_id 3.
409 15:53:12.806290 AP: slot 3 apic_id 5.
410 15:53:12.809347 AP: slot 7 apic_id 4.
411 15:53:12.816061 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 15:53:12.822751 Processing 13 relocs. Offset value of 0x00038000
413 15:53:12.823163 Unable to locate Global NVS
414 15:53:12.832884 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 15:53:12.836714 Installing permanent SMM handler to 0x7b000000
416 15:53:12.846025 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 15:53:12.849612 Processing 794 relocs. Offset value of 0x7b010000
418 15:53:12.859457 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 15:53:12.862525 Processing 13 relocs. Offset value of 0x7b008000
420 15:53:12.869260 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 15:53:12.876090 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 15:53:12.879232 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 15:53:12.886257 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 15:53:12.892820 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 15:53:12.899431 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 15:53:12.905656 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 15:53:12.906151 Unable to locate Global NVS
428 15:53:12.915538 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 15:53:12.919238 Clearing SMI status registers
430 15:53:12.919689 SMI_STS: PM1
431 15:53:12.922192 PM1_STS: PWRBTN
432 15:53:12.929525 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 15:53:12.932213 In relocation handler: CPU 0
434 15:53:12.935803 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 15:53:12.942299 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 15:53:12.942800 Relocation complete.
437 15:53:12.952541 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 15:53:12.953143 In relocation handler: CPU 1
439 15:53:12.959033 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 15:53:12.959474 Relocation complete.
441 15:53:12.966033 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
442 15:53:12.968898 In relocation handler: CPU 5
443 15:53:12.975771 New SMBASE=0x7affec00 IEDBASE=0x7b400000
444 15:53:12.978714 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 15:53:12.982062 Relocation complete.
446 15:53:12.989103 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
447 15:53:12.992170 In relocation handler: CPU 7
448 15:53:12.995737 New SMBASE=0x7affe400 IEDBASE=0x7b400000
449 15:53:12.998885 Writing SMRR. base = 0x7b000006, mask=0xff800c00
450 15:53:13.002310 Relocation complete.
451 15:53:13.009151 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
452 15:53:13.012038 In relocation handler: CPU 3
453 15:53:13.015359 New SMBASE=0x7afff400 IEDBASE=0x7b400000
454 15:53:13.018806 Relocation complete.
455 15:53:13.025710 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
456 15:53:13.028697 In relocation handler: CPU 6
457 15:53:13.031880 New SMBASE=0x7affe800 IEDBASE=0x7b400000
458 15:53:13.038926 Writing SMRR. base = 0x7b000006, mask=0xff800c00
459 15:53:13.039349 Relocation complete.
460 15:53:13.049103 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
461 15:53:13.052040 In relocation handler: CPU 2
462 15:53:13.055666 New SMBASE=0x7afff800 IEDBASE=0x7b400000
463 15:53:13.056098 Relocation complete.
464 15:53:13.065279 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
465 15:53:13.065773 In relocation handler: CPU 4
466 15:53:13.072523 New SMBASE=0x7afff000 IEDBASE=0x7b400000
467 15:53:13.072973 Relocation complete.
468 15:53:13.075420 Initializing CPU #0
469 15:53:13.079135 CPU: vendor Intel device 806c1
470 15:53:13.082074 CPU: family 06, model 8c, stepping 01
471 15:53:13.085671 Clearing out pending MCEs
472 15:53:13.089263 Setting up local APIC...
473 15:53:13.089681 apic_id: 0x00 done.
474 15:53:13.092329 Turbo is available but hidden
475 15:53:13.095436 Turbo is available and visible
476 15:53:13.102068 microcode: Update skipped, already up-to-date
477 15:53:13.102545 CPU #0 initialized
478 15:53:13.105414 Initializing CPU #3
479 15:53:13.109177 Initializing CPU #7
480 15:53:13.109618 CPU: vendor Intel device 806c1
481 15:53:13.115479 CPU: family 06, model 8c, stepping 01
482 15:53:13.119060 CPU: vendor Intel device 806c1
483 15:53:13.121834 CPU: family 06, model 8c, stepping 01
484 15:53:13.122250 Clearing out pending MCEs
485 15:53:13.125663 Initializing CPU #5
486 15:53:13.128478 Initializing CPU #4
487 15:53:13.131989 CPU: vendor Intel device 806c1
488 15:53:13.135500 CPU: family 06, model 8c, stepping 01
489 15:53:13.138580 CPU: vendor Intel device 806c1
490 15:53:13.141847 CPU: family 06, model 8c, stepping 01
491 15:53:13.145635 Clearing out pending MCEs
492 15:53:13.146132 Clearing out pending MCEs
493 15:53:13.148606 Setting up local APIC...
494 15:53:13.152178 Initializing CPU #2
495 15:53:13.152668 Initializing CPU #6
496 15:53:13.155081 CPU: vendor Intel device 806c1
497 15:53:13.159231 CPU: family 06, model 8c, stepping 01
498 15:53:13.162908 Setting up local APIC...
499 15:53:13.166369 Initializing CPU #1
500 15:53:13.166963 Setting up local APIC...
501 15:53:13.169255 Clearing out pending MCEs
502 15:53:13.172768 CPU: vendor Intel device 806c1
503 15:53:13.176262 CPU: family 06, model 8c, stepping 01
504 15:53:13.179560 apic_id: 0x06 done.
505 15:53:13.183093 apic_id: 0x07 done.
506 15:53:13.186142 microcode: Update skipped, already up-to-date
507 15:53:13.189756 microcode: Update skipped, already up-to-date
508 15:53:13.192747 CPU #5 initialized
509 15:53:13.193345 CPU #4 initialized
510 15:53:13.196345 CPU: vendor Intel device 806c1
511 15:53:13.202920 CPU: family 06, model 8c, stepping 01
512 15:53:13.203463 Setting up local APIC...
513 15:53:13.206263 apic_id: 0x05 done.
514 15:53:13.209221 Clearing out pending MCEs
515 15:53:13.212995 microcode: Update skipped, already up-to-date
516 15:53:13.216204 Setting up local APIC...
517 15:53:13.219181 apic_id: 0x03 done.
518 15:53:13.219663 Clearing out pending MCEs
519 15:53:13.226056 microcode: Update skipped, already up-to-date
520 15:53:13.229317 Setting up local APIC...
521 15:53:13.229822 apic_id: 0x04 done.
522 15:53:13.232532 CPU #3 initialized
523 15:53:13.235792 microcode: Update skipped, already up-to-date
524 15:53:13.239434 Clearing out pending MCEs
525 15:53:13.242267 CPU #7 initialized
526 15:53:13.242822 Setting up local APIC...
527 15:53:13.245814 apic_id: 0x02 done.
528 15:53:13.249052 CPU #2 initialized
529 15:53:13.252718 microcode: Update skipped, already up-to-date
530 15:53:13.255712 apic_id: 0x01 done.
531 15:53:13.256176 CPU #6 initialized
532 15:53:13.262343 microcode: Update skipped, already up-to-date
533 15:53:13.262832 CPU #1 initialized
534 15:53:13.268840 bsp_do_flight_plan done after 468 msecs.
535 15:53:13.269267 CPU: frequency set to 4400 MHz
536 15:53:13.272394 Enabling SMIs.
537 15:53:13.279112 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 15:53:13.294461 SATAXPCIE1 indicates PCIe NVMe is present
539 15:53:13.297885 Probing TPM: done!
540 15:53:13.301448 Connected to device vid:did:rid of 1ae0:0028:00
541 15:53:13.311970 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
542 15:53:13.315403 Initialized TPM device CR50 revision 0
543 15:53:13.318232 Enabling S0i3.4
544 15:53:13.325081 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 15:53:13.328254 Found a VBT of 8704 bytes after decompression
546 15:53:13.334872 cse_lite: CSE RO boot. HybridStorageMode disabled
547 15:53:13.341294 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 15:53:13.417039 FSPS returned 0
549 15:53:13.420572 Executing Phase 1 of FspMultiPhaseSiInit
550 15:53:13.430146 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 15:53:13.433647 port C0 DISC req: usage 1 usb3 1 usb2 5
552 15:53:13.436908 Raw Buffer output 0 00000511
553 15:53:13.440505 Raw Buffer output 1 00000000
554 15:53:13.443896 pmc_send_ipc_cmd succeeded
555 15:53:13.450593 port C1 DISC req: usage 1 usb3 2 usb2 3
556 15:53:13.451018 Raw Buffer output 0 00000321
557 15:53:13.453986 Raw Buffer output 1 00000000
558 15:53:13.458251 pmc_send_ipc_cmd succeeded
559 15:53:13.463276 Detected 4 core, 8 thread CPU.
560 15:53:13.466406 Detected 4 core, 8 thread CPU.
561 15:53:13.666827 Display FSP Version Info HOB
562 15:53:13.669965 Reference Code - CPU = a.0.4c.31
563 15:53:13.673290 uCode Version = 0.0.0.86
564 15:53:13.676877 TXT ACM version = ff.ff.ff.ffff
565 15:53:13.679874 Reference Code - ME = a.0.4c.31
566 15:53:13.683280 MEBx version = 0.0.0.0
567 15:53:13.686987 ME Firmware Version = Consumer SKU
568 15:53:13.690483 Reference Code - PCH = a.0.4c.31
569 15:53:13.693351 PCH-CRID Status = Disabled
570 15:53:13.697137 PCH-CRID Original Value = ff.ff.ff.ffff
571 15:53:13.699764 PCH-CRID New Value = ff.ff.ff.ffff
572 15:53:13.703084 OPROM - RST - RAID = ff.ff.ff.ffff
573 15:53:13.706741 PCH Hsio Version = 4.0.0.0
574 15:53:13.710516 Reference Code - SA - System Agent = a.0.4c.31
575 15:53:13.713388 Reference Code - MRC = 2.0.0.1
576 15:53:13.716891 SA - PCIe Version = a.0.4c.31
577 15:53:13.719897 SA-CRID Status = Disabled
578 15:53:13.723546 SA-CRID Original Value = 0.0.0.1
579 15:53:13.726839 SA-CRID New Value = 0.0.0.1
580 15:53:13.730179 OPROM - VBIOS = ff.ff.ff.ffff
581 15:53:13.733898 IO Manageability Engine FW Version = 11.1.4.0
582 15:53:13.736473 PHY Build Version = 0.0.0.e0
583 15:53:13.740742 Thunderbolt(TM) FW Version = 0.0.0.0
584 15:53:13.744362 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 15:53:13.747809 ITSS IRQ Polarities Before:
586 15:53:13.751267 IPC0: 0xffffffff
587 15:53:13.751691 IPC1: 0xffffffff
588 15:53:13.754181 IPC2: 0xffffffff
589 15:53:13.754639 IPC3: 0xffffffff
590 15:53:13.757821 ITSS IRQ Polarities After:
591 15:53:13.760812 IPC0: 0xffffffff
592 15:53:13.761233 IPC1: 0xffffffff
593 15:53:13.764559 IPC2: 0xffffffff
594 15:53:13.764979 IPC3: 0xffffffff
595 15:53:13.771185 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 15:53:13.781209 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 15:53:13.794517 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 15:53:13.804371 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 15:53:13.810790 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
600 15:53:13.814234 Enumerating buses...
601 15:53:13.817594 Show all devs... Before device enumeration.
602 15:53:13.820789 Root Device: enabled 1
603 15:53:13.824286 DOMAIN: 0000: enabled 1
604 15:53:13.827562 CPU_CLUSTER: 0: enabled 1
605 15:53:13.827985 PCI: 00:00.0: enabled 1
606 15:53:13.830973 PCI: 00:02.0: enabled 1
607 15:53:13.834336 PCI: 00:04.0: enabled 1
608 15:53:13.837981 PCI: 00:05.0: enabled 1
609 15:53:13.838409 PCI: 00:06.0: enabled 0
610 15:53:13.840600 PCI: 00:07.0: enabled 0
611 15:53:13.844283 PCI: 00:07.1: enabled 0
612 15:53:13.844703 PCI: 00:07.2: enabled 0
613 15:53:13.847436 PCI: 00:07.3: enabled 0
614 15:53:13.850982 PCI: 00:08.0: enabled 1
615 15:53:13.854378 PCI: 00:09.0: enabled 0
616 15:53:13.854837 PCI: 00:0a.0: enabled 0
617 15:53:13.857791 PCI: 00:0d.0: enabled 1
618 15:53:13.860794 PCI: 00:0d.1: enabled 0
619 15:53:13.864261 PCI: 00:0d.2: enabled 0
620 15:53:13.864677 PCI: 00:0d.3: enabled 0
621 15:53:13.867215 PCI: 00:0e.0: enabled 0
622 15:53:13.871016 PCI: 00:10.2: enabled 1
623 15:53:13.873920 PCI: 00:10.6: enabled 0
624 15:53:13.874335 PCI: 00:10.7: enabled 0
625 15:53:13.877299 PCI: 00:12.0: enabled 0
626 15:53:13.880807 PCI: 00:12.6: enabled 0
627 15:53:13.884249 PCI: 00:13.0: enabled 0
628 15:53:13.884663 PCI: 00:14.0: enabled 1
629 15:53:13.887084 PCI: 00:14.1: enabled 0
630 15:53:13.890544 PCI: 00:14.2: enabled 1
631 15:53:13.890964 PCI: 00:14.3: enabled 1
632 15:53:13.893896 PCI: 00:15.0: enabled 1
633 15:53:13.897394 PCI: 00:15.1: enabled 1
634 15:53:13.900868 PCI: 00:15.2: enabled 1
635 15:53:13.901285 PCI: 00:15.3: enabled 1
636 15:53:13.903814 PCI: 00:16.0: enabled 1
637 15:53:13.907206 PCI: 00:16.1: enabled 0
638 15:53:13.910904 PCI: 00:16.2: enabled 0
639 15:53:13.911359 PCI: 00:16.3: enabled 0
640 15:53:13.913852 PCI: 00:16.4: enabled 0
641 15:53:13.917430 PCI: 00:16.5: enabled 0
642 15:53:13.920637 PCI: 00:17.0: enabled 1
643 15:53:13.921055 PCI: 00:19.0: enabled 0
644 15:53:13.924193 PCI: 00:19.1: enabled 1
645 15:53:13.926926 PCI: 00:19.2: enabled 0
646 15:53:13.927346 PCI: 00:1c.0: enabled 1
647 15:53:13.930362 PCI: 00:1c.1: enabled 0
648 15:53:13.933862 PCI: 00:1c.2: enabled 0
649 15:53:13.936973 PCI: 00:1c.3: enabled 0
650 15:53:13.937428 PCI: 00:1c.4: enabled 0
651 15:53:13.940240 PCI: 00:1c.5: enabled 0
652 15:53:13.943864 PCI: 00:1c.6: enabled 1
653 15:53:13.947045 PCI: 00:1c.7: enabled 0
654 15:53:13.947494 PCI: 00:1d.0: enabled 1
655 15:53:13.950507 PCI: 00:1d.1: enabled 0
656 15:53:13.953577 PCI: 00:1d.2: enabled 1
657 15:53:13.956931 PCI: 00:1d.3: enabled 0
658 15:53:13.957353 PCI: 00:1e.0: enabled 1
659 15:53:13.960557 PCI: 00:1e.1: enabled 0
660 15:53:13.963480 PCI: 00:1e.2: enabled 1
661 15:53:13.966994 PCI: 00:1e.3: enabled 1
662 15:53:13.967415 PCI: 00:1f.0: enabled 1
663 15:53:13.970527 PCI: 00:1f.1: enabled 0
664 15:53:13.973536 PCI: 00:1f.2: enabled 1
665 15:53:13.973957 PCI: 00:1f.3: enabled 1
666 15:53:13.977261 PCI: 00:1f.4: enabled 0
667 15:53:13.980197 PCI: 00:1f.5: enabled 1
668 15:53:13.983752 PCI: 00:1f.6: enabled 0
669 15:53:13.984209 PCI: 00:1f.7: enabled 0
670 15:53:13.987019 APIC: 00: enabled 1
671 15:53:13.990199 GENERIC: 0.0: enabled 1
672 15:53:13.990706 GENERIC: 0.0: enabled 1
673 15:53:13.993526 GENERIC: 1.0: enabled 1
674 15:53:13.996457 GENERIC: 0.0: enabled 1
675 15:53:14.000247 GENERIC: 1.0: enabled 1
676 15:53:14.000694 USB0 port 0: enabled 1
677 15:53:14.003408 GENERIC: 0.0: enabled 1
678 15:53:14.007131 USB0 port 0: enabled 1
679 15:53:14.009985 GENERIC: 0.0: enabled 1
680 15:53:14.010411 I2C: 00:1a: enabled 1
681 15:53:14.013375 I2C: 00:31: enabled 1
682 15:53:14.016872 I2C: 00:32: enabled 1
683 15:53:14.017394 I2C: 00:10: enabled 1
684 15:53:14.020163 I2C: 00:15: enabled 1
685 15:53:14.023807 GENERIC: 0.0: enabled 0
686 15:53:14.024224 GENERIC: 1.0: enabled 0
687 15:53:14.026546 GENERIC: 0.0: enabled 1
688 15:53:14.030092 SPI: 00: enabled 1
689 15:53:14.030579 SPI: 00: enabled 1
690 15:53:14.033147 PNP: 0c09.0: enabled 1
691 15:53:14.036744 GENERIC: 0.0: enabled 1
692 15:53:14.037214 USB3 port 0: enabled 1
693 15:53:14.040216 USB3 port 1: enabled 1
694 15:53:14.043596 USB3 port 2: enabled 0
695 15:53:14.046681 USB3 port 3: enabled 0
696 15:53:14.047117 USB2 port 0: enabled 0
697 15:53:14.049773 USB2 port 1: enabled 1
698 15:53:14.053539 USB2 port 2: enabled 1
699 15:53:14.053956 USB2 port 3: enabled 0
700 15:53:14.056667 USB2 port 4: enabled 1
701 15:53:14.059851 USB2 port 5: enabled 0
702 15:53:14.063813 USB2 port 6: enabled 0
703 15:53:14.064350 USB2 port 7: enabled 0
704 15:53:14.066321 USB2 port 8: enabled 0
705 15:53:14.069875 USB2 port 9: enabled 0
706 15:53:14.070464 USB3 port 0: enabled 0
707 15:53:14.073333 USB3 port 1: enabled 1
708 15:53:14.076454 USB3 port 2: enabled 0
709 15:53:14.076866 USB3 port 3: enabled 0
710 15:53:14.080082 GENERIC: 0.0: enabled 1
711 15:53:14.083057 GENERIC: 1.0: enabled 1
712 15:53:14.086537 APIC: 01: enabled 1
713 15:53:14.086947 APIC: 03: enabled 1
714 15:53:14.089987 APIC: 05: enabled 1
715 15:53:14.090397 APIC: 07: enabled 1
716 15:53:14.093332 APIC: 06: enabled 1
717 15:53:14.096637 APIC: 02: enabled 1
718 15:53:14.097073 APIC: 04: enabled 1
719 15:53:14.100045 Compare with tree...
720 15:53:14.102877 Root Device: enabled 1
721 15:53:14.103292 DOMAIN: 0000: enabled 1
722 15:53:14.106711 PCI: 00:00.0: enabled 1
723 15:53:14.109825 PCI: 00:02.0: enabled 1
724 15:53:14.113140 PCI: 00:04.0: enabled 1
725 15:53:14.116362 GENERIC: 0.0: enabled 1
726 15:53:14.116779 PCI: 00:05.0: enabled 1
727 15:53:14.119913 PCI: 00:06.0: enabled 0
728 15:53:14.122889 PCI: 00:07.0: enabled 0
729 15:53:14.126834 GENERIC: 0.0: enabled 1
730 15:53:14.129633 PCI: 00:07.1: enabled 0
731 15:53:14.130050 GENERIC: 1.0: enabled 1
732 15:53:14.133194 PCI: 00:07.2: enabled 0
733 15:53:14.136163 GENERIC: 0.0: enabled 1
734 15:53:14.139805 PCI: 00:07.3: enabled 0
735 15:53:14.142859 GENERIC: 1.0: enabled 1
736 15:53:14.143298 PCI: 00:08.0: enabled 1
737 15:53:14.146398 PCI: 00:09.0: enabled 0
738 15:53:14.149526 PCI: 00:0a.0: enabled 0
739 15:53:14.152794 PCI: 00:0d.0: enabled 1
740 15:53:14.156240 USB0 port 0: enabled 1
741 15:53:14.156655 USB3 port 0: enabled 1
742 15:53:14.159428 USB3 port 1: enabled 1
743 15:53:14.162862 USB3 port 2: enabled 0
744 15:53:14.166299 USB3 port 3: enabled 0
745 15:53:14.169332 PCI: 00:0d.1: enabled 0
746 15:53:14.172690 PCI: 00:0d.2: enabled 0
747 15:53:14.173127 GENERIC: 0.0: enabled 1
748 15:53:14.176346 PCI: 00:0d.3: enabled 0
749 15:53:14.179721 PCI: 00:0e.0: enabled 0
750 15:53:14.182982 PCI: 00:10.2: enabled 1
751 15:53:14.185859 PCI: 00:10.6: enabled 0
752 15:53:14.186289 PCI: 00:10.7: enabled 0
753 15:53:14.189651 PCI: 00:12.0: enabled 0
754 15:53:14.192635 PCI: 00:12.6: enabled 0
755 15:53:14.196555 PCI: 00:13.0: enabled 0
756 15:53:14.197104 PCI: 00:14.0: enabled 1
757 15:53:14.199284 USB0 port 0: enabled 1
758 15:53:14.202740 USB2 port 0: enabled 0
759 15:53:14.205963 USB2 port 1: enabled 1
760 15:53:14.209038 USB2 port 2: enabled 1
761 15:53:14.212492 USB2 port 3: enabled 0
762 15:53:14.212934 USB2 port 4: enabled 1
763 15:53:14.216026 USB2 port 5: enabled 0
764 15:53:14.219482 USB2 port 6: enabled 0
765 15:53:14.222734 USB2 port 7: enabled 0
766 15:53:14.225999 USB2 port 8: enabled 0
767 15:53:14.228988 USB2 port 9: enabled 0
768 15:53:14.229431 USB3 port 0: enabled 0
769 15:53:14.232526 USB3 port 1: enabled 1
770 15:53:14.236143 USB3 port 2: enabled 0
771 15:53:14.239308 USB3 port 3: enabled 0
772 15:53:14.242802 PCI: 00:14.1: enabled 0
773 15:53:14.243216 PCI: 00:14.2: enabled 1
774 15:53:14.245769 PCI: 00:14.3: enabled 1
775 15:53:14.249305 GENERIC: 0.0: enabled 1
776 15:53:14.252240 PCI: 00:15.0: enabled 1
777 15:53:14.255730 I2C: 00:1a: enabled 1
778 15:53:14.256172 I2C: 00:31: enabled 1
779 15:53:14.259359 I2C: 00:32: enabled 1
780 15:53:14.262200 PCI: 00:15.1: enabled 1
781 15:53:14.265977 I2C: 00:10: enabled 1
782 15:53:14.266397 PCI: 00:15.2: enabled 1
783 15:53:14.269649 PCI: 00:15.3: enabled 1
784 15:53:14.272760 PCI: 00:16.0: enabled 1
785 15:53:14.275765 PCI: 00:16.1: enabled 0
786 15:53:14.279241 PCI: 00:16.2: enabled 0
787 15:53:14.279675 PCI: 00:16.3: enabled 0
788 15:53:14.282755 PCI: 00:16.4: enabled 0
789 15:53:14.285544 PCI: 00:16.5: enabled 0
790 15:53:14.288851 PCI: 00:17.0: enabled 1
791 15:53:14.292284 PCI: 00:19.0: enabled 0
792 15:53:14.292697 PCI: 00:19.1: enabled 1
793 15:53:14.295719 I2C: 00:15: enabled 1
794 15:53:14.298882 PCI: 00:19.2: enabled 0
795 15:53:14.302399 PCI: 00:1d.0: enabled 1
796 15:53:14.305403 GENERIC: 0.0: enabled 1
797 15:53:14.305834 PCI: 00:1e.0: enabled 1
798 15:53:14.308991 PCI: 00:1e.1: enabled 0
799 15:53:14.312334 PCI: 00:1e.2: enabled 1
800 15:53:14.315400 SPI: 00: enabled 1
801 15:53:14.315840 PCI: 00:1e.3: enabled 1
802 15:53:14.319060 SPI: 00: enabled 1
803 15:53:14.322266 PCI: 00:1f.0: enabled 1
804 15:53:14.325506 PNP: 0c09.0: enabled 1
805 15:53:14.325949 PCI: 00:1f.1: enabled 0
806 15:53:14.328734 PCI: 00:1f.2: enabled 1
807 15:53:14.332122 GENERIC: 0.0: enabled 1
808 15:53:14.335884 GENERIC: 0.0: enabled 1
809 15:53:14.339152 GENERIC: 1.0: enabled 1
810 15:53:14.342366 PCI: 00:1f.3: enabled 1
811 15:53:14.342812 PCI: 00:1f.4: enabled 0
812 15:53:14.345550 PCI: 00:1f.5: enabled 1
813 15:53:14.348405 PCI: 00:1f.6: enabled 0
814 15:53:14.352012 PCI: 00:1f.7: enabled 0
815 15:53:14.404177 CPU_CLUSTER: 0: enabled 1
816 15:53:14.404709 APIC: 00: enabled 1
817 15:53:14.405098 APIC: 01: enabled 1
818 15:53:14.405450 APIC: 03: enabled 1
819 15:53:14.405758 APIC: 05: enabled 1
820 15:53:14.406045 APIC: 07: enabled 1
821 15:53:14.406342 APIC: 06: enabled 1
822 15:53:14.406677 APIC: 02: enabled 1
823 15:53:14.406982 APIC: 04: enabled 1
824 15:53:14.407258 Root Device scanning...
825 15:53:14.407545 scan_static_bus for Root Device
826 15:53:14.407818 DOMAIN: 0000 enabled
827 15:53:14.408121 CPU_CLUSTER: 0 enabled
828 15:53:14.408448 DOMAIN: 0000 scanning...
829 15:53:14.409042 PCI: pci_scan_bus for bus 00
830 15:53:14.409343 PCI: 00:00.0 [8086/0000] ops
831 15:53:14.409644 PCI: 00:00.0 [8086/9a12] enabled
832 15:53:14.409918 PCI: 00:02.0 [8086/0000] bus ops
833 15:53:14.410189 PCI: 00:02.0 [8086/9a40] enabled
834 15:53:14.414447 PCI: 00:04.0 [8086/0000] bus ops
835 15:53:14.414896 PCI: 00:04.0 [8086/9a03] enabled
836 15:53:14.417820 PCI: 00:05.0 [8086/9a19] enabled
837 15:53:14.418236 PCI: 00:07.0 [0000/0000] hidden
838 15:53:14.421152 PCI: 00:08.0 [8086/9a11] enabled
839 15:53:14.421565 PCI: 00:0a.0 [8086/9a0d] disabled
840 15:53:14.424366 PCI: 00:0d.0 [8086/0000] bus ops
841 15:53:14.427977 PCI: 00:0d.0 [8086/9a13] enabled
842 15:53:14.430967 PCI: 00:14.0 [8086/0000] bus ops
843 15:53:14.434494 PCI: 00:14.0 [8086/a0ed] enabled
844 15:53:14.437836 PCI: 00:14.2 [8086/a0ef] enabled
845 15:53:14.441107 PCI: 00:14.3 [8086/0000] bus ops
846 15:53:14.444211 PCI: 00:14.3 [8086/a0f0] enabled
847 15:53:14.447668 PCI: 00:15.0 [8086/0000] bus ops
848 15:53:14.451025 PCI: 00:15.0 [8086/a0e8] enabled
849 15:53:14.454049 PCI: 00:15.1 [8086/0000] bus ops
850 15:53:14.457671 PCI: 00:15.1 [8086/a0e9] enabled
851 15:53:14.460671 PCI: 00:15.2 [8086/0000] bus ops
852 15:53:14.464252 PCI: 00:15.2 [8086/a0ea] enabled
853 15:53:14.467810 PCI: 00:15.3 [8086/0000] bus ops
854 15:53:14.470916 PCI: 00:15.3 [8086/a0eb] enabled
855 15:53:14.474149 PCI: 00:16.0 [8086/0000] ops
856 15:53:14.477772 PCI: 00:16.0 [8086/a0e0] enabled
857 15:53:14.484283 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 15:53:14.487603 PCI: 00:19.0 [8086/0000] bus ops
859 15:53:14.491014 PCI: 00:19.0 [8086/a0c5] disabled
860 15:53:14.493761 PCI: 00:19.1 [8086/0000] bus ops
861 15:53:14.497312 PCI: 00:19.1 [8086/a0c6] enabled
862 15:53:14.501012 PCI: 00:1d.0 [8086/0000] bus ops
863 15:53:14.504433 PCI: 00:1d.0 [8086/a0b0] enabled
864 15:53:14.507741 PCI: 00:1e.0 [8086/0000] ops
865 15:53:14.510710 PCI: 00:1e.0 [8086/a0a8] enabled
866 15:53:14.514227 PCI: 00:1e.2 [8086/0000] bus ops
867 15:53:14.517805 PCI: 00:1e.2 [8086/a0aa] enabled
868 15:53:14.520986 PCI: 00:1e.3 [8086/0000] bus ops
869 15:53:14.524552 PCI: 00:1e.3 [8086/a0ab] enabled
870 15:53:14.527470 PCI: 00:1f.0 [8086/0000] bus ops
871 15:53:14.530668 PCI: 00:1f.0 [8086/a087] enabled
872 15:53:14.531090 RTC Init
873 15:53:14.534783 Set power on after power failure.
874 15:53:14.537429 Disabling Deep S3
875 15:53:14.540884 Disabling Deep S3
876 15:53:14.541350 Disabling Deep S4
877 15:53:14.544471 Disabling Deep S4
878 15:53:14.544991 Disabling Deep S5
879 15:53:14.547809 Disabling Deep S5
880 15:53:14.550707 PCI: 00:1f.2 [0000/0000] hidden
881 15:53:14.554392 PCI: 00:1f.3 [8086/0000] bus ops
882 15:53:14.557663 PCI: 00:1f.3 [8086/a0c8] enabled
883 15:53:14.561331 PCI: 00:1f.5 [8086/0000] bus ops
884 15:53:14.564181 PCI: 00:1f.5 [8086/a0a4] enabled
885 15:53:14.567285 PCI: Leftover static devices:
886 15:53:14.567750 PCI: 00:10.2
887 15:53:14.568074 PCI: 00:10.6
888 15:53:14.570771 PCI: 00:10.7
889 15:53:14.571182 PCI: 00:06.0
890 15:53:14.573954 PCI: 00:07.1
891 15:53:14.574362 PCI: 00:07.2
892 15:53:14.577172 PCI: 00:07.3
893 15:53:14.577699 PCI: 00:09.0
894 15:53:14.578153 PCI: 00:0d.1
895 15:53:14.580848 PCI: 00:0d.2
896 15:53:14.581261 PCI: 00:0d.3
897 15:53:14.584400 PCI: 00:0e.0
898 15:53:14.584814 PCI: 00:12.0
899 15:53:14.585166 PCI: 00:12.6
900 15:53:14.587312 PCI: 00:13.0
901 15:53:14.587728 PCI: 00:14.1
902 15:53:14.590687 PCI: 00:16.1
903 15:53:14.591111 PCI: 00:16.2
904 15:53:14.591434 PCI: 00:16.3
905 15:53:14.594097 PCI: 00:16.4
906 15:53:14.594538 PCI: 00:16.5
907 15:53:14.597402 PCI: 00:17.0
908 15:53:14.597830 PCI: 00:19.2
909 15:53:14.600719 PCI: 00:1e.1
910 15:53:14.601129 PCI: 00:1f.1
911 15:53:14.601477 PCI: 00:1f.4
912 15:53:14.603962 PCI: 00:1f.6
913 15:53:14.604389 PCI: 00:1f.7
914 15:53:14.607713 PCI: Check your devicetree.cb.
915 15:53:14.610507 PCI: 00:02.0 scanning...
916 15:53:14.614071 scan_generic_bus for PCI: 00:02.0
917 15:53:14.617734 scan_generic_bus for PCI: 00:02.0 done
918 15:53:14.624126 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 15:53:14.624540 PCI: 00:04.0 scanning...
920 15:53:14.627064 scan_generic_bus for PCI: 00:04.0
921 15:53:14.630757 GENERIC: 0.0 enabled
922 15:53:14.637050 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 15:53:14.640609 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 15:53:14.644256 PCI: 00:0d.0 scanning...
925 15:53:14.647021 scan_static_bus for PCI: 00:0d.0
926 15:53:14.650587 USB0 port 0 enabled
927 15:53:14.653610 USB0 port 0 scanning...
928 15:53:14.657087 scan_static_bus for USB0 port 0
929 15:53:14.657499 USB3 port 0 enabled
930 15:53:14.660411 USB3 port 1 enabled
931 15:53:14.660874 USB3 port 2 disabled
932 15:53:14.663533 USB3 port 3 disabled
933 15:53:14.667486 USB3 port 0 scanning...
934 15:53:14.670344 scan_static_bus for USB3 port 0
935 15:53:14.674020 scan_static_bus for USB3 port 0 done
936 15:53:14.676849 scan_bus: bus USB3 port 0 finished in 6 msecs
937 15:53:14.680304 USB3 port 1 scanning...
938 15:53:14.683823 scan_static_bus for USB3 port 1
939 15:53:14.686830 scan_static_bus for USB3 port 1 done
940 15:53:14.693427 scan_bus: bus USB3 port 1 finished in 6 msecs
941 15:53:14.696903 scan_static_bus for USB0 port 0 done
942 15:53:14.700191 scan_bus: bus USB0 port 0 finished in 43 msecs
943 15:53:14.703852 scan_static_bus for PCI: 00:0d.0 done
944 15:53:14.710143 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 15:53:14.713596 PCI: 00:14.0 scanning...
946 15:53:14.717022 scan_static_bus for PCI: 00:14.0
947 15:53:14.717439 USB0 port 0 enabled
948 15:53:14.720480 USB0 port 0 scanning...
949 15:53:14.723592 scan_static_bus for USB0 port 0
950 15:53:14.727144 USB2 port 0 disabled
951 15:53:14.727558 USB2 port 1 enabled
952 15:53:14.729976 USB2 port 2 enabled
953 15:53:14.733784 USB2 port 3 disabled
954 15:53:14.734317 USB2 port 4 enabled
955 15:53:14.736682 USB2 port 5 disabled
956 15:53:14.737100 USB2 port 6 disabled
957 15:53:14.740223 USB2 port 7 disabled
958 15:53:14.743142 USB2 port 8 disabled
959 15:53:14.743561 USB2 port 9 disabled
960 15:53:14.746925 USB3 port 0 disabled
961 15:53:14.750095 USB3 port 1 enabled
962 15:53:14.750579 USB3 port 2 disabled
963 15:53:14.753134 USB3 port 3 disabled
964 15:53:14.756863 USB2 port 1 scanning...
965 15:53:14.759784 scan_static_bus for USB2 port 1
966 15:53:14.763318 scan_static_bus for USB2 port 1 done
967 15:53:14.766483 scan_bus: bus USB2 port 1 finished in 6 msecs
968 15:53:14.769826 USB2 port 2 scanning...
969 15:53:14.773613 scan_static_bus for USB2 port 2
970 15:53:14.776662 scan_static_bus for USB2 port 2 done
971 15:53:14.783065 scan_bus: bus USB2 port 2 finished in 6 msecs
972 15:53:14.783506 USB2 port 4 scanning...
973 15:53:14.786366 scan_static_bus for USB2 port 4
974 15:53:14.789857 scan_static_bus for USB2 port 4 done
975 15:53:14.796562 scan_bus: bus USB2 port 4 finished in 6 msecs
976 15:53:14.799493 USB3 port 1 scanning...
977 15:53:14.802991 scan_static_bus for USB3 port 1
978 15:53:14.806302 scan_static_bus for USB3 port 1 done
979 15:53:14.809798 scan_bus: bus USB3 port 1 finished in 6 msecs
980 15:53:14.812789 scan_static_bus for USB0 port 0 done
981 15:53:14.819858 scan_bus: bus USB0 port 0 finished in 93 msecs
982 15:53:14.822802 scan_static_bus for PCI: 00:14.0 done
983 15:53:14.826101 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
984 15:53:14.829473 PCI: 00:14.3 scanning...
985 15:53:14.833223 scan_static_bus for PCI: 00:14.3
986 15:53:14.836048 GENERIC: 0.0 enabled
987 15:53:14.839784 scan_static_bus for PCI: 00:14.3 done
988 15:53:14.842716 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 15:53:14.846302 PCI: 00:15.0 scanning...
990 15:53:14.849412 scan_static_bus for PCI: 00:15.0
991 15:53:14.852899 I2C: 00:1a enabled
992 15:53:14.853314 I2C: 00:31 enabled
993 15:53:14.856376 I2C: 00:32 enabled
994 15:53:14.859487 scan_static_bus for PCI: 00:15.0 done
995 15:53:14.862592 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 15:53:14.865888 PCI: 00:15.1 scanning...
997 15:53:14.869576 scan_static_bus for PCI: 00:15.1
998 15:53:14.872617 I2C: 00:10 enabled
999 15:53:14.876169 scan_static_bus for PCI: 00:15.1 done
1000 15:53:14.879226 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 15:53:14.882944 PCI: 00:15.2 scanning...
1002 15:53:14.885904 scan_static_bus for PCI: 00:15.2
1003 15:53:14.889171 scan_static_bus for PCI: 00:15.2 done
1004 15:53:14.896245 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 15:53:14.899214 PCI: 00:15.3 scanning...
1006 15:53:14.902897 scan_static_bus for PCI: 00:15.3
1007 15:53:14.906068 scan_static_bus for PCI: 00:15.3 done
1008 15:53:14.909562 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 15:53:14.912469 PCI: 00:19.1 scanning...
1010 15:53:14.916121 scan_static_bus for PCI: 00:19.1
1011 15:53:14.919271 I2C: 00:15 enabled
1012 15:53:14.922746 scan_static_bus for PCI: 00:19.1 done
1013 15:53:14.926075 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 15:53:14.929108 PCI: 00:1d.0 scanning...
1015 15:53:14.932516 do_pci_scan_bridge for PCI: 00:1d.0
1016 15:53:14.935863 PCI: pci_scan_bus for bus 01
1017 15:53:14.939556 PCI: 01:00.0 [15b7/5009] enabled
1018 15:53:14.942484 GENERIC: 0.0 enabled
1019 15:53:14.946128 Enabling Common Clock Configuration
1020 15:53:14.949767 L1 Sub-State supported from root port 29
1021 15:53:14.952611 L1 Sub-State Support = 0x5
1022 15:53:14.956199 CommonModeRestoreTime = 0x28
1023 15:53:14.959291 Power On Value = 0x16, Power On Scale = 0x0
1024 15:53:14.962770 ASPM: Enabled L1
1025 15:53:14.965730 PCIe: Max_Payload_Size adjusted to 128
1026 15:53:14.969144 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 15:53:14.972866 PCI: 00:1e.2 scanning...
1028 15:53:14.975658 scan_generic_bus for PCI: 00:1e.2
1029 15:53:14.979339 SPI: 00 enabled
1030 15:53:14.982449 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 15:53:14.989503 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 15:53:14.989971 PCI: 00:1e.3 scanning...
1033 15:53:14.996735 scan_generic_bus for PCI: 00:1e.3
1034 15:53:14.997183 SPI: 00 enabled
1035 15:53:15.003318 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 15:53:15.006596 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 15:53:15.009598 PCI: 00:1f.0 scanning...
1038 15:53:15.013270 scan_static_bus for PCI: 00:1f.0
1039 15:53:15.016277 PNP: 0c09.0 enabled
1040 15:53:15.016733 PNP: 0c09.0 scanning...
1041 15:53:15.019828 scan_static_bus for PNP: 0c09.0
1042 15:53:15.026764 scan_static_bus for PNP: 0c09.0 done
1043 15:53:15.030192 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 15:53:15.033282 scan_static_bus for PCI: 00:1f.0 done
1045 15:53:15.039854 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 15:53:15.040312 PCI: 00:1f.2 scanning...
1047 15:53:15.043025 scan_static_bus for PCI: 00:1f.2
1048 15:53:15.046337 GENERIC: 0.0 enabled
1049 15:53:15.049633 GENERIC: 0.0 scanning...
1050 15:53:15.053011 scan_static_bus for GENERIC: 0.0
1051 15:53:15.053426 GENERIC: 0.0 enabled
1052 15:53:15.056551 GENERIC: 1.0 enabled
1053 15:53:15.059669 scan_static_bus for GENERIC: 0.0 done
1054 15:53:15.065873 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 15:53:15.069456 scan_static_bus for PCI: 00:1f.2 done
1056 15:53:15.072465 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 15:53:15.075961 PCI: 00:1f.3 scanning...
1058 15:53:15.079427 scan_static_bus for PCI: 00:1f.3
1059 15:53:15.082483 scan_static_bus for PCI: 00:1f.3 done
1060 15:53:15.089100 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 15:53:15.089191 PCI: 00:1f.5 scanning...
1062 15:53:15.096419 scan_generic_bus for PCI: 00:1f.5
1063 15:53:15.099569 scan_generic_bus for PCI: 00:1f.5 done
1064 15:53:15.102748 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 15:53:15.109429 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1066 15:53:15.112552 scan_static_bus for Root Device done
1067 15:53:15.116174 scan_bus: bus Root Device finished in 735 msecs
1068 15:53:15.116264 done
1069 15:53:15.122315 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1070 15:53:15.126091 Chrome EC: UHEPI supported
1071 15:53:15.132337 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 15:53:15.139469 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 15:53:15.142303 SPI flash protection: WPSW=0 SRP0=1
1074 15:53:15.148974 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 15:53:15.152423 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 15:53:15.155818 found VGA at PCI: 00:02.0
1077 15:53:15.159298 Setting up VGA for PCI: 00:02.0
1078 15:53:15.165515 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 15:53:15.169185 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 15:53:15.172213 Allocating resources...
1081 15:53:15.175796 Reading resources...
1082 15:53:15.178973 Root Device read_resources bus 0 link: 0
1083 15:53:15.182569 DOMAIN: 0000 read_resources bus 0 link: 0
1084 15:53:15.189178 PCI: 00:04.0 read_resources bus 1 link: 0
1085 15:53:15.192397 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 15:53:15.198617 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 15:53:15.202286 USB0 port 0 read_resources bus 0 link: 0
1088 15:53:15.208941 USB0 port 0 read_resources bus 0 link: 0 done
1089 15:53:15.212214 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 15:53:15.215707 PCI: 00:14.0 read_resources bus 0 link: 0
1091 15:53:15.222381 USB0 port 0 read_resources bus 0 link: 0
1092 15:53:15.225513 USB0 port 0 read_resources bus 0 link: 0 done
1093 15:53:15.232715 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 15:53:15.235362 PCI: 00:14.3 read_resources bus 0 link: 0
1095 15:53:15.241996 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 15:53:15.244990 PCI: 00:15.0 read_resources bus 0 link: 0
1097 15:53:15.252244 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 15:53:15.255957 PCI: 00:15.1 read_resources bus 0 link: 0
1099 15:53:15.262115 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 15:53:15.265591 PCI: 00:19.1 read_resources bus 0 link: 0
1101 15:53:15.272651 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 15:53:15.275584 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 15:53:15.282643 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 15:53:15.285729 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 15:53:15.292378 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 15:53:15.296107 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 15:53:15.302641 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 15:53:15.305875 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 15:53:15.312677 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 15:53:15.315680 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 15:53:15.318959 GENERIC: 0.0 read_resources bus 0 link: 0
1112 15:53:15.325936 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 15:53:15.329289 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 15:53:15.337086 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 15:53:15.340153 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 15:53:15.347127 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 15:53:15.350326 Root Device read_resources bus 0 link: 0 done
1118 15:53:15.353770 Done reading resources.
1119 15:53:15.360172 Show resources in subtree (Root Device)...After reading.
1120 15:53:15.363155 Root Device child on link 0 DOMAIN: 0000
1121 15:53:15.367102 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 15:53:15.376558 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 15:53:15.386827 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 15:53:15.389606 PCI: 00:00.0
1125 15:53:15.400019 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 15:53:15.406380 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 15:53:15.416201 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 15:53:15.426232 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 15:53:15.436286 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 15:53:15.446211 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 15:53:15.455940 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 15:53:15.462704 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 15:53:15.472784 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 15:53:15.482570 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 15:53:15.492711 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 15:53:15.502405 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 15:53:15.509433 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 15:53:15.519477 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 15:53:15.529325 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 15:53:15.539124 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 15:53:15.549276 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 15:53:15.559226 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 15:53:15.565666 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 15:53:15.575504 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 15:53:15.579195 PCI: 00:02.0
1146 15:53:15.588926 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 15:53:15.598952 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 15:53:15.608928 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 15:53:15.612065 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 15:53:15.622182 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 15:53:15.625853 GENERIC: 0.0
1152 15:53:15.626413 PCI: 00:05.0
1153 15:53:15.635396 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 15:53:15.638838 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 15:53:15.642097 GENERIC: 0.0
1156 15:53:15.642612 PCI: 00:08.0
1157 15:53:15.652314 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 15:53:15.655693 PCI: 00:0a.0
1159 15:53:15.658912 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 15:53:15.668928 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 15:53:15.675424 USB0 port 0 child on link 0 USB3 port 0
1162 15:53:15.675833 USB3 port 0
1163 15:53:15.678587 USB3 port 1
1164 15:53:15.679002 USB3 port 2
1165 15:53:15.682184 USB3 port 3
1166 15:53:15.685506 PCI: 00:14.0 child on link 0 USB0 port 0
1167 15:53:15.695260 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 15:53:15.698674 USB0 port 0 child on link 0 USB2 port 0
1169 15:53:15.701581 USB2 port 0
1170 15:53:15.705226 USB2 port 1
1171 15:53:15.705591 USB2 port 2
1172 15:53:15.708226 USB2 port 3
1173 15:53:15.708583 USB2 port 4
1174 15:53:15.711847 USB2 port 5
1175 15:53:15.712250 USB2 port 6
1176 15:53:15.714829 USB2 port 7
1177 15:53:15.715248 USB2 port 8
1178 15:53:15.718513 USB2 port 9
1179 15:53:15.718947 USB3 port 0
1180 15:53:15.722032 USB3 port 1
1181 15:53:15.722609 USB3 port 2
1182 15:53:15.725131 USB3 port 3
1183 15:53:15.725536 PCI: 00:14.2
1184 15:53:15.734911 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 15:53:15.745217 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 15:53:15.751510 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 15:53:15.761851 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 15:53:15.762354 GENERIC: 0.0
1189 15:53:15.768355 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 15:53:15.778322 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 15:53:15.778784 I2C: 00:1a
1192 15:53:15.781752 I2C: 00:31
1193 15:53:15.782158 I2C: 00:32
1194 15:53:15.784574 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 15:53:15.794841 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 15:53:15.798183 I2C: 00:10
1197 15:53:15.798691 PCI: 00:15.2
1198 15:53:15.808081 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 15:53:15.811454 PCI: 00:15.3
1200 15:53:15.821300 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 15:53:15.821784 PCI: 00:16.0
1202 15:53:15.831584 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 15:53:15.834667 PCI: 00:19.0
1204 15:53:15.838204 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 15:53:15.847878 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 15:53:15.851410 I2C: 00:15
1207 15:53:15.854373 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 15:53:15.864270 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 15:53:15.871061 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 15:53:15.880792 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 15:53:15.884498 GENERIC: 0.0
1212 15:53:15.884958 PCI: 01:00.0
1213 15:53:15.894402 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 15:53:15.904458 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1215 15:53:15.907307 PCI: 00:1e.0
1216 15:53:15.917493 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1217 15:53:15.920818 PCI: 00:1e.2 child on link 0 SPI: 00
1218 15:53:15.930791 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 15:53:15.934587 SPI: 00
1220 15:53:15.937631 PCI: 00:1e.3 child on link 0 SPI: 00
1221 15:53:15.947208 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 15:53:15.947700 SPI: 00
1223 15:53:15.953832 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1224 15:53:15.960747 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1225 15:53:15.964096 PNP: 0c09.0
1226 15:53:15.970801 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1227 15:53:15.977114 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1228 15:53:15.987324 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1229 15:53:15.993923 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1230 15:53:16.000431 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1231 15:53:16.000897 GENERIC: 0.0
1232 15:53:16.003762 GENERIC: 1.0
1233 15:53:16.004255 PCI: 00:1f.3
1234 15:53:16.013999 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1235 15:53:16.023618 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1236 15:53:16.027113 PCI: 00:1f.5
1237 15:53:16.037092 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1238 15:53:16.040473 CPU_CLUSTER: 0 child on link 0 APIC: 00
1239 15:53:16.040866 APIC: 00
1240 15:53:16.043764 APIC: 01
1241 15:53:16.044134 APIC: 03
1242 15:53:16.044440 APIC: 05
1243 15:53:16.046921 APIC: 07
1244 15:53:16.047256 APIC: 06
1245 15:53:16.050447 APIC: 02
1246 15:53:16.050820 APIC: 04
1247 15:53:16.056624 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1248 15:53:16.063737 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1249 15:53:16.070282 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1250 15:53:16.076903 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1251 15:53:16.080387 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1252 15:53:16.083425 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1253 15:53:16.090219 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1254 15:53:16.100154 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1255 15:53:16.106545 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1256 15:53:16.113265 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1257 15:53:16.120348 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1258 15:53:16.126498 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1259 15:53:16.136553 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1260 15:53:16.142952 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1261 15:53:16.146690 DOMAIN: 0000: Resource ranges:
1262 15:53:16.149665 * Base: 1000, Size: 800, Tag: 100
1263 15:53:16.152889 * Base: 1900, Size: e700, Tag: 100
1264 15:53:16.160117 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1265 15:53:16.166320 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1266 15:53:16.173235 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1267 15:53:16.179744 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1268 15:53:16.186129 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1269 15:53:16.196203 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1270 15:53:16.202948 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1271 15:53:16.209813 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1272 15:53:16.219401 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1273 15:53:16.225829 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1274 15:53:16.232793 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1275 15:53:16.242935 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1276 15:53:16.248903 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1277 15:53:16.256029 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1278 15:53:16.266093 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1279 15:53:16.272601 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1280 15:53:16.279195 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1281 15:53:16.285852 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1282 15:53:16.295702 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1283 15:53:16.302326 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1284 15:53:16.312435 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1285 15:53:16.318746 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1286 15:53:16.325489 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1287 15:53:16.332264 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1288 15:53:16.342084 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1289 15:53:16.345269 DOMAIN: 0000: Resource ranges:
1290 15:53:16.348765 * Base: 7fc00000, Size: 40400000, Tag: 200
1291 15:53:16.351789 * Base: d0000000, Size: 28000000, Tag: 200
1292 15:53:16.358348 * Base: fa000000, Size: 1000000, Tag: 200
1293 15:53:16.361810 * Base: fb001000, Size: 2fff000, Tag: 200
1294 15:53:16.365295 * Base: fe010000, Size: 2e000, Tag: 200
1295 15:53:16.372002 * Base: fe03f000, Size: d41000, Tag: 200
1296 15:53:16.375598 * Base: fed88000, Size: 8000, Tag: 200
1297 15:53:16.378532 * Base: fed93000, Size: d000, Tag: 200
1298 15:53:16.381971 * Base: feda2000, Size: 1e000, Tag: 200
1299 15:53:16.385237 * Base: fede0000, Size: 1220000, Tag: 200
1300 15:53:16.392067 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1301 15:53:16.398397 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1302 15:53:16.405297 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1303 15:53:16.411890 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1304 15:53:16.418755 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1305 15:53:16.425059 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1306 15:53:16.431710 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1307 15:53:16.438201 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1308 15:53:16.444867 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1309 15:53:16.451434 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1310 15:53:16.458196 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1311 15:53:16.464510 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1312 15:53:16.471530 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1313 15:53:16.478320 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1314 15:53:16.484922 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1315 15:53:16.491108 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1316 15:53:16.498123 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1317 15:53:16.504495 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1318 15:53:16.510766 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1319 15:53:16.517730 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1320 15:53:16.524281 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1321 15:53:16.530928 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1322 15:53:16.537359 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1323 15:53:16.543890 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1324 15:53:16.553816 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1325 15:53:16.557247 PCI: 00:1d.0: Resource ranges:
1326 15:53:16.560273 * Base: 7fc00000, Size: 100000, Tag: 200
1327 15:53:16.567083 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1328 15:53:16.573711 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1329 15:53:16.583392 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1330 15:53:16.590059 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1331 15:53:16.593839 Root Device assign_resources, bus 0 link: 0
1332 15:53:16.596870 DOMAIN: 0000 assign_resources, bus 0 link: 0
1333 15:53:16.606987 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1334 15:53:16.613656 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1335 15:53:16.623953 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1336 15:53:16.630842 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1337 15:53:16.637222 PCI: 00:04.0 assign_resources, bus 1 link: 0
1338 15:53:16.640806 PCI: 00:04.0 assign_resources, bus 1 link: 0
1339 15:53:16.647506 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1340 15:53:16.657717 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1341 15:53:16.664486 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1342 15:53:16.671237 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1343 15:53:16.674045 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1344 15:53:16.684095 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1345 15:53:16.687303 PCI: 00:14.0 assign_resources, bus 0 link: 0
1346 15:53:16.690722 PCI: 00:14.0 assign_resources, bus 0 link: 0
1347 15:53:16.701028 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1348 15:53:16.707355 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1349 15:53:16.717151 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1350 15:53:16.720965 PCI: 00:14.3 assign_resources, bus 0 link: 0
1351 15:53:16.727744 PCI: 00:14.3 assign_resources, bus 0 link: 0
1352 15:53:16.733802 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1353 15:53:16.737633 PCI: 00:15.0 assign_resources, bus 0 link: 0
1354 15:53:16.744106 PCI: 00:15.0 assign_resources, bus 0 link: 0
1355 15:53:16.750536 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1356 15:53:16.757261 PCI: 00:15.1 assign_resources, bus 0 link: 0
1357 15:53:16.760786 PCI: 00:15.1 assign_resources, bus 0 link: 0
1358 15:53:16.770618 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1359 15:53:16.777175 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1360 15:53:16.783874 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1361 15:53:16.794149 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1362 15:53:16.797459 PCI: 00:19.1 assign_resources, bus 0 link: 0
1363 15:53:16.803990 PCI: 00:19.1 assign_resources, bus 0 link: 0
1364 15:53:16.810815 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1365 15:53:16.820648 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1366 15:53:16.830853 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1367 15:53:16.833721 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1368 15:53:16.844302 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1369 15:53:16.850256 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1370 15:53:16.853726 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 15:53:16.864730 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1372 15:53:16.867590 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1373 15:53:16.874160 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1374 15:53:16.880993 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1375 15:53:16.887567 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1376 15:53:16.891006 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1377 15:53:16.893825 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 15:53:16.900861 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1379 15:53:16.904201 LPC: Trying to open IO window from 800 size 1ff
1380 15:53:16.914123 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1381 15:53:16.920717 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1382 15:53:16.930538 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1383 15:53:16.934468 DOMAIN: 0000 assign_resources, bus 0 link: 0
1384 15:53:16.941058 Root Device assign_resources, bus 0 link: 0
1385 15:53:16.941600 Done setting resources.
1386 15:53:16.946943 Show resources in subtree (Root Device)...After assigning values.
1387 15:53:16.950759 Root Device child on link 0 DOMAIN: 0000
1388 15:53:16.957115 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1389 15:53:16.966795 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1390 15:53:16.977433 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1391 15:53:16.977958 PCI: 00:00.0
1392 15:53:16.986885 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1393 15:53:16.997078 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1394 15:53:17.006561 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1395 15:53:17.016849 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1396 15:53:17.023170 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1397 15:53:17.033274 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1398 15:53:17.043147 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1399 15:53:17.053133 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1400 15:53:17.062763 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1401 15:53:17.072856 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1402 15:53:17.079990 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1403 15:53:17.089542 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1404 15:53:17.099183 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1405 15:53:17.108954 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1406 15:53:17.118919 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1407 15:53:17.125588 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1408 15:53:17.139518 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1409 15:53:17.145942 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1410 15:53:17.155219 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1411 15:53:17.165570 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1412 15:53:17.168379 PCI: 00:02.0
1413 15:53:17.178843 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1414 15:53:17.188616 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1415 15:53:17.198231 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1416 15:53:17.201506 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1417 15:53:17.211708 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1418 15:53:17.215163 GENERIC: 0.0
1419 15:53:17.215766 PCI: 00:05.0
1420 15:53:17.228327 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1421 15:53:17.231384 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1422 15:53:17.231849 GENERIC: 0.0
1423 15:53:17.234491 PCI: 00:08.0
1424 15:53:17.244701 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1425 15:53:17.247848 PCI: 00:0a.0
1426 15:53:17.251369 PCI: 00:0d.0 child on link 0 USB0 port 0
1427 15:53:17.261338 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1428 15:53:17.264208 USB0 port 0 child on link 0 USB3 port 0
1429 15:53:17.267885 USB3 port 0
1430 15:53:17.270967 USB3 port 1
1431 15:53:17.271424 USB3 port 2
1432 15:53:17.274335 USB3 port 3
1433 15:53:17.277748 PCI: 00:14.0 child on link 0 USB0 port 0
1434 15:53:17.287733 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1435 15:53:17.290654 USB0 port 0 child on link 0 USB2 port 0
1436 15:53:17.294120 USB2 port 0
1437 15:53:17.294592 USB2 port 1
1438 15:53:17.297455 USB2 port 2
1439 15:53:17.300830 USB2 port 3
1440 15:53:17.301239 USB2 port 4
1441 15:53:17.304403 USB2 port 5
1442 15:53:17.304835 USB2 port 6
1443 15:53:17.307743 USB2 port 7
1444 15:53:17.308155 USB2 port 8
1445 15:53:17.310677 USB2 port 9
1446 15:53:17.311110 USB3 port 0
1447 15:53:17.314093 USB3 port 1
1448 15:53:17.314637 USB3 port 2
1449 15:53:17.317747 USB3 port 3
1450 15:53:17.318172 PCI: 00:14.2
1451 15:53:17.327252 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1452 15:53:17.340492 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1453 15:53:17.344313 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1454 15:53:17.354147 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1455 15:53:17.356960 GENERIC: 0.0
1456 15:53:17.360623 PCI: 00:15.0 child on link 0 I2C: 00:1a
1457 15:53:17.370150 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1458 15:53:17.370636 I2C: 00:1a
1459 15:53:17.373762 I2C: 00:31
1460 15:53:17.374190 I2C: 00:32
1461 15:53:17.380401 PCI: 00:15.1 child on link 0 I2C: 00:10
1462 15:53:17.390123 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1463 15:53:17.390617 I2C: 00:10
1464 15:53:17.393838 PCI: 00:15.2
1465 15:53:17.403721 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1466 15:53:17.404160 PCI: 00:15.3
1467 15:53:17.417243 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1468 15:53:17.417811 PCI: 00:16.0
1469 15:53:17.426771 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1470 15:53:17.430006 PCI: 00:19.0
1471 15:53:17.433095 PCI: 00:19.1 child on link 0 I2C: 00:15
1472 15:53:17.443536 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1473 15:53:17.446494 I2C: 00:15
1474 15:53:17.449864 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1475 15:53:17.459646 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1476 15:53:17.469743 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1477 15:53:17.479792 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1478 15:53:17.483245 GENERIC: 0.0
1479 15:53:17.486234 PCI: 01:00.0
1480 15:53:17.496477 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1481 15:53:17.505993 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1482 15:53:17.506461 PCI: 00:1e.0
1483 15:53:17.519407 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1484 15:53:17.522531 PCI: 00:1e.2 child on link 0 SPI: 00
1485 15:53:17.532466 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1486 15:53:17.532900 SPI: 00
1487 15:53:17.539160 PCI: 00:1e.3 child on link 0 SPI: 00
1488 15:53:17.549271 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1489 15:53:17.549709 SPI: 00
1490 15:53:17.552527 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1491 15:53:17.562690 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1492 15:53:17.563146 PNP: 0c09.0
1493 15:53:17.572215 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1494 15:53:17.575902 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1495 15:53:17.585951 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1496 15:53:17.595703 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1497 15:53:17.598675 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1498 15:53:17.602366 GENERIC: 0.0
1499 15:53:17.605426 GENERIC: 1.0
1500 15:53:17.605849 PCI: 00:1f.3
1501 15:53:17.615679 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1502 15:53:17.625283 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1503 15:53:17.628668 PCI: 00:1f.5
1504 15:53:17.639139 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1505 15:53:17.642489 CPU_CLUSTER: 0 child on link 0 APIC: 00
1506 15:53:17.645842 APIC: 00
1507 15:53:17.646260 APIC: 01
1508 15:53:17.646671 APIC: 03
1509 15:53:17.648466 APIC: 05
1510 15:53:17.649039 APIC: 07
1511 15:53:17.652335 APIC: 06
1512 15:53:17.652909 APIC: 02
1513 15:53:17.653386 APIC: 04
1514 15:53:17.655632 Done allocating resources.
1515 15:53:17.662245 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1516 15:53:17.668879 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1517 15:53:17.672353 Configure GPIOs for I2S audio on UP4.
1518 15:53:17.678526 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1519 15:53:17.681734 Enabling resources...
1520 15:53:17.685089 PCI: 00:00.0 subsystem <- 8086/9a12
1521 15:53:17.688944 PCI: 00:00.0 cmd <- 06
1522 15:53:17.691941 PCI: 00:02.0 subsystem <- 8086/9a40
1523 15:53:17.692416 PCI: 00:02.0 cmd <- 03
1524 15:53:17.699212 PCI: 00:04.0 subsystem <- 8086/9a03
1525 15:53:17.699649 PCI: 00:04.0 cmd <- 02
1526 15:53:17.702494 PCI: 00:05.0 subsystem <- 8086/9a19
1527 15:53:17.705999 PCI: 00:05.0 cmd <- 02
1528 15:53:17.709131 PCI: 00:08.0 subsystem <- 8086/9a11
1529 15:53:17.711989 PCI: 00:08.0 cmd <- 06
1530 15:53:17.715634 PCI: 00:0d.0 subsystem <- 8086/9a13
1531 15:53:17.718752 PCI: 00:0d.0 cmd <- 02
1532 15:53:17.722508 PCI: 00:14.0 subsystem <- 8086/a0ed
1533 15:53:17.725425 PCI: 00:14.0 cmd <- 02
1534 15:53:17.728508 PCI: 00:14.2 subsystem <- 8086/a0ef
1535 15:53:17.731989 PCI: 00:14.2 cmd <- 02
1536 15:53:17.735577 PCI: 00:14.3 subsystem <- 8086/a0f0
1537 15:53:17.735990 PCI: 00:14.3 cmd <- 02
1538 15:53:17.742527 PCI: 00:15.0 subsystem <- 8086/a0e8
1539 15:53:17.742959 PCI: 00:15.0 cmd <- 02
1540 15:53:17.745728 PCI: 00:15.1 subsystem <- 8086/a0e9
1541 15:53:17.748859 PCI: 00:15.1 cmd <- 02
1542 15:53:17.752122 PCI: 00:15.2 subsystem <- 8086/a0ea
1543 15:53:17.755648 PCI: 00:15.2 cmd <- 02
1544 15:53:17.759076 PCI: 00:15.3 subsystem <- 8086/a0eb
1545 15:53:17.761782 PCI: 00:15.3 cmd <- 02
1546 15:53:17.765410 PCI: 00:16.0 subsystem <- 8086/a0e0
1547 15:53:17.768559 PCI: 00:16.0 cmd <- 02
1548 15:53:17.771988 PCI: 00:19.1 subsystem <- 8086/a0c6
1549 15:53:17.775338 PCI: 00:19.1 cmd <- 02
1550 15:53:17.779039 PCI: 00:1d.0 bridge ctrl <- 0013
1551 15:53:17.782018 PCI: 00:1d.0 subsystem <- 8086/a0b0
1552 15:53:17.782616 PCI: 00:1d.0 cmd <- 06
1553 15:53:17.788745 PCI: 00:1e.0 subsystem <- 8086/a0a8
1554 15:53:17.789207 PCI: 00:1e.0 cmd <- 06
1555 15:53:17.792517 PCI: 00:1e.2 subsystem <- 8086/a0aa
1556 15:53:17.795636 PCI: 00:1e.2 cmd <- 06
1557 15:53:17.798879 PCI: 00:1e.3 subsystem <- 8086/a0ab
1558 15:53:17.802235 PCI: 00:1e.3 cmd <- 02
1559 15:53:17.805740 PCI: 00:1f.0 subsystem <- 8086/a087
1560 15:53:17.809043 PCI: 00:1f.0 cmd <- 407
1561 15:53:17.812234 PCI: 00:1f.3 subsystem <- 8086/a0c8
1562 15:53:17.815684 PCI: 00:1f.3 cmd <- 02
1563 15:53:17.819294 PCI: 00:1f.5 subsystem <- 8086/a0a4
1564 15:53:17.822222 PCI: 00:1f.5 cmd <- 406
1565 15:53:17.825699 PCI: 01:00.0 cmd <- 02
1566 15:53:17.830103 done.
1567 15:53:17.833038 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1568 15:53:17.836672 Initializing devices...
1569 15:53:17.839785 Root Device init
1570 15:53:17.843208 Chrome EC: Set SMI mask to 0x0000000000000000
1571 15:53:17.849821 Chrome EC: clear events_b mask to 0x0000000000000000
1572 15:53:17.856200 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1573 15:53:17.862986 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1574 15:53:17.869604 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1575 15:53:17.873067 Chrome EC: Set WAKE mask to 0x0000000000000000
1576 15:53:17.880631 fw_config match found: DB_USB=USB3_ACTIVE
1577 15:53:17.883834 Configure Right Type-C port orientation for retimer
1578 15:53:17.886944 Root Device init finished in 45 msecs
1579 15:53:17.891338 PCI: 00:00.0 init
1580 15:53:17.894834 CPU TDP = 9 Watts
1581 15:53:17.895244 CPU PL1 = 9 Watts
1582 15:53:17.897843 CPU PL2 = 40 Watts
1583 15:53:17.901482 CPU PL4 = 83 Watts
1584 15:53:17.904741 PCI: 00:00.0 init finished in 8 msecs
1585 15:53:17.905209 PCI: 00:02.0 init
1586 15:53:17.907847 GMA: Found VBT in CBFS
1587 15:53:17.911459 GMA: Found valid VBT in CBFS
1588 15:53:17.917761 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1589 15:53:17.924752 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1590 15:53:17.927949 PCI: 00:02.0 init finished in 18 msecs
1591 15:53:17.930974 PCI: 00:05.0 init
1592 15:53:17.934858 PCI: 00:05.0 init finished in 0 msecs
1593 15:53:17.937656 PCI: 00:08.0 init
1594 15:53:17.941528 PCI: 00:08.0 init finished in 0 msecs
1595 15:53:17.944522 PCI: 00:14.0 init
1596 15:53:17.947827 PCI: 00:14.0 init finished in 0 msecs
1597 15:53:17.950906 PCI: 00:14.2 init
1598 15:53:17.954652 PCI: 00:14.2 init finished in 0 msecs
1599 15:53:17.955095 PCI: 00:15.0 init
1600 15:53:17.957703 I2C bus 0 version 0x3230302a
1601 15:53:17.960952 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1602 15:53:17.967559 PCI: 00:15.0 init finished in 6 msecs
1603 15:53:17.968006 PCI: 00:15.1 init
1604 15:53:17.971267 I2C bus 1 version 0x3230302a
1605 15:53:17.974704 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1606 15:53:17.977850 PCI: 00:15.1 init finished in 6 msecs
1607 15:53:17.981436 PCI: 00:15.2 init
1608 15:53:17.984756 I2C bus 2 version 0x3230302a
1609 15:53:17.987691 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1610 15:53:17.991026 PCI: 00:15.2 init finished in 6 msecs
1611 15:53:17.994809 PCI: 00:15.3 init
1612 15:53:17.998169 I2C bus 3 version 0x3230302a
1613 15:53:18.001179 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1614 15:53:18.004433 PCI: 00:15.3 init finished in 6 msecs
1615 15:53:18.007944 PCI: 00:16.0 init
1616 15:53:18.010928 PCI: 00:16.0 init finished in 0 msecs
1617 15:53:18.014543 PCI: 00:19.1 init
1618 15:53:18.014970 I2C bus 5 version 0x3230302a
1619 15:53:18.021107 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1620 15:53:18.024542 PCI: 00:19.1 init finished in 6 msecs
1621 15:53:18.024958 PCI: 00:1d.0 init
1622 15:53:18.027595 Initializing PCH PCIe bridge.
1623 15:53:18.031035 PCI: 00:1d.0 init finished in 3 msecs
1624 15:53:18.035410 PCI: 00:1f.0 init
1625 15:53:18.038861 IOAPIC: Initializing IOAPIC at 0xfec00000
1626 15:53:18.045117 IOAPIC: Bootstrap Processor Local APIC = 0x00
1627 15:53:18.045547 IOAPIC: ID = 0x02
1628 15:53:18.048378 IOAPIC: Dumping registers
1629 15:53:18.052022 reg 0x0000: 0x02000000
1630 15:53:18.055142 reg 0x0001: 0x00770020
1631 15:53:18.055558 reg 0x0002: 0x00000000
1632 15:53:18.061795 PCI: 00:1f.0 init finished in 21 msecs
1633 15:53:18.062211 PCI: 00:1f.2 init
1634 15:53:18.064855 Disabling ACPI via APMC.
1635 15:53:18.068719 APMC done.
1636 15:53:18.071634 PCI: 00:1f.2 init finished in 5 msecs
1637 15:53:18.082808 PCI: 01:00.0 init
1638 15:53:18.085948 PCI: 01:00.0 init finished in 0 msecs
1639 15:53:18.089371 PNP: 0c09.0 init
1640 15:53:18.093022 Google Chrome EC uptime: 8.287 seconds
1641 15:53:18.099461 Google Chrome AP resets since EC boot: 1
1642 15:53:18.102943 Google Chrome most recent AP reset causes:
1643 15:53:18.106459 0.483: 32775 shutdown: entering G3
1644 15:53:18.112700 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1645 15:53:18.116326 PNP: 0c09.0 init finished in 22 msecs
1646 15:53:18.121526 Devices initialized
1647 15:53:18.124488 Show all devs... After init.
1648 15:53:18.128043 Root Device: enabled 1
1649 15:53:18.128456 DOMAIN: 0000: enabled 1
1650 15:53:18.131174 CPU_CLUSTER: 0: enabled 1
1651 15:53:18.134806 PCI: 00:00.0: enabled 1
1652 15:53:18.137863 PCI: 00:02.0: enabled 1
1653 15:53:18.138278 PCI: 00:04.0: enabled 1
1654 15:53:18.141389 PCI: 00:05.0: enabled 1
1655 15:53:18.144471 PCI: 00:06.0: enabled 0
1656 15:53:18.148062 PCI: 00:07.0: enabled 0
1657 15:53:18.148474 PCI: 00:07.1: enabled 0
1658 15:53:18.151120 PCI: 00:07.2: enabled 0
1659 15:53:18.155138 PCI: 00:07.3: enabled 0
1660 15:53:18.157683 PCI: 00:08.0: enabled 1
1661 15:53:18.158098 PCI: 00:09.0: enabled 0
1662 15:53:18.161188 PCI: 00:0a.0: enabled 0
1663 15:53:18.164632 PCI: 00:0d.0: enabled 1
1664 15:53:18.165051 PCI: 00:0d.1: enabled 0
1665 15:53:18.167789 PCI: 00:0d.2: enabled 0
1666 15:53:18.171295 PCI: 00:0d.3: enabled 0
1667 15:53:18.174577 PCI: 00:0e.0: enabled 0
1668 15:53:18.175027 PCI: 00:10.2: enabled 1
1669 15:53:18.178154 PCI: 00:10.6: enabled 0
1670 15:53:18.180986 PCI: 00:10.7: enabled 0
1671 15:53:18.184320 PCI: 00:12.0: enabled 0
1672 15:53:18.184760 PCI: 00:12.6: enabled 0
1673 15:53:18.187957 PCI: 00:13.0: enabled 0
1674 15:53:18.191347 PCI: 00:14.0: enabled 1
1675 15:53:18.194288 PCI: 00:14.1: enabled 0
1676 15:53:18.194779 PCI: 00:14.2: enabled 1
1677 15:53:18.197984 PCI: 00:14.3: enabled 1
1678 15:53:18.201174 PCI: 00:15.0: enabled 1
1679 15:53:18.204748 PCI: 00:15.1: enabled 1
1680 15:53:18.205159 PCI: 00:15.2: enabled 1
1681 15:53:18.207542 PCI: 00:15.3: enabled 1
1682 15:53:18.211180 PCI: 00:16.0: enabled 1
1683 15:53:18.211593 PCI: 00:16.1: enabled 0
1684 15:53:18.214447 PCI: 00:16.2: enabled 0
1685 15:53:18.217508 PCI: 00:16.3: enabled 0
1686 15:53:18.220795 PCI: 00:16.4: enabled 0
1687 15:53:18.221231 PCI: 00:16.5: enabled 0
1688 15:53:18.224199 PCI: 00:17.0: enabled 0
1689 15:53:18.228227 PCI: 00:19.0: enabled 0
1690 15:53:18.230945 PCI: 00:19.1: enabled 1
1691 15:53:18.231443 PCI: 00:19.2: enabled 0
1692 15:53:18.234564 PCI: 00:1c.0: enabled 1
1693 15:53:18.237976 PCI: 00:1c.1: enabled 0
1694 15:53:18.241188 PCI: 00:1c.2: enabled 0
1695 15:53:18.241601 PCI: 00:1c.3: enabled 0
1696 15:53:18.244743 PCI: 00:1c.4: enabled 0
1697 15:53:18.247630 PCI: 00:1c.5: enabled 0
1698 15:53:18.248043 PCI: 00:1c.6: enabled 1
1699 15:53:18.251339 PCI: 00:1c.7: enabled 0
1700 15:53:18.254467 PCI: 00:1d.0: enabled 1
1701 15:53:18.257947 PCI: 00:1d.1: enabled 0
1702 15:53:18.258365 PCI: 00:1d.2: enabled 1
1703 15:53:18.260837 PCI: 00:1d.3: enabled 0
1704 15:53:18.264211 PCI: 00:1e.0: enabled 1
1705 15:53:18.267563 PCI: 00:1e.1: enabled 0
1706 15:53:18.268073 PCI: 00:1e.2: enabled 1
1707 15:53:18.270932 PCI: 00:1e.3: enabled 1
1708 15:53:18.273942 PCI: 00:1f.0: enabled 1
1709 15:53:18.277298 PCI: 00:1f.1: enabled 0
1710 15:53:18.277714 PCI: 00:1f.2: enabled 1
1711 15:53:18.280931 PCI: 00:1f.3: enabled 1
1712 15:53:18.283968 PCI: 00:1f.4: enabled 0
1713 15:53:18.287397 PCI: 00:1f.5: enabled 1
1714 15:53:18.287812 PCI: 00:1f.6: enabled 0
1715 15:53:18.290658 PCI: 00:1f.7: enabled 0
1716 15:53:18.294226 APIC: 00: enabled 1
1717 15:53:18.294693 GENERIC: 0.0: enabled 1
1718 15:53:18.297437 GENERIC: 0.0: enabled 1
1719 15:53:18.301004 GENERIC: 1.0: enabled 1
1720 15:53:18.304009 GENERIC: 0.0: enabled 1
1721 15:53:18.304424 GENERIC: 1.0: enabled 1
1722 15:53:18.307641 USB0 port 0: enabled 1
1723 15:53:18.310301 GENERIC: 0.0: enabled 1
1724 15:53:18.310773 USB0 port 0: enabled 1
1725 15:53:18.314318 GENERIC: 0.0: enabled 1
1726 15:53:18.317276 I2C: 00:1a: enabled 1
1727 15:53:18.320830 I2C: 00:31: enabled 1
1728 15:53:18.321259 I2C: 00:32: enabled 1
1729 15:53:18.324098 I2C: 00:10: enabled 1
1730 15:53:18.327526 I2C: 00:15: enabled 1
1731 15:53:18.327944 GENERIC: 0.0: enabled 0
1732 15:53:18.330652 GENERIC: 1.0: enabled 0
1733 15:53:18.333913 GENERIC: 0.0: enabled 1
1734 15:53:18.334327 SPI: 00: enabled 1
1735 15:53:18.337497 SPI: 00: enabled 1
1736 15:53:18.340418 PNP: 0c09.0: enabled 1
1737 15:53:18.340843 GENERIC: 0.0: enabled 1
1738 15:53:18.343990 USB3 port 0: enabled 1
1739 15:53:18.347220 USB3 port 1: enabled 1
1740 15:53:18.347666 USB3 port 2: enabled 0
1741 15:53:18.350509 USB3 port 3: enabled 0
1742 15:53:18.353933 USB2 port 0: enabled 0
1743 15:53:18.357396 USB2 port 1: enabled 1
1744 15:53:18.357810 USB2 port 2: enabled 1
1745 15:53:18.360243 USB2 port 3: enabled 0
1746 15:53:18.363717 USB2 port 4: enabled 1
1747 15:53:18.364128 USB2 port 5: enabled 0
1748 15:53:18.367416 USB2 port 6: enabled 0
1749 15:53:18.370553 USB2 port 7: enabled 0
1750 15:53:18.374027 USB2 port 8: enabled 0
1751 15:53:18.374526 USB2 port 9: enabled 0
1752 15:53:18.377048 USB3 port 0: enabled 0
1753 15:53:18.380592 USB3 port 1: enabled 1
1754 15:53:18.381007 USB3 port 2: enabled 0
1755 15:53:18.383576 USB3 port 3: enabled 0
1756 15:53:18.387239 GENERIC: 0.0: enabled 1
1757 15:53:18.390815 GENERIC: 1.0: enabled 1
1758 15:53:18.391231 APIC: 01: enabled 1
1759 15:53:18.393281 APIC: 03: enabled 1
1760 15:53:18.393694 APIC: 05: enabled 1
1761 15:53:18.396933 APIC: 07: enabled 1
1762 15:53:18.400328 APIC: 06: enabled 1
1763 15:53:18.400740 APIC: 02: enabled 1
1764 15:53:18.403484 APIC: 04: enabled 1
1765 15:53:18.406847 PCI: 01:00.0: enabled 1
1766 15:53:18.410035 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1767 15:53:18.417044 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1768 15:53:18.420159 ELOG: NV offset 0xf30000 size 0x1000
1769 15:53:18.427247 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1770 15:53:18.433723 ELOG: Event(17) added with size 13 at 2023-08-07 15:53:17 UTC
1771 15:53:18.440042 ELOG: Event(92) added with size 9 at 2023-08-07 15:53:17 UTC
1772 15:53:18.446897 ELOG: Event(93) added with size 9 at 2023-08-07 15:53:17 UTC
1773 15:53:18.453628 ELOG: Event(9E) added with size 10 at 2023-08-07 15:53:17 UTC
1774 15:53:18.460002 ELOG: Event(9F) added with size 14 at 2023-08-07 15:53:17 UTC
1775 15:53:18.463358 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1776 15:53:18.470204 ELOG: Event(A1) added with size 10 at 2023-08-07 15:53:17 UTC
1777 15:53:18.479781 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1778 15:53:18.486352 ELOG: Event(A0) added with size 9 at 2023-08-07 15:53:17 UTC
1779 15:53:18.489988 elog_add_boot_reason: Logged dev mode boot
1780 15:53:18.496512 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1781 15:53:18.496933 Finalize devices...
1782 15:53:18.499677 Devices finalized
1783 15:53:18.506316 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1784 15:53:18.509819 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1785 15:53:18.516079 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1786 15:53:18.519896 ME: HFSTS1 : 0x80030055
1787 15:53:18.525905 ME: HFSTS2 : 0x30280116
1788 15:53:18.529535 ME: HFSTS3 : 0x00000050
1789 15:53:18.532896 ME: HFSTS4 : 0x00004000
1790 15:53:18.539397 ME: HFSTS5 : 0x00000000
1791 15:53:18.542688 ME: HFSTS6 : 0x40400006
1792 15:53:18.545799 ME: Manufacturing Mode : YES
1793 15:53:18.549396 ME: SPI Protection Mode Enabled : NO
1794 15:53:18.552445 ME: FW Partition Table : OK
1795 15:53:18.559215 ME: Bringup Loader Failure : NO
1796 15:53:18.562842 ME: Firmware Init Complete : NO
1797 15:53:18.565820 ME: Boot Options Present : NO
1798 15:53:18.569322 ME: Update In Progress : NO
1799 15:53:18.572609 ME: D0i3 Support : YES
1800 15:53:18.575645 ME: Low Power State Enabled : NO
1801 15:53:18.579523 ME: CPU Replaced : YES
1802 15:53:18.582360 ME: CPU Replacement Valid : YES
1803 15:53:18.588968 ME: Current Working State : 5
1804 15:53:18.592546 ME: Current Operation State : 1
1805 15:53:18.595564 ME: Current Operation Mode : 3
1806 15:53:18.599305 ME: Error Code : 0
1807 15:53:18.602009 ME: Enhanced Debug Mode : NO
1808 15:53:18.605628 ME: CPU Debug Disabled : YES
1809 15:53:18.608639 ME: TXT Support : NO
1810 15:53:18.615755 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1811 15:53:18.621894 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1812 15:53:18.625468 CBFS: 'fallback/slic' not found.
1813 15:53:18.631852 ACPI: Writing ACPI tables at 76b01000.
1814 15:53:18.632319 ACPI: * FACS
1815 15:53:18.635628 ACPI: * DSDT
1816 15:53:18.638834 Ramoops buffer: 0x100000@0x76a00000.
1817 15:53:18.641945 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1818 15:53:18.648812 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1819 15:53:18.652280 Google Chrome EC: version:
1820 15:53:18.655028 ro: voema_v2.0.10114-a447f03e46
1821 15:53:18.658857 rw: voema_v2.0.10114-a447f03e46
1822 15:53:18.659289 running image: 2
1823 15:53:18.664984 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1824 15:53:18.669619 ACPI: * FADT
1825 15:53:18.670126 SCI is IRQ9
1826 15:53:18.676515 ACPI: added table 1/32, length now 40
1827 15:53:18.676937 ACPI: * SSDT
1828 15:53:18.679276 Found 1 CPU(s) with 8 core(s) each.
1829 15:53:18.686128 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1830 15:53:18.689249 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1831 15:53:18.692539 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1832 15:53:18.696397 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1833 15:53:18.702885 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1834 15:53:18.709619 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1835 15:53:18.712479 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1836 15:53:18.719274 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1837 15:53:18.725897 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1838 15:53:18.729458 \_SB.PCI0.RP09: Added StorageD3Enable property
1839 15:53:18.733121 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1840 15:53:18.739478 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1841 15:53:18.746095 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1842 15:53:18.749644 PS2K: Passing 80 keymaps to kernel
1843 15:53:18.755920 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1844 15:53:18.762804 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1845 15:53:18.769315 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1846 15:53:18.776167 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1847 15:53:18.782398 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1848 15:53:18.789276 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1849 15:53:18.795878 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1850 15:53:18.802362 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1851 15:53:18.806184 ACPI: added table 2/32, length now 44
1852 15:53:18.806658 ACPI: * MCFG
1853 15:53:18.812553 ACPI: added table 3/32, length now 48
1854 15:53:18.812951 ACPI: * TPM2
1855 15:53:18.815960 TPM2 log created at 0x769f0000
1856 15:53:18.819029 ACPI: added table 4/32, length now 52
1857 15:53:18.822533 ACPI: * MADT
1858 15:53:18.822938 SCI is IRQ9
1859 15:53:18.825540 ACPI: added table 5/32, length now 56
1860 15:53:18.829187 current = 76b09850
1861 15:53:18.829572 ACPI: * DMAR
1862 15:53:18.832167 ACPI: added table 6/32, length now 60
1863 15:53:18.839093 ACPI: added table 7/32, length now 64
1864 15:53:18.839503 ACPI: * HPET
1865 15:53:18.842104 ACPI: added table 8/32, length now 68
1866 15:53:18.845924 ACPI: done.
1867 15:53:18.846309 ACPI tables: 35216 bytes.
1868 15:53:18.848889 smbios_write_tables: 769ef000
1869 15:53:18.852261 EC returned error result code 3
1870 15:53:18.855691 Couldn't obtain OEM name from CBI
1871 15:53:18.860342 Create SMBIOS type 16
1872 15:53:18.863792 Create SMBIOS type 17
1873 15:53:18.867385 GENERIC: 0.0 (WIFI Device)
1874 15:53:18.867765 SMBIOS tables: 1734 bytes.
1875 15:53:18.874111 Writing table forward entry at 0x00000500
1876 15:53:18.880547 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1877 15:53:18.884245 Writing coreboot table at 0x76b25000
1878 15:53:18.890654 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1879 15:53:18.893704 1. 0000000000001000-000000000009ffff: RAM
1880 15:53:18.897472 2. 00000000000a0000-00000000000fffff: RESERVED
1881 15:53:18.903606 3. 0000000000100000-00000000769eefff: RAM
1882 15:53:18.906907 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1883 15:53:18.913522 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1884 15:53:18.920100 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1885 15:53:18.923319 7. 0000000077000000-000000007fbfffff: RESERVED
1886 15:53:18.926986 8. 00000000c0000000-00000000cfffffff: RESERVED
1887 15:53:18.933457 9. 00000000f8000000-00000000f9ffffff: RESERVED
1888 15:53:18.936767 10. 00000000fb000000-00000000fb000fff: RESERVED
1889 15:53:18.943204 11. 00000000fe000000-00000000fe00ffff: RESERVED
1890 15:53:18.946879 12. 00000000fed80000-00000000fed87fff: RESERVED
1891 15:53:18.953744 13. 00000000fed90000-00000000fed92fff: RESERVED
1892 15:53:18.956580 14. 00000000feda0000-00000000feda1fff: RESERVED
1893 15:53:18.963633 15. 00000000fedc0000-00000000feddffff: RESERVED
1894 15:53:18.966895 16. 0000000100000000-00000004803fffff: RAM
1895 15:53:18.969893 Passing 4 GPIOs to payload:
1896 15:53:18.973372 NAME | PORT | POLARITY | VALUE
1897 15:53:18.979874 lid | undefined | high | high
1898 15:53:18.983450 power | undefined | high | low
1899 15:53:18.990200 oprom | undefined | high | low
1900 15:53:18.996583 EC in RW | 0x000000e5 | high | high
1901 15:53:19.003173 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1902 15:53:19.003529 coreboot table: 1576 bytes.
1903 15:53:19.010191 IMD ROOT 0. 0x76fff000 0x00001000
1904 15:53:19.013509 IMD SMALL 1. 0x76ffe000 0x00001000
1905 15:53:19.016672 FSP MEMORY 2. 0x76c4e000 0x003b0000
1906 15:53:19.019909 VPD 3. 0x76c4d000 0x00000367
1907 15:53:19.023424 RO MCACHE 4. 0x76c4c000 0x00000fdc
1908 15:53:19.026332 CONSOLE 5. 0x76c2c000 0x00020000
1909 15:53:19.029846 FMAP 6. 0x76c2b000 0x00000578
1910 15:53:19.033419 TIME STAMP 7. 0x76c2a000 0x00000910
1911 15:53:19.036872 VBOOT WORK 8. 0x76c16000 0x00014000
1912 15:53:19.043674 ROMSTG STCK 9. 0x76c15000 0x00001000
1913 15:53:19.046776 AFTER CAR 10. 0x76c0a000 0x0000b000
1914 15:53:19.049669 RAMSTAGE 11. 0x76b97000 0x00073000
1915 15:53:19.053407 REFCODE 12. 0x76b42000 0x00055000
1916 15:53:19.056527 SMM BACKUP 13. 0x76b32000 0x00010000
1917 15:53:19.060221 4f444749 14. 0x76b30000 0x00002000
1918 15:53:19.063313 EXT VBT15. 0x76b2d000 0x0000219f
1919 15:53:19.066531 COREBOOT 16. 0x76b25000 0x00008000
1920 15:53:19.069896 ACPI 17. 0x76b01000 0x00024000
1921 15:53:19.076714 ACPI GNVS 18. 0x76b00000 0x00001000
1922 15:53:19.080227 RAMOOPS 19. 0x76a00000 0x00100000
1923 15:53:19.083116 TPM2 TCGLOG20. 0x769f0000 0x00010000
1924 15:53:19.086581 SMBIOS 21. 0x769ef000 0x00000800
1925 15:53:19.087028 IMD small region:
1926 15:53:19.093158 IMD ROOT 0. 0x76ffec00 0x00000400
1927 15:53:19.096817 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1928 15:53:19.099864 POWER STATE 2. 0x76ffeb80 0x00000044
1929 15:53:19.103494 ROMSTAGE 3. 0x76ffeb60 0x00000004
1930 15:53:19.106452 MEM INFO 4. 0x76ffe980 0x000001e0
1931 15:53:19.113308 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1932 15:53:19.116334 MTRR: Physical address space:
1933 15:53:19.123401 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1934 15:53:19.129605 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1935 15:53:19.136690 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1936 15:53:19.143326 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1937 15:53:19.146289 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1938 15:53:19.153252 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1939 15:53:19.160086 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1940 15:53:19.162926 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 15:53:19.169900 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 15:53:19.173329 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 15:53:19.176339 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 15:53:19.179477 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 15:53:19.186192 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 15:53:19.189699 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 15:53:19.193133 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 15:53:19.196136 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 15:53:19.202719 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 15:53:19.205851 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 15:53:19.209437 call enable_fixed_mtrr()
1952 15:53:19.212742 CPU physical address size: 39 bits
1953 15:53:19.220060 MTRR: default type WB/UC MTRR counts: 6/7.
1954 15:53:19.223065 MTRR: WB selected as default type.
1955 15:53:19.229700 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 15:53:19.233058 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 15:53:19.239475 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 15:53:19.246208 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1959 15:53:19.252633 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1960 15:53:19.259615 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1961 15:53:19.263351
1962 15:53:19.263778 MTRR check
1963 15:53:19.266842 Fixed MTRRs : Enabled
1964 15:53:19.267287 Variable MTRRs: Enabled
1965 15:53:19.267621
1966 15:53:19.273063 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 15:53:19.276519 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 15:53:19.280210 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 15:53:19.283383 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 15:53:19.289775 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 15:53:19.293449 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 15:53:19.296313 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 15:53:19.299900 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 15:53:19.306111 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 15:53:19.309659 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 15:53:19.312862 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 15:53:19.320116 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1978 15:53:19.323872 call enable_fixed_mtrr()
1979 15:53:19.326686 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 15:53:19.330565 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 15:53:19.337072 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 15:53:19.340123 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 15:53:19.343369 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 15:53:19.346850 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 15:53:19.353299 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 15:53:19.356721 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 15:53:19.360067 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 15:53:19.363301 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 15:53:19.369966 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 15:53:19.373580 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 15:53:19.380614 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 15:53:19.383550 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 15:53:19.386992 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 15:53:19.390048 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 15:53:19.396785 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 15:53:19.400173 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 15:53:19.403269 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 15:53:19.406722 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 15:53:19.413353 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 15:53:19.416414 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 15:53:19.419896 Checking cr50 for pending updates
2002 15:53:19.423799 CPU physical address size: 39 bits
2003 15:53:19.427508 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 15:53:19.430629 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 15:53:19.434141 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 15:53:19.440783 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 15:53:19.443851 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 15:53:19.446962 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 15:53:19.450690 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 15:53:19.457299 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 15:53:19.460654 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 15:53:19.464065 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 15:53:19.467514 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 15:53:19.470542 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 15:53:19.477317 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 15:53:19.480286 call enable_fixed_mtrr()
2017 15:53:19.483803 MTRR: Fixed MSR 0x259 0x0000000000000000
2018 15:53:19.490490 MTRR: Fixed MSR 0x268 0x0606060606060606
2019 15:53:19.493881 MTRR: Fixed MSR 0x269 0x0606060606060606
2020 15:53:19.496677 MTRR: Fixed MSR 0x26a 0x0606060606060606
2021 15:53:19.500007 MTRR: Fixed MSR 0x26b 0x0606060606060606
2022 15:53:19.506584 MTRR: Fixed MSR 0x26c 0x0606060606060606
2023 15:53:19.510067 MTRR: Fixed MSR 0x26d 0x0606060606060606
2024 15:53:19.513123 MTRR: Fixed MSR 0x26e 0x0606060606060606
2025 15:53:19.516425 MTRR: Fixed MSR 0x26f 0x0606060606060606
2026 15:53:19.521456 CPU physical address size: 39 bits
2027 15:53:19.527997 call enable_fixed_mtrr()
2028 15:53:19.531201 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 15:53:19.534769 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 15:53:19.538724 Reading cr50 TPM mode
2031 15:53:19.542540 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 15:53:19.546127 MTRR: Fixed MSR 0x259 0x0000000000000000
2033 15:53:19.552269 MTRR: Fixed MSR 0x268 0x0606060606060606
2034 15:53:19.555437 MTRR: Fixed MSR 0x269 0x0606060606060606
2035 15:53:19.558925 MTRR: Fixed MSR 0x26a 0x0606060606060606
2036 15:53:19.562185 MTRR: Fixed MSR 0x26b 0x0606060606060606
2037 15:53:19.569381 MTRR: Fixed MSR 0x26c 0x0606060606060606
2038 15:53:19.572043 MTRR: Fixed MSR 0x26d 0x0606060606060606
2039 15:53:19.575749 MTRR: Fixed MSR 0x26e 0x0606060606060606
2040 15:53:19.579185 MTRR: Fixed MSR 0x26f 0x0606060606060606
2041 15:53:19.586946 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 15:53:19.587419 call enable_fixed_mtrr()
2043 15:53:19.593350 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 15:53:19.596788 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 15:53:19.600174 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 15:53:19.604010 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 15:53:19.610386 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 15:53:19.613486 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 15:53:19.616839 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 15:53:19.619910 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 15:53:19.627316 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 15:53:19.629943 CPU physical address size: 39 bits
2053 15:53:19.634771 call enable_fixed_mtrr()
2054 15:53:19.641389 BS: BS_PAYLOAD_LOAD entry times (exec / console): 216 / 6 ms
2055 15:53:19.645056 call enable_fixed_mtrr()
2056 15:53:19.648498 call enable_fixed_mtrr()
2057 15:53:19.651623 CPU physical address size: 39 bits
2058 15:53:19.654921 CPU physical address size: 39 bits
2059 15:53:19.658297 CPU physical address size: 39 bits
2060 15:53:19.661448 CPU physical address size: 39 bits
2061 15:53:19.671457 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2062 15:53:19.674797 Checking segment from ROM address 0xffc02b38
2063 15:53:19.678265 Checking segment from ROM address 0xffc02b54
2064 15:53:19.684770 Loading segment from ROM address 0xffc02b38
2065 15:53:19.685201 code (compression=0)
2066 15:53:19.694686 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2067 15:53:19.704587 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2068 15:53:19.705009 it's not compressed!
2069 15:53:19.854897 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2070 15:53:19.861422 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2071 15:53:19.868692 Loading segment from ROM address 0xffc02b54
2072 15:53:19.871840 Entry Point 0x30000000
2073 15:53:19.872288 Loaded segments
2074 15:53:19.878652 BS: BS_PAYLOAD_LOAD run times (exec / console): 167 / 63 ms
2075 15:53:19.924525 Finalizing chipset.
2076 15:53:19.928052 Finalizing SMM.
2077 15:53:19.928484 APMC done.
2078 15:53:19.934389 BS: BS_PAYLOAD_LOAD exit times (exec / console): 45 / 5 ms
2079 15:53:19.938177 mp_park_aps done after 0 msecs.
2080 15:53:19.940932 Jumping to boot code at 0x30000000(0x76b25000)
2081 15:53:19.951323 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2082 15:53:19.951758
2083 15:53:19.952082
2084 15:53:19.954079
2085 15:53:19.954527 Starting depthcharge on Voema...
2086 15:53:19.955647 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2087 15:53:19.956135 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2088 15:53:19.956537 Setting prompt string to ['volteer:']
2089 15:53:19.956930 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2090 15:53:19.957775
2091 15:53:19.964502 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2092 15:53:19.965010
2093 15:53:19.971263 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2094 15:53:19.971821
2095 15:53:19.977627 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2096 15:53:19.978050
2097 15:53:19.980767 Failed to find eMMC card reader
2098 15:53:19.981179
2099 15:53:19.981537 Wipe memory regions:
2100 15:53:19.983927
2101 15:53:19.987454 [0x00000000001000, 0x000000000a0000)
2102 15:53:19.987925
2103 15:53:19.990901 [0x00000000100000, 0x00000030000000)
2104 15:53:20.029663
2105 15:53:20.033443 [0x00000032662db0, 0x000000769ef000)
2106 15:53:20.088293
2107 15:53:20.091413 [0x00000100000000, 0x00000480400000)
2108 15:53:20.776318
2109 15:53:20.779332 ec_init: CrosEC protocol v3 supported (256, 256)
2110 15:53:21.211344
2111 15:53:21.211519 R8152: Initializing
2112 15:53:21.211598
2113 15:53:21.214301 Version 6 (ocp_data = 5c30)
2114 15:53:21.214391
2115 15:53:21.217767 R8152: Done initializing
2116 15:53:21.217865
2117 15:53:21.220892 Adding net device
2118 15:53:21.522733
2119 15:53:21.526302 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2120 15:53:21.526803
2121 15:53:21.527133
2122 15:53:21.527477
2123 15:53:21.529943 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2125 15:53:21.631290 volteer: tftpboot 192.168.201.1 11224331/tftp-deploy-yyjp1hns/kernel/bzImage 11224331/tftp-deploy-yyjp1hns/kernel/cmdline 11224331/tftp-deploy-yyjp1hns/ramdisk/ramdisk.cpio.gz
2126 15:53:21.631858 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2127 15:53:21.632276 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2128 15:53:21.636801 tftpboot 192.168.201.1 11224331/tftp-deploy-yyjp1hns/kernel/bzIploy-yyjp1hns/kernel/cmdline 11224331/tftp-deploy-yyjp1hns/ramdisk/ramdisk.cpio.gz
2129 15:53:21.637282
2130 15:53:21.637649 Waiting for link
2131 15:53:21.841093
2132 15:53:21.841586 done.
2133 15:53:21.841953
2134 15:53:21.842262 MAC: 00:24:32:30:77:d1
2135 15:53:21.842674
2136 15:53:21.844434 Sending DHCP discover... done.
2137 15:53:21.844846
2138 15:53:21.847440 Waiting for reply... done.
2139 15:53:21.847940
2140 15:53:21.851272 Sending DHCP request... done.
2141 15:53:21.851685
2142 15:53:21.854216 Waiting for reply... done.
2143 15:53:21.854715
2144 15:53:21.857532 My ip is 192.168.201.13
2145 15:53:21.857982
2146 15:53:21.861200 The DHCP server ip is 192.168.201.1
2147 15:53:21.861658
2148 15:53:21.867225 TFTP server IP predefined by user: 192.168.201.1
2149 15:53:21.867693
2150 15:53:21.873940 Bootfile predefined by user: 11224331/tftp-deploy-yyjp1hns/kernel/bzImage
2151 15:53:21.874387
2152 15:53:21.877440 Sending tftp read request... done.
2153 15:53:21.877891
2154 15:53:21.885146 Waiting for the transfer...
2155 15:53:21.885573
2156 15:53:22.583295 00000000 ################################################################
2157 15:53:22.583794
2158 15:53:23.265145 00080000 ################################################################
2159 15:53:23.265648
2160 15:53:23.957760 00100000 ################################################################
2161 15:53:23.958269
2162 15:53:24.608197 00180000 ################################################################
2163 15:53:24.608690
2164 15:53:25.334288 00200000 ################################################################
2165 15:53:25.334885
2166 15:53:25.999591 00280000 ################################################################
2167 15:53:26.000084
2168 15:53:26.672704 00300000 ################################################################
2169 15:53:26.673186
2170 15:53:27.341194 00380000 ################################################################
2171 15:53:27.341360
2172 15:53:27.882933 00400000 ################################################################
2173 15:53:27.883085
2174 15:53:28.477720 00480000 ################################################################
2175 15:53:28.477866
2176 15:53:29.006285 00500000 ################################################################
2177 15:53:29.006437
2178 15:53:29.558050 00580000 ################################################################
2179 15:53:29.558229
2180 15:53:30.102375 00600000 ################################################################
2181 15:53:30.102529
2182 15:53:30.635562 00680000 ################################################################
2183 15:53:30.635710
2184 15:53:31.160461 00700000 ################################################################
2185 15:53:31.160630
2186 15:53:31.177771 00780000 ## done.
2187 15:53:31.177893
2188 15:53:31.181218 The bootfile was 7880592 bytes long.
2189 15:53:31.181317
2190 15:53:31.184218 Sending tftp read request... done.
2191 15:53:31.184302
2192 15:53:31.187154 Waiting for the transfer...
2193 15:53:31.187236
2194 15:53:31.775508 00000000 ################################################################
2195 15:53:31.775654
2196 15:53:32.325806 00080000 ################################################################
2197 15:53:32.325953
2198 15:53:32.872991 00100000 ################################################################
2199 15:53:32.873144
2200 15:53:33.421354 00180000 ################################################################
2201 15:53:33.421511
2202 15:53:33.990732 00200000 ################################################################
2203 15:53:33.991226
2204 15:53:34.653735 00280000 ################################################################
2205 15:53:34.654247
2206 15:53:35.345258 00300000 ################################################################
2207 15:53:35.345826
2208 15:53:36.011806 00380000 ################################################################
2209 15:53:36.012302
2210 15:53:36.662830 00400000 ################################################################
2211 15:53:36.663411
2212 15:53:37.324370 00480000 ################################################################
2213 15:53:37.324570
2214 15:53:37.955164 00500000 ################################################################
2215 15:53:37.955673
2216 15:53:38.550482 00580000 ################################################################
2217 15:53:38.550624
2218 15:53:39.182396 00600000 ################################################################
2219 15:53:39.182566
2220 15:53:39.818994 00680000 ################################################################
2221 15:53:39.819531
2222 15:53:40.476327 00700000 ################################################################
2223 15:53:40.476488
2224 15:53:41.076735 00780000 ################################################################
2225 15:53:41.076886
2226 15:53:41.559035 00800000 ###################################################### done.
2227 15:53:41.559191
2228 15:53:41.561900 Sending tftp read request... done.
2229 15:53:41.561993
2230 15:53:41.565171 Waiting for the transfer...
2231 15:53:41.565263
2232 15:53:41.568661 00000000 # done.
2233 15:53:41.568755
2234 15:53:41.575174 Command line loaded dynamically from TFTP file: 11224331/tftp-deploy-yyjp1hns/kernel/cmdline
2235 15:53:41.575271
2236 15:53:41.591968 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2237 15:53:41.596459
2238 15:53:41.599796 Shutting down all USB controllers.
2239 15:53:41.599908
2240 15:53:41.599993 Removing current net device
2241 15:53:41.600073
2242 15:53:41.603422 Finalizing coreboot
2243 15:53:41.603541
2244 15:53:41.609260 Exiting depthcharge with code 4 at timestamp: 30247305
2245 15:53:41.609379
2246 15:53:41.609472
2247 15:53:41.609560 Starting kernel ...
2248 15:53:41.609643
2249 15:53:41.609725
2250 15:53:41.610171 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2251 15:53:41.610303 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2252 15:53:41.610406 Setting prompt string to ['Linux version [0-9]']
2253 15:53:41.610518 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2254 15:53:41.610621 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2256 15:58:04.611099 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2258 15:58:04.611762 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2260 15:58:04.612276 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2263 15:58:04.613131 end: 2 depthcharge-action (duration 00:05:00) [common]
2265 15:58:04.614007 Cleaning after the job
2266 15:58:04.614302 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224331/tftp-deploy-yyjp1hns/ramdisk
2267 15:58:04.616585 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224331/tftp-deploy-yyjp1hns/kernel
2268 15:58:04.617934 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224331/tftp-deploy-yyjp1hns/modules
2269 15:58:04.618311 start: 5.1 power-off (timeout 00:00:30) [common]
2270 15:58:04.618491 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2271 15:58:04.701208 >> Command sent successfully.
2272 15:58:04.709688 Returned 0 in 0 seconds
2273 15:58:04.810856 end: 5.1 power-off (duration 00:00:00) [common]
2275 15:58:04.812295 start: 5.2 read-feedback (timeout 00:10:00) [common]
2276 15:58:04.813499 Listened to connection for namespace 'common' for up to 1s
2277 15:58:05.814194 Finalising connection for namespace 'common'
2278 15:58:05.814836 Disconnecting from shell: Finalise
2279 15:58:05.815221
2280 15:58:05.916159 end: 5.2 read-feedback (duration 00:00:01) [common]
2281 15:58:05.916735 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224331
2282 15:58:05.969211 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224331
2283 15:58:05.969442 JobError: Your job cannot terminate cleanly.