Boot log: hp-x360-14a-cb0001xx-zork

    1 15:52:58.877483  lava-dispatcher, installed at version: 2023.05.1
    2 15:52:58.877744  start: 0 validate
    3 15:52:58.877926  Start time: 2023-08-07 15:52:58.877916+00:00 (UTC)
    4 15:52:58.878074  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:52:58.878214  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 15:52:59.147234  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:52:59.148019  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:52:59.410903  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:52:59.411631  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 15:53:02.446730  validate duration: 3.57
   12 15:53:02.448017  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 15:53:02.448591  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 15:53:02.449304  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 15:53:02.450112  Not decompressing ramdisk as can be used compressed.
   16 15:53:02.450576  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 15:53:02.450914  saving as /var/lib/lava/dispatcher/tmp/11224310/tftp-deploy-i731b3uv/ramdisk/rootfs.cpio.gz
   18 15:53:02.451243  total size: 8418130 (8MB)
   19 15:53:02.970738  progress   0% (0MB)
   20 15:53:02.983489  progress   5% (0MB)
   21 15:53:02.995164  progress  10% (0MB)
   22 15:53:03.002645  progress  15% (1MB)
   23 15:53:03.008209  progress  20% (1MB)
   24 15:53:03.012707  progress  25% (2MB)
   25 15:53:03.016638  progress  30% (2MB)
   26 15:53:03.019951  progress  35% (2MB)
   27 15:53:03.023117  progress  40% (3MB)
   28 15:53:03.026193  progress  45% (3MB)
   29 15:53:03.029004  progress  50% (4MB)
   30 15:53:03.031658  progress  55% (4MB)
   31 15:53:03.034202  progress  60% (4MB)
   32 15:53:03.036402  progress  65% (5MB)
   33 15:53:03.038656  progress  70% (5MB)
   34 15:53:03.040977  progress  75% (6MB)
   35 15:53:03.043249  progress  80% (6MB)
   36 15:53:03.045511  progress  85% (6MB)
   37 15:53:03.047770  progress  90% (7MB)
   38 15:53:03.050021  progress  95% (7MB)
   39 15:53:03.052147  progress 100% (8MB)
   40 15:53:03.052375  8MB downloaded in 0.60s (13.35MB/s)
   41 15:53:03.052527  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 15:53:03.052767  end: 1.1 download-retry (duration 00:00:01) [common]
   44 15:53:03.052855  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 15:53:03.052981  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 15:53:03.053119  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 15:53:03.053193  saving as /var/lib/lava/dispatcher/tmp/11224310/tftp-deploy-i731b3uv/kernel/bzImage
   48 15:53:03.053253  total size: 7880592 (7MB)
   49 15:53:03.053310  No compression specified
   50 15:53:03.054458  progress   0% (0MB)
   51 15:53:03.056655  progress   5% (0MB)
   52 15:53:03.058745  progress  10% (0MB)
   53 15:53:03.060918  progress  15% (1MB)
   54 15:53:03.063047  progress  20% (1MB)
   55 15:53:03.065172  progress  25% (1MB)
   56 15:53:03.067255  progress  30% (2MB)
   57 15:53:03.069396  progress  35% (2MB)
   58 15:53:03.071480  progress  40% (3MB)
   59 15:53:03.073597  progress  45% (3MB)
   60 15:53:03.075701  progress  50% (3MB)
   61 15:53:03.077744  progress  55% (4MB)
   62 15:53:03.079781  progress  60% (4MB)
   63 15:53:03.081879  progress  65% (4MB)
   64 15:53:03.084034  progress  70% (5MB)
   65 15:53:03.086070  progress  75% (5MB)
   66 15:53:03.088204  progress  80% (6MB)
   67 15:53:03.090293  progress  85% (6MB)
   68 15:53:03.092401  progress  90% (6MB)
   69 15:53:03.094456  progress  95% (7MB)
   70 15:53:03.096549  progress 100% (7MB)
   71 15:53:03.096718  7MB downloaded in 0.04s (172.92MB/s)
   72 15:53:03.096859  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 15:53:03.097086  end: 1.2 download-retry (duration 00:00:00) [common]
   75 15:53:03.097177  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 15:53:03.097262  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 15:53:03.097397  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 15:53:03.097466  saving as /var/lib/lava/dispatcher/tmp/11224310/tftp-deploy-i731b3uv/modules/modules.tar
   79 15:53:03.097526  total size: 251008 (0MB)
   80 15:53:03.097585  Using unxz to decompress xz
   81 15:53:03.101869  progress  13% (0MB)
   82 15:53:03.102262  progress  26% (0MB)
   83 15:53:03.102499  progress  39% (0MB)
   84 15:53:03.104111  progress  52% (0MB)
   85 15:53:03.105944  progress  65% (0MB)
   86 15:53:03.107803  progress  78% (0MB)
   87 15:53:03.109692  progress  91% (0MB)
   88 15:53:03.111401  progress 100% (0MB)
   89 15:53:03.116929  0MB downloaded in 0.02s (12.34MB/s)
   90 15:53:03.117200  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 15:53:03.117477  end: 1.3 download-retry (duration 00:00:00) [common]
   93 15:53:03.117580  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 15:53:03.117681  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 15:53:03.117764  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 15:53:03.117850  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 15:53:03.118068  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9
   98 15:53:03.118205  makedir: /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin
   99 15:53:03.118308  makedir: /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/tests
  100 15:53:03.118409  makedir: /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/results
  101 15:53:03.118525  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-add-keys
  102 15:53:03.118671  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-add-sources
  103 15:53:03.118803  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-background-process-start
  104 15:53:03.118938  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-background-process-stop
  105 15:53:03.119066  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-common-functions
  106 15:53:03.119192  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-echo-ipv4
  107 15:53:03.119320  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-install-packages
  108 15:53:03.119448  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-installed-packages
  109 15:53:03.119573  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-os-build
  110 15:53:03.119699  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-probe-channel
  111 15:53:03.119824  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-probe-ip
  112 15:53:03.119994  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-target-ip
  113 15:53:03.120121  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-target-mac
  114 15:53:03.120247  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-target-storage
  115 15:53:03.120376  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-test-case
  116 15:53:03.120508  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-test-event
  117 15:53:03.120633  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-test-feedback
  118 15:53:03.120761  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-test-raise
  119 15:53:03.120891  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-test-reference
  120 15:53:03.121022  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-test-runner
  121 15:53:03.121147  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-test-set
  122 15:53:03.121276  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-test-shell
  123 15:53:03.121405  Updating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-install-packages (oe)
  124 15:53:03.121558  Updating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/bin/lava-installed-packages (oe)
  125 15:53:03.121683  Creating /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/environment
  126 15:53:03.121786  LAVA metadata
  127 15:53:03.121861  - LAVA_JOB_ID=11224310
  128 15:53:03.121928  - LAVA_DISPATCHER_IP=192.168.201.1
  129 15:53:03.122030  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 15:53:03.122099  skipped lava-vland-overlay
  131 15:53:03.122173  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 15:53:03.122256  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 15:53:03.122319  skipped lava-multinode-overlay
  134 15:53:03.122391  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 15:53:03.122472  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 15:53:03.122548  Loading test definitions
  137 15:53:03.122635  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 15:53:03.122708  Using /lava-11224310 at stage 0
  139 15:53:03.123030  uuid=11224310_1.4.2.3.1 testdef=None
  140 15:53:03.123119  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 15:53:03.123206  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 15:53:03.123738  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 15:53:03.124002  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 15:53:03.124646  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 15:53:03.124877  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 15:53:03.125488  runner path: /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/0/tests/0_dmesg test_uuid 11224310_1.4.2.3.1
  149 15:53:03.125643  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 15:53:03.125870  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  152 15:53:03.125942  Using /lava-11224310 at stage 1
  153 15:53:03.126237  uuid=11224310_1.4.2.3.5 testdef=None
  154 15:53:03.126325  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 15:53:03.126410  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  156 15:53:03.126879  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 15:53:03.127099  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  159 15:53:03.127740  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 15:53:03.128006  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  162 15:53:03.128640  runner path: /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/1/tests/1_bootrr test_uuid 11224310_1.4.2.3.5
  163 15:53:03.128791  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 15:53:03.128997  Creating lava-test-runner.conf files
  166 15:53:03.129060  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/0 for stage 0
  167 15:53:03.129151  - 0_dmesg
  168 15:53:03.129230  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224310/lava-overlay-fd366hi9/lava-11224310/1 for stage 1
  169 15:53:03.129321  - 1_bootrr
  170 15:53:03.129416  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 15:53:03.129503  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  172 15:53:03.138085  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 15:53:03.138191  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  174 15:53:03.138279  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 15:53:03.138363  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 15:53:03.138450  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  177 15:53:03.394416  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 15:53:03.394781  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 15:53:03.394904  extracting modules file /var/lib/lava/dispatcher/tmp/11224310/tftp-deploy-i731b3uv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224310/extract-overlay-ramdisk-e24lf64s/ramdisk
  180 15:53:03.409448  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 15:53:03.409588  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 15:53:03.409681  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224310/compress-overlay-jjh0ldin/overlay-1.4.2.4.tar.gz to ramdisk
  183 15:53:03.409755  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224310/compress-overlay-jjh0ldin/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224310/extract-overlay-ramdisk-e24lf64s/ramdisk
  184 15:53:03.419511  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 15:53:03.419665  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 15:53:03.419785  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 15:53:03.419912  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 15:53:03.420057  Building ramdisk /var/lib/lava/dispatcher/tmp/11224310/extract-overlay-ramdisk-e24lf64s/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224310/extract-overlay-ramdisk-e24lf64s/ramdisk
  189 15:53:03.565076  >> 49790 blocks

  190 15:53:04.402285  rename /var/lib/lava/dispatcher/tmp/11224310/extract-overlay-ramdisk-e24lf64s/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224310/tftp-deploy-i731b3uv/ramdisk/ramdisk.cpio.gz
  191 15:53:04.402734  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 15:53:04.402858  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 15:53:04.402959  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 15:53:04.403060  No mkimage arch provided, not using FIT.
  195 15:53:04.403146  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 15:53:04.403230  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 15:53:04.403335  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 15:53:04.403423  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 15:53:04.403502  No LXC device requested
  200 15:53:04.403579  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 15:53:04.403664  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 15:53:04.403746  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 15:53:04.403812  Checking files for TFTP limit of 4294967296 bytes.
  204 15:53:04.404244  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 15:53:04.404348  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 15:53:04.404447  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 15:53:04.404565  substitutions:
  208 15:53:04.404630  - {DTB}: None
  209 15:53:04.404692  - {INITRD}: 11224310/tftp-deploy-i731b3uv/ramdisk/ramdisk.cpio.gz
  210 15:53:04.404749  - {KERNEL}: 11224310/tftp-deploy-i731b3uv/kernel/bzImage
  211 15:53:04.404805  - {LAVA_MAC}: None
  212 15:53:04.404859  - {PRESEED_CONFIG}: None
  213 15:53:04.404913  - {PRESEED_LOCAL}: None
  214 15:53:04.404967  - {RAMDISK}: 11224310/tftp-deploy-i731b3uv/ramdisk/ramdisk.cpio.gz
  215 15:53:04.405021  - {ROOT_PART}: None
  216 15:53:04.405073  - {ROOT}: None
  217 15:53:04.405126  - {SERVER_IP}: 192.168.201.1
  218 15:53:04.405177  - {TEE}: None
  219 15:53:04.405231  Parsed boot commands:
  220 15:53:04.405283  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 15:53:04.405466  Parsed boot commands: tftpboot 192.168.201.1 11224310/tftp-deploy-i731b3uv/kernel/bzImage 11224310/tftp-deploy-i731b3uv/kernel/cmdline 11224310/tftp-deploy-i731b3uv/ramdisk/ramdisk.cpio.gz
  222 15:53:04.405557  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 15:53:04.405644  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 15:53:04.405740  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 15:53:04.405828  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 15:53:04.405895  Not connected, no need to disconnect.
  227 15:53:04.405969  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 15:53:04.406048  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 15:53:04.406114  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh hp-x360-14a-cb0001xx-zork-cbg-6'
  230 15:53:04.410223  Setting prompt string to ['lava-test: # ']
  231 15:53:04.410584  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 15:53:04.410692  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 15:53:04.410801  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 15:53:04.410927  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 15:53:04.411166  Calling: 'pduclient' '--daemon=localhost' '--hostname=hp-x360-14a-cb0001xx-zork-cbg-6' '--port=1' '--command=reboot'
  236 15:53:09.547515  >> Command sent successfully.

  237 15:53:09.550009  Returned 0 in 5 seconds
  238 15:53:09.650380  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 15:53:09.650699  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 15:53:09.650811  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 15:53:09.650917  Setting prompt string to 'Starting depthcharge on Gumboz...'
  243 15:53:09.650989  Changing prompt to 'Starting depthcharge on Gumboz...'
  244 15:53:09.651060  depthcharge-start: Wait for prompt Starting depthcharge on Gumboz... (timeout 00:05:00)
  245 15:53:09.651320  [Enter `^Ec?' for help]

  246 15:53:11.331052  

  247 15:53:11.331200  

  248 15:53:11.337749  coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 bootblock starting (log level: 8)...

  249 15:53:11.337833  Family_Model: 00820f01

  250 15:53:11.341004  PSP boot mode: Production

  251 15:53:11.344765  Silicon level: Production

  252 15:53:11.348125  PMxC0 STATUS: 0x800 BIT11 

  253 15:53:11.348257  I2C bus 3 version 0x3132322a

  254 15:53:11.351403  DW I2C bus 3 at 0xfedc5000 (400 KHz)

  255 15:53:11.357877  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

  256 15:53:11.360985  CBFS: Locating 'fallback/romstage'

  257 15:53:11.364500  CBFS: Found @ offset 80 size cc24

  258 15:53:11.373215  BS: bootblock times (exec / console): total (unknown) / 34 ms

  259 15:53:11.373291  

  260 15:53:11.373354  

  261 15:53:11.380064  coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 romstage starting (log level: 8)...

  262 15:53:11.383225  POST: 0x41

  263 15:53:11.383302  POST: 0x42

  264 15:53:11.386947  Family_Model: 00820f01

  265 15:53:11.393514  GPIO Control Switch: 0xef000000, Wake Stat 0: 0x00000000, Wake Stat 1: 0x00000000

  266 15:53:11.393590  POST: 0x43

  267 15:53:11.396574  Boot Count incremented to 3844

  268 15:53:11.400258  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

  269 15:53:11.403275  CBFS: Locating 'fspm.bin'

  270 15:53:11.406774  CBFS: Found @ offset 30000 size 18558

  271 15:53:11.446581  Spec version: v2.0

  272 15:53:11.449918  Revision: 0.0.0, Build Number 1

  273 15:53:11.450012  Type: release/test

  274 15:53:11.456627  image ID: AMD_PCS0, base 0x20c0000 + 0x4b000

  275 15:53:11.459918  	Config region        0x46f2c + 0x104

  276 15:53:11.460021  	Memory init offset   0x7b8

  277 15:53:11.463477  POST: 0x34

  278 15:53:11.463576  bootmode is set to: 0

  279 15:53:11.466491  POST: 0x36

  280 15:53:11.466565  Calling FspMemoryInit: 0x020c07b8

  281 15:53:11.470454  	0x02000dec: raminit_upd

  282 15:53:11.473176  	0x0204ccbc: &hob_list_ptr

  283 15:53:11.473250  POST: 0x92

  284 15:53:11.479503  POST: 0x98

  285 15:53:11.479606  CBMEM:

  286 15:53:11.482824  IMD: root @ 0xcb7ff000 254 entries.

  287 15:53:11.486406  IMD: root @ 0xcb7fec00 62 entries.

  288 15:53:11.489631  FMAP: area RO_VPD found @ 800000 (16384 bytes)

  289 15:53:11.492941  WARNING: RO_VPD is uninitialized or empty.

  290 15:53:11.499591  FMAP: area RW_VPD found @ 615000 (8192 bytes)

  291 15:53:11.499665  External stage cache:

  292 15:53:11.503709  IMD: root @ 0xcbfff000 254 entries.

  293 15:53:11.507793  IMD: root @ 0xcbffec00 62 entries.

  294 15:53:11.510584  FspMemoryInit returned 0x00000000

  295 15:53:11.513938  FMAP: area RW_MRC_CACHE found @ 0 (65536 bytes)

  296 15:53:11.517267  APOB RAM copy differs from flash

  297 15:53:11.524240  Copy APOB from RAM 0x0x02001000/0xa3a4 to flash 0x0/0x10000

  298 15:53:11.524319  spi_init: SPI BAR at 0xfec10000

  299 15:53:11.527552  Manufacturer: ef

  300 15:53:11.534152  SF: Detected ef 8018 with sector size 0x1000, total 0x1000000

  301 15:53:12.143520  SF: Successfully erased 65536 bytes @ 0x0

  302 15:53:12.343079  Updated APOB in flash

  303 15:53:12.343245  POST: 0x44

  304 15:53:12.349939  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

  305 15:53:12.353287  CBFS: Locating 'fallback/ramstage'

  306 15:53:12.356883  CBFS: Found @ offset f300 size 1c409

  307 15:53:12.359783  Decompressing stage fallback/ramstage @ 0xca6b5fc0 (1119536 bytes)

  308 15:53:12.416972  Loading module at 0xca6b6000 with entry 0xca6b6000. filesize: 0x40900 memsize: 0x1114f0

  309 15:53:12.420278  Processing 4362 relocs. Offset value of 0xba6b6000

  310 15:53:12.426765  BS: romstage times (exec / console): total (unknown) / 152 ms

  311 15:53:12.426871  

  312 15:53:12.426963  

  313 15:53:12.433287  coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 ramstage starting (log level: 8)...

  314 15:53:12.436773  POST: 0x39

  315 15:53:12.436859  POST: 0x80

  316 15:53:12.436924  Normal boot

  317 15:53:12.439991  POST: 0x70

  318 15:53:12.443318  BS: BS_PRE_DEVICE run times (exec / console): 0 / 1 ms

  319 15:53:12.443397  POST: 0x71

  320 15:53:12.446774  mainboard: EC init

  321 15:53:12.450114  Chrome EC: Set SMI mask to 0x0000000000000000

  322 15:53:12.453378  Chrome EC: UHEPI supported

  323 15:53:12.460192  Chrome EC: clear events_b mask to 0x0000000000000000

  324 15:53:12.463709  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

  325 15:53:12.469994  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001400101e

  326 15:53:12.473329  Chrome EC: Set WAKE mask to 0x0000000000000000

  327 15:53:12.476680  Board ID: 5

  328 15:53:12.483600  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

  329 15:53:12.483708  CBFS: Locating 'fsps.bin'

  330 15:53:12.486766  CBFS: Found @ offset 48fc0 size 16547

  331 15:53:12.527061  Spec version: v2.0

  332 15:53:12.530711  Revision: 0.0.0, Build Number 1

  333 15:53:12.530790  Type: release/test

  334 15:53:12.537349  image ID: AMD_PCS0, base 0xca677000 + 0x3e000

  335 15:53:12.540478  	Config region        0x3cf54 + 0x202

  336 15:53:12.540587  	Silicon init offset  0x3c2

  337 15:53:12.543881  	Notify phase offset  0x3b8

  338 15:53:12.547172  Calling FspSiliconInit: 0xca6773c2

  339 15:53:12.550496  	0xca7074f0: upd

  340 15:53:12.550573  POST: 0x93

  341 15:53:12.836200  POST: 0x99

  342 15:53:12.839364  FspSiliconInit returned 0x00000000

  343 15:53:12.842869  I2C bus 2 version 0x3132322a

  344 15:53:12.846377  DW I2C bus 2 at 0xfedc4000 (400 KHz)

  345 15:53:12.850093  FMAP: area RW_ELOG found @ 610000 (4096 bytes)

  346 15:53:12.852974  spi_init: SPI BAR at 0xfec10000

  347 15:53:12.853065  Manufacturer: ef

  348 15:53:12.859752  SF: Detected ef 8018 with sector size 0x1000, total 0x1000000

  349 15:53:12.863424  ELOG: NV offset 0x610000 size 0x1000

  350 15:53:12.873239  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

  351 15:53:12.880050  ELOG: Event(17) added with size 13 at 2023-08-07 15:53:13 UTC

  352 15:53:12.886752  ELOG: Event(9F) added with size 14 at 2023-08-07 15:53:13 UTC

  353 15:53:12.886872  PM1_STS: PWRBTN 

  354 15:53:12.893985  BS: BS_DEV_INIT_CHIPS run times (exec / console): 333 / 110 ms

  355 15:53:12.896898  EC returned error result code 3

  356 15:53:12.896970  FW_CONFIG value is 0x88900

  357 15:53:12.903691  fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_ALC5682

  358 15:53:12.907025  GENERIC: 1.0 disabled by fw_config

  359 15:53:12.913935  fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_ALC5682

  360 15:53:12.916911  GENERIC: 1.0 disabled by fw_config

  361 15:53:12.920145  BS: BS_DEV_ENUMERATE entry times (exec / console): 1 / 22 ms

  362 15:53:12.920221  POST: 0x72

  363 15:53:12.923669  Enumerating buses...

  364 15:53:12.927330  Show all devs... Before device enumeration.

  365 15:53:12.930750  Root Device: enabled 1

  366 15:53:12.933700  CPU_CLUSTER: 0: enabled 1

  367 15:53:12.933772  DOMAIN: 0000: enabled 1

  368 15:53:12.936952  MMIO: fedc5000: enabled 1

  369 15:53:12.940559  MMIO: fedca000: enabled 0

  370 15:53:12.940632  MMIO: fedce000: enabled 0

  371 15:53:12.943993  MMIO: fedcf000: enabled 0

  372 15:53:12.947355  MMIO: fedc4000: enabled 1

  373 15:53:12.947432  GENERIC: 0.1: enabled 1

  374 15:53:12.950311  APIC: 00: enabled 1

  375 15:53:12.953926  PCI: 00:00.0: enabled 1

  376 15:53:12.954004  PCI: 00:00.2: enabled 1

  377 15:53:12.957127  PCI: 00:01.0: enabled 1

  378 15:53:12.960522  PCI: 00:01.1: enabled 0

  379 15:53:12.960592  PCI: 00:01.2: enabled 1

  380 15:53:12.963909  PCI: 00:01.3: enabled 1

  381 15:53:12.963994  PCI: 00:01.4: enabled 0

  382 15:53:12.967762  PCI: 00:01.5: enabled 0

  383 15:53:12.971048  PCI: 00:08.0: enabled 1

  384 15:53:12.971123  PCI: 00:08.1: enabled 1

  385 15:53:12.974237  PCI: 00:08.2: enabled 0

  386 15:53:12.977311  PCI: 00:14.0: enabled 1

  387 15:53:12.977382  PCI: 00:14.3: enabled 1

  388 15:53:12.980805  PCI: 00:18.0: enabled 1

  389 15:53:12.984099  PCI: 00:18.1: enabled 1

  390 15:53:12.984172  PCI: 00:18.2: enabled 1

  391 15:53:12.987314  PCI: 00:18.3: enabled 1

  392 15:53:12.990752  PCI: 00:18.4: enabled 1

  393 15:53:12.990853  PCI: 00:18.5: enabled 1

  394 15:53:12.994229  PCI: 00:18.6: enabled 1

  395 15:53:12.994337  I2C: 00:50: enabled 1

  396 15:53:12.997257  I2C: 00:15: enabled 1

  397 15:53:13.000742  I2C: 00:10: enabled 1

  398 15:53:13.000818  I2C: 00:40: enabled 1

  399 15:53:13.004247  PCI: 00:00.0: enabled 1

  400 15:53:13.007494  PCI: 00:00.0: enabled 1

  401 15:53:13.007568  PCI: 00:00.1: enabled 1

  402 15:53:13.010875  PCI: 00:00.2: enabled 1

  403 15:53:13.010951  PCI: 00:00.3: enabled 1

  404 15:53:13.014722  PCI: 00:00.5: enabled 1

  405 15:53:13.017782  PCI: 00:00.6: enabled 0

  406 15:53:13.017856  PCI: 00:00.7: enabled 1

  407 15:53:13.021341  PCI: 00:00.0: enabled 0

  408 15:53:13.024474  PNP: 0c09.0: enabled 1

  409 15:53:13.024547  USB0 port 0: enabled 1

  410 15:53:13.027679  GENERIC: 0.0: enabled 1

  411 15:53:13.031059  GENERIC: 1.0: enabled 0

  412 15:53:13.031129  GENERIC: 0.0: enabled 1

  413 15:53:13.034722  GENERIC: 0.0: enabled 1

  414 15:53:13.037812  GENERIC: 1.0: enabled 0

  415 15:53:13.037884  USB2 port 0: enabled 1

  416 15:53:13.041232  USB2 port 1: enabled 1

  417 15:53:13.041315  USB2 port 2: enabled 1

  418 15:53:13.044444  USB2 port 3: enabled 1

  419 15:53:13.048052  USB2 port 4: enabled 1

  420 15:53:13.048125  USB2 port 5: enabled 1

  421 15:53:13.051072  USB3 port 0: enabled 1

  422 15:53:13.054548  USB3 port 1: enabled 1

  423 15:53:13.054621  USB3 port 2: enabled 1

  424 15:53:13.057772  USB3 port 3: enabled 1

  425 15:53:13.057845  I2C: 00:1a: enabled 1

  426 15:53:13.061303  I2C: 00:1a: enabled 1

  427 15:53:13.064799  Compare with tree...

  428 15:53:13.064872  Root Device: enabled 1

  429 15:53:13.068290   CPU_CLUSTER: 0: enabled 1

  430 15:53:13.071677    APIC: 00: enabled 1

  431 15:53:13.071749   DOMAIN: 0000: enabled 1

  432 15:53:13.074888    PCI: 00:00.0: enabled 1

  433 15:53:13.077949    PCI: 00:00.2: enabled 1

  434 15:53:13.078065    PCI: 00:01.0: enabled 1

  435 15:53:13.081387    PCI: 00:01.1: enabled 0

  436 15:53:13.084730    PCI: 00:01.2: enabled 1

  437 15:53:13.084803     PCI: 00:00.0: enabled 1

  438 15:53:13.088115    PCI: 00:01.3: enabled 1

  439 15:53:13.091507    PCI: 00:01.4: enabled 0

  440 15:53:13.094993    PCI: 00:01.5: enabled 0

  441 15:53:13.095090    PCI: 00:08.0: enabled 1

  442 15:53:13.098385    PCI: 00:08.1: enabled 1

  443 15:53:13.101702     PCI: 00:00.0: enabled 1

  444 15:53:13.101782     PCI: 00:00.1: enabled 1

  445 15:53:13.105100     PCI: 00:00.2: enabled 1

  446 15:53:13.108626     PCI: 00:00.3: enabled 1

  447 15:53:13.111796      USB0 port 0: enabled 1

  448 15:53:13.111894       USB2 port 0: enabled 1

  449 15:53:13.115021       USB2 port 1: enabled 1

  450 15:53:13.118696       USB2 port 2: enabled 1

  451 15:53:13.122176       USB2 port 3: enabled 1

  452 15:53:13.122246       USB2 port 4: enabled 1

  453 15:53:13.125372       USB2 port 5: enabled 1

  454 15:53:13.128565       USB3 port 0: enabled 1

  455 15:53:13.131784       USB3 port 1: enabled 1

  456 15:53:13.131881       USB3 port 2: enabled 1

  457 15:53:13.135500       USB3 port 3: enabled 1

  458 15:53:13.139122     PCI: 00:00.5: enabled 1

  459 15:53:13.139194      GENERIC: 0.0: enabled 1

  460 15:53:13.141999      GENERIC: 1.0: enabled 0

  461 15:53:13.145318     PCI: 00:00.6: enabled 0

  462 15:53:13.148514     PCI: 00:00.7: enabled 1

  463 15:53:13.148587    PCI: 00:08.2: enabled 0

  464 15:53:13.152022     PCI: 00:00.0: enabled 0

  465 15:53:13.155714    PCI: 00:14.0: enabled 1

  466 15:53:13.159198    PCI: 00:14.3: enabled 1

  467 15:53:13.159297     PNP: 0c09.0: enabled 1

  468 15:53:13.162583      GENERIC: 0.0: enabled 1

  469 15:53:13.165481       I2C: 00:1a: enabled 1

  470 15:53:13.165558      GENERIC: 0.0: enabled 1

  471 15:53:13.168869      GENERIC: 1.0: enabled 0

  472 15:53:13.172002       I2C: 00:1a: enabled 1

  473 15:53:13.175422    PCI: 00:18.0: enabled 1

  474 15:53:13.175529    PCI: 00:18.1: enabled 1

  475 15:53:13.178858    PCI: 00:18.2: enabled 1

  476 15:53:13.182210    PCI: 00:18.3: enabled 1

  477 15:53:13.182318    PCI: 00:18.4: enabled 1

  478 15:53:13.185528    PCI: 00:18.5: enabled 1

  479 15:53:13.189070    PCI: 00:18.6: enabled 1

  480 15:53:13.192372   MMIO: fedc5000: enabled 1

  481 15:53:13.192443    I2C: 00:50: enabled 1

  482 15:53:13.195792   MMIO: fedca000: enabled 0

  483 15:53:13.199231   MMIO: fedce000: enabled 0

  484 15:53:13.199303   MMIO: fedcf000: enabled 0

  485 15:53:13.202664   MMIO: fedc4000: enabled 1

  486 15:53:13.205815    I2C: 00:15: enabled 1

  487 15:53:13.205896    I2C: 00:10: enabled 1

  488 15:53:13.209330    I2C: 00:40: enabled 1

  489 15:53:13.212226   GENERIC: 0.1: enabled 1

  490 15:53:13.212298  Mainboard Gumboz Enable.

  491 15:53:13.215641  Root Device scanning...

  492 15:53:13.218959  scan_static_bus for Root Device

  493 15:53:13.222839  CPU_CLUSTER: 0 enabled

  494 15:53:13.222908  DOMAIN: 0000 enabled

  495 15:53:13.226288  MMIO: fedc5000 enabled

  496 15:53:13.226363  MMIO: fedca000 disabled

  497 15:53:13.229133  MMIO: fedce000 disabled

  498 15:53:13.232780  MMIO: fedcf000 disabled

  499 15:53:13.232850  MMIO: fedc4000 enabled

  500 15:53:13.236046  GENERIC: 0.1 enabled

  501 15:53:13.239396  DOMAIN: 0000 scanning...

  502 15:53:13.239495  PCI: pci_scan_bus for bus 00

  503 15:53:13.242569  POST: 0x24

  504 15:53:13.245975  PCI: 00:00.0 [1022/15d0] ops

  505 15:53:13.246050  PCI: 00:00.0 [1022/15d0] enabled

  506 15:53:13.249172  PCI: 00:00.2 [1022/0000] ops

  507 15:53:13.252793  PCI: 00:00.2 [1022/15d1] enabled

  508 15:53:13.255929  PCI: 00:01.0 [1022/1452] enabled

  509 15:53:13.259865  PCI: 00:01.2 [1022/15d3] bus ops

  510 15:53:13.262617  PCI: 00:01.2 [1022/15d3] enabled

  511 15:53:13.266237  PCI: Static device PCI: 00:01.3 not found, disabling it.

  512 15:53:13.269898  PCI: 00:08.0 [1022/1452] enabled

  513 15:53:13.273080  PCI: 00:08.1 [1022/0000] bus ops

  514 15:53:13.276227  PCI: 00:08.1 [1022/15db] enabled

  515 15:53:13.279706  PCI: 00:14.0 [1022/790b] bus ops

  516 15:53:13.282868  PCI: 00:14.0 [1022/790b] enabled

  517 15:53:13.286417  PCI: 00:14.3 [1022/0000] bus ops

  518 15:53:13.286494  PCI: 00:14.3 [1022/790e] enabled

  519 15:53:13.289648  PCI: 00:18.0 [1022/0000] ops

  520 15:53:13.293173  PCI: 00:18.0 [1022/15e8] enabled

  521 15:53:13.296545  PCI: 00:18.1 [1022/0000] ops

  522 15:53:13.299892  PCI: 00:18.1 [1022/15e9] enabled

  523 15:53:13.303447  PCI: 00:18.2 [1022/0000] ops

  524 15:53:13.303546  PCI: 00:18.2 [1022/15ea] enabled

  525 15:53:13.306552  PCI: 00:18.3 [1022/0000] ops

  526 15:53:13.309863  PCI: 00:18.3 [1022/15eb] enabled

  527 15:53:13.354832  PCI: 00:18.4 [1022/0000] ops

  528 15:53:13.354952  PCI: 00:18.4 [1022/15ec] enabled

  529 15:53:13.355211  PCI: 00:18.5 [1022/0000] ops

  530 15:53:13.355283  PCI: 00:18.5 [1022/15ed] enabled

  531 15:53:13.355534  PCI: 00:18.6 [1022/0000] ops

  532 15:53:13.355627  PCI: 00:18.6 [1022/15ee] enabled

  533 15:53:13.355725  PCI: 00:18.7 [1022/15ef] enabled

  534 15:53:13.355818  POST: 0x25

  535 15:53:13.355934  PCI: Leftover static devices:

  536 15:53:13.356021  PCI: 00:01.1

  537 15:53:13.356079  PCI: 00:01.3

  538 15:53:13.356135  PCI: 00:01.4

  539 15:53:13.356195  PCI: 00:01.5

  540 15:53:13.356474  PCI: 00:08.2

  541 15:53:13.356569  PCI: Check your devicetree.cb.

  542 15:53:13.356655  PCI: 00:01.2 scanning...

  543 15:53:13.356982  do_pci_scan_bridge for PCI: 00:01.2

  544 15:53:13.357073  PCI: pci_scan_bus for bus 01

  545 15:53:13.357562  POST: 0x24

  546 15:53:13.357629  PCI: 01:00.0 [10ec/c822] enabled

  547 15:53:13.357687  POST: 0x25

  548 15:53:13.360008  POST: 0x55

  549 15:53:13.360080  Enabling Common Clock Configuration

  550 15:53:13.364047  L1 Sub-State supported from root port 1

  551 15:53:13.368737  L1 Sub-State Support = 0xf

  552 15:53:13.368815  CommonModeRestoreTime = 0x1e

  553 15:53:13.372301  Power On Value = 0x1e, Power On Scale = 0x0

  554 15:53:13.372377  ASPM: Enabled L1

  555 15:53:13.375924  PCIe: Max_Payload_Size adjusted to 128

  556 15:53:13.384320  scan_bus: bus PCI: 00:01.2 finished in 33 msecs

  557 15:53:13.384407  PCI: 00:08.1 scanning...

  558 15:53:13.387628  do_pci_scan_bridge for PCI: 00:08.1

  559 15:53:13.391087  PCI: pci_scan_bus for bus 02

  560 15:53:13.391162  POST: 0x24

  561 15:53:13.394809  PCI: 02:00.0 [1002/0000] ops

  562 15:53:13.397668  PCI: 02:00.0 [1002/15d8] enabled

  563 15:53:13.401448  PCI: 02:00.1 [1002/15de] enabled

  564 15:53:13.401546  PCI: 02:00.2 [1022/15df] enabled

  565 15:53:13.404512  PCI: 02:00.3 [1022/0000] bus ops

  566 15:53:13.408107  PCI: 02:00.3 [1022/15e5] enabled

  567 15:53:13.411063  PCI: 02:00.5 [1022/15e2] bus ops

  568 15:53:13.414748  PCI: 02:00.5 [1022/15e2] enabled

  569 15:53:13.418153  PCI: 02:00.7 [1022/15e4] enabled

  570 15:53:13.418226  POST: 0x25

  571 15:53:13.421597  PCI: Leftover static devices:

  572 15:53:13.421669  PCI: 02:00.6

  573 15:53:13.424513  PCI: Check your devicetree.cb.

  574 15:53:13.427829  PCI: 02:00.3 scanning...

  575 15:53:13.431163  scan_static_bus for PCI: 02:00.3

  576 15:53:13.431239  USB0 port 0 enabled

  577 15:53:13.434672  USB0 port 0 scanning...

  578 15:53:13.438068  scan_static_bus for USB0 port 0

  579 15:53:13.438139  USB2 port 0 enabled

  580 15:53:13.441494  USB2 port 1 enabled

  581 15:53:13.441565  USB2 port 2 enabled

  582 15:53:13.444797  USB2 port 3 enabled

  583 15:53:13.448418  USB2 port 4 enabled

  584 15:53:13.448492  USB2 port 5 enabled

  585 15:53:13.451717  USB3 port 0 enabled

  586 15:53:13.451835  USB3 port 1 enabled

  587 15:53:13.454954  USB3 port 2 enabled

  588 15:53:13.455056  USB3 port 3 enabled

  589 15:53:13.458021  USB2 port 0 scanning...

  590 15:53:13.461833  scan_static_bus for USB2 port 0

  591 15:53:13.465285  scan_static_bus for USB2 port 0 done

  592 15:53:13.468570  scan_bus: bus USB2 port 0 finished in 6 msecs

  593 15:53:13.471625  USB2 port 1 scanning...

  594 15:53:13.475206  scan_static_bus for USB2 port 1

  595 15:53:13.475281  scan_static_bus for USB2 port 1 done

  596 15:53:13.481796  scan_bus: bus USB2 port 1 finished in 6 msecs

  597 15:53:13.481882  USB2 port 2 scanning...

  598 15:53:13.485137  scan_static_bus for USB2 port 2

  599 15:53:13.488848  scan_static_bus for USB2 port 2 done

  600 15:53:13.492068  scan_bus: bus USB2 port 2 finished in 6 msecs

  601 15:53:13.495553  USB2 port 3 scanning...

  602 15:53:13.498413  scan_static_bus for USB2 port 3

  603 15:53:13.502091  scan_static_bus for USB2 port 3 done

  604 15:53:13.505280  scan_bus: bus USB2 port 3 finished in 6 msecs

  605 15:53:13.508699  USB2 port 4 scanning...

  606 15:53:13.511810  scan_static_bus for USB2 port 4

  607 15:53:13.515500  scan_static_bus for USB2 port 4 done

  608 15:53:13.519022  scan_bus: bus USB2 port 4 finished in 6 msecs

  609 15:53:13.522033  USB2 port 5 scanning...

  610 15:53:13.522111  scan_static_bus for USB2 port 5

  611 15:53:13.525308  scan_static_bus for USB2 port 5 done

  612 15:53:13.532379  scan_bus: bus USB2 port 5 finished in 6 msecs

  613 15:53:13.532459  USB3 port 0 scanning...

  614 15:53:13.535408  scan_static_bus for USB3 port 0

  615 15:53:13.538852  scan_static_bus for USB3 port 0 done

  616 15:53:13.542217  scan_bus: bus USB3 port 0 finished in 6 msecs

  617 15:53:13.545773  USB3 port 1 scanning...

  618 15:53:13.548927  scan_static_bus for USB3 port 1

  619 15:53:13.552622  scan_static_bus for USB3 port 1 done

  620 15:53:13.555516  scan_bus: bus USB3 port 1 finished in 6 msecs

  621 15:53:13.559101  USB3 port 2 scanning...

  622 15:53:13.562260  scan_static_bus for USB3 port 2

  623 15:53:13.565550  scan_static_bus for USB3 port 2 done

  624 15:53:13.569194  scan_bus: bus USB3 port 2 finished in 6 msecs

  625 15:53:13.569298  USB3 port 3 scanning...

  626 15:53:13.572428  scan_static_bus for USB3 port 3

  627 15:53:13.575733  scan_static_bus for USB3 port 3 done

  628 15:53:13.578942  scan_bus: bus USB3 port 3 finished in 6 msecs

  629 15:53:13.582420  scan_static_bus for USB0 port 0 done

  630 15:53:13.589291  scan_bus: bus USB0 port 0 finished in 149 msecs

  631 15:53:13.592596  scan_static_bus for PCI: 02:00.3 done

  632 15:53:13.595652  scan_bus: bus PCI: 02:00.3 finished in 163 msecs

  633 15:53:13.599686  PCI: 02:00.5 scanning...

  634 15:53:13.602775  scan_static_bus for PCI: 02:00.5

  635 15:53:13.602847  GENERIC: 0.0 enabled

  636 15:53:13.606136  GENERIC: 1.0 disabled

  637 15:53:13.609306  scan_static_bus for PCI: 02:00.5 done

  638 15:53:13.612897  scan_bus: bus PCI: 02:00.5 finished in 10 msecs

  639 15:53:13.612969  POST: 0x55

  640 15:53:13.619730  scan_bus: bus PCI: 00:08.1 finished in 229 msecs

  641 15:53:13.619841  PCI: 00:14.0 scanning...

  642 15:53:13.622896  scan_generic_bus for PCI: 00:14.0

  643 15:53:13.626088  scan_generic_bus for PCI: 00:14.0 done

  644 15:53:13.633092  scan_bus: bus PCI: 00:14.0 finished in 6 msecs

  645 15:53:13.633167  PCI: 00:14.3 scanning...

  646 15:53:13.636024  scan_static_bus for PCI: 00:14.3

  647 15:53:13.639484  PNP: 0c09.0 enabled

  648 15:53:13.639583  PNP: 0c09.0 scanning...

  649 15:53:13.642785  scan_static_bus for PNP: 0c09.0

  650 15:53:13.646205  GENERIC: 0.0 enabled

  651 15:53:13.646277  GENERIC: 0.0 enabled

  652 15:53:13.649788  GENERIC: 1.0 disabled

  653 15:53:13.653174  GENERIC: 0.0 scanning...

  654 15:53:13.653244  scan_static_bus for GENERIC: 0.0

  655 15:53:13.656808  I2C: 00:1a enabled

  656 15:53:13.660157  scan_static_bus for GENERIC: 0.0 done

  657 15:53:13.663621  scan_bus: bus GENERIC: 0.0 finished in 8 msecs

  658 15:53:13.666657  GENERIC: 0.0 scanning...

  659 15:53:13.669817  scan_static_bus for GENERIC: 0.0

  660 15:53:13.672992  scan_static_bus for GENERIC: 0.0 done

  661 15:53:13.676492  scan_bus: bus GENERIC: 0.0 finished in 6 msecs

  662 15:53:13.679723  scan_static_bus for PNP: 0c09.0 done

  663 15:53:13.683315  scan_bus: bus PNP: 0c09.0 finished in 39 msecs

  664 15:53:13.686696  scan_static_bus for PCI: 00:14.3 done

  665 15:53:13.693551  scan_bus: bus PCI: 00:14.3 finished in 53 msecs

  666 15:53:13.693628  POST: 0x55

  667 15:53:13.696657  scan_bus: bus DOMAIN: 0000 finished in 453 msecs

  668 15:53:13.700152  MMIO: fedc5000 scanning...

  669 15:53:13.703478  scan_generic_bus for MMIO: fedc5000

  670 15:53:13.706895  bus: MMIO: fedc5000[0]->I2C: 01:50 enabled

  671 15:53:13.710533  scan_generic_bus for MMIO: fedc5000 done

  672 15:53:13.713376  scan_bus: bus MMIO: fedc5000 finished in 10 msecs

  673 15:53:13.716750  MMIO: fedc4000 scanning...

  674 15:53:13.720544  scan_generic_bus for MMIO: fedc4000

  675 15:53:13.723617  bus: MMIO: fedc4000[0]->I2C: 02:15 enabled

  676 15:53:13.727154  bus: MMIO: fedc4000[0]->I2C: 02:10 enabled

  677 15:53:13.733481  bus: MMIO: fedc4000[0]->I2C: 02:40 enabled

  678 15:53:13.736926  scan_generic_bus for MMIO: fedc4000 done

  679 15:53:13.740111  scan_bus: bus MMIO: fedc4000 finished in 18 msecs

  680 15:53:13.743798  scan_static_bus for Root Device done

  681 15:53:13.746836  scan_bus: bus Root Device finished in 526 msecs

  682 15:53:13.746938  done

  683 15:53:13.753646  BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 824 ms

  684 15:53:13.753725  POST: 0x73

  685 15:53:13.757297  found VGA at PCI: 02:00.0

  686 15:53:13.760571  Setting up VGA for PCI: 02:00.0

  687 15:53:13.764140  Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:08.1

  688 15:53:13.770356  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

  689 15:53:13.773745  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

  690 15:53:13.773820  Allocating resources...

  691 15:53:13.778469  Reading resources...

  692 15:53:13.782334  Root Device read_resources bus 0 link: 0

  693 15:53:13.785363  CPU_CLUSTER: 0 read_resources bus 0 link: 0

  694 15:53:13.788942  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

  695 15:53:13.791933  DOMAIN: 0000 read_resources bus 0 link: 0

  696 15:53:13.798512  Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.

  697 15:53:13.801980  PCI: 00:01.2 read_resources bus 1 link: 0

  698 15:53:13.805197  PCI: 00:01.2 read_resources bus 1 link: 0 done

  699 15:53:13.811977  PCI: 00:08.1 read_resources bus 2 link: 0

  700 15:53:13.815590  PCI: 02:00.3 read_resources bus 0 link: 0

  701 15:53:13.818943  USB0 port 0 read_resources bus 0 link: 0

  702 15:53:13.822599  USB0 port 0 read_resources bus 0 link: 0 done

  703 15:53:13.829289  PCI: 02:00.3 read_resources bus 0 link: 0 done

  704 15:53:13.832525  PCI: 02:00.5 read_resources bus 0 link: 0

  705 15:53:13.836054  PCI: 02:00.5 read_resources bus 0 link: 0 done

  706 15:53:13.839390  PCI: 00:08.1 read_resources bus 2 link: 0 done

  707 15:53:13.842312  ACPI GNVS at 0xca676000

  708 15:53:13.846144  PCI: 00:14.3 read_resources bus 0 link: 0

  709 15:53:13.849185  PNP: 0c09.0 read_resources bus 0 link: 0

  710 15:53:13.852897  GENERIC: 0.0 read_resources bus 0 link: 0

  711 15:53:13.855808  GENERIC: 0.0 read_resources bus 0 link: 0 done

  712 15:53:13.862974  PNP: 0c09.0 read_resources bus 0 link: 0 done

  713 15:53:13.866295  PCI: 00:14.3 read_resources bus 0 link: 0 done

  714 15:53:13.869219  DOMAIN: 0000 read_resources bus 0 link: 0 done

  715 15:53:13.872991  MMIO: fedc5000 read_resources bus 1 link: 0

  716 15:53:13.879804  MMIO: fedc5000 read_resources bus 1 link: 0 done

  717 15:53:13.883170  MMIO: fedc4000 read_resources bus 2 link: 0

  718 15:53:13.886298  MMIO: fedc4000 read_resources bus 2 link: 0 done

  719 15:53:13.892817  Root Device read_resources bus 0 link: 0 done

  720 15:53:13.892894  Done reading resources.

  721 15:53:13.900101  Show resources in subtree (Root Device)...After reading.

  722 15:53:13.903268   Root Device child on link 0 CPU_CLUSTER: 0

  723 15:53:13.906579    CPU_CLUSTER: 0 child on link 0 APIC: 00

  724 15:53:13.906670     APIC: 00

  725 15:53:13.913291    DOMAIN: 0000 child on link 0 PCI: 00:00.0

  726 15:53:13.920017    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  727 15:53:13.929745    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000100

  728 15:53:13.929827     PCI: 00:00.0

  729 15:53:13.936943     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0

  730 15:53:13.946902     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

  731 15:53:13.953162     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 2

  732 15:53:13.963219     PCI: 00:00.0 resource base 100000 size 1f00000 align 0 gran 0 limit 0 flags e0004200 index 3

  733 15:53:13.969937     PCI: 00:00.0 resource base 2000000 size 1c0000 align 0 gran 0 limit 0 flags f0004200 index 4

  734 15:53:13.981582     PCI: 00:00.0 resource base 21c0000 size c9640000 align 0 gran 0 limit 0 flags e0004200 index 5

  735 15:53:13.989648     PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058

  736 15:53:13.997695     PCI: 00:00.0 resource base cc000000 size 4000000 align 0 gran 0 limit 0 flags f0004200 index 6

  737 15:53:14.004642     PCI: 00:00.0 resource base 100000000 size 2f340000 align 0 gran 0 limit 0 flags e0004200 index 7

  738 15:53:14.014648     PCI: 00:00.0 resource base 12f340000 size cc0000 align 0 gran 0 limit 0 flags f0004200 index 8

  739 15:53:14.024928     PCI: 00:00.0 resource base cb800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9

  740 15:53:14.031330     PCI: 00:00.0 resource base cb7fe000 size 2000 align 0 gran 0 limit 0 flags f0004200 index a

  741 15:53:14.041615     PCI: 00:00.0 resource base ca7fe000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

  742 15:53:14.048083     PCI: 00:00.0 resource base fec01000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec01000

  743 15:53:14.051581     PCI: 00:00.2

  744 15:53:14.058368     PCI: 00:00.2 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 44

  745 15:53:14.061990     PCI: 00:01.0

  746 15:53:14.065194     PCI: 00:01.2 child on link 0 PCI: 01:00.0

  747 15:53:14.071896     PCI: 00:01.2 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c

  748 15:53:14.082266     PCI: 00:01.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

  749 15:53:14.088729     PCI: 00:01.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

  750 15:53:14.091842      PCI: 01:00.0

  751 15:53:14.098506      PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10

  752 15:53:14.108496      PCI: 01:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 18

  753 15:53:14.108606     PCI: 00:08.0

  754 15:53:14.112269     PCI: 00:08.1 child on link 0 PCI: 02:00.0

  755 15:53:14.121889     PCI: 00:08.1 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c

  756 15:53:14.128949     PCI: 00:08.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

  757 15:53:14.138731     PCI: 00:08.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

  758 15:53:14.138809      PCI: 02:00.0

  759 15:53:14.148966      PCI: 02:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 10

  760 15:53:14.159195      PCI: 02:00.0 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 1201 index 18

  761 15:53:14.165599      PCI: 02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 20

  762 15:53:14.175783      PCI: 02:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 24

  763 15:53:14.175887      PCI: 02:00.1

  764 15:53:14.182451      PCI: 02:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10

  765 15:53:14.185872      PCI: 02:00.2

  766 15:53:14.192312      PCI: 02:00.2 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18

  767 15:53:14.202696      PCI: 02:00.2 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24

  768 15:53:14.206077      PCI: 02:00.3 child on link 0 USB0 port 0

  769 15:53:14.216024      PCI: 02:00.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 10

  770 15:53:14.219514       USB0 port 0 child on link 0 USB2 port 0

  771 15:53:14.223043        USB2 port 0

  772 15:53:14.223116        USB2 port 1

  773 15:53:14.226135        USB2 port 2

  774 15:53:14.226230        USB2 port 3

  775 15:53:14.229461        USB2 port 4

  776 15:53:14.229531        USB2 port 5

  777 15:53:14.232931        USB3 port 0

  778 15:53:14.233001        USB3 port 1

  779 15:53:14.236394        USB3 port 2

  780 15:53:14.236470        USB3 port 3

  781 15:53:14.239618      PCI: 02:00.5 child on link 0 GENERIC: 0.0

  782 15:53:14.249584      PCI: 02:00.5 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 10

  783 15:53:14.249697       GENERIC: 0.0

  784 15:53:14.253073       GENERIC: 1.0

  785 15:53:14.253151      PCI: 02:00.7

  786 15:53:14.262847      PCI: 02:00.7 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18

  787 15:53:14.269652      PCI: 02:00.7 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24

  788 15:53:14.273449     PCI: 00:14.0

  789 15:53:14.276534     PCI: 00:14.3 child on link 0 PNP: 0c09.0

  790 15:53:14.283329     PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000

  791 15:53:14.293440     PCI: 00:14.3 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100

  792 15:53:14.299607     PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2

  793 15:53:14.310027     PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3

  794 15:53:14.316653     PCI: 00:14.3 resource base fedc4000 size 2000 align 0 gran 0 limit 0 flags c0000200 index 4

  795 15:53:14.323262      PNP: 0c09.0 child on link 0 GENERIC: 0.0

  796 15:53:14.329721      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

  797 15:53:14.333384       GENERIC: 0.0 child on link 0 I2C: 00:1a

  798 15:53:14.336532        I2C: 00:1a

  799 15:53:14.336604       GENERIC: 0.0

  800 15:53:14.340112       GENERIC: 1.0 child on link 0 I2C: 00:1a

  801 15:53:14.343129        I2C: 00:1a

  802 15:53:14.343204     PCI: 00:18.0

  803 15:53:14.346915     PCI: 00:18.1

  804 15:53:14.347011     PCI: 00:18.2

  805 15:53:14.349959     PCI: 00:18.3

  806 15:53:14.350035     PCI: 00:18.4

  807 15:53:14.350098     PCI: 00:18.5

  808 15:53:14.353392     PCI: 00:18.6

  809 15:53:14.353467     PCI: 00:18.7

  810 15:53:14.360130    MMIO: fedc5000 child on link 0 I2C: 01:50

  811 15:53:14.360208     I2C: 01:50

  812 15:53:14.360272    MMIO: fedca000

  813 15:53:14.363827    MMIO: fedce000

  814 15:53:14.363968    MMIO: fedcf000

  815 15:53:14.370338    MMIO: fedc4000 child on link 0 I2C: 02:15

  816 15:53:14.370412     I2C: 02:15

  817 15:53:14.370480     I2C: 02:10

  818 15:53:14.373363     I2C: 02:40

  819 15:53:14.373434    GENERIC: 0.1

  820 15:53:14.380452  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

  821 15:53:14.386952   PCI: 00:01.2 io: size: 0 align: 12 gran: 12 limit: ffffffff

  822 15:53:14.390501    PCI: 01:00.0 10 *  [0x0 - 0xff] io

  823 15:53:14.397258   PCI: 00:01.2 io: size: 1000 align: 12 gran: 12 limit: ffff done

  824 15:53:14.400161   PCI: 00:01.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff

  825 15:53:14.403862    PCI: 01:00.0 18 *  [0x0 - 0xffff] mem

  826 15:53:14.410197   PCI: 00:01.2 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

  827 15:53:14.417361   PCI: 00:01.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

  828 15:53:14.424199   PCI: 00:01.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

  829 15:53:14.430659   PCI: 00:08.1 io: size: 0 align: 12 gran: 12 limit: ffffffff

  830 15:53:14.433830    PCI: 02:00.0 20 *  [0x0 - 0xff] io

  831 15:53:14.437427   PCI: 00:08.1 io: size: 1000 align: 12 gran: 12 limit: ffff done

  832 15:53:14.443897   PCI: 00:08.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff

  833 15:53:14.447211    PCI: 02:00.2 18 *  [0x0 - 0xfffff] mem

  834 15:53:14.450446    PCI: 02:00.3 10 *  [0x100000 - 0x1fffff] mem

  835 15:53:14.457202    PCI: 02:00.7 18 *  [0x200000 - 0x2fffff] mem

  836 15:53:14.460346    PCI: 02:00.0 24 *  [0x300000 - 0x37ffff] mem

  837 15:53:14.463811    PCI: 02:00.5 10 *  [0x380000 - 0x3bffff] mem

  838 15:53:14.467709    PCI: 02:00.1 10 *  [0x3c0000 - 0x3c3fff] mem

  839 15:53:14.474076    PCI: 02:00.2 24 *  [0x3c4000 - 0x3c5fff] mem

  840 15:53:14.477440    PCI: 02:00.7 24 *  [0x3c6000 - 0x3c7fff] mem

  841 15:53:14.483893   PCI: 00:08.1 mem: size: 400000 align: 20 gran: 20 limit: ffffffff done

  842 15:53:14.490681   PCI: 00:08.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

  843 15:53:14.494170    PCI: 02:00.0 10 *  [0x0 - 0xfffffff] prefmem

  844 15:53:14.497393    PCI: 02:00.0 18 *  [0x10000000 - 0x101fffff] prefmem

  845 15:53:14.507448   PCI: 00:08.1 prefmem: size: 10200000 align: 28 gran: 20 limit: ffffffffffffffff done

  846 15:53:14.514611  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

  847 15:53:14.517799  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

  848 15:53:14.524219   update_constraints: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)

  849 15:53:14.531152   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

  850 15:53:14.534163   DOMAIN: 0000: Resource ranges:

  851 15:53:14.537564   * Base: 1000, Size: f000, Tag: 100

  852 15:53:14.544990    PCI: 00:01.2 1c *  [0x1000 - 0x1fff] limit: 1fff io

  853 15:53:14.547599    PCI: 00:08.1 1c *  [0x2000 - 0x2fff] limit: 2fff io

  854 15:53:14.554314  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

  855 15:53:14.561008  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffffffff

  856 15:53:14.567790   update_constraints: PCI: 00:00.0 00 base 00000000 limit 0009ffff mem (fixed)

  857 15:53:14.574769   update_constraints: PCI: 00:00.0 01 base 000a0000 limit 000bffff mem (fixed)

  858 15:53:14.581480   update_constraints: PCI: 00:00.0 02 base 000c0000 limit 000fffff mem (fixed)

  859 15:53:14.588097   update_constraints: PCI: 00:00.0 03 base 00100000 limit 01ffffff mem (fixed)

  860 15:53:14.595671   update_constraints: PCI: 00:00.0 04 base 02000000 limit 021bffff mem (fixed)

  861 15:53:14.602510   update_constraints: PCI: 00:00.0 05 base 021c0000 limit cb7fffff mem (fixed)

  862 15:53:14.609265   update_constraints: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed)

  863 15:53:14.616060   update_constraints: PCI: 00:00.0 06 base cc000000 limit cfffffff mem (fixed)

  864 15:53:14.622508   update_constraints: PCI: 00:00.0 07 base 100000000 limit 12f33ffff mem (fixed)

  865 15:53:14.629303   update_constraints: PCI: 00:00.0 08 base 12f340000 limit 12fffffff mem (fixed)

  866 15:53:14.636371   update_constraints: PCI: 00:00.0 09 base cb800000 limit cbffffff mem (fixed)

  867 15:53:14.642616   update_constraints: PCI: 00:00.0 0a base cb7fe000 limit cb7fffff mem (fixed)

  868 15:53:14.649888   update_constraints: PCI: 00:00.0 0b base ca7fe000 limit cb7fdfff mem (fixed)

  869 15:53:14.655926   update_constraints: PCI: 00:00.0 fec01000 base fec01000 limit fec01fff mem (fixed)

  870 15:53:14.666556   update_constraints: PCI: 00:14.3 10000100 base ff000000 limit ffffffff mem (fixed)

  871 15:53:14.672830   update_constraints: PCI: 00:14.3 02 base fec10000 limit fec103ff mem (fixed)

  872 15:53:14.680293   update_constraints: PCI: 00:14.3 03 base fec00000 limit fec00fff mem (fixed)

  873 15:53:14.686551   update_constraints: PCI: 00:14.3 04 base fedc4000 limit fedc5fff mem (fixed)

  874 15:53:14.686634   DOMAIN: 0000: Resource ranges:

  875 15:53:14.693225   * Base: d0000000, Size: 28000000, Tag: 200

  876 15:53:14.696567   * Base: fc000000, Size: 2c00000, Tag: 200

  877 15:53:14.699988   * Base: fec02000, Size: e000, Tag: 200

  878 15:53:14.703341   * Base: fec11000, Size: 1b3000, Tag: 200

  879 15:53:14.706754   * Base: fedc6000, Size: 23a000, Tag: 200

  880 15:53:14.709988   * Base: 130000000, Size: fffed0000000, Tag: 100200

  881 15:53:14.716903    PCI: 00:08.1 24 *  [0xd0000000 - 0xe01fffff] limit: e01fffff prefmem

  882 15:53:14.723544    PCI: 00:08.1 20 *  [0xe0200000 - 0xe05fffff] limit: e05fffff mem

  883 15:53:14.729808    PCI: 00:01.2 20 *  [0xe0600000 - 0xe06fffff] limit: e06fffff mem

  884 15:53:14.736984    PCI: 00:00.2 44 *  [0xe0700000 - 0xe077ffff] limit: e077ffff mem

  885 15:53:14.743301  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffffffff done

  886 15:53:14.746597  PCI: 00:01.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff

  887 15:53:14.750049   PCI: 00:01.2: Resource ranges:

  888 15:53:14.753398   * Base: 1000, Size: 1000, Tag: 100

  889 15:53:14.760307    PCI: 01:00.0 10 *  [0x1000 - 0x10ff] limit: 10ff io

  890 15:53:14.766774  PCI: 00:01.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff done

  891 15:53:14.773687  PCI: 00:01.2 mem: base: e0600000 size: 100000 align: 20 gran: 20 limit: e06fffff

  892 15:53:14.776968   PCI: 00:01.2: Resource ranges:

  893 15:53:14.780469   * Base: e0600000, Size: 100000, Tag: 200

  894 15:53:14.787182    PCI: 01:00.0 18 *  [0xe0600000 - 0xe060ffff] limit: e060ffff mem

  895 15:53:14.793619  PCI: 00:01.2 mem: base: e0600000 size: 100000 align: 20 gran: 20 limit: e06fffff done

  896 15:53:14.800388  PCI: 00:08.1 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff

  897 15:53:14.800472   PCI: 00:08.1: Resource ranges:

  898 15:53:14.803913   * Base: 2000, Size: 1000, Tag: 100

  899 15:53:14.810491    PCI: 02:00.0 20 *  [0x2000 - 0x20ff] limit: 20ff io

  900 15:53:14.817203  PCI: 00:08.1 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done

  901 15:53:14.824150  PCI: 00:08.1 prefmem: base: d0000000 size: 10200000 align: 28 gran: 20 limit: e01fffff

  902 15:53:14.827514   PCI: 00:08.1: Resource ranges:

  903 15:53:14.830811   * Base: d0000000, Size: 10200000, Tag: 1200

  904 15:53:14.837390    PCI: 02:00.0 10 *  [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem

  905 15:53:14.844103    PCI: 02:00.0 18 *  [0xe0000000 - 0xe01fffff] limit: e01fffff prefmem

  906 15:53:14.851015  PCI: 00:08.1 prefmem: base: d0000000 size: 10200000 align: 28 gran: 20 limit: e01fffff done

  907 15:53:14.857825  PCI: 00:08.1 mem: base: e0200000 size: 400000 align: 20 gran: 20 limit: e05fffff

  908 15:53:14.861142   PCI: 00:08.1: Resource ranges:

  909 15:53:14.864401   * Base: e0200000, Size: 400000, Tag: 200

  910 15:53:14.871607    PCI: 02:00.2 18 *  [0xe0200000 - 0xe02fffff] limit: e02fffff mem

  911 15:53:14.878011    PCI: 02:00.3 10 *  [0xe0300000 - 0xe03fffff] limit: e03fffff mem

  912 15:53:14.884525    PCI: 02:00.7 18 *  [0xe0400000 - 0xe04fffff] limit: e04fffff mem

  913 15:53:14.888368    PCI: 02:00.0 24 *  [0xe0500000 - 0xe057ffff] limit: e057ffff mem

  914 15:53:14.894809    PCI: 02:00.5 10 *  [0xe0580000 - 0xe05bffff] limit: e05bffff mem

  915 15:53:14.901747    PCI: 02:00.1 10 *  [0xe05c0000 - 0xe05c3fff] limit: e05c3fff mem

  916 15:53:14.908008    PCI: 02:00.2 24 *  [0xe05c4000 - 0xe05c5fff] limit: e05c5fff mem

  917 15:53:14.911529    PCI: 02:00.7 24 *  [0xe05c6000 - 0xe05c7fff] limit: e05c7fff mem

  918 15:53:14.922140  PCI: 00:08.1 mem: base: e0200000 size: 400000 align: 20 gran: 20 limit: e05fffff done

  919 15:53:14.925250  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

  920 15:53:14.931981  Root Device assign_resources, bus 0 link: 0

  921 15:53:14.935362  DOMAIN: 0000 assign_resources, bus 0 link: 0

  922 15:53:14.942325  PCI: 00:00.2 44 <- [0x00e0700000 - 0x00e077ffff] size 0x00080000 gran 0x13 mem

  923 15:53:14.948490  PCI: 00:01.2 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io

  924 15:53:14.958770  PCI: 00:01.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

  925 15:53:14.965540  PCI: 00:01.2 20 <- [0x00e0600000 - 0x00e06fffff] size 0x00100000 gran 0x14 bus 01 mem

  926 15:53:14.968832  PCI: 00:01.2 assign_resources, bus 1 link: 0

  927 15:53:14.975585  PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io

  928 15:53:14.982215  PCI: 01:00.0 18 <- [0x00e0600000 - 0x00e060ffff] size 0x00010000 gran 0x10 mem64

  929 15:53:14.988764  PCI: 00:01.2 assign_resources, bus 1 link: 0

  930 15:53:14.995638  PCI: 00:08.1 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io

  931 15:53:15.001978  PCI: 00:08.1 24 <- [0x00d0000000 - 0x00e01fffff] size 0x10200000 gran 0x14 bus 02 prefmem

  932 15:53:15.012273  PCI: 00:08.1 20 <- [0x00e0200000 - 0x00e05fffff] size 0x00400000 gran 0x14 bus 02 mem

  933 15:53:15.015624  PCI: 00:08.1 assign_resources, bus 2 link: 0

  934 15:53:15.022986  PCI: 02:00.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64

  935 15:53:15.029288  PCI: 02:00.0 18 <- [0x00e0000000 - 0x00e01fffff] size 0x00200000 gran 0x15 prefmem64

  936 15:53:15.035665  PCI: 02:00.0 20 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io

  937 15:53:15.042147  PCI: 02:00.0 24 <- [0x00e0500000 - 0x00e057ffff] size 0x00080000 gran 0x13 mem

  938 15:53:15.049489  PCI: 02:00.1 10 <- [0x00e05c0000 - 0x00e05c3fff] size 0x00004000 gran 0x0e mem

  939 15:53:15.055773  PCI: 02:00.2 18 <- [0x00e0200000 - 0x00e02fffff] size 0x00100000 gran 0x14 mem

  940 15:53:15.065920  PCI: 02:00.2 24 <- [0x00e05c4000 - 0x00e05c5fff] size 0x00002000 gran 0x0d mem

  941 15:53:15.072967  PCI: 02:00.3 10 <- [0x00e0300000 - 0x00e03fffff] size 0x00100000 gran 0x14 mem64

  942 15:53:15.076231  PCI: 02:00.3 assign_resources, bus 0 link: 0

  943 15:53:15.079760  PCI: 02:00.3 assign_resources, bus 0 link: 0

  944 15:53:15.086816  PCI: 02:00.5 10 <- [0x00e0580000 - 0x00e05bffff] size 0x00040000 gran 0x12 mem

  945 15:53:15.089911  PCI: 02:00.5 assign_resources, bus 0 link: 0

  946 15:53:15.092778  PCI: 02:00.5 assign_resources, bus 0 link: 0

  947 15:53:15.103338  PCI: 02:00.7 18 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 mem

  948 15:53:15.109779  PCI: 02:00.7 24 <- [0x00e05c6000 - 0x00e05c7fff] size 0x00002000 gran 0x0d mem

  949 15:53:15.113052  PCI: 00:08.1 assign_resources, bus 2 link: 0

  950 15:53:15.116480  PCI: 00:14.3 assign_resources, bus 0 link: 0

  951 15:53:15.119712  PCI: 00:14.3 assign_resources, bus 0 link: 0

  952 15:53:15.123310  DOMAIN: 0000 assign_resources, bus 0 link: 0

  953 15:53:15.129858  Root Device assign_resources, bus 0 link: 0

  954 15:53:15.129940  Done setting resources.

  955 15:53:15.136397  Show resources in subtree (Root Device)...After assigning values.

  956 15:53:15.139864   Root Device child on link 0 CPU_CLUSTER: 0

  957 15:53:15.143482    CPU_CLUSTER: 0 child on link 0 APIC: 00

  958 15:53:15.146789     APIC: 00

  959 15:53:15.150391    DOMAIN: 0000 child on link 0 PCI: 00:00.0

  960 15:53:15.157296    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  961 15:53:15.167045    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000100

  962 15:53:15.167124     PCI: 00:00.0

  963 15:53:15.177304     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0

  964 15:53:15.184055     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

  965 15:53:15.193795     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 2

  966 15:53:15.200833     PCI: 00:00.0 resource base 100000 size 1f00000 align 0 gran 0 limit 0 flags e0004200 index 3

  967 15:53:15.211006     PCI: 00:00.0 resource base 2000000 size 1c0000 align 0 gran 0 limit 0 flags f0004200 index 4

  968 15:53:15.217518     PCI: 00:00.0 resource base 21c0000 size c9640000 align 0 gran 0 limit 0 flags e0004200 index 5

  969 15:53:15.227675     PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058

  970 15:53:15.234173     PCI: 00:00.0 resource base cc000000 size 4000000 align 0 gran 0 limit 0 flags f0004200 index 6

  971 15:53:15.244668     PCI: 00:00.0 resource base 100000000 size 2f340000 align 0 gran 0 limit 0 flags e0004200 index 7

  972 15:53:15.254676     PCI: 00:00.0 resource base 12f340000 size cc0000 align 0 gran 0 limit 0 flags f0004200 index 8

  973 15:53:15.261194     PCI: 00:00.0 resource base cb800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9

  974 15:53:15.271047     PCI: 00:00.0 resource base cb7fe000 size 2000 align 0 gran 0 limit 0 flags f0004200 index a

  975 15:53:15.277880     PCI: 00:00.0 resource base ca7fe000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

  976 15:53:15.287741     PCI: 00:00.0 resource base fec01000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec01000

  977 15:53:15.287848     PCI: 00:00.2

  978 15:53:15.298191     PCI: 00:00.2 resource base e0700000 size 80000 align 19 gran 19 limit e077ffff flags 60000200 index 44

  979 15:53:15.298271     PCI: 00:01.0

  980 15:53:15.304874     PCI: 00:01.2 child on link 0 PCI: 01:00.0

  981 15:53:15.311848     PCI: 00:01.2 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c

  982 15:53:15.322028     PCI: 00:01.2 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

  983 15:53:15.331697     PCI: 00:01.2 resource base e0600000 size 100000 align 20 gran 20 limit e06fffff flags 60080202 index 20

  984 15:53:15.331811      PCI: 01:00.0

  985 15:53:15.341712      PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10

  986 15:53:15.352288      PCI: 01:00.0 resource base e0600000 size 10000 align 16 gran 16 limit e060ffff flags 60000201 index 18

  987 15:53:15.352371     PCI: 00:08.0

  988 15:53:15.355633     PCI: 00:08.1 child on link 0 PCI: 02:00.0

  989 15:53:15.365565     PCI: 00:08.1 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c

  990 15:53:15.375444     PCI: 00:08.1 resource base d0000000 size 10200000 align 28 gran 20 limit e01fffff flags 60081202 index 24

  991 15:53:15.385516     PCI: 00:08.1 resource base e0200000 size 400000 align 20 gran 20 limit e05fffff flags 60080202 index 20

  992 15:53:15.385600      PCI: 02:00.0

  993 15:53:15.395729      PCI: 02:00.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 10

  994 15:53:15.406199      PCI: 02:00.0 resource base e0000000 size 200000 align 21 gran 21 limit e01fffff flags 60001201 index 18

  995 15:53:15.412362      PCI: 02:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 20

  996 15:53:15.423195      PCI: 02:00.0 resource base e0500000 size 80000 align 19 gran 19 limit e057ffff flags 60000200 index 24

  997 15:53:15.423274      PCI: 02:00.1

  998 15:53:15.432539      PCI: 02:00.1 resource base e05c0000 size 4000 align 14 gran 14 limit e05c3fff flags 60000200 index 10

  999 15:53:15.436078      PCI: 02:00.2

 1000 15:53:15.442609      PCI: 02:00.2 resource base e0200000 size 100000 align 20 gran 20 limit e02fffff flags 60000200 index 18

 1001 15:53:15.452535      PCI: 02:00.2 resource base e05c4000 size 2000 align 13 gran 13 limit e05c5fff flags 60000200 index 24

 1002 15:53:15.456412      PCI: 02:00.3 child on link 0 USB0 port 0

 1003 15:53:15.466221      PCI: 02:00.3 resource base e0300000 size 100000 align 20 gran 20 limit e03fffff flags 60000201 index 10

 1004 15:53:15.473248       USB0 port 0 child on link 0 USB2 port 0

 1005 15:53:15.473330        USB2 port 0

 1006 15:53:15.476033        USB2 port 1

 1007 15:53:15.476114        USB2 port 2

 1008 15:53:15.479213        USB2 port 3

 1009 15:53:15.479293        USB2 port 4

 1010 15:53:15.482903        USB2 port 5

 1011 15:53:15.482985        USB3 port 0

 1012 15:53:15.486523        USB3 port 1

 1013 15:53:15.486605        USB3 port 2

 1014 15:53:15.489486        USB3 port 3

 1015 15:53:15.493035      PCI: 02:00.5 child on link 0 GENERIC: 0.0

 1016 15:53:15.503004      PCI: 02:00.5 resource base e0580000 size 40000 align 18 gran 18 limit e05bffff flags 60000200 index 10

 1017 15:53:15.503090       GENERIC: 0.0

 1018 15:53:15.506102       GENERIC: 1.0

 1019 15:53:15.506184      PCI: 02:00.7

 1020 15:53:15.516192      PCI: 02:00.7 resource base e0400000 size 100000 align 20 gran 20 limit e04fffff flags 60000200 index 18

 1021 15:53:15.526906      PCI: 02:00.7 resource base e05c6000 size 2000 align 13 gran 13 limit e05c7fff flags 60000200 index 24

 1022 15:53:15.526987     PCI: 00:14.0

 1023 15:53:15.529804     PCI: 00:14.3 child on link 0 PNP: 0c09.0

 1024 15:53:15.539973     PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000

 1025 15:53:15.546282     PCI: 00:14.3 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100

 1026 15:53:15.556730     PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2

 1027 15:53:15.563761     PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3

 1028 15:53:15.573748     PCI: 00:14.3 resource base fedc4000 size 2000 align 0 gran 0 limit 0 flags c0000200 index 4

 1029 15:53:15.576888      PNP: 0c09.0 child on link 0 GENERIC: 0.0

 1030 15:53:15.583773      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1031 15:53:15.590110       GENERIC: 0.0 child on link 0 I2C: 00:1a

 1032 15:53:15.590187        I2C: 00:1a

 1033 15:53:15.590251       GENERIC: 0.0

 1034 15:53:15.597283       GENERIC: 1.0 child on link 0 I2C: 00:1a

 1035 15:53:15.597357        I2C: 00:1a

 1036 15:53:15.600482     PCI: 00:18.0

 1037 15:53:15.600553     PCI: 00:18.1

 1038 15:53:15.600614     PCI: 00:18.2

 1039 15:53:15.604066     PCI: 00:18.3

 1040 15:53:15.604138     PCI: 00:18.4

 1041 15:53:15.607130     PCI: 00:18.5

 1042 15:53:15.607228     PCI: 00:18.6

 1043 15:53:15.610281     PCI: 00:18.7

 1044 15:53:15.613812    MMIO: fedc5000 child on link 0 I2C: 01:50

 1045 15:53:15.613882     I2C: 01:50

 1046 15:53:15.617143    MMIO: fedca000

 1047 15:53:15.617245    MMIO: fedce000

 1048 15:53:15.620245    MMIO: fedcf000

 1049 15:53:15.623582    MMIO: fedc4000 child on link 0 I2C: 02:15

 1050 15:53:15.623682     I2C: 02:15

 1051 15:53:15.627388     I2C: 02:10

 1052 15:53:15.627489     I2C: 02:40

 1053 15:53:15.627579    GENERIC: 0.1

 1054 15:53:15.630586  Done allocating resources.

 1055 15:53:15.637049  BS: BS_DEV_RESOURCES run times (exec / console): 4 / 1870 ms

 1056 15:53:15.640719  0x00000020: notify_params->phase

 1057 15:53:15.640798  Calling FspNotify: 0xca6773b8

 1058 15:53:15.644136  	0xca6fff7c: notify_params

 1059 15:53:15.647065  POST: 0x94

 1060 15:53:15.647137  POST: 0x94

 1061 15:53:15.650959  FspNotify returned 0x00000000

 1062 15:53:15.657283  PCI_INTR tables: Writing registers C00/C01 for PCI IRQ routing:

 1063 15:53:15.660592  PCI_INTR_INDEX	name		     PIC mode	APIC mode

 1064 15:53:15.664184  0x00		INTA#                0x06	0x1F

 1065 15:53:15.667412  0x01		INTB#                0x0D	0x1F

 1066 15:53:15.671136  0x02		INTC#                0x0E	0x1F

 1067 15:53:15.674079  0x03		INTD#                0x0F	0x1F

 1068 15:53:15.677580  0x04		INTE#                0x0F	0x1F

 1069 15:53:15.681328  0x05		INTF#/GENINT2        0x0E	0x1F

 1070 15:53:15.684664  0x06		INTG#                0x0D	0x1F

 1071 15:53:15.687973  0x07		INTH#                0x06	0x1F

 1072 15:53:15.691203  0x08		Misc                 0xFA	0x00

 1073 15:53:15.694836  0x09		Misc0                0xF1	0x00

 1074 15:53:15.698151  0x0A		Misc1                0x00	0x00

 1075 15:53:15.701096  0x0B		Misc2                0x00	0x00

 1076 15:53:15.704455  0x0C		Ser IRQ INTA         0x1F	0x1F

 1077 15:53:15.707666  0x0D		Ser IRQ INTB         0x1F	0x1F

 1078 15:53:15.710932  0x0E		Ser IRQ INTC         0x1F	0x1F

 1079 15:53:15.714524  0x0F		Ser IRQ INTD         0x1F	0x1F

 1080 15:53:15.717887  0x10		SCI                  0x09	0x09

 1081 15:53:15.721236  0x11		SMBUS                0x1F	0x1F

 1082 15:53:15.724799  0x12		ASF                  0x1F	0x1F

 1083 15:53:15.727641  0x16		PerMon               0x1F	0x1F

 1084 15:53:15.730861  0x17		SD                   0x1F	0x1F

 1085 15:53:15.734315  0x1A		SDIO                 0x1F	0x1F

 1086 15:53:15.737780  0x20		CIR                  0x1F	0x1F

 1087 15:53:15.741429  0x21		GPIOa                0x1F	0x1F

 1088 15:53:15.744498  0x22		GPIOb                0x1F	0x1F

 1089 15:53:15.747568  0x23		GPIOc                0x1F	0x1F

 1090 15:53:15.751393  0x41		SATA                 0x1F	0x1F

 1091 15:53:15.754419  0x43		eMMC                 0x05	0x05

 1092 15:53:15.757864  0x50		GPP0                 0x1F	0x1F

 1093 15:53:15.761129  0x51		GPP1                 0x1F	0x1F

 1094 15:53:15.764587  0x52		GPP2                 0x1F	0x1F

 1095 15:53:15.767502  0x53		GPP3                 0x1F	0x1F

 1096 15:53:15.770870  0x62		GPIO                 0x07	0x07

 1097 15:53:15.774406  0x70		I2C0                 0x1F	0x1F

 1098 15:53:15.777533  0x71		I2C1                 0x1F	0x1F

 1099 15:53:15.780896  0x72		I2C2                 0x0A	0x0A

 1100 15:53:15.784185  0x73		I2C3                 0x0B	0x0B

 1101 15:53:15.787845  0x74		UART0                0x04	0x04

 1102 15:53:15.791246  0x75		UART1                0x03	0x03

 1103 15:53:15.794128  0x76		I2C4                 0x1F	0x1F

 1104 15:53:15.797874  0x77		I2C5                 0x1F	0x1F

 1105 15:53:15.800859  0x78		UART2                0x1F	0x1F

 1106 15:53:15.804273  0x79		UART3                0x1F	0x1F

 1107 15:53:15.807675  PCI_CFG IRQ: Write PCI config space IRQ assignments

 1108 15:53:15.810966  PCI IRQ: Found device 0:00.02 using PIN A

 1109 15:53:15.814325  PCI Devfn (0x2) not found in pirq_data table

 1110 15:53:15.817860  PCI IRQ: Found device 0:08.01 using PIN A

 1111 15:53:15.824667  	Found this device in pirq_data table entry 7

 1112 15:53:15.824745  	Orig INT_PIN	: 1 (PIN A)

 1113 15:53:15.828030  	PCI_INTR idx	: 0x04 (INTE#)

 1114 15:53:15.831215  	INT_LINE	: 0xF (IRQ 15)

 1115 15:53:15.834462  PCI IRQ: Found device 1:00.00 using PIN A

 1116 15:53:15.838574  	With INT_PIN swizzled to PIN A

 1117 15:53:15.841504  	Attached to bridge device 0:01h.02h

 1118 15:53:15.844607  	Found this device in pirq_data table entry 1

 1119 15:53:15.847832  	Orig INT_PIN	: 1 (PIN A)

 1120 15:53:15.847979  	PCI_INTR idx	: 0x04 (INTE#)

 1121 15:53:15.851416  	INT_LINE	: 0xF (IRQ 15)

 1122 15:53:15.855040  PCI IRQ: Found device 2:00.00 using PIN A

 1123 15:53:15.858107  	With INT_PIN swizzled to PIN A

 1124 15:53:15.861480  	Attached to bridge device 0:08h.01h

 1125 15:53:15.865042  	Found this device in pirq_data table entry 7

 1126 15:53:15.868537  	Orig INT_PIN	: 1 (PIN A)

 1127 15:53:15.871310  	PCI_INTR idx	: 0x04 (INTE#)

 1128 15:53:15.871391  	INT_LINE	: 0xF (IRQ 15)

 1129 15:53:15.878265  PCI IRQ: Found device 2:00.01 using PIN B

 1130 15:53:15.878348  	With INT_PIN swizzled to PIN B

 1131 15:53:15.881785  	Attached to bridge device 0:08h.01h

 1132 15:53:15.888278  	Found this device in pirq_data table entry 7

 1133 15:53:15.888362  	Orig INT_PIN	: 2 (PIN B)

 1134 15:53:15.891799  	PCI_INTR idx	: 0x05 (INTF#/GENINT2)

 1135 15:53:15.895377  	INT_LINE	: 0xE (IRQ 14)

 1136 15:53:15.898403  PCI IRQ: Found device 2:00.02 using PIN C

 1137 15:53:15.901965  	With INT_PIN swizzled to PIN C

 1138 15:53:15.905196  	Attached to bridge device 0:08h.01h

 1139 15:53:15.908856  	Found this device in pirq_data table entry 7

 1140 15:53:15.911560  	Orig INT_PIN	: 3 (PIN C)

 1141 15:53:15.915192  	PCI_INTR idx	: 0x06 (INTG#)

 1142 15:53:15.915274  	INT_LINE	: 0xD (IRQ 13)

 1143 15:53:15.918606  PCI IRQ: Found device 2:00.03 using PIN D

 1144 15:53:15.921809  	With INT_PIN swizzled to PIN D

 1145 15:53:15.925183  	Attached to bridge device 0:08h.01h

 1146 15:53:15.928559  	Found this device in pirq_data table entry 7

 1147 15:53:15.931940  	Orig INT_PIN	: 4 (PIN D)

 1148 15:53:15.935583  	PCI_INTR idx	: 0x07 (INTH#)

 1149 15:53:15.938751  	INT_LINE	: 0x6 (IRQ 6)

 1150 15:53:15.941997  PCI IRQ: Found device 2:00.05 using PIN B

 1151 15:53:15.945884  	With INT_PIN swizzled to PIN B

 1152 15:53:15.948811  	Attached to bridge device 0:08h.01h

 1153 15:53:15.952169  	Found this device in pirq_data table entry 7

 1154 15:53:15.952250  	Orig INT_PIN	: 2 (PIN B)

 1155 15:53:15.955583  	PCI_INTR idx	: 0x05 (INTF#/GENINT2)

 1156 15:53:15.959028  	INT_LINE	: 0xE (IRQ 14)

 1157 15:53:15.961932  PCI IRQ: Found device 2:00.07 using PIN D

 1158 15:53:15.965404  	With INT_PIN swizzled to PIN D

 1159 15:53:15.968590  	Attached to bridge device 0:08h.01h

 1160 15:53:15.972332  	Found this device in pirq_data table entry 7

 1161 15:53:15.975701  	Orig INT_PIN	: 4 (PIN D)

 1162 15:53:15.978858  	PCI_INTR idx	: 0x07 (INTH#)

 1163 15:53:15.978977  	INT_LINE	: 0x6 (IRQ 6)

 1164 15:53:15.985758  PCI_CFG IRQ: Finished writing PCI config space IRQ assignments

 1165 15:53:15.992051  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 347 ms

 1166 15:53:15.992132  POST: 0x74

 1167 15:53:15.995414  Enabling resources...

 1168 15:53:15.995495  PCI: 00:00.0 cmd <- 00

 1169 15:53:15.998967  PCI: 00:00.2 subsystem <- 1022/1510

 1170 15:53:16.002943  PCI: 00:00.2 cmd <- 06

 1171 15:53:16.005520  PCI: 00:01.0 subsystem <- 1022/1510

 1172 15:53:16.005600  PCI: 00:01.0 cmd <- 00

 1173 15:53:16.009056  PCI: 00:01.2 bridge ctrl <- 0013

 1174 15:53:16.012545  PCI: 00:01.2 cmd <- 07

 1175 15:53:16.016052  PCI: 00:08.0 subsystem <- 1022/1510

 1176 15:53:16.018809  PCI: 00:08.0 cmd <- 00

 1177 15:53:16.018889  PCI: 00:08.1 bridge ctrl <- 001b

 1178 15:53:16.022050  PCI: 00:08.1 cmd <- 07

 1179 15:53:16.025594  PCI: 00:14.0 subsystem <- 1022/1510

 1180 15:53:16.028985  PCI: 00:14.0 cmd <- 403

 1181 15:53:16.032402  PCI: 00:14.3 subsystem <- 1022/1510

 1182 15:53:16.032484  PCI: 00:14.3 cmd <- 0f

 1183 15:53:16.035670  PCI: 00:18.7 cmd <- 00

 1184 15:53:16.039073  PCI: 01:00.0 subsystem <- 1022/1510

 1185 15:53:16.042684  PCI: 01:00.0 cmd <- 03

 1186 15:53:16.045817  PCI: 02:00.0 subsystem <- 1022/1510

 1187 15:53:16.045898  PCI: 02:00.0 cmd <- 07

 1188 15:53:16.049217  PCI: 02:00.1 subsystem <- 1022/1510

 1189 15:53:16.052270  PCI: 02:00.1 cmd <- 02

 1190 15:53:16.055701  PCI: 02:00.2 subsystem <- 1022/1510

 1191 15:53:16.055783  PCI: 02:00.2 cmd <- 02

 1192 15:53:16.059173  PCI: 02:00.3 subsystem <- 1022/1510

 1193 15:53:16.062567  PCI: 02:00.3 cmd <- 02

 1194 15:53:16.066178  PCI: 02:00.5 subsystem <- 1022/1510

 1195 15:53:16.069697  PCI: 02:00.5 cmd <- 02

 1196 15:53:16.073179  PCI: 02:00.7 subsystem <- 1022/1510

 1197 15:53:16.073260  PCI: 02:00.7 cmd <- 02

 1198 15:53:16.073324  done.

 1199 15:53:16.079420  BS: BS_DEV_ENABLE run times (exec / console): 1 / 82 ms

 1200 15:53:16.079502  POST: 0x75

 1201 15:53:16.082779  Initializing devices...

 1202 15:53:16.082859  POST: 0x75

 1203 15:53:16.085954  CPU_CLUSTER: 0 init

 1204 15:53:16.089480  MTRR: Physical address space:

 1205 15:53:16.093350  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1206 15:53:16.099809  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1207 15:53:16.103293  0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6

 1208 15:53:16.109947  0x00000000d0000000 - 0x00000000e0200000 size 0x10200000 type 1

 1209 15:53:16.116891  0x00000000e0200000 - 0x0000000100000000 size 0x1fe00000 type 0

 1210 15:53:16.119968  0x0000000100000000 - 0x0000000130000000 size 0x30000000 type 6

 1211 15:53:16.126609  MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e

 1212 15:53:16.130547  MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e

 1213 15:53:16.133402  MTRR: Fixed MSR 0x259 0x0000000000000000

 1214 15:53:16.136767  MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e

 1215 15:53:16.139962  MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e

 1216 15:53:16.143367  MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e

 1217 15:53:16.146933  MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e

 1218 15:53:16.150109  MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e

 1219 15:53:16.153386  MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e

 1220 15:53:16.156970  MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e

 1221 15:53:16.160124  MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e

 1222 15:53:16.163792  call enable_fixed_mtrr()

 1223 15:53:16.166704  CPU physical address size: 48 bits

 1224 15:53:16.170175  MTRR: default type WB/UC MTRR counts: 10/5.

 1225 15:53:16.173637  MTRR: UC selected as default type.

 1226 15:53:16.180508  MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6

 1227 15:53:16.183846  MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6

 1228 15:53:16.190766  MTRR: 2 base 0x00000000c0000000 mask 0x0000fffff0000000 type 6

 1229 15:53:16.197409  MTRR: 3 base 0x00000000d0000000 mask 0x0000fffff0000000 type 1

 1230 15:53:16.200428  MTRR: 4 base 0x00000000e0000000 mask 0x0000ffffffe00000 type 1

 1231 15:53:16.203779  

 1232 15:53:16.203858  MTRR check

 1233 15:53:16.203951  Fixed MTRRs   : Enabled

 1234 15:53:16.207175  Variable MTRRs: Enabled

 1235 15:53:16.207255  

 1236 15:53:16.210731  POST: 0x93

 1237 15:53:16.210811  Setting up SMI for CPU

 1238 15:53:16.213803  Will perform SMM setup.

 1239 15:53:16.217371  CPU: AMD 3015Ce with Radeon Graphics                .

 1240 15:53:16.224184  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

 1241 15:53:16.230555  Processing 16 relocs. Offset value of 0x00030000

 1242 15:53:16.230636  Attempting to start 3 APs

 1243 15:53:16.233932  Waiting for 10ms after sending INIT.

 1244 15:53:16.250527  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 2.

 1245 15:53:16.250610  done.

 1246 15:53:16.253690  AP: slot 1 apic_id 3.

 1247 15:53:16.253772  AP: slot 3 apic_id 1.

 1248 15:53:16.263939  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

 1249 15:53:16.267291  Processing 13 relocs. Offset value of 0x00038000

 1250 15:53:16.273927  SMM Module: stub loaded at 0x00038000. Will call 0xca6d31a3(0x00000000)

 1251 15:53:16.276987  Installing permanent SMM handler to 0xcb800000

 1252 15:53:16.283908  Loading module at 0xcb810000 with entry 0xcb8114d2. filesize: 0x6b10 memsize: 0xd3c8

 1253 15:53:16.290578  Processing 415 relocs. Offset value of 0xcb810000

 1254 15:53:16.297675  Loading module at 0xcb808000 with entry 0xcb808000. filesize: 0x1b8 memsize: 0x1b8

 1255 15:53:16.301154  Processing 13 relocs. Offset value of 0xcb808000

 1256 15:53:16.307233  SMM Module: placing jmp sequence at 0xcb807e00 rel16 0x01fd

 1257 15:53:16.310658  SMM Module: placing jmp sequence at 0xcb807c00 rel16 0x03fd

 1258 15:53:16.317321  SMM Module: placing jmp sequence at 0xcb807a00 rel16 0x05fd

 1259 15:53:16.324164  SMM Module: stub loaded at 0xcb808000. Will call 0xcb8114d2(0x00000000)

 1260 15:53:16.330991  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffc00, cpu = 2

 1261 15:53:16.333864  Relocation complete.

 1262 15:53:16.338293  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb800000, cpu = 0

 1263 15:53:16.341351  Relocation complete.

 1264 15:53:16.347794  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffe00, cpu = 1

 1265 15:53:16.347876  Relocation complete.

 1266 15:53:16.354557  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffa00, cpu = 3

 1267 15:53:16.358036  Relocation complete.

 1268 15:53:16.358116  Initializing CPU #0

 1269 15:53:16.361090  CPU: vendor AMD device 820f01

 1270 15:53:16.364383  CPU: family 17, model 20, stepping 01

 1271 15:53:16.367744  Setting up local APIC...

 1272 15:53:16.371234   apic_id: 0x00 done.

 1273 15:53:16.374369  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1274 15:53:16.377892  CBFS: Locating 'cpu_microcode_blob.bin'

 1275 15:53:16.381299  CBFS: Found @ offset cd00 size 2580

 1276 15:53:16.384877  microcode: patch id to apply = 0x08200103

 1277 15:53:16.391086  microcode: being updated to patch id = 0x08200103 succeeded

 1278 15:53:16.391168  CPU #0 initialized

 1279 15:53:16.395146  Initializing CPU #2

 1280 15:53:16.395228  Initializing CPU #3

 1281 15:53:16.398471  CPU: vendor AMD device 820f01

 1282 15:53:16.401242  CPU: vendor AMD device 820f01

 1283 15:53:16.404905  CPU: family 17, model 20, stepping 01

 1284 15:53:16.408256  Initializing CPU #1

 1285 15:53:16.411435  CPU: family 17, model 20, stepping 01

 1286 15:53:16.411516  Setting up local APIC...

 1287 15:53:16.414734  CPU: vendor AMD device 820f01

 1288 15:53:16.418384   apic_id: 0x01 done.

 1289 15:53:16.421692  CPU: family 17, model 20, stepping 01

 1290 15:53:16.421773  Setting up local APIC...

 1291 15:53:16.425319  Setting up local APIC...

 1292 15:53:16.428786  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1293 15:53:16.435010   apic_id: 0x02 CBFS: Locating 'cpu_microcode_blob.bin'

 1294 15:53:16.435092  done.

 1295 15:53:16.438341  CBFS: Found @ offset cd00 size 2580

 1296 15:53:16.445274   apic_id: 0x03 microcode: patch id to apply = 0x08200103

 1297 15:53:16.445355  done.

 1298 15:53:16.448607  microcode: being updated to patch id = 0x08200103 succeeded

 1299 15:53:16.455439  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1300 15:53:16.458696  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1301 15:53:16.462064  CPU #3 initialized

 1302 15:53:16.465385  CBFS: Locating 'cpu_microcode_blob.bin'

 1303 15:53:16.468375  CBFS: Locating 'cpu_microcode_blob.bin'

 1304 15:53:16.472408  CBFS: Found @ offset cd00 size 2580

 1305 15:53:16.475117  CBFS: Found @ offset cd00 size 2580

 1306 15:53:16.478602  microcode: patch id to apply = 0x08200103

 1307 15:53:16.481756  microcode: patch id to apply = 0x08200103

 1308 15:53:16.488896  microcode: being updated to patch id = 0x08200103 succeeded

 1309 15:53:16.492198  microcode: being updated to patch id = 0x08200103 succeeded

 1310 15:53:16.495128  CPU #1 initialized

 1311 15:53:16.498979  CPU #2 initialized

 1312 15:53:16.501982  bsp_do_flight_plan done after 245 msecs.

 1313 15:53:16.502063  

 1314 15:53:16.502127  

 1315 15:53:16.508615  coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 smm starting (log level: 8)...

 1316 15:53:16.508698  

 1317 15:53:16.508762  SMI# #1

 1318 15:53:16.511959  spi_init: SPI BAR at 0xfec10000

 1319 15:53:16.515539  PSP: Notify SMM info... OK

 1320 15:53:16.519214  MTRR: TEMPORARY Physical address space:

 1321 15:53:16.522462  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1322 15:53:16.529199  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1323 15:53:16.535619  0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6

 1324 15:53:16.539014  0x00000000d0000000 - 0x00000000ff000000 size 0x2f000000 type 0

 1325 15:53:16.545845  0x00000000ff000000 - 0x0000000100000000 size 0x01000000 type 5

 1326 15:53:16.553041  0x0000000100000000 - 0x0000000130000000 size 0x30000000 type 6

 1327 15:53:16.555691  MTRR: default type WB/UC MTRR counts: 7/5.

 1328 15:53:16.558976  MTRR: UC selected as default type.

 1329 15:53:16.562266  MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6

 1330 15:53:16.569316  MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6

 1331 15:53:16.575954  MTRR: 2 base 0x00000000c0000000 mask 0x0000fffff0000000 type 6

 1332 15:53:16.579919  MTRR: 3 base 0x00000000ff000000 mask 0x0000ffffff000000 type 5

 1333 15:53:16.586039  MTRR: 4 base 0x0000000100000000 mask 0x0000ffffc0000000 type 6

 1334 15:53:16.589513  CPU_CLUSTER: 0 init finished in 499 msecs

 1335 15:53:16.589597  POST: 0x75

 1336 15:53:16.592779  POST: 0x75

 1337 15:53:16.592862  POST: 0x75

 1338 15:53:16.592927  POST: 0x75

 1339 15:53:16.596223  POST: 0x75

 1340 15:53:16.596305  POST: 0x75

 1341 15:53:16.596371  POST: 0x75

 1342 15:53:16.599585  POST: 0x75

 1343 15:53:16.599667  POST: 0x75

 1344 15:53:16.599731  POST: 0x75

 1345 15:53:16.602914  POST: 0x75

 1346 15:53:16.602996  POST: 0x75

 1347 15:53:16.605936  PCI: 00:00.0 init

 1348 15:53:16.609434  IOAPIC: Initializing IOAPIC at 0xfec01000

 1349 15:53:16.612684  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1350 15:53:16.612767  IOAPIC: ID = 0x09

 1351 15:53:16.616189  IOAPIC: Dumping registers

 1352 15:53:16.619462    reg 0x0000: 0x09000000

 1353 15:53:16.622997    reg 0x0001: 0x001f8021

 1354 15:53:16.623081    reg 0x0002: 0x00000000

 1355 15:53:16.626342  IOAPIC: 32 interrupts

 1356 15:53:16.629847  IOAPIC: Enabling interrupts on FSB

 1357 15:53:16.633265  IOAPIC: reg 0x00000000 value 0x00000000 0x00000700

 1358 15:53:16.636406  IOAPIC: reg 0x00000001 value 0x00000000 0x00010000

 1359 15:53:16.643296  IOAPIC: reg 0x00000002 value 0x00000000 0x00010000

 1360 15:53:16.646423  IOAPIC: reg 0x00000003 value 0x00000000 0x00010000

 1361 15:53:16.649816  IOAPIC: reg 0x00000004 value 0x00000000 0x00010000

 1362 15:53:16.656810  IOAPIC: reg 0x00000005 value 0x00000000 0x00010000

 1363 15:53:16.660087  IOAPIC: reg 0x00000006 value 0x00000000 0x00010000

 1364 15:53:16.666863  IOAPIC: reg 0x00000007 value 0x00000000 0x00010000

 1365 15:53:16.669906  IOAPIC: reg 0x00000008 value 0x00000000 0x00010000

 1366 15:53:16.673506  IOAPIC: reg 0x00000009 value 0x00000000 0x00010000

 1367 15:53:16.680202  IOAPIC: reg 0x0000000a value 0x00000000 0x00010000

 1368 15:53:16.683127  IOAPIC: reg 0x0000000b value 0x00000000 0x00010000

 1369 15:53:16.686509  IOAPIC: reg 0x0000000c value 0x00000000 0x00010000

 1370 15:53:16.693269  IOAPIC: reg 0x0000000d value 0x00000000 0x00010000

 1371 15:53:16.696771  IOAPIC: reg 0x0000000e value 0x00000000 0x00010000

 1372 15:53:16.700456  IOAPIC: reg 0x0000000f value 0x00000000 0x00010000

 1373 15:53:16.706832  IOAPIC: reg 0x00000010 value 0x00000000 0x00010000

 1374 15:53:16.710397  IOAPIC: reg 0x00000011 value 0x00000000 0x00010000

 1375 15:53:16.713705  IOAPIC: reg 0x00000012 value 0x00000000 0x00010000

 1376 15:53:16.719927  IOAPIC: reg 0x00000013 value 0x00000000 0x00010000

 1377 15:53:16.723364  IOAPIC: reg 0x00000014 value 0x00000000 0x00010000

 1378 15:53:16.726756  IOAPIC: reg 0x00000015 value 0x00000000 0x00010000

 1379 15:53:16.733366  IOAPIC: reg 0x00000016 value 0x00000000 0x00010000

 1380 15:53:16.736858  IOAPIC: reg 0x00000017 value 0x00000000 0x00010000

 1381 15:53:16.740110  IOAPIC: reg 0x00000018 value 0x00000000 0x00010000

 1382 15:53:16.747027  IOAPIC: reg 0x00000019 value 0x00000000 0x00010000

 1383 15:53:16.749860  IOAPIC: reg 0x0000001a value 0x00000000 0x00010000

 1384 15:53:16.756938  IOAPIC: reg 0x0000001b value 0x00000000 0x00010000

 1385 15:53:16.760041  IOAPIC: reg 0x0000001c value 0x00000000 0x00010000

 1386 15:53:16.763445  IOAPIC: reg 0x0000001d value 0x00000000 0x00010000

 1387 15:53:16.770548  IOAPIC: reg 0x0000001e value 0x00000000 0x00010000

 1388 15:53:16.773556  IOAPIC: reg 0x0000001f value 0x00000000 0x00010000

 1389 15:53:16.777374  PCI: 00:00.0 init finished in 168 msecs

 1390 15:53:16.777457  POST: 0x75

 1391 15:53:16.780317  POST: 0x75

 1392 15:53:16.780398  PCI: 00:01.0 init

 1393 15:53:16.783800  PCI: 00:01.0 init finished in 0 msecs

 1394 15:53:16.783882  POST: 0x75

 1395 15:53:16.787302  POST: 0x75

 1396 15:53:16.787385  PCI: 00:08.0 init

 1397 15:53:16.790691  PCI: 00:08.0 init finished in 0 msecs

 1398 15:53:16.793976  POST: 0x75

 1399 15:53:16.794059  POST: 0x75

 1400 15:53:16.796948  PCI: 00:14.0 init

 1401 15:53:16.800508  IOAPIC: Initializing IOAPIC at 0xfec00000

 1402 15:53:16.803574  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1403 15:53:16.803658  IOAPIC: ID = 0x08

 1404 15:53:16.806918  IOAPIC: Dumping registers

 1405 15:53:16.810252    reg 0x0000: 0x08000000

 1406 15:53:16.810336    reg 0x0001: 0x00178021

 1407 15:53:16.813720    reg 0x0002: 0x08000000

 1408 15:53:16.817058  IOAPIC: 24 interrupts

 1409 15:53:16.820355  IOAPIC: Enabling interrupts on FSB

 1410 15:53:16.823775  IOAPIC: reg 0x00000000 value 0x00000000 0x00000700

 1411 15:53:16.827314  IOAPIC: reg 0x00000001 value 0x00000000 0x00010000

 1412 15:53:16.833762  IOAPIC: reg 0x00000002 value 0x00000000 0x00010000

 1413 15:53:16.836761  IOAPIC: reg 0x00000003 value 0x00000000 0x00010000

 1414 15:53:16.840061  IOAPIC: reg 0x00000004 value 0x00000000 0x00010000

 1415 15:53:16.847030  IOAPIC: reg 0x00000005 value 0x00000000 0x00010000

 1416 15:53:16.850663  IOAPIC: reg 0x00000006 value 0x00000000 0x00010000

 1417 15:53:16.853597  IOAPIC: reg 0x00000007 value 0x00000000 0x00010000

 1418 15:53:16.860544  IOAPIC: reg 0x00000008 value 0x00000000 0x00010000

 1419 15:53:16.864128  IOAPIC: reg 0x00000009 value 0x00000000 0x00010000

 1420 15:53:16.870335  IOAPIC: reg 0x0000000a value 0x00000000 0x00010000

 1421 15:53:16.873562  IOAPIC: reg 0x0000000b value 0x00000000 0x00010000

 1422 15:53:16.877031  IOAPIC: reg 0x0000000c value 0x00000000 0x00010000

 1423 15:53:16.883882  IOAPIC: reg 0x0000000d value 0x00000000 0x00010000

 1424 15:53:16.887326  IOAPIC: reg 0x0000000e value 0x00000000 0x00010000

 1425 15:53:16.890174  IOAPIC: reg 0x0000000f value 0x00000000 0x00010000

 1426 15:53:16.897219  IOAPIC: reg 0x00000010 value 0x00000000 0x00010000

 1427 15:53:16.900605  IOAPIC: reg 0x00000011 value 0x00000000 0x00010000

 1428 15:53:16.903568  IOAPIC: reg 0x00000012 value 0x00000000 0x00010000

 1429 15:53:16.911102  IOAPIC: reg 0x00000013 value 0x00000000 0x00010000

 1430 15:53:16.914164  IOAPIC: reg 0x00000014 value 0x00000000 0x00010000

 1431 15:53:16.916998  IOAPIC: reg 0x00000015 value 0x00000000 0x00010000

 1432 15:53:16.924213  IOAPIC: reg 0x00000016 value 0x00000000 0x00010000

 1433 15:53:16.927045  IOAPIC: reg 0x00000017 value 0x00000000 0x00010000

 1434 15:53:16.930920  PCI: 00:14.0 init finished in 132 msecs

 1435 15:53:16.931002  POST: 0x75

 1436 15:53:16.934504  PCI: 00:14.3 init

 1437 15:53:16.934585  RTC Init

 1438 15:53:16.937730  PCI: 00:14.3 init finished in 0 msecs

 1439 15:53:16.940740  POST: 0x75

 1440 15:53:16.940820  POST: 0x75

 1441 15:53:16.940884  POST: 0x75

 1442 15:53:16.944210  POST: 0x75

 1443 15:53:16.944291  POST: 0x75

 1444 15:53:16.944355  POST: 0x75

 1445 15:53:16.947894  POST: 0x75

 1446 15:53:16.947983  POST: 0x75

 1447 15:53:16.948047  PCI: 00:18.7 init

 1448 15:53:16.951018  PCI: 00:18.7 init finished in 0 msecs

 1449 15:53:16.954350  POST: 0x75

 1450 15:53:16.954430  PCI: 01:00.0 init

 1451 15:53:16.957704  PCI: 01:00.0 init finished in 0 msecs

 1452 15:53:16.960888  POST: 0x75

 1453 15:53:16.960969  PCI: 02:00.0 init

 1454 15:53:16.967518  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1455 15:53:16.967603  CBFS: Locating 'pci1002,15d8,ea.rom'

 1456 15:53:16.974763  CBFS: 'pci1002,15d8,ea.rom' not found.

 1457 15:53:16.974844  Using RV2 VBIOS.

 1458 15:53:16.978020  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1459 15:53:16.981523  CBFS: Locating 'pci1002,15dd,c4.rom'

 1460 15:53:16.985003  CBFS: Found @ offset 6c9c0 size d400

 1461 15:53:16.991867  In CBFS, ROM address for PCI: 02:00.0 = 0xff8e19f8

 1462 15:53:16.994789  PCI expansion ROM, signature 0xaa55, INIT size 0xd400, data ptr 0x01b0

 1463 15:53:17.001633  PCI ROM image, vendor ID 1002, device ID 15dd,

 1464 15:53:17.005112  PCI ROM image, Class Code 030000, Code Type 00

 1465 15:53:17.011389  Copying VGA ROM Image from 0xff8e19f8 to 0xc0000, 0xd400 bytes

 1466 15:53:17.017036  Real mode stub @0x00000600: 889 bytes

 1467 15:53:17.020546  Calling Option ROM...

 1468 15:53:17.045279  ... Option ROM returned.

 1469 15:53:17.048603  VBE: Getting information about VESA mode 41d4

 1470 15:53:17.052274  VBE: resolution:  1366x768@32

 1471 15:53:17.055025  VBE: framebuffer: 0xd0000000

 1472 15:53:17.058614  VBE: Setting VESA mode 41d4

 1473 15:53:17.083090  fb_add_framebuffer_info_ex: channel bit mask=24 and BPP=32 don't match. This is a driver bug.

 1474 15:53:17.086108  framebuffer_info: bytes_per_line: 5632, bits_per_pixel: 32

 1475 15:53:17.093028                     x_res x y_res: 1366 x 768, size: 4325376 at 0xd0000000

 1476 15:53:17.097000  VGA Option ROM was run

 1477 15:53:17.100232  PCI: 02:00.0 init finished in 134 msecs

 1478 15:53:17.100314  POST: 0x75

 1479 15:53:17.103237  PCI: 02:00.1 init

 1480 15:53:17.106692  PCI: 02:00.1 init finished in 0 msecs

 1481 15:53:17.106773  POST: 0x75

 1482 15:53:17.109884  PCI: 02:00.2 init

 1483 15:53:17.113252  PCI: 02:00.2 init finished in 0 msecs

 1484 15:53:17.113336  POST: 0x75

 1485 15:53:17.116756  PCI: 02:00.3 init

 1486 15:53:17.120019  PCI: 02:00.3 init finished in 0 msecs

 1487 15:53:17.120103  POST: 0x75

 1488 15:53:17.120187  PCI: 02:00.5 init

 1489 15:53:17.123528  PCI: 02:00.5 init finished in 0 msecs

 1490 15:53:17.127073  POST: 0x75

 1491 15:53:17.127156  PCI: 02:00.7 init

 1492 15:53:17.129964  PCI: 02:00.7 init finished in 0 msecs

 1493 15:53:17.133154  POST: 0x75

 1494 15:53:17.133237  POST: 0x75

 1495 15:53:17.133320  POST: 0x75

 1496 15:53:17.136584  POST: 0x75

 1497 15:53:17.136666  POST: 0x75

 1498 15:53:17.136749  POST: 0x75

 1499 15:53:17.140172  POST: 0x75

 1500 15:53:17.140254  POST: 0x75

 1501 15:53:17.140338  POST: 0x75

 1502 15:53:17.143183  POST: 0x75

 1503 15:53:17.143266  POST: 0x75

 1504 15:53:17.143349  POST: 0x75

 1505 15:53:17.146480  POST: 0x75

 1506 15:53:17.146592  POST: 0x75

 1507 15:53:17.146688  PNP: 0c09.0 init

 1508 15:53:17.153724  Google Chrome EC uptime: 7.506 seconds

 1509 15:53:17.156632  Google Chrome AP resets since EC boot: 0

 1510 15:53:17.160027  Google Chrome most recent AP reset causes:

 1511 15:53:17.167169  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1512 15:53:17.170188  PNP: 0c09.0 init finished in 17 msecs

 1513 15:53:17.170306  POST: 0x75

 1514 15:53:17.170401  POST: 0x75

 1515 15:53:17.170482  POST: 0x75

 1516 15:53:17.173686  POST: 0x75

 1517 15:53:17.173783  POST: 0x75

 1518 15:53:17.173868  POST: 0x75

 1519 15:53:17.177134  POST: 0x75

 1520 15:53:17.177274  POST: 0x75

 1521 15:53:17.177363  POST: 0x75

 1522 15:53:17.180568  Devices initialized

 1523 15:53:17.183590  Show all devs... After init.

 1524 15:53:17.183695  Root Device: enabled 1

 1525 15:53:17.187089  CPU_CLUSTER: 0: enabled 1

 1526 15:53:17.190663  DOMAIN: 0000: enabled 1

 1527 15:53:17.190803  MMIO: fedc5000: enabled 1

 1528 15:53:17.194090  MMIO: fedca000: enabled 0

 1529 15:53:17.197958  MMIO: fedce000: enabled 0

 1530 15:53:17.201245  MMIO: fedcf000: enabled 0

 1531 15:53:17.201663  MMIO: fedc4000: enabled 1

 1532 15:53:17.204488  GENERIC: 0.1: enabled 1

 1533 15:53:17.204903  APIC: 00: enabled 1

 1534 15:53:17.208025  PCI: 00:00.0: enabled 1

 1535 15:53:17.211032  PCI: 00:00.2: enabled 1

 1536 15:53:17.211418  PCI: 00:01.0: enabled 1

 1537 15:53:17.214691  PCI: 00:01.1: enabled 0

 1538 15:53:17.217569  PCI: 00:01.2: enabled 1

 1539 15:53:17.217997  PCI: 00:01.3: enabled 0

 1540 15:53:17.221013  PCI: 00:01.4: enabled 0

 1541 15:53:17.224380  PCI: 00:01.5: enabled 0

 1542 15:53:17.225017  PCI: 00:08.0: enabled 1

 1543 15:53:17.227892  PCI: 00:08.1: enabled 1

 1544 15:53:17.230896  PCI: 00:08.2: enabled 0

 1545 15:53:17.231321  PCI: 00:14.0: enabled 1

 1546 15:53:17.234553  PCI: 00:14.3: enabled 1

 1547 15:53:17.238068  PCI: 00:18.0: enabled 1

 1548 15:53:17.238486  PCI: 00:18.1: enabled 1

 1549 15:53:17.241313  PCI: 00:18.2: enabled 1

 1550 15:53:17.244738  PCI: 00:18.3: enabled 1

 1551 15:53:17.245159  PCI: 00:18.4: enabled 1

 1552 15:53:17.247862  PCI: 00:18.5: enabled 1

 1553 15:53:17.251304  PCI: 00:18.6: enabled 1

 1554 15:53:17.251726  I2C: 01:50: enabled 1

 1555 15:53:17.254640  I2C: 02:15: enabled 1

 1556 15:53:17.255098  I2C: 02:10: enabled 1

 1557 15:53:17.257781  I2C: 02:40: enabled 1

 1558 15:53:17.260993  PCI: 01:00.0: enabled 1

 1559 15:53:17.261482  PCI: 02:00.0: enabled 1

 1560 15:53:17.264464  PCI: 02:00.1: enabled 1

 1561 15:53:17.268237  PCI: 02:00.2: enabled 1

 1562 15:53:17.268663  PCI: 02:00.3: enabled 1

 1563 15:53:17.271437  PCI: 02:00.5: enabled 1

 1564 15:53:17.271866  PCI: 02:00.6: enabled 0

 1565 15:53:17.274686  PCI: 02:00.7: enabled 1

 1566 15:53:17.277774  PCI: 00:00.0: enabled 0

 1567 15:53:17.278204  PNP: 0c09.0: enabled 1

 1568 15:53:17.281141  USB0 port 0: enabled 1

 1569 15:53:17.284429  GENERIC: 0.0: enabled 1

 1570 15:53:17.284867  GENERIC: 1.0: enabled 0

 1571 15:53:17.287683  GENERIC: 0.0: enabled 1

 1572 15:53:17.291556  GENERIC: 0.0: enabled 1

 1573 15:53:17.292023  GENERIC: 1.0: enabled 0

 1574 15:53:17.294634  USB2 port 0: enabled 1

 1575 15:53:17.295063  USB2 port 1: enabled 1

 1576 15:53:17.298204  USB2 port 2: enabled 1

 1577 15:53:17.301403  USB2 port 3: enabled 1

 1578 15:53:17.301832  USB2 port 4: enabled 1

 1579 15:53:17.304833  USB2 port 5: enabled 1

 1580 15:53:17.308150  USB3 port 0: enabled 1

 1581 15:53:17.308598  USB3 port 1: enabled 1

 1582 15:53:17.311501  USB3 port 2: enabled 1

 1583 15:53:17.311968  USB3 port 3: enabled 1

 1584 15:53:17.315011  I2C: 00:1a: enabled 1

 1585 15:53:17.318700  I2C: 00:1a: enabled 1

 1586 15:53:17.319188  PCI: 00:18.7: enabled 1

 1587 15:53:17.321742  APIC: 03: enabled 1

 1588 15:53:17.322166  APIC: 02: enabled 1

 1589 15:53:17.324858  APIC: 01: enabled 1

 1590 15:53:17.328447  BS: BS_DEV_INIT run times (exec / console): 211 / 1032 ms

 1591 15:53:17.334870  SCIMAP 56 maps to GPE 31 (active high, edge trigger)

 1592 15:53:17.338820  ELOG: Event(A1) added with size 10 at 2023-08-07 15:53:17 UTC

 1593 15:53:17.348921  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x01

 1594 15:53:17.351723  ELOG: Event(A0) added with size 9 at 2023-08-07 15:53:17 UTC

 1595 15:53:17.355401  elog_add_boot_reason: Logged dev mode boot

 1596 15:53:17.362059  BS: BS_POST_DEVICE entry times (exec / console): 0 / 26 ms

 1597 15:53:17.362489  POST: 0x76

 1598 15:53:17.365943  Finalize devices...

 1599 15:53:17.366366  Devices finalized

 1600 15:53:17.372188  BS: BS_POST_DEVICE run times (exec / console): 0 / 5 ms

 1601 15:53:17.375990  FMAP: area RW_NVRAM found @ 617000 (20480 bytes)

 1602 15:53:17.382309  BS: BS_POST_DEVICE exit times (exec / console): 1 / 4 ms

 1603 15:53:17.382764  POST: 0x77

 1604 15:53:17.389207  BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 1 ms

 1605 15:53:17.389633  Saving dimm info for smbios type 17

 1606 15:53:17.392342  AMD_FSP_DMI_HOB found

 1607 15:53:17.395586  AGESA TYPE 17 DMI INFO:

 1608 15:53:17.396153    Handle: 1

 1609 15:53:17.398662    TotalWidth: 64

 1610 15:53:17.399080    DataWidth: 64

 1611 15:53:17.402436    MemorySize: 4096

 1612 15:53:17.402858    DeviceSet: 0

 1613 15:53:17.405719    Speed: 1333

 1614 15:53:17.406139    ManufacturerIdCode: 0

 1615 15:53:17.408962    Attributes: 1

 1616 15:53:17.409376    ExtSize: 0

 1617 15:53:17.412254    ConfigSpeed: 800

 1618 15:53:17.412715    MemoryType: 0x1a

 1619 15:53:17.415693    FormFactor: 0xd

 1620 15:53:17.416172    DeviceLocator:   DIMM 0

 1621 15:53:17.418695    BankLocator: P0 CHANNEL A

 1622 15:53:17.422448    SerialNumber(8):  00000000

 1623 15:53:17.425962    PartNumber(0):                    

 1624 15:53:17.426386  CBMEM_ID_MEMINFO:

 1625 15:53:17.429070    dimm_size: 4096

 1626 15:53:17.429596    ddr_type: 0x1a

 1627 15:53:17.432186    ddr_frequency: 0

 1628 15:53:17.432600    rank_per_dimm: 1

 1629 15:53:17.435846    channel_num: 0

 1630 15:53:17.436329    dimm_num: 0

 1631 15:53:17.439171    bank_locator: 0

 1632 15:53:17.439583    mod_id: 0

 1633 15:53:17.439953    mod_type: 0x4

 1634 15:53:17.442462    bus_width: 3

 1635 15:53:17.442877    serial: 00000000

 1636 15:53:17.445864    module_part_number(15): K4A8G165WC-BCTD

 1637 15:53:17.452284  BS: BS_WRITE_TABLES entry times (exec / console): 1 / 59 ms

 1638 15:53:17.452702  POST: 0x79

 1639 15:53:17.455759  POST: 0x9c

 1640 15:53:17.459395  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1641 15:53:17.462874  CBFS: Locating 'fallback/dsdt.aml'

 1642 15:53:17.465670  CBFS: Found @ offset 2be40 size 417b

 1643 15:53:17.469321  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1644 15:53:17.472464  CBFS: Locating 'fallback/slic'

 1645 15:53:17.476170  CBFS: 'fallback/slic' not found.

 1646 15:53:17.479196  ACPI: Writing ACPI tables at ca63a000.

 1647 15:53:17.479618  ACPI:    * FACS

 1648 15:53:17.482631  ACPI:    * DSDT

 1649 15:53:17.485874  Ramoops buffer: 0x100000@0xca53a000.

 1650 15:53:17.489203  FMAP: area RO_VPD found @ 800000 (16384 bytes)

 1651 15:53:17.492543  FMAP: area RW_VPD found @ 615000 (8192 bytes)

 1652 15:53:17.497621  ACPI:    * FADT

 1653 15:53:17.498044  pm_base: 0x0400

 1654 15:53:17.501000  ACPI: added table 1/32, length now 40

 1655 15:53:17.503778  ACPI:     * SSDT

 1656 15:53:17.507257  PSS: 1200MHz power 1461 control 0x0 status 0x0

 1657 15:53:17.510638  PSS: 800MHz power 760 control 0x1 status 0x1

 1658 15:53:17.513695  PSS: 400MHz power 364 control 0x2 status 0x2

 1659 15:53:17.520667  PSS: 1200MHz power 1461 control 0x0 status 0x0

 1660 15:53:17.524291  PSS: 800MHz power 760 control 0x1 status 0x1

 1661 15:53:17.527276  PSS: 400MHz power 364 control 0x2 status 0x2

 1662 15:53:17.530993  PSS: 1200MHz power 1461 control 0x0 status 0x0

 1663 15:53:17.537424  PSS: 800MHz power 760 control 0x1 status 0x1

 1664 15:53:17.540921  PSS: 400MHz power 364 control 0x2 status 0x2

 1665 15:53:17.544439  PSS: 1200MHz power 1461 control 0x0 status 0x0

 1666 15:53:17.547209  PSS: 800MHz power 760 control 0x1 status 0x1

 1667 15:53:17.551297  PSS: 400MHz power 364 control 0x2 status 0x2

 1668 15:53:17.557683  \_SB.MAXM: Maxim Integrated 98357A Amplifier

 1669 15:53:17.561085  \_SB.I2C3.TPMI: I2C TPM at I2C: 01:50

 1670 15:53:17.564668  \_SB.I2C2.D015: ELAN Touchpad at I2C: 02:15

 1671 15:53:17.567145  \_SB.I2C2.D010: ELAN Touchscreen at I2C: 02:10

 1672 15:53:17.570823  \_SB.I2C2.H040: G2TOUCH Touchscreen at I2C: 02:40

 1673 15:53:17.577179  \_SB.PCI0.PBR1.WF00.WF00: WIFI Device PCI: 01:00.0

 1674 15:53:17.580628  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1675 15:53:17.584294  CBFS: Locating 'pci1002,15d8,ea.rom'

 1676 15:53:17.587565  CBFS: 'pci1002,15d8,ea.rom' not found.

 1677 15:53:17.590754  Using RV2 VBIOS.

 1678 15:53:17.594487  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1679 15:53:17.597690  CBFS: Locating 'pci1002,15dd,c4.rom'

 1680 15:53:17.600822  CBFS: Found @ offset 6c9c0 size d400

 1681 15:53:17.604064  In CBFS, ROM address for PCI: 02:00.0 = 0xff8e19f8

 1682 15:53:17.611006  PCI expansion ROM, signature 0xaa55, INIT size 0xd400, data ptr 0x01b0

 1683 15:53:17.614480  PCI ROM image, vendor ID 1002, device ID 15dd,

 1684 15:53:17.621009  PCI ROM image, Class Code 030000, Code Type 00

 1685 15:53:17.621427  xHCI SSDT generation

 1686 15:53:17.624380  xhci_fill_ssdt: Got GPE 31 for PCI: 02:00.3

 1687 15:53:17.627817  xHCI Supported Protocol:

 1688 15:53:17.631832    Major: 0x2, Minor: 0x0, Protocol: 'USB '

 1689 15:53:17.634966    Port Offset: 1, Port Count: 6

 1690 15:53:17.637720  xHCI Supported Protocol:

 1691 15:53:17.641185    Major: 0x3, Minor: 0x10, Protocol: 'USB '

 1692 15:53:17.644648    Port Offset: 7, Port Count: 1

 1693 15:53:17.645086  xHCI Supported Protocol:

 1694 15:53:17.651194    Major: 0x3, Minor: 0x10, Protocol: 'USB '

 1695 15:53:17.651621    Port Offset: 8, Port Count: 1

 1696 15:53:17.654663  xHCI Supported Protocol:

 1697 15:53:17.658244    Major: 0x3, Minor: 0x10, Protocol: 'USB '

 1698 15:53:17.661781    Port Offset: 9, Port Count: 1

 1699 15:53:17.665042  xHCI Supported Protocol:

 1700 15:53:17.668453    Major: 0x3, Minor: 0x10, Protocol: 'USB '

 1701 15:53:17.671731    Port Offset: 10, Port Count: 1

 1702 15:53:17.674917  EC returned error result code 1

 1703 15:53:17.678830  PS2K: Bad resp from EC. Vivaldi disabled!

 1704 15:53:17.685542  \_SB.PCI0.PBRA.ACPD.I2S0: I2S machine driver at GENERIC: 0.0

 1705 15:53:17.688462  \_SB.PCI0.PBRA.ACPD.I2S1: I2S machine driver at GENERIC: 1.0

 1706 15:53:17.695412  \_SB.PCI0.LPCB.EC0.CREC.TUN0: Cros EC I2C Tunnel at GENERIC: 0.0

 1707 15:53:17.701867  \_SB.PCI0.LPCB.EC0.CREC.ECA0: Cros EC audio codec at GENERIC: 0.0

 1708 15:53:17.705245  \_SB.PCI0.PBRA.XHC0.RHUB.HS01: Left Type-C Port at USB2 port 0

 1709 15:53:17.712154  \_SB.PCI0.PBRA.XHC0.RHUB.HS02: Right Type-C Port at USB2 port 1

 1710 15:53:17.718721  \_SB.PCI0.PBRA.XHC0.RHUB.HS03: Left Type-A Port at USB2 port 2

 1711 15:53:17.722200  \_SB.PCI0.PBRA.XHC0.RHUB.HS04: Right Type-A Port at USB2 port 3

 1712 15:53:17.728445  \_SB.PCI0.PBRA.XHC0.RHUB.HS05: User-Facing Camera at USB2 port 4

 1713 15:53:17.735394  \_SB.PCI0.PBRA.XHC0.RHUB.HS06: Bluetooth at USB2 port 5

 1714 15:53:17.738997  \_SB.PCI0.PBRA.XHC0.RHUB.SS01: Left Type-C Port at USB3 port 0

 1715 15:53:17.745411  \_SB.PCI0.PBRA.XHC0.RHUB.SS02: Right Type-C Port at USB3 port 1

 1716 15:53:17.752021  \_SB.PCI0.PBRA.XHC0.RHUB.SS03: Left Type-A Port at USB3 port 2

 1717 15:53:17.755225  \_SB.PCI0.PBRA.XHC0.RHUB.SS04: Right Type-A Port at USB3 port 3

 1718 15:53:17.762170  \_SB.PCI0.LPCB.EC0.CREC.TUN0.RT58: Realtek RT5682 at I2C: 00:1a

 1719 15:53:17.766165  ACPI: added table 2/32, length now 44

 1720 15:53:17.766247  ACPI:    * MCFG

 1721 15:53:17.768881  ACPI: added table 3/32, length now 48

 1722 15:53:17.772390  ACPI:    * TPM2

 1723 15:53:17.775486  TPM2 log created at 0xca51c000

 1724 15:53:17.778734  ACPI: added table 4/32, length now 52

 1725 15:53:17.778814  ACPI:    * MADT

 1726 15:53:17.782091  ACPI: added table 5/32, length now 56

 1727 15:53:17.785540  current = ca640a60

 1728 15:53:17.789054  ACPI: added table 6/32, length now 60

 1729 15:53:17.789134  ACPI:    * ALIB (AGESA).

 1730 15:53:17.792282  ACPI: added table 7/32, length now 64

 1731 15:53:17.795786  ACPI: added table 8/32, length now 68

 1732 15:53:17.799256  ACPI:    * HPET

 1733 15:53:17.802124  ACPI: added table 9/32, length now 72

 1734 15:53:17.805757             Copying initialized VBIOS image from 0x000c0000

 1735 15:53:17.808930  ACPI:    * VFCT at ca6464c0

 1736 15:53:17.812326  ACPI: added table 10/32, length now 76

 1737 15:53:17.816008  ACPI: done.

 1738 15:53:17.816089  ACPI tables: 104752 bytes.

 1739 15:53:17.819514  smbios_write_tables: ca51b000

 1740 15:53:17.822204  Create SMBIOS type 16

 1741 15:53:17.825620  Create SMBIOS type 17

 1742 15:53:17.825700  PCI: 01:00.0 (WIFI Device)

 1743 15:53:17.828857  SMBIOS tables: 854 bytes.

 1744 15:53:17.832273  Writing table forward entry at 0x00000500

 1745 15:53:17.839237  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 5578

 1746 15:53:17.842497  Writing coreboot table at 0xca65e000

 1747 15:53:17.846061   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1748 15:53:17.849543   1. 0000000000001000-000000000009ffff: RAM

 1749 15:53:17.856039   2. 00000000000a0000-00000000000fffff: RESERVED

 1750 15:53:17.859154   3. 0000000000100000-0000000001ffffff: RAM

 1751 15:53:17.862580   4. 0000000002000000-00000000021bffff: RESERVED

 1752 15:53:17.866129   5. 00000000021c0000-00000000ca51afff: RAM

 1753 15:53:17.872637   6. 00000000ca51b000-00000000ca6b5fff: CONFIGURATION TABLES

 1754 15:53:17.875817   7. 00000000ca6b6000-00000000ca7c7fff: RAMSTAGE

 1755 15:53:17.882981   8. 00000000ca7c8000-00000000cb7fffff: CONFIGURATION TABLES

 1756 15:53:17.886067   9. 00000000cb800000-00000000cfffffff: RESERVED

 1757 15:53:17.889483  10. 00000000f8000000-00000000fbffffff: RESERVED

 1758 15:53:17.892717  11. 0000000100000000-000000012f33ffff: RAM

 1759 15:53:17.899792  12. 000000012f340000-000000012fffffff: RESERVED

 1760 15:53:17.899891  Passing 3 GPIOs to payload:

 1761 15:53:17.906475              NAME |       PORT | POLARITY |     VALUE

 1762 15:53:17.909478               lid |  undefined |     high |      high

 1763 15:53:17.916170             power |  undefined |     high |       low

 1764 15:53:17.920154          EC in RW | 0x0000000b |     high |      high

 1765 15:53:17.922939  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1766 15:53:17.930272  Wrote coreboot table at: 0xca65e000, 0x528 bytes, checksum 5dd6

 1767 15:53:17.933375  coreboot table: 1344 bytes.

 1768 15:53:17.936847  IMD ROOT    0. 0xcb7ff000 0x00001000

 1769 15:53:17.939970  IMD SMALL   1. 0xcb7fe000 0x00001000

 1770 15:53:17.943121  FSP MEMORY  2. 0xca7fe000 0x01000000

 1771 15:53:17.946740  CONSOLE     3. 0xca7de000 0x00020000

 1772 15:53:17.950276  FMAP        4. 0xca7dd000 0x00000452

 1773 15:53:17.953191  TIME STAMP  5. 0xca7dc000 0x00000910

 1774 15:53:17.956469  VBOOT WORK  6. 0xca7c8000 0x00014000

 1775 15:53:17.959808  RAMSTAGE    7. 0xca6b5000 0x00113000

 1776 15:53:17.963312  REFCODE     8. 0xca677000 0x0003e000

 1777 15:53:17.966635  ACPI GNVS   9. 0xca676000 0x00001000

 1778 15:53:17.969749  SMM BACKUP 10. 0xca666000 0x00010000

 1779 15:53:17.973353  COREBOOT   11. 0xca65e000 0x00008000

 1780 15:53:17.977054  ACPI       12. 0xca63a000 0x00024000

 1781 15:53:17.980229  RAMOOPS    13. 0xca53a000 0x00100000

 1782 15:53:17.983397  VGA ROM #0 14. 0xca52c000 0x0000d400

 1783 15:53:17.986873  TPM2 TCGLOG15. 0xca51c000 0x00010000

 1784 15:53:17.990193  SMBIOS     16. 0xca51b000 0x00000800

 1785 15:53:17.990276  IMD small region:

 1786 15:53:17.993168    IMD ROOT    0. 0xcb7fec00 0x00000400

 1787 15:53:17.996608    FSP RUNTIME 1. 0xcb7febe0 0x00000004

 1788 15:53:17.999843    VPD         2. 0xcb7feb80 0x00000047

 1789 15:53:18.006897    POWER STATE 3. 0xcb7feb40 0x00000030

 1790 15:53:18.010183    ROMSTAGE    4. 0xcb7feb20 0x00000004

 1791 15:53:18.013225    EARLY DRAM USAGE 5. 0xcb7feb00 0x00000008

 1792 15:53:18.016420    MEM INFO    6. 0xcb7fe920 0x000001e0

 1793 15:53:18.019939  BS: BS_WRITE_TABLES run times (exec / console): 4 / 559 ms

 1794 15:53:18.026650  Probing TPM I2C: done! DID_VID 0x00281ae0

 1795 15:53:18.026737  Locality already claimed

 1796 15:53:18.030173  cr50 TPM 2.0 (i2c 3:0x50 id 0x28)

 1797 15:53:18.033377  Checking cr50 for pending updates

 1798 15:53:18.044316  Reading cr50 TPM mode

 1799 15:53:18.058248  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 14 ms

 1800 15:53:18.058331  POST: 0x7a

 1801 15:53:18.065103  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1802 15:53:18.068137  CBFS: Locating 'fallback/payload'

 1803 15:53:18.072288  CBFS: Found @ offset 53b780 size 23354

 1804 15:53:18.075466  Checking segment from ROM address 0xffdb07b8

 1805 15:53:18.078883  Checking segment from ROM address 0xffdb07d4

 1806 15:53:18.082105  Loading segment from ROM address 0xffdb07b8

 1807 15:53:18.085690    code (compression=1)

 1808 15:53:18.092416    New segment dstaddr 0x30000000 memsize 0x10651f0 srcaddr 0xffdb07f0 filesize 0x2331c

 1809 15:53:18.098596  Loading Segment: addr: 0x30000000 memsz: 0x00000000010651f0 filesz: 0x000000000002331c

 1810 15:53:18.102165  using LZMA

 1811 15:53:18.141440  [ 0x30000000, 3004d29c, 0x310651f0) <- ffdb07f0

 1812 15:53:18.147991  Clearing Segment: addr: 0x000000003004d29c memsz: 0x0000000001017f54

 1813 15:53:18.154759  Loading segment from ROM address 0xffdb07d4

 1814 15:53:18.154868    Entry Point 0x30000000

 1815 15:53:18.158487  Loaded segments

 1816 15:53:18.161538  BS: BS_PAYLOAD_LOAD run times (exec / console): 39 / 60 ms

 1817 15:53:18.165043  0x00000040: notify_params->phase

 1818 15:53:18.168207  Calling FspNotify: 0xca6773b8

 1819 15:53:18.171225  	0xca6fff6c: notify_params

 1820 15:53:18.171306  POST: 0x95

 1821 15:53:18.176266  POST: 0x95

 1822 15:53:18.179647  FspNotify returned 0x00000000

 1823 15:53:18.179729  0x000000f0: notify_params->phase

 1824 15:53:18.182940  Calling FspNotify: 0xca6773b8

 1825 15:53:18.186282  	0xca6fff7c: notify_params

 1826 15:53:18.186386  POST: 0x88

 1827 15:53:18.189564  POST: 0x89

 1828 15:53:18.189708  FspNotify returned 0x00000000

 1829 15:53:18.193486  Lock SMM configuration

 1830 15:53:18.193591  POST: 0xfe

 1831 15:53:18.200085  BS: BS_PAYLOAD_LOAD exit times (exec / console): 3 / 29 ms

 1832 15:53:18.203024  PSP: Notify that POST is finishing... OK

 1833 15:53:18.209750  BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 4 ms

 1834 15:53:18.209900  POST: 0x7b

 1835 15:53:18.213226  mp_park_aps done after 0 msecs.

 1836 15:53:18.217101  Jumping to boot code at 0x30000000(0xca65e000)

 1837 15:53:18.217202  POST: 0xf8

 1838 15:53:18.226764  CPU0: stack: 0xca6ff000 - 0xca700000, lowest used address 0xca6ff92c, stack used: 1748 bytes

 1839 15:53:18.226907  

 1840 15:53:18.226984  

 1841 15:53:18.227045  

 1842 15:53:18.230067  Starting depthcharge on Gumboz...

 1843 15:53:18.230243  

 1844 15:53:18.230729  end: 2.2.3 depthcharge-start (duration 00:00:09) [common]
 1845 15:53:18.230889  start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
 1846 15:53:18.231038  Setting prompt string to ['zork:']
 1847 15:53:18.231156  bootloader-commands: Wait for prompt ['zork:'] (timeout 00:04:46)
 1848 15:53:18.236426  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1849 15:53:18.236610  

 1850 15:53:18.243219  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1851 15:53:18.243431  

 1852 15:53:18.247016  new_rt5682_codec: chip = 0x1A

 1853 15:53:18.251240  

 1854 15:53:18.251370  Failed to find SD card reader

 1855 15:53:18.251510  

 1856 15:53:18.257866  Looking for NVMe Controller 0x300616d8 @ 00:01:07

 1857 15:53:18.258029  

 1858 15:53:18.258124  Wipe memory regions:

 1859 15:53:18.258212  

 1860 15:53:18.261168  	[0x00000000001000, 0x000000000a0000)

 1861 15:53:18.261252  

 1862 15:53:18.264589  	[0x00000000100000, 0x00000002000000)

 1863 15:53:18.273124  

 1864 15:53:18.273248  	[0x000000021c0000, 0x00000030000000)

 1865 15:53:18.425736  

 1866 15:53:18.425870  	[0x000000310651f0, 0x000000ca51b000)

 1867 15:53:18.922351  

 1868 15:53:18.922490  	[0x00000100000000, 0x0000012f340000)

 1869 15:53:19.591020  

 1870 15:53:19.591556  R8152: Initializing

 1871 15:53:19.591945  

 1872 15:53:19.593932  Version 6 (ocp_data = 5c30)

 1873 15:53:19.594371  

 1874 15:53:19.597435  R8152: Done initializing

 1875 15:53:19.597858  

 1876 15:53:19.598194  Adding net device

 1877 15:53:19.900961  

 1878 15:53:19.904501  [firmware-zork-13434.B-collabora] Nov  9 2022 15:18:25

 1879 15:53:19.905011  

 1880 15:53:19.905395  

 1881 15:53:19.905743  

 1882 15:53:19.906546  Setting prompt string to ['zork:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1884 15:53:20.007716  zork: tftpboot 192.168.201.1 11224310/tftp-deploy-i731b3uv/kernel/bzImage 11224310/tftp-deploy-i731b3uv/kernel/cmdline 11224310/tftp-deploy-i731b3uv/ramdisk/ramdisk.cpio.gz

 1885 15:53:20.007946  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1886 15:53:20.008136  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
 1887 15:53:20.012236  tftpboot 192.168.201.1 11224310/tftp-deploy-i731b3uv/kernel/bzImage 3uv/kernel/cmdline 11224310/tftp-deploy-i731b3uv/ramdisk/ramdisk.cpio.gz

 1888 15:53:20.012399  

 1889 15:53:20.012557  Waiting for link

 1890 15:53:20.214482  

 1891 15:53:20.215012  done.

 1892 15:53:20.215365  

 1893 15:53:20.215838  MAC: 00:24:32:50:21:18

 1894 15:53:20.216309  

 1895 15:53:20.218347  Sending DHCP discover... done.

 1896 15:53:20.218835  

 1897 15:53:20.221432  Waiting for reply... done.

 1898 15:53:20.221858  

 1899 15:53:20.224656  Sending DHCP request... done.

 1900 15:53:20.225114  

 1901 15:53:20.230477  Waiting for reply... done.

 1902 15:53:20.230900  

 1903 15:53:20.231339  My ip is 192.168.201.19

 1904 15:53:20.231694  

 1905 15:53:20.233998  The DHCP server ip is 192.168.201.1

 1906 15:53:20.234482  

 1907 15:53:20.240668  TFTP server IP predefined by user: 192.168.201.1

 1908 15:53:20.241187  

 1909 15:53:20.243746  Bootfile predefined by user: 11224310/tftp-deploy-i731b3uv/kernel/bzImage

 1910 15:53:20.244248  

 1911 15:53:20.247128  Sending tftp read request... done.

 1912 15:53:20.247612  

 1913 15:53:20.256792  Waiting for the transfer... 

 1914 15:53:20.257219  

 1915 15:53:20.834097  00000000 ################################################################

 1916 15:53:20.834270  

 1917 15:53:21.359858  00080000 ################################################################

 1918 15:53:21.360028  

 1919 15:53:21.892624  00100000 ################################################################

 1920 15:53:21.892769  

 1921 15:53:22.427086  00180000 ################################################################

 1922 15:53:22.427243  

 1923 15:53:22.956103  00200000 ################################################################

 1924 15:53:22.956258  

 1925 15:53:23.496208  00280000 ################################################################

 1926 15:53:23.496389  

 1927 15:53:24.016403  00300000 ################################################################

 1928 15:53:24.016590  

 1929 15:53:24.556878  00380000 ################################################################

 1930 15:53:24.557024  

 1931 15:53:25.108212  00400000 ################################################################

 1932 15:53:25.108363  

 1933 15:53:25.634474  00480000 ################################################################

 1934 15:53:25.634610  

 1935 15:53:26.159204  00500000 ################################################################

 1936 15:53:26.159426  

 1937 15:53:26.687034  00580000 ################################################################

 1938 15:53:26.687189  

 1939 15:53:27.220261  00600000 ################################################################

 1940 15:53:27.220394  

 1941 15:53:27.762589  00680000 ################################################################

 1942 15:53:27.762763  

 1943 15:53:28.294585  00700000 ################################################################

 1944 15:53:28.294790  

 1945 15:53:28.311061  00780000 ## done.

 1946 15:53:28.311180  

 1947 15:53:28.315063  The bootfile was 7880592 bytes long.

 1948 15:53:28.315153  

 1949 15:53:28.318566  Sending tftp read request... done.

 1950 15:53:28.318650  

 1951 15:53:28.318716  Waiting for the transfer... 

 1952 15:53:28.318778  

 1953 15:53:28.849803  00000000 ################################################################

 1954 15:53:28.849953  

 1955 15:53:29.382041  00080000 ################################################################

 1956 15:53:29.382195  

 1957 15:53:29.915729  00100000 ################################################################

 1958 15:53:29.915862  

 1959 15:53:30.451785  00180000 ################################################################

 1960 15:53:30.451985  

 1961 15:53:30.986421  00200000 ################################################################

 1962 15:53:30.986555  

 1963 15:53:31.523944  00280000 ################################################################

 1964 15:53:31.524076  

 1965 15:53:32.051884  00300000 ################################################################

 1966 15:53:32.052042  

 1967 15:53:32.583109  00380000 ################################################################

 1968 15:53:32.583254  

 1969 15:53:33.111688  00400000 ################################################################

 1970 15:53:33.111823  

 1971 15:53:33.631173  00480000 ################################################################

 1972 15:53:33.631333  

 1973 15:53:34.160771  00500000 ################################################################

 1974 15:53:34.160942  

 1975 15:53:34.688922  00580000 ################################################################

 1976 15:53:34.689090  

 1977 15:53:35.215784  00600000 ################################################################

 1978 15:53:35.215966  

 1979 15:53:35.748722  00680000 ################################################################

 1980 15:53:35.748865  

 1981 15:53:36.292543  00700000 ################################################################

 1982 15:53:36.292695  

 1983 15:53:36.822821  00780000 ################################################################

 1984 15:53:36.822981  

 1985 15:53:37.278969  00800000 ###################################################### done.

 1986 15:53:37.279114  

 1987 15:53:37.282707  Sending tftp read request... done.

 1988 15:53:37.282807  

 1989 15:53:37.285483  Waiting for the transfer... 

 1990 15:53:37.285576  

 1991 15:53:37.285663  00000000 # done.

 1992 15:53:37.285746  

 1993 15:53:37.295610  Command line loaded dynamically from TFTP file: 11224310/tftp-deploy-i731b3uv/kernel/cmdline

 1994 15:53:37.295726  

 1995 15:53:37.309251  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 1996 15:53:37.309391  

 1997 15:53:37.312323  ec_init: CrosEC protocol v3 supported (256, 256)

 1998 15:53:37.319924  

 1999 15:53:37.320033  Shutting down all USB controllers.

 2000 15:53:37.320102  

 2001 15:53:37.323079  Removing current net device

 2002 15:53:37.323164  

 2003 15:53:37.326340  Finalizing coreboot

 2004 15:53:37.326429  

 2005 15:53:37.326495  

 2006 15:53:37.326557  

 2007 15:53:37.332998  coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 smm starting (log level: 8)...

 2008 15:53:37.333099  

 2009 15:53:37.333165  SMI# #0

 2010 15:53:37.339789  Exiting depthcharge with code 4 at timestamp: 26991877

 2011 15:53:37.339887  

 2012 15:53:37.339964  

 2013 15:53:37.340027  Starting kernel ...

 2014 15:53:37.340089  

 2015 15:53:37.340147  

 2016 15:53:37.340517  end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
 2017 15:53:37.340616  start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
 2018 15:53:37.340693  Setting prompt string to ['Linux version [0-9]']
 2019 15:53:37.340761  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2020 15:53:37.340828  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2021 15:53:37.649027  

 2022 15:53:37.649169  

 2023 15:53:37.649239  

 2024 15:53:37.655697  coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 smm starting (log level: 8)...

 2025 15:53:37.655797  

 2026 15:53:37.655864  SMI# #1

 2027 15:53:37.658858  Chrome EC: Set SMI mask to 0x0000000000000000

 2028 15:53:37.662283  Chrome EC: UHEPI supported

 2029 15:53:37.668844  Clearing pending EC events. Error code EC_RES_UNAVAILABLE(9) is expected.

 2030 15:53:37.671982  EC returned error result code 9

 2031 15:53:37.675184  Chrome EC: Set SCI mask to 0x00000000142609fb

 2033 15:58:04.341604  end: 2.2.5 auto-login-action (duration 00:04:27) [common]
 2035 15:58:04.343300  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
 2037 15:58:04.344873  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2040 15:58:04.347118  end: 2 depthcharge-action (duration 00:05:00) [common]
 2042 15:58:04.348529  Cleaning after the job
 2043 15:58:04.349056  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224310/tftp-deploy-i731b3uv/ramdisk
 2044 15:58:04.355495  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224310/tftp-deploy-i731b3uv/kernel
 2045 15:58:04.362531  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224310/tftp-deploy-i731b3uv/modules
 2046 15:58:04.365617  start: 5.1 power-off (timeout 00:00:30) [common]
 2047 15:58:04.366884  Calling: 'pduclient' '--daemon=localhost' '--hostname=hp-x360-14a-cb0001xx-zork-cbg-6' '--port=1' '--command=off'
 2048 15:58:04.466677  >> Command sent successfully.

 2049 15:58:04.473728  Returned 0 in 0 seconds
 2050 15:58:04.574847  end: 5.1 power-off (duration 00:00:00) [common]
 2052 15:58:04.576477  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2053 15:58:04.577803  Listened to connection for namespace 'common' for up to 1s
 2054 15:58:04.578673  Listened to connection for namespace 'common' for up to 1s
 2055 15:58:05.578384  Finalising connection for namespace 'common'
 2056 15:58:05.579020  Disconnecting from shell: Finalise
 2057 15:58:05.579420  
 2058 15:58:05.680357  end: 5.2 read-feedback (duration 00:00:01) [common]
 2059 15:58:05.680965  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224310
 2060 15:58:05.701218  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224310
 2061 15:58:05.701364  JobError: Your job cannot terminate cleanly.