Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 15:53:13.103075 lava-dispatcher, installed at version: 2023.05.1
2 15:53:13.103331 start: 0 validate
3 15:53:13.103481 Start time: 2023-08-07 15:53:13.103470+00:00 (UTC)
4 15:53:13.103622 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:53:13.103766 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 15:53:13.372741 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:53:13.372944 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:53:13.635638 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:53:13.635900 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:53:17.884211 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:53:17.884449 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:53:18.886002 validate duration: 5.78
14 15:53:18.886287 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:53:18.886395 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:53:18.886490 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:53:18.886620 Not decompressing ramdisk as can be used compressed.
18 15:53:18.886714 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 15:53:18.886785 saving as /var/lib/lava/dispatcher/tmp/11224336/tftp-deploy-2bk2ygko/ramdisk/initrd.cpio.gz
20 15:53:18.886851 total size: 5432690 (5MB)
21 15:53:18.888083 progress 0% (0MB)
22 15:53:18.890385 progress 5% (0MB)
23 15:53:18.893008 progress 10% (0MB)
24 15:53:18.895606 progress 15% (0MB)
25 15:53:18.898508 progress 20% (1MB)
26 15:53:18.900363 progress 25% (1MB)
27 15:53:18.901955 progress 30% (1MB)
28 15:53:18.903759 progress 35% (1MB)
29 15:53:18.905321 progress 40% (2MB)
30 15:53:18.906879 progress 45% (2MB)
31 15:53:18.908464 progress 50% (2MB)
32 15:53:18.910217 progress 55% (2MB)
33 15:53:18.911797 progress 60% (3MB)
34 15:53:18.913353 progress 65% (3MB)
35 15:53:18.915087 progress 70% (3MB)
36 15:53:18.917125 progress 75% (3MB)
37 15:53:18.918716 progress 80% (4MB)
38 15:53:18.920291 progress 85% (4MB)
39 15:53:18.922065 progress 90% (4MB)
40 15:53:18.923627 progress 95% (4MB)
41 15:53:18.925235 progress 100% (5MB)
42 15:53:18.925478 5MB downloaded in 0.04s (134.15MB/s)
43 15:53:18.925642 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:53:18.925907 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:53:18.926003 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:53:18.926095 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:53:18.926249 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:53:18.926326 saving as /var/lib/lava/dispatcher/tmp/11224336/tftp-deploy-2bk2ygko/kernel/bzImage
50 15:53:18.926394 total size: 7880592 (7MB)
51 15:53:18.926460 No compression specified
52 15:53:18.927704 progress 0% (0MB)
53 15:53:18.930171 progress 5% (0MB)
54 15:53:18.932533 progress 10% (0MB)
55 15:53:18.934886 progress 15% (1MB)
56 15:53:18.937818 progress 20% (1MB)
57 15:53:18.940209 progress 25% (1MB)
58 15:53:18.942592 progress 30% (2MB)
59 15:53:18.944971 progress 35% (2MB)
60 15:53:18.947878 progress 40% (3MB)
61 15:53:18.951524 progress 45% (3MB)
62 15:53:18.955325 progress 50% (3MB)
63 15:53:18.959110 progress 55% (4MB)
64 15:53:18.962859 progress 60% (4MB)
65 15:53:18.966579 progress 65% (4MB)
66 15:53:18.970176 progress 70% (5MB)
67 15:53:18.973917 progress 75% (5MB)
68 15:53:18.977666 progress 80% (6MB)
69 15:53:18.981416 progress 85% (6MB)
70 15:53:18.985204 progress 90% (6MB)
71 15:53:18.988980 progress 95% (7MB)
72 15:53:18.992601 progress 100% (7MB)
73 15:53:18.992893 7MB downloaded in 0.07s (113.03MB/s)
74 15:53:18.993106 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:53:18.993518 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:53:18.993651 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:53:18.993808 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:53:18.994000 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 15:53:18.994122 saving as /var/lib/lava/dispatcher/tmp/11224336/tftp-deploy-2bk2ygko/nfsrootfs/full.rootfs.tar
81 15:53:18.994220 total size: 133380384 (127MB)
82 15:53:18.994326 Using unxz to decompress xz
83 15:53:19.000168 progress 0% (0MB)
84 15:53:19.385154 progress 5% (6MB)
85 15:53:19.785053 progress 10% (12MB)
86 15:53:20.104949 progress 15% (19MB)
87 15:53:20.311703 progress 20% (25MB)
88 15:53:20.583133 progress 25% (31MB)
89 15:53:20.967475 progress 30% (38MB)
90 15:53:21.348863 progress 35% (44MB)
91 15:53:21.794800 progress 40% (50MB)
92 15:53:22.223537 progress 45% (57MB)
93 15:53:22.623395 progress 50% (63MB)
94 15:53:23.041278 progress 55% (69MB)
95 15:53:23.446021 progress 60% (76MB)
96 15:53:23.850877 progress 65% (82MB)
97 15:53:24.257893 progress 70% (89MB)
98 15:53:24.666567 progress 75% (95MB)
99 15:53:25.155379 progress 80% (101MB)
100 15:53:25.637687 progress 85% (108MB)
101 15:53:25.936466 progress 90% (114MB)
102 15:53:26.320338 progress 95% (120MB)
103 15:53:26.757729 progress 100% (127MB)
104 15:53:26.763749 127MB downloaded in 7.77s (16.37MB/s)
105 15:53:26.764084 end: 1.3.1 http-download (duration 00:00:08) [common]
107 15:53:26.764386 end: 1.3 download-retry (duration 00:00:08) [common]
108 15:53:26.764487 start: 1.4 download-retry (timeout 00:09:52) [common]
109 15:53:26.764585 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 15:53:26.764768 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:53:26.764853 saving as /var/lib/lava/dispatcher/tmp/11224336/tftp-deploy-2bk2ygko/modules/modules.tar
112 15:53:26.764925 total size: 251008 (0MB)
113 15:53:26.764997 Using unxz to decompress xz
114 15:53:26.769589 progress 13% (0MB)
115 15:53:26.770035 progress 26% (0MB)
116 15:53:26.770298 progress 39% (0MB)
117 15:53:26.772068 progress 52% (0MB)
118 15:53:26.774138 progress 65% (0MB)
119 15:53:26.776240 progress 78% (0MB)
120 15:53:26.778308 progress 91% (0MB)
121 15:53:26.780235 progress 100% (0MB)
122 15:53:26.786367 0MB downloaded in 0.02s (11.17MB/s)
123 15:53:26.786659 end: 1.4.1 http-download (duration 00:00:00) [common]
125 15:53:26.786961 end: 1.4 download-retry (duration 00:00:00) [common]
126 15:53:26.787072 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 15:53:26.787182 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 15:53:29.206828 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11224336/extract-nfsrootfs-9fzlgass
129 15:53:29.207047 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 15:53:29.207161 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 15:53:29.207573 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp
132 15:53:29.207734 makedir: /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin
133 15:53:29.207853 makedir: /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/tests
134 15:53:29.207968 makedir: /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/results
135 15:53:29.208081 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-add-keys
136 15:53:29.208238 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-add-sources
137 15:53:29.208383 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-background-process-start
138 15:53:29.208525 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-background-process-stop
139 15:53:29.208665 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-common-functions
140 15:53:29.208803 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-echo-ipv4
141 15:53:29.208941 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-install-packages
142 15:53:29.209086 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-installed-packages
143 15:53:29.209229 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-os-build
144 15:53:29.209370 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-probe-channel
145 15:53:29.209508 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-probe-ip
146 15:53:29.209647 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-target-ip
147 15:53:29.209783 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-target-mac
148 15:53:29.209921 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-target-storage
149 15:53:29.210062 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-test-case
150 15:53:29.210201 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-test-event
151 15:53:29.210339 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-test-feedback
152 15:53:29.210479 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-test-raise
153 15:53:29.210616 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-test-reference
154 15:53:29.210755 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-test-runner
155 15:53:29.210894 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-test-set
156 15:53:29.211033 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-test-shell
157 15:53:29.211190 Updating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-install-packages (oe)
158 15:53:29.211383 Updating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/bin/lava-installed-packages (oe)
159 15:53:29.211521 Creating /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/environment
160 15:53:29.211633 LAVA metadata
161 15:53:29.211713 - LAVA_JOB_ID=11224336
162 15:53:29.211784 - LAVA_DISPATCHER_IP=192.168.201.1
163 15:53:29.211893 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 15:53:29.211966 skipped lava-vland-overlay
165 15:53:29.212048 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 15:53:29.212163 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 15:53:29.212230 skipped lava-multinode-overlay
168 15:53:29.212308 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 15:53:29.212395 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 15:53:29.212474 Loading test definitions
171 15:53:29.212569 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 15:53:29.212646 Using /lava-11224336 at stage 0
173 15:53:29.212990 uuid=11224336_1.5.2.3.1 testdef=None
174 15:53:29.213086 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 15:53:29.213179 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 15:53:29.213752 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 15:53:29.214021 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 15:53:29.214803 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 15:53:29.215081 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 15:53:29.215973 runner path: /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/0/tests/0_dmesg test_uuid 11224336_1.5.2.3.1
183 15:53:29.216148 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 15:53:29.216392 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 15:53:29.216471 Using /lava-11224336 at stage 1
187 15:53:29.216808 uuid=11224336_1.5.2.3.5 testdef=None
188 15:53:29.216922 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 15:53:29.217016 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 15:53:29.217572 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 15:53:29.217807 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 15:53:29.218506 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 15:53:29.218800 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 15:53:29.219540 runner path: /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/1/tests/1_bootrr test_uuid 11224336_1.5.2.3.5
197 15:53:29.219709 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 15:53:29.219958 Creating lava-test-runner.conf files
200 15:53:29.220042 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/0 for stage 0
201 15:53:29.220178 - 0_dmesg
202 15:53:29.220293 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224336/lava-overlay-li9rgevp/lava-11224336/1 for stage 1
203 15:53:29.220425 - 1_bootrr
204 15:53:29.220536 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 15:53:29.220631 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 15:53:29.229065 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 15:53:29.229179 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 15:53:29.229272 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 15:53:29.229365 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 15:53:29.229458 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 15:53:29.382717 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 15:53:29.383123 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 15:53:29.383261 extracting modules file /var/lib/lava/dispatcher/tmp/11224336/tftp-deploy-2bk2ygko/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224336/extract-nfsrootfs-9fzlgass
214 15:53:29.398806 extracting modules file /var/lib/lava/dispatcher/tmp/11224336/tftp-deploy-2bk2ygko/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224336/extract-overlay-ramdisk-r90jcgv1/ramdisk
215 15:53:29.413769 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 15:53:29.413908 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 15:53:29.414007 [common] Applying overlay to NFS
218 15:53:29.414086 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224336/compress-overlay-3w9wt7m0/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224336/extract-nfsrootfs-9fzlgass
219 15:53:29.423194 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 15:53:29.423329 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 15:53:29.423433 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 15:53:29.423535 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 15:53:29.423622 Building ramdisk /var/lib/lava/dispatcher/tmp/11224336/extract-overlay-ramdisk-r90jcgv1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224336/extract-overlay-ramdisk-r90jcgv1/ramdisk
224 15:53:29.506140 >> 26161 blocks
225 15:53:30.101961 rename /var/lib/lava/dispatcher/tmp/11224336/extract-overlay-ramdisk-r90jcgv1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224336/tftp-deploy-2bk2ygko/ramdisk/ramdisk.cpio.gz
226 15:53:30.102438 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 15:53:30.102573 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 15:53:30.102684 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 15:53:30.102788 No mkimage arch provided, not using FIT.
230 15:53:30.102885 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 15:53:30.102988 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 15:53:30.103110 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 15:53:30.103213 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 15:53:30.103312 No LXC device requested
235 15:53:30.103405 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 15:53:30.103501 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 15:53:30.103592 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 15:53:30.103671 Checking files for TFTP limit of 4294967296 bytes.
239 15:53:30.104116 end: 1 tftp-deploy (duration 00:00:11) [common]
240 15:53:30.104234 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 15:53:30.104333 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 15:53:30.104471 substitutions:
243 15:53:30.104548 - {DTB}: None
244 15:53:30.104617 - {INITRD}: 11224336/tftp-deploy-2bk2ygko/ramdisk/ramdisk.cpio.gz
245 15:53:30.104683 - {KERNEL}: 11224336/tftp-deploy-2bk2ygko/kernel/bzImage
246 15:53:30.104749 - {LAVA_MAC}: None
247 15:53:30.104811 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11224336/extract-nfsrootfs-9fzlgass
248 15:53:30.104877 - {NFS_SERVER_IP}: 192.168.201.1
249 15:53:30.104938 - {PRESEED_CONFIG}: None
250 15:53:30.105002 - {PRESEED_LOCAL}: None
251 15:53:30.105086 - {RAMDISK}: 11224336/tftp-deploy-2bk2ygko/ramdisk/ramdisk.cpio.gz
252 15:53:30.105150 - {ROOT_PART}: None
253 15:53:30.105211 - {ROOT}: None
254 15:53:30.105274 - {SERVER_IP}: 192.168.201.1
255 15:53:30.105335 - {TEE}: None
256 15:53:30.105396 Parsed boot commands:
257 15:53:30.105456 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 15:53:30.105654 Parsed boot commands: tftpboot 192.168.201.1 11224336/tftp-deploy-2bk2ygko/kernel/bzImage 11224336/tftp-deploy-2bk2ygko/kernel/cmdline 11224336/tftp-deploy-2bk2ygko/ramdisk/ramdisk.cpio.gz
259 15:53:30.105753 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 15:53:30.105853 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 15:53:30.105957 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 15:53:30.106054 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 15:53:30.106135 Not connected, no need to disconnect.
264 15:53:30.106218 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 15:53:30.106311 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 15:53:30.106386 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
267 15:53:30.110724 Setting prompt string to ['lava-test: # ']
268 15:53:30.111114 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 15:53:30.111247 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 15:53:30.111353 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 15:53:30.111460 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 15:53:30.111676 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 15:53:35.257433 >> Command sent successfully.
274 15:53:35.266415 Returned 0 in 5 seconds
275 15:53:35.367555 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 15:53:35.368854 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 15:53:35.369290 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 15:53:35.369793 Setting prompt string to 'Starting depthcharge on Helios...'
280 15:53:35.370222 Changing prompt to 'Starting depthcharge on Helios...'
281 15:53:35.370559 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 15:53:35.371704 [Enter `^Ec?' for help]
283 15:53:35.983177
284 15:53:35.983669
285 15:53:35.993569 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 15:53:35.996951 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 15:53:36.003629 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 15:53:36.006929 CPU: AES supported, TXT NOT supported, VT supported
289 15:53:36.013722 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 15:53:36.017029 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 15:53:36.023524 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 15:53:36.026856 VBOOT: Loading verstage.
293 15:53:36.030461 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 15:53:36.037085 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 15:53:36.040337 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 15:53:36.043552 CBFS @ c08000 size 3f8000
297 15:53:36.050187 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 15:53:36.053419 CBFS: Locating 'fallback/verstage'
299 15:53:36.056653 CBFS: Found @ offset 10fb80 size 1072c
300 15:53:36.060485
301 15:53:36.060845
302 15:53:36.070251 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 15:53:36.084423 Probing TPM: . done!
304 15:53:36.087874 TPM ready after 0 ms
305 15:53:36.090867 Connected to device vid:did:rid of 1ae0:0028:00
306 15:53:36.101305 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 15:53:36.105117 Initialized TPM device CR50 revision 0
308 15:53:36.145864 tlcl_send_startup: Startup return code is 0
309 15:53:36.146306 TPM: setup succeeded
310 15:53:36.158443 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 15:53:36.162579 Chrome EC: UHEPI supported
312 15:53:36.165857 Phase 1
313 15:53:36.169121 FMAP: area GBB found @ c05000 (12288 bytes)
314 15:53:36.175692 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 15:53:36.176128 Phase 2
316 15:53:36.178979 Phase 3
317 15:53:36.182653 FMAP: area GBB found @ c05000 (12288 bytes)
318 15:53:36.188883 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 15:53:36.195930 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 15:53:36.199187 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
321 15:53:36.205546 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 15:53:36.221497 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 15:53:36.224323 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
324 15:53:36.231302 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 15:53:36.235515 Phase 4
326 15:53:36.238648 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
327 15:53:36.245191 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 15:53:36.424943 VB2:vb2_rsa_verify_digest() Digest check failed!
329 15:53:36.431555 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 15:53:36.432025 Saving nvdata
331 15:53:36.435049 Reboot requested (10020007)
332 15:53:36.438356 board_reset() called!
333 15:53:36.438765 full_reset() called!
334 15:53:40.950000
335 15:53:40.950179
336 15:53:40.960222 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 15:53:40.963468 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 15:53:40.970089 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 15:53:40.973184 CPU: AES supported, TXT NOT supported, VT supported
340 15:53:40.979869 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 15:53:40.983481 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 15:53:40.990021 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 15:53:40.993236 VBOOT: Loading verstage.
344 15:53:40.996480 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 15:53:41.002963 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 15:53:41.006643 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 15:53:41.010009 CBFS @ c08000 size 3f8000
348 15:53:41.016515 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 15:53:41.019717 CBFS: Locating 'fallback/verstage'
350 15:53:41.022885 CBFS: Found @ offset 10fb80 size 1072c
351 15:53:41.026866
352 15:53:41.026958
353 15:53:41.036935 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 15:53:41.051061 Probing TPM: . done!
355 15:53:41.054392 TPM ready after 0 ms
356 15:53:41.057543 Connected to device vid:did:rid of 1ae0:0028:00
357 15:53:41.067877 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 15:53:41.071750 Initialized TPM device CR50 revision 0
359 15:53:41.112500 tlcl_send_startup: Startup return code is 0
360 15:53:41.112602 TPM: setup succeeded
361 15:53:41.125099 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 15:53:41.128913 Chrome EC: UHEPI supported
363 15:53:41.132226 Phase 1
364 15:53:41.135882 FMAP: area GBB found @ c05000 (12288 bytes)
365 15:53:41.142269 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 15:53:41.149108 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 15:53:41.152677 Recovery requested (1009000e)
368 15:53:41.157577 Saving nvdata
369 15:53:41.164045 tlcl_extend: response is 0
370 15:53:41.172889 tlcl_extend: response is 0
371 15:53:41.180041 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 15:53:41.183186 CBFS @ c08000 size 3f8000
373 15:53:41.189815 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 15:53:41.193100 CBFS: Locating 'fallback/romstage'
375 15:53:41.196855 CBFS: Found @ offset 80 size 145fc
376 15:53:41.200072 Accumulated console time in verstage 98 ms
377 15:53:41.200165
378 15:53:41.200238
379 15:53:41.213061 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 15:53:41.219963 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 15:53:41.223060 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 15:53:41.226262 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 15:53:41.233268 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 15:53:41.236096 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 15:53:41.239712 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 15:53:41.243058 TCO_STS: 0000 0000
387 15:53:41.246209 GEN_PMCON: e0015238 00000200
388 15:53:41.249475 GBLRST_CAUSE: 00000000 00000000
389 15:53:41.249568 prev_sleep_state 5
390 15:53:41.252721 Boot Count incremented to 62728
391 15:53:41.259728 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 15:53:41.263012 CBFS @ c08000 size 3f8000
393 15:53:41.269642 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 15:53:41.269735 CBFS: Locating 'fspm.bin'
395 15:53:41.276047 CBFS: Found @ offset 5ffc0 size 71000
396 15:53:41.279550 Chrome EC: UHEPI supported
397 15:53:41.285860 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 15:53:41.289719 Probing TPM: done!
399 15:53:41.296274 Connected to device vid:did:rid of 1ae0:0028:00
400 15:53:41.306366 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 15:53:41.311789 Initialized TPM device CR50 revision 0
402 15:53:41.321032 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 15:53:41.328024 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 15:53:41.331377 MRC cache found, size 1948
405 15:53:41.334529 bootmode is set to: 2
406 15:53:41.337769 PRMRR disabled by config.
407 15:53:41.337862 SPD INDEX = 1
408 15:53:41.344190 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 15:53:41.347894 CBFS @ c08000 size 3f8000
410 15:53:41.354347 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 15:53:41.354441 CBFS: Locating 'spd.bin'
412 15:53:41.357761 CBFS: Found @ offset 5fb80 size 400
413 15:53:41.361188 SPD: module type is LPDDR3
414 15:53:41.364477 SPD: module part is
415 15:53:41.371035 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 15:53:41.374314 SPD: device width 4 bits, bus width 8 bits
417 15:53:41.377429 SPD: module size is 4096 MB (per channel)
418 15:53:41.380776 memory slot: 0 configuration done.
419 15:53:41.383919 memory slot: 2 configuration done.
420 15:53:41.435380 CBMEM:
421 15:53:41.438768 IMD: root @ 99fff000 254 entries.
422 15:53:41.441951 IMD: root @ 99ffec00 62 entries.
423 15:53:41.445041 External stage cache:
424 15:53:41.448740 IMD: root @ 9abff000 254 entries.
425 15:53:41.452064 IMD: root @ 9abfec00 62 entries.
426 15:53:41.455404 Chrome EC: clear events_b mask to 0x0000000020004000
427 15:53:41.471205 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 15:53:41.484378 tlcl_write: response is 0
429 15:53:41.493781 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 15:53:41.500408 MRC: TPM MRC hash updated successfully.
431 15:53:41.500533 2 DIMMs found
432 15:53:41.503552 SMM Memory Map
433 15:53:41.507275 SMRAM : 0x9a000000 0x1000000
434 15:53:41.510578 Subregion 0: 0x9a000000 0xa00000
435 15:53:41.513827 Subregion 1: 0x9aa00000 0x200000
436 15:53:41.517042 Subregion 2: 0x9ac00000 0x400000
437 15:53:41.520132 top_of_ram = 0x9a000000
438 15:53:41.523762 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 15:53:41.530325 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 15:53:41.533232 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 15:53:41.540115 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 15:53:41.543510 CBFS @ c08000 size 3f8000
443 15:53:41.546867 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 15:53:41.549687 CBFS: Locating 'fallback/postcar'
445 15:53:41.556388 CBFS: Found @ offset 107000 size 4b44
446 15:53:41.559584 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 15:53:41.571962 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 15:53:41.575256 Processing 180 relocs. Offset value of 0x97c0c000
449 15:53:41.583981 Accumulated console time in romstage 286 ms
450 15:53:41.584074
451 15:53:41.584148
452 15:53:41.593678 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 15:53:41.600395 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 15:53:41.603968 CBFS @ c08000 size 3f8000
455 15:53:41.606953 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 15:53:41.610613 CBFS: Locating 'fallback/ramstage'
457 15:53:41.617076 CBFS: Found @ offset 43380 size 1b9e8
458 15:53:41.624049 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 15:53:41.655539 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 15:53:41.658691 Processing 3976 relocs. Offset value of 0x98db0000
461 15:53:41.665426 Accumulated console time in postcar 52 ms
462 15:53:41.665514
463 15:53:41.665590
464 15:53:41.675930 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 15:53:41.679147 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 15:53:41.685857 WARNING: RO_VPD is uninitialized or empty.
467 15:53:41.689042 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 15:53:41.695735 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 15:53:41.695830 Normal boot.
470 15:53:41.702139 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 15:53:41.705204 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 15:53:41.708768 CBFS @ c08000 size 3f8000
473 15:53:41.715393 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 15:53:41.718574 CBFS: Locating 'cpu_microcode_blob.bin'
475 15:53:41.721816 CBFS: Found @ offset 14700 size 2ec00
476 15:53:41.725138 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 15:53:41.728797 Skip microcode update
478 15:53:41.732084 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 15:53:41.734927 CBFS @ c08000 size 3f8000
480 15:53:41.741900 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 15:53:41.745199 CBFS: Locating 'fsps.bin'
482 15:53:41.748433 CBFS: Found @ offset d1fc0 size 35000
483 15:53:41.773530 Detected 4 core, 8 thread CPU.
484 15:53:41.776790 Setting up SMI for CPU
485 15:53:41.780485 IED base = 0x9ac00000
486 15:53:41.780612 IED size = 0x00400000
487 15:53:41.783369 Will perform SMM setup.
488 15:53:41.790349 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 15:53:41.797104 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 15:53:41.800067 Processing 16 relocs. Offset value of 0x00030000
491 15:53:41.803947 Attempting to start 7 APs
492 15:53:41.807048 Waiting for 10ms after sending INIT.
493 15:53:41.823694 Waiting for 1st SIPI to complete...done.
494 15:53:41.823824 AP: slot 4 apic_id 1.
495 15:53:41.830134 Waiting for 2nd SIPI to complete...done.
496 15:53:41.830262 AP: slot 3 apic_id 6.
497 15:53:41.833210 AP: slot 6 apic_id 7.
498 15:53:41.836647 AP: slot 5 apic_id 3.
499 15:53:41.836742 AP: slot 1 apic_id 2.
500 15:53:41.839955 AP: slot 7 apic_id 4.
501 15:53:41.843136 AP: slot 2 apic_id 5.
502 15:53:41.850223 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 15:53:41.856638 Processing 13 relocs. Offset value of 0x00038000
504 15:53:41.860280 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 15:53:41.866902 Installing SMM handler to 0x9a000000
506 15:53:41.873561 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 15:53:41.876339 Processing 658 relocs. Offset value of 0x9a010000
508 15:53:41.886793 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 15:53:41.889960 Processing 13 relocs. Offset value of 0x9a008000
510 15:53:41.896520 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 15:53:41.902971 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 15:53:41.906430 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 15:53:41.913058 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 15:53:41.919715 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 15:53:41.926182 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 15:53:41.929767 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 15:53:41.935999 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 15:53:41.939498 Clearing SMI status registers
519 15:53:41.943105 SMI_STS: PM1
520 15:53:41.943198 PM1_STS: PWRBTN
521 15:53:41.946476 TCO_STS: SECOND_TO
522 15:53:41.949522 New SMBASE 0x9a000000
523 15:53:41.952915 In relocation handler: CPU 0
524 15:53:41.956165 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 15:53:41.959395 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 15:53:41.962874 Relocation complete.
527 15:53:41.966089 New SMBASE 0x99fff000
528 15:53:41.966183 In relocation handler: CPU 4
529 15:53:41.973021 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
530 15:53:41.976110 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 15:53:41.979805 Relocation complete.
532 15:53:41.979929 New SMBASE 0x99ffe800
533 15:53:41.983192 In relocation handler: CPU 6
534 15:53:41.989680 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
535 15:53:41.992927 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 15:53:41.996312 Relocation complete.
537 15:53:41.996405 New SMBASE 0x99fff400
538 15:53:41.999693 In relocation handler: CPU 3
539 15:53:42.006041 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
540 15:53:42.009721 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 15:53:42.012907 Relocation complete.
542 15:53:42.013031 New SMBASE 0x99ffe400
543 15:53:42.016055 In relocation handler: CPU 7
544 15:53:42.019486 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
545 15:53:42.026303 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 15:53:42.029639 Relocation complete.
547 15:53:42.029753 New SMBASE 0x99fff800
548 15:53:42.032912 In relocation handler: CPU 2
549 15:53:42.036086 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
550 15:53:42.042927 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 15:53:42.046289 Relocation complete.
552 15:53:42.046383 New SMBASE 0x99fffc00
553 15:53:42.049259 In relocation handler: CPU 1
554 15:53:42.052647 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
555 15:53:42.059353 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 15:53:42.059444 Relocation complete.
557 15:53:42.062817 New SMBASE 0x99ffec00
558 15:53:42.066014 In relocation handler: CPU 5
559 15:53:42.069203 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
560 15:53:42.075616 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 15:53:42.075711 Relocation complete.
562 15:53:42.078994 Initializing CPU #0
563 15:53:42.082629 CPU: vendor Intel device 806ec
564 15:53:42.085797 CPU: family 06, model 8e, stepping 0c
565 15:53:42.089113 Clearing out pending MCEs
566 15:53:42.092320 Setting up local APIC...
567 15:53:42.092402 apic_id: 0x00 done.
568 15:53:42.095585 Turbo is available but hidden
569 15:53:42.098933 Turbo is available and visible
570 15:53:42.102652 VMX status: enabled
571 15:53:42.105954 IA32_FEATURE_CONTROL status: locked
572 15:53:42.109217 Skip microcode update
573 15:53:42.109309 CPU #0 initialized
574 15:53:42.112438 Initializing CPU #4
575 15:53:42.112530 Initializing CPU #2
576 15:53:42.115771 Initializing CPU #7
577 15:53:42.119032 CPU: vendor Intel device 806ec
578 15:53:42.122694 CPU: family 06, model 8e, stepping 0c
579 15:53:42.125778 CPU: vendor Intel device 806ec
580 15:53:42.129096 CPU: family 06, model 8e, stepping 0c
581 15:53:42.132712 Clearing out pending MCEs
582 15:53:42.135544 Clearing out pending MCEs
583 15:53:42.139060 Setting up local APIC...
584 15:53:42.139174 Initializing CPU #1
585 15:53:42.142601 Initializing CPU #5
586 15:53:42.145599 CPU: vendor Intel device 806ec
587 15:53:42.148924 CPU: family 06, model 8e, stepping 0c
588 15:53:42.152328 CPU: vendor Intel device 806ec
589 15:53:42.155588 CPU: family 06, model 8e, stepping 0c
590 15:53:42.158793 Clearing out pending MCEs
591 15:53:42.162413 Clearing out pending MCEs
592 15:53:42.162506 Setting up local APIC...
593 15:53:42.165920 Initializing CPU #6
594 15:53:42.168732 CPU: vendor Intel device 806ec
595 15:53:42.172124 CPU: family 06, model 8e, stepping 0c
596 15:53:42.175624 Clearing out pending MCEs
597 15:53:42.175725 apic_id: 0x05 done.
598 15:53:42.178583 Setting up local APIC...
599 15:53:42.181957 Initializing CPU #3
600 15:53:42.185230 CPU: vendor Intel device 806ec
601 15:53:42.188876 CPU: family 06, model 8e, stepping 0c
602 15:53:42.192283 VMX status: enabled
603 15:53:42.192403 Setting up local APIC...
604 15:53:42.195661 CPU: vendor Intel device 806ec
605 15:53:42.198994 CPU: family 06, model 8e, stepping 0c
606 15:53:42.202346 Clearing out pending MCEs
607 15:53:42.205692 Clearing out pending MCEs
608 15:53:42.208974 Setting up local APIC...
609 15:53:42.209099 apic_id: 0x02 done.
610 15:53:42.212302 Setting up local APIC...
611 15:53:42.215165 apic_id: 0x01 done.
612 15:53:42.215282 apic_id: 0x04 done.
613 15:53:42.222208 IA32_FEATURE_CONTROL status: locked
614 15:53:42.222330 VMX status: enabled
615 15:53:42.225420 Skip microcode update
616 15:53:42.228808 IA32_FEATURE_CONTROL status: locked
617 15:53:42.228926 CPU #2 initialized
618 15:53:42.231962 Skip microcode update
619 15:53:42.235461 VMX status: enabled
620 15:53:42.235554 VMX status: enabled
621 15:53:42.238508 apic_id: 0x03 done.
622 15:53:42.241672 IA32_FEATURE_CONTROL status: locked
623 15:53:42.245224 VMX status: enabled
624 15:53:42.245316 Skip microcode update
625 15:53:42.251760 IA32_FEATURE_CONTROL status: locked
626 15:53:42.251853 CPU #1 initialized
627 15:53:42.255082 Skip microcode update
628 15:53:42.255174 apic_id: 0x07 done.
629 15:53:42.258789 Setting up local APIC...
630 15:53:42.262218 CPU #7 initialized
631 15:53:42.262314 apic_id: 0x06 done.
632 15:53:42.265548 VMX status: enabled
633 15:53:42.268842 VMX status: enabled
634 15:53:42.272066 IA32_FEATURE_CONTROL status: locked
635 15:53:42.275402 IA32_FEATURE_CONTROL status: locked
636 15:53:42.275524 Skip microcode update
637 15:53:42.278841 Skip microcode update
638 15:53:42.281713 CPU #6 initialized
639 15:53:42.281836 CPU #3 initialized
640 15:53:42.285030 IA32_FEATURE_CONTROL status: locked
641 15:53:42.288619 CPU #5 initialized
642 15:53:42.291943 Skip microcode update
643 15:53:42.292075 CPU #4 initialized
644 15:53:42.298507 bsp_do_flight_plan done after 466 msecs.
645 15:53:42.298636 CPU: frequency set to 4200 MHz
646 15:53:42.301727 Enabling SMIs.
647 15:53:42.301856 Locking SMM.
648 15:53:42.318074 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 15:53:42.321357 CBFS @ c08000 size 3f8000
650 15:53:42.327921 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 15:53:42.328046 CBFS: Locating 'vbt.bin'
652 15:53:42.330993 CBFS: Found @ offset 5f5c0 size 499
653 15:53:42.338107 Found a VBT of 4608 bytes after decompression
654 15:53:42.520523 Display FSP Version Info HOB
655 15:53:42.523800 Reference Code - CPU = 9.0.1e.30
656 15:53:42.527176 uCode Version = 0.0.0.ca
657 15:53:42.530448 TXT ACM version = ff.ff.ff.ffff
658 15:53:42.533680 Display FSP Version Info HOB
659 15:53:42.536952 Reference Code - ME = 9.0.1e.30
660 15:53:42.540683 MEBx version = 0.0.0.0
661 15:53:42.543713 ME Firmware Version = Consumer SKU
662 15:53:42.546994 Display FSP Version Info HOB
663 15:53:42.550528 Reference Code - CML PCH = 9.0.1e.30
664 15:53:42.553525 PCH-CRID Status = Disabled
665 15:53:42.557050 PCH-CRID Original Value = ff.ff.ff.ffff
666 15:53:42.560198 PCH-CRID New Value = ff.ff.ff.ffff
667 15:53:42.563819 OPROM - RST - RAID = ff.ff.ff.ffff
668 15:53:42.567123 ChipsetInit Base Version = ff.ff.ff.ffff
669 15:53:42.570717 ChipsetInit Oem Version = ff.ff.ff.ffff
670 15:53:42.573570 Display FSP Version Info HOB
671 15:53:42.577220 Reference Code - SA - System Agent = 9.0.1e.30
672 15:53:42.580443 Reference Code - MRC = 0.7.1.6c
673 15:53:42.583702 SA - PCIe Version = 9.0.1e.30
674 15:53:42.586832 SA-CRID Status = Disabled
675 15:53:42.590509 SA-CRID Original Value = 0.0.0.c
676 15:53:42.593712 SA-CRID New Value = 0.0.0.c
677 15:53:42.596727 OPROM - VBIOS = ff.ff.ff.ffff
678 15:53:42.596820 RTC Init
679 15:53:42.604015 Set power on after power failure.
680 15:53:42.604109 Disabling Deep S3
681 15:53:42.607338 Disabling Deep S3
682 15:53:42.607431 Disabling Deep S4
683 15:53:42.610573 Disabling Deep S4
684 15:53:42.610665 Disabling Deep S5
685 15:53:42.613866 Disabling Deep S5
686 15:53:42.620502 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 193 exit 1
687 15:53:42.620596 Enumerating buses...
688 15:53:42.626994 Show all devs... Before device enumeration.
689 15:53:42.627088 Root Device: enabled 1
690 15:53:42.630211 CPU_CLUSTER: 0: enabled 1
691 15:53:42.634037 DOMAIN: 0000: enabled 1
692 15:53:42.634129 APIC: 00: enabled 1
693 15:53:42.637275 PCI: 00:00.0: enabled 1
694 15:53:42.640570 PCI: 00:02.0: enabled 1
695 15:53:42.643950 PCI: 00:04.0: enabled 0
696 15:53:42.644041 PCI: 00:05.0: enabled 0
697 15:53:42.647083 PCI: 00:12.0: enabled 1
698 15:53:42.650100 PCI: 00:12.5: enabled 0
699 15:53:42.653711 PCI: 00:12.6: enabled 0
700 15:53:42.653804 PCI: 00:14.0: enabled 1
701 15:53:42.657007 PCI: 00:14.1: enabled 0
702 15:53:42.660367 PCI: 00:14.3: enabled 1
703 15:53:42.660464 PCI: 00:14.5: enabled 0
704 15:53:42.663581 PCI: 00:15.0: enabled 1
705 15:53:42.667272 PCI: 00:15.1: enabled 1
706 15:53:42.670315 PCI: 00:15.2: enabled 0
707 15:53:42.670409 PCI: 00:15.3: enabled 0
708 15:53:42.673455 PCI: 00:16.0: enabled 1
709 15:53:42.677009 PCI: 00:16.1: enabled 0
710 15:53:42.680530 PCI: 00:16.2: enabled 0
711 15:53:42.680622 PCI: 00:16.3: enabled 0
712 15:53:42.683484 PCI: 00:16.4: enabled 0
713 15:53:42.687012 PCI: 00:16.5: enabled 0
714 15:53:42.690384 PCI: 00:17.0: enabled 1
715 15:53:42.690476 PCI: 00:19.0: enabled 1
716 15:53:42.693730 PCI: 00:19.1: enabled 0
717 15:53:42.696752 PCI: 00:19.2: enabled 0
718 15:53:42.696845 PCI: 00:1a.0: enabled 0
719 15:53:42.699941 PCI: 00:1c.0: enabled 0
720 15:53:42.703545 PCI: 00:1c.1: enabled 0
721 15:53:42.706589 PCI: 00:1c.2: enabled 0
722 15:53:42.706681 PCI: 00:1c.3: enabled 0
723 15:53:42.710223 PCI: 00:1c.4: enabled 0
724 15:53:42.713506 PCI: 00:1c.5: enabled 0
725 15:53:42.716753 PCI: 00:1c.6: enabled 0
726 15:53:42.716846 PCI: 00:1c.7: enabled 0
727 15:53:42.720105 PCI: 00:1d.0: enabled 1
728 15:53:42.723340 PCI: 00:1d.1: enabled 0
729 15:53:42.726544 PCI: 00:1d.2: enabled 0
730 15:53:42.726636 PCI: 00:1d.3: enabled 0
731 15:53:42.730232 PCI: 00:1d.4: enabled 0
732 15:53:42.733194 PCI: 00:1d.5: enabled 1
733 15:53:42.733286 PCI: 00:1e.0: enabled 1
734 15:53:42.736944 PCI: 00:1e.1: enabled 0
735 15:53:42.740300 PCI: 00:1e.2: enabled 1
736 15:53:42.743391 PCI: 00:1e.3: enabled 1
737 15:53:42.743483 PCI: 00:1f.0: enabled 1
738 15:53:42.746708 PCI: 00:1f.1: enabled 1
739 15:53:42.750019 PCI: 00:1f.2: enabled 1
740 15:53:42.753165 PCI: 00:1f.3: enabled 1
741 15:53:42.753258 PCI: 00:1f.4: enabled 1
742 15:53:42.756646 PCI: 00:1f.5: enabled 1
743 15:53:42.759974 PCI: 00:1f.6: enabled 0
744 15:53:42.760067 USB0 port 0: enabled 1
745 15:53:42.763251 I2C: 00:15: enabled 1
746 15:53:42.766584 I2C: 00:5d: enabled 1
747 15:53:42.769714 GENERIC: 0.0: enabled 1
748 15:53:42.769807 I2C: 00:1a: enabled 1
749 15:53:42.773031 I2C: 00:38: enabled 1
750 15:53:42.776192 I2C: 00:39: enabled 1
751 15:53:42.776284 I2C: 00:3a: enabled 1
752 15:53:42.779571 I2C: 00:3b: enabled 1
753 15:53:42.782781 PCI: 00:00.0: enabled 1
754 15:53:42.782873 SPI: 00: enabled 1
755 15:53:42.786146 SPI: 01: enabled 1
756 15:53:42.789610 PNP: 0c09.0: enabled 1
757 15:53:42.789702 USB2 port 0: enabled 1
758 15:53:42.793018 USB2 port 1: enabled 1
759 15:53:42.796423 USB2 port 2: enabled 0
760 15:53:42.796515 USB2 port 3: enabled 0
761 15:53:42.799472 USB2 port 5: enabled 0
762 15:53:42.802829 USB2 port 6: enabled 1
763 15:53:42.802921 USB2 port 9: enabled 1
764 15:53:42.806476 USB3 port 0: enabled 1
765 15:53:42.809683 USB3 port 1: enabled 1
766 15:53:42.812739 USB3 port 2: enabled 1
767 15:53:42.812833 USB3 port 3: enabled 1
768 15:53:42.815986 USB3 port 4: enabled 0
769 15:53:42.819355 APIC: 02: enabled 1
770 15:53:42.819447 APIC: 05: enabled 1
771 15:53:42.822705 APIC: 06: enabled 1
772 15:53:42.822798 APIC: 01: enabled 1
773 15:53:42.825863 APIC: 03: enabled 1
774 15:53:42.829157 APIC: 07: enabled 1
775 15:53:42.829250 APIC: 04: enabled 1
776 15:53:42.832833 Compare with tree...
777 15:53:42.836100 Root Device: enabled 1
778 15:53:42.836192 CPU_CLUSTER: 0: enabled 1
779 15:53:42.839338 APIC: 00: enabled 1
780 15:53:42.842991 APIC: 02: enabled 1
781 15:53:42.845853 APIC: 05: enabled 1
782 15:53:42.845946 APIC: 06: enabled 1
783 15:53:42.849154 APIC: 01: enabled 1
784 15:53:42.852388 APIC: 03: enabled 1
785 15:53:42.852481 APIC: 07: enabled 1
786 15:53:42.856111 APIC: 04: enabled 1
787 15:53:42.859294 DOMAIN: 0000: enabled 1
788 15:53:42.859387 PCI: 00:00.0: enabled 1
789 15:53:42.862578 PCI: 00:02.0: enabled 1
790 15:53:42.865832 PCI: 00:04.0: enabled 0
791 15:53:42.868999 PCI: 00:05.0: enabled 0
792 15:53:42.872577 PCI: 00:12.0: enabled 1
793 15:53:42.872669 PCI: 00:12.5: enabled 0
794 15:53:42.875909 PCI: 00:12.6: enabled 0
795 15:53:42.878980 PCI: 00:14.0: enabled 1
796 15:53:42.882333 USB0 port 0: enabled 1
797 15:53:42.885491 USB2 port 0: enabled 1
798 15:53:42.885611 USB2 port 1: enabled 1
799 15:53:42.889105 USB2 port 2: enabled 0
800 15:53:42.892524 USB2 port 3: enabled 0
801 15:53:42.895702 USB2 port 5: enabled 0
802 15:53:42.898721 USB2 port 6: enabled 1
803 15:53:42.902321 USB2 port 9: enabled 1
804 15:53:42.902441 USB3 port 0: enabled 1
805 15:53:42.905356 USB3 port 1: enabled 1
806 15:53:42.908662 USB3 port 2: enabled 1
807 15:53:42.911937 USB3 port 3: enabled 1
808 15:53:42.915306 USB3 port 4: enabled 0
809 15:53:42.915408 PCI: 00:14.1: enabled 0
810 15:53:42.919029 PCI: 00:14.3: enabled 1
811 15:53:42.921764 PCI: 00:14.5: enabled 0
812 15:53:42.925075 PCI: 00:15.0: enabled 1
813 15:53:42.928908 I2C: 00:15: enabled 1
814 15:53:42.929001 PCI: 00:15.1: enabled 1
815 15:53:42.932131 I2C: 00:5d: enabled 1
816 15:53:42.935279 GENERIC: 0.0: enabled 1
817 15:53:42.938610 PCI: 00:15.2: enabled 0
818 15:53:42.941940 PCI: 00:15.3: enabled 0
819 15:53:42.942033 PCI: 00:16.0: enabled 1
820 15:53:42.945110 PCI: 00:16.1: enabled 0
821 15:53:42.948771 PCI: 00:16.2: enabled 0
822 15:53:42.952192 PCI: 00:16.3: enabled 0
823 15:53:42.955214 PCI: 00:16.4: enabled 0
824 15:53:42.955317 PCI: 00:16.5: enabled 0
825 15:53:42.958118 PCI: 00:17.0: enabled 1
826 15:53:42.961770 PCI: 00:19.0: enabled 1
827 15:53:42.965249 I2C: 00:1a: enabled 1
828 15:53:42.965342 I2C: 00:38: enabled 1
829 15:53:42.968444 I2C: 00:39: enabled 1
830 15:53:42.971667 I2C: 00:3a: enabled 1
831 15:53:42.974963 I2C: 00:3b: enabled 1
832 15:53:42.978714 PCI: 00:19.1: enabled 0
833 15:53:42.978797 PCI: 00:19.2: enabled 0
834 15:53:42.981921 PCI: 00:1a.0: enabled 0
835 15:53:42.984810 PCI: 00:1c.0: enabled 0
836 15:53:42.988374 PCI: 00:1c.1: enabled 0
837 15:53:42.991421 PCI: 00:1c.2: enabled 0
838 15:53:42.991518 PCI: 00:1c.3: enabled 0
839 15:53:42.994985 PCI: 00:1c.4: enabled 0
840 15:53:42.998240 PCI: 00:1c.5: enabled 0
841 15:53:43.001556 PCI: 00:1c.6: enabled 0
842 15:53:43.001675 PCI: 00:1c.7: enabled 0
843 15:53:43.004835 PCI: 00:1d.0: enabled 1
844 15:53:43.007919 PCI: 00:1d.1: enabled 0
845 15:53:43.011523 PCI: 00:1d.2: enabled 0
846 15:53:43.014493 PCI: 00:1d.3: enabled 0
847 15:53:43.014615 PCI: 00:1d.4: enabled 0
848 15:53:43.017923 PCI: 00:1d.5: enabled 1
849 15:53:43.021426 PCI: 00:00.0: enabled 1
850 15:53:43.024658 PCI: 00:1e.0: enabled 1
851 15:53:43.028040 PCI: 00:1e.1: enabled 0
852 15:53:43.028135 PCI: 00:1e.2: enabled 1
853 15:53:43.031401 SPI: 00: enabled 1
854 15:53:43.034785 PCI: 00:1e.3: enabled 1
855 15:53:43.037922 SPI: 01: enabled 1
856 15:53:43.038047 PCI: 00:1f.0: enabled 1
857 15:53:43.041147 PNP: 0c09.0: enabled 1
858 15:53:43.044950 PCI: 00:1f.1: enabled 1
859 15:53:43.048163 PCI: 00:1f.2: enabled 1
860 15:53:43.051476 PCI: 00:1f.3: enabled 1
861 15:53:43.051580 PCI: 00:1f.4: enabled 1
862 15:53:43.054180 PCI: 00:1f.5: enabled 1
863 15:53:43.057522 PCI: 00:1f.6: enabled 0
864 15:53:43.060912 Root Device scanning...
865 15:53:43.064348 scan_static_bus for Root Device
866 15:53:43.064434 CPU_CLUSTER: 0 enabled
867 15:53:43.067600 DOMAIN: 0000 enabled
868 15:53:43.070932 DOMAIN: 0000 scanning...
869 15:53:43.074297 PCI: pci_scan_bus for bus 00
870 15:53:43.077601 PCI: 00:00.0 [8086/0000] ops
871 15:53:43.080855 PCI: 00:00.0 [8086/9b61] enabled
872 15:53:43.084388 PCI: 00:02.0 [8086/0000] bus ops
873 15:53:43.087580 PCI: 00:02.0 [8086/9b41] enabled
874 15:53:43.090865 PCI: 00:04.0 [8086/1903] disabled
875 15:53:43.093918 PCI: 00:08.0 [8086/1911] enabled
876 15:53:43.097247 PCI: 00:12.0 [8086/02f9] enabled
877 15:53:43.100886 PCI: 00:14.0 [8086/0000] bus ops
878 15:53:43.103931 PCI: 00:14.0 [8086/02ed] enabled
879 15:53:43.107571 PCI: 00:14.2 [8086/02ef] enabled
880 15:53:43.110819 PCI: 00:14.3 [8086/02f0] enabled
881 15:53:43.114142 PCI: 00:15.0 [8086/0000] bus ops
882 15:53:43.117291 PCI: 00:15.0 [8086/02e8] enabled
883 15:53:43.120332 PCI: 00:15.1 [8086/0000] bus ops
884 15:53:43.123661 PCI: 00:15.1 [8086/02e9] enabled
885 15:53:43.127112 PCI: 00:16.0 [8086/0000] ops
886 15:53:43.130487 PCI: 00:16.0 [8086/02e0] enabled
887 15:53:43.133656 PCI: 00:17.0 [8086/0000] ops
888 15:53:43.137093 PCI: 00:17.0 [8086/02d3] enabled
889 15:53:43.140406 PCI: 00:19.0 [8086/0000] bus ops
890 15:53:43.143641 PCI: 00:19.0 [8086/02c5] enabled
891 15:53:43.146981 PCI: 00:1d.0 [8086/0000] bus ops
892 15:53:43.150364 PCI: 00:1d.0 [8086/02b0] enabled
893 15:53:43.153769 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 15:53:43.157228 PCI: 00:1e.0 [8086/0000] ops
895 15:53:43.160453 PCI: 00:1e.0 [8086/02a8] enabled
896 15:53:43.163652 PCI: 00:1e.2 [8086/0000] bus ops
897 15:53:43.167164 PCI: 00:1e.2 [8086/02aa] enabled
898 15:53:43.170438 PCI: 00:1e.3 [8086/0000] bus ops
899 15:53:43.173609 PCI: 00:1e.3 [8086/02ab] enabled
900 15:53:43.176942 PCI: 00:1f.0 [8086/0000] bus ops
901 15:53:43.180251 PCI: 00:1f.0 [8086/0284] enabled
902 15:53:43.186707 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 15:53:43.193562 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 15:53:43.196864 PCI: 00:1f.3 [8086/0000] bus ops
905 15:53:43.200262 PCI: 00:1f.3 [8086/02c8] enabled
906 15:53:43.203088 PCI: 00:1f.4 [8086/0000] bus ops
907 15:53:43.206863 PCI: 00:1f.4 [8086/02a3] enabled
908 15:53:43.210006 PCI: 00:1f.5 [8086/0000] bus ops
909 15:53:43.213231 PCI: 00:1f.5 [8086/02a4] enabled
910 15:53:43.216792 PCI: Leftover static devices:
911 15:53:43.216927 PCI: 00:05.0
912 15:53:43.217034 PCI: 00:12.5
913 15:53:43.220039 PCI: 00:12.6
914 15:53:43.220125 PCI: 00:14.1
915 15:53:43.222964 PCI: 00:14.5
916 15:53:43.223089 PCI: 00:15.2
917 15:53:43.226372 PCI: 00:15.3
918 15:53:43.226485 PCI: 00:16.1
919 15:53:43.226599 PCI: 00:16.2
920 15:53:43.229656 PCI: 00:16.3
921 15:53:43.229771 PCI: 00:16.4
922 15:53:43.233177 PCI: 00:16.5
923 15:53:43.233263 PCI: 00:19.1
924 15:53:43.233335 PCI: 00:19.2
925 15:53:43.236299 PCI: 00:1a.0
926 15:53:43.236384 PCI: 00:1c.0
927 15:53:43.239584 PCI: 00:1c.1
928 15:53:43.239669 PCI: 00:1c.2
929 15:53:43.239755 PCI: 00:1c.3
930 15:53:43.242985 PCI: 00:1c.4
931 15:53:43.243107 PCI: 00:1c.5
932 15:53:43.246089 PCI: 00:1c.6
933 15:53:43.246184 PCI: 00:1c.7
934 15:53:43.249398 PCI: 00:1d.1
935 15:53:43.249512 PCI: 00:1d.2
936 15:53:43.249627 PCI: 00:1d.3
937 15:53:43.253138 PCI: 00:1d.4
938 15:53:43.253250 PCI: 00:1d.5
939 15:53:43.256468 PCI: 00:1e.1
940 15:53:43.256553 PCI: 00:1f.1
941 15:53:43.256624 PCI: 00:1f.2
942 15:53:43.259669 PCI: 00:1f.6
943 15:53:43.262990 PCI: Check your devicetree.cb.
944 15:53:43.263111 PCI: 00:02.0 scanning...
945 15:53:43.269717 scan_generic_bus for PCI: 00:02.0
946 15:53:43.272991 scan_generic_bus for PCI: 00:02.0 done
947 15:53:43.276292 scan_bus: scanning of bus PCI: 00:02.0 took 10181 usecs
948 15:53:43.279710 PCI: 00:14.0 scanning...
949 15:53:43.282915 scan_static_bus for PCI: 00:14.0
950 15:53:43.286101 USB0 port 0 enabled
951 15:53:43.289518 USB0 port 0 scanning...
952 15:53:43.292741 scan_static_bus for USB0 port 0
953 15:53:43.292858 USB2 port 0 enabled
954 15:53:43.296019 USB2 port 1 enabled
955 15:53:43.299319 USB2 port 2 disabled
956 15:53:43.299416 USB2 port 3 disabled
957 15:53:43.302783 USB2 port 5 disabled
958 15:53:43.302909 USB2 port 6 enabled
959 15:53:43.306304 USB2 port 9 enabled
960 15:53:43.309859 USB3 port 0 enabled
961 15:53:43.309983 USB3 port 1 enabled
962 15:53:43.312970 USB3 port 2 enabled
963 15:53:43.316450 USB3 port 3 enabled
964 15:53:43.316569 USB3 port 4 disabled
965 15:53:43.319420 USB2 port 0 scanning...
966 15:53:43.322541 scan_static_bus for USB2 port 0
967 15:53:43.325989 scan_static_bus for USB2 port 0 done
968 15:53:43.332770 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
969 15:53:43.332871 USB2 port 1 scanning...
970 15:53:43.336309 scan_static_bus for USB2 port 1
971 15:53:43.342840 scan_static_bus for USB2 port 1 done
972 15:53:43.345923 scan_bus: scanning of bus USB2 port 1 took 9700 usecs
973 15:53:43.349338 USB2 port 6 scanning...
974 15:53:43.352953 scan_static_bus for USB2 port 6
975 15:53:43.356323 scan_static_bus for USB2 port 6 done
976 15:53:43.362669 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
977 15:53:43.362795 USB2 port 9 scanning...
978 15:53:43.365931 scan_static_bus for USB2 port 9
979 15:53:43.373221 scan_static_bus for USB2 port 9 done
980 15:53:43.375934 scan_bus: scanning of bus USB2 port 9 took 9694 usecs
981 15:53:43.379272 USB3 port 0 scanning...
982 15:53:43.383078 scan_static_bus for USB3 port 0
983 15:53:43.386249 scan_static_bus for USB3 port 0 done
984 15:53:43.392471 scan_bus: scanning of bus USB3 port 0 took 9678 usecs
985 15:53:43.392564 USB3 port 1 scanning...
986 15:53:43.396349 scan_static_bus for USB3 port 1
987 15:53:43.403018 scan_static_bus for USB3 port 1 done
988 15:53:43.406304 scan_bus: scanning of bus USB3 port 1 took 9694 usecs
989 15:53:43.409645 USB3 port 2 scanning...
990 15:53:43.412895 scan_static_bus for USB3 port 2
991 15:53:43.416074 scan_static_bus for USB3 port 2 done
992 15:53:43.422831 scan_bus: scanning of bus USB3 port 2 took 9701 usecs
993 15:53:43.422930 USB3 port 3 scanning...
994 15:53:43.426019 scan_static_bus for USB3 port 3
995 15:53:43.432968 scan_static_bus for USB3 port 3 done
996 15:53:43.436014 scan_bus: scanning of bus USB3 port 3 took 9692 usecs
997 15:53:43.439477 scan_static_bus for USB0 port 0 done
998 15:53:43.445958 scan_bus: scanning of bus USB0 port 0 took 155294 usecs
999 15:53:43.449441 scan_static_bus for PCI: 00:14.0 done
1000 15:53:43.456137 scan_bus: scanning of bus PCI: 00:14.0 took 172906 usecs
1001 15:53:43.459642 PCI: 00:15.0 scanning...
1002 15:53:43.462710 scan_generic_bus for PCI: 00:15.0
1003 15:53:43.466052 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 15:53:43.469458 scan_generic_bus for PCI: 00:15.0 done
1005 15:53:43.475910 scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs
1006 15:53:43.476040 PCI: 00:15.1 scanning...
1007 15:53:43.483044 scan_generic_bus for PCI: 00:15.1
1008 15:53:43.486360 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 15:53:43.489619 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 15:53:43.492905 scan_generic_bus for PCI: 00:15.1 done
1011 15:53:43.499433 scan_bus: scanning of bus PCI: 00:15.1 took 18591 usecs
1012 15:53:43.502920 PCI: 00:19.0 scanning...
1013 15:53:43.506252 scan_generic_bus for PCI: 00:19.0
1014 15:53:43.509562 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 15:53:43.512954 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 15:53:43.516193 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 15:53:43.523086 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 15:53:43.526020 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 15:53:43.529440 scan_generic_bus for PCI: 00:19.0 done
1020 15:53:43.535911 scan_bus: scanning of bus PCI: 00:19.0 took 30730 usecs
1021 15:53:43.536002 PCI: 00:1d.0 scanning...
1022 15:53:43.542891 do_pci_scan_bridge for PCI: 00:1d.0
1023 15:53:43.542993 PCI: pci_scan_bus for bus 01
1024 15:53:43.546636 PCI: 01:00.0 [1c5c/1327] enabled
1025 15:53:43.553358 Enabling Common Clock Configuration
1026 15:53:43.556659 L1 Sub-State supported from root port 29
1027 15:53:43.559905 L1 Sub-State Support = 0xf
1028 15:53:43.563433 CommonModeRestoreTime = 0x28
1029 15:53:43.566404 Power On Value = 0x16, Power On Scale = 0x0
1030 15:53:43.566508 ASPM: Enabled L1
1031 15:53:43.573219 scan_bus: scanning of bus PCI: 00:1d.0 took 32779 usecs
1032 15:53:43.576541 PCI: 00:1e.2 scanning...
1033 15:53:43.579526 scan_generic_bus for PCI: 00:1e.2
1034 15:53:43.582924 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 15:53:43.586427 scan_generic_bus for PCI: 00:1e.2 done
1036 15:53:43.592815 scan_bus: scanning of bus PCI: 00:1e.2 took 13990 usecs
1037 15:53:43.596189 PCI: 00:1e.3 scanning...
1038 15:53:43.599515 scan_generic_bus for PCI: 00:1e.3
1039 15:53:43.603174 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 15:53:43.606530 scan_generic_bus for PCI: 00:1e.3 done
1041 15:53:43.613231 scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs
1042 15:53:43.616432 PCI: 00:1f.0 scanning...
1043 15:53:43.619742 scan_static_bus for PCI: 00:1f.0
1044 15:53:43.619835 PNP: 0c09.0 enabled
1045 15:53:43.622978 scan_static_bus for PCI: 00:1f.0 done
1046 15:53:43.630005 scan_bus: scanning of bus PCI: 00:1f.0 took 12042 usecs
1047 15:53:43.632987 PCI: 00:1f.3 scanning...
1048 15:53:43.636599 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1049 15:53:43.640004 PCI: 00:1f.4 scanning...
1050 15:53:43.643344 scan_generic_bus for PCI: 00:1f.4
1051 15:53:43.649718 scan_generic_bus for PCI: 00:1f.4 done
1052 15:53:43.653184 scan_bus: scanning of bus PCI: 00:1f.4 took 10192 usecs
1053 15:53:43.656508 PCI: 00:1f.5 scanning...
1054 15:53:43.659329 scan_generic_bus for PCI: 00:1f.5
1055 15:53:43.663106 scan_generic_bus for PCI: 00:1f.5 done
1056 15:53:43.669342 scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs
1057 15:53:43.675926 scan_bus: scanning of bus DOMAIN: 0000 took 604821 usecs
1058 15:53:43.679445 scan_static_bus for Root Device done
1059 15:53:43.685920 scan_bus: scanning of bus Root Device took 624687 usecs
1060 15:53:43.686016 done
1061 15:53:43.689582 Chrome EC: UHEPI supported
1062 15:53:43.696247 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 15:53:43.699405 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 15:53:43.705956 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 15:53:43.712601 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 15:53:43.715901 SPI flash protection: WPSW=0 SRP0=0
1067 15:53:43.722511 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 15:53:43.725796 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 15:53:43.729070 found VGA at PCI: 00:02.0
1070 15:53:43.732366 Setting up VGA for PCI: 00:02.0
1071 15:53:43.739429 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 15:53:43.742523 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 15:53:43.745834 Allocating resources...
1074 15:53:43.749068 Reading resources...
1075 15:53:43.752193 Root Device read_resources bus 0 link: 0
1076 15:53:43.755576 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 15:53:43.762349 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 15:53:43.765649 DOMAIN: 0000 read_resources bus 0 link: 0
1079 15:53:43.773061 PCI: 00:14.0 read_resources bus 0 link: 0
1080 15:53:43.776034 USB0 port 0 read_resources bus 0 link: 0
1081 15:53:43.784354 USB0 port 0 read_resources bus 0 link: 0 done
1082 15:53:43.787669 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 15:53:43.795002 PCI: 00:15.0 read_resources bus 1 link: 0
1084 15:53:43.798563 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 15:53:43.805305 PCI: 00:15.1 read_resources bus 2 link: 0
1086 15:53:43.808505 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 15:53:43.815999 PCI: 00:19.0 read_resources bus 3 link: 0
1088 15:53:43.822466 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 15:53:43.825869 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 15:53:43.832341 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 15:53:43.835610 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 15:53:43.842290 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 15:53:43.846113 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 15:53:43.852708 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 15:53:43.855884 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 15:53:43.862420 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 15:53:43.865702 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 15:53:43.872616 Root Device read_resources bus 0 link: 0 done
1099 15:53:43.875907 Done reading resources.
1100 15:53:43.879127 Show resources in subtree (Root Device)...After reading.
1101 15:53:43.886146 Root Device child on link 0 CPU_CLUSTER: 0
1102 15:53:43.889235 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 15:53:43.889349 APIC: 00
1104 15:53:43.892452 APIC: 02
1105 15:53:43.892540 APIC: 05
1106 15:53:43.892625 APIC: 06
1107 15:53:43.895920 APIC: 01
1108 15:53:43.896052 APIC: 03
1109 15:53:43.899382 APIC: 07
1110 15:53:43.899503 APIC: 04
1111 15:53:43.902812 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 15:53:43.913013 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 15:53:43.969118 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 15:53:43.969290 PCI: 00:00.0
1115 15:53:43.969891 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 15:53:43.970043 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 15:53:43.970971 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 15:53:43.971263 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 15:53:44.019018 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 15:53:44.019333 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 15:53:44.019457 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 15:53:44.019544 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 15:53:44.020266 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 15:53:44.020394 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 15:53:44.035311 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 15:53:44.038965 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 15:53:44.045555 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 15:53:44.055413 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 15:53:44.065354 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 15:53:44.075342 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 15:53:44.075437 PCI: 00:02.0
1132 15:53:44.085297 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 15:53:44.095310 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 15:53:44.105380 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 15:53:44.105479 PCI: 00:04.0
1136 15:53:44.108974 PCI: 00:08.0
1137 15:53:44.118912 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 15:53:44.119039 PCI: 00:12.0
1139 15:53:44.128329 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 15:53:44.134956 PCI: 00:14.0 child on link 0 USB0 port 0
1141 15:53:44.145232 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 15:53:44.148635 USB0 port 0 child on link 0 USB2 port 0
1143 15:53:44.148754 USB2 port 0
1144 15:53:44.151752 USB2 port 1
1145 15:53:44.151843 USB2 port 2
1146 15:53:44.154971 USB2 port 3
1147 15:53:44.158357 USB2 port 5
1148 15:53:44.158450 USB2 port 6
1149 15:53:44.161515 USB2 port 9
1150 15:53:44.161607 USB3 port 0
1151 15:53:44.164907 USB3 port 1
1152 15:53:44.165000 USB3 port 2
1153 15:53:44.168633 USB3 port 3
1154 15:53:44.168719 USB3 port 4
1155 15:53:44.171483 PCI: 00:14.2
1156 15:53:44.181353 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 15:53:44.191809 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 15:53:44.191908 PCI: 00:14.3
1159 15:53:44.201631 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 15:53:44.204913 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 15:53:44.214659 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 15:53:44.218348 I2C: 01:15
1163 15:53:44.221656 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 15:53:44.231548 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 15:53:44.234796 I2C: 02:5d
1166 15:53:44.234889 GENERIC: 0.0
1167 15:53:44.237957 PCI: 00:16.0
1168 15:53:44.248241 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 15:53:44.248332 PCI: 00:17.0
1170 15:53:44.258062 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 15:53:44.268097 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 15:53:44.274907 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 15:53:44.284679 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 15:53:44.291627 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 15:53:44.301514 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 15:53:44.304748 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 15:53:44.314612 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 15:53:44.317859 I2C: 03:1a
1179 15:53:44.317977 I2C: 03:38
1180 15:53:44.318084 I2C: 03:39
1181 15:53:44.321467 I2C: 03:3a
1182 15:53:44.321582 I2C: 03:3b
1183 15:53:44.327932 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 15:53:44.334887 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 15:53:44.344662 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 15:53:44.354470 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 15:53:44.357938 PCI: 01:00.0
1188 15:53:44.368167 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 15:53:44.368291 PCI: 00:1e.0
1190 15:53:44.378117 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 15:53:44.387887 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 15:53:44.394572 PCI: 00:1e.2 child on link 0 SPI: 00
1193 15:53:44.404514 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 15:53:44.404612 SPI: 00
1195 15:53:44.408143 PCI: 00:1e.3 child on link 0 SPI: 01
1196 15:53:44.418032 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 15:53:44.418162 SPI: 01
1198 15:53:44.424572 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 15:53:44.431041 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 15:53:44.440890 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 15:53:44.444532 PNP: 0c09.0
1202 15:53:44.450970 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 15:53:44.454150 PCI: 00:1f.3
1204 15:53:44.464110 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 15:53:44.474211 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 15:53:44.474337 PCI: 00:1f.4
1207 15:53:44.484000 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 15:53:44.494092 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 15:53:44.494187 PCI: 00:1f.5
1210 15:53:44.504316 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 15:53:44.510817 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 15:53:44.517384 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 15:53:44.524310 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 15:53:44.527573 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 15:53:44.530920 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 15:53:44.534523 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 15:53:44.537586 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 15:53:44.544358 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 15:53:44.551050 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 15:53:44.560715 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 15:53:44.567340 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 15:53:44.574316 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 15:53:44.577616 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 15:53:44.587467 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 15:53:44.590649 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 15:53:44.597400 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 15:53:44.600598 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 15:53:44.607706 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 15:53:44.610546 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 15:53:44.617642 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 15:53:44.621014 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 15:53:44.624145 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 15:53:44.630719 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 15:53:44.633906 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 15:53:44.640577 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 15:53:44.644271 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 15:53:44.650735 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 15:53:44.654244 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 15:53:44.661042 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 15:53:44.663763 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 15:53:44.670673 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 15:53:44.673946 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 15:53:44.677589 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 15:53:44.684121 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 15:53:44.687336 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 15:53:44.693736 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 15:53:44.697019 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 15:53:44.706986 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 15:53:44.710542 avoid_fixed_resources: DOMAIN: 0000
1250 15:53:44.717230 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 15:53:44.724053 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 15:53:44.730670 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 15:53:44.737157 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 15:53:44.747191 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 15:53:44.753488 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 15:53:44.760204 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 15:53:44.766848 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 15:53:44.776933 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 15:53:44.783403 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 15:53:44.790342 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 15:53:44.796935 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 15:53:44.800001 Setting resources...
1263 15:53:44.806738 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 15:53:44.810508 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 15:53:44.813889 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 15:53:44.817098 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 15:53:44.823658 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 15:53:44.830118 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 15:53:44.833508 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 15:53:44.840037 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 15:53:44.850160 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 15:53:44.853358 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 15:53:44.859959 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 15:53:44.863489 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 15:53:44.870032 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 15:53:44.873143 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 15:53:44.880036 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 15:53:44.883133 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 15:53:44.886626 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 15:53:44.893191 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 15:53:44.896512 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 15:53:44.903111 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 15:53:44.906549 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 15:53:44.913004 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 15:53:44.916331 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 15:53:44.922916 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 15:53:44.926706 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 15:53:44.933080 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 15:53:44.936810 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 15:53:44.943205 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 15:53:44.946328 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 15:53:44.953283 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 15:53:44.956532 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 15:53:44.959647 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 15:53:44.969950 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 15:53:44.976283 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 15:53:44.983022 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 15:53:44.989482 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 15:53:44.995912 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 15:53:45.002901 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 15:53:45.006205 Root Device assign_resources, bus 0 link: 0
1302 15:53:45.012628 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 15:53:45.019299 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 15:53:45.029584 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 15:53:45.035941 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 15:53:45.045911 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 15:53:45.052896 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 15:53:45.062976 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 15:53:45.066089 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 15:53:45.069403 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 15:53:45.079355 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 15:53:45.086194 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 15:53:45.095879 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 15:53:45.102707 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 15:53:45.109289 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 15:53:45.112886 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 15:53:45.122871 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 15:53:45.125785 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 15:53:45.128987 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 15:53:45.139461 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 15:53:45.146012 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 15:53:45.155614 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 15:53:45.162448 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 15:53:45.168961 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 15:53:45.178719 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 15:53:45.185566 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 15:53:45.192426 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 15:53:45.198851 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 15:53:45.202045 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 15:53:45.212126 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 15:53:45.221973 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 15:53:45.228432 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 15:53:45.231799 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 15:53:45.242067 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 15:53:45.245357 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 15:53:45.255617 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 15:53:45.262056 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 15:53:45.268535 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 15:53:45.272348 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 15:53:45.282185 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 15:53:45.285265 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 15:53:45.288470 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 15:53:45.295215 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 15:53:45.298669 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 15:53:45.304967 LPC: Trying to open IO window from 800 size 1ff
1346 15:53:45.311682 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 15:53:45.321691 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 15:53:45.328222 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 15:53:45.338525 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 15:53:45.341675 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 15:53:45.348285 Root Device assign_resources, bus 0 link: 0
1352 15:53:45.348374 Done setting resources.
1353 15:53:45.354763 Show resources in subtree (Root Device)...After assigning values.
1354 15:53:45.361511 Root Device child on link 0 CPU_CLUSTER: 0
1355 15:53:45.364745 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 15:53:45.364876 APIC: 00
1357 15:53:45.367994 APIC: 02
1358 15:53:45.368077 APIC: 05
1359 15:53:45.368148 APIC: 06
1360 15:53:45.371638 APIC: 01
1361 15:53:45.371727 APIC: 03
1362 15:53:45.374929 APIC: 07
1363 15:53:45.375017 APIC: 04
1364 15:53:45.378060 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 15:53:45.388049 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 15:53:45.397835 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 15:53:45.401464 PCI: 00:00.0
1368 15:53:45.411143 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 15:53:45.421273 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 15:53:45.430753 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 15:53:45.437737 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 15:53:45.447278 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 15:53:45.457231 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 15:53:45.467384 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 15:53:45.477419 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 15:53:45.486897 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 15:53:45.493998 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 15:53:45.503893 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 15:53:45.513528 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 15:53:45.523578 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 15:53:45.533185 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 15:53:45.543265 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 15:53:45.550312 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 15:53:45.553508 PCI: 00:02.0
1385 15:53:45.562903 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 15:53:45.572877 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 15:53:45.583274 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 15:53:45.586086 PCI: 00:04.0
1389 15:53:45.586186 PCI: 00:08.0
1390 15:53:45.596475 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 15:53:45.599797 PCI: 00:12.0
1392 15:53:45.609677 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 15:53:45.613092 PCI: 00:14.0 child on link 0 USB0 port 0
1394 15:53:45.623089 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 15:53:45.629472 USB0 port 0 child on link 0 USB2 port 0
1396 15:53:45.629581 USB2 port 0
1397 15:53:45.632811 USB2 port 1
1398 15:53:45.632897 USB2 port 2
1399 15:53:45.635832 USB2 port 3
1400 15:53:45.635958 USB2 port 5
1401 15:53:45.639456 USB2 port 6
1402 15:53:45.639548 USB2 port 9
1403 15:53:45.642623 USB3 port 0
1404 15:53:45.642718 USB3 port 1
1405 15:53:45.645944 USB3 port 2
1406 15:53:45.646043 USB3 port 3
1407 15:53:45.649255 USB3 port 4
1408 15:53:45.649361 PCI: 00:14.2
1409 15:53:45.662796 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 15:53:45.672713 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 15:53:45.672807 PCI: 00:14.3
1412 15:53:45.682308 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 15:53:45.689319 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 15:53:45.698872 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 15:53:45.698975 I2C: 01:15
1416 15:53:45.702717 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 15:53:45.715774 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 15:53:45.715868 I2C: 02:5d
1419 15:53:45.718885 GENERIC: 0.0
1420 15:53:45.718981 PCI: 00:16.0
1421 15:53:45.729028 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 15:53:45.732272 PCI: 00:17.0
1423 15:53:45.741987 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 15:53:45.751713 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 15:53:45.761684 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 15:53:45.768593 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 15:53:45.778338 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 15:53:45.788456 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 15:53:45.791740 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 15:53:45.804660 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 15:53:45.804756 I2C: 03:1a
1432 15:53:45.808006 I2C: 03:38
1433 15:53:45.808100 I2C: 03:39
1434 15:53:45.808174 I2C: 03:3a
1435 15:53:45.811741 I2C: 03:3b
1436 15:53:45.814970 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 15:53:45.824978 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 15:53:45.834870 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 15:53:45.844476 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 15:53:45.847627 PCI: 01:00.0
1441 15:53:45.857734 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 15:53:45.857837 PCI: 00:1e.0
1443 15:53:45.871120 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 15:53:45.880872 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 15:53:45.884300 PCI: 00:1e.2 child on link 0 SPI: 00
1446 15:53:45.893919 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 15:53:45.897238 SPI: 00
1448 15:53:45.900615 PCI: 00:1e.3 child on link 0 SPI: 01
1449 15:53:45.910910 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 15:53:45.911000 SPI: 01
1451 15:53:45.917051 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 15:53:45.923753 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 15:53:45.933971 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 15:53:45.934095 PNP: 0c09.0
1455 15:53:45.943959 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 15:53:45.947205 PCI: 00:1f.3
1457 15:53:45.956897 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 15:53:45.966770 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 15:53:45.966907 PCI: 00:1f.4
1460 15:53:45.976934 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 15:53:45.986577 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 15:53:45.990082 PCI: 00:1f.5
1463 15:53:45.999948 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 15:53:46.003197 Done allocating resources.
1465 15:53:46.006509 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 15:53:46.010389 Enabling resources...
1467 15:53:46.013646 PCI: 00:00.0 subsystem <- 8086/9b61
1468 15:53:46.016972 PCI: 00:00.0 cmd <- 06
1469 15:53:46.020216 PCI: 00:02.0 subsystem <- 8086/9b41
1470 15:53:46.023358 PCI: 00:02.0 cmd <- 03
1471 15:53:46.026611 PCI: 00:08.0 cmd <- 06
1472 15:53:46.029944 PCI: 00:12.0 subsystem <- 8086/02f9
1473 15:53:46.033089 PCI: 00:12.0 cmd <- 02
1474 15:53:46.036839 PCI: 00:14.0 subsystem <- 8086/02ed
1475 15:53:46.040050 PCI: 00:14.0 cmd <- 02
1476 15:53:46.040143 PCI: 00:14.2 cmd <- 02
1477 15:53:46.047019 PCI: 00:14.3 subsystem <- 8086/02f0
1478 15:53:46.047129 PCI: 00:14.3 cmd <- 02
1479 15:53:46.050042 PCI: 00:15.0 subsystem <- 8086/02e8
1480 15:53:46.053350 PCI: 00:15.0 cmd <- 02
1481 15:53:46.056520 PCI: 00:15.1 subsystem <- 8086/02e9
1482 15:53:46.059917 PCI: 00:15.1 cmd <- 02
1483 15:53:46.063282 PCI: 00:16.0 subsystem <- 8086/02e0
1484 15:53:46.066701 PCI: 00:16.0 cmd <- 02
1485 15:53:46.069875 PCI: 00:17.0 subsystem <- 8086/02d3
1486 15:53:46.073429 PCI: 00:17.0 cmd <- 03
1487 15:53:46.076773 PCI: 00:19.0 subsystem <- 8086/02c5
1488 15:53:46.080152 PCI: 00:19.0 cmd <- 02
1489 15:53:46.083192 PCI: 00:1d.0 bridge ctrl <- 0013
1490 15:53:46.086704 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 15:53:46.089787 PCI: 00:1d.0 cmd <- 06
1492 15:53:46.093043 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 15:53:46.093141 PCI: 00:1e.0 cmd <- 06
1494 15:53:46.100311 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 15:53:46.100441 PCI: 00:1e.2 cmd <- 06
1496 15:53:46.103394 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 15:53:46.106698 PCI: 00:1e.3 cmd <- 02
1498 15:53:46.110261 PCI: 00:1f.0 subsystem <- 8086/0284
1499 15:53:46.113500 PCI: 00:1f.0 cmd <- 407
1500 15:53:46.116692 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 15:53:46.120033 PCI: 00:1f.3 cmd <- 02
1502 15:53:46.123397 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 15:53:46.126587 PCI: 00:1f.4 cmd <- 03
1504 15:53:46.130039 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 15:53:46.133349 PCI: 00:1f.5 cmd <- 406
1506 15:53:46.141595 PCI: 01:00.0 cmd <- 02
1507 15:53:46.146750 done.
1508 15:53:46.158324 ME: Version: 14.0.39.1367
1509 15:53:46.165122 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1510 15:53:46.168301 Initializing devices...
1511 15:53:46.168394 Root Device init ...
1512 15:53:46.174969 Chrome EC: Set SMI mask to 0x0000000000000000
1513 15:53:46.178564 Chrome EC: clear events_b mask to 0x0000000000000000
1514 15:53:46.184904 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 15:53:46.191576 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 15:53:46.198495 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 15:53:46.201623 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 15:53:46.204738 Root Device init finished in 35272 usecs
1519 15:53:46.208557 CPU_CLUSTER: 0 init ...
1520 15:53:46.214859 CPU_CLUSTER: 0 init finished in 2447 usecs
1521 15:53:46.219201 PCI: 00:00.0 init ...
1522 15:53:46.222917 CPU TDP: 15 Watts
1523 15:53:46.226282 CPU PL2 = 64 Watts
1524 15:53:46.229497 PCI: 00:00.0 init finished in 7082 usecs
1525 15:53:46.232294 PCI: 00:02.0 init ...
1526 15:53:46.236177 PCI: 00:02.0 init finished in 2253 usecs
1527 15:53:46.239451 PCI: 00:08.0 init ...
1528 15:53:46.242747 PCI: 00:08.0 init finished in 2254 usecs
1529 15:53:46.245974 PCI: 00:12.0 init ...
1530 15:53:46.249134 PCI: 00:12.0 init finished in 2253 usecs
1531 15:53:46.252309 PCI: 00:14.0 init ...
1532 15:53:46.255913 PCI: 00:14.0 init finished in 2253 usecs
1533 15:53:46.259043 PCI: 00:14.2 init ...
1534 15:53:46.262701 PCI: 00:14.2 init finished in 2252 usecs
1535 15:53:46.266040 PCI: 00:14.3 init ...
1536 15:53:46.269101 PCI: 00:14.3 init finished in 2272 usecs
1537 15:53:46.272457 PCI: 00:15.0 init ...
1538 15:53:46.275841 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 15:53:46.279297 PCI: 00:15.0 init finished in 5975 usecs
1540 15:53:46.282575 PCI: 00:15.1 init ...
1541 15:53:46.285872 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 15:53:46.289246 PCI: 00:15.1 init finished in 5978 usecs
1543 15:53:46.292546 PCI: 00:16.0 init ...
1544 15:53:46.296102 PCI: 00:16.0 init finished in 2252 usecs
1545 15:53:46.299842 PCI: 00:19.0 init ...
1546 15:53:46.302968 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 15:53:46.309984 PCI: 00:19.0 init finished in 5977 usecs
1548 15:53:46.310087 PCI: 00:1d.0 init ...
1549 15:53:46.312997 Initializing PCH PCIe bridge.
1550 15:53:46.316463 PCI: 00:1d.0 init finished in 5288 usecs
1551 15:53:46.321452 PCI: 00:1f.0 init ...
1552 15:53:46.324371 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 15:53:46.330885 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 15:53:46.330982 IOAPIC: ID = 0x02
1555 15:53:46.334701 IOAPIC: Dumping registers
1556 15:53:46.337983 reg 0x0000: 0x02000000
1557 15:53:46.340912 reg 0x0001: 0x00770020
1558 15:53:46.341001 reg 0x0002: 0x00000000
1559 15:53:46.347887 PCI: 00:1f.0 init finished in 23542 usecs
1560 15:53:46.351642 PCI: 00:1f.4 init ...
1561 15:53:46.354796 PCI: 00:1f.4 init finished in 2262 usecs
1562 15:53:46.365379 PCI: 01:00.0 init ...
1563 15:53:46.368944 PCI: 01:00.0 init finished in 2254 usecs
1564 15:53:46.373338 PNP: 0c09.0 init ...
1565 15:53:46.376544 Google Chrome EC uptime: 11.043 seconds
1566 15:53:46.382985 Google Chrome AP resets since EC boot: 0
1567 15:53:46.386351 Google Chrome most recent AP reset causes:
1568 15:53:46.392814 Google Chrome EC reset flags at last EC boot: reset-pin
1569 15:53:46.396465 PNP: 0c09.0 init finished in 20574 usecs
1570 15:53:46.399601 Devices initialized
1571 15:53:46.399695 Show all devs... After init.
1572 15:53:46.402761 Root Device: enabled 1
1573 15:53:46.406245 CPU_CLUSTER: 0: enabled 1
1574 15:53:46.409497 DOMAIN: 0000: enabled 1
1575 15:53:46.409611 APIC: 00: enabled 1
1576 15:53:46.412713 PCI: 00:00.0: enabled 1
1577 15:53:46.415873 PCI: 00:02.0: enabled 1
1578 15:53:46.419403 PCI: 00:04.0: enabled 0
1579 15:53:46.419507 PCI: 00:05.0: enabled 0
1580 15:53:46.422735 PCI: 00:12.0: enabled 1
1581 15:53:46.426053 PCI: 00:12.5: enabled 0
1582 15:53:46.426181 PCI: 00:12.6: enabled 0
1583 15:53:46.429217 PCI: 00:14.0: enabled 1
1584 15:53:46.432826 PCI: 00:14.1: enabled 0
1585 15:53:46.435792 PCI: 00:14.3: enabled 1
1586 15:53:46.435878 PCI: 00:14.5: enabled 0
1587 15:53:46.439607 PCI: 00:15.0: enabled 1
1588 15:53:46.442781 PCI: 00:15.1: enabled 1
1589 15:53:46.446114 PCI: 00:15.2: enabled 0
1590 15:53:46.446207 PCI: 00:15.3: enabled 0
1591 15:53:46.449470 PCI: 00:16.0: enabled 1
1592 15:53:46.452814 PCI: 00:16.1: enabled 0
1593 15:53:46.456000 PCI: 00:16.2: enabled 0
1594 15:53:46.456093 PCI: 00:16.3: enabled 0
1595 15:53:46.459186 PCI: 00:16.4: enabled 0
1596 15:53:46.462514 PCI: 00:16.5: enabled 0
1597 15:53:46.465959 PCI: 00:17.0: enabled 1
1598 15:53:46.466052 PCI: 00:19.0: enabled 1
1599 15:53:46.469138 PCI: 00:19.1: enabled 0
1600 15:53:46.472270 PCI: 00:19.2: enabled 0
1601 15:53:46.472366 PCI: 00:1a.0: enabled 0
1602 15:53:46.475776 PCI: 00:1c.0: enabled 0
1603 15:53:46.479167 PCI: 00:1c.1: enabled 0
1604 15:53:46.482432 PCI: 00:1c.2: enabled 0
1605 15:53:46.482524 PCI: 00:1c.3: enabled 0
1606 15:53:46.485763 PCI: 00:1c.4: enabled 0
1607 15:53:46.489061 PCI: 00:1c.5: enabled 0
1608 15:53:46.492302 PCI: 00:1c.6: enabled 0
1609 15:53:46.492395 PCI: 00:1c.7: enabled 0
1610 15:53:46.495568 PCI: 00:1d.0: enabled 1
1611 15:53:46.498637 PCI: 00:1d.1: enabled 0
1612 15:53:46.502016 PCI: 00:1d.2: enabled 0
1613 15:53:46.502127 PCI: 00:1d.3: enabled 0
1614 15:53:46.505706 PCI: 00:1d.4: enabled 0
1615 15:53:46.508859 PCI: 00:1d.5: enabled 0
1616 15:53:46.508968 PCI: 00:1e.0: enabled 1
1617 15:53:46.512210 PCI: 00:1e.1: enabled 0
1618 15:53:46.515146 PCI: 00:1e.2: enabled 1
1619 15:53:46.518716 PCI: 00:1e.3: enabled 1
1620 15:53:46.518850 PCI: 00:1f.0: enabled 1
1621 15:53:46.521724 PCI: 00:1f.1: enabled 0
1622 15:53:46.525223 PCI: 00:1f.2: enabled 0
1623 15:53:46.528536 PCI: 00:1f.3: enabled 1
1624 15:53:46.528655 PCI: 00:1f.4: enabled 1
1625 15:53:46.531858 PCI: 00:1f.5: enabled 1
1626 15:53:46.535067 PCI: 00:1f.6: enabled 0
1627 15:53:46.538310 USB0 port 0: enabled 1
1628 15:53:46.538416 I2C: 01:15: enabled 1
1629 15:53:46.541617 I2C: 02:5d: enabled 1
1630 15:53:46.545267 GENERIC: 0.0: enabled 1
1631 15:53:46.545396 I2C: 03:1a: enabled 1
1632 15:53:46.548164 I2C: 03:38: enabled 1
1633 15:53:46.551965 I2C: 03:39: enabled 1
1634 15:53:46.552067 I2C: 03:3a: enabled 1
1635 15:53:46.555248 I2C: 03:3b: enabled 1
1636 15:53:46.558525 PCI: 00:00.0: enabled 1
1637 15:53:46.558636 SPI: 00: enabled 1
1638 15:53:46.561872 SPI: 01: enabled 1
1639 15:53:46.565098 PNP: 0c09.0: enabled 1
1640 15:53:46.565210 USB2 port 0: enabled 1
1641 15:53:46.568392 USB2 port 1: enabled 1
1642 15:53:46.571668 USB2 port 2: enabled 0
1643 15:53:46.571752 USB2 port 3: enabled 0
1644 15:53:46.575080 USB2 port 5: enabled 0
1645 15:53:46.578323 USB2 port 6: enabled 1
1646 15:53:46.581374 USB2 port 9: enabled 1
1647 15:53:46.581491 USB3 port 0: enabled 1
1648 15:53:46.584915 USB3 port 1: enabled 1
1649 15:53:46.588164 USB3 port 2: enabled 1
1650 15:53:46.588262 USB3 port 3: enabled 1
1651 15:53:46.591295 USB3 port 4: enabled 0
1652 15:53:46.594506 APIC: 02: enabled 1
1653 15:53:46.594599 APIC: 05: enabled 1
1654 15:53:46.597907 APIC: 06: enabled 1
1655 15:53:46.601184 APIC: 01: enabled 1
1656 15:53:46.601314 APIC: 03: enabled 1
1657 15:53:46.604618 APIC: 07: enabled 1
1658 15:53:46.604712 APIC: 04: enabled 1
1659 15:53:46.607879 PCI: 00:08.0: enabled 1
1660 15:53:46.611088 PCI: 00:14.2: enabled 1
1661 15:53:46.614358 PCI: 01:00.0: enabled 1
1662 15:53:46.618337 Disabling ACPI via APMC:
1663 15:53:46.618464 done.
1664 15:53:46.625039 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 15:53:46.627905 ELOG: NV offset 0xaf0000 size 0x4000
1666 15:53:46.634715 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 15:53:46.641287 ELOG: Event(17) added with size 13 at 2023-08-07 15:53:35 UTC
1668 15:53:46.647715 ELOG: Event(92) added with size 9 at 2023-08-07 15:53:35 UTC
1669 15:53:46.654642 ELOG: Event(93) added with size 9 at 2023-08-07 15:53:35 UTC
1670 15:53:46.660974 ELOG: Event(9A) added with size 9 at 2023-08-07 15:53:35 UTC
1671 15:53:46.667668 ELOG: Event(9E) added with size 10 at 2023-08-07 15:53:35 UTC
1672 15:53:46.674364 ELOG: Event(9F) added with size 14 at 2023-08-07 15:53:36 UTC
1673 15:53:46.680983 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 7
1674 15:53:46.687346 ELOG: Event(A1) added with size 10 at 2023-08-07 15:53:36 UTC
1675 15:53:46.694322 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 15:53:46.700867 ELOG: Event(A0) added with size 9 at 2023-08-07 15:53:36 UTC
1677 15:53:46.707270 elog_add_boot_reason: Logged dev mode boot
1678 15:53:46.707365 Finalize devices...
1679 15:53:46.710956 PCI: 00:17.0 final
1680 15:53:46.711072 Devices finalized
1681 15:53:46.717127 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 15:53:46.720958 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 15:53:46.726999 ME: HFSTS1 : 0x90000245
1684 15:53:46.730603 ME: HFSTS2 : 0x3B850126
1685 15:53:46.733812 ME: HFSTS3 : 0x00000020
1686 15:53:46.737156 ME: HFSTS4 : 0x00004800
1687 15:53:46.744300 ME: HFSTS5 : 0x00000000
1688 15:53:46.747011 ME: HFSTS6 : 0x40400006
1689 15:53:46.750568 ME: Manufacturing Mode : NO
1690 15:53:46.753958 ME: FW Partition Table : OK
1691 15:53:46.757077 ME: Bringup Loader Failure : NO
1692 15:53:46.760208 ME: Firmware Init Complete : YES
1693 15:53:46.763485 ME: Boot Options Present : NO
1694 15:53:46.766750 ME: Update In Progress : NO
1695 15:53:46.770497 ME: D0i3 Support : YES
1696 15:53:46.773729 ME: Low Power State Enabled : NO
1697 15:53:46.777173 ME: CPU Replaced : NO
1698 15:53:46.780454 ME: CPU Replacement Valid : YES
1699 15:53:46.783694 ME: Current Working State : 5
1700 15:53:46.787026 ME: Current Operation State : 1
1701 15:53:46.790150 ME: Current Operation Mode : 0
1702 15:53:46.793419 ME: Error Code : 0
1703 15:53:46.796620 ME: CPU Debug Disabled : YES
1704 15:53:46.800273 ME: TXT Support : NO
1705 15:53:46.806756 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 15:53:46.810019 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 15:53:46.813307 CBFS @ c08000 size 3f8000
1708 15:53:46.820082 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 15:53:46.823147 CBFS: Locating 'fallback/dsdt.aml'
1710 15:53:46.826487 CBFS: Found @ offset 10bb80 size 3fa5
1711 15:53:46.829847 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 15:53:46.833112 CBFS @ c08000 size 3f8000
1713 15:53:46.839811 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 15:53:46.842922 CBFS: Locating 'fallback/slic'
1715 15:53:46.846777 CBFS: 'fallback/slic' not found.
1716 15:53:46.853282 ACPI: Writing ACPI tables at 99b3e000.
1717 15:53:46.853374 ACPI: * FACS
1718 15:53:46.856860 ACPI: * DSDT
1719 15:53:46.860141 Ramoops buffer: 0x100000@0x99a3d000.
1720 15:53:46.863457 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 15:53:46.869843 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 15:53:46.873250 Google Chrome EC: version:
1723 15:53:46.876585 ro: helios_v2.0.2659-56403530b
1724 15:53:46.879862 rw: helios_v2.0.2849-c41de27e7d
1725 15:53:46.879946 running image: 1
1726 15:53:46.883935 ACPI: * FADT
1727 15:53:46.884047 SCI is IRQ9
1728 15:53:46.890964 ACPI: added table 1/32, length now 40
1729 15:53:46.891077 ACPI: * SSDT
1730 15:53:46.893910 Found 1 CPU(s) with 8 core(s) each.
1731 15:53:46.897589 Error: Could not locate 'wifi_sar' in VPD.
1732 15:53:46.903956 Checking CBFS for default SAR values
1733 15:53:46.907390 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 15:53:46.910728 CBFS @ c08000 size 3f8000
1735 15:53:46.917058 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 15:53:46.920859 CBFS: Locating 'wifi_sar_defaults.hex'
1737 15:53:46.924007 CBFS: Found @ offset 5fac0 size 77
1738 15:53:46.927419 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 15:53:46.933920 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 15:53:46.937099 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 15:53:46.943940 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 15:53:46.946969 failed to find key in VPD: dsm_calib_r0_0
1743 15:53:46.957324 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 15:53:46.960468 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 15:53:46.963779 failed to find key in VPD: dsm_calib_r0_1
1746 15:53:46.973434 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 15:53:46.980399 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 15:53:46.983545 failed to find key in VPD: dsm_calib_r0_2
1749 15:53:46.993585 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 15:53:46.996709 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 15:53:47.003548 failed to find key in VPD: dsm_calib_r0_3
1752 15:53:47.009779 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 15:53:47.016359 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 15:53:47.020029 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 15:53:47.023117 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 15:53:47.026993 EC returned error result code 1
1757 15:53:47.030773 EC returned error result code 1
1758 15:53:47.034609 EC returned error result code 1
1759 15:53:47.041572 PS2K: Bad resp from EC. Vivaldi disabled!
1760 15:53:47.044810 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 15:53:47.051404 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 15:53:47.058041 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 15:53:47.060970 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 15:53:47.067747 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 15:53:47.074467 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 15:53:47.077684 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 15:53:47.084586 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 15:53:47.087585 ACPI: added table 2/32, length now 44
1769 15:53:47.091125 ACPI: * MCFG
1770 15:53:47.094489 ACPI: added table 3/32, length now 48
1771 15:53:47.097670 ACPI: * TPM2
1772 15:53:47.097763 TPM2 log created at 99a2d000
1773 15:53:47.104304 ACPI: added table 4/32, length now 52
1774 15:53:47.104394 ACPI: * MADT
1775 15:53:47.107721 SCI is IRQ9
1776 15:53:47.111078 ACPI: added table 5/32, length now 56
1777 15:53:47.111202 current = 99b43ac0
1778 15:53:47.114296 ACPI: * DMAR
1779 15:53:47.117338 ACPI: added table 6/32, length now 60
1780 15:53:47.120484 ACPI: * IGD OpRegion
1781 15:53:47.120572 GMA: Found VBT in CBFS
1782 15:53:47.124322 GMA: Found valid VBT in CBFS
1783 15:53:47.127404 ACPI: added table 7/32, length now 64
1784 15:53:47.130543 ACPI: * HPET
1785 15:53:47.134168 ACPI: added table 8/32, length now 68
1786 15:53:47.134249 ACPI: done.
1787 15:53:47.137300 ACPI tables: 31744 bytes.
1788 15:53:47.140938 smbios_write_tables: 99a2c000
1789 15:53:47.144192 EC returned error result code 3
1790 15:53:47.147523 Couldn't obtain OEM name from CBI
1791 15:53:47.151183 Create SMBIOS type 17
1792 15:53:47.154433 PCI: 00:00.0 (Intel Cannonlake)
1793 15:53:47.157702 PCI: 00:14.3 (Intel WiFi)
1794 15:53:47.160993 SMBIOS tables: 939 bytes.
1795 15:53:47.164098 Writing table forward entry at 0x00000500
1796 15:53:47.170971 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 15:53:47.174492 Writing coreboot table at 0x99b62000
1798 15:53:47.180663 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 15:53:47.183994 1. 0000000000001000-000000000009ffff: RAM
1800 15:53:47.187362 2. 00000000000a0000-00000000000fffff: RESERVED
1801 15:53:47.194133 3. 0000000000100000-0000000099a2bfff: RAM
1802 15:53:47.197169 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 15:53:47.203764 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 15:53:47.210327 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 15:53:47.213682 7. 000000009a000000-000000009f7fffff: RESERVED
1806 15:53:47.216979 8. 00000000e0000000-00000000efffffff: RESERVED
1807 15:53:47.224115 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 15:53:47.227159 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 15:53:47.233724 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 15:53:47.236984 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 15:53:47.243679 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 15:53:47.246801 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 15:53:47.250122 15. 0000000100000000-000000045e7fffff: RAM
1814 15:53:47.256896 Graphics framebuffer located at 0xc0000000
1815 15:53:47.260020 Passing 5 GPIOs to payload:
1816 15:53:47.263257 NAME | PORT | POLARITY | VALUE
1817 15:53:47.269863 write protect | undefined | high | low
1818 15:53:47.273645 lid | undefined | high | high
1819 15:53:47.280165 power | undefined | high | low
1820 15:53:47.283190 oprom | undefined | high | low
1821 15:53:47.290165 EC in RW | 0x000000cb | high | low
1822 15:53:47.290261 Board ID: 4
1823 15:53:47.296748 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 15:53:47.299877 CBFS @ c08000 size 3f8000
1825 15:53:47.306620 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 15:53:47.309964 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 15:53:47.313392 coreboot table: 1492 bytes.
1828 15:53:47.316623 IMD ROOT 0. 99fff000 00001000
1829 15:53:47.320046 IMD SMALL 1. 99ffe000 00001000
1830 15:53:47.323130 FSP MEMORY 2. 99c4e000 003b0000
1831 15:53:47.326290 CONSOLE 3. 99c2e000 00020000
1832 15:53:47.330086 FMAP 4. 99c2d000 0000054e
1833 15:53:47.333378 TIME STAMP 5. 99c2c000 00000910
1834 15:53:47.336854 VBOOT WORK 6. 99c18000 00014000
1835 15:53:47.340000 MRC DATA 7. 99c16000 00001958
1836 15:53:47.343168 ROMSTG STCK 8. 99c15000 00001000
1837 15:53:47.346459 AFTER CAR 9. 99c0b000 0000a000
1838 15:53:47.350002 RAMSTAGE 10. 99baf000 0005c000
1839 15:53:47.353330 REFCODE 11. 99b7a000 00035000
1840 15:53:47.356611 SMM BACKUP 12. 99b6a000 00010000
1841 15:53:47.359846 COREBOOT 13. 99b62000 00008000
1842 15:53:47.363363 ACPI 14. 99b3e000 00024000
1843 15:53:47.366250 ACPI GNVS 15. 99b3d000 00001000
1844 15:53:47.369609 RAMOOPS 16. 99a3d000 00100000
1845 15:53:47.372973 TPM2 TCGLOG17. 99a2d000 00010000
1846 15:53:47.376552 SMBIOS 18. 99a2c000 00000800
1847 15:53:47.379656 IMD small region:
1848 15:53:47.382979 IMD ROOT 0. 99ffec00 00000400
1849 15:53:47.386443 FSP RUNTIME 1. 99ffebe0 00000004
1850 15:53:47.389620 EC HOSTEVENT 2. 99ffebc0 00000008
1851 15:53:47.392899 POWER STATE 3. 99ffeb80 00000040
1852 15:53:47.396424 ROMSTAGE 4. 99ffeb60 00000004
1853 15:53:47.399711 MEM INFO 5. 99ffe9a0 000001b9
1854 15:53:47.403008 VPD 6. 99ffe920 0000006c
1855 15:53:47.406280 MTRR: Physical address space:
1856 15:53:47.413072 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 15:53:47.419677 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 15:53:47.426455 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 15:53:47.432688 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 15:53:47.439450 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 15:53:47.442845 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 15:53:47.449372 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 15:53:47.455890 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 15:53:47.459015 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 15:53:47.462416 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 15:53:47.465780 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 15:53:47.472601 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 15:53:47.475711 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 15:53:47.479093 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 15:53:47.482343 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 15:53:47.485499 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 15:53:47.492051 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 15:53:47.495682 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 15:53:47.498795 call enable_fixed_mtrr()
1875 15:53:47.502008 CPU physical address size: 39 bits
1876 15:53:47.505586 MTRR: default type WB/UC MTRR counts: 6/8.
1877 15:53:47.509050 MTRR: WB selected as default type.
1878 15:53:47.515470 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 15:53:47.522095 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 15:53:47.528745 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 15:53:47.535230 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 15:53:47.541540 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 15:53:47.548105 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 15:53:47.551824 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 15:53:47.555044 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 15:53:47.561525 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 15:53:47.564769 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 15:53:47.567998 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 15:53:47.571346 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 15:53:47.578308 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 15:53:47.581622 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 15:53:47.584877 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 15:53:47.588169 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 15:53:47.594384 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 15:53:47.594482
1896 15:53:47.594555 MTRR check
1897 15:53:47.597745 Fixed MTRRs : Enabled
1898 15:53:47.601063 Variable MTRRs: Enabled
1899 15:53:47.601153
1900 15:53:47.601223 call enable_fixed_mtrr()
1901 15:53:47.607489 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1902 15:53:47.611095 CPU physical address size: 39 bits
1903 15:53:47.617679 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1904 15:53:47.621168 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 15:53:47.624364 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 15:53:47.627511 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 15:53:47.633993 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 15:53:47.637308 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 15:53:47.640865 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 15:53:47.643982 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 15:53:47.650793 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 15:53:47.654019 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 15:53:47.657303 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 15:53:47.660660 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 15:53:47.667629 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 15:53:47.667732 call enable_fixed_mtrr()
1917 15:53:47.673965 MTRR: Fixed MSR 0x258 0x0606060606060606
1918 15:53:47.677601 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 15:53:47.680715 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 15:53:47.684082 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 15:53:47.690702 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 15:53:47.694000 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 15:53:47.697201 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 15:53:47.700498 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 15:53:47.703755 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 15:53:47.710551 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 15:53:47.713696 CPU physical address size: 39 bits
1928 15:53:47.717476 call enable_fixed_mtrr()
1929 15:53:47.720429 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 15:53:47.723882 MTRR: Fixed MSR 0x250 0x0606060606060606
1931 15:53:47.726899 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 15:53:47.733616 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 15:53:47.736946 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 15:53:47.740360 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 15:53:47.743244 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 15:53:47.749959 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 15:53:47.753532 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 15:53:47.756524 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 15:53:47.760341 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 15:53:47.766476 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 15:53:47.769930 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 15:53:47.773079 call enable_fixed_mtrr()
1943 15:53:47.776760 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 15:53:47.779927 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 15:53:47.782978 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 15:53:47.789462 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 15:53:47.792917 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 15:53:47.796392 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 15:53:47.799570 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 15:53:47.806154 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 15:53:47.809655 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 15:53:47.812806 CPU physical address size: 39 bits
1953 15:53:47.816616 call enable_fixed_mtrr()
1954 15:53:47.819400 CPU physical address size: 39 bits
1955 15:53:47.823137 CPU physical address size: 39 bits
1956 15:53:47.825953 CBFS @ c08000 size 3f8000
1957 15:53:47.829809 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1958 15:53:47.832730 CBFS: Locating 'fallback/payload'
1959 15:53:47.839204 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 15:53:47.842947 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 15:53:47.846128 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 15:53:47.849496 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 15:53:47.856183 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 15:53:47.859377 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 15:53:47.862447 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 15:53:47.866006 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 15:53:47.872550 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 15:53:47.875609 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 15:53:47.878945 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 15:53:47.882625 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 15:53:47.885651 call enable_fixed_mtrr()
1972 15:53:47.888953 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 15:53:47.895590 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 15:53:47.898952 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 15:53:47.902122 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 15:53:47.905354 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 15:53:47.911947 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 15:53:47.915701 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 15:53:47.918820 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 15:53:47.922144 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 15:53:47.928924 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 15:53:47.932056 CPU physical address size: 39 bits
1983 15:53:47.935213 call enable_fixed_mtrr()
1984 15:53:47.938822 CBFS: Found @ offset 1c96c0 size 3f798
1985 15:53:47.942162 CPU physical address size: 39 bits
1986 15:53:47.945411 Checking segment from ROM address 0xffdd16f8
1987 15:53:47.951849 Checking segment from ROM address 0xffdd1714
1988 15:53:47.955143 Loading segment from ROM address 0xffdd16f8
1989 15:53:47.958438 code (compression=0)
1990 15:53:47.965354 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 15:53:47.975106 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 15:53:47.975203 it's not compressed!
1993 15:53:48.068376 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 15:53:48.075110 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 15:53:48.078295 Loading segment from ROM address 0xffdd1714
1996 15:53:48.081412 Entry Point 0x30000000
1997 15:53:48.084784 Loaded segments
1998 15:53:48.090263 Finalizing chipset.
1999 15:53:48.093528 Finalizing SMM.
2000 15:53:48.096807 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 15:53:48.100264 mp_park_aps done after 0 msecs.
2002 15:53:48.106791 Jumping to boot code at 30000000(99b62000)
2003 15:53:48.113676 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 15:53:48.113802
2005 15:53:48.113906
2006 15:53:48.114015
2007 15:53:48.116783 Starting depthcharge on Helios...
2008 15:53:48.116880
2009 15:53:48.117235 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 15:53:48.117355 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 15:53:48.117446 Setting prompt string to ['hatch:']
2012 15:53:48.117537 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 15:53:48.126862 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 15:53:48.126988
2015 15:53:48.133130 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 15:53:48.133258
2017 15:53:48.139925 board_setup: Info: eMMC controller not present; skipping
2018 15:53:48.140020
2019 15:53:48.143208 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 15:53:48.143302
2021 15:53:48.149645 board_setup: Info: SDHCI controller not present; skipping
2022 15:53:48.149756
2023 15:53:48.156325 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 15:53:48.156424
2025 15:53:48.156496 Wipe memory regions:
2026 15:53:48.156567
2027 15:53:48.159600 [0x00000000001000, 0x000000000a0000)
2028 15:53:48.159705
2029 15:53:48.162891 [0x00000000100000, 0x00000030000000)
2030 15:53:48.229709
2031 15:53:48.232544 [0x00000030657430, 0x00000099a2c000)
2032 15:53:48.379285
2033 15:53:48.382525 [0x00000100000000, 0x0000045e800000)
2034 15:53:49.840511
2035 15:53:49.841102 R8152: Initializing
2036 15:53:49.841648
2037 15:53:49.843582 Version 9 (ocp_data = 6010)
2038 15:53:49.847839
2039 15:53:49.848391 R8152: Done initializing
2040 15:53:49.848913
2041 15:53:49.850836 Adding net device
2042 15:53:50.333835
2043 15:53:50.334330 R8152: Initializing
2044 15:53:50.334662
2045 15:53:50.337011 Version 6 (ocp_data = 5c30)
2046 15:53:50.337433
2047 15:53:50.340221 R8152: Done initializing
2048 15:53:50.340639
2049 15:53:50.343828 net_add_device: Attemp to include the same device
2050 15:53:50.347185
2051 15:53:50.354298 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 15:53:50.354874
2053 15:53:50.355467
2054 15:53:50.355857
2055 15:53:50.356592 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 15:53:50.457706 hatch: tftpboot 192.168.201.1 11224336/tftp-deploy-2bk2ygko/kernel/bzImage 11224336/tftp-deploy-2bk2ygko/kernel/cmdline 11224336/tftp-deploy-2bk2ygko/ramdisk/ramdisk.cpio.gz
2058 15:53:50.458366 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 15:53:50.458806 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 15:53:50.463401 tftpboot 192.168.201.1 11224336/tftp-deploy-2bk2ygko/kernel/bzImloy-2bk2ygko/kernel/cmdline 11224336/tftp-deploy-2bk2ygko/ramdisk/ramdisk.cpio.gz
2061 15:53:50.463847
2062 15:53:50.464181 Waiting for link
2063 15:53:50.663871
2064 15:53:50.664408 done.
2065 15:53:50.664746
2066 15:53:50.665058 MAC: 00:24:32:50:1a:59
2067 15:53:50.665360
2068 15:53:50.667201 Sending DHCP discover... done.
2069 15:53:50.667674
2070 15:53:50.670584 Waiting for reply... done.
2071 15:53:50.671091
2072 15:53:50.673777 Sending DHCP request... done.
2073 15:53:50.674225
2074 15:53:50.677298 Waiting for reply... done.
2075 15:53:50.677861
2076 15:53:50.680796 My ip is 192.168.201.14
2077 15:53:50.681230
2078 15:53:50.683845 The DHCP server ip is 192.168.201.1
2079 15:53:50.684250
2080 15:53:50.687295 TFTP server IP predefined by user: 192.168.201.1
2081 15:53:50.687758
2082 15:53:50.697143 Bootfile predefined by user: 11224336/tftp-deploy-2bk2ygko/kernel/bzImage
2083 15:53:50.697577
2084 15:53:50.700426 Sending tftp read request... done.
2085 15:53:50.700854
2086 15:53:50.707820 Waiting for the transfer...
2087 15:53:50.708246
2088 15:53:51.372597 00000000 ################################################################
2089 15:53:51.372774
2090 15:53:51.942653 00080000 ################################################################
2091 15:53:51.942804
2092 15:53:52.510005 00100000 ################################################################
2093 15:53:52.510181
2094 15:53:53.065511 00180000 ################################################################
2095 15:53:53.065656
2096 15:53:53.620560 00200000 ################################################################
2097 15:53:53.620710
2098 15:53:54.169474 00280000 ################################################################
2099 15:53:54.169636
2100 15:53:54.722592 00300000 ################################################################
2101 15:53:54.722745
2102 15:53:55.286405 00380000 ################################################################
2103 15:53:55.286566
2104 15:53:55.848580 00400000 ################################################################
2105 15:53:55.848733
2106 15:53:56.433298 00480000 ################################################################
2107 15:53:56.433443
2108 15:53:57.002376 00500000 ################################################################
2109 15:53:57.002540
2110 15:53:57.579313 00580000 ################################################################
2111 15:53:57.579467
2112 15:53:58.136079 00600000 ################################################################
2113 15:53:58.136257
2114 15:53:58.688931 00680000 ################################################################
2115 15:53:58.689094
2116 15:53:59.239083 00700000 ################################################################
2117 15:53:59.239266
2118 15:53:59.256783 00780000 ## done.
2119 15:53:59.256881
2120 15:53:59.260058 The bootfile was 7880592 bytes long.
2121 15:53:59.260154
2122 15:53:59.263311 Sending tftp read request... done.
2123 15:53:59.263406
2124 15:53:59.266894 Waiting for the transfer...
2125 15:53:59.266988
2126 15:53:59.811622 00000000 ################################################################
2127 15:53:59.811814
2128 15:54:00.376225 00080000 ################################################################
2129 15:54:00.376377
2130 15:54:00.939672 00100000 ################################################################
2131 15:54:00.939822
2132 15:54:01.499306 00180000 ################################################################
2133 15:54:01.499460
2134 15:54:02.058588 00200000 ################################################################
2135 15:54:02.058745
2136 15:54:02.629424 00280000 ################################################################
2137 15:54:02.629577
2138 15:54:03.203209 00300000 ################################################################
2139 15:54:03.203363
2140 15:54:03.774663 00380000 ################################################################
2141 15:54:03.774815
2142 15:54:04.343431 00400000 ################################################################
2143 15:54:04.343588
2144 15:54:04.909279 00480000 ################################################################
2145 15:54:04.909440
2146 15:54:05.471126 00500000 ############################################################### done.
2147 15:54:05.471318
2148 15:54:05.474265 Sending tftp read request... done.
2149 15:54:05.474363
2150 15:54:05.477875 Waiting for the transfer...
2151 15:54:05.477970
2152 15:54:05.478043 00000000 # done.
2153 15:54:05.478114
2154 15:54:05.487934 Command line loaded dynamically from TFTP file: 11224336/tftp-deploy-2bk2ygko/kernel/cmdline
2155 15:54:05.488038
2156 15:54:05.517348 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11224336/extract-nfsrootfs-9fzlgass,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2157 15:54:05.517457
2158 15:54:05.521025 ec_init(0): CrosEC protocol v3 supported (256, 256)
2159 15:54:05.526678
2160 15:54:05.530149 Shutting down all USB controllers.
2161 15:54:05.530243
2162 15:54:05.530316 Removing current net device
2163 15:54:05.534228
2164 15:54:05.534350 Finalizing coreboot
2165 15:54:05.534448
2166 15:54:05.540659 Exiting depthcharge with code 4 at timestamp: 24744270
2167 15:54:05.540761
2168 15:54:05.540835
2169 15:54:05.540902 Starting kernel ...
2170 15:54:05.540967
2171 15:54:05.541030
2172 15:54:05.541407 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2173 15:54:05.541514 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2174 15:54:05.541598 Setting prompt string to ['Linux version [0-9]']
2175 15:54:05.541690 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2176 15:54:05.541800 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2178 15:58:30.541771 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2180 15:58:30.542035 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2182 15:58:30.542216 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2185 15:58:30.542520 end: 2 depthcharge-action (duration 00:05:00) [common]
2187 15:58:30.542813 Cleaning after the job
2188 15:58:30.542918 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224336/tftp-deploy-2bk2ygko/ramdisk
2189 15:58:30.543981 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224336/tftp-deploy-2bk2ygko/kernel
2190 15:58:30.545509 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224336/tftp-deploy-2bk2ygko/nfsrootfs
2191 15:58:30.632160 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224336/tftp-deploy-2bk2ygko/modules
2192 15:58:30.632705 start: 5.1 power-off (timeout 00:00:30) [common]
2193 15:58:30.633037 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2194 15:58:30.712010 >> Command sent successfully.
2195 15:58:30.714975 Returned 0 in 0 seconds
2196 15:58:30.815588 end: 5.1 power-off (duration 00:00:00) [common]
2198 15:58:30.816439 start: 5.2 read-feedback (timeout 00:10:00) [common]
2199 15:58:30.817252 Listened to connection for namespace 'common' for up to 1s
2201 15:58:30.818161 Listened to connection for namespace 'common' for up to 1s
2202 15:58:31.817933 Finalising connection for namespace 'common'
2203 15:58:31.818177 Disconnecting from shell: Finalise
2204 15:58:31.818301
2205 15:58:31.918730 end: 5.2 read-feedback (duration 00:00:01) [common]
2206 15:58:31.919002 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224336
2207 15:58:32.302818 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224336
2208 15:58:32.303003 JobError: Your job cannot terminate cleanly.