Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 15:52:36.279477 lava-dispatcher, installed at version: 2023.05.1
2 15:52:36.279703 start: 0 validate
3 15:52:36.279834 Start time: 2023-08-07 15:52:36.279827+00:00 (UTC)
4 15:52:36.279965 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:52:36.280094 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 15:52:36.564887 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:52:36.565638 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:52:36.830745 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:52:36.831575 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:52:39.709988 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:52:39.710756 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:52:39.993891 validate duration: 3.71
14 15:52:39.995080 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:52:39.995577 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:52:39.996086 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:52:39.996668 Not decompressing ramdisk as can be used compressed.
18 15:52:39.997139 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 15:52:39.997541 saving as /var/lib/lava/dispatcher/tmp/11224309/tftp-deploy-1ztgtkk_/ramdisk/initrd.cpio.gz
20 15:52:39.997863 total size: 5432690 (5MB)
21 15:52:40.517561 progress 0% (0MB)
22 15:52:40.519417 progress 5% (0MB)
23 15:52:40.520880 progress 10% (0MB)
24 15:52:40.522318 progress 15% (0MB)
25 15:52:40.523976 progress 20% (1MB)
26 15:52:40.525445 progress 25% (1MB)
27 15:52:40.526925 progress 30% (1MB)
28 15:52:40.528486 progress 35% (1MB)
29 15:52:40.529894 progress 40% (2MB)
30 15:52:40.531342 progress 45% (2MB)
31 15:52:40.532753 progress 50% (2MB)
32 15:52:40.534354 progress 55% (2MB)
33 15:52:40.535802 progress 60% (3MB)
34 15:52:40.537218 progress 65% (3MB)
35 15:52:40.538895 progress 70% (3MB)
36 15:52:40.540296 progress 75% (3MB)
37 15:52:40.541708 progress 80% (4MB)
38 15:52:40.543149 progress 85% (4MB)
39 15:52:40.544742 progress 90% (4MB)
40 15:52:40.546147 progress 95% (4MB)
41 15:52:40.547579 progress 100% (5MB)
42 15:52:40.547792 5MB downloaded in 0.55s (9.42MB/s)
43 15:52:40.547943 end: 1.1.1 http-download (duration 00:00:01) [common]
45 15:52:40.548186 end: 1.1 download-retry (duration 00:00:01) [common]
46 15:52:40.548272 start: 1.2 download-retry (timeout 00:09:59) [common]
47 15:52:40.548357 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 15:52:40.548496 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:52:40.548565 saving as /var/lib/lava/dispatcher/tmp/11224309/tftp-deploy-1ztgtkk_/kernel/bzImage
50 15:52:40.548625 total size: 7880592 (7MB)
51 15:52:40.548685 No compression specified
52 15:52:40.549786 progress 0% (0MB)
53 15:52:40.551985 progress 5% (0MB)
54 15:52:40.554105 progress 10% (0MB)
55 15:52:40.556236 progress 15% (1MB)
56 15:52:40.558337 progress 20% (1MB)
57 15:52:40.560511 progress 25% (1MB)
58 15:52:40.562625 progress 30% (2MB)
59 15:52:40.564748 progress 35% (2MB)
60 15:52:40.566883 progress 40% (3MB)
61 15:52:40.568993 progress 45% (3MB)
62 15:52:40.571146 progress 50% (3MB)
63 15:52:40.573210 progress 55% (4MB)
64 15:52:40.575313 progress 60% (4MB)
65 15:52:40.577390 progress 65% (4MB)
66 15:52:40.579482 progress 70% (5MB)
67 15:52:40.581542 progress 75% (5MB)
68 15:52:40.583690 progress 80% (6MB)
69 15:52:40.585746 progress 85% (6MB)
70 15:52:40.587852 progress 90% (6MB)
71 15:52:40.589895 progress 95% (7MB)
72 15:52:40.592026 progress 100% (7MB)
73 15:52:40.592209 7MB downloaded in 0.04s (172.45MB/s)
74 15:52:40.592350 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:52:40.592580 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:52:40.592666 start: 1.3 download-retry (timeout 00:09:59) [common]
78 15:52:40.592754 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 15:52:40.592896 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 15:52:40.592968 saving as /var/lib/lava/dispatcher/tmp/11224309/tftp-deploy-1ztgtkk_/nfsrootfs/full.rootfs.tar
81 15:52:40.593030 total size: 133380384 (127MB)
82 15:52:40.593098 Using unxz to decompress xz
83 15:52:40.597423 progress 0% (0MB)
84 15:52:40.944691 progress 5% (6MB)
85 15:52:41.302395 progress 10% (12MB)
86 15:52:41.594049 progress 15% (19MB)
87 15:52:41.780649 progress 20% (25MB)
88 15:52:42.026573 progress 25% (31MB)
89 15:52:42.378973 progress 30% (38MB)
90 15:52:42.732434 progress 35% (44MB)
91 15:52:43.141512 progress 40% (50MB)
92 15:52:43.535207 progress 45% (57MB)
93 15:52:43.898887 progress 50% (63MB)
94 15:52:44.281268 progress 55% (69MB)
95 15:52:44.654774 progress 60% (76MB)
96 15:52:45.023397 progress 65% (82MB)
97 15:52:45.392832 progress 70% (89MB)
98 15:52:45.763164 progress 75% (95MB)
99 15:52:46.207176 progress 80% (101MB)
100 15:52:46.645594 progress 85% (108MB)
101 15:52:46.916452 progress 90% (114MB)
102 15:52:47.271184 progress 95% (120MB)
103 15:52:47.668549 progress 100% (127MB)
104 15:52:47.674017 127MB downloaded in 7.08s (17.96MB/s)
105 15:52:47.674321 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:52:47.674587 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:52:47.674717 start: 1.4 download-retry (timeout 00:09:52) [common]
109 15:52:47.674803 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 15:52:47.674958 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:52:47.675030 saving as /var/lib/lava/dispatcher/tmp/11224309/tftp-deploy-1ztgtkk_/modules/modules.tar
112 15:52:47.675091 total size: 251008 (0MB)
113 15:52:47.675153 Using unxz to decompress xz
114 15:52:47.679519 progress 13% (0MB)
115 15:52:47.679921 progress 26% (0MB)
116 15:52:47.680157 progress 39% (0MB)
117 15:52:47.681779 progress 52% (0MB)
118 15:52:47.683636 progress 65% (0MB)
119 15:52:47.685499 progress 78% (0MB)
120 15:52:47.687411 progress 91% (0MB)
121 15:52:47.689124 progress 100% (0MB)
122 15:52:47.694666 0MB downloaded in 0.02s (12.24MB/s)
123 15:52:47.694930 end: 1.4.1 http-download (duration 00:00:00) [common]
125 15:52:47.695200 end: 1.4 download-retry (duration 00:00:00) [common]
126 15:52:47.695297 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 15:52:47.695396 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 15:52:49.933891 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11224309/extract-nfsrootfs-3mkczue8
129 15:52:49.934101 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 15:52:49.934204 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 15:52:49.934385 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out
132 15:52:49.934524 makedir: /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin
133 15:52:49.934667 makedir: /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/tests
134 15:52:49.934771 makedir: /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/results
135 15:52:49.934876 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-add-keys
136 15:52:49.935029 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-add-sources
137 15:52:49.935161 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-background-process-start
138 15:52:49.935295 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-background-process-stop
139 15:52:49.935426 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-common-functions
140 15:52:49.935633 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-echo-ipv4
141 15:52:49.935776 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-install-packages
142 15:52:49.935906 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-installed-packages
143 15:52:49.936035 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-os-build
144 15:52:49.936166 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-probe-channel
145 15:52:49.936296 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-probe-ip
146 15:52:49.936424 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-target-ip
147 15:52:49.936552 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-target-mac
148 15:52:49.936679 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-target-storage
149 15:52:49.936813 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-test-case
150 15:52:49.936962 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-test-event
151 15:52:49.937104 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-test-feedback
152 15:52:49.937243 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-test-raise
153 15:52:49.937373 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-test-reference
154 15:52:49.937502 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-test-runner
155 15:52:49.937631 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-test-set
156 15:52:49.937758 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-test-shell
157 15:52:49.937888 Updating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-install-packages (oe)
158 15:52:49.943187 Updating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/bin/lava-installed-packages (oe)
159 15:52:49.943367 Creating /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/environment
160 15:52:49.943476 LAVA metadata
161 15:52:49.943555 - LAVA_JOB_ID=11224309
162 15:52:49.943623 - LAVA_DISPATCHER_IP=192.168.201.1
163 15:52:49.943743 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 15:52:49.943815 skipped lava-vland-overlay
165 15:52:49.943896 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 15:52:49.943980 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 15:52:49.944043 skipped lava-multinode-overlay
168 15:52:49.944122 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 15:52:49.944202 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 15:52:49.944281 Loading test definitions
171 15:52:49.944375 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 15:52:49.944448 Using /lava-11224309 at stage 0
173 15:52:49.944779 uuid=11224309_1.5.2.3.1 testdef=None
174 15:52:49.944870 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 15:52:49.944957 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 15:52:49.945474 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 15:52:49.945693 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 15:52:49.946327 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 15:52:49.946557 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 15:52:49.953949 runner path: /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/0/tests/0_dmesg test_uuid 11224309_1.5.2.3.1
183 15:52:49.954173 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 15:52:49.954599 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 15:52:49.954697 Using /lava-11224309 at stage 1
187 15:52:49.955035 uuid=11224309_1.5.2.3.5 testdef=None
188 15:52:49.955127 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 15:52:49.955215 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 15:52:49.955698 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 15:52:49.955947 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 15:52:49.956655 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 15:52:49.956884 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 15:52:49.990094 runner path: /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/1/tests/1_bootrr test_uuid 11224309_1.5.2.3.5
197 15:52:49.990332 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 15:52:49.990568 Creating lava-test-runner.conf files
200 15:52:49.990659 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/0 for stage 0
201 15:52:49.990756 - 0_dmesg
202 15:52:49.990839 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224309/lava-overlay-emvs9out/lava-11224309/1 for stage 1
203 15:52:49.990934 - 1_bootrr
204 15:52:49.991032 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 15:52:49.991119 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 15:52:49.998443 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 15:52:49.998551 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 15:52:49.998676 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 15:52:49.998764 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 15:52:49.998849 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 15:52:50.139210 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 15:52:50.139588 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 15:52:50.139708 extracting modules file /var/lib/lava/dispatcher/tmp/11224309/tftp-deploy-1ztgtkk_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224309/extract-nfsrootfs-3mkczue8
214 15:52:50.153612 extracting modules file /var/lib/lava/dispatcher/tmp/11224309/tftp-deploy-1ztgtkk_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224309/extract-overlay-ramdisk-_f06bqbn/ramdisk
215 15:52:50.167274 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 15:52:50.167397 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 15:52:50.167486 [common] Applying overlay to NFS
218 15:52:50.167560 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224309/compress-overlay-ffeql2su/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224309/extract-nfsrootfs-3mkczue8
219 15:52:50.175762 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 15:52:50.175875 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 15:52:50.175965 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 15:52:50.176054 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 15:52:50.176166 Building ramdisk /var/lib/lava/dispatcher/tmp/11224309/extract-overlay-ramdisk-_f06bqbn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224309/extract-overlay-ramdisk-_f06bqbn/ramdisk
224 15:52:50.247811 >> 26161 blocks
225 15:52:50.787840 rename /var/lib/lava/dispatcher/tmp/11224309/extract-overlay-ramdisk-_f06bqbn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224309/tftp-deploy-1ztgtkk_/ramdisk/ramdisk.cpio.gz
226 15:52:50.788542 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 15:52:50.788784 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 15:52:50.788988 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 15:52:50.789185 No mkimage arch provided, not using FIT.
230 15:52:50.789377 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 15:52:50.789561 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 15:52:50.789775 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 15:52:50.789962 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 15:52:50.790132 No LXC device requested
235 15:52:50.790344 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 15:52:50.790526 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 15:52:50.790743 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 15:52:50.790898 Checking files for TFTP limit of 4294967296 bytes.
239 15:52:50.791689 end: 1 tftp-deploy (duration 00:00:11) [common]
240 15:52:50.791898 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 15:52:50.792092 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 15:52:50.792347 substitutions:
243 15:52:50.792495 - {DTB}: None
244 15:52:50.792638 - {INITRD}: 11224309/tftp-deploy-1ztgtkk_/ramdisk/ramdisk.cpio.gz
245 15:52:50.792779 - {KERNEL}: 11224309/tftp-deploy-1ztgtkk_/kernel/bzImage
246 15:52:50.792917 - {LAVA_MAC}: None
247 15:52:50.793055 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11224309/extract-nfsrootfs-3mkczue8
248 15:52:50.793195 - {NFS_SERVER_IP}: 192.168.201.1
249 15:52:50.793331 - {PRESEED_CONFIG}: None
250 15:52:50.793466 - {PRESEED_LOCAL}: None
251 15:52:50.793602 - {RAMDISK}: 11224309/tftp-deploy-1ztgtkk_/ramdisk/ramdisk.cpio.gz
252 15:52:50.793737 - {ROOT_PART}: None
253 15:52:50.793872 - {ROOT}: None
254 15:52:50.794006 - {SERVER_IP}: 192.168.201.1
255 15:52:50.794139 - {TEE}: None
256 15:52:50.794273 Parsed boot commands:
257 15:52:50.794404 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 15:52:50.794781 Parsed boot commands: tftpboot 192.168.201.1 11224309/tftp-deploy-1ztgtkk_/kernel/bzImage 11224309/tftp-deploy-1ztgtkk_/kernel/cmdline 11224309/tftp-deploy-1ztgtkk_/ramdisk/ramdisk.cpio.gz
259 15:52:50.794969 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 15:52:50.795152 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 15:52:50.795349 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 15:52:50.795534 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 15:52:50.795697 Not connected, no need to disconnect.
264 15:52:50.795866 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 15:52:50.796046 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 15:52:50.796198 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-8'
267 15:52:50.801826 Setting prompt string to ['lava-test: # ']
268 15:52:50.802424 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 15:52:50.802695 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 15:52:50.802891 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 15:52:50.803085 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 15:52:50.803551 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
273 15:52:55.937692 >> Command sent successfully.
274 15:52:55.940156 Returned 0 in 5 seconds
275 15:52:56.040549 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 15:52:56.040887 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 15:52:56.040991 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 15:52:56.041091 Setting prompt string to 'Starting depthcharge on Voema...'
280 15:52:56.041166 Changing prompt to 'Starting depthcharge on Voema...'
281 15:52:56.041236 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 15:52:56.041506 [Enter `^Ec?' for help]
283 15:52:57.647815
284 15:52:57.647965
285 15:52:57.657511 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 15:52:57.660888 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 15:52:57.667556 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 15:52:57.670832 CPU: AES supported, TXT NOT supported, VT supported
289 15:52:57.677486 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 15:52:57.683866 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 15:52:57.687344 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 15:52:57.690439 VBOOT: Loading verstage.
293 15:52:57.697385 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 15:52:57.700771 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 15:52:57.706747 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 15:52:57.713738 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 15:52:57.720458 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 15:52:57.723541
299 15:52:57.723631
300 15:52:57.733451 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 15:52:57.748628 Probing TPM: . done!
302 15:52:57.751801 TPM ready after 0 ms
303 15:52:57.755021 Connected to device vid:did:rid of 1ae0:0028:00
304 15:52:57.766239 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
305 15:52:57.772764 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 15:52:57.776202 Initialized TPM device CR50 revision 0
307 15:52:57.860630 tlcl_send_startup: Startup return code is 0
308 15:52:57.860783 TPM: setup succeeded
309 15:52:57.876112 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 15:52:57.890624 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 15:52:57.902808 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 15:52:57.913056 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 15:52:57.916552 Chrome EC: UHEPI supported
314 15:52:57.919799 Phase 1
315 15:52:57.923445 FMAP: area GBB found @ 1805000 (458752 bytes)
316 15:52:57.932830 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 15:52:57.939530 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 15:52:57.946156 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 15:52:57.953047 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 15:52:57.955988 Recovery requested (1009000e)
321 15:52:57.959448 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 15:52:57.971390 tlcl_extend: response is 0
323 15:52:57.978262 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 15:52:57.987767 tlcl_extend: response is 0
325 15:52:57.994686 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 15:52:58.001061 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 15:52:58.007963 BS: verstage times (exec / console): total (unknown) / 142 ms
328 15:52:58.008056
329 15:52:58.008132
330 15:52:58.021142 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 15:52:58.027842 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 15:52:58.030909 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 15:52:58.033831 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 15:52:58.040580 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 15:52:58.044247 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 15:52:58.047715 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
337 15:52:58.051027 TCO_STS: 0000 0000
338 15:52:58.054210 GEN_PMCON: d0015038 00002200
339 15:52:58.057429 GBLRST_CAUSE: 00000000 00000000
340 15:52:58.060568 HPR_CAUSE0: 00000000
341 15:52:58.060672 prev_sleep_state 5
342 15:52:58.063771 Boot Count incremented to 21634
343 15:52:58.070391 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 15:52:58.077465 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 15:52:58.088178 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 15:52:58.091028 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 15:52:58.097082 Chrome EC: UHEPI supported
348 15:52:58.103393 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 15:52:58.116306 Probing TPM: done!
350 15:52:58.122706 Connected to device vid:did:rid of 1ae0:0028:00
351 15:52:58.132773 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
352 15:52:58.136044 Initialized TPM device CR50 revision 0
353 15:52:58.153920 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 15:52:58.157317 MRC: Hash idx 0x100b comparison successful.
355 15:52:58.160733 MRC cache found, size faa8
356 15:52:58.160819 bootmode is set to: 2
357 15:52:58.164444 SPD index = 0
358 15:52:58.170906 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 15:52:58.174145 SPD: module type is LPDDR4X
360 15:52:58.177567 SPD: module part number is MT53E512M64D4NW-046
361 15:52:58.183820 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 15:52:58.190448 SPD: device width 16 bits, bus width 16 bits
363 15:52:58.193540 SPD: module size is 1024 MB (per channel)
364 15:52:58.625822 CBMEM:
365 15:52:58.628950 IMD: root @ 0x76fff000 254 entries.
366 15:52:58.631976 IMD: root @ 0x76ffec00 62 entries.
367 15:52:58.635364 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 15:52:58.642106 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 15:52:58.645365 External stage cache:
370 15:52:58.648089 IMD: root @ 0x7b3ff000 254 entries.
371 15:52:58.651456 IMD: root @ 0x7b3fec00 62 entries.
372 15:52:58.667569 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 15:52:58.674859 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 15:52:58.681457 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 15:52:58.694177 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 15:52:58.701160 cse_lite: Skip switching to RW in the recovery path
377 15:52:58.701245 8 DIMMs found
378 15:52:58.704484 SMM Memory Map
379 15:52:58.707486 SMRAM : 0x7b000000 0x800000
380 15:52:58.711017 Subregion 0: 0x7b000000 0x200000
381 15:52:58.714097 Subregion 1: 0x7b200000 0x200000
382 15:52:58.717204 Subregion 2: 0x7b400000 0x400000
383 15:52:58.717288 top_of_ram = 0x77000000
384 15:52:58.724288 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 15:52:58.730700 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 15:52:58.734075 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 15:52:58.740515 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 15:52:58.747393 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 15:52:58.753709 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 15:52:58.764318 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 15:52:58.770903 Processing 211 relocs. Offset value of 0x74c0b000
392 15:52:58.777323 BS: romstage times (exec / console): total (unknown) / 277 ms
393 15:52:58.783466
394 15:52:58.783571
395 15:52:58.793232 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 15:52:58.796550 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 15:52:58.806359 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 15:52:58.813333 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 15:52:58.819618 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 15:52:58.826140 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 15:52:58.873481 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 15:52:58.879893 Processing 5008 relocs. Offset value of 0x75d98000
403 15:52:58.882874 BS: postcar times (exec / console): total (unknown) / 59 ms
404 15:52:58.886765
405 15:52:58.886841
406 15:52:58.896587 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 15:52:58.896664 Normal boot
408 15:52:58.899719 FW_CONFIG value is 0x804c02
409 15:52:58.903079 PCI: 00:07.0 disabled by fw_config
410 15:52:58.906539 PCI: 00:07.1 disabled by fw_config
411 15:52:58.909489 PCI: 00:0d.2 disabled by fw_config
412 15:52:58.916380 PCI: 00:1c.7 disabled by fw_config
413 15:52:58.919678 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 15:52:58.926648 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 15:52:58.929554 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 15:52:58.936032 GENERIC: 0.0 disabled by fw_config
417 15:52:58.939472 GENERIC: 1.0 disabled by fw_config
418 15:52:58.942417 fw_config match found: DB_USB=USB3_ACTIVE
419 15:52:58.946037 fw_config match found: DB_USB=USB3_ACTIVE
420 15:52:58.948883 fw_config match found: DB_USB=USB3_ACTIVE
421 15:52:58.956048 fw_config match found: DB_USB=USB3_ACTIVE
422 15:52:58.959253 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 15:52:58.968891 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 15:52:58.975880 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 15:52:58.982309 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 15:52:58.988555 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 15:52:58.992134 microcode: Update skipped, already up-to-date
428 15:52:58.999068 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 15:52:59.026894 Detected 4 core, 8 thread CPU.
430 15:52:59.030384 Setting up SMI for CPU
431 15:52:59.033331 IED base = 0x7b400000
432 15:52:59.036618 IED size = 0x00400000
433 15:52:59.036703 Will perform SMM setup.
434 15:52:59.043262 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 15:52:59.050019 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 15:52:59.056372 Processing 16 relocs. Offset value of 0x00030000
437 15:52:59.059605 Attempting to start 7 APs
438 15:52:59.063332 Waiting for 10ms after sending INIT.
439 15:52:59.078896 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 15:52:59.078981 done.
441 15:52:59.082242 AP: slot 7 apic_id 5.
442 15:52:59.085843 AP: slot 3 apic_id 4.
443 15:52:59.085927 AP: slot 6 apic_id 2.
444 15:52:59.088755 AP: slot 2 apic_id 3.
445 15:52:59.092359 AP: slot 5 apic_id 6.
446 15:52:59.092442 AP: slot 4 apic_id 7.
447 15:52:59.098965 Waiting for 2nd SIPI to complete...done.
448 15:52:59.105339 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 15:52:59.111750 Processing 13 relocs. Offset value of 0x00038000
450 15:52:59.115163 Unable to locate Global NVS
451 15:52:59.121857 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 15:52:59.125059 Installing permanent SMM handler to 0x7b000000
453 15:52:59.135091 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 15:52:59.138221 Processing 794 relocs. Offset value of 0x7b010000
455 15:52:59.148009 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 15:52:59.151529 Processing 13 relocs. Offset value of 0x7b008000
457 15:52:59.158521 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 15:52:59.164928 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 15:52:59.171428 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 15:52:59.175000 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 15:52:59.181270 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 15:52:59.187940 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 15:52:59.194733 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 15:52:59.198027 Unable to locate Global NVS
465 15:52:59.204470 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 15:52:59.207888 Clearing SMI status registers
467 15:52:59.210999 SMI_STS: PM1
468 15:52:59.211083 PM1_STS: PWRBTN
469 15:52:59.217558 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 15:52:59.220749 In relocation handler: CPU 0
471 15:52:59.224363 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 15:52:59.230885 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 15:52:59.233871 Relocation complete.
474 15:52:59.241068 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 15:52:59.243813 In relocation handler: CPU 1
476 15:52:59.247406 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 15:52:59.250422 Relocation complete.
478 15:52:59.257554 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
479 15:52:59.260450 In relocation handler: CPU 7
480 15:52:59.264027 New SMBASE=0x7affe400 IEDBASE=0x7b400000
481 15:52:59.267154 Relocation complete.
482 15:52:59.273560 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
483 15:52:59.277423 In relocation handler: CPU 3
484 15:52:59.280195 New SMBASE=0x7afff400 IEDBASE=0x7b400000
485 15:52:59.283549 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 15:52:59.286730 Relocation complete.
487 15:52:59.293351 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
488 15:52:59.296500 In relocation handler: CPU 2
489 15:52:59.300058 New SMBASE=0x7afff800 IEDBASE=0x7b400000
490 15:52:59.303311 Relocation complete.
491 15:52:59.309962 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
492 15:52:59.312847 In relocation handler: CPU 6
493 15:52:59.316529 New SMBASE=0x7affe800 IEDBASE=0x7b400000
494 15:52:59.322896 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 15:52:59.325952 Relocation complete.
496 15:52:59.332956 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
497 15:52:59.337276 In relocation handler: CPU 4
498 15:52:59.340398 New SMBASE=0x7afff000 IEDBASE=0x7b400000
499 15:52:59.340482 Relocation complete.
500 15:52:59.350406 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
501 15:52:59.350504 In relocation handler: CPU 5
502 15:52:59.356850 New SMBASE=0x7affec00 IEDBASE=0x7b400000
503 15:52:59.360352 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 15:52:59.363721 Relocation complete.
505 15:52:59.363846 Initializing CPU #0
506 15:52:59.366726 CPU: vendor Intel device 806c1
507 15:52:59.373418 CPU: family 06, model 8c, stepping 01
508 15:52:59.373574 Clearing out pending MCEs
509 15:52:59.376804 Setting up local APIC...
510 15:52:59.380270 apic_id: 0x00 done.
511 15:52:59.383248 Turbo is available but hidden
512 15:52:59.386801 Turbo is available and visible
513 15:52:59.390034 microcode: Update skipped, already up-to-date
514 15:52:59.393504 CPU #0 initialized
515 15:52:59.393811 Initializing CPU #1
516 15:52:59.396407 Initializing CPU #3
517 15:52:59.399820 Initializing CPU #7
518 15:52:59.403568 CPU: vendor Intel device 806c1
519 15:52:59.406563 CPU: family 06, model 8c, stepping 01
520 15:52:59.409652 CPU: vendor Intel device 806c1
521 15:52:59.413142 CPU: family 06, model 8c, stepping 01
522 15:52:59.416678 Clearing out pending MCEs
523 15:52:59.419340 Clearing out pending MCEs
524 15:52:59.419705 Setting up local APIC...
525 15:52:59.423120 CPU: vendor Intel device 806c1
526 15:52:59.426538 CPU: family 06, model 8c, stepping 01
527 15:52:59.429495 Initializing CPU #4
528 15:52:59.433056 Initializing CPU #5
529 15:52:59.436269 CPU: vendor Intel device 806c1
530 15:52:59.439442 CPU: family 06, model 8c, stepping 01
531 15:52:59.442778 CPU: vendor Intel device 806c1
532 15:52:59.446467 CPU: family 06, model 8c, stepping 01
533 15:52:59.449762 Clearing out pending MCEs
534 15:52:59.450158 Initializing CPU #2
535 15:52:59.453260 Initializing CPU #6
536 15:52:59.456142 CPU: vendor Intel device 806c1
537 15:52:59.459754 CPU: family 06, model 8c, stepping 01
538 15:52:59.462503 CPU: vendor Intel device 806c1
539 15:52:59.466172 CPU: family 06, model 8c, stepping 01
540 15:52:59.469667 Clearing out pending MCEs
541 15:52:59.472921 Clearing out pending MCEs
542 15:52:59.473316 Setting up local APIC...
543 15:52:59.475784 apic_id: 0x04 done.
544 15:52:59.479390 Setting up local APIC...
545 15:52:59.479783 apic_id: 0x07 done.
546 15:52:59.482888 Clearing out pending MCEs
547 15:52:59.485875 Setting up local APIC...
548 15:52:59.489481 apic_id: 0x05 done.
549 15:52:59.492413 microcode: Update skipped, already up-to-date
550 15:52:59.495906 microcode: Update skipped, already up-to-date
551 15:52:59.498790 CPU #3 initialized
552 15:52:59.502488 CPU #7 initialized
553 15:52:59.502916 apic_id: 0x02 done.
554 15:52:59.505809 Setting up local APIC...
555 15:52:59.509336 microcode: Update skipped, already up-to-date
556 15:52:59.511968 Setting up local APIC...
557 15:52:59.515667 CPU #4 initialized
558 15:52:59.516056 apic_id: 0x06 done.
559 15:52:59.518684 apic_id: 0x03 done.
560 15:52:59.525200 microcode: Update skipped, already up-to-date
561 15:52:59.528605 microcode: Update skipped, already up-to-date
562 15:52:59.528996 CPU #6 initialized
563 15:52:59.531957 CPU #2 initialized
564 15:52:59.535233 microcode: Update skipped, already up-to-date
565 15:52:59.538817 Clearing out pending MCEs
566 15:52:59.541875 CPU #5 initialized
567 15:52:59.545076 Setting up local APIC...
568 15:52:59.545466 apic_id: 0x01 done.
569 15:52:59.552067 microcode: Update skipped, already up-to-date
570 15:52:59.552460 CPU #1 initialized
571 15:52:59.558207 bsp_do_flight_plan done after 455 msecs.
572 15:52:59.561771 CPU: frequency set to 4000 MHz
573 15:52:59.562187 Enabling SMIs.
574 15:52:59.568276 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 15:52:59.584427 SATAXPCIE1 indicates PCIe NVMe is present
576 15:52:59.587604 Probing TPM: done!
577 15:52:59.591103 Connected to device vid:did:rid of 1ae0:0028:00
578 15:52:59.601957 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
579 15:52:59.604892 Initialized TPM device CR50 revision 0
580 15:52:59.608363 Enabling S0i3.4
581 15:52:59.615234 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 15:52:59.617980 Found a VBT of 8704 bytes after decompression
583 15:52:59.624848 cse_lite: CSE RO boot. HybridStorageMode disabled
584 15:52:59.631145 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 15:52:59.707042 FSPS returned 0
586 15:52:59.709857 Executing Phase 1 of FspMultiPhaseSiInit
587 15:52:59.720142 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 15:52:59.723673 port C0 DISC req: usage 1 usb3 1 usb2 5
589 15:52:59.726046 Raw Buffer output 0 00000511
590 15:52:59.729591 Raw Buffer output 1 00000000
591 15:52:59.734126 pmc_send_ipc_cmd succeeded
592 15:52:59.740292 port C1 DISC req: usage 1 usb3 2 usb2 3
593 15:52:59.740684 Raw Buffer output 0 00000321
594 15:52:59.743682 Raw Buffer output 1 00000000
595 15:52:59.747553 pmc_send_ipc_cmd succeeded
596 15:52:59.752991 Detected 4 core, 8 thread CPU.
597 15:52:59.755854 Detected 4 core, 8 thread CPU.
598 15:52:59.989676 Display FSP Version Info HOB
599 15:52:59.992789 Reference Code - CPU = a.0.4c.31
600 15:52:59.996768 uCode Version = 0.0.0.86
601 15:52:59.999426 TXT ACM version = ff.ff.ff.ffff
602 15:53:00.002762 Reference Code - ME = a.0.4c.31
603 15:53:00.005929 MEBx version = 0.0.0.0
604 15:53:00.009133 ME Firmware Version = Consumer SKU
605 15:53:00.013117 Reference Code - PCH = a.0.4c.31
606 15:53:00.015841 PCH-CRID Status = Disabled
607 15:53:00.019316 PCH-CRID Original Value = ff.ff.ff.ffff
608 15:53:00.023086 PCH-CRID New Value = ff.ff.ff.ffff
609 15:53:00.025931 OPROM - RST - RAID = ff.ff.ff.ffff
610 15:53:00.029658 PCH Hsio Version = 4.0.0.0
611 15:53:00.032843 Reference Code - SA - System Agent = a.0.4c.31
612 15:53:00.036413 Reference Code - MRC = 2.0.0.1
613 15:53:00.039757 SA - PCIe Version = a.0.4c.31
614 15:53:00.042581 SA-CRID Status = Disabled
615 15:53:00.046481 SA-CRID Original Value = 0.0.0.1
616 15:53:00.049219 SA-CRID New Value = 0.0.0.1
617 15:53:00.052644 OPROM - VBIOS = ff.ff.ff.ffff
618 15:53:00.055786 IO Manageability Engine FW Version = 11.1.4.0
619 15:53:00.059033 PHY Build Version = 0.0.0.e0
620 15:53:00.062705 Thunderbolt(TM) FW Version = 0.0.0.0
621 15:53:00.068941 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 15:53:00.072114 ITSS IRQ Polarities Before:
623 15:53:00.072547 IPC0: 0xffffffff
624 15:53:00.075923 IPC1: 0xffffffff
625 15:53:00.076356 IPC2: 0xffffffff
626 15:53:00.078755 IPC3: 0xffffffff
627 15:53:00.082292 ITSS IRQ Polarities After:
628 15:53:00.082766 IPC0: 0xffffffff
629 15:53:00.085700 IPC1: 0xffffffff
630 15:53:00.086132 IPC2: 0xffffffff
631 15:53:00.089263 IPC3: 0xffffffff
632 15:53:00.092064 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 15:53:00.105259 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 15:53:00.115122 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 15:53:00.128812 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 15:53:00.135582 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
637 15:53:00.138438 Enumerating buses...
638 15:53:00.141760 Show all devs... Before device enumeration.
639 15:53:00.145339 Root Device: enabled 1
640 15:53:00.148017 DOMAIN: 0000: enabled 1
641 15:53:00.148412 CPU_CLUSTER: 0: enabled 1
642 15:53:00.151789 PCI: 00:00.0: enabled 1
643 15:53:00.154702 PCI: 00:02.0: enabled 1
644 15:53:00.158126 PCI: 00:04.0: enabled 1
645 15:53:00.158703 PCI: 00:05.0: enabled 1
646 15:53:00.161940 PCI: 00:06.0: enabled 0
647 15:53:00.164818 PCI: 00:07.0: enabled 0
648 15:53:00.165218 PCI: 00:07.1: enabled 0
649 15:53:00.168194 PCI: 00:07.2: enabled 0
650 15:53:00.171415 PCI: 00:07.3: enabled 0
651 15:53:00.174887 PCI: 00:08.0: enabled 1
652 15:53:00.175282 PCI: 00:09.0: enabled 0
653 15:53:00.177978 PCI: 00:0a.0: enabled 0
654 15:53:00.181691 PCI: 00:0d.0: enabled 1
655 15:53:00.184649 PCI: 00:0d.1: enabled 0
656 15:53:00.185044 PCI: 00:0d.2: enabled 0
657 15:53:00.187898 PCI: 00:0d.3: enabled 0
658 15:53:00.191512 PCI: 00:0e.0: enabled 0
659 15:53:00.194634 PCI: 00:10.2: enabled 1
660 15:53:00.195034 PCI: 00:10.6: enabled 0
661 15:53:00.198235 PCI: 00:10.7: enabled 0
662 15:53:00.201200 PCI: 00:12.0: enabled 0
663 15:53:00.204484 PCI: 00:12.6: enabled 0
664 15:53:00.204881 PCI: 00:13.0: enabled 0
665 15:53:00.207784 PCI: 00:14.0: enabled 1
666 15:53:00.211009 PCI: 00:14.1: enabled 0
667 15:53:00.214474 PCI: 00:14.2: enabled 1
668 15:53:00.214897 PCI: 00:14.3: enabled 1
669 15:53:00.217773 PCI: 00:15.0: enabled 1
670 15:53:00.221578 PCI: 00:15.1: enabled 1
671 15:53:00.222055 PCI: 00:15.2: enabled 1
672 15:53:00.224537 PCI: 00:15.3: enabled 1
673 15:53:00.228226 PCI: 00:16.0: enabled 1
674 15:53:00.230920 PCI: 00:16.1: enabled 0
675 15:53:00.231364 PCI: 00:16.2: enabled 0
676 15:53:00.234431 PCI: 00:16.3: enabled 0
677 15:53:00.237553 PCI: 00:16.4: enabled 0
678 15:53:00.240971 PCI: 00:16.5: enabled 0
679 15:53:00.241373 PCI: 00:17.0: enabled 1
680 15:53:00.244208 PCI: 00:19.0: enabled 0
681 15:53:00.247394 PCI: 00:19.1: enabled 1
682 15:53:00.250652 PCI: 00:19.2: enabled 0
683 15:53:00.251056 PCI: 00:1c.0: enabled 1
684 15:53:00.254279 PCI: 00:1c.1: enabled 0
685 15:53:00.257613 PCI: 00:1c.2: enabled 0
686 15:53:00.260616 PCI: 00:1c.3: enabled 0
687 15:53:00.261015 PCI: 00:1c.4: enabled 0
688 15:53:00.264041 PCI: 00:1c.5: enabled 0
689 15:53:00.267510 PCI: 00:1c.6: enabled 1
690 15:53:00.270348 PCI: 00:1c.7: enabled 0
691 15:53:00.270817 PCI: 00:1d.0: enabled 1
692 15:53:00.274009 PCI: 00:1d.1: enabled 0
693 15:53:00.277106 PCI: 00:1d.2: enabled 1
694 15:53:00.277501 PCI: 00:1d.3: enabled 0
695 15:53:00.280922 PCI: 00:1e.0: enabled 1
696 15:53:00.283624 PCI: 00:1e.1: enabled 0
697 15:53:00.287706 PCI: 00:1e.2: enabled 1
698 15:53:00.288102 PCI: 00:1e.3: enabled 1
699 15:53:00.290588 PCI: 00:1f.0: enabled 1
700 15:53:00.293878 PCI: 00:1f.1: enabled 0
701 15:53:00.297092 PCI: 00:1f.2: enabled 1
702 15:53:00.297556 PCI: 00:1f.3: enabled 1
703 15:53:00.300234 PCI: 00:1f.4: enabled 0
704 15:53:00.303429 PCI: 00:1f.5: enabled 1
705 15:53:00.307083 PCI: 00:1f.6: enabled 0
706 15:53:00.307472 PCI: 00:1f.7: enabled 0
707 15:53:00.310395 APIC: 00: enabled 1
708 15:53:00.313609 GENERIC: 0.0: enabled 1
709 15:53:00.313999 GENERIC: 0.0: enabled 1
710 15:53:00.316985 GENERIC: 1.0: enabled 1
711 15:53:00.320360 GENERIC: 0.0: enabled 1
712 15:53:00.323477 GENERIC: 1.0: enabled 1
713 15:53:00.323915 USB0 port 0: enabled 1
714 15:53:00.326554 GENERIC: 0.0: enabled 1
715 15:53:00.330291 USB0 port 0: enabled 1
716 15:53:00.333260 GENERIC: 0.0: enabled 1
717 15:53:00.333652 I2C: 00:1a: enabled 1
718 15:53:00.336667 I2C: 00:31: enabled 1
719 15:53:00.339916 I2C: 00:32: enabled 1
720 15:53:00.340307 I2C: 00:10: enabled 1
721 15:53:00.343068 I2C: 00:15: enabled 1
722 15:53:00.346465 GENERIC: 0.0: enabled 0
723 15:53:00.346877 GENERIC: 1.0: enabled 0
724 15:53:00.350074 GENERIC: 0.0: enabled 1
725 15:53:00.353165 SPI: 00: enabled 1
726 15:53:00.353562 SPI: 00: enabled 1
727 15:53:00.356559 PNP: 0c09.0: enabled 1
728 15:53:00.359744 GENERIC: 0.0: enabled 1
729 15:53:00.362865 USB3 port 0: enabled 1
730 15:53:00.363296 USB3 port 1: enabled 1
731 15:53:00.366327 USB3 port 2: enabled 0
732 15:53:00.369732 USB3 port 3: enabled 0
733 15:53:00.370128 USB2 port 0: enabled 0
734 15:53:00.372983 USB2 port 1: enabled 1
735 15:53:00.376554 USB2 port 2: enabled 1
736 15:53:00.379453 USB2 port 3: enabled 0
737 15:53:00.379884 USB2 port 4: enabled 1
738 15:53:00.382774 USB2 port 5: enabled 0
739 15:53:00.386016 USB2 port 6: enabled 0
740 15:53:00.386444 USB2 port 7: enabled 0
741 15:53:00.389633 USB2 port 8: enabled 0
742 15:53:00.393103 USB2 port 9: enabled 0
743 15:53:00.396293 USB3 port 0: enabled 0
744 15:53:00.396835 USB3 port 1: enabled 1
745 15:53:00.399338 USB3 port 2: enabled 0
746 15:53:00.402807 USB3 port 3: enabled 0
747 15:53:00.403357 GENERIC: 0.0: enabled 1
748 15:53:00.405982 GENERIC: 1.0: enabled 1
749 15:53:00.409501 APIC: 01: enabled 1
750 15:53:00.409932 APIC: 03: enabled 1
751 15:53:00.412816 APIC: 04: enabled 1
752 15:53:00.415853 APIC: 07: enabled 1
753 15:53:00.416284 APIC: 06: enabled 1
754 15:53:00.419255 APIC: 02: enabled 1
755 15:53:00.422502 APIC: 05: enabled 1
756 15:53:00.423103 Compare with tree...
757 15:53:00.425932 Root Device: enabled 1
758 15:53:00.429311 DOMAIN: 0000: enabled 1
759 15:53:00.429852 PCI: 00:00.0: enabled 1
760 15:53:00.432252 PCI: 00:02.0: enabled 1
761 15:53:00.435914 PCI: 00:04.0: enabled 1
762 15:53:00.438811 GENERIC: 0.0: enabled 1
763 15:53:00.441973 PCI: 00:05.0: enabled 1
764 15:53:00.442438 PCI: 00:06.0: enabled 0
765 15:53:00.445531 PCI: 00:07.0: enabled 0
766 15:53:00.448759 GENERIC: 0.0: enabled 1
767 15:53:00.452132 PCI: 00:07.1: enabled 0
768 15:53:00.455869 GENERIC: 1.0: enabled 1
769 15:53:00.458987 PCI: 00:07.2: enabled 0
770 15:53:00.459457 GENERIC: 0.0: enabled 1
771 15:53:00.461724 PCI: 00:07.3: enabled 0
772 15:53:00.465407 GENERIC: 1.0: enabled 1
773 15:53:00.468560 PCI: 00:08.0: enabled 1
774 15:53:00.471886 PCI: 00:09.0: enabled 0
775 15:53:00.472332 PCI: 00:0a.0: enabled 0
776 15:53:00.475111 PCI: 00:0d.0: enabled 1
777 15:53:00.478888 USB0 port 0: enabled 1
778 15:53:00.482116 USB3 port 0: enabled 1
779 15:53:00.485883 USB3 port 1: enabled 1
780 15:53:00.486387 USB3 port 2: enabled 0
781 15:53:00.488310 USB3 port 3: enabled 0
782 15:53:00.492297 PCI: 00:0d.1: enabled 0
783 15:53:00.495222 PCI: 00:0d.2: enabled 0
784 15:53:00.498430 GENERIC: 0.0: enabled 1
785 15:53:00.501513 PCI: 00:0d.3: enabled 0
786 15:53:00.501971 PCI: 00:0e.0: enabled 0
787 15:53:00.505157 PCI: 00:10.2: enabled 1
788 15:53:00.508386 PCI: 00:10.6: enabled 0
789 15:53:00.511433 PCI: 00:10.7: enabled 0
790 15:53:00.514919 PCI: 00:12.0: enabled 0
791 15:53:00.515490 PCI: 00:12.6: enabled 0
792 15:53:00.517872 PCI: 00:13.0: enabled 0
793 15:53:00.521688 PCI: 00:14.0: enabled 1
794 15:53:00.524904 USB0 port 0: enabled 1
795 15:53:00.528249 USB2 port 0: enabled 0
796 15:53:00.528817 USB2 port 1: enabled 1
797 15:53:00.531587 USB2 port 2: enabled 1
798 15:53:00.534633 USB2 port 3: enabled 0
799 15:53:00.538156 USB2 port 4: enabled 1
800 15:53:00.541335 USB2 port 5: enabled 0
801 15:53:00.544405 USB2 port 6: enabled 0
802 15:53:00.544832 USB2 port 7: enabled 0
803 15:53:00.547570 USB2 port 8: enabled 0
804 15:53:00.551126 USB2 port 9: enabled 0
805 15:53:00.554548 USB3 port 0: enabled 0
806 15:53:00.557571 USB3 port 1: enabled 1
807 15:53:00.560855 USB3 port 2: enabled 0
808 15:53:00.561300 USB3 port 3: enabled 0
809 15:53:00.564160 PCI: 00:14.1: enabled 0
810 15:53:00.567706 PCI: 00:14.2: enabled 1
811 15:53:00.570990 PCI: 00:14.3: enabled 1
812 15:53:00.574496 GENERIC: 0.0: enabled 1
813 15:53:00.574985 PCI: 00:15.0: enabled 1
814 15:53:00.577267 I2C: 00:1a: enabled 1
815 15:53:00.581438 I2C: 00:31: enabled 1
816 15:53:00.584969 I2C: 00:32: enabled 1
817 15:53:00.585464 PCI: 00:15.1: enabled 1
818 15:53:00.588376 I2C: 00:10: enabled 1
819 15:53:00.591566 PCI: 00:15.2: enabled 1
820 15:53:00.641698 PCI: 00:15.3: enabled 1
821 15:53:00.642256 PCI: 00:16.0: enabled 1
822 15:53:00.642826 PCI: 00:16.1: enabled 0
823 15:53:00.643361 PCI: 00:16.2: enabled 0
824 15:53:00.643778 PCI: 00:16.3: enabled 0
825 15:53:00.644097 PCI: 00:16.4: enabled 0
826 15:53:00.644399 PCI: 00:16.5: enabled 0
827 15:53:00.644697 PCI: 00:17.0: enabled 1
828 15:53:00.645313 PCI: 00:19.0: enabled 0
829 15:53:00.645670 PCI: 00:19.1: enabled 1
830 15:53:00.646176 I2C: 00:15: enabled 1
831 15:53:00.646713 PCI: 00:19.2: enabled 0
832 15:53:00.647040 PCI: 00:1d.0: enabled 1
833 15:53:00.647340 GENERIC: 0.0: enabled 1
834 15:53:00.647635 PCI: 00:1e.0: enabled 1
835 15:53:00.647926 PCI: 00:1e.1: enabled 0
836 15:53:00.648215 PCI: 00:1e.2: enabled 1
837 15:53:00.648503 SPI: 00: enabled 1
838 15:53:00.648948 PCI: 00:1e.3: enabled 1
839 15:53:00.649453 SPI: 00: enabled 1
840 15:53:00.680466 PCI: 00:1f.0: enabled 1
841 15:53:00.681007 PNP: 0c09.0: enabled 1
842 15:53:00.681813 PCI: 00:1f.1: enabled 0
843 15:53:00.682310 PCI: 00:1f.2: enabled 1
844 15:53:00.682705 GENERIC: 0.0: enabled 1
845 15:53:00.683034 GENERIC: 0.0: enabled 1
846 15:53:00.683343 GENERIC: 1.0: enabled 1
847 15:53:00.683643 PCI: 00:1f.3: enabled 1
848 15:53:00.683938 PCI: 00:1f.4: enabled 0
849 15:53:00.684293 PCI: 00:1f.5: enabled 1
850 15:53:00.684598 PCI: 00:1f.6: enabled 0
851 15:53:00.684988 PCI: 00:1f.7: enabled 0
852 15:53:00.685376 CPU_CLUSTER: 0: enabled 1
853 15:53:00.685754 APIC: 00: enabled 1
854 15:53:00.686113 APIC: 01: enabled 1
855 15:53:00.686413 APIC: 03: enabled 1
856 15:53:00.686740 APIC: 04: enabled 1
857 15:53:00.688355 APIC: 07: enabled 1
858 15:53:00.691585 APIC: 06: enabled 1
859 15:53:00.695197 APIC: 02: enabled 1
860 15:53:00.695875 APIC: 05: enabled 1
861 15:53:00.698651 Root Device scanning...
862 15:53:00.702097 scan_static_bus for Root Device
863 15:53:00.705653 DOMAIN: 0000 enabled
864 15:53:00.708764 CPU_CLUSTER: 0 enabled
865 15:53:00.709198 DOMAIN: 0000 scanning...
866 15:53:00.712125 PCI: pci_scan_bus for bus 00
867 15:53:00.714940 PCI: 00:00.0 [8086/0000] ops
868 15:53:00.718833 PCI: 00:00.0 [8086/9a12] enabled
869 15:53:00.722453 PCI: 00:02.0 [8086/0000] bus ops
870 15:53:00.725114 PCI: 00:02.0 [8086/9a40] enabled
871 15:53:00.728315 PCI: 00:04.0 [8086/0000] bus ops
872 15:53:00.731572 PCI: 00:04.0 [8086/9a03] enabled
873 15:53:00.734983 PCI: 00:05.0 [8086/9a19] enabled
874 15:53:00.738154 PCI: 00:07.0 [0000/0000] hidden
875 15:53:00.741925 PCI: 00:08.0 [8086/9a11] enabled
876 15:53:00.744833 PCI: 00:0a.0 [8086/9a0d] disabled
877 15:53:00.748117 PCI: 00:0d.0 [8086/0000] bus ops
878 15:53:00.752088 PCI: 00:0d.0 [8086/9a13] enabled
879 15:53:00.754822 PCI: 00:14.0 [8086/0000] bus ops
880 15:53:00.758207 PCI: 00:14.0 [8086/a0ed] enabled
881 15:53:00.761370 PCI: 00:14.2 [8086/a0ef] enabled
882 15:53:00.765140 PCI: 00:14.3 [8086/0000] bus ops
883 15:53:00.767994 PCI: 00:14.3 [8086/a0f0] enabled
884 15:53:00.771730 PCI: 00:15.0 [8086/0000] bus ops
885 15:53:00.774812 PCI: 00:15.0 [8086/a0e8] enabled
886 15:53:00.778078 PCI: 00:15.1 [8086/0000] bus ops
887 15:53:00.781312 PCI: 00:15.1 [8086/a0e9] enabled
888 15:53:00.784716 PCI: 00:15.2 [8086/0000] bus ops
889 15:53:00.787768 PCI: 00:15.2 [8086/a0ea] enabled
890 15:53:00.791295 PCI: 00:15.3 [8086/0000] bus ops
891 15:53:00.794850 PCI: 00:15.3 [8086/a0eb] enabled
892 15:53:00.797896 PCI: 00:16.0 [8086/0000] ops
893 15:53:00.801582 PCI: 00:16.0 [8086/a0e0] enabled
894 15:53:00.807891 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 15:53:00.810924 PCI: 00:19.0 [8086/0000] bus ops
896 15:53:00.814727 PCI: 00:19.0 [8086/a0c5] disabled
897 15:53:00.817517 PCI: 00:19.1 [8086/0000] bus ops
898 15:53:00.820940 PCI: 00:19.1 [8086/a0c6] enabled
899 15:53:00.824542 PCI: 00:1d.0 [8086/0000] bus ops
900 15:53:00.827956 PCI: 00:1d.0 [8086/a0b0] enabled
901 15:53:00.831018 PCI: 00:1e.0 [8086/0000] ops
902 15:53:00.834024 PCI: 00:1e.0 [8086/a0a8] enabled
903 15:53:00.837462 PCI: 00:1e.2 [8086/0000] bus ops
904 15:53:00.840560 PCI: 00:1e.2 [8086/a0aa] enabled
905 15:53:00.843913 PCI: 00:1e.3 [8086/0000] bus ops
906 15:53:00.849159 PCI: 00:1e.3 [8086/a0ab] enabled
907 15:53:00.850803 PCI: 00:1f.0 [8086/0000] bus ops
908 15:53:00.854525 PCI: 00:1f.0 [8086/a087] enabled
909 15:53:00.857328 RTC Init
910 15:53:00.860321 Set power on after power failure.
911 15:53:00.860913 Disabling Deep S3
912 15:53:00.863915 Disabling Deep S3
913 15:53:00.864345 Disabling Deep S4
914 15:53:00.866901 Disabling Deep S4
915 15:53:00.867330 Disabling Deep S5
916 15:53:00.870532 Disabling Deep S5
917 15:53:00.873943 PCI: 00:1f.2 [0000/0000] hidden
918 15:53:00.877162 PCI: 00:1f.3 [8086/0000] bus ops
919 15:53:00.880407 PCI: 00:1f.3 [8086/a0c8] enabled
920 15:53:00.883566 PCI: 00:1f.5 [8086/0000] bus ops
921 15:53:00.886774 PCI: 00:1f.5 [8086/a0a4] enabled
922 15:53:00.890359 PCI: Leftover static devices:
923 15:53:00.891015 PCI: 00:10.2
924 15:53:00.893606 PCI: 00:10.6
925 15:53:00.894024 PCI: 00:10.7
926 15:53:00.897124 PCI: 00:06.0
927 15:53:00.897547 PCI: 00:07.1
928 15:53:00.897883 PCI: 00:07.2
929 15:53:00.900416 PCI: 00:07.3
930 15:53:00.900902 PCI: 00:09.0
931 15:53:00.903386 PCI: 00:0d.1
932 15:53:00.903801 PCI: 00:0d.2
933 15:53:00.906922 PCI: 00:0d.3
934 15:53:00.907434 PCI: 00:0e.0
935 15:53:00.907770 PCI: 00:12.0
936 15:53:00.910007 PCI: 00:12.6
937 15:53:00.910424 PCI: 00:13.0
938 15:53:00.913310 PCI: 00:14.1
939 15:53:00.913734 PCI: 00:16.1
940 15:53:00.914068 PCI: 00:16.2
941 15:53:00.916812 PCI: 00:16.3
942 15:53:00.917226 PCI: 00:16.4
943 15:53:00.920020 PCI: 00:16.5
944 15:53:00.920438 PCI: 00:17.0
945 15:53:00.923321 PCI: 00:19.2
946 15:53:00.923735 PCI: 00:1e.1
947 15:53:00.924070 PCI: 00:1f.1
948 15:53:00.927081 PCI: 00:1f.4
949 15:53:00.927495 PCI: 00:1f.6
950 15:53:00.930050 PCI: 00:1f.7
951 15:53:00.932962 PCI: Check your devicetree.cb.
952 15:53:00.933422 PCI: 00:02.0 scanning...
953 15:53:00.936892 scan_generic_bus for PCI: 00:02.0
954 15:53:00.943035 scan_generic_bus for PCI: 00:02.0 done
955 15:53:00.946317 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 15:53:00.949747 PCI: 00:04.0 scanning...
957 15:53:00.953129 scan_generic_bus for PCI: 00:04.0
958 15:53:00.956171 GENERIC: 0.0 enabled
959 15:53:00.959640 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 15:53:00.966192 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 15:53:00.969458 PCI: 00:0d.0 scanning...
962 15:53:00.973137 scan_static_bus for PCI: 00:0d.0
963 15:53:00.973575 USB0 port 0 enabled
964 15:53:00.976178 USB0 port 0 scanning...
965 15:53:00.979498 scan_static_bus for USB0 port 0
966 15:53:00.982690 USB3 port 0 enabled
967 15:53:00.983114 USB3 port 1 enabled
968 15:53:00.985756 USB3 port 2 disabled
969 15:53:00.988923 USB3 port 3 disabled
970 15:53:00.989346 USB3 port 0 scanning...
971 15:53:00.992988 scan_static_bus for USB3 port 0
972 15:53:00.999590 scan_static_bus for USB3 port 0 done
973 15:53:01.002696 scan_bus: bus USB3 port 0 finished in 6 msecs
974 15:53:01.006132 USB3 port 1 scanning...
975 15:53:01.009003 scan_static_bus for USB3 port 1
976 15:53:01.012343 scan_static_bus for USB3 port 1 done
977 15:53:01.016036 scan_bus: bus USB3 port 1 finished in 6 msecs
978 15:53:01.019147 scan_static_bus for USB0 port 0 done
979 15:53:01.026039 scan_bus: bus USB0 port 0 finished in 43 msecs
980 15:53:01.029120 scan_static_bus for PCI: 00:0d.0 done
981 15:53:01.032680 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 15:53:01.035484 PCI: 00:14.0 scanning...
983 15:53:01.038665 scan_static_bus for PCI: 00:14.0
984 15:53:01.042176 USB0 port 0 enabled
985 15:53:01.045389 USB0 port 0 scanning...
986 15:53:01.048407 scan_static_bus for USB0 port 0
987 15:53:01.049002 USB2 port 0 disabled
988 15:53:01.052171 USB2 port 1 enabled
989 15:53:01.055064 USB2 port 2 enabled
990 15:53:01.055649 USB2 port 3 disabled
991 15:53:01.059028 USB2 port 4 enabled
992 15:53:01.062008 USB2 port 5 disabled
993 15:53:01.062686 USB2 port 6 disabled
994 15:53:01.065256 USB2 port 7 disabled
995 15:53:01.065690 USB2 port 8 disabled
996 15:53:01.068528 USB2 port 9 disabled
997 15:53:01.071734 USB3 port 0 disabled
998 15:53:01.072156 USB3 port 1 enabled
999 15:53:01.074844 USB3 port 2 disabled
1000 15:53:01.078450 USB3 port 3 disabled
1001 15:53:01.078944 USB2 port 1 scanning...
1002 15:53:01.082175 scan_static_bus for USB2 port 1
1003 15:53:01.088552 scan_static_bus for USB2 port 1 done
1004 15:53:01.092097 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 15:53:01.095072 USB2 port 2 scanning...
1006 15:53:01.098542 scan_static_bus for USB2 port 2
1007 15:53:01.101746 scan_static_bus for USB2 port 2 done
1008 15:53:01.104901 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 15:53:01.108113 USB2 port 4 scanning...
1010 15:53:01.111285 scan_static_bus for USB2 port 4
1011 15:53:01.114731 scan_static_bus for USB2 port 4 done
1012 15:53:01.121567 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 15:53:01.122091 USB3 port 1 scanning...
1014 15:53:01.124351 scan_static_bus for USB3 port 1
1015 15:53:01.131342 scan_static_bus for USB3 port 1 done
1016 15:53:01.134453 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 15:53:01.138258 scan_static_bus for USB0 port 0 done
1018 15:53:01.141468 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 15:53:01.148075 scan_static_bus for PCI: 00:14.0 done
1020 15:53:01.151015 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1021 15:53:01.154710 PCI: 00:14.3 scanning...
1022 15:53:01.157923 scan_static_bus for PCI: 00:14.3
1023 15:53:01.158411 GENERIC: 0.0 enabled
1024 15:53:01.164827 scan_static_bus for PCI: 00:14.3 done
1025 15:53:01.168484 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 15:53:01.171687 PCI: 00:15.0 scanning...
1027 15:53:01.175322 scan_static_bus for PCI: 00:15.0
1028 15:53:01.175807 I2C: 00:1a enabled
1029 15:53:01.178196 I2C: 00:31 enabled
1030 15:53:01.181605 I2C: 00:32 enabled
1031 15:53:01.184493 scan_static_bus for PCI: 00:15.0 done
1032 15:53:01.187840 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 15:53:01.191485 PCI: 00:15.1 scanning...
1034 15:53:01.194421 scan_static_bus for PCI: 00:15.1
1035 15:53:01.197862 I2C: 00:10 enabled
1036 15:53:01.201410 scan_static_bus for PCI: 00:15.1 done
1037 15:53:01.204419 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 15:53:01.207773 PCI: 00:15.2 scanning...
1039 15:53:01.211381 scan_static_bus for PCI: 00:15.2
1040 15:53:01.214711 scan_static_bus for PCI: 00:15.2 done
1041 15:53:01.221271 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 15:53:01.221708 PCI: 00:15.3 scanning...
1043 15:53:01.224628 scan_static_bus for PCI: 00:15.3
1044 15:53:01.230646 scan_static_bus for PCI: 00:15.3 done
1045 15:53:01.234417 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 15:53:01.237701 PCI: 00:19.1 scanning...
1047 15:53:01.240410 scan_static_bus for PCI: 00:19.1
1048 15:53:01.243812 I2C: 00:15 enabled
1049 15:53:01.247263 scan_static_bus for PCI: 00:19.1 done
1050 15:53:01.250727 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 15:53:01.254337 PCI: 00:1d.0 scanning...
1052 15:53:01.257204 do_pci_scan_bridge for PCI: 00:1d.0
1053 15:53:01.260776 PCI: pci_scan_bus for bus 01
1054 15:53:01.263770 PCI: 01:00.0 [1c5c/174a] enabled
1055 15:53:01.267023 GENERIC: 0.0 enabled
1056 15:53:01.270453 Enabling Common Clock Configuration
1057 15:53:01.273879 L1 Sub-State supported from root port 29
1058 15:53:01.276743 L1 Sub-State Support = 0xf
1059 15:53:01.280738 CommonModeRestoreTime = 0x28
1060 15:53:01.283452 Power On Value = 0x16, Power On Scale = 0x0
1061 15:53:01.286883 ASPM: Enabled L1
1062 15:53:01.290450 PCIe: Max_Payload_Size adjusted to 128
1063 15:53:01.293281 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 15:53:01.296671 PCI: 00:1e.2 scanning...
1065 15:53:01.300329 scan_generic_bus for PCI: 00:1e.2
1066 15:53:01.303116 SPI: 00 enabled
1067 15:53:01.309660 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 15:53:01.313192 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 15:53:01.316485 PCI: 00:1e.3 scanning...
1070 15:53:01.319898 scan_generic_bus for PCI: 00:1e.3
1071 15:53:01.320366 SPI: 00 enabled
1072 15:53:01.326245 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 15:53:01.333104 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 15:53:01.333523 PCI: 00:1f.0 scanning...
1075 15:53:01.336095 scan_static_bus for PCI: 00:1f.0
1076 15:53:01.339539 PNP: 0c09.0 enabled
1077 15:53:01.342744 PNP: 0c09.0 scanning...
1078 15:53:01.345847 scan_static_bus for PNP: 0c09.0
1079 15:53:01.349454 scan_static_bus for PNP: 0c09.0 done
1080 15:53:01.352613 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 15:53:01.359696 scan_static_bus for PCI: 00:1f.0 done
1082 15:53:01.362433 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 15:53:01.365956 PCI: 00:1f.2 scanning...
1084 15:53:01.368972 scan_static_bus for PCI: 00:1f.2
1085 15:53:01.372388 GENERIC: 0.0 enabled
1086 15:53:01.372804 GENERIC: 0.0 scanning...
1087 15:53:01.375695 scan_static_bus for GENERIC: 0.0
1088 15:53:01.379340 GENERIC: 0.0 enabled
1089 15:53:01.382617 GENERIC: 1.0 enabled
1090 15:53:01.385892 scan_static_bus for GENERIC: 0.0 done
1091 15:53:01.389287 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 15:53:01.392104 scan_static_bus for PCI: 00:1f.2 done
1093 15:53:01.399052 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 15:53:01.402290 PCI: 00:1f.3 scanning...
1095 15:53:01.405212 scan_static_bus for PCI: 00:1f.3
1096 15:53:01.408514 scan_static_bus for PCI: 00:1f.3 done
1097 15:53:01.411946 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 15:53:01.415518 PCI: 00:1f.5 scanning...
1099 15:53:01.418877 scan_generic_bus for PCI: 00:1f.5
1100 15:53:01.421946 scan_generic_bus for PCI: 00:1f.5 done
1101 15:53:01.428597 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 15:53:01.431583 scan_bus: bus DOMAIN: 0000 finished in 718 msecs
1103 15:53:01.435034 scan_static_bus for Root Device done
1104 15:53:01.441580 scan_bus: bus Root Device finished in 737 msecs
1105 15:53:01.441999 done
1106 15:53:01.448187 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 15:53:01.451580 Chrome EC: UHEPI supported
1108 15:53:01.457935 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 15:53:01.465098 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 15:53:01.467723 SPI flash protection: WPSW=0 SRP0=0
1111 15:53:01.471128 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 15:53:01.477688 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 15:53:01.481174 found VGA at PCI: 00:02.0
1114 15:53:01.484474 Setting up VGA for PCI: 00:02.0
1115 15:53:01.487653 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 15:53:01.494073 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 15:53:01.497507 Allocating resources...
1118 15:53:01.497997 Reading resources...
1119 15:53:01.503712 Root Device read_resources bus 0 link: 0
1120 15:53:01.507453 DOMAIN: 0000 read_resources bus 0 link: 0
1121 15:53:01.513710 PCI: 00:04.0 read_resources bus 1 link: 0
1122 15:53:01.517175 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 15:53:01.523739 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 15:53:01.526994 USB0 port 0 read_resources bus 0 link: 0
1125 15:53:01.533429 USB0 port 0 read_resources bus 0 link: 0 done
1126 15:53:01.536708 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 15:53:01.539657 PCI: 00:14.0 read_resources bus 0 link: 0
1128 15:53:01.546413 USB0 port 0 read_resources bus 0 link: 0
1129 15:53:01.549953 USB0 port 0 read_resources bus 0 link: 0 done
1130 15:53:01.556657 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 15:53:01.560365 PCI: 00:14.3 read_resources bus 0 link: 0
1132 15:53:01.566835 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 15:53:01.570278 PCI: 00:15.0 read_resources bus 0 link: 0
1134 15:53:01.576834 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 15:53:01.580243 PCI: 00:15.1 read_resources bus 0 link: 0
1136 15:53:01.586671 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 15:53:01.590082 PCI: 00:19.1 read_resources bus 0 link: 0
1138 15:53:01.597088 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 15:53:01.600649 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 15:53:01.607428 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 15:53:01.610241 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 15:53:01.617253 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 15:53:01.620467 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 15:53:01.627566 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 15:53:01.630257 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 15:53:01.637199 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 15:53:01.639883 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 15:53:01.643338 GENERIC: 0.0 read_resources bus 0 link: 0
1149 15:53:01.651313 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 15:53:01.653728 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 15:53:01.661339 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 15:53:01.664667 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 15:53:01.670969 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 15:53:01.674293 Root Device read_resources bus 0 link: 0 done
1155 15:53:01.678066 Done reading resources.
1156 15:53:01.684433 Show resources in subtree (Root Device)...After reading.
1157 15:53:01.687598 Root Device child on link 0 DOMAIN: 0000
1158 15:53:01.691179 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 15:53:01.700826 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 15:53:01.710766 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 15:53:01.714323 PCI: 00:00.0
1162 15:53:01.724047 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 15:53:01.734038 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 15:53:01.740213 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 15:53:01.750016 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 15:53:01.760048 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 15:53:01.770462 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 15:53:01.779750 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 15:53:01.789673 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 15:53:01.796568 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 15:53:01.806292 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 15:53:01.815804 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 15:53:01.826032 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 15:53:01.835774 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 15:53:01.846043 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 15:53:01.852454 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 15:53:01.862188 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 15:53:01.871820 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 15:53:01.881648 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 15:53:01.892024 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 15:53:01.901811 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 15:53:01.902372 PCI: 00:02.0
1183 15:53:01.914661 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 15:53:01.924695 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 15:53:01.931502 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 15:53:01.937635 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 15:53:01.947636 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 15:53:01.948145 GENERIC: 0.0
1189 15:53:01.950984 PCI: 00:05.0
1190 15:53:01.960603 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 15:53:01.963730 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 15:53:01.967620 GENERIC: 0.0
1193 15:53:01.968058 PCI: 00:08.0
1194 15:53:01.977080 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 15:53:01.980713 PCI: 00:0a.0
1196 15:53:01.983928 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 15:53:01.994073 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 15:53:02.000244 USB0 port 0 child on link 0 USB3 port 0
1199 15:53:02.000787 USB3 port 0
1200 15:53:02.003353 USB3 port 1
1201 15:53:02.003788 USB3 port 2
1202 15:53:02.007012 USB3 port 3
1203 15:53:02.009900 PCI: 00:14.0 child on link 0 USB0 port 0
1204 15:53:02.019883 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 15:53:02.023309 USB0 port 0 child on link 0 USB2 port 0
1206 15:53:02.026739 USB2 port 0
1207 15:53:02.030376 USB2 port 1
1208 15:53:02.030940 USB2 port 2
1209 15:53:02.033307 USB2 port 3
1210 15:53:02.033791 USB2 port 4
1211 15:53:02.036706 USB2 port 5
1212 15:53:02.037146 USB2 port 6
1213 15:53:02.039584 USB2 port 7
1214 15:53:02.040102 USB2 port 8
1215 15:53:02.043169 USB2 port 9
1216 15:53:02.043611 USB3 port 0
1217 15:53:02.046229 USB3 port 1
1218 15:53:02.046755 USB3 port 2
1219 15:53:02.049467 USB3 port 3
1220 15:53:02.049900 PCI: 00:14.2
1221 15:53:02.059786 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 15:53:02.072727 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 15:53:02.075839 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 15:53:02.086276 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 15:53:02.086871 GENERIC: 0.0
1226 15:53:02.092438 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 15:53:02.102183 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 15:53:02.102767 I2C: 00:1a
1229 15:53:02.105300 I2C: 00:31
1230 15:53:02.105724 I2C: 00:32
1231 15:53:02.111864 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 15:53:02.121703 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 15:53:02.122168 I2C: 00:10
1234 15:53:02.125367 PCI: 00:15.2
1235 15:53:02.135136 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 15:53:02.135565 PCI: 00:15.3
1237 15:53:02.145023 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 15:53:02.148164 PCI: 00:16.0
1239 15:53:02.158378 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 15:53:02.158946 PCI: 00:19.0
1241 15:53:02.161116 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 15:53:02.171292 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 15:53:02.174352 I2C: 00:15
1244 15:53:02.177923 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 15:53:02.188259 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 15:53:02.197832 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 15:53:02.207275 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 15:53:02.207705 GENERIC: 0.0
1249 15:53:02.210699 PCI: 01:00.0
1250 15:53:02.220959 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 15:53:02.230088 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 15:53:02.237179 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 15:53:02.240098 PCI: 00:1e.0
1254 15:53:02.250139 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 15:53:02.257185 PCI: 00:1e.2 child on link 0 SPI: 00
1256 15:53:02.266742 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 15:53:02.267198 SPI: 00
1258 15:53:02.269946 PCI: 00:1e.3 child on link 0 SPI: 00
1259 15:53:02.279770 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 15:53:02.283394 SPI: 00
1261 15:53:02.286552 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 15:53:02.296285 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 15:53:02.296712 PNP: 0c09.0
1264 15:53:02.306386 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 15:53:02.309710 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 15:53:02.319617 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 15:53:02.329497 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 15:53:02.332278 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 15:53:02.335782 GENERIC: 0.0
1270 15:53:02.336206 GENERIC: 1.0
1271 15:53:02.339219 PCI: 00:1f.3
1272 15:53:02.349043 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 15:53:02.358937 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 15:53:02.359368 PCI: 00:1f.5
1275 15:53:02.368890 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 15:53:02.372401 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 15:53:02.375274 APIC: 00
1278 15:53:02.375742 APIC: 01
1279 15:53:02.378557 APIC: 03
1280 15:53:02.379044 APIC: 04
1281 15:53:02.379467 APIC: 07
1282 15:53:02.382046 APIC: 06
1283 15:53:02.382466 APIC: 02
1284 15:53:02.385472 APIC: 05
1285 15:53:02.391711 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 15:53:02.398531 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 15:53:02.404894 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 15:53:02.408245 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 15:53:02.414911 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 15:53:02.417770 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 15:53:02.421502 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 15:53:02.427891 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 15:53:02.437999 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 15:53:02.444571 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 15:53:02.451101 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 15:53:02.457803 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 15:53:02.464393 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 15:53:02.474298 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 15:53:02.480778 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 15:53:02.483983 DOMAIN: 0000: Resource ranges:
1301 15:53:02.487588 * Base: 1000, Size: 800, Tag: 100
1302 15:53:02.490202 * Base: 1900, Size: e700, Tag: 100
1303 15:53:02.497221 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 15:53:02.503909 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 15:53:02.510266 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 15:53:02.516932 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 15:53:02.523383 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 15:53:02.533523 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 15:53:02.539968 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 15:53:02.547100 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 15:53:02.556538 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 15:53:02.563083 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 15:53:02.569643 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 15:53:02.579460 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 15:53:02.586159 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 15:53:02.592619 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 15:53:02.602966 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 15:53:02.609350 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 15:53:02.615796 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 15:53:02.626201 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 15:53:02.632386 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 15:53:02.642283 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 15:53:02.648882 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 15:53:02.655651 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 15:53:02.662114 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 15:53:02.672104 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 15:53:02.679096 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 15:53:02.682151 DOMAIN: 0000: Resource ranges:
1329 15:53:02.685172 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 15:53:02.691871 * Base: d0000000, Size: 28000000, Tag: 200
1331 15:53:02.695454 * Base: fa000000, Size: 1000000, Tag: 200
1332 15:53:02.698662 * Base: fb001000, Size: 2fff000, Tag: 200
1333 15:53:02.705311 * Base: fe010000, Size: 2e000, Tag: 200
1334 15:53:02.708970 * Base: fe03f000, Size: d41000, Tag: 200
1335 15:53:02.712069 * Base: fed88000, Size: 8000, Tag: 200
1336 15:53:02.715696 * Base: fed93000, Size: d000, Tag: 200
1337 15:53:02.721883 * Base: feda2000, Size: 1e000, Tag: 200
1338 15:53:02.725141 * Base: fede0000, Size: 1220000, Tag: 200
1339 15:53:02.728111 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 15:53:02.735383 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 15:53:02.741720 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 15:53:02.748050 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 15:53:02.755238 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 15:53:02.761376 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 15:53:02.767922 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 15:53:02.774522 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 15:53:02.781716 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 15:53:02.788145 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 15:53:02.794896 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 15:53:02.801208 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 15:53:02.808137 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 15:53:02.814489 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 15:53:02.821239 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 15:53:02.831372 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 15:53:02.837879 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 15:53:02.844548 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 15:53:02.850702 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 15:53:02.857501 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 15:53:02.864111 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 15:53:02.870957 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 15:53:02.877171 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 15:53:02.883973 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 15:53:02.890396 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 15:53:02.894027 PCI: 00:1d.0: Resource ranges:
1365 15:53:02.897074 * Base: 7fc00000, Size: 100000, Tag: 200
1366 15:53:02.904020 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 15:53:02.910449 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 15:53:02.916677 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 15:53:02.927236 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 15:53:02.933774 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 15:53:02.937139 Root Device assign_resources, bus 0 link: 0
1372 15:53:02.943939 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 15:53:02.949988 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 15:53:02.960340 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 15:53:02.966659 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 15:53:02.976880 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 15:53:02.980039 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 15:53:02.986478 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 15:53:02.993432 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 15:53:03.003018 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 15:53:03.009546 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 15:53:03.013099 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 15:53:03.019384 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 15:53:03.026160 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 15:53:03.032739 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 15:53:03.035925 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 15:53:03.046053 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 15:53:03.052794 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 15:53:03.062510 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 15:53:03.065693 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 15:53:03.069032 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 15:53:03.079120 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 15:53:03.082049 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 15:53:03.089045 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 15:53:03.095438 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 15:53:03.101918 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 15:53:03.104954 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 15:53:03.111632 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 15:53:03.121959 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 15:53:03.128499 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 15:53:03.138718 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 15:53:03.141896 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 15:53:03.148439 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 15:53:03.155029 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 15:53:03.164955 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 15:53:03.174750 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 15:53:03.177950 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 15:53:03.187752 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 15:53:03.194377 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 15:53:03.204737 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 15:53:03.207834 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 15:53:03.217888 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 15:53:03.221030 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 15:53:03.224121 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 15:53:03.234633 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 15:53:03.237219 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 15:53:03.243812 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 15:53:03.247281 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 15:53:03.253796 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 15:53:03.257296 LPC: Trying to open IO window from 800 size 1ff
1421 15:53:03.267375 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 15:53:03.273847 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 15:53:03.280393 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 15:53:03.287107 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 15:53:03.290389 Root Device assign_resources, bus 0 link: 0
1426 15:53:03.293551 Done setting resources.
1427 15:53:03.300088 Show resources in subtree (Root Device)...After assigning values.
1428 15:53:03.303229 Root Device child on link 0 DOMAIN: 0000
1429 15:53:03.310145 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 15:53:03.316593 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 15:53:03.326686 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 15:53:03.329938 PCI: 00:00.0
1433 15:53:03.339874 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 15:53:03.350021 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 15:53:03.360024 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 15:53:03.366537 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 15:53:03.376283 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 15:53:03.386407 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 15:53:03.395934 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 15:53:03.406159 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 15:53:03.416182 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 15:53:03.422495 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 15:53:03.433032 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 15:53:03.442478 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 15:53:03.451851 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 15:53:03.461921 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 15:53:03.468451 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 15:53:03.478192 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 15:53:03.488299 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 15:53:03.498702 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 15:53:03.508058 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 15:53:03.517943 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 15:53:03.521558 PCI: 00:02.0
1454 15:53:03.531109 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 15:53:03.541712 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 15:53:03.551128 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 15:53:03.554585 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 15:53:03.564223 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 15:53:03.567620 GENERIC: 0.0
1460 15:53:03.568054 PCI: 00:05.0
1461 15:53:03.578014 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 15:53:03.584338 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 15:53:03.584845 GENERIC: 0.0
1464 15:53:03.587315 PCI: 00:08.0
1465 15:53:03.597552 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 15:53:03.598047 PCI: 00:0a.0
1467 15:53:03.603890 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 15:53:03.613942 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 15:53:03.617628 USB0 port 0 child on link 0 USB3 port 0
1470 15:53:03.620487 USB3 port 0
1471 15:53:03.620966 USB3 port 1
1472 15:53:03.623737 USB3 port 2
1473 15:53:03.624302 USB3 port 3
1474 15:53:03.630551 PCI: 00:14.0 child on link 0 USB0 port 0
1475 15:53:03.640518 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 15:53:03.643364 USB0 port 0 child on link 0 USB2 port 0
1477 15:53:03.647147 USB2 port 0
1478 15:53:03.647589 USB2 port 1
1479 15:53:03.650525 USB2 port 2
1480 15:53:03.650999 USB2 port 3
1481 15:53:03.653397 USB2 port 4
1482 15:53:03.657030 USB2 port 5
1483 15:53:03.657470 USB2 port 6
1484 15:53:03.660367 USB2 port 7
1485 15:53:03.660831 USB2 port 8
1486 15:53:03.663488 USB2 port 9
1487 15:53:03.663926 USB3 port 0
1488 15:53:03.666797 USB3 port 1
1489 15:53:03.667236 USB3 port 2
1490 15:53:03.669817 USB3 port 3
1491 15:53:03.670297 PCI: 00:14.2
1492 15:53:03.679850 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 15:53:03.693521 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 15:53:03.696584 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 15:53:03.706168 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 15:53:03.709714 GENERIC: 0.0
1497 15:53:03.713143 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 15:53:03.722689 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 15:53:03.726334 I2C: 00:1a
1500 15:53:03.726903 I2C: 00:31
1501 15:53:03.727396 I2C: 00:32
1502 15:53:03.732504 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 15:53:03.742666 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 15:53:03.743099 I2C: 00:10
1505 15:53:03.746102 PCI: 00:15.2
1506 15:53:03.755649 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 15:53:03.759191 PCI: 00:15.3
1508 15:53:03.769228 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 15:53:03.769836 PCI: 00:16.0
1510 15:53:03.779244 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 15:53:03.782225 PCI: 00:19.0
1512 15:53:03.785557 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 15:53:03.795771 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 15:53:03.798574 I2C: 00:15
1515 15:53:03.802178 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 15:53:03.812202 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 15:53:03.822228 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 15:53:03.835484 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 15:53:03.836117 GENERIC: 0.0
1520 15:53:03.838317 PCI: 01:00.0
1521 15:53:03.848547 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 15:53:03.858571 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 15:53:03.868027 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 15:53:03.871379 PCI: 00:1e.0
1525 15:53:03.881059 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 15:53:03.884928 PCI: 00:1e.2 child on link 0 SPI: 00
1527 15:53:03.894739 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 15:53:03.897942 SPI: 00
1529 15:53:03.901118 PCI: 00:1e.3 child on link 0 SPI: 00
1530 15:53:03.911134 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 15:53:03.911580 SPI: 00
1532 15:53:03.917708 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 15:53:03.924219 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 15:53:03.927924 PNP: 0c09.0
1535 15:53:03.937740 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 15:53:03.940818 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 15:53:03.951239 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 15:53:03.960869 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 15:53:03.964071 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 15:53:03.964505 GENERIC: 0.0
1541 15:53:03.967504 GENERIC: 1.0
1542 15:53:03.970857 PCI: 00:1f.3
1543 15:53:03.980724 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 15:53:03.990907 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 15:53:03.991379 PCI: 00:1f.5
1546 15:53:04.000167 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 15:53:04.006736 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 15:53:04.007374 APIC: 00
1549 15:53:04.010693 APIC: 01
1550 15:53:04.011118 APIC: 03
1551 15:53:04.011453 APIC: 04
1552 15:53:04.013584 APIC: 07
1553 15:53:04.014041 APIC: 06
1554 15:53:04.014632 APIC: 02
1555 15:53:04.017239 APIC: 05
1556 15:53:04.020699 Done allocating resources.
1557 15:53:04.027159 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 15:53:04.029905 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 15:53:04.033807 Configure GPIOs for I2S audio on UP4.
1560 15:53:04.041582 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 15:53:04.044962 Enabling resources...
1562 15:53:04.048214 PCI: 00:00.0 subsystem <- 8086/9a12
1563 15:53:04.051612 PCI: 00:00.0 cmd <- 06
1564 15:53:04.054990 PCI: 00:02.0 subsystem <- 8086/9a40
1565 15:53:04.057756 PCI: 00:02.0 cmd <- 03
1566 15:53:04.061384 PCI: 00:04.0 subsystem <- 8086/9a03
1567 15:53:04.064552 PCI: 00:04.0 cmd <- 02
1568 15:53:04.067787 PCI: 00:05.0 subsystem <- 8086/9a19
1569 15:53:04.068209 PCI: 00:05.0 cmd <- 02
1570 15:53:04.074673 PCI: 00:08.0 subsystem <- 8086/9a11
1571 15:53:04.075166 PCI: 00:08.0 cmd <- 06
1572 15:53:04.077863 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 15:53:04.081024 PCI: 00:0d.0 cmd <- 02
1574 15:53:04.084385 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 15:53:04.088052 PCI: 00:14.0 cmd <- 02
1576 15:53:04.091276 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 15:53:04.094410 PCI: 00:14.2 cmd <- 02
1578 15:53:04.097797 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 15:53:04.100992 PCI: 00:14.3 cmd <- 02
1580 15:53:04.104236 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 15:53:04.107499 PCI: 00:15.0 cmd <- 02
1582 15:53:04.111079 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 15:53:04.114119 PCI: 00:15.1 cmd <- 02
1584 15:53:04.117764 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 15:53:04.120809 PCI: 00:15.2 cmd <- 02
1586 15:53:04.123732 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 15:53:04.124235 PCI: 00:15.3 cmd <- 02
1588 15:53:04.130299 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 15:53:04.130883 PCI: 00:16.0 cmd <- 02
1590 15:53:04.133612 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 15:53:04.136788 PCI: 00:19.1 cmd <- 02
1592 15:53:04.140334 PCI: 00:1d.0 bridge ctrl <- 0013
1593 15:53:04.144043 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 15:53:04.147356 PCI: 00:1d.0 cmd <- 06
1595 15:53:04.150031 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 15:53:04.153272 PCI: 00:1e.0 cmd <- 06
1597 15:53:04.156740 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 15:53:04.160303 PCI: 00:1e.2 cmd <- 06
1599 15:53:04.163418 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 15:53:04.166388 PCI: 00:1e.3 cmd <- 02
1601 15:53:04.169997 PCI: 00:1f.0 subsystem <- 8086/a087
1602 15:53:04.173336 PCI: 00:1f.0 cmd <- 407
1603 15:53:04.176495 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 15:53:04.180091 PCI: 00:1f.3 cmd <- 02
1605 15:53:04.183056 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 15:53:04.183478 PCI: 00:1f.5 cmd <- 406
1607 15:53:04.189091 PCI: 01:00.0 cmd <- 02
1608 15:53:04.193701 done.
1609 15:53:04.196506 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 15:53:04.200300 Initializing devices...
1611 15:53:04.203321 Root Device init
1612 15:53:04.206720 Chrome EC: Set SMI mask to 0x0000000000000000
1613 15:53:04.213416 Chrome EC: clear events_b mask to 0x0000000000000000
1614 15:53:04.220158 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 15:53:04.226738 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 15:53:04.232995 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 15:53:04.236375 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 15:53:04.243997 fw_config match found: DB_USB=USB3_ACTIVE
1619 15:53:04.246688 Configure Right Type-C port orientation for retimer
1620 15:53:04.250222 Root Device init finished in 45 msecs
1621 15:53:04.254546 PCI: 00:00.0 init
1622 15:53:04.257849 CPU TDP = 9 Watts
1623 15:53:04.258332 CPU PL1 = 9 Watts
1624 15:53:04.261473 CPU PL2 = 40 Watts
1625 15:53:04.264575 CPU PL4 = 83 Watts
1626 15:53:04.267665 PCI: 00:00.0 init finished in 8 msecs
1627 15:53:04.271085 PCI: 00:02.0 init
1628 15:53:04.271499 GMA: Found VBT in CBFS
1629 15:53:04.273953 GMA: Found valid VBT in CBFS
1630 15:53:04.280954 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 15:53:04.287369 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 15:53:04.290909 PCI: 00:02.0 init finished in 18 msecs
1633 15:53:04.294081 PCI: 00:05.0 init
1634 15:53:04.297646 PCI: 00:05.0 init finished in 0 msecs
1635 15:53:04.300222 PCI: 00:08.0 init
1636 15:53:04.304058 PCI: 00:08.0 init finished in 0 msecs
1637 15:53:04.307488 PCI: 00:14.0 init
1638 15:53:04.310191 PCI: 00:14.0 init finished in 0 msecs
1639 15:53:04.313736 PCI: 00:14.2 init
1640 15:53:04.317167 PCI: 00:14.2 init finished in 0 msecs
1641 15:53:04.320762 PCI: 00:15.0 init
1642 15:53:04.323762 I2C bus 0 version 0x3230302a
1643 15:53:04.326756 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 15:53:04.330491 PCI: 00:15.0 init finished in 6 msecs
1645 15:53:04.333343 PCI: 00:15.1 init
1646 15:53:04.333797 I2C bus 1 version 0x3230302a
1647 15:53:04.340208 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 15:53:04.343169 PCI: 00:15.1 init finished in 6 msecs
1649 15:53:04.343591 PCI: 00:15.2 init
1650 15:53:04.346723 I2C bus 2 version 0x3230302a
1651 15:53:04.350220 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 15:53:04.356673 PCI: 00:15.2 init finished in 6 msecs
1653 15:53:04.357120 PCI: 00:15.3 init
1654 15:53:04.359666 I2C bus 3 version 0x3230302a
1655 15:53:04.363397 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 15:53:04.366150 PCI: 00:15.3 init finished in 6 msecs
1657 15:53:04.369725 PCI: 00:16.0 init
1658 15:53:04.373156 PCI: 00:16.0 init finished in 0 msecs
1659 15:53:04.376434 PCI: 00:19.1 init
1660 15:53:04.380038 I2C bus 5 version 0x3230302a
1661 15:53:04.382892 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 15:53:04.386311 PCI: 00:19.1 init finished in 6 msecs
1663 15:53:04.389296 PCI: 00:1d.0 init
1664 15:53:04.392975 Initializing PCH PCIe bridge.
1665 15:53:04.396289 PCI: 00:1d.0 init finished in 3 msecs
1666 15:53:04.399085 PCI: 00:1f.0 init
1667 15:53:04.402889 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 15:53:04.409632 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 15:53:04.410111 IOAPIC: ID = 0x02
1670 15:53:04.412431 IOAPIC: Dumping registers
1671 15:53:04.416066 reg 0x0000: 0x02000000
1672 15:53:04.416481 reg 0x0001: 0x00770020
1673 15:53:04.419080 reg 0x0002: 0x00000000
1674 15:53:04.422448 PCI: 00:1f.0 init finished in 21 msecs
1675 15:53:04.426208 PCI: 00:1f.2 init
1676 15:53:04.429695 Disabling ACPI via APMC.
1677 15:53:04.432718 APMC done.
1678 15:53:04.436236 PCI: 00:1f.2 init finished in 5 msecs
1679 15:53:04.447087 PCI: 01:00.0 init
1680 15:53:04.450242 PCI: 01:00.0 init finished in 0 msecs
1681 15:53:04.453452 PNP: 0c09.0 init
1682 15:53:04.457137 Google Chrome EC uptime: 8.434 seconds
1683 15:53:04.463484 Google Chrome AP resets since EC boot: 1
1684 15:53:04.466620 Google Chrome most recent AP reset causes:
1685 15:53:04.470203 0.349: 32775 shutdown: entering G3
1686 15:53:04.477230 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1687 15:53:04.480214 PNP: 0c09.0 init finished in 23 msecs
1688 15:53:04.486331 Devices initialized
1689 15:53:04.490018 Show all devs... After init.
1690 15:53:04.493148 Root Device: enabled 1
1691 15:53:04.493683 DOMAIN: 0000: enabled 1
1692 15:53:04.496212 CPU_CLUSTER: 0: enabled 1
1693 15:53:04.499835 PCI: 00:00.0: enabled 1
1694 15:53:04.502666 PCI: 00:02.0: enabled 1
1695 15:53:04.503081 PCI: 00:04.0: enabled 1
1696 15:53:04.506562 PCI: 00:05.0: enabled 1
1697 15:53:04.509810 PCI: 00:06.0: enabled 0
1698 15:53:04.512743 PCI: 00:07.0: enabled 0
1699 15:53:04.513259 PCI: 00:07.1: enabled 0
1700 15:53:04.516176 PCI: 00:07.2: enabled 0
1701 15:53:04.519275 PCI: 00:07.3: enabled 0
1702 15:53:04.522723 PCI: 00:08.0: enabled 1
1703 15:53:04.523241 PCI: 00:09.0: enabled 0
1704 15:53:04.526121 PCI: 00:0a.0: enabled 0
1705 15:53:04.528921 PCI: 00:0d.0: enabled 1
1706 15:53:04.532428 PCI: 00:0d.1: enabled 0
1707 15:53:04.533002 PCI: 00:0d.2: enabled 0
1708 15:53:04.535309 PCI: 00:0d.3: enabled 0
1709 15:53:04.539152 PCI: 00:0e.0: enabled 0
1710 15:53:04.542272 PCI: 00:10.2: enabled 1
1711 15:53:04.542719 PCI: 00:10.6: enabled 0
1712 15:53:04.545947 PCI: 00:10.7: enabled 0
1713 15:53:04.549483 PCI: 00:12.0: enabled 0
1714 15:53:04.552089 PCI: 00:12.6: enabled 0
1715 15:53:04.552502 PCI: 00:13.0: enabled 0
1716 15:53:04.555491 PCI: 00:14.0: enabled 1
1717 15:53:04.558783 PCI: 00:14.1: enabled 0
1718 15:53:04.559201 PCI: 00:14.2: enabled 1
1719 15:53:04.561863 PCI: 00:14.3: enabled 1
1720 15:53:04.565704 PCI: 00:15.0: enabled 1
1721 15:53:04.568436 PCI: 00:15.1: enabled 1
1722 15:53:04.568859 PCI: 00:15.2: enabled 1
1723 15:53:04.572032 PCI: 00:15.3: enabled 1
1724 15:53:04.575385 PCI: 00:16.0: enabled 1
1725 15:53:04.579044 PCI: 00:16.1: enabled 0
1726 15:53:04.579456 PCI: 00:16.2: enabled 0
1727 15:53:04.581806 PCI: 00:16.3: enabled 0
1728 15:53:04.585287 PCI: 00:16.4: enabled 0
1729 15:53:04.588717 PCI: 00:16.5: enabled 0
1730 15:53:04.589170 PCI: 00:17.0: enabled 0
1731 15:53:04.591986 PCI: 00:19.0: enabled 0
1732 15:53:04.595234 PCI: 00:19.1: enabled 1
1733 15:53:04.598296 PCI: 00:19.2: enabled 0
1734 15:53:04.598761 PCI: 00:1c.0: enabled 1
1735 15:53:04.601626 PCI: 00:1c.1: enabled 0
1736 15:53:04.605015 PCI: 00:1c.2: enabled 0
1737 15:53:04.605429 PCI: 00:1c.3: enabled 0
1738 15:53:04.608442 PCI: 00:1c.4: enabled 0
1739 15:53:04.612027 PCI: 00:1c.5: enabled 0
1740 15:53:04.614844 PCI: 00:1c.6: enabled 1
1741 15:53:04.615260 PCI: 00:1c.7: enabled 0
1742 15:53:04.618291 PCI: 00:1d.0: enabled 1
1743 15:53:04.621979 PCI: 00:1d.1: enabled 0
1744 15:53:04.624737 PCI: 00:1d.2: enabled 1
1745 15:53:04.625150 PCI: 00:1d.3: enabled 0
1746 15:53:04.628511 PCI: 00:1e.0: enabled 1
1747 15:53:04.631268 PCI: 00:1e.1: enabled 0
1748 15:53:04.634588 PCI: 00:1e.2: enabled 1
1749 15:53:04.635046 PCI: 00:1e.3: enabled 1
1750 15:53:04.638214 PCI: 00:1f.0: enabled 1
1751 15:53:04.641553 PCI: 00:1f.1: enabled 0
1752 15:53:04.644811 PCI: 00:1f.2: enabled 1
1753 15:53:04.645221 PCI: 00:1f.3: enabled 1
1754 15:53:04.648124 PCI: 00:1f.4: enabled 0
1755 15:53:04.651812 PCI: 00:1f.5: enabled 1
1756 15:53:04.654662 PCI: 00:1f.6: enabled 0
1757 15:53:04.655077 PCI: 00:1f.7: enabled 0
1758 15:53:04.658354 APIC: 00: enabled 1
1759 15:53:04.661083 GENERIC: 0.0: enabled 1
1760 15:53:04.661496 GENERIC: 0.0: enabled 1
1761 15:53:04.664504 GENERIC: 1.0: enabled 1
1762 15:53:04.667838 GENERIC: 0.0: enabled 1
1763 15:53:04.671173 GENERIC: 1.0: enabled 1
1764 15:53:04.671586 USB0 port 0: enabled 1
1765 15:53:04.674694 GENERIC: 0.0: enabled 1
1766 15:53:04.677726 USB0 port 0: enabled 1
1767 15:53:04.678139 GENERIC: 0.0: enabled 1
1768 15:53:04.681255 I2C: 00:1a: enabled 1
1769 15:53:04.684774 I2C: 00:31: enabled 1
1770 15:53:04.687650 I2C: 00:32: enabled 1
1771 15:53:04.688099 I2C: 00:10: enabled 1
1772 15:53:04.691026 I2C: 00:15: enabled 1
1773 15:53:04.694475 GENERIC: 0.0: enabled 0
1774 15:53:04.694924 GENERIC: 1.0: enabled 0
1775 15:53:04.697454 GENERIC: 0.0: enabled 1
1776 15:53:04.700892 SPI: 00: enabled 1
1777 15:53:04.701310 SPI: 00: enabled 1
1778 15:53:04.704046 PNP: 0c09.0: enabled 1
1779 15:53:04.707577 GENERIC: 0.0: enabled 1
1780 15:53:04.707976 USB3 port 0: enabled 1
1781 15:53:04.710901 USB3 port 1: enabled 1
1782 15:53:04.713921 USB3 port 2: enabled 0
1783 15:53:04.717184 USB3 port 3: enabled 0
1784 15:53:04.717634 USB2 port 0: enabled 0
1785 15:53:04.720769 USB2 port 1: enabled 1
1786 15:53:04.723860 USB2 port 2: enabled 1
1787 15:53:04.724352 USB2 port 3: enabled 0
1788 15:53:04.727279 USB2 port 4: enabled 1
1789 15:53:04.730582 USB2 port 5: enabled 0
1790 15:53:04.733596 USB2 port 6: enabled 0
1791 15:53:04.734013 USB2 port 7: enabled 0
1792 15:53:04.736950 USB2 port 8: enabled 0
1793 15:53:04.740335 USB2 port 9: enabled 0
1794 15:53:04.740753 USB3 port 0: enabled 0
1795 15:53:04.743480 USB3 port 1: enabled 1
1796 15:53:04.746898 USB3 port 2: enabled 0
1797 15:53:04.750220 USB3 port 3: enabled 0
1798 15:53:04.750677 GENERIC: 0.0: enabled 1
1799 15:53:04.753307 GENERIC: 1.0: enabled 1
1800 15:53:04.756818 APIC: 01: enabled 1
1801 15:53:04.757237 APIC: 03: enabled 1
1802 15:53:04.760205 APIC: 04: enabled 1
1803 15:53:04.763186 APIC: 07: enabled 1
1804 15:53:04.763606 APIC: 06: enabled 1
1805 15:53:04.766420 APIC: 02: enabled 1
1806 15:53:04.766894 APIC: 05: enabled 1
1807 15:53:04.769977 PCI: 01:00.0: enabled 1
1808 15:53:04.776585 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1809 15:53:04.779989 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1810 15:53:04.783029 ELOG: NV offset 0xf30000 size 0x1000
1811 15:53:04.791649 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1812 15:53:04.797887 ELOG: Event(17) added with size 13 at 2023-08-07 15:53:05 UTC
1813 15:53:04.804279 ELOG: Event(92) added with size 9 at 2023-08-07 15:53:05 UTC
1814 15:53:04.811324 ELOG: Event(93) added with size 9 at 2023-08-07 15:53:05 UTC
1815 15:53:04.817786 ELOG: Event(9E) added with size 10 at 2023-08-07 15:53:05 UTC
1816 15:53:04.824268 ELOG: Event(9F) added with size 14 at 2023-08-07 15:53:05 UTC
1817 15:53:04.831145 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1818 15:53:04.837458 ELOG: Event(A1) added with size 10 at 2023-08-07 15:53:05 UTC
1819 15:53:04.840337 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1820 15:53:04.847609 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1821 15:53:04.850288 Finalize devices...
1822 15:53:04.850754 Devices finalized
1823 15:53:04.857346 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1824 15:53:04.863867 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1825 15:53:04.866998 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1826 15:53:04.873677 ME: HFSTS1 : 0x80030055
1827 15:53:04.877350 ME: HFSTS2 : 0x30280116
1828 15:53:04.883487 ME: HFSTS3 : 0x00000050
1829 15:53:04.887056 ME: HFSTS4 : 0x00004000
1830 15:53:04.890480 ME: HFSTS5 : 0x00000000
1831 15:53:04.896881 ME: HFSTS6 : 0x00400006
1832 15:53:04.900437 ME: Manufacturing Mode : YES
1833 15:53:04.903286 ME: SPI Protection Mode Enabled : NO
1834 15:53:04.906777 ME: FW Partition Table : OK
1835 15:53:04.909810 ME: Bringup Loader Failure : NO
1836 15:53:04.913198 ME: Firmware Init Complete : NO
1837 15:53:04.916820 ME: Boot Options Present : NO
1838 15:53:04.920101 ME: Update In Progress : NO
1839 15:53:04.926811 ME: D0i3 Support : YES
1840 15:53:04.929695 ME: Low Power State Enabled : NO
1841 15:53:04.933224 ME: CPU Replaced : YES
1842 15:53:04.936860 ME: CPU Replacement Valid : YES
1843 15:53:04.939743 ME: Current Working State : 5
1844 15:53:04.943625 ME: Current Operation State : 1
1845 15:53:04.946513 ME: Current Operation Mode : 3
1846 15:53:04.949931 ME: Error Code : 0
1847 15:53:04.956550 ME: Enhanced Debug Mode : NO
1848 15:53:04.960052 ME: CPU Debug Disabled : YES
1849 15:53:04.962788 ME: TXT Support : NO
1850 15:53:04.969511 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1851 15:53:04.975933 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1852 15:53:04.979385 CBFS: 'fallback/slic' not found.
1853 15:53:04.982724 ACPI: Writing ACPI tables at 76b01000.
1854 15:53:04.985742 ACPI: * FACS
1855 15:53:04.986204 ACPI: * DSDT
1856 15:53:04.989826 Ramoops buffer: 0x100000@0x76a00000.
1857 15:53:04.996097 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1858 15:53:04.999629 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1859 15:53:05.002989 Google Chrome EC: version:
1860 15:53:05.006531 ro: voema_v2.0.7540-147f8d37d1
1861 15:53:05.010159 rw: voema_v2.0.7540-147f8d37d1
1862 15:53:05.013584 running image: 2
1863 15:53:05.020011 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1864 15:53:05.022958 ACPI: * FADT
1865 15:53:05.023375 SCI is IRQ9
1866 15:53:05.026362 ACPI: added table 1/32, length now 40
1867 15:53:05.029745 ACPI: * SSDT
1868 15:53:05.032999 Found 1 CPU(s) with 8 core(s) each.
1869 15:53:05.039827 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1870 15:53:05.042543 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1871 15:53:05.046081 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1872 15:53:05.049739 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1873 15:53:05.056244 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1874 15:53:05.062757 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1875 15:53:05.065761 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1876 15:53:05.072529 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1877 15:53:05.079449 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1878 15:53:05.082204 \_SB.PCI0.RP09: Added StorageD3Enable property
1879 15:53:05.088918 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1880 15:53:05.092269 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1881 15:53:05.098888 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1882 15:53:05.102313 PS2K: Passing 80 keymaps to kernel
1883 15:53:05.109218 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1884 15:53:05.115202 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1885 15:53:05.122124 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1886 15:53:05.128556 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1887 15:53:05.135656 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1888 15:53:05.141965 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1889 15:53:05.148778 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1890 15:53:05.155177 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1891 15:53:05.158518 ACPI: added table 2/32, length now 44
1892 15:53:05.159047 ACPI: * MCFG
1893 15:53:05.161704 ACPI: added table 3/32, length now 48
1894 15:53:05.165528 ACPI: * TPM2
1895 15:53:05.168286 TPM2 log created at 0x769f0000
1896 15:53:05.171618 ACPI: added table 4/32, length now 52
1897 15:53:05.174958 ACPI: * MADT
1898 15:53:05.175379 SCI is IRQ9
1899 15:53:05.178076 ACPI: added table 5/32, length now 56
1900 15:53:05.181416 current = 76b09850
1901 15:53:05.181884 ACPI: * DMAR
1902 15:53:05.184601 ACPI: added table 6/32, length now 60
1903 15:53:05.188163 ACPI: added table 7/32, length now 64
1904 15:53:05.191646 ACPI: * HPET
1905 15:53:05.194678 ACPI: added table 8/32, length now 68
1906 15:53:05.194994 ACPI: done.
1907 15:53:05.197941 ACPI tables: 35216 bytes.
1908 15:53:05.201328 smbios_write_tables: 769ef000
1909 15:53:05.204717 EC returned error result code 3
1910 15:53:05.208043 Couldn't obtain OEM name from CBI
1911 15:53:05.211024 Create SMBIOS type 16
1912 15:53:05.214529 Create SMBIOS type 17
1913 15:53:05.217848 GENERIC: 0.0 (WIFI Device)
1914 15:53:05.221434 SMBIOS tables: 1750 bytes.
1915 15:53:05.224408 Writing table forward entry at 0x00000500
1916 15:53:05.230907 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1917 15:53:05.234314 Writing coreboot table at 0x76b25000
1918 15:53:05.240904 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1919 15:53:05.244633 1. 0000000000001000-000000000009ffff: RAM
1920 15:53:05.247433 2. 00000000000a0000-00000000000fffff: RESERVED
1921 15:53:05.254041 3. 0000000000100000-00000000769eefff: RAM
1922 15:53:05.257713 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1923 15:53:05.264554 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1924 15:53:05.270725 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1925 15:53:05.273914 7. 0000000077000000-000000007fbfffff: RESERVED
1926 15:53:05.280516 8. 00000000c0000000-00000000cfffffff: RESERVED
1927 15:53:05.284306 9. 00000000f8000000-00000000f9ffffff: RESERVED
1928 15:53:05.290408 10. 00000000fb000000-00000000fb000fff: RESERVED
1929 15:53:05.293806 11. 00000000fe000000-00000000fe00ffff: RESERVED
1930 15:53:05.297605 12. 00000000fed80000-00000000fed87fff: RESERVED
1931 15:53:05.303577 13. 00000000fed90000-00000000fed92fff: RESERVED
1932 15:53:05.307134 14. 00000000feda0000-00000000feda1fff: RESERVED
1933 15:53:05.313963 15. 00000000fedc0000-00000000feddffff: RESERVED
1934 15:53:05.316732 16. 0000000100000000-00000002803fffff: RAM
1935 15:53:05.320180 Passing 4 GPIOs to payload:
1936 15:53:05.326498 NAME | PORT | POLARITY | VALUE
1937 15:53:05.329962 lid | undefined | high | high
1938 15:53:05.337028 power | undefined | high | low
1939 15:53:05.339841 oprom | undefined | high | low
1940 15:53:05.346394 EC in RW | 0x000000e5 | high | high
1941 15:53:05.352937 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum cd52
1942 15:53:05.356461 coreboot table: 1576 bytes.
1943 15:53:05.359451 IMD ROOT 0. 0x76fff000 0x00001000
1944 15:53:05.363073 IMD SMALL 1. 0x76ffe000 0x00001000
1945 15:53:05.366676 FSP MEMORY 2. 0x76c4e000 0x003b0000
1946 15:53:05.369373 VPD 3. 0x76c4d000 0x00000367
1947 15:53:05.372779 RO MCACHE 4. 0x76c4c000 0x00000fdc
1948 15:53:05.379214 CONSOLE 5. 0x76c2c000 0x00020000
1949 15:53:05.382694 FMAP 6. 0x76c2b000 0x00000578
1950 15:53:05.385922 TIME STAMP 7. 0x76c2a000 0x00000910
1951 15:53:05.389506 VBOOT WORK 8. 0x76c16000 0x00014000
1952 15:53:05.392749 ROMSTG STCK 9. 0x76c15000 0x00001000
1953 15:53:05.395760 AFTER CAR 10. 0x76c0a000 0x0000b000
1954 15:53:05.399315 RAMSTAGE 11. 0x76b97000 0x00073000
1955 15:53:05.402527 REFCODE 12. 0x76b42000 0x00055000
1956 15:53:05.409357 SMM BACKUP 13. 0x76b32000 0x00010000
1957 15:53:05.412405 4f444749 14. 0x76b30000 0x00002000
1958 15:53:05.415742 EXT VBT15. 0x76b2d000 0x0000219f
1959 15:53:05.418968 COREBOOT 16. 0x76b25000 0x00008000
1960 15:53:05.422456 ACPI 17. 0x76b01000 0x00024000
1961 15:53:05.425719 ACPI GNVS 18. 0x76b00000 0x00001000
1962 15:53:05.429013 RAMOOPS 19. 0x76a00000 0x00100000
1963 15:53:05.432475 TPM2 TCGLOG20. 0x769f0000 0x00010000
1964 15:53:05.435260 SMBIOS 21. 0x769ef000 0x00000800
1965 15:53:05.438513 IMD small region:
1966 15:53:05.442044 IMD ROOT 0. 0x76ffec00 0x00000400
1967 15:53:05.445599 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1968 15:53:05.452084 POWER STATE 2. 0x76ffeb80 0x00000044
1969 15:53:05.455078 ROMSTAGE 3. 0x76ffeb60 0x00000004
1970 15:53:05.458294 MEM INFO 4. 0x76ffe980 0x000001e0
1971 15:53:05.465475 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1972 15:53:05.468199 MTRR: Physical address space:
1973 15:53:05.475040 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1974 15:53:05.478766 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1975 15:53:05.484701 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1976 15:53:05.491859 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1977 15:53:05.498221 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1978 15:53:05.504818 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1979 15:53:05.511443 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1980 15:53:05.514714 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 15:53:05.518149 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 15:53:05.524560 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 15:53:05.528197 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 15:53:05.531260 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 15:53:05.534878 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 15:53:05.541423 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 15:53:05.544450 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 15:53:05.548205 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 15:53:05.551086 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 15:53:05.557363 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 15:53:05.560911 call enable_fixed_mtrr()
1992 15:53:05.564480 CPU physical address size: 39 bits
1993 15:53:05.567268 MTRR: default type WB/UC MTRR counts: 6/6.
1994 15:53:05.571054 MTRR: UC selected as default type.
1995 15:53:05.577350 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1996 15:53:05.583971 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1997 15:53:05.590365 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1998 15:53:05.597334 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1999 15:53:05.604168 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2000 15:53:05.610455 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2001 15:53:05.613407 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 15:53:05.616587 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 15:53:05.623729 MTRR: Fixed MSR 0x259 0x0000000000000000
2004 15:53:05.626574 MTRR: Fixed MSR 0x268 0x0606060606060606
2005 15:53:05.629924 MTRR: Fixed MSR 0x269 0x0606060606060606
2006 15:53:05.633672 MTRR: Fixed MSR 0x26a 0x0606060606060606
2007 15:53:05.639906 MTRR: Fixed MSR 0x26b 0x0606060606060606
2008 15:53:05.642997 MTRR: Fixed MSR 0x26c 0x0606060606060606
2009 15:53:05.646263 MTRR: Fixed MSR 0x26d 0x0606060606060606
2010 15:53:05.649428 MTRR: Fixed MSR 0x26e 0x0606060606060606
2011 15:53:05.656509 MTRR: Fixed MSR 0x26f 0x0606060606060606
2012 15:53:05.656933
2013 15:53:05.657268 MTRR check
2014 15:53:05.659570 call enable_fixed_mtrr()
2015 15:53:05.662975 Fixed MTRRs : Enabled
2016 15:53:05.665978 Variable MTRRs: Enabled
2017 15:53:05.666431
2018 15:53:05.669114 CPU physical address size: 39 bits
2019 15:53:05.675867 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2020 15:53:05.679398 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 15:53:05.685862 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 15:53:05.689169 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 15:53:05.692201 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 15:53:05.695581 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 15:53:05.699049 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 15:53:05.705382 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 15:53:05.708780 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 15:53:05.712258 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 15:53:05.715522 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 15:53:05.722399 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 15:53:05.725454 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 15:53:05.731680 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 15:53:05.735230 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 15:53:05.738683 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 15:53:05.741644 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 15:53:05.745146 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 15:53:05.751730 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 15:53:05.754994 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 15:53:05.758263 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 15:53:05.761573 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 15:53:05.767918 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 15:53:05.771374 call enable_fixed_mtrr()
2043 15:53:05.774933 call enable_fixed_mtrr()
2044 15:53:05.779422 Checking cr50 for pending updates
2045 15:53:05.779837 MTRR: Fixed MSR 0x250 0x0606060606060606
2046 15:53:05.785844 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 15:53:05.789092 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 15:53:05.792888 MTRR: Fixed MSR 0x259 0x0000000000000000
2049 15:53:05.795628 MTRR: Fixed MSR 0x268 0x0606060606060606
2050 15:53:05.802927 MTRR: Fixed MSR 0x269 0x0606060606060606
2051 15:53:05.805554 MTRR: Fixed MSR 0x26a 0x0606060606060606
2052 15:53:05.808983 MTRR: Fixed MSR 0x26b 0x0606060606060606
2053 15:53:05.812644 MTRR: Fixed MSR 0x26c 0x0606060606060606
2054 15:53:05.818920 MTRR: Fixed MSR 0x26d 0x0606060606060606
2055 15:53:05.822162 MTRR: Fixed MSR 0x26e 0x0606060606060606
2056 15:53:05.825896 MTRR: Fixed MSR 0x26f 0x0606060606060606
2057 15:53:05.832153 MTRR: Fixed MSR 0x258 0x0606060606060606
2058 15:53:05.832588 call enable_fixed_mtrr()
2059 15:53:05.838846 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 15:53:05.842004 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 15:53:05.845371 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 15:53:05.848471 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 15:53:05.854945 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 15:53:05.858329 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 15:53:05.861698 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 15:53:05.865070 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 15:53:05.871881 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 15:53:05.874992 CPU physical address size: 39 bits
2069 15:53:05.878313 call enable_fixed_mtrr()
2070 15:53:05.881826 CPU physical address size: 39 bits
2071 15:53:05.884844 CPU physical address size: 39 bits
2072 15:53:05.889252 Reading cr50 TPM mode
2073 15:53:05.892754 MTRR: Fixed MSR 0x250 0x0606060606060606
2074 15:53:05.896053 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 15:53:05.902674 MTRR: Fixed MSR 0x258 0x0606060606060606
2076 15:53:05.905853 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 15:53:05.909388 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 15:53:05.912820 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 15:53:05.919335 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 15:53:05.922041 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 15:53:05.925502 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 15:53:05.929118 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 15:53:05.932543 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 15:53:05.938954 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 15:53:05.941856 MTRR: Fixed MSR 0x258 0x0606060606060606
2086 15:53:05.948744 MTRR: Fixed MSR 0x259 0x0000000000000000
2087 15:53:05.952287 MTRR: Fixed MSR 0x268 0x0606060606060606
2088 15:53:05.955348 MTRR: Fixed MSR 0x269 0x0606060606060606
2089 15:53:05.958502 MTRR: Fixed MSR 0x26a 0x0606060606060606
2090 15:53:05.965170 MTRR: Fixed MSR 0x26b 0x0606060606060606
2091 15:53:05.968470 MTRR: Fixed MSR 0x26c 0x0606060606060606
2092 15:53:05.971680 MTRR: Fixed MSR 0x26d 0x0606060606060606
2093 15:53:05.975398 MTRR: Fixed MSR 0x26e 0x0606060606060606
2094 15:53:05.978396 MTRR: Fixed MSR 0x26f 0x0606060606060606
2095 15:53:05.985244 call enable_fixed_mtrr()
2096 15:53:05.985658 call enable_fixed_mtrr()
2097 15:53:05.988575 CPU physical address size: 39 bits
2098 15:53:05.992091 CPU physical address size: 39 bits
2099 15:53:05.997973 CPU physical address size: 39 bits
2100 15:53:06.004792 BS: BS_PAYLOAD_LOAD entry times (exec / console): 212 / 6 ms
2101 15:53:06.011575 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 15:53:06.014863 Checking segment from ROM address 0xffc02b38
2103 15:53:06.021465 Checking segment from ROM address 0xffc02b54
2104 15:53:06.024409 Loading segment from ROM address 0xffc02b38
2105 15:53:06.027796 code (compression=0)
2106 15:53:06.034577 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 15:53:06.044849 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 15:53:06.047623 it's not compressed!
2109 15:53:06.185719 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 15:53:06.192314 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 15:53:06.199318 Loading segment from ROM address 0xffc02b54
2112 15:53:06.202068 Entry Point 0x30000000
2113 15:53:06.202490 Loaded segments
2114 15:53:06.208412 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2115 15:53:06.251512 Finalizing chipset.
2116 15:53:06.255053 Finalizing SMM.
2117 15:53:06.255488 APMC done.
2118 15:53:06.261578 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2119 15:53:06.265042 mp_park_aps done after 0 msecs.
2120 15:53:06.267845 Jumping to boot code at 0x30000000(0x76b25000)
2121 15:53:06.277978 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 15:53:06.278420
2123 15:53:06.280902
2124 15:53:06.281327
2125 15:53:06.284807 Starting depthcharge on Voema...
2126 15:53:06.285291
2127 15:53:06.286483 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2128 15:53:06.287145 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2129 15:53:06.287612 Setting prompt string to ['volteer:']
2130 15:53:06.288107 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2131 15:53:06.290969 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 15:53:06.291590
2133 15:53:06.297989 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 15:53:06.298418
2135 15:53:06.304321 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2136 15:53:06.304750
2137 15:53:06.307309 Failed to find eMMC card reader
2138 15:53:06.307733
2139 15:53:06.310457 Wipe memory regions:
2140 15:53:06.310922
2141 15:53:06.313984 [0x00000000001000, 0x000000000a0000)
2142 15:53:06.314400
2143 15:53:06.317199 [0x00000000100000, 0x00000030000000)
2144 15:53:06.343800
2145 15:53:06.347069 [0x00000032662db0, 0x000000769ef000)
2146 15:53:06.383385
2147 15:53:06.386183 [0x00000100000000, 0x00000280400000)
2148 15:53:06.588371
2149 15:53:06.591922 ec_init: CrosEC protocol v3 supported (256, 256)
2150 15:53:06.592382
2151 15:53:06.598265 update_port_state: port C0 state: usb enable 1 mux conn 0
2152 15:53:06.598740
2153 15:53:06.607955 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2154 15:53:06.608388
2155 15:53:06.614482 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2156 15:53:06.614966
2157 15:53:06.617675 send_conn_disc_msg: pmc_send_cmd succeeded
2158 15:53:07.048952
2159 15:53:07.049452 R8152: Initializing
2160 15:53:07.049904
2161 15:53:07.052088 Version 6 (ocp_data = 5c30)
2162 15:53:07.052512
2163 15:53:07.055399 R8152: Done initializing
2164 15:53:07.055832
2165 15:53:07.058685 Adding net device
2166 15:53:07.360174
2167 15:53:07.363217 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 15:53:07.363760
2169 15:53:07.364276
2170 15:53:07.364705
2171 15:53:07.366571 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 15:53:07.468086 volteer: tftpboot 192.168.201.1 11224309/tftp-deploy-1ztgtkk_/kernel/bzImage 11224309/tftp-deploy-1ztgtkk_/kernel/cmdline 11224309/tftp-deploy-1ztgtkk_/ramdisk/ramdisk.cpio.gz
2174 15:53:07.468864 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 15:53:07.469403 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2176 15:53:07.473593 tftpboot 192.168.201.1 11224309/tftp-deploy-1ztgtkk_/kernel/bzIploy-1ztgtkk_/kernel/cmdline 11224309/tftp-deploy-1ztgtkk_/ramdisk/ramdisk.cpio.gz
2177 15:53:07.474030
2178 15:53:07.474378 Waiting for link
2179 15:53:07.676860
2180 15:53:07.677342 done.
2181 15:53:07.677819
2182 15:53:07.678238 MAC: 00:24:32:30:79:42
2183 15:53:07.678824
2184 15:53:07.679749 Sending DHCP discover... done.
2185 15:53:07.680171
2186 15:53:07.683113 Waiting for reply... done.
2187 15:53:07.683538
2188 15:53:07.686120 Sending DHCP request... done.
2189 15:53:07.686704
2190 15:53:07.693077 Waiting for reply... done.
2191 15:53:07.693491
2192 15:53:07.693820 My ip is 192.168.201.13
2193 15:53:07.694128
2194 15:53:07.696048 The DHCP server ip is 192.168.201.1
2195 15:53:07.696464
2196 15:53:07.703076 TFTP server IP predefined by user: 192.168.201.1
2197 15:53:07.703491
2198 15:53:07.709428 Bootfile predefined by user: 11224309/tftp-deploy-1ztgtkk_/kernel/bzImage
2199 15:53:07.709846
2200 15:53:07.712912 Sending tftp read request... done.
2201 15:53:07.713331
2202 15:53:07.721866 Waiting for the transfer...
2203 15:53:07.722311
2204 15:53:08.373971 00000000 ################################################################
2205 15:53:08.374466
2206 15:53:09.030008 00080000 ################################################################
2207 15:53:09.030512
2208 15:53:09.687683 00100000 ################################################################
2209 15:53:09.688237
2210 15:53:10.355342 00180000 ################################################################
2211 15:53:10.355888
2212 15:53:10.998939 00200000 ################################################################
2213 15:53:10.999078
2214 15:53:11.518075 00280000 ################################################################
2215 15:53:11.518217
2216 15:53:12.043691 00300000 ################################################################
2217 15:53:12.043846
2218 15:53:12.560484 00380000 ################################################################
2219 15:53:12.560671
2220 15:53:13.074008 00400000 ################################################################
2221 15:53:13.074174
2222 15:53:13.594770 00480000 ################################################################
2223 15:53:13.594913
2224 15:53:14.113463 00500000 ################################################################
2225 15:53:14.113638
2226 15:53:14.629206 00580000 ################################################################
2227 15:53:14.629376
2228 15:53:15.141820 00600000 ################################################################
2229 15:53:15.141962
2230 15:53:15.656545 00680000 ################################################################
2231 15:53:15.656776
2232 15:53:16.169504 00700000 ################################################################
2233 15:53:16.169671
2234 15:53:16.185732 00780000 ## done.
2235 15:53:16.185844
2236 15:53:16.188861 The bootfile was 7880592 bytes long.
2237 15:53:16.188968
2238 15:53:16.192231 Sending tftp read request... done.
2239 15:53:16.192332
2240 15:53:16.195488 Waiting for the transfer...
2241 15:53:16.195570
2242 15:53:16.712956 00000000 ################################################################
2243 15:53:16.713102
2244 15:53:17.225242 00080000 ################################################################
2245 15:53:17.225472
2246 15:53:17.738080 00100000 ################################################################
2247 15:53:17.738224
2248 15:53:18.263794 00180000 ################################################################
2249 15:53:18.263938
2250 15:53:18.787753 00200000 ################################################################
2251 15:53:18.787903
2252 15:53:19.311678 00280000 ################################################################
2253 15:53:19.311817
2254 15:53:19.850070 00300000 ################################################################
2255 15:53:19.850209
2256 15:53:20.379548 00380000 ################################################################
2257 15:53:20.379699
2258 15:53:20.922351 00400000 ################################################################
2259 15:53:20.922562
2260 15:53:21.559389 00480000 ################################################################
2261 15:53:21.559525
2262 15:53:22.221462 00500000 ################################################################ done.
2263 15:53:22.221957
2264 15:53:22.224773 Sending tftp read request... done.
2265 15:53:22.225192
2266 15:53:22.228042 Waiting for the transfer...
2267 15:53:22.228462
2268 15:53:22.228798 00000000 # done.
2269 15:53:22.229121
2270 15:53:22.237648 Command line loaded dynamically from TFTP file: 11224309/tftp-deploy-1ztgtkk_/kernel/cmdline
2271 15:53:22.238075
2272 15:53:22.263983 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11224309/extract-nfsrootfs-3mkczue8,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2273 15:53:22.267364
2274 15:53:22.271016 Shutting down all USB controllers.
2275 15:53:22.271457
2276 15:53:22.271790 Removing current net device
2277 15:53:22.272103
2278 15:53:22.273865 Finalizing coreboot
2279 15:53:22.274354
2280 15:53:22.280295 Exiting depthcharge with code 4 at timestamp: 24670191
2281 15:53:22.280753
2282 15:53:22.281163
2283 15:53:22.281588 Starting kernel ...
2284 15:53:22.282330
2285 15:53:22.283871 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2286 15:53:22.284512 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2287 15:53:22.284899 Setting prompt string to ['Linux version [0-9]']
2288 15:53:22.285252 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2289 15:53:22.285598 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2290 15:53:22.286529
2292 15:57:51.284732 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2294 15:57:51.284940 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2296 15:57:51.285095 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2299 15:57:51.285383 end: 2 depthcharge-action (duration 00:05:00) [common]
2301 15:57:51.285641 Cleaning after the job
2302 15:57:51.285735 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224309/tftp-deploy-1ztgtkk_/ramdisk
2303 15:57:51.286720 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224309/tftp-deploy-1ztgtkk_/kernel
2304 15:57:51.287991 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224309/tftp-deploy-1ztgtkk_/nfsrootfs
2305 15:57:51.367254 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224309/tftp-deploy-1ztgtkk_/modules
2306 15:57:51.367699 start: 5.1 power-off (timeout 00:00:30) [common]
2307 15:57:51.367871 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2308 15:57:51.444442 >> Command sent successfully.
2309 15:57:51.446969 Returned 0 in 0 seconds
2310 15:57:51.547384 end: 5.1 power-off (duration 00:00:00) [common]
2312 15:57:51.547725 start: 5.2 read-feedback (timeout 00:10:00) [common]
2313 15:57:51.547992 Listened to connection for namespace 'common' for up to 1s
2314 15:57:52.549097 Finalising connection for namespace 'common'
2315 15:57:52.549820 Disconnecting from shell: Finalise
2316 15:57:52.550291
2317 15:57:52.651361 end: 5.2 read-feedback (duration 00:00:01) [common]
2318 15:57:52.652033 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224309
2319 15:57:53.008276 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224309
2320 15:57:53.008477 JobError: Your job cannot terminate cleanly.