Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 15:53:01.133587 lava-dispatcher, installed at version: 2023.05.1
2 15:53:01.133804 start: 0 validate
3 15:53:01.133939 Start time: 2023-08-07 15:53:01.133931+00:00 (UTC)
4 15:53:01.134076 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:53:01.134217 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 15:53:01.402049 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:53:01.402226 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:53:04.909114 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:53:04.909282 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:53:05.410806 validate duration: 4.28
12 15:53:05.411081 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:53:05.411176 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:53:05.411263 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:53:05.411399 Not decompressing ramdisk as can be used compressed.
16 15:53:05.411485 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 15:53:05.411548 saving as /var/lib/lava/dispatcher/tmp/11224318/tftp-deploy-qjpu5k4i/ramdisk/rootfs.cpio.gz
18 15:53:05.411607 total size: 35760064 (34MB)
19 15:53:05.412621 progress 0% (0MB)
20 15:53:05.422274 progress 5% (1MB)
21 15:53:05.431708 progress 10% (3MB)
22 15:53:05.440888 progress 15% (5MB)
23 15:53:05.450307 progress 20% (6MB)
24 15:53:05.459554 progress 25% (8MB)
25 15:53:05.469095 progress 30% (10MB)
26 15:53:05.478418 progress 35% (11MB)
27 15:53:05.487835 progress 40% (13MB)
28 15:53:05.497256 progress 45% (15MB)
29 15:53:05.506560 progress 50% (17MB)
30 15:53:05.515956 progress 55% (18MB)
31 15:53:05.525313 progress 60% (20MB)
32 15:53:05.534643 progress 65% (22MB)
33 15:53:05.543864 progress 70% (23MB)
34 15:53:05.553290 progress 75% (25MB)
35 15:53:05.562664 progress 80% (27MB)
36 15:53:05.572103 progress 85% (29MB)
37 15:53:05.581470 progress 90% (30MB)
38 15:53:05.590614 progress 95% (32MB)
39 15:53:05.599781 progress 100% (34MB)
40 15:53:05.599955 34MB downloaded in 0.19s (181.07MB/s)
41 15:53:05.600102 end: 1.1.1 http-download (duration 00:00:00) [common]
43 15:53:05.600339 end: 1.1 download-retry (duration 00:00:00) [common]
44 15:53:05.600423 start: 1.2 download-retry (timeout 00:10:00) [common]
45 15:53:05.600505 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 15:53:05.600636 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:53:05.600756 saving as /var/lib/lava/dispatcher/tmp/11224318/tftp-deploy-qjpu5k4i/kernel/bzImage
48 15:53:05.600817 total size: 7880592 (7MB)
49 15:53:05.600876 No compression specified
50 15:53:05.601945 progress 0% (0MB)
51 15:53:05.604073 progress 5% (0MB)
52 15:53:05.606226 progress 10% (0MB)
53 15:53:05.608346 progress 15% (1MB)
54 15:53:05.610442 progress 20% (1MB)
55 15:53:05.612525 progress 25% (1MB)
56 15:53:05.614695 progress 30% (2MB)
57 15:53:05.616889 progress 35% (2MB)
58 15:53:05.618992 progress 40% (3MB)
59 15:53:05.621189 progress 45% (3MB)
60 15:53:05.623296 progress 50% (3MB)
61 15:53:05.625413 progress 55% (4MB)
62 15:53:05.627431 progress 60% (4MB)
63 15:53:05.629552 progress 65% (4MB)
64 15:53:05.631614 progress 70% (5MB)
65 15:53:05.633742 progress 75% (5MB)
66 15:53:05.635797 progress 80% (6MB)
67 15:53:05.637960 progress 85% (6MB)
68 15:53:05.640015 progress 90% (6MB)
69 15:53:05.642123 progress 95% (7MB)
70 15:53:05.644195 progress 100% (7MB)
71 15:53:05.644363 7MB downloaded in 0.04s (172.60MB/s)
72 15:53:05.644505 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:53:05.644772 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:53:05.644862 start: 1.3 download-retry (timeout 00:10:00) [common]
76 15:53:05.644948 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 15:53:05.645087 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:53:05.645154 saving as /var/lib/lava/dispatcher/tmp/11224318/tftp-deploy-qjpu5k4i/modules/modules.tar
79 15:53:05.645213 total size: 251008 (0MB)
80 15:53:05.645275 Using unxz to decompress xz
81 15:53:05.649484 progress 13% (0MB)
82 15:53:05.649897 progress 26% (0MB)
83 15:53:05.650132 progress 39% (0MB)
84 15:53:05.651674 progress 52% (0MB)
85 15:53:05.653772 progress 65% (0MB)
86 15:53:05.655997 progress 78% (0MB)
87 15:53:05.658205 progress 91% (0MB)
88 15:53:05.660107 progress 100% (0MB)
89 15:53:05.665860 0MB downloaded in 0.02s (11.60MB/s)
90 15:53:05.666145 end: 1.3.1 http-download (duration 00:00:00) [common]
92 15:53:05.666474 end: 1.3 download-retry (duration 00:00:00) [common]
93 15:53:05.666587 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 15:53:05.666686 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 15:53:05.666766 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 15:53:05.666851 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 15:53:05.667068 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf
98 15:53:05.667206 makedir: /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin
99 15:53:05.667312 makedir: /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/tests
100 15:53:05.667412 makedir: /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/results
101 15:53:05.667522 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-add-keys
102 15:53:05.667669 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-add-sources
103 15:53:05.667811 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-background-process-start
104 15:53:05.667951 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-background-process-stop
105 15:53:05.668084 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-common-functions
106 15:53:05.668214 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-echo-ipv4
107 15:53:05.668351 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-install-packages
108 15:53:05.668481 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-installed-packages
109 15:53:05.668614 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-os-build
110 15:53:05.668781 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-probe-channel
111 15:53:05.668910 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-probe-ip
112 15:53:05.669035 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-target-ip
113 15:53:05.669198 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-target-mac
114 15:53:05.669323 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-target-storage
115 15:53:05.669451 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-test-case
116 15:53:05.669585 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-test-event
117 15:53:05.669709 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-test-feedback
118 15:53:05.669832 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-test-raise
119 15:53:05.669961 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-test-reference
120 15:53:05.670092 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-test-runner
121 15:53:05.670217 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-test-set
122 15:53:05.670386 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-test-shell
123 15:53:05.670538 Updating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-install-packages (oe)
124 15:53:05.670709 Updating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/bin/lava-installed-packages (oe)
125 15:53:05.670833 Creating /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/environment
126 15:53:05.670936 LAVA metadata
127 15:53:05.671012 - LAVA_JOB_ID=11224318
128 15:53:05.671076 - LAVA_DISPATCHER_IP=192.168.201.1
129 15:53:05.671179 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 15:53:05.671244 skipped lava-vland-overlay
131 15:53:05.671316 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 15:53:05.671400 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 15:53:05.671479 skipped lava-multinode-overlay
134 15:53:05.671550 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 15:53:05.671643 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 15:53:05.671717 Loading test definitions
137 15:53:05.671810 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 15:53:05.671882 Using /lava-11224318 at stage 0
139 15:53:05.672195 uuid=11224318_1.4.2.3.1 testdef=None
140 15:53:05.672281 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 15:53:05.672388 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 15:53:05.672946 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 15:53:05.673166 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 15:53:05.673771 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 15:53:05.673996 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 15:53:05.674603 runner path: /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/0/tests/0_cros-ec test_uuid 11224318_1.4.2.3.1
149 15:53:05.674756 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 15:53:05.674955 Creating lava-test-runner.conf files
152 15:53:05.675016 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224318/lava-overlay-_7bxbdjf/lava-11224318/0 for stage 0
153 15:53:05.675103 - 0_cros-ec
154 15:53:05.675199 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 15:53:05.675283 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 15:53:05.681986 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 15:53:05.682091 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 15:53:05.682174 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 15:53:05.682257 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 15:53:05.682343 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 15:53:06.739919 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 15:53:06.740298 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 15:53:06.740420 extracting modules file /var/lib/lava/dispatcher/tmp/11224318/tftp-deploy-qjpu5k4i/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224318/extract-overlay-ramdisk-2tdlzf9r/ramdisk
164 15:53:06.755336 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 15:53:06.755487 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 15:53:06.755580 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224318/compress-overlay-bopiq_2i/overlay-1.4.2.4.tar.gz to ramdisk
167 15:53:06.755652 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224318/compress-overlay-bopiq_2i/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224318/extract-overlay-ramdisk-2tdlzf9r/ramdisk
168 15:53:06.763396 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 15:53:06.763539 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 15:53:06.763633 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 15:53:06.763721 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 15:53:06.763807 Building ramdisk /var/lib/lava/dispatcher/tmp/11224318/extract-overlay-ramdisk-2tdlzf9r/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224318/extract-overlay-ramdisk-2tdlzf9r/ramdisk
173 15:53:07.342440 >> 184084 blocks
174 15:53:10.822116 rename /var/lib/lava/dispatcher/tmp/11224318/extract-overlay-ramdisk-2tdlzf9r/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224318/tftp-deploy-qjpu5k4i/ramdisk/ramdisk.cpio.gz
175 15:53:10.822689 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 15:53:10.822894 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
177 15:53:10.823058 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
178 15:53:10.823228 No mkimage arch provided, not using FIT.
179 15:53:10.823379 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 15:53:10.823528 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 15:53:10.823705 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 15:53:10.823852 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
183 15:53:10.824007 No LXC device requested
184 15:53:10.824162 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 15:53:10.824311 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
186 15:53:10.824451 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 15:53:10.824586 Checking files for TFTP limit of 4294967296 bytes.
188 15:53:10.825275 end: 1 tftp-deploy (duration 00:00:05) [common]
189 15:53:10.825428 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 15:53:10.825578 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 15:53:10.825769 substitutions:
192 15:53:10.825885 - {DTB}: None
193 15:53:10.825995 - {INITRD}: 11224318/tftp-deploy-qjpu5k4i/ramdisk/ramdisk.cpio.gz
194 15:53:10.826100 - {KERNEL}: 11224318/tftp-deploy-qjpu5k4i/kernel/bzImage
195 15:53:10.826211 - {LAVA_MAC}: None
196 15:53:10.826310 - {PRESEED_CONFIG}: None
197 15:53:10.826414 - {PRESEED_LOCAL}: None
198 15:53:10.826512 - {RAMDISK}: 11224318/tftp-deploy-qjpu5k4i/ramdisk/ramdisk.cpio.gz
199 15:53:10.826611 - {ROOT_PART}: None
200 15:53:10.826711 - {ROOT}: None
201 15:53:10.826811 - {SERVER_IP}: 192.168.201.1
202 15:53:10.826918 - {TEE}: None
203 15:53:10.827021 Parsed boot commands:
204 15:53:10.827126 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 15:53:10.827395 Parsed boot commands: tftpboot 192.168.201.1 11224318/tftp-deploy-qjpu5k4i/kernel/bzImage 11224318/tftp-deploy-qjpu5k4i/kernel/cmdline 11224318/tftp-deploy-qjpu5k4i/ramdisk/ramdisk.cpio.gz
206 15:53:10.827534 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 15:53:10.827678 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 15:53:10.827824 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 15:53:10.827961 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 15:53:10.828086 Not connected, no need to disconnect.
211 15:53:10.828211 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 15:53:10.828357 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 15:53:10.828476 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-6'
214 15:53:10.833538 Setting prompt string to ['lava-test: # ']
215 15:53:10.834022 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 15:53:10.834219 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 15:53:10.834385 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 15:53:10.834533 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 15:53:10.834886 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
220 15:53:15.973805 >> Command sent successfully.
221 15:53:15.976340 Returned 0 in 5 seconds
222 15:53:16.077006 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 15:53:16.078882 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 15:53:16.079513 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 15:53:16.080129 Setting prompt string to 'Starting depthcharge on Voema...'
227 15:53:16.080827 Changing prompt to 'Starting depthcharge on Voema...'
228 15:53:16.081264 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 15:53:16.082673 [Enter `^Ec?' for help]
230 15:53:17.708293
231 15:53:17.708484
232 15:53:17.718489 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 15:53:17.721779 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
234 15:53:17.728517 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 15:53:17.731376 CPU: AES supported, TXT NOT supported, VT supported
236 15:53:17.738398 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 15:53:17.744884 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 15:53:17.748597 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 15:53:17.751628 VBOOT: Loading verstage.
240 15:53:17.755014 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 15:53:17.761590 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 15:53:17.765054 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 15:53:17.775703 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 15:53:17.782115 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 15:53:17.782203
246 15:53:17.782267
247 15:53:17.795241 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 15:53:17.808947 Probing TPM: . done!
249 15:53:17.812392 TPM ready after 0 ms
250 15:53:17.815844 Connected to device vid:did:rid of 1ae0:0028:00
251 15:53:17.826947 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
252 15:53:17.833374 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 15:53:17.836653 Initialized TPM device CR50 revision 0
254 15:53:17.888482 tlcl_send_startup: Startup return code is 0
255 15:53:17.888688 TPM: setup succeeded
256 15:53:17.904299 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 15:53:17.918547 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 15:53:17.931747 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 15:53:17.941622 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 15:53:17.944911 Chrome EC: UHEPI supported
261 15:53:17.948432 Phase 1
262 15:53:17.951513 FMAP: area GBB found @ 1805000 (458752 bytes)
263 15:53:17.961640 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 15:53:17.968014 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 15:53:17.974740 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 15:53:17.981512 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 15:53:17.984825 Recovery requested (1009000e)
268 15:53:17.988409 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 15:53:17.999776 tlcl_extend: response is 0
270 15:53:18.006667 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 15:53:18.016436 tlcl_extend: response is 0
272 15:53:18.023145 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 15:53:18.029959 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 15:53:18.036713 BS: verstage times (exec / console): total (unknown) / 142 ms
275 15:53:18.037164
276 15:53:18.037527
277 15:53:18.049677 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 15:53:18.056175 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 15:53:18.059489 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 15:53:18.063185 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 15:53:18.069817 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 15:53:18.073209 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 15:53:18.076724 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 15:53:18.079570 TCO_STS: 0000 0000
285 15:53:18.083086 GEN_PMCON: d0015038 00002200
286 15:53:18.086346 GBLRST_CAUSE: 00000000 00000000
287 15:53:18.086770 HPR_CAUSE0: 00000000
288 15:53:18.089736 prev_sleep_state 5
289 15:53:18.092849 Boot Count incremented to 21813
290 15:53:18.099675 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 15:53:18.106565 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 15:53:18.112915 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 15:53:18.119459 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 15:53:18.123830 Chrome EC: UHEPI supported
295 15:53:18.130935 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 15:53:18.143619 Probing TPM: done!
297 15:53:18.151810 Connected to device vid:did:rid of 1ae0:0028:00
298 15:53:18.159124 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
299 15:53:18.162696 Initialized TPM device CR50 revision 0
300 15:53:18.178660 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 15:53:18.185074 MRC: Hash idx 0x100b comparison successful.
302 15:53:18.188547 MRC cache found, size faa8
303 15:53:18.189041 bootmode is set to: 2
304 15:53:18.192120 SPD index = 0
305 15:53:18.198642 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 15:53:18.201849 SPD: module type is LPDDR4X
307 15:53:18.208480 SPD: module part number is MT53E512M64D4NW-046
308 15:53:18.212045 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
309 15:53:18.218565 SPD: device width 16 bits, bus width 16 bits
310 15:53:18.222079 SPD: module size is 1024 MB (per channel)
311 15:53:18.656347 CBMEM:
312 15:53:18.659364 IMD: root @ 0x76fff000 254 entries.
313 15:53:18.662702 IMD: root @ 0x76ffec00 62 entries.
314 15:53:18.666301 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 15:53:18.672576 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 15:53:18.676101 External stage cache:
317 15:53:18.679660 IMD: root @ 0x7b3ff000 254 entries.
318 15:53:18.682751 IMD: root @ 0x7b3fec00 62 entries.
319 15:53:18.697554 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 15:53:18.704552 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 15:53:18.711251 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 15:53:18.725286 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 15:53:18.728646 cse_lite: Skip switching to RW in the recovery path
324 15:53:18.732982 8 DIMMs found
325 15:53:18.733432 SMM Memory Map
326 15:53:18.736302 SMRAM : 0x7b000000 0x800000
327 15:53:18.739562 Subregion 0: 0x7b000000 0x200000
328 15:53:18.742831 Subregion 1: 0x7b200000 0x200000
329 15:53:18.746721 Subregion 2: 0x7b400000 0x400000
330 15:53:18.749823 top_of_ram = 0x77000000
331 15:53:18.756793 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 15:53:18.760076 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 15:53:18.766944 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 15:53:18.770217 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 15:53:18.780059 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 15:53:18.782773 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 15:53:18.794692 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 15:53:18.801135 Processing 211 relocs. Offset value of 0x74c0b000
339 15:53:18.807991 BS: romstage times (exec / console): total (unknown) / 277 ms
340 15:53:18.814070
341 15:53:18.814168
342 15:53:18.823731 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 15:53:18.827364 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 15:53:18.837627 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 15:53:18.844066 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 15:53:18.850688 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 15:53:18.857402 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 15:53:18.904350 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 15:53:18.911079 Processing 5008 relocs. Offset value of 0x75d98000
350 15:53:18.914375 BS: postcar times (exec / console): total (unknown) / 59 ms
351 15:53:18.914812
352 15:53:18.917758
353 15:53:18.928394 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 15:53:18.928886 Normal boot
355 15:53:18.931545 FW_CONFIG value is 0x804c02
356 15:53:18.934871 PCI: 00:07.0 disabled by fw_config
357 15:53:18.938378 PCI: 00:07.1 disabled by fw_config
358 15:53:18.941674 PCI: 00:0d.2 disabled by fw_config
359 15:53:18.944931 PCI: 00:1c.7 disabled by fw_config
360 15:53:18.951824 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 15:53:18.955379 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 15:53:18.961528 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 15:53:18.965198 GENERIC: 0.0 disabled by fw_config
364 15:53:18.968104 GENERIC: 1.0 disabled by fw_config
365 15:53:18.974545 fw_config match found: DB_USB=USB3_ACTIVE
366 15:53:18.978071 fw_config match found: DB_USB=USB3_ACTIVE
367 15:53:18.981454 fw_config match found: DB_USB=USB3_ACTIVE
368 15:53:18.984425 fw_config match found: DB_USB=USB3_ACTIVE
369 15:53:18.991355 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 15:53:18.998234 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 15:53:19.004533 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 15:53:19.014396 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 15:53:19.017751 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 15:53:19.024606 microcode: Update skipped, already up-to-date
375 15:53:19.031227 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 15:53:19.057735 Detected 4 core, 8 thread CPU.
377 15:53:19.060942 Setting up SMI for CPU
378 15:53:19.064728 IED base = 0x7b400000
379 15:53:19.065158 IED size = 0x00400000
380 15:53:19.068182 Will perform SMM setup.
381 15:53:19.074419 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
382 15:53:19.081018 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 15:53:19.087771 Processing 16 relocs. Offset value of 0x00030000
384 15:53:19.090972 Attempting to start 7 APs
385 15:53:19.094290 Waiting for 10ms after sending INIT.
386 15:53:19.109825 Waiting for 1st SIPI to complete...done.
387 15:53:19.110275 AP: slot 1 apic_id 1.
388 15:53:19.116203 Waiting for 2nd SIPI to complete...done.
389 15:53:19.116648 AP: slot 7 apic_id 7.
390 15:53:19.119958 AP: slot 3 apic_id 6.
391 15:53:19.123311 AP: slot 4 apic_id 5.
392 15:53:19.123705 AP: slot 5 apic_id 4.
393 15:53:19.126375 AP: slot 2 apic_id 3.
394 15:53:19.129782 AP: slot 6 apic_id 2.
395 15:53:19.136471 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 15:53:19.142793 Processing 13 relocs. Offset value of 0x00038000
397 15:53:19.142877 Unable to locate Global NVS
398 15:53:19.153406 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 15:53:19.156582 Installing permanent SMM handler to 0x7b000000
400 15:53:19.166593 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 15:53:19.169685 Processing 794 relocs. Offset value of 0x7b010000
402 15:53:19.176338 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 15:53:19.182996 Processing 13 relocs. Offset value of 0x7b008000
404 15:53:19.189753 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 15:53:19.195876 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 15:53:19.199611 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 15:53:19.206290 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 15:53:19.212793 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 15:53:19.219267 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 15:53:19.226055 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 15:53:19.226139 Unable to locate Global NVS
412 15:53:19.235727 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 15:53:19.239227 Clearing SMI status registers
414 15:53:19.239317 SMI_STS: PM1
415 15:53:19.242284 PM1_STS: PWRBTN
416 15:53:19.248885 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 15:53:19.252426 In relocation handler: CPU 0
418 15:53:19.255867 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 15:53:19.262242 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 15:53:19.262325 Relocation complete.
421 15:53:19.269178 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 15:53:19.272601 In relocation handler: CPU 1
423 15:53:19.279000 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 15:53:19.279084 Relocation complete.
425 15:53:19.285525 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
426 15:53:19.289040 In relocation handler: CPU 6
427 15:53:19.295792 New SMBASE=0x7affe800 IEDBASE=0x7b400000
428 15:53:19.299157 Writing SMRR. base = 0x7b000006, mask=0xff800c00
429 15:53:19.302182 Relocation complete.
430 15:53:19.308876 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
431 15:53:19.312242 In relocation handler: CPU 2
432 15:53:19.316011 New SMBASE=0x7afff800 IEDBASE=0x7b400000
433 15:53:19.319485 Relocation complete.
434 15:53:19.325928 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
435 15:53:19.329203 In relocation handler: CPU 4
436 15:53:19.332555 New SMBASE=0x7afff000 IEDBASE=0x7b400000
437 15:53:19.335548 Relocation complete.
438 15:53:19.342166 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
439 15:53:19.345582 In relocation handler: CPU 5
440 15:53:19.349077 New SMBASE=0x7affec00 IEDBASE=0x7b400000
441 15:53:19.352266 Writing SMRR. base = 0x7b000006, mask=0xff800c00
442 15:53:19.355897 Relocation complete.
443 15:53:19.362598 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
444 15:53:19.365920 In relocation handler: CPU 3
445 15:53:19.369473 New SMBASE=0x7afff400 IEDBASE=0x7b400000
446 15:53:19.375634 Writing SMRR. base = 0x7b000006, mask=0xff800c00
447 15:53:19.375770 Relocation complete.
448 15:53:19.385951 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
449 15:53:19.386036 In relocation handler: CPU 7
450 15:53:19.393107 New SMBASE=0x7affe400 IEDBASE=0x7b400000
451 15:53:19.393190 Relocation complete.
452 15:53:19.397378 Initializing CPU #0
453 15:53:19.400593 CPU: vendor Intel device 806c1
454 15:53:19.403633 CPU: family 06, model 8c, stepping 01
455 15:53:19.403736 Clearing out pending MCEs
456 15:53:19.407332 Setting up local APIC...
457 15:53:19.410971 apic_id: 0x00 done.
458 15:53:19.413682 Turbo is available but hidden
459 15:53:19.417348 Turbo is available and visible
460 15:53:19.420600 microcode: Update skipped, already up-to-date
461 15:53:19.424239 CPU #0 initialized
462 15:53:19.424344 Initializing CPU #1
463 15:53:19.427135 Initializing CPU #3
464 15:53:19.430617 Initializing CPU #7
465 15:53:19.433790 CPU: vendor Intel device 806c1
466 15:53:19.437273 CPU: family 06, model 8c, stepping 01
467 15:53:19.440608 CPU: vendor Intel device 806c1
468 15:53:19.443837 CPU: family 06, model 8c, stepping 01
469 15:53:19.447343 Clearing out pending MCEs
470 15:53:19.447448 Clearing out pending MCEs
471 15:53:19.450437 Setting up local APIC...
472 15:53:19.453985 CPU: vendor Intel device 806c1
473 15:53:19.457183 CPU: family 06, model 8c, stepping 01
474 15:53:19.460292 Initializing CPU #6
475 15:53:19.460369 Initializing CPU #2
476 15:53:19.463808 CPU: vendor Intel device 806c1
477 15:53:19.470905 CPU: family 06, model 8c, stepping 01
478 15:53:19.470982 CPU: vendor Intel device 806c1
479 15:53:19.477368 CPU: family 06, model 8c, stepping 01
480 15:53:19.477443 Clearing out pending MCEs
481 15:53:19.480525 Clearing out pending MCEs
482 15:53:19.483883 Setting up local APIC...
483 15:53:19.487247 Setting up local APIC...
484 15:53:19.487329 Setting up local APIC...
485 15:53:19.490549 Initializing CPU #5
486 15:53:19.493720 Initializing CPU #4
487 15:53:19.497316 CPU: vendor Intel device 806c1
488 15:53:19.500303 CPU: family 06, model 8c, stepping 01
489 15:53:19.503540 CPU: vendor Intel device 806c1
490 15:53:19.507273 CPU: family 06, model 8c, stepping 01
491 15:53:19.510356 Clearing out pending MCEs
492 15:53:19.510463 Clearing out pending MCEs
493 15:53:19.513670 Setting up local APIC...
494 15:53:19.516925 Clearing out pending MCEs
495 15:53:19.520228 apic_id: 0x02 done.
496 15:53:19.520303 apic_id: 0x03 done.
497 15:53:19.527046 microcode: Update skipped, already up-to-date
498 15:53:19.530610 microcode: Update skipped, already up-to-date
499 15:53:19.533955 CPU #6 initialized
500 15:53:19.534058 CPU #2 initialized
501 15:53:19.537153 Setting up local APIC...
502 15:53:19.540583 apic_id: 0x06 done.
503 15:53:19.540697 apic_id: 0x07 done.
504 15:53:19.546799 microcode: Update skipped, already up-to-date
505 15:53:19.546960 apic_id: 0x05 done.
506 15:53:19.550089 apic_id: 0x04 done.
507 15:53:19.553333 microcode: Update skipped, already up-to-date
508 15:53:19.559961 microcode: Update skipped, already up-to-date
509 15:53:19.560038 CPU #4 initialized
510 15:53:19.563441 CPU #5 initialized
511 15:53:19.567014 Setting up local APIC...
512 15:53:19.570568 microcode: Update skipped, already up-to-date
513 15:53:19.573532 CPU #3 initialized
514 15:53:19.573631 CPU #7 initialized
515 15:53:19.576663 apic_id: 0x01 done.
516 15:53:19.579992 microcode: Update skipped, already up-to-date
517 15:53:19.583565 CPU #1 initialized
518 15:53:19.587135 bsp_do_flight_plan done after 468 msecs.
519 15:53:19.590167 CPU: frequency set to 4000 MHz
520 15:53:19.593698 Enabling SMIs.
521 15:53:19.600285 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 15:53:19.614358 SATAXPCIE1 indicates PCIe NVMe is present
523 15:53:19.617852 Probing TPM: done!
524 15:53:19.621543 Connected to device vid:did:rid of 1ae0:0028:00
525 15:53:19.631523 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
526 15:53:19.635076 Initialized TPM device CR50 revision 0
527 15:53:19.638209 Enabling S0i3.4
528 15:53:19.644945 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 15:53:19.648357 Found a VBT of 8704 bytes after decompression
530 15:53:19.654983 cse_lite: CSE RO boot. HybridStorageMode disabled
531 15:53:19.661600 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 15:53:19.737736 FSPS returned 0
533 15:53:19.740838 Executing Phase 1 of FspMultiPhaseSiInit
534 15:53:19.750591 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 15:53:19.753977 port C0 DISC req: usage 1 usb3 1 usb2 5
536 15:53:19.757430 Raw Buffer output 0 00000511
537 15:53:19.760365 Raw Buffer output 1 00000000
538 15:53:19.764326 pmc_send_ipc_cmd succeeded
539 15:53:19.771136 port C1 DISC req: usage 1 usb3 2 usb2 3
540 15:53:19.771218 Raw Buffer output 0 00000321
541 15:53:19.774018 Raw Buffer output 1 00000000
542 15:53:19.778425 pmc_send_ipc_cmd succeeded
543 15:53:19.783362 Detected 4 core, 8 thread CPU.
544 15:53:19.786743 Detected 4 core, 8 thread CPU.
545 15:53:20.021413 Display FSP Version Info HOB
546 15:53:20.024199 Reference Code - CPU = a.0.4c.31
547 15:53:20.027569 uCode Version = 0.0.0.86
548 15:53:20.031052 TXT ACM version = ff.ff.ff.ffff
549 15:53:20.034284 Reference Code - ME = a.0.4c.31
550 15:53:20.037776 MEBx version = 0.0.0.0
551 15:53:20.041126 ME Firmware Version = Consumer SKU
552 15:53:20.044036 Reference Code - PCH = a.0.4c.31
553 15:53:20.047525 PCH-CRID Status = Disabled
554 15:53:20.050861 PCH-CRID Original Value = ff.ff.ff.ffff
555 15:53:20.054252 PCH-CRID New Value = ff.ff.ff.ffff
556 15:53:20.057658 OPROM - RST - RAID = ff.ff.ff.ffff
557 15:53:20.060995 PCH Hsio Version = 4.0.0.0
558 15:53:20.064551 Reference Code - SA - System Agent = a.0.4c.31
559 15:53:20.067691 Reference Code - MRC = 2.0.0.1
560 15:53:20.070723 SA - PCIe Version = a.0.4c.31
561 15:53:20.074094 SA-CRID Status = Disabled
562 15:53:20.077380 SA-CRID Original Value = 0.0.0.1
563 15:53:20.081281 SA-CRID New Value = 0.0.0.1
564 15:53:20.084270 OPROM - VBIOS = ff.ff.ff.ffff
565 15:53:20.087591 IO Manageability Engine FW Version = 11.1.4.0
566 15:53:20.090795 PHY Build Version = 0.0.0.e0
567 15:53:20.094215 Thunderbolt(TM) FW Version = 0.0.0.0
568 15:53:20.100830 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 15:53:20.104149 ITSS IRQ Polarities Before:
570 15:53:20.104546 IPC0: 0xffffffff
571 15:53:20.107773 IPC1: 0xffffffff
572 15:53:20.108082 IPC2: 0xffffffff
573 15:53:20.111452 IPC3: 0xffffffff
574 15:53:20.114775 ITSS IRQ Polarities After:
575 15:53:20.115210 IPC0: 0xffffffff
576 15:53:20.118079 IPC1: 0xffffffff
577 15:53:20.118526 IPC2: 0xffffffff
578 15:53:20.121416 IPC3: 0xffffffff
579 15:53:20.124986 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 15:53:20.138620 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 15:53:20.148035 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 15:53:20.161213 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 15:53:20.167648 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
584 15:53:20.168170 Enumerating buses...
585 15:53:20.174178 Show all devs... Before device enumeration.
586 15:53:20.174741 Root Device: enabled 1
587 15:53:20.177880 DOMAIN: 0000: enabled 1
588 15:53:20.180734 CPU_CLUSTER: 0: enabled 1
589 15:53:20.184246 PCI: 00:00.0: enabled 1
590 15:53:20.184834 PCI: 00:02.0: enabled 1
591 15:53:20.187673 PCI: 00:04.0: enabled 1
592 15:53:20.191163 PCI: 00:05.0: enabled 1
593 15:53:20.194156 PCI: 00:06.0: enabled 0
594 15:53:20.194751 PCI: 00:07.0: enabled 0
595 15:53:20.197593 PCI: 00:07.1: enabled 0
596 15:53:20.200775 PCI: 00:07.2: enabled 0
597 15:53:20.204587 PCI: 00:07.3: enabled 0
598 15:53:20.205133 PCI: 00:08.0: enabled 1
599 15:53:20.207610 PCI: 00:09.0: enabled 0
600 15:53:20.210753 PCI: 00:0a.0: enabled 0
601 15:53:20.214498 PCI: 00:0d.0: enabled 1
602 15:53:20.215114 PCI: 00:0d.1: enabled 0
603 15:53:20.217505 PCI: 00:0d.2: enabled 0
604 15:53:20.221329 PCI: 00:0d.3: enabled 0
605 15:53:20.221751 PCI: 00:0e.0: enabled 0
606 15:53:20.224138 PCI: 00:10.2: enabled 1
607 15:53:20.227530 PCI: 00:10.6: enabled 0
608 15:53:20.230922 PCI: 00:10.7: enabled 0
609 15:53:20.231599 PCI: 00:12.0: enabled 0
610 15:53:20.234180 PCI: 00:12.6: enabled 0
611 15:53:20.237796 PCI: 00:13.0: enabled 0
612 15:53:20.240979 PCI: 00:14.0: enabled 1
613 15:53:20.241506 PCI: 00:14.1: enabled 0
614 15:53:20.244210 PCI: 00:14.2: enabled 1
615 15:53:20.247716 PCI: 00:14.3: enabled 1
616 15:53:20.250647 PCI: 00:15.0: enabled 1
617 15:53:20.251108 PCI: 00:15.1: enabled 1
618 15:53:20.254118 PCI: 00:15.2: enabled 1
619 15:53:20.257669 PCI: 00:15.3: enabled 1
620 15:53:20.258321 PCI: 00:16.0: enabled 1
621 15:53:20.260663 PCI: 00:16.1: enabled 0
622 15:53:20.264285 PCI: 00:16.2: enabled 0
623 15:53:20.267518 PCI: 00:16.3: enabled 0
624 15:53:20.268102 PCI: 00:16.4: enabled 0
625 15:53:20.270862 PCI: 00:16.5: enabled 0
626 15:53:20.273900 PCI: 00:17.0: enabled 1
627 15:53:20.277520 PCI: 00:19.0: enabled 0
628 15:53:20.277980 PCI: 00:19.1: enabled 1
629 15:53:20.281102 PCI: 00:19.2: enabled 0
630 15:53:20.284450 PCI: 00:1c.0: enabled 1
631 15:53:20.287387 PCI: 00:1c.1: enabled 0
632 15:53:20.287977 PCI: 00:1c.2: enabled 0
633 15:53:20.290910 PCI: 00:1c.3: enabled 0
634 15:53:20.293893 PCI: 00:1c.4: enabled 0
635 15:53:20.297264 PCI: 00:1c.5: enabled 0
636 15:53:20.297780 PCI: 00:1c.6: enabled 1
637 15:53:20.301034 PCI: 00:1c.7: enabled 0
638 15:53:20.303970 PCI: 00:1d.0: enabled 1
639 15:53:20.304425 PCI: 00:1d.1: enabled 0
640 15:53:20.307418 PCI: 00:1d.2: enabled 1
641 15:53:20.310843 PCI: 00:1d.3: enabled 0
642 15:53:20.314218 PCI: 00:1e.0: enabled 1
643 15:53:20.314715 PCI: 00:1e.1: enabled 0
644 15:53:20.317137 PCI: 00:1e.2: enabled 1
645 15:53:20.320632 PCI: 00:1e.3: enabled 1
646 15:53:20.323739 PCI: 00:1f.0: enabled 1
647 15:53:20.324254 PCI: 00:1f.1: enabled 0
648 15:53:20.327610 PCI: 00:1f.2: enabled 1
649 15:53:20.330851 PCI: 00:1f.3: enabled 1
650 15:53:20.333953 PCI: 00:1f.4: enabled 0
651 15:53:20.334432 PCI: 00:1f.5: enabled 1
652 15:53:20.337752 PCI: 00:1f.6: enabled 0
653 15:53:20.340482 PCI: 00:1f.7: enabled 0
654 15:53:20.341096 APIC: 00: enabled 1
655 15:53:20.344041 GENERIC: 0.0: enabled 1
656 15:53:20.347694 GENERIC: 0.0: enabled 1
657 15:53:20.350493 GENERIC: 1.0: enabled 1
658 15:53:20.351078 GENERIC: 0.0: enabled 1
659 15:53:20.354099 GENERIC: 1.0: enabled 1
660 15:53:20.357480 USB0 port 0: enabled 1
661 15:53:20.357955 GENERIC: 0.0: enabled 1
662 15:53:20.360967 USB0 port 0: enabled 1
663 15:53:20.364186 GENERIC: 0.0: enabled 1
664 15:53:20.367601 I2C: 00:1a: enabled 1
665 15:53:20.368207 I2C: 00:31: enabled 1
666 15:53:20.370605 I2C: 00:32: enabled 1
667 15:53:20.374108 I2C: 00:10: enabled 1
668 15:53:20.374700 I2C: 00:15: enabled 1
669 15:53:20.377337 GENERIC: 0.0: enabled 0
670 15:53:20.380573 GENERIC: 1.0: enabled 0
671 15:53:20.381106 GENERIC: 0.0: enabled 1
672 15:53:20.383675 SPI: 00: enabled 1
673 15:53:20.387219 SPI: 00: enabled 1
674 15:53:20.387889 PNP: 0c09.0: enabled 1
675 15:53:20.390582 GENERIC: 0.0: enabled 1
676 15:53:20.393572 USB3 port 0: enabled 1
677 15:53:20.396896 USB3 port 1: enabled 1
678 15:53:20.397462 USB3 port 2: enabled 0
679 15:53:20.400550 USB3 port 3: enabled 0
680 15:53:20.403921 USB2 port 0: enabled 0
681 15:53:20.404440 USB2 port 1: enabled 1
682 15:53:20.407264 USB2 port 2: enabled 1
683 15:53:20.410576 USB2 port 3: enabled 0
684 15:53:20.413791 USB2 port 4: enabled 1
685 15:53:20.414376 USB2 port 5: enabled 0
686 15:53:20.416765 USB2 port 6: enabled 0
687 15:53:20.420524 USB2 port 7: enabled 0
688 15:53:20.421049 USB2 port 8: enabled 0
689 15:53:20.423579 USB2 port 9: enabled 0
690 15:53:20.426825 USB3 port 0: enabled 0
691 15:53:20.427443 USB3 port 1: enabled 1
692 15:53:20.430187 USB3 port 2: enabled 0
693 15:53:20.433598 USB3 port 3: enabled 0
694 15:53:20.437043 GENERIC: 0.0: enabled 1
695 15:53:20.437510 GENERIC: 1.0: enabled 1
696 15:53:20.440009 APIC: 01: enabled 1
697 15:53:20.443480 APIC: 03: enabled 1
698 15:53:20.444014 APIC: 06: enabled 1
699 15:53:20.446631 APIC: 05: enabled 1
700 15:53:20.447214 APIC: 04: enabled 1
701 15:53:20.450077 APIC: 02: enabled 1
702 15:53:20.453335 APIC: 07: enabled 1
703 15:53:20.453806 Compare with tree...
704 15:53:20.456608 Root Device: enabled 1
705 15:53:20.459821 DOMAIN: 0000: enabled 1
706 15:53:20.463190 PCI: 00:00.0: enabled 1
707 15:53:20.463780 PCI: 00:02.0: enabled 1
708 15:53:20.466555 PCI: 00:04.0: enabled 1
709 15:53:20.470035 GENERIC: 0.0: enabled 1
710 15:53:20.473474 PCI: 00:05.0: enabled 1
711 15:53:20.476796 PCI: 00:06.0: enabled 0
712 15:53:20.477264 PCI: 00:07.0: enabled 0
713 15:53:20.480042 GENERIC: 0.0: enabled 1
714 15:53:20.483572 PCI: 00:07.1: enabled 0
715 15:53:20.486335 GENERIC: 1.0: enabled 1
716 15:53:20.489766 PCI: 00:07.2: enabled 0
717 15:53:20.490189 GENERIC: 0.0: enabled 1
718 15:53:20.493206 PCI: 00:07.3: enabled 0
719 15:53:20.496656 GENERIC: 1.0: enabled 1
720 15:53:20.500072 PCI: 00:08.0: enabled 1
721 15:53:20.503401 PCI: 00:09.0: enabled 0
722 15:53:20.503822 PCI: 00:0a.0: enabled 0
723 15:53:20.506386 PCI: 00:0d.0: enabled 1
724 15:53:20.509895 USB0 port 0: enabled 1
725 15:53:20.513160 USB3 port 0: enabled 1
726 15:53:20.516512 USB3 port 1: enabled 1
727 15:53:20.519790 USB3 port 2: enabled 0
728 15:53:20.520285 USB3 port 3: enabled 0
729 15:53:20.523429 PCI: 00:0d.1: enabled 0
730 15:53:20.526283 PCI: 00:0d.2: enabled 0
731 15:53:20.530018 GENERIC: 0.0: enabled 1
732 15:53:20.533405 PCI: 00:0d.3: enabled 0
733 15:53:20.533888 PCI: 00:0e.0: enabled 0
734 15:53:20.536512 PCI: 00:10.2: enabled 1
735 15:53:20.540071 PCI: 00:10.6: enabled 0
736 15:53:20.542919 PCI: 00:10.7: enabled 0
737 15:53:20.546282 PCI: 00:12.0: enabled 0
738 15:53:20.546879 PCI: 00:12.6: enabled 0
739 15:53:20.549874 PCI: 00:13.0: enabled 0
740 15:53:20.552896 PCI: 00:14.0: enabled 1
741 15:53:20.556746 USB0 port 0: enabled 1
742 15:53:20.559958 USB2 port 0: enabled 0
743 15:53:20.560551 USB2 port 1: enabled 1
744 15:53:20.562726 USB2 port 2: enabled 1
745 15:53:20.566346 USB2 port 3: enabled 0
746 15:53:20.570192 USB2 port 4: enabled 1
747 15:53:20.572910 USB2 port 5: enabled 0
748 15:53:20.573333 USB2 port 6: enabled 0
749 15:53:20.576286 USB2 port 7: enabled 0
750 15:53:20.579728 USB2 port 8: enabled 0
751 15:53:20.583530 USB2 port 9: enabled 0
752 15:53:20.586193 USB3 port 0: enabled 0
753 15:53:20.589562 USB3 port 1: enabled 1
754 15:53:20.590145 USB3 port 2: enabled 0
755 15:53:20.592954 USB3 port 3: enabled 0
756 15:53:20.596115 PCI: 00:14.1: enabled 0
757 15:53:20.599732 PCI: 00:14.2: enabled 1
758 15:53:20.602854 PCI: 00:14.3: enabled 1
759 15:53:20.603281 GENERIC: 0.0: enabled 1
760 15:53:20.606318 PCI: 00:15.0: enabled 1
761 15:53:20.609796 I2C: 00:1a: enabled 1
762 15:53:20.613170 I2C: 00:31: enabled 1
763 15:53:20.613811 I2C: 00:32: enabled 1
764 15:53:20.615982 PCI: 00:15.1: enabled 1
765 15:53:20.619459 I2C: 00:10: enabled 1
766 15:53:20.622898 PCI: 00:15.2: enabled 1
767 15:53:20.626399 PCI: 00:15.3: enabled 1
768 15:53:20.626984 PCI: 00:16.0: enabled 1
769 15:53:20.629809 PCI: 00:16.1: enabled 0
770 15:53:20.632814 PCI: 00:16.2: enabled 0
771 15:53:20.636748 PCI: 00:16.3: enabled 0
772 15:53:20.637176 PCI: 00:16.4: enabled 0
773 15:53:20.640483 PCI: 00:16.5: enabled 0
774 15:53:20.644379 PCI: 00:17.0: enabled 1
775 15:53:20.647467 PCI: 00:19.0: enabled 0
776 15:53:20.647916 PCI: 00:19.1: enabled 1
777 15:53:20.651112 I2C: 00:15: enabled 1
778 15:53:20.654219 PCI: 00:19.2: enabled 0
779 15:53:20.657175 PCI: 00:1d.0: enabled 1
780 15:53:20.660960 GENERIC: 0.0: enabled 1
781 15:53:20.661536 PCI: 00:1e.0: enabled 1
782 15:53:20.664064 PCI: 00:1e.1: enabled 0
783 15:53:20.667474 PCI: 00:1e.2: enabled 1
784 15:53:20.717453 SPI: 00: enabled 1
785 15:53:20.718229 PCI: 00:1e.3: enabled 1
786 15:53:20.718720 SPI: 00: enabled 1
787 15:53:20.719085 PCI: 00:1f.0: enabled 1
788 15:53:20.719400 PNP: 0c09.0: enabled 1
789 15:53:20.720009 PCI: 00:1f.1: enabled 0
790 15:53:20.720343 PCI: 00:1f.2: enabled 1
791 15:53:20.720643 GENERIC: 0.0: enabled 1
792 15:53:20.720994 GENERIC: 0.0: enabled 1
793 15:53:20.721287 GENERIC: 1.0: enabled 1
794 15:53:20.721603 PCI: 00:1f.3: enabled 1
795 15:53:20.722016 PCI: 00:1f.4: enabled 0
796 15:53:20.722482 PCI: 00:1f.5: enabled 1
797 15:53:20.722794 PCI: 00:1f.6: enabled 0
798 15:53:20.723081 PCI: 00:1f.7: enabled 0
799 15:53:20.723357 CPU_CLUSTER: 0: enabled 1
800 15:53:20.723635 APIC: 00: enabled 1
801 15:53:20.723910 APIC: 01: enabled 1
802 15:53:20.724184 APIC: 03: enabled 1
803 15:53:20.724455 APIC: 06: enabled 1
804 15:53:20.747270 APIC: 05: enabled 1
805 15:53:20.747985 APIC: 04: enabled 1
806 15:53:20.748490 APIC: 02: enabled 1
807 15:53:20.749057 APIC: 07: enabled 1
808 15:53:20.749507 Root Device scanning...
809 15:53:20.749866 scan_static_bus for Root Device
810 15:53:20.750222 DOMAIN: 0000 enabled
811 15:53:20.750590 CPU_CLUSTER: 0 enabled
812 15:53:20.751361 DOMAIN: 0000 scanning...
813 15:53:20.751884 PCI: pci_scan_bus for bus 00
814 15:53:20.752217 PCI: 00:00.0 [8086/0000] ops
815 15:53:20.752565 PCI: 00:00.0 [8086/9a12] enabled
816 15:53:20.754526 PCI: 00:02.0 [8086/0000] bus ops
817 15:53:20.757335 PCI: 00:02.0 [8086/9a40] enabled
818 15:53:20.760963 PCI: 00:04.0 [8086/0000] bus ops
819 15:53:20.764349 PCI: 00:04.0 [8086/9a03] enabled
820 15:53:20.767536 PCI: 00:05.0 [8086/9a19] enabled
821 15:53:20.771619 PCI: 00:07.0 [0000/0000] hidden
822 15:53:20.774135 PCI: 00:08.0 [8086/9a11] enabled
823 15:53:20.777673 PCI: 00:0a.0 [8086/9a0d] disabled
824 15:53:20.780708 PCI: 00:0d.0 [8086/0000] bus ops
825 15:53:20.784424 PCI: 00:0d.0 [8086/9a13] enabled
826 15:53:20.787744 PCI: 00:14.0 [8086/0000] bus ops
827 15:53:20.790906 PCI: 00:14.0 [8086/a0ed] enabled
828 15:53:20.794386 PCI: 00:14.2 [8086/a0ef] enabled
829 15:53:20.797341 PCI: 00:14.3 [8086/0000] bus ops
830 15:53:20.800964 PCI: 00:14.3 [8086/a0f0] enabled
831 15:53:20.804238 PCI: 00:15.0 [8086/0000] bus ops
832 15:53:20.807456 PCI: 00:15.0 [8086/a0e8] enabled
833 15:53:20.811103 PCI: 00:15.1 [8086/0000] bus ops
834 15:53:20.814301 PCI: 00:15.1 [8086/a0e9] enabled
835 15:53:20.817123 PCI: 00:15.2 [8086/0000] bus ops
836 15:53:20.820601 PCI: 00:15.2 [8086/a0ea] enabled
837 15:53:20.824071 PCI: 00:15.3 [8086/0000] bus ops
838 15:53:20.827586 PCI: 00:15.3 [8086/a0eb] enabled
839 15:53:20.830656 PCI: 00:16.0 [8086/0000] ops
840 15:53:20.833960 PCI: 00:16.0 [8086/a0e0] enabled
841 15:53:20.840907 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 15:53:20.844329 PCI: 00:19.0 [8086/0000] bus ops
843 15:53:20.847433 PCI: 00:19.0 [8086/a0c5] disabled
844 15:53:20.850820 PCI: 00:19.1 [8086/0000] bus ops
845 15:53:20.854350 PCI: 00:19.1 [8086/a0c6] enabled
846 15:53:20.857440 PCI: 00:1d.0 [8086/0000] bus ops
847 15:53:20.860875 PCI: 00:1d.0 [8086/a0b0] enabled
848 15:53:20.864250 PCI: 00:1e.0 [8086/0000] ops
849 15:53:20.867333 PCI: 00:1e.0 [8086/a0a8] enabled
850 15:53:20.870388 PCI: 00:1e.2 [8086/0000] bus ops
851 15:53:20.873848 PCI: 00:1e.2 [8086/a0aa] enabled
852 15:53:20.877556 PCI: 00:1e.3 [8086/0000] bus ops
853 15:53:20.880319 PCI: 00:1e.3 [8086/a0ab] enabled
854 15:53:20.884005 PCI: 00:1f.0 [8086/0000] bus ops
855 15:53:20.887153 PCI: 00:1f.0 [8086/a087] enabled
856 15:53:20.887450 RTC Init
857 15:53:20.890634 Set power on after power failure.
858 15:53:20.893549 Disabling Deep S3
859 15:53:20.893987 Disabling Deep S3
860 15:53:20.897145 Disabling Deep S4
861 15:53:20.897469 Disabling Deep S4
862 15:53:20.900425 Disabling Deep S5
863 15:53:20.900842 Disabling Deep S5
864 15:53:20.903924 PCI: 00:1f.2 [0000/0000] hidden
865 15:53:20.907246 PCI: 00:1f.3 [8086/0000] bus ops
866 15:53:20.910608 PCI: 00:1f.3 [8086/a0c8] enabled
867 15:53:20.913875 PCI: 00:1f.5 [8086/0000] bus ops
868 15:53:20.917233 PCI: 00:1f.5 [8086/a0a4] enabled
869 15:53:20.920969 PCI: Leftover static devices:
870 15:53:20.923752 PCI: 00:10.2
871 15:53:20.924054 PCI: 00:10.6
872 15:53:20.927295 PCI: 00:10.7
873 15:53:20.927685 PCI: 00:06.0
874 15:53:20.928023 PCI: 00:07.1
875 15:53:20.930750 PCI: 00:07.2
876 15:53:20.931047 PCI: 00:07.3
877 15:53:20.933636 PCI: 00:09.0
878 15:53:20.933956 PCI: 00:0d.1
879 15:53:20.934225 PCI: 00:0d.2
880 15:53:20.937145 PCI: 00:0d.3
881 15:53:20.937460 PCI: 00:0e.0
882 15:53:20.940728 PCI: 00:12.0
883 15:53:20.941069 PCI: 00:12.6
884 15:53:20.944058 PCI: 00:13.0
885 15:53:20.944413 PCI: 00:14.1
886 15:53:20.944789 PCI: 00:16.1
887 15:53:20.947616 PCI: 00:16.2
888 15:53:20.947963 PCI: 00:16.3
889 15:53:20.950625 PCI: 00:16.4
890 15:53:20.951037 PCI: 00:16.5
891 15:53:20.951378 PCI: 00:17.0
892 15:53:20.953729 PCI: 00:19.2
893 15:53:20.954029 PCI: 00:1e.1
894 15:53:20.957086 PCI: 00:1f.1
895 15:53:20.957385 PCI: 00:1f.4
896 15:53:20.957654 PCI: 00:1f.6
897 15:53:20.960484 PCI: 00:1f.7
898 15:53:20.963606 PCI: Check your devicetree.cb.
899 15:53:20.966847 PCI: 00:02.0 scanning...
900 15:53:20.970650 scan_generic_bus for PCI: 00:02.0
901 15:53:20.973865 scan_generic_bus for PCI: 00:02.0 done
902 15:53:20.977212 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 15:53:20.980363 PCI: 00:04.0 scanning...
904 15:53:20.983774 scan_generic_bus for PCI: 00:04.0
905 15:53:20.987066 GENERIC: 0.0 enabled
906 15:53:20.993649 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 15:53:20.996625 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 15:53:21.000353 PCI: 00:0d.0 scanning...
909 15:53:21.003517 scan_static_bus for PCI: 00:0d.0
910 15:53:21.003618 USB0 port 0 enabled
911 15:53:21.006742 USB0 port 0 scanning...
912 15:53:21.010010 scan_static_bus for USB0 port 0
913 15:53:21.013391 USB3 port 0 enabled
914 15:53:21.016738 USB3 port 1 enabled
915 15:53:21.016815 USB3 port 2 disabled
916 15:53:21.019945 USB3 port 3 disabled
917 15:53:21.023524 USB3 port 0 scanning...
918 15:53:21.026975 scan_static_bus for USB3 port 0
919 15:53:21.030109 scan_static_bus for USB3 port 0 done
920 15:53:21.033409 scan_bus: bus USB3 port 0 finished in 6 msecs
921 15:53:21.036645 USB3 port 1 scanning...
922 15:53:21.040196 scan_static_bus for USB3 port 1
923 15:53:21.043130 scan_static_bus for USB3 port 1 done
924 15:53:21.046636 scan_bus: bus USB3 port 1 finished in 6 msecs
925 15:53:21.053263 scan_static_bus for USB0 port 0 done
926 15:53:21.056437 scan_bus: bus USB0 port 0 finished in 43 msecs
927 15:53:21.060045 scan_static_bus for PCI: 00:0d.0 done
928 15:53:21.066245 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 15:53:21.066322 PCI: 00:14.0 scanning...
930 15:53:21.069908 scan_static_bus for PCI: 00:14.0
931 15:53:21.072885 USB0 port 0 enabled
932 15:53:21.076556 USB0 port 0 scanning...
933 15:53:21.079894 scan_static_bus for USB0 port 0
934 15:53:21.079974 USB2 port 0 disabled
935 15:53:21.083136 USB2 port 1 enabled
936 15:53:21.086755 USB2 port 2 enabled
937 15:53:21.086849 USB2 port 3 disabled
938 15:53:21.090252 USB2 port 4 enabled
939 15:53:21.093296 USB2 port 5 disabled
940 15:53:21.093724 USB2 port 6 disabled
941 15:53:21.097094 USB2 port 7 disabled
942 15:53:21.097645 USB2 port 8 disabled
943 15:53:21.100020 USB2 port 9 disabled
944 15:53:21.103453 USB3 port 0 disabled
945 15:53:21.103876 USB3 port 1 enabled
946 15:53:21.106838 USB3 port 2 disabled
947 15:53:21.110144 USB3 port 3 disabled
948 15:53:21.110662 USB2 port 1 scanning...
949 15:53:21.113512 scan_static_bus for USB2 port 1
950 15:53:21.120467 scan_static_bus for USB2 port 1 done
951 15:53:21.123884 scan_bus: bus USB2 port 1 finished in 6 msecs
952 15:53:21.127185 USB2 port 2 scanning...
953 15:53:21.130352 scan_static_bus for USB2 port 2
954 15:53:21.133641 scan_static_bus for USB2 port 2 done
955 15:53:21.137060 scan_bus: bus USB2 port 2 finished in 6 msecs
956 15:53:21.139945 USB2 port 4 scanning...
957 15:53:21.143589 scan_static_bus for USB2 port 4
958 15:53:21.147331 scan_static_bus for USB2 port 4 done
959 15:53:21.150145 scan_bus: bus USB2 port 4 finished in 6 msecs
960 15:53:21.153634 USB3 port 1 scanning...
961 15:53:21.156880 scan_static_bus for USB3 port 1
962 15:53:21.160270 scan_static_bus for USB3 port 1 done
963 15:53:21.167255 scan_bus: bus USB3 port 1 finished in 6 msecs
964 15:53:21.170554 scan_static_bus for USB0 port 0 done
965 15:53:21.173274 scan_bus: bus USB0 port 0 finished in 93 msecs
966 15:53:21.177019 scan_static_bus for PCI: 00:14.0 done
967 15:53:21.184108 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
968 15:53:21.186456 PCI: 00:14.3 scanning...
969 15:53:21.189919 scan_static_bus for PCI: 00:14.3
970 15:53:21.190393 GENERIC: 0.0 enabled
971 15:53:21.196917 scan_static_bus for PCI: 00:14.3 done
972 15:53:21.200246 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 15:53:21.202970 PCI: 00:15.0 scanning...
974 15:53:21.206961 scan_static_bus for PCI: 00:15.0
975 15:53:21.207550 I2C: 00:1a enabled
976 15:53:21.210156 I2C: 00:31 enabled
977 15:53:21.213624 I2C: 00:32 enabled
978 15:53:21.217318 scan_static_bus for PCI: 00:15.0 done
979 15:53:21.220717 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 15:53:21.224154 PCI: 00:15.1 scanning...
981 15:53:21.227436 scan_static_bus for PCI: 00:15.1
982 15:53:21.227972 I2C: 00:10 enabled
983 15:53:21.230497 scan_static_bus for PCI: 00:15.1 done
984 15:53:21.237121 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 15:53:21.240601 PCI: 00:15.2 scanning...
986 15:53:21.244321 scan_static_bus for PCI: 00:15.2
987 15:53:21.247589 scan_static_bus for PCI: 00:15.2 done
988 15:53:21.251233 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 15:53:21.254138 PCI: 00:15.3 scanning...
990 15:53:21.257329 scan_static_bus for PCI: 00:15.3
991 15:53:21.260904 scan_static_bus for PCI: 00:15.3 done
992 15:53:21.267750 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 15:53:21.268293 PCI: 00:19.1 scanning...
994 15:53:21.271065 scan_static_bus for PCI: 00:19.1
995 15:53:21.273756 I2C: 00:15 enabled
996 15:53:21.277781 scan_static_bus for PCI: 00:19.1 done
997 15:53:21.283797 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 15:53:21.284250 PCI: 00:1d.0 scanning...
999 15:53:21.287154 do_pci_scan_bridge for PCI: 00:1d.0
1000 15:53:21.290493 PCI: pci_scan_bus for bus 01
1001 15:53:21.293897 PCI: 01:00.0 [1c5c/174a] enabled
1002 15:53:21.297435 GENERIC: 0.0 enabled
1003 15:53:21.300823 Enabling Common Clock Configuration
1004 15:53:21.303754 L1 Sub-State supported from root port 29
1005 15:53:21.307342 L1 Sub-State Support = 0xf
1006 15:53:21.310862 CommonModeRestoreTime = 0x28
1007 15:53:21.313981 Power On Value = 0x16, Power On Scale = 0x0
1008 15:53:21.317208 ASPM: Enabled L1
1009 15:53:21.320313 PCIe: Max_Payload_Size adjusted to 128
1010 15:53:21.327039 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 15:53:21.327561 PCI: 00:1e.2 scanning...
1012 15:53:21.333954 scan_generic_bus for PCI: 00:1e.2
1013 15:53:21.334466 SPI: 00 enabled
1014 15:53:21.340916 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 15:53:21.343798 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 15:53:21.347690 PCI: 00:1e.3 scanning...
1017 15:53:21.350329 scan_generic_bus for PCI: 00:1e.3
1018 15:53:21.354157 SPI: 00 enabled
1019 15:53:21.357387 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 15:53:21.364347 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 15:53:21.367226 PCI: 00:1f.0 scanning...
1022 15:53:21.370659 scan_static_bus for PCI: 00:1f.0
1023 15:53:21.371086 PNP: 0c09.0 enabled
1024 15:53:21.373558 PNP: 0c09.0 scanning...
1025 15:53:21.377134 scan_static_bus for PNP: 0c09.0
1026 15:53:21.380885 scan_static_bus for PNP: 0c09.0 done
1027 15:53:21.387265 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 15:53:21.390229 scan_static_bus for PCI: 00:1f.0 done
1029 15:53:21.393632 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 15:53:21.396994 PCI: 00:1f.2 scanning...
1031 15:53:21.400296 scan_static_bus for PCI: 00:1f.2
1032 15:53:21.403943 GENERIC: 0.0 enabled
1033 15:53:21.404475 GENERIC: 0.0 scanning...
1034 15:53:21.410529 scan_static_bus for GENERIC: 0.0
1035 15:53:21.411100 GENERIC: 0.0 enabled
1036 15:53:21.413807 GENERIC: 1.0 enabled
1037 15:53:21.416976 scan_static_bus for GENERIC: 0.0 done
1038 15:53:21.420235 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 15:53:21.427155 scan_static_bus for PCI: 00:1f.2 done
1040 15:53:21.430434 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 15:53:21.433782 PCI: 00:1f.3 scanning...
1042 15:53:21.437203 scan_static_bus for PCI: 00:1f.3
1043 15:53:21.440326 scan_static_bus for PCI: 00:1f.3 done
1044 15:53:21.443993 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 15:53:21.446977 PCI: 00:1f.5 scanning...
1046 15:53:21.450618 scan_generic_bus for PCI: 00:1f.5
1047 15:53:21.454009 scan_generic_bus for PCI: 00:1f.5 done
1048 15:53:21.460213 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 15:53:21.463556 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1050 15:53:21.467046 scan_static_bus for Root Device done
1051 15:53:21.473980 scan_bus: bus Root Device finished in 737 msecs
1052 15:53:21.474494 done
1053 15:53:21.480223 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1054 15:53:21.483825 Chrome EC: UHEPI supported
1055 15:53:21.490039 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 15:53:21.496838 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 15:53:21.500052 SPI flash protection: WPSW=0 SRP0=0
1058 15:53:21.503511 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 15:53:21.510102 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 15:53:21.513501 found VGA at PCI: 00:02.0
1061 15:53:21.516348 Setting up VGA for PCI: 00:02.0
1062 15:53:21.519873 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 15:53:21.526595 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 15:53:21.530055 Allocating resources...
1065 15:53:21.530513 Reading resources...
1066 15:53:21.533319 Root Device read_resources bus 0 link: 0
1067 15:53:21.539776 DOMAIN: 0000 read_resources bus 0 link: 0
1068 15:53:21.543475 PCI: 00:04.0 read_resources bus 1 link: 0
1069 15:53:21.550098 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 15:53:21.553083 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 15:53:21.560203 USB0 port 0 read_resources bus 0 link: 0
1072 15:53:21.563311 USB0 port 0 read_resources bus 0 link: 0 done
1073 15:53:21.570084 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 15:53:21.573272 PCI: 00:14.0 read_resources bus 0 link: 0
1075 15:53:21.576166 USB0 port 0 read_resources bus 0 link: 0
1076 15:53:21.584242 USB0 port 0 read_resources bus 0 link: 0 done
1077 15:53:21.587449 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 15:53:21.594378 PCI: 00:14.3 read_resources bus 0 link: 0
1079 15:53:21.597627 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 15:53:21.604139 PCI: 00:15.0 read_resources bus 0 link: 0
1081 15:53:21.607394 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 15:53:21.614142 PCI: 00:15.1 read_resources bus 0 link: 0
1083 15:53:21.617186 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 15:53:21.624904 PCI: 00:19.1 read_resources bus 0 link: 0
1085 15:53:21.627766 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 15:53:21.634787 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 15:53:21.638458 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 15:53:21.644726 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 15:53:21.648048 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 15:53:21.654768 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 15:53:21.657900 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 15:53:21.664495 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 15:53:21.668225 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 15:53:21.670884 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 15:53:21.677601 GENERIC: 0.0 read_resources bus 0 link: 0
1096 15:53:21.681242 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 15:53:21.687570 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 15:53:21.694192 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 15:53:21.697672 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 15:53:21.701172 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 15:53:21.707773 Root Device read_resources bus 0 link: 0 done
1102 15:53:21.711430 Done reading resources.
1103 15:53:21.714251 Show resources in subtree (Root Device)...After reading.
1104 15:53:21.721357 Root Device child on link 0 DOMAIN: 0000
1105 15:53:21.724487 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 15:53:21.734876 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 15:53:21.744451 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 15:53:21.744967 PCI: 00:00.0
1109 15:53:21.754334 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 15:53:21.764477 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 15:53:21.774202 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 15:53:21.785086 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 15:53:21.790927 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 15:53:21.801215 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 15:53:21.810993 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 15:53:21.820898 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 15:53:21.831003 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 15:53:21.837251 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 15:53:21.847731 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 15:53:21.857373 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 15:53:21.867300 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 15:53:21.877046 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 15:53:21.883856 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 15:53:21.893601 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 15:53:21.903542 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 15:53:21.913569 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 15:53:21.923607 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 15:53:21.933680 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 15:53:21.934141 PCI: 00:02.0
1130 15:53:21.943812 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 15:53:21.957241 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 15:53:21.963544 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 15:53:21.970229 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 15:53:21.979983 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 15:53:21.980417 GENERIC: 0.0
1136 15:53:21.983572 PCI: 00:05.0
1137 15:53:21.993731 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 15:53:21.996977 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 15:53:22.000525 GENERIC: 0.0
1140 15:53:22.001029 PCI: 00:08.0
1141 15:53:22.010356 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 15:53:22.013190 PCI: 00:0a.0
1143 15:53:22.016542 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 15:53:22.026522 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 15:53:22.030083 USB0 port 0 child on link 0 USB3 port 0
1146 15:53:22.033373 USB3 port 0
1147 15:53:22.033923 USB3 port 1
1148 15:53:22.037000 USB3 port 2
1149 15:53:22.037412 USB3 port 3
1150 15:53:22.043052 PCI: 00:14.0 child on link 0 USB0 port 0
1151 15:53:22.053203 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 15:53:22.056721 USB0 port 0 child on link 0 USB2 port 0
1153 15:53:22.059768 USB2 port 0
1154 15:53:22.060243 USB2 port 1
1155 15:53:22.063158 USB2 port 2
1156 15:53:22.063613 USB2 port 3
1157 15:53:22.066779 USB2 port 4
1158 15:53:22.067226 USB2 port 5
1159 15:53:22.069613 USB2 port 6
1160 15:53:22.070049 USB2 port 7
1161 15:53:22.073171 USB2 port 8
1162 15:53:22.073588 USB2 port 9
1163 15:53:22.076736 USB3 port 0
1164 15:53:22.077183 USB3 port 1
1165 15:53:22.080084 USB3 port 2
1166 15:53:22.080544 USB3 port 3
1167 15:53:22.083473 PCI: 00:14.2
1168 15:53:22.093187 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 15:53:22.103533 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 15:53:22.106545 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 15:53:22.116991 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 15:53:22.119706 GENERIC: 0.0
1173 15:53:22.123318 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 15:53:22.133412 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 15:53:22.136631 I2C: 00:1a
1176 15:53:22.137263 I2C: 00:31
1177 15:53:22.137634 I2C: 00:32
1178 15:53:22.143157 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 15:53:22.153065 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 15:53:22.153487 I2C: 00:10
1181 15:53:22.156481 PCI: 00:15.2
1182 15:53:22.166244 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 15:53:22.166686 PCI: 00:15.3
1184 15:53:22.176103 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 15:53:22.179526 PCI: 00:16.0
1186 15:53:22.189555 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 15:53:22.189975 PCI: 00:19.0
1188 15:53:22.196349 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 15:53:22.205683 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 15:53:22.206101 I2C: 00:15
1191 15:53:22.209137 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 15:53:22.219058 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 15:53:22.229606 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 15:53:22.239041 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 15:53:22.239467 GENERIC: 0.0
1196 15:53:22.242197 PCI: 01:00.0
1197 15:53:22.252316 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 15:53:22.262537 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1199 15:53:22.269170 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1200 15:53:22.272545 PCI: 00:1e.0
1201 15:53:22.282270 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1202 15:53:22.289210 PCI: 00:1e.2 child on link 0 SPI: 00
1203 15:53:22.298942 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 15:53:22.299440 SPI: 00
1205 15:53:22.302550 PCI: 00:1e.3 child on link 0 SPI: 00
1206 15:53:22.312374 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 15:53:22.312965 SPI: 00
1208 15:53:22.318441 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1209 15:53:22.325410 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1210 15:53:22.328733 PNP: 0c09.0
1211 15:53:22.339069 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1212 15:53:22.342312 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1213 15:53:22.351815 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1214 15:53:22.358787 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1215 15:53:22.365299 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1216 15:53:22.365783 GENERIC: 0.0
1217 15:53:22.368790 GENERIC: 1.0
1218 15:53:22.369211 PCI: 00:1f.3
1219 15:53:22.378591 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 15:53:22.391799 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1221 15:53:22.392222 PCI: 00:1f.5
1222 15:53:22.401761 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1223 15:53:22.405275 CPU_CLUSTER: 0 child on link 0 APIC: 00
1224 15:53:22.405685 APIC: 00
1225 15:53:22.408897 APIC: 01
1226 15:53:22.409307 APIC: 03
1227 15:53:22.411724 APIC: 06
1228 15:53:22.412134 APIC: 05
1229 15:53:22.412456 APIC: 04
1230 15:53:22.415384 APIC: 02
1231 15:53:22.415904 APIC: 07
1232 15:53:22.421609 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1233 15:53:22.428375 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1234 15:53:22.435186 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1235 15:53:22.441589 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1236 15:53:22.445035 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1237 15:53:22.448318 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1238 15:53:22.454982 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1239 15:53:22.461913 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1240 15:53:22.468536 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1241 15:53:22.474835 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1242 15:53:22.485129 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1243 15:53:22.488017 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1244 15:53:22.498287 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 15:53:22.504998 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1246 15:53:22.511794 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1247 15:53:22.515404 DOMAIN: 0000: Resource ranges:
1248 15:53:22.518051 * Base: 1000, Size: 800, Tag: 100
1249 15:53:22.521715 * Base: 1900, Size: e700, Tag: 100
1250 15:53:22.527930 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1251 15:53:22.534748 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1252 15:53:22.541715 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1253 15:53:22.548290 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1254 15:53:22.558197 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1255 15:53:22.564933 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1256 15:53:22.571348 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1257 15:53:22.581429 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1258 15:53:22.587812 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1259 15:53:22.594342 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1260 15:53:22.604720 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1261 15:53:22.611124 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1262 15:53:22.617717 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1263 15:53:22.627882 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1264 15:53:22.634392 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1265 15:53:22.640631 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1266 15:53:22.651238 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1267 15:53:22.657619 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1268 15:53:22.664269 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1269 15:53:22.674068 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1270 15:53:22.680742 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1271 15:53:22.687676 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1272 15:53:22.693849 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1273 15:53:22.703920 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1274 15:53:22.711058 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1275 15:53:22.714106 DOMAIN: 0000: Resource ranges:
1276 15:53:22.717234 * Base: 7fc00000, Size: 40400000, Tag: 200
1277 15:53:22.723711 * Base: d0000000, Size: 28000000, Tag: 200
1278 15:53:22.727478 * Base: fa000000, Size: 1000000, Tag: 200
1279 15:53:22.730826 * Base: fb001000, Size: 2fff000, Tag: 200
1280 15:53:22.737168 * Base: fe010000, Size: 2e000, Tag: 200
1281 15:53:22.740748 * Base: fe03f000, Size: d41000, Tag: 200
1282 15:53:22.743818 * Base: fed88000, Size: 8000, Tag: 200
1283 15:53:22.747238 * Base: fed93000, Size: d000, Tag: 200
1284 15:53:22.750504 * Base: feda2000, Size: 1e000, Tag: 200
1285 15:53:22.757357 * Base: fede0000, Size: 1220000, Tag: 200
1286 15:53:22.760571 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1287 15:53:22.767376 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1288 15:53:22.773927 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1289 15:53:22.780436 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1290 15:53:22.787056 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1291 15:53:22.793644 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1292 15:53:22.800500 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1293 15:53:22.807169 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1294 15:53:22.813583 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1295 15:53:22.820231 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1296 15:53:22.826705 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1297 15:53:22.833420 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1298 15:53:22.839758 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1299 15:53:22.846238 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1300 15:53:22.853185 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1301 15:53:22.859893 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1302 15:53:22.866161 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1303 15:53:22.872736 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1304 15:53:22.879584 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1305 15:53:22.886265 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1306 15:53:22.893426 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1307 15:53:22.900132 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1308 15:53:22.906621 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1309 15:53:22.916502 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1310 15:53:22.922806 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1311 15:53:22.926222 PCI: 00:1d.0: Resource ranges:
1312 15:53:22.929798 * Base: 7fc00000, Size: 100000, Tag: 200
1313 15:53:22.936248 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1314 15:53:22.942890 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1315 15:53:22.949259 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1316 15:53:22.959338 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1317 15:53:22.966186 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1318 15:53:22.969611 Root Device assign_resources, bus 0 link: 0
1319 15:53:22.975923 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 15:53:22.983046 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1321 15:53:22.992768 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1322 15:53:22.999565 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1323 15:53:23.009397 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1324 15:53:23.013167 PCI: 00:04.0 assign_resources, bus 1 link: 0
1325 15:53:23.016305 PCI: 00:04.0 assign_resources, bus 1 link: 0
1326 15:53:23.025812 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1327 15:53:23.032790 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1328 15:53:23.042596 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1329 15:53:23.046192 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1330 15:53:23.052647 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1331 15:53:23.060031 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1332 15:53:23.062531 PCI: 00:14.0 assign_resources, bus 0 link: 0
1333 15:53:23.069140 PCI: 00:14.0 assign_resources, bus 0 link: 0
1334 15:53:23.075937 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1335 15:53:23.085765 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1336 15:53:23.092445 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1337 15:53:23.099182 PCI: 00:14.3 assign_resources, bus 0 link: 0
1338 15:53:23.102527 PCI: 00:14.3 assign_resources, bus 0 link: 0
1339 15:53:23.108983 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1340 15:53:23.116097 PCI: 00:15.0 assign_resources, bus 0 link: 0
1341 15:53:23.119063 PCI: 00:15.0 assign_resources, bus 0 link: 0
1342 15:53:23.128953 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1343 15:53:23.132364 PCI: 00:15.1 assign_resources, bus 0 link: 0
1344 15:53:23.135870 PCI: 00:15.1 assign_resources, bus 0 link: 0
1345 15:53:23.145898 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1346 15:53:23.152885 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1347 15:53:23.162269 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1348 15:53:23.168899 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1349 15:53:23.175835 PCI: 00:19.1 assign_resources, bus 0 link: 0
1350 15:53:23.179040 PCI: 00:19.1 assign_resources, bus 0 link: 0
1351 15:53:23.188877 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1352 15:53:23.198595 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 15:53:23.205632 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1354 15:53:23.212305 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 15:53:23.218794 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1356 15:53:23.228781 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1357 15:53:23.235225 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1358 15:53:23.238713 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 15:53:23.248422 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1360 15:53:23.252017 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1361 15:53:23.258732 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1362 15:53:23.265099 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1363 15:53:23.268582 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1364 15:53:23.275126 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1365 15:53:23.278719 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 15:53:23.285409 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1367 15:53:23.288986 LPC: Trying to open IO window from 800 size 1ff
1368 15:53:23.298689 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1369 15:53:23.305620 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1370 15:53:23.311940 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1371 15:53:23.318948 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 15:53:23.322776 Root Device assign_resources, bus 0 link: 0
1373 15:53:23.325577 Done setting resources.
1374 15:53:23.332219 Show resources in subtree (Root Device)...After assigning values.
1375 15:53:23.335671 Root Device child on link 0 DOMAIN: 0000
1376 15:53:23.342423 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1377 15:53:23.349236 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1378 15:53:23.358561 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1379 15:53:23.362172 PCI: 00:00.0
1380 15:53:23.371907 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1381 15:53:23.382254 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1382 15:53:23.388788 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1383 15:53:23.399156 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1384 15:53:23.408705 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1385 15:53:23.418623 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1386 15:53:23.428423 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1387 15:53:23.435212 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1388 15:53:23.445157 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1389 15:53:23.455205 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1390 15:53:23.464916 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1391 15:53:23.474441 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1392 15:53:23.484388 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1393 15:53:23.493319 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1394 15:53:23.501530 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1395 15:53:23.511506 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1396 15:53:23.521950 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1397 15:53:23.531792 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1398 15:53:23.541199 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1399 15:53:23.551467 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1400 15:53:23.551911 PCI: 00:02.0
1401 15:53:23.561210 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1402 15:53:23.571151 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1403 15:53:23.580931 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1404 15:53:23.587745 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1405 15:53:23.597746 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1406 15:53:23.597904 GENERIC: 0.0
1407 15:53:23.600575 PCI: 00:05.0
1408 15:53:23.611453 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1409 15:53:23.614278 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1410 15:53:23.617583 GENERIC: 0.0
1411 15:53:23.617674 PCI: 00:08.0
1412 15:53:23.627762 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1413 15:53:23.630878 PCI: 00:0a.0
1414 15:53:23.634696 PCI: 00:0d.0 child on link 0 USB0 port 0
1415 15:53:23.644127 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1416 15:53:23.651263 USB0 port 0 child on link 0 USB3 port 0
1417 15:53:23.651493 USB3 port 0
1418 15:53:23.654188 USB3 port 1
1419 15:53:23.654357 USB3 port 2
1420 15:53:23.658004 USB3 port 3
1421 15:53:23.660936 PCI: 00:14.0 child on link 0 USB0 port 0
1422 15:53:23.671229 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1423 15:53:23.678298 USB0 port 0 child on link 0 USB2 port 0
1424 15:53:23.678829 USB2 port 0
1425 15:53:23.681279 USB2 port 1
1426 15:53:23.681690 USB2 port 2
1427 15:53:23.684806 USB2 port 3
1428 15:53:23.685337 USB2 port 4
1429 15:53:23.687903 USB2 port 5
1430 15:53:23.688320 USB2 port 6
1431 15:53:23.691502 USB2 port 7
1432 15:53:23.692033 USB2 port 8
1433 15:53:23.694642 USB2 port 9
1434 15:53:23.695071 USB3 port 0
1435 15:53:23.698245 USB3 port 1
1436 15:53:23.698812 USB3 port 2
1437 15:53:23.701421 USB3 port 3
1438 15:53:23.701868 PCI: 00:14.2
1439 15:53:23.714460 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1440 15:53:23.724306 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1441 15:53:23.727957 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1442 15:53:23.737720 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1443 15:53:23.741072 GENERIC: 0.0
1444 15:53:23.744485 PCI: 00:15.0 child on link 0 I2C: 00:1a
1445 15:53:23.754732 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1446 15:53:23.758152 I2C: 00:1a
1447 15:53:23.758564 I2C: 00:31
1448 15:53:23.758889 I2C: 00:32
1449 15:53:23.765019 PCI: 00:15.1 child on link 0 I2C: 00:10
1450 15:53:23.774783 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1451 15:53:23.775378 I2C: 00:10
1452 15:53:23.778059 PCI: 00:15.2
1453 15:53:23.787659 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1454 15:53:23.788071 PCI: 00:15.3
1455 15:53:23.800882 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1456 15:53:23.801294 PCI: 00:16.0
1457 15:53:23.811303 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1458 15:53:23.814106 PCI: 00:19.0
1459 15:53:23.817394 PCI: 00:19.1 child on link 0 I2C: 00:15
1460 15:53:23.827739 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1461 15:53:23.830637 I2C: 00:15
1462 15:53:23.833942 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1463 15:53:23.844332 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1464 15:53:23.854152 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1465 15:53:23.863874 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1466 15:53:23.867355 GENERIC: 0.0
1467 15:53:23.867658 PCI: 01:00.0
1468 15:53:23.880657 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1469 15:53:23.890277 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1470 15:53:23.900247 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1471 15:53:23.900555 PCI: 00:1e.0
1472 15:53:23.913794 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1473 15:53:23.916947 PCI: 00:1e.2 child on link 0 SPI: 00
1474 15:53:23.927152 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1475 15:53:23.927506 SPI: 00
1476 15:53:23.934114 PCI: 00:1e.3 child on link 0 SPI: 00
1477 15:53:23.943530 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1478 15:53:23.943838 SPI: 00
1479 15:53:23.947160 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1480 15:53:23.956933 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1481 15:53:23.960627 PNP: 0c09.0
1482 15:53:23.967316 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1483 15:53:23.973816 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1484 15:53:23.980342 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1485 15:53:23.990510 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1486 15:53:23.997481 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1487 15:53:23.998083 GENERIC: 0.0
1488 15:53:24.000760 GENERIC: 1.0
1489 15:53:24.001240 PCI: 00:1f.3
1490 15:53:24.010483 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1491 15:53:24.020292 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1492 15:53:24.023691 PCI: 00:1f.5
1493 15:53:24.033842 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1494 15:53:24.037090 CPU_CLUSTER: 0 child on link 0 APIC: 00
1495 15:53:24.040332 APIC: 00
1496 15:53:24.040805 APIC: 01
1497 15:53:24.043478 APIC: 03
1498 15:53:24.043852 APIC: 06
1499 15:53:24.044148 APIC: 05
1500 15:53:24.046933 APIC: 04
1501 15:53:24.047351 APIC: 02
1502 15:53:24.047734 APIC: 07
1503 15:53:24.050120 Done allocating resources.
1504 15:53:24.056774 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1505 15:53:24.063706 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1506 15:53:24.066654 Configure GPIOs for I2S audio on UP4.
1507 15:53:24.073480 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1508 15:53:24.076953 Enabling resources...
1509 15:53:24.080067 PCI: 00:00.0 subsystem <- 8086/9a12
1510 15:53:24.083650 PCI: 00:00.0 cmd <- 06
1511 15:53:24.086762 PCI: 00:02.0 subsystem <- 8086/9a40
1512 15:53:24.090089 PCI: 00:02.0 cmd <- 03
1513 15:53:24.093457 PCI: 00:04.0 subsystem <- 8086/9a03
1514 15:53:24.093864 PCI: 00:04.0 cmd <- 02
1515 15:53:24.100502 PCI: 00:05.0 subsystem <- 8086/9a19
1516 15:53:24.100911 PCI: 00:05.0 cmd <- 02
1517 15:53:24.103879 PCI: 00:08.0 subsystem <- 8086/9a11
1518 15:53:24.107271 PCI: 00:08.0 cmd <- 06
1519 15:53:24.110283 PCI: 00:0d.0 subsystem <- 8086/9a13
1520 15:53:24.113510 PCI: 00:0d.0 cmd <- 02
1521 15:53:24.117164 PCI: 00:14.0 subsystem <- 8086/a0ed
1522 15:53:24.120496 PCI: 00:14.0 cmd <- 02
1523 15:53:24.123830 PCI: 00:14.2 subsystem <- 8086/a0ef
1524 15:53:24.126851 PCI: 00:14.2 cmd <- 02
1525 15:53:24.130285 PCI: 00:14.3 subsystem <- 8086/a0f0
1526 15:53:24.133719 PCI: 00:14.3 cmd <- 02
1527 15:53:24.137055 PCI: 00:15.0 subsystem <- 8086/a0e8
1528 15:53:24.137462 PCI: 00:15.0 cmd <- 02
1529 15:53:24.143703 PCI: 00:15.1 subsystem <- 8086/a0e9
1530 15:53:24.144090 PCI: 00:15.1 cmd <- 02
1531 15:53:24.147327 PCI: 00:15.2 subsystem <- 8086/a0ea
1532 15:53:24.150958 PCI: 00:15.2 cmd <- 02
1533 15:53:24.153686 PCI: 00:15.3 subsystem <- 8086/a0eb
1534 15:53:24.157303 PCI: 00:15.3 cmd <- 02
1535 15:53:24.160589 PCI: 00:16.0 subsystem <- 8086/a0e0
1536 15:53:24.163725 PCI: 00:16.0 cmd <- 02
1537 15:53:24.167219 PCI: 00:19.1 subsystem <- 8086/a0c6
1538 15:53:24.170460 PCI: 00:19.1 cmd <- 02
1539 15:53:24.173866 PCI: 00:1d.0 bridge ctrl <- 0013
1540 15:53:24.177205 PCI: 00:1d.0 subsystem <- 8086/a0b0
1541 15:53:24.180698 PCI: 00:1d.0 cmd <- 06
1542 15:53:24.183554 PCI: 00:1e.0 subsystem <- 8086/a0a8
1543 15:53:24.183907 PCI: 00:1e.0 cmd <- 06
1544 15:53:24.190531 PCI: 00:1e.2 subsystem <- 8086/a0aa
1545 15:53:24.190985 PCI: 00:1e.2 cmd <- 06
1546 15:53:24.193775 PCI: 00:1e.3 subsystem <- 8086/a0ab
1547 15:53:24.197074 PCI: 00:1e.3 cmd <- 02
1548 15:53:24.200356 PCI: 00:1f.0 subsystem <- 8086/a087
1549 15:53:24.204020 PCI: 00:1f.0 cmd <- 407
1550 15:53:24.207347 PCI: 00:1f.3 subsystem <- 8086/a0c8
1551 15:53:24.210857 PCI: 00:1f.3 cmd <- 02
1552 15:53:24.213633 PCI: 00:1f.5 subsystem <- 8086/a0a4
1553 15:53:24.217196 PCI: 00:1f.5 cmd <- 406
1554 15:53:24.220754 PCI: 01:00.0 cmd <- 02
1555 15:53:24.225127 done.
1556 15:53:24.228636 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1557 15:53:24.232030 Initializing devices...
1558 15:53:24.235506 Root Device init
1559 15:53:24.238864 Chrome EC: Set SMI mask to 0x0000000000000000
1560 15:53:24.245383 Chrome EC: clear events_b mask to 0x0000000000000000
1561 15:53:24.251885 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1562 15:53:24.255226 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1563 15:53:24.262171 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1564 15:53:24.268581 Chrome EC: Set WAKE mask to 0x0000000000000000
1565 15:53:24.271723 fw_config match found: DB_USB=USB3_ACTIVE
1566 15:53:24.278862 Configure Right Type-C port orientation for retimer
1567 15:53:24.281842 Root Device init finished in 42 msecs
1568 15:53:24.285008 PCI: 00:00.0 init
1569 15:53:24.285394 CPU TDP = 9 Watts
1570 15:53:24.288228 CPU PL1 = 9 Watts
1571 15:53:24.291719 CPU PL2 = 40 Watts
1572 15:53:24.292104 CPU PL4 = 83 Watts
1573 15:53:24.295202 PCI: 00:00.0 init finished in 8 msecs
1574 15:53:24.298666 PCI: 00:02.0 init
1575 15:53:24.302013 GMA: Found VBT in CBFS
1576 15:53:24.304889 GMA: Found valid VBT in CBFS
1577 15:53:24.308210 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1578 15:53:24.318739 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1579 15:53:24.321632 PCI: 00:02.0 init finished in 18 msecs
1580 15:53:24.322163 PCI: 00:05.0 init
1581 15:53:24.328564 PCI: 00:05.0 init finished in 0 msecs
1582 15:53:24.329072 PCI: 00:08.0 init
1583 15:53:24.334871 PCI: 00:08.0 init finished in 0 msecs
1584 15:53:24.335422 PCI: 00:14.0 init
1585 15:53:24.341706 PCI: 00:14.0 init finished in 0 msecs
1586 15:53:24.342235 PCI: 00:14.2 init
1587 15:53:24.344916 PCI: 00:14.2 init finished in 0 msecs
1588 15:53:24.348389 PCI: 00:15.0 init
1589 15:53:24.351717 I2C bus 0 version 0x3230302a
1590 15:53:24.355038 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1591 15:53:24.358271 PCI: 00:15.0 init finished in 6 msecs
1592 15:53:24.361563 PCI: 00:15.1 init
1593 15:53:24.364934 I2C bus 1 version 0x3230302a
1594 15:53:24.368029 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1595 15:53:24.371504 PCI: 00:15.1 init finished in 6 msecs
1596 15:53:24.375058 PCI: 00:15.2 init
1597 15:53:24.378545 I2C bus 2 version 0x3230302a
1598 15:53:24.381721 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1599 15:53:24.385003 PCI: 00:15.2 init finished in 6 msecs
1600 15:53:24.385590 PCI: 00:15.3 init
1601 15:53:24.388032 I2C bus 3 version 0x3230302a
1602 15:53:24.391709 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1603 15:53:24.398502 PCI: 00:15.3 init finished in 6 msecs
1604 15:53:24.398850 PCI: 00:16.0 init
1605 15:53:24.401552 PCI: 00:16.0 init finished in 0 msecs
1606 15:53:24.405026 PCI: 00:19.1 init
1607 15:53:24.408335 I2C bus 5 version 0x3230302a
1608 15:53:24.411703 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1609 15:53:24.414824 PCI: 00:19.1 init finished in 6 msecs
1610 15:53:24.418471 PCI: 00:1d.0 init
1611 15:53:24.421926 Initializing PCH PCIe bridge.
1612 15:53:24.424884 PCI: 00:1d.0 init finished in 3 msecs
1613 15:53:24.428338 PCI: 00:1f.0 init
1614 15:53:24.431759 IOAPIC: Initializing IOAPIC at 0xfec00000
1615 15:53:24.434762 IOAPIC: Bootstrap Processor Local APIC = 0x00
1616 15:53:24.438392 IOAPIC: ID = 0x02
1617 15:53:24.441712 IOAPIC: Dumping registers
1618 15:53:24.445310 reg 0x0000: 0x02000000
1619 15:53:24.445617 reg 0x0001: 0x00770020
1620 15:53:24.448248 reg 0x0002: 0x00000000
1621 15:53:24.451755 PCI: 00:1f.0 init finished in 21 msecs
1622 15:53:24.455374 PCI: 00:1f.2 init
1623 15:53:24.458870 Disabling ACPI via APMC.
1624 15:53:24.459143 APMC done.
1625 15:53:24.465366 PCI: 00:1f.2 init finished in 5 msecs
1626 15:53:24.476177 PCI: 01:00.0 init
1627 15:53:24.479050 PCI: 01:00.0 init finished in 0 msecs
1628 15:53:24.482541 PNP: 0c09.0 init
1629 15:53:24.485886 Google Chrome EC uptime: 8.439 seconds
1630 15:53:24.492165 Google Chrome AP resets since EC boot: 1
1631 15:53:24.495534 Google Chrome most recent AP reset causes:
1632 15:53:24.498709 0.379: 32775 shutdown: entering G3
1633 15:53:24.505727 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1634 15:53:24.508974 PNP: 0c09.0 init finished in 22 msecs
1635 15:53:24.514948 Devices initialized
1636 15:53:24.518117 Show all devs... After init.
1637 15:53:24.521003 Root Device: enabled 1
1638 15:53:24.521131 DOMAIN: 0000: enabled 1
1639 15:53:24.524627 CPU_CLUSTER: 0: enabled 1
1640 15:53:24.527973 PCI: 00:00.0: enabled 1
1641 15:53:24.531231 PCI: 00:02.0: enabled 1
1642 15:53:24.531318 PCI: 00:04.0: enabled 1
1643 15:53:24.534553 PCI: 00:05.0: enabled 1
1644 15:53:24.537940 PCI: 00:06.0: enabled 0
1645 15:53:24.540954 PCI: 00:07.0: enabled 0
1646 15:53:24.541059 PCI: 00:07.1: enabled 0
1647 15:53:24.544473 PCI: 00:07.2: enabled 0
1648 15:53:24.548054 PCI: 00:07.3: enabled 0
1649 15:53:24.551279 PCI: 00:08.0: enabled 1
1650 15:53:24.551439 PCI: 00:09.0: enabled 0
1651 15:53:24.554720 PCI: 00:0a.0: enabled 0
1652 15:53:24.558017 PCI: 00:0d.0: enabled 1
1653 15:53:24.558168 PCI: 00:0d.1: enabled 0
1654 15:53:24.561424 PCI: 00:0d.2: enabled 0
1655 15:53:24.564621 PCI: 00:0d.3: enabled 0
1656 15:53:24.567748 PCI: 00:0e.0: enabled 0
1657 15:53:24.567963 PCI: 00:10.2: enabled 1
1658 15:53:24.571114 PCI: 00:10.6: enabled 0
1659 15:53:24.574735 PCI: 00:10.7: enabled 0
1660 15:53:24.577838 PCI: 00:12.0: enabled 0
1661 15:53:24.578107 PCI: 00:12.6: enabled 0
1662 15:53:24.581754 PCI: 00:13.0: enabled 0
1663 15:53:24.584497 PCI: 00:14.0: enabled 1
1664 15:53:24.587967 PCI: 00:14.1: enabled 0
1665 15:53:24.588444 PCI: 00:14.2: enabled 1
1666 15:53:24.591457 PCI: 00:14.3: enabled 1
1667 15:53:24.594746 PCI: 00:15.0: enabled 1
1668 15:53:24.598183 PCI: 00:15.1: enabled 1
1669 15:53:24.598646 PCI: 00:15.2: enabled 1
1670 15:53:24.601154 PCI: 00:15.3: enabled 1
1671 15:53:24.604561 PCI: 00:16.0: enabled 1
1672 15:53:24.605060 PCI: 00:16.1: enabled 0
1673 15:53:24.608143 PCI: 00:16.2: enabled 0
1674 15:53:24.611339 PCI: 00:16.3: enabled 0
1675 15:53:24.614498 PCI: 00:16.4: enabled 0
1676 15:53:24.615010 PCI: 00:16.5: enabled 0
1677 15:53:24.618289 PCI: 00:17.0: enabled 0
1678 15:53:24.621336 PCI: 00:19.0: enabled 0
1679 15:53:24.624707 PCI: 00:19.1: enabled 1
1680 15:53:24.625136 PCI: 00:19.2: enabled 0
1681 15:53:24.628096 PCI: 00:1c.0: enabled 1
1682 15:53:24.630930 PCI: 00:1c.1: enabled 0
1683 15:53:24.634527 PCI: 00:1c.2: enabled 0
1684 15:53:24.634953 PCI: 00:1c.3: enabled 0
1685 15:53:24.637835 PCI: 00:1c.4: enabled 0
1686 15:53:24.641319 PCI: 00:1c.5: enabled 0
1687 15:53:24.641776 PCI: 00:1c.6: enabled 1
1688 15:53:24.644819 PCI: 00:1c.7: enabled 0
1689 15:53:24.647933 PCI: 00:1d.0: enabled 1
1690 15:53:24.651333 PCI: 00:1d.1: enabled 0
1691 15:53:24.651785 PCI: 00:1d.2: enabled 1
1692 15:53:24.654548 PCI: 00:1d.3: enabled 0
1693 15:53:24.658020 PCI: 00:1e.0: enabled 1
1694 15:53:24.660950 PCI: 00:1e.1: enabled 0
1695 15:53:24.661382 PCI: 00:1e.2: enabled 1
1696 15:53:24.664509 PCI: 00:1e.3: enabled 1
1697 15:53:24.667852 PCI: 00:1f.0: enabled 1
1698 15:53:24.671177 PCI: 00:1f.1: enabled 0
1699 15:53:24.671648 PCI: 00:1f.2: enabled 1
1700 15:53:24.674185 PCI: 00:1f.3: enabled 1
1701 15:53:24.677779 PCI: 00:1f.4: enabled 0
1702 15:53:24.681042 PCI: 00:1f.5: enabled 1
1703 15:53:24.681449 PCI: 00:1f.6: enabled 0
1704 15:53:24.684004 PCI: 00:1f.7: enabled 0
1705 15:53:24.687835 APIC: 00: enabled 1
1706 15:53:24.688016 GENERIC: 0.0: enabled 1
1707 15:53:24.690431 GENERIC: 0.0: enabled 1
1708 15:53:24.693869 GENERIC: 1.0: enabled 1
1709 15:53:24.697382 GENERIC: 0.0: enabled 1
1710 15:53:24.697533 GENERIC: 1.0: enabled 1
1711 15:53:24.700535 USB0 port 0: enabled 1
1712 15:53:24.703925 GENERIC: 0.0: enabled 1
1713 15:53:24.704077 USB0 port 0: enabled 1
1714 15:53:24.707633 GENERIC: 0.0: enabled 1
1715 15:53:24.710340 I2C: 00:1a: enabled 1
1716 15:53:24.713719 I2C: 00:31: enabled 1
1717 15:53:24.713872 I2C: 00:32: enabled 1
1718 15:53:24.717123 I2C: 00:10: enabled 1
1719 15:53:24.720501 I2C: 00:15: enabled 1
1720 15:53:24.720652 GENERIC: 0.0: enabled 0
1721 15:53:24.724087 GENERIC: 1.0: enabled 0
1722 15:53:24.727636 GENERIC: 0.0: enabled 1
1723 15:53:24.727720 SPI: 00: enabled 1
1724 15:53:24.730591 SPI: 00: enabled 1
1725 15:53:24.734037 PNP: 0c09.0: enabled 1
1726 15:53:24.734134 GENERIC: 0.0: enabled 1
1727 15:53:24.737479 USB3 port 0: enabled 1
1728 15:53:24.740324 USB3 port 1: enabled 1
1729 15:53:24.740427 USB3 port 2: enabled 0
1730 15:53:24.743616 USB3 port 3: enabled 0
1731 15:53:24.747017 USB2 port 0: enabled 0
1732 15:53:24.750429 USB2 port 1: enabled 1
1733 15:53:24.750505 USB2 port 2: enabled 1
1734 15:53:24.753825 USB2 port 3: enabled 0
1735 15:53:24.757306 USB2 port 4: enabled 1
1736 15:53:24.757383 USB2 port 5: enabled 0
1737 15:53:24.760260 USB2 port 6: enabled 0
1738 15:53:24.763670 USB2 port 7: enabled 0
1739 15:53:24.767283 USB2 port 8: enabled 0
1740 15:53:24.767359 USB2 port 9: enabled 0
1741 15:53:24.770152 USB3 port 0: enabled 0
1742 15:53:24.773589 USB3 port 1: enabled 1
1743 15:53:24.773694 USB3 port 2: enabled 0
1744 15:53:24.776937 USB3 port 3: enabled 0
1745 15:53:24.780020 GENERIC: 0.0: enabled 1
1746 15:53:24.783617 GENERIC: 1.0: enabled 1
1747 15:53:24.783728 APIC: 01: enabled 1
1748 15:53:24.786872 APIC: 03: enabled 1
1749 15:53:24.787025 APIC: 06: enabled 1
1750 15:53:24.789824 APIC: 05: enabled 1
1751 15:53:24.793557 APIC: 04: enabled 1
1752 15:53:24.793662 APIC: 02: enabled 1
1753 15:53:24.796580 APIC: 07: enabled 1
1754 15:53:24.799932 PCI: 01:00.0: enabled 1
1755 15:53:24.803285 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1756 15:53:24.810027 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1757 15:53:24.813719 ELOG: NV offset 0xf30000 size 0x1000
1758 15:53:24.820282 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1759 15:53:24.826779 ELOG: Event(17) added with size 13 at 2023-08-07 15:53:24 UTC
1760 15:53:24.833376 ELOG: Event(92) added with size 9 at 2023-08-07 15:53:24 UTC
1761 15:53:24.840279 ELOG: Event(93) added with size 9 at 2023-08-07 15:53:24 UTC
1762 15:53:24.846822 ELOG: Event(9E) added with size 10 at 2023-08-07 15:53:24 UTC
1763 15:53:24.853816 ELOG: Event(9F) added with size 14 at 2023-08-07 15:53:24 UTC
1764 15:53:24.857083 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1765 15:53:24.863430 ELOG: Event(A1) added with size 10 at 2023-08-07 15:53:24 UTC
1766 15:53:24.870188 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1767 15:53:24.877119 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1768 15:53:24.880650 Finalize devices...
1769 15:53:24.880765 Devices finalized
1770 15:53:24.886899 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1771 15:53:24.890419 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1772 15:53:24.896796 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1773 15:53:24.900335 ME: HFSTS1 : 0x80030055
1774 15:53:24.906496 ME: HFSTS2 : 0x30280116
1775 15:53:24.910076 ME: HFSTS3 : 0x00000050
1776 15:53:24.916524 ME: HFSTS4 : 0x00004000
1777 15:53:24.919984 ME: HFSTS5 : 0x00000000
1778 15:53:24.922899 ME: HFSTS6 : 0x00400006
1779 15:53:24.926461 ME: Manufacturing Mode : YES
1780 15:53:24.930034 ME: SPI Protection Mode Enabled : NO
1781 15:53:24.936784 ME: FW Partition Table : OK
1782 15:53:24.939765 ME: Bringup Loader Failure : NO
1783 15:53:24.942895 ME: Firmware Init Complete : NO
1784 15:53:24.946382 ME: Boot Options Present : NO
1785 15:53:24.949710 ME: Update In Progress : NO
1786 15:53:24.952955 ME: D0i3 Support : YES
1787 15:53:24.956355 ME: Low Power State Enabled : NO
1788 15:53:24.962693 ME: CPU Replaced : YES
1789 15:53:24.966102 ME: CPU Replacement Valid : YES
1790 15:53:24.969644 ME: Current Working State : 5
1791 15:53:24.973029 ME: Current Operation State : 1
1792 15:53:24.976464 ME: Current Operation Mode : 3
1793 15:53:24.979358 ME: Error Code : 0
1794 15:53:24.982942 ME: Enhanced Debug Mode : NO
1795 15:53:24.986084 ME: CPU Debug Disabled : YES
1796 15:53:24.989253 ME: TXT Support : NO
1797 15:53:24.995968 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1798 15:53:25.006188 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1799 15:53:25.009397 CBFS: 'fallback/slic' not found.
1800 15:53:25.012621 ACPI: Writing ACPI tables at 76b01000.
1801 15:53:25.012732 ACPI: * FACS
1802 15:53:25.015875 ACPI: * DSDT
1803 15:53:25.019057 Ramoops buffer: 0x100000@0x76a00000.
1804 15:53:25.022410 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1805 15:53:25.029045 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1806 15:53:25.032546 Google Chrome EC: version:
1807 15:53:25.035866 ro: voema_v2.0.7540-147f8d37d1
1808 15:53:25.039410 rw: voema_v2.0.7540-147f8d37d1
1809 15:53:25.039492 running image: 2
1810 15:53:25.045869 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1811 15:53:25.051495 ACPI: * FADT
1812 15:53:25.051587 SCI is IRQ9
1813 15:53:25.057582 ACPI: added table 1/32, length now 40
1814 15:53:25.057683 ACPI: * SSDT
1815 15:53:25.061101 Found 1 CPU(s) with 8 core(s) each.
1816 15:53:25.067580 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1817 15:53:25.070771 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1818 15:53:25.074343 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1819 15:53:25.077623 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1820 15:53:25.084574 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1821 15:53:25.090831 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1822 15:53:25.094257 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1823 15:53:25.100828 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1824 15:53:25.107710 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1825 15:53:25.111267 \_SB.PCI0.RP09: Added StorageD3Enable property
1826 15:53:25.114767 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1827 15:53:25.121445 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1828 15:53:25.124275 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1829 15:53:25.131174 PS2K: Passing 80 keymaps to kernel
1830 15:53:25.137564 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1831 15:53:25.144154 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1832 15:53:25.151243 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1833 15:53:25.154385 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1834 15:53:25.161354 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1835 15:53:25.168105 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1836 15:53:25.174650 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1837 15:53:25.181315 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1838 15:53:25.187993 ACPI: added table 2/32, length now 44
1839 15:53:25.188503 ACPI: * MCFG
1840 15:53:25.190767 ACPI: added table 3/32, length now 48
1841 15:53:25.194602 ACPI: * TPM2
1842 15:53:25.197714 TPM2 log created at 0x769f0000
1843 15:53:25.200623 ACPI: added table 4/32, length now 52
1844 15:53:25.200745 ACPI: * MADT
1845 15:53:25.203995 SCI is IRQ9
1846 15:53:25.207418 ACPI: added table 5/32, length now 56
1847 15:53:25.207514 current = 76b09850
1848 15:53:25.211095 ACPI: * DMAR
1849 15:53:25.214120 ACPI: added table 6/32, length now 60
1850 15:53:25.217278 ACPI: added table 7/32, length now 64
1851 15:53:25.220835 ACPI: * HPET
1852 15:53:25.224385 ACPI: added table 8/32, length now 68
1853 15:53:25.224465 ACPI: done.
1854 15:53:25.227201 ACPI tables: 35216 bytes.
1855 15:53:25.230663 smbios_write_tables: 769ef000
1856 15:53:25.234083 EC returned error result code 3
1857 15:53:25.237658 Couldn't obtain OEM name from CBI
1858 15:53:25.240998 Create SMBIOS type 16
1859 15:53:25.241079 Create SMBIOS type 17
1860 15:53:25.243843 GENERIC: 0.0 (WIFI Device)
1861 15:53:25.247289 SMBIOS tables: 1750 bytes.
1862 15:53:25.250886 Writing table forward entry at 0x00000500
1863 15:53:25.257389 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1864 15:53:25.260497 Writing coreboot table at 0x76b25000
1865 15:53:25.267138 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1866 15:53:25.270586 1. 0000000000001000-000000000009ffff: RAM
1867 15:53:25.277492 2. 00000000000a0000-00000000000fffff: RESERVED
1868 15:53:25.280853 3. 0000000000100000-00000000769eefff: RAM
1869 15:53:25.287228 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1870 15:53:25.290691 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1871 15:53:25.297533 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1872 15:53:25.303970 7. 0000000077000000-000000007fbfffff: RESERVED
1873 15:53:25.307336 8. 00000000c0000000-00000000cfffffff: RESERVED
1874 15:53:25.314194 9. 00000000f8000000-00000000f9ffffff: RESERVED
1875 15:53:25.317436 10. 00000000fb000000-00000000fb000fff: RESERVED
1876 15:53:25.320784 11. 00000000fe000000-00000000fe00ffff: RESERVED
1877 15:53:25.327084 12. 00000000fed80000-00000000fed87fff: RESERVED
1878 15:53:25.330597 13. 00000000fed90000-00000000fed92fff: RESERVED
1879 15:53:25.337243 14. 00000000feda0000-00000000feda1fff: RESERVED
1880 15:53:25.340972 15. 00000000fedc0000-00000000feddffff: RESERVED
1881 15:53:25.343797 16. 0000000100000000-00000002803fffff: RAM
1882 15:53:25.347368 Passing 4 GPIOs to payload:
1883 15:53:25.353852 NAME | PORT | POLARITY | VALUE
1884 15:53:25.360952 lid | undefined | high | high
1885 15:53:25.363822 power | undefined | high | low
1886 15:53:25.370671 oprom | undefined | high | low
1887 15:53:25.373743 EC in RW | 0x000000e5 | high | high
1888 15:53:25.380520 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 2353
1889 15:53:25.383815 coreboot table: 1576 bytes.
1890 15:53:25.387438 IMD ROOT 0. 0x76fff000 0x00001000
1891 15:53:25.390406 IMD SMALL 1. 0x76ffe000 0x00001000
1892 15:53:25.393644 FSP MEMORY 2. 0x76c4e000 0x003b0000
1893 15:53:25.400814 VPD 3. 0x76c4d000 0x00000367
1894 15:53:25.403709 RO MCACHE 4. 0x76c4c000 0x00000fdc
1895 15:53:25.407008 CONSOLE 5. 0x76c2c000 0x00020000
1896 15:53:25.410586 FMAP 6. 0x76c2b000 0x00000578
1897 15:53:25.414078 TIME STAMP 7. 0x76c2a000 0x00000910
1898 15:53:25.417225 VBOOT WORK 8. 0x76c16000 0x00014000
1899 15:53:25.420805 ROMSTG STCK 9. 0x76c15000 0x00001000
1900 15:53:25.423707 AFTER CAR 10. 0x76c0a000 0x0000b000
1901 15:53:25.427328 RAMSTAGE 11. 0x76b97000 0x00073000
1902 15:53:25.434091 REFCODE 12. 0x76b42000 0x00055000
1903 15:53:25.437388 SMM BACKUP 13. 0x76b32000 0x00010000
1904 15:53:25.440283 4f444749 14. 0x76b30000 0x00002000
1905 15:53:25.443705 EXT VBT15. 0x76b2d000 0x0000219f
1906 15:53:25.447311 COREBOOT 16. 0x76b25000 0x00008000
1907 15:53:25.450559 ACPI 17. 0x76b01000 0x00024000
1908 15:53:25.453648 ACPI GNVS 18. 0x76b00000 0x00001000
1909 15:53:25.457077 RAMOOPS 19. 0x76a00000 0x00100000
1910 15:53:25.460327 TPM2 TCGLOG20. 0x769f0000 0x00010000
1911 15:53:25.467205 SMBIOS 21. 0x769ef000 0x00000800
1912 15:53:25.467621 IMD small region:
1913 15:53:25.470284 IMD ROOT 0. 0x76ffec00 0x00000400
1914 15:53:25.473644 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1915 15:53:25.480611 POWER STATE 2. 0x76ffeb80 0x00000044
1916 15:53:25.483959 ROMSTAGE 3. 0x76ffeb60 0x00000004
1917 15:53:25.487337 MEM INFO 4. 0x76ffe980 0x000001e0
1918 15:53:25.493735 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1919 15:53:25.497484 MTRR: Physical address space:
1920 15:53:25.500772 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1921 15:53:25.507304 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1922 15:53:25.514190 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1923 15:53:25.520770 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1924 15:53:25.527214 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1925 15:53:25.533878 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1926 15:53:25.540446 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1927 15:53:25.544003 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 15:53:25.547390 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 15:53:25.553563 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 15:53:25.557098 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 15:53:25.560418 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 15:53:25.563317 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 15:53:25.566928 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 15:53:25.573785 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 15:53:25.576785 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 15:53:25.580174 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 15:53:25.583529 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 15:53:25.587809 call enable_fixed_mtrr()
1939 15:53:25.591376 CPU physical address size: 39 bits
1940 15:53:25.597912 MTRR: default type WB/UC MTRR counts: 6/6.
1941 15:53:25.601233 MTRR: UC selected as default type.
1942 15:53:25.607597 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1943 15:53:25.611023 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1944 15:53:25.617237 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1945 15:53:25.624288 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1946 15:53:25.630796 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1947 15:53:25.637649 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1948 15:53:25.638071
1949 15:53:25.641113 MTRR check
1950 15:53:25.641522 Fixed MTRRs : Enabled
1951 15:53:25.644489 Variable MTRRs: Enabled
1952 15:53:25.644949
1953 15:53:25.647884 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 15:53:25.654004 MTRR: Fixed MSR 0x258 0x0606060606060606
1955 15:53:25.657847 MTRR: Fixed MSR 0x259 0x0000000000000000
1956 15:53:25.660984 MTRR: Fixed MSR 0x268 0x0606060606060606
1957 15:53:25.664363 MTRR: Fixed MSR 0x269 0x0606060606060606
1958 15:53:25.670993 MTRR: Fixed MSR 0x26a 0x0606060606060606
1959 15:53:25.673994 MTRR: Fixed MSR 0x26b 0x0606060606060606
1960 15:53:25.677403 MTRR: Fixed MSR 0x26c 0x0606060606060606
1961 15:53:25.681166 MTRR: Fixed MSR 0x26d 0x0606060606060606
1962 15:53:25.687412 MTRR: Fixed MSR 0x26e 0x0606060606060606
1963 15:53:25.690670 MTRR: Fixed MSR 0x26f 0x0606060606060606
1964 15:53:25.697357 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1965 15:53:25.700998 call enable_fixed_mtrr()
1966 15:53:25.703928 Checking cr50 for pending updates
1967 15:53:25.708022 CPU physical address size: 39 bits
1968 15:53:25.711472 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 15:53:25.714722 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 15:53:25.717924 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 15:53:25.721647 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 15:53:25.727864 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 15:53:25.731733 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 15:53:25.734692 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 15:53:25.738118 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 15:53:25.745000 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 15:53:25.748214 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 15:53:25.751106 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 15:53:25.754516 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 15:53:25.761837 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 15:53:25.762254 call enable_fixed_mtrr()
1982 15:53:25.768743 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 15:53:25.772038 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 15:53:25.775477 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 15:53:25.778640 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 15:53:25.785689 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 15:53:25.789039 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 15:53:25.792572 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 15:53:25.796217 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 15:53:25.801985 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 15:53:25.805338 CPU physical address size: 39 bits
1992 15:53:25.809044 call enable_fixed_mtrr()
1993 15:53:25.812434 Reading cr50 TPM mode
1994 15:53:25.816289 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 15:53:25.819379 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 15:53:25.822627 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 15:53:25.826268 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 15:53:25.832915 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 15:53:25.835764 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 15:53:25.839185 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 15:53:25.842682 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 15:53:25.849141 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 15:53:25.852894 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 15:53:25.855539 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 15:53:25.859433 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 15:53:25.866540 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 15:53:25.869891 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 15:53:25.872920 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 15:53:25.876399 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 15:53:25.883253 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 15:53:25.886242 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 15:53:25.889686 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 15:53:25.892872 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 15:53:25.899783 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 15:53:25.902564 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 15:53:25.906529 call enable_fixed_mtrr()
2017 15:53:25.909677 call enable_fixed_mtrr()
2018 15:53:25.913242 CPU physical address size: 39 bits
2019 15:53:25.916193 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 15:53:25.919266 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 15:53:25.922804 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 15:53:25.929219 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 15:53:25.932706 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 15:53:25.936002 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 15:53:25.939606 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 15:53:25.945680 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 15:53:25.949132 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 15:53:25.952617 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 15:53:25.955979 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 15:53:25.959402 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 15:53:25.966209 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 15:53:25.969544 call enable_fixed_mtrr()
2033 15:53:25.972590 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 15:53:25.975810 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 15:53:25.979202 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 15:53:25.985802 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 15:53:25.989248 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 15:53:25.992784 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 15:53:25.995737 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 15:53:26.002271 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 15:53:26.005955 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 15:53:26.009337 CPU physical address size: 39 bits
2043 15:53:26.013089 call enable_fixed_mtrr()
2044 15:53:26.016512 CPU physical address size: 39 bits
2045 15:53:26.019689 CPU physical address size: 39 bits
2046 15:53:26.027065 CPU physical address size: 39 bits
2047 15:53:26.029882 BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
2048 15:53:26.039773 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2049 15:53:26.043243 Checking segment from ROM address 0xffc02b38
2050 15:53:26.046495 Checking segment from ROM address 0xffc02b54
2051 15:53:26.053514 Loading segment from ROM address 0xffc02b38
2052 15:53:26.054070 code (compression=0)
2053 15:53:26.063119 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2054 15:53:26.072909 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2055 15:53:26.073329 it's not compressed!
2056 15:53:26.213027 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2057 15:53:26.219686 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2058 15:53:26.226280 Loading segment from ROM address 0xffc02b54
2059 15:53:26.226782 Entry Point 0x30000000
2060 15:53:26.229438 Loaded segments
2061 15:53:26.236281 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2062 15:53:26.279017 Finalizing chipset.
2063 15:53:26.282443 Finalizing SMM.
2064 15:53:26.282950 APMC done.
2065 15:53:26.289126 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2066 15:53:26.292464 mp_park_aps done after 0 msecs.
2067 15:53:26.295584 Jumping to boot code at 0x30000000(0x76b25000)
2068 15:53:26.305602 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2069 15:53:26.305910
2070 15:53:26.306149
2071 15:53:26.306367
2072 15:53:26.308447 Starting depthcharge on Voema...
2073 15:53:26.308698
2074 15:53:26.309338 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2075 15:53:26.309596 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2076 15:53:26.309817 Setting prompt string to ['volteer:']
2077 15:53:26.310028 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2078 15:53:26.318553 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2079 15:53:26.318791
2080 15:53:26.324933 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2081 15:53:26.325162
2082 15:53:26.328232 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2083 15:53:26.331752
2084 15:53:26.335394 Failed to find eMMC card reader
2085 15:53:26.335683
2086 15:53:26.335862 Wipe memory regions:
2087 15:53:26.336028
2088 15:53:26.341866 [0x00000000001000, 0x000000000a0000)
2089 15:53:26.342094
2090 15:53:26.345119 [0x00000000100000, 0x00000030000000)
2091 15:53:26.370725
2092 15:53:26.373828 [0x00000032662db0, 0x000000769ef000)
2093 15:53:26.409259
2094 15:53:26.412616 [0x00000100000000, 0x00000280400000)
2095 15:53:26.611919
2096 15:53:26.615209 ec_init: CrosEC protocol v3 supported (256, 256)
2097 15:53:26.615634
2098 15:53:26.621824 update_port_state: port C0 state: usb enable 1 mux conn 0
2099 15:53:26.622260
2100 15:53:26.628494 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2101 15:53:26.633128
2102 15:53:26.636281 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2103 15:53:26.636748
2104 15:53:26.639384 send_conn_disc_msg: pmc_send_cmd succeeded
2105 15:53:27.071272
2106 15:53:27.071536 R8152: Initializing
2107 15:53:27.071697
2108 15:53:27.074723 Version 6 (ocp_data = 5c30)
2109 15:53:27.074962
2110 15:53:27.077985 R8152: Done initializing
2111 15:53:27.078295
2112 15:53:27.080786 Adding net device
2113 15:53:27.383408
2114 15:53:27.386501 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2115 15:53:27.386803
2116 15:53:27.387038
2117 15:53:27.387256
2118 15:53:27.390440 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2120 15:53:27.491454 volteer: tftpboot 192.168.201.1 11224318/tftp-deploy-qjpu5k4i/kernel/bzImage 11224318/tftp-deploy-qjpu5k4i/kernel/cmdline 11224318/tftp-deploy-qjpu5k4i/ramdisk/ramdisk.cpio.gz
2121 15:53:27.491981 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2122 15:53:27.492370 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2123 15:53:27.496727 tftpboot 192.168.201.1 11224318/tftp-deploy-qjpu5k4i/kernel/bzImaploy-qjpu5k4i/kernel/cmdline 11224318/tftp-deploy-qjpu5k4i/ramdisk/ramdisk.cpio.gz
2124 15:53:27.497171
2125 15:53:27.497558 Waiting for link
2126 15:53:27.699727
2127 15:53:27.700216 done.
2128 15:53:27.700550
2129 15:53:27.700896 MAC: 00:24:32:30:7e:47
2130 15:53:27.701203
2131 15:53:27.702776 Sending DHCP discover... done.
2132 15:53:27.703297
2133 15:53:27.706379 Waiting for reply... done.
2134 15:53:27.706860
2135 15:53:27.709727 Sending DHCP request... done.
2136 15:53:27.710146
2137 15:53:27.713010 Waiting for reply... done.
2138 15:53:27.713429
2139 15:53:27.716093 My ip is 192.168.201.19
2140 15:53:27.716511
2141 15:53:27.719433 The DHCP server ip is 192.168.201.1
2142 15:53:27.719855
2143 15:53:27.723117 TFTP server IP predefined by user: 192.168.201.1
2144 15:53:27.723538
2145 15:53:27.733317 Bootfile predefined by user: 11224318/tftp-deploy-qjpu5k4i/kernel/bzImage
2146 15:53:27.733741
2147 15:53:27.736349 Sending tftp read request... done.
2148 15:53:27.736792
2149 15:53:27.743179 Waiting for the transfer...
2150 15:53:27.743857
2151 15:53:28.287680 00000000 ################################################################
2152 15:53:28.287824
2153 15:53:28.846858 00080000 ################################################################
2154 15:53:28.847009
2155 15:53:29.376869 00100000 ################################################################
2156 15:53:29.377005
2157 15:53:29.942972 00180000 ################################################################
2158 15:53:29.943476
2159 15:53:30.613917 00200000 ################################################################
2160 15:53:30.614054
2161 15:53:31.199416 00280000 ################################################################
2162 15:53:31.199550
2163 15:53:31.739153 00300000 ################################################################
2164 15:53:31.739288
2165 15:53:32.276441 00380000 ################################################################
2166 15:53:32.276599
2167 15:53:32.823627 00400000 ################################################################
2168 15:53:32.823775
2169 15:53:33.338915 00480000 ################################################################
2170 15:53:33.339056
2171 15:53:33.850479 00500000 ################################################################
2172 15:53:33.850628
2173 15:53:34.362687 00580000 ################################################################
2174 15:53:34.362854
2175 15:53:34.880934 00600000 ################################################################
2176 15:53:34.881082
2177 15:53:35.393830 00680000 ################################################################
2178 15:53:35.393965
2179 15:53:35.905876 00700000 ################################################################
2180 15:53:35.906013
2181 15:53:35.922483 00780000 ## done.
2182 15:53:35.922568
2183 15:53:35.925888 The bootfile was 7880592 bytes long.
2184 15:53:35.925984
2185 15:53:35.929220 Sending tftp read request... done.
2186 15:53:35.929302
2187 15:53:35.932161 Waiting for the transfer...
2188 15:53:35.932241
2189 15:53:36.454636 00000000 ################################################################
2190 15:53:36.454776
2191 15:53:36.967876 00080000 ################################################################
2192 15:53:36.968013
2193 15:53:37.483086 00100000 ################################################################
2194 15:53:37.483250
2195 15:53:38.042562 00180000 ################################################################
2196 15:53:38.042702
2197 15:53:38.589668 00200000 ################################################################
2198 15:53:38.589809
2199 15:53:39.107164 00280000 ################################################################
2200 15:53:39.107300
2201 15:53:39.620268 00300000 ################################################################
2202 15:53:39.620428
2203 15:53:40.131923 00380000 ################################################################
2204 15:53:40.132050
2205 15:53:40.660874 00400000 ################################################################
2206 15:53:40.661010
2207 15:53:41.189052 00480000 ################################################################
2208 15:53:41.189187
2209 15:53:41.735515 00500000 ################################################################
2210 15:53:41.735648
2211 15:53:42.291053 00580000 ################################################################
2212 15:53:42.291191
2213 15:53:42.862586 00600000 ################################################################
2214 15:53:42.862723
2215 15:53:43.403047 00680000 ################################################################
2216 15:53:43.403184
2217 15:53:43.945656 00700000 ################################################################
2218 15:53:43.945816
2219 15:53:44.464633 00780000 ################################################################
2220 15:53:44.464787
2221 15:53:44.986459 00800000 ################################################################
2222 15:53:44.986621
2223 15:53:45.517324 00880000 ################################################################
2224 15:53:45.517481
2225 15:53:46.049348 00900000 ################################################################
2226 15:53:46.049515
2227 15:53:46.577153 00980000 ################################################################
2228 15:53:46.577289
2229 15:53:47.092458 00a00000 ################################################################
2230 15:53:47.092627
2231 15:53:47.607452 00a80000 ################################################################
2232 15:53:47.607596
2233 15:53:48.122790 00b00000 ################################################################
2234 15:53:48.122932
2235 15:53:48.638436 00b80000 ################################################################
2236 15:53:48.638581
2237 15:53:49.168156 00c00000 ################################################################
2238 15:53:49.168297
2239 15:53:49.693654 00c80000 ################################################################
2240 15:53:49.693799
2241 15:53:50.218797 00d00000 ################################################################
2242 15:53:50.219008
2243 15:53:50.761541 00d80000 ################################################################
2244 15:53:50.761691
2245 15:53:51.301270 00e00000 ################################################################
2246 15:53:51.301406
2247 15:53:51.843531 00e80000 ################################################################
2248 15:53:51.843701
2249 15:53:52.392609 00f00000 ################################################################
2250 15:53:52.392799
2251 15:53:52.946335 00f80000 ################################################################
2252 15:53:52.946472
2253 15:53:53.494320 01000000 ################################################################
2254 15:53:53.494484
2255 15:53:54.059789 01080000 ################################################################
2256 15:53:54.059964
2257 15:53:54.599383 01100000 ################################################################
2258 15:53:54.599550
2259 15:53:55.153018 01180000 ################################################################
2260 15:53:55.153157
2261 15:53:55.740035 01200000 ################################################################
2262 15:53:55.740166
2263 15:53:56.309412 01280000 ################################################################
2264 15:53:56.309556
2265 15:53:56.862412 01300000 ################################################################
2266 15:53:56.862562
2267 15:53:57.433568 01380000 ################################################################
2268 15:53:57.433723
2269 15:53:58.005782 01400000 ################################################################
2270 15:53:58.005942
2271 15:53:58.570043 01480000 ################################################################
2272 15:53:58.570204
2273 15:53:59.138265 01500000 ################################################################
2274 15:53:59.138428
2275 15:53:59.693779 01580000 ################################################################
2276 15:53:59.693937
2277 15:54:00.237470 01600000 ################################################################
2278 15:54:00.237629
2279 15:54:00.770636 01680000 ################################################################
2280 15:54:00.770903
2281 15:54:01.327841 01700000 ################################################################
2282 15:54:01.327995
2283 15:54:01.880384 01780000 ################################################################
2284 15:54:01.880528
2285 15:54:02.446609 01800000 ################################################################
2286 15:54:02.446759
2287 15:54:03.015691 01880000 ################################################################
2288 15:54:03.015841
2289 15:54:03.640348 01900000 ################################################################
2290 15:54:03.640554
2291 15:54:04.312382 01980000 ################################################################
2292 15:54:04.312588
2293 15:54:04.984855 01a00000 ################################################################
2294 15:54:04.985401
2295 15:54:05.650513 01a80000 ################################################################
2296 15:54:05.650733
2297 15:54:06.333030 01b00000 ################################################################
2298 15:54:06.333551
2299 15:54:07.015522 01b80000 ################################################################
2300 15:54:07.016035
2301 15:54:07.684147 01c00000 ################################################################
2302 15:54:07.684655
2303 15:54:08.366603 01c80000 ################################################################
2304 15:54:08.367328
2305 15:54:08.996252 01d00000 ################################################################
2306 15:54:08.996382
2307 15:54:09.614797 01d80000 ################################################################
2308 15:54:09.614974
2309 15:54:10.220346 01e00000 ################################################################
2310 15:54:10.220858
2311 15:54:10.833291 01e80000 ################################################################
2312 15:54:10.833805
2313 15:54:11.479387 01f00000 ################################################################
2314 15:54:11.479566
2315 15:54:12.146284 01f80000 ################################################################
2316 15:54:12.146945
2317 15:54:12.784792 02000000 ################################################################
2318 15:54:12.784945
2319 15:54:13.412250 02080000 ################################################################
2320 15:54:13.412454
2321 15:54:14.099441 02100000 ################################################################
2322 15:54:14.099971
2323 15:54:14.823787 02180000 ################################################################
2324 15:54:14.824354
2325 15:54:15.401318 02200000 #################################################### done.
2326 15:54:15.401811
2327 15:54:15.404306 Sending tftp read request... done.
2328 15:54:15.404779
2329 15:54:15.407398 Waiting for the transfer...
2330 15:54:15.407821
2331 15:54:15.408370 00000000 # done.
2332 15:54:15.408963
2333 15:54:15.417455 Command line loaded dynamically from TFTP file: 11224318/tftp-deploy-qjpu5k4i/kernel/cmdline
2334 15:54:15.417950
2335 15:54:15.434426 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2336 15:54:15.440222
2337 15:54:15.443948 Shutting down all USB controllers.
2338 15:54:15.444372
2339 15:54:15.444750 Removing current net device
2340 15:54:15.445075
2341 15:54:15.447339 Finalizing coreboot
2342 15:54:15.447768
2343 15:54:15.453500 Exiting depthcharge with code 4 at timestamp: 57796783
2344 15:54:15.453924
2345 15:54:15.454257
2346 15:54:15.454567 Starting kernel ...
2347 15:54:15.454861
2348 15:54:15.455149
2349 15:54:15.456466 end: 2.2.4 bootloader-commands (duration 00:00:49) [common]
2350 15:54:15.457004 start: 2.2.5 auto-login-action (timeout 00:03:55) [common]
2351 15:54:15.457376 Setting prompt string to ['Linux version [0-9]']
2352 15:54:15.457727 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2353 15:54:15.458069 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2355 15:58:10.458019 end: 2.2.5 auto-login-action (duration 00:03:55) [common]
2357 15:58:10.459112 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 235 seconds'
2359 15:58:10.460050 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2362 15:58:10.461552 end: 2 depthcharge-action (duration 00:05:00) [common]
2364 15:58:10.462762 Cleaning after the job
2365 15:58:10.463062 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224318/tftp-deploy-qjpu5k4i/ramdisk
2366 15:58:10.467934 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224318/tftp-deploy-qjpu5k4i/kernel
2367 15:58:10.469427 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224318/tftp-deploy-qjpu5k4i/modules
2368 15:58:10.469761 start: 4.1 power-off (timeout 00:00:30) [common]
2369 15:58:10.469920 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
2370 15:58:10.553681 >> Command sent successfully.
2371 15:58:10.564411 Returned 0 in 0 seconds
2372 15:58:10.665743 end: 4.1 power-off (duration 00:00:00) [common]
2374 15:58:10.667274 start: 4.2 read-feedback (timeout 00:10:00) [common]
2375 15:58:10.668570 Listened to connection for namespace 'common' for up to 1s
2376 15:58:11.668971 Finalising connection for namespace 'common'
2377 15:58:11.669239 Disconnecting from shell: Finalise
2378 15:58:11.669380
2379 15:58:11.770186 end: 4.2 read-feedback (duration 00:00:01) [common]
2380 15:58:11.770801 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224318
2381 15:58:11.901415 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224318
2382 15:58:11.901613 JobError: Your job cannot terminate cleanly.