Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:16:38.685334 lava-dispatcher, installed at version: 2022.11
2 12:16:38.685511 start: 0 validate
3 12:16:38.685635 Start time: 2023-01-31 12:16:38.685628+00:00 (UTC)
4 12:16:38.685756 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:16:38.685877 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230127.0%2Fx86%2Frootfs.cpio.gz exists
6 12:16:38.978916 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:16:38.979115 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:16:40.981725 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:16:40.981891 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:16:40.984792 validate duration: 2.30
12 12:16:40.985042 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:16:40.985159 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:16:40.985264 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:16:40.985380 Not decompressing ramdisk as can be used compressed.
16 12:16:40.985575 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230127.0/x86/rootfs.cpio.gz
17 12:16:40.985662 saving as /var/lib/lava/dispatcher/tmp/8948110/tftp-deploy-29cu4n3f/ramdisk/rootfs.cpio.gz
18 12:16:40.985750 total size: 8423634 (8MB)
19 12:16:40.988429 progress 0% (0MB)
20 12:16:41.002174 progress 5% (0MB)
21 12:16:41.016263 progress 10% (0MB)
22 12:16:41.032208 progress 15% (1MB)
23 12:16:41.046194 progress 20% (1MB)
24 12:16:41.061590 progress 25% (2MB)
25 12:16:41.080950 progress 30% (2MB)
26 12:16:41.097041 progress 35% (2MB)
27 12:16:41.113479 progress 40% (3MB)
28 12:16:41.129761 progress 45% (3MB)
29 12:16:41.149341 progress 50% (4MB)
30 12:16:41.166126 progress 55% (4MB)
31 12:16:41.180014 progress 60% (4MB)
32 12:16:41.197444 progress 65% (5MB)
33 12:16:41.209980 progress 70% (5MB)
34 12:16:41.226864 progress 75% (6MB)
35 12:16:41.240596 progress 80% (6MB)
36 12:16:41.253773 progress 85% (6MB)
37 12:16:41.270103 progress 90% (7MB)
38 12:16:41.284770 progress 95% (7MB)
39 12:16:41.302061 progress 100% (8MB)
40 12:16:41.302266 8MB downloaded in 0.32s (25.38MB/s)
41 12:16:41.302437 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:16:41.302714 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:16:41.302817 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:16:41.302922 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:16:41.303040 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:16:41.303114 saving as /var/lib/lava/dispatcher/tmp/8948110/tftp-deploy-29cu4n3f/kernel/bzImage
48 12:16:41.303196 total size: 7569296 (7MB)
49 12:16:41.303275 No compression specified
50 12:16:41.312300 progress 0% (0MB)
51 12:16:41.334845 progress 5% (0MB)
52 12:16:41.352607 progress 10% (0MB)
53 12:16:41.368461 progress 15% (1MB)
54 12:16:41.386258 progress 20% (1MB)
55 12:16:41.405892 progress 25% (1MB)
56 12:16:41.425455 progress 30% (2MB)
57 12:16:41.446178 progress 35% (2MB)
58 12:16:41.464642 progress 40% (2MB)
59 12:16:41.485139 progress 45% (3MB)
60 12:16:41.504516 progress 50% (3MB)
61 12:16:41.521888 progress 55% (4MB)
62 12:16:41.540951 progress 60% (4MB)
63 12:16:41.561685 progress 65% (4MB)
64 12:16:41.579503 progress 70% (5MB)
65 12:16:41.598829 progress 75% (5MB)
66 12:16:41.618323 progress 80% (5MB)
67 12:16:41.638106 progress 85% (6MB)
68 12:16:41.655522 progress 90% (6MB)
69 12:16:41.678711 progress 95% (6MB)
70 12:16:41.694279 progress 100% (7MB)
71 12:16:41.694590 7MB downloaded in 0.39s (18.44MB/s)
72 12:16:41.694744 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:16:41.694983 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:16:41.695071 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:16:41.695157 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:16:41.695264 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:16:41.695331 saving as /var/lib/lava/dispatcher/tmp/8948110/tftp-deploy-29cu4n3f/modules/modules.tar
79 12:16:41.695393 total size: 51860 (0MB)
80 12:16:41.695454 Using unxz to decompress xz
81 12:16:41.708922 progress 63% (0MB)
82 12:16:41.712257 progress 100% (0MB)
83 12:16:41.713787 0MB downloaded in 0.02s (2.69MB/s)
84 12:16:41.714011 end: 1.3.1 http-download (duration 00:00:00) [common]
86 12:16:41.714271 end: 1.3 download-retry (duration 00:00:00) [common]
87 12:16:41.714371 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 12:16:41.714470 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 12:16:41.714558 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 12:16:41.714648 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 12:16:41.714813 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t
92 12:16:41.714920 makedir: /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin
93 12:16:41.715002 makedir: /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/tests
94 12:16:41.715082 makedir: /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/results
95 12:16:41.715184 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-add-keys
96 12:16:41.715311 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-add-sources
97 12:16:41.715425 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-background-process-start
98 12:16:41.715535 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-background-process-stop
99 12:16:41.715672 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-common-functions
100 12:16:41.715800 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-echo-ipv4
101 12:16:41.715919 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-install-packages
102 12:16:41.716031 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-installed-packages
103 12:16:41.716140 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-os-build
104 12:16:41.716249 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-probe-channel
105 12:16:41.716404 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-probe-ip
106 12:16:41.716513 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-target-ip
107 12:16:41.716621 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-target-mac
108 12:16:41.716728 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-target-storage
109 12:16:41.716839 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-test-case
110 12:16:41.716948 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-test-event
111 12:16:41.717056 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-test-feedback
112 12:16:41.717164 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-test-raise
113 12:16:41.717276 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-test-reference
114 12:16:41.717383 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-test-runner
115 12:16:41.717490 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-test-set
116 12:16:41.717598 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-test-shell
117 12:16:41.717708 Updating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-install-packages (oe)
118 12:16:41.717819 Updating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/bin/lava-installed-packages (oe)
119 12:16:41.717919 Creating /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/environment
120 12:16:41.718006 LAVA metadata
121 12:16:41.718077 - LAVA_JOB_ID=8948110
122 12:16:41.718142 - LAVA_DISPATCHER_IP=192.168.201.1
123 12:16:41.718243 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 12:16:41.718309 skipped lava-vland-overlay
125 12:16:41.718386 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 12:16:41.718470 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 12:16:41.718533 skipped lava-multinode-overlay
128 12:16:41.718609 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 12:16:41.718691 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 12:16:41.718766 Loading test definitions
131 12:16:41.718863 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 12:16:41.718938 Using /lava-8948110 at stage 0
133 12:16:41.719196 uuid=8948110_1.4.2.3.1 testdef=None
134 12:16:41.719286 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 12:16:41.719380 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 12:16:41.719869 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 12:16:41.720106 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 12:16:41.720716 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 12:16:41.720953 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 12:16:41.721492 runner path: /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/0/tests/0_dmesg test_uuid 8948110_1.4.2.3.1
143 12:16:41.721637 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 12:16:41.721867 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
146 12:16:41.721940 Using /lava-8948110 at stage 1
147 12:16:41.722183 uuid=8948110_1.4.2.3.5 testdef=None
148 12:16:41.722273 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 12:16:41.722363 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
150 12:16:41.722801 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 12:16:41.723026 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
153 12:16:41.723594 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 12:16:41.723832 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
156 12:16:41.724435 runner path: /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/1/tests/1_bootrr test_uuid 8948110_1.4.2.3.5
157 12:16:41.724578 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 12:16:41.724792 Creating lava-test-runner.conf files
160 12:16:41.724858 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/0 for stage 0
161 12:16:41.724939 - 0_dmesg
162 12:16:41.725013 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8948110/lava-overlay-4n__w11t/lava-8948110/1 for stage 1
163 12:16:41.725095 - 1_bootrr
164 12:16:41.725185 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 12:16:41.725270 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
166 12:16:41.731208 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 12:16:41.731315 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
168 12:16:41.731404 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 12:16:41.731491 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 12:16:41.731576 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
171 12:16:41.915978 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 12:16:41.916356 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 12:16:41.916490 extracting modules file /var/lib/lava/dispatcher/tmp/8948110/tftp-deploy-29cu4n3f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8948110/extract-overlay-ramdisk-wghagtfp/ramdisk
174 12:16:41.920612 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 12:16:41.920737 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 12:16:41.920827 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8948110/compress-overlay-_s5o0mr3/overlay-1.4.2.4.tar.gz to ramdisk
177 12:16:41.920902 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8948110/compress-overlay-_s5o0mr3/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8948110/extract-overlay-ramdisk-wghagtfp/ramdisk
178 12:16:41.924664 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 12:16:41.924775 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 12:16:41.924867 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 12:16:41.924955 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 12:16:41.925032 Building ramdisk /var/lib/lava/dispatcher/tmp/8948110/extract-overlay-ramdisk-wghagtfp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8948110/extract-overlay-ramdisk-wghagtfp/ramdisk
183 12:16:41.989216 >> 48122 blocks
184 12:16:42.728968 rename /var/lib/lava/dispatcher/tmp/8948110/extract-overlay-ramdisk-wghagtfp/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8948110/tftp-deploy-29cu4n3f/ramdisk/ramdisk.cpio.gz
185 12:16:42.729465 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 12:16:42.729644 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 12:16:42.729788 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 12:16:42.729924 No mkimage arch provided, not using FIT.
189 12:16:42.730055 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 12:16:42.730181 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 12:16:42.730317 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 12:16:42.730456 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 12:16:42.730571 No LXC device requested
194 12:16:42.730699 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 12:16:42.730833 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 12:16:42.730959 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 12:16:42.731060 Checking files for TFTP limit of 4294967296 bytes.
198 12:16:42.731582 end: 1 tftp-deploy (duration 00:00:02) [common]
199 12:16:42.731729 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 12:16:42.731869 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 12:16:42.732038 substitutions:
202 12:16:42.732140 - {DTB}: None
203 12:16:42.732241 - {INITRD}: 8948110/tftp-deploy-29cu4n3f/ramdisk/ramdisk.cpio.gz
204 12:16:42.732367 - {KERNEL}: 8948110/tftp-deploy-29cu4n3f/kernel/bzImage
205 12:16:42.732477 - {LAVA_MAC}: None
206 12:16:42.732571 - {PRESEED_CONFIG}: None
207 12:16:42.732660 - {PRESEED_LOCAL}: None
208 12:16:42.732746 - {RAMDISK}: 8948110/tftp-deploy-29cu4n3f/ramdisk/ramdisk.cpio.gz
209 12:16:42.732840 - {ROOT_PART}: None
210 12:16:42.732934 - {ROOT}: None
211 12:16:42.733029 - {SERVER_IP}: 192.168.201.1
212 12:16:42.733122 - {TEE}: None
213 12:16:42.733216 Parsed boot commands:
214 12:16:42.733304 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 12:16:42.733503 Parsed boot commands: tftpboot 192.168.201.1 8948110/tftp-deploy-29cu4n3f/kernel/bzImage 8948110/tftp-deploy-29cu4n3f/kernel/cmdline 8948110/tftp-deploy-29cu4n3f/ramdisk/ramdisk.cpio.gz
216 12:16:42.733641 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 12:16:42.733773 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 12:16:42.733910 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 12:16:42.734042 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 12:16:42.734149 Not connected, no need to disconnect.
221 12:16:42.734270 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 12:16:42.734398 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 12:16:42.734505 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
224 12:16:42.737693 Setting prompt string to ['lava-test: # ']
225 12:16:42.738047 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 12:16:42.738190 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 12:16:42.738337 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 12:16:42.738472 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 12:16:42.739001 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
230 12:16:42.758521 >> Command sent successfully.
231 12:16:42.760458 Returned 0 in 0 seconds
232 12:16:42.861249 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 12:16:42.861666 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 12:16:42.861815 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 12:16:42.861941 Setting prompt string to 'Starting depthcharge on Helios...'
237 12:16:42.862045 Changing prompt to 'Starting depthcharge on Helios...'
238 12:16:42.862150 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 12:16:42.862527 [Enter `^Ec?' for help]
240 12:16:49.528627
241 12:16:49.528801
242 12:16:49.538847 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 12:16:49.542255 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 12:16:49.548182 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 12:16:49.551764 CPU: AES supported, TXT NOT supported, VT supported
246 12:16:49.558641 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 12:16:49.561848 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 12:16:49.569045 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 12:16:49.571813 VBOOT: Loading verstage.
250 12:16:49.575440 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 12:16:49.582015 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 12:16:49.585300 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 12:16:49.588536 CBFS @ c08000 size 3f8000
254 12:16:49.594979 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 12:16:49.598610 CBFS: Locating 'fallback/verstage'
256 12:16:49.601568 CBFS: Found @ offset 10fb80 size 1072c
257 12:16:49.605397
258 12:16:49.605486
259 12:16:49.615078 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 12:16:49.629484 Probing TPM: . done!
261 12:16:49.632533 TPM ready after 0 ms
262 12:16:49.636131 Connected to device vid:did:rid of 1ae0:0028:00
263 12:16:49.646359 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
264 12:16:49.650246 Initialized TPM device CR50 revision 0
265 12:16:49.694529 tlcl_send_startup: Startup return code is 0
266 12:16:49.694684 TPM: setup succeeded
267 12:16:49.706097 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 12:16:49.709786 Chrome EC: UHEPI supported
269 12:16:49.713043 Phase 1
270 12:16:49.716317 FMAP: area GBB found @ c05000 (12288 bytes)
271 12:16:49.722988 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 12:16:49.723108 Phase 2
273 12:16:49.726512
274 12:16:49.726605 Phase 3
275 12:16:49.729816 FMAP: area GBB found @ c05000 (12288 bytes)
276 12:16:49.736334 VB2:vb2_report_dev_firmware() This is developer signed firmware
277 12:16:49.742944 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
278 12:16:49.746478 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
279 12:16:49.752854 VB2:vb2_verify_keyblock() Checking keyblock signature...
280 12:16:49.768961 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
281 12:16:49.771755 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
282 12:16:49.778756 VB2:vb2_verify_fw_preamble() Verifying preamble.
283 12:16:49.782878 Phase 4
284 12:16:49.786123 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
285 12:16:49.792679 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
286 12:16:49.972278 VB2:vb2_rsa_verify_digest() Digest check failed!
287 12:16:49.975889 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
288 12:16:49.978571
289 12:16:49.978661 Saving nvdata
290 12:16:49.981973 Reboot requested (10020007)
291 12:16:49.985228 board_reset() called!
292 12:16:49.985314 full_reset() called!
293 12:16:54.495821
294 12:16:54.495981
295 12:16:54.505754 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
296 12:16:54.509353 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
297 12:16:54.515943 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
298 12:16:54.519206 CPU: AES supported, TXT NOT supported, VT supported
299 12:16:54.525497 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
300 12:16:54.529120 PCH: device id 0284 (rev 00) is Cometlake-U Premium
301 12:16:54.535513 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
302 12:16:54.540089 VBOOT: Loading verstage.
303 12:16:54.542457 FMAP: Found "FLASH" version 1.1 at 0xc04000.
304 12:16:54.548837 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
305 12:16:54.552547 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
306 12:16:54.555486 CBFS @ c08000 size 3f8000
307 12:16:54.562295 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
308 12:16:54.565595 CBFS: Locating 'fallback/verstage'
309 12:16:54.568811 CBFS: Found @ offset 10fb80 size 1072c
310 12:16:54.572993
311 12:16:54.573078
312 12:16:54.582729 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
313 12:16:54.596844 Probing TPM: . done!
314 12:16:54.600458 TPM ready after 0 ms
315 12:16:54.603634 Connected to device vid:did:rid of 1ae0:0028:00
316 12:16:54.613588 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
317 12:16:54.617827 Initialized TPM device CR50 revision 0
318 12:16:54.661246 tlcl_send_startup: Startup return code is 0
319 12:16:54.661398 TPM: setup succeeded
320 12:16:54.673506 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
321 12:16:54.677358 Chrome EC: UHEPI supported
322 12:16:54.681540 Phase 1
323 12:16:54.684256 FMAP: area GBB found @ c05000 (12288 bytes)
324 12:16:54.690392 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 12:16:54.697184 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 12:16:54.700773 Recovery requested (1009000e)
327 12:16:54.706824 Saving nvdata
328 12:16:54.712529 tlcl_extend: response is 0
329 12:16:54.721013 tlcl_extend: response is 0
330 12:16:54.728051 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
331 12:16:54.731259 CBFS @ c08000 size 3f8000
332 12:16:54.738098 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
333 12:16:54.741276 CBFS: Locating 'fallback/romstage'
334 12:16:54.744593 CBFS: Found @ offset 80 size 145fc
335 12:16:54.748261 Accumulated console time in verstage 98 ms
336 12:16:54.748404
337 12:16:54.748517
338 12:16:54.761059 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
339 12:16:54.768012 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
340 12:16:54.771089 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
341 12:16:54.774148 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
342 12:16:54.781228 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
343 12:16:54.784270 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
344 12:16:54.787442 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
345 12:16:54.791009 TCO_STS: 0000 0000
346 12:16:54.794180 GEN_PMCON: e0015238 00000200
347 12:16:54.797326 GBLRST_CAUSE: 00000000 00000000
348 12:16:54.797411 prev_sleep_state 5
349 12:16:54.800896 Boot Count incremented to 53182
350 12:16:54.808529 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
351 12:16:54.810928 CBFS @ c08000 size 3f8000
352 12:16:54.817669 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
353 12:16:54.817757 CBFS: Locating 'fspm.bin'
354 12:16:54.821252 CBFS: Found @ offset 5ffc0 size 71000
355 12:16:54.824442
356 12:16:54.828174 Chrome EC: UHEPI supported
357 12:16:54.834490 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
358 12:16:54.837651 Probing TPM: done!
359 12:16:54.844322 Connected to device vid:did:rid of 1ae0:0028:00
360 12:16:54.854666 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
361 12:16:54.860856 Initialized TPM device CR50 revision 0
362 12:16:54.870053 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
363 12:16:54.876344 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
364 12:16:54.879367 MRC cache found, size 1948
365 12:16:54.882750 bootmode is set to: 2
366 12:16:54.885945 PRMRR disabled by config.
367 12:16:54.886034 SPD INDEX = 1
368 12:16:54.889418
369 12:16:54.892553 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
370 12:16:54.895742 CBFS @ c08000 size 3f8000
371 12:16:54.902623 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
372 12:16:54.902710 CBFS: Locating 'spd.bin'
373 12:16:54.906247 CBFS: Found @ offset 5fb80 size 400
374 12:16:54.909336 SPD: module type is LPDDR3
375 12:16:54.912530 SPD: module part is
376 12:16:54.919340 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
377 12:16:54.922336 SPD: device width 4 bits, bus width 8 bits
378 12:16:54.926049 SPD: module size is 4096 MB (per channel)
379 12:16:54.929130 memory slot: 0 configuration done.
380 12:16:54.932618 memory slot: 2 configuration done.
381 12:16:54.983727 CBMEM:
382 12:16:54.987348 IMD: root @ 99fff000 254 entries.
383 12:16:54.990298 IMD: root @ 99ffec00 62 entries.
384 12:16:54.993496 External stage cache:
385 12:16:54.996972 IMD: root @ 9abff000 254 entries.
386 12:16:54.999932 IMD: root @ 9abfec00 62 entries.
387 12:16:55.003599 Chrome EC: clear events_b mask to 0x0000000020004000
388 12:16:55.006729
389 12:16:55.019480 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 12:16:55.029857 tlcl_write: response is 0
391 12:16:55.042737 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
392 12:16:55.048963 MRC: TPM MRC hash updated successfully.
393 12:16:55.049055 2 DIMMs found
394 12:16:55.052085 SMM Memory Map
395 12:16:55.054998 SMRAM : 0x9a000000 0x1000000
396 12:16:55.058307 Subregion 0: 0x9a000000 0xa00000
397 12:16:55.061668 Subregion 1: 0x9aa00000 0x200000
398 12:16:55.065294 Subregion 2: 0x9ac00000 0x400000
399 12:16:55.068544 top_of_ram = 0x9a000000
400 12:16:55.071554 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
401 12:16:55.078145 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
402 12:16:55.081686 MTRR Range: Start=ff000000 End=0 (Size 1000000)
403 12:16:55.088189 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
404 12:16:55.091877 CBFS @ c08000 size 3f8000
405 12:16:55.094755 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
406 12:16:55.098042 CBFS: Locating 'fallback/postcar'
407 12:16:55.101931 CBFS: Found @ offset 107000 size 4b44
408 12:16:55.104747
409 12:16:55.108279 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 12:16:55.121121 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 12:16:55.124259 Processing 180 relocs. Offset value of 0x97c0c000
412 12:16:55.132543 Accumulated console time in romstage 286 ms
413 12:16:55.132647
414 12:16:55.132714
415 12:16:55.142612 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 12:16:55.149470 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 12:16:55.153161 CBFS @ c08000 size 3f8000
418 12:16:55.155737 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 12:16:55.159108 CBFS: Locating 'fallback/ramstage'
420 12:16:55.163020
421 12:16:55.165591 CBFS: Found @ offset 43380 size 1b9e8
422 12:16:55.172489 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
423 12:16:55.204280 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
424 12:16:55.207496 Processing 3976 relocs. Offset value of 0x98db0000
425 12:16:55.214401 Accumulated console time in postcar 52 ms
426 12:16:55.214494
427 12:16:55.214563
428 12:16:55.224076 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
429 12:16:55.230886 FMAP: area RO_VPD found @ c00000 (16384 bytes)
430 12:16:55.234333 WARNING: RO_VPD is uninitialized or empty.
431 12:16:55.237717 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 12:16:55.244075 FMAP: area RW_VPD found @ af8000 (8192 bytes)
433 12:16:55.244177 Normal boot.
434 12:16:55.250597 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
435 12:16:55.254024 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 12:16:55.257109 CBFS @ c08000 size 3f8000
437 12:16:55.264035 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 12:16:55.267200 CBFS: Locating 'cpu_microcode_blob.bin'
439 12:16:55.270545 CBFS: Found @ offset 14700 size 2ec00
440 12:16:55.273821 microcode: sig=0x806ec pf=0x4 revision=0xc9
441 12:16:55.277337 Skip microcode update
442 12:16:55.280785 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
443 12:16:55.284080 CBFS @ c08000 size 3f8000
444 12:16:55.290997 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
445 12:16:55.293974 CBFS: Locating 'fsps.bin'
446 12:16:55.297379 CBFS: Found @ offset d1fc0 size 35000
447 12:16:55.322534 Detected 4 core, 8 thread CPU.
448 12:16:55.326054 Setting up SMI for CPU
449 12:16:55.329498 IED base = 0x9ac00000
450 12:16:55.329607 IED size = 0x00400000
451 12:16:55.332255 Will perform SMM setup.
452 12:16:55.339014 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
453 12:16:55.346165 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
454 12:16:55.349232 Processing 16 relocs. Offset value of 0x00030000
455 12:16:55.352939 Attempting to start 7 APs
456 12:16:55.356038 Waiting for 10ms after sending INIT.
457 12:16:55.372691 Waiting for 1st SIPI to complete...done.
458 12:16:55.372829 AP: slot 3 apic_id 1.
459 12:16:55.379287 Waiting for 2nd SIPI to complete...done.
460 12:16:55.379374 AP: slot 6 apic_id 6.
461 12:16:55.382084 AP: slot 7 apic_id 7.
462 12:16:55.385709 AP: slot 1 apic_id 2.
463 12:16:55.385793 AP: slot 4 apic_id 3.
464 12:16:55.389072 AP: slot 2 apic_id 5.
465 12:16:55.392380 AP: slot 5 apic_id 4.
466 12:16:55.398721 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
467 12:16:55.405299 Processing 13 relocs. Offset value of 0x00038000
468 12:16:55.408710 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
469 12:16:55.412084
470 12:16:55.415609 Installing SMM handler to 0x9a000000
471 12:16:55.422139 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
472 12:16:55.428607 Processing 658 relocs. Offset value of 0x9a010000
473 12:16:55.435538 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
474 12:16:55.438482 Processing 13 relocs. Offset value of 0x9a008000
475 12:16:55.445179 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
476 12:16:55.452005 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
477 12:16:55.458303 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
478 12:16:55.461492 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
479 12:16:55.468185 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
480 12:16:55.475128 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
481 12:16:55.478333 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
482 12:16:55.481464
483 12:16:55.484874 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
484 12:16:55.488479 Clearing SMI status registers
485 12:16:55.491748 SMI_STS: PM1
486 12:16:55.491832 PM1_STS: PWRBTN
487 12:16:55.495279 TCO_STS: SECOND_TO
488 12:16:55.498320 New SMBASE 0x9a000000
489 12:16:55.501556 In relocation handler: CPU 0
490 12:16:55.505073 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
491 12:16:55.508459 Writing SMRR. base = 0x9a000006, mask=0xff000800
492 12:16:55.512176 Relocation complete.
493 12:16:55.515958 New SMBASE 0x99fff400
494 12:16:55.516043 In relocation handler: CPU 3
495 12:16:55.521984 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
496 12:16:55.525034 Writing SMRR. base = 0x9a000006, mask=0xff000800
497 12:16:55.528190 Relocation complete.
498 12:16:55.528275 New SMBASE 0x99ffe800
499 12:16:55.531810
500 12:16:55.531899 In relocation handler: CPU 6
501 12:16:55.539184 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
502 12:16:55.542049 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 12:16:55.545038 Relocation complete.
504 12:16:55.545122 New SMBASE 0x99ffe400
505 12:16:55.548531 In relocation handler: CPU 7
506 12:16:55.555355 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
507 12:16:55.558450 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 12:16:55.561559 Relocation complete.
509 12:16:55.561643 New SMBASE 0x99fff800
510 12:16:55.564956 In relocation handler: CPU 2
511 12:16:55.568615 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
512 12:16:55.575928 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 12:16:55.578426 Relocation complete.
514 12:16:55.578512 New SMBASE 0x99ffec00
515 12:16:55.581695 In relocation handler: CPU 5
516 12:16:55.584728 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
517 12:16:55.591481 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 12:16:55.591570 Relocation complete.
519 12:16:55.595349
520 12:16:55.595434 New SMBASE 0x99fffc00
521 12:16:55.598246 In relocation handler: CPU 1
522 12:16:55.601634 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
523 12:16:55.608464 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 12:16:55.608551 Relocation complete.
525 12:16:55.611551 New SMBASE 0x99fff000
526 12:16:55.614679 In relocation handler: CPU 4
527 12:16:55.618136 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
528 12:16:55.624857 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 12:16:55.624943 Relocation complete.
530 12:16:55.628483 Initializing CPU #0
531 12:16:55.631682 CPU: vendor Intel device 806ec
532 12:16:55.635186 CPU: family 06, model 8e, stepping 0c
533 12:16:55.637931 Clearing out pending MCEs
534 12:16:55.641179 Setting up local APIC...
535 12:16:55.641264 apic_id: 0x00 done.
536 12:16:55.644661 Turbo is available but hidden
537 12:16:55.648043 Turbo is available and visible
538 12:16:55.651290 VMX status: enabled
539 12:16:55.654553 IA32_FEATURE_CONTROL status: locked
540 12:16:55.658071 Skip microcode update
541 12:16:55.658156 CPU #0 initialized
542 12:16:55.661635 Initializing CPU #3
543 12:16:55.661719 Initializing CPU #2
544 12:16:55.664645 Initializing CPU #5
545 12:16:55.668066 CPU: vendor Intel device 806ec
546 12:16:55.671165 CPU: family 06, model 8e, stepping 0c
547 12:16:55.674514 Initializing CPU #6
548 12:16:55.674598 Initializing CPU #7
549 12:16:55.678010 CPU: vendor Intel device 806ec
550 12:16:55.681063 CPU: family 06, model 8e, stepping 0c
551 12:16:55.684604
552 12:16:55.684689 CPU: vendor Intel device 806ec
553 12:16:55.690943 CPU: family 06, model 8e, stepping 0c
554 12:16:55.691031 Clearing out pending MCEs
555 12:16:55.694417 Clearing out pending MCEs
556 12:16:55.697644 Setting up local APIC...
557 12:16:55.701006 CPU: vendor Intel device 806ec
558 12:16:55.704247 CPU: family 06, model 8e, stepping 0c
559 12:16:55.707521 Clearing out pending MCEs
560 12:16:55.711032 Setting up local APIC...
561 12:16:55.711116 Initializing CPU #4
562 12:16:55.714608 Initializing CPU #1
563 12:16:55.717345 CPU: vendor Intel device 806ec
564 12:16:55.720678 CPU: family 06, model 8e, stepping 0c
565 12:16:55.723934 CPU: vendor Intel device 806ec
566 12:16:55.727482 CPU: family 06, model 8e, stepping 0c
567 12:16:55.731233 Clearing out pending MCEs
568 12:16:55.734203 Clearing out pending MCEs
569 12:16:55.734287 Setting up local APIC...
570 12:16:55.737284 Setting up local APIC...
571 12:16:55.741203 apic_id: 0x06 done.
572 12:16:55.741287 apic_id: 0x07 done.
573 12:16:55.744029 VMX status: enabled
574 12:16:55.747256 VMX status: enabled
575 12:16:55.750515 IA32_FEATURE_CONTROL status: locked
576 12:16:55.754884 IA32_FEATURE_CONTROL status: locked
577 12:16:55.754968 Skip microcode update
578 12:16:55.757506
579 12:16:55.757635 Skip microcode update
580 12:16:55.760690 CPU #6 initialized
581 12:16:55.760775 CPU #7 initialized
582 12:16:55.763936 apic_id: 0x01 done.
583 12:16:55.767453 apic_id: 0x03 done.
584 12:16:55.767552 Setting up local APIC...
585 12:16:55.770753 VMX status: enabled
586 12:16:55.774659 apic_id: 0x02 done.
587 12:16:55.774743 VMX status: enabled
588 12:16:55.777292 VMX status: enabled
589 12:16:55.780632 IA32_FEATURE_CONTROL status: locked
590 12:16:55.783936 IA32_FEATURE_CONTROL status: locked
591 12:16:55.787619 Skip microcode update
592 12:16:55.787702 Skip microcode update
593 12:16:55.791017 CPU #4 initialized
594 12:16:55.793881 CPU #1 initialized
595 12:16:55.793965 Clearing out pending MCEs
596 12:16:55.797160 CPU: vendor Intel device 806ec
597 12:16:55.800953 CPU: family 06, model 8e, stepping 0c
598 12:16:55.804276 Setting up local APIC...
599 12:16:55.807308 IA32_FEATURE_CONTROL status: locked
600 12:16:55.810738 Clearing out pending MCEs
601 12:16:55.813678 apic_id: 0x05 done.
602 12:16:55.813762 Setting up local APIC...
603 12:16:55.818111 Skip microcode update
604 12:16:55.820623 VMX status: enabled
605 12:16:55.820708 apic_id: 0x04 done.
606 12:16:55.823700 IA32_FEATURE_CONTROL status: locked
607 12:16:55.826836
608 12:16:55.826921 VMX status: enabled
609 12:16:55.830509 Skip microcode update
610 12:16:55.833441 IA32_FEATURE_CONTROL status: locked
611 12:16:55.833526 CPU #2 initialized
612 12:16:55.837176 CPU #3 initialized
613 12:16:55.840285 Skip microcode update
614 12:16:55.840406 CPU #5 initialized
615 12:16:55.846812 bsp_do_flight_plan done after 466 msecs.
616 12:16:55.850550 CPU: frequency set to 4200 MHz
617 12:16:55.850635 Enabling SMIs.
618 12:16:55.850702 Locking SMM.
619 12:16:55.867286 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
620 12:16:55.870133 CBFS @ c08000 size 3f8000
621 12:16:55.877095 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
622 12:16:55.877180 CBFS: Locating 'vbt.bin'
623 12:16:55.880105 CBFS: Found @ offset 5f5c0 size 499
624 12:16:55.887143 Found a VBT of 4608 bytes after decompression
625 12:16:56.071916 Display FSP Version Info HOB
626 12:16:56.075002 Reference Code - CPU = 9.0.1e.30
627 12:16:56.078240 uCode Version = 0.0.0.ca
628 12:16:56.081852 TXT ACM version = ff.ff.ff.ffff
629 12:16:56.084800 Display FSP Version Info HOB
630 12:16:56.088613 Reference Code - ME = 9.0.1e.30
631 12:16:56.091680 MEBx version = 0.0.0.0
632 12:16:56.094979 ME Firmware Version = Consumer SKU
633 12:16:56.098605 Display FSP Version Info HOB
634 12:16:56.101504 Reference Code - CML PCH = 9.0.1e.30
635 12:16:56.105399 PCH-CRID Status = Disabled
636 12:16:56.108244 PCH-CRID Original Value = ff.ff.ff.ffff
637 12:16:56.111884 PCH-CRID New Value = ff.ff.ff.ffff
638 12:16:56.115125 OPROM - RST - RAID = ff.ff.ff.ffff
639 12:16:56.118192 ChipsetInit Base Version = ff.ff.ff.ffff
640 12:16:56.121868 ChipsetInit Oem Version = ff.ff.ff.ffff
641 12:16:56.124980 Display FSP Version Info HOB
642 12:16:56.132346 Reference Code - SA - System Agent = 9.0.1e.30
643 12:16:56.132446 Reference Code - MRC = 0.7.1.6c
644 12:16:56.134929
645 12:16:56.135012 SA - PCIe Version = 9.0.1e.30
646 12:16:56.138483 SA-CRID Status = Disabled
647 12:16:56.141729 SA-CRID Original Value = 0.0.0.c
648 12:16:56.144852 SA-CRID New Value = 0.0.0.c
649 12:16:56.148497 OPROM - VBIOS = ff.ff.ff.ffff
650 12:16:56.148605 RTC Init
651 12:16:56.151925 Set power on after power failure.
652 12:16:56.155212
653 12:16:56.155296 Disabling Deep S3
654 12:16:56.158533 Disabling Deep S3
655 12:16:56.158616 Disabling Deep S4
656 12:16:56.162131 Disabling Deep S4
657 12:16:56.162215 Disabling Deep S5
658 12:16:56.165160 Disabling Deep S5
659 12:16:56.171464 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 196 exit 1
660 12:16:56.171549 Enumerating buses...
661 12:16:56.178507 Show all devs... Before device enumeration.
662 12:16:56.178638 Root Device: enabled 1
663 12:16:56.181417 CPU_CLUSTER: 0: enabled 1
664 12:16:56.184979 DOMAIN: 0000: enabled 1
665 12:16:56.185063 APIC: 00: enabled 1
666 12:16:56.188141
667 12:16:56.188224 PCI: 00:00.0: enabled 1
668 12:16:56.191997 PCI: 00:02.0: enabled 1
669 12:16:56.195183 PCI: 00:04.0: enabled 0
670 12:16:56.195266 PCI: 00:05.0: enabled 0
671 12:16:56.198223 PCI: 00:12.0: enabled 1
672 12:16:56.201492 PCI: 00:12.5: enabled 0
673 12:16:56.204594 PCI: 00:12.6: enabled 0
674 12:16:56.204677 PCI: 00:14.0: enabled 1
675 12:16:56.207941 PCI: 00:14.1: enabled 0
676 12:16:56.211167 PCI: 00:14.3: enabled 1
677 12:16:56.214735 PCI: 00:14.5: enabled 0
678 12:16:56.214820 PCI: 00:15.0: enabled 1
679 12:16:56.217881 PCI: 00:15.1: enabled 1
680 12:16:56.221309 PCI: 00:15.2: enabled 0
681 12:16:56.221393 PCI: 00:15.3: enabled 0
682 12:16:56.224537
683 12:16:56.224622 PCI: 00:16.0: enabled 1
684 12:16:56.227921 PCI: 00:16.1: enabled 0
685 12:16:56.231048 PCI: 00:16.2: enabled 0
686 12:16:56.231134 PCI: 00:16.3: enabled 0
687 12:16:56.234335 PCI: 00:16.4: enabled 0
688 12:16:56.237782 PCI: 00:16.5: enabled 0
689 12:16:56.241147 PCI: 00:17.0: enabled 1
690 12:16:56.241231 PCI: 00:19.0: enabled 1
691 12:16:56.244457 PCI: 00:19.1: enabled 0
692 12:16:56.247983 PCI: 00:19.2: enabled 0
693 12:16:56.251015 PCI: 00:1a.0: enabled 0
694 12:16:56.251100 PCI: 00:1c.0: enabled 0
695 12:16:56.254229 PCI: 00:1c.1: enabled 0
696 12:16:56.257743 PCI: 00:1c.2: enabled 0
697 12:16:56.257828 PCI: 00:1c.3: enabled 0
698 12:16:56.260842
699 12:16:56.260927 PCI: 00:1c.4: enabled 0
700 12:16:56.264447 PCI: 00:1c.5: enabled 0
701 12:16:56.267703 PCI: 00:1c.6: enabled 0
702 12:16:56.267788 PCI: 00:1c.7: enabled 0
703 12:16:56.270877 PCI: 00:1d.0: enabled 1
704 12:16:56.274388 PCI: 00:1d.1: enabled 0
705 12:16:56.278310 PCI: 00:1d.2: enabled 0
706 12:16:56.278395 PCI: 00:1d.3: enabled 0
707 12:16:56.280989 PCI: 00:1d.4: enabled 0
708 12:16:56.283948 PCI: 00:1d.5: enabled 1
709 12:16:56.287453 PCI: 00:1e.0: enabled 1
710 12:16:56.287538 PCI: 00:1e.1: enabled 0
711 12:16:56.290892 PCI: 00:1e.2: enabled 1
712 12:16:56.294370 PCI: 00:1e.3: enabled 1
713 12:16:56.294455 PCI: 00:1f.0: enabled 1
714 12:16:56.297562 PCI: 00:1f.1: enabled 1
715 12:16:56.301995 PCI: 00:1f.2: enabled 1
716 12:16:56.304208 PCI: 00:1f.3: enabled 1
717 12:16:56.304292 PCI: 00:1f.4: enabled 1
718 12:16:56.307456 PCI: 00:1f.5: enabled 1
719 12:16:56.310679 PCI: 00:1f.6: enabled 0
720 12:16:56.314086 USB0 port 0: enabled 1
721 12:16:56.314172 I2C: 00:15: enabled 1
722 12:16:56.317603 I2C: 00:5d: enabled 1
723 12:16:56.320579 GENERIC: 0.0: enabled 1
724 12:16:56.320664 I2C: 00:1a: enabled 1
725 12:16:56.324013 I2C: 00:38: enabled 1
726 12:16:56.327207 I2C: 00:39: enabled 1
727 12:16:56.327291 I2C: 00:3a: enabled 1
728 12:16:56.330631 I2C: 00:3b: enabled 1
729 12:16:56.333986 PCI: 00:00.0: enabled 1
730 12:16:56.334070 SPI: 00: enabled 1
731 12:16:56.337428 SPI: 01: enabled 1
732 12:16:56.340644 PNP: 0c09.0: enabled 1
733 12:16:56.340729 USB2 port 0: enabled 1
734 12:16:56.344061 USB2 port 1: enabled 1
735 12:16:56.348012 USB2 port 2: enabled 0
736 12:16:56.348105 USB2 port 3: enabled 0
737 12:16:56.350618
738 12:16:56.350715 USB2 port 5: enabled 0
739 12:16:56.353795 USB2 port 6: enabled 1
740 12:16:56.357182 USB2 port 9: enabled 1
741 12:16:56.357267 USB3 port 0: enabled 1
742 12:16:56.360508 USB3 port 1: enabled 1
743 12:16:56.363885 USB3 port 2: enabled 1
744 12:16:56.363970 USB3 port 3: enabled 1
745 12:16:56.367101 USB3 port 4: enabled 0
746 12:16:56.370765 APIC: 02: enabled 1
747 12:16:56.370849 APIC: 05: enabled 1
748 12:16:56.374130 APIC: 01: enabled 1
749 12:16:56.377009 APIC: 03: enabled 1
750 12:16:56.377094 APIC: 04: enabled 1
751 12:16:56.380590 APIC: 06: enabled 1
752 12:16:56.380683 APIC: 07: enabled 1
753 12:16:56.383962 Compare with tree...
754 12:16:56.387309 Root Device: enabled 1
755 12:16:56.390049 CPU_CLUSTER: 0: enabled 1
756 12:16:56.390135 APIC: 00: enabled 1
757 12:16:56.393574 APIC: 02: enabled 1
758 12:16:56.397605 APIC: 05: enabled 1
759 12:16:56.397690 APIC: 01: enabled 1
760 12:16:56.400301 APIC: 03: enabled 1
761 12:16:56.403818 APIC: 04: enabled 1
762 12:16:56.403905 APIC: 06: enabled 1
763 12:16:56.406814 APIC: 07: enabled 1
764 12:16:56.410266 DOMAIN: 0000: enabled 1
765 12:16:56.413593 PCI: 00:00.0: enabled 1
766 12:16:56.413679 PCI: 00:02.0: enabled 1
767 12:16:56.416698 PCI: 00:04.0: enabled 0
768 12:16:56.420469 PCI: 00:05.0: enabled 0
769 12:16:56.423334 PCI: 00:12.0: enabled 1
770 12:16:56.423427 PCI: 00:12.5: enabled 0
771 12:16:56.426705
772 12:16:56.426790 PCI: 00:12.6: enabled 0
773 12:16:56.430101 PCI: 00:14.0: enabled 1
774 12:16:56.433383 USB0 port 0: enabled 1
775 12:16:56.436793 USB2 port 0: enabled 1
776 12:16:56.440214 USB2 port 1: enabled 1
777 12:16:56.440319 USB2 port 2: enabled 0
778 12:16:56.443275 USB2 port 3: enabled 0
779 12:16:56.446649 USB2 port 5: enabled 0
780 12:16:56.450095 USB2 port 6: enabled 1
781 12:16:56.453812 USB2 port 9: enabled 1
782 12:16:56.453897 USB3 port 0: enabled 1
783 12:16:56.456438 USB3 port 1: enabled 1
784 12:16:56.459872 USB3 port 2: enabled 1
785 12:16:56.463320 USB3 port 3: enabled 1
786 12:16:56.466697 USB3 port 4: enabled 0
787 12:16:56.470028 PCI: 00:14.1: enabled 0
788 12:16:56.470112 PCI: 00:14.3: enabled 1
789 12:16:56.473041 PCI: 00:14.5: enabled 0
790 12:16:56.476833 PCI: 00:15.0: enabled 1
791 12:16:56.480039 I2C: 00:15: enabled 1
792 12:16:56.480123 PCI: 00:15.1: enabled 1
793 12:16:56.483408 I2C: 00:5d: enabled 1
794 12:16:56.486476 GENERIC: 0.0: enabled 1
795 12:16:56.489643 PCI: 00:15.2: enabled 0
796 12:16:56.493232 PCI: 00:15.3: enabled 0
797 12:16:56.493316 PCI: 00:16.0: enabled 1
798 12:16:56.496523 PCI: 00:16.1: enabled 0
799 12:16:56.499794 PCI: 00:16.2: enabled 0
800 12:16:56.503125 PCI: 00:16.3: enabled 0
801 12:16:56.506580 PCI: 00:16.4: enabled 0
802 12:16:56.506665 PCI: 00:16.5: enabled 0
803 12:16:56.509416 PCI: 00:17.0: enabled 1
804 12:16:56.512742 PCI: 00:19.0: enabled 1
805 12:16:56.516184 I2C: 00:1a: enabled 1
806 12:16:56.519200 I2C: 00:38: enabled 1
807 12:16:56.519286 I2C: 00:39: enabled 1
808 12:16:56.522554 I2C: 00:3a: enabled 1
809 12:16:56.526551 I2C: 00:3b: enabled 1
810 12:16:56.529550 PCI: 00:19.1: enabled 0
811 12:16:56.529638 PCI: 00:19.2: enabled 0
812 12:16:56.533522 PCI: 00:1a.0: enabled 0
813 12:16:56.535998 PCI: 00:1c.0: enabled 0
814 12:16:56.539230 PCI: 00:1c.1: enabled 0
815 12:16:56.542719 PCI: 00:1c.2: enabled 0
816 12:16:56.542806 PCI: 00:1c.3: enabled 0
817 12:16:56.545758 PCI: 00:1c.4: enabled 0
818 12:16:56.549081 PCI: 00:1c.5: enabled 0
819 12:16:56.552792 PCI: 00:1c.6: enabled 0
820 12:16:56.555688 PCI: 00:1c.7: enabled 0
821 12:16:56.555773 PCI: 00:1d.0: enabled 1
822 12:16:56.559074 PCI: 00:1d.1: enabled 0
823 12:16:56.562463 PCI: 00:1d.2: enabled 0
824 12:16:56.565805 PCI: 00:1d.3: enabled 0
825 12:16:56.569166 PCI: 00:1d.4: enabled 0
826 12:16:56.569252 PCI: 00:1d.5: enabled 1
827 12:16:56.572535 PCI: 00:00.0: enabled 1
828 12:16:56.576949 PCI: 00:1e.0: enabled 1
829 12:16:56.578951 PCI: 00:1e.1: enabled 0
830 12:16:56.579036 PCI: 00:1e.2: enabled 1
831 12:16:56.582788
832 12:16:56.582874 SPI: 00: enabled 1
833 12:16:56.585424 PCI: 00:1e.3: enabled 1
834 12:16:56.588835 SPI: 01: enabled 1
835 12:16:56.588920 PCI: 00:1f.0: enabled 1
836 12:16:56.592370 PNP: 0c09.0: enabled 1
837 12:16:56.595568 PCI: 00:1f.1: enabled 1
838 12:16:56.598921 PCI: 00:1f.2: enabled 1
839 12:16:56.602780 PCI: 00:1f.3: enabled 1
840 12:16:56.602866 PCI: 00:1f.4: enabled 1
841 12:16:56.605814 PCI: 00:1f.5: enabled 1
842 12:16:56.609276 PCI: 00:1f.6: enabled 0
843 12:16:56.612184 Root Device scanning...
844 12:16:56.615645 scan_static_bus for Root Device
845 12:16:56.615730 CPU_CLUSTER: 0 enabled
846 12:16:56.619437 DOMAIN: 0000 enabled
847 12:16:56.622446 DOMAIN: 0000 scanning...
848 12:16:56.625418 PCI: pci_scan_bus for bus 00
849 12:16:56.628670 PCI: 00:00.0 [8086/0000] ops
850 12:16:56.632174 PCI: 00:00.0 [8086/9b61] enabled
851 12:16:56.635938 PCI: 00:02.0 [8086/0000] bus ops
852 12:16:56.638911 PCI: 00:02.0 [8086/9b41] enabled
853 12:16:56.642346 PCI: 00:04.0 [8086/1903] disabled
854 12:16:56.645315 PCI: 00:08.0 [8086/1911] enabled
855 12:16:56.648696 PCI: 00:12.0 [8086/02f9] enabled
856 12:16:56.652428 PCI: 00:14.0 [8086/0000] bus ops
857 12:16:56.655386 PCI: 00:14.0 [8086/02ed] enabled
858 12:16:56.659201 PCI: 00:14.2 [8086/02ef] enabled
859 12:16:56.663065 PCI: 00:14.3 [8086/02f0] enabled
860 12:16:56.665359 PCI: 00:15.0 [8086/0000] bus ops
861 12:16:56.668728 PCI: 00:15.0 [8086/02e8] enabled
862 12:16:56.672257 PCI: 00:15.1 [8086/0000] bus ops
863 12:16:56.675175 PCI: 00:15.1 [8086/02e9] enabled
864 12:16:56.679076 PCI: 00:16.0 [8086/0000] ops
865 12:16:56.681928 PCI: 00:16.0 [8086/02e0] enabled
866 12:16:56.685374 PCI: 00:17.0 [8086/0000] ops
867 12:16:56.689018 PCI: 00:17.0 [8086/02d3] enabled
868 12:16:56.691962 PCI: 00:19.0 [8086/0000] bus ops
869 12:16:56.695430 PCI: 00:19.0 [8086/02c5] enabled
870 12:16:56.698688 PCI: 00:1d.0 [8086/0000] bus ops
871 12:16:56.701908 PCI: 00:1d.0 [8086/02b0] enabled
872 12:16:56.704989 PCI: Static device PCI: 00:1d.5 not found, disabling it.
873 12:16:56.708485 PCI: 00:1e.0 [8086/0000] ops
874 12:16:56.711930 PCI: 00:1e.0 [8086/02a8] enabled
875 12:16:56.714995 PCI: 00:1e.2 [8086/0000] bus ops
876 12:16:56.718474 PCI: 00:1e.2 [8086/02aa] enabled
877 12:16:56.721660 PCI: 00:1e.3 [8086/0000] bus ops
878 12:16:56.724846 PCI: 00:1e.3 [8086/02ab] enabled
879 12:16:56.728485 PCI: 00:1f.0 [8086/0000] bus ops
880 12:16:56.731571 PCI: 00:1f.0 [8086/0284] enabled
881 12:16:56.738606 PCI: Static device PCI: 00:1f.1 not found, disabling it.
882 12:16:56.745104 PCI: Static device PCI: 00:1f.2 not found, disabling it.
883 12:16:56.748213 PCI: 00:1f.3 [8086/0000] bus ops
884 12:16:56.752025 PCI: 00:1f.3 [8086/02c8] enabled
885 12:16:56.755088 PCI: 00:1f.4 [8086/0000] bus ops
886 12:16:56.757990 PCI: 00:1f.4 [8086/02a3] enabled
887 12:16:56.761623 PCI: 00:1f.5 [8086/0000] bus ops
888 12:16:56.765188 PCI: 00:1f.5 [8086/02a4] enabled
889 12:16:56.767975 PCI: Leftover static devices:
890 12:16:56.768061 PCI: 00:05.0
891 12:16:56.768129 PCI: 00:12.5
892 12:16:56.771146 PCI: 00:12.6
893 12:16:56.771231 PCI: 00:14.1
894 12:16:56.774880 PCI: 00:14.5
895 12:16:56.774965 PCI: 00:15.2
896 12:16:56.775032 PCI: 00:15.3
897 12:16:56.777758 PCI: 00:16.1
898 12:16:56.777842 PCI: 00:16.2
899 12:16:56.781453 PCI: 00:16.3
900 12:16:56.781538 PCI: 00:16.4
901 12:16:56.781605 PCI: 00:16.5
902 12:16:56.784964
903 12:16:56.785049 PCI: 00:19.1
904 12:16:56.785115 PCI: 00:19.2
905 12:16:56.787727 PCI: 00:1a.0
906 12:16:56.787812 PCI: 00:1c.0
907 12:16:56.791013 PCI: 00:1c.1
908 12:16:56.791097 PCI: 00:1c.2
909 12:16:56.791163 PCI: 00:1c.3
910 12:16:56.794655 PCI: 00:1c.4
911 12:16:56.794739 PCI: 00:1c.5
912 12:16:56.797793 PCI: 00:1c.6
913 12:16:56.797877 PCI: 00:1c.7
914 12:16:56.797944 PCI: 00:1d.1
915 12:16:56.800907 PCI: 00:1d.2
916 12:16:56.800992 PCI: 00:1d.3
917 12:16:56.804624 PCI: 00:1d.4
918 12:16:56.804709 PCI: 00:1d.5
919 12:16:56.804776 PCI: 00:1e.1
920 12:16:56.807902
921 12:16:56.807988 PCI: 00:1f.1
922 12:16:56.808056 PCI: 00:1f.2
923 12:16:56.811275 PCI: 00:1f.6
924 12:16:56.814328 PCI: Check your devicetree.cb.
925 12:16:56.814414 PCI: 00:02.0 scanning...
926 12:16:56.818201 scan_generic_bus for PCI: 00:02.0
927 12:16:56.821118
928 12:16:56.824275 scan_generic_bus for PCI: 00:02.0 done
929 12:16:56.827700 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
930 12:16:56.831156 PCI: 00:14.0 scanning...
931 12:16:56.834395 scan_static_bus for PCI: 00:14.0
932 12:16:56.837373 USB0 port 0 enabled
933 12:16:56.840796 USB0 port 0 scanning...
934 12:16:56.844131 scan_static_bus for USB0 port 0
935 12:16:56.844217 USB2 port 0 enabled
936 12:16:56.847664 USB2 port 1 enabled
937 12:16:56.847751 USB2 port 2 disabled
938 12:16:56.851020
939 12:16:56.851107 USB2 port 3 disabled
940 12:16:56.854198 USB2 port 5 disabled
941 12:16:56.854285 USB2 port 6 enabled
942 12:16:56.857495 USB2 port 9 enabled
943 12:16:56.860740 USB3 port 0 enabled
944 12:16:56.860827 USB3 port 1 enabled
945 12:16:56.864182 USB3 port 2 enabled
946 12:16:56.864268 USB3 port 3 enabled
947 12:16:56.867705
948 12:16:56.867791 USB3 port 4 disabled
949 12:16:56.870969 USB2 port 0 scanning...
950 12:16:56.874169 scan_static_bus for USB2 port 0
951 12:16:56.877702 scan_static_bus for USB2 port 0 done
952 12:16:56.884014 scan_bus: scanning of bus USB2 port 0 took 9695 usecs
953 12:16:56.884103 USB2 port 1 scanning...
954 12:16:56.887775 scan_static_bus for USB2 port 1
955 12:16:56.893997 scan_static_bus for USB2 port 1 done
956 12:16:56.897413 scan_bus: scanning of bus USB2 port 1 took 9695 usecs
957 12:16:56.900823 USB2 port 6 scanning...
958 12:16:56.904707 scan_static_bus for USB2 port 6
959 12:16:56.907683 scan_static_bus for USB2 port 6 done
960 12:16:56.913871 scan_bus: scanning of bus USB2 port 6 took 9709 usecs
961 12:16:56.913958 USB2 port 9 scanning...
962 12:16:56.917758 scan_static_bus for USB2 port 9
963 12:16:56.924234 scan_static_bus for USB2 port 9 done
964 12:16:56.927354 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
965 12:16:56.930876 USB3 port 0 scanning...
966 12:16:56.933871 scan_static_bus for USB3 port 0
967 12:16:56.937177 scan_static_bus for USB3 port 0 done
968 12:16:56.944164 scan_bus: scanning of bus USB3 port 0 took 9695 usecs
969 12:16:56.944249 USB3 port 1 scanning...
970 12:16:56.947764 scan_static_bus for USB3 port 1
971 12:16:56.954151 scan_static_bus for USB3 port 1 done
972 12:16:56.957831 scan_bus: scanning of bus USB3 port 1 took 9697 usecs
973 12:16:56.961304 USB3 port 2 scanning...
974 12:16:56.964267 scan_static_bus for USB3 port 2
975 12:16:56.967351 scan_static_bus for USB3 port 2 done
976 12:16:56.974074 scan_bus: scanning of bus USB3 port 2 took 9694 usecs
977 12:16:56.974161 USB3 port 3 scanning...
978 12:16:56.977601 scan_static_bus for USB3 port 3
979 12:16:56.984354 scan_static_bus for USB3 port 3 done
980 12:16:56.988110 scan_bus: scanning of bus USB3 port 3 took 9696 usecs
981 12:16:56.990711 scan_static_bus for USB0 port 0 done
982 12:16:56.997713 scan_bus: scanning of bus USB0 port 0 took 155317 usecs
983 12:16:57.000533 scan_static_bus for PCI: 00:14.0 done
984 12:16:57.007695 scan_bus: scanning of bus PCI: 00:14.0 took 172962 usecs
985 12:16:57.010980 PCI: 00:15.0 scanning...
986 12:16:57.014661 scan_generic_bus for PCI: 00:15.0
987 12:16:57.017511 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
988 12:16:57.020619 scan_generic_bus for PCI: 00:15.0 done
989 12:16:57.027144 scan_bus: scanning of bus PCI: 00:15.0 took 14300 usecs
990 12:16:57.030460 PCI: 00:15.1 scanning...
991 12:16:57.033978 scan_generic_bus for PCI: 00:15.1
992 12:16:57.037525 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
993 12:16:57.040481 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
994 12:16:57.044102 scan_generic_bus for PCI: 00:15.1 done
995 12:16:57.050665 scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs
996 12:16:57.053522 PCI: 00:19.0 scanning...
997 12:16:57.057014 scan_generic_bus for PCI: 00:19.0
998 12:16:57.060876 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
999 12:16:57.063832 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1000 12:16:57.069903 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1001 12:16:57.073318 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1002 12:16:57.076927 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1003 12:16:57.080069 scan_generic_bus for PCI: 00:19.0 done
1004 12:16:57.086546 scan_bus: scanning of bus PCI: 00:19.0 took 30703 usecs
1005 12:16:57.090102 PCI: 00:1d.0 scanning...
1006 12:16:57.093314 do_pci_scan_bridge for PCI: 00:1d.0
1007 12:16:57.096924 PCI: pci_scan_bus for bus 01
1008 12:16:57.099948 PCI: 01:00.0 [1c5c/1327] enabled
1009 12:16:57.103172 Enabling Common Clock Configuration
1010 12:16:57.106464 L1 Sub-State supported from root port 29
1011 12:16:57.110238 L1 Sub-State Support = 0xf
1012 12:16:57.113338 CommonModeRestoreTime = 0x28
1013 12:16:57.116681 Power On Value = 0x16, Power On Scale = 0x0
1014 12:16:57.120007 ASPM: Enabled L1
1015 12:16:57.123202 scan_bus: scanning of bus PCI: 00:1d.0 took 32784 usecs
1016 12:16:57.126447 PCI: 00:1e.2 scanning...
1017 12:16:57.129971 scan_generic_bus for PCI: 00:1e.2
1018 12:16:57.133454 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1019 12:16:57.139863 scan_generic_bus for PCI: 00:1e.2 done
1020 12:16:57.143022 scan_bus: scanning of bus PCI: 00:1e.2 took 14009 usecs
1021 12:16:57.146563 PCI: 00:1e.3 scanning...
1022 12:16:57.149881 scan_generic_bus for PCI: 00:1e.3
1023 12:16:57.153071 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1024 12:16:57.159852 scan_generic_bus for PCI: 00:1e.3 done
1025 12:16:57.162876 scan_bus: scanning of bus PCI: 00:1e.3 took 14013 usecs
1026 12:16:57.166761 PCI: 00:1f.0 scanning...
1027 12:16:57.169835 scan_static_bus for PCI: 00:1f.0
1028 12:16:57.172930 PNP: 0c09.0 enabled
1029 12:16:57.176093 scan_static_bus for PCI: 00:1f.0 done
1030 12:16:57.179766 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1031 12:16:57.183101
1032 12:16:57.183186 PCI: 00:1f.3 scanning...
1033 12:16:57.189586 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1034 12:16:57.193079 PCI: 00:1f.4 scanning...
1035 12:16:57.196308 scan_generic_bus for PCI: 00:1f.4
1036 12:16:57.199376 scan_generic_bus for PCI: 00:1f.4 done
1037 12:16:57.206269 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
1038 12:16:57.206355 PCI: 00:1f.5 scanning...
1039 12:16:57.209576 scan_generic_bus for PCI: 00:1f.5
1040 12:16:57.213182
1041 12:16:57.216536 scan_generic_bus for PCI: 00:1f.5 done
1042 12:16:57.219761 scan_bus: scanning of bus PCI: 00:1f.5 took 10195 usecs
1043 12:16:57.226260 scan_bus: scanning of bus DOMAIN: 0000 took 604887 usecs
1044 12:16:57.229671 scan_static_bus for Root Device done
1045 12:16:57.236961 scan_bus: scanning of bus Root Device took 624763 usecs
1046 12:16:57.237048 done
1047 12:16:57.239576 Chrome EC: UHEPI supported
1048 12:16:57.246101 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 12:16:57.252633 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 12:16:57.259383 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 12:16:57.265959 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 12:16:57.269453 SPI flash protection: WPSW=0 SRP0=0
1053 12:16:57.272685 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 12:16:57.279258 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1055 12:16:57.282739 found VGA at PCI: 00:02.0
1056 12:16:57.285870 Setting up VGA for PCI: 00:02.0
1057 12:16:57.289698 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 12:16:57.295771 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 12:16:57.295859 Allocating resources...
1060 12:16:57.298882 Reading resources...
1061 12:16:57.302167 Root Device read_resources bus 0 link: 0
1062 12:16:57.309055 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 12:16:57.312736 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 12:16:57.318691 DOMAIN: 0000 read_resources bus 0 link: 0
1065 12:16:57.322563 PCI: 00:14.0 read_resources bus 0 link: 0
1066 12:16:57.329324 USB0 port 0 read_resources bus 0 link: 0
1067 12:16:57.335789 USB0 port 0 read_resources bus 0 link: 0 done
1068 12:16:57.339101 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 12:16:57.346741 PCI: 00:15.0 read_resources bus 1 link: 0
1070 12:16:57.350150 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 12:16:57.356513 PCI: 00:15.1 read_resources bus 2 link: 0
1072 12:16:57.359763 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 12:16:57.367344 PCI: 00:19.0 read_resources bus 3 link: 0
1074 12:16:57.374168 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 12:16:57.377463 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 12:16:57.383732 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 12:16:57.387945 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 12:16:57.393892 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 12:16:57.397328 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 12:16:57.403727 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 12:16:57.407213 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 12:16:57.413806 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 12:16:57.420236 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 12:16:57.423587 Root Device read_resources bus 0 link: 0 done
1085 12:16:57.426918 Done reading resources.
1086 12:16:57.430008 Show resources in subtree (Root Device)...After reading.
1087 12:16:57.433466
1088 12:16:57.437228 Root Device child on link 0 CPU_CLUSTER: 0
1089 12:16:57.440043 CPU_CLUSTER: 0 child on link 0 APIC: 00
1090 12:16:57.440128 APIC: 00
1091 12:16:57.443493 APIC: 02
1092 12:16:57.443577 APIC: 05
1093 12:16:57.446994 APIC: 01
1094 12:16:57.447078 APIC: 03
1095 12:16:57.447144 APIC: 04
1096 12:16:57.450338 APIC: 06
1097 12:16:57.450423 APIC: 07
1098 12:16:57.453543 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1099 12:16:57.463415 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1100 12:16:57.513119 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1101 12:16:57.513339 PCI: 00:00.0
1102 12:16:57.513819 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1103 12:16:57.514190 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1104 12:16:57.514875 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1105 12:16:57.515386 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1106 12:16:57.551607 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1107 12:16:57.552058 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1108 12:16:57.552980 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1109 12:16:57.553577 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1110 12:16:57.559217 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1111 12:16:57.569375 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1112 12:16:57.579098 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1113 12:16:57.589074 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1114 12:16:57.598623 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1115 12:16:57.609003 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1116 12:16:57.615409 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1117 12:16:57.624927 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1118 12:16:57.628502 PCI: 00:02.0
1119 12:16:57.638465 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1120 12:16:57.648491 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1121 12:16:57.655005 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1122 12:16:57.658755 PCI: 00:04.0
1123 12:16:57.658840 PCI: 00:08.0
1124 12:16:57.668040 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 12:16:57.671393 PCI: 00:12.0
1126 12:16:57.681277 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 12:16:57.684510 PCI: 00:14.0 child on link 0 USB0 port 0
1128 12:16:57.694537 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1129 12:16:57.701569 USB0 port 0 child on link 0 USB2 port 0
1130 12:16:57.701658 USB2 port 0
1131 12:16:57.705306 USB2 port 1
1132 12:16:57.705392 USB2 port 2
1133 12:16:57.707828 USB2 port 3
1134 12:16:57.707914 USB2 port 5
1135 12:16:57.710978 USB2 port 6
1136 12:16:57.711067 USB2 port 9
1137 12:16:57.714625 USB3 port 0
1138 12:16:57.714711 USB3 port 1
1139 12:16:57.718176 USB3 port 2
1140 12:16:57.718261 USB3 port 3
1141 12:16:57.721602 USB3 port 4
1142 12:16:57.721688 PCI: 00:14.2
1143 12:16:57.731519 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1144 12:16:57.740938 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1145 12:16:57.744347 PCI: 00:14.3
1146 12:16:57.754632 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1147 12:16:57.757446 PCI: 00:15.0 child on link 0 I2C: 01:15
1148 12:16:57.767471 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 12:16:57.770699 I2C: 01:15
1150 12:16:57.774007 PCI: 00:15.1 child on link 0 I2C: 02:5d
1151 12:16:57.784190 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 12:16:57.784279 I2C: 02:5d
1153 12:16:57.787986 GENERIC: 0.0
1154 12:16:57.788072 PCI: 00:16.0
1155 12:16:57.797546 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 12:16:57.800737 PCI: 00:17.0
1157 12:16:57.810767 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1158 12:16:57.817350 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1159 12:16:57.827302 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1160 12:16:57.834314 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1161 12:16:57.843666 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1162 12:16:57.853640 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1163 12:16:57.857833 PCI: 00:19.0 child on link 0 I2C: 03:1a
1164 12:16:57.866888 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 12:16:57.866976 I2C: 03:1a
1166 12:16:57.869998 I2C: 03:38
1167 12:16:57.870083 I2C: 03:39
1168 12:16:57.873881 I2C: 03:3a
1169 12:16:57.873966 I2C: 03:3b
1170 12:16:57.880226 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1171 12:16:57.886616 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1172 12:16:57.896911 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1173 12:16:57.906755 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1174 12:16:57.906849 PCI: 01:00.0
1175 12:16:57.916694 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 12:16:57.920747 PCI: 00:1e.0
1177 12:16:57.929680 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1178 12:16:57.939667 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 12:16:57.943473 PCI: 00:1e.2 child on link 0 SPI: 00
1180 12:16:57.946121
1181 12:16:57.952720 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 12:16:57.956186
1183 12:16:57.956273 SPI: 00
1184 12:16:57.960105 PCI: 00:1e.3 child on link 0 SPI: 01
1185 12:16:57.969566 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 12:16:57.969657 SPI: 01
1187 12:16:57.976028 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1188 12:16:57.982927 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1189 12:16:57.992723 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1190 12:16:57.995985 PNP: 0c09.0
1191 12:16:58.002812 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1192 12:16:58.005951 PCI: 00:1f.3
1193 12:16:58.016014 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1194 12:16:58.026694 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1195 12:16:58.026794 PCI: 00:1f.4
1196 12:16:58.035944 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1197 12:16:58.045930 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1198 12:16:58.046028 PCI: 00:1f.5
1199 12:16:58.055893 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1200 12:16:58.062234 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1201 12:16:58.069018 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1202 12:16:58.075372 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1203 12:16:58.078620 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1204 12:16:58.082401 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1205 12:16:58.085688 PCI: 00:17.0 18 * [0x60 - 0x67] io
1206 12:16:58.088930 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1207 12:16:58.095885 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1208 12:16:58.102015 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1209 12:16:58.112231 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1210 12:16:58.118610 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1211 12:16:58.125489 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1212 12:16:58.132185 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1213 12:16:58.138775 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1214 12:16:58.142096 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1215 12:16:58.148456 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1216 12:16:58.151657 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1217 12:16:58.158580 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1218 12:16:58.161626 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1219 12:16:58.168478 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1220 12:16:58.171905 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1221 12:16:58.178419 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1222 12:16:58.182041 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1223 12:16:58.188524 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1224 12:16:58.191780 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1225 12:16:58.195216 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1226 12:16:58.198207
1227 12:16:58.201688 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1228 12:16:58.204988 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1229 12:16:58.211651 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1230 12:16:58.214714 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1231 12:16:58.221656 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1232 12:16:58.224781 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1233 12:16:58.231779 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1234 12:16:58.234840 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1235 12:16:58.241520 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1236 12:16:58.244597 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1237 12:16:58.251331 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1238 12:16:58.258348 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1239 12:16:58.261085 avoid_fixed_resources: DOMAIN: 0000
1240 12:16:58.267648 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1241 12:16:58.274732 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1242 12:16:58.281816 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1243 12:16:58.291094 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1244 12:16:58.297447 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1245 12:16:58.304270 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1246 12:16:58.314073 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1247 12:16:58.320884 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1248 12:16:58.327302 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1249 12:16:58.334127 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1250 12:16:58.343855 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1251 12:16:58.351004 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1252 12:16:58.351091 Setting resources...
1253 12:16:58.357301 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1254 12:16:58.360740 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1255 12:16:58.364444
1256 12:16:58.367343 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1257 12:16:58.371076 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1258 12:16:58.374130 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1259 12:16:58.380922 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1260 12:16:58.387304 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1261 12:16:58.394182 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1262 12:16:58.400274 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1263 12:16:58.407354 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1264 12:16:58.410442 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1265 12:16:58.417056 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1266 12:16:58.420239 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1267 12:16:58.427788 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1268 12:16:58.430055 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1269 12:16:58.433724 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1270 12:16:58.440706 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1271 12:16:58.443971 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1272 12:16:58.450237 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1273 12:16:58.453828 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1274 12:16:58.460060 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1275 12:16:58.463500 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1276 12:16:58.470337 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1277 12:16:58.473423 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1278 12:16:58.480472 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1279 12:16:58.483376 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1280 12:16:58.490356 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1281 12:16:58.493536 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1282 12:16:58.499966 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1283 12:16:58.503332 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1284 12:16:58.506800 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1285 12:16:58.510100
1286 12:16:58.513632 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1287 12:16:58.520409 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1288 12:16:58.527209 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1289 12:16:58.536526 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1290 12:16:58.543131 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1291 12:16:58.546625 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1292 12:16:58.556549 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1293 12:16:58.559676 Root Device assign_resources, bus 0 link: 0
1294 12:16:58.562861 DOMAIN: 0000 assign_resources, bus 0 link: 0
1295 12:16:58.573660 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1296 12:16:58.580740 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1297 12:16:58.589608 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1298 12:16:58.596271 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1299 12:16:58.606047 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1300 12:16:58.612679 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1301 12:16:58.619779 PCI: 00:14.0 assign_resources, bus 0 link: 0
1302 12:16:58.622745 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 12:16:58.632664 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1304 12:16:58.639514 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1305 12:16:58.645775 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1306 12:16:58.656255 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1307 12:16:58.659588 PCI: 00:15.0 assign_resources, bus 1 link: 0
1308 12:16:58.665962 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 12:16:58.672806 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1310 12:16:58.679161 PCI: 00:15.1 assign_resources, bus 2 link: 0
1311 12:16:58.682182 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 12:16:58.692758 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1313 12:16:58.698695 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1314 12:16:58.705680 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1315 12:16:58.715263 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1316 12:16:58.722293 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1317 12:16:58.728840 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1318 12:16:58.738890 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1319 12:16:58.745476 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1320 12:16:58.748681 PCI: 00:19.0 assign_resources, bus 3 link: 0
1321 12:16:58.751822
1322 12:16:58.755343 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 12:16:58.765262 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1324 12:16:58.771792 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1325 12:16:58.781468 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1326 12:16:58.785452 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1327 12:16:58.794663 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1328 12:16:58.797973 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1329 12:16:58.808174 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1330 12:16:58.814794 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1331 12:16:58.821080 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 12:16:58.824227 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 12:16:58.830935 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1334 12:16:58.834197
1335 12:16:58.837847 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 12:16:58.840826 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1337 12:16:58.847609 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 12:16:58.851186 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1339 12:16:58.857724 LPC: Trying to open IO window from 800 size 1ff
1340 12:16:58.864103 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1341 12:16:58.874187 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1342 12:16:58.880880 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1343 12:16:58.890766 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1344 12:16:58.894073 DOMAIN: 0000 assign_resources, bus 0 link: 0
1345 12:16:58.897068 Root Device assign_resources, bus 0 link: 0
1346 12:16:58.900597 Done setting resources.
1347 12:16:58.907320 Show resources in subtree (Root Device)...After assigning values.
1348 12:16:58.910223 Root Device child on link 0 CPU_CLUSTER: 0
1349 12:16:58.914093
1350 12:16:58.917308 CPU_CLUSTER: 0 child on link 0 APIC: 00
1351 12:16:58.917404 APIC: 00
1352 12:16:58.920523 APIC: 02
1353 12:16:58.920616 APIC: 05
1354 12:16:58.920684 APIC: 01
1355 12:16:58.924323 APIC: 03
1356 12:16:58.924411 APIC: 04
1357 12:16:58.924480 APIC: 06
1358 12:16:58.927308 APIC: 07
1359 12:16:58.930260 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1360 12:16:58.940113 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1361 12:16:58.950249 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1362 12:16:58.953648 PCI: 00:00.0
1363 12:16:58.963567 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1364 12:16:58.973698 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1365 12:16:58.980219 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1366 12:16:58.983719
1367 12:16:58.989910 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1368 12:16:58.999949 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1369 12:16:59.009616 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1370 12:16:59.019898 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1371 12:16:59.030608 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1372 12:16:59.037351 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1373 12:16:59.046593 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1374 12:16:59.056756 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1375 12:16:59.065818 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1376 12:16:59.076330 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1377 12:16:59.086328 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1378 12:16:59.096058 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1379 12:16:59.102843 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1380 12:16:59.105869 PCI: 00:02.0
1381 12:16:59.115789 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1382 12:16:59.126006 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1383 12:16:59.135353 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1384 12:16:59.138963 PCI: 00:04.0
1385 12:16:59.139367 PCI: 00:08.0
1386 12:16:59.148558 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1387 12:16:59.151762 PCI: 00:12.0
1388 12:16:59.161866 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1389 12:16:59.165230 PCI: 00:14.0 child on link 0 USB0 port 0
1390 12:16:59.175459 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1391 12:16:59.181530 USB0 port 0 child on link 0 USB2 port 0
1392 12:16:59.181634 USB2 port 0
1393 12:16:59.185000 USB2 port 1
1394 12:16:59.185082 USB2 port 2
1395 12:16:59.188170 USB2 port 3
1396 12:16:59.188254 USB2 port 5
1397 12:16:59.191816 USB2 port 6
1398 12:16:59.191901 USB2 port 9
1399 12:16:59.194587 USB3 port 0
1400 12:16:59.194672 USB3 port 1
1401 12:16:59.198236 USB3 port 2
1402 12:16:59.198354 USB3 port 3
1403 12:16:59.201432 USB3 port 4
1404 12:16:59.201543 PCI: 00:14.2
1405 12:16:59.214574 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1406 12:16:59.224419 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1407 12:16:59.224512 PCI: 00:14.3
1408 12:16:59.234800 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1409 12:16:59.241311 PCI: 00:15.0 child on link 0 I2C: 01:15
1410 12:16:59.250780 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1411 12:16:59.250874 I2C: 01:15
1412 12:16:59.254120 PCI: 00:15.1 child on link 0 I2C: 02:5d
1413 12:16:59.257590
1414 12:16:59.267646 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1415 12:16:59.267738 I2C: 02:5d
1416 12:16:59.270632 GENERIC: 0.0
1417 12:16:59.270726 PCI: 00:16.0
1418 12:16:59.280627 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1419 12:16:59.283995 PCI: 00:17.0
1420 12:16:59.294181 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1421 12:16:59.303564 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1422 12:16:59.313991 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1423 12:16:59.320193 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1424 12:16:59.330095 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1425 12:16:59.341074 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1426 12:16:59.347693 PCI: 00:19.0 child on link 0 I2C: 03:1a
1427 12:16:59.356584 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1428 12:16:59.356687 I2C: 03:1a
1429 12:16:59.360274 I2C: 03:38
1430 12:16:59.360382 I2C: 03:39
1431 12:16:59.363395 I2C: 03:3a
1432 12:16:59.363481 I2C: 03:3b
1433 12:16:59.366776 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1434 12:16:59.376629 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1435 12:16:59.387084 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1436 12:16:59.396497 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1437 12:16:59.399472 PCI: 01:00.0
1438 12:16:59.409566 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1439 12:16:59.413098 PCI: 00:1e.0
1440 12:16:59.422818 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1441 12:16:59.432702 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1442 12:16:59.435897 PCI: 00:1e.2 child on link 0 SPI: 00
1443 12:16:59.446255 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1444 12:16:59.449310 SPI: 00
1445 12:16:59.452741 PCI: 00:1e.3 child on link 0 SPI: 01
1446 12:16:59.462719 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1447 12:16:59.462835 SPI: 01
1448 12:16:59.469271 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1449 12:16:59.475749 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1450 12:16:59.485440 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1451 12:16:59.488995 PNP: 0c09.0
1452 12:16:59.495902 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1453 12:16:59.499209 PCI: 00:1f.3
1454 12:16:59.508639 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1455 12:16:59.518659 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1456 12:16:59.518804 PCI: 00:1f.4
1457 12:16:59.522278
1458 12:16:59.528841 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1459 12:16:59.538584 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1460 12:16:59.541786 PCI: 00:1f.5
1461 12:16:59.551752 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1462 12:16:59.554824 Done allocating resources.
1463 12:16:59.558701 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1464 12:16:59.562085 Enabling resources...
1465 12:16:59.569040 PCI: 00:00.0 subsystem <- 8086/9b61
1466 12:16:59.569131 PCI: 00:00.0 cmd <- 06
1467 12:16:59.572217 PCI: 00:02.0 subsystem <- 8086/9b41
1468 12:16:59.575536 PCI: 00:02.0 cmd <- 03
1469 12:16:59.578951 PCI: 00:08.0 cmd <- 06
1470 12:16:59.581716 PCI: 00:12.0 subsystem <- 8086/02f9
1471 12:16:59.585435 PCI: 00:12.0 cmd <- 02
1472 12:16:59.588583 PCI: 00:14.0 subsystem <- 8086/02ed
1473 12:16:59.591743 PCI: 00:14.0 cmd <- 02
1474 12:16:59.595685 PCI: 00:14.2 cmd <- 02
1475 12:16:59.598213 PCI: 00:14.3 subsystem <- 8086/02f0
1476 12:16:59.598292 PCI: 00:14.3 cmd <- 02
1477 12:16:59.605329 PCI: 00:15.0 subsystem <- 8086/02e8
1478 12:16:59.605411 PCI: 00:15.0 cmd <- 02
1479 12:16:59.608556 PCI: 00:15.1 subsystem <- 8086/02e9
1480 12:16:59.611825 PCI: 00:15.1 cmd <- 02
1481 12:16:59.615544 PCI: 00:16.0 subsystem <- 8086/02e0
1482 12:16:59.618309 PCI: 00:16.0 cmd <- 02
1483 12:16:59.621484 PCI: 00:17.0 subsystem <- 8086/02d3
1484 12:16:59.624969 PCI: 00:17.0 cmd <- 03
1485 12:16:59.628685 PCI: 00:19.0 subsystem <- 8086/02c5
1486 12:16:59.631629 PCI: 00:19.0 cmd <- 02
1487 12:16:59.634981 PCI: 00:1d.0 bridge ctrl <- 0013
1488 12:16:59.638367 PCI: 00:1d.0 subsystem <- 8086/02b0
1489 12:16:59.641431 PCI: 00:1d.0 cmd <- 06
1490 12:16:59.644848 PCI: 00:1e.0 subsystem <- 8086/02a8
1491 12:16:59.647975 PCI: 00:1e.0 cmd <- 06
1492 12:16:59.651599 PCI: 00:1e.2 subsystem <- 8086/02aa
1493 12:16:59.654545 PCI: 00:1e.2 cmd <- 06
1494 12:16:59.657943 PCI: 00:1e.3 subsystem <- 8086/02ab
1495 12:16:59.658031 PCI: 00:1e.3 cmd <- 02
1496 12:16:59.664713 PCI: 00:1f.0 subsystem <- 8086/0284
1497 12:16:59.664800 PCI: 00:1f.0 cmd <- 407
1498 12:16:59.668228 PCI: 00:1f.3 subsystem <- 8086/02c8
1499 12:16:59.671269
1500 12:16:59.671361 PCI: 00:1f.3 cmd <- 02
1501 12:16:59.674795 PCI: 00:1f.4 subsystem <- 8086/02a3
1502 12:16:59.678194 PCI: 00:1f.4 cmd <- 03
1503 12:16:59.681366 PCI: 00:1f.5 subsystem <- 8086/02a4
1504 12:16:59.684355 PCI: 00:1f.5 cmd <- 406
1505 12:16:59.694018 PCI: 01:00.0 cmd <- 02
1506 12:16:59.698680 done.
1507 12:16:59.711117 ME: Version: 14.0.39.1367
1508 12:16:59.717350 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1509 12:16:59.721061 Initializing devices...
1510 12:16:59.721162 Root Device init ...
1511 12:16:59.727900 Chrome EC: Set SMI mask to 0x0000000000000000
1512 12:16:59.730596 Chrome EC: clear events_b mask to 0x0000000000000000
1513 12:16:59.737427 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1514 12:16:59.743912 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1515 12:16:59.750632 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1516 12:16:59.753704 Chrome EC: Set WAKE mask to 0x0000000000000000
1517 12:16:59.757081 Root Device init finished in 35166 usecs
1518 12:16:59.760965 CPU_CLUSTER: 0 init ...
1519 12:16:59.763953 CPU_CLUSTER: 0 init finished in 2440 usecs
1520 12:16:59.767258
1521 12:16:59.771560 PCI: 00:00.0 init ...
1522 12:16:59.774601 CPU TDP: 15 Watts
1523 12:16:59.778290 CPU PL2 = 64 Watts
1524 12:16:59.781716 PCI: 00:00.0 init finished in 7064 usecs
1525 12:16:59.784801 PCI: 00:02.0 init ...
1526 12:16:59.788117 PCI: 00:02.0 init finished in 2253 usecs
1527 12:16:59.791677 PCI: 00:08.0 init ...
1528 12:16:59.794623 PCI: 00:08.0 init finished in 2251 usecs
1529 12:16:59.798279 PCI: 00:12.0 init ...
1530 12:16:59.801552 PCI: 00:12.0 init finished in 2243 usecs
1531 12:16:59.804516 PCI: 00:14.0 init ...
1532 12:16:59.808327 PCI: 00:14.0 init finished in 2253 usecs
1533 12:16:59.811129 PCI: 00:14.2 init ...
1534 12:16:59.814358 PCI: 00:14.2 init finished in 2253 usecs
1535 12:16:59.817983 PCI: 00:14.3 init ...
1536 12:16:59.821220 PCI: 00:14.3 init finished in 2269 usecs
1537 12:16:59.824678 PCI: 00:15.0 init ...
1538 12:16:59.827502 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 12:16:59.831446 PCI: 00:15.0 init finished in 5981 usecs
1540 12:16:59.834536 PCI: 00:15.1 init ...
1541 12:16:59.837763 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 12:16:59.840852 PCI: 00:15.1 init finished in 5975 usecs
1543 12:16:59.844162
1544 12:16:59.844249 PCI: 00:16.0 init ...
1545 12:16:59.850962 PCI: 00:16.0 init finished in 2244 usecs
1546 12:16:59.851051 PCI: 00:19.0 init ...
1547 12:16:59.853977
1548 12:16:59.857336 DW I2C bus 4 at 0xd1222000 (400 KHz)
1549 12:16:59.861031 PCI: 00:19.0 init finished in 5976 usecs
1550 12:16:59.864170 PCI: 00:1d.0 init ...
1551 12:16:59.867371 Initializing PCH PCIe bridge.
1552 12:16:59.870724 PCI: 00:1d.0 init finished in 5284 usecs
1553 12:16:59.874439 PCI: 00:1f.0 init ...
1554 12:16:59.878104 IOAPIC: Initializing IOAPIC at 0xfec00000
1555 12:16:59.883959 IOAPIC: Bootstrap Processor Local APIC = 0x00
1556 12:16:59.884045 IOAPIC: ID = 0x02
1557 12:16:59.887394 IOAPIC: Dumping registers
1558 12:16:59.890578 reg 0x0000: 0x02000000
1559 12:16:59.894026 reg 0x0001: 0x00770020
1560 12:16:59.894112 reg 0x0002: 0x00000000
1561 12:16:59.900346 PCI: 00:1f.0 init finished in 23542 usecs
1562 12:16:59.903856 PCI: 00:1f.4 init ...
1563 12:16:59.907104 PCI: 00:1f.4 init finished in 2263 usecs
1564 12:16:59.917433 PCI: 01:00.0 init ...
1565 12:16:59.920667 PCI: 01:00.0 init finished in 2252 usecs
1566 12:16:59.925037 PNP: 0c09.0 init ...
1567 12:16:59.928714 Google Chrome EC uptime: 11.102 seconds
1568 12:16:59.932121
1569 12:16:59.935432 Google Chrome AP resets since EC boot: 0
1570 12:16:59.938685 Google Chrome most recent AP reset causes:
1571 12:16:59.945342 Google Chrome EC reset flags at last EC boot: reset-pin
1572 12:16:59.948273 PNP: 0c09.0 init finished in 20712 usecs
1573 12:16:59.951769 Devices initialized
1574 12:16:59.955057 Show all devs... After init.
1575 12:16:59.955156 Root Device: enabled 1
1576 12:16:59.958332 CPU_CLUSTER: 0: enabled 1
1577 12:16:59.962050 DOMAIN: 0000: enabled 1
1578 12:16:59.962163 APIC: 00: enabled 1
1579 12:16:59.964943 PCI: 00:00.0: enabled 1
1580 12:16:59.968264 PCI: 00:02.0: enabled 1
1581 12:16:59.971651 PCI: 00:04.0: enabled 0
1582 12:16:59.971737 PCI: 00:05.0: enabled 0
1583 12:16:59.974807 PCI: 00:12.0: enabled 1
1584 12:16:59.977997 PCI: 00:12.5: enabled 0
1585 12:16:59.981525 PCI: 00:12.6: enabled 0
1586 12:16:59.981610 PCI: 00:14.0: enabled 1
1587 12:16:59.984881 PCI: 00:14.1: enabled 0
1588 12:16:59.988607 PCI: 00:14.3: enabled 1
1589 12:16:59.988693 PCI: 00:14.5: enabled 0
1590 12:16:59.991686 PCI: 00:15.0: enabled 1
1591 12:16:59.994815 PCI: 00:15.1: enabled 1
1592 12:16:59.998025 PCI: 00:15.2: enabled 0
1593 12:16:59.998111 PCI: 00:15.3: enabled 0
1594 12:17:00.001269 PCI: 00:16.0: enabled 1
1595 12:17:00.004770 PCI: 00:16.1: enabled 0
1596 12:17:00.007705 PCI: 00:16.2: enabled 0
1597 12:17:00.007792 PCI: 00:16.3: enabled 0
1598 12:17:00.011394 PCI: 00:16.4: enabled 0
1599 12:17:00.014453 PCI: 00:16.5: enabled 0
1600 12:17:00.018288 PCI: 00:17.0: enabled 1
1601 12:17:00.018374 PCI: 00:19.0: enabled 1
1602 12:17:00.021217 PCI: 00:19.1: enabled 0
1603 12:17:00.024179 PCI: 00:19.2: enabled 0
1604 12:17:00.024265 PCI: 00:1a.0: enabled 0
1605 12:17:00.027645
1606 12:17:00.027731 PCI: 00:1c.0: enabled 0
1607 12:17:00.031596 PCI: 00:1c.1: enabled 0
1608 12:17:00.034488 PCI: 00:1c.2: enabled 0
1609 12:17:00.034574 PCI: 00:1c.3: enabled 0
1610 12:17:00.038177 PCI: 00:1c.4: enabled 0
1611 12:17:00.041543 PCI: 00:1c.5: enabled 0
1612 12:17:00.044427 PCI: 00:1c.6: enabled 0
1613 12:17:00.044513 PCI: 00:1c.7: enabled 0
1614 12:17:00.047417 PCI: 00:1d.0: enabled 1
1615 12:17:00.050862 PCI: 00:1d.1: enabled 0
1616 12:17:00.054556 PCI: 00:1d.2: enabled 0
1617 12:17:00.054642 PCI: 00:1d.3: enabled 0
1618 12:17:00.057735 PCI: 00:1d.4: enabled 0
1619 12:17:00.061057 PCI: 00:1d.5: enabled 0
1620 12:17:00.064085 PCI: 00:1e.0: enabled 1
1621 12:17:00.064183 PCI: 00:1e.1: enabled 0
1622 12:17:00.067684 PCI: 00:1e.2: enabled 1
1623 12:17:00.070600 PCI: 00:1e.3: enabled 1
1624 12:17:00.070686 PCI: 00:1f.0: enabled 1
1625 12:17:00.074135 PCI: 00:1f.1: enabled 0
1626 12:17:00.077417 PCI: 00:1f.2: enabled 0
1627 12:17:00.080731 PCI: 00:1f.3: enabled 1
1628 12:17:00.080817 PCI: 00:1f.4: enabled 1
1629 12:17:00.083903 PCI: 00:1f.5: enabled 1
1630 12:17:00.087371 PCI: 00:1f.6: enabled 0
1631 12:17:00.090981 USB0 port 0: enabled 1
1632 12:17:00.091068 I2C: 01:15: enabled 1
1633 12:17:00.094308 I2C: 02:5d: enabled 1
1634 12:17:00.097021 GENERIC: 0.0: enabled 1
1635 12:17:00.097107 I2C: 03:1a: enabled 1
1636 12:17:00.100543 I2C: 03:38: enabled 1
1637 12:17:00.103843 I2C: 03:39: enabled 1
1638 12:17:00.103928 I2C: 03:3a: enabled 1
1639 12:17:00.107264 I2C: 03:3b: enabled 1
1640 12:17:00.110165 PCI: 00:00.0: enabled 1
1641 12:17:00.110251 SPI: 00: enabled 1
1642 12:17:00.113645 SPI: 01: enabled 1
1643 12:17:00.117525 PNP: 0c09.0: enabled 1
1644 12:17:00.117610 USB2 port 0: enabled 1
1645 12:17:00.120565 USB2 port 1: enabled 1
1646 12:17:00.123870 USB2 port 2: enabled 0
1647 12:17:00.123955 USB2 port 3: enabled 0
1648 12:17:00.127160
1649 12:17:00.127246 USB2 port 5: enabled 0
1650 12:17:00.130042 USB2 port 6: enabled 1
1651 12:17:00.133452 USB2 port 9: enabled 1
1652 12:17:00.133538 USB3 port 0: enabled 1
1653 12:17:00.137000 USB3 port 1: enabled 1
1654 12:17:00.140528 USB3 port 2: enabled 1
1655 12:17:00.140615 USB3 port 3: enabled 1
1656 12:17:00.143616 USB3 port 4: enabled 0
1657 12:17:00.146891 APIC: 02: enabled 1
1658 12:17:00.146977 APIC: 05: enabled 1
1659 12:17:00.150116 APIC: 01: enabled 1
1660 12:17:00.153508 APIC: 03: enabled 1
1661 12:17:00.153594 APIC: 04: enabled 1
1662 12:17:00.156739 APIC: 06: enabled 1
1663 12:17:00.156825 APIC: 07: enabled 1
1664 12:17:00.160449
1665 12:17:00.160535 PCI: 00:08.0: enabled 1
1666 12:17:00.163130 PCI: 00:14.2: enabled 1
1667 12:17:00.166477 PCI: 01:00.0: enabled 1
1668 12:17:00.170029 Disabling ACPI via APMC:
1669 12:17:00.170115 done.
1670 12:17:00.173293
1671 12:17:00.176774 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1672 12:17:00.179940 ELOG: NV offset 0xaf0000 size 0x4000
1673 12:17:00.187032 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1674 12:17:00.193562 ELOG: Event(17) added with size 13 at 2023-01-31 12:17:00 UTC
1675 12:17:00.200538 ELOG: Event(92) added with size 9 at 2023-01-31 12:17:00 UTC
1676 12:17:00.206809 ELOG: Event(93) added with size 9 at 2023-01-31 12:17:00 UTC
1677 12:17:00.213356 ELOG: Event(9A) added with size 9 at 2023-01-31 12:17:00 UTC
1678 12:17:00.220077 ELOG: Event(9E) added with size 10 at 2023-01-31 12:17:00 UTC
1679 12:17:00.226901 ELOG: Event(9F) added with size 14 at 2023-01-31 12:17:00 UTC
1680 12:17:00.230168 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1681 12:17:00.237630 ELOG: Event(A1) added with size 10 at 2023-01-31 12:17:00 UTC
1682 12:17:00.247661 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1683 12:17:00.254034 ELOG: Event(A0) added with size 9 at 2023-01-31 12:17:00 UTC
1684 12:17:00.257186 elog_add_boot_reason: Logged dev mode boot
1685 12:17:00.257273 Finalize devices...
1686 12:17:00.260714
1687 12:17:00.260799 PCI: 00:17.0 final
1688 12:17:00.264136 Devices finalized
1689 12:17:00.267085 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1690 12:17:00.273838 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1691 12:17:00.276997 ME: HFSTS1 : 0x90000245
1692 12:17:00.281075 ME: HFSTS2 : 0x3B850126
1693 12:17:00.287525 ME: HFSTS3 : 0x00000020
1694 12:17:00.290213 ME: HFSTS4 : 0x00004800
1695 12:17:00.293797 ME: HFSTS5 : 0x00000000
1696 12:17:00.297042 ME: HFSTS6 : 0x40400006
1697 12:17:00.300131 ME: Manufacturing Mode : NO
1698 12:17:00.303324 ME: FW Partition Table : OK
1699 12:17:00.307263 ME: Bringup Loader Failure : NO
1700 12:17:00.310183 ME: Firmware Init Complete : YES
1701 12:17:00.313367 ME: Boot Options Present : NO
1702 12:17:00.316726 ME: Update In Progress : NO
1703 12:17:00.320056 ME: D0i3 Support : YES
1704 12:17:00.323078 ME: Low Power State Enabled : NO
1705 12:17:00.326670 ME: CPU Replaced : NO
1706 12:17:00.330046 ME: CPU Replacement Valid : YES
1707 12:17:00.332870 ME: Current Working State : 5
1708 12:17:00.336205 ME: Current Operation State : 1
1709 12:17:00.339635 ME: Current Operation Mode : 0
1710 12:17:00.343056 ME: Error Code : 0
1711 12:17:00.346021 ME: CPU Debug Disabled : YES
1712 12:17:00.349402 ME: TXT Support : NO
1713 12:17:00.355807 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1714 12:17:00.362865 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1715 12:17:00.362962 CBFS @ c08000 size 3f8000
1716 12:17:00.369315 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1717 12:17:00.372524 CBFS: Locating 'fallback/dsdt.aml'
1718 12:17:00.379261 CBFS: Found @ offset 10bb80 size 3fa5
1719 12:17:00.382898 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1720 12:17:00.385654 CBFS @ c08000 size 3f8000
1721 12:17:00.392344 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1722 12:17:00.395564 CBFS: Locating 'fallback/slic'
1723 12:17:00.399197 CBFS: 'fallback/slic' not found.
1724 12:17:00.402242 ACPI: Writing ACPI tables at 99b3e000.
1725 12:17:00.405459 ACPI: * FACS
1726 12:17:00.405546 ACPI: * DSDT
1727 12:17:00.409483 Ramoops buffer: 0x100000@0x99a3d000.
1728 12:17:00.415215 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1729 12:17:00.418555 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1730 12:17:00.422510 Google Chrome EC: version:
1731 12:17:00.425499 ro: helios_v2.0.2659-56403530b
1732 12:17:00.428961 rw: helios_v2.0.2849-c41de27e7d
1733 12:17:00.432130 running image: 1
1734 12:17:00.435404 ACPI: * FADT
1735 12:17:00.435491 SCI is IRQ9
1736 12:17:00.438794 ACPI: added table 1/32, length now 40
1737 12:17:00.441816 ACPI: * SSDT
1738 12:17:00.445373 Found 1 CPU(s) with 8 core(s) each.
1739 12:17:00.448851 Error: Could not locate 'wifi_sar' in VPD.
1740 12:17:00.451869 Checking CBFS for default SAR values
1741 12:17:00.458628 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1742 12:17:00.461888 CBFS @ c08000 size 3f8000
1743 12:17:00.468633 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1744 12:17:00.471706 CBFS: Locating 'wifi_sar_defaults.hex'
1745 12:17:00.474982 CBFS: Found @ offset 5fac0 size 77
1746 12:17:00.478213 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1747 12:17:00.481409 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1748 12:17:00.488160 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1749 12:17:00.494609 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1750 12:17:00.498313 failed to find key in VPD: dsm_calib_r0_0
1751 12:17:00.505012 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1752 12:17:00.507993
1753 12:17:00.511585 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1754 12:17:00.514669 failed to find key in VPD: dsm_calib_r0_1
1755 12:17:00.524624 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1756 12:17:00.531158 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1757 12:17:00.534652 failed to find key in VPD: dsm_calib_r0_2
1758 12:17:00.544562 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1759 12:17:00.547789 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1760 12:17:00.554501 failed to find key in VPD: dsm_calib_r0_3
1761 12:17:00.560811 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1762 12:17:00.567555 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1763 12:17:00.570642 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1764 12:17:00.574198 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1765 12:17:00.577861 EC returned error result code 1
1766 12:17:00.581999 EC returned error result code 1
1767 12:17:00.585801 EC returned error result code 1
1768 12:17:00.591897 PS2K: Bad resp from EC. Vivaldi disabled!
1769 12:17:00.596084 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1770 12:17:00.601915 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1771 12:17:00.608616 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1772 12:17:00.612013 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1773 12:17:00.618540 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1774 12:17:00.625220 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1775 12:17:00.631801 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1776 12:17:00.635465 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1777 12:17:00.638537 ACPI: added table 2/32, length now 44
1778 12:17:00.641560
1779 12:17:00.641648 ACPI: * MCFG
1780 12:17:00.645710 ACPI: added table 3/32, length now 48
1781 12:17:00.648624 ACPI: * TPM2
1782 12:17:00.651705 TPM2 log created at 99a2d000
1783 12:17:00.655459 ACPI: added table 4/32, length now 52
1784 12:17:00.655547 ACPI: * MADT
1785 12:17:00.658264 SCI is IRQ9
1786 12:17:00.661848 ACPI: added table 5/32, length now 56
1787 12:17:00.661936 current = 99b43ac0
1788 12:17:00.664811 ACPI: * DMAR
1789 12:17:00.668108 ACPI: added table 6/32, length now 60
1790 12:17:00.671503 ACPI: * IGD OpRegion
1791 12:17:00.671590 GMA: Found VBT in CBFS
1792 12:17:00.674707 GMA: Found valid VBT in CBFS
1793 12:17:00.678020 ACPI: added table 7/32, length now 64
1794 12:17:00.681312 ACPI: * HPET
1795 12:17:00.684559 ACPI: added table 8/32, length now 68
1796 12:17:00.684646 ACPI: done.
1797 12:17:00.688224 ACPI tables: 31744 bytes.
1798 12:17:00.691678 smbios_write_tables: 99a2c000
1799 12:17:00.695001 EC returned error result code 3
1800 12:17:00.698324 Couldn't obtain OEM name from CBI
1801 12:17:00.701763 Create SMBIOS type 17
1802 12:17:00.705060 PCI: 00:00.0 (Intel Cannonlake)
1803 12:17:00.708718 PCI: 00:14.3 (Intel WiFi)
1804 12:17:00.711518 SMBIOS tables: 939 bytes.
1805 12:17:00.714927 Writing table forward entry at 0x00000500
1806 12:17:00.721342 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1807 12:17:00.725271 Writing coreboot table at 0x99b62000
1808 12:17:00.731719 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1809 12:17:00.734826 1. 0000000000001000-000000000009ffff: RAM
1810 12:17:00.738141 2. 00000000000a0000-00000000000fffff: RESERVED
1811 12:17:00.744777 3. 0000000000100000-0000000099a2bfff: RAM
1812 12:17:00.747833 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1813 12:17:00.754514 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1814 12:17:00.761594 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1815 12:17:00.764873 7. 000000009a000000-000000009f7fffff: RESERVED
1816 12:17:00.771358 8. 00000000e0000000-00000000efffffff: RESERVED
1817 12:17:00.774440 9. 00000000fc000000-00000000fc000fff: RESERVED
1818 12:17:00.777692 10. 00000000fe000000-00000000fe00ffff: RESERVED
1819 12:17:00.784256 11. 00000000fed10000-00000000fed17fff: RESERVED
1820 12:17:00.787431 12. 00000000fed80000-00000000fed83fff: RESERVED
1821 12:17:00.794747 13. 00000000fed90000-00000000fed91fff: RESERVED
1822 12:17:00.797936 14. 00000000feda0000-00000000feda1fff: RESERVED
1823 12:17:00.801006 15. 0000000100000000-000000045e7fffff: RAM
1824 12:17:00.804331
1825 12:17:00.807398 Graphics framebuffer located at 0xc0000000
1826 12:17:00.810775 Passing 5 GPIOs to payload:
1827 12:17:00.814403 NAME | PORT | POLARITY | VALUE
1828 12:17:00.820850 write protect | undefined | high | low
1829 12:17:00.824588 lid | undefined | high | high
1830 12:17:00.830942 power | undefined | high | low
1831 12:17:00.837240 oprom | undefined | high | low
1832 12:17:00.840663 EC in RW | 0x000000cb | high | low
1833 12:17:00.844197 Board ID: 4
1834 12:17:00.847213 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1835 12:17:00.850657 CBFS @ c08000 size 3f8000
1836 12:17:00.857150 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1837 12:17:00.860458 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1838 12:17:00.863944 coreboot table: 1492 bytes.
1839 12:17:00.867561 IMD ROOT 0. 99fff000 00001000
1840 12:17:00.870548 IMD SMALL 1. 99ffe000 00001000
1841 12:17:00.873918 FSP MEMORY 2. 99c4e000 003b0000
1842 12:17:00.877163 CONSOLE 3. 99c2e000 00020000
1843 12:17:00.880658 FMAP 4. 99c2d000 0000054e
1844 12:17:00.883989 TIME STAMP 5. 99c2c000 00000910
1845 12:17:00.887102 VBOOT WORK 6. 99c18000 00014000
1846 12:17:00.890591 MRC DATA 7. 99c16000 00001958
1847 12:17:00.894078 ROMSTG STCK 8. 99c15000 00001000
1848 12:17:00.897049 AFTER CAR 9. 99c0b000 0000a000
1849 12:17:00.900286 RAMSTAGE 10. 99baf000 0005c000
1850 12:17:00.904375 REFCODE 11. 99b7a000 00035000
1851 12:17:00.906943 SMM BACKUP 12. 99b6a000 00010000
1852 12:17:00.910311 COREBOOT 13. 99b62000 00008000
1853 12:17:00.913954 ACPI 14. 99b3e000 00024000
1854 12:17:00.917091 ACPI GNVS 15. 99b3d000 00001000
1855 12:17:00.920303 RAMOOPS 16. 99a3d000 00100000
1856 12:17:00.923719 TPM2 TCGLOG17. 99a2d000 00010000
1857 12:17:00.926785 SMBIOS 18. 99a2c000 00000800
1858 12:17:00.930015 IMD small region:
1859 12:17:00.933560 IMD ROOT 0. 99ffec00 00000400
1860 12:17:00.936850 FSP RUNTIME 1. 99ffebe0 00000004
1861 12:17:00.940024 EC HOSTEVENT 2. 99ffebc0 00000008
1862 12:17:00.943682 POWER STATE 3. 99ffeb80 00000040
1863 12:17:00.946962 ROMSTAGE 4. 99ffeb60 00000004
1864 12:17:00.950399 MEM INFO 5. 99ffe9a0 000001b9
1865 12:17:00.953669 VPD 6. 99ffe920 0000006c
1866 12:17:00.956946 MTRR: Physical address space:
1867 12:17:00.963240 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1868 12:17:00.970000 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1869 12:17:00.976724 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1870 12:17:00.983590 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1871 12:17:00.989946 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1872 12:17:00.996619 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1873 12:17:00.999869 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1874 12:17:01.006285 MTRR: Fixed MSR 0x250 0x0606060606060606
1875 12:17:01.009743 MTRR: Fixed MSR 0x258 0x0606060606060606
1876 12:17:01.013179 MTRR: Fixed MSR 0x259 0x0000000000000000
1877 12:17:01.016282 MTRR: Fixed MSR 0x268 0x0606060606060606
1878 12:17:01.023367 MTRR: Fixed MSR 0x269 0x0606060606060606
1879 12:17:01.026136 MTRR: Fixed MSR 0x26a 0x0606060606060606
1880 12:17:01.029737 MTRR: Fixed MSR 0x26b 0x0606060606060606
1881 12:17:01.032838 MTRR: Fixed MSR 0x26c 0x0606060606060606
1882 12:17:01.039638 MTRR: Fixed MSR 0x26d 0x0606060606060606
1883 12:17:01.042699 MTRR: Fixed MSR 0x26e 0x0606060606060606
1884 12:17:01.046328 MTRR: Fixed MSR 0x26f 0x0606060606060606
1885 12:17:01.049318 call enable_fixed_mtrr()
1886 12:17:01.052532 CPU physical address size: 39 bits
1887 12:17:01.055920 MTRR: default type WB/UC MTRR counts: 6/8.
1888 12:17:01.059289 MTRR: WB selected as default type.
1889 12:17:01.062631
1890 12:17:01.065879 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1891 12:17:01.072571 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1892 12:17:01.079136 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1893 12:17:01.085677 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1894 12:17:01.092278 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1895 12:17:01.098764 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1896 12:17:01.102061 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 12:17:01.108747 MTRR: Fixed MSR 0x258 0x0606060606060606
1898 12:17:01.112237 MTRR: Fixed MSR 0x259 0x0000000000000000
1899 12:17:01.115678 MTRR: Fixed MSR 0x268 0x0606060606060606
1900 12:17:01.118969 MTRR: Fixed MSR 0x269 0x0606060606060606
1901 12:17:01.122326 MTRR: Fixed MSR 0x26a 0x0606060606060606
1902 12:17:01.125561
1903 12:17:01.128911 MTRR: Fixed MSR 0x26b 0x0606060606060606
1904 12:17:01.132205 MTRR: Fixed MSR 0x26c 0x0606060606060606
1905 12:17:01.135601 MTRR: Fixed MSR 0x26d 0x0606060606060606
1906 12:17:01.138743 MTRR: Fixed MSR 0x26e 0x0606060606060606
1907 12:17:01.145220 MTRR: Fixed MSR 0x26f 0x0606060606060606
1908 12:17:01.145307
1909 12:17:01.145391 MTRR check
1910 12:17:01.148717 Fixed MTRRs : Enabled
1911 12:17:01.152265 Variable MTRRs: Enabled
1912 12:17:01.152387
1913 12:17:01.155245 call enable_fixed_mtrr()
1914 12:17:01.158294 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1915 12:17:01.161917 CPU physical address size: 39 bits
1916 12:17:01.168002 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1917 12:17:01.171978 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 12:17:01.174793 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 12:17:01.181348 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 12:17:01.184807 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 12:17:01.187900 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 12:17:01.191453 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 12:17:01.194734 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 12:17:01.197799
1925 12:17:01.201404 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 12:17:01.204796 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 12:17:01.207908 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 12:17:01.211128 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 12:17:01.217955 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 12:17:01.221223 call enable_fixed_mtrr()
1931 12:17:01.224505 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 12:17:01.227938 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 12:17:01.230651 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 12:17:01.237876 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 12:17:01.241061 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 12:17:01.243931 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 12:17:01.247635 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 12:17:01.250672 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 12:17:01.254293
1940 12:17:01.257120 MTRR: Fixed MSR 0x26e 0x0606060606060606
1941 12:17:01.260563 MTRR: Fixed MSR 0x26f 0x0606060606060606
1942 12:17:01.264109 CPU physical address size: 39 bits
1943 12:17:01.267439 call enable_fixed_mtrr()
1944 12:17:01.270429 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 12:17:01.273810 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 12:17:01.280557 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 12:17:01.283662 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 12:17:01.286938 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 12:17:01.290732 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 12:17:01.296951 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 12:17:01.300664 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 12:17:01.303456 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 12:17:01.306744 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 12:17:01.313384 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 12:17:01.316691 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 12:17:01.320413 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 12:17:01.323324 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 12:17:01.329972 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 12:17:01.333095 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 12:17:01.337103 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 12:17:01.340106 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 12:17:01.346277 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 12:17:01.349600 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 12:17:01.353088 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 12:17:01.356175 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 12:17:01.359750 call enable_fixed_mtrr()
1967 12:17:01.363440 call enable_fixed_mtrr()
1968 12:17:01.366700 CPU physical address size: 39 bits
1969 12:17:01.369902 CPU physical address size: 39 bits
1970 12:17:01.373224 CBFS @ c08000 size 3f8000
1971 12:17:01.379882 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1972 12:17:01.383089 CBFS: Locating 'fallback/payload'
1973 12:17:01.386448 CPU physical address size: 39 bits
1974 12:17:01.390168 CBFS: Found @ offset 1c96c0 size 3f798
1975 12:17:01.393377 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 12:17:01.396722 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 12:17:01.402975 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 12:17:01.406680 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 12:17:01.409570 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 12:17:01.412854 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 12:17:01.416327 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 12:17:01.422751 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 12:17:01.426185 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 12:17:01.429295 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 12:17:01.432637 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 12:17:01.439505 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 12:17:01.442667 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 12:17:01.445813 call enable_fixed_mtrr()
1989 12:17:01.449108 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 12:17:01.452526 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 12:17:01.455890 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 12:17:01.458868
1993 12:17:01.462312 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 12:17:01.465755 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 12:17:01.469065 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 12:17:01.472247 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 12:17:01.479186 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 12:17:01.482091 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 12:17:01.485555 CPU physical address size: 39 bits
2000 12:17:01.488908 call enable_fixed_mtrr()
2001 12:17:01.492074 Checking segment from ROM address 0xffdd16f8
2002 12:17:01.495643 CPU physical address size: 39 bits
2003 12:17:01.502476 Checking segment from ROM address 0xffdd1714
2004 12:17:01.505524 Loading segment from ROM address 0xffdd16f8
2005 12:17:01.508657 code (compression=0)
2006 12:17:01.515698 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2007 12:17:01.525661 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2008 12:17:01.525746 it's not compressed!
2009 12:17:01.528281
2010 12:17:01.619553 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2011 12:17:01.625944 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2012 12:17:01.629483 Loading segment from ROM address 0xffdd1714
2013 12:17:01.632560 Entry Point 0x30000000
2014 12:17:01.635665 Loaded segments
2015 12:17:01.641335 Finalizing chipset.
2016 12:17:01.644613 Finalizing SMM.
2017 12:17:01.647945 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2018 12:17:01.651065 mp_park_aps done after 0 msecs.
2019 12:17:01.658092 Jumping to boot code at 30000000(99b62000)
2020 12:17:01.664661 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2021 12:17:01.664745
2022 12:17:01.664811
2023 12:17:01.664874
2024 12:17:01.667940 Starting depthcharge on Helios...
2025 12:17:01.668022
2026 12:17:01.668424 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2027 12:17:01.668525 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2028 12:17:01.668622 Setting prompt string to ['hatch:']
2029 12:17:01.668702 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2030 12:17:01.677843 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2031 12:17:01.677927
2032 12:17:01.684360 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2033 12:17:01.684457
2034 12:17:01.691325 board_setup: Info: eMMC controller not present; skipping
2035 12:17:01.691408
2036 12:17:01.694335 New NVMe Controller 0x30053ac0 @ 00:1d:00
2037 12:17:01.694418
2038 12:17:01.700863 board_setup: Info: SDHCI controller not present; skipping
2039 12:17:01.700945
2040 12:17:01.707327 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2041 12:17:01.707443
2042 12:17:01.707513 Wipe memory regions:
2043 12:17:01.707575
2044 12:17:01.710590 [0x00000000001000, 0x000000000a0000)
2045 12:17:01.710678
2046 12:17:01.713920 [0x00000000100000, 0x00000030000000)
2047 12:17:01.714005
2048 12:17:01.783166 [0x00000030657430, 0x00000099a2c000)
2049 12:17:01.783326
2050 12:17:01.924435 [0x00000100000000, 0x0000045e800000)
2051 12:17:01.924589
2052 12:17:03.306842 R8152: Initializing
2053 12:17:03.307002
2054 12:17:03.309843 Version 9 (ocp_data = 6010)
2055 12:17:03.309928
2056 12:17:03.314276 R8152: Done initializing
2057 12:17:03.314359
2058 12:17:03.317690 Adding net device
2059 12:17:03.317773
2060 12:17:03.927587 R8152: Initializing
2061 12:17:03.927821
2062 12:17:03.930394 Version 6 (ocp_data = 5c30)
2063 12:17:03.930580
2064 12:17:03.933966 R8152: Done initializing
2065 12:17:03.934048
2066 12:17:03.936889 net_add_device: Attemp to include the same device
2067 12:17:03.940567
2068 12:17:03.947340 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2069 12:17:03.947513
2070 12:17:03.947595
2071 12:17:03.947670
2072 12:17:03.947973 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2074 12:17:04.048973 hatch: tftpboot 192.168.201.1 8948110/tftp-deploy-29cu4n3f/kernel/bzImage 8948110/tftp-deploy-29cu4n3f/kernel/cmdline 8948110/tftp-deploy-29cu4n3f/ramdisk/ramdisk.cpio.gz
2075 12:17:04.049589 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2076 12:17:04.050001 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2077 12:17:04.054311 tftpboot 192.168.201.1 8948110/tftp-deploy-29cu4n3f/kernel/bzImoy-29cu4n3f/kernel/cmdline 8948110/tftp-deploy-29cu4n3f/ramdisk/ramdisk.cpio.gz
2078 12:17:04.054697
2079 12:17:04.054987 Waiting for link
2080 12:17:04.055256
2081 12:17:04.255315 done.
2082 12:17:04.255861
2083 12:17:04.256211 MAC: 00:24:32:50:1a:5f
2084 12:17:04.256700
2085 12:17:04.258643 Sending DHCP discover... done.
2086 12:17:04.259099
2087 12:17:04.261841 Waiting for reply... done.
2088 12:17:04.262300
2089 12:17:04.265327 Sending DHCP request... done.
2090 12:17:04.265764
2091 12:17:04.268521 Waiting for reply... done.
2092 12:17:04.268959
2093 12:17:04.271851 My ip is 192.168.201.21
2094 12:17:04.272416
2095 12:17:04.274787 The DHCP server ip is 192.168.201.1
2096 12:17:04.275187
2097 12:17:04.278395 TFTP server IP predefined by user: 192.168.201.1
2098 12:17:04.278740
2099 12:17:04.285184 Bootfile predefined by user: 8948110/tftp-deploy-29cu4n3f/kernel/bzImage
2100 12:17:04.285684
2101 12:17:04.288357 Sending tftp read request... done.
2102 12:17:04.288806
2103 12:17:04.296220 Waiting for the transfer...
2104 12:17:04.296756
2105 12:17:04.964118 00000000 ################################################################
2106 12:17:04.964272
2107 12:17:05.621967 00080000 ################################################################
2108 12:17:05.622483
2109 12:17:06.279148 00100000 ################################################################
2110 12:17:06.279658
2111 12:17:06.924761 00180000 ################################################################
2112 12:17:06.925074
2113 12:17:07.568378 00200000 ################################################################
2114 12:17:07.569003
2115 12:17:08.268277 00280000 ################################################################
2116 12:17:08.268830
2117 12:17:08.982835 00300000 ################################################################
2118 12:17:08.983400
2119 12:17:09.704650 00380000 ################################################################
2120 12:17:09.705201
2121 12:17:10.373131 00400000 ################################################################
2122 12:17:10.373644
2123 12:17:11.072866 00480000 ################################################################
2124 12:17:11.073448
2125 12:17:11.758297 00500000 ################################################################
2126 12:17:11.758864
2127 12:17:12.461920 00580000 ################################################################
2128 12:17:12.462482
2129 12:17:13.145346 00600000 ################################################################
2130 12:17:13.145949
2131 12:17:13.837244 00680000 ################################################################
2132 12:17:13.837385
2133 12:17:14.085515 00700000 ############################ done.
2134 12:17:14.085655
2135 12:17:14.088865 The bootfile was 7569296 bytes long.
2136 12:17:14.088966
2137 12:17:14.092335 Sending tftp read request... done.
2138 12:17:14.092423
2139 12:17:14.095472 Waiting for the transfer...
2140 12:17:14.095556
2141 12:17:14.610321 00000000 ################################################################
2142 12:17:14.610460
2143 12:17:15.109434 00080000 ################################################################
2144 12:17:15.109570
2145 12:17:15.614098 00100000 ################################################################
2146 12:17:15.614241
2147 12:17:16.117043 00180000 ################################################################
2148 12:17:16.117182
2149 12:17:16.623227 00200000 ################################################################
2150 12:17:16.623363
2151 12:17:17.131058 00280000 ################################################################
2152 12:17:17.131198
2153 12:17:17.636053 00300000 ################################################################
2154 12:17:17.636194
2155 12:17:18.133817 00380000 ################################################################
2156 12:17:18.133955
2157 12:17:18.636114 00400000 ################################################################
2158 12:17:18.636254
2159 12:17:19.148699 00480000 ################################################################
2160 12:17:19.148840
2161 12:17:19.670558 00500000 ################################################################
2162 12:17:19.670721
2163 12:17:20.192137 00580000 ################################################################
2164 12:17:20.192297
2165 12:17:20.706514 00600000 ################################################################
2166 12:17:20.706655
2167 12:17:21.217122 00680000 ################################################################
2168 12:17:21.217266
2169 12:17:21.729228 00700000 ################################################################
2170 12:17:21.729363
2171 12:17:22.235103 00780000 ################################################################
2172 12:17:22.235244
2173 12:17:22.400225 00800000 ##################### done.
2174 12:17:22.400407
2175 12:17:22.403777 Sending tftp read request... done.
2176 12:17:22.403857
2177 12:17:22.407078 Waiting for the transfer...
2178 12:17:22.407166
2179 12:17:22.407236 00000000 # done.
2180 12:17:22.407301
2181 12:17:22.416828 Command line loaded dynamically from TFTP file: 8948110/tftp-deploy-29cu4n3f/kernel/cmdline
2182 12:17:22.416910
2183 12:17:22.433509 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2184 12:17:22.433600
2185 12:17:22.439889 ec_init(0): CrosEC protocol v3 supported (256, 256)
2186 12:17:22.439970
2187 12:17:22.447555 Shutting down all USB controllers.
2188 12:17:22.447645
2189 12:17:22.447713 Removing current net device
2190 12:17:22.447778
2191 12:17:22.455211 Finalizing coreboot
2192 12:17:22.455291
2193 12:17:22.461936 Exiting depthcharge with code 4 at timestamp: 28139331
2194 12:17:22.462020
2195 12:17:22.462127
2196 12:17:22.462189 Starting kernel ...
2197 12:17:22.462250
2198 12:17:22.462309
2199 12:17:22.462715 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2200 12:17:22.462812 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2201 12:17:22.462892 Setting prompt string to ['Linux version [0-9]']
2202 12:17:22.462973 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2203 12:17:22.463046 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2204 12:17:22.464658
2205 12:17:22.464737
2207 12:21:42.463772 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2209 12:21:42.464979 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2211 12:21:42.465862 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2214 12:21:42.467403 end: 2 depthcharge-action (duration 00:05:00) [common]
2216 12:21:42.468653 Cleaning after the job
2217 12:21:42.468880 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948110/tftp-deploy-29cu4n3f/ramdisk
2218 12:21:42.469522 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948110/tftp-deploy-29cu4n3f/kernel
2219 12:21:42.470057 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948110/tftp-deploy-29cu4n3f/modules
2220 12:21:42.470239 start: 5.1 power-off (timeout 00:00:30) [common]
2221 12:21:42.470386 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2222 12:21:42.489351 >> Command sent successfully.
2223 12:21:42.491103 Returned 0 in 0 seconds
2224 12:21:42.592452 end: 5.1 power-off (duration 00:00:00) [common]
2226 12:21:42.594025 start: 5.2 read-feedback (timeout 00:10:00) [common]
2227 12:21:42.595358 Listened to connection for namespace 'common' for up to 1s
2228 12:21:43.574940 Listened to connection for namespace 'common' for up to 1s
2229 12:21:43.577831 Listened to connection for namespace 'common' for up to 1s
2230 12:21:43.581031 Listened to connection for namespace 'common' for up to 1s
2231 12:21:43.584390 Listened to connection for namespace 'common' for up to 1s
2232 12:21:43.587781 Listened to connection for namespace 'common' for up to 1s
2233 12:21:43.591249 Listened to connection for namespace 'common' for up to 1s
2234 12:21:43.594628 Listened to connection for namespace 'common' for up to 1s
2235 12:21:43.595370 Finalising connection for namespace 'common'
2236 12:21:43.595922 Disconnecting from shell: Finalise
2237 12:21:43.596395
2238 12:21:43.697824 end: 5.2 read-feedback (duration 00:00:01) [common]
2239 12:21:43.698478 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8948110
2240 12:21:43.724254 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8948110
2241 12:21:43.724956 JobError: Your job cannot terminate cleanly.