Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:16:58.802091 lava-dispatcher, installed at version: 2022.11
2 12:16:58.802267 start: 0 validate
3 12:16:58.802395 Start time: 2023-01-31 12:16:58.802388+00:00 (UTC)
4 12:16:58.802524 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:16:58.802652 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230127.0%2Fx86%2Frootfs.cpio.gz exists
6 12:16:59.104796 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:16:59.105280 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:16:59.110686 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:16:59.111315 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:16:59.122647 validate duration: 0.32
12 12:16:59.123742 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:16:59.124253 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:16:59.124778 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:16:59.125306 Not decompressing ramdisk as can be used compressed.
16 12:16:59.126136 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230127.0/x86/rootfs.cpio.gz
17 12:16:59.126467 saving as /var/lib/lava/dispatcher/tmp/8948147/tftp-deploy-n34ibt1_/ramdisk/rootfs.cpio.gz
18 12:16:59.126770 total size: 8423634 (8MB)
19 12:16:59.132356 progress 0% (0MB)
20 12:16:59.141553 progress 5% (0MB)
21 12:16:59.147806 progress 10% (0MB)
22 12:16:59.152818 progress 15% (1MB)
23 12:16:59.156930 progress 20% (1MB)
24 12:16:59.160549 progress 25% (2MB)
25 12:16:59.163713 progress 30% (2MB)
26 12:16:59.166569 progress 35% (2MB)
27 12:16:59.169343 progress 40% (3MB)
28 12:16:59.171917 progress 45% (3MB)
29 12:16:59.174377 progress 50% (4MB)
30 12:16:59.176693 progress 55% (4MB)
31 12:16:59.178890 progress 60% (4MB)
32 12:16:59.180960 progress 65% (5MB)
33 12:16:59.182983 progress 70% (5MB)
34 12:16:59.185529 progress 75% (6MB)
35 12:16:59.188924 progress 80% (6MB)
36 12:16:59.192625 progress 85% (6MB)
37 12:16:59.196255 progress 90% (7MB)
38 12:16:59.199903 progress 95% (7MB)
39 12:16:59.203333 progress 100% (8MB)
40 12:16:59.203504 8MB downloaded in 0.08s (104.69MB/s)
41 12:16:59.203657 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:16:59.203939 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:16:59.204027 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:16:59.204113 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:16:59.204218 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:16:59.204285 saving as /var/lib/lava/dispatcher/tmp/8948147/tftp-deploy-n34ibt1_/kernel/bzImage
48 12:16:59.204406 total size: 7569296 (7MB)
49 12:16:59.204467 No compression specified
50 12:16:59.206439 progress 0% (0MB)
51 12:16:59.209651 progress 5% (0MB)
52 12:16:59.213117 progress 10% (0MB)
53 12:16:59.216022 progress 15% (1MB)
54 12:16:59.219250 progress 20% (1MB)
55 12:16:59.222351 progress 25% (1MB)
56 12:16:59.225803 progress 30% (2MB)
57 12:16:59.228853 progress 35% (2MB)
58 12:16:59.232089 progress 40% (2MB)
59 12:16:59.235215 progress 45% (3MB)
60 12:16:59.238454 progress 50% (3MB)
61 12:16:59.241876 progress 55% (4MB)
62 12:16:59.244978 progress 60% (4MB)
63 12:16:59.248229 progress 65% (4MB)
64 12:16:59.251449 progress 70% (5MB)
65 12:16:59.254739 progress 75% (5MB)
66 12:16:59.257813 progress 80% (5MB)
67 12:16:59.261080 progress 85% (6MB)
68 12:16:59.264172 progress 90% (6MB)
69 12:16:59.267872 progress 95% (6MB)
70 12:16:59.270908 progress 100% (7MB)
71 12:16:59.271224 7MB downloaded in 0.07s (108.04MB/s)
72 12:16:59.271407 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:16:59.271695 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:16:59.271818 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:16:59.271908 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:16:59.272045 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:16:59.272143 saving as /var/lib/lava/dispatcher/tmp/8948147/tftp-deploy-n34ibt1_/modules/modules.tar
79 12:16:59.272207 total size: 51860 (0MB)
80 12:16:59.272269 Using unxz to decompress xz
81 12:16:59.276768 progress 63% (0MB)
82 12:16:59.277140 progress 100% (0MB)
83 12:16:59.280398 0MB downloaded in 0.01s (6.05MB/s)
84 12:16:59.280620 end: 1.3.1 http-download (duration 00:00:00) [common]
86 12:16:59.280881 end: 1.3 download-retry (duration 00:00:00) [common]
87 12:16:59.280982 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 12:16:59.281082 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 12:16:59.281168 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 12:16:59.281260 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 12:16:59.281426 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu
92 12:16:59.281535 makedir: /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin
93 12:16:59.281619 makedir: /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/tests
94 12:16:59.281700 makedir: /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/results
95 12:16:59.281804 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-add-keys
96 12:16:59.281930 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-add-sources
97 12:16:59.282045 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-background-process-start
98 12:16:59.282157 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-background-process-stop
99 12:16:59.282268 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-common-functions
100 12:16:59.282379 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-echo-ipv4
101 12:16:59.282490 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-install-packages
102 12:16:59.282610 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-installed-packages
103 12:16:59.282721 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-os-build
104 12:16:59.282829 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-probe-channel
105 12:16:59.282939 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-probe-ip
106 12:16:59.283047 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-target-ip
107 12:16:59.283155 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-target-mac
108 12:16:59.283261 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-target-storage
109 12:16:59.283372 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-test-case
110 12:16:59.283480 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-test-event
111 12:16:59.283589 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-test-feedback
112 12:16:59.283697 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-test-raise
113 12:16:59.283808 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-test-reference
114 12:16:59.283916 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-test-runner
115 12:16:59.284024 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-test-set
116 12:16:59.284132 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-test-shell
117 12:16:59.284242 Updating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-install-packages (oe)
118 12:16:59.284397 Updating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/bin/lava-installed-packages (oe)
119 12:16:59.284499 Creating /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/environment
120 12:16:59.284587 LAVA metadata
121 12:16:59.284657 - LAVA_JOB_ID=8948147
122 12:16:59.284725 - LAVA_DISPATCHER_IP=192.168.201.1
123 12:16:59.284824 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 12:16:59.284889 skipped lava-vland-overlay
125 12:16:59.284967 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 12:16:59.285052 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 12:16:59.285116 skipped lava-multinode-overlay
128 12:16:59.285193 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 12:16:59.285278 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 12:16:59.285354 Loading test definitions
131 12:16:59.285451 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 12:16:59.285527 Using /lava-8948147 at stage 0
133 12:16:59.285785 uuid=8948147_1.4.2.3.1 testdef=None
134 12:16:59.285875 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 12:16:59.285969 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 12:16:59.286458 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 12:16:59.286692 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 12:16:59.287261 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 12:16:59.287501 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 12:16:59.288039 runner path: /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/0/tests/0_dmesg test_uuid 8948147_1.4.2.3.1
143 12:16:59.288186 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 12:16:59.288465 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 12:16:59.288539 Using /lava-8948147 at stage 1
147 12:16:59.288782 uuid=8948147_1.4.2.3.5 testdef=None
148 12:16:59.288872 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 12:16:59.288959 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 12:16:59.289400 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 12:16:59.289625 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 12:16:59.290201 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 12:16:59.290440 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 12:16:59.290991 runner path: /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/1/tests/1_bootrr test_uuid 8948147_1.4.2.3.5
157 12:16:59.291134 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 12:16:59.291346 Creating lava-test-runner.conf files
160 12:16:59.291410 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/0 for stage 0
161 12:16:59.291493 - 0_dmesg
162 12:16:59.291568 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8948147/lava-overlay-ydlkfwbu/lava-8948147/1 for stage 1
163 12:16:59.291650 - 1_bootrr
164 12:16:59.291741 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 12:16:59.291827 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 12:16:59.297893 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 12:16:59.298001 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 12:16:59.298092 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 12:16:59.298181 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 12:16:59.298275 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 12:16:59.493255 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 12:16:59.493663 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 12:16:59.493813 extracting modules file /var/lib/lava/dispatcher/tmp/8948147/tftp-deploy-n34ibt1_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8948147/extract-overlay-ramdisk-h0anteda/ramdisk
174 12:16:59.499562 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 12:16:59.499730 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 12:16:59.499856 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8948147/compress-overlay-7fu3nrkp/overlay-1.4.2.4.tar.gz to ramdisk
177 12:16:59.499966 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8948147/compress-overlay-7fu3nrkp/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8948147/extract-overlay-ramdisk-h0anteda/ramdisk
178 12:16:59.505554 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 12:16:59.505722 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 12:16:59.505867 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 12:16:59.505994 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 12:16:59.506108 Building ramdisk /var/lib/lava/dispatcher/tmp/8948147/extract-overlay-ramdisk-h0anteda/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8948147/extract-overlay-ramdisk-h0anteda/ramdisk
183 12:16:59.572650 >> 48122 blocks
184 12:17:00.318781 rename /var/lib/lava/dispatcher/tmp/8948147/extract-overlay-ramdisk-h0anteda/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8948147/tftp-deploy-n34ibt1_/ramdisk/ramdisk.cpio.gz
185 12:17:00.319178 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 12:17:00.319301 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 12:17:00.319407 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 12:17:00.319501 No mkimage arch provided, not using FIT.
189 12:17:00.319592 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 12:17:00.319681 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 12:17:00.319779 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 12:17:00.319876 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 12:17:00.319956 No LXC device requested
194 12:17:00.320040 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 12:17:00.320129 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 12:17:00.320213 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 12:17:00.320284 Checking files for TFTP limit of 4294967296 bytes.
198 12:17:00.320707 end: 1 tftp-deploy (duration 00:00:01) [common]
199 12:17:00.320818 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 12:17:00.320918 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 12:17:00.321043 substitutions:
202 12:17:00.321115 - {DTB}: None
203 12:17:00.321185 - {INITRD}: 8948147/tftp-deploy-n34ibt1_/ramdisk/ramdisk.cpio.gz
204 12:17:00.321255 - {KERNEL}: 8948147/tftp-deploy-n34ibt1_/kernel/bzImage
205 12:17:00.321323 - {LAVA_MAC}: None
206 12:17:00.321391 - {PRESEED_CONFIG}: None
207 12:17:00.321458 - {PRESEED_LOCAL}: None
208 12:17:00.321525 - {RAMDISK}: 8948147/tftp-deploy-n34ibt1_/ramdisk/ramdisk.cpio.gz
209 12:17:00.321592 - {ROOT_PART}: None
210 12:17:00.321655 - {ROOT}: None
211 12:17:00.321715 - {SERVER_IP}: 192.168.201.1
212 12:17:00.321774 - {TEE}: None
213 12:17:00.321834 Parsed boot commands:
214 12:17:00.321891 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 12:17:00.322042 Parsed boot commands: tftpboot 192.168.201.1 8948147/tftp-deploy-n34ibt1_/kernel/bzImage 8948147/tftp-deploy-n34ibt1_/kernel/cmdline 8948147/tftp-deploy-n34ibt1_/ramdisk/ramdisk.cpio.gz
216 12:17:00.322139 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 12:17:00.322232 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 12:17:00.322327 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 12:17:00.322416 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 12:17:00.322496 Not connected, no need to disconnect.
221 12:17:00.322576 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 12:17:00.322663 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 12:17:00.322732 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
224 12:17:00.325456 Setting prompt string to ['lava-test: # ']
225 12:17:00.325752 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 12:17:00.325858 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 12:17:00.325964 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 12:17:00.326060 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 12:17:00.326458 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
230 12:17:00.345471 >> Command sent successfully.
231 12:17:00.347443 Returned 0 in 0 seconds
232 12:17:00.448203 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 12:17:00.448572 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 12:17:00.448679 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 12:17:00.448770 Setting prompt string to 'Starting depthcharge on Voema...'
237 12:17:00.448847 Changing prompt to 'Starting depthcharge on Voema...'
238 12:17:00.448919 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 12:17:00.449192 [Enter `^Ec?' for help]
240 12:17:08.595427
241 12:17:08.596078
242 12:17:08.605300 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 12:17:08.608703 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 12:17:08.615532 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 12:17:08.618684 CPU: AES supported, TXT NOT supported, VT supported
246 12:17:08.625105 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 12:17:08.628952 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 12:17:08.632168
249 12:17:08.635486 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
250 12:17:08.638856 VBOOT: Loading verstage.
251 12:17:08.642021 FMAP: Found "FLASH" version 1.1 at 0x1804000.
252 12:17:08.648826 FMAP: base = 0x0 size = 0x2000000 #areas = 32
253 12:17:08.651753 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
254 12:17:08.662191 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
255 12:17:08.669203 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
256 12:17:08.669671
257 12:17:08.670040
258 12:17:08.682243 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
259 12:17:08.696237 Probing TPM: . done!
260 12:17:08.699835 TPM ready after 0 ms
261 12:17:08.703153 Connected to device vid:did:rid of 1ae0:0028:00
262 12:17:08.714048 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
263 12:17:08.720801 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
264 12:17:08.723960 Initialized TPM device CR50 revision 0
265 12:17:08.812173 tlcl_send_startup: Startup return code is 0
266 12:17:08.812833 TPM: setup succeeded
267 12:17:08.827803 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 12:17:08.842433 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 12:17:08.854850 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
270 12:17:08.864708 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
271 12:17:08.868096 Chrome EC: UHEPI supported
272 12:17:08.872575 Phase 1
273 12:17:08.875254 FMAP: area GBB found @ 1805000 (458752 bytes)
274 12:17:08.885212 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 12:17:08.891906 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
276 12:17:08.898817 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
277 12:17:08.905669 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
278 12:17:08.908746 Recovery requested (1009000e)
279 12:17:08.911999 TPM: Extending digest for VBOOT: boot mode into PCR 0
280 12:17:08.923464 tlcl_extend: response is 0
281 12:17:08.930304 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
282 12:17:08.940168 tlcl_extend: response is 0
283 12:17:08.946614 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
284 12:17:08.953749 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
285 12:17:08.959912 BS: verstage times (exec / console): total (unknown) / 142 ms
286 12:17:08.960439
287 12:17:08.960851
288 12:17:08.973167 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
289 12:17:08.979801 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
290 12:17:08.982947 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
291 12:17:08.986187 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
292 12:17:08.993052 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
293 12:17:08.996537 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
294 12:17:09.000017 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
295 12:17:09.003197 TCO_STS: 0000 0000
296 12:17:09.006643 GEN_PMCON: d0015038 00002200
297 12:17:09.009514 GBLRST_CAUSE: 00000000 00000000
298 12:17:09.009972 HPR_CAUSE0: 00000000
299 12:17:09.013010 prev_sleep_state 5
300 12:17:09.016403 Boot Count incremented to 15313
301 12:17:09.023425 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 12:17:09.029771 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 12:17:09.036462 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 12:17:09.043129 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
305 12:17:09.047679 Chrome EC: UHEPI supported
306 12:17:09.059972 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
307 12:17:09.072732 Probing TPM: done!
308 12:17:09.079887 Connected to device vid:did:rid of 1ae0:0028:00
309 12:17:09.089757 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
310 12:17:09.093162 Initialized TPM device CR50 revision 0
311 12:17:09.107797 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
312 12:17:09.114323 MRC: Hash idx 0x100b comparison successful.
313 12:17:09.117802 MRC cache found, size faa8
314 12:17:09.118326 bootmode is set to: 2
315 12:17:09.121188 SPD index = 0
316 12:17:09.127938 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
317 12:17:09.130951 SPD: module type is LPDDR4X
318 12:17:09.134416 SPD: module part number is MT53E512M64D4NW-046
319 12:17:09.141241 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
320 12:17:09.144613 SPD: device width 16 bits, bus width 16 bits
321 12:17:09.151353 SPD: module size is 1024 MB (per channel)
322 12:17:09.582695 CBMEM:
323 12:17:09.586158 IMD: root @ 0x76fff000 254 entries.
324 12:17:09.588806 IMD: root @ 0x76ffec00 62 entries.
325 12:17:09.592335 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
326 12:17:09.598949 FMAP: area RW_VPD found @ f35000 (8192 bytes)
327 12:17:09.602492 External stage cache:
328 12:17:09.606001 IMD: root @ 0x7b3ff000 254 entries.
329 12:17:09.609233 IMD: root @ 0x7b3fec00 62 entries.
330 12:17:09.624275 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
331 12:17:09.631618 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
332 12:17:09.638551 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
333 12:17:09.651257 MRC: 'RECOVERY_MRC_CACHE' does not need update.
334 12:17:09.654689 cse_lite: Skip switching to RW in the recovery path
335 12:17:09.657990
336 12:17:09.658482 8 DIMMs found
337 12:17:09.658902 SMM Memory Map
338 12:17:09.661663 SMRAM : 0x7b000000 0x800000
339 12:17:09.664962 Subregion 0: 0x7b000000 0x200000
340 12:17:09.668140
341 12:17:09.671390 Subregion 1: 0x7b200000 0x200000
342 12:17:09.674589 Subregion 2: 0x7b400000 0x400000
343 12:17:09.675101 top_of_ram = 0x77000000
344 12:17:09.681243 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
345 12:17:09.688053 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
346 12:17:09.691704 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
347 12:17:09.698294 MTRR Range: Start=ff000000 End=0 (Size 1000000)
348 12:17:09.704897 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
349 12:17:09.711684 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
350 12:17:09.721107 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
351 12:17:09.724642 Processing 211 relocs. Offset value of 0x74c0b000
352 12:17:09.734439 BS: romstage times (exec / console): total (unknown) / 277 ms
353 12:17:09.740086
354 12:17:09.740634
355 12:17:09.750257 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
356 12:17:09.753731 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
357 12:17:09.763601 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
358 12:17:09.770122 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
359 12:17:09.777234 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
360 12:17:09.783841 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
361 12:17:09.830955 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
362 12:17:09.833989 Processing 5008 relocs. Offset value of 0x75d98000
363 12:17:09.840646 BS: postcar times (exec / console): total (unknown) / 59 ms
364 12:17:09.840745
365 12:17:09.840816
366 12:17:09.853897 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
367 12:17:09.853993 Normal boot
368 12:17:09.857302 FW_CONFIG value is 0x804c02
369 12:17:09.860798 PCI: 00:07.0 disabled by fw_config
370 12:17:09.864154 PCI: 00:07.1 disabled by fw_config
371 12:17:09.867278 PCI: 00:0d.2 disabled by fw_config
372 12:17:09.870642 PCI: 00:1c.7 disabled by fw_config
373 12:17:09.877209 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
374 12:17:09.884157 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
375 12:17:09.887441 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
376 12:17:09.890506 GENERIC: 0.0 disabled by fw_config
377 12:17:09.893794 GENERIC: 1.0 disabled by fw_config
378 12:17:09.900886 fw_config match found: DB_USB=USB3_ACTIVE
379 12:17:09.904052 fw_config match found: DB_USB=USB3_ACTIVE
380 12:17:09.907529 fw_config match found: DB_USB=USB3_ACTIVE
381 12:17:09.910297 fw_config match found: DB_USB=USB3_ACTIVE
382 12:17:09.917306 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
383 12:17:09.923995 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
384 12:17:09.930539 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
385 12:17:09.940893 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
386 12:17:09.943927 microcode: sig=0x806c1 pf=0x80 revision=0x86
387 12:17:09.947287 microcode: Update skipped, already up-to-date
388 12:17:09.953680 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
389 12:17:09.957014
390 12:17:09.983985 Detected 4 core, 8 thread CPU.
391 12:17:09.987432 Setting up SMI for CPU
392 12:17:09.990842 IED base = 0x7b400000
393 12:17:09.991327 IED size = 0x00400000
394 12:17:09.994320 Will perform SMM setup.
395 12:17:10.000620 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
396 12:17:10.007424 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
397 12:17:10.013875 Processing 16 relocs. Offset value of 0x00030000
398 12:17:10.017283 Attempting to start 7 APs
399 12:17:10.020880 Waiting for 10ms after sending INIT.
400 12:17:10.036046 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
401 12:17:10.036509 done.
402 12:17:10.039290 AP: slot 3 apic_id 7.
403 12:17:10.042678 AP: slot 7 apic_id 6.
404 12:17:10.043161 AP: slot 5 apic_id 4.
405 12:17:10.046184 AP: slot 4 apic_id 5.
406 12:17:10.049837 AP: slot 2 apic_id 3.
407 12:17:10.050385 AP: slot 6 apic_id 2.
408 12:17:10.056230 Waiting for 2nd SIPI to complete...done.
409 12:17:10.062769 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
410 12:17:10.069353 Processing 13 relocs. Offset value of 0x00038000
411 12:17:10.069873 Unable to locate Global NVS
412 12:17:10.079430 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
413 12:17:10.082415 Installing permanent SMM handler to 0x7b000000
414 12:17:10.092495 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
415 12:17:10.095932 Processing 794 relocs. Offset value of 0x7b010000
416 12:17:10.105903 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
417 12:17:10.108998 Processing 13 relocs. Offset value of 0x7b008000
418 12:17:10.115786 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
419 12:17:10.122272 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
420 12:17:10.125744 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
421 12:17:10.132099 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
422 12:17:10.139002 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
423 12:17:10.145769 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
424 12:17:10.152497 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
425 12:17:10.152949 Unable to locate Global NVS
426 12:17:10.162287 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
427 12:17:10.165583 Clearing SMI status registers
428 12:17:10.166107 SMI_STS: PM1
429 12:17:10.168871 PM1_STS: PWRBTN
430 12:17:10.175587 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
431 12:17:10.178947 In relocation handler: CPU 0
432 12:17:10.182137 New SMBASE=0x7b000000 IEDBASE=0x7b400000
433 12:17:10.188642 Writing SMRR. base = 0x7b000006, mask=0xff800c00
434 12:17:10.189090 Relocation complete.
435 12:17:10.198674 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
436 12:17:10.199154 In relocation handler: CPU 1
437 12:17:10.205597 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
438 12:17:10.206046 Relocation complete.
439 12:17:10.212186 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
440 12:17:10.215361
441 12:17:10.215806 In relocation handler: CPU 6
442 12:17:10.222262 New SMBASE=0x7affe800 IEDBASE=0x7b400000
443 12:17:10.225198 Writing SMRR. base = 0x7b000006, mask=0xff800c00
444 12:17:10.228747 Relocation complete.
445 12:17:10.235387 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
446 12:17:10.238694 In relocation handler: CPU 2
447 12:17:10.242435 New SMBASE=0x7afff800 IEDBASE=0x7b400000
448 12:17:10.245513 Relocation complete.
449 12:17:10.252019 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
450 12:17:10.255657 In relocation handler: CPU 7
451 12:17:10.258760 New SMBASE=0x7affe400 IEDBASE=0x7b400000
452 12:17:10.261971 Writing SMRR. base = 0x7b000006, mask=0xff800c00
453 12:17:10.265066 Relocation complete.
454 12:17:10.272087 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
455 12:17:10.275256 In relocation handler: CPU 3
456 12:17:10.278772 New SMBASE=0x7afff400 IEDBASE=0x7b400000
457 12:17:10.281763 Relocation complete.
458 12:17:10.288415 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
459 12:17:10.291703 In relocation handler: CPU 5
460 12:17:10.295202 New SMBASE=0x7affec00 IEDBASE=0x7b400000
461 12:17:10.302004 Writing SMRR. base = 0x7b000006, mask=0xff800c00
462 12:17:10.302461 Relocation complete.
463 12:17:10.309560 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
464 12:17:10.312798 In relocation handler: CPU 4
465 12:17:10.315990 New SMBASE=0x7afff000 IEDBASE=0x7b400000
466 12:17:10.320002 Relocation complete.
467 12:17:10.322989 Initializing CPU #0
468 12:17:10.326317 CPU: vendor Intel device 806c1
469 12:17:10.329395 CPU: family 06, model 8c, stepping 01
470 12:17:10.332448 Clearing out pending MCEs
471 12:17:10.335954 Setting up local APIC...
472 12:17:10.336428 apic_id: 0x00 done.
473 12:17:10.339294 Turbo is available but hidden
474 12:17:10.342705 Turbo is available and visible
475 12:17:10.346114 microcode: Update skipped, already up-to-date
476 12:17:10.349387 CPU #0 initialized
477 12:17:10.352796 Initializing CPU #6
478 12:17:10.353244 Initializing CPU #2
479 12:17:10.356184 CPU: vendor Intel device 806c1
480 12:17:10.359368 CPU: family 06, model 8c, stepping 01
481 12:17:10.362382 CPU: vendor Intel device 806c1
482 12:17:10.365716 CPU: family 06, model 8c, stepping 01
483 12:17:10.369077
484 12:17:10.369536 Clearing out pending MCEs
485 12:17:10.372405 Clearing out pending MCEs
486 12:17:10.375832 Setting up local APIC...
487 12:17:10.376278 Initializing CPU #5
488 12:17:10.379180 Initializing CPU #4
489 12:17:10.382314 CPU: vendor Intel device 806c1
490 12:17:10.385633 CPU: family 06, model 8c, stepping 01
491 12:17:10.389271 CPU: vendor Intel device 806c1
492 12:17:10.392791 CPU: family 06, model 8c, stepping 01
493 12:17:10.395960 Clearing out pending MCEs
494 12:17:10.399194 Clearing out pending MCEs
495 12:17:10.402564 Setting up local APIC...
496 12:17:10.403011 Initializing CPU #7
497 12:17:10.406149 Initializing CPU #3
498 12:17:10.409155 CPU: vendor Intel device 806c1
499 12:17:10.412256 CPU: family 06, model 8c, stepping 01
500 12:17:10.415702 CPU: vendor Intel device 806c1
501 12:17:10.418939 CPU: family 06, model 8c, stepping 01
502 12:17:10.422457 Clearing out pending MCEs
503 12:17:10.425821 Clearing out pending MCEs
504 12:17:10.426592 Setting up local APIC...
505 12:17:10.429164 apic_id: 0x02 done.
506 12:17:10.432480 apic_id: 0x04 done.
507 12:17:10.433158 Setting up local APIC...
508 12:17:10.435864 Initializing CPU #1
509 12:17:10.438881 apic_id: 0x06 done.
510 12:17:10.439406 Setting up local APIC...
511 12:17:10.445628 microcode: Update skipped, already up-to-date
512 12:17:10.446335 apic_id: 0x05 done.
513 12:17:10.449063 CPU #5 initialized
514 12:17:10.452438 microcode: Update skipped, already up-to-date
515 12:17:10.459197 microcode: Update skipped, already up-to-date
516 12:17:10.459964 apic_id: 0x07 done.
517 12:17:10.462241 CPU #7 initialized
518 12:17:10.465334 microcode: Update skipped, already up-to-date
519 12:17:10.472107 microcode: Update skipped, already up-to-date
520 12:17:10.475382 Setting up local APIC...
521 12:17:10.475847 CPU #4 initialized
522 12:17:10.478762 CPU #6 initialized
523 12:17:10.479186 apic_id: 0x03 done.
524 12:17:10.481820 CPU #3 initialized
525 12:17:10.485323 CPU: vendor Intel device 806c1
526 12:17:10.489038 CPU: family 06, model 8c, stepping 01
527 12:17:10.492124 Clearing out pending MCEs
528 12:17:10.495526 microcode: Update skipped, already up-to-date
529 12:17:10.498698 Setting up local APIC...
530 12:17:10.502164 CPU #2 initialized
531 12:17:10.502646 apic_id: 0x01 done.
532 12:17:10.508530 microcode: Update skipped, already up-to-date
533 12:17:10.508963 CPU #1 initialized
534 12:17:10.515707 bsp_do_flight_plan done after 455 msecs.
535 12:17:10.516186 CPU: frequency set to 4000 MHz
536 12:17:10.518931
537 12:17:10.519453 Enabling SMIs.
538 12:17:10.525014 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
539 12:17:10.540894 SATAXPCIE1 indicates PCIe NVMe is present
540 12:17:10.544515 Probing TPM: done!
541 12:17:10.547898 Connected to device vid:did:rid of 1ae0:0028:00
542 12:17:10.558597 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
543 12:17:10.561795 Initialized TPM device CR50 revision 0
544 12:17:10.565179 Enabling S0i3.4
545 12:17:10.572001 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
546 12:17:10.574951 Found a VBT of 8704 bytes after decompression
547 12:17:10.581468 cse_lite: CSE RO boot. HybridStorageMode disabled
548 12:17:10.588118 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
549 12:17:10.664279 FSPS returned 0
550 12:17:10.667706 Executing Phase 1 of FspMultiPhaseSiInit
551 12:17:10.677749 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
552 12:17:10.680810 port C0 DISC req: usage 1 usb3 1 usb2 5
553 12:17:10.683974 Raw Buffer output 0 00000511
554 12:17:10.687350 Raw Buffer output 1 00000000
555 12:17:10.691070 pmc_send_ipc_cmd succeeded
556 12:17:10.694889 port C1 DISC req: usage 1 usb3 2 usb2 3
557 12:17:10.697667
558 12:17:10.698156 Raw Buffer output 0 00000321
559 12:17:10.701423 Raw Buffer output 1 00000000
560 12:17:10.705311 pmc_send_ipc_cmd succeeded
561 12:17:10.710578 Detected 4 core, 8 thread CPU.
562 12:17:10.713802 Detected 4 core, 8 thread CPU.
563 12:17:10.947145 Display FSP Version Info HOB
564 12:17:10.950399 Reference Code - CPU = a.0.4c.31
565 12:17:10.954085 uCode Version = 0.0.0.86
566 12:17:10.957537 TXT ACM version = ff.ff.ff.ffff
567 12:17:10.960429 Reference Code - ME = a.0.4c.31
568 12:17:10.963475 MEBx version = 0.0.0.0
569 12:17:10.966873 ME Firmware Version = Consumer SKU
570 12:17:10.970388 Reference Code - PCH = a.0.4c.31
571 12:17:10.973690 PCH-CRID Status = Disabled
572 12:17:10.976881 PCH-CRID Original Value = ff.ff.ff.ffff
573 12:17:10.980574 PCH-CRID New Value = ff.ff.ff.ffff
574 12:17:10.984049 OPROM - RST - RAID = ff.ff.ff.ffff
575 12:17:10.987091 PCH Hsio Version = 4.0.0.0
576 12:17:10.990589 Reference Code - SA - System Agent = a.0.4c.31
577 12:17:10.994212 Reference Code - MRC = 2.0.0.1
578 12:17:10.996943 SA - PCIe Version = a.0.4c.31
579 12:17:11.000300 SA-CRID Status = Disabled
580 12:17:11.003841 SA-CRID Original Value = 0.0.0.1
581 12:17:11.006952 SA-CRID New Value = 0.0.0.1
582 12:17:11.010211 OPROM - VBIOS = ff.ff.ff.ffff
583 12:17:11.013631 IO Manageability Engine FW Version = 11.1.4.0
584 12:17:11.016962 PHY Build Version = 0.0.0.e0
585 12:17:11.020546 Thunderbolt(TM) FW Version = 0.0.0.0
586 12:17:11.026868 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
587 12:17:11.030265 ITSS IRQ Polarities Before:
588 12:17:11.030740 IPC0: 0xffffffff
589 12:17:11.033788 IPC1: 0xffffffff
590 12:17:11.034316 IPC2: 0xffffffff
591 12:17:11.037103 IPC3: 0xffffffff
592 12:17:11.040480 ITSS IRQ Polarities After:
593 12:17:11.040927 IPC0: 0xffffffff
594 12:17:11.043534 IPC1: 0xffffffff
595 12:17:11.044001 IPC2: 0xffffffff
596 12:17:11.047446 IPC3: 0xffffffff
597 12:17:11.050359 Found PCIe Root Port #9 at PCI: 00:1d.0.
598 12:17:11.064134 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
599 12:17:11.073490 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
600 12:17:11.086992 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
601 12:17:11.093369 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
602 12:17:11.093840 Enumerating buses...
603 12:17:11.100429 Show all devs... Before device enumeration.
604 12:17:11.101030 Root Device: enabled 1
605 12:17:11.103828 DOMAIN: 0000: enabled 1
606 12:17:11.107298 CPU_CLUSTER: 0: enabled 1
607 12:17:11.110180 PCI: 00:00.0: enabled 1
608 12:17:11.110694 PCI: 00:02.0: enabled 1
609 12:17:11.113740 PCI: 00:04.0: enabled 1
610 12:17:11.116862 PCI: 00:05.0: enabled 1
611 12:17:11.120121 PCI: 00:06.0: enabled 0
612 12:17:11.120668 PCI: 00:07.0: enabled 0
613 12:17:11.123546 PCI: 00:07.1: enabled 0
614 12:17:11.126803 PCI: 00:07.2: enabled 0
615 12:17:11.130147 PCI: 00:07.3: enabled 0
616 12:17:11.130614 PCI: 00:08.0: enabled 1
617 12:17:11.133355 PCI: 00:09.0: enabled 0
618 12:17:11.136959 PCI: 00:0a.0: enabled 0
619 12:17:11.137488 PCI: 00:0d.0: enabled 1
620 12:17:11.140409
621 12:17:11.140856 PCI: 00:0d.1: enabled 0
622 12:17:11.143447 PCI: 00:0d.2: enabled 0
623 12:17:11.146994 PCI: 00:0d.3: enabled 0
624 12:17:11.147522 PCI: 00:0e.0: enabled 0
625 12:17:11.150426 PCI: 00:10.2: enabled 1
626 12:17:11.153289 PCI: 00:10.6: enabled 0
627 12:17:11.156674 PCI: 00:10.7: enabled 0
628 12:17:11.157219 PCI: 00:12.0: enabled 0
629 12:17:11.160238 PCI: 00:12.6: enabled 0
630 12:17:11.163616 PCI: 00:13.0: enabled 0
631 12:17:11.166875 PCI: 00:14.0: enabled 1
632 12:17:11.167393 PCI: 00:14.1: enabled 0
633 12:17:11.169867 PCI: 00:14.2: enabled 1
634 12:17:11.173463 PCI: 00:14.3: enabled 1
635 12:17:11.173925 PCI: 00:15.0: enabled 1
636 12:17:11.176621
637 12:17:11.177111 PCI: 00:15.1: enabled 1
638 12:17:11.180301 PCI: 00:15.2: enabled 1
639 12:17:11.183415 PCI: 00:15.3: enabled 1
640 12:17:11.183900 PCI: 00:16.0: enabled 1
641 12:17:11.186757 PCI: 00:16.1: enabled 0
642 12:17:11.189959 PCI: 00:16.2: enabled 0
643 12:17:11.193430 PCI: 00:16.3: enabled 0
644 12:17:11.193869 PCI: 00:16.4: enabled 0
645 12:17:11.196805 PCI: 00:16.5: enabled 0
646 12:17:11.200222 PCI: 00:17.0: enabled 1
647 12:17:11.203352 PCI: 00:19.0: enabled 0
648 12:17:11.203927 PCI: 00:19.1: enabled 1
649 12:17:11.207022 PCI: 00:19.2: enabled 0
650 12:17:11.210154 PCI: 00:1c.0: enabled 1
651 12:17:11.210617 PCI: 00:1c.1: enabled 0
652 12:17:11.213596
653 12:17:11.214032 PCI: 00:1c.2: enabled 0
654 12:17:11.216795 PCI: 00:1c.3: enabled 0
655 12:17:11.220122 PCI: 00:1c.4: enabled 0
656 12:17:11.220610 PCI: 00:1c.5: enabled 0
657 12:17:11.223596 PCI: 00:1c.6: enabled 1
658 12:17:11.227058 PCI: 00:1c.7: enabled 0
659 12:17:11.229996 PCI: 00:1d.0: enabled 1
660 12:17:11.230433 PCI: 00:1d.1: enabled 0
661 12:17:11.233353 PCI: 00:1d.2: enabled 1
662 12:17:11.237072 PCI: 00:1d.3: enabled 0
663 12:17:11.240395 PCI: 00:1e.0: enabled 1
664 12:17:11.240836 PCI: 00:1e.1: enabled 0
665 12:17:11.243448 PCI: 00:1e.2: enabled 1
666 12:17:11.246650 PCI: 00:1e.3: enabled 1
667 12:17:11.247286 PCI: 00:1f.0: enabled 1
668 12:17:11.250266
669 12:17:11.250849 PCI: 00:1f.1: enabled 0
670 12:17:11.253306 PCI: 00:1f.2: enabled 1
671 12:17:11.256891 PCI: 00:1f.3: enabled 1
672 12:17:11.257327 PCI: 00:1f.4: enabled 0
673 12:17:11.259780 PCI: 00:1f.5: enabled 1
674 12:17:11.263121 PCI: 00:1f.6: enabled 0
675 12:17:11.266937 PCI: 00:1f.7: enabled 0
676 12:17:11.267377 APIC: 00: enabled 1
677 12:17:11.269821 GENERIC: 0.0: enabled 1
678 12:17:11.273526 GENERIC: 0.0: enabled 1
679 12:17:11.274011 GENERIC: 1.0: enabled 1
680 12:17:11.276739 GENERIC: 0.0: enabled 1
681 12:17:11.279934 GENERIC: 1.0: enabled 1
682 12:17:11.283190 USB0 port 0: enabled 1
683 12:17:11.283635 GENERIC: 0.0: enabled 1
684 12:17:11.286370 USB0 port 0: enabled 1
685 12:17:11.290013 GENERIC: 0.0: enabled 1
686 12:17:11.290454 I2C: 00:1a: enabled 1
687 12:17:11.293454
688 12:17:11.293894 I2C: 00:31: enabled 1
689 12:17:11.296378 I2C: 00:32: enabled 1
690 12:17:11.299764 I2C: 00:10: enabled 1
691 12:17:11.300205 I2C: 00:15: enabled 1
692 12:17:11.303058 GENERIC: 0.0: enabled 0
693 12:17:11.306283 GENERIC: 1.0: enabled 0
694 12:17:11.306722 GENERIC: 0.0: enabled 1
695 12:17:11.310009 SPI: 00: enabled 1
696 12:17:11.313041 SPI: 00: enabled 1
697 12:17:11.313506 PNP: 0c09.0: enabled 1
698 12:17:11.316424 GENERIC: 0.0: enabled 1
699 12:17:11.319736 USB3 port 0: enabled 1
700 12:17:11.320193 USB3 port 1: enabled 1
701 12:17:11.323310 USB3 port 2: enabled 0
702 12:17:11.326450 USB3 port 3: enabled 0
703 12:17:11.329913 USB2 port 0: enabled 0
704 12:17:11.330364 USB2 port 1: enabled 1
705 12:17:11.332925 USB2 port 2: enabled 1
706 12:17:11.336438 USB2 port 3: enabled 0
707 12:17:11.336906 USB2 port 4: enabled 1
708 12:17:11.339706 USB2 port 5: enabled 0
709 12:17:11.343024 USB2 port 6: enabled 0
710 12:17:11.343483 USB2 port 7: enabled 0
711 12:17:11.346777 USB2 port 8: enabled 0
712 12:17:11.349817 USB2 port 9: enabled 0
713 12:17:11.353158 USB3 port 0: enabled 0
714 12:17:11.353619 USB3 port 1: enabled 1
715 12:17:11.356384 USB3 port 2: enabled 0
716 12:17:11.359994 USB3 port 3: enabled 0
717 12:17:11.360489 GENERIC: 0.0: enabled 1
718 12:17:11.363455 GENERIC: 1.0: enabled 1
719 12:17:11.366500 APIC: 01: enabled 1
720 12:17:11.366954 APIC: 03: enabled 1
721 12:17:11.369973 APIC: 07: enabled 1
722 12:17:11.373250 APIC: 05: enabled 1
723 12:17:11.373747 APIC: 04: enabled 1
724 12:17:11.376211 APIC: 02: enabled 1
725 12:17:11.376654 APIC: 06: enabled 1
726 12:17:11.379593 Compare with tree...
727 12:17:11.383075 Root Device: enabled 1
728 12:17:11.386360 DOMAIN: 0000: enabled 1
729 12:17:11.386811 PCI: 00:00.0: enabled 1
730 12:17:11.389708 PCI: 00:02.0: enabled 1
731 12:17:11.393052 PCI: 00:04.0: enabled 1
732 12:17:11.396472 GENERIC: 0.0: enabled 1
733 12:17:11.399817 PCI: 00:05.0: enabled 1
734 12:17:11.400262 PCI: 00:06.0: enabled 0
735 12:17:11.403028 PCI: 00:07.0: enabled 0
736 12:17:11.406338 GENERIC: 0.0: enabled 1
737 12:17:11.409730 PCI: 00:07.1: enabled 0
738 12:17:11.412851 GENERIC: 1.0: enabled 1
739 12:17:11.413352 PCI: 00:07.2: enabled 0
740 12:17:11.416693 GENERIC: 0.0: enabled 1
741 12:17:11.419879 PCI: 00:07.3: enabled 0
742 12:17:11.422725 GENERIC: 1.0: enabled 1
743 12:17:11.426432 PCI: 00:08.0: enabled 1
744 12:17:11.426887 PCI: 00:09.0: enabled 0
745 12:17:11.429715 PCI: 00:0a.0: enabled 0
746 12:17:11.432904 PCI: 00:0d.0: enabled 1
747 12:17:11.436196 USB0 port 0: enabled 1
748 12:17:11.439686 USB3 port 0: enabled 1
749 12:17:11.440139 USB3 port 1: enabled 1
750 12:17:11.443297 USB3 port 2: enabled 0
751 12:17:11.446128 USB3 port 3: enabled 0
752 12:17:11.449914 PCI: 00:0d.1: enabled 0
753 12:17:11.452834 PCI: 00:0d.2: enabled 0
754 12:17:11.456105 GENERIC: 0.0: enabled 1
755 12:17:11.456590 PCI: 00:0d.3: enabled 0
756 12:17:11.459852 PCI: 00:0e.0: enabled 0
757 12:17:11.462675 PCI: 00:10.2: enabled 1
758 12:17:11.466187 PCI: 00:10.6: enabled 0
759 12:17:11.466650 PCI: 00:10.7: enabled 0
760 12:17:11.469495
761 12:17:11.469978 PCI: 00:12.0: enabled 0
762 12:17:11.472910 PCI: 00:12.6: enabled 0
763 12:17:11.476062 PCI: 00:13.0: enabled 0
764 12:17:11.479644 PCI: 00:14.0: enabled 1
765 12:17:11.480103 USB0 port 0: enabled 1
766 12:17:11.482971 USB2 port 0: enabled 0
767 12:17:11.486598 USB2 port 1: enabled 1
768 12:17:11.489295 USB2 port 2: enabled 1
769 12:17:11.492584 USB2 port 3: enabled 0
770 12:17:11.496668 USB2 port 4: enabled 1
771 12:17:11.497104 USB2 port 5: enabled 0
772 12:17:11.499460 USB2 port 6: enabled 0
773 12:17:11.502782 USB2 port 7: enabled 0
774 12:17:11.506161 USB2 port 8: enabled 0
775 12:17:11.509399 USB2 port 9: enabled 0
776 12:17:11.512464 USB3 port 0: enabled 0
777 12:17:11.512963 USB3 port 1: enabled 1
778 12:17:11.516378 USB3 port 2: enabled 0
779 12:17:11.519030 USB3 port 3: enabled 0
780 12:17:11.522345 PCI: 00:14.1: enabled 0
781 12:17:11.525918 PCI: 00:14.2: enabled 1
782 12:17:11.526451 PCI: 00:14.3: enabled 1
783 12:17:11.529203 GENERIC: 0.0: enabled 1
784 12:17:11.532720 PCI: 00:15.0: enabled 1
785 12:17:11.535733 I2C: 00:1a: enabled 1
786 12:17:11.539060 I2C: 00:31: enabled 1
787 12:17:11.539497 I2C: 00:32: enabled 1
788 12:17:11.542652 PCI: 00:15.1: enabled 1
789 12:17:11.545989 I2C: 00:10: enabled 1
790 12:17:11.549374 PCI: 00:15.2: enabled 1
791 12:17:11.549820 PCI: 00:15.3: enabled 1
792 12:17:11.552549 PCI: 00:16.0: enabled 1
793 12:17:11.556841 PCI: 00:16.1: enabled 0
794 12:17:11.560812 PCI: 00:16.2: enabled 0
795 12:17:11.561250 PCI: 00:16.3: enabled 0
796 12:17:11.564393 PCI: 00:16.4: enabled 0
797 12:17:11.614087 PCI: 00:16.5: enabled 0
798 12:17:11.614586 PCI: 00:17.0: enabled 1
799 12:17:11.614940 PCI: 00:19.0: enabled 0
800 12:17:11.615279 PCI: 00:19.1: enabled 1
801 12:17:11.615647 I2C: 00:15: enabled 1
802 12:17:11.616159 PCI: 00:19.2: enabled 0
803 12:17:11.616725 PCI: 00:1d.0: enabled 1
804 12:17:11.617602 GENERIC: 0.0: enabled 1
805 12:17:11.617980 PCI: 00:1e.0: enabled 1
806 12:17:11.618313 PCI: 00:1e.1: enabled 0
807 12:17:11.618619 PCI: 00:1e.2: enabled 1
808 12:17:11.618933 SPI: 00: enabled 1
809 12:17:11.619326 PCI: 00:1e.3: enabled 1
810 12:17:11.619728 SPI: 00: enabled 1
811 12:17:11.620055 PCI: 00:1f.0: enabled 1
812 12:17:11.620405 PNP: 0c09.0: enabled 1
813 12:17:11.620708 PCI: 00:1f.1: enabled 0
814 12:17:11.621014 PCI: 00:1f.2: enabled 1
815 12:17:11.621302 GENERIC: 0.0: enabled 1
816 12:17:11.666111 GENERIC: 0.0: enabled 1
817 12:17:11.666680 GENERIC: 1.0: enabled 1
818 12:17:11.667087 PCI: 00:1f.3: enabled 1
819 12:17:11.667448 PCI: 00:1f.4: enabled 0
820 12:17:11.667811 PCI: 00:1f.5: enabled 1
821 12:17:11.668679 PCI: 00:1f.6: enabled 0
822 12:17:11.669230 PCI: 00:1f.7: enabled 0
823 12:17:11.669621 CPU_CLUSTER: 0: enabled 1
824 12:17:11.670005 APIC: 00: enabled 1
825 12:17:11.670372 APIC: 01: enabled 1
826 12:17:11.670706 APIC: 03: enabled 1
827 12:17:11.671046 APIC: 07: enabled 1
828 12:17:11.671370 APIC: 05: enabled 1
829 12:17:11.671825 APIC: 04: enabled 1
830 12:17:11.672393 APIC: 02: enabled 1
831 12:17:11.672857 APIC: 06: enabled 1
832 12:17:11.673200 Root Device scanning...
833 12:17:11.673543 scan_static_bus for Root Device
834 12:17:11.674303 DOMAIN: 0000 enabled
835 12:17:11.674698 CPU_CLUSTER: 0 enabled
836 12:17:11.675123 DOMAIN: 0000 scanning...
837 12:17:11.684289 PCI: pci_scan_bus for bus 00
838 12:17:11.684902 PCI: 00:00.0 [8086/0000] ops
839 12:17:11.685686 PCI: 00:00.0 [8086/9a12] enabled
840 12:17:11.686100 PCI: 00:02.0 [8086/0000] bus ops
841 12:17:11.687680 PCI: 00:02.0 [8086/9a40] enabled
842 12:17:11.690891 PCI: 00:04.0 [8086/0000] bus ops
843 12:17:11.691330 PCI: 00:04.0 [8086/9a03] enabled
844 12:17:11.694316 PCI: 00:05.0 [8086/9a19] enabled
845 12:17:11.697509 PCI: 00:07.0 [0000/0000] hidden
846 12:17:11.700936 PCI: 00:08.0 [8086/9a11] enabled
847 12:17:11.704430 PCI: 00:0a.0 [8086/9a0d] disabled
848 12:17:11.707402 PCI: 00:0d.0 [8086/0000] bus ops
849 12:17:11.711005 PCI: 00:0d.0 [8086/9a13] enabled
850 12:17:11.713999 PCI: 00:14.0 [8086/0000] bus ops
851 12:17:11.717318 PCI: 00:14.0 [8086/a0ed] enabled
852 12:17:11.721360 PCI: 00:14.2 [8086/a0ef] enabled
853 12:17:11.723925 PCI: 00:14.3 [8086/0000] bus ops
854 12:17:11.727504 PCI: 00:14.3 [8086/a0f0] enabled
855 12:17:11.730890 PCI: 00:15.0 [8086/0000] bus ops
856 12:17:11.734011 PCI: 00:15.0 [8086/a0e8] enabled
857 12:17:11.737702 PCI: 00:15.1 [8086/0000] bus ops
858 12:17:11.740726 PCI: 00:15.1 [8086/a0e9] enabled
859 12:17:11.744262 PCI: 00:15.2 [8086/0000] bus ops
860 12:17:11.747690 PCI: 00:15.2 [8086/a0ea] enabled
861 12:17:11.750660 PCI: 00:15.3 [8086/0000] bus ops
862 12:17:11.754303 PCI: 00:15.3 [8086/a0eb] enabled
863 12:17:11.757535 PCI: 00:16.0 [8086/0000] ops
864 12:17:11.760627 PCI: 00:16.0 [8086/a0e0] enabled
865 12:17:11.764126 PCI: Static device PCI: 00:17.0 not found, disabling it.
866 12:17:11.767244 PCI: 00:19.0 [8086/0000] bus ops
867 12:17:11.770691 PCI: 00:19.0 [8086/a0c5] disabled
868 12:17:11.774084 PCI: 00:19.1 [8086/0000] bus ops
869 12:17:11.777234 PCI: 00:19.1 [8086/a0c6] enabled
870 12:17:11.780944 PCI: 00:1d.0 [8086/0000] bus ops
871 12:17:11.784233 PCI: 00:1d.0 [8086/a0b0] enabled
872 12:17:11.787656 PCI: 00:1e.0 [8086/0000] ops
873 12:17:11.790690 PCI: 00:1e.0 [8086/a0a8] enabled
874 12:17:11.794084 PCI: 00:1e.2 [8086/0000] bus ops
875 12:17:11.797388 PCI: 00:1e.2 [8086/a0aa] enabled
876 12:17:11.800827 PCI: 00:1e.3 [8086/0000] bus ops
877 12:17:11.803957 PCI: 00:1e.3 [8086/a0ab] enabled
878 12:17:11.807602 PCI: 00:1f.0 [8086/0000] bus ops
879 12:17:11.810782 PCI: 00:1f.0 [8086/a087] enabled
880 12:17:11.814031 RTC Init
881 12:17:11.817308 Set power on after power failure.
882 12:17:11.817755 Disabling Deep S3
883 12:17:11.820482 Disabling Deep S3
884 12:17:11.823871 Disabling Deep S4
885 12:17:11.824338 Disabling Deep S4
886 12:17:11.827249 Disabling Deep S5
887 12:17:11.827694 Disabling Deep S5
888 12:17:11.830525 PCI: 00:1f.2 [0000/0000] hidden
889 12:17:11.833794 PCI: 00:1f.3 [8086/0000] bus ops
890 12:17:11.837120 PCI: 00:1f.3 [8086/a0c8] enabled
891 12:17:11.840698 PCI: 00:1f.5 [8086/0000] bus ops
892 12:17:11.843836 PCI: 00:1f.5 [8086/a0a4] enabled
893 12:17:11.847138 PCI: Leftover static devices:
894 12:17:11.850788 PCI: 00:10.2
895 12:17:11.851374 PCI: 00:10.6
896 12:17:11.851764 PCI: 00:10.7
897 12:17:11.854093 PCI: 00:06.0
898 12:17:11.854585 PCI: 00:07.1
899 12:17:11.857019 PCI: 00:07.2
900 12:17:11.857514 PCI: 00:07.3
901 12:17:11.857899 PCI: 00:09.0
902 12:17:11.860602 PCI: 00:0d.1
903 12:17:11.861093 PCI: 00:0d.2
904 12:17:11.864170 PCI: 00:0d.3
905 12:17:11.864690 PCI: 00:0e.0
906 12:17:11.865076 PCI: 00:12.0
907 12:17:11.867406 PCI: 00:12.6
908 12:17:11.867866 PCI: 00:13.0
909 12:17:11.870290 PCI: 00:14.1
910 12:17:11.870879 PCI: 00:16.1
911 12:17:11.871351 PCI: 00:16.2
912 12:17:11.873940
913 12:17:11.874522 PCI: 00:16.3
914 12:17:11.874977 PCI: 00:16.4
915 12:17:11.877294 PCI: 00:16.5
916 12:17:11.877838 PCI: 00:17.0
917 12:17:11.880517 PCI: 00:19.2
918 12:17:11.881056 PCI: 00:1e.1
919 12:17:11.881440 PCI: 00:1f.1
920 12:17:11.883696 PCI: 00:1f.4
921 12:17:11.884184 PCI: 00:1f.6
922 12:17:11.887000 PCI: 00:1f.7
923 12:17:11.890328 PCI: Check your devicetree.cb.
924 12:17:11.890788 PCI: 00:02.0 scanning...
925 12:17:11.893981 scan_generic_bus for PCI: 00:02.0
926 12:17:11.900407 scan_generic_bus for PCI: 00:02.0 done
927 12:17:11.903839 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
928 12:17:11.907059 PCI: 00:04.0 scanning...
929 12:17:11.910493 scan_generic_bus for PCI: 00:04.0
930 12:17:11.913721 GENERIC: 0.0 enabled
931 12:17:11.917377 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
932 12:17:11.923649 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
933 12:17:11.927038 PCI: 00:0d.0 scanning...
934 12:17:11.930201 scan_static_bus for PCI: 00:0d.0
935 12:17:11.930745 USB0 port 0 enabled
936 12:17:11.933897 USB0 port 0 scanning...
937 12:17:11.937198 scan_static_bus for USB0 port 0
938 12:17:11.940373 USB3 port 0 enabled
939 12:17:11.940872 USB3 port 1 enabled
940 12:17:11.943950 USB3 port 2 disabled
941 12:17:11.946806 USB3 port 3 disabled
942 12:17:11.947293 USB3 port 0 scanning...
943 12:17:11.949976 scan_static_bus for USB3 port 0
944 12:17:11.953492 scan_static_bus for USB3 port 0 done
945 12:17:11.956757
946 12:17:11.960272 scan_bus: bus USB3 port 0 finished in 6 msecs
947 12:17:11.963761 USB3 port 1 scanning...
948 12:17:11.966867 scan_static_bus for USB3 port 1
949 12:17:11.969907 scan_static_bus for USB3 port 1 done
950 12:17:11.973538 scan_bus: bus USB3 port 1 finished in 6 msecs
951 12:17:11.976907 scan_static_bus for USB0 port 0 done
952 12:17:11.983218 scan_bus: bus USB0 port 0 finished in 43 msecs
953 12:17:11.986712 scan_static_bus for PCI: 00:0d.0 done
954 12:17:11.990272 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
955 12:17:11.993624 PCI: 00:14.0 scanning...
956 12:17:11.996941 scan_static_bus for PCI: 00:14.0
957 12:17:12.000219 USB0 port 0 enabled
958 12:17:12.000758 USB0 port 0 scanning...
959 12:17:12.003695 scan_static_bus for USB0 port 0
960 12:17:12.006594 USB2 port 0 disabled
961 12:17:12.010224 USB2 port 1 enabled
962 12:17:12.010786 USB2 port 2 enabled
963 12:17:12.013439 USB2 port 3 disabled
964 12:17:12.017089 USB2 port 4 enabled
965 12:17:12.017558 USB2 port 5 disabled
966 12:17:12.020385 USB2 port 6 disabled
967 12:17:12.023584 USB2 port 7 disabled
968 12:17:12.024117 USB2 port 8 disabled
969 12:17:12.026560 USB2 port 9 disabled
970 12:17:12.027082 USB3 port 0 disabled
971 12:17:12.029986 USB3 port 1 enabled
972 12:17:12.033492 USB3 port 2 disabled
973 12:17:12.033936 USB3 port 3 disabled
974 12:17:12.036791 USB2 port 1 scanning...
975 12:17:12.040209 scan_static_bus for USB2 port 1
976 12:17:12.043587 scan_static_bus for USB2 port 1 done
977 12:17:12.050113 scan_bus: bus USB2 port 1 finished in 6 msecs
978 12:17:12.050632 USB2 port 2 scanning...
979 12:17:12.053161 scan_static_bus for USB2 port 2
980 12:17:12.059796 scan_static_bus for USB2 port 2 done
981 12:17:12.063135 scan_bus: bus USB2 port 2 finished in 6 msecs
982 12:17:12.066788 USB2 port 4 scanning...
983 12:17:12.069899 scan_static_bus for USB2 port 4
984 12:17:12.073099 scan_static_bus for USB2 port 4 done
985 12:17:12.076354 scan_bus: bus USB2 port 4 finished in 6 msecs
986 12:17:12.080074 USB3 port 1 scanning...
987 12:17:12.083470 scan_static_bus for USB3 port 1
988 12:17:12.086378 scan_static_bus for USB3 port 1 done
989 12:17:12.093010 scan_bus: bus USB3 port 1 finished in 6 msecs
990 12:17:12.096285 scan_static_bus for USB0 port 0 done
991 12:17:12.099600 scan_bus: bus USB0 port 0 finished in 93 msecs
992 12:17:12.103208 scan_static_bus for PCI: 00:14.0 done
993 12:17:12.109882 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
994 12:17:12.110438 PCI: 00:14.3 scanning...
995 12:17:12.112950 scan_static_bus for PCI: 00:14.3
996 12:17:12.116304 GENERIC: 0.0 enabled
997 12:17:12.119633 scan_static_bus for PCI: 00:14.3 done
998 12:17:12.126530 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
999 12:17:12.127017 PCI: 00:15.0 scanning...
1000 12:17:12.129677 scan_static_bus for PCI: 00:15.0
1001 12:17:12.133148 I2C: 00:1a enabled
1002 12:17:12.136280 I2C: 00:31 enabled
1003 12:17:12.136818 I2C: 00:32 enabled
1004 12:17:12.140447 scan_static_bus for PCI: 00:15.0 done
1005 12:17:12.147306 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1006 12:17:12.147842 PCI: 00:15.1 scanning...
1007 12:17:12.150510 scan_static_bus for PCI: 00:15.1
1008 12:17:12.153848 I2C: 00:10 enabled
1009 12:17:12.157278 scan_static_bus for PCI: 00:15.1 done
1010 12:17:12.160782 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1011 12:17:12.164348
1012 12:17:12.164905 PCI: 00:15.2 scanning...
1013 12:17:12.167345 scan_static_bus for PCI: 00:15.2
1014 12:17:12.170781 scan_static_bus for PCI: 00:15.2 done
1015 12:17:12.176990 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1016 12:17:12.180294 PCI: 00:15.3 scanning...
1017 12:17:12.183723 scan_static_bus for PCI: 00:15.3
1018 12:17:12.187469 scan_static_bus for PCI: 00:15.3 done
1019 12:17:12.190796 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1020 12:17:12.194502 PCI: 00:19.1 scanning...
1021 12:17:12.197093 scan_static_bus for PCI: 00:19.1
1022 12:17:12.200525 I2C: 00:15 enabled
1023 12:17:12.203907 scan_static_bus for PCI: 00:19.1 done
1024 12:17:12.207443 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1025 12:17:12.210521 PCI: 00:1d.0 scanning...
1026 12:17:12.213985 do_pci_scan_bridge for PCI: 00:1d.0
1027 12:17:12.217188 PCI: pci_scan_bus for bus 01
1028 12:17:12.220648 PCI: 01:00.0 [1c5c/174a] enabled
1029 12:17:12.223962 GENERIC: 0.0 enabled
1030 12:17:12.227331 Enabling Common Clock Configuration
1031 12:17:12.230399 L1 Sub-State supported from root port 29
1032 12:17:12.233563 L1 Sub-State Support = 0xf
1033 12:17:12.237016 CommonModeRestoreTime = 0x28
1034 12:17:12.240183 Power On Value = 0x16, Power On Scale = 0x0
1035 12:17:12.243580 ASPM: Enabled L1
1036 12:17:12.247425 PCIe: Max_Payload_Size adjusted to 128
1037 12:17:12.250656 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1038 12:17:12.253873 PCI: 00:1e.2 scanning...
1039 12:17:12.257801 scan_generic_bus for PCI: 00:1e.2
1040 12:17:12.260902 SPI: 00 enabled
1041 12:17:12.267026 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1042 12:17:12.270378 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1043 12:17:12.273705 PCI: 00:1e.3 scanning...
1044 12:17:12.277330 scan_generic_bus for PCI: 00:1e.3
1045 12:17:12.277821 SPI: 00 enabled
1046 12:17:12.283667 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1047 12:17:12.290380 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1048 12:17:12.290892 PCI: 00:1f.0 scanning...
1049 12:17:12.294065 scan_static_bus for PCI: 00:1f.0
1050 12:17:12.296984 PNP: 0c09.0 enabled
1051 12:17:12.300306 PNP: 0c09.0 scanning...
1052 12:17:12.303796 scan_static_bus for PNP: 0c09.0
1053 12:17:12.307088 scan_static_bus for PNP: 0c09.0 done
1054 12:17:12.310342 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1055 12:17:12.313526 scan_static_bus for PCI: 00:1f.0 done
1056 12:17:12.320552 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1057 12:17:12.323909 PCI: 00:1f.2 scanning...
1058 12:17:12.327280 scan_static_bus for PCI: 00:1f.2
1059 12:17:12.327779 GENERIC: 0.0 enabled
1060 12:17:12.330178 GENERIC: 0.0 scanning...
1061 12:17:12.333590 scan_static_bus for GENERIC: 0.0
1062 12:17:12.337199 GENERIC: 0.0 enabled
1063 12:17:12.340224 GENERIC: 1.0 enabled
1064 12:17:12.343794 scan_static_bus for GENERIC: 0.0 done
1065 12:17:12.346850 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1066 12:17:12.350298 scan_static_bus for PCI: 00:1f.2 done
1067 12:17:12.356735 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1068 12:17:12.357232 PCI: 00:1f.3 scanning...
1069 12:17:12.360251 scan_static_bus for PCI: 00:1f.3
1070 12:17:12.367196 scan_static_bus for PCI: 00:1f.3 done
1071 12:17:12.370185 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1072 12:17:12.373922 PCI: 00:1f.5 scanning...
1073 12:17:12.377318 scan_generic_bus for PCI: 00:1f.5
1074 12:17:12.380214 scan_generic_bus for PCI: 00:1f.5 done
1075 12:17:12.383680 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1076 12:17:12.390768 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1077 12:17:12.393643 scan_static_bus for Root Device done
1078 12:17:12.396997 scan_bus: bus Root Device finished in 736 msecs
1079 12:17:12.400606
1080 12:17:12.401101 done
1081 12:17:12.406967 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1082 12:17:12.410743 Chrome EC: UHEPI supported
1083 12:17:12.416796 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1084 12:17:12.423565 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1085 12:17:12.427130 SPI flash protection: WPSW=0 SRP0=0
1086 12:17:12.430335 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1087 12:17:12.436979 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1088 12:17:12.440062 found VGA at PCI: 00:02.0
1089 12:17:12.443350 Setting up VGA for PCI: 00:02.0
1090 12:17:12.446686 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1091 12:17:12.453806 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1092 12:17:12.454450 Allocating resources...
1093 12:17:12.456566 Reading resources...
1094 12:17:12.460464 Root Device read_resources bus 0 link: 0
1095 12:17:12.466621 DOMAIN: 0000 read_resources bus 0 link: 0
1096 12:17:12.470104 PCI: 00:04.0 read_resources bus 1 link: 0
1097 12:17:12.476739 PCI: 00:04.0 read_resources bus 1 link: 0 done
1098 12:17:12.479988 PCI: 00:0d.0 read_resources bus 0 link: 0
1099 12:17:12.483303 USB0 port 0 read_resources bus 0 link: 0
1100 12:17:12.486743
1101 12:17:12.489965 USB0 port 0 read_resources bus 0 link: 0 done
1102 12:17:12.496418 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1103 12:17:12.499916 PCI: 00:14.0 read_resources bus 0 link: 0
1104 12:17:12.503632 USB0 port 0 read_resources bus 0 link: 0
1105 12:17:12.510562 USB0 port 0 read_resources bus 0 link: 0 done
1106 12:17:12.513752 PCI: 00:14.0 read_resources bus 0 link: 0 done
1107 12:17:12.520690 PCI: 00:14.3 read_resources bus 0 link: 0
1108 12:17:12.523843 PCI: 00:14.3 read_resources bus 0 link: 0 done
1109 12:17:12.530379 PCI: 00:15.0 read_resources bus 0 link: 0
1110 12:17:12.533680 PCI: 00:15.0 read_resources bus 0 link: 0 done
1111 12:17:12.540269 PCI: 00:15.1 read_resources bus 0 link: 0
1112 12:17:12.544210 PCI: 00:15.1 read_resources bus 0 link: 0 done
1113 12:17:12.551178 PCI: 00:19.1 read_resources bus 0 link: 0
1114 12:17:12.554619 PCI: 00:19.1 read_resources bus 0 link: 0 done
1115 12:17:12.560878 PCI: 00:1d.0 read_resources bus 1 link: 0
1116 12:17:12.563970 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1117 12:17:12.570783 PCI: 00:1e.2 read_resources bus 2 link: 0
1118 12:17:12.574165 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1119 12:17:12.580721 PCI: 00:1e.3 read_resources bus 3 link: 0
1120 12:17:12.584183 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1121 12:17:12.590810 PCI: 00:1f.0 read_resources bus 0 link: 0
1122 12:17:12.594151 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1123 12:17:12.597881 PCI: 00:1f.2 read_resources bus 0 link: 0
1124 12:17:12.604460 GENERIC: 0.0 read_resources bus 0 link: 0
1125 12:17:12.607768 GENERIC: 0.0 read_resources bus 0 link: 0 done
1126 12:17:12.613977 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1127 12:17:12.621003 DOMAIN: 0000 read_resources bus 0 link: 0 done
1128 12:17:12.624147 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1129 12:17:12.627494 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1130 12:17:12.631071
1131 12:17:12.633818 Root Device read_resources bus 0 link: 0 done
1132 12:17:12.637437 Done reading resources.
1133 12:17:12.640443 Show resources in subtree (Root Device)...After reading.
1134 12:17:12.647248 Root Device child on link 0 DOMAIN: 0000
1135 12:17:12.650561 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1136 12:17:12.660569 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1137 12:17:12.670354 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1138 12:17:12.670883 PCI: 00:00.0
1139 12:17:12.680374 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1140 12:17:12.690445 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1141 12:17:12.700598 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1142 12:17:12.710468 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1143 12:17:12.717166 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1144 12:17:12.727336 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1145 12:17:12.736806 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1146 12:17:12.746858 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1147 12:17:12.757081 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1148 12:17:12.766996 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1149 12:17:12.773487 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1150 12:17:12.783449 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1151 12:17:12.793396 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1152 12:17:12.803184 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1153 12:17:12.813565 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1154 12:17:12.820151 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1155 12:17:12.829870 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1156 12:17:12.840183 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1157 12:17:12.850076 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1158 12:17:12.859976 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1159 12:17:12.860485 PCI: 00:02.0
1160 12:17:12.873131 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 12:17:12.883214 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1162 12:17:12.890217 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1163 12:17:12.896413 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1164 12:17:12.906265 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1165 12:17:12.906714 GENERIC: 0.0
1166 12:17:12.909544 PCI: 00:05.0
1167 12:17:12.919937 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1168 12:17:12.923343 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1169 12:17:12.926239 GENERIC: 0.0
1170 12:17:12.926705 PCI: 00:08.0
1171 12:17:12.936429 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 12:17:12.939740 PCI: 00:0a.0
1173 12:17:12.942985 PCI: 00:0d.0 child on link 0 USB0 port 0
1174 12:17:12.952985 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 12:17:12.956558 USB0 port 0 child on link 0 USB3 port 0
1176 12:17:12.959742 USB3 port 0
1177 12:17:12.960268 USB3 port 1
1178 12:17:12.963111 USB3 port 2
1179 12:17:12.963646 USB3 port 3
1180 12:17:12.969720 PCI: 00:14.0 child on link 0 USB0 port 0
1181 12:17:12.979411 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1182 12:17:12.982789 USB0 port 0 child on link 0 USB2 port 0
1183 12:17:12.986259 USB2 port 0
1184 12:17:12.986697 USB2 port 1
1185 12:17:12.989731 USB2 port 2
1186 12:17:12.990167 USB2 port 3
1187 12:17:12.992780 USB2 port 4
1188 12:17:12.993219 USB2 port 5
1189 12:17:12.996277 USB2 port 6
1190 12:17:12.996754 USB2 port 7
1191 12:17:12.999610 USB2 port 8
1192 12:17:13.000046 USB2 port 9
1193 12:17:13.002853 USB3 port 0
1194 12:17:13.003290 USB3 port 1
1195 12:17:13.006310 USB3 port 2
1196 12:17:13.006749 USB3 port 3
1197 12:17:13.009344 PCI: 00:14.2
1198 12:17:13.019660 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1199 12:17:13.029679 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1200 12:17:13.032696 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1201 12:17:13.042500 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1202 12:17:13.046491 GENERIC: 0.0
1203 12:17:13.049204 PCI: 00:15.0 child on link 0 I2C: 00:1a
1204 12:17:13.059408 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1205 12:17:13.062541 I2C: 00:1a
1206 12:17:13.062992 I2C: 00:31
1207 12:17:13.065799 I2C: 00:32
1208 12:17:13.069344 PCI: 00:15.1 child on link 0 I2C: 00:10
1209 12:17:13.079092 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 12:17:13.079552 I2C: 00:10
1211 12:17:13.082592 PCI: 00:15.2
1212 12:17:13.092649 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 12:17:13.093103 PCI: 00:15.3
1214 12:17:13.102578 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 12:17:13.105910 PCI: 00:16.0
1216 12:17:13.115751 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 12:17:13.116193 PCI: 00:19.0
1218 12:17:13.122885 PCI: 00:19.1 child on link 0 I2C: 00:15
1219 12:17:13.132628 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 12:17:13.133174 I2C: 00:15
1221 12:17:13.136235 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1222 12:17:13.146129 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1223 12:17:13.155608 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1224 12:17:13.165826 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1225 12:17:13.166319 GENERIC: 0.0
1226 12:17:13.169083 PCI: 01:00.0
1227 12:17:13.179060 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1228 12:17:13.188855 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1229 12:17:13.195581 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1230 12:17:13.198972 PCI: 00:1e.0
1231 12:17:13.208620 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1232 12:17:13.212085 PCI: 00:1e.2 child on link 0 SPI: 00
1233 12:17:13.222394 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 12:17:13.225406 SPI: 00
1235 12:17:13.228844 PCI: 00:1e.3 child on link 0 SPI: 00
1236 12:17:13.238713 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 12:17:13.239162 SPI: 00
1238 12:17:13.245317 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1239 12:17:13.251804 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1240 12:17:13.255083 PNP: 0c09.0
1241 12:17:13.265300 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1242 12:17:13.268771 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1243 12:17:13.278204 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1244 12:17:13.285352 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1245 12:17:13.288778
1246 12:17:13.291652 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1247 12:17:13.292091 GENERIC: 0.0
1248 12:17:13.295157 GENERIC: 1.0
1249 12:17:13.295615 PCI: 00:1f.3
1250 12:17:13.298980
1251 12:17:13.305150 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1252 12:17:13.308158
1253 12:17:13.318481 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1254 12:17:13.318926 PCI: 00:1f.5
1255 12:17:13.328463 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1256 12:17:13.331375 CPU_CLUSTER: 0 child on link 0 APIC: 00
1257 12:17:13.331830 APIC: 00
1258 12:17:13.334736 APIC: 01
1259 12:17:13.335174 APIC: 03
1260 12:17:13.338113 APIC: 07
1261 12:17:13.338556 APIC: 05
1262 12:17:13.338900 APIC: 04
1263 12:17:13.341519 APIC: 02
1264 12:17:13.341957 APIC: 06
1265 12:17:13.348374 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1266 12:17:13.351747
1267 12:17:13.354787 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1268 12:17:13.361406 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1269 12:17:13.368352 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1270 12:17:13.371207 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1271 12:17:13.374723 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1272 12:17:13.381272 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1273 12:17:13.387995 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1274 12:17:13.394574 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1275 12:17:13.401140 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1276 12:17:13.411075 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1277 12:17:13.414540 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1278 12:17:13.424379 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 12:17:13.431404 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1280 12:17:13.438037 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1281 12:17:13.441314 DOMAIN: 0000: Resource ranges:
1282 12:17:13.444604 * Base: 1000, Size: 800, Tag: 100
1283 12:17:13.447578 * Base: 1900, Size: e700, Tag: 100
1284 12:17:13.454361 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1285 12:17:13.461085 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1286 12:17:13.467831 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1287 12:17:13.474839 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1288 12:17:13.484690 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1289 12:17:13.490927 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1290 12:17:13.497626 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1291 12:17:13.507654 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1292 12:17:13.514699 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1293 12:17:13.520849 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1294 12:17:13.530821 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1295 12:17:13.537372 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1296 12:17:13.544091 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1297 12:17:13.554217 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1298 12:17:13.560424 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1299 12:17:13.567094 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1300 12:17:13.577325 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1301 12:17:13.583864 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1302 12:17:13.590633 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1303 12:17:13.600720 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1304 12:17:13.607152 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1305 12:17:13.613956 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1306 12:17:13.623702 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1307 12:17:13.630440 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1308 12:17:13.636879 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1309 12:17:13.640190 DOMAIN: 0000: Resource ranges:
1310 12:17:13.643657 * Base: 7fc00000, Size: 40400000, Tag: 200
1311 12:17:13.647189
1312 12:17:13.650132 * Base: d0000000, Size: 28000000, Tag: 200
1313 12:17:13.653683 * Base: fa000000, Size: 1000000, Tag: 200
1314 12:17:13.656943 * Base: fb001000, Size: 2fff000, Tag: 200
1315 12:17:13.663528 * Base: fe010000, Size: 2e000, Tag: 200
1316 12:17:13.667198 * Base: fe03f000, Size: d41000, Tag: 200
1317 12:17:13.669986 * Base: fed88000, Size: 8000, Tag: 200
1318 12:17:13.673258 * Base: fed93000, Size: d000, Tag: 200
1319 12:17:13.680272 * Base: feda2000, Size: 1e000, Tag: 200
1320 12:17:13.683431 * Base: fede0000, Size: 1220000, Tag: 200
1321 12:17:13.686701 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1322 12:17:13.693231 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1323 12:17:13.700048 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1324 12:17:13.706408 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1325 12:17:13.713613 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1326 12:17:13.720002 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1327 12:17:13.727042 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1328 12:17:13.733269 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1329 12:17:13.740120 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1330 12:17:13.746553 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1331 12:17:13.753566 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1332 12:17:13.759986 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1333 12:17:13.766558 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1334 12:17:13.773297 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1335 12:17:13.779810 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1336 12:17:13.786714 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1337 12:17:13.793305 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1338 12:17:13.799413 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1339 12:17:13.806283 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1340 12:17:13.813031 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1341 12:17:13.819529 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1342 12:17:13.826069 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1343 12:17:13.832424 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1344 12:17:13.842165 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1345 12:17:13.848991 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1346 12:17:13.852305 PCI: 00:1d.0: Resource ranges:
1347 12:17:13.855778 * Base: 7fc00000, Size: 100000, Tag: 200
1348 12:17:13.862915 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1349 12:17:13.869017 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1350 12:17:13.875682 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1351 12:17:13.885893 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1352 12:17:13.892377 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1353 12:17:13.895520 Root Device assign_resources, bus 0 link: 0
1354 12:17:13.902093 DOMAIN: 0000 assign_resources, bus 0 link: 0
1355 12:17:13.909125 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1356 12:17:13.919225 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1357 12:17:13.925283 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1358 12:17:13.935404 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1359 12:17:13.938788 PCI: 00:04.0 assign_resources, bus 1 link: 0
1360 12:17:13.942338 PCI: 00:04.0 assign_resources, bus 1 link: 0
1361 12:17:13.951910 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1362 12:17:13.958879 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1363 12:17:13.968648 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1364 12:17:13.972082 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1365 12:17:13.978623 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1366 12:17:13.985206 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1367 12:17:13.988140 PCI: 00:14.0 assign_resources, bus 0 link: 0
1368 12:17:13.995311 PCI: 00:14.0 assign_resources, bus 0 link: 0
1369 12:17:14.002015 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1370 12:17:14.011423 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1371 12:17:14.018332 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1372 12:17:14.024997 PCI: 00:14.3 assign_resources, bus 0 link: 0
1373 12:17:14.028160 PCI: 00:14.3 assign_resources, bus 0 link: 0
1374 12:17:14.037962 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1375 12:17:14.041576 PCI: 00:15.0 assign_resources, bus 0 link: 0
1376 12:17:14.044595 PCI: 00:15.0 assign_resources, bus 0 link: 0
1377 12:17:14.054545 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1378 12:17:14.058047 PCI: 00:15.1 assign_resources, bus 0 link: 0
1379 12:17:14.064445 PCI: 00:15.1 assign_resources, bus 0 link: 0
1380 12:17:14.071106 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1381 12:17:14.080958 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1382 12:17:14.087772 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1383 12:17:14.097721 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1384 12:17:14.100794 PCI: 00:19.1 assign_resources, bus 0 link: 0
1385 12:17:14.104121 PCI: 00:19.1 assign_resources, bus 0 link: 0
1386 12:17:14.113935 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1387 12:17:14.124011 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1388 12:17:14.133985 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1389 12:17:14.137194 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1390 12:17:14.143786 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1391 12:17:14.153709 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1392 12:17:14.160590 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1393 12:17:14.166943 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1394 12:17:14.173760 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1395 12:17:14.177159 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1396 12:17:14.184118 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1397 12:17:14.190596 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1398 12:17:14.197085 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1399 12:17:14.200211 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1400 12:17:14.206706 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1401 12:17:14.210053 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1402 12:17:14.213588 LPC: Trying to open IO window from 800 size 1ff
1403 12:17:14.223968 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1404 12:17:14.230727 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1405 12:17:14.240700 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1406 12:17:14.244130 DOMAIN: 0000 assign_resources, bus 0 link: 0
1407 12:17:14.250829 Root Device assign_resources, bus 0 link: 0
1408 12:17:14.250912 Done setting resources.
1409 12:17:14.257176 Show resources in subtree (Root Device)...After assigning values.
1410 12:17:14.263938 Root Device child on link 0 DOMAIN: 0000
1411 12:17:14.267002 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1412 12:17:14.277216 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1413 12:17:14.286989 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1414 12:17:14.287079 PCI: 00:00.0
1415 12:17:14.297132 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1416 12:17:14.307194 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1417 12:17:14.316947 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1418 12:17:14.326939 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1419 12:17:14.333588 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1420 12:17:14.343428 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1421 12:17:14.353657 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1422 12:17:14.363534 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1423 12:17:14.373322 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1424 12:17:14.379922 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1425 12:17:14.389649 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1426 12:17:14.399730 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1427 12:17:14.410128 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1428 12:17:14.419654 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1429 12:17:14.426204 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1430 12:17:14.436545 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1431 12:17:14.446081 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1432 12:17:14.456207 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1433 12:17:14.466552 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1434 12:17:14.476158 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1435 12:17:14.476247 PCI: 00:02.0
1436 12:17:14.489471 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1437 12:17:14.499399 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1438 12:17:14.509312 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1439 12:17:14.512508 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1440 12:17:14.522814 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1441 12:17:14.525680 GENERIC: 0.0
1442 12:17:14.525767 PCI: 00:05.0
1443 12:17:14.535669 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1444 12:17:14.542327 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1445 12:17:14.542414 GENERIC: 0.0
1446 12:17:14.545885 PCI: 00:08.0
1447 12:17:14.555741 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1448 12:17:14.555830 PCI: 00:0a.0
1449 12:17:14.562347 PCI: 00:0d.0 child on link 0 USB0 port 0
1450 12:17:14.572441 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1451 12:17:14.576001 USB0 port 0 child on link 0 USB3 port 0
1452 12:17:14.579147 USB3 port 0
1453 12:17:14.579234 USB3 port 1
1454 12:17:14.582450 USB3 port 2
1455 12:17:14.582552 USB3 port 3
1456 12:17:14.588852 PCI: 00:14.0 child on link 0 USB0 port 0
1457 12:17:14.599021 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1458 12:17:14.602218 USB0 port 0 child on link 0 USB2 port 0
1459 12:17:14.605589 USB2 port 0
1460 12:17:14.605676 USB2 port 1
1461 12:17:14.609085 USB2 port 2
1462 12:17:14.609171 USB2 port 3
1463 12:17:14.612229 USB2 port 4
1464 12:17:14.612339 USB2 port 5
1465 12:17:14.615654 USB2 port 6
1466 12:17:14.615741 USB2 port 7
1467 12:17:14.618718 USB2 port 8
1468 12:17:14.618805 USB2 port 9
1469 12:17:14.622112 USB3 port 0
1470 12:17:14.622199 USB3 port 1
1471 12:17:14.625582 USB3 port 2
1472 12:17:14.625668 USB3 port 3
1473 12:17:14.629159 PCI: 00:14.2
1474 12:17:14.639404 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1475 12:17:14.648956 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1476 12:17:14.655838 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1477 12:17:14.665552 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1478 12:17:14.665641 GENERIC: 0.0
1479 12:17:14.669095 PCI: 00:15.0 child on link 0 I2C: 00:1a
1480 12:17:14.672530
1481 12:17:14.681972 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1482 12:17:14.682061 I2C: 00:1a
1483 12:17:14.685595 I2C: 00:31
1484 12:17:14.685682 I2C: 00:32
1485 12:17:14.688943 PCI: 00:15.1 child on link 0 I2C: 00:10
1486 12:17:14.698707 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1487 12:17:14.702038 I2C: 00:10
1488 12:17:14.702125 PCI: 00:15.2
1489 12:17:14.715317 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1490 12:17:14.715405 PCI: 00:15.3
1491 12:17:14.725308 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1492 12:17:14.728703 PCI: 00:16.0
1493 12:17:14.738888 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1494 12:17:14.738976 PCI: 00:19.0
1495 12:17:14.745156 PCI: 00:19.1 child on link 0 I2C: 00:15
1496 12:17:14.754979 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1497 12:17:14.755069 I2C: 00:15
1498 12:17:14.758249 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1499 12:17:14.761674
1500 12:17:14.768408 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1501 12:17:14.781719 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1502 12:17:14.791959 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1503 12:17:14.792053 GENERIC: 0.0
1504 12:17:14.795206 PCI: 01:00.0
1505 12:17:14.805066 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1506 12:17:14.814924 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1507 12:17:14.824752 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1508 12:17:14.828204 PCI: 00:1e.0
1509 12:17:14.838228 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1510 12:17:14.841365 PCI: 00:1e.2 child on link 0 SPI: 00
1511 12:17:14.844807
1512 12:17:14.855045 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1513 12:17:14.855131 SPI: 00
1514 12:17:14.858183 PCI: 00:1e.3 child on link 0 SPI: 00
1515 12:17:14.868103 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1516 12:17:14.871801 SPI: 00
1517 12:17:14.874641 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1518 12:17:14.884836 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1519 12:17:14.884924 PNP: 0c09.0
1520 12:17:14.894552 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1521 12:17:14.898008 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1522 12:17:14.907977 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1523 12:17:14.917838 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1524 12:17:14.921113 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1525 12:17:14.924436 GENERIC: 0.0
1526 12:17:14.924520 GENERIC: 1.0
1527 12:17:14.927571 PCI: 00:1f.3
1528 12:17:14.937625 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1529 12:17:14.947438 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1530 12:17:14.950973 PCI: 00:1f.5
1531 12:17:14.960846 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1532 12:17:14.964164 CPU_CLUSTER: 0 child on link 0 APIC: 00
1533 12:17:14.964241 APIC: 00
1534 12:17:14.967566 APIC: 01
1535 12:17:14.967640 APIC: 03
1536 12:17:14.967702 APIC: 07
1537 12:17:14.970822 APIC: 05
1538 12:17:14.970905 APIC: 04
1539 12:17:14.974076 APIC: 02
1540 12:17:14.974159 APIC: 06
1541 12:17:14.977628 Done allocating resources.
1542 12:17:14.984052 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1543 12:17:14.987419 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1544 12:17:14.993983 Configure GPIOs for I2S audio on UP4.
1545 12:17:15.000688 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1546 12:17:15.000773 Enabling resources...
1547 12:17:15.004167
1548 12:17:15.007794 PCI: 00:00.0 subsystem <- 8086/9a12
1549 12:17:15.007878 PCI: 00:00.0 cmd <- 06
1550 12:17:15.013843 PCI: 00:02.0 subsystem <- 8086/9a40
1551 12:17:15.013927 PCI: 00:02.0 cmd <- 03
1552 12:17:15.017408 PCI: 00:04.0 subsystem <- 8086/9a03
1553 12:17:15.020935 PCI: 00:04.0 cmd <- 02
1554 12:17:15.023789 PCI: 00:05.0 subsystem <- 8086/9a19
1555 12:17:15.027600 PCI: 00:05.0 cmd <- 02
1556 12:17:15.030302 PCI: 00:08.0 subsystem <- 8086/9a11
1557 12:17:15.034097 PCI: 00:08.0 cmd <- 06
1558 12:17:15.037017 PCI: 00:0d.0 subsystem <- 8086/9a13
1559 12:17:15.040566 PCI: 00:0d.0 cmd <- 02
1560 12:17:15.043545 PCI: 00:14.0 subsystem <- 8086/a0ed
1561 12:17:15.047259 PCI: 00:14.0 cmd <- 02
1562 12:17:15.050228 PCI: 00:14.2 subsystem <- 8086/a0ef
1563 12:17:15.050312 PCI: 00:14.2 cmd <- 02
1564 12:17:15.053716
1565 12:17:15.057155 PCI: 00:14.3 subsystem <- 8086/a0f0
1566 12:17:15.057239 PCI: 00:14.3 cmd <- 02
1567 12:17:15.063687 PCI: 00:15.0 subsystem <- 8086/a0e8
1568 12:17:15.063780 PCI: 00:15.0 cmd <- 02
1569 12:17:15.067380 PCI: 00:15.1 subsystem <- 8086/a0e9
1570 12:17:15.070260 PCI: 00:15.1 cmd <- 02
1571 12:17:15.073700 PCI: 00:15.2 subsystem <- 8086/a0ea
1572 12:17:15.076992 PCI: 00:15.2 cmd <- 02
1573 12:17:15.080246 PCI: 00:15.3 subsystem <- 8086/a0eb
1574 12:17:15.083719 PCI: 00:15.3 cmd <- 02
1575 12:17:15.086603 PCI: 00:16.0 subsystem <- 8086/a0e0
1576 12:17:15.090421 PCI: 00:16.0 cmd <- 02
1577 12:17:15.093685 PCI: 00:19.1 subsystem <- 8086/a0c6
1578 12:17:15.096741 PCI: 00:19.1 cmd <- 02
1579 12:17:15.100036 PCI: 00:1d.0 bridge ctrl <- 0013
1580 12:17:15.103669 PCI: 00:1d.0 subsystem <- 8086/a0b0
1581 12:17:15.103749 PCI: 00:1d.0 cmd <- 06
1582 12:17:15.110853 PCI: 00:1e.0 subsystem <- 8086/a0a8
1583 12:17:15.110937 PCI: 00:1e.0 cmd <- 06
1584 12:17:15.113746 PCI: 00:1e.2 subsystem <- 8086/a0aa
1585 12:17:15.117059 PCI: 00:1e.2 cmd <- 06
1586 12:17:15.120248 PCI: 00:1e.3 subsystem <- 8086/a0ab
1587 12:17:15.123842 PCI: 00:1e.3 cmd <- 02
1588 12:17:15.126718 PCI: 00:1f.0 subsystem <- 8086/a087
1589 12:17:15.130219 PCI: 00:1f.0 cmd <- 407
1590 12:17:15.133865 PCI: 00:1f.3 subsystem <- 8086/a0c8
1591 12:17:15.136860 PCI: 00:1f.3 cmd <- 02
1592 12:17:15.140225 PCI: 00:1f.5 subsystem <- 8086/a0a4
1593 12:17:15.143225 PCI: 00:1f.5 cmd <- 406
1594 12:17:15.146663 PCI: 01:00.0 cmd <- 02
1595 12:17:15.151347 done.
1596 12:17:15.154931 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1597 12:17:15.158114 Initializing devices...
1598 12:17:15.161137 Root Device init
1599 12:17:15.164932 Chrome EC: Set SMI mask to 0x0000000000000000
1600 12:17:15.171283 Chrome EC: clear events_b mask to 0x0000000000000000
1601 12:17:15.177907 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1602 12:17:15.184621 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1603 12:17:15.188040 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1604 12:17:15.195298 Chrome EC: Set WAKE mask to 0x0000000000000000
1605 12:17:15.201527 fw_config match found: DB_USB=USB3_ACTIVE
1606 12:17:15.205360 Configure Right Type-C port orientation for retimer
1607 12:17:15.208069 Root Device init finished in 45 msecs
1608 12:17:15.212430 PCI: 00:00.0 init
1609 12:17:15.215632 CPU TDP = 9 Watts
1610 12:17:15.215709 CPU PL1 = 9 Watts
1611 12:17:15.219056 CPU PL2 = 40 Watts
1612 12:17:15.222021 CPU PL4 = 83 Watts
1613 12:17:15.225643 PCI: 00:00.0 init finished in 8 msecs
1614 12:17:15.225719 PCI: 00:02.0 init
1615 12:17:15.228838 GMA: Found VBT in CBFS
1616 12:17:15.232161 GMA: Found valid VBT in CBFS
1617 12:17:15.239033 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1618 12:17:15.245353 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1619 12:17:15.248440 PCI: 00:02.0 init finished in 18 msecs
1620 12:17:15.251741 PCI: 00:05.0 init
1621 12:17:15.255200 PCI: 00:05.0 init finished in 0 msecs
1622 12:17:15.258562 PCI: 00:08.0 init
1623 12:17:15.261783 PCI: 00:08.0 init finished in 0 msecs
1624 12:17:15.265137 PCI: 00:14.0 init
1625 12:17:15.268662 PCI: 00:14.0 init finished in 0 msecs
1626 12:17:15.271686 PCI: 00:14.2 init
1627 12:17:15.275186 PCI: 00:14.2 init finished in 0 msecs
1628 12:17:15.278565 PCI: 00:15.0 init
1629 12:17:15.278638 I2C bus 0 version 0x3230302a
1630 12:17:15.284998 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1631 12:17:15.288431 PCI: 00:15.0 init finished in 6 msecs
1632 12:17:15.288509 PCI: 00:15.1 init
1633 12:17:15.291656 I2C bus 1 version 0x3230302a
1634 12:17:15.295123 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1635 12:17:15.298556 PCI: 00:15.1 init finished in 6 msecs
1636 12:17:15.301635
1637 12:17:15.301713 PCI: 00:15.2 init
1638 12:17:15.305046 I2C bus 2 version 0x3230302a
1639 12:17:15.308250 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1640 12:17:15.311362 PCI: 00:15.2 init finished in 6 msecs
1641 12:17:15.315128 PCI: 00:15.3 init
1642 12:17:15.318520 I2C bus 3 version 0x3230302a
1643 12:17:15.321597 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1644 12:17:15.325002 PCI: 00:15.3 init finished in 6 msecs
1645 12:17:15.328240 PCI: 00:16.0 init
1646 12:17:15.331563 PCI: 00:16.0 init finished in 0 msecs
1647 12:17:15.334882 PCI: 00:19.1 init
1648 12:17:15.338529 I2C bus 5 version 0x3230302a
1649 12:17:15.341340 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1650 12:17:15.344698 PCI: 00:19.1 init finished in 6 msecs
1651 12:17:15.344772 PCI: 00:1d.0 init
1652 12:17:15.348275 Initializing PCH PCIe bridge.
1653 12:17:15.354717 PCI: 00:1d.0 init finished in 3 msecs
1654 12:17:15.354795 PCI: 00:1f.0 init
1655 12:17:15.358284
1656 12:17:15.361161 IOAPIC: Initializing IOAPIC at 0xfec00000
1657 12:17:15.364507 IOAPIC: Bootstrap Processor Local APIC = 0x00
1658 12:17:15.368009 IOAPIC: ID = 0x02
1659 12:17:15.368095 IOAPIC: Dumping registers
1660 12:17:15.371398
1661 12:17:15.371474 reg 0x0000: 0x02000000
1662 12:17:15.374900 reg 0x0001: 0x00770020
1663 12:17:15.377839 reg 0x0002: 0x00000000
1664 12:17:15.381514 PCI: 00:1f.0 init finished in 21 msecs
1665 12:17:15.384736 PCI: 00:1f.2 init
1666 12:17:15.384838 Disabling ACPI via APMC.
1667 12:17:15.389232 APMC done.
1668 12:17:15.392226 PCI: 00:1f.2 init finished in 5 msecs
1669 12:17:15.404619 PCI: 01:00.0 init
1670 12:17:15.408140 PCI: 01:00.0 init finished in 0 msecs
1671 12:17:15.411322 PNP: 0c09.0 init
1672 12:17:15.417910 Google Chrome EC uptime: 8.391 seconds
1673 12:17:15.421146 Google Chrome AP resets since EC boot: 1
1674 12:17:15.424240 Google Chrome most recent AP reset causes:
1675 12:17:15.427845 0.346: 32775 shutdown: entering G3
1676 12:17:15.434231 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1677 12:17:15.437593 PNP: 0c09.0 init finished in 23 msecs
1678 12:17:15.444203 Devices initialized
1679 12:17:15.447591 Show all devs... After init.
1680 12:17:15.450585 Root Device: enabled 1
1681 12:17:15.450668 DOMAIN: 0000: enabled 1
1682 12:17:15.453920 CPU_CLUSTER: 0: enabled 1
1683 12:17:15.457378 PCI: 00:00.0: enabled 1
1684 12:17:15.460850 PCI: 00:02.0: enabled 1
1685 12:17:15.460924 PCI: 00:04.0: enabled 1
1686 12:17:15.463939 PCI: 00:05.0: enabled 1
1687 12:17:15.467606 PCI: 00:06.0: enabled 0
1688 12:17:15.470616 PCI: 00:07.0: enabled 0
1689 12:17:15.470689 PCI: 00:07.1: enabled 0
1690 12:17:15.473880 PCI: 00:07.2: enabled 0
1691 12:17:15.477219 PCI: 00:07.3: enabled 0
1692 12:17:15.480741 PCI: 00:08.0: enabled 1
1693 12:17:15.480814 PCI: 00:09.0: enabled 0
1694 12:17:15.483965 PCI: 00:0a.0: enabled 0
1695 12:17:15.487159 PCI: 00:0d.0: enabled 1
1696 12:17:15.487238 PCI: 00:0d.1: enabled 0
1697 12:17:15.490500
1698 12:17:15.490576 PCI: 00:0d.2: enabled 0
1699 12:17:15.493850 PCI: 00:0d.3: enabled 0
1700 12:17:15.497275 PCI: 00:0e.0: enabled 0
1701 12:17:15.497348 PCI: 00:10.2: enabled 1
1702 12:17:15.500602 PCI: 00:10.6: enabled 0
1703 12:17:15.503701 PCI: 00:10.7: enabled 0
1704 12:17:15.507604 PCI: 00:12.0: enabled 0
1705 12:17:15.507677 PCI: 00:12.6: enabled 0
1706 12:17:15.510553 PCI: 00:13.0: enabled 0
1707 12:17:15.513759 PCI: 00:14.0: enabled 1
1708 12:17:15.517611 PCI: 00:14.1: enabled 0
1709 12:17:15.517687 PCI: 00:14.2: enabled 1
1710 12:17:15.520536 PCI: 00:14.3: enabled 1
1711 12:17:15.523810 PCI: 00:15.0: enabled 1
1712 12:17:15.523891 PCI: 00:15.1: enabled 1
1713 12:17:15.527626
1714 12:17:15.527706 PCI: 00:15.2: enabled 1
1715 12:17:15.530406 PCI: 00:15.3: enabled 1
1716 12:17:15.533708 PCI: 00:16.0: enabled 1
1717 12:17:15.533795 PCI: 00:16.1: enabled 0
1718 12:17:15.537398 PCI: 00:16.2: enabled 0
1719 12:17:15.540308 PCI: 00:16.3: enabled 0
1720 12:17:15.543736 PCI: 00:16.4: enabled 0
1721 12:17:15.543821 PCI: 00:16.5: enabled 0
1722 12:17:15.547255 PCI: 00:17.0: enabled 0
1723 12:17:15.550715 PCI: 00:19.0: enabled 0
1724 12:17:15.554014 PCI: 00:19.1: enabled 1
1725 12:17:15.554101 PCI: 00:19.2: enabled 0
1726 12:17:15.557037 PCI: 00:1c.0: enabled 1
1727 12:17:15.560613 PCI: 00:1c.1: enabled 0
1728 12:17:15.564007 PCI: 00:1c.2: enabled 0
1729 12:17:15.564093 PCI: 00:1c.3: enabled 0
1730 12:17:15.567268 PCI: 00:1c.4: enabled 0
1731 12:17:15.570725 PCI: 00:1c.5: enabled 0
1732 12:17:15.570811 PCI: 00:1c.6: enabled 1
1733 12:17:15.573866 PCI: 00:1c.7: enabled 0
1734 12:17:15.577106 PCI: 00:1d.0: enabled 1
1735 12:17:15.580490 PCI: 00:1d.1: enabled 0
1736 12:17:15.580575 PCI: 00:1d.2: enabled 1
1737 12:17:15.583996 PCI: 00:1d.3: enabled 0
1738 12:17:15.587065 PCI: 00:1e.0: enabled 1
1739 12:17:15.590539 PCI: 00:1e.1: enabled 0
1740 12:17:15.590626 PCI: 00:1e.2: enabled 1
1741 12:17:15.593793 PCI: 00:1e.3: enabled 1
1742 12:17:15.596859 PCI: 00:1f.0: enabled 1
1743 12:17:15.600471 PCI: 00:1f.1: enabled 0
1744 12:17:15.600556 PCI: 00:1f.2: enabled 1
1745 12:17:15.603556 PCI: 00:1f.3: enabled 1
1746 12:17:15.606763 PCI: 00:1f.4: enabled 0
1747 12:17:15.606849 PCI: 00:1f.5: enabled 1
1748 12:17:15.610050
1749 12:17:15.610137 PCI: 00:1f.6: enabled 0
1750 12:17:15.613442 PCI: 00:1f.7: enabled 0
1751 12:17:15.617226 APIC: 00: enabled 1
1752 12:17:15.617312 GENERIC: 0.0: enabled 1
1753 12:17:15.620040 GENERIC: 0.0: enabled 1
1754 12:17:15.623875 GENERIC: 1.0: enabled 1
1755 12:17:15.626661 GENERIC: 0.0: enabled 1
1756 12:17:15.626748 GENERIC: 1.0: enabled 1
1757 12:17:15.630320 USB0 port 0: enabled 1
1758 12:17:15.633581 GENERIC: 0.0: enabled 1
1759 12:17:15.633667 USB0 port 0: enabled 1
1760 12:17:15.636977 GENERIC: 0.0: enabled 1
1761 12:17:15.640121 I2C: 00:1a: enabled 1
1762 12:17:15.640208 I2C: 00:31: enabled 1
1763 12:17:15.643636
1764 12:17:15.643722 I2C: 00:32: enabled 1
1765 12:17:15.646612 I2C: 00:10: enabled 1
1766 12:17:15.649992 I2C: 00:15: enabled 1
1767 12:17:15.650080 GENERIC: 0.0: enabled 0
1768 12:17:15.653415 GENERIC: 1.0: enabled 0
1769 12:17:15.656946 GENERIC: 0.0: enabled 1
1770 12:17:15.657032 SPI: 00: enabled 1
1771 12:17:15.659987 SPI: 00: enabled 1
1772 12:17:15.663666 PNP: 0c09.0: enabled 1
1773 12:17:15.663753 GENERIC: 0.0: enabled 1
1774 12:17:15.667006 USB3 port 0: enabled 1
1775 12:17:15.670063 USB3 port 1: enabled 1
1776 12:17:15.670149 USB3 port 2: enabled 0
1777 12:17:15.673746 USB3 port 3: enabled 0
1778 12:17:15.676688 USB2 port 0: enabled 0
1779 12:17:15.680126 USB2 port 1: enabled 1
1780 12:17:15.680212 USB2 port 2: enabled 1
1781 12:17:15.683799 USB2 port 3: enabled 0
1782 12:17:15.687064 USB2 port 4: enabled 1
1783 12:17:15.687151 USB2 port 5: enabled 0
1784 12:17:15.689931 USB2 port 6: enabled 0
1785 12:17:15.693499 USB2 port 7: enabled 0
1786 12:17:15.693585 USB2 port 8: enabled 0
1787 12:17:15.696654 USB2 port 9: enabled 0
1788 12:17:15.699885 USB3 port 0: enabled 0
1789 12:17:15.703367 USB3 port 1: enabled 1
1790 12:17:15.703454 USB3 port 2: enabled 0
1791 12:17:15.706537 USB3 port 3: enabled 0
1792 12:17:15.709911 GENERIC: 0.0: enabled 1
1793 12:17:15.709998 GENERIC: 1.0: enabled 1
1794 12:17:15.713362 APIC: 01: enabled 1
1795 12:17:15.716583 APIC: 03: enabled 1
1796 12:17:15.716669 APIC: 07: enabled 1
1797 12:17:15.719732 APIC: 05: enabled 1
1798 12:17:15.723252 APIC: 04: enabled 1
1799 12:17:15.723341 APIC: 02: enabled 1
1800 12:17:15.726728 APIC: 06: enabled 1
1801 12:17:15.729851 PCI: 01:00.0: enabled 1
1802 12:17:15.733322 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1803 12:17:15.739798 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 12:17:15.743059 ELOG: NV offset 0xf30000 size 0x1000
1805 12:17:15.750253 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 12:17:15.756713 ELOG: Event(17) added with size 13 at 2023-01-31 12:17:15 UTC
1807 12:17:15.763055 ELOG: Event(92) added with size 9 at 2023-01-31 12:17:15 UTC
1808 12:17:15.769909 ELOG: Event(93) added with size 9 at 2023-01-31 12:17:15 UTC
1809 12:17:15.776572 ELOG: Event(9E) added with size 10 at 2023-01-31 12:17:15 UTC
1810 12:17:15.783107 ELOG: Event(9F) added with size 14 at 2023-01-31 12:17:15 UTC
1811 12:17:15.786694 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 12:17:15.793093 ELOG: Event(A1) added with size 10 at 2023-01-31 12:17:15 UTC
1813 12:17:15.803068 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1814 12:17:15.806537 ELOG: Event(A0) added with size 9 at 2023-01-31 12:17:15 UTC
1815 12:17:15.813024 elog_add_boot_reason: Logged dev mode boot
1816 12:17:15.819451 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1817 12:17:15.819539 Finalize devices...
1818 12:17:15.822658 Devices finalized
1819 12:17:15.825996 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1820 12:17:15.832709 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1821 12:17:15.839434 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1822 12:17:15.842939 ME: HFSTS1 : 0x80030055
1823 12:17:15.845952 ME: HFSTS2 : 0x30280116
1824 12:17:15.852663 ME: HFSTS3 : 0x00000050
1825 12:17:15.856032 ME: HFSTS4 : 0x00004000
1826 12:17:15.859672 ME: HFSTS5 : 0x00000000
1827 12:17:15.866242 ME: HFSTS6 : 0x00400006
1828 12:17:15.869655 ME: Manufacturing Mode : YES
1829 12:17:15.872677 ME: SPI Protection Mode Enabled : NO
1830 12:17:15.876078 ME: FW Partition Table : OK
1831 12:17:15.879439 ME: Bringup Loader Failure : NO
1832 12:17:15.882974 ME: Firmware Init Complete : NO
1833 12:17:15.889225 ME: Boot Options Present : NO
1834 12:17:15.892882 ME: Update In Progress : NO
1835 12:17:15.895815 ME: D0i3 Support : YES
1836 12:17:15.899578 ME: Low Power State Enabled : NO
1837 12:17:15.902917 ME: CPU Replaced : YES
1838 12:17:15.905839 ME: CPU Replacement Valid : YES
1839 12:17:15.909044 ME: Current Working State : 5
1840 12:17:15.912470 ME: Current Operation State : 1
1841 12:17:15.916127 ME: Current Operation Mode : 3
1842 12:17:15.922296 ME: Error Code : 0
1843 12:17:15.925657 ME: Enhanced Debug Mode : NO
1844 12:17:15.929467 ME: CPU Debug Disabled : YES
1845 12:17:15.932707 ME: TXT Support : NO
1846 12:17:15.939050 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1847 12:17:15.945839 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1848 12:17:15.948905 CBFS: 'fallback/slic' not found.
1849 12:17:15.952357 ACPI: Writing ACPI tables at 76b01000.
1850 12:17:15.955809 ACPI: * FACS
1851 12:17:15.955895 ACPI: * DSDT
1852 12:17:15.958823 Ramoops buffer: 0x100000@0x76a00000.
1853 12:17:15.965516 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1854 12:17:15.968964 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1855 12:17:15.972565 Google Chrome EC: version:
1856 12:17:15.975883 ro: voema_v2.0.7540-147f8d37d1
1857 12:17:15.979458 rw: voema_v2.0.7540-147f8d37d1
1858 12:17:15.982570 running image: 2
1859 12:17:15.988897 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1860 12:17:15.992147 ACPI: * FADT
1861 12:17:15.992234 SCI is IRQ9
1862 12:17:15.995696 ACPI: added table 1/32, length now 40
1863 12:17:15.999065 ACPI: * SSDT
1864 12:17:16.002442 Found 1 CPU(s) with 8 core(s) each.
1865 12:17:16.005936 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1866 12:17:16.012188 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1867 12:17:16.015577 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1868 12:17:16.018691 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1869 12:17:16.025793 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1870 12:17:16.031832 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1871 12:17:16.035215 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1872 12:17:16.041948 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1873 12:17:16.048483 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1874 12:17:16.051717 \_SB.PCI0.RP09: Added StorageD3Enable property
1875 12:17:16.055148 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1876 12:17:16.061659 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1877 12:17:16.068692 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1878 12:17:16.071814 PS2K: Passing 80 keymaps to kernel
1879 12:17:16.078903 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1880 12:17:16.085021 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1881 12:17:16.091817 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1882 12:17:16.098793 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1883 12:17:16.104791 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1884 12:17:16.111542 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1885 12:17:16.118217 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1886 12:17:16.124826 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1887 12:17:16.128257 ACPI: added table 2/32, length now 44
1888 12:17:16.128383 ACPI: * MCFG
1889 12:17:16.135061 ACPI: added table 3/32, length now 48
1890 12:17:16.135147 ACPI: * TPM2
1891 12:17:16.138486 TPM2 log created at 0x769f0000
1892 12:17:16.141352 ACPI: added table 4/32, length now 52
1893 12:17:16.144707 ACPI: * MADT
1894 12:17:16.144793 SCI is IRQ9
1895 12:17:16.148431 ACPI: added table 5/32, length now 56
1896 12:17:16.151299 current = 76b09850
1897 12:17:16.151386 ACPI: * DMAR
1898 12:17:16.154714 ACPI: added table 6/32, length now 60
1899 12:17:16.161694 ACPI: added table 7/32, length now 64
1900 12:17:16.161781 ACPI: * HPET
1901 12:17:16.165194 ACPI: added table 8/32, length now 68
1902 12:17:16.168083 ACPI: done.
1903 12:17:16.168168 ACPI tables: 35216 bytes.
1904 12:17:16.171396 smbios_write_tables: 769ef000
1905 12:17:16.175175 EC returned error result code 3
1906 12:17:16.178254 Couldn't obtain OEM name from CBI
1907 12:17:16.181675 Create SMBIOS type 16
1908 12:17:16.185272 Create SMBIOS type 17
1909 12:17:16.188256 GENERIC: 0.0 (WIFI Device)
1910 12:17:16.188379 SMBIOS tables: 1750 bytes.
1911 12:17:16.194853 Writing table forward entry at 0x00000500
1912 12:17:16.201607 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1913 12:17:16.205091 Writing coreboot table at 0x76b25000
1914 12:17:16.211360 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1915 12:17:16.214663 1. 0000000000001000-000000000009ffff: RAM
1916 12:17:16.218387 2. 00000000000a0000-00000000000fffff: RESERVED
1917 12:17:16.224862 3. 0000000000100000-00000000769eefff: RAM
1918 12:17:16.228160 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1919 12:17:16.234517 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1920 12:17:16.241419 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1921 12:17:16.244918 7. 0000000077000000-000000007fbfffff: RESERVED
1922 12:17:16.247982 8. 00000000c0000000-00000000cfffffff: RESERVED
1923 12:17:16.254721 9. 00000000f8000000-00000000f9ffffff: RESERVED
1924 12:17:16.257940 10. 00000000fb000000-00000000fb000fff: RESERVED
1925 12:17:16.264568 11. 00000000fe000000-00000000fe00ffff: RESERVED
1926 12:17:16.268459 12. 00000000fed80000-00000000fed87fff: RESERVED
1927 12:17:16.274697 13. 00000000fed90000-00000000fed92fff: RESERVED
1928 12:17:16.278290 14. 00000000feda0000-00000000feda1fff: RESERVED
1929 12:17:16.284591 15. 00000000fedc0000-00000000feddffff: RESERVED
1930 12:17:16.288083 16. 0000000100000000-00000002803fffff: RAM
1931 12:17:16.291371 Passing 4 GPIOs to payload:
1932 12:17:16.294672 NAME | PORT | POLARITY | VALUE
1933 12:17:16.301247 lid | undefined | high | high
1934 12:17:16.304615 power | undefined | high | low
1935 12:17:16.311009 oprom | undefined | high | low
1936 12:17:16.317964 EC in RW | 0x000000e5 | high | high
1937 12:17:16.324660 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 8f2f
1938 12:17:16.324747 coreboot table: 1576 bytes.
1939 12:17:16.327668 IMD ROOT 0. 0x76fff000 0x00001000
1940 12:17:16.331399
1941 12:17:16.334435 IMD SMALL 1. 0x76ffe000 0x00001000
1942 12:17:16.337952 FSP MEMORY 2. 0x76c4e000 0x003b0000
1943 12:17:16.341250 VPD 3. 0x76c4d000 0x00000367
1944 12:17:16.344331 RO MCACHE 4. 0x76c4c000 0x00000fdc
1945 12:17:16.347697 CONSOLE 5. 0x76c2c000 0x00020000
1946 12:17:16.351607 FMAP 6. 0x76c2b000 0x00000578
1947 12:17:16.354872 TIME STAMP 7. 0x76c2a000 0x00000910
1948 12:17:16.357683 VBOOT WORK 8. 0x76c16000 0x00014000
1949 12:17:16.364572 ROMSTG STCK 9. 0x76c15000 0x00001000
1950 12:17:16.367576 AFTER CAR 10. 0x76c0a000 0x0000b000
1951 12:17:16.370988 RAMSTAGE 11. 0x76b97000 0x00073000
1952 12:17:16.374369 REFCODE 12. 0x76b42000 0x00055000
1953 12:17:16.377647 SMM BACKUP 13. 0x76b32000 0x00010000
1954 12:17:16.381073 4f444749 14. 0x76b30000 0x00002000
1955 12:17:16.384555 EXT VBT15. 0x76b2d000 0x0000219f
1956 12:17:16.387422 COREBOOT 16. 0x76b25000 0x00008000
1957 12:17:16.391435 ACPI 17. 0x76b01000 0x00024000
1958 12:17:16.397825 ACPI GNVS 18. 0x76b00000 0x00001000
1959 12:17:16.400894 RAMOOPS 19. 0x76a00000 0x00100000
1960 12:17:16.404287 TPM2 TCGLOG20. 0x769f0000 0x00010000
1961 12:17:16.407426 SMBIOS 21. 0x769ef000 0x00000800
1962 12:17:16.407509 IMD small region:
1963 12:17:16.411086
1964 12:17:16.414033 IMD ROOT 0. 0x76ffec00 0x00000400
1965 12:17:16.417798 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1966 12:17:16.420632 POWER STATE 2. 0x76ffeb80 0x00000044
1967 12:17:16.424139 ROMSTAGE 3. 0x76ffeb60 0x00000004
1968 12:17:16.427553 MEM INFO 4. 0x76ffe980 0x000001e0
1969 12:17:16.434063 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1970 12:17:16.437842 MTRR: Physical address space:
1971 12:17:16.444467 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1972 12:17:16.450640 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1973 12:17:16.457904 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1974 12:17:16.464421 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1975 12:17:16.467153 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1976 12:17:16.473996 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1977 12:17:16.480497 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1978 12:17:16.483878 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 12:17:16.487305
1980 12:17:16.490865 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 12:17:16.494174 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 12:17:16.497382 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 12:17:16.500365 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 12:17:16.507437 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 12:17:16.510621 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 12:17:16.513988 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 12:17:16.517378 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 12:17:16.524250 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 12:17:16.527194 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 12:17:16.530533 call enable_fixed_mtrr()
1991 12:17:16.533586 CPU physical address size: 39 bits
1992 12:17:16.537089 MTRR: default type WB/UC MTRR counts: 6/6.
1993 12:17:16.540476 MTRR: UC selected as default type.
1994 12:17:16.546961 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1995 12:17:16.554052 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1996 12:17:16.560199 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1997 12:17:16.567040 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1998 12:17:16.573513 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1999 12:17:16.580181 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2000 12:17:16.580261
2001 12:17:16.583651 MTRR check
2002 12:17:16.583730 Fixed MTRRs : Enabled
2003 12:17:16.586850 Variable MTRRs: Enabled
2004 12:17:16.586940
2005 12:17:16.590186 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 12:17:16.596561 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 12:17:16.600284 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 12:17:16.603511 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 12:17:16.606716 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 12:17:16.610001 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 12:17:16.616893 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 12:17:16.620131 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 12:17:16.623442 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 12:17:16.626495 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 12:17:16.633252 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 12:17:16.639909 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2017 12:17:16.643622 call enable_fixed_mtrr()
2018 12:17:16.646962 Checking cr50 for pending updates
2019 12:17:16.650176 CPU physical address size: 39 bits
2020 12:17:16.653673 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 12:17:16.656708 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 12:17:16.660069 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 12:17:16.663287 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 12:17:16.670267 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 12:17:16.673284 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 12:17:16.676582 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 12:17:16.679889 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 12:17:16.686716 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 12:17:16.690048 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 12:17:16.693701 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 12:17:16.696512 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 12:17:16.704074 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 12:17:16.704162 call enable_fixed_mtrr()
2034 12:17:16.710764 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 12:17:16.713849 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 12:17:16.717564 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 12:17:16.720589 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 12:17:16.727418 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 12:17:16.730823 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 12:17:16.734124 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 12:17:16.737267 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 12:17:16.740689 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 12:17:16.744043
2044 12:17:16.747298 CPU physical address size: 39 bits
2045 12:17:16.750558 call enable_fixed_mtrr()
2046 12:17:16.754128 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 12:17:16.757003 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 12:17:16.763794 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 12:17:16.767067 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 12:17:16.770533 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 12:17:16.773949 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 12:17:16.780286 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 12:17:16.783667 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 12:17:16.787219 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 12:17:16.790803 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 12:17:16.797075 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 12:17:16.800660 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 12:17:16.803651 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 12:17:16.806875 call enable_fixed_mtrr()
2060 12:17:16.810029 MTRR: Fixed MSR 0x259 0x0000000000000000
2061 12:17:16.816836 MTRR: Fixed MSR 0x268 0x0606060606060606
2062 12:17:16.820211 MTRR: Fixed MSR 0x269 0x0606060606060606
2063 12:17:16.823662 MTRR: Fixed MSR 0x26a 0x0606060606060606
2064 12:17:16.827133 MTRR: Fixed MSR 0x26b 0x0606060606060606
2065 12:17:16.833482 MTRR: Fixed MSR 0x26c 0x0606060606060606
2066 12:17:16.836572 MTRR: Fixed MSR 0x26d 0x0606060606060606
2067 12:17:16.840131 MTRR: Fixed MSR 0x26e 0x0606060606060606
2068 12:17:16.843441 MTRR: Fixed MSR 0x26f 0x0606060606060606
2069 12:17:16.847064 CPU physical address size: 39 bits
2070 12:17:16.853783 call enable_fixed_mtrr()
2071 12:17:16.857049 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 12:17:16.860716 MTRR: Fixed MSR 0x250 0x0606060606060606
2073 12:17:16.863836 MTRR: Fixed MSR 0x258 0x0606060606060606
2074 12:17:16.867011 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 12:17:16.870581
2076 12:17:16.873947 MTRR: Fixed MSR 0x268 0x0606060606060606
2077 12:17:16.877471 MTRR: Fixed MSR 0x269 0x0606060606060606
2078 12:17:16.880399 MTRR: Fixed MSR 0x26a 0x0606060606060606
2079 12:17:16.884424 MTRR: Fixed MSR 0x26b 0x0606060606060606
2080 12:17:16.890565 MTRR: Fixed MSR 0x26c 0x0606060606060606
2081 12:17:16.893716 MTRR: Fixed MSR 0x26d 0x0606060606060606
2082 12:17:16.897224 MTRR: Fixed MSR 0x26e 0x0606060606060606
2083 12:17:16.900367 MTRR: Fixed MSR 0x26f 0x0606060606060606
2084 12:17:16.907668 MTRR: Fixed MSR 0x258 0x0606060606060606
2085 12:17:16.907747 call enable_fixed_mtrr()
2086 12:17:16.914515 MTRR: Fixed MSR 0x259 0x0000000000000000
2087 12:17:16.917796 MTRR: Fixed MSR 0x268 0x0606060606060606
2088 12:17:16.921416 MTRR: Fixed MSR 0x269 0x0606060606060606
2089 12:17:16.924717 MTRR: Fixed MSR 0x26a 0x0606060606060606
2090 12:17:16.931582 MTRR: Fixed MSR 0x26b 0x0606060606060606
2091 12:17:16.934372 MTRR: Fixed MSR 0x26c 0x0606060606060606
2092 12:17:16.937754 MTRR: Fixed MSR 0x26d 0x0606060606060606
2093 12:17:16.941193 MTRR: Fixed MSR 0x26e 0x0606060606060606
2094 12:17:16.944504 MTRR: Fixed MSR 0x26f 0x0606060606060606
2095 12:17:16.950936 CPU physical address size: 39 bits
2096 12:17:16.954490 call enable_fixed_mtrr()
2097 12:17:16.957757 CPU physical address size: 39 bits
2098 12:17:16.961406 CPU physical address size: 39 bits
2099 12:17:16.964422 CPU physical address size: 39 bits
2100 12:17:16.967809 Reading cr50 TPM mode
2101 12:17:16.976740 BS: BS_PAYLOAD_LOAD entry times (exec / console): 327 / 6 ms
2102 12:17:16.986872 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2103 12:17:16.990349 Checking segment from ROM address 0xffc02b38
2104 12:17:16.993387 Checking segment from ROM address 0xffc02b54
2105 12:17:17.000084 Loading segment from ROM address 0xffc02b38
2106 12:17:17.000169 code (compression=0)
2107 12:17:17.010437 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2108 12:17:17.016798 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2109 12:17:17.020303
2110 12:17:17.020391 it's not compressed!
2111 12:17:17.159684 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2112 12:17:17.166528 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2113 12:17:17.173258 Loading segment from ROM address 0xffc02b54
2114 12:17:17.173346 Entry Point 0x30000000
2115 12:17:17.176200 Loaded segments
2116 12:17:17.183103 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2117 12:17:17.225791 Finalizing chipset.
2118 12:17:17.228931 Finalizing SMM.
2119 12:17:17.229014 APMC done.
2120 12:17:17.235672 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2121 12:17:17.239234 mp_park_aps done after 0 msecs.
2122 12:17:17.242150 Jumping to boot code at 0x30000000(0x76b25000)
2123 12:17:17.252091 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2124 12:17:17.252176
2125 12:17:17.252242
2126 12:17:17.252303
2127 12:17:17.255442 Starting depthcharge on Voema...
2128 12:17:17.255512
2129 12:17:17.255859 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2130 12:17:17.255977 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2131 12:17:17.256059 Setting prompt string to ['volteer:']
2132 12:17:17.256141 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2133 12:17:17.265430 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2134 12:17:17.265516
2135 12:17:17.272575 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2136 12:17:17.272661
2137 12:17:17.278703 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2138 12:17:17.278780
2139 12:17:17.282105 Failed to find eMMC card reader
2140 12:17:17.282179
2141 12:17:17.282241 Wipe memory regions:
2142 12:17:17.282300
2143 12:17:17.288620 [0x00000000001000, 0x000000000a0000)
2144 12:17:17.288701
2145 12:17:17.292258 [0x00000000100000, 0x00000030000000)
2146 12:17:17.292368
2147 12:17:17.320702 [0x00000032662db0, 0x000000769ef000)
2148 12:17:17.320790
2149 12:17:17.358934 [0x00000100000000, 0x00000280400000)
2150 12:17:17.359025
2151 12:17:17.561034 ec_init: CrosEC protocol v3 supported (256, 256)
2152 12:17:17.561166
2153 12:17:17.567829 update_port_state: port C0 state: usb enable 1 mux conn 0
2154 12:17:17.567917
2155 12:17:17.577420 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2156 12:17:17.577508
2157 12:17:17.580626 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2158 12:17:17.580713
2159 12:17:17.587506 send_conn_disc_msg: pmc_send_cmd succeeded
2160 12:17:17.587597
2161 12:17:18.018454 R8152: Initializing
2162 12:17:18.018595
2163 12:17:18.021835 Version 9 (ocp_data = 6010)
2164 12:17:18.021922
2165 12:17:18.025518 R8152: Done initializing
2166 12:17:18.025605
2167 12:17:18.028166 Adding net device
2168 12:17:18.028252
2169 12:17:18.333188 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2170 12:17:18.333328
2171 12:17:18.333396
2172 12:17:18.333460
2173 12:17:18.336385 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 12:17:18.437109 volteer: tftpboot 192.168.201.1 8948147/tftp-deploy-n34ibt1_/kernel/bzImage 8948147/tftp-deploy-n34ibt1_/kernel/cmdline 8948147/tftp-deploy-n34ibt1_/ramdisk/ramdisk.cpio.gz
2176 12:17:18.437290 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2177 12:17:18.437397 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2178 12:17:18.441313 tftpboot 192.168.201.1 8948147/tftp-deploy-n34ibt1_/kernel/bzImoy-n34ibt1_/kernel/cmdline 8948147/tftp-deploy-n34ibt1_/ramdisk/ramdisk.cpio.gz
2179 12:17:18.441406
2180 12:17:18.441510 Waiting for link
2181 12:17:18.441583
2182 12:17:18.644742 done.
2183 12:17:18.644882
2184 12:17:18.644953 MAC: 00:e0:4c:71:a6:42
2185 12:17:18.645017
2186 12:17:18.648092 Sending DHCP discover... done.
2187 12:17:18.648180
2188 12:17:18.651026 Waiting for reply... done.
2189 12:17:18.651113
2190 12:17:18.654436 Sending DHCP request... done.
2191 12:17:18.654523
2192 12:17:18.658280 Waiting for reply... done.
2193 12:17:18.658367
2194 12:17:18.661331 My ip is 192.168.201.18
2195 12:17:18.661419
2196 12:17:18.664596 The DHCP server ip is 192.168.201.1
2197 12:17:18.664684
2198 12:17:18.670951 TFTP server IP predefined by user: 192.168.201.1
2199 12:17:18.671039
2200 12:17:18.677542 Bootfile predefined by user: 8948147/tftp-deploy-n34ibt1_/kernel/bzImage
2201 12:17:18.677631
2202 12:17:18.681032 Sending tftp read request... done.
2203 12:17:18.681174
2204 12:17:18.684493 Waiting for the transfer...
2205 12:17:18.684596
2206 12:17:18.933241 00000000 ################################################################
2207 12:17:18.933382
2208 12:17:19.167161 00080000 ################################################################
2209 12:17:19.167300
2210 12:17:19.400420 00100000 ################################################################
2211 12:17:19.400559
2212 12:17:19.634133 00180000 ################################################################
2213 12:17:19.634294
2214 12:17:19.867593 00200000 ################################################################
2215 12:17:19.867736
2216 12:17:20.106987 00280000 ################################################################
2217 12:17:20.107133
2218 12:17:20.366850 00300000 ################################################################
2219 12:17:20.366988
2220 12:17:20.606252 00380000 ################################################################
2221 12:17:20.606387
2222 12:17:20.842840 00400000 ################################################################
2223 12:17:20.842997
2224 12:17:21.081506 00480000 ################################################################
2225 12:17:21.081638
2226 12:17:21.339750 00500000 ################################################################
2227 12:17:21.339905
2228 12:17:21.597792 00580000 ################################################################
2229 12:17:21.597956
2230 12:17:21.848054 00600000 ################################################################
2231 12:17:21.848204
2232 12:17:22.100955 00680000 ################################################################
2233 12:17:22.101117
2234 12:17:22.208039 00700000 ############################ done.
2235 12:17:22.208170
2236 12:17:22.211299 The bootfile was 7569296 bytes long.
2237 12:17:22.211404
2238 12:17:22.214854 Sending tftp read request... done.
2239 12:17:22.214936
2240 12:17:22.217887 Waiting for the transfer...
2241 12:17:22.217966
2242 12:17:22.457889 00000000 ################################################################
2243 12:17:22.458028
2244 12:17:22.697868 00080000 ################################################################
2245 12:17:22.698008
2246 12:17:22.940043 00100000 ################################################################
2247 12:17:22.940215
2248 12:17:23.177875 00180000 ################################################################
2249 12:17:23.178024
2250 12:17:23.414596 00200000 ################################################################
2251 12:17:23.414743
2252 12:17:23.650348 00280000 ################################################################
2253 12:17:23.650492
2254 12:17:23.888239 00300000 ################################################################
2255 12:17:23.888419
2256 12:17:24.133538 00380000 ################################################################
2257 12:17:24.133683
2258 12:17:24.372210 00400000 ################################################################
2259 12:17:24.372359
2260 12:17:24.623360 00480000 ################################################################
2261 12:17:24.623538
2262 12:17:24.859966 00500000 ################################################################
2263 12:17:24.860123
2264 12:17:25.095150 00580000 ################################################################
2265 12:17:25.095289
2266 12:17:25.329013 00600000 ################################################################
2267 12:17:25.329149
2268 12:17:25.564785 00680000 ################################################################
2269 12:17:25.564925
2270 12:17:25.799418 00700000 ################################################################
2271 12:17:25.799552
2272 12:17:26.035855 00780000 ################################################################
2273 12:17:26.035993
2274 12:17:26.110516 00800000 ##################### done.
2275 12:17:26.110631
2276 12:17:26.113539 Sending tftp read request... done.
2277 12:17:26.113627
2278 12:17:26.116975 Waiting for the transfer...
2279 12:17:26.117061
2280 12:17:26.120659 00000000 # done.
2281 12:17:26.120747
2282 12:17:26.130288 Command line loaded dynamically from TFTP file: 8948147/tftp-deploy-n34ibt1_/kernel/cmdline
2283 12:17:26.130377
2284 12:17:26.140207 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2285 12:17:26.140296
2286 12:17:26.149523 Shutting down all USB controllers.
2287 12:17:26.149611
2288 12:17:26.149678 Removing current net device
2289 12:17:26.149741
2290 12:17:26.152922 Finalizing coreboot
2291 12:17:26.153008
2292 12:17:26.159750 Exiting depthcharge with code 4 at timestamp: 17598756
2293 12:17:26.159838
2294 12:17:26.159905
2295 12:17:26.159968 Starting kernel ...
2296 12:17:26.160027
2297 12:17:26.160085
2298 12:17:26.160141
2299 12:17:26.160503 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2300 12:17:26.160605 start: 2.2.5 auto-login-action (timeout 00:04:34) [common]
2301 12:17:26.160683 Setting prompt string to ['Linux version [0-9]']
2302 12:17:26.160757 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2303 12:17:26.160828 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2305 12:22:00.161645 end: 2.2.5 auto-login-action (duration 00:04:34) [common]
2307 12:22:00.162809 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 274 seconds'
2309 12:22:00.163895 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2312 12:22:00.165456 end: 2 depthcharge-action (duration 00:05:00) [common]
2314 12:22:00.166004 Cleaning after the job
2315 12:22:00.166088 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948147/tftp-deploy-n34ibt1_/ramdisk
2316 12:22:00.166703 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948147/tftp-deploy-n34ibt1_/kernel
2317 12:22:00.167233 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948147/tftp-deploy-n34ibt1_/modules
2318 12:22:00.167416 start: 5.1 power-off (timeout 00:00:30) [common]
2319 12:22:00.167569 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2320 12:22:00.186265 >> Command sent successfully.
2321 12:22:00.188094 Returned 0 in 0 seconds
2322 12:22:00.288905 end: 5.1 power-off (duration 00:00:00) [common]
2324 12:22:00.290468 start: 5.2 read-feedback (timeout 00:10:00) [common]
2325 12:22:00.291666 Listened to connection for namespace 'common' for up to 1s
2326 12:22:01.296553 Finalising connection for namespace 'common'
2327 12:22:01.297289 Disconnecting from shell: Finalise
2328 12:22:01.398870 end: 5.2 read-feedback (duration 00:00:01) [common]
2329 12:22:01.399526 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8948147
2330 12:22:01.407778 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8948147
2331 12:22:01.407903 JobError: Your job cannot terminate cleanly.