Boot log: dell-latitude-5400-8665U-sarien

    1 12:17:08.280250  lava-dispatcher, installed at version: 2022.11
    2 12:17:08.280450  start: 0 validate
    3 12:17:08.280596  Start time: 2023-01-31 12:17:08.280588+00:00 (UTC)
    4 12:17:08.280734  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:17:08.280869  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230127.0%2Fx86%2Frootfs.cpio.gz exists
    6 12:17:08.284283  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:17:08.284421  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:17:08.578158  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:17:08.578330  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 12:17:08.581918  validate duration: 0.30
   12 12:17:08.582173  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 12:17:08.582287  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 12:17:08.582407  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 12:17:08.582510  Not decompressing ramdisk as can be used compressed.
   16 12:17:08.582718  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230127.0/x86/rootfs.cpio.gz
   17 12:17:08.582791  saving as /var/lib/lava/dispatcher/tmp/8948157/tftp-deploy-vw_b1cxo/ramdisk/rootfs.cpio.gz
   18 12:17:08.582857  total size: 8423634 (8MB)
   19 12:17:08.585424  progress   0% (0MB)
   20 12:17:08.589341  progress   5% (0MB)
   21 12:17:08.593199  progress  10% (0MB)
   22 12:17:08.596516  progress  15% (1MB)
   23 12:17:08.600211  progress  20% (1MB)
   24 12:17:08.604234  progress  25% (2MB)
   25 12:17:08.607536  progress  30% (2MB)
   26 12:17:08.611226  progress  35% (2MB)
   27 12:17:08.614487  progress  40% (3MB)
   28 12:17:08.618001  progress  45% (3MB)
   29 12:17:08.621810  progress  50% (4MB)
   30 12:17:08.625743  progress  55% (4MB)
   31 12:17:08.628995  progress  60% (4MB)
   32 12:17:08.632720  progress  65% (5MB)
   33 12:17:08.636197  progress  70% (5MB)
   34 12:17:08.639749  progress  75% (6MB)
   35 12:17:08.643421  progress  80% (6MB)
   36 12:17:08.647274  progress  85% (6MB)
   37 12:17:08.651345  progress  90% (7MB)
   38 12:17:08.654442  progress  95% (7MB)
   39 12:17:08.658128  progress 100% (8MB)
   40 12:17:08.658300  8MB downloaded in 0.08s (106.49MB/s)
   41 12:17:08.658466  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 12:17:08.658764  end: 1.1 download-retry (duration 00:00:00) [common]
   44 12:17:08.658864  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 12:17:08.659015  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 12:17:08.659143  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 12:17:08.659214  saving as /var/lib/lava/dispatcher/tmp/8948157/tftp-deploy-vw_b1cxo/kernel/bzImage
   48 12:17:08.659277  total size: 7569296 (7MB)
   49 12:17:08.659339  No compression specified
   50 12:17:08.661204  progress   0% (0MB)
   51 12:17:08.664970  progress   5% (0MB)
   52 12:17:08.668607  progress  10% (0MB)
   53 12:17:08.671913  progress  15% (1MB)
   54 12:17:08.675587  progress  20% (1MB)
   55 12:17:08.679639  progress  25% (1MB)
   56 12:17:08.682874  progress  30% (2MB)
   57 12:17:08.686220  progress  35% (2MB)
   58 12:17:08.690357  progress  40% (2MB)
   59 12:17:08.693290  progress  45% (3MB)
   60 12:17:08.697476  progress  50% (3MB)
   61 12:17:08.701109  progress  55% (4MB)
   62 12:17:08.704102  progress  60% (4MB)
   63 12:17:08.708240  progress  65% (4MB)
   64 12:17:08.713402  progress  70% (5MB)
   65 12:17:08.715936  progress  75% (5MB)
   66 12:17:08.718206  progress  80% (5MB)
   67 12:17:08.721652  progress  85% (6MB)
   68 12:17:08.724781  progress  90% (6MB)
   69 12:17:08.728233  progress  95% (6MB)
   70 12:17:08.731108  progress 100% (7MB)
   71 12:17:08.731409  7MB downloaded in 0.07s (100.08MB/s)
   72 12:17:08.731571  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 12:17:08.731827  end: 1.2 download-retry (duration 00:00:00) [common]
   75 12:17:08.731920  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 12:17:08.732012  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 12:17:08.732126  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 12:17:08.732195  saving as /var/lib/lava/dispatcher/tmp/8948157/tftp-deploy-vw_b1cxo/modules/modules.tar
   79 12:17:08.732258  total size: 51860 (0MB)
   80 12:17:08.732330  Using unxz to decompress xz
   81 12:17:08.736921  progress  63% (0MB)
   82 12:17:08.737288  progress 100% (0MB)
   83 12:17:08.740526  0MB downloaded in 0.01s (5.99MB/s)
   84 12:17:08.740762  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 12:17:08.741034  end: 1.3 download-retry (duration 00:00:00) [common]
   87 12:17:08.741141  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   88 12:17:08.741238  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   89 12:17:08.741334  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 12:17:08.741426  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   91 12:17:08.741598  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q
   92 12:17:08.741712  makedir: /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin
   93 12:17:08.741809  makedir: /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/tests
   94 12:17:08.741896  makedir: /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/results
   95 12:17:08.742001  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-add-keys
   96 12:17:08.742145  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-add-sources
   97 12:17:08.742263  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-background-process-start
   98 12:17:08.742389  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-background-process-stop
   99 12:17:08.742503  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-common-functions
  100 12:17:08.742671  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-echo-ipv4
  101 12:17:08.742785  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-install-packages
  102 12:17:08.742911  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-installed-packages
  103 12:17:08.743022  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-os-build
  104 12:17:08.743146  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-probe-channel
  105 12:17:08.743259  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-probe-ip
  106 12:17:08.743382  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-target-ip
  107 12:17:08.743492  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-target-mac
  108 12:17:08.743614  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-target-storage
  109 12:17:08.743727  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-test-case
  110 12:17:08.743850  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-test-event
  111 12:17:08.743962  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-test-feedback
  112 12:17:08.744082  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-test-raise
  113 12:17:08.744197  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-test-reference
  114 12:17:08.744316  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-test-runner
  115 12:17:08.744428  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-test-set
  116 12:17:08.744547  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-test-shell
  117 12:17:08.744663  Updating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-install-packages (oe)
  118 12:17:08.744787  Updating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/bin/lava-installed-packages (oe)
  119 12:17:08.744891  Creating /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/environment
  120 12:17:08.744980  LAVA metadata
  121 12:17:08.745062  - LAVA_JOB_ID=8948157
  122 12:17:08.745129  - LAVA_DISPATCHER_IP=192.168.201.1
  123 12:17:08.745234  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  124 12:17:08.745313  skipped lava-vland-overlay
  125 12:17:08.745394  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 12:17:08.745480  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  127 12:17:08.745557  skipped lava-multinode-overlay
  128 12:17:08.745637  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 12:17:08.745722  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  130 12:17:08.745809  Loading test definitions
  131 12:17:08.745911  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  132 12:17:08.745987  Using /lava-8948157 at stage 0
  133 12:17:08.746255  uuid=8948157_1.4.2.3.1 testdef=None
  134 12:17:08.746354  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 12:17:08.746447  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  136 12:17:08.746985  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 12:17:08.747232  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  139 12:17:08.747829  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 12:17:08.748083  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  142 12:17:08.748646  runner path: /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/0/tests/0_dmesg test_uuid 8948157_1.4.2.3.1
  143 12:17:08.748794  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 12:17:08.749038  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  146 12:17:08.749114  Using /lava-8948157 at stage 1
  147 12:17:08.749369  uuid=8948157_1.4.2.3.5 testdef=None
  148 12:17:08.749468  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 12:17:08.749558  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  150 12:17:08.750028  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 12:17:08.750265  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  153 12:17:08.750906  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 12:17:08.751162  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  156 12:17:08.751739  runner path: /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/1/tests/1_bootrr test_uuid 8948157_1.4.2.3.5
  157 12:17:08.751890  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 12:17:08.752115  Creating lava-test-runner.conf files
  160 12:17:08.752182  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/0 for stage 0
  161 12:17:08.752265  - 0_dmesg
  162 12:17:08.752340  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8948157/lava-overlay-ykx8t2_q/lava-8948157/1 for stage 1
  163 12:17:08.752434  - 1_bootrr
  164 12:17:08.752527  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 12:17:08.752618  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  166 12:17:08.758925  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 12:17:08.759041  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  168 12:17:08.759135  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 12:17:08.759222  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 12:17:08.759317  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  171 12:17:08.961388  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 12:17:08.961727  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  173 12:17:08.961834  extracting modules file /var/lib/lava/dispatcher/tmp/8948157/tftp-deploy-vw_b1cxo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8948157/extract-overlay-ramdisk-l6xk4p0q/ramdisk
  174 12:17:08.966263  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 12:17:08.966380  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  176 12:17:08.966476  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8948157/compress-overlay-owtx9n6v/overlay-1.4.2.4.tar.gz to ramdisk
  177 12:17:08.966591  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8948157/compress-overlay-owtx9n6v/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8948157/extract-overlay-ramdisk-l6xk4p0q/ramdisk
  178 12:17:08.970652  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 12:17:08.970767  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  180 12:17:08.970862  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 12:17:08.970966  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  182 12:17:08.971082  Building ramdisk /var/lib/lava/dispatcher/tmp/8948157/extract-overlay-ramdisk-l6xk4p0q/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8948157/extract-overlay-ramdisk-l6xk4p0q/ramdisk
  183 12:17:09.035406  >> 48122 blocks

  184 12:17:09.802459  rename /var/lib/lava/dispatcher/tmp/8948157/extract-overlay-ramdisk-l6xk4p0q/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8948157/tftp-deploy-vw_b1cxo/ramdisk/ramdisk.cpio.gz
  185 12:17:09.802861  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 12:17:09.802988  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  187 12:17:09.803094  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  188 12:17:09.803188  No mkimage arch provided, not using FIT.
  189 12:17:09.803278  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 12:17:09.803367  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 12:17:09.803465  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 12:17:09.803564  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  193 12:17:09.803646  No LXC device requested
  194 12:17:09.803730  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 12:17:09.803824  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  196 12:17:09.803912  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 12:17:09.803987  Checking files for TFTP limit of 4294967296 bytes.
  198 12:17:09.804373  end: 1 tftp-deploy (duration 00:00:01) [common]
  199 12:17:09.804484  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 12:17:09.804586  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 12:17:09.804716  substitutions:
  202 12:17:09.804786  - {DTB}: None
  203 12:17:09.804853  - {INITRD}: 8948157/tftp-deploy-vw_b1cxo/ramdisk/ramdisk.cpio.gz
  204 12:17:09.804916  - {KERNEL}: 8948157/tftp-deploy-vw_b1cxo/kernel/bzImage
  205 12:17:09.804976  - {LAVA_MAC}: None
  206 12:17:09.805036  - {PRESEED_CONFIG}: None
  207 12:17:09.805095  - {PRESEED_LOCAL}: None
  208 12:17:09.805153  - {RAMDISK}: 8948157/tftp-deploy-vw_b1cxo/ramdisk/ramdisk.cpio.gz
  209 12:17:09.805211  - {ROOT_PART}: None
  210 12:17:09.805268  - {ROOT}: None
  211 12:17:09.805324  - {SERVER_IP}: 192.168.201.1
  212 12:17:09.805381  - {TEE}: None
  213 12:17:09.805437  Parsed boot commands:
  214 12:17:09.805493  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 12:17:09.805659  Parsed boot commands: tftpboot 192.168.201.1 8948157/tftp-deploy-vw_b1cxo/kernel/bzImage 8948157/tftp-deploy-vw_b1cxo/kernel/cmdline 8948157/tftp-deploy-vw_b1cxo/ramdisk/ramdisk.cpio.gz
  216 12:17:09.805757  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 12:17:09.805865  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 12:17:09.805968  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 12:17:09.806062  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 12:17:09.806135  Not connected, no need to disconnect.
  221 12:17:09.806213  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 12:17:09.806301  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 12:17:09.806375  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-8665U-sarien-cbg-2'
  224 12:17:09.809111  Setting prompt string to ['lava-test: # ']
  225 12:17:09.809422  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 12:17:09.809535  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 12:17:09.809642  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 12:17:09.809740  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 12:17:09.810149  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-2' '--port=1' '--command=reboot'
  230 12:17:09.830484  >> Command sent successfully.

  231 12:17:09.832371  Returned 0 in 0 seconds
  232 12:17:09.933173  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  234 12:17:09.933501  end: 2.2.2 reset-device (duration 00:00:00) [common]
  235 12:17:09.933608  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  236 12:17:09.933703  Setting prompt string to 'Starting depthcharge on sarien...'
  237 12:17:09.933774  Changing prompt to 'Starting depthcharge on sarien...'
  238 12:17:09.933842  depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
  239 12:17:09.934120  [Enter `^Ec?' for help]
  240 12:17:23.632597  
  241 12:17:23.633619  
  242 12:17:23.634181  
  243 12:17:23.641224  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
  244 12:17:23.646455  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
  245 12:17:23.650503  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
  246 12:17:23.655529  CPU: AES supported, TXT supported, VT supported
  247 12:17:23.660956  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
  248 12:17:23.665669  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
  249 12:17:23.671306  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
  250 12:17:23.674900  VBOOT: Loading verstage.
  251 12:17:23.677441  CBFS @ 1d00000 size 300000
  252 12:17:23.683581  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  253 12:17:23.687356  CBFS: Locating 'fallback/verstage'
  254 12:17:23.690968  CBFS: Found @ offset 10f6c0 size 1435c
  255 12:17:23.691733  
  256 12:17:23.707802  
  257 12:17:23.708374  
  258 12:17:23.716297  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
  259 12:17:23.722991  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
  260 12:17:23.725787  done! DID_VID 0x00281ae0
  261 12:17:23.728089  TPM ready after 0 ms
  262 12:17:23.728959  
  263 12:17:23.731939  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
  264 12:17:23.792356  tlcl_send_startup: Startup return code is 0
  265 12:17:23.794093  TPM: setup succeeded
  266 12:17:23.794943  
  267 12:17:23.812445  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
  268 12:17:23.816114  Checking cr50 for recovery request
  269 12:17:23.826075  Phase 1
  270 12:17:23.831264  FMAP: Found "FLASH" version 1.1 at 1c10000.
  271 12:17:23.835960  FMAP: base = fe000000 size = 2000000 #areas = 37
  272 12:17:23.836817  
  273 12:17:23.839921  FMAP: area GBB found @ 1c11000 (978944 bytes)
  274 12:17:23.840771  
  275 12:17:23.847603  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  276 12:17:23.848986  Phase 2
  277 12:17:23.849478  Phase 3
  278 12:17:23.853631  FMAP: area GBB found @ 1c11000 (978944 bytes)
  279 12:17:23.861085  VB2:vb2_report_dev_firmware() This is developer signed firmware
  280 12:17:23.865473  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
  281 12:17:23.866317  
  282 12:17:23.870743  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
  283 12:17:23.877413  VB2:vb2_verify_keyblock() Checking key block signature...
  284 12:17:23.892048  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
  285 12:17:23.896814  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
  286 12:17:23.901874  VB2:vb2_verify_fw_preamble() Verifying preamble.
  287 12:17:23.905534  Phase 4
  288 12:17:23.910267  FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
  289 12:17:23.917779  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  290 12:17:24.088010  VB2:vb2_rsa_verify_digest() Digest check failed!
  291 12:17:24.093004  VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
  292 12:17:24.093834  
  293 12:17:24.094597  Saving nvdata
  294 12:17:24.097698  Reboot requested (10020007)
  295 12:17:24.098513  
  296 12:17:24.100145  board_reset() called!
  297 12:17:24.102243  full_reset() called!
  298 12:17:28.696203  
  299 12:17:28.696758  
  300 12:17:28.704572  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
  301 12:17:28.709203  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
  302 12:17:28.713794  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
  303 12:17:28.714611  
  304 12:17:28.718700  CPU: AES supported, TXT supported, VT supported
  305 12:17:28.723702  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
  306 12:17:28.729250  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
  307 12:17:28.730099  
  308 12:17:28.734969  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
  309 12:17:28.737457  VBOOT: Loading verstage.
  310 12:17:28.738269  
  311 12:17:28.741091  CBFS @ 1d00000 size 300000
  312 12:17:28.746681  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  313 12:17:28.750343  CBFS: Locating 'fallback/verstage'
  314 12:17:28.754546  CBFS: Found @ offset 10f6c0 size 1435c
  315 12:17:28.769223  
  316 12:17:28.769745  
  317 12:17:28.777321  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
  318 12:17:28.784539  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
  319 12:17:28.787120  done! DID_VID 0x00281ae0
  320 12:17:28.789932  TPM ready after 0 ms
  321 12:17:28.793034  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
  322 12:17:28.851562  tlcl_send_startup: Startup return code is 0
  323 12:17:28.853843  TPM: setup succeeded
  324 12:17:28.872797  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
  325 12:17:28.876136  Checking cr50 for recovery request
  326 12:17:28.886033  Phase 1
  327 12:17:28.890465  FMAP: Found "FLASH" version 1.1 at 1c10000.
  328 12:17:28.895245  FMAP: base = fe000000 size = 2000000 #areas = 37
  329 12:17:28.900707  FMAP: area GBB found @ 1c11000 (978944 bytes)
  330 12:17:28.906996  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  331 12:17:28.914319  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  332 12:17:28.917257  Recovery requested (1009000e)
  333 12:17:28.919480  Saving nvdata
  334 12:17:28.933596  tlcl_extend: response is 0
  335 12:17:28.949296  tlcl_extend: response is 0
  336 12:17:28.952403  CBFS @ 1d00000 size 300000
  337 12:17:28.953211  
  338 12:17:28.958936  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  339 12:17:28.962509  CBFS: Locating 'fallback/romstage'
  340 12:17:28.965332  CBFS: Found @ offset 80 size 15b2c
  341 12:17:28.966077  
  342 12:17:28.966944  
  343 12:17:28.967683  
  344 12:17:28.968135  
  345 12:17:28.968780  
  346 12:17:28.976039  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
  347 12:17:28.980726  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
  348 12:17:28.985316  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  349 12:17:28.989334  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  350 12:17:28.993461  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  351 12:17:28.998222  gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
  352 12:17:29.000441  TCO_STS:   0000 0004
  353 12:17:29.003145  GEN_PMCON: d0015209 00002200
  354 12:17:29.006200  GBLRST_CAUSE: 00000000 00000000
  355 12:17:29.008408  prev_sleep_state 5
  356 12:17:29.012131  Boot Count incremented to 15330
  357 12:17:29.015546  CBFS @ 1d00000 size 300000
  358 12:17:29.021697  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  359 12:17:29.023945  CBFS: Locating 'fspm.bin'
  360 12:17:29.024749  
  361 12:17:29.027344  CBFS: Found @ offset 60fc0 size 70000
  362 12:17:29.028082  
  363 12:17:29.033729  FMAP: Found "FLASH" version 1.1 at 1c10000.
  364 12:17:29.038169  FMAP: base = fe000000 size = 2000000 #areas = 37
  365 12:17:29.043798  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
  366 12:17:29.050725  Probing TPM I2C: done! DID_VID 0x00281ae0
  367 12:17:29.052529  Locality already claimed
  368 12:17:29.055841  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
  369 12:17:29.075399  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
  370 12:17:29.082103  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  371 12:17:29.085329  MRC cache found, size 18e0
  372 12:17:29.087089  bootmode is set to :2
  373 12:17:29.180634  CBMEM:
  374 12:17:29.184276  IMD: root @ 89fff000 254 entries.
  375 12:17:29.187408  IMD: root @ 89ffec00 62 entries.
  376 12:17:29.187992  
  377 12:17:29.190722  External stage cache:
  378 12:17:29.193684  IMD: root @ 8abff000 254 entries.
  379 12:17:29.194225  
  380 12:17:29.196748  IMD: root @ 8abfec00 62 entries.
  381 12:17:29.197008  
  382 12:17:29.202840  VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
  383 12:17:29.203097  
  384 12:17:29.207059  creating vboot_handoff structure
  385 12:17:29.227098  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
  386 12:17:29.227723  
  387 12:17:29.243241  tlcl_write: response is 0
  388 12:17:29.261795  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
  389 12:17:29.262107  
  390 12:17:29.266194  MRC: TPM MRC hash updated successfully.
  391 12:17:29.267684  1 DIMMs found
  392 12:17:29.270206  top_of_ram = 0x8a000000
  393 12:17:29.275693  MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
  394 12:17:29.279708  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  395 12:17:29.282864  CBFS @ 1d00000 size 300000
  396 12:17:29.289455  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  397 12:17:29.292255  CBFS: Locating 'fallback/postcar'
  398 12:17:29.296751  CBFS: Found @ offset 107000 size 41a4
  399 12:17:29.302383  Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
  400 12:17:29.312885  Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
  401 12:17:29.317616  Processing 126 relocs. Offset value of 0x87cdd000
  402 12:17:29.320709  
  403 12:17:29.320797  
  404 12:17:29.328808  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
  405 12:17:29.329442  
  406 12:17:29.332301  CBFS @ 1d00000 size 300000
  407 12:17:29.338875  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  408 12:17:29.342084  CBFS: Locating 'fallback/ramstage'
  409 12:17:29.346111  CBFS: Found @ offset 458c0 size 1a8a8
  410 12:17:29.352239  Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
  411 12:17:29.381334  Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
  412 12:17:29.386508  Processing 3754 relocs. Offset value of 0x88e81000
  413 12:17:29.392028  
  414 12:17:29.392311  
  415 12:17:29.392403  
  416 12:17:29.392661  
  417 12:17:29.401149  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
  418 12:17:29.405540  FMAP: Found "FLASH" version 1.1 at 1c10000.
  419 12:17:29.410687  FMAP: base = fe000000 size = 2000000 #areas = 37
  420 12:17:29.415295  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
  421 12:17:29.419392  WARNING: RO_VPD is uninitialized or empty.
  422 12:17:29.424395  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
  423 12:17:29.424679  
  424 12:17:29.429608  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
  425 12:17:29.430558  Normal boot.
  426 12:17:29.437363  BS: BS_PRE_DEVICE times (us): entry 0 run 58 exit 1161
  427 12:17:29.439658  CBFS @ 1d00000 size 300000
  428 12:17:29.446349  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  429 12:17:29.450160  CBFS: Locating 'cpu_microcode_blob.bin'
  430 12:17:29.453610  CBFS: Found @ offset 15c40 size 2fc00
  431 12:17:29.458626  microcode: sig=0x806ec pf=0x80 revision=0xb7
  432 12:17:29.460799  Skip microcode update
  433 12:17:29.463159  CBFS @ 1d00000 size 300000
  434 12:17:29.469457  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  435 12:17:29.472640  CBFS: Locating 'fsps.bin'
  436 12:17:29.476369  CBFS: Found @ offset d1fc0 size 35000
  437 12:17:29.510851  Detected 4 core, 8 thread CPU.
  438 12:17:29.511154  
  439 12:17:29.513516  Setting up SMI for CPU
  440 12:17:29.515697  IED base = 0x8ac00000
  441 12:17:29.517742  IED size = 0x00400000
  442 12:17:29.520473  Will perform SMM setup.
  443 12:17:29.525464  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
  444 12:17:29.525828  
  445 12:17:29.533205  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  446 12:17:29.537996  Processing 16 relocs. Offset value of 0x00030000
  447 12:17:29.540702  Attempting to start 7 APs
  448 12:17:29.544639  Waiting for 10ms after sending INIT.
  449 12:17:29.560705  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
  450 12:17:29.561561  done.
  451 12:17:29.564161  AP: slot 7 apic_id 4.
  452 12:17:29.565398  AP: slot 5 apic_id 5.
  453 12:17:29.565667  
  454 12:17:29.568094  AP: slot 3 apic_id 7.
  455 12:17:29.570467  AP: slot 6 apic_id 6.
  456 12:17:29.574633  Waiting for 2nd SIPI to complete...done.
  457 12:17:29.576350  AP: slot 4 apic_id 3.
  458 12:17:29.578756  AP: slot 1 apic_id 2.
  459 12:17:29.587016  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  460 12:17:29.590980  Processing 13 relocs. Offset value of 0x00038000
  461 12:17:29.591334  
  462 12:17:29.597824  SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
  463 12:17:29.602005  Installing SMM handler to 0x8a000000
  464 12:17:29.609272  Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
  465 12:17:29.615036  Processing 867 relocs. Offset value of 0x8a010000
  466 12:17:29.623565  Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
  467 12:17:29.627913  Processing 13 relocs. Offset value of 0x8a008000
  468 12:17:29.628187  
  469 12:17:29.634094  SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
  470 12:17:29.639148  SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
  471 12:17:29.639424  
  472 12:17:29.645425  SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
  473 12:17:29.650594  SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
  474 12:17:29.656759  SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
  475 12:17:29.662163  SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
  476 12:17:29.668188  SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
  477 12:17:29.674701  SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
  478 12:17:29.678211  Clearing SMI status registers
  479 12:17:29.679189  SMI_STS: PM1 
  480 12:17:29.679959  
  481 12:17:29.681893  PM1_STS: WAK PWRBTN 
  482 12:17:29.684202  TCO_STS: BOOT SECOND_TO 
  483 12:17:29.686304  GPE0 STD STS: eSPI 
  484 12:17:29.689019  New SMBASE 0x8a000000
  485 12:17:29.691436  In relocation handler: CPU 0
  486 12:17:29.695392  New SMBASE=0x8a000000 IEDBASE=0x8ac00000
  487 12:17:29.695669  
  488 12:17:29.700940  Writing SMRR. base = 0x8a000006, mask=0xff000800
  489 12:17:29.702892  Relocation complete.
  490 12:17:29.704919  New SMBASE 0x89fff800
  491 12:17:29.705416  
  492 12:17:29.707404  In relocation handler: CPU 2
  493 12:17:29.708351  
  494 12:17:29.711881  New SMBASE=0x89fff800 IEDBASE=0x8ac00000
  495 12:17:29.716492  Writing SMRR. base = 0x8a000006, mask=0xff000800
  496 12:17:29.716752  
  497 12:17:29.718627  Relocation complete.
  498 12:17:29.718886  
  499 12:17:29.721212  New SMBASE 0x89fff400
  500 12:17:29.724354  In relocation handler: CPU 3
  501 12:17:29.727850  New SMBASE=0x89fff400 IEDBASE=0x8ac00000
  502 12:17:29.728420  
  503 12:17:29.732694  Writing SMRR. base = 0x8a000006, mask=0xff000800
  504 12:17:29.735435  Relocation complete.
  505 12:17:29.737465  New SMBASE 0x89ffe800
  506 12:17:29.740540  In relocation handler: CPU 6
  507 12:17:29.740812  
  508 12:17:29.744391  New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
  509 12:17:29.744936  
  510 12:17:29.749607  Writing SMRR. base = 0x8a000006, mask=0xff000800
  511 12:17:29.751619  Relocation complete.
  512 12:17:29.753463  New SMBASE 0x89ffe400
  513 12:17:29.753983  
  514 12:17:29.756720  In relocation handler: CPU 7
  515 12:17:29.760583  New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
  516 12:17:29.765696  Writing SMRR. base = 0x8a000006, mask=0xff000800
  517 12:17:29.767474  Relocation complete.
  518 12:17:29.767741  
  519 12:17:29.769772  New SMBASE 0x89ffec00
  520 12:17:29.770219  
  521 12:17:29.773390  In relocation handler: CPU 5
  522 12:17:29.776785  New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
  523 12:17:29.781660  Writing SMRR. base = 0x8a000006, mask=0xff000800
  524 12:17:29.784120  Relocation complete.
  525 12:17:29.786583  New SMBASE 0x89fffc00
  526 12:17:29.789625  In relocation handler: CPU 1
  527 12:17:29.792952  New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
  528 12:17:29.793268  
  529 12:17:29.798661  Writing SMRR. base = 0x8a000006, mask=0xff000800
  530 12:17:29.800369  Relocation complete.
  531 12:17:29.802659  New SMBASE 0x89fff000
  532 12:17:29.805239  In relocation handler: CPU 4
  533 12:17:29.805508  
  534 12:17:29.809901  New SMBASE=0x89fff000 IEDBASE=0x8ac00000
  535 12:17:29.815260  Writing SMRR. base = 0x8a000006, mask=0xff000800
  536 12:17:29.816706  Relocation complete.
  537 12:17:29.817267  
  538 12:17:29.818637  Initializing CPU #0
  539 12:17:29.822276  CPU: vendor Intel device 806ec
  540 12:17:29.825943  CPU: family 06, model 8e, stepping 0c
  541 12:17:29.828717  Clearing out pending MCEs
  542 12:17:29.833431  Setting up local APIC... apic_id: 0x00 done.
  543 12:17:29.836053  Turbo is available but hidden
  544 12:17:29.836610  
  545 12:17:29.838474  Turbo has been enabled
  546 12:17:29.840198  VMX status: enabled
  547 12:17:29.844050  IA32_FEATURE_CONTROL status: locked
  548 12:17:29.844317  
  549 12:17:29.845773  Skip microcode update
  550 12:17:29.846088  
  551 12:17:29.848610  CPU #0 initialized
  552 12:17:29.850133  Initializing CPU #2
  553 12:17:29.852808  Initializing CPU #4
  554 12:17:29.854287  Initializing CPU #1
  555 12:17:29.857711  CPU: vendor Intel device 806ec
  556 12:17:29.861653  CPU: family 06, model 8e, stepping 0c
  557 12:17:29.861920  
  558 12:17:29.864029  CPU: vendor Intel device 806ec
  559 12:17:29.864673  
  560 12:17:29.868090  CPU: family 06, model 8e, stepping 0c
  561 12:17:29.868826  
  562 12:17:29.870643  Clearing out pending MCEs
  563 12:17:29.870908  
  564 12:17:29.873400  Clearing out pending MCEs
  565 12:17:29.877513  Setting up local APIC...Initializing CPU #6
  566 12:17:29.879952  Initializing CPU #3
  567 12:17:29.882741  CPU: vendor Intel device 806ec
  568 12:17:29.883014  
  569 12:17:29.886862  CPU: family 06, model 8e, stepping 0c
  570 12:17:29.890472  CPU: vendor Intel device 806ec
  571 12:17:29.893865  CPU: family 06, model 8e, stepping 0c
  572 12:17:29.896534  Clearing out pending MCEs
  573 12:17:29.899224  Clearing out pending MCEs
  574 12:17:29.904142  Setting up local APIC...CPU: vendor Intel device 806ec
  575 12:17:29.904428  
  576 12:17:29.908803  CPU: family 06, model 8e, stepping 0c
  577 12:17:29.910367  Initializing CPU #5
  578 12:17:29.911058  
  579 12:17:29.912004  Initializing CPU #7
  580 12:17:29.912619  
  581 12:17:29.915120  CPU: vendor Intel device 806ec
  582 12:17:29.919163  CPU: family 06, model 8e, stepping 0c
  583 12:17:29.921932  Clearing out pending MCEs
  584 12:17:29.922219  
  585 12:17:29.928376  Setting up local APIC...Setting up local APIC... apic_id: 0x07 done.
  586 12:17:29.928657  
  587 12:17:29.931283   apic_id: 0x06 done.
  588 12:17:29.932828  VMX status: enabled
  589 12:17:29.934924  VMX status: enabled
  590 12:17:29.938510  IA32_FEATURE_CONTROL status: locked
  591 12:17:29.942177  IA32_FEATURE_CONTROL status: locked
  592 12:17:29.942451  
  593 12:17:29.944764  Skip microcode update
  594 12:17:29.946252  Skip microcode update
  595 12:17:29.946645  
  596 12:17:29.948080  CPU #3 initialized
  597 12:17:29.948340  
  598 12:17:29.950771  CPU #6 initialized
  599 12:17:29.952304   apic_id: 0x03 done.
  600 12:17:29.956908  Setting up local APIC... apic_id: 0x01 done.
  601 12:17:29.957181  
  602 12:17:29.959108  VMX status: enabled
  603 12:17:29.961100   apic_id: 0x02 done.
  604 12:17:29.965039  IA32_FEATURE_CONTROL status: locked
  605 12:17:29.966499  VMX status: enabled
  606 12:17:29.966802  
  607 12:17:29.969311  Skip microcode update
  608 12:17:29.972454  IA32_FEATURE_CONTROL status: locked
  609 12:17:29.974253  CPU #4 initialized
  610 12:17:29.976810  Skip microcode update
  611 12:17:29.980141  CPU: vendor Intel device 806ec
  612 12:17:29.984093  CPU: family 06, model 8e, stepping 0c
  613 12:17:29.986083  Clearing out pending MCEs
  614 12:17:29.988669  Clearing out pending MCEs
  615 12:17:29.993494  Setting up local APIC...VMX status: enabled
  616 12:17:29.995778   apic_id: 0x05 done.
  617 12:17:30.000094  Setting up local APIC...CPU #1 initialized
  618 12:17:30.002376  VMX status: enabled
  619 12:17:30.003821   apic_id: 0x04 done.
  620 12:17:30.007723  IA32_FEATURE_CONTROL status: locked
  621 12:17:30.009351  VMX status: enabled
  622 12:17:30.009613  
  623 12:17:30.011661  Skip microcode update
  624 12:17:30.015554  IA32_FEATURE_CONTROL status: locked
  625 12:17:30.015818  
  626 12:17:30.017714  CPU #5 initialized
  627 12:17:30.019499  Skip microcode update
  628 12:17:30.023141  IA32_FEATURE_CONTROL status: locked
  629 12:17:30.024849  CPU #7 initialized
  630 12:17:30.027632  Skip microcode update
  631 12:17:30.029658  CPU #2 initialized
  632 12:17:30.033362  bsp_do_flight_plan done after 455 msecs.
  633 12:17:30.036405  CPU: frequency set to 4800 MHz
  634 12:17:30.038525  Enabling SMIs.
  635 12:17:30.039459  Locking SMM.
  636 12:17:30.039723  
  637 12:17:30.042418  CBFS @ 1d00000 size 300000
  638 12:17:30.043262  
  639 12:17:30.049218  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  640 12:17:30.051574  CBFS: Locating 'vbt.bin'
  641 12:17:30.055442  CBFS: Found @ offset 60a40 size 4a0
  642 12:17:30.060381  Found a VBT of 4608 bytes after decompression
  643 12:17:30.074243  FMAP: area GBB found @ 1c11000 (978944 bytes)
  644 12:17:30.133215  Detected 4 core, 8 thread CPU.
  645 12:17:30.136797  Detected 4 core, 8 thread CPU.
  646 12:17:30.363974  Display FSP Version Info HOB
  647 12:17:30.366320  Reference Code - CPU = 7.0.5e.40
  648 12:17:30.367041  
  649 12:17:30.368932  uCode Version = 0.0.0.b8
  650 12:17:30.369238  
  651 12:17:30.371847  Display FSP Version Info HOB
  652 12:17:30.372462  
  653 12:17:30.375297  Reference Code - ME = 7.0.5e.40
  654 12:17:30.375616  
  655 12:17:30.377955  MEBx version = 0.0.0.0
  656 12:17:30.381110  ME Firmware Version = Consumer SKU
  657 12:17:30.384233  Display FSP Version Info HOB
  658 12:17:30.388139  Reference Code - CNL PCH = 7.0.5e.40
  659 12:17:30.390428  PCH-CRID Status = Disabled
  660 12:17:30.390790  
  661 12:17:30.394170  CNL PCH H A0 Hsio Version = 2.0.0.0
  662 12:17:30.398113  CNL PCH H Ax Hsio Version = 9.0.0.0
  663 12:17:30.398793  
  664 12:17:30.401186  CNL PCH H Bx Hsio Version = a.0.0.0
  665 12:17:30.405507  CNL PCH LP B0 Hsio Version = 7.0.0.0
  666 12:17:30.408841  CNL PCH LP Bx Hsio Version = 6.0.0.0
  667 12:17:30.409165  
  668 12:17:30.413202  CNL PCH LP Dx Hsio Version = 7.0.0.0
  669 12:17:30.415855  Display FSP Version Info HOB
  670 12:17:30.420382  Reference Code - SA - System Agent = 7.0.5e.40
  671 12:17:30.423544  Reference Code - MRC = 0.7.1.68
  672 12:17:30.426170  SA - PCIe Version = 7.0.5e.40
  673 12:17:30.426438  
  674 12:17:30.429007  SA-CRID Status = Disabled
  675 12:17:30.432146  SA-CRID Original Value = 0.0.0.c
  676 12:17:30.432413  
  677 12:17:30.434991  SA-CRID New Value = 0.0.0.c
  678 12:17:30.435534  
  679 12:17:30.453856  RTC Init
  680 12:17:30.457767  Set power off after power failure.
  681 12:17:30.459343  Disabling Deep S3
  682 12:17:30.461358  Disabling Deep S3
  683 12:17:30.463281  Disabling Deep S4
  684 12:17:30.465082  Disabling Deep S4
  685 12:17:30.465344  
  686 12:17:30.466402  Disabling Deep S5
  687 12:17:30.468703  Disabling Deep S5
  688 12:17:30.468963  
  689 12:17:30.475239  BS: BS_DEV_INIT_CHIPS times (us): entry 602596 run 412551 exit 16238
  690 12:17:30.477247  Enumerating buses...
  691 12:17:30.482135  Show all devs... Before device enumeration.
  692 12:17:30.484256  Root Device: enabled 1
  693 12:17:30.484740  
  694 12:17:30.486933  CPU_CLUSTER: 0: enabled 1
  695 12:17:30.489430  DOMAIN: 0000: enabled 1
  696 12:17:30.491601  APIC: 00: enabled 1
  697 12:17:30.493568  PCI: 00:00.0: enabled 1
  698 12:17:30.494244  
  699 12:17:30.495918  PCI: 00:02.0: enabled 1
  700 12:17:30.498718  PCI: 00:04.0: enabled 1
  701 12:17:30.501024  PCI: 00:12.0: enabled 1
  702 12:17:30.503260  PCI: 00:12.5: enabled 0
  703 12:17:30.503535  
  704 12:17:30.506284  PCI: 00:12.6: enabled 0
  705 12:17:30.508822  PCI: 00:13.0: enabled 0
  706 12:17:30.510657  PCI: 00:14.0: enabled 1
  707 12:17:30.513490  PCI: 00:14.1: enabled 0
  708 12:17:30.516121  PCI: 00:14.3: enabled 1
  709 12:17:30.518058  PCI: 00:14.5: enabled 0
  710 12:17:30.520243  PCI: 00:15.0: enabled 1
  711 12:17:30.520805  
  712 12:17:30.523519  PCI: 00:15.1: enabled 1
  713 12:17:30.525231  PCI: 00:15.2: enabled 0
  714 12:17:30.525713  
  715 12:17:30.527848  PCI: 00:15.3: enabled 0
  716 12:17:30.530630  PCI: 00:16.0: enabled 1
  717 12:17:30.532576  PCI: 00:16.1: enabled 0
  718 12:17:30.532856  
  719 12:17:30.534852  PCI: 00:16.2: enabled 0
  720 12:17:30.535116  
  721 12:17:30.537710  PCI: 00:16.3: enabled 0
  722 12:17:30.538270  
  723 12:17:30.539689  PCI: 00:16.4: enabled 0
  724 12:17:30.540313  
  725 12:17:30.542401  PCI: 00:16.5: enabled 0
  726 12:17:30.542690  
  727 12:17:30.545056  PCI: 00:17.0: enabled 1
  728 12:17:30.547253  PCI: 00:19.0: enabled 1
  729 12:17:30.549560  PCI: 00:19.1: enabled 0
  730 12:17:30.549987  
  731 12:17:30.552096  PCI: 00:19.2: enabled 1
  732 12:17:30.554742  PCI: 00:1a.0: enabled 0
  733 12:17:30.557639  PCI: 00:1c.0: enabled 1
  734 12:17:30.560099  PCI: 00:1c.1: enabled 0
  735 12:17:30.561705  PCI: 00:1c.2: enabled 0
  736 12:17:30.564757  PCI: 00:1c.3: enabled 0
  737 12:17:30.566501  PCI: 00:1c.4: enabled 0
  738 12:17:30.566806  
  739 12:17:30.569285  PCI: 00:1c.5: enabled 0
  740 12:17:30.571666  PCI: 00:1c.6: enabled 0
  741 12:17:30.571935  
  742 12:17:30.574220  PCI: 00:1c.7: enabled 1
  743 12:17:30.576673  PCI: 00:1d.0: enabled 1
  744 12:17:30.578741  PCI: 00:1d.1: enabled 1
  745 12:17:30.581479  PCI: 00:1d.2: enabled 0
  746 12:17:30.583969  PCI: 00:1d.3: enabled 0
  747 12:17:30.586307  PCI: 00:1d.4: enabled 1
  748 12:17:30.588407  PCI: 00:1e.0: enabled 0
  749 12:17:30.591300  PCI: 00:1e.1: enabled 0
  750 12:17:30.593179  PCI: 00:1e.2: enabled 0
  751 12:17:30.593718  
  752 12:17:30.596393  PCI: 00:1e.3: enabled 0
  753 12:17:30.598544  PCI: 00:1f.0: enabled 1
  754 12:17:30.599104  
  755 12:17:30.601002  PCI: 00:1f.1: enabled 1
  756 12:17:30.603348  PCI: 00:1f.2: enabled 1
  757 12:17:30.605330  PCI: 00:1f.3: enabled 1
  758 12:17:30.605610  
  759 12:17:30.608239  PCI: 00:1f.4: enabled 1
  760 12:17:30.610494  PCI: 00:1f.5: enabled 1
  761 12:17:30.610773  
  762 12:17:30.613373  PCI: 00:1f.6: enabled 1
  763 12:17:30.613659  
  764 12:17:30.614944  USB0 port 0: enabled 1
  765 12:17:30.615232  
  766 12:17:30.617298  I2C: 00:10: enabled 1
  767 12:17:30.618183  
  768 12:17:30.619391  I2C: 00:10: enabled 1
  769 12:17:30.619665  
  770 12:17:30.621862  I2C: 00:34: enabled 1
  771 12:17:30.623830  I2C: 00:2c: enabled 1
  772 12:17:30.624100  
  773 12:17:30.626611  I2C: 00:50: enabled 1
  774 12:17:30.629154  PNP: 0c09.0: enabled 1
  775 12:17:30.631398  USB2 port 0: enabled 1
  776 12:17:30.633466  USB2 port 1: enabled 1
  777 12:17:30.635561  USB2 port 2: enabled 1
  778 12:17:30.637723  USB2 port 4: enabled 1
  779 12:17:30.638249  
  780 12:17:30.640437  USB2 port 5: enabled 1
  781 12:17:30.641011  
  782 12:17:30.642589  USB2 port 6: enabled 1
  783 12:17:30.643105  
  784 12:17:30.644880  USB2 port 7: enabled 1
  785 12:17:30.645153  
  786 12:17:30.647665  USB2 port 8: enabled 1
  787 12:17:30.649716  USB2 port 9: enabled 1
  788 12:17:30.649976  
  789 12:17:30.651728  USB3 port 0: enabled 1
  790 12:17:30.652260  
  791 12:17:30.654070  USB3 port 1: enabled 1
  792 12:17:30.654408  
  793 12:17:30.657106  USB3 port 2: enabled 1
  794 12:17:30.659317  USB3 port 3: enabled 1
  795 12:17:30.661512  USB3 port 4: enabled 1
  796 12:17:30.663182  APIC: 02: enabled 1
  797 12:17:30.665765  APIC: 01: enabled 1
  798 12:17:30.667631  APIC: 07: enabled 1
  799 12:17:30.669457  APIC: 03: enabled 1
  800 12:17:30.671621  APIC: 05: enabled 1
  801 12:17:30.673877  APIC: 06: enabled 1
  802 12:17:30.675570  APIC: 04: enabled 1
  803 12:17:30.677883  Compare with tree...
  804 12:17:30.679923  Root Device: enabled 1
  805 12:17:30.682703   CPU_CLUSTER: 0: enabled 1
  806 12:17:30.685251    APIC: 00: enabled 1
  807 12:17:30.685801  
  808 12:17:30.687252    APIC: 02: enabled 1
  809 12:17:30.689360    APIC: 01: enabled 1
  810 12:17:30.691905    APIC: 07: enabled 1
  811 12:17:30.694263    APIC: 03: enabled 1
  812 12:17:30.696059    APIC: 05: enabled 1
  813 12:17:30.698828    APIC: 06: enabled 1
  814 12:17:30.699116  
  815 12:17:30.701007    APIC: 04: enabled 1
  816 12:17:30.703701   DOMAIN: 0000: enabled 1
  817 12:17:30.704042  
  818 12:17:30.705621    PCI: 00:00.0: enabled 1
  819 12:17:30.706221  
  820 12:17:30.708482    PCI: 00:02.0: enabled 1
  821 12:17:30.711166    PCI: 00:04.0: enabled 1
  822 12:17:30.713663    PCI: 00:12.0: enabled 1
  823 12:17:30.716505    PCI: 00:12.5: enabled 0
  824 12:17:30.717032  
  825 12:17:30.719712    PCI: 00:12.6: enabled 0
  826 12:17:30.721951    PCI: 00:13.0: enabled 0
  827 12:17:30.722246  
  828 12:17:30.724327    PCI: 00:14.0: enabled 1
  829 12:17:30.727222     USB0 port 0: enabled 1
  830 12:17:30.729851      USB2 port 0: enabled 1
  831 12:17:30.730112  
  832 12:17:30.732354      USB2 port 1: enabled 1
  833 12:17:30.735059      USB2 port 2: enabled 1
  834 12:17:30.738090      USB2 port 4: enabled 1
  835 12:17:30.738363  
  836 12:17:30.740658      USB2 port 5: enabled 1
  837 12:17:30.740933  
  838 12:17:30.743352      USB2 port 6: enabled 1
  839 12:17:30.744006  
  840 12:17:30.745998      USB2 port 7: enabled 1
  841 12:17:30.746479  
  842 12:17:30.748956      USB2 port 8: enabled 1
  843 12:17:30.749239  
  844 12:17:30.751319      USB2 port 9: enabled 1
  845 12:17:30.754298      USB3 port 0: enabled 1
  846 12:17:30.754607  
  847 12:17:30.756779      USB3 port 1: enabled 1
  848 12:17:30.759715      USB3 port 2: enabled 1
  849 12:17:30.760027  
  850 12:17:30.762639      USB3 port 3: enabled 1
  851 12:17:30.765483      USB3 port 4: enabled 1
  852 12:17:30.767823    PCI: 00:14.1: enabled 0
  853 12:17:30.770418    PCI: 00:14.3: enabled 1
  854 12:17:30.773201    PCI: 00:14.5: enabled 0
  855 12:17:30.773471  
  856 12:17:30.775889    PCI: 00:15.0: enabled 1
  857 12:17:30.778581     I2C: 00:10: enabled 1
  858 12:17:30.781004     I2C: 00:10: enabled 1
  859 12:17:30.782888     I2C: 00:34: enabled 1
  860 12:17:30.783157  
  861 12:17:30.785876    PCI: 00:15.1: enabled 1
  862 12:17:30.788530     I2C: 00:2c: enabled 1
  863 12:17:30.790559    PCI: 00:15.2: enabled 0
  864 12:17:30.790861  
  865 12:17:30.793783    PCI: 00:15.3: enabled 0
  866 12:17:30.796409    PCI: 00:16.0: enabled 1
  867 12:17:30.798594    PCI: 00:16.1: enabled 0
  868 12:17:30.802187    PCI: 00:16.2: enabled 0
  869 12:17:30.803830    PCI: 00:16.3: enabled 0
  870 12:17:30.804110  
  871 12:17:30.806975    PCI: 00:16.4: enabled 0
  872 12:17:30.807253  
  873 12:17:30.809563    PCI: 00:16.5: enabled 0
  874 12:17:30.812455    PCI: 00:17.0: enabled 1
  875 12:17:30.814588    PCI: 00:19.0: enabled 1
  876 12:17:30.815092  
  877 12:17:30.816889     I2C: 00:50: enabled 1
  878 12:17:30.819512    PCI: 00:19.1: enabled 0
  879 12:17:30.822345    PCI: 00:19.2: enabled 1
  880 12:17:30.825328    PCI: 00:1a.0: enabled 0
  881 12:17:30.825603  
  882 12:17:30.827744    PCI: 00:1c.0: enabled 1
  883 12:17:30.828048  
  884 12:17:30.830208    PCI: 00:1c.1: enabled 0
  885 12:17:30.830464  
  886 12:17:30.832582    PCI: 00:1c.2: enabled 0
  887 12:17:30.832835  
  888 12:17:30.835723    PCI: 00:1c.3: enabled 0
  889 12:17:30.837944    PCI: 00:1c.4: enabled 0
  890 12:17:30.840386    PCI: 00:1c.5: enabled 0
  891 12:17:30.840639  
  892 12:17:30.843514    PCI: 00:1c.6: enabled 0
  893 12:17:30.846604    PCI: 00:1c.7: enabled 1
  894 12:17:30.848290    PCI: 00:1d.0: enabled 1
  895 12:17:30.848545  
  896 12:17:30.851463    PCI: 00:1d.1: enabled 1
  897 12:17:30.854478    PCI: 00:1d.2: enabled 0
  898 12:17:30.856238    PCI: 00:1d.3: enabled 0
  899 12:17:30.858846    PCI: 00:1d.4: enabled 1
  900 12:17:30.859108  
  901 12:17:30.861927    PCI: 00:1e.0: enabled 0
  902 12:17:30.864580    PCI: 00:1e.1: enabled 0
  903 12:17:30.867069    PCI: 00:1e.2: enabled 0
  904 12:17:30.869683    PCI: 00:1e.3: enabled 0
  905 12:17:30.871986    PCI: 00:1f.0: enabled 1
  906 12:17:30.872735  
  907 12:17:30.875048     PNP: 0c09.0: enabled 1
  908 12:17:30.877448    PCI: 00:1f.1: enabled 1
  909 12:17:30.880257    PCI: 00:1f.2: enabled 1
  910 12:17:30.882934    PCI: 00:1f.3: enabled 1
  911 12:17:30.885516    PCI: 00:1f.4: enabled 1
  912 12:17:30.887915    PCI: 00:1f.5: enabled 1
  913 12:17:30.890855    PCI: 00:1f.6: enabled 1
  914 12:17:30.892863  Root Device scanning...
  915 12:17:30.896691  root_dev_scan_bus for Root Device
  916 12:17:30.898643  CPU_CLUSTER: 0 enabled
  917 12:17:30.898914  
  918 12:17:30.901028  DOMAIN: 0000 enabled
  919 12:17:30.903791  DOMAIN: 0000 scanning...
  920 12:17:30.904380  
  921 12:17:30.906754  PCI: pci_scan_bus for bus 00
  922 12:17:30.909786  PCI: 00:00.0 [8086/0000] ops
  923 12:17:30.913877  PCI: 00:00.0 [8086/3e34] enabled
  924 12:17:30.916117  PCI: 00:02.0 [8086/0000] ops
  925 12:17:30.919325  PCI: 00:02.0 [8086/3ea0] enabled
  926 12:17:30.922995  PCI: 00:04.0 [8086/1903] enabled
  927 12:17:30.926462  PCI: 00:08.0 [8086/1911] enabled
  928 12:17:30.929685  PCI: 00:12.0 [8086/9df9] enabled
  929 12:17:30.932983  PCI: 00:14.0 [8086/0000] bus ops
  930 12:17:30.933507  
  931 12:17:30.935958  PCI: 00:14.0 [8086/9ded] enabled
  932 12:17:30.936224  
  933 12:17:30.940042  PCI: 00:14.2 [8086/9def] enabled
  934 12:17:30.943338  PCI: 00:14.3 [8086/9df0] enabled
  935 12:17:30.946175  PCI: 00:15.0 [8086/0000] bus ops
  936 12:17:30.949136  PCI: 00:15.0 [8086/9de8] enabled
  937 12:17:30.949684  
  938 12:17:30.952890  PCI: 00:15.1 [8086/0000] bus ops
  939 12:17:30.956251  PCI: 00:15.1 [8086/9de9] enabled
  940 12:17:30.958761  PCI: 00:16.0 [8086/0000] ops
  941 12:17:30.962553  PCI: 00:16.0 [8086/9de0] enabled
  942 12:17:30.965255  PCI: 00:17.0 [8086/0000] ops
  943 12:17:30.969083  PCI: 00:17.0 [8086/9dd3] enabled
  944 12:17:30.971799  PCI: 00:19.0 [8086/0000] bus ops
  945 12:17:30.972086  
  946 12:17:30.975247  PCI: 00:19.0 [8086/9dc5] enabled
  947 12:17:30.978241  PCI: 00:19.2 [8086/0000] ops
  948 12:17:30.981875  PCI: 00:19.2 [8086/9dc7] enabled
  949 12:17:30.984501  PCI: 00:1c.0 [8086/0000] bus ops
  950 12:17:30.985113  
  951 12:17:30.988028  PCI: 00:1c.0 [8086/9dbf] enabled
  952 12:17:30.993925  PCI: Static device PCI: 00:1c.7 not found, disabling it.
  953 12:17:30.997264  PCI: 00:1d.0 [8086/0000] bus ops
  954 12:17:31.000260  PCI: 00:1d.0 [8086/9db4] enabled
  955 12:17:31.000521  
  956 12:17:31.006223  PCI: Static device PCI: 00:1d.1 not found, disabling it.
  957 12:17:31.011434  PCI: Static device PCI: 00:1d.4 not found, disabling it.
  958 12:17:31.011798  
  959 12:17:31.015294  PCI: 00:1f.0 [8086/0000] bus ops
  960 12:17:31.015843  
  961 12:17:31.018508  PCI: 00:1f.0 [8086/9d84] enabled
  962 12:17:31.018783  
  963 12:17:31.024304  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  964 12:17:31.024971  
  965 12:17:31.030412  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  966 12:17:31.033498  PCI: 00:1f.3 [8086/0000] bus ops
  967 12:17:31.036100  PCI: 00:1f.3 [8086/9dc8] enabled
  968 12:17:31.036618  
  969 12:17:31.040048  PCI: 00:1f.4 [8086/0000] bus ops
  970 12:17:31.043068  PCI: 00:1f.4 [8086/9da3] enabled
  971 12:17:31.043829  
  972 12:17:31.046375  PCI: 00:1f.5 [8086/0000] bus ops
  973 12:17:31.049555  PCI: 00:1f.5 [8086/9da4] enabled
  974 12:17:31.050134  
  975 12:17:31.053441  PCI: 00:1f.6 [8086/15be] enabled
  976 12:17:31.056132  PCI: Leftover static devices:
  977 12:17:31.057466  PCI: 00:12.5
  978 12:17:31.058569  PCI: 00:12.6
  979 12:17:31.060572  PCI: 00:13.0
  980 12:17:31.061299  PCI: 00:14.1
  981 12:17:31.063046  PCI: 00:14.5
  982 12:17:31.063910  PCI: 00:15.2
  983 12:17:31.065655  PCI: 00:15.3
  984 12:17:31.066631  PCI: 00:16.1
  985 12:17:31.066884  
  986 12:17:31.068069  PCI: 00:16.2
  987 12:17:31.068707  
  988 12:17:31.069830  PCI: 00:16.3
  989 12:17:31.070825  PCI: 00:16.4
  990 12:17:31.072279  PCI: 00:16.5
  991 12:17:31.073353  PCI: 00:19.1
  992 12:17:31.074748  PCI: 00:1a.0
  993 12:17:31.075340  
  994 12:17:31.076463  PCI: 00:1c.1
  995 12:17:31.078438  PCI: 00:1c.2
  996 12:17:31.078903  PCI: 00:1c.3
  997 12:17:31.079165  
  998 12:17:31.080604  PCI: 00:1c.4
  999 12:17:31.081276  
 1000 12:17:31.081718  PCI: 00:1c.5
 1001 12:17:31.081979  
 1002 12:17:31.082733  PCI: 00:1c.6
 1003 12:17:31.083007  
 1004 12:17:31.084439  PCI: 00:1c.7
 1005 12:17:31.085723  PCI: 00:1d.1
 1006 12:17:31.087669  PCI: 00:1d.2
 1007 12:17:31.088727  PCI: 00:1d.3
 1008 12:17:31.089780  PCI: 00:1d.4
 1009 12:17:31.090057  
 1010 12:17:31.091864  PCI: 00:1e.0
 1011 12:17:31.092810  PCI: 00:1e.1
 1012 12:17:31.093920  PCI: 00:1e.2
 1013 12:17:31.095727  PCI: 00:1e.3
 1014 12:17:31.096654  PCI: 00:1f.1
 1015 12:17:31.096960  
 1016 12:17:31.098245  PCI: 00:1f.2
 1017 12:17:31.100943  PCI: Check your devicetree.cb.
 1018 12:17:31.101711  
 1019 12:17:31.103796  PCI: 00:14.0 scanning...
 1020 12:17:31.104070  
 1021 12:17:31.107346  scan_usb_bus for PCI: 00:14.0
 1022 12:17:31.107615  
 1023 12:17:31.108919  USB0 port 0 enabled
 1024 12:17:31.109402  
 1025 12:17:31.111686  USB0 port 0 scanning...
 1026 12:17:31.114578  scan_usb_bus for USB0 port 0
 1027 12:17:31.117216  USB2 port 0 enabled
 1028 12:17:31.119414  USB2 port 1 enabled
 1029 12:17:31.120725  USB2 port 2 enabled
 1030 12:17:31.120979  
 1031 12:17:31.122829  USB2 port 4 enabled
 1032 12:17:31.123104  
 1033 12:17:31.125485  USB2 port 5 enabled
 1034 12:17:31.126966  USB2 port 6 enabled
 1035 12:17:31.129027  USB2 port 7 enabled
 1036 12:17:31.131399  USB2 port 8 enabled
 1037 12:17:31.133385  USB2 port 9 enabled
 1038 12:17:31.135325  USB3 port 0 enabled
 1039 12:17:31.135925  
 1040 12:17:31.137172  USB3 port 1 enabled
 1041 12:17:31.139298  USB3 port 2 enabled
 1042 12:17:31.141297  USB3 port 3 enabled
 1043 12:17:31.141947  
 1044 12:17:31.143265  USB3 port 4 enabled
 1045 12:17:31.143519  
 1046 12:17:31.145688  USB2 port 0 scanning...
 1047 12:17:31.145939  
 1048 12:17:31.148892  scan_usb_bus for USB2 port 0
 1049 12:17:31.149442  
 1050 12:17:31.152777  scan_usb_bus for USB2 port 0 done
 1051 12:17:31.158451  scan_bus: scanning of bus USB2 port 0 took 9062 usecs
 1052 12:17:31.160522  USB2 port 1 scanning...
 1053 12:17:31.163436  scan_usb_bus for USB2 port 1
 1054 12:17:31.167158  scan_usb_bus for USB2 port 1 done
 1055 12:17:31.172092  scan_bus: scanning of bus USB2 port 1 took 9062 usecs
 1056 12:17:31.172365  
 1057 12:17:31.174464  USB2 port 2 scanning...
 1058 12:17:31.178085  scan_usb_bus for USB2 port 2
 1059 12:17:31.181401  scan_usb_bus for USB2 port 2 done
 1060 12:17:31.181672  
 1061 12:17:31.186744  scan_bus: scanning of bus USB2 port 2 took 9061 usecs
 1062 12:17:31.187236  
 1063 12:17:31.189167  USB2 port 4 scanning...
 1064 12:17:31.192659  scan_usb_bus for USB2 port 4
 1065 12:17:31.192932  
 1066 12:17:31.195638  scan_usb_bus for USB2 port 4 done
 1067 12:17:31.201232  scan_bus: scanning of bus USB2 port 4 took 9061 usecs
 1068 12:17:31.201742  
 1069 12:17:31.203170  USB2 port 5 scanning...
 1070 12:17:31.203435  
 1071 12:17:31.206740  scan_usb_bus for USB2 port 5
 1072 12:17:31.210689  scan_usb_bus for USB2 port 5 done
 1073 12:17:31.215445  scan_bus: scanning of bus USB2 port 5 took 9063 usecs
 1074 12:17:31.218078  USB2 port 6 scanning...
 1075 12:17:31.221384  scan_usb_bus for USB2 port 6
 1076 12:17:31.224292  scan_usb_bus for USB2 port 6 done
 1077 12:17:31.224606  
 1078 12:17:31.230112  scan_bus: scanning of bus USB2 port 6 took 9061 usecs
 1079 12:17:31.232015  USB2 port 7 scanning...
 1080 12:17:31.235624  scan_usb_bus for USB2 port 7
 1081 12:17:31.239772  scan_usb_bus for USB2 port 7 done
 1082 12:17:31.244556  scan_bus: scanning of bus USB2 port 7 took 9060 usecs
 1083 12:17:31.246674  USB2 port 8 scanning...
 1084 12:17:31.247214  
 1085 12:17:31.250031  scan_usb_bus for USB2 port 8
 1086 12:17:31.253221  scan_usb_bus for USB2 port 8 done
 1087 12:17:31.258474  scan_bus: scanning of bus USB2 port 8 took 9061 usecs
 1088 12:17:31.261360  USB2 port 9 scanning...
 1089 12:17:31.264613  scan_usb_bus for USB2 port 9
 1090 12:17:31.267933  scan_usb_bus for USB2 port 9 done
 1091 12:17:31.272923  scan_bus: scanning of bus USB2 port 9 took 9060 usecs
 1092 12:17:31.273504  
 1093 12:17:31.275593  USB3 port 0 scanning...
 1094 12:17:31.276023  
 1095 12:17:31.278434  scan_usb_bus for USB3 port 0
 1096 12:17:31.278731  
 1097 12:17:31.282055  scan_usb_bus for USB3 port 0 done
 1098 12:17:31.282395  
 1099 12:17:31.287762  scan_bus: scanning of bus USB3 port 0 took 9060 usecs
 1100 12:17:31.290316  USB3 port 1 scanning...
 1101 12:17:31.293177  scan_usb_bus for USB3 port 1
 1102 12:17:31.296462  scan_usb_bus for USB3 port 1 done
 1103 12:17:31.302237  scan_bus: scanning of bus USB3 port 1 took 9060 usecs
 1104 12:17:31.302765  
 1105 12:17:31.304521  USB3 port 2 scanning...
 1106 12:17:31.304794  
 1107 12:17:31.307560  scan_usb_bus for USB3 port 2
 1108 12:17:31.310878  scan_usb_bus for USB3 port 2 done
 1109 12:17:31.316182  scan_bus: scanning of bus USB3 port 2 took 9060 usecs
 1110 12:17:31.316790  
 1111 12:17:31.318417  USB3 port 3 scanning...
 1112 12:17:31.322753  scan_usb_bus for USB3 port 3
 1113 12:17:31.325339  scan_usb_bus for USB3 port 3 done
 1114 12:17:31.331051  scan_bus: scanning of bus USB3 port 3 took 9061 usecs
 1115 12:17:31.331322  
 1116 12:17:31.333578  USB3 port 4 scanning...
 1117 12:17:31.336649  scan_usb_bus for USB3 port 4
 1118 12:17:31.339887  scan_usb_bus for USB3 port 4 done
 1119 12:17:31.340444  
 1120 12:17:31.345003  scan_bus: scanning of bus USB3 port 4 took 9062 usecs
 1121 12:17:31.345277  
 1122 12:17:31.348979  scan_usb_bus for USB0 port 0 done
 1123 12:17:31.353697  scan_bus: scanning of bus USB0 port 0 took 239324 usecs
 1124 12:17:31.354035  
 1125 12:17:31.357641  scan_usb_bus for PCI: 00:14.0 done
 1126 12:17:31.363607  scan_bus: scanning of bus PCI: 00:14.0 took 256259 usecs
 1127 12:17:31.365649  PCI: 00:15.0 scanning...
 1128 12:17:31.370050  scan_generic_bus for PCI: 00:15.0
 1129 12:17:31.373447  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
 1130 12:17:31.377783  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
 1131 12:17:31.381429  bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
 1132 12:17:31.381702  
 1133 12:17:31.385947  scan_generic_bus for PCI: 00:15.0 done
 1134 12:17:31.390809  scan_bus: scanning of bus PCI: 00:15.0 took 22386 usecs
 1135 12:17:31.393908  PCI: 00:15.1 scanning...
 1136 12:17:31.397762  scan_generic_bus for PCI: 00:15.1
 1137 12:17:31.401286  bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
 1138 12:17:31.405928  scan_generic_bus for PCI: 00:15.1 done
 1139 12:17:31.410666  scan_bus: scanning of bus PCI: 00:15.1 took 14216 usecs
 1140 12:17:31.413530  PCI: 00:19.0 scanning...
 1141 12:17:31.417253  scan_generic_bus for PCI: 00:19.0
 1142 12:17:31.417820  
 1143 12:17:31.421455  bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
 1144 12:17:31.421747  
 1145 12:17:31.424948  scan_generic_bus for PCI: 00:19.0 done
 1146 12:17:31.425316  
 1147 12:17:31.430693  scan_bus: scanning of bus PCI: 00:19.0 took 14215 usecs
 1148 12:17:31.433453  PCI: 00:1c.0 scanning...
 1149 12:17:31.436821  do_pci_scan_bridge for PCI: 00:1c.0
 1150 12:17:31.437312  
 1151 12:17:31.440427  PCI: pci_scan_bus for bus 01
 1152 12:17:31.443483  PCI: 01:00.0 [10ec/525a] enabled
 1153 12:17:31.446432  Capability: type 0x01 @ 0x80
 1154 12:17:31.449310  Capability: type 0x05 @ 0x90
 1155 12:17:31.452866  Capability: type 0x10 @ 0xb0
 1156 12:17:31.454965  Capability: type 0x10 @ 0x40
 1157 12:17:31.455228  
 1158 12:17:31.459249  Enabling Common Clock Configuration
 1159 12:17:31.463506  L1 Sub-State supported from root port 28
 1160 12:17:31.465564  L1 Sub-State Support = 0xf
 1161 12:17:31.465824  
 1162 12:17:31.468563  CommonModeRestoreTime = 0x3c
 1163 12:17:31.473102  Power On Value = 0x6, Power On Scale = 0x1
 1164 12:17:31.475567  ASPM: Enabled L0s and L1
 1165 12:17:31.478984  Capability: type 0x01 @ 0x80
 1166 12:17:31.481301  Capability: type 0x05 @ 0x90
 1167 12:17:31.484011  Capability: type 0x10 @ 0xb0
 1168 12:17:31.489759  scan_bus: scanning of bus PCI: 00:1c.0 took 53676 usecs
 1169 12:17:31.492107  PCI: 00:1d.0 scanning...
 1170 12:17:31.492766  
 1171 12:17:31.496194  do_pci_scan_bridge for PCI: 00:1d.0
 1172 12:17:31.499232  PCI: pci_scan_bus for bus 02
 1173 12:17:31.503002  PCI: 02:00.0 [1217/8620] enabled
 1174 12:17:31.505712  Capability: type 0x01 @ 0x6c
 1175 12:17:31.505985  
 1176 12:17:31.508807  Capability: type 0x05 @ 0x48
 1177 12:17:31.511917  Capability: type 0x10 @ 0x80
 1178 12:17:31.514670  Capability: type 0x10 @ 0x40
 1179 12:17:31.519158  L1 Sub-State supported from root port 29
 1180 12:17:31.521276  L1 Sub-State Support = 0xf
 1181 12:17:31.522077  
 1182 12:17:31.524389  CommonModeRestoreTime = 0x78
 1183 12:17:31.524671  
 1184 12:17:31.529119  Power On Value = 0x16, Power On Scale = 0x0
 1185 12:17:31.531334  ASPM: Enabled L1
 1186 12:17:31.535217  Capability: type 0x01 @ 0x6c
 1187 12:17:31.539558  Capability: type 0x05 @ 0x48
 1188 12:17:31.544118  Capability: type 0x10 @ 0x80
 1189 12:17:31.551721  scan_bus: scanning of bus PCI: 00:1d.0 took 56028 usecs
 1190 12:17:31.553942  PCI: 00:1f.0 scanning...
 1191 12:17:31.557378  scan_lpc_bus for PCI: 00:1f.0
 1192 12:17:31.559046  PNP: 0c09.0 enabled
 1193 12:17:31.563131  scan_lpc_bus for PCI: 00:1f.0 done
 1194 12:17:31.568462  scan_bus: scanning of bus PCI: 00:1f.0 took 11399 usecs
 1195 12:17:31.570915  PCI: 00:1f.3 scanning...
 1196 12:17:31.576710  scan_bus: scanning of bus PCI: 00:1f.3 took 2842 usecs
 1197 12:17:31.579066  PCI: 00:1f.4 scanning...
 1198 12:17:31.582678  scan_generic_bus for PCI: 00:1f.4
 1199 12:17:31.582956  
 1200 12:17:31.586507  scan_generic_bus for PCI: 00:1f.4 done
 1201 12:17:31.592489  scan_bus: scanning of bus PCI: 00:1f.4 took 10133 usecs
 1202 12:17:31.595196  PCI: 00:1f.5 scanning...
 1203 12:17:31.598966  scan_generic_bus for PCI: 00:1f.5
 1204 12:17:31.602069  scan_generic_bus for PCI: 00:1f.5 done
 1205 12:17:31.602415  
 1206 12:17:31.607943  scan_bus: scanning of bus PCI: 00:1f.5 took 10130 usecs
 1207 12:17:31.613808  scan_bus: scanning of bus DOMAIN: 0000 took 706849 usecs
 1208 12:17:31.617431  root_dev_scan_bus for Root Device done
 1209 12:17:31.622717  scan_bus: scanning of bus Root Device took 726992 usecs
 1210 12:17:31.622985  
 1211 12:17:31.624479  done
 1212 12:17:31.629929  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
 1213 12:17:31.635675  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1214 12:17:31.635944  
 1215 12:17:31.644429  SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
 1216 12:17:31.650262  FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
 1217 12:17:31.654460  SPI flash protection: WPSW=1 SRP0=1
 1218 12:17:31.661118  fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
 1219 12:17:31.661389  
 1220 12:17:31.666611  MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
 1221 12:17:31.673339  BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148790 exit 42596
 1222 12:17:31.675750  found VGA at PCI: 00:02.0
 1223 12:17:31.679004  Setting up VGA for PCI: 00:02.0
 1224 12:17:31.684148  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1225 12:17:31.689082  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1226 12:17:31.689722  
 1227 12:17:31.691338  Allocating resources...
 1228 12:17:31.693550  Reading resources...
 1229 12:17:31.697886  Root Device read_resources bus 0 link: 0
 1230 12:17:31.702230  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1231 12:17:31.702551  
 1232 12:17:31.707592  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1233 12:17:31.712450  DOMAIN: 0000 read_resources bus 0 link: 0
 1234 12:17:31.718127  PCI: 00:14.0 read_resources bus 0 link: 0
 1235 12:17:31.722649  USB0 port 0 read_resources bus 0 link: 0
 1236 12:17:31.732004  USB0 port 0 read_resources bus 0 link: 0 done
 1237 12:17:31.736759  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1238 12:17:31.742010  PCI: 00:15.0 read_resources bus 1 link: 0
 1239 12:17:31.748559  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1240 12:17:31.752541  PCI: 00:15.1 read_resources bus 2 link: 0
 1241 12:17:31.757901  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1242 12:17:31.763058  PCI: 00:19.0 read_resources bus 3 link: 0
 1243 12:17:31.768682  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1244 12:17:31.773759  PCI: 00:1c.0 read_resources bus 1 link: 0
 1245 12:17:31.779278  PCI: 00:1c.0 read_resources bus 1 link: 0 done
 1246 12:17:31.782942  PCI: 00:1d.0 read_resources bus 2 link: 0
 1247 12:17:31.783716  
 1248 12:17:31.790748  PCI: 00:1d.0 read_resources bus 2 link: 0 done
 1249 12:17:31.795545  PCI: 00:1f.0 read_resources bus 0 link: 0
 1250 12:17:31.800301  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1251 12:17:31.806866  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1252 12:17:31.812048  Root Device read_resources bus 0 link: 0 done
 1253 12:17:31.814931  Done reading resources.
 1254 12:17:31.820065  Show resources in subtree (Root Device)...After reading.
 1255 12:17:31.823734   Root Device child on link 0 CPU_CLUSTER: 0
 1256 12:17:31.828846    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1257 12:17:31.829892     APIC: 00
 1258 12:17:31.830655  
 1259 12:17:31.831364     APIC: 02
 1260 12:17:31.832528     APIC: 01
 1261 12:17:31.833589     APIC: 07
 1262 12:17:31.834984     APIC: 03
 1263 12:17:31.835817     APIC: 05
 1264 12:17:31.836677     APIC: 06
 1265 12:17:31.838373     APIC: 04
 1266 12:17:31.839157  
 1267 12:17:31.842629    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1268 12:17:31.842901  
 1269 12:17:31.851781    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1270 12:17:31.861263    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1271 12:17:31.861722  
 1272 12:17:31.862703     PCI: 00:00.0
 1273 12:17:31.863350  
 1274 12:17:31.872654     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1275 12:17:31.872947  
 1276 12:17:31.881910     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1277 12:17:31.882732  
 1278 12:17:31.891186     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1279 12:17:31.891455  
 1280 12:17:31.901197     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1281 12:17:31.910510     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1282 12:17:31.919689     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1283 12:17:31.928891     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1284 12:17:31.929165  
 1285 12:17:31.937572     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
 1286 12:17:31.946962     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
 1287 12:17:31.956773     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
 1288 12:17:31.966057     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
 1289 12:17:31.976581     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
 1290 12:17:31.985562     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
 1291 12:17:31.985849  
 1292 12:17:31.994469     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
 1293 12:17:31.995997     PCI: 00:02.0
 1294 12:17:32.006711     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1295 12:17:32.016912     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1296 12:17:32.024828     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1297 12:17:32.026934     PCI: 00:04.0
 1298 12:17:32.037402     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
 1299 12:17:32.038327     PCI: 00:08.0
 1300 12:17:32.048090     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1301 12:17:32.048752  
 1302 12:17:32.050391     PCI: 00:12.0
 1303 12:17:32.059390     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1304 12:17:32.063934     PCI: 00:14.0 child on link 0 USB0 port 0
 1305 12:17:32.064200  
 1306 12:17:32.074050     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1307 12:17:32.074312  
 1308 12:17:32.078271      USB0 port 0 child on link 0 USB2 port 0
 1309 12:17:32.078759  
 1310 12:17:32.080791       USB2 port 0
 1311 12:17:32.082363       USB2 port 1
 1312 12:17:32.083834       USB2 port 2
 1313 12:17:32.084137  
 1314 12:17:32.085305       USB2 port 4
 1315 12:17:32.086025  
 1316 12:17:32.087468       USB2 port 5
 1317 12:17:32.088764       USB2 port 6
 1318 12:17:32.089041  
 1319 12:17:32.090797       USB2 port 7
 1320 12:17:32.092585       USB2 port 8
 1321 12:17:32.094121       USB2 port 9
 1322 12:17:32.094376  
 1323 12:17:32.096236       USB3 port 0
 1324 12:17:32.098009       USB3 port 1
 1325 12:17:32.099770       USB3 port 2
 1326 12:17:32.101027       USB3 port 3
 1327 12:17:32.103381       USB3 port 4
 1328 12:17:32.104566     PCI: 00:14.2
 1329 12:17:32.114315     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1330 12:17:32.114574  
 1331 12:17:32.125020     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1332 12:17:32.126140     PCI: 00:14.3
 1333 12:17:32.136820     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1334 12:17:32.140122     PCI: 00:15.0 child on link 0 I2C: 01:10
 1335 12:17:32.140412  
 1336 12:17:32.150293     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1337 12:17:32.152473      I2C: 01:10
 1338 12:17:32.153471      I2C: 01:10
 1339 12:17:32.153726  
 1340 12:17:32.155291      I2C: 01:34
 1341 12:17:32.158826     PCI: 00:15.1 child on link 0 I2C: 02:2c
 1342 12:17:32.159094  
 1343 12:17:32.169790     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1344 12:17:32.170864      I2C: 02:2c
 1345 12:17:32.172526     PCI: 00:16.0
 1346 12:17:32.182005     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1347 12:17:32.182695  
 1348 12:17:32.184145     PCI: 00:17.0
 1349 12:17:32.193498     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1350 12:17:32.201636     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1351 12:17:32.202182  
 1352 12:17:32.210603     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1353 12:17:32.218345     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1354 12:17:32.218628  
 1355 12:17:32.226659     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1356 12:17:32.235718     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1357 12:17:32.240433     PCI: 00:19.0 child on link 0 I2C: 03:50
 1358 12:17:32.249638     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1359 12:17:32.249906  
 1360 12:17:32.259694     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1361 12:17:32.261574      I2C: 03:50
 1362 12:17:32.262833     PCI: 00:19.2
 1363 12:17:32.274051     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1364 12:17:32.284530     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1365 12:17:32.288684     PCI: 00:1c.0 child on link 0 PCI: 01:00.0
 1366 12:17:32.297535     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1367 12:17:32.307035     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1368 12:17:32.315800     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1369 12:17:32.317995      PCI: 01:00.0
 1370 12:17:32.326877      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
 1371 12:17:32.331705     PCI: 00:1d.0 child on link 0 PCI: 02:00.0
 1372 12:17:32.340449     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1373 12:17:32.349821     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1374 12:17:32.350417  
 1375 12:17:32.359546     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1376 12:17:32.360845      PCI: 02:00.0
 1377 12:17:32.370280      PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1378 12:17:32.379765      PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
 1379 12:17:32.383733     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1380 12:17:32.392395     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1381 12:17:32.401318     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1382 12:17:32.402868      PNP: 0c09.0
 1383 12:17:32.403418  
 1384 12:17:32.411787      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
 1385 12:17:32.420437      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
 1386 12:17:32.429123      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
 1387 12:17:32.429790     PCI: 00:1f.3
 1388 12:17:32.430061  
 1389 12:17:32.440078     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1390 12:17:32.450181     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1391 12:17:32.451788     PCI: 00:1f.4
 1392 12:17:32.461377     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1393 12:17:32.470963     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1394 12:17:32.471236  
 1395 12:17:32.472504     PCI: 00:1f.5
 1396 12:17:32.473044  
 1397 12:17:32.481536     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1398 12:17:32.482002  
 1399 12:17:32.483425     PCI: 00:1f.6
 1400 12:17:32.492828     PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
 1401 12:17:32.498490  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1402 12:17:32.498769  
 1403 12:17:32.505443  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1404 12:17:32.512109  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1405 12:17:32.518624  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1406 12:17:32.525583  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1407 12:17:32.525857  
 1408 12:17:32.528978  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1409 12:17:32.531914  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1410 12:17:32.532185  
 1411 12:17:32.535792  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1412 12:17:32.536381  
 1413 12:17:32.539689  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1414 12:17:32.546272  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1415 12:17:32.552536  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1416 12:17:32.560720  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1417 12:17:32.569395  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1418 12:17:32.575586  PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1419 12:17:32.575917  
 1420 12:17:32.579915  PCI: 01:00.0 14 *  [0x0 - 0xfff] mem
 1421 12:17:32.587838  PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1422 12:17:32.595844  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1423 12:17:32.604418  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1424 12:17:32.611229  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1425 12:17:32.614730  PCI: 02:00.0 10 *  [0x0 - 0xfff] mem
 1426 12:17:32.618546  PCI: 02:00.0 14 *  [0x1000 - 0x17ff] mem
 1427 12:17:32.627078  PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1428 12:17:32.630911  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1429 12:17:32.631334  
 1430 12:17:32.636557  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1431 12:17:32.640858  PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem
 1432 12:17:32.645595  PCI: 00:1d.0 20 *  [0x11100000 - 0x111fffff] mem
 1433 12:17:32.650823  PCI: 00:1f.3 20 *  [0x11200000 - 0x112fffff] mem
 1434 12:17:32.655834  PCI: 00:1f.6 10 *  [0x11300000 - 0x1131ffff] mem
 1435 12:17:32.660196  PCI: 00:14.0 10 *  [0x11320000 - 0x1132ffff] mem
 1436 12:17:32.660471  
 1437 12:17:32.665998  PCI: 00:04.0 10 *  [0x11330000 - 0x11337fff] mem
 1438 12:17:32.670298  PCI: 00:14.3 10 *  [0x11338000 - 0x1133bfff] mem
 1439 12:17:32.675704  PCI: 00:1f.3 10 *  [0x1133c000 - 0x1133ffff] mem
 1440 12:17:32.679813  PCI: 00:14.2 10 *  [0x11340000 - 0x11341fff] mem
 1441 12:17:32.684961  PCI: 00:17.0 10 *  [0x11342000 - 0x11343fff] mem
 1442 12:17:32.685239  
 1443 12:17:32.689934  PCI: 00:08.0 10 *  [0x11344000 - 0x11344fff] mem
 1444 12:17:32.694525  PCI: 00:12.0 10 *  [0x11345000 - 0x11345fff] mem
 1445 12:17:32.695023  
 1446 12:17:32.699462  PCI: 00:14.2 18 *  [0x11346000 - 0x11346fff] mem
 1447 12:17:32.703911  PCI: 00:15.0 10 *  [0x11347000 - 0x11347fff] mem
 1448 12:17:32.704469  
 1449 12:17:32.709219  PCI: 00:15.1 10 *  [0x11348000 - 0x11348fff] mem
 1450 12:17:32.714005  PCI: 00:16.0 10 *  [0x11349000 - 0x11349fff] mem
 1451 12:17:32.714582  
 1452 12:17:32.719116  PCI: 00:19.0 10 *  [0x1134a000 - 0x1134afff] mem
 1453 12:17:32.719378  
 1454 12:17:32.723680  PCI: 00:19.0 18 *  [0x1134b000 - 0x1134bfff] mem
 1455 12:17:32.728660  PCI: 00:19.2 18 *  [0x1134c000 - 0x1134cfff] mem
 1456 12:17:32.733544  PCI: 00:1f.5 10 *  [0x1134d000 - 0x1134dfff] mem
 1457 12:17:32.738472  PCI: 00:17.0 24 *  [0x1134e000 - 0x1134e7ff] mem
 1458 12:17:32.743090  PCI: 00:17.0 14 *  [0x1134f000 - 0x1134f0ff] mem
 1459 12:17:32.748362  PCI: 00:1f.4 10 *  [0x11350000 - 0x113500ff] mem
 1460 12:17:32.756491  DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
 1461 12:17:32.760404  avoid_fixed_resources: DOMAIN: 0000
 1462 12:17:32.760678  
 1463 12:17:32.765804  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1464 12:17:32.772090  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1465 12:17:32.779778  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1466 12:17:32.786908  constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
 1467 12:17:32.787175  
 1468 12:17:32.795037  constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
 1469 12:17:32.802365  constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
 1470 12:17:32.802637  
 1471 12:17:32.810776  constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
 1472 12:17:32.817918  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1473 12:17:32.825230  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1474 12:17:32.825486  
 1475 12:17:32.832630  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1476 12:17:32.832890  
 1477 12:17:32.839893  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1478 12:17:32.840159  
 1479 12:17:32.847893  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1480 12:17:32.849569  Setting resources...
 1481 12:17:32.856467  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1482 12:17:32.859945  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1483 12:17:32.863924  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1484 12:17:32.868122  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1485 12:17:32.868378  
 1486 12:17:32.871944  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1487 12:17:32.878153  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1488 12:17:32.878408  
 1489 12:17:32.884580  PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1490 12:17:32.885066  
 1491 12:17:32.891308  PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1492 12:17:32.897267  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1493 12:17:32.903768  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1494 12:17:32.910795  DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
 1495 12:17:32.916029  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1496 12:17:32.920878  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1497 12:17:32.926013  PCI: 00:1c.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1498 12:17:32.930650  PCI: 00:1d.0 20 *  [0xd1100000 - 0xd11fffff] mem
 1499 12:17:32.935373  PCI: 00:1f.3 20 *  [0xd1200000 - 0xd12fffff] mem
 1500 12:17:32.940752  PCI: 00:1f.6 10 *  [0xd1300000 - 0xd131ffff] mem
 1501 12:17:32.945434  PCI: 00:14.0 10 *  [0xd1320000 - 0xd132ffff] mem
 1502 12:17:32.945698  
 1503 12:17:32.950353  PCI: 00:04.0 10 *  [0xd1330000 - 0xd1337fff] mem
 1504 12:17:32.955269  PCI: 00:14.3 10 *  [0xd1338000 - 0xd133bfff] mem
 1505 12:17:32.960177  PCI: 00:1f.3 10 *  [0xd133c000 - 0xd133ffff] mem
 1506 12:17:32.964840  PCI: 00:14.2 10 *  [0xd1340000 - 0xd1341fff] mem
 1507 12:17:32.965358  
 1508 12:17:32.969532  PCI: 00:17.0 10 *  [0xd1342000 - 0xd1343fff] mem
 1509 12:17:32.974863  PCI: 00:08.0 10 *  [0xd1344000 - 0xd1344fff] mem
 1510 12:17:32.979837  PCI: 00:12.0 10 *  [0xd1345000 - 0xd1345fff] mem
 1511 12:17:32.980093  
 1512 12:17:32.984413  PCI: 00:14.2 18 *  [0xd1346000 - 0xd1346fff] mem
 1513 12:17:32.989049  PCI: 00:15.0 10 *  [0xd1347000 - 0xd1347fff] mem
 1514 12:17:32.993717  PCI: 00:15.1 10 *  [0xd1348000 - 0xd1348fff] mem
 1515 12:17:32.993967  
 1516 12:17:32.998992  PCI: 00:16.0 10 *  [0xd1349000 - 0xd1349fff] mem
 1517 12:17:33.003690  PCI: 00:19.0 10 *  [0xd134a000 - 0xd134afff] mem
 1518 12:17:33.008705  PCI: 00:19.0 18 *  [0xd134b000 - 0xd134bfff] mem
 1519 12:17:33.013407  PCI: 00:19.2 18 *  [0xd134c000 - 0xd134cfff] mem
 1520 12:17:33.013678  
 1521 12:17:33.017933  PCI: 00:1f.5 10 *  [0xd134d000 - 0xd134dfff] mem
 1522 12:17:33.018534  
 1523 12:17:33.023079  PCI: 00:17.0 24 *  [0xd134e000 - 0xd134e7ff] mem
 1524 12:17:33.028190  PCI: 00:17.0 14 *  [0xd134f000 - 0xd134f0ff] mem
 1525 12:17:33.033151  PCI: 00:1f.4 10 *  [0xd1350000 - 0xd13500ff] mem
 1526 12:17:33.041573  DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
 1527 12:17:33.047876  PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1528 12:17:33.055162  PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1529 12:17:33.062859  PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1530 12:17:33.067529  PCI: 01:00.0 14 *  [0xd1000000 - 0xd1000fff] mem
 1531 12:17:33.075216  PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
 1532 12:17:33.082756  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1533 12:17:33.089755  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1534 12:17:33.096601  PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
 1535 12:17:33.101580  PCI: 02:00.0 10 *  [0xd1100000 - 0xd1100fff] mem
 1536 12:17:33.102163  
 1537 12:17:33.106380  PCI: 02:00.0 14 *  [0xd1101000 - 0xd11017ff] mem
 1538 12:17:33.106650  
 1539 12:17:33.113971  PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
 1540 12:17:33.118168  Root Device assign_resources, bus 0 link: 0
 1541 12:17:33.123018  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1542 12:17:33.131949  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1543 12:17:33.140104  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1544 12:17:33.147657  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1545 12:17:33.156107  PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
 1546 12:17:33.164098  PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
 1547 12:17:33.164389  
 1548 12:17:33.172782  PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
 1549 12:17:33.173057  
 1550 12:17:33.181411  PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
 1551 12:17:33.185118  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1552 12:17:33.185649  
 1553 12:17:33.190489  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1554 12:17:33.198243  PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
 1555 12:17:33.206595  PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
 1556 12:17:33.214999  PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
 1557 12:17:33.223324  PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
 1558 12:17:33.223593  
 1559 12:17:33.227500  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1560 12:17:33.232333  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1561 12:17:33.232889  
 1562 12:17:33.240365  PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
 1563 12:17:33.245597  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1564 12:17:33.249700  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1565 12:17:33.249987  
 1566 12:17:33.257754  PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
 1567 12:17:33.258015  
 1568 12:17:33.266265  PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
 1569 12:17:33.274212  PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
 1570 12:17:33.281494  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1571 12:17:33.289497  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1572 12:17:33.296951  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1573 12:17:33.304649  PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
 1574 12:17:33.312669  PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
 1575 12:17:33.313279  
 1576 12:17:33.320767  PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
 1577 12:17:33.321037  
 1578 12:17:33.325544  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1579 12:17:33.330482  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1580 12:17:33.338701  PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
 1581 12:17:33.347194  PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1582 12:17:33.355814  PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1583 12:17:33.356407  
 1584 12:17:33.364464  PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1585 12:17:33.368869  PCI: 00:1c.0 assign_resources, bus 1 link: 0
 1586 12:17:33.377247  PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
 1587 12:17:33.381960  PCI: 00:1c.0 assign_resources, bus 1 link: 0
 1588 12:17:33.390888  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
 1589 12:17:33.399565  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
 1590 12:17:33.400254  
 1591 12:17:33.408681  PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
 1592 12:17:33.412198  PCI: 00:1d.0 assign_resources, bus 2 link: 0
 1593 12:17:33.412460  
 1594 12:17:33.422078  PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
 1595 12:17:33.422525  
 1596 12:17:33.431327  PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
 1597 12:17:33.431589  
 1598 12:17:33.438627  PCI: 00:1d.0 assign_resources, bus 2 link: 0
 1599 12:17:33.443035  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1600 12:17:33.448379  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1601 12:17:33.453208  LPC: Trying to open IO window from 930 size 8
 1602 12:17:33.456631  LPC: Trying to open IO window from 940 size 8
 1603 12:17:33.457167  
 1604 12:17:33.461478  LPC: Trying to open IO window from 950 size 10
 1605 12:17:33.470302  PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
 1606 12:17:33.477766  PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
 1607 12:17:33.486176  PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
 1608 12:17:33.486439  
 1609 12:17:33.494932  PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
 1610 12:17:33.502726  PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
 1611 12:17:33.507143  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1612 12:17:33.512250  Root Device assign_resources, bus 0 link: 0
 1613 12:17:33.514552  Done setting resources.
 1614 12:17:33.521163  Show resources in subtree (Root Device)...After assigning values.
 1615 12:17:33.525906   Root Device child on link 0 CPU_CLUSTER: 0
 1616 12:17:33.529195    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1617 12:17:33.531223     APIC: 00
 1618 12:17:33.532026     APIC: 02
 1619 12:17:33.533480     APIC: 01
 1620 12:17:33.534627     APIC: 07
 1621 12:17:33.534893  
 1622 12:17:33.536217     APIC: 03
 1623 12:17:33.536695     APIC: 05
 1624 12:17:33.537284  
 1625 12:17:33.538703     APIC: 06
 1626 12:17:33.539973     APIC: 04
 1627 12:17:33.544099    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1628 12:17:33.544378  
 1629 12:17:33.553593    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1630 12:17:33.565216    DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1631 12:17:33.566236     PCI: 00:00.0
 1632 12:17:33.575833     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1633 12:17:33.585747     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1634 12:17:33.594876     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1635 12:17:33.604298     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1636 12:17:33.613483     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1637 12:17:33.623304     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1638 12:17:33.632255     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1639 12:17:33.640946     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
 1640 12:17:33.650562     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
 1641 12:17:33.660022     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
 1642 12:17:33.660286  
 1643 12:17:33.669639     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
 1644 12:17:33.679598     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
 1645 12:17:33.688651     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
 1646 12:17:33.697481     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
 1647 12:17:33.697749  
 1648 12:17:33.699654     PCI: 00:02.0
 1649 12:17:33.709950     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1650 12:17:33.710525  
 1651 12:17:33.721022     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1652 12:17:33.729830     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1653 12:17:33.731424     PCI: 00:04.0
 1654 12:17:33.741645     PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
 1655 12:17:33.743371     PCI: 00:08.0
 1656 12:17:33.743637  
 1657 12:17:33.753431     PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
 1658 12:17:33.753924  
 1659 12:17:33.756028     PCI: 00:12.0
 1660 12:17:33.766184     PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
 1661 12:17:33.770142     PCI: 00:14.0 child on link 0 USB0 port 0
 1662 12:17:33.780273     PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
 1663 12:17:33.785376      USB0 port 0 child on link 0 USB2 port 0
 1664 12:17:33.786468       USB2 port 0
 1665 12:17:33.788130       USB2 port 1
 1666 12:17:33.788391  
 1667 12:17:33.791033       USB2 port 2
 1668 12:17:33.791754       USB2 port 4
 1669 12:17:33.793785       USB2 port 5
 1670 12:17:33.795577       USB2 port 6
 1671 12:17:33.796786       USB2 port 7
 1672 12:17:33.797052  
 1673 12:17:33.798628       USB2 port 8
 1674 12:17:33.799285  
 1675 12:17:33.800702       USB2 port 9
 1676 12:17:33.802088       USB3 port 0
 1677 12:17:33.802346  
 1678 12:17:33.803999       USB3 port 1
 1679 12:17:33.805828       USB3 port 2
 1680 12:17:33.807642       USB3 port 3
 1681 12:17:33.809479       USB3 port 4
 1682 12:17:33.811169     PCI: 00:14.2
 1683 12:17:33.811713  
 1684 12:17:33.821480     PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
 1685 12:17:33.831543     PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
 1686 12:17:33.832089  
 1687 12:17:33.832806     PCI: 00:14.3
 1688 12:17:33.833144  
 1689 12:17:33.843807     PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
 1690 12:17:33.847748     PCI: 00:15.0 child on link 0 I2C: 01:10
 1691 12:17:33.857809     PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
 1692 12:17:33.858086  
 1693 12:17:33.859880      I2C: 01:10
 1694 12:17:33.860801      I2C: 01:10
 1695 12:17:33.861070  
 1696 12:17:33.862721      I2C: 01:34
 1697 12:17:33.866848     PCI: 00:15.1 child on link 0 I2C: 02:2c
 1698 12:17:33.877006     PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
 1699 12:17:33.877268  
 1700 12:17:33.879136      I2C: 02:2c
 1701 12:17:33.880689     PCI: 00:16.0
 1702 12:17:33.890757     PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
 1703 12:17:33.892622     PCI: 00:17.0
 1704 12:17:33.902878     PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
 1705 12:17:33.913015     PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
 1706 12:17:33.921772     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1707 12:17:33.922768  
 1708 12:17:33.930835     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1709 12:17:33.931301  
 1710 12:17:33.940048     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1711 12:17:33.950155     PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
 1712 12:17:33.950434  
 1713 12:17:33.954840     PCI: 00:19.0 child on link 0 I2C: 03:50
 1714 12:17:33.955385  
 1715 12:17:33.965279     PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
 1716 12:17:33.965597  
 1717 12:17:33.976012     PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
 1718 12:17:33.976853      I2C: 03:50
 1719 12:17:33.978673     PCI: 00:19.2
 1720 12:17:33.989214     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1721 12:17:33.989501  
 1722 12:17:33.999593     PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
 1723 12:17:34.004443     PCI: 00:1c.0 child on link 0 PCI: 01:00.0
 1724 12:17:34.013281     PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1725 12:17:34.013547  
 1726 12:17:34.023835     PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1727 12:17:34.034236     PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1728 12:17:34.036356      PCI: 01:00.0
 1729 12:17:34.046267      PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
 1730 12:17:34.051013     PCI: 00:1d.0 child on link 0 PCI: 02:00.0
 1731 12:17:34.059936     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1732 12:17:34.070179     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1733 12:17:34.080397     PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
 1734 12:17:34.082689      PCI: 02:00.0
 1735 12:17:34.092653      PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
 1736 12:17:34.102964      PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
 1737 12:17:34.107603     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1738 12:17:34.115759     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1739 12:17:34.124719     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1740 12:17:34.126263      PNP: 0c09.0
 1741 12:17:34.135002      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
 1742 12:17:34.135303  
 1743 12:17:34.143197      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
 1744 12:17:34.143468  
 1745 12:17:34.151992      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
 1746 12:17:34.154095     PCI: 00:1f.3
 1747 12:17:34.154374  
 1748 12:17:34.164628     PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
 1749 12:17:34.174864     PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
 1750 12:17:34.176107     PCI: 00:1f.4
 1751 12:17:34.185263     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1752 12:17:34.185904  
 1753 12:17:34.195927     PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
 1754 12:17:34.197618     PCI: 00:1f.5
 1755 12:17:34.197869  
 1756 12:17:34.207229     PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
 1757 12:17:34.207483  
 1758 12:17:34.209824     PCI: 00:1f.6
 1759 12:17:34.219704     PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
 1760 12:17:34.222820  Done allocating resources.
 1761 12:17:34.228936  BS: BS_DEV_RESOURCES times (us): entry 0 run 2549274 exit 21
 1762 12:17:34.231255  Enabling resources...
 1763 12:17:34.231528  
 1764 12:17:34.235734  PCI: 00:00.0 subsystem <- 1028/3e34
 1765 12:17:34.237600  PCI: 00:00.0 cmd <- 06
 1766 12:17:34.237868  
 1767 12:17:34.241387  PCI: 00:02.0 subsystem <- 1028/3ea0
 1768 12:17:34.241973  
 1769 12:17:34.244706  PCI: 00:02.0 cmd <- 03
 1770 12:17:34.248082  PCI: 00:04.0 subsystem <- 1028/1903
 1771 12:17:34.250141  PCI: 00:04.0 cmd <- 02
 1772 12:17:34.250397  
 1773 12:17:34.252752  PCI: 00:08.0 cmd <- 06
 1774 12:17:34.253007  
 1775 12:17:34.257060  PCI: 00:12.0 subsystem <- 1028/9df9
 1776 12:17:34.259072  PCI: 00:12.0 cmd <- 02
 1777 12:17:34.259343  
 1778 12:17:34.263308  PCI: 00:14.0 subsystem <- 1028/9ded
 1779 12:17:34.265827  PCI: 00:14.0 cmd <- 02
 1780 12:17:34.268233  PCI: 00:14.2 cmd <- 02
 1781 12:17:34.272113  PCI: 00:14.3 subsystem <- 1028/9df0
 1782 12:17:34.272441  
 1783 12:17:34.274867  PCI: 00:14.3 cmd <- 02
 1784 12:17:34.278729  PCI: 00:15.0 subsystem <- 1028/9de8
 1785 12:17:34.279038  
 1786 12:17:34.280665  PCI: 00:15.0 cmd <- 02
 1787 12:17:34.284869  PCI: 00:15.1 subsystem <- 1028/9de9
 1788 12:17:34.285145  
 1789 12:17:34.287304  PCI: 00:15.1 cmd <- 02
 1790 12:17:34.290927  PCI: 00:16.0 subsystem <- 1028/9de0
 1791 12:17:34.293041  PCI: 00:16.0 cmd <- 02
 1792 12:17:34.297058  PCI: 00:17.0 subsystem <- 1028/9dd3
 1793 12:17:34.297331  
 1794 12:17:34.299499  PCI: 00:17.0 cmd <- 03
 1795 12:17:34.303423  PCI: 00:19.0 subsystem <- 1028/9dc5
 1796 12:17:34.305410  PCI: 00:19.0 cmd <- 06
 1797 12:17:34.305671  
 1798 12:17:34.309934  PCI: 00:19.2 subsystem <- 1028/9dc7
 1799 12:17:34.311785  PCI: 00:19.2 cmd <- 06
 1800 12:17:34.315740  PCI: 00:1c.0 bridge ctrl <- 0003
 1801 12:17:34.316024  
 1802 12:17:34.319444  PCI: 00:1c.0 subsystem <- 1028/9dbf
 1803 12:17:34.322146  Capability: type 0x10 @ 0x40
 1804 12:17:34.325275  Capability: type 0x05 @ 0x80
 1805 12:17:34.327859  Capability: type 0x0d @ 0x90
 1806 12:17:34.330565  PCI: 00:1c.0 cmd <- 06
 1807 12:17:34.333499  PCI: 00:1d.0 bridge ctrl <- 0003
 1808 12:17:34.333846  
 1809 12:17:34.337396  PCI: 00:1d.0 subsystem <- 1028/9db4
 1810 12:17:34.340444  Capability: type 0x10 @ 0x40
 1811 12:17:34.343162  Capability: type 0x05 @ 0x80
 1812 12:17:34.343418  
 1813 12:17:34.346378  Capability: type 0x0d @ 0x90
 1814 12:17:34.348977  PCI: 00:1d.0 cmd <- 06
 1815 12:17:34.352876  PCI: 00:1f.0 subsystem <- 1028/9d84
 1816 12:17:34.355409  PCI: 00:1f.0 cmd <- 407
 1817 12:17:34.358429  PCI: 00:1f.3 subsystem <- 1028/9dc8
 1818 12:17:34.359036  
 1819 12:17:34.361515  PCI: 00:1f.3 cmd <- 02
 1820 12:17:34.364929  PCI: 00:1f.4 subsystem <- 1028/9da3
 1821 12:17:34.367531  PCI: 00:1f.4 cmd <- 03
 1822 12:17:34.371516  PCI: 00:1f.5 subsystem <- 1028/9da4
 1823 12:17:34.371789  
 1824 12:17:34.373739  PCI: 00:1f.5 cmd <- 406
 1825 12:17:34.377312  PCI: 00:1f.6 subsystem <- 1028/15be
 1826 12:17:34.377608  
 1827 12:17:34.380306  PCI: 00:1f.6 cmd <- 02
 1828 12:17:34.390918  PCI: 01:00.0 cmd <- 02
 1829 12:17:34.395839  PCI: 02:00.0 cmd <- 06
 1830 12:17:34.399578  done.
 1831 12:17:34.405102  BS: BS_DEV_ENABLE times (us): entry 405 run 170478 exit 0
 1832 12:17:34.407657  Initializing devices...
 1833 12:17:34.410033  Root Device init ...
 1834 12:17:34.413384  Root Device init finished in 2138 usecs
 1835 12:17:34.413859  
 1836 12:17:34.416591  CPU_CLUSTER: 0 init ...
 1837 12:17:34.420515  CPU_CLUSTER: 0 init finished in 2429 usecs
 1838 12:17:34.427055  PCI: 00:00.0 init ...
 1839 12:17:34.427665  
 1840 12:17:34.429952  CPU TDP: 15 Watts
 1841 12:17:34.432394  CPU PL2 = 51 Watts
 1842 12:17:34.435652  PCI: 00:00.0 init finished in 7036 usecs
 1843 12:17:34.435917  
 1844 12:17:34.438861  PCI: 00:02.0 init ...
 1845 12:17:34.442336  PCI: 00:02.0 init finished in 2237 usecs
 1846 12:17:34.442602  
 1847 12:17:34.445403  PCI: 00:04.0 init ...
 1848 12:17:34.449458  PCI: 00:04.0 init finished in 2235 usecs
 1849 12:17:34.452356  PCI: 00:08.0 init ...
 1850 12:17:34.456228  PCI: 00:08.0 init finished in 2236 usecs
 1851 12:17:34.458940  PCI: 00:12.0 init ...
 1852 12:17:34.459211  
 1853 12:17:34.462658  PCI: 00:12.0 init finished in 2235 usecs
 1854 12:17:34.463412  
 1855 12:17:34.465513  PCI: 00:14.0 init ...
 1856 12:17:34.469541  PCI: 00:14.0 init finished in 2235 usecs
 1857 12:17:34.469807  
 1858 12:17:34.472138  PCI: 00:14.2 init ...
 1859 12:17:34.476411  PCI: 00:14.2 init finished in 2235 usecs
 1860 12:17:34.476676  
 1861 12:17:34.478791  PCI: 00:14.3 init ...
 1862 12:17:34.479049  
 1863 12:17:34.482898  PCI: 00:14.3 init finished in 2240 usecs
 1864 12:17:34.485192  PCI: 00:15.0 init ...
 1865 12:17:34.485711  
 1866 12:17:34.489965  DW I2C bus 0 at 0xd1347000 (400 KHz)
 1867 12:17:34.493684  PCI: 00:15.0 init finished in 5933 usecs
 1868 12:17:34.493943  
 1869 12:17:34.495845  PCI: 00:15.1 init ...
 1870 12:17:34.499664  DW I2C bus 1 at 0xd1348000 (400 KHz)
 1871 12:17:34.503700  PCI: 00:15.1 init finished in 5933 usecs
 1872 12:17:34.506569  PCI: 00:16.0 init ...
 1873 12:17:34.510813  PCI: 00:16.0 init finished in 2234 usecs
 1874 12:17:34.513861  PCI: 00:19.0 init ...
 1875 12:17:34.517443  DW I2C bus 4 at 0xd134a000 (400 KHz)
 1876 12:17:34.521336  PCI: 00:19.0 init finished in 5933 usecs
 1877 12:17:34.524182  PCI: 00:1c.0 init ...
 1878 12:17:34.527788  Initializing PCH PCIe bridge.
 1879 12:17:34.531692  PCI: 00:1c.0 init finished in 5248 usecs
 1880 12:17:34.533977  PCI: 00:1d.0 init ...
 1881 12:17:34.537541  Initializing PCH PCIe bridge.
 1882 12:17:34.541622  PCI: 00:1d.0 init finished in 5248 usecs
 1883 12:17:34.544185  PCI: 00:1f.0 init ...
 1884 12:17:34.548063  IOAPIC: Initializing IOAPIC at 0xfec00000
 1885 12:17:34.552593  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1886 12:17:34.552848  
 1887 12:17:34.554763  IOAPIC: ID = 0x02
 1888 12:17:34.556819  IOAPIC: Dumping registers
 1889 12:17:34.557079  
 1890 12:17:34.559505    reg 0x0000: 0x02000000
 1891 12:17:34.559757  
 1892 12:17:34.562330    reg 0x0001: 0x00770020
 1893 12:17:34.565111    reg 0x0002: 0x00000000
 1894 12:17:34.571488  PCI: 00:1f.0 init finished in 25023 usecs
 1895 12:17:34.573239  PCI: 00:1f.3 init ...
 1896 12:17:34.573499  
 1897 12:17:34.578977  HDA: codec_mask = 05
 1898 12:17:34.582017  HDA: Initializing codec #2
 1899 12:17:34.584165  HDA: codec viddid: 8086280b
 1900 12:17:34.584664  
 1901 12:17:34.587509  HDA: No verb table entry found
 1902 12:17:34.590439  HDA: Initializing codec #0
 1903 12:17:34.592575  HDA: codec viddid: 10ec0236
 1904 12:17:34.592842  
 1905 12:17:34.599292  HDA: verb loaded.
 1906 12:17:34.599556  
 1907 12:17:34.604234  PCI: 00:1f.3 init finished in 28833 usecs
 1908 12:17:34.604787  
 1909 12:17:34.606708  PCI: 00:1f.4 init ...
 1910 12:17:34.606968  
 1911 12:17:34.610951  PCI: 00:1f.4 init finished in 2245 usecs
 1912 12:17:34.614337  PCI: 00:1f.6 init ...
 1913 12:17:34.618224  PCI: 00:1f.6 init finished in 2235 usecs
 1914 12:17:34.618482  
 1915 12:17:34.628623  PCI: 01:00.0 init ...
 1916 12:17:34.632961  PCI: 01:00.0 init finished in 2235 usecs
 1917 12:17:34.635761  PCI: 02:00.0 init ...
 1918 12:17:34.636217  
 1919 12:17:34.639617  PCI: 02:00.0 init finished in 2235 usecs
 1920 12:17:34.642426  PNP: 0c09.0 init ...
 1921 12:17:34.646453  EC Label      : 00.00.20
 1922 12:17:34.650468  EC Revision   : 9ca674bba
 1923 12:17:34.653508  EC Model Num  : 08B9
 1924 12:17:34.653777  
 1925 12:17:34.657068  EC Build Date : 05/10/19
 1926 12:17:34.665980  PNP: 0c09.0 init finished in 21728 usecs
 1927 12:17:34.668344  Devices initialized
 1928 12:17:34.668957  
 1929 12:17:34.671311  Show all devs... After init.
 1930 12:17:34.674262  Root Device: enabled 1
 1931 12:17:34.676251  CPU_CLUSTER: 0: enabled 1
 1932 12:17:34.678669  DOMAIN: 0000: enabled 1
 1933 12:17:34.680623  APIC: 00: enabled 1
 1934 12:17:34.683331  PCI: 00:00.0: enabled 1
 1935 12:17:34.685336  PCI: 00:02.0: enabled 1
 1936 12:17:34.685592  
 1937 12:17:34.688561  PCI: 00:04.0: enabled 1
 1938 12:17:34.690458  PCI: 00:12.0: enabled 1
 1939 12:17:34.690958  
 1940 12:17:34.693286  PCI: 00:12.5: enabled 0
 1941 12:17:34.695125  PCI: 00:12.6: enabled 0
 1942 12:17:34.697544  PCI: 00:13.0: enabled 0
 1943 12:17:34.697800  
 1944 12:17:34.699907  PCI: 00:14.0: enabled 1
 1945 12:17:34.700554  
 1946 12:17:34.702373  PCI: 00:14.1: enabled 0
 1947 12:17:34.702659  
 1948 12:17:34.705113  PCI: 00:14.3: enabled 1
 1949 12:17:34.707256  PCI: 00:14.5: enabled 0
 1950 12:17:34.707512  
 1951 12:17:34.709791  PCI: 00:15.0: enabled 1
 1952 12:17:34.712439  PCI: 00:15.1: enabled 1
 1953 12:17:34.714658  PCI: 00:15.2: enabled 0
 1954 12:17:34.717213  PCI: 00:15.3: enabled 0
 1955 12:17:34.719586  PCI: 00:16.0: enabled 1
 1956 12:17:34.722459  PCI: 00:16.1: enabled 0
 1957 12:17:34.724388  PCI: 00:16.2: enabled 0
 1958 12:17:34.726673  PCI: 00:16.3: enabled 0
 1959 12:17:34.729332  PCI: 00:16.4: enabled 0
 1960 12:17:34.729783  
 1961 12:17:34.731784  PCI: 00:16.5: enabled 0
 1962 12:17:34.734468  PCI: 00:17.0: enabled 1
 1963 12:17:34.736958  PCI: 00:19.0: enabled 1
 1964 12:17:34.739137  PCI: 00:19.1: enabled 0
 1965 12:17:34.739408  
 1966 12:17:34.742003  PCI: 00:19.2: enabled 1
 1967 12:17:34.743981  PCI: 00:1a.0: enabled 0
 1968 12:17:34.746259  PCI: 00:1c.0: enabled 1
 1969 12:17:34.748657  PCI: 00:1c.1: enabled 0
 1970 12:17:34.751570  PCI: 00:1c.2: enabled 0
 1971 12:17:34.753578  PCI: 00:1c.3: enabled 0
 1972 12:17:34.755639  PCI: 00:1c.4: enabled 0
 1973 12:17:34.756200  
 1974 12:17:34.759118  PCI: 00:1c.5: enabled 0
 1975 12:17:34.761342  PCI: 00:1c.6: enabled 0
 1976 12:17:34.763459  PCI: 00:1c.7: enabled 0
 1977 12:17:34.765543  PCI: 00:1d.0: enabled 1
 1978 12:17:34.766080  
 1979 12:17:34.768087  PCI: 00:1d.1: enabled 0
 1980 12:17:34.768613  
 1981 12:17:34.770764  PCI: 00:1d.2: enabled 0
 1982 12:17:34.772786  PCI: 00:1d.3: enabled 0
 1983 12:17:34.775672  PCI: 00:1d.4: enabled 0
 1984 12:17:34.777582  PCI: 00:1e.0: enabled 0
 1985 12:17:34.778211  
 1986 12:17:34.780255  PCI: 00:1e.1: enabled 0
 1987 12:17:34.780522  
 1988 12:17:34.782493  PCI: 00:1e.2: enabled 0
 1989 12:17:34.784859  PCI: 00:1e.3: enabled 0
 1990 12:17:34.785448  
 1991 12:17:34.787766  PCI: 00:1f.0: enabled 1
 1992 12:17:34.789877  PCI: 00:1f.1: enabled 0
 1993 12:17:34.792974  PCI: 00:1f.2: enabled 0
 1994 12:17:34.794759  PCI: 00:1f.3: enabled 1
 1995 12:17:34.797199  PCI: 00:1f.4: enabled 1
 1996 12:17:34.797706  
 1997 12:17:34.799776  PCI: 00:1f.5: enabled 1
 1998 12:17:34.802152  PCI: 00:1f.6: enabled 1
 1999 12:17:34.804550  USB0 port 0: enabled 1
 2000 12:17:34.806618  I2C: 01:10: enabled 1
 2001 12:17:34.808706  I2C: 01:10: enabled 1
 2002 12:17:34.809381  
 2003 12:17:34.811510  I2C: 01:34: enabled 1
 2004 12:17:34.813392  I2C: 02:2c: enabled 1
 2005 12:17:34.816061  I2C: 03:50: enabled 1
 2006 12:17:34.816320  
 2007 12:17:34.818783  PNP: 0c09.0: enabled 1
 2008 12:17:34.820739  USB2 port 0: enabled 1
 2009 12:17:34.823029  USB2 port 1: enabled 1
 2010 12:17:34.825141  USB2 port 2: enabled 1
 2011 12:17:34.827910  USB2 port 4: enabled 1
 2012 12:17:34.830296  USB2 port 5: enabled 1
 2013 12:17:34.832271  USB2 port 6: enabled 1
 2014 12:17:34.834599  USB2 port 7: enabled 1
 2015 12:17:34.837099  USB2 port 8: enabled 1
 2016 12:17:34.838848  USB2 port 9: enabled 1
 2017 12:17:34.841858  USB3 port 0: enabled 1
 2018 12:17:34.843690  USB3 port 1: enabled 1
 2019 12:17:34.846224  USB3 port 2: enabled 1
 2020 12:17:34.846754  
 2021 12:17:34.848704  USB3 port 3: enabled 1
 2022 12:17:34.850621  USB3 port 4: enabled 1
 2023 12:17:34.853169  APIC: 02: enabled 1
 2024 12:17:34.853442  
 2025 12:17:34.854802  APIC: 01: enabled 1
 2026 12:17:34.857048  APIC: 07: enabled 1
 2027 12:17:34.859288  APIC: 03: enabled 1
 2028 12:17:34.861087  APIC: 05: enabled 1
 2029 12:17:34.863355  APIC: 06: enabled 1
 2030 12:17:34.865599  APIC: 04: enabled 1
 2031 12:17:34.867389  PCI: 00:08.0: enabled 1
 2032 12:17:34.869654  PCI: 00:14.2: enabled 1
 2033 12:17:34.872693  PCI: 01:00.0: enabled 1
 2034 12:17:34.874504  PCI: 02:00.0: enabled 1
 2035 12:17:34.880098  Disabling ACPI via APMC:
 2036 12:17:34.882251  done.
 2037 12:17:34.882530  
 2038 12:17:34.886866  FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
 2039 12:17:34.887145  
 2040 12:17:34.890471  ELOG: NV offset 0x1bf0000 size 0x4000
 2041 12:17:34.891050  
 2042 12:17:34.898729  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 2043 12:17:34.904948  ELOG: Event(17) added with size 13 at 2023-01-31 12:17:34 UTC
 2044 12:17:34.905219  
 2045 12:17:34.909517  POST: Unexpected post code in previous boot: 0x73
 2046 12:17:34.910053  
 2047 12:17:34.916060  ELOG: Event(A3) added with size 11 at 2023-01-31 12:17:34 UTC
 2048 12:17:34.916594  
 2049 12:17:34.922562  ELOG: Event(16) added with size 11 at 2023-01-31 12:17:34 UTC
 2050 12:17:34.923132  
 2051 12:17:34.926132  Erasing flash addr 1bf0000 + 4 KiB
 2052 12:17:34.984465  ELOG: Event(92) added with size 9 at 2023-01-31 12:17:34 UTC
 2053 12:17:34.990765  ELOG: Event(93) added with size 9 at 2023-01-31 12:17:34 UTC
 2054 12:17:34.996745  ELOG: Event(9A) added with size 9 at 2023-01-31 12:17:34 UTC
 2055 12:17:35.003456  ELOG: Event(9E) added with size 10 at 2023-01-31 12:17:34 UTC
 2056 12:17:35.009869  ELOG: Event(9F) added with size 14 at 2023-01-31 12:17:35 UTC
 2057 12:17:35.010135  
 2058 12:17:35.015420  BS: BS_DEV_INIT times (us): entry 0 run 469783 exit 111071
 2059 12:17:35.021878  ELOG: Event(A1) added with size 10 at 2023-01-31 12:17:35 UTC
 2060 12:17:35.029731  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 2061 12:17:35.035844  ELOG: Event(A0) added with size 9 at 2023-01-31 12:17:35 UTC
 2062 12:17:35.040480  elog_add_boot_reason: Logged dev mode boot
 2063 12:17:35.042746  Finalize devices...
 2064 12:17:35.044297  PCI: 00:17.0 final
 2065 12:17:35.046046  Devices finalized
 2066 12:17:35.051699  FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
 2067 12:17:35.052235  
 2068 12:17:35.058020  BS: BS_POST_DEVICE times (us): entry 24773 run 5936 exit 5365
 2069 12:17:35.063575  BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
 2070 12:17:35.071779  disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
 2071 12:17:35.072448  
 2072 12:17:35.076114  disable_unused_touchscreen: Disable ACPI0C50
 2073 12:17:35.076382  
 2074 12:17:35.080775  disable_unused_touchscreen: Enable ELAN900C
 2075 12:17:35.081045  
 2076 12:17:35.083718  CBFS @ 1d00000 size 300000
 2077 12:17:35.089644  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 2078 12:17:35.090161  
 2079 12:17:35.093461  CBFS: Locating 'fallback/dsdt.aml'
 2080 12:17:35.098034  CBFS: Found @ offset 10b200 size 4448
 2081 12:17:35.100441  CBFS @ 1d00000 size 300000
 2082 12:17:35.106319  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 2083 12:17:35.107098  
 2084 12:17:35.109686  CBFS: Locating 'fallback/slic'
 2085 12:17:35.115381  CBFS: 'fallback/slic' not found.
 2086 12:17:35.119022  ACPI: Writing ACPI tables at 89c0f000.
 2087 12:17:35.120392  ACPI:    * FACS
 2088 12:17:35.120882  
 2089 12:17:35.122291  ACPI:    * DSDT
 2090 12:17:35.126062  Ramoops buffer: 0x100000@0x89b0e000.
 2091 12:17:35.130920  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
 2092 12:17:35.135601  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
 2093 12:17:35.138893  ACPI:    * FADT
 2094 12:17:35.139387  
 2095 12:17:35.140814  SCI is IRQ9
 2096 12:17:35.144313  ACPI: added table 1/32, length now 40
 2097 12:17:35.145164  
 2098 12:17:35.146285  ACPI:     * SSDT
 2099 12:17:35.150005  Found 1 CPU(s) with 8 core(s) each.
 2100 12:17:35.153757  Error: Could not locate 'wifi_sar' in VPD.
 2101 12:17:35.157831  Error: failed from getting SAR limits!
 2102 12:17:35.161747  \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
 2103 12:17:35.166029  dw_i2c: bad counts. hcnt = -14 lcnt = 30
 2104 12:17:35.170137  dw_i2c: bad counts. hcnt = -20 lcnt = 40
 2105 12:17:35.173595  dw_i2c: bad counts. hcnt = -18 lcnt = 48
 2106 12:17:35.173881  
 2107 12:17:35.179514  \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
 2108 12:17:35.184395  \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
 2109 12:17:35.189800  \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
 2110 12:17:35.194193  \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
 2111 12:17:35.199816  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 2112 12:17:35.205267  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
 2113 12:17:35.211094  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
 2114 12:17:35.211359  
 2115 12:17:35.216787  \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
 2116 12:17:35.217114  
 2117 12:17:35.221914  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
 2118 12:17:35.222183  
 2119 12:17:35.226460  \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
 2120 12:17:35.230717  \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
 2121 12:17:35.236355  \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
 2122 12:17:35.241093  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 2123 12:17:35.247029  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 2124 12:17:35.252853  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
 2125 12:17:35.258434  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 2126 12:17:35.258703  
 2127 12:17:35.264713  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
 2128 12:17:35.269606  \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
 2129 12:17:35.272781  ACPI: added table 2/32, length now 44
 2130 12:17:35.274810  ACPI:    * MCFG
 2131 12:17:35.278814  ACPI: added table 3/32, length now 48
 2132 12:17:35.279093  
 2133 12:17:35.280440  ACPI:    * TPM2
 2134 12:17:35.280711  
 2135 12:17:35.283523  TPM2 log created at 89afe000
 2136 12:17:35.287362  ACPI: added table 4/32, length now 52
 2137 12:17:35.288762  ACPI:    * MADT
 2138 12:17:35.290277  SCI is IRQ9
 2139 12:17:35.293982  ACPI: added table 5/32, length now 56
 2140 12:17:35.295356  current = 89c14bd0
 2141 12:17:35.298120  ACPI:    * IGD OpRegion
 2142 12:17:35.300556  GMA: Found VBT in CBFS
 2143 12:17:35.303940  GMA: Found valid VBT in CBFS
 2144 12:17:35.306782  ACPI: added table 6/32, length now 60
 2145 12:17:35.307162  
 2146 12:17:35.308662  ACPI:    * HPET
 2147 12:17:35.309301  
 2148 12:17:35.312880  ACPI: added table 7/32, length now 64
 2149 12:17:35.313646  ACPI: done.
 2150 12:17:35.316484  ACPI tables: 31872 bytes.
 2151 12:17:35.320039  smbios_write_tables: 89afd000
 2152 12:17:35.321829  recv_ec_data: 0x01
 2153 12:17:35.323549  Create SMBIOS type 17
 2154 12:17:35.326901  PCI: 00:14.3 (Intel WiFi)
 2155 12:17:35.329181  SMBIOS tables: 708 bytes.
 2156 12:17:35.330098  
 2157 12:17:35.333341  Writing table forward entry at 0x00000500
 2158 12:17:35.333843  
 2159 12:17:35.339610  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
 2160 12:17:35.343220  Writing coreboot table at 0x89c33000
 2161 12:17:35.348990   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 2162 12:17:35.353363   1. 0000000000001000-000000000009ffff: RAM
 2163 12:17:35.357952   2. 00000000000a0000-00000000000fffff: RESERVED
 2164 12:17:35.362131   3. 0000000000100000-0000000089afcfff: RAM
 2165 12:17:35.368577   4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
 2166 12:17:35.373018   5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
 2167 12:17:35.378539   6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
 2168 12:17:35.378820  
 2169 12:17:35.383908   7. 000000008a000000-000000008f7fffff: RESERVED
 2170 12:17:35.388810   8. 00000000e0000000-00000000efffffff: RESERVED
 2171 12:17:35.393514   9. 00000000fc000000-00000000fc000fff: RESERVED
 2172 12:17:35.398277  10. 00000000fe000000-00000000fe00ffff: RESERVED
 2173 12:17:35.398545  
 2174 12:17:35.403133  11. 00000000fed10000-00000000fed17fff: RESERVED
 2175 12:17:35.407387  12. 00000000fed80000-00000000fed83fff: RESERVED
 2176 12:17:35.412400  13. 00000000feda0000-00000000feda1fff: RESERVED
 2177 12:17:35.416706  14. 0000000100000000-000000026e7fffff: RAM
 2178 12:17:35.417258  
 2179 12:17:35.420811  Graphics framebuffer located at 0xc0000000
 2180 12:17:35.423894  Passing 6 GPIOs to payload:
 2181 12:17:35.429126              NAME |       PORT | POLARITY |     VALUE
 2182 12:17:35.434573     write protect | 0x000000dc |     high |      high
 2183 12:17:35.439574          recovery | 0x000000d5 |      low |      high
 2184 12:17:35.444922               lid |  undefined |     high |      high
 2185 12:17:35.449700             power |  undefined |     high |       low
 2186 12:17:35.454969             oprom |  undefined |     high |       low
 2187 12:17:35.460713          EC in RW |  undefined |     high |       low
 2188 12:17:35.462359  recv_ec_data: 0x01
 2189 12:17:35.462630  
 2190 12:17:35.463511  SKU ID: 3
 2191 12:17:35.464092  
 2192 12:17:35.466359  CBFS @ 1d00000 size 300000
 2193 12:17:35.472782  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 2194 12:17:35.479011  Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum 4b80
 2195 12:17:35.479671  
 2196 12:17:35.481380  coreboot table: 1484 bytes.
 2197 12:17:35.485086  IMD ROOT    0. 89fff000 00001000
 2198 12:17:35.485657  
 2199 12:17:35.488361  IMD SMALL   1. 89ffe000 00001000
 2200 12:17:35.488635  
 2201 12:17:35.491611  FSP MEMORY  2. 89d0e000 002f0000
 2202 12:17:35.495062  CONSOLE     3. 89cee000 00020000
 2203 12:17:35.498066  TIME STAMP  4. 89ced000 00000910
 2204 12:17:35.501428  VBOOT WORK  5. 89cea000 00003000
 2205 12:17:35.504489  VBOOT       6. 89ce9000 00000c0c
 2206 12:17:35.504862  
 2207 12:17:35.508484  MRC DATA    7. 89ce7000 000018f0
 2208 12:17:35.511277  ROMSTG STCK 8. 89ce6000 00000400
 2209 12:17:35.514853  AFTER CAR   9. 89cdc000 0000a000
 2210 12:17:35.518006  RAMSTAGE   10. 89c80000 0005c000
 2211 12:17:35.521252  REFCODE    11. 89c4b000 00035000
 2212 12:17:35.525259  SMM BACKUP 12. 89c3b000 00010000
 2213 12:17:35.528087  COREBOOT   13. 89c33000 00008000
 2214 12:17:35.531358  ACPI       14. 89c0f000 00024000
 2215 12:17:35.534633  ACPI GNVS  15. 89c0e000 00001000
 2216 12:17:35.537964  RAMOOPS    16. 89b0e000 00100000
 2217 12:17:35.542058  TPM2 TCGLOG17. 89afe000 00010000
 2218 12:17:35.544772  SMBIOS     18. 89afd000 00000800
 2219 12:17:35.546606  IMD small region:
 2220 12:17:35.550578    IMD ROOT    0. 89ffec00 00000400
 2221 12:17:35.553673    FSP RUNTIME 1. 89ffebe0 00000004
 2222 12:17:35.557119    POWER STATE 2. 89ffeba0 00000040
 2223 12:17:35.560800    ROMSTAGE    3. 89ffeb80 00000004
 2224 12:17:35.564156    MEM INFO    4. 89ffe9c0 000001a9
 2225 12:17:35.567495    VPD         5. 89ffe980 00000031
 2226 12:17:35.570860    COREBOOTFWD 6. 89ffe940 00000028
 2227 12:17:35.573860  MTRR: Physical address space:
 2228 12:17:35.574413  
 2229 12:17:35.580607  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 2230 12:17:35.580875  
 2231 12:17:35.586407  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 2232 12:17:35.592682  0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
 2233 12:17:35.599303  0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
 2234 12:17:35.605148  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 2235 12:17:35.611839  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 2236 12:17:35.617764  0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
 2237 12:17:35.621573  MTRR: Fixed MSR 0x250 0x0606060606060606
 2238 12:17:35.625590  MTRR: Fixed MSR 0x258 0x0606060606060606
 2239 12:17:35.625852  
 2240 12:17:35.629932  MTRR: Fixed MSR 0x259 0x0000000000000000
 2241 12:17:35.633941  MTRR: Fixed MSR 0x268 0x0606060606060606
 2242 12:17:35.634203  
 2243 12:17:35.638380  MTRR: Fixed MSR 0x269 0x0606060606060606
 2244 12:17:35.641908  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2245 12:17:35.642167  
 2246 12:17:35.646440  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2247 12:17:35.650133  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2248 12:17:35.650396  
 2249 12:17:35.654825  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2250 12:17:35.658292  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2251 12:17:35.658545  
 2252 12:17:35.662305  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2253 12:17:35.662546  
 2254 12:17:35.666341  call enable_fixed_mtrr()
 2255 12:17:35.669900  CPU physical address size: 39 bits
 2256 12:17:35.673912  MTRR: default type WB/UC MTRR counts: 7/7.
 2257 12:17:35.677578  MTRR: UC selected as default type.
 2258 12:17:35.677843  
 2259 12:17:35.683792  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
 2260 12:17:35.689885  MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
 2261 12:17:35.695733  MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
 2262 12:17:35.696250  
 2263 12:17:35.702459  MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
 2264 12:17:35.708472  MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 2265 12:17:35.714867  MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
 2266 12:17:35.721074  MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
 2267 12:17:35.721794  
 2268 12:17:35.722165  
 2269 12:17:35.723504  MTRR check
 2270 12:17:35.725620  Fixed MTRRs   : Enabled
 2271 12:17:35.728128  Variable MTRRs: Enabled
 2272 12:17:35.728203  
 2273 12:17:35.728449  
 2274 12:17:35.732051  MTRR: Fixed MSR 0x250 0x0606060606060606
 2275 12:17:35.736327  MTRR: Fixed MSR 0x258 0x0606060606060606
 2276 12:17:35.740697  MTRR: Fixed MSR 0x259 0x0000000000000000
 2277 12:17:35.740957  
 2278 12:17:35.744266  MTRR: Fixed MSR 0x268 0x0606060606060606
 2279 12:17:35.748850  MTRR: Fixed MSR 0x269 0x0606060606060606
 2280 12:17:35.753005  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2281 12:17:35.756434  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2282 12:17:35.761167  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2283 12:17:35.765163  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2284 12:17:35.765451  
 2285 12:17:35.768986  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2286 12:17:35.769428  
 2287 12:17:35.773020  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2288 12:17:35.773292  
 2289 12:17:35.780328  BS: BS_WRITE_TABLES times (us): entry 17197 run 490286 exit 157184
 2290 12:17:35.782601  call enable_fixed_mtrr()
 2291 12:17:35.782872  
 2292 12:17:35.785409  CBFS @ 1d00000 size 300000
 2293 12:17:35.791104  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 2294 12:17:35.791379  
 2295 12:17:35.795179  CPU physical address size: 39 bits
 2296 12:17:35.798875  CBFS: Locating 'fallback/payload'
 2297 12:17:35.802811  MTRR: Fixed MSR 0x250 0x0606060606060606
 2298 12:17:35.807271  MTRR: Fixed MSR 0x250 0x0606060606060606
 2299 12:17:35.810789  MTRR: Fixed MSR 0x258 0x0606060606060606
 2300 12:17:35.815223  MTRR: Fixed MSR 0x259 0x0000000000000000
 2301 12:17:35.815757  
 2302 12:17:35.818997  MTRR: Fixed MSR 0x268 0x0606060606060606
 2303 12:17:35.819496  
 2304 12:17:35.823304  MTRR: Fixed MSR 0x269 0x0606060606060606
 2305 12:17:35.827507  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2306 12:17:35.831360  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2307 12:17:35.835990  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2308 12:17:35.840073  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2309 12:17:35.843973  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2310 12:17:35.848083  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2311 12:17:35.848351  
 2312 12:17:35.852546  MTRR: Fixed MSR 0x258 0x0606060606060606
 2313 12:17:35.854959  call enable_fixed_mtrr()
 2314 12:17:35.858700  MTRR: Fixed MSR 0x259 0x0000000000000000
 2315 12:17:35.863297  MTRR: Fixed MSR 0x268 0x0606060606060606
 2316 12:17:35.867292  MTRR: Fixed MSR 0x269 0x0606060606060606
 2317 12:17:35.871114  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2318 12:17:35.874656  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2319 12:17:35.875292  
 2320 12:17:35.879343  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2321 12:17:35.883032  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2322 12:17:35.887504  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2323 12:17:35.887785  
 2324 12:17:35.891481  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2325 12:17:35.895412  CPU physical address size: 39 bits
 2326 12:17:35.897881  call enable_fixed_mtrr()
 2327 12:17:35.902655  MTRR: Fixed MSR 0x250 0x0606060606060606
 2328 12:17:35.906018  MTRR: Fixed MSR 0x250 0x0606060606060606
 2329 12:17:35.906290  
 2330 12:17:35.910560  MTRR: Fixed MSR 0x258 0x0606060606060606
 2331 12:17:35.914677  MTRR: Fixed MSR 0x259 0x0000000000000000
 2332 12:17:35.918328  MTRR: Fixed MSR 0x268 0x0606060606060606
 2333 12:17:35.922582  MTRR: Fixed MSR 0x269 0x0606060606060606
 2334 12:17:35.926513  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2335 12:17:35.930686  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2336 12:17:35.935058  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2337 12:17:35.935334  
 2338 12:17:35.938911  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2339 12:17:35.942717  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2340 12:17:35.943004  
 2341 12:17:35.947413  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2342 12:17:35.951670  MTRR: Fixed MSR 0x258 0x0606060606060606
 2343 12:17:35.954308  call enable_fixed_mtrr()
 2344 12:17:35.954811  
 2345 12:17:35.958252  MTRR: Fixed MSR 0x259 0x0000000000000000
 2346 12:17:35.962232  MTRR: Fixed MSR 0x268 0x0606060606060606
 2347 12:17:35.966554  MTRR: Fixed MSR 0x269 0x0606060606060606
 2348 12:17:35.970212  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2349 12:17:35.970475  
 2350 12:17:35.974411  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2351 12:17:35.978939  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2352 12:17:35.983147  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2353 12:17:35.983409  
 2354 12:17:35.986870  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2355 12:17:35.990929  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2356 12:17:35.995267  CPU physical address size: 39 bits
 2357 12:17:35.997685  call enable_fixed_mtrr()
 2358 12:17:35.998237  
 2359 12:17:36.001934  MTRR: Fixed MSR 0x250 0x0606060606060606
 2360 12:17:36.006044  MTRR: Fixed MSR 0x250 0x0606060606060606
 2361 12:17:36.010136  MTRR: Fixed MSR 0x258 0x0606060606060606
 2362 12:17:36.013807  MTRR: Fixed MSR 0x259 0x0000000000000000
 2363 12:17:36.017690  MTRR: Fixed MSR 0x268 0x0606060606060606
 2364 12:17:36.018067  
 2365 12:17:36.022497  MTRR: Fixed MSR 0x269 0x0606060606060606
 2366 12:17:36.025922  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2367 12:17:36.026690  
 2368 12:17:36.030823  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2369 12:17:36.034391  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2370 12:17:36.034707  
 2371 12:17:36.038646  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2372 12:17:36.042238  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2373 12:17:36.046268  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2374 12:17:36.046546  
 2375 12:17:36.051036  MTRR: Fixed MSR 0x258 0x0606060606060606
 2376 12:17:36.051374  
 2377 12:17:36.053753  call enable_fixed_mtrr()
 2378 12:17:36.057077  MTRR: Fixed MSR 0x259 0x0000000000000000
 2379 12:17:36.057346  
 2380 12:17:36.061649  MTRR: Fixed MSR 0x268 0x0606060606060606
 2381 12:17:36.061918  
 2382 12:17:36.065456  MTRR: Fixed MSR 0x269 0x0606060606060606
 2383 12:17:36.065757  
 2384 12:17:36.070081  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2385 12:17:36.073697  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2386 12:17:36.077709  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2387 12:17:36.078166  
 2388 12:17:36.082148  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2389 12:17:36.082420  
 2390 12:17:36.086044  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2391 12:17:36.089804  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2392 12:17:36.094343  CPU physical address size: 39 bits
 2393 12:17:36.094616  
 2394 12:17:36.097781  call enable_fixed_mtrr()
 2395 12:17:36.100352  CPU physical address size: 39 bits
 2396 12:17:36.104799  CBFS: Found @ offset 1cf4c0 size 3a954
 2397 12:17:36.107914  CPU physical address size: 39 bits
 2398 12:17:36.111763  CPU physical address size: 39 bits
 2399 12:17:36.115455  Checking segment from ROM address 0xffecf4f8
 2400 12:17:36.120237  Checking segment from ROM address 0xffecf514
 2401 12:17:36.120501  
 2402 12:17:36.125033  Loading segment from ROM address 0xffecf4f8
 2403 12:17:36.126747    code (compression=0)
 2404 12:17:36.127019  
 2405 12:17:36.136071    New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
 2406 12:17:36.144253  Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
 2407 12:17:36.144525  
 2408 12:17:36.145949  it's not compressed!
 2409 12:17:36.146216  
 2410 12:17:36.228481  [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
 2411 12:17:36.234760  Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
 2412 12:17:36.243387  Loading segment from ROM address 0xffecf514
 2413 12:17:36.245151    Entry Point 0x30100018
 2414 12:17:36.245419  
 2415 12:17:36.246861  Loaded segments
 2416 12:17:36.256823  Finalizing chipset.
 2417 12:17:36.258643  Finalizing SMM.
 2418 12:17:36.258903  
 2419 12:17:36.264505  BS: BS_PAYLOAD_LOAD times (us): entry 1 run 467047 exit 11553
 2420 12:17:36.264829  
 2421 12:17:36.268282  mp_park_aps done after 0 msecs.
 2422 12:17:36.272044  Jumping to boot code at 30100018(89c33000)
 2423 12:17:36.280887  CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
 2424 12:17:36.280974  
 2425 12:17:36.281234  
 2426 12:17:36.281496  
 2427 12:17:36.285344  end: 2.2.3 depthcharge-start (duration 00:00:26) [common]
 2428 12:17:36.285463  start: 2.2.4 bootloader-commands (timeout 00:04:34) [common]
 2429 12:17:36.285554  Setting prompt string to ['sarien:']
 2430 12:17:36.285634  bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:34)
 2431 12:17:36.285798  Starting depthcharge on sarien...
 2432 12:17:36.285881  
 2433 12:17:36.292277  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2434 12:17:36.292358  
 2435 12:17:36.299625  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2436 12:17:36.299711  
 2437 12:17:36.308019  WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
 2438 12:17:36.308113  
 2439 12:17:36.309689  BIOS MMAP details:
 2440 12:17:36.309774  
 2441 12:17:36.312977  IFD Base Offset  : 0x1000000
 2442 12:17:36.313246  
 2443 12:17:36.315777  IFD End Offset   : 0x2000000
 2444 12:17:36.315862  
 2445 12:17:36.319002  MMAP Size        : 0x1000000
 2446 12:17:36.319088  
 2447 12:17:36.321373  MMAP Start       : 0xff000000
 2448 12:17:36.321638  
 2449 12:17:36.328488  Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
 2450 12:17:36.328574  
 2451 12:17:36.337240  New NVMe Controller 0x3214e110 @ 00:1d:04
 2452 12:17:36.337328  
 2453 12:17:36.341038  New NVMe Controller 0x3214e1d8 @ 00:1d:00
 2454 12:17:36.341128  
 2455 12:17:36.346908  The GBB signature is at 0x30000014 and is:  24 47 42 42
 2456 12:17:36.346996  
 2457 12:17:36.354960  Wipe memory regions:
 2458 12:17:36.355050  
 2459 12:17:36.359268  	[0x00000000001000, 0x000000000a0000)
 2460 12:17:36.359347  
 2461 12:17:36.362824  	[0x00000000100000, 0x00000030000000)
 2462 12:17:36.362903  
 2463 12:17:36.448924  	[0x00000032751910, 0x00000089afd000)
 2464 12:17:36.449037  
 2465 12:17:36.602261  	[0x00000100000000, 0x0000026e800000)
 2466 12:17:36.602393  
 2467 12:17:37.615302  R8152: Initializing
 2468 12:17:37.615487  
 2469 12:17:37.617782  Version 6 (ocp_data = 5c30)
 2470 12:17:37.618062  
 2471 12:17:37.621906  R8152: Done initializing
 2472 12:17:37.621981  
 2473 12:17:37.623093  Adding net device
 2474 12:17:37.623340  
 2475 12:17:37.634499  [firmware-sarien-12200.B-collabora] Apr  9 2021 09:49:38
 2476 12:17:37.634601  
 2477 12:17:37.634873  
 2478 12:17:37.635438  
 2479 12:17:37.636198  Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2481 12:17:37.736851  sarien: tftpboot 192.168.201.1 8948157/tftp-deploy-vw_b1cxo/kernel/bzImage 8948157/tftp-deploy-vw_b1cxo/kernel/cmdline 8948157/tftp-deploy-vw_b1cxo/ramdisk/ramdisk.cpio.gz
 2482 12:17:37.737011  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2483 12:17:37.737133  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:32)
 2484 12:17:37.738035  tftpboot 192.168.201.1 8948157/tftp-deploy-vw_b1cxo/kernel/bzImage 8948157/tftp-deploy-vw_b1cxo/kernel/cmdline 8948157/tftp-deploy-vw_b1cxo/ramdisk/ramdisk.cpio.gz
 2485 12:17:37.738127  
 2486 12:17:37.740163  Waiting for link
 2487 12:17:37.740244  
 2488 12:17:37.940535  done.
 2489 12:17:37.940672  
 2490 12:17:37.943180  MAC: 00:24:32:30:7c:12
 2491 12:17:37.943260  
 2492 12:17:37.945947  Sending DHCP discover... done.
 2493 12:17:37.946030  
 2494 12:17:37.948787  Waiting for reply... done.
 2495 12:17:37.949332  
 2496 12:17:37.951693  Sending DHCP request... done.
 2497 12:17:37.951786  
 2498 12:17:37.954354  Waiting for reply... done.
 2499 12:17:37.954432  
 2500 12:17:37.957176  My ip is 192.168.201.190
 2501 12:17:37.957450  
 2502 12:17:37.960777  The DHCP server ip is 192.168.201.1
 2503 12:17:37.960856  
 2504 12:17:37.965620  TFTP server IP predefined by user: 192.168.201.1
 2505 12:17:37.965711  
 2506 12:17:37.972924  Bootfile predefined by user: 8948157/tftp-deploy-vw_b1cxo/kernel/bzImage
 2507 12:17:37.973023  
 2508 12:17:37.976393  Sending tftp read request... done.
 2509 12:17:37.976472  
 2510 12:17:37.979832  Waiting for the transfer... 
 2511 12:17:37.980315  
 2512 12:17:38.505238  00000000 ################################################################
 2513 12:17:38.505596  
 2514 12:17:39.026509  00080000 ################################################################
 2515 12:17:39.026899  
 2516 12:17:39.546326  00100000 ################################################################
 2517 12:17:39.546703  
 2518 12:17:40.107766  00180000 ################################################################
 2519 12:17:40.108107  
 2520 12:17:40.630428  00200000 ################################################################
 2521 12:17:40.630779  
 2522 12:17:41.179960  00280000 ################################################################
 2523 12:17:41.180473  
 2524 12:17:41.716237  00300000 ################################################################
 2525 12:17:41.716616  
 2526 12:17:42.263159  00380000 ################################################################
 2527 12:17:42.263511  
 2528 12:17:42.798031  00400000 ################################################################
 2529 12:17:42.798390  
 2530 12:17:43.340527  00480000 ################################################################
 2531 12:17:43.341096  
 2532 12:17:43.880059  00500000 ################################################################
 2533 12:17:43.880417  
 2534 12:17:44.418395  00580000 ################################################################
 2535 12:17:44.418755  
 2536 12:17:44.960597  00600000 ################################################################
 2537 12:17:44.961027  
 2538 12:17:45.489125  00680000 ################################################################
 2539 12:17:45.489824  
 2540 12:17:45.731625  00700000 ############################ done.
 2541 12:17:45.731762  
 2542 12:17:45.735501  The bootfile was 7569296 bytes long.
 2543 12:17:45.735591  
 2544 12:17:45.739221  Sending tftp read request... done.
 2545 12:17:45.739303  
 2546 12:17:45.742386  Waiting for the transfer... 
 2547 12:17:45.742468  
 2548 12:17:46.296422  00000000 ################################################################
 2549 12:17:46.297622  
 2550 12:17:46.835538  00080000 ################################################################
 2551 12:17:46.835908  
 2552 12:17:47.359336  00100000 ################################################################
 2553 12:17:47.359705  
 2554 12:17:47.879991  00180000 ################################################################
 2555 12:17:47.880569  
 2556 12:17:48.395340  00200000 ################################################################
 2557 12:17:48.395718  
 2558 12:17:48.925751  00280000 ################################################################
 2559 12:17:48.925892  
 2560 12:17:49.445631  00300000 ################################################################
 2561 12:17:49.446056  
 2562 12:17:49.967301  00380000 ################################################################
 2563 12:17:49.967823  
 2564 12:17:50.531944  00400000 ################################################################
 2565 12:17:50.533295  
 2566 12:17:51.172577  00480000 ################################################################
 2567 12:17:51.172739  
 2568 12:17:51.811582  00500000 ################################################################
 2569 12:17:51.812152  
 2570 12:17:52.423715  00580000 ################################################################
 2571 12:17:52.424098  
 2572 12:17:53.048170  00600000 ################################################################
 2573 12:17:53.048783  
 2574 12:17:53.693766  00680000 ################################################################
 2575 12:17:53.694344  
 2576 12:17:54.304128  00700000 ################################################################
 2577 12:17:54.304706  
 2578 12:17:54.976510  00780000 ################################################################
 2579 12:17:54.977994  
 2580 12:17:55.192464  00800000 ##################### done.
 2581 12:17:55.193605  
 2582 12:17:55.196026  Sending tftp read request... done.
 2583 12:17:55.197058  
 2584 12:17:55.198707  Waiting for the transfer... 
 2585 12:17:55.199088  
 2586 12:17:55.200686  00000000 # done.
 2587 12:17:55.201057  
 2588 12:17:55.209894  Command line loaded dynamically from TFTP file: 8948157/tftp-deploy-vw_b1cxo/kernel/cmdline
 2589 12:17:55.210349  
 2590 12:17:55.226922  The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
 2591 12:17:55.227365  
 2592 12:17:55.234182  Shutting down all USB controllers.
 2593 12:17:55.235395  
 2594 12:17:55.236629  Removing current net device
 2595 12:17:55.237020  
 2596 12:17:55.246963  EC: exit firmware mode
 2597 12:17:55.247464  
 2598 12:17:55.248767  Finalizing coreboot
 2599 12:17:55.249173  
 2600 12:17:55.255067  Exiting depthcharge with code 4 at timestamp: 26577563
 2601 12:17:55.255526  
 2602 12:17:55.256611  
 2603 12:17:55.256905  
 2604 12:17:55.257188  Starting kernel ...
 2605 12:17:55.258159  end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
 2606 12:17:55.258537  start: 2.2.5 auto-login-action (timeout 00:04:15) [common]
 2607 12:17:55.258824  Setting prompt string to ['Linux version [0-9]']
 2608 12:17:55.259085  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2609 12:17:55.259340  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2610 12:17:55.259968  
 2611 12:17:55.260241  
 2612 12:17:55.260472  
 2614 12:22:10.258786  end: 2.2.5 auto-login-action (duration 00:04:15) [common]
 2616 12:22:10.259044  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 255 seconds'
 2618 12:22:10.259273  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2621 12:22:10.259562  end: 2 depthcharge-action (duration 00:05:00) [common]
 2623 12:22:10.259814  Cleaning after the job
 2624 12:22:10.259901  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948157/tftp-deploy-vw_b1cxo/ramdisk
 2625 12:22:10.260596  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948157/tftp-deploy-vw_b1cxo/kernel
 2626 12:22:10.261131  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948157/tftp-deploy-vw_b1cxo/modules
 2627 12:22:10.261324  start: 5.1 power-off (timeout 00:00:30) [common]
 2628 12:22:10.261480  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-2' '--port=1' '--command=off'
 2629 12:22:10.281257  >> Command sent successfully.

 2630 12:22:10.283195  Returned 0 in 0 seconds
 2631 12:22:10.383504  end: 5.1 power-off (duration 00:00:00) [common]
 2633 12:22:10.383833  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2634 12:22:10.384079  Listened to connection for namespace 'common' for up to 1s
 2635 12:22:11.387770  Finalising connection for namespace 'common'
 2636 12:22:11.387941  Disconnecting from shell: Finalise
 2637 12:22:11.488636  end: 5.2 read-feedback (duration 00:00:01) [common]
 2638 12:22:11.488780  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8948157
 2639 12:22:11.493873  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8948157
 2640 12:22:11.494008  JobError: Your job cannot terminate cleanly.