Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:16:38.303199 lava-dispatcher, installed at version: 2022.11
2 12:16:38.303393 start: 0 validate
3 12:16:38.303538 Start time: 2023-01-31 12:16:38.303531+00:00 (UTC)
4 12:16:38.303677 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:16:38.303806 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230127.0%2Famd64%2Finitrd.cpio.gz exists
6 12:16:38.307179 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:16:38.307312 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:16:40.818135 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:16:40.818315 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230127.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:16:40.822709 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:16:40.822848 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:16:40.828493 validate duration: 2.53
14 12:16:40.828766 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:16:40.828878 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:16:40.828979 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:16:40.829083 Not decompressing ramdisk as can be used compressed.
18 12:16:40.829277 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230127.0/amd64/initrd.cpio.gz
19 12:16:40.829369 saving as /var/lib/lava/dispatcher/tmp/8948126/tftp-deploy-o9av6o1a/ramdisk/initrd.cpio.gz
20 12:16:40.829459 total size: 5432117 (5MB)
21 12:16:40.831569 progress 0% (0MB)
22 12:16:40.836651 progress 5% (0MB)
23 12:16:40.842217 progress 10% (0MB)
24 12:16:40.844254 progress 15% (0MB)
25 12:16:40.847196 progress 20% (1MB)
26 12:16:40.849174 progress 25% (1MB)
27 12:16:40.852571 progress 30% (1MB)
28 12:16:40.857609 progress 35% (1MB)
29 12:16:40.861459 progress 40% (2MB)
30 12:16:40.866826 progress 45% (2MB)
31 12:16:40.870583 progress 50% (2MB)
32 12:16:40.875985 progress 55% (2MB)
33 12:16:40.880688 progress 60% (3MB)
34 12:16:40.884627 progress 65% (3MB)
35 12:16:40.890546 progress 70% (3MB)
36 12:16:40.896262 progress 75% (3MB)
37 12:16:40.903155 progress 80% (4MB)
38 12:16:40.911305 progress 85% (4MB)
39 12:16:40.917258 progress 90% (4MB)
40 12:16:40.924087 progress 95% (4MB)
41 12:16:40.930672 progress 100% (5MB)
42 12:16:40.930958 5MB downloaded in 0.10s (51.04MB/s)
43 12:16:40.931136 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:16:40.931404 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:16:40.931497 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:16:40.931599 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:16:40.931712 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:16:40.931784 saving as /var/lib/lava/dispatcher/tmp/8948126/tftp-deploy-o9av6o1a/kernel/bzImage
50 12:16:40.931850 total size: 7569296 (7MB)
51 12:16:40.931923 No compression specified
52 12:16:40.934448 progress 0% (0MB)
53 12:16:40.945221 progress 5% (0MB)
54 12:16:40.954550 progress 10% (0MB)
55 12:16:40.964483 progress 15% (1MB)
56 12:16:40.974574 progress 20% (1MB)
57 12:16:40.982592 progress 25% (1MB)
58 12:16:40.993714 progress 30% (2MB)
59 12:16:41.006118 progress 35% (2MB)
60 12:16:41.020286 progress 40% (2MB)
61 12:16:41.032659 progress 45% (3MB)
62 12:16:41.046645 progress 50% (3MB)
63 12:16:41.060607 progress 55% (4MB)
64 12:16:41.072266 progress 60% (4MB)
65 12:16:41.084478 progress 65% (4MB)
66 12:16:41.098359 progress 70% (5MB)
67 12:16:41.110277 progress 75% (5MB)
68 12:16:41.121388 progress 80% (5MB)
69 12:16:41.134110 progress 85% (6MB)
70 12:16:41.147148 progress 90% (6MB)
71 12:16:41.157566 progress 95% (6MB)
72 12:16:41.166406 progress 100% (7MB)
73 12:16:41.166714 7MB downloaded in 0.23s (30.74MB/s)
74 12:16:41.166875 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:16:41.167130 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:16:41.167230 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:16:41.167322 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:16:41.167442 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230127.0/amd64/full.rootfs.tar.xz
80 12:16:41.167522 saving as /var/lib/lava/dispatcher/tmp/8948126/tftp-deploy-o9av6o1a/nfsrootfs/full.rootfs.tar
81 12:16:41.167587 total size: 133355208 (127MB)
82 12:16:41.167649 Using unxz to decompress xz
83 12:16:41.172156 progress 0% (0MB)
84 12:16:41.529285 progress 5% (6MB)
85 12:16:41.906466 progress 10% (12MB)
86 12:16:42.207211 progress 15% (19MB)
87 12:16:42.413926 progress 20% (25MB)
88 12:16:42.673263 progress 25% (31MB)
89 12:16:43.034627 progress 30% (38MB)
90 12:16:43.402891 progress 35% (44MB)
91 12:16:43.808058 progress 40% (50MB)
92 12:16:44.208308 progress 45% (57MB)
93 12:16:44.584468 progress 50% (63MB)
94 12:16:44.974108 progress 55% (69MB)
95 12:16:45.344999 progress 60% (76MB)
96 12:16:45.722661 progress 65% (82MB)
97 12:16:46.102016 progress 70% (89MB)
98 12:16:46.477536 progress 75% (95MB)
99 12:16:46.934220 progress 80% (101MB)
100 12:16:47.390929 progress 85% (108MB)
101 12:16:47.675689 progress 90% (114MB)
102 12:16:48.040267 progress 95% (120MB)
103 12:16:48.453173 progress 100% (127MB)
104 12:16:48.459394 127MB downloaded in 7.29s (17.44MB/s)
105 12:16:48.459679 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:16:48.459962 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:16:48.460064 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:16:48.460159 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:16:48.460278 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:16:48.460349 saving as /var/lib/lava/dispatcher/tmp/8948126/tftp-deploy-o9av6o1a/modules/modules.tar
112 12:16:48.460411 total size: 51860 (0MB)
113 12:16:48.460478 Using unxz to decompress xz
114 12:16:48.465070 progress 63% (0MB)
115 12:16:48.465479 progress 100% (0MB)
116 12:16:48.469017 0MB downloaded in 0.01s (5.75MB/s)
117 12:16:48.469268 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:16:48.469551 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:16:48.469650 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 12:16:48.469754 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 12:16:49.771494 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8948126/extract-nfsrootfs-wh6_c59b
123 12:16:49.771690 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 12:16:49.771796 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 12:16:49.771938 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_
126 12:16:49.772042 makedir: /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin
127 12:16:49.772131 makedir: /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/tests
128 12:16:49.772215 makedir: /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/results
129 12:16:49.772318 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-add-keys
130 12:16:49.772448 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-add-sources
131 12:16:49.772604 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-background-process-start
132 12:16:49.772723 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-background-process-stop
133 12:16:49.772838 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-common-functions
134 12:16:49.772949 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-echo-ipv4
135 12:16:49.773062 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-install-packages
136 12:16:49.773172 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-installed-packages
137 12:16:49.773282 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-os-build
138 12:16:49.773394 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-probe-channel
139 12:16:49.773548 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-probe-ip
140 12:16:49.773664 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-target-ip
141 12:16:49.773776 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-target-mac
142 12:16:49.773895 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-target-storage
143 12:16:49.774013 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-test-case
144 12:16:49.774124 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-test-event
145 12:16:49.774271 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-test-feedback
146 12:16:49.774390 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-test-raise
147 12:16:49.774498 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-test-reference
148 12:16:49.774611 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-test-runner
149 12:16:49.774722 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-test-set
150 12:16:49.774830 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-test-shell
151 12:16:49.774940 Updating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-install-packages (oe)
152 12:16:49.775058 Updating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/bin/lava-installed-packages (oe)
153 12:16:49.775160 Creating /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/environment
154 12:16:49.775250 LAVA metadata
155 12:16:49.775347 - LAVA_JOB_ID=8948126
156 12:16:49.775411 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:16:49.775511 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 12:16:49.775581 skipped lava-vland-overlay
159 12:16:49.775659 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:16:49.775742 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 12:16:49.775806 skipped lava-multinode-overlay
162 12:16:49.775887 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:16:49.775971 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 12:16:49.776042 Loading test definitions
165 12:16:49.776136 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 12:16:49.776210 Using /lava-8948126 at stage 0
167 12:16:49.776465 uuid=8948126_1.5.2.3.1 testdef=None
168 12:16:49.776556 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 12:16:49.776647 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 12:16:49.777128 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 12:16:49.777368 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 12:16:49.778003 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 12:16:49.778264 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 12:16:49.778824 runner path: /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/0/tests/0_dmesg test_uuid 8948126_1.5.2.3.1
177 12:16:49.778976 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 12:16:49.779222 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 12:16:49.779302 Using /lava-8948126 at stage 1
181 12:16:49.779562 uuid=8948126_1.5.2.3.5 testdef=None
182 12:16:49.779656 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 12:16:49.779750 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 12:16:49.780212 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 12:16:49.780449 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 12:16:49.781049 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 12:16:49.781302 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 12:16:49.782036 runner path: /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/1/tests/1_bootrr test_uuid 8948126_1.5.2.3.5
191 12:16:49.782185 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 12:16:49.782409 Creating lava-test-runner.conf files
194 12:16:49.782479 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/0 for stage 0
195 12:16:49.782564 - 0_dmesg
196 12:16:49.782642 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8948126/lava-overlay-wi4jtil_/lava-8948126/1 for stage 1
197 12:16:49.782730 - 1_bootrr
198 12:16:49.782828 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 12:16:49.782922 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 12:16:49.788617 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 12:16:49.788729 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 12:16:49.788822 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 12:16:49.788913 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 12:16:49.789011 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 12:16:49.894695 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 12:16:49.895024 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 12:16:49.895154 extracting modules file /var/lib/lava/dispatcher/tmp/8948126/tftp-deploy-o9av6o1a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8948126/extract-nfsrootfs-wh6_c59b
208 12:16:49.899365 extracting modules file /var/lib/lava/dispatcher/tmp/8948126/tftp-deploy-o9av6o1a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8948126/extract-overlay-ramdisk-2fzi2izb/ramdisk
209 12:16:49.903332 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 12:16:49.903458 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 12:16:49.903550 [common] Applying overlay to NFS
212 12:16:49.903627 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8948126/compress-overlay-le80sqjr/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8948126/extract-nfsrootfs-wh6_c59b
213 12:16:49.907643 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 12:16:49.907757 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 12:16:49.907852 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 12:16:49.907947 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 12:16:49.908033 Building ramdisk /var/lib/lava/dispatcher/tmp/8948126/extract-overlay-ramdisk-2fzi2izb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8948126/extract-overlay-ramdisk-2fzi2izb/ramdisk
218 12:16:49.941127 >> 24548 blocks
219 12:16:50.414487 rename /var/lib/lava/dispatcher/tmp/8948126/extract-overlay-ramdisk-2fzi2izb/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8948126/tftp-deploy-o9av6o1a/ramdisk/ramdisk.cpio.gz
220 12:16:50.414890 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 12:16:50.415023 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
222 12:16:50.415141 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
223 12:16:50.415244 No mkimage arch provided, not using FIT.
224 12:16:50.415354 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 12:16:50.415450 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 12:16:50.415568 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 12:16:50.415672 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
228 12:16:50.415759 No LXC device requested
229 12:16:50.415859 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 12:16:50.415956 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
231 12:16:50.416042 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 12:16:50.416125 Checking files for TFTP limit of 4294967296 bytes.
233 12:16:50.416537 end: 1 tftp-deploy (duration 00:00:10) [common]
234 12:16:50.416653 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 12:16:50.416756 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 12:16:50.416899 substitutions:
237 12:16:50.416972 - {DTB}: None
238 12:16:50.417040 - {INITRD}: 8948126/tftp-deploy-o9av6o1a/ramdisk/ramdisk.cpio.gz
239 12:16:50.417116 - {KERNEL}: 8948126/tftp-deploy-o9av6o1a/kernel/bzImage
240 12:16:50.417179 - {LAVA_MAC}: None
241 12:16:50.417240 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8948126/extract-nfsrootfs-wh6_c59b
242 12:16:50.417307 - {NFS_SERVER_IP}: 192.168.201.1
243 12:16:50.417372 - {PRESEED_CONFIG}: None
244 12:16:50.417436 - {PRESEED_LOCAL}: None
245 12:16:50.417507 - {RAMDISK}: 8948126/tftp-deploy-o9av6o1a/ramdisk/ramdisk.cpio.gz
246 12:16:50.417577 - {ROOT_PART}: None
247 12:16:50.417638 - {ROOT}: None
248 12:16:50.417697 - {SERVER_IP}: 192.168.201.1
249 12:16:50.417755 - {TEE}: None
250 12:16:50.417819 Parsed boot commands:
251 12:16:50.417886 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 12:16:50.418053 Parsed boot commands: tftpboot 192.168.201.1 8948126/tftp-deploy-o9av6o1a/kernel/bzImage 8948126/tftp-deploy-o9av6o1a/kernel/cmdline 8948126/tftp-deploy-o9av6o1a/ramdisk/ramdisk.cpio.gz
253 12:16:50.418163 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 12:16:50.418260 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 12:16:50.418365 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 12:16:50.418470 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 12:16:50.418547 Not connected, no need to disconnect.
258 12:16:50.418635 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 12:16:50.418725 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 12:16:50.418797 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-5'
261 12:16:50.421373 Setting prompt string to ['lava-test: # ']
262 12:16:50.421700 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 12:16:50.421824 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 12:16:50.421941 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 12:16:50.422048 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 12:16:50.422249 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-5' '--port=1' '--command=reboot'
267 12:16:50.441105 >> Command sent successfully.
268 12:16:50.443168 Returned 0 in 0 seconds
269 12:16:50.543966 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 12:16:50.544342 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 12:16:50.544470 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 12:16:50.544593 Setting prompt string to 'Starting depthcharge on Magolor...'
274 12:16:50.544675 Changing prompt to 'Starting depthcharge on Magolor...'
275 12:16:50.544768 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
276 12:16:50.545075 [Enter `^Ec?' for help]
277 12:16:57.784126
278 12:16:57.784761
279 12:16:57.791751 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
280 12:16:57.795364
281 12:16:57.798326 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
282 12:16:57.802043 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
283 12:16:57.808883 CPU: AES supported, TXT NOT supported, VT supported
284 12:16:57.811712 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
285 12:16:57.818320 PCH: device id 4d87 (rev 01) is Jasperlake Super
286 12:16:57.821763 IGD: device id 4e55 (rev 01) is Jasperlake GT4
287 12:16:57.824819 VBOOT: Loading verstage.
288 12:16:57.828321 FMAP: Found "FLASH" version 1.1 at 0xc04000.
289 12:16:57.835319 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
290 12:16:57.839549 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
291 12:16:57.846288 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
292 12:16:57.846732
293 12:16:57.847079
294 12:16:57.855792 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
295 12:16:57.859072
296 12:16:57.872495 Probing TPM: . done!
297 12:16:57.876083 TPM ready after 0 ms
298 12:16:57.878999 Connected to device vid:did:rid of 1ae0:0028:00
299 12:16:57.891437 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
300 12:16:57.898002 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
301 12:16:58.060360 Initialized TPM device CR50 revision 0
302 12:16:58.069462 tlcl_send_startup: Startup return code is 0
303 12:16:58.069555 TPM: setup succeeded
304 12:16:58.083805 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
305 12:16:58.097534 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
306 12:16:58.110209 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
307 12:16:58.120380 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
308 12:16:58.123942 Chrome EC: UHEPI supported
309 12:16:58.127081 Phase 1
310 12:16:58.130713 FMAP: area GBB found @ c05000 (12288 bytes)
311 12:16:58.137393 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
312 12:16:58.144011 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
313 12:16:58.146962 Recovery requested (1009000e)
314 12:16:58.156649 TPM: Extending digest for VBOOT: boot mode into PCR 0
315 12:16:58.162853 tlcl_extend: response is 0
316 12:16:58.175559 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
317 12:16:58.181593 tlcl_extend: response is 0
318 12:16:58.188273 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
319 12:16:58.192050 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
320 12:16:58.198470 BS: verstage times (exec / console): total (unknown) / 124 ms
321 12:16:58.198924
322 12:16:58.201534
323 12:16:58.211889 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
324 12:16:58.218756 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
325 12:16:58.221650 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
326 12:16:58.225235 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
327 12:16:58.231681 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
328 12:16:58.235473 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
329 12:16:58.238381 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
330 12:16:58.242028 TCO_STS: 0000 0001
331 12:16:58.244802 GEN_PMCON: d0015038 00002200
332 12:16:58.248518 GBLRST_CAUSE: 00000000 00000000
333 12:16:58.248951 prev_sleep_state 5
334 12:16:58.251994 Boot Count incremented to 12208
335 12:16:58.258580 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
336 12:16:58.262271 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
337 12:16:58.266242 Chrome EC: UHEPI supported
338 12:16:58.272960 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
339 12:16:58.279253 Probing TPM: done!
340 12:16:58.285931 Connected to device vid:did:rid of 1ae0:0028:00
341 12:16:58.296358 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
342 12:16:58.299389 Initialized TPM device CR50 revision 0
343 12:16:58.313888 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
344 12:16:58.320419 MRC: Hash idx 0x100b comparison successful.
345 12:16:58.323463 MRC cache found, size 5458
346 12:16:58.323658 bootmode is set to: 2
347 12:16:58.326936 SPD INDEX = 0
348 12:16:58.330449 CBFS: Found 'spd.bin' @0x40c40 size 0x600
349 12:16:58.333498 SPD: module type is LPDDR4X
350 12:16:58.340335 SPD: module part number is MT53E512M32D2NP-046 WT:E
351 12:16:58.346639 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
352 12:16:58.350234 SPD: device width 16 bits, bus width 32 bits
353 12:16:58.353197 SPD: module size is 4096 MB (per channel)
354 12:16:58.356697 meminit_channels: DRAM half-populated
355 12:16:58.440353 CBMEM:
356 12:16:58.443296 IMD: root @ 0x76fff000 254 entries.
357 12:16:58.446866 IMD: root @ 0x76ffec00 62 entries.
358 12:16:58.450297 FMAP: area RO_VPD found @ c00000 (16384 bytes)
359 12:16:58.456899 WARNING: RO_VPD is uninitialized or empty.
360 12:16:58.460005 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
361 12:16:58.463966 External stage cache:
362 12:16:58.467478 IMD: root @ 0x7b3ff000 254 entries.
363 12:16:58.470321 IMD: root @ 0x7b3fec00 62 entries.
364 12:16:58.480470 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
365 12:16:58.486685 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
366 12:16:58.493774 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
367 12:16:58.502151 MRC: 'RECOVERY_MRC_CACHE' does not need update.
368 12:16:58.505250 cse_lite: Skip switching to RW in the recovery path
369 12:16:58.508757
370 12:16:58.508841 1 DIMMs found
371 12:16:58.508909 SMM Memory Map
372 12:16:58.511720 SMRAM : 0x7b000000 0x800000
373 12:16:58.515252 Subregion 0: 0x7b000000 0x200000
374 12:16:58.518218
375 12:16:58.522032 Subregion 1: 0x7b200000 0x200000
376 12:16:58.525591 Subregion 2: 0x7b400000 0x400000
377 12:16:58.525675 top_of_ram = 0x77000000
378 12:16:58.531647 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 12:16:58.538133 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 12:16:58.541940 MTRR Range: Start=ff000000 End=0 (Size 1000000)
381 12:16:58.548553 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
382 12:16:58.552046 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
383 12:16:58.564188 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
384 12:16:58.567630 Processing 188 relocs. Offset value of 0x74c0e000
385 12:16:58.570556
386 12:16:58.577805 BS: romstage times (exec / console): total (unknown) / 256 ms
387 12:16:58.582176
388 12:16:58.582574
389 12:16:58.592342 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
390 12:16:58.595848 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 12:16:58.602637 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
392 12:16:58.609206 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
393 12:16:58.665340 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
394 12:16:58.672098 Processing 4805 relocs. Offset value of 0x75da8000
395 12:16:58.675451 BS: postcar times (exec / console): total (unknown) / 42 ms
396 12:16:58.678781
397 12:16:58.679226
398 12:16:58.688015 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
399 12:16:58.688459 Normal boot
400 12:16:58.692291 EC returned error result code 3
401 12:16:58.695283 FW_CONFIG value is 0x204
402 12:16:58.699029 GENERIC: 0.0 disabled by fw_config
403 12:16:58.705206 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
404 12:16:58.708822 I2C: 00:10 disabled by fw_config
405 12:16:58.712756 I2C: 00:10 disabled by fw_config
406 12:16:58.715399 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
407 12:16:58.722715 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
408 12:16:58.725410 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
409 12:16:58.732331 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
410 12:16:58.735183 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
411 12:16:58.739075 I2C: 00:10 disabled by fw_config
412 12:16:58.745868 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
413 12:16:58.752040 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
414 12:16:58.755662 I2C: 00:1a disabled by fw_config
415 12:16:58.758626 I2C: 00:1a disabled by fw_config
416 12:16:58.762315 fw_config match found: AUDIO_AMP=UNPROVISIONED
417 12:16:58.769122 fw_config match found: AUDIO_AMP=UNPROVISIONED
418 12:16:58.772146 GENERIC: 0.0 disabled by fw_config
419 12:16:58.775276 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
420 12:16:58.781728 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
421 12:16:58.788585 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
422 12:16:58.791564 microcode: Update skipped, already up-to-date
423 12:16:58.795096 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
424 12:16:58.823814 Detected 2 core, 2 thread CPU.
425 12:16:58.827255 Setting up SMI for CPU
426 12:16:58.830238 IED base = 0x7b400000
427 12:16:58.830479 IED size = 0x00400000
428 12:16:58.834103 Will perform SMM setup.
429 12:16:58.837067 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
430 12:16:58.846889 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
431 12:16:58.850761 Processing 16 relocs. Offset value of 0x00030000
432 12:16:58.854158 Attempting to start 1 APs
433 12:16:58.857666 Waiting for 10ms after sending INIT.
434 12:16:58.873802 Waiting for 1st SIPI to complete...done.
435 12:16:58.873950 AP: slot 1 apic_id 2.
436 12:16:58.880028 Waiting for 2nd SIPI to complete...done.
437 12:16:58.886799 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
438 12:16:58.893922 Processing 13 relocs. Offset value of 0x00038000
439 12:16:58.894018 Unable to locate Global NVS
440 12:16:58.903431 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
441 12:16:58.907183 Installing permanent SMM handler to 0x7b000000
442 12:16:58.913306 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
443 12:16:58.916745
444 12:16:58.920272 Processing 704 relocs. Offset value of 0x7b010000
445 12:16:58.926946 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
446 12:16:58.933769 Processing 13 relocs. Offset value of 0x7b008000
447 12:16:58.940410 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
448 12:16:58.943309 Unable to locate Global NVS
449 12:16:58.950223 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
450 12:16:58.953322 Clearing SMI status registers
451 12:16:58.953411 SMI_STS: PM1
452 12:16:58.956924 PM1_STS: PWRBTN
453 12:16:58.957013 TCO_STS: INTRD_DET
454 12:16:58.960546 GPE0 STD STS:
455 12:16:58.967098 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
456 12:16:58.970064 In relocation handler: CPU 0
457 12:16:58.973746 New SMBASE=0x7b000000 IEDBASE=0x7b400000
458 12:16:58.976746 Writing SMRR. base = 0x7b000006, mask=0xff800800
459 12:16:58.980239
460 12:16:58.980342 Relocation complete.
461 12:16:58.986937 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
462 12:16:58.990125 In relocation handler: CPU 1
463 12:16:58.993546 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
464 12:16:58.999984 Writing SMRR. base = 0x7b000006, mask=0xff800800
465 12:16:59.003647 Relocation complete.
466 12:16:59.003733 Initializing CPU #0
467 12:16:59.006739 CPU: vendor Intel device 906c0
468 12:16:59.010564 CPU: family 06, model 9c, stepping 00
469 12:16:59.013672 Clearing out pending MCEs
470 12:16:59.017175 Setting up local APIC...
471 12:16:59.019787 apic_id: 0x00 done.
472 12:16:59.019880 Turbo is available but hidden
473 12:16:59.023500
474 12:16:59.023599 Turbo is available and visible
475 12:16:59.030081 microcode: Update skipped, already up-to-date
476 12:16:59.030170 CPU #0 initialized
477 12:16:59.033176 Initializing CPU #1
478 12:16:59.036815 CPU: vendor Intel device 906c0
479 12:16:59.040108 CPU: family 06, model 9c, stepping 00
480 12:16:59.043143 Clearing out pending MCEs
481 12:16:59.047017 Setting up local APIC...
482 12:16:59.047104 apic_id: 0x02 done.
483 12:16:59.052854 microcode: Update skipped, already up-to-date
484 12:16:59.052940 CPU #1 initialized
485 12:16:59.059632 bsp_do_flight_plan done after 175 msecs.
486 12:16:59.063381 CPU: frequency set to 2800 MHz
487 12:16:59.063464 Enabling SMIs.
488 12:16:59.069491 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
489 12:16:59.079979 Probing TPM: done!
490 12:16:59.086589 Connected to device vid:did:rid of 1ae0:0028:00
491 12:16:59.096440 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
492 12:16:59.099860 Initialized TPM device CR50 revision 0
493 12:16:59.102746 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
494 12:16:59.110192 Found a VBT of 7680 bytes after decompression
495 12:16:59.116923 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
496 12:16:59.152125 Detected 2 core, 2 thread CPU.
497 12:16:59.155835 Detected 2 core, 2 thread CPU.
498 12:16:59.517956 Display FSP Version Info HOB
499 12:16:59.520957 Reference Code - CPU = 8.7.22.30
500 12:16:59.523924 uCode Version = 24.0.0.1f
501 12:16:59.527703 TXT ACM version = ff.ff.ff.ffff
502 12:16:59.530533 Reference Code - ME = 8.7.22.30
503 12:16:59.534136 MEBx version = 0.0.0.0
504 12:16:59.537845 ME Firmware Version = Consumer SKU
505 12:16:59.540888 Reference Code - PCH = 8.7.22.30
506 12:16:59.543888 PCH-CRID Status = Disabled
507 12:16:59.547607 PCH-CRID Original Value = ff.ff.ff.ffff
508 12:16:59.550526 PCH-CRID New Value = ff.ff.ff.ffff
509 12:16:59.554169 OPROM - RST - RAID = ff.ff.ff.ffff
510 12:16:59.557265 PCH Hsio Version = 4.0.0.0
511 12:16:59.560692 Reference Code - SA - System Agent = 8.7.22.30
512 12:16:59.564267 Reference Code - MRC = 0.0.4.68
513 12:16:59.567215 SA - PCIe Version = 8.7.22.30
514 12:16:59.570713 SA-CRID Status = Disabled
515 12:16:59.573772 SA-CRID Original Value = 0.0.0.0
516 12:16:59.577355 SA-CRID New Value = 0.0.0.0
517 12:16:59.580777 OPROM - VBIOS = ff.ff.ff.ffff
518 12:16:59.583926 IO Manageability Engine FW Version = ff.ff.ff.ffff
519 12:16:59.587370 PHY Build Version = ff.ff.ff.ffff
520 12:16:59.590443 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
521 12:16:59.594064
522 12:16:59.597153 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
523 12:16:59.600626 ITSS IRQ Polarities Before:
524 12:16:59.603670 IPC0: 0xffffffff
525 12:16:59.603753 IPC1: 0xffffffff
526 12:16:59.607114 IPC2: 0xffffffff
527 12:16:59.607198 IPC3: 0xffffffff
528 12:16:59.610750 ITSS IRQ Polarities After:
529 12:16:59.613729 IPC0: 0xffffffff
530 12:16:59.613813 IPC1: 0xffffffff
531 12:16:59.617387 IPC2: 0xffffffff
532 12:16:59.617506 IPC3: 0xffffffff
533 12:16:59.630411 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
534 12:16:59.637191 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
535 12:16:59.637278 Enumerating buses...
536 12:16:59.643845 Show all devs... Before device enumeration.
537 12:16:59.643929 Root Device: enabled 1
538 12:16:59.647309 CPU_CLUSTER: 0: enabled 1
539 12:16:59.650827 DOMAIN: 0000: enabled 1
540 12:16:59.653832 PCI: 00:00.0: enabled 1
541 12:16:59.653915 PCI: 00:02.0: enabled 1
542 12:16:59.657424 PCI: 00:04.0: enabled 1
543 12:16:59.660514 PCI: 00:05.0: enabled 1
544 12:16:59.664063 PCI: 00:09.0: enabled 0
545 12:16:59.664146 PCI: 00:12.6: enabled 0
546 12:16:59.667222 PCI: 00:14.0: enabled 1
547 12:16:59.670885 PCI: 00:14.1: enabled 0
548 12:16:59.673833 PCI: 00:14.2: enabled 0
549 12:16:59.673917 PCI: 00:14.3: enabled 1
550 12:16:59.676959 PCI: 00:14.5: enabled 1
551 12:16:59.680533 PCI: 00:15.0: enabled 1
552 12:16:59.680616 PCI: 00:15.1: enabled 1
553 12:16:59.683419
554 12:16:59.683502 PCI: 00:15.2: enabled 1
555 12:16:59.687102 PCI: 00:15.3: enabled 1
556 12:16:59.690109 PCI: 00:16.0: enabled 1
557 12:16:59.690193 PCI: 00:16.1: enabled 0
558 12:16:59.693665 PCI: 00:16.4: enabled 0
559 12:16:59.697201 PCI: 00:16.5: enabled 0
560 12:16:59.700332 PCI: 00:17.0: enabled 0
561 12:16:59.700415 PCI: 00:19.0: enabled 1
562 12:16:59.703336 PCI: 00:19.1: enabled 0
563 12:16:59.706929 PCI: 00:19.2: enabled 1
564 12:16:59.710647 PCI: 00:1a.0: enabled 1
565 12:16:59.710732 PCI: 00:1c.0: enabled 0
566 12:16:59.713669 PCI: 00:1c.1: enabled 0
567 12:16:59.716615 PCI: 00:1c.2: enabled 0
568 12:16:59.720322 PCI: 00:1c.3: enabled 0
569 12:16:59.720406 PCI: 00:1c.4: enabled 0
570 12:16:59.723226 PCI: 00:1c.5: enabled 0
571 12:16:59.726800 PCI: 00:1c.6: enabled 0
572 12:16:59.726885 PCI: 00:1c.7: enabled 1
573 12:16:59.729942 PCI: 00:1e.0: enabled 0
574 12:16:59.733464 PCI: 00:1e.1: enabled 0
575 12:16:59.736431 PCI: 00:1e.2: enabled 1
576 12:16:59.736516 PCI: 00:1e.3: enabled 0
577 12:16:59.740138 PCI: 00:1f.0: enabled 1
578 12:16:59.743150 PCI: 00:1f.1: enabled 1
579 12:16:59.746568 PCI: 00:1f.2: enabled 1
580 12:16:59.746652 PCI: 00:1f.3: enabled 1
581 12:16:59.750131 PCI: 00:1f.4: enabled 0
582 12:16:59.753206 PCI: 00:1f.5: enabled 1
583 12:16:59.756803 PCI: 00:1f.7: enabled 0
584 12:16:59.756886 GENERIC: 0.0: enabled 1
585 12:16:59.759874 GENERIC: 0.0: enabled 1
586 12:16:59.763479 USB0 port 0: enabled 1
587 12:16:59.763563 GENERIC: 0.0: enabled 1
588 12:16:59.766381 I2C: 00:2c: enabled 1
589 12:16:59.770014 I2C: 00:15: enabled 1
590 12:16:59.770099 GENERIC: 0.0: enabled 0
591 12:16:59.773092
592 12:16:59.773177 I2C: 00:15: enabled 1
593 12:16:59.776701 I2C: 00:10: enabled 0
594 12:16:59.780204 I2C: 00:10: enabled 0
595 12:16:59.780288 I2C: 00:2c: enabled 1
596 12:16:59.783697 I2C: 00:40: enabled 1
597 12:16:59.786523 I2C: 00:10: enabled 1
598 12:16:59.786608 I2C: 00:39: enabled 1
599 12:16:59.789651 I2C: 00:36: enabled 1
600 12:16:59.793227 I2C: 00:10: enabled 0
601 12:16:59.793311 I2C: 00:0c: enabled 1
602 12:16:59.796289 I2C: 00:50: enabled 1
603 12:16:59.799879 I2C: 00:1a: enabled 1
604 12:16:59.799964 I2C: 00:1a: enabled 0
605 12:16:59.802954 I2C: 00:1a: enabled 0
606 12:16:59.806722 I2C: 00:28: enabled 1
607 12:16:59.806816 I2C: 00:29: enabled 1
608 12:16:59.810078 PCI: 00:00.0: enabled 1
609 12:16:59.813090 SPI: 00: enabled 1
610 12:16:59.813173 PNP: 0c09.0: enabled 1
611 12:16:59.816774 GENERIC: 0.0: enabled 0
612 12:16:59.819935 USB2 port 0: enabled 1
613 12:16:59.820018 USB2 port 1: enabled 1
614 12:16:59.823366 USB2 port 2: enabled 1
615 12:16:59.826387 USB2 port 3: enabled 1
616 12:16:59.829422 USB2 port 4: enabled 0
617 12:16:59.829545 USB2 port 5: enabled 1
618 12:16:59.833106 USB2 port 6: enabled 0
619 12:16:59.836618 USB2 port 7: enabled 1
620 12:16:59.836703 USB3 port 0: enabled 1
621 12:16:59.839549 USB3 port 1: enabled 1
622 12:16:59.843060 USB3 port 2: enabled 1
623 12:16:59.843145 USB3 port 3: enabled 1
624 12:16:59.846144
625 12:16:59.846230 APIC: 00: enabled 1
626 12:16:59.849664 APIC: 02: enabled 1
627 12:16:59.849749 Compare with tree...
628 12:16:59.853158 Root Device: enabled 1
629 12:16:59.856187 CPU_CLUSTER: 0: enabled 1
630 12:16:59.859765 APIC: 00: enabled 1
631 12:16:59.859850 APIC: 02: enabled 1
632 12:16:59.863994 DOMAIN: 0000: enabled 1
633 12:16:59.867532 PCI: 00:00.0: enabled 1
634 12:16:59.867646 PCI: 00:02.0: enabled 1
635 12:16:59.871267 PCI: 00:04.0: enabled 1
636 12:16:59.874812 GENERIC: 0.0: enabled 1
637 12:16:59.877663 PCI: 00:05.0: enabled 1
638 12:16:59.877747 GENERIC: 0.0: enabled 1
639 12:16:59.881289 PCI: 00:09.0: enabled 0
640 12:16:59.884350 PCI: 00:12.6: enabled 0
641 12:16:59.887843 PCI: 00:14.0: enabled 1
642 12:16:59.890809 USB0 port 0: enabled 1
643 12:16:59.890893 USB2 port 0: enabled 1
644 12:16:59.894424 USB2 port 1: enabled 1
645 12:16:59.897471 USB2 port 2: enabled 1
646 12:16:59.900954 USB2 port 3: enabled 1
647 12:16:59.904206 USB2 port 4: enabled 0
648 12:16:59.904291 USB2 port 5: enabled 1
649 12:16:59.907748
650 12:16:59.907833 USB2 port 6: enabled 0
651 12:16:59.910743 USB2 port 7: enabled 1
652 12:16:59.914338 USB3 port 0: enabled 1
653 12:16:59.917875 USB3 port 1: enabled 1
654 12:16:59.920911 USB3 port 2: enabled 1
655 12:16:59.920996 USB3 port 3: enabled 1
656 12:16:59.923954 PCI: 00:14.1: enabled 0
657 12:16:59.927513 PCI: 00:14.2: enabled 0
658 12:16:59.930618 PCI: 00:14.3: enabled 1
659 12:16:59.934191 GENERIC: 0.0: enabled 1
660 12:16:59.934275 PCI: 00:14.5: enabled 1
661 12:16:59.937815 PCI: 00:15.0: enabled 1
662 12:16:59.940688 I2C: 00:2c: enabled 1
663 12:16:59.944428 I2C: 00:15: enabled 1
664 12:16:59.947579 PCI: 00:15.1: enabled 1
665 12:16:59.947664 PCI: 00:15.2: enabled 1
666 12:16:59.951062 GENERIC: 0.0: enabled 0
667 12:16:59.954041 I2C: 00:15: enabled 1
668 12:16:59.957739 I2C: 00:10: enabled 0
669 12:16:59.957823 I2C: 00:10: enabled 0
670 12:16:59.960700 I2C: 00:2c: enabled 1
671 12:16:59.964466 I2C: 00:40: enabled 1
672 12:16:59.967467 I2C: 00:10: enabled 1
673 12:16:59.967552 I2C: 00:39: enabled 1
674 12:16:59.971089 PCI: 00:15.3: enabled 1
675 12:16:59.974094 I2C: 00:36: enabled 1
676 12:16:59.977434 I2C: 00:10: enabled 0
677 12:16:59.980527 I2C: 00:0c: enabled 1
678 12:16:59.980611 I2C: 00:50: enabled 1
679 12:16:59.984165 PCI: 00:16.0: enabled 1
680 12:16:59.987107 PCI: 00:16.1: enabled 0
681 12:16:59.990681 PCI: 00:16.4: enabled 0
682 12:16:59.990766 PCI: 00:16.5: enabled 0
683 12:16:59.993793 PCI: 00:17.0: enabled 0
684 12:16:59.997340 PCI: 00:19.0: enabled 1
685 12:17:00.000794 I2C: 00:1a: enabled 1
686 12:17:00.003794 I2C: 00:1a: enabled 0
687 12:17:00.003879 I2C: 00:1a: enabled 0
688 12:17:00.007359 I2C: 00:28: enabled 1
689 12:17:00.010320 I2C: 00:29: enabled 1
690 12:17:00.013923 PCI: 00:19.1: enabled 0
691 12:17:00.014007 PCI: 00:19.2: enabled 1
692 12:17:00.017077 PCI: 00:1a.0: enabled 1
693 12:17:00.020654 PCI: 00:1e.0: enabled 0
694 12:17:00.023648 PCI: 00:1e.1: enabled 0
695 12:17:00.027103 PCI: 00:1e.2: enabled 1
696 12:17:00.027226 SPI: 00: enabled 1
697 12:17:00.030690 PCI: 00:1e.3: enabled 0
698 12:17:00.033754 PCI: 00:1f.0: enabled 1
699 12:17:00.036882 PNP: 0c09.0: enabled 1
700 12:17:00.036969 PCI: 00:1f.1: enabled 1
701 12:17:00.040308 PCI: 00:1f.2: enabled 1
702 12:17:00.044151 PCI: 00:1f.3: enabled 1
703 12:17:00.047234 GENERIC: 0.0: enabled 0
704 12:17:00.050331 PCI: 00:1f.4: enabled 0
705 12:17:00.050418 PCI: 00:1f.5: enabled 1
706 12:17:00.053837 PCI: 00:1f.7: enabled 0
707 12:17:00.056959 Root Device scanning...
708 12:17:00.060818 scan_static_bus for Root Device
709 12:17:00.064075 CPU_CLUSTER: 0 enabled
710 12:17:00.064250 DOMAIN: 0000 enabled
711 12:17:00.067545 DOMAIN: 0000 scanning...
712 12:17:00.070606 PCI: pci_scan_bus for bus 00
713 12:17:00.073853 PCI: 00:00.0 [8086/0000] ops
714 12:17:00.077577 PCI: 00:00.0 [8086/4e22] enabled
715 12:17:00.080683 PCI: 00:02.0 [8086/0000] bus ops
716 12:17:00.084071 PCI: 00:02.0 [8086/4e55] enabled
717 12:17:00.087598 PCI: 00:04.0 [8086/0000] bus ops
718 12:17:00.090686 PCI: 00:04.0 [8086/4e03] enabled
719 12:17:00.094280 PCI: 00:05.0 [8086/0000] bus ops
720 12:17:00.097402 PCI: 00:05.0 [8086/4e19] enabled
721 12:17:00.100611 PCI: 00:08.0 [8086/4e11] enabled
722 12:17:00.104150 PCI: 00:14.0 [8086/0000] bus ops
723 12:17:00.107654 PCI: 00:14.0 [8086/4ded] enabled
724 12:17:00.110652 PCI: 00:14.2 [8086/4def] disabled
725 12:17:00.114170 PCI: 00:14.3 [8086/0000] bus ops
726 12:17:00.117910 PCI: 00:14.3 [8086/4df0] enabled
727 12:17:00.121402 PCI: 00:14.5 [8086/0000] ops
728 12:17:00.124151 PCI: 00:14.5 [8086/4df8] enabled
729 12:17:00.127791 PCI: 00:15.0 [8086/0000] bus ops
730 12:17:00.130982 PCI: 00:15.0 [8086/4de8] enabled
731 12:17:00.134139 PCI: 00:15.1 [8086/0000] bus ops
732 12:17:00.137710 PCI: 00:15.1 [8086/4de9] enabled
733 12:17:00.140663 PCI: 00:15.2 [8086/0000] bus ops
734 12:17:00.144458 PCI: 00:15.2 [8086/4dea] enabled
735 12:17:00.147572 PCI: 00:15.3 [8086/0000] bus ops
736 12:17:00.150702 PCI: 00:15.3 [8086/4deb] enabled
737 12:17:00.154713 PCI: 00:16.0 [8086/0000] ops
738 12:17:00.157604 PCI: 00:16.0 [8086/4de0] enabled
739 12:17:00.161101 PCI: 00:19.0 [8086/0000] bus ops
740 12:17:00.163947 PCI: 00:19.0 [8086/4dc5] enabled
741 12:17:00.164385 PCI: 00:19.2 [8086/0000] ops
742 12:17:00.167843
743 12:17:00.168278 PCI: 00:19.2 [8086/4dc7] enabled
744 12:17:00.170903
745 12:17:00.171339 PCI: 00:1a.0 [8086/0000] ops
746 12:17:00.174106 PCI: 00:1a.0 [8086/4dc4] enabled
747 12:17:00.177790 PCI: 00:1e.0 [8086/0000] ops
748 12:17:00.181090 PCI: 00:1e.0 [8086/4da8] disabled
749 12:17:00.183950 PCI: 00:1e.2 [8086/0000] bus ops
750 12:17:00.187642 PCI: 00:1e.2 [8086/4daa] enabled
751 12:17:00.190734 PCI: 00:1f.0 [8086/0000] bus ops
752 12:17:00.193818 PCI: 00:1f.0 [8086/4d87] enabled
753 12:17:00.200919 PCI: Static device PCI: 00:1f.1 not found, disabling it.
754 12:17:00.201493 RTC Init
755 12:17:00.204124 Set power on after power failure.
756 12:17:00.207382 Disabling Deep S3
757 12:17:00.210492 Disabling Deep S3
758 12:17:00.210928 Disabling Deep S4
759 12:17:00.214357 Disabling Deep S4
760 12:17:00.214816 Disabling Deep S5
761 12:17:00.217626 Disabling Deep S5
762 12:17:00.220570 PCI: 00:1f.2 [0000/0000] hidden
763 12:17:00.224384 PCI: 00:1f.3 [8086/0000] bus ops
764 12:17:00.227334 PCI: 00:1f.3 [8086/4dc8] enabled
765 12:17:00.230396 PCI: 00:1f.5 [8086/0000] bus ops
766 12:17:00.234153 PCI: 00:1f.5 [8086/4da4] enabled
767 12:17:00.237154 PCI: Leftover static devices:
768 12:17:00.237683 PCI: 00:12.6
769 12:17:00.238111 PCI: 00:09.0
770 12:17:00.240838 PCI: 00:14.1
771 12:17:00.241344 PCI: 00:16.1
772 12:17:00.244183 PCI: 00:16.4
773 12:17:00.244737 PCI: 00:16.5
774 12:17:00.247513 PCI: 00:17.0
775 12:17:00.248010 PCI: 00:19.1
776 12:17:00.248380 PCI: 00:1e.1
777 12:17:00.250647 PCI: 00:1e.3
778 12:17:00.251116 PCI: 00:1f.1
779 12:17:00.253809 PCI: 00:1f.4
780 12:17:00.254289 PCI: 00:1f.7
781 12:17:00.257372 PCI: Check your devicetree.cb.
782 12:17:00.260732 PCI: 00:02.0 scanning...
783 12:17:00.263978 scan_generic_bus for PCI: 00:02.0
784 12:17:00.266938 scan_generic_bus for PCI: 00:02.0 done
785 12:17:00.270493 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
786 12:17:00.273809 PCI: 00:04.0 scanning...
787 12:17:00.277281 scan_generic_bus for PCI: 00:04.0
788 12:17:00.280478 GENERIC: 0.0 enabled
789 12:17:00.287076 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
790 12:17:00.290305 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
791 12:17:00.294081 PCI: 00:05.0 scanning...
792 12:17:00.297230 scan_generic_bus for PCI: 00:05.0
793 12:17:00.300632 GENERIC: 0.0 enabled
794 12:17:00.303758 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
795 12:17:00.310576 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
796 12:17:00.313599 PCI: 00:14.0 scanning...
797 12:17:00.316743 scan_static_bus for PCI: 00:14.0
798 12:17:00.317177 USB0 port 0 enabled
799 12:17:00.320365 USB0 port 0 scanning...
800 12:17:00.323334 scan_static_bus for USB0 port 0
801 12:17:00.326910 USB2 port 0 enabled
802 12:17:00.327362 USB2 port 1 enabled
803 12:17:00.330132 USB2 port 2 enabled
804 12:17:00.333665 USB2 port 3 enabled
805 12:17:00.334097 USB2 port 4 disabled
806 12:17:00.336742 USB2 port 5 enabled
807 12:17:00.337236 USB2 port 6 disabled
808 12:17:00.340417 USB2 port 7 enabled
809 12:17:00.343582 USB3 port 0 enabled
810 12:17:00.344044 USB3 port 1 enabled
811 12:17:00.347007 USB3 port 2 enabled
812 12:17:00.347446 USB3 port 3 enabled
813 12:17:00.350196 USB2 port 0 scanning...
814 12:17:00.353899 scan_static_bus for USB2 port 0
815 12:17:00.356997 scan_static_bus for USB2 port 0 done
816 12:17:00.363786 scan_bus: bus USB2 port 0 finished in 6 msecs
817 12:17:00.364226 USB2 port 1 scanning...
818 12:17:00.367278 scan_static_bus for USB2 port 1
819 12:17:00.373855 scan_static_bus for USB2 port 1 done
820 12:17:00.376902 scan_bus: bus USB2 port 1 finished in 6 msecs
821 12:17:00.380599 USB2 port 2 scanning...
822 12:17:00.383771 scan_static_bus for USB2 port 2
823 12:17:00.387210 scan_static_bus for USB2 port 2 done
824 12:17:00.390169 scan_bus: bus USB2 port 2 finished in 6 msecs
825 12:17:00.393408 USB2 port 3 scanning...
826 12:17:00.396851 scan_static_bus for USB2 port 3
827 12:17:00.399922 scan_static_bus for USB2 port 3 done
828 12:17:00.403803 scan_bus: bus USB2 port 3 finished in 6 msecs
829 12:17:00.406797 USB2 port 5 scanning...
830 12:17:00.409698 scan_static_bus for USB2 port 5
831 12:17:00.413802 scan_static_bus for USB2 port 5 done
832 12:17:00.420462 scan_bus: bus USB2 port 5 finished in 6 msecs
833 12:17:00.421028 USB2 port 7 scanning...
834 12:17:00.423156 scan_static_bus for USB2 port 7
835 12:17:00.429954 scan_static_bus for USB2 port 7 done
836 12:17:00.433785 scan_bus: bus USB2 port 7 finished in 6 msecs
837 12:17:00.437618 USB3 port 0 scanning...
838 12:17:00.438124 scan_static_bus for USB3 port 0
839 12:17:00.441241 scan_static_bus for USB3 port 0 done
840 12:17:00.447979 scan_bus: bus USB3 port 0 finished in 6 msecs
841 12:17:00.448420 USB3 port 1 scanning...
842 12:17:00.451083
843 12:17:00.455003 scan_static_bus for USB3 port 1
844 12:17:00.458445 scan_static_bus for USB3 port 1 done
845 12:17:00.462056 scan_bus: bus USB3 port 1 finished in 6 msecs
846 12:17:00.462495 USB3 port 2 scanning...
847 12:17:00.465534
848 12:17:00.469091 scan_static_bus for USB3 port 2
849 12:17:00.472133 scan_static_bus for USB3 port 2 done
850 12:17:00.475354 scan_bus: bus USB3 port 2 finished in 6 msecs
851 12:17:00.478938 USB3 port 3 scanning...
852 12:17:00.481865 scan_static_bus for USB3 port 3
853 12:17:00.485621 scan_static_bus for USB3 port 3 done
854 12:17:00.488686 scan_bus: bus USB3 port 3 finished in 6 msecs
855 12:17:00.492348 scan_static_bus for USB0 port 0 done
856 12:17:00.498824 scan_bus: bus USB0 port 0 finished in 172 msecs
857 12:17:00.502706 scan_static_bus for PCI: 00:14.0 done
858 12:17:00.505526 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
859 12:17:00.508644 PCI: 00:14.3 scanning...
860 12:17:00.512043 scan_static_bus for PCI: 00:14.3
861 12:17:00.515400 GENERIC: 0.0 enabled
862 12:17:00.518586 scan_static_bus for PCI: 00:14.3 done
863 12:17:00.522415 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
864 12:17:00.525308 PCI: 00:15.0 scanning...
865 12:17:00.528839 scan_static_bus for PCI: 00:15.0
866 12:17:00.532242 I2C: 00:2c enabled
867 12:17:00.532673 I2C: 00:15 enabled
868 12:17:00.538678 scan_static_bus for PCI: 00:15.0 done
869 12:17:00.542268 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
870 12:17:00.545431 PCI: 00:15.1 scanning...
871 12:17:00.548401 scan_static_bus for PCI: 00:15.1
872 12:17:00.552095 scan_static_bus for PCI: 00:15.1 done
873 12:17:00.555381 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
874 12:17:00.558688 PCI: 00:15.2 scanning...
875 12:17:00.561942 scan_static_bus for PCI: 00:15.2
876 12:17:00.565546 GENERIC: 0.0 disabled
877 12:17:00.565994 I2C: 00:15 enabled
878 12:17:00.568566 I2C: 00:10 disabled
879 12:17:00.572432 I2C: 00:10 disabled
880 12:17:00.572978 I2C: 00:2c enabled
881 12:17:00.575332 I2C: 00:40 enabled
882 12:17:00.575761 I2C: 00:10 enabled
883 12:17:00.578501 I2C: 00:39 enabled
884 12:17:00.582315 scan_static_bus for PCI: 00:15.2 done
885 12:17:00.588370 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
886 12:17:00.588805 PCI: 00:15.3 scanning...
887 12:17:00.591557 scan_static_bus for PCI: 00:15.3
888 12:17:00.595397 I2C: 00:36 enabled
889 12:17:00.598517 I2C: 00:10 disabled
890 12:17:00.598947 I2C: 00:0c enabled
891 12:17:00.601876 I2C: 00:50 enabled
892 12:17:00.605029 scan_static_bus for PCI: 00:15.3 done
893 12:17:00.608664 scan_bus: bus PCI: 00:15.3 finished in 15 msecs
894 12:17:00.612153 PCI: 00:19.0 scanning...
895 12:17:00.615099 scan_static_bus for PCI: 00:19.0
896 12:17:00.618594 I2C: 00:1a enabled
897 12:17:00.619024 I2C: 00:1a disabled
898 12:17:00.621638 I2C: 00:1a disabled
899 12:17:00.624809 I2C: 00:28 enabled
900 12:17:00.625250 I2C: 00:29 enabled
901 12:17:00.628493 scan_static_bus for PCI: 00:19.0 done
902 12:17:00.635156 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
903 12:17:00.638258 PCI: 00:1e.2 scanning...
904 12:17:00.641414 scan_generic_bus for PCI: 00:1e.2
905 12:17:00.641876 SPI: 00 enabled
906 12:17:00.648162 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
907 12:17:00.651617 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
908 12:17:00.655102 PCI: 00:1f.0 scanning...
909 12:17:00.658117 scan_static_bus for PCI: 00:1f.0
910 12:17:00.661865 PNP: 0c09.0 enabled
911 12:17:00.664716 PNP: 0c09.0 scanning...
912 12:17:00.668155 scan_static_bus for PNP: 0c09.0
913 12:17:00.671415 scan_static_bus for PNP: 0c09.0 done
914 12:17:00.675201 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
915 12:17:00.678197 scan_static_bus for PCI: 00:1f.0 done
916 12:17:00.684863 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
917 12:17:00.685327 PCI: 00:1f.3 scanning...
918 12:17:00.688089 scan_static_bus for PCI: 00:1f.3
919 12:17:00.691751 GENERIC: 0.0 disabled
920 12:17:00.694593 scan_static_bus for PCI: 00:1f.3 done
921 12:17:00.701564 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
922 12:17:00.702164 PCI: 00:1f.5 scanning...
923 12:17:00.704785 scan_generic_bus for PCI: 00:1f.5
924 12:17:00.708341
925 12:17:00.711691 scan_generic_bus for PCI: 00:1f.5 done
926 12:17:00.714586 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
927 12:17:00.721369 scan_bus: bus DOMAIN: 0000 finished in 647 msecs
928 12:17:00.725101 scan_static_bus for Root Device done
929 12:17:00.728046 scan_bus: bus Root Device finished in 666 msecs
930 12:17:00.728487 done
931 12:17:00.734590 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1087 ms
932 12:17:00.738334 Chrome EC: UHEPI supported
933 12:17:00.744506 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
934 12:17:00.794702 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
935 12:17:00.795232 SPI flash protection: WPSW=0 SRP0=1
936 12:17:00.795990 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
937 12:17:00.796348 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
938 12:17:00.796665 found VGA at PCI: 00:02.0
939 12:17:00.796970 Setting up VGA for PCI: 00:02.0
940 12:17:00.797260 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
941 12:17:00.797580 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
942 12:17:00.797868 Allocating resources...
943 12:17:00.798482 Reading resources...
944 12:17:00.798793 Root Device read_resources bus 0 link: 0
945 12:17:00.799079 CPU_CLUSTER: 0 read_resources bus 0 link: 0
946 12:17:00.850800 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
947 12:17:00.851382 DOMAIN: 0000 read_resources bus 0 link: 0
948 12:17:00.851841 PCI: 00:04.0 read_resources bus 1 link: 0
949 12:17:00.852226 PCI: 00:04.0 read_resources bus 1 link: 0 done
950 12:17:00.852907 PCI: 00:05.0 read_resources bus 2 link: 0
951 12:17:00.853246 PCI: 00:05.0 read_resources bus 2 link: 0 done
952 12:17:00.853598 PCI: 00:14.0 read_resources bus 0 link: 0
953 12:17:00.853903 USB0 port 0 read_resources bus 0 link: 0
954 12:17:00.854196 USB0 port 0 read_resources bus 0 link: 0 done
955 12:17:00.854486 PCI: 00:14.0 read_resources bus 0 link: 0 done
956 12:17:00.854777 PCI: 00:14.3 read_resources bus 0 link: 0
957 12:17:00.906898 PCI: 00:14.3 read_resources bus 0 link: 0 done
958 12:17:00.907512 PCI: 00:15.0 read_resources bus 0 link: 0
959 12:17:00.907865 PCI: 00:15.0 read_resources bus 0 link: 0 done
960 12:17:00.908530 PCI: 00:15.2 read_resources bus 0 link: 0
961 12:17:00.908872 PCI: 00:15.2 read_resources bus 0 link: 0 done
962 12:17:00.909186 PCI: 00:15.3 read_resources bus 0 link: 0
963 12:17:00.909530 PCI: 00:15.3 read_resources bus 0 link: 0 done
964 12:17:00.909842 PCI: 00:19.0 read_resources bus 0 link: 0
965 12:17:00.910130 PCI: 00:19.0 read_resources bus 0 link: 0 done
966 12:17:00.910420 PCI: 00:1e.2 read_resources bus 3 link: 0
967 12:17:00.910706 PCI: 00:1e.2 read_resources bus 3 link: 0 done
968 12:17:00.910987 PCI: 00:1f.0 read_resources bus 0 link: 0
969 12:17:00.925753 PCI: 00:1f.0 read_resources bus 0 link: 0 done
970 12:17:00.926616 PCI: 00:1f.3 read_resources bus 0 link: 0
971 12:17:00.928868 PCI: 00:1f.3 read_resources bus 0 link: 0 done
972 12:17:00.929309 DOMAIN: 0000 read_resources bus 0 link: 0 done
973 12:17:00.932646 Root Device read_resources bus 0 link: 0 done
974 12:17:00.935658 Done reading resources.
975 12:17:00.938618 Show resources in subtree (Root Device)...After reading.
976 12:17:00.945430 Root Device child on link 0 CPU_CLUSTER: 0
977 12:17:00.949131 CPU_CLUSTER: 0 child on link 0 APIC: 00
978 12:17:00.949606 APIC: 00
979 12:17:00.952479 APIC: 02
980 12:17:00.955719 DOMAIN: 0000 child on link 0 PCI: 00:00.0
981 12:17:00.965478 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
982 12:17:00.975120 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
983 12:17:00.975627 PCI: 00:00.0
984 12:17:00.985155 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
985 12:17:00.995605 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
986 12:17:01.005369 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
987 12:17:01.014856 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
988 12:17:01.021796 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
989 12:17:01.031519 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
990 12:17:01.042133 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
991 12:17:01.051568 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
992 12:17:01.061873 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
993 12:17:01.071424 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
994 12:17:01.078000 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
995 12:17:01.088233 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
996 12:17:01.098100 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
997 12:17:01.108070 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
998 12:17:01.114774 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
999 12:17:01.125260 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1000 12:17:01.135653 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1001 12:17:01.145437 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1002 12:17:01.155494 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1003 12:17:01.156037 PCI: 00:02.0
1004 12:17:01.165996 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1005 12:17:01.175621 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1006 12:17:01.185686 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1007 12:17:01.188637 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1008 12:17:01.198667 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1009 12:17:01.201993 GENERIC: 0.0
1010 12:17:01.205205 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1011 12:17:01.214911 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1012 12:17:01.218555 GENERIC: 0.0
1013 12:17:01.218994 PCI: 00:08.0
1014 12:17:01.228470 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1015 12:17:01.234774 PCI: 00:14.0 child on link 0 USB0 port 0
1016 12:17:01.245212 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1017 12:17:01.248398 USB0 port 0 child on link 0 USB2 port 0
1018 12:17:01.248873 USB2 port 0
1019 12:17:01.252184 USB2 port 1
1020 12:17:01.252725 USB2 port 2
1021 12:17:01.255373 USB2 port 3
1022 12:17:01.258312 USB2 port 4
1023 12:17:01.258824 USB2 port 5
1024 12:17:01.261856 USB2 port 6
1025 12:17:01.262323 USB2 port 7
1026 12:17:01.264876 USB3 port 0
1027 12:17:01.265312 USB3 port 1
1028 12:17:01.268182 USB3 port 2
1029 12:17:01.268706 USB3 port 3
1030 12:17:01.271721 PCI: 00:14.2
1031 12:17:01.274950 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1032 12:17:01.285283 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1033 12:17:01.288293 GENERIC: 0.0
1034 12:17:01.288835 PCI: 00:14.5
1035 12:17:01.298008 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1036 12:17:01.301822 PCI: 00:15.0 child on link 0 I2C: 00:2c
1037 12:17:01.311390 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1038 12:17:01.315083 I2C: 00:2c
1039 12:17:01.315519 I2C: 00:15
1040 12:17:01.317928 PCI: 00:15.1
1041 12:17:01.328307 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1042 12:17:01.331324 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1043 12:17:01.341882 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1044 12:17:01.344807 GENERIC: 0.0
1045 12:17:01.345243 I2C: 00:15
1046 12:17:01.348636 I2C: 00:10
1047 12:17:01.349197 I2C: 00:10
1048 12:17:01.351527 I2C: 00:2c
1049 12:17:01.351965 I2C: 00:40
1050 12:17:01.352308 I2C: 00:10
1051 12:17:01.354860 I2C: 00:39
1052 12:17:01.358292 PCI: 00:15.3 child on link 0 I2C: 00:36
1053 12:17:01.368089 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1054 12:17:01.371611 I2C: 00:36
1055 12:17:01.372055 I2C: 00:10
1056 12:17:01.374593 I2C: 00:0c
1057 12:17:01.375036 I2C: 00:50
1058 12:17:01.378290 PCI: 00:16.0
1059 12:17:01.388058 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1060 12:17:01.391301 PCI: 00:19.0 child on link 0 I2C: 00:1a
1061 12:17:01.401022 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1062 12:17:01.401503 I2C: 00:1a
1063 12:17:01.404569 I2C: 00:1a
1064 12:17:01.404879 I2C: 00:1a
1065 12:17:01.407661 I2C: 00:28
1066 12:17:01.407896 I2C: 00:29
1067 12:17:01.411187 PCI: 00:19.2
1068 12:17:01.420985 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1069 12:17:01.430721 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1070 12:17:01.430871 PCI: 00:1a.0
1071 12:17:01.434419
1072 12:17:01.440950 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1073 12:17:01.444153
1074 12:17:01.444245 PCI: 00:1e.0
1075 12:17:01.447705 PCI: 00:1e.2 child on link 0 SPI: 00
1076 12:17:01.457321 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1077 12:17:01.460922 SPI: 00
1078 12:17:01.464031 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1079 12:17:01.470699 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1080 12:17:01.474370
1081 12:17:01.474471 PNP: 0c09.0
1082 12:17:01.484143 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1083 12:17:01.484282 PCI: 00:1f.2
1084 12:17:01.494072 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1085 12:17:01.504511 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1086 12:17:01.507888 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1087 12:17:01.517792 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1088 12:17:01.527385 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1089 12:17:01.531018 GENERIC: 0.0
1090 12:17:01.531149 PCI: 00:1f.5
1091 12:17:01.540834 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1092 12:17:01.546864 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1093 12:17:01.553584 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1094 12:17:01.560460 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1095 12:17:01.570310 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1096 12:17:01.577705 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1097 12:17:01.584444 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1098 12:17:01.587422 DOMAIN: 0000: Resource ranges:
1099 12:17:01.590659 * Base: 1000, Size: 800, Tag: 100
1100 12:17:01.593769 * Base: 1900, Size: e700, Tag: 100
1101 12:17:01.601079 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1102 12:17:01.607354 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1103 12:17:01.614225 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1104 12:17:01.620915 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1105 12:17:01.627325 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1106 12:17:01.630374
1107 12:17:01.637407 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1108 12:17:01.644187 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1109 12:17:01.650177 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1110 12:17:01.660477 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1111 12:17:01.667750 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1112 12:17:01.673829 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1113 12:17:01.683643 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1114 12:17:01.691239 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1115 12:17:01.697734 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1116 12:17:01.704063 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1117 12:17:01.714398 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1118 12:17:01.721217 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1119 12:17:01.727248 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1120 12:17:01.737199 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1121 12:17:01.743931 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1122 12:17:01.750652 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1123 12:17:01.760464 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1124 12:17:01.767520 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1125 12:17:01.774125 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1126 12:17:01.777329 DOMAIN: 0000: Resource ranges:
1127 12:17:01.784072 * Base: 7fc00000, Size: 40400000, Tag: 200
1128 12:17:01.787251 * Base: d0000000, Size: 2b000000, Tag: 200
1129 12:17:01.790804 * Base: fb001000, Size: 2fff000, Tag: 200
1130 12:17:01.793662 * Base: fe010000, Size: 22000, Tag: 200
1131 12:17:01.800367 * Base: fe033000, Size: a4d000, Tag: 200
1132 12:17:01.803908 * Base: fea88000, Size: 2f8000, Tag: 200
1133 12:17:01.807390 * Base: fed88000, Size: 8000, Tag: 200
1134 12:17:01.810278 * Base: fed93000, Size: d000, Tag: 200
1135 12:17:01.817114 * Base: feda2000, Size: 125e000, Tag: 200
1136 12:17:01.821167 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1137 12:17:01.827337 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1138 12:17:01.833957 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1139 12:17:01.840203 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1140 12:17:01.847082 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1141 12:17:01.853498 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1142 12:17:01.860029 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1143 12:17:01.867020 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1144 12:17:01.873878 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1145 12:17:01.880824 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1146 12:17:01.886796 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1147 12:17:01.893608 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1148 12:17:01.900051 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1149 12:17:01.907362 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1150 12:17:01.913281 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1151 12:17:01.920466 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1152 12:17:01.926724 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1153 12:17:01.933184 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1154 12:17:01.940241 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1155 12:17:01.946317 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1156 12:17:01.953002 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1157 12:17:01.959849 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1158 12:17:01.966438 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1159 12:17:01.973484 Root Device assign_resources, bus 0 link: 0
1160 12:17:01.976711 DOMAIN: 0000 assign_resources, bus 0 link: 0
1161 12:17:01.986228 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1162 12:17:01.993190 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1163 12:17:02.003874 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1164 12:17:02.009876 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1165 12:17:02.012928 PCI: 00:04.0 assign_resources, bus 1 link: 0
1166 12:17:02.020077 PCI: 00:04.0 assign_resources, bus 1 link: 0
1167 12:17:02.026396 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1168 12:17:02.032717 PCI: 00:05.0 assign_resources, bus 2 link: 0
1169 12:17:02.036244 PCI: 00:05.0 assign_resources, bus 2 link: 0
1170 12:17:02.043523 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1171 12:17:02.053346 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1172 12:17:02.056969 PCI: 00:14.0 assign_resources, bus 0 link: 0
1173 12:17:02.063019 PCI: 00:14.0 assign_resources, bus 0 link: 0
1174 12:17:02.070384 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1175 12:17:02.073192 PCI: 00:14.3 assign_resources, bus 0 link: 0
1176 12:17:02.079916 PCI: 00:14.3 assign_resources, bus 0 link: 0
1177 12:17:02.086711 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1178 12:17:02.096300 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1179 12:17:02.099968 PCI: 00:15.0 assign_resources, bus 0 link: 0
1180 12:17:02.103235 PCI: 00:15.0 assign_resources, bus 0 link: 0
1181 12:17:02.112756 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1182 12:17:02.119420 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1183 12:17:02.126400 PCI: 00:15.2 assign_resources, bus 0 link: 0
1184 12:17:02.129961 PCI: 00:15.2 assign_resources, bus 0 link: 0
1185 12:17:02.139487 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1186 12:17:02.142685 PCI: 00:15.3 assign_resources, bus 0 link: 0
1187 12:17:02.146340 PCI: 00:15.3 assign_resources, bus 0 link: 0
1188 12:17:02.156198 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1189 12:17:02.162148 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1190 12:17:02.169343 PCI: 00:19.0 assign_resources, bus 0 link: 0
1191 12:17:02.172669 PCI: 00:19.0 assign_resources, bus 0 link: 0
1192 12:17:02.182133 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1193 12:17:02.189087 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1194 12:17:02.195906 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1195 12:17:02.198673
1196 12:17:02.202498 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1197 12:17:02.205507 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1198 12:17:02.212208 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1199 12:17:02.215296 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1200 12:17:02.222078 LPC: Trying to open IO window from 800 size 1ff
1201 12:17:02.228889 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1202 12:17:02.235380 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1203 12:17:02.239126
1204 12:17:02.241957 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1205 12:17:02.245238 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1206 12:17:02.255660 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1207 12:17:02.258514 DOMAIN: 0000 assign_resources, bus 0 link: 0
1208 12:17:02.261605 Root Device assign_resources, bus 0 link: 0
1209 12:17:02.265291 Done setting resources.
1210 12:17:02.271969 Show resources in subtree (Root Device)...After assigning values.
1211 12:17:02.275323 Root Device child on link 0 CPU_CLUSTER: 0
1212 12:17:02.282003 CPU_CLUSTER: 0 child on link 0 APIC: 00
1213 12:17:02.282451 APIC: 00
1214 12:17:02.282892 APIC: 02
1215 12:17:02.285314
1216 12:17:02.288450 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1217 12:17:02.297910 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1218 12:17:02.308559 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1219 12:17:02.309117 PCI: 00:00.0
1220 12:17:02.318329 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1221 12:17:02.328545 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1222 12:17:02.337920 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1223 12:17:02.344798 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1224 12:17:02.354699 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1225 12:17:02.364393 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1226 12:17:02.374595 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1227 12:17:02.384530 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1228 12:17:02.394203 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1229 12:17:02.401115 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1230 12:17:02.410587 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1231 12:17:02.421144 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1232 12:17:02.430579 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1233 12:17:02.437242 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1234 12:17:02.447553 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1235 12:17:02.457674 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1236 12:17:02.467133 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1237 12:17:02.477280 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1238 12:17:02.487255 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1239 12:17:02.487798 PCI: 00:02.0
1240 12:17:02.497145 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1241 12:17:02.500579
1242 12:17:02.510357 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1243 12:17:02.517105 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1244 12:17:02.520674
1245 12:17:02.523616 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1246 12:17:02.533596 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1247 12:17:02.536653 GENERIC: 0.0
1248 12:17:02.540228 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1249 12:17:02.550246 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1250 12:17:02.553358 GENERIC: 0.0
1251 12:17:02.553845 PCI: 00:08.0
1252 12:17:02.563406 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1253 12:17:02.569767 PCI: 00:14.0 child on link 0 USB0 port 0
1254 12:17:02.580384 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1255 12:17:02.583309 USB0 port 0 child on link 0 USB2 port 0
1256 12:17:02.583836 USB2 port 0
1257 12:17:02.586985
1258 12:17:02.587513 USB2 port 1
1259 12:17:02.589814 USB2 port 2
1260 12:17:02.590246 USB2 port 3
1261 12:17:02.593722 USB2 port 4
1262 12:17:02.594249 USB2 port 5
1263 12:17:02.596685 USB2 port 6
1264 12:17:02.597214 USB2 port 7
1265 12:17:02.600065 USB3 port 0
1266 12:17:02.600496 USB3 port 1
1267 12:17:02.603406 USB3 port 2
1268 12:17:02.603937 USB3 port 3
1269 12:17:02.606785 PCI: 00:14.2
1270 12:17:02.610136 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1271 12:17:02.619645 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1272 12:17:02.623576 GENERIC: 0.0
1273 12:17:02.624128 PCI: 00:14.5
1274 12:17:02.633085 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1275 12:17:02.639764 PCI: 00:15.0 child on link 0 I2C: 00:2c
1276 12:17:02.649532 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1277 12:17:02.649998 I2C: 00:2c
1278 12:17:02.653165 I2C: 00:15
1279 12:17:02.653619 PCI: 00:15.1
1280 12:17:02.663181 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1281 12:17:02.670042 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1282 12:17:02.679538 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1283 12:17:02.680086 GENERIC: 0.0
1284 12:17:02.682491 I2C: 00:15
1285 12:17:02.682925 I2C: 00:10
1286 12:17:02.686268 I2C: 00:10
1287 12:17:02.686808 I2C: 00:2c
1288 12:17:02.689525 I2C: 00:40
1289 12:17:02.690061 I2C: 00:10
1290 12:17:02.692373 I2C: 00:39
1291 12:17:02.696527 PCI: 00:15.3 child on link 0 I2C: 00:36
1292 12:17:02.706041 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1293 12:17:02.709068 I2C: 00:36
1294 12:17:02.709640 I2C: 00:10
1295 12:17:02.712749 I2C: 00:0c
1296 12:17:02.713324 I2C: 00:50
1297 12:17:02.715455 PCI: 00:16.0
1298 12:17:02.726214 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1299 12:17:02.729028 PCI: 00:19.0 child on link 0 I2C: 00:1a
1300 12:17:02.739048 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1301 12:17:02.742045 I2C: 00:1a
1302 12:17:02.742481 I2C: 00:1a
1303 12:17:02.745727 I2C: 00:1a
1304 12:17:02.746165 I2C: 00:28
1305 12:17:02.746506 I2C: 00:29
1306 12:17:02.748907 PCI: 00:19.2
1307 12:17:02.759154 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1308 12:17:02.768838 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1309 12:17:02.771837 PCI: 00:1a.0
1310 12:17:02.782053 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1311 12:17:02.785779 PCI: 00:1e.0
1312 12:17:02.788714 PCI: 00:1e.2 child on link 0 SPI: 00
1313 12:17:02.798588 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1314 12:17:02.799130 SPI: 00
1315 12:17:02.805534 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1316 12:17:02.811555 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1317 12:17:02.815364 PNP: 0c09.0
1318 12:17:02.822043 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1319 12:17:02.825166 PCI: 00:1f.2
1320 12:17:02.834928 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1321 12:17:02.841397 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1322 12:17:02.848320 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1323 12:17:02.857941 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1324 12:17:02.868276 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1325 12:17:02.871414 GENERIC: 0.0
1326 12:17:02.871955 PCI: 00:1f.5
1327 12:17:02.881686 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1328 12:17:02.885144 Done allocating resources.
1329 12:17:02.891695 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2100 ms
1330 12:17:02.894922 Enabling resources...
1331 12:17:02.898002 PCI: 00:00.0 subsystem <- 8086/4e22
1332 12:17:02.901316 PCI: 00:00.0 cmd <- 06
1333 12:17:02.904594 PCI: 00:02.0 subsystem <- 8086/4e55
1334 12:17:02.905121 PCI: 00:02.0 cmd <- 03
1335 12:17:02.911249 PCI: 00:04.0 subsystem <- 8086/4e03
1336 12:17:02.911779 PCI: 00:04.0 cmd <- 02
1337 12:17:02.915210 PCI: 00:05.0 bridge ctrl <- 0003
1338 12:17:02.918367 PCI: 00:05.0 subsystem <- 8086/4e19
1339 12:17:02.921324 PCI: 00:05.0 cmd <- 02
1340 12:17:02.924923 PCI: 00:08.0 cmd <- 06
1341 12:17:02.928045 PCI: 00:14.0 subsystem <- 8086/4ded
1342 12:17:02.931748 PCI: 00:14.0 cmd <- 02
1343 12:17:02.934835 PCI: 00:14.3 subsystem <- 8086/4df0
1344 12:17:02.935288 PCI: 00:14.3 cmd <- 02
1345 12:17:02.937920
1346 12:17:02.941763 PCI: 00:14.5 subsystem <- 8086/4df8
1347 12:17:02.942212 PCI: 00:14.5 cmd <- 06
1348 12:17:02.944658 PCI: 00:15.0 subsystem <- 8086/4de8
1349 12:17:02.947887
1350 12:17:02.948325 PCI: 00:15.0 cmd <- 02
1351 12:17:02.951665 PCI: 00:15.1 subsystem <- 8086/4de9
1352 12:17:02.954519 PCI: 00:15.1 cmd <- 02
1353 12:17:02.958172 PCI: 00:15.2 subsystem <- 8086/4dea
1354 12:17:02.961262 PCI: 00:15.2 cmd <- 02
1355 12:17:02.965121 PCI: 00:15.3 subsystem <- 8086/4deb
1356 12:17:02.967896 PCI: 00:15.3 cmd <- 02
1357 12:17:02.971881 PCI: 00:16.0 subsystem <- 8086/4de0
1358 12:17:02.974601 PCI: 00:16.0 cmd <- 02
1359 12:17:02.978247 PCI: 00:19.0 subsystem <- 8086/4dc5
1360 12:17:02.978686 PCI: 00:19.0 cmd <- 02
1361 12:17:02.984673 PCI: 00:19.2 subsystem <- 8086/4dc7
1362 12:17:02.985200 PCI: 00:19.2 cmd <- 06
1363 12:17:02.988172 PCI: 00:1a.0 subsystem <- 8086/4dc4
1364 12:17:02.991011 PCI: 00:1a.0 cmd <- 06
1365 12:17:02.994600 PCI: 00:1e.2 subsystem <- 8086/4daa
1366 12:17:02.997958 PCI: 00:1e.2 cmd <- 06
1367 12:17:03.001192 PCI: 00:1f.0 subsystem <- 8086/4d87
1368 12:17:03.004241 PCI: 00:1f.0 cmd <- 407
1369 12:17:03.008323 PCI: 00:1f.3 subsystem <- 8086/4dc8
1370 12:17:03.011029 PCI: 00:1f.3 cmd <- 02
1371 12:17:03.014031 PCI: 00:1f.5 subsystem <- 8086/4da4
1372 12:17:03.017933 PCI: 00:1f.5 cmd <- 406
1373 12:17:03.021053 done.
1374 12:17:03.024739 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1375 12:17:03.027722 Initializing devices...
1376 12:17:03.031427 Root Device init
1377 12:17:03.031963 mainboard: EC init
1378 12:17:03.037901 Chrome EC: Set SMI mask to 0x0000000000000000
1379 12:17:03.040882 Chrome EC: clear events_b mask to 0x0000000000000000
1380 12:17:03.047939 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1381 12:17:03.054534 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1382 12:17:03.061501 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1383 12:17:03.064222 Chrome EC: Set WAKE mask to 0x0000000000000000
1384 12:17:03.067706 Root Device init finished in 35 msecs
1385 12:17:03.071927 PCI: 00:00.0 init
1386 12:17:03.074804 CPU TDP = 6 Watts
1387 12:17:03.075245 CPU PL1 = 7 Watts
1388 12:17:03.078393 CPU PL2 = 12 Watts
1389 12:17:03.082108 PCI: 00:00.0 init finished in 6 msecs
1390 12:17:03.085225 PCI: 00:02.0 init
1391 12:17:03.085779 GMA: Found VBT in CBFS
1392 12:17:03.088439
1393 12:17:03.088974 GMA: Found valid VBT in CBFS
1394 12:17:03.094777 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1395 12:17:03.101471 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1396 12:17:03.108500 PCI: 00:02.0 init finished in 18 msecs
1397 12:17:03.109031 PCI: 00:08.0 init
1398 12:17:03.111800 PCI: 00:08.0 init finished in 0 msecs
1399 12:17:03.115047 PCI: 00:14.0 init
1400 12:17:03.118666 XHCI: Updated LFPS sampling OFF time to 9 ms
1401 12:17:03.125587 PCI: 00:14.0 init finished in 4 msecs
1402 12:17:03.126111 PCI: 00:15.0 init
1403 12:17:03.128359 I2C bus 0 version 0x3230302a
1404 12:17:03.132248 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1405 12:17:03.135163 PCI: 00:15.0 init finished in 6 msecs
1406 12:17:03.138653
1407 12:17:03.139093 PCI: 00:15.1 init
1408 12:17:03.141671 I2C bus 1 version 0x3230302a
1409 12:17:03.145546 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1410 12:17:03.148792 PCI: 00:15.1 init finished in 6 msecs
1411 12:17:03.151694 PCI: 00:15.2 init
1412 12:17:03.155211 I2C bus 2 version 0x3230302a
1413 12:17:03.159039 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1414 12:17:03.161772 PCI: 00:15.2 init finished in 6 msecs
1415 12:17:03.165410 PCI: 00:15.3 init
1416 12:17:03.168674 I2C bus 3 version 0x3230302a
1417 12:17:03.171865 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1418 12:17:03.175621 PCI: 00:15.3 init finished in 6 msecs
1419 12:17:03.176154 PCI: 00:16.0 init
1420 12:17:03.182038 PCI: 00:16.0 init finished in 0 msecs
1421 12:17:03.182557 PCI: 00:19.0 init
1422 12:17:03.184978 I2C bus 4 version 0x3230302a
1423 12:17:03.188109 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1424 12:17:03.191885 PCI: 00:19.0 init finished in 6 msecs
1425 12:17:03.195470 PCI: 00:1a.0 init
1426 12:17:03.198420 PCI: 00:1a.0 init finished in 0 msecs
1427 12:17:03.202070 PCI: 00:1f.0 init
1428 12:17:03.205075 IOAPIC: Initializing IOAPIC at 0xfec00000
1429 12:17:03.211796 IOAPIC: Bootstrap Processor Local APIC = 0x00
1430 12:17:03.212236 IOAPIC: ID = 0x02
1431 12:17:03.214876 IOAPIC: Dumping registers
1432 12:17:03.218937 reg 0x0000: 0x02000000
1433 12:17:03.219471 reg 0x0001: 0x00770020
1434 12:17:03.221859 reg 0x0002: 0x00000000
1435 12:17:03.225689 PCI: 00:1f.0 init finished in 21 msecs
1436 12:17:03.228708 PCI: 00:1f.2 init
1437 12:17:03.232279 Disabling ACPI via APMC.
1438 12:17:03.235773 APMC done.
1439 12:17:03.238782 PCI: 00:1f.2 init finished in 5 msecs
1440 12:17:03.249250 PNP: 0c09.0 init
1441 12:17:03.252979 Google Chrome EC uptime: 6.721 seconds
1442 12:17:03.259691 Google Chrome AP resets since EC boot: 0
1443 12:17:03.262683 Google Chrome most recent AP reset causes:
1444 12:17:03.269243 Google Chrome EC reset flags at last EC boot: reset-pin
1445 12:17:03.273164 PNP: 0c09.0 init finished in 18 msecs
1446 12:17:03.273727 Devices initialized
1447 12:17:03.275997 Show all devs... After init.
1448 12:17:03.279050 Root Device: enabled 1
1449 12:17:03.282884 CPU_CLUSTER: 0: enabled 1
1450 12:17:03.285653 DOMAIN: 0000: enabled 1
1451 12:17:03.286080 PCI: 00:00.0: enabled 1
1452 12:17:03.289299 PCI: 00:02.0: enabled 1
1453 12:17:03.292351 PCI: 00:04.0: enabled 1
1454 12:17:03.292778 PCI: 00:05.0: enabled 1
1455 12:17:03.296072 PCI: 00:09.0: enabled 0
1456 12:17:03.298975 PCI: 00:12.6: enabled 0
1457 12:17:03.302601 PCI: 00:14.0: enabled 1
1458 12:17:03.303125 PCI: 00:14.1: enabled 0
1459 12:17:03.305787 PCI: 00:14.2: enabled 0
1460 12:17:03.309345 PCI: 00:14.3: enabled 1
1461 12:17:03.312224 PCI: 00:14.5: enabled 1
1462 12:17:03.312656 PCI: 00:15.0: enabled 1
1463 12:17:03.316232 PCI: 00:15.1: enabled 1
1464 12:17:03.319084 PCI: 00:15.2: enabled 1
1465 12:17:03.319522 PCI: 00:15.3: enabled 1
1466 12:17:03.322212
1467 12:17:03.322647 PCI: 00:16.0: enabled 1
1468 12:17:03.325939 PCI: 00:16.1: enabled 0
1469 12:17:03.328928 PCI: 00:16.4: enabled 0
1470 12:17:03.329364 PCI: 00:16.5: enabled 0
1471 12:17:03.332557 PCI: 00:17.0: enabled 0
1472 12:17:03.335683 PCI: 00:19.0: enabled 1
1473 12:17:03.338749 PCI: 00:19.1: enabled 0
1474 12:17:03.339307 PCI: 00:19.2: enabled 1
1475 12:17:03.342434 PCI: 00:1a.0: enabled 1
1476 12:17:03.345494 PCI: 00:1c.0: enabled 0
1477 12:17:03.349289 PCI: 00:1c.1: enabled 0
1478 12:17:03.349758 PCI: 00:1c.2: enabled 0
1479 12:17:03.352285 PCI: 00:1c.3: enabled 0
1480 12:17:03.355546 PCI: 00:1c.4: enabled 0
1481 12:17:03.359240 PCI: 00:1c.5: enabled 0
1482 12:17:03.359681 PCI: 00:1c.6: enabled 0
1483 12:17:03.362066 PCI: 00:1c.7: enabled 1
1484 12:17:03.365254 PCI: 00:1e.0: enabled 0
1485 12:17:03.365741 PCI: 00:1e.1: enabled 0
1486 12:17:03.368724 PCI: 00:1e.2: enabled 1
1487 12:17:03.372318 PCI: 00:1e.3: enabled 0
1488 12:17:03.375680 PCI: 00:1f.0: enabled 1
1489 12:17:03.376195 PCI: 00:1f.1: enabled 0
1490 12:17:03.378784 PCI: 00:1f.2: enabled 1
1491 12:17:03.381893 PCI: 00:1f.3: enabled 1
1492 12:17:03.385506 PCI: 00:1f.4: enabled 0
1493 12:17:03.386013 PCI: 00:1f.5: enabled 1
1494 12:17:03.388956 PCI: 00:1f.7: enabled 0
1495 12:17:03.391905 GENERIC: 0.0: enabled 1
1496 12:17:03.395243 GENERIC: 0.0: enabled 1
1497 12:17:03.395686 USB0 port 0: enabled 1
1498 12:17:03.398888 GENERIC: 0.0: enabled 1
1499 12:17:03.401986 I2C: 00:2c: enabled 1
1500 12:17:03.402518 I2C: 00:15: enabled 1
1501 12:17:03.405482 GENERIC: 0.0: enabled 0
1502 12:17:03.408815 I2C: 00:15: enabled 1
1503 12:17:03.409345 I2C: 00:10: enabled 0
1504 12:17:03.412057 I2C: 00:10: enabled 0
1505 12:17:03.415223 I2C: 00:2c: enabled 1
1506 12:17:03.415699 I2C: 00:40: enabled 1
1507 12:17:03.419273 I2C: 00:10: enabled 1
1508 12:17:03.422197 I2C: 00:39: enabled 1
1509 12:17:03.422730 I2C: 00:36: enabled 1
1510 12:17:03.425093 I2C: 00:10: enabled 0
1511 12:17:03.428738 I2C: 00:0c: enabled 1
1512 12:17:03.429178 I2C: 00:50: enabled 1
1513 12:17:03.431676
1514 12:17:03.432111 I2C: 00:1a: enabled 1
1515 12:17:03.435293 I2C: 00:1a: enabled 0
1516 12:17:03.438437 I2C: 00:1a: enabled 0
1517 12:17:03.438884 I2C: 00:28: enabled 1
1518 12:17:03.442094 I2C: 00:29: enabled 1
1519 12:17:03.445168 PCI: 00:00.0: enabled 1
1520 12:17:03.445634 SPI: 00: enabled 1
1521 12:17:03.448271 PNP: 0c09.0: enabled 1
1522 12:17:03.452132 GENERIC: 0.0: enabled 0
1523 12:17:03.452678 USB2 port 0: enabled 1
1524 12:17:03.454921 USB2 port 1: enabled 1
1525 12:17:03.458856 USB2 port 2: enabled 1
1526 12:17:03.459398 USB2 port 3: enabled 1
1527 12:17:03.461758 USB2 port 4: enabled 0
1528 12:17:03.465340 USB2 port 5: enabled 1
1529 12:17:03.468612 USB2 port 6: enabled 0
1530 12:17:03.469156 USB2 port 7: enabled 1
1531 12:17:03.472225 USB3 port 0: enabled 1
1532 12:17:03.475384 USB3 port 1: enabled 1
1533 12:17:03.475913 USB3 port 2: enabled 1
1534 12:17:03.478046 USB3 port 3: enabled 1
1535 12:17:03.481838 APIC: 00: enabled 1
1536 12:17:03.482364 APIC: 02: enabled 1
1537 12:17:03.484808 PCI: 00:08.0: enabled 1
1538 12:17:03.491741 BS: BS_DEV_INIT run times (exec / console): 22 / 438 ms
1539 12:17:03.494814 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1540 12:17:03.497838 ELOG: NV offset 0xbfa000 size 0x1000
1541 12:17:03.506499 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1542 12:17:03.512944 ELOG: Event(17) added with size 13 at 2023-01-31 12:17:02 UTC
1543 12:17:03.519972 ELOG: Event(92) added with size 9 at 2023-01-31 12:17:02 UTC
1544 12:17:03.525894 ELOG: Event(93) added with size 9 at 2023-01-31 12:17:02 UTC
1545 12:17:03.532541 ELOG: Event(9E) added with size 10 at 2023-01-31 12:17:02 UTC
1546 12:17:03.539069 ELOG: Event(9F) added with size 14 at 2023-01-31 12:17:02 UTC
1547 12:17:03.542900 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1548 12:17:03.549027 ELOG: Event(A1) added with size 10 at 2023-01-31 12:17:02 UTC
1549 12:17:03.559500 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1550 12:17:03.562530 ELOG: Event(A0) added with size 9 at 2023-01-31 12:17:02 UTC
1551 12:17:03.566017
1552 12:17:03.569117 elog_add_boot_reason: Logged dev mode boot
1553 12:17:03.576472 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1554 12:17:03.576906 Finalize devices...
1555 12:17:03.579762 Devices finalized
1556 12:17:03.582939 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1557 12:17:03.589477 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1558 12:17:03.596172 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1559 12:17:03.599226 ME: HFSTS1 : 0x80030045
1560 12:17:03.602174 ME: HFSTS2 : 0x30280136
1561 12:17:03.605862 ME: HFSTS3 : 0x00000050
1562 12:17:03.612556 ME: HFSTS4 : 0x00004000
1563 12:17:03.615656 ME: HFSTS5 : 0x00000000
1564 12:17:03.618911 ME: HFSTS6 : 0x40400006
1565 12:17:03.622595 ME: Manufacturing Mode : NO
1566 12:17:03.625767 ME: FW Partition Table : OK
1567 12:17:03.628900 ME: Bringup Loader Failure : NO
1568 12:17:03.632255 ME: Firmware Init Complete : NO
1569 12:17:03.635424 ME: Boot Options Present : NO
1570 12:17:03.639243 ME: Update In Progress : NO
1571 12:17:03.642324 ME: D0i3 Support : YES
1572 12:17:03.646054 ME: Low Power State Enabled : NO
1573 12:17:03.649036 ME: CPU Replaced : YES
1574 12:17:03.652050 ME: CPU Replacement Valid : YES
1575 12:17:03.655767 ME: Current Working State : 5
1576 12:17:03.658831 ME: Current Operation State : 1
1577 12:17:03.662440 ME: Current Operation Mode : 3
1578 12:17:03.665704 ME: Error Code : 0
1579 12:17:03.668672 ME: CPU Debug Disabled : YES
1580 12:17:03.672077 ME: TXT Support : NO
1581 12:17:03.679013 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1582 12:17:03.682314 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1583 12:17:03.685568
1584 12:17:03.688659 ACPI: Writing ACPI tables at 76b27000.
1585 12:17:03.689191 ACPI: * FACS
1586 12:17:03.692098 ACPI: * DSDT
1587 12:17:03.695652 Ramoops buffer: 0x100000@0x76a26000.
1588 12:17:03.698692 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1589 12:17:03.705512 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1590 12:17:03.708390 Google Chrome EC: version:
1591 12:17:03.712294 ro: magolor_1.1.9999-103b6f9
1592 12:17:03.715251 rw: magolor_1.1.9999-103b6f9
1593 12:17:03.715694 running image: 1
1594 12:17:03.722054 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1595 12:17:03.725630 ACPI: * FADT
1596 12:17:03.726071 SCI is IRQ9
1597 12:17:03.729383 ACPI: added table 1/32, length now 40
1598 12:17:03.732458
1599 12:17:03.732896 ACPI: * SSDT
1600 12:17:03.735753 Found 1 CPU(s) with 2 core(s) each.
1601 12:17:03.739191 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1602 12:17:03.745751 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1603 12:17:03.749086 Could not locate 'wifi_sar' in VPD.
1604 12:17:03.752358 Checking CBFS for default SAR values
1605 12:17:03.758864 wifi_sar_defaults.hex has bad len in CBFS
1606 12:17:03.762573 failed from getting SAR limits!
1607 12:17:03.765820 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1608 12:17:03.769003 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1609 12:17:03.772481
1610 12:17:03.775867 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1611 12:17:03.782071 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1612 12:17:03.785910 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1613 12:17:03.792000 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1614 12:17:03.795722 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1615 12:17:03.802678 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1616 12:17:03.808871 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1617 12:17:03.812589 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1618 12:17:03.819248 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1619 12:17:03.825629 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1620 12:17:03.828505 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1621 12:17:03.835565 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1622 12:17:03.838611 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1623 12:17:03.846789 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1624 12:17:03.850520 PS2K: Passing 101 keymaps to kernel
1625 12:17:03.857213 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1626 12:17:03.863636 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1627 12:17:03.867130 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1628 12:17:03.873405 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1629 12:17:03.877019 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1630 12:17:03.879903
1631 12:17:03.883534 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1632 12:17:03.890007 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1633 12:17:03.893523 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1634 12:17:03.896649
1635 12:17:03.900347 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1636 12:17:03.906736 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1637 12:17:03.910212 ACPI: added table 2/32, length now 44
1638 12:17:03.913273 ACPI: * MCFG
1639 12:17:03.917004 ACPI: added table 3/32, length now 48
1640 12:17:03.917466 ACPI: * TPM2
1641 12:17:03.920150 TPM2 log created at 0x76a16000
1642 12:17:03.923638 ACPI: added table 4/32, length now 52
1643 12:17:03.926731 ACPI: * MADT
1644 12:17:03.927170 SCI is IRQ9
1645 12:17:03.929967 ACPI: added table 5/32, length now 56
1646 12:17:03.933722 current = 76b2d580
1647 12:17:03.934159 ACPI: * DMAR
1648 12:17:03.936894
1649 12:17:03.940276 ACPI: added table 6/32, length now 60
1650 12:17:03.943334 ACPI: added table 7/32, length now 64
1651 12:17:03.943809 ACPI: * HPET
1652 12:17:03.946444 ACPI: added table 8/32, length now 68
1653 12:17:03.950180 ACPI: done.
1654 12:17:03.953180 ACPI tables: 26304 bytes.
1655 12:17:03.956905 smbios_write_tables: 76a15000
1656 12:17:03.960133 EC returned error result code 3
1657 12:17:03.963096 Couldn't obtain OEM name from CBI
1658 12:17:03.966899 Create SMBIOS type 16
1659 12:17:03.967338 Create SMBIOS type 17
1660 12:17:03.969932 GENERIC: 0.0 (WIFI Device)
1661 12:17:03.973500 SMBIOS tables: 913 bytes.
1662 12:17:03.976536 Writing table forward entry at 0x00000500
1663 12:17:03.983305 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1664 12:17:03.987258 Writing coreboot table at 0x76b4b000
1665 12:17:03.993511 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1666 12:17:03.997184 1. 0000000000001000-000000000009ffff: RAM
1667 12:17:04.003021 2. 00000000000a0000-00000000000fffff: RESERVED
1668 12:17:04.006776 3. 0000000000100000-0000000076a14fff: RAM
1669 12:17:04.013499 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1670 12:17:04.016554 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1671 12:17:04.023237 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1672 12:17:04.026311 7. 0000000077000000-000000007fbfffff: RESERVED
1673 12:17:04.033422 8. 00000000c0000000-00000000cfffffff: RESERVED
1674 12:17:04.036338 9. 00000000fb000000-00000000fb000fff: RESERVED
1675 12:17:04.042981 10. 00000000fe000000-00000000fe00ffff: RESERVED
1676 12:17:04.045974 11. 00000000fea80000-00000000fea87fff: RESERVED
1677 12:17:04.052658 12. 00000000fed80000-00000000fed87fff: RESERVED
1678 12:17:04.056455 13. 00000000fed90000-00000000fed92fff: RESERVED
1679 12:17:04.059772 14. 00000000feda0000-00000000feda1fff: RESERVED
1680 12:17:04.066482 15. 0000000100000000-00000001803fffff: RAM
1681 12:17:04.069556 Passing 4 GPIOs to payload:
1682 12:17:04.073178 NAME | PORT | POLARITY | VALUE
1683 12:17:04.079572 lid | undefined | high | high
1684 12:17:04.082761 power | undefined | high | low
1685 12:17:04.089575 oprom | undefined | high | low
1686 12:17:04.092639 EC in RW | 0x000000b9 | high | low
1687 12:17:04.096552
1688 12:17:04.099351 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 87ee
1689 12:17:04.103036 coreboot table: 1504 bytes.
1690 12:17:04.105954 IMD ROOT 0. 0x76fff000 0x00001000
1691 12:17:04.112571 IMD SMALL 1. 0x76ffe000 0x00001000
1692 12:17:04.115715 FSP MEMORY 2. 0x76c4e000 0x003b0000
1693 12:17:04.119556 CONSOLE 3. 0x76c2e000 0x00020000
1694 12:17:04.122379 FMAP 4. 0x76c2d000 0x00000578
1695 12:17:04.126299 TIME STAMP 5. 0x76c2c000 0x00000910
1696 12:17:04.129233 VBOOT WORK 6. 0x76c18000 0x00014000
1697 12:17:04.132217 ROMSTG STCK 7. 0x76c17000 0x00001000
1698 12:17:04.136237 AFTER CAR 8. 0x76c0d000 0x0000a000
1699 12:17:04.139004 RAMSTAGE 9. 0x76ba7000 0x00066000
1700 12:17:04.145811 REFCODE 10. 0x76b67000 0x00040000
1701 12:17:04.148970 SMM BACKUP 11. 0x76b57000 0x00010000
1702 12:17:04.152894 4f444749 12. 0x76b55000 0x00002000
1703 12:17:04.155753 EXT VBT13. 0x76b53000 0x00001c43
1704 12:17:04.159368 COREBOOT 14. 0x76b4b000 0x00008000
1705 12:17:04.162394 ACPI 15. 0x76b27000 0x00024000
1706 12:17:04.165781 ACPI GNVS 16. 0x76b26000 0x00001000
1707 12:17:04.169371 RAMOOPS 17. 0x76a26000 0x00100000
1708 12:17:04.172547 TPM2 TCGLOG18. 0x76a16000 0x00010000
1709 12:17:04.176312 SMBIOS 19. 0x76a15000 0x00000800
1710 12:17:04.179151
1711 12:17:04.179690 IMD small region:
1712 12:17:04.182657 IMD ROOT 0. 0x76ffec00 0x00000400
1713 12:17:04.185880 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1714 12:17:04.192651 VPD 2. 0x76ffeb80 0x0000004c
1715 12:17:04.195980 POWER STATE 3. 0x76ffeb40 0x00000040
1716 12:17:04.199181 ROMSTAGE 4. 0x76ffeb20 0x00000004
1717 12:17:04.202648 MEM INFO 5. 0x76ffe940 0x000001e0
1718 12:17:04.209316 BS: BS_WRITE_TABLES run times (exec / console): 8 / 517 ms
1719 12:17:04.212502 MTRR: Physical address space:
1720 12:17:04.219083 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1721 12:17:04.225881 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1722 12:17:04.229276 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1723 12:17:04.235620 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1724 12:17:04.242383 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1725 12:17:04.249076 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1726 12:17:04.255907 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1727 12:17:04.258946 MTRR: Fixed MSR 0x250 0x0606060606060606
1728 12:17:04.262145 MTRR: Fixed MSR 0x258 0x0606060606060606
1729 12:17:04.269030 MTRR: Fixed MSR 0x259 0x0000000000000000
1730 12:17:04.272176 MTRR: Fixed MSR 0x268 0x0606060606060606
1731 12:17:04.275729 MTRR: Fixed MSR 0x269 0x0606060606060606
1732 12:17:04.278564 MTRR: Fixed MSR 0x26a 0x0606060606060606
1733 12:17:04.285521 MTRR: Fixed MSR 0x26b 0x0606060606060606
1734 12:17:04.289019 MTRR: Fixed MSR 0x26c 0x0606060606060606
1735 12:17:04.292045 MTRR: Fixed MSR 0x26d 0x0606060606060606
1736 12:17:04.295309 MTRR: Fixed MSR 0x26e 0x0606060606060606
1737 12:17:04.299160 MTRR: Fixed MSR 0x26f 0x0606060606060606
1738 12:17:04.302629 call enable_fixed_mtrr()
1739 12:17:04.305741 CPU physical address size: 39 bits
1740 12:17:04.312430 MTRR: default type WB/UC MTRR counts: 6/5.
1741 12:17:04.316113 MTRR: UC selected as default type.
1742 12:17:04.322682 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1743 12:17:04.325868 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1744 12:17:04.332379 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1745 12:17:04.339337 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1746 12:17:04.345413 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1747 12:17:04.345893
1748 12:17:04.349165 MTRR check
1749 12:17:04.349632 Fixed MTRRs : Enabled
1750 12:17:04.352144 Variable MTRRs: Enabled
1751 12:17:04.352570
1752 12:17:04.355931 MTRR: Fixed MSR 0x250 0x0606060606060606
1753 12:17:04.362311 MTRR: Fixed MSR 0x258 0x0606060606060606
1754 12:17:04.365501 MTRR: Fixed MSR 0x259 0x0000000000000000
1755 12:17:04.368948 MTRR: Fixed MSR 0x268 0x0606060606060606
1756 12:17:04.372607 MTRR: Fixed MSR 0x269 0x0606060606060606
1757 12:17:04.379066 MTRR: Fixed MSR 0x26a 0x0606060606060606
1758 12:17:04.382135 MTRR: Fixed MSR 0x26b 0x0606060606060606
1759 12:17:04.385698 MTRR: Fixed MSR 0x26c 0x0606060606060606
1760 12:17:04.388942 MTRR: Fixed MSR 0x26d 0x0606060606060606
1761 12:17:04.392321 MTRR: Fixed MSR 0x26e 0x0606060606060606
1762 12:17:04.399233 MTRR: Fixed MSR 0x26f 0x0606060606060606
1763 12:17:04.402168 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1764 12:17:04.405328
1765 12:17:04.405801 call enable_fixed_mtrr()
1766 12:17:04.409605 Checking cr50 for pending updates
1767 12:17:04.413228 CPU physical address size: 39 bits
1768 12:17:04.416822 Reading cr50 TPM mode
1769 12:17:04.427401 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1770 12:17:04.434427 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1771 12:17:04.437512 Checking segment from ROM address 0xfff9d5b8
1772 12:17:04.444383 Checking segment from ROM address 0xfff9d5d4
1773 12:17:04.447517 Loading segment from ROM address 0xfff9d5b8
1774 12:17:04.450594 code (compression=0)
1775 12:17:04.457256 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1776 12:17:04.467281 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1777 12:17:04.470912 it's not compressed!
1778 12:17:04.596265 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1779 12:17:04.602796 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1780 12:17:04.610041 Loading segment from ROM address 0xfff9d5d4
1781 12:17:04.613337 Entry Point 0x30000000
1782 12:17:04.613985 Loaded segments
1783 12:17:04.620121 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1784 12:17:04.636382 Finalizing chipset.
1785 12:17:04.639673 Finalizing SMM.
1786 12:17:04.640112 APMC done.
1787 12:17:04.646357 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1788 12:17:04.649478 mp_park_aps done after 0 msecs.
1789 12:17:04.652541 Jumping to boot code at 0x30000000(0x76b4b000)
1790 12:17:04.662989 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1791 12:17:04.663506
1792 12:17:04.663849
1793 12:17:04.664166
1794 12:17:04.665891 Starting depthcharge on Magolor...
1795 12:17:04.666321
1796 12:17:04.667283 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
1797 12:17:04.667778 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
1798 12:17:04.668189 Setting prompt string to ['dedede:']
1799 12:17:04.668599 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:46)
1800 12:17:04.675943 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1801 12:17:04.676466
1802 12:17:04.682519 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1803 12:17:04.683044
1804 12:17:04.686313 fw_config match found: AUDIO_AMP=UNPROVISIONED
1805 12:17:04.686869
1806 12:17:04.689867 Wipe memory regions:
1807 12:17:04.690405
1808 12:17:04.692850 [0x00000000001000, 0x000000000a0000)
1809 12:17:04.693470
1810 12:17:04.696343 [0x00000000100000, 0x00000030000000)
1811 12:17:04.696781
1812 12:17:04.827906 [0x00000031062170, 0x00000076a15000)
1813 12:17:04.828499
1814 12:17:05.000202 [0x00000100000000, 0x00000180400000)
1815 12:17:05.000789
1816 12:17:06.062865 R8152: Initializing
1817 12:17:06.063484
1818 12:17:06.066419 Version 6 (ocp_data = 5c30)
1819 12:17:06.066890
1820 12:17:06.069515 R8152: Done initializing
1821 12:17:06.069609
1822 12:17:06.072683 Adding net device
1823 12:17:06.072766
1824 12:17:06.075829 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1825 12:17:06.078975
1826 12:17:06.079144
1827 12:17:06.079228
1828 12:17:06.079532 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1830 12:17:06.180436 dedede: tftpboot 192.168.201.1 8948126/tftp-deploy-o9av6o1a/kernel/bzImage 8948126/tftp-deploy-o9av6o1a/kernel/cmdline 8948126/tftp-deploy-o9av6o1a/ramdisk/ramdisk.cpio.gz
1831 12:17:06.181036 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1832 12:17:06.181544 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
1833 12:17:06.186019 tftpboot 192.168.201.1 8948126/tftp-deploy-o9av6o1a/kernel/bzImy-o9av6o1a/kernel/cmdline 8948126/tftp-deploy-o9av6o1a/ramdisk/ramdisk.cpio.gz
1834 12:17:06.186491
1835 12:17:06.186832 Waiting for link
1836 12:17:06.187145
1837 12:17:06.387626 done.
1838 12:17:06.387765
1839 12:17:06.387832 MAC: 00:24:32:30:7b:58
1840 12:17:06.387894
1841 12:17:06.390620 Sending DHCP discover... done.
1842 12:17:06.390767
1843 12:17:06.394323 Waiting for reply... done.
1844 12:17:06.394442
1845 12:17:06.397343 Sending DHCP request... done.
1846 12:17:06.397460
1847 12:17:06.400967 Waiting for reply... done.
1848 12:17:06.401052
1849 12:17:06.404157 My ip is 192.168.201.13
1850 12:17:06.404244
1851 12:17:06.407807 The DHCP server ip is 192.168.201.1
1852 12:17:06.407923
1853 12:17:06.410806 TFTP server IP predefined by user: 192.168.201.1
1854 12:17:06.410891
1855 12:17:06.417474 Bootfile predefined by user: 8948126/tftp-deploy-o9av6o1a/kernel/bzImage
1856 12:17:06.417590
1857 12:17:06.420612 Sending tftp read request... done.
1858 12:17:06.420696
1859 12:17:06.424320 Waiting for the transfer...
1860 12:17:06.424450
1861 12:17:07.026094 00000000 ################################################################
1862 12:17:07.026237
1863 12:17:07.602634 00080000 ################################################################
1864 12:17:07.602769
1865 12:17:08.146471 00100000 ################################################################
1866 12:17:08.146603
1867 12:17:08.822421 00180000 ################################################################
1868 12:17:08.822568
1869 12:17:09.566924 00200000 ################################################################
1870 12:17:09.567068
1871 12:17:10.176534 00280000 ################################################################
1872 12:17:10.176670
1873 12:17:10.762002 00300000 ################################################################
1874 12:17:10.762138
1875 12:17:11.389316 00380000 ################################################################
1876 12:17:11.389896
1877 12:17:11.971085 00400000 ################################################################
1878 12:17:11.971226
1879 12:17:12.571748 00480000 ################################################################
1880 12:17:12.571886
1881 12:17:13.180567 00500000 ################################################################
1882 12:17:13.180708
1883 12:17:13.766769 00580000 ################################################################
1884 12:17:13.766901
1885 12:17:14.365125 00600000 ################################################################
1886 12:17:14.365273
1887 12:17:15.095087 00680000 ################################################################
1888 12:17:15.095224
1889 12:17:15.375421 00700000 ############################ done.
1890 12:17:15.375565
1891 12:17:15.378933 The bootfile was 7569296 bytes long.
1892 12:17:15.379023
1893 12:17:15.381989 Sending tftp read request... done.
1894 12:17:15.382077
1895 12:17:15.385616 Waiting for the transfer...
1896 12:17:15.385700
1897 12:17:16.006549 00000000 ################################################################
1898 12:17:16.006686
1899 12:17:16.659703 00080000 ################################################################
1900 12:17:16.659844
1901 12:17:17.285896 00100000 ################################################################
1902 12:17:17.286037
1903 12:17:17.844128 00180000 ################################################################
1904 12:17:17.844272
1905 12:17:18.394805 00200000 ################################################################
1906 12:17:18.394950
1907 12:17:18.941066 00280000 ################################################################
1908 12:17:18.941199
1909 12:17:19.470541 00300000 ################################################################
1910 12:17:19.470741
1911 12:17:20.029751 00380000 ################################################################
1912 12:17:20.029887
1913 12:17:20.664165 00400000 ################################################################
1914 12:17:20.664312
1915 12:17:21.272659 00480000 ################################################################
1916 12:17:21.272820
1917 12:17:21.531290 00500000 ################################ done.
1918 12:17:21.531429
1919 12:17:21.535043 Sending tftp read request... done.
1920 12:17:21.535126
1921 12:17:21.537989 Waiting for the transfer...
1922 12:17:21.538067
1923 12:17:21.538133 00000000 # done.
1924 12:17:21.538200
1925 12:17:21.547691 Command line loaded dynamically from TFTP file: 8948126/tftp-deploy-o9av6o1a/kernel/cmdline
1926 12:17:21.547778
1927 12:17:21.567720 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8948126/extract-nfsrootfs-wh6_c59b,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1928 12:17:21.567826
1929 12:17:21.570852 ec_init: CrosEC protocol v3 supported (256, 256)
1930 12:17:21.570937
1931 12:17:21.580463 Shutting down all USB controllers.
1932 12:17:21.580575
1933 12:17:21.580645 Removing current net device
1934 12:17:21.580711
1935 12:17:21.584070 Finalizing coreboot
1936 12:17:21.584154
1937 12:17:21.590407 Exiting depthcharge with code 4 at timestamp: 23848445
1938 12:17:21.590493
1939 12:17:21.590561
1940 12:17:21.590623 Starting kernel ...
1941 12:17:21.590684
1942 12:17:21.590743
1943 12:17:21.590800
1944 12:17:21.591164 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
1945 12:17:21.591265 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
1946 12:17:21.591343 Setting prompt string to ['Linux version [0-9]']
1947 12:17:21.591412 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1948 12:17:21.591482 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1950 12:21:50.592124 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
1952 12:21:50.593344 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
1954 12:21:50.594145 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1957 12:21:50.595650 end: 2 depthcharge-action (duration 00:05:00) [common]
1959 12:21:50.596822 Cleaning after the job
1960 12:21:50.597229 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948126/tftp-deploy-o9av6o1a/ramdisk
1961 12:21:50.599240 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948126/tftp-deploy-o9av6o1a/kernel
1962 12:21:50.601871 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948126/tftp-deploy-o9av6o1a/nfsrootfs
1963 12:21:50.661789 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948126/tftp-deploy-o9av6o1a/modules
1964 12:21:50.662091 start: 5.1 power-off (timeout 00:00:30) [common]
1965 12:21:50.662271 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-5' '--port=1' '--command=off'
1966 12:21:50.681006 >> Command sent successfully.
1967 12:21:50.682814 Returned 0 in 0 seconds
1968 12:21:50.783941 end: 5.1 power-off (duration 00:00:00) [common]
1970 12:21:50.785586 start: 5.2 read-feedback (timeout 00:10:00) [common]
1971 12:21:50.786709 Listened to connection for namespace 'common' for up to 1s
1972 12:21:51.330017 Listened to connection for namespace 'common' for up to 1s
1973 12:21:51.333284 Listened to connection for namespace 'common' for up to 1s
1974 12:21:51.337422 Listened to connection for namespace 'common' for up to 1s
1975 12:21:51.341660 Listened to connection for namespace 'common' for up to 1s
1976 12:21:51.345777 Listened to connection for namespace 'common' for up to 1s
1977 12:21:51.349273 Listened to connection for namespace 'common' for up to 1s
1978 12:21:51.353521 Listened to connection for namespace 'common' for up to 1s
1979 12:21:51.357831 Listened to connection for namespace 'common' for up to 1s
1980 12:21:51.382379 Listened to connection for namespace 'common' for up to 1s
1981 12:21:51.383040 Listened to connection for namespace 'common' for up to 1s
1982 12:21:51.386163 Listened to connection for namespace 'common' for up to 1s
1983 12:21:51.788318 Finalising connection for namespace 'common'
1984 12:21:51.789113 Disconnecting from shell: Finalise
1985 12:21:51.789682
1986 12:21:51.891240 end: 5.2 read-feedback (duration 00:00:01) [common]
1987 12:21:51.891892 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8948126
1988 12:21:52.020354 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8948126
1989 12:21:52.020553 JobError: Your job cannot terminate cleanly.