Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:16:37.669865 lava-dispatcher, installed at version: 2022.11
2 12:16:37.670049 start: 0 validate
3 12:16:37.670175 Start time: 2023-01-31 12:16:37.670167+00:00 (UTC)
4 12:16:37.670360 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:16:37.670502 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230127.0%2Famd64%2Finitrd.cpio.gz exists
6 12:16:37.958862 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:16:37.959036 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:16:38.250037 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:16:38.250269 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230127.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:16:38.540520 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:16:38.540696 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:16:38.834875 validate duration: 1.16
14 12:16:38.835199 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:16:38.835304 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:16:38.835398 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:16:38.835501 Not decompressing ramdisk as can be used compressed.
18 12:16:38.835711 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230127.0/amd64/initrd.cpio.gz
19 12:16:38.835788 saving as /var/lib/lava/dispatcher/tmp/8948133/tftp-deploy-dqzfw46q/ramdisk/initrd.cpio.gz
20 12:16:38.835861 total size: 5432117 (5MB)
21 12:16:38.838200 progress 0% (0MB)
22 12:16:38.841266 progress 5% (0MB)
23 12:16:38.843180 progress 10% (0MB)
24 12:16:38.845264 progress 15% (0MB)
25 12:16:38.847752 progress 20% (1MB)
26 12:16:38.850055 progress 25% (1MB)
27 12:16:38.852327 progress 30% (1MB)
28 12:16:38.855021 progress 35% (1MB)
29 12:16:38.856991 progress 40% (2MB)
30 12:16:38.859663 progress 45% (2MB)
31 12:16:38.861561 progress 50% (2MB)
32 12:16:38.864038 progress 55% (2MB)
33 12:16:38.866347 progress 60% (3MB)
34 12:16:38.868454 progress 65% (3MB)
35 12:16:38.870972 progress 70% (3MB)
36 12:16:38.873273 progress 75% (3MB)
37 12:16:38.875771 progress 80% (4MB)
38 12:16:38.877669 progress 85% (4MB)
39 12:16:38.880176 progress 90% (4MB)
40 12:16:38.882494 progress 95% (4MB)
41 12:16:38.884609 progress 100% (5MB)
42 12:16:38.884867 5MB downloaded in 0.05s (105.72MB/s)
43 12:16:38.885022 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:16:38.885278 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:16:38.885370 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:16:38.885459 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:16:38.885578 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:16:38.885647 saving as /var/lib/lava/dispatcher/tmp/8948133/tftp-deploy-dqzfw46q/kernel/bzImage
50 12:16:38.885747 total size: 7569296 (7MB)
51 12:16:38.885811 No compression specified
52 12:16:40.889225 progress 0% (0MB)
53 12:16:40.899559 progress 5% (0MB)
54 12:16:40.909883 progress 10% (0MB)
55 12:16:40.917648 progress 15% (1MB)
56 12:16:40.929220 progress 20% (1MB)
57 12:16:40.936102 progress 25% (1MB)
58 12:16:40.945261 progress 30% (2MB)
59 12:16:40.954585 progress 35% (2MB)
60 12:16:40.964646 progress 40% (2MB)
61 12:16:40.974001 progress 45% (3MB)
62 12:16:40.984032 progress 50% (3MB)
63 12:16:40.996262 progress 55% (4MB)
64 12:16:41.009674 progress 60% (4MB)
65 12:16:41.023640 progress 65% (4MB)
66 12:16:41.035001 progress 70% (5MB)
67 12:16:41.048966 progress 75% (5MB)
68 12:16:41.060994 progress 80% (5MB)
69 12:16:41.072872 progress 85% (6MB)
70 12:16:41.086919 progress 90% (6MB)
71 12:16:41.099869 progress 95% (6MB)
72 12:16:41.110640 progress 100% (7MB)
73 12:16:41.110939 7MB downloaded in 2.23s (3.24MB/s)
74 12:16:41.111092 end: 1.2.1 http-download (duration 00:00:02) [common]
76 12:16:41.111336 end: 1.2 download-retry (duration 00:00:02) [common]
77 12:16:41.111427 start: 1.3 download-retry (timeout 00:09:58) [common]
78 12:16:41.111516 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 12:16:41.111622 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230127.0/amd64/full.rootfs.tar.xz
80 12:16:41.111690 saving as /var/lib/lava/dispatcher/tmp/8948133/tftp-deploy-dqzfw46q/nfsrootfs/full.rootfs.tar
81 12:16:41.111752 total size: 133355208 (127MB)
82 12:16:41.111815 Using unxz to decompress xz
83 12:16:41.116540 progress 0% (0MB)
84 12:16:41.461558 progress 5% (6MB)
85 12:16:41.834287 progress 10% (12MB)
86 12:16:42.134487 progress 15% (19MB)
87 12:16:42.338451 progress 20% (25MB)
88 12:16:42.595930 progress 25% (31MB)
89 12:16:42.957358 progress 30% (38MB)
90 12:16:43.319736 progress 35% (44MB)
91 12:16:43.725420 progress 40% (50MB)
92 12:16:44.114920 progress 45% (57MB)
93 12:16:44.470411 progress 50% (63MB)
94 12:16:44.841897 progress 55% (69MB)
95 12:16:45.204166 progress 60% (76MB)
96 12:16:45.578407 progress 65% (82MB)
97 12:16:45.942262 progress 70% (89MB)
98 12:16:46.309266 progress 75% (95MB)
99 12:16:46.756057 progress 80% (101MB)
100 12:16:47.198932 progress 85% (108MB)
101 12:16:47.467064 progress 90% (114MB)
102 12:16:47.813598 progress 95% (120MB)
103 12:16:48.211562 progress 100% (127MB)
104 12:16:48.217691 127MB downloaded in 7.11s (17.90MB/s)
105 12:16:48.218006 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:16:48.218291 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:16:48.218389 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:16:48.218483 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:16:48.218601 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:16:48.218675 saving as /var/lib/lava/dispatcher/tmp/8948133/tftp-deploy-dqzfw46q/modules/modules.tar
112 12:16:48.218740 total size: 51860 (0MB)
113 12:16:48.218804 Using unxz to decompress xz
114 12:16:48.223838 progress 63% (0MB)
115 12:16:48.224218 progress 100% (0MB)
116 12:16:48.227578 0MB downloaded in 0.01s (5.60MB/s)
117 12:16:48.227822 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:16:48.228099 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:16:48.228199 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 12:16:48.228304 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 12:16:49.478086 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8948133/extract-nfsrootfs-v0vsyikd
123 12:16:49.478277 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 12:16:49.478384 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 12:16:49.478524 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e
126 12:16:49.478629 makedir: /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin
127 12:16:49.478719 makedir: /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/tests
128 12:16:49.478802 makedir: /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/results
129 12:16:49.478901 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-add-keys
130 12:16:49.479045 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-add-sources
131 12:16:49.479163 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-background-process-start
132 12:16:49.479278 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-background-process-stop
133 12:16:49.479390 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-common-functions
134 12:16:49.479503 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-echo-ipv4
135 12:16:49.479613 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-install-packages
136 12:16:49.479722 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-installed-packages
137 12:16:49.479867 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-os-build
138 12:16:49.479976 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-probe-channel
139 12:16:49.480086 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-probe-ip
140 12:16:49.480195 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-target-ip
141 12:16:49.480302 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-target-mac
142 12:16:49.480409 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-target-storage
143 12:16:49.480520 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-test-case
144 12:16:49.480630 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-test-event
145 12:16:49.480738 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-test-feedback
146 12:16:49.480845 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-test-raise
147 12:16:49.480952 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-test-reference
148 12:16:49.481060 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-test-runner
149 12:16:49.481167 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-test-set
150 12:16:49.481274 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-test-shell
151 12:16:49.481383 Updating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-install-packages (oe)
152 12:16:49.481496 Updating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/bin/lava-installed-packages (oe)
153 12:16:49.481592 Creating /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/environment
154 12:16:49.481677 LAVA metadata
155 12:16:49.481936 - LAVA_JOB_ID=8948133
156 12:16:49.482004 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:16:49.482106 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
158 12:16:49.482174 skipped lava-vland-overlay
159 12:16:49.482252 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:16:49.482360 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
161 12:16:49.482439 skipped lava-multinode-overlay
162 12:16:49.482514 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:16:49.482598 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
164 12:16:49.482670 Loading test definitions
165 12:16:49.482760 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
166 12:16:49.482833 Using /lava-8948133 at stage 0
167 12:16:49.483092 uuid=8948133_1.5.2.3.1 testdef=None
168 12:16:49.483184 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 12:16:49.483274 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
170 12:16:49.483748 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 12:16:49.483989 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
173 12:16:49.484552 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 12:16:49.484796 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
176 12:16:49.485338 runner path: /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/0/tests/0_dmesg test_uuid 8948133_1.5.2.3.1
177 12:16:49.485483 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 12:16:49.485735 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
180 12:16:49.485811 Using /lava-8948133 at stage 1
181 12:16:49.486054 uuid=8948133_1.5.2.3.5 testdef=None
182 12:16:49.486145 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 12:16:49.486235 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
184 12:16:49.486677 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 12:16:49.486908 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
187 12:16:49.487478 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 12:16:49.487721 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
190 12:16:49.488292 runner path: /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/1/tests/1_bootrr test_uuid 8948133_1.5.2.3.5
191 12:16:49.488451 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 12:16:49.488692 Creating lava-test-runner.conf files
194 12:16:49.488758 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/0 for stage 0
195 12:16:49.488843 - 0_dmesg
196 12:16:49.488919 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8948133/lava-overlay-igxm9n5e/lava-8948133/1 for stage 1
197 12:16:49.489004 - 1_bootrr
198 12:16:49.489097 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 12:16:49.489185 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
200 12:16:49.494729 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 12:16:49.494838 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
202 12:16:49.494930 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 12:16:49.495020 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 12:16:49.495110 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
205 12:16:49.597882 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 12:16:49.598213 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
207 12:16:49.598330 extracting modules file /var/lib/lava/dispatcher/tmp/8948133/tftp-deploy-dqzfw46q/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8948133/extract-nfsrootfs-v0vsyikd
208 12:16:49.602296 extracting modules file /var/lib/lava/dispatcher/tmp/8948133/tftp-deploy-dqzfw46q/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8948133/extract-overlay-ramdisk-73wjyebx/ramdisk
209 12:16:49.605973 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 12:16:49.606089 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
211 12:16:49.606178 [common] Applying overlay to NFS
212 12:16:49.606252 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8948133/compress-overlay-bds3qf8i/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8948133/extract-nfsrootfs-v0vsyikd
213 12:16:49.609991 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 12:16:49.610102 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
215 12:16:49.610197 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 12:16:49.610292 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
217 12:16:49.610372 Building ramdisk /var/lib/lava/dispatcher/tmp/8948133/extract-overlay-ramdisk-73wjyebx/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8948133/extract-overlay-ramdisk-73wjyebx/ramdisk
218 12:16:49.643678 >> 24548 blocks
219 12:16:50.112431 rename /var/lib/lava/dispatcher/tmp/8948133/extract-overlay-ramdisk-73wjyebx/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8948133/tftp-deploy-dqzfw46q/ramdisk/ramdisk.cpio.gz
220 12:16:50.112832 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 12:16:50.112956 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
222 12:16:50.113061 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
223 12:16:50.113159 No mkimage arch provided, not using FIT.
224 12:16:50.113252 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 12:16:50.113341 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 12:16:50.113438 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 12:16:50.113533 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
228 12:16:50.113613 No LXC device requested
229 12:16:50.113695 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 12:16:50.113794 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
231 12:16:50.113878 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 12:16:50.113952 Checking files for TFTP limit of 4294967296 bytes.
233 12:16:50.114329 end: 1 tftp-deploy (duration 00:00:11) [common]
234 12:16:50.114438 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 12:16:50.114534 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 12:16:50.114663 substitutions:
237 12:16:50.114735 - {DTB}: None
238 12:16:50.114802 - {INITRD}: 8948133/tftp-deploy-dqzfw46q/ramdisk/ramdisk.cpio.gz
239 12:16:50.114870 - {KERNEL}: 8948133/tftp-deploy-dqzfw46q/kernel/bzImage
240 12:16:50.114936 - {LAVA_MAC}: None
241 12:16:50.115002 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8948133/extract-nfsrootfs-v0vsyikd
242 12:16:50.115062 - {NFS_SERVER_IP}: 192.168.201.1
243 12:16:50.115120 - {PRESEED_CONFIG}: None
244 12:16:50.115180 - {PRESEED_LOCAL}: None
245 12:16:50.115238 - {RAMDISK}: 8948133/tftp-deploy-dqzfw46q/ramdisk/ramdisk.cpio.gz
246 12:16:50.115295 - {ROOT_PART}: None
247 12:16:50.115353 - {ROOT}: None
248 12:16:50.115411 - {SERVER_IP}: 192.168.201.1
249 12:16:50.115471 - {TEE}: None
250 12:16:50.115528 Parsed boot commands:
251 12:16:50.115585 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 12:16:50.115735 Parsed boot commands: tftpboot 192.168.201.1 8948133/tftp-deploy-dqzfw46q/kernel/bzImage 8948133/tftp-deploy-dqzfw46q/kernel/cmdline 8948133/tftp-deploy-dqzfw46q/ramdisk/ramdisk.cpio.gz
253 12:16:50.115829 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 12:16:50.115919 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 12:16:50.116015 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 12:16:50.116106 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 12:16:50.116180 Not connected, no need to disconnect.
258 12:16:50.116260 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 12:16:50.116346 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 12:16:50.116415 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-3'
261 12:16:50.119079 Setting prompt string to ['lava-test: # ']
262 12:16:50.119370 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 12:16:50.119480 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 12:16:50.119586 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 12:16:50.119683 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 12:16:50.119862 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
267 12:16:50.138463 >> Command sent successfully.
268 12:16:50.140283 Returned 0 in 0 seconds
269 12:16:50.241358 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 12:16:50.242661 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 12:16:50.243113 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 12:16:50.243497 Setting prompt string to 'Starting depthcharge on Voema...'
274 12:16:50.243800 Changing prompt to 'Starting depthcharge on Voema...'
275 12:16:50.244144 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 12:16:50.245212 [Enter `^Ec?' for help]
277 12:16:58.646249
278 12:16:58.646864
279 12:16:58.656173 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 12:16:58.659632 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 12:16:58.665799 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 12:16:58.669227 CPU: AES supported, TXT NOT supported, VT supported
283 12:16:58.676183 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 12:16:58.682466 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 12:16:58.685788 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 12:16:58.689361 VBOOT: Loading verstage.
287 12:16:58.695710 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 12:16:58.699194 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 12:16:58.702325 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 12:16:58.713247 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 12:16:58.719705 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 12:16:58.720165
293 12:16:58.720583
294 12:16:58.733078 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 12:16:58.746918 Probing TPM: . done!
296 12:16:58.750261 TPM ready after 0 ms
297 12:16:58.753658 Connected to device vid:did:rid of 1ae0:0028:00
298 12:16:58.764621 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
299 12:16:58.771235 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 12:16:58.775098 Initialized TPM device CR50 revision 0
301 12:16:58.825135 tlcl_send_startup: Startup return code is 0
302 12:16:58.825665 TPM: setup succeeded
303 12:16:58.839260 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 12:16:58.853613 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 12:16:58.865998 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 12:16:58.876279 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 12:16:58.880228 Chrome EC: UHEPI supported
308 12:16:58.883186 Phase 1
309 12:16:58.886542 FMAP: area GBB found @ 1805000 (458752 bytes)
310 12:16:58.893271 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 12:16:58.896657
312 12:16:58.903280 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
313 12:16:58.909546 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
314 12:16:58.916208 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
315 12:16:58.919521 Recovery requested (1009000e)
316 12:16:58.922958 TPM: Extending digest for VBOOT: boot mode into PCR 0
317 12:16:58.934629 tlcl_extend: response is 0
318 12:16:58.941273 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
319 12:16:58.950873 tlcl_extend: response is 0
320 12:16:58.957600 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
321 12:16:58.964345 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
322 12:16:58.970838 BS: verstage times (exec / console): total (unknown) / 142 ms
323 12:16:58.971311
324 12:16:58.971721
325 12:16:58.983673 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
326 12:16:58.990355 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
327 12:16:58.993684 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
328 12:16:58.997359 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
329 12:16:59.004077 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
330 12:16:59.007381 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
331 12:16:59.010293 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
332 12:16:59.013621 TCO_STS: 0000 0000
333 12:16:59.016986 GEN_PMCON: d0015038 00002200
334 12:16:59.020246 GBLRST_CAUSE: 00000000 00000000
335 12:16:59.020489 HPR_CAUSE0: 00000000
336 12:16:59.023737
337 12:16:59.023981 prev_sleep_state 5
338 12:16:59.027024 Boot Count incremented to 15443
339 12:16:59.033508 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 12:16:59.040010 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
341 12:16:59.047207 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
342 12:16:59.050160
343 12:16:59.056938 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
344 12:16:59.060304 Chrome EC: UHEPI supported
345 12:16:59.066764 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
346 12:16:59.078099 Probing TPM: done!
347 12:16:59.084703 Connected to device vid:did:rid of 1ae0:0028:00
348 12:16:59.095482 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
349 12:16:59.098384 Initialized TPM device CR50 revision 0
350 12:16:59.112818 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
351 12:16:59.119580 MRC: Hash idx 0x100b comparison successful.
352 12:16:59.122369 MRC cache found, size faa8
353 12:16:59.122462 bootmode is set to: 2
354 12:16:59.126126 SPD index = 0
355 12:16:59.132670 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
356 12:16:59.136085 SPD: module type is LPDDR4X
357 12:16:59.139555 SPD: module part number is MT53E512M64D4NW-046
358 12:16:59.146017 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
359 12:16:59.152807 SPD: device width 16 bits, bus width 16 bits
360 12:16:59.155647 SPD: module size is 1024 MB (per channel)
361 12:16:59.585487 CBMEM:
362 12:16:59.588786 IMD: root @ 0x76fff000 254 entries.
363 12:16:59.592161 IMD: root @ 0x76ffec00 62 entries.
364 12:16:59.595569 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
365 12:16:59.602243 FMAP: area RW_VPD found @ f35000 (8192 bytes)
366 12:16:59.605249 External stage cache:
367 12:16:59.608648 IMD: root @ 0x7b3ff000 254 entries.
368 12:16:59.611989 IMD: root @ 0x7b3fec00 62 entries.
369 12:16:59.627265 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
370 12:16:59.633870 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
371 12:16:59.640359 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
372 12:16:59.654295 MRC: 'RECOVERY_MRC_CACHE' does not need update.
373 12:16:59.660934 cse_lite: Skip switching to RW in the recovery path
374 12:16:59.661029 8 DIMMs found
375 12:16:59.661102 SMM Memory Map
376 12:16:59.664866 SMRAM : 0x7b000000 0x800000
377 12:16:59.668896 Subregion 0: 0x7b000000 0x200000
378 12:16:59.672462 Subregion 1: 0x7b200000 0x200000
379 12:16:59.675620 Subregion 2: 0x7b400000 0x400000
380 12:16:59.678966 top_of_ram = 0x77000000
381 12:16:59.685599 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
382 12:16:59.688991 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
383 12:16:59.695811 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
384 12:16:59.699257 MTRR Range: Start=ff000000 End=0 (Size 1000000)
385 12:16:59.705826 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
386 12:16:59.708756
387 12:16:59.712204 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
388 12:16:59.724192 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
389 12:16:59.727520 Processing 211 relocs. Offset value of 0x74c0b000
390 12:16:59.730729
391 12:16:59.737442 BS: romstage times (exec / console): total (unknown) / 277 ms
392 12:16:59.743361
393 12:16:59.743448
394 12:16:59.753381 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
395 12:16:59.756723 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
396 12:16:59.766629 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 12:16:59.773469 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 12:16:59.779987 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
399 12:16:59.786708 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
400 12:16:59.833648 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
401 12:16:59.839860 Processing 5008 relocs. Offset value of 0x75d98000
402 12:16:59.843592 BS: postcar times (exec / console): total (unknown) / 59 ms
403 12:16:59.846411
404 12:16:59.846499
405 12:16:59.856541 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
406 12:16:59.856633 Normal boot
407 12:16:59.860507 FW_CONFIG value is 0x804c02
408 12:16:59.863835 PCI: 00:07.0 disabled by fw_config
409 12:16:59.867287 PCI: 00:07.1 disabled by fw_config
410 12:16:59.870616 PCI: 00:0d.2 disabled by fw_config
411 12:16:59.873519 PCI: 00:1c.7 disabled by fw_config
412 12:16:59.880482 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 12:16:59.887035 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 12:16:59.890387 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 12:16:59.893383 GENERIC: 0.0 disabled by fw_config
416 12:16:59.896680 GENERIC: 1.0 disabled by fw_config
417 12:16:59.903409 fw_config match found: DB_USB=USB3_ACTIVE
418 12:16:59.906791 fw_config match found: DB_USB=USB3_ACTIVE
419 12:16:59.910079 fw_config match found: DB_USB=USB3_ACTIVE
420 12:16:59.913584 fw_config match found: DB_USB=USB3_ACTIVE
421 12:16:59.919941 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 12:16:59.926669 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 12:16:59.933464 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 12:16:59.936875
425 12:16:59.943466 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 12:16:59.946845 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 12:16:59.953284 microcode: Update skipped, already up-to-date
428 12:16:59.959908 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 12:16:59.987142 Detected 4 core, 8 thread CPU.
430 12:16:59.990470 Setting up SMI for CPU
431 12:16:59.993367 IED base = 0x7b400000
432 12:16:59.993455 IED size = 0x00400000
433 12:16:59.997203 Will perform SMM setup.
434 12:17:00.003826 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 12:17:00.010074 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 12:17:00.016910 Processing 16 relocs. Offset value of 0x00030000
437 12:17:00.020284 Attempting to start 7 APs
438 12:17:00.023632 Waiting for 10ms after sending INIT.
439 12:17:00.038680 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 12:17:00.042043 AP: slot 2 apic_id 3.
441 12:17:00.045850 AP: slot 4 apic_id 5.
442 12:17:00.045938 AP: slot 5 apic_id 4.
443 12:17:00.049145 AP: slot 6 apic_id 2.
444 12:17:00.052102 AP: slot 7 apic_id 6.
445 12:17:00.052189 AP: slot 3 apic_id 7.
446 12:17:00.052258 done.
447 12:17:00.059177 Waiting for 2nd SIPI to complete...done.
448 12:17:00.065346 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 12:17:00.072044 Processing 13 relocs. Offset value of 0x00038000
450 12:17:00.072133 Unable to locate Global NVS
451 12:17:00.075554
452 12:17:00.082262 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
453 12:17:00.085580 Installing permanent SMM handler to 0x7b000000
454 12:17:00.095431 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
455 12:17:00.098955 Processing 794 relocs. Offset value of 0x7b010000
456 12:17:00.109067 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
457 12:17:00.111810 Processing 13 relocs. Offset value of 0x7b008000
458 12:17:00.118609 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
459 12:17:00.125601 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
460 12:17:00.128997 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
461 12:17:00.135039 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
462 12:17:00.141628 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
463 12:17:00.148284 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
464 12:17:00.154879 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
465 12:17:00.154967 Unable to locate Global NVS
466 12:17:00.164888 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
467 12:17:00.168230 Clearing SMI status registers
468 12:17:00.168317 SMI_STS: PM1
469 12:17:00.171673 PM1_STS: PWRBTN
470 12:17:00.178401 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
471 12:17:00.181722 In relocation handler: CPU 0
472 12:17:00.185282 New SMBASE=0x7b000000 IEDBASE=0x7b400000
473 12:17:00.191828 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 12:17:00.191916 Relocation complete.
475 12:17:00.201428 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
476 12:17:00.201517 In relocation handler: CPU 1
477 12:17:00.208158 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
478 12:17:00.208246 Relocation complete.
479 12:17:00.217897 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
480 12:17:00.217985 In relocation handler: CPU 5
481 12:17:00.224742 New SMBASE=0x7affec00 IEDBASE=0x7b400000
482 12:17:00.228206 Writing SMRR. base = 0x7b000006, mask=0xff800c00
483 12:17:00.231489 Relocation complete.
484 12:17:00.237660 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
485 12:17:00.241153 In relocation handler: CPU 4
486 12:17:00.244576 New SMBASE=0x7afff000 IEDBASE=0x7b400000
487 12:17:00.247733 Relocation complete.
488 12:17:00.254823 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
489 12:17:00.258067 In relocation handler: CPU 3
490 12:17:00.261391 New SMBASE=0x7afff400 IEDBASE=0x7b400000
491 12:17:00.264713 Relocation complete.
492 12:17:00.271207 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
493 12:17:00.274594 In relocation handler: CPU 7
494 12:17:00.277755 New SMBASE=0x7affe400 IEDBASE=0x7b400000
495 12:17:00.284702 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 12:17:00.285198 Relocation complete.
497 12:17:00.291342 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
498 12:17:00.294722 In relocation handler: CPU 2
499 12:17:00.301436 New SMBASE=0x7afff800 IEDBASE=0x7b400000
500 12:17:00.301982 Relocation complete.
501 12:17:00.307986 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
502 12:17:00.311461 In relocation handler: CPU 6
503 12:17:00.314686 New SMBASE=0x7affe800 IEDBASE=0x7b400000
504 12:17:00.317905
505 12:17:00.321309 Writing SMRR. base = 0x7b000006, mask=0xff800c00
506 12:17:00.324629 Relocation complete.
507 12:17:00.325158 Initializing CPU #0
508 12:17:00.327998 CPU: vendor Intel device 806c1
509 12:17:00.331482 CPU: family 06, model 8c, stepping 01
510 12:17:00.335580 Clearing out pending MCEs
511 12:17:00.338950 Setting up local APIC...
512 12:17:00.339494 apic_id: 0x00 done.
513 12:17:00.342354 Turbo is available but hidden
514 12:17:00.345743 Turbo is available and visible
515 12:17:00.352193 microcode: Update skipped, already up-to-date
516 12:17:00.352677 CPU #0 initialized
517 12:17:00.355433 Initializing CPU #3
518 12:17:00.355878 Initializing CPU #7
519 12:17:00.358746 CPU: vendor Intel device 806c1
520 12:17:00.365361 CPU: family 06, model 8c, stepping 01
521 12:17:00.366003 Initializing CPU #4
522 12:17:00.368759 Initializing CPU #5
523 12:17:00.372226 CPU: vendor Intel device 806c1
524 12:17:00.375684 CPU: family 06, model 8c, stepping 01
525 12:17:00.378858 CPU: vendor Intel device 806c1
526 12:17:00.382273 CPU: family 06, model 8c, stepping 01
527 12:17:00.385588 Clearing out pending MCEs
528 12:17:00.389055 Clearing out pending MCEs
529 12:17:00.389500 Setting up local APIC...
530 12:17:00.391723 Initializing CPU #2
531 12:17:00.395620 Initializing CPU #6
532 12:17:00.396064 apic_id: 0x05 done.
533 12:17:00.398961 Setting up local APIC...
534 12:17:00.402362 CPU: vendor Intel device 806c1
535 12:17:00.405112 CPU: family 06, model 8c, stepping 01
536 12:17:00.408516 Clearing out pending MCEs
537 12:17:00.411853 Clearing out pending MCEs
538 12:17:00.412300 Setting up local APIC...
539 12:17:00.415223 Initializing CPU #1
540 12:17:00.418572 apic_id: 0x07 done.
541 12:17:00.419023 Setting up local APIC...
542 12:17:00.421969 CPU: vendor Intel device 806c1
543 12:17:00.428007 CPU: family 06, model 8c, stepping 01
544 12:17:00.428095 apic_id: 0x04 done.
545 12:17:00.434940 microcode: Update skipped, already up-to-date
546 12:17:00.437832 microcode: Update skipped, already up-to-date
547 12:17:00.441089 CPU #4 initialized
548 12:17:00.441179 CPU #5 initialized
549 12:17:00.444433 Clearing out pending MCEs
550 12:17:00.447779 CPU: vendor Intel device 806c1
551 12:17:00.451150 CPU: family 06, model 8c, stepping 01
552 12:17:00.454308 CPU: vendor Intel device 806c1
553 12:17:00.458109 CPU: family 06, model 8c, stepping 01
554 12:17:00.461355 apic_id: 0x06 done.
555 12:17:00.464241 microcode: Update skipped, already up-to-date
556 12:17:00.470869 microcode: Update skipped, already up-to-date
557 12:17:00.470965 CPU #3 initialized
558 12:17:00.474265 CPU #7 initialized
559 12:17:00.477560 Clearing out pending MCEs
560 12:17:00.477647 Clearing out pending MCEs
561 12:17:00.480893 Setting up local APIC...
562 12:17:00.484503 Setting up local APIC...
563 12:17:00.487757 apic_id: 0x03 done.
564 12:17:00.487852 Setting up local APIC...
565 12:17:00.491056 apic_id: 0x01 done.
566 12:17:00.494405 apic_id: 0x02 done.
567 12:17:00.497931 microcode: Update skipped, already up-to-date
568 12:17:00.501108 microcode: Update skipped, already up-to-date
569 12:17:00.504448 CPU #2 initialized
570 12:17:00.507752 CPU #6 initialized
571 12:17:00.510761 microcode: Update skipped, already up-to-date
572 12:17:00.513842 CPU #1 initialized
573 12:17:00.517344 bsp_do_flight_plan done after 455 msecs.
574 12:17:00.520741 CPU: frequency set to 4000 MHz
575 12:17:00.520884 Enabling SMIs.
576 12:17:00.527581 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
577 12:17:00.544647 SATAXPCIE1 indicates PCIe NVMe is present
578 12:17:00.547769 Probing TPM: done!
579 12:17:00.551051 Connected to device vid:did:rid of 1ae0:0028:00
580 12:17:00.561583 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
581 12:17:00.565421 Initialized TPM device CR50 revision 0
582 12:17:00.568214 Enabling S0i3.4
583 12:17:00.574870 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
584 12:17:00.578282 Found a VBT of 8704 bytes after decompression
585 12:17:00.584982 cse_lite: CSE RO boot. HybridStorageMode disabled
586 12:17:00.591692 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
587 12:17:00.667482 FSPS returned 0
588 12:17:00.670739 Executing Phase 1 of FspMultiPhaseSiInit
589 12:17:00.680718 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
590 12:17:00.684023 port C0 DISC req: usage 1 usb3 1 usb2 5
591 12:17:00.687348 Raw Buffer output 0 00000511
592 12:17:00.690145 Raw Buffer output 1 00000000
593 12:17:00.694063 pmc_send_ipc_cmd succeeded
594 12:17:00.697564 port C1 DISC req: usage 1 usb3 2 usb2 3
595 12:17:00.700639
596 12:17:00.701068 Raw Buffer output 0 00000321
597 12:17:00.704076 Raw Buffer output 1 00000000
598 12:17:00.708116 pmc_send_ipc_cmd succeeded
599 12:17:00.713766 Detected 4 core, 8 thread CPU.
600 12:17:00.717056 Detected 4 core, 8 thread CPU.
601 12:17:00.950761 Display FSP Version Info HOB
602 12:17:00.954026 Reference Code - CPU = a.0.4c.31
603 12:17:00.957573 uCode Version = 0.0.0.86
604 12:17:00.960790 TXT ACM version = ff.ff.ff.ffff
605 12:17:00.964157 Reference Code - ME = a.0.4c.31
606 12:17:00.967546 MEBx version = 0.0.0.0
607 12:17:00.970653 ME Firmware Version = Consumer SKU
608 12:17:00.974146 Reference Code - PCH = a.0.4c.31
609 12:17:00.977363 PCH-CRID Status = Disabled
610 12:17:00.980829 PCH-CRID Original Value = ff.ff.ff.ffff
611 12:17:00.984194 PCH-CRID New Value = ff.ff.ff.ffff
612 12:17:00.987575 OPROM - RST - RAID = ff.ff.ff.ffff
613 12:17:00.990793 PCH Hsio Version = 4.0.0.0
614 12:17:00.994003 Reference Code - SA - System Agent = a.0.4c.31
615 12:17:00.997566 Reference Code - MRC = 2.0.0.1
616 12:17:01.000850 SA - PCIe Version = a.0.4c.31
617 12:17:01.004261 SA-CRID Status = Disabled
618 12:17:01.007675 SA-CRID Original Value = 0.0.0.1
619 12:17:01.010933 SA-CRID New Value = 0.0.0.1
620 12:17:01.014157 OPROM - VBIOS = ff.ff.ff.ffff
621 12:17:01.017527 IO Manageability Engine FW Version = 11.1.4.0
622 12:17:01.020461 PHY Build Version = 0.0.0.e0
623 12:17:01.023720 Thunderbolt(TM) FW Version = 0.0.0.0
624 12:17:01.030351 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
625 12:17:01.033677 ITSS IRQ Polarities Before:
626 12:17:01.034183 IPC0: 0xffffffff
627 12:17:01.037002 IPC1: 0xffffffff
628 12:17:01.037426 IPC2: 0xffffffff
629 12:17:01.040567 IPC3: 0xffffffff
630 12:17:01.043981 ITSS IRQ Polarities After:
631 12:17:01.044458 IPC0: 0xffffffff
632 12:17:01.047580 IPC1: 0xffffffff
633 12:17:01.048164 IPC2: 0xffffffff
634 12:17:01.050224 IPC3: 0xffffffff
635 12:17:01.053580 Found PCIe Root Port #9 at PCI: 00:1d.0.
636 12:17:01.067154 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
637 12:17:01.076756 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
638 12:17:01.090047 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
639 12:17:01.096708 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
640 12:17:01.097192 Enumerating buses...
641 12:17:01.100052
642 12:17:01.103384 Show all devs... Before device enumeration.
643 12:17:01.106851 Root Device: enabled 1
644 12:17:01.107369 DOMAIN: 0000: enabled 1
645 12:17:01.110132 CPU_CLUSTER: 0: enabled 1
646 12:17:01.113473 PCI: 00:00.0: enabled 1
647 12:17:01.116783 PCI: 00:02.0: enabled 1
648 12:17:01.117259 PCI: 00:04.0: enabled 1
649 12:17:01.120103 PCI: 00:05.0: enabled 1
650 12:17:01.123646 PCI: 00:06.0: enabled 0
651 12:17:01.124117 PCI: 00:07.0: enabled 0
652 12:17:01.126879 PCI: 00:07.1: enabled 0
653 12:17:01.129687 PCI: 00:07.2: enabled 0
654 12:17:01.133576 PCI: 00:07.3: enabled 0
655 12:17:01.134142 PCI: 00:08.0: enabled 1
656 12:17:01.136820 PCI: 00:09.0: enabled 0
657 12:17:01.140489 PCI: 00:0a.0: enabled 0
658 12:17:01.143195 PCI: 00:0d.0: enabled 1
659 12:17:01.143684 PCI: 00:0d.1: enabled 0
660 12:17:01.146418 PCI: 00:0d.2: enabled 0
661 12:17:01.150036 PCI: 00:0d.3: enabled 0
662 12:17:01.153363 PCI: 00:0e.0: enabled 0
663 12:17:01.153871 PCI: 00:10.2: enabled 1
664 12:17:01.156976 PCI: 00:10.6: enabled 0
665 12:17:01.160218 PCI: 00:10.7: enabled 0
666 12:17:01.160709 PCI: 00:12.0: enabled 0
667 12:17:01.163597
668 12:17:01.164108 PCI: 00:12.6: enabled 0
669 12:17:01.166294 PCI: 00:13.0: enabled 0
670 12:17:01.170138 PCI: 00:14.0: enabled 1
671 12:17:01.170593 PCI: 00:14.1: enabled 0
672 12:17:01.173314 PCI: 00:14.2: enabled 1
673 12:17:01.176532 PCI: 00:14.3: enabled 1
674 12:17:01.180065 PCI: 00:15.0: enabled 1
675 12:17:01.180515 PCI: 00:15.1: enabled 1
676 12:17:01.183290 PCI: 00:15.2: enabled 1
677 12:17:01.186783 PCI: 00:15.3: enabled 1
678 12:17:01.189725 PCI: 00:16.0: enabled 1
679 12:17:01.190193 PCI: 00:16.1: enabled 0
680 12:17:01.193135 PCI: 00:16.2: enabled 0
681 12:17:01.196522 PCI: 00:16.3: enabled 0
682 12:17:01.199734 PCI: 00:16.4: enabled 0
683 12:17:01.200227 PCI: 00:16.5: enabled 0
684 12:17:01.203224 PCI: 00:17.0: enabled 1
685 12:17:01.206574 PCI: 00:19.0: enabled 0
686 12:17:01.207057 PCI: 00:19.1: enabled 1
687 12:17:01.209495 PCI: 00:19.2: enabled 0
688 12:17:01.212868 PCI: 00:1c.0: enabled 1
689 12:17:01.216387 PCI: 00:1c.1: enabled 0
690 12:17:01.216876 PCI: 00:1c.2: enabled 0
691 12:17:01.219773 PCI: 00:1c.3: enabled 0
692 12:17:01.223113 PCI: 00:1c.4: enabled 0
693 12:17:01.226636 PCI: 00:1c.5: enabled 0
694 12:17:01.227097 PCI: 00:1c.6: enabled 1
695 12:17:01.229775 PCI: 00:1c.7: enabled 0
696 12:17:01.233201 PCI: 00:1d.0: enabled 1
697 12:17:01.236089 PCI: 00:1d.1: enabled 0
698 12:17:01.236546 PCI: 00:1d.2: enabled 1
699 12:17:01.239487 PCI: 00:1d.3: enabled 0
700 12:17:01.242991 PCI: 00:1e.0: enabled 1
701 12:17:01.243447 PCI: 00:1e.1: enabled 0
702 12:17:01.246495
703 12:17:01.247006 PCI: 00:1e.2: enabled 1
704 12:17:01.249836 PCI: 00:1e.3: enabled 1
705 12:17:01.253160 PCI: 00:1f.0: enabled 1
706 12:17:01.253683 PCI: 00:1f.1: enabled 0
707 12:17:01.256616 PCI: 00:1f.2: enabled 1
708 12:17:01.259504 PCI: 00:1f.3: enabled 1
709 12:17:01.262771 PCI: 00:1f.4: enabled 0
710 12:17:01.263228 PCI: 00:1f.5: enabled 1
711 12:17:01.266218 PCI: 00:1f.6: enabled 0
712 12:17:01.269309 PCI: 00:1f.7: enabled 0
713 12:17:01.269855 APIC: 00: enabled 1
714 12:17:01.272581
715 12:17:01.273039 GENERIC: 0.0: enabled 1
716 12:17:01.276508 GENERIC: 0.0: enabled 1
717 12:17:01.279664 GENERIC: 1.0: enabled 1
718 12:17:01.280133 GENERIC: 0.0: enabled 1
719 12:17:01.283043 GENERIC: 1.0: enabled 1
720 12:17:01.286379 USB0 port 0: enabled 1
721 12:17:01.289649 GENERIC: 0.0: enabled 1
722 12:17:01.290120 USB0 port 0: enabled 1
723 12:17:01.292522 GENERIC: 0.0: enabled 1
724 12:17:01.295881 I2C: 00:1a: enabled 1
725 12:17:01.296409 I2C: 00:31: enabled 1
726 12:17:01.299242 I2C: 00:32: enabled 1
727 12:17:01.302646 I2C: 00:10: enabled 1
728 12:17:01.303094 I2C: 00:15: enabled 1
729 12:17:01.305866 GENERIC: 0.0: enabled 0
730 12:17:01.309124 GENERIC: 1.0: enabled 0
731 12:17:01.312697 GENERIC: 0.0: enabled 1
732 12:17:01.313211 SPI: 00: enabled 1
733 12:17:01.316003 SPI: 00: enabled 1
734 12:17:01.319187 PNP: 0c09.0: enabled 1
735 12:17:01.319674 GENERIC: 0.0: enabled 1
736 12:17:01.322704 USB3 port 0: enabled 1
737 12:17:01.325842 USB3 port 1: enabled 1
738 12:17:01.326320 USB3 port 2: enabled 0
739 12:17:01.329441 USB3 port 3: enabled 0
740 12:17:01.332777 USB2 port 0: enabled 0
741 12:17:01.333279 USB2 port 1: enabled 1
742 12:17:01.336221
743 12:17:01.336700 USB2 port 2: enabled 1
744 12:17:01.339188 USB2 port 3: enabled 0
745 12:17:01.342334 USB2 port 4: enabled 1
746 12:17:01.342787 USB2 port 5: enabled 0
747 12:17:01.345687 USB2 port 6: enabled 0
748 12:17:01.349149 USB2 port 7: enabled 0
749 12:17:01.349596 USB2 port 8: enabled 0
750 12:17:01.352718 USB2 port 9: enabled 0
751 12:17:01.356095 USB3 port 0: enabled 0
752 12:17:01.358929 USB3 port 1: enabled 1
753 12:17:01.359379 USB3 port 2: enabled 0
754 12:17:01.362347 USB3 port 3: enabled 0
755 12:17:01.365765 GENERIC: 0.0: enabled 1
756 12:17:01.366222 GENERIC: 1.0: enabled 1
757 12:17:01.369118 APIC: 01: enabled 1
758 12:17:01.372454 APIC: 03: enabled 1
759 12:17:01.372911 APIC: 07: enabled 1
760 12:17:01.375804 APIC: 05: enabled 1
761 12:17:01.379240 APIC: 04: enabled 1
762 12:17:01.379694 APIC: 02: enabled 1
763 12:17:01.382372 APIC: 06: enabled 1
764 12:17:01.382829 Compare with tree...
765 12:17:01.385673 Root Device: enabled 1
766 12:17:01.389038 DOMAIN: 0000: enabled 1
767 12:17:01.392442 PCI: 00:00.0: enabled 1
768 12:17:01.392914 PCI: 00:02.0: enabled 1
769 12:17:01.395838 PCI: 00:04.0: enabled 1
770 12:17:01.398808 GENERIC: 0.0: enabled 1
771 12:17:01.402100 PCI: 00:05.0: enabled 1
772 12:17:01.405597 PCI: 00:06.0: enabled 0
773 12:17:01.406156 PCI: 00:07.0: enabled 0
774 12:17:01.409076 GENERIC: 0.0: enabled 1
775 12:17:01.412537 PCI: 00:07.1: enabled 0
776 12:17:01.415827 GENERIC: 1.0: enabled 1
777 12:17:01.419167 PCI: 00:07.2: enabled 0
778 12:17:01.422150 GENERIC: 0.0: enabled 1
779 12:17:01.422681 PCI: 00:07.3: enabled 0
780 12:17:01.425678 GENERIC: 1.0: enabled 1
781 12:17:01.428963 PCI: 00:08.0: enabled 1
782 12:17:01.432451 PCI: 00:09.0: enabled 0
783 12:17:01.435843 PCI: 00:0a.0: enabled 0
784 12:17:01.436295 PCI: 00:0d.0: enabled 1
785 12:17:01.439379 USB0 port 0: enabled 1
786 12:17:01.442115 USB3 port 0: enabled 1
787 12:17:01.445428 USB3 port 1: enabled 1
788 12:17:01.448872 USB3 port 2: enabled 0
789 12:17:01.449327 USB3 port 3: enabled 0
790 12:17:01.452292 PCI: 00:0d.1: enabled 0
791 12:17:01.455916 PCI: 00:0d.2: enabled 0
792 12:17:01.458713 GENERIC: 0.0: enabled 1
793 12:17:01.462108 PCI: 00:0d.3: enabled 0
794 12:17:01.462554 PCI: 00:0e.0: enabled 0
795 12:17:01.465508 PCI: 00:10.2: enabled 1
796 12:17:01.468838 PCI: 00:10.6: enabled 0
797 12:17:01.472021 PCI: 00:10.7: enabled 0
798 12:17:01.475285 PCI: 00:12.0: enabled 0
799 12:17:01.475739 PCI: 00:12.6: enabled 0
800 12:17:01.478707 PCI: 00:13.0: enabled 0
801 12:17:01.481921 PCI: 00:14.0: enabled 1
802 12:17:01.485063 USB0 port 0: enabled 1
803 12:17:01.488520 USB2 port 0: enabled 0
804 12:17:01.489025 USB2 port 1: enabled 1
805 12:17:01.491700 USB2 port 2: enabled 1
806 12:17:01.495266 USB2 port 3: enabled 0
807 12:17:01.498667 USB2 port 4: enabled 1
808 12:17:01.502092 USB2 port 5: enabled 0
809 12:17:01.505345 USB2 port 6: enabled 0
810 12:17:01.505882 USB2 port 7: enabled 0
811 12:17:01.508806 USB2 port 8: enabled 0
812 12:17:01.512149 USB2 port 9: enabled 0
813 12:17:01.515695 USB3 port 0: enabled 0
814 12:17:01.518454 USB3 port 1: enabled 1
815 12:17:01.518968 USB3 port 2: enabled 0
816 12:17:01.522145 USB3 port 3: enabled 0
817 12:17:01.525053 PCI: 00:14.1: enabled 0
818 12:17:01.528378 PCI: 00:14.2: enabled 1
819 12:17:01.531702 PCI: 00:14.3: enabled 1
820 12:17:01.532139 GENERIC: 0.0: enabled 1
821 12:17:01.535213
822 12:17:01.535664 PCI: 00:15.0: enabled 1
823 12:17:01.538391 I2C: 00:1a: enabled 1
824 12:17:01.542029 I2C: 00:31: enabled 1
825 12:17:01.545087 I2C: 00:32: enabled 1
826 12:17:01.545563 PCI: 00:15.1: enabled 1
827 12:17:01.548465 I2C: 00:10: enabled 1
828 12:17:01.551795 PCI: 00:15.2: enabled 1
829 12:17:01.555257 PCI: 00:15.3: enabled 1
830 12:17:01.558100 PCI: 00:16.0: enabled 1
831 12:17:01.558665 PCI: 00:16.1: enabled 0
832 12:17:01.561534 PCI: 00:16.2: enabled 0
833 12:17:01.565040 PCI: 00:16.3: enabled 0
834 12:17:01.568486 PCI: 00:16.4: enabled 0
835 12:17:01.568957 PCI: 00:16.5: enabled 0
836 12:17:01.571820
837 12:17:01.572221 PCI: 00:17.0: enabled 1
838 12:17:01.575618 PCI: 00:19.0: enabled 0
839 12:17:01.579445 PCI: 00:19.1: enabled 1
840 12:17:01.579933 I2C: 00:15: enabled 1
841 12:17:01.583173 PCI: 00:19.2: enabled 0
842 12:17:01.586552 PCI: 00:1d.0: enabled 1
843 12:17:01.589982 GENERIC: 0.0: enabled 1
844 12:17:01.590438 PCI: 00:1e.0: enabled 1
845 12:17:01.593332 PCI: 00:1e.1: enabled 0
846 12:17:01.596489 PCI: 00:1e.2: enabled 1
847 12:17:01.599950 SPI: 00: enabled 1
848 12:17:01.600400 PCI: 00:1e.3: enabled 1
849 12:17:01.603291
850 12:17:01.603758 SPI: 00: enabled 1
851 12:17:01.605985 PCI: 00:1f.0: enabled 1
852 12:17:01.609517 PNP: 0c09.0: enabled 1
853 12:17:01.661523 PCI: 00:1f.1: enabled 0
854 12:17:01.662090 PCI: 00:1f.2: enabled 1
855 12:17:01.662459 GENERIC: 0.0: enabled 1
856 12:17:01.662797 GENERIC: 0.0: enabled 1
857 12:17:01.663117 GENERIC: 1.0: enabled 1
858 12:17:01.663431 PCI: 00:1f.3: enabled 1
859 12:17:01.663736 PCI: 00:1f.4: enabled 0
860 12:17:01.664499 PCI: 00:1f.5: enabled 1
861 12:17:01.664865 PCI: 00:1f.6: enabled 0
862 12:17:01.665185 PCI: 00:1f.7: enabled 0
863 12:17:01.665489 CPU_CLUSTER: 0: enabled 1
864 12:17:01.665830 APIC: 00: enabled 1
865 12:17:01.666135 APIC: 01: enabled 1
866 12:17:01.666429 APIC: 03: enabled 1
867 12:17:01.666725 APIC: 07: enabled 1
868 12:17:01.667017 APIC: 05: enabled 1
869 12:17:01.667306 APIC: 04: enabled 1
870 12:17:01.667597 APIC: 02: enabled 1
871 12:17:01.667885 APIC: 06: enabled 1
872 12:17:01.668171 Root Device scanning...
873 12:17:01.712004 scan_static_bus for Root Device
874 12:17:01.712471 DOMAIN: 0000 enabled
875 12:17:01.712830 CPU_CLUSTER: 0 enabled
876 12:17:01.713162 DOMAIN: 0000 scanning...
877 12:17:01.713476 PCI: pci_scan_bus for bus 00
878 12:17:01.713855 PCI: 00:00.0 [8086/0000] ops
879 12:17:01.714183 PCI: 00:00.0 [8086/9a12] enabled
880 12:17:01.714858 PCI: 00:02.0 [8086/0000] bus ops
881 12:17:01.715208 PCI: 00:02.0 [8086/9a40] enabled
882 12:17:01.715520 PCI: 00:04.0 [8086/0000] bus ops
883 12:17:01.715854 PCI: 00:04.0 [8086/9a03] enabled
884 12:17:01.716320 PCI: 00:05.0 [8086/9a19] enabled
885 12:17:01.716637 PCI: 00:07.0 [0000/0000] hidden
886 12:17:01.716941 PCI: 00:08.0 [8086/9a11] enabled
887 12:17:01.717241 PCI: 00:0a.0 [8086/9a0d] disabled
888 12:17:01.717545 PCI: 00:0d.0 [8086/0000] bus ops
889 12:17:01.726398 PCI: 00:0d.0 [8086/9a13] enabled
890 12:17:01.726846 PCI: 00:14.0 [8086/0000] bus ops
891 12:17:01.727197 PCI: 00:14.0 [8086/a0ed] enabled
892 12:17:01.727526 PCI: 00:14.2 [8086/a0ef] enabled
893 12:17:01.728998 PCI: 00:14.3 [8086/0000] bus ops
894 12:17:01.729445 PCI: 00:14.3 [8086/a0f0] enabled
895 12:17:01.732450 PCI: 00:15.0 [8086/0000] bus ops
896 12:17:01.735851 PCI: 00:15.0 [8086/a0e8] enabled
897 12:17:01.739267 PCI: 00:15.1 [8086/0000] bus ops
898 12:17:01.742656 PCI: 00:15.1 [8086/a0e9] enabled
899 12:17:01.746053 PCI: 00:15.2 [8086/0000] bus ops
900 12:17:01.749378 PCI: 00:15.2 [8086/a0ea] enabled
901 12:17:01.752216 PCI: 00:15.3 [8086/0000] bus ops
902 12:17:01.755539 PCI: 00:15.3 [8086/a0eb] enabled
903 12:17:01.758956 PCI: 00:16.0 [8086/0000] ops
904 12:17:01.762270 PCI: 00:16.0 [8086/a0e0] enabled
905 12:17:01.769196 PCI: Static device PCI: 00:17.0 not found, disabling it.
906 12:17:01.772471 PCI: 00:19.0 [8086/0000] bus ops
907 12:17:01.775283 PCI: 00:19.0 [8086/a0c5] disabled
908 12:17:01.778641 PCI: 00:19.1 [8086/0000] bus ops
909 12:17:01.781931 PCI: 00:19.1 [8086/a0c6] enabled
910 12:17:01.785302 PCI: 00:1d.0 [8086/0000] bus ops
911 12:17:01.788845 PCI: 00:1d.0 [8086/a0b0] enabled
912 12:17:01.792042 PCI: 00:1e.0 [8086/0000] ops
913 12:17:01.795422 PCI: 00:1e.0 [8086/a0a8] enabled
914 12:17:01.798501 PCI: 00:1e.2 [8086/0000] bus ops
915 12:17:01.801807 PCI: 00:1e.2 [8086/a0aa] enabled
916 12:17:01.805159 PCI: 00:1e.3 [8086/0000] bus ops
917 12:17:01.808579 PCI: 00:1e.3 [8086/a0ab] enabled
918 12:17:01.811683 PCI: 00:1f.0 [8086/0000] bus ops
919 12:17:01.815194 PCI: 00:1f.0 [8086/a087] enabled
920 12:17:01.815648 RTC Init
921 12:17:01.818481 Set power on after power failure.
922 12:17:01.821930 Disabling Deep S3
923 12:17:01.825256 Disabling Deep S3
924 12:17:01.825802 Disabling Deep S4
925 12:17:01.828604 Disabling Deep S4
926 12:17:01.829127 Disabling Deep S5
927 12:17:01.831721 Disabling Deep S5
928 12:17:01.835197 PCI: 00:1f.2 [0000/0000] hidden
929 12:17:01.838655 PCI: 00:1f.3 [8086/0000] bus ops
930 12:17:01.842108 PCI: 00:1f.3 [8086/a0c8] enabled
931 12:17:01.845504 PCI: 00:1f.5 [8086/0000] bus ops
932 12:17:01.848363 PCI: 00:1f.5 [8086/a0a4] enabled
933 12:17:01.852160 PCI: Leftover static devices:
934 12:17:01.852644 PCI: 00:10.2
935 12:17:01.855569 PCI: 00:10.6
936 12:17:01.856035 PCI: 00:10.7
937 12:17:01.856484 PCI: 00:06.0
938 12:17:01.858225 PCI: 00:07.1
939 12:17:01.858658 PCI: 00:07.2
940 12:17:01.861700 PCI: 00:07.3
941 12:17:01.862167 PCI: 00:09.0
942 12:17:01.862578 PCI: 00:0d.1
943 12:17:01.865216 PCI: 00:0d.2
944 12:17:01.865736 PCI: 00:0d.3
945 12:17:01.868642 PCI: 00:0e.0
946 12:17:01.869064 PCI: 00:12.0
947 12:17:01.872190 PCI: 00:12.6
948 12:17:01.872679 PCI: 00:13.0
949 12:17:01.873069 PCI: 00:14.1
950 12:17:01.874929 PCI: 00:16.1
951 12:17:01.875430 PCI: 00:16.2
952 12:17:01.878500 PCI: 00:16.3
953 12:17:01.878956 PCI: 00:16.4
954 12:17:01.879375 PCI: 00:16.5
955 12:17:01.881838 PCI: 00:17.0
956 12:17:01.882333 PCI: 00:19.2
957 12:17:01.884995 PCI: 00:1e.1
958 12:17:01.885482 PCI: 00:1f.1
959 12:17:01.885940 PCI: 00:1f.4
960 12:17:01.888311 PCI: 00:1f.6
961 12:17:01.888797 PCI: 00:1f.7
962 12:17:01.891704 PCI: Check your devicetree.cb.
963 12:17:01.894870 PCI: 00:02.0 scanning...
964 12:17:01.898743 scan_generic_bus for PCI: 00:02.0
965 12:17:01.902030 scan_generic_bus for PCI: 00:02.0 done
966 12:17:01.908458 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
967 12:17:01.908922 PCI: 00:04.0 scanning...
968 12:17:01.911700 scan_generic_bus for PCI: 00:04.0
969 12:17:01.915485
970 12:17:01.915946 GENERIC: 0.0 enabled
971 12:17:01.921778 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
972 12:17:01.925184 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
973 12:17:01.928463 PCI: 00:0d.0 scanning...
974 12:17:01.931694 scan_static_bus for PCI: 00:0d.0
975 12:17:01.934957 USB0 port 0 enabled
976 12:17:01.938281 USB0 port 0 scanning...
977 12:17:01.941764 scan_static_bus for USB0 port 0
978 12:17:01.942262 USB3 port 0 enabled
979 12:17:01.945053 USB3 port 1 enabled
980 12:17:01.948472 USB3 port 2 disabled
981 12:17:01.948937 USB3 port 3 disabled
982 12:17:01.951926 USB3 port 0 scanning...
983 12:17:01.955209 scan_static_bus for USB3 port 0
984 12:17:01.958578 scan_static_bus for USB3 port 0 done
985 12:17:01.961464 scan_bus: bus USB3 port 0 finished in 6 msecs
986 12:17:01.964866 USB3 port 1 scanning...
987 12:17:01.968326 scan_static_bus for USB3 port 1
988 12:17:01.971736 scan_static_bus for USB3 port 1 done
989 12:17:01.977945 scan_bus: bus USB3 port 1 finished in 6 msecs
990 12:17:01.981408 scan_static_bus for USB0 port 0 done
991 12:17:01.984809 scan_bus: bus USB0 port 0 finished in 43 msecs
992 12:17:01.988487 scan_static_bus for PCI: 00:0d.0 done
993 12:17:01.994828 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
994 12:17:01.997847 PCI: 00:14.0 scanning...
995 12:17:02.001592 scan_static_bus for PCI: 00:14.0
996 12:17:02.002068 USB0 port 0 enabled
997 12:17:02.004986 USB0 port 0 scanning...
998 12:17:02.008123 scan_static_bus for USB0 port 0
999 12:17:02.011496 USB2 port 0 disabled
1000 12:17:02.011948 USB2 port 1 enabled
1001 12:17:02.014795 USB2 port 2 enabled
1002 12:17:02.017917 USB2 port 3 disabled
1003 12:17:02.018372 USB2 port 4 enabled
1004 12:17:02.021259 USB2 port 5 disabled
1005 12:17:02.024787 USB2 port 6 disabled
1006 12:17:02.025236 USB2 port 7 disabled
1007 12:17:02.028181 USB2 port 8 disabled
1008 12:17:02.031610 USB2 port 9 disabled
1009 12:17:02.032117 USB3 port 0 disabled
1010 12:17:02.034664 USB3 port 1 enabled
1011 12:17:02.035090 USB3 port 2 disabled
1012 12:17:02.038224 USB3 port 3 disabled
1013 12:17:02.040971 USB2 port 1 scanning...
1014 12:17:02.044497 scan_static_bus for USB2 port 1
1015 12:17:02.047905 scan_static_bus for USB2 port 1 done
1016 12:17:02.051178 scan_bus: bus USB2 port 1 finished in 6 msecs
1017 12:17:02.054519 USB2 port 2 scanning...
1018 12:17:02.057824 scan_static_bus for USB2 port 2
1019 12:17:02.061240 scan_static_bus for USB2 port 2 done
1020 12:17:02.067479 scan_bus: bus USB2 port 2 finished in 6 msecs
1021 12:17:02.067931 USB2 port 4 scanning...
1022 12:17:02.070939 scan_static_bus for USB2 port 4
1023 12:17:02.077751 scan_static_bus for USB2 port 4 done
1024 12:17:02.081233 scan_bus: bus USB2 port 4 finished in 6 msecs
1025 12:17:02.084508 USB3 port 1 scanning...
1026 12:17:02.087449 scan_static_bus for USB3 port 1
1027 12:17:02.090701 scan_static_bus for USB3 port 1 done
1028 12:17:02.094448 scan_bus: bus USB3 port 1 finished in 6 msecs
1029 12:17:02.097280 scan_static_bus for USB0 port 0 done
1030 12:17:02.104437 scan_bus: bus USB0 port 0 finished in 93 msecs
1031 12:17:02.107762 scan_static_bus for PCI: 00:14.0 done
1032 12:17:02.111066 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1033 12:17:02.114069 PCI: 00:14.3 scanning...
1034 12:17:02.117239 scan_static_bus for PCI: 00:14.3
1035 12:17:02.120596 GENERIC: 0.0 enabled
1036 12:17:02.124035 scan_static_bus for PCI: 00:14.3 done
1037 12:17:02.127448 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1038 12:17:02.131008 PCI: 00:15.0 scanning...
1039 12:17:02.134174 scan_static_bus for PCI: 00:15.0
1040 12:17:02.137429 I2C: 00:1a enabled
1041 12:17:02.137901 I2C: 00:31 enabled
1042 12:17:02.140774 I2C: 00:32 enabled
1043 12:17:02.144146 scan_static_bus for PCI: 00:15.0 done
1044 12:17:02.150301 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1045 12:17:02.150755 PCI: 00:15.1 scanning...
1046 12:17:02.154209 scan_static_bus for PCI: 00:15.1
1047 12:17:02.157596 I2C: 00:10 enabled
1048 12:17:02.160800 scan_static_bus for PCI: 00:15.1 done
1049 12:17:02.164335 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1050 12:17:02.167774 PCI: 00:15.2 scanning...
1051 12:17:02.171293 scan_static_bus for PCI: 00:15.2
1052 12:17:02.174644 scan_static_bus for PCI: 00:15.2 done
1053 12:17:02.180939 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1054 12:17:02.184441 PCI: 00:15.3 scanning...
1055 12:17:02.187496 scan_static_bus for PCI: 00:15.3
1056 12:17:02.190701 scan_static_bus for PCI: 00:15.3 done
1057 12:17:02.194359 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1058 12:17:02.197250 PCI: 00:19.1 scanning...
1059 12:17:02.200693 scan_static_bus for PCI: 00:19.1
1060 12:17:02.204013 I2C: 00:15 enabled
1061 12:17:02.207307 scan_static_bus for PCI: 00:19.1 done
1062 12:17:02.210612 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1063 12:17:02.213859 PCI: 00:1d.0 scanning...
1064 12:17:02.217265 do_pci_scan_bridge for PCI: 00:1d.0
1065 12:17:02.220447 PCI: pci_scan_bus for bus 01
1066 12:17:02.223857 PCI: 01:00.0 [1c5c/174a] enabled
1067 12:17:02.227314 GENERIC: 0.0 enabled
1068 12:17:02.230603 Enabling Common Clock Configuration
1069 12:17:02.233961 L1 Sub-State supported from root port 29
1070 12:17:02.237406 L1 Sub-State Support = 0xf
1071 12:17:02.240603 CommonModeRestoreTime = 0x28
1072 12:17:02.244019 Power On Value = 0x16, Power On Scale = 0x0
1073 12:17:02.247298 ASPM: Enabled L1
1074 12:17:02.250726 PCIe: Max_Payload_Size adjusted to 128
1075 12:17:02.253624 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1076 12:17:02.256764 PCI: 00:1e.2 scanning...
1077 12:17:02.260438 scan_generic_bus for PCI: 00:1e.2
1078 12:17:02.263621 SPI: 00 enabled
1079 12:17:02.270390 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1080 12:17:02.273887 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1081 12:17:02.277185 PCI: 00:1e.3 scanning...
1082 12:17:02.280128 scan_generic_bus for PCI: 00:1e.3
1083 12:17:02.280573 SPI: 00 enabled
1084 12:17:02.286942 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1085 12:17:02.293432 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1086 12:17:02.293946 PCI: 00:1f.0 scanning...
1087 12:17:02.296623
1088 12:17:02.300008 scan_static_bus for PCI: 00:1f.0
1089 12:17:02.300455 PNP: 0c09.0 enabled
1090 12:17:02.303327 PNP: 0c09.0 scanning...
1091 12:17:02.306750 scan_static_bus for PNP: 0c09.0
1092 12:17:02.309850 scan_static_bus for PNP: 0c09.0 done
1093 12:17:02.313244 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1094 12:17:02.316657
1095 12:17:02.320023 scan_static_bus for PCI: 00:1f.0 done
1096 12:17:02.323268 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1097 12:17:02.326802 PCI: 00:1f.2 scanning...
1098 12:17:02.330214 scan_static_bus for PCI: 00:1f.2
1099 12:17:02.332957 GENERIC: 0.0 enabled
1100 12:17:02.333408 GENERIC: 0.0 scanning...
1101 12:17:02.336415 scan_static_bus for GENERIC: 0.0
1102 12:17:02.339703 GENERIC: 0.0 enabled
1103 12:17:02.343128 GENERIC: 1.0 enabled
1104 12:17:02.346057 scan_static_bus for GENERIC: 0.0 done
1105 12:17:02.349438 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1106 12:17:02.352842 scan_static_bus for PCI: 00:1f.2 done
1107 12:17:02.359556 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1108 12:17:02.362773 PCI: 00:1f.3 scanning...
1109 12:17:02.366169 scan_static_bus for PCI: 00:1f.3
1110 12:17:02.369552 scan_static_bus for PCI: 00:1f.3 done
1111 12:17:02.372356 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1112 12:17:02.375941 PCI: 00:1f.5 scanning...
1113 12:17:02.379433 scan_generic_bus for PCI: 00:1f.5
1114 12:17:02.382988 scan_generic_bus for PCI: 00:1f.5 done
1115 12:17:02.389191 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1116 12:17:02.392433 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1117 12:17:02.395832 scan_static_bus for Root Device done
1118 12:17:02.402500 scan_bus: bus Root Device finished in 737 msecs
1119 12:17:02.402697 done
1120 12:17:02.408927 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1121 12:17:02.412370 Chrome EC: UHEPI supported
1122 12:17:02.419308 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1123 12:17:02.426167 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1124 12:17:02.429202 SPI flash protection: WPSW=0 SRP0=0
1125 12:17:02.432443 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1126 12:17:02.439285 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1127 12:17:02.442593 found VGA at PCI: 00:02.0
1128 12:17:02.445946 Setting up VGA for PCI: 00:02.0
1129 12:17:02.449281 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1130 12:17:02.455838 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1131 12:17:02.456293 Allocating resources...
1132 12:17:02.459443 Reading resources...
1133 12:17:02.462141 Root Device read_resources bus 0 link: 0
1134 12:17:02.469018 DOMAIN: 0000 read_resources bus 0 link: 0
1135 12:17:02.472397 PCI: 00:04.0 read_resources bus 1 link: 0
1136 12:17:02.479177 PCI: 00:04.0 read_resources bus 1 link: 0 done
1137 12:17:02.482186 PCI: 00:0d.0 read_resources bus 0 link: 0
1138 12:17:02.488973 USB0 port 0 read_resources bus 0 link: 0
1139 12:17:02.492342 USB0 port 0 read_resources bus 0 link: 0 done
1140 12:17:02.498614 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1141 12:17:02.501924 PCI: 00:14.0 read_resources bus 0 link: 0
1142 12:17:02.505495 USB0 port 0 read_resources bus 0 link: 0
1143 12:17:02.512567 USB0 port 0 read_resources bus 0 link: 0 done
1144 12:17:02.515753 PCI: 00:14.0 read_resources bus 0 link: 0 done
1145 12:17:02.523098 PCI: 00:14.3 read_resources bus 0 link: 0
1146 12:17:02.526486 PCI: 00:14.3 read_resources bus 0 link: 0 done
1147 12:17:02.532632 PCI: 00:15.0 read_resources bus 0 link: 0
1148 12:17:02.535826 PCI: 00:15.0 read_resources bus 0 link: 0 done
1149 12:17:02.542658 PCI: 00:15.1 read_resources bus 0 link: 0
1150 12:17:02.546259 PCI: 00:15.1 read_resources bus 0 link: 0 done
1151 12:17:02.553684 PCI: 00:19.1 read_resources bus 0 link: 0
1152 12:17:02.557020 PCI: 00:19.1 read_resources bus 0 link: 0 done
1153 12:17:02.563426 PCI: 00:1d.0 read_resources bus 1 link: 0
1154 12:17:02.566867 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1155 12:17:02.573212 PCI: 00:1e.2 read_resources bus 2 link: 0
1156 12:17:02.576696 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1157 12:17:02.583164 PCI: 00:1e.3 read_resources bus 3 link: 0
1158 12:17:02.586414 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1159 12:17:02.593399 PCI: 00:1f.0 read_resources bus 0 link: 0
1160 12:17:02.596617 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1161 12:17:02.599936 PCI: 00:1f.2 read_resources bus 0 link: 0
1162 12:17:02.606624 GENERIC: 0.0 read_resources bus 0 link: 0
1163 12:17:02.609865 GENERIC: 0.0 read_resources bus 0 link: 0 done
1164 12:17:02.616618 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1165 12:17:02.623245 DOMAIN: 0000 read_resources bus 0 link: 0 done
1166 12:17:02.626561 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1167 12:17:02.632869 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1168 12:17:02.636274 Root Device read_resources bus 0 link: 0 done
1169 12:17:02.639579 Done reading resources.
1170 12:17:02.643140 Show resources in subtree (Root Device)...After reading.
1171 12:17:02.649692 Root Device child on link 0 DOMAIN: 0000
1172 12:17:02.653074 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1173 12:17:02.662743 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1174 12:17:02.672722 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1175 12:17:02.673208 PCI: 00:00.0
1176 12:17:02.682919 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1177 12:17:02.692605 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1178 12:17:02.702603 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1179 12:17:02.712456 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1180 12:17:02.722791 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1181 12:17:02.729033 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1182 12:17:02.739034 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1183 12:17:02.749341 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1184 12:17:02.759170 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1185 12:17:02.768770 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1186 12:17:02.775495 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1187 12:17:02.778898
1188 12:17:02.785752 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1189 12:17:02.795449 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1190 12:17:02.805507 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1191 12:17:02.815610 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1192 12:17:02.825763 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1193 12:17:02.835140 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1194 12:17:02.842047 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1195 12:17:02.852110 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1196 12:17:02.861990 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1197 12:17:02.865404 PCI: 00:02.0
1198 12:17:02.875000 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1199 12:17:02.884994 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1200 12:17:02.891838 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1201 12:17:02.898592 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1202 12:17:02.908248 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1203 12:17:02.908713 GENERIC: 0.0
1204 12:17:02.911327 PCI: 00:05.0
1205 12:17:02.921329 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1206 12:17:02.924740 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1207 12:17:02.927951 GENERIC: 0.0
1208 12:17:02.928404 PCI: 00:08.0
1209 12:17:02.938038 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 12:17:02.941495 PCI: 00:0a.0
1211 12:17:02.944845 PCI: 00:0d.0 child on link 0 USB0 port 0
1212 12:17:02.954425 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1213 12:17:02.957675 USB0 port 0 child on link 0 USB3 port 0
1214 12:17:02.961077
1215 12:17:02.961526 USB3 port 0
1216 12:17:02.964625 USB3 port 1
1217 12:17:02.965228 USB3 port 2
1218 12:17:02.967890 USB3 port 3
1219 12:17:02.971199 PCI: 00:14.0 child on link 0 USB0 port 0
1220 12:17:02.980739 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1221 12:17:02.984146 USB0 port 0 child on link 0 USB2 port 0
1222 12:17:02.987540 USB2 port 0
1223 12:17:02.988023 USB2 port 1
1224 12:17:02.990927 USB2 port 2
1225 12:17:02.991423 USB2 port 3
1226 12:17:02.994338
1227 12:17:02.994824 USB2 port 4
1228 12:17:02.997397 USB2 port 5
1229 12:17:02.997884 USB2 port 6
1230 12:17:03.000780 USB2 port 7
1231 12:17:03.001236 USB2 port 8
1232 12:17:03.004065 USB2 port 9
1233 12:17:03.004476 USB3 port 0
1234 12:17:03.007476 USB3 port 1
1235 12:17:03.007935 USB3 port 2
1236 12:17:03.010988 USB3 port 3
1237 12:17:03.011443 PCI: 00:14.2
1238 12:17:03.021113 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1239 12:17:03.030644 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1240 12:17:03.037286 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1241 12:17:03.047288 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 12:17:03.047749 GENERIC: 0.0
1243 12:17:03.050767 PCI: 00:15.0 child on link 0 I2C: 00:1a
1244 12:17:03.061001 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 12:17:03.064223 I2C: 00:1a
1246 12:17:03.064754 I2C: 00:31
1247 12:17:03.067548 I2C: 00:32
1248 12:17:03.070479 PCI: 00:15.1 child on link 0 I2C: 00:10
1249 12:17:03.080598 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 12:17:03.083863 I2C: 00:10
1251 12:17:03.084346 PCI: 00:15.2
1252 12:17:03.093576 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1253 12:17:03.097091 PCI: 00:15.3
1254 12:17:03.107190 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 12:17:03.107723 PCI: 00:16.0
1256 12:17:03.117185 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 12:17:03.120594 PCI: 00:19.0
1258 12:17:03.123856 PCI: 00:19.1 child on link 0 I2C: 00:15
1259 12:17:03.133765 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 12:17:03.134329 I2C: 00:15
1261 12:17:03.140935 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1262 12:17:03.146898 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1263 12:17:03.157157 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1264 12:17:03.166798 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1265 12:17:03.170250 GENERIC: 0.0
1266 12:17:03.170752 PCI: 01:00.0
1267 12:17:03.180312 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1268 12:17:03.190362 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1269 12:17:03.199817 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1270 12:17:03.200313 PCI: 00:1e.0
1271 12:17:03.213476 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1272 12:17:03.216904 PCI: 00:1e.2 child on link 0 SPI: 00
1273 12:17:03.226272 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1274 12:17:03.226767 SPI: 00
1275 12:17:03.229638 PCI: 00:1e.3 child on link 0 SPI: 00
1276 12:17:03.240528 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1277 12:17:03.243146 SPI: 00
1278 12:17:03.246344 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1279 12:17:03.256830 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1280 12:17:03.257430 PNP: 0c09.0
1281 12:17:03.266654 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1282 12:17:03.269920 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1283 12:17:03.280109 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1284 12:17:03.289810 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1285 12:17:03.293309 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1286 12:17:03.296579 GENERIC: 0.0
1287 12:17:03.297143 GENERIC: 1.0
1288 12:17:03.299493 PCI: 00:1f.3
1289 12:17:03.309814 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1290 12:17:03.319392 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1291 12:17:03.319937 PCI: 00:1f.5
1292 12:17:03.329474 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1293 12:17:03.332691 CPU_CLUSTER: 0 child on link 0 APIC: 00
1294 12:17:03.335812 APIC: 00
1295 12:17:03.336322 APIC: 01
1296 12:17:03.339296 APIC: 03
1297 12:17:03.339889 APIC: 07
1298 12:17:03.340437 APIC: 05
1299 12:17:03.342706 APIC: 04
1300 12:17:03.343266 APIC: 02
1301 12:17:03.346050 APIC: 06
1302 12:17:03.352083 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1303 12:17:03.358977 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1304 12:17:03.362336 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1305 12:17:03.369038 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1306 12:17:03.375656 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1307 12:17:03.378630 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1308 12:17:03.381896 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1309 12:17:03.389151 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1310 12:17:03.395430 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1311 12:17:03.405209 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1312 12:17:03.412080 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1313 12:17:03.418761 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1314 12:17:03.425336 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1315 12:17:03.431953 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1316 12:17:03.441721 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1317 12:17:03.445222 DOMAIN: 0000: Resource ranges:
1318 12:17:03.448550 * Base: 1000, Size: 800, Tag: 100
1319 12:17:03.451878 * Base: 1900, Size: e700, Tag: 100
1320 12:17:03.455242 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1321 12:17:03.462065 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1322 12:17:03.471953 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1323 12:17:03.478037 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1324 12:17:03.485281 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1325 12:17:03.491586 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1326 12:17:03.494866
1327 12:17:03.501796 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1328 12:17:03.507970 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1329 12:17:03.514859 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1330 12:17:03.524747 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1331 12:17:03.531856 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1332 12:17:03.538496 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1333 12:17:03.548195 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1334 12:17:03.555268 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1335 12:17:03.561383 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1336 12:17:03.571548 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1337 12:17:03.578179 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1338 12:17:03.584798 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1339 12:17:03.595212 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1340 12:17:03.601814 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1341 12:17:03.608067 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1342 12:17:03.618341 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1343 12:17:03.624758 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1344 12:17:03.631474 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1345 12:17:03.641656 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1346 12:17:03.644882 DOMAIN: 0000: Resource ranges:
1347 12:17:03.648454 * Base: 7fc00000, Size: 40400000, Tag: 200
1348 12:17:03.650982 * Base: d0000000, Size: 28000000, Tag: 200
1349 12:17:03.657936 * Base: fa000000, Size: 1000000, Tag: 200
1350 12:17:03.661189 * Base: fb001000, Size: 2fff000, Tag: 200
1351 12:17:03.664750 * Base: fe010000, Size: 2e000, Tag: 200
1352 12:17:03.667929 * Base: fe03f000, Size: d41000, Tag: 200
1353 12:17:03.674186 * Base: fed88000, Size: 8000, Tag: 200
1354 12:17:03.677815 * Base: fed93000, Size: d000, Tag: 200
1355 12:17:03.681200 * Base: feda2000, Size: 1e000, Tag: 200
1356 12:17:03.684704 * Base: fede0000, Size: 1220000, Tag: 200
1357 12:17:03.690882 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1358 12:17:03.697485 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1359 12:17:03.704508 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1360 12:17:03.710853 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1361 12:17:03.717834 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1362 12:17:03.724300 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1363 12:17:03.731069 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1364 12:17:03.737668 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1365 12:17:03.744209 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1366 12:17:03.750661 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1367 12:17:03.757942 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1368 12:17:03.763821 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1369 12:17:03.770676 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1370 12:17:03.777553 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1371 12:17:03.783935 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1372 12:17:03.790330 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1373 12:17:03.796977 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1374 12:17:03.803556 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1375 12:17:03.810423 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1376 12:17:03.817055 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1377 12:17:03.823501 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1378 12:17:03.830593 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1379 12:17:03.837284 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1380 12:17:03.843461 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1381 12:17:03.853880 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1382 12:17:03.857266 PCI: 00:1d.0: Resource ranges:
1383 12:17:03.860473 * Base: 7fc00000, Size: 100000, Tag: 200
1384 12:17:03.866606 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1385 12:17:03.873240 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1386 12:17:03.880012 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1387 12:17:03.886691 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1388 12:17:03.896539 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1389 12:17:03.899798 Root Device assign_resources, bus 0 link: 0
1390 12:17:03.903211 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 12:17:03.912896 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1392 12:17:03.920320 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1393 12:17:03.930051 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1394 12:17:03.936469 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1395 12:17:03.943164 PCI: 00:04.0 assign_resources, bus 1 link: 0
1396 12:17:03.945891 PCI: 00:04.0 assign_resources, bus 1 link: 0
1397 12:17:03.952656 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1398 12:17:03.956093
1399 12:17:03.962791 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1400 12:17:03.969630 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1401 12:17:03.975710 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1402 12:17:03.979143 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1403 12:17:03.989182 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1404 12:17:03.992109 PCI: 00:14.0 assign_resources, bus 0 link: 0
1405 12:17:03.998703 PCI: 00:14.0 assign_resources, bus 0 link: 0
1406 12:17:04.005475 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1407 12:17:04.012356 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1408 12:17:04.022544 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1409 12:17:04.025863 PCI: 00:14.3 assign_resources, bus 0 link: 0
1410 12:17:04.032481 PCI: 00:14.3 assign_resources, bus 0 link: 0
1411 12:17:04.039143 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1412 12:17:04.045766 PCI: 00:15.0 assign_resources, bus 0 link: 0
1413 12:17:04.049053 PCI: 00:15.0 assign_resources, bus 0 link: 0
1414 12:17:04.055232 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1415 12:17:04.062014 PCI: 00:15.1 assign_resources, bus 0 link: 0
1416 12:17:04.065362 PCI: 00:15.1 assign_resources, bus 0 link: 0
1417 12:17:04.075632 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1418 12:17:04.081622 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1419 12:17:04.091822 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1420 12:17:04.098254 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1421 12:17:04.104740 PCI: 00:19.1 assign_resources, bus 0 link: 0
1422 12:17:04.108120 PCI: 00:19.1 assign_resources, bus 0 link: 0
1423 12:17:04.118452 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1424 12:17:04.128288 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1425 12:17:04.135030 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1426 12:17:04.141006 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1427 12:17:04.147837 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1428 12:17:04.154329 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1429 12:17:04.157782
1430 12:17:04.164588 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1431 12:17:04.167816 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1432 12:17:04.177556 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1433 12:17:04.180866 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1434 12:17:04.187378 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1435 12:17:04.194205 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1436 12:17:04.197732 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1437 12:17:04.204422 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1438 12:17:04.207751 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1439 12:17:04.214204 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1440 12:17:04.217630 LPC: Trying to open IO window from 800 size 1ff
1441 12:17:04.227165 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1442 12:17:04.233755 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1443 12:17:04.243916 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1444 12:17:04.247301 DOMAIN: 0000 assign_resources, bus 0 link: 0
1445 12:17:04.250626 Root Device assign_resources, bus 0 link: 0
1446 12:17:04.253929 Done setting resources.
1447 12:17:04.260561 Show resources in subtree (Root Device)...After assigning values.
1448 12:17:04.263442 Root Device child on link 0 DOMAIN: 0000
1449 12:17:04.270152 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1450 12:17:04.280463 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1451 12:17:04.290358 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1452 12:17:04.290467 PCI: 00:00.0
1453 12:17:04.300008 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1454 12:17:04.310189 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1455 12:17:04.320278 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1456 12:17:04.326696 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1457 12:17:04.336984 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1458 12:17:04.347164 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1459 12:17:04.356503 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1460 12:17:04.366494 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1461 12:17:04.376675 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1462 12:17:04.383518 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1463 12:17:04.392900 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1464 12:17:04.403046 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1465 12:17:04.412970 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1466 12:17:04.422664 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1467 12:17:04.429436 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1468 12:17:04.439450 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1469 12:17:04.449461 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1470 12:17:04.459419 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1471 12:17:04.468925 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1472 12:17:04.479314 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1473 12:17:04.479408 PCI: 00:02.0
1474 12:17:04.492496 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1475 12:17:04.502643 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1476 12:17:04.512100 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1477 12:17:04.515384 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1478 12:17:04.525513 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1479 12:17:04.529046 GENERIC: 0.0
1480 12:17:04.529133 PCI: 00:05.0
1481 12:17:04.538681 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1482 12:17:04.545339 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1483 12:17:04.545427 GENERIC: 0.0
1484 12:17:04.548633 PCI: 00:08.0
1485 12:17:04.558564 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1486 12:17:04.558653 PCI: 00:0a.0
1487 12:17:04.565203 PCI: 00:0d.0 child on link 0 USB0 port 0
1488 12:17:04.575478 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1489 12:17:04.578762 USB0 port 0 child on link 0 USB3 port 0
1490 12:17:04.582166 USB3 port 0
1491 12:17:04.582254 USB3 port 1
1492 12:17:04.585135 USB3 port 2
1493 12:17:04.585222 USB3 port 3
1494 12:17:04.592012 PCI: 00:14.0 child on link 0 USB0 port 0
1495 12:17:04.601840 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1496 12:17:04.605255 USB0 port 0 child on link 0 USB2 port 0
1497 12:17:04.608757 USB2 port 0
1498 12:17:04.608842 USB2 port 1
1499 12:17:04.611460 USB2 port 2
1500 12:17:04.611545 USB2 port 3
1501 12:17:04.614923 USB2 port 4
1502 12:17:04.615008 USB2 port 5
1503 12:17:04.618272 USB2 port 6
1504 12:17:04.618357 USB2 port 7
1505 12:17:04.621622 USB2 port 8
1506 12:17:04.621713 USB2 port 9
1507 12:17:04.625226 USB3 port 0
1508 12:17:04.625382 USB3 port 1
1509 12:17:04.628510 USB3 port 2
1510 12:17:04.628608 USB3 port 3
1511 12:17:04.631908 PCI: 00:14.2
1512 12:17:04.641641 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1513 12:17:04.651469 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1514 12:17:04.658341 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1515 12:17:04.668220 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1516 12:17:04.668332 GENERIC: 0.0
1517 12:17:04.671800 PCI: 00:15.0 child on link 0 I2C: 00:1a
1518 12:17:04.674679
1519 12:17:04.684860 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1520 12:17:04.685375 I2C: 00:1a
1521 12:17:04.688283 I2C: 00:31
1522 12:17:04.688720 I2C: 00:32
1523 12:17:04.691737 PCI: 00:15.1 child on link 0 I2C: 00:10
1524 12:17:04.701905 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1525 12:17:04.705154 I2C: 00:10
1526 12:17:04.705591 PCI: 00:15.2
1527 12:17:04.718539 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1528 12:17:04.719006 PCI: 00:15.3
1529 12:17:04.728228 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1530 12:17:04.731713 PCI: 00:16.0
1531 12:17:04.741363 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1532 12:17:04.741877 PCI: 00:19.0
1533 12:17:04.748144 PCI: 00:19.1 child on link 0 I2C: 00:15
1534 12:17:04.758329 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1535 12:17:04.758777 I2C: 00:15
1536 12:17:04.764660 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1537 12:17:04.771304 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1538 12:17:04.784591 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1539 12:17:04.794652 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1540 12:17:04.797915 GENERIC: 0.0
1541 12:17:04.798396 PCI: 01:00.0
1542 12:17:04.807500 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1543 12:17:04.817598 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1544 12:17:04.831490 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1545 12:17:04.832099 PCI: 00:1e.0
1546 12:17:04.840901 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1547 12:17:04.847968 PCI: 00:1e.2 child on link 0 SPI: 00
1548 12:17:04.857933 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1549 12:17:04.858536 SPI: 00
1550 12:17:04.860941 PCI: 00:1e.3 child on link 0 SPI: 00
1551 12:17:04.870659 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1552 12:17:04.874334 SPI: 00
1553 12:17:04.877807 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1554 12:17:04.887368 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1555 12:17:04.887996 PNP: 0c09.0
1556 12:17:04.897435 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1557 12:17:04.900966 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1558 12:17:04.911253 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1559 12:17:04.920533 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1560 12:17:04.924101 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1561 12:17:04.927301 GENERIC: 0.0
1562 12:17:04.927800 GENERIC: 1.0
1563 12:17:04.931139 PCI: 00:1f.3
1564 12:17:04.940535 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1565 12:17:04.951074 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1566 12:17:04.954221 PCI: 00:1f.5
1567 12:17:04.963488 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1568 12:17:04.967224 CPU_CLUSTER: 0 child on link 0 APIC: 00
1569 12:17:04.967722 APIC: 00
1570 12:17:04.970662 APIC: 01
1571 12:17:04.971158 APIC: 03
1572 12:17:04.973880 APIC: 07
1573 12:17:04.974428 APIC: 05
1574 12:17:04.974826 APIC: 04
1575 12:17:04.976808 APIC: 02
1576 12:17:04.977303 APIC: 06
1577 12:17:04.980163 Done allocating resources.
1578 12:17:04.986752 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1579 12:17:04.993622 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1580 12:17:04.997080 Configure GPIOs for I2S audio on UP4.
1581 12:17:05.003772 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1582 12:17:05.006923 Enabling resources...
1583 12:17:05.009912 PCI: 00:00.0 subsystem <- 8086/9a12
1584 12:17:05.010408 PCI: 00:00.0 cmd <- 06
1585 12:17:05.017001 PCI: 00:02.0 subsystem <- 8086/9a40
1586 12:17:05.017624 PCI: 00:02.0 cmd <- 03
1587 12:17:05.020610 PCI: 00:04.0 subsystem <- 8086/9a03
1588 12:17:05.023943 PCI: 00:04.0 cmd <- 02
1589 12:17:05.027084 PCI: 00:05.0 subsystem <- 8086/9a19
1590 12:17:05.030366 PCI: 00:05.0 cmd <- 02
1591 12:17:05.033969 PCI: 00:08.0 subsystem <- 8086/9a11
1592 12:17:05.037199 PCI: 00:08.0 cmd <- 06
1593 12:17:05.039956 PCI: 00:0d.0 subsystem <- 8086/9a13
1594 12:17:05.043733 PCI: 00:0d.0 cmd <- 02
1595 12:17:05.047144 PCI: 00:14.0 subsystem <- 8086/a0ed
1596 12:17:05.050369 PCI: 00:14.0 cmd <- 02
1597 12:17:05.053911 PCI: 00:14.2 subsystem <- 8086/a0ef
1598 12:17:05.054560 PCI: 00:14.2 cmd <- 02
1599 12:17:05.056853
1600 12:17:05.060446 PCI: 00:14.3 subsystem <- 8086/a0f0
1601 12:17:05.061058 PCI: 00:14.3 cmd <- 02
1602 12:17:05.066893 PCI: 00:15.0 subsystem <- 8086/a0e8
1603 12:17:05.067492 PCI: 00:15.0 cmd <- 02
1604 12:17:05.070052 PCI: 00:15.1 subsystem <- 8086/a0e9
1605 12:17:05.073465 PCI: 00:15.1 cmd <- 02
1606 12:17:05.076704 PCI: 00:15.2 subsystem <- 8086/a0ea
1607 12:17:05.080399 PCI: 00:15.2 cmd <- 02
1608 12:17:05.083315 PCI: 00:15.3 subsystem <- 8086/a0eb
1609 12:17:05.086794 PCI: 00:15.3 cmd <- 02
1610 12:17:05.089881 PCI: 00:16.0 subsystem <- 8086/a0e0
1611 12:17:05.092644 PCI: 00:16.0 cmd <- 02
1612 12:17:05.096015 PCI: 00:19.1 subsystem <- 8086/a0c6
1613 12:17:05.099305 PCI: 00:19.1 cmd <- 02
1614 12:17:05.102762 PCI: 00:1d.0 bridge ctrl <- 0013
1615 12:17:05.106231 PCI: 00:1d.0 subsystem <- 8086/a0b0
1616 12:17:05.109270 PCI: 00:1d.0 cmd <- 06
1617 12:17:05.112673 PCI: 00:1e.0 subsystem <- 8086/a0a8
1618 12:17:05.113126 PCI: 00:1e.0 cmd <- 06
1619 12:17:05.116453
1620 12:17:05.119407 PCI: 00:1e.2 subsystem <- 8086/a0aa
1621 12:17:05.119965 PCI: 00:1e.2 cmd <- 06
1622 12:17:05.125895 PCI: 00:1e.3 subsystem <- 8086/a0ab
1623 12:17:05.126380 PCI: 00:1e.3 cmd <- 02
1624 12:17:05.129295 PCI: 00:1f.0 subsystem <- 8086/a087
1625 12:17:05.132437 PCI: 00:1f.0 cmd <- 407
1626 12:17:05.135522 PCI: 00:1f.3 subsystem <- 8086/a0c8
1627 12:17:05.139199 PCI: 00:1f.3 cmd <- 02
1628 12:17:05.142576 PCI: 00:1f.5 subsystem <- 8086/a0a4
1629 12:17:05.145911 PCI: 00:1f.5 cmd <- 406
1630 12:17:05.150059 PCI: 01:00.0 cmd <- 02
1631 12:17:05.154233 done.
1632 12:17:05.157961 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1633 12:17:05.161188 Initializing devices...
1634 12:17:05.164811 Root Device init
1635 12:17:05.167997 Chrome EC: Set SMI mask to 0x0000000000000000
1636 12:17:05.174437 Chrome EC: clear events_b mask to 0x0000000000000000
1637 12:17:05.181077 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1638 12:17:05.184901 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1639 12:17:05.191450 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1640 12:17:05.197687 Chrome EC: Set WAKE mask to 0x0000000000000000
1641 12:17:05.200851 fw_config match found: DB_USB=USB3_ACTIVE
1642 12:17:05.207634 Configure Right Type-C port orientation for retimer
1643 12:17:05.210854 Root Device init finished in 42 msecs
1644 12:17:05.214321 PCI: 00:00.0 init
1645 12:17:05.214820 CPU TDP = 9 Watts
1646 12:17:05.217744 CPU PL1 = 9 Watts
1647 12:17:05.221370 CPU PL2 = 40 Watts
1648 12:17:05.222023 CPU PL4 = 83 Watts
1649 12:17:05.223787 PCI: 00:00.0 init finished in 8 msecs
1650 12:17:05.227443 PCI: 00:02.0 init
1651 12:17:05.230785 GMA: Found VBT in CBFS
1652 12:17:05.234061 GMA: Found valid VBT in CBFS
1653 12:17:05.237464 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1654 12:17:05.247551 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1655 12:17:05.250718 PCI: 00:02.0 init finished in 18 msecs
1656 12:17:05.253538 PCI: 00:05.0 init
1657 12:17:05.257018 PCI: 00:05.0 init finished in 0 msecs
1658 12:17:05.257639 PCI: 00:08.0 init
1659 12:17:05.263832 PCI: 00:08.0 init finished in 0 msecs
1660 12:17:05.264330 PCI: 00:14.0 init
1661 12:17:05.270373 PCI: 00:14.0 init finished in 0 msecs
1662 12:17:05.270889 PCI: 00:14.2 init
1663 12:17:05.273810 PCI: 00:14.2 init finished in 0 msecs
1664 12:17:05.277567 PCI: 00:15.0 init
1665 12:17:05.280797 I2C bus 0 version 0x3230302a
1666 12:17:05.284147 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1667 12:17:05.287887 PCI: 00:15.0 init finished in 6 msecs
1668 12:17:05.290468 PCI: 00:15.1 init
1669 12:17:05.293688 I2C bus 1 version 0x3230302a
1670 12:17:05.297497 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1671 12:17:05.300556 PCI: 00:15.1 init finished in 6 msecs
1672 12:17:05.304033 PCI: 00:15.2 init
1673 12:17:05.307835 I2C bus 2 version 0x3230302a
1674 12:17:05.310769 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1675 12:17:05.314022 PCI: 00:15.2 init finished in 6 msecs
1676 12:17:05.314581 PCI: 00:15.3 init
1677 12:17:05.317349 I2C bus 3 version 0x3230302a
1678 12:17:05.320753 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1679 12:17:05.327068 PCI: 00:15.3 init finished in 6 msecs
1680 12:17:05.327636 PCI: 00:16.0 init
1681 12:17:05.330401 PCI: 00:16.0 init finished in 0 msecs
1682 12:17:05.334107 PCI: 00:19.1 init
1683 12:17:05.337332 I2C bus 5 version 0x3230302a
1684 12:17:05.340786 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1685 12:17:05.344809 PCI: 00:19.1 init finished in 6 msecs
1686 12:17:05.347681 PCI: 00:1d.0 init
1687 12:17:05.351071 Initializing PCH PCIe bridge.
1688 12:17:05.354632 PCI: 00:1d.0 init finished in 3 msecs
1689 12:17:05.357690 PCI: 00:1f.0 init
1690 12:17:05.361079 IOAPIC: Initializing IOAPIC at 0xfec00000
1691 12:17:05.364116 IOAPIC: Bootstrap Processor Local APIC = 0x00
1692 12:17:05.367402
1693 12:17:05.367944 IOAPIC: ID = 0x02
1694 12:17:05.370966 IOAPIC: Dumping registers
1695 12:17:05.374287 reg 0x0000: 0x02000000
1696 12:17:05.374779 reg 0x0001: 0x00770020
1697 12:17:05.377418 reg 0x0002: 0x00000000
1698 12:17:05.380853 PCI: 00:1f.0 init finished in 21 msecs
1699 12:17:05.383901 PCI: 00:1f.2 init
1700 12:17:05.387629 Disabling ACPI via APMC.
1701 12:17:05.390951 APMC done.
1702 12:17:05.394361 PCI: 00:1f.2 init finished in 5 msecs
1703 12:17:05.405239 PCI: 01:00.0 init
1704 12:17:05.408656 PCI: 01:00.0 init finished in 0 msecs
1705 12:17:05.411869 PNP: 0c09.0 init
1706 12:17:05.414971 Google Chrome EC uptime: 8.404 seconds
1707 12:17:05.421938 Google Chrome AP resets since EC boot: 1
1708 12:17:05.425041 Google Chrome most recent AP reset causes:
1709 12:17:05.428252 0.348: 32775 shutdown: entering G3
1710 12:17:05.435444 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1711 12:17:05.438289 PNP: 0c09.0 init finished in 22 msecs
1712 12:17:05.444197 Devices initialized
1713 12:17:05.447520 Show all devs... After init.
1714 12:17:05.450469 Root Device: enabled 1
1715 12:17:05.450966 DOMAIN: 0000: enabled 1
1716 12:17:05.454105 CPU_CLUSTER: 0: enabled 1
1717 12:17:05.457505 PCI: 00:00.0: enabled 1
1718 12:17:05.460831 PCI: 00:02.0: enabled 1
1719 12:17:05.461418 PCI: 00:04.0: enabled 1
1720 12:17:05.463744 PCI: 00:05.0: enabled 1
1721 12:17:05.467039 PCI: 00:06.0: enabled 0
1722 12:17:05.470388 PCI: 00:07.0: enabled 0
1723 12:17:05.470896 PCI: 00:07.1: enabled 0
1724 12:17:05.474218 PCI: 00:07.2: enabled 0
1725 12:17:05.477389 PCI: 00:07.3: enabled 0
1726 12:17:05.480697 PCI: 00:08.0: enabled 1
1727 12:17:05.481205 PCI: 00:09.0: enabled 0
1728 12:17:05.483758 PCI: 00:0a.0: enabled 0
1729 12:17:05.487082 PCI: 00:0d.0: enabled 1
1730 12:17:05.490187 PCI: 00:0d.1: enabled 0
1731 12:17:05.490514 PCI: 00:0d.2: enabled 0
1732 12:17:05.493445 PCI: 00:0d.3: enabled 0
1733 12:17:05.496684 PCI: 00:0e.0: enabled 0
1734 12:17:05.496930 PCI: 00:10.2: enabled 1
1735 12:17:05.499854 PCI: 00:10.6: enabled 0
1736 12:17:05.503326 PCI: 00:10.7: enabled 0
1737 12:17:05.506533 PCI: 00:12.0: enabled 0
1738 12:17:05.506699 PCI: 00:12.6: enabled 0
1739 12:17:05.509777 PCI: 00:13.0: enabled 0
1740 12:17:05.513140 PCI: 00:14.0: enabled 1
1741 12:17:05.516645 PCI: 00:14.1: enabled 0
1742 12:17:05.516770 PCI: 00:14.2: enabled 1
1743 12:17:05.520076 PCI: 00:14.3: enabled 1
1744 12:17:05.523243 PCI: 00:15.0: enabled 1
1745 12:17:05.526544 PCI: 00:15.1: enabled 1
1746 12:17:05.526645 PCI: 00:15.2: enabled 1
1747 12:17:05.529766 PCI: 00:15.3: enabled 1
1748 12:17:05.533048 PCI: 00:16.0: enabled 1
1749 12:17:05.536251 PCI: 00:16.1: enabled 0
1750 12:17:05.536344 PCI: 00:16.2: enabled 0
1751 12:17:05.539593 PCI: 00:16.3: enabled 0
1752 12:17:05.542851 PCI: 00:16.4: enabled 0
1753 12:17:05.546274 PCI: 00:16.5: enabled 0
1754 12:17:05.546364 PCI: 00:17.0: enabled 0
1755 12:17:05.549592 PCI: 00:19.0: enabled 0
1756 12:17:05.552870 PCI: 00:19.1: enabled 1
1757 12:17:05.552959 PCI: 00:19.2: enabled 0
1758 12:17:05.556251 PCI: 00:1c.0: enabled 1
1759 12:17:05.559646 PCI: 00:1c.1: enabled 0
1760 12:17:05.562988 PCI: 00:1c.2: enabled 0
1761 12:17:05.563079 PCI: 00:1c.3: enabled 0
1762 12:17:05.566236 PCI: 00:1c.4: enabled 0
1763 12:17:05.569442 PCI: 00:1c.5: enabled 0
1764 12:17:05.572825 PCI: 00:1c.6: enabled 1
1765 12:17:05.572916 PCI: 00:1c.7: enabled 0
1766 12:17:05.575920 PCI: 00:1d.0: enabled 1
1767 12:17:05.579244 PCI: 00:1d.1: enabled 0
1768 12:17:05.582424 PCI: 00:1d.2: enabled 1
1769 12:17:05.582520 PCI: 00:1d.3: enabled 0
1770 12:17:05.586147 PCI: 00:1e.0: enabled 1
1771 12:17:05.589461 PCI: 00:1e.1: enabled 0
1772 12:17:05.592685 PCI: 00:1e.2: enabled 1
1773 12:17:05.592775 PCI: 00:1e.3: enabled 1
1774 12:17:05.596002 PCI: 00:1f.0: enabled 1
1775 12:17:05.599250 PCI: 00:1f.1: enabled 0
1776 12:17:05.599340 PCI: 00:1f.2: enabled 1
1777 12:17:05.602424 PCI: 00:1f.3: enabled 1
1778 12:17:05.605845 PCI: 00:1f.4: enabled 0
1779 12:17:05.609020 PCI: 00:1f.5: enabled 1
1780 12:17:05.609109 PCI: 00:1f.6: enabled 0
1781 12:17:05.612399 PCI: 00:1f.7: enabled 0
1782 12:17:05.615784 APIC: 00: enabled 1
1783 12:17:05.618916 GENERIC: 0.0: enabled 1
1784 12:17:05.619006 GENERIC: 0.0: enabled 1
1785 12:17:05.622115 GENERIC: 1.0: enabled 1
1786 12:17:05.625417 GENERIC: 0.0: enabled 1
1787 12:17:05.625506 GENERIC: 1.0: enabled 1
1788 12:17:05.628870 USB0 port 0: enabled 1
1789 12:17:05.632369 GENERIC: 0.0: enabled 1
1790 12:17:05.635499 USB0 port 0: enabled 1
1791 12:17:05.635588 GENERIC: 0.0: enabled 1
1792 12:17:05.638829 I2C: 00:1a: enabled 1
1793 12:17:05.642117 I2C: 00:31: enabled 1
1794 12:17:05.642207 I2C: 00:32: enabled 1
1795 12:17:05.645432 I2C: 00:10: enabled 1
1796 12:17:05.648812 I2C: 00:15: enabled 1
1797 12:17:05.648902 GENERIC: 0.0: enabled 0
1798 12:17:05.652170
1799 12:17:05.652262 GENERIC: 1.0: enabled 0
1800 12:17:05.655531 GENERIC: 0.0: enabled 1
1801 12:17:05.658916 SPI: 00: enabled 1
1802 12:17:05.659005 SPI: 00: enabled 1
1803 12:17:05.662321 PNP: 0c09.0: enabled 1
1804 12:17:05.665605 GENERIC: 0.0: enabled 1
1805 12:17:05.665695 USB3 port 0: enabled 1
1806 12:17:05.668314 USB3 port 1: enabled 1
1807 12:17:05.671781 USB3 port 2: enabled 0
1808 12:17:05.671871 USB3 port 3: enabled 0
1809 12:17:05.675138 USB2 port 0: enabled 0
1810 12:17:05.678309 USB2 port 1: enabled 1
1811 12:17:05.681689 USB2 port 2: enabled 1
1812 12:17:05.681831 USB2 port 3: enabled 0
1813 12:17:05.684898 USB2 port 4: enabled 1
1814 12:17:05.688655 USB2 port 5: enabled 0
1815 12:17:05.688736 USB2 port 6: enabled 0
1816 12:17:05.691866 USB2 port 7: enabled 0
1817 12:17:05.695179 USB2 port 8: enabled 0
1818 12:17:05.695259 USB2 port 9: enabled 0
1819 12:17:05.698505
1820 12:17:05.698580 USB3 port 0: enabled 0
1821 12:17:05.702077 USB3 port 1: enabled 1
1822 12:17:05.705549 USB3 port 2: enabled 0
1823 12:17:05.705829 USB3 port 3: enabled 0
1824 12:17:05.708944 GENERIC: 0.0: enabled 1
1825 12:17:05.712041 GENERIC: 1.0: enabled 1
1826 12:17:05.712341 APIC: 01: enabled 1
1827 12:17:05.715533 APIC: 03: enabled 1
1828 12:17:05.718897 APIC: 07: enabled 1
1829 12:17:05.719189 APIC: 05: enabled 1
1830 12:17:05.721970 APIC: 04: enabled 1
1831 12:17:05.725115 APIC: 02: enabled 1
1832 12:17:05.725569 APIC: 06: enabled 1
1833 12:17:05.728534 PCI: 01:00.0: enabled 1
1834 12:17:05.735244 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1835 12:17:05.738254 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1836 12:17:05.741670 ELOG: NV offset 0xf30000 size 0x1000
1837 12:17:05.749446 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1838 12:17:05.756258 ELOG: Event(17) added with size 13 at 2023-01-31 12:17:05 UTC
1839 12:17:05.762975 ELOG: Event(92) added with size 9 at 2023-01-31 12:17:05 UTC
1840 12:17:05.769298 ELOG: Event(93) added with size 9 at 2023-01-31 12:17:05 UTC
1841 12:17:05.775835 ELOG: Event(9E) added with size 10 at 2023-01-31 12:17:05 UTC
1842 12:17:05.782738 ELOG: Event(9F) added with size 14 at 2023-01-31 12:17:05 UTC
1843 12:17:05.788863 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1844 12:17:05.791997 ELOG: Event(A1) added with size 10 at 2023-01-31 12:17:05 UTC
1845 12:17:05.795942
1846 12:17:05.798714 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1847 12:17:05.805069 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1848 12:17:05.809082 Finalize devices...
1849 12:17:05.809675 Devices finalized
1850 12:17:05.815255 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1851 12:17:05.821983 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1852 12:17:05.825049 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1853 12:17:05.831487 ME: HFSTS1 : 0x80030055
1854 12:17:05.834820 ME: HFSTS2 : 0x30280116
1855 12:17:05.838219 ME: HFSTS3 : 0x00000050
1856 12:17:05.844779 ME: HFSTS4 : 0x00004000
1857 12:17:05.848129 ME: HFSTS5 : 0x00000000
1858 12:17:05.851542 ME: HFSTS6 : 0x00400006
1859 12:17:05.858036 ME: Manufacturing Mode : YES
1860 12:17:05.861463 ME: SPI Protection Mode Enabled : NO
1861 12:17:05.864708 ME: FW Partition Table : OK
1862 12:17:05.868020 ME: Bringup Loader Failure : NO
1863 12:17:05.871289 ME: Firmware Init Complete : NO
1864 12:17:05.874430 ME: Boot Options Present : NO
1865 12:17:05.877761 ME: Update In Progress : NO
1866 12:17:05.881026 ME: D0i3 Support : YES
1867 12:17:05.887987 ME: Low Power State Enabled : NO
1868 12:17:05.891287 ME: CPU Replaced : YES
1869 12:17:05.894340 ME: CPU Replacement Valid : YES
1870 12:17:05.897498 ME: Current Working State : 5
1871 12:17:05.901356 ME: Current Operation State : 1
1872 12:17:05.904158 ME: Current Operation Mode : 3
1873 12:17:05.907871 ME: Error Code : 0
1874 12:17:05.911251 ME: Enhanced Debug Mode : NO
1875 12:17:05.914475 ME: CPU Debug Disabled : YES
1876 12:17:05.917672
1877 12:17:05.920957 ME: TXT Support : NO
1878 12:17:05.924285 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1879 12:17:05.934662 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1880 12:17:05.937476 CBFS: 'fallback/slic' not found.
1881 12:17:05.940736 ACPI: Writing ACPI tables at 76b01000.
1882 12:17:05.940835 ACPI: * FACS
1883 12:17:05.944532 ACPI: * DSDT
1884 12:17:05.947975 Ramoops buffer: 0x100000@0x76a00000.
1885 12:17:05.951193 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1886 12:17:05.953955
1887 12:17:05.957880 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1888 12:17:05.960542 Google Chrome EC: version:
1889 12:17:05.964037 ro: voema_v2.0.7540-147f8d37d1
1890 12:17:05.967301 rw: voema_v2.0.7540-147f8d37d1
1891 12:17:05.970604 running image: 2
1892 12:17:05.973917 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1893 12:17:05.979393 ACPI: * FADT
1894 12:17:05.979546 SCI is IRQ9
1895 12:17:05.982735 ACPI: added table 1/32, length now 40
1896 12:17:05.985921
1897 12:17:05.986017 ACPI: * SSDT
1898 12:17:05.989166 Found 1 CPU(s) with 8 core(s) each.
1899 12:17:05.995753 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1900 12:17:05.999587 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1901 12:17:06.002809 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1902 12:17:06.006157 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1903 12:17:06.012720 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1904 12:17:06.019244 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1905 12:17:06.022444 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1906 12:17:06.029524 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1907 12:17:06.036107 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1908 12:17:06.039820 \_SB.PCI0.RP09: Added StorageD3Enable property
1909 12:17:06.042673 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1910 12:17:06.049577 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1911 12:17:06.056571 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1912 12:17:06.059334 PS2K: Passing 80 keymaps to kernel
1913 12:17:06.066265 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1914 12:17:06.072332 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1915 12:17:06.079598 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1916 12:17:06.086177 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1917 12:17:06.092864 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1918 12:17:06.099125 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1919 12:17:06.106065 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1920 12:17:06.112844 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1921 12:17:06.115668 ACPI: added table 2/32, length now 44
1922 12:17:06.116126 ACPI: * MCFG
1923 12:17:06.119013
1924 12:17:06.122834 ACPI: added table 3/32, length now 48
1925 12:17:06.123565 ACPI: * TPM2
1926 12:17:06.126282 TPM2 log created at 0x769f0000
1927 12:17:06.129248 ACPI: added table 4/32, length now 52
1928 12:17:06.132562 ACPI: * MADT
1929 12:17:06.133229 SCI is IRQ9
1930 12:17:06.135654 ACPI: added table 5/32, length now 56
1931 12:17:06.139065 current = 76b09850
1932 12:17:06.139687 ACPI: * DMAR
1933 12:17:06.142508 ACPI: added table 6/32, length now 60
1934 12:17:06.146237
1935 12:17:06.149298 ACPI: added table 7/32, length now 64
1936 12:17:06.149888 ACPI: * HPET
1937 12:17:06.152450 ACPI: added table 8/32, length now 68
1938 12:17:06.156005 ACPI: done.
1939 12:17:06.156755 ACPI tables: 35216 bytes.
1940 12:17:06.158648
1941 12:17:06.159258 smbios_write_tables: 769ef000
1942 12:17:06.162452 EC returned error result code 3
1943 12:17:06.165797 Couldn't obtain OEM name from CBI
1944 12:17:06.169689 Create SMBIOS type 16
1945 12:17:06.172877 Create SMBIOS type 17
1946 12:17:06.176227 GENERIC: 0.0 (WIFI Device)
1947 12:17:06.176721 SMBIOS tables: 1750 bytes.
1948 12:17:06.182915 Writing table forward entry at 0x00000500
1949 12:17:06.189678 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1950 12:17:06.193048 Writing coreboot table at 0x76b25000
1951 12:17:06.199463 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1952 12:17:06.202669 1. 0000000000001000-000000000009ffff: RAM
1953 12:17:06.205817 2. 00000000000a0000-00000000000fffff: RESERVED
1954 12:17:06.212671 3. 0000000000100000-00000000769eefff: RAM
1955 12:17:06.216019 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1956 12:17:06.222834 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1957 12:17:06.229746 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1958 12:17:06.232682 7. 0000000077000000-000000007fbfffff: RESERVED
1959 12:17:06.235843 8. 00000000c0000000-00000000cfffffff: RESERVED
1960 12:17:06.242686 9. 00000000f8000000-00000000f9ffffff: RESERVED
1961 12:17:06.246163 10. 00000000fb000000-00000000fb000fff: RESERVED
1962 12:17:06.252912 11. 00000000fe000000-00000000fe00ffff: RESERVED
1963 12:17:06.256279 12. 00000000fed80000-00000000fed87fff: RESERVED
1964 12:17:06.262593 13. 00000000fed90000-00000000fed92fff: RESERVED
1965 12:17:06.266163 14. 00000000feda0000-00000000feda1fff: RESERVED
1966 12:17:06.272589 15. 00000000fedc0000-00000000feddffff: RESERVED
1967 12:17:06.275863 16. 0000000100000000-00000002803fffff: RAM
1968 12:17:06.278686 Passing 4 GPIOs to payload:
1969 12:17:06.282565 NAME | PORT | POLARITY | VALUE
1970 12:17:06.289127 lid | undefined | high | high
1971 12:17:06.292436 power | undefined | high | low
1972 12:17:06.295821
1973 12:17:06.298830 oprom | undefined | high | low
1974 12:17:06.305312 EC in RW | 0x000000e5 | high | high
1975 12:17:06.312048 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e129
1976 12:17:06.312572 coreboot table: 1576 bytes.
1977 12:17:06.318512 IMD ROOT 0. 0x76fff000 0x00001000
1978 12:17:06.321877 IMD SMALL 1. 0x76ffe000 0x00001000
1979 12:17:06.325156 FSP MEMORY 2. 0x76c4e000 0x003b0000
1980 12:17:06.328638 VPD 3. 0x76c4d000 0x00000367
1981 12:17:06.331401 RO MCACHE 4. 0x76c4c000 0x00000fdc
1982 12:17:06.334954 CONSOLE 5. 0x76c2c000 0x00020000
1983 12:17:06.338376 FMAP 6. 0x76c2b000 0x00000578
1984 12:17:06.345281 TIME STAMP 7. 0x76c2a000 0x00000910
1985 12:17:06.348324 VBOOT WORK 8. 0x76c16000 0x00014000
1986 12:17:06.351567 ROMSTG STCK 9. 0x76c15000 0x00001000
1987 12:17:06.355250 AFTER CAR 10. 0x76c0a000 0x0000b000
1988 12:17:06.358424 RAMSTAGE 11. 0x76b97000 0x00073000
1989 12:17:06.361845 REFCODE 12. 0x76b42000 0x00055000
1990 12:17:06.365123 SMM BACKUP 13. 0x76b32000 0x00010000
1991 12:17:06.367985 4f444749 14. 0x76b30000 0x00002000
1992 12:17:06.371227 EXT VBT15. 0x76b2d000 0x0000219f
1993 12:17:06.377822 COREBOOT 16. 0x76b25000 0x00008000
1994 12:17:06.381304 ACPI 17. 0x76b01000 0x00024000
1995 12:17:06.384902 ACPI GNVS 18. 0x76b00000 0x00001000
1996 12:17:06.388689 RAMOOPS 19. 0x76a00000 0x00100000
1997 12:17:06.391775 TPM2 TCGLOG20. 0x769f0000 0x00010000
1998 12:17:06.394848 SMBIOS 21. 0x769ef000 0x00000800
1999 12:17:06.398113 IMD small region:
2000 12:17:06.401279 IMD ROOT 0. 0x76ffec00 0x00000400
2001 12:17:06.404707 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2002 12:17:06.407852 POWER STATE 2. 0x76ffeb80 0x00000044
2003 12:17:06.411267 ROMSTAGE 3. 0x76ffeb60 0x00000004
2004 12:17:06.417912 MEM INFO 4. 0x76ffe980 0x000001e0
2005 12:17:06.421181 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
2006 12:17:06.424473 MTRR: Physical address space:
2007 12:17:06.431276 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2008 12:17:06.438029 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2009 12:17:06.444469 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2010 12:17:06.450764 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2011 12:17:06.457421 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2012 12:17:06.464066 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2013 12:17:06.470175 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2014 12:17:06.473542 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 12:17:06.476955 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 12:17:06.480162 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 12:17:06.483496 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 12:17:06.486819
2019 12:17:06.490291 MTRR: Fixed MSR 0x269 0x0606060606060606
2020 12:17:06.493652 MTRR: Fixed MSR 0x26a 0x0606060606060606
2021 12:17:06.497429 MTRR: Fixed MSR 0x26b 0x0606060606060606
2022 12:17:06.500397 MTRR: Fixed MSR 0x26c 0x0606060606060606
2023 12:17:06.506903 MTRR: Fixed MSR 0x26d 0x0606060606060606
2024 12:17:06.510159 MTRR: Fixed MSR 0x26e 0x0606060606060606
2025 12:17:06.513657 MTRR: Fixed MSR 0x26f 0x0606060606060606
2026 12:17:06.517403 call enable_fixed_mtrr()
2027 12:17:06.520836 CPU physical address size: 39 bits
2028 12:17:06.527552 MTRR: default type WB/UC MTRR counts: 6/6.
2029 12:17:06.530748 MTRR: UC selected as default type.
2030 12:17:06.537266 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2031 12:17:06.540458 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2032 12:17:06.547075 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2033 12:17:06.553824 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2034 12:17:06.560418 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2035 12:17:06.567463 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2036 12:17:06.573692 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 12:17:06.577267 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 12:17:06.580396 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 12:17:06.583764 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 12:17:06.590305 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 12:17:06.593655 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 12:17:06.597099 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 12:17:06.600114 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 12:17:06.603421 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 12:17:06.610294 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 12:17:06.613417 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 12:17:06.616798 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 12:17:06.619858
2049 12:17:06.620377 call enable_fixed_mtrr()
2050 12:17:06.623665 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 12:17:06.626476
2052 12:17:06.630281 MTRR: Fixed MSR 0x259 0x0000000000000000
2053 12:17:06.633084 MTRR: Fixed MSR 0x268 0x0606060606060606
2054 12:17:06.636525 MTRR: Fixed MSR 0x269 0x0606060606060606
2055 12:17:06.639991 MTRR: Fixed MSR 0x26a 0x0606060606060606
2056 12:17:06.646726 MTRR: Fixed MSR 0x26b 0x0606060606060606
2057 12:17:06.650538 MTRR: Fixed MSR 0x26c 0x0606060606060606
2058 12:17:06.653502 MTRR: Fixed MSR 0x26d 0x0606060606060606
2059 12:17:06.657313 MTRR: Fixed MSR 0x26e 0x0606060606060606
2060 12:17:06.663669 MTRR: Fixed MSR 0x26f 0x0606060606060606
2061 12:17:06.667113 CPU physical address size: 39 bits
2062 12:17:06.670602 call enable_fixed_mtrr()
2063 12:17:06.673554 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 12:17:06.680448 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 12:17:06.683529 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 12:17:06.686971 MTRR: Fixed MSR 0x259 0x0000000000000000
2067 12:17:06.690357 MTRR: Fixed MSR 0x268 0x0606060606060606
2068 12:17:06.693456 MTRR: Fixed MSR 0x269 0x0606060606060606
2069 12:17:06.696942
2070 12:17:06.699978 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 12:17:06.703183 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 12:17:06.706584 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 12:17:06.709815 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 12:17:06.716723 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 12:17:06.719874 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 12:17:06.723545 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 12:17:06.726564 call enable_fixed_mtrr()
2078 12:17:06.729930 MTRR: Fixed MSR 0x259 0x0000000000000000
2079 12:17:06.736593 MTRR: Fixed MSR 0x268 0x0606060606060606
2080 12:17:06.739485 MTRR: Fixed MSR 0x269 0x0606060606060606
2081 12:17:06.742840 MTRR: Fixed MSR 0x26a 0x0606060606060606
2082 12:17:06.746625 MTRR: Fixed MSR 0x26b 0x0606060606060606
2083 12:17:06.753428 MTRR: Fixed MSR 0x26c 0x0606060606060606
2084 12:17:06.756848 MTRR: Fixed MSR 0x26d 0x0606060606060606
2085 12:17:06.759662 MTRR: Fixed MSR 0x26e 0x0606060606060606
2086 12:17:06.763228 MTRR: Fixed MSR 0x26f 0x0606060606060606
2087 12:17:06.767296 CPU physical address size: 39 bits
2088 12:17:06.773557 call enable_fixed_mtrr()
2089 12:17:06.776861 MTRR: Fixed MSR 0x250 0x0606060606060606
2090 12:17:06.777463
2091 12:17:06.778064 MTRR check
2092 12:17:06.780308 MTRR: Fixed MSR 0x258 0x0606060606060606
2093 12:17:06.786706 MTRR: Fixed MSR 0x259 0x0000000000000000
2094 12:17:06.790051 MTRR: Fixed MSR 0x268 0x0606060606060606
2095 12:17:06.793255 MTRR: Fixed MSR 0x269 0x0606060606060606
2096 12:17:06.796577 MTRR: Fixed MSR 0x26a 0x0606060606060606
2097 12:17:06.803480 MTRR: Fixed MSR 0x26b 0x0606060606060606
2098 12:17:06.806701 MTRR: Fixed MSR 0x26c 0x0606060606060606
2099 12:17:06.810037 MTRR: Fixed MSR 0x26d 0x0606060606060606
2100 12:17:06.813515 MTRR: Fixed MSR 0x26e 0x0606060606060606
2101 12:17:06.820160 MTRR: Fixed MSR 0x26f 0x0606060606060606
2102 12:17:06.823005 Fixed MTRRs : call enable_fixed_mtrr()
2103 12:17:06.823464 Enabled
2104 12:17:06.826652 Variable MTRRs: Enabled
2105 12:17:06.827213
2106 12:17:06.829897 CPU physical address size: 39 bits
2107 12:17:06.837023 BS: BS_WRITE_TABLES exit times (exec / console): 254 / 151 ms
2108 12:17:06.840692 CPU physical address size: 39 bits
2109 12:17:06.847125 MTRR: Fixed MSR 0x250 0x0606060606060606
2110 12:17:06.850320 MTRR: Fixed MSR 0x250 0x0606060606060606
2111 12:17:06.854094 MTRR: Fixed MSR 0x258 0x0606060606060606
2112 12:17:06.857518 MTRR: Fixed MSR 0x259 0x0000000000000000
2113 12:17:06.860717 MTRR: Fixed MSR 0x268 0x0606060606060606
2114 12:17:06.864264
2115 12:17:06.867606 MTRR: Fixed MSR 0x269 0x0606060606060606
2116 12:17:06.870091 MTRR: Fixed MSR 0x26a 0x0606060606060606
2117 12:17:06.873328 MTRR: Fixed MSR 0x26b 0x0606060606060606
2118 12:17:06.876776 MTRR: Fixed MSR 0x26c 0x0606060606060606
2119 12:17:06.883641 MTRR: Fixed MSR 0x26d 0x0606060606060606
2120 12:17:06.886951 MTRR: Fixed MSR 0x26e 0x0606060606060606
2121 12:17:06.890052 MTRR: Fixed MSR 0x26f 0x0606060606060606
2122 12:17:06.897207 MTRR: Fixed MSR 0x258 0x0606060606060606
2123 12:17:06.900264 MTRR: Fixed MSR 0x259 0x0000000000000000
2124 12:17:06.903296 MTRR: Fixed MSR 0x268 0x0606060606060606
2125 12:17:06.907103 MTRR: Fixed MSR 0x269 0x0606060606060606
2126 12:17:06.913827 MTRR: Fixed MSR 0x26a 0x0606060606060606
2127 12:17:06.917215 MTRR: Fixed MSR 0x26b 0x0606060606060606
2128 12:17:06.920419 MTRR: Fixed MSR 0x26c 0x0606060606060606
2129 12:17:06.923728 MTRR: Fixed MSR 0x26d 0x0606060606060606
2130 12:17:06.929755 MTRR: Fixed MSR 0x26e 0x0606060606060606
2131 12:17:06.933476 MTRR: Fixed MSR 0x26f 0x0606060606060606
2132 12:17:06.936742 call enable_fixed_mtrr()
2133 12:17:06.940330 call enable_fixed_mtrr()
2134 12:17:06.943790 Checking cr50 for pending updates
2135 12:17:06.947682 CPU physical address size: 39 bits
2136 12:17:06.950848 CPU physical address size: 39 bits
2137 12:17:06.954535 CPU physical address size: 39 bits
2138 12:17:06.957911 Reading cr50 TPM mode
2139 12:17:06.966014 BS: BS_PAYLOAD_LOAD entry times (exec / console): 117 / 6 ms
2140 12:17:06.976276 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2141 12:17:06.979881 Checking segment from ROM address 0xffc02b38
2142 12:17:06.982835 Checking segment from ROM address 0xffc02b54
2143 12:17:06.989580 Loading segment from ROM address 0xffc02b38
2144 12:17:06.990091 code (compression=0)
2145 12:17:06.999173 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2146 12:17:07.005822 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2147 12:17:07.009191
2148 12:17:07.009644 it's not compressed!
2149 12:17:07.148500 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2150 12:17:07.155666 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2151 12:17:07.162238 Loading segment from ROM address 0xffc02b54
2152 12:17:07.162633 Entry Point 0x30000000
2153 12:17:07.165915
2154 12:17:07.166407 Loaded segments
2155 12:17:07.172217 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2156 12:17:07.215202 Finalizing chipset.
2157 12:17:07.218171 Finalizing SMM.
2158 12:17:07.218650 APMC done.
2159 12:17:07.224682 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2160 12:17:07.228101 mp_park_aps done after 0 msecs.
2161 12:17:07.231519 Jumping to boot code at 0x30000000(0x76b25000)
2162 12:17:07.241494 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2163 12:17:07.242085
2164 12:17:07.242449
2165 12:17:07.242784
2166 12:17:07.244828 Starting depthcharge on Voema...
2167 12:17:07.245276
2168 12:17:07.246298 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2169 12:17:07.246813 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2170 12:17:07.247222 Setting prompt string to ['volteer:']
2171 12:17:07.247615 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2172 12:17:07.255008 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2173 12:17:07.255095
2174 12:17:07.260821 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2175 12:17:07.260908
2176 12:17:07.267396 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2177 12:17:07.267482
2178 12:17:07.271489 Failed to find eMMC card reader
2179 12:17:07.271663
2180 12:17:07.271743 Wipe memory regions:
2181 12:17:07.271821
2182 12:17:07.277310 [0x00000000001000, 0x000000000a0000)
2183 12:17:07.277467
2184 12:17:07.280935 [0x00000000100000, 0x00000030000000)
2185 12:17:07.281123
2186 12:17:07.310001 [0x00000032662db0, 0x000000769ef000)
2187 12:17:07.310273
2188 12:17:07.349091 [0x00000100000000, 0x00000280400000)
2189 12:17:07.349679
2190 12:17:07.553242 ec_init: CrosEC protocol v3 supported (256, 256)
2191 12:17:07.553411
2192 12:17:07.559869 update_port_state: port C0 state: usb enable 1 mux conn 0
2193 12:17:07.559985
2194 12:17:07.569698 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2195 12:17:07.569850
2196 12:17:07.573162 pmc_check_ipc_sts: STS_BUSY done after 1584 us
2197 12:17:07.573263
2198 12:17:07.579738 send_conn_disc_msg: pmc_send_cmd succeeded
2199 12:17:07.579842
2200 12:17:08.011444 R8152: Initializing
2201 12:17:08.011601
2202 12:17:08.014329 Version 6 (ocp_data = 5c30)
2203 12:17:08.014418
2204 12:17:08.017625 R8152: Done initializing
2205 12:17:08.017719
2206 12:17:08.020848 Adding net device
2207 12:17:08.020937
2208 12:17:08.326230 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2209 12:17:08.326791
2210 12:17:08.327182
2211 12:17:08.327606
2212 12:17:08.330038 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2214 12:17:08.431529 volteer: tftpboot 192.168.201.1 8948133/tftp-deploy-dqzfw46q/kernel/bzImage 8948133/tftp-deploy-dqzfw46q/kernel/cmdline 8948133/tftp-deploy-dqzfw46q/ramdisk/ramdisk.cpio.gz
2215 12:17:08.431668 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2216 12:17:08.431767 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2217 12:17:08.435749 tftpboot 192.168.201.1 8948133/tftp-deploy-dqzfw46q/kernel/bzImoy-dqzfw46q/kernel/cmdline 8948133/tftp-deploy-dqzfw46q/ramdisk/ramdisk.cpio.gz
2218 12:17:08.435844
2219 12:17:08.435917 Waiting for link
2220 12:17:08.435986
2221 12:17:08.639076 done.
2222 12:17:08.639209
2223 12:17:08.639297 MAC: 00:24:32:30:7c:e4
2224 12:17:08.639366
2225 12:17:08.642412 Sending DHCP discover... done.
2226 12:17:08.642491
2227 12:17:08.645776 Waiting for reply... done.
2228 12:17:08.645853
2229 12:17:08.649043 Sending DHCP request... done.
2230 12:17:08.649119
2231 12:17:08.652279 Waiting for reply... done.
2232 12:17:08.652357
2233 12:17:08.655561 My ip is 192.168.201.23
2234 12:17:08.655642
2235 12:17:08.659257 The DHCP server ip is 192.168.201.1
2236 12:17:08.659337
2237 12:17:08.665972 TFTP server IP predefined by user: 192.168.201.1
2238 12:17:08.666062
2239 12:17:08.672311 Bootfile predefined by user: 8948133/tftp-deploy-dqzfw46q/kernel/bzImage
2240 12:17:08.672392
2241 12:17:08.675786 Sending tftp read request... done.
2242 12:17:08.675869
2243 12:17:08.679053 Waiting for the transfer...
2244 12:17:08.679137
2245 12:17:09.279524 00000000 ################################################################
2246 12:17:09.279674
2247 12:17:09.923684 00080000 ################################################################
2248 12:17:09.923826
2249 12:17:10.509875 00100000 ################################################################
2250 12:17:10.510024
2251 12:17:11.107813 00180000 ################################################################
2252 12:17:11.107985
2253 12:17:11.705409 00200000 ################################################################
2254 12:17:11.705557
2255 12:17:12.306813 00280000 ################################################################
2256 12:17:12.306977
2257 12:17:12.896514 00300000 ################################################################
2258 12:17:12.896653
2259 12:17:13.476855 00380000 ################################################################
2260 12:17:13.477018
2261 12:17:14.067401 00400000 ################################################################
2262 12:17:14.067547
2263 12:17:14.667717 00480000 ################################################################
2264 12:17:14.667863
2265 12:17:15.253542 00500000 ################################################################
2266 12:17:15.253682
2267 12:17:15.850914 00580000 ################################################################
2268 12:17:15.851069
2269 12:17:16.443904 00600000 ################################################################
2270 12:17:16.444048
2271 12:17:16.996281 00680000 ################################################################
2272 12:17:16.996427
2273 12:17:17.249110 00700000 ############################ done.
2274 12:17:17.249256
2275 12:17:17.252344 The bootfile was 7569296 bytes long.
2276 12:17:17.252434
2277 12:17:17.255706 Sending tftp read request... done.
2278 12:17:17.255795
2279 12:17:17.258942 Waiting for the transfer...
2280 12:17:17.259031
2281 12:17:17.811762 00000000 ################################################################
2282 12:17:17.811906
2283 12:17:18.389078 00080000 ################################################################
2284 12:17:18.389220
2285 12:17:19.533318 00100000 ################################################################
2286 12:17:19.533472
2287 12:17:20.289889 00180000 ################################################################
2288 12:17:20.290032
2289 12:17:20.861607 00200000 ################################################################
2290 12:17:20.861772
2291 12:17:21.425357 00280000 ################################################################
2292 12:17:21.425512
2293 12:17:21.993649 00300000 ################################################################
2294 12:17:21.993833
2295 12:17:22.572809 00380000 ################################################################
2296 12:17:22.572961
2297 12:17:23.147061 00400000 ################################################################
2298 12:17:23.147219
2299 12:17:23.721010 00480000 ################################################################
2300 12:17:23.721168
2301 12:17:23.995210 00500000 ################################ done.
2302 12:17:23.995362
2303 12:17:23.998704 Sending tftp read request... done.
2304 12:17:23.998795
2305 12:17:24.001890 Waiting for the transfer...
2306 12:17:24.001988
2307 12:17:24.002060 00000000 # done.
2308 12:17:24.002129
2309 12:17:24.012159 Command line loaded dynamically from TFTP file: 8948133/tftp-deploy-dqzfw46q/kernel/cmdline
2310 12:17:24.012317
2311 12:17:24.034942 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8948133/extract-nfsrootfs-v0vsyikd,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2312 12:17:24.035046
2313 12:17:24.038366 Shutting down all USB controllers.
2314 12:17:24.041439
2315 12:17:24.041534 Removing current net device
2316 12:17:24.041640
2317 12:17:24.044747 Finalizing coreboot
2318 12:17:24.044836
2319 12:17:24.051377 Exiting depthcharge with code 4 at timestamp: 25443286
2320 12:17:24.051466
2321 12:17:24.051536
2322 12:17:24.051602 Starting kernel ...
2323 12:17:24.051664
2324 12:17:24.051726
2325 12:17:24.051786
2326 12:17:24.052147 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2327 12:17:24.052248 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2328 12:17:24.052329 Setting prompt string to ['Linux version [0-9]']
2329 12:17:24.052404 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2330 12:17:24.052516 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2332 12:21:50.052554 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2334 12:21:50.052890 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2336 12:21:50.053150 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2339 12:21:50.053664 end: 2 depthcharge-action (duration 00:05:00) [common]
2341 12:21:50.054106 Cleaning after the job
2342 12:21:50.054248 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948133/tftp-deploy-dqzfw46q/ramdisk
2343 12:21:50.054977 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948133/tftp-deploy-dqzfw46q/kernel
2344 12:21:50.055904 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948133/tftp-deploy-dqzfw46q/nfsrootfs
2345 12:21:50.103154 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948133/tftp-deploy-dqzfw46q/modules
2346 12:21:50.103469 start: 5.1 power-off (timeout 00:00:30) [common]
2347 12:21:50.103632 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2348 12:21:50.123317 >> Command sent successfully.
2349 12:21:50.125244 Returned 0 in 0 seconds
2350 12:21:50.225865 end: 5.1 power-off (duration 00:00:00) [common]
2352 12:21:50.226213 start: 5.2 read-feedback (timeout 00:10:00) [common]
2353 12:21:50.226457 Listened to connection for namespace 'common' for up to 1s
2354 12:21:51.229792 Finalising connection for namespace 'common'
2355 12:21:51.229967 Disconnecting from shell: Finalise
2356 12:21:51.330668 end: 5.2 read-feedback (duration 00:00:01) [common]
2357 12:21:51.330813 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8948133
2358 12:21:51.428245 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8948133
2359 12:21:51.428437 JobError: Your job cannot terminate cleanly.