Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:21:08.451842 lava-dispatcher, installed at version: 2022.11
2 12:21:08.452033 start: 0 validate
3 12:21:08.452160 Start time: 2023-01-31 12:21:08.452152+00:00 (UTC)
4 12:21:08.452280 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:21:08.452404 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230127.0%2Famd64%2Finitrd.cpio.gz exists
6 12:21:08.747383 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:21:08.748147 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:21:08.755269 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:21:08.755993 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230127.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:21:09.045198 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:21:09.046052 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:21:09.051526 validate duration: 0.60
14 12:21:09.051785 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:21:09.051892 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:21:09.051985 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:21:09.052087 Not decompressing ramdisk as can be used compressed.
18 12:21:09.052273 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230127.0/amd64/initrd.cpio.gz
19 12:21:09.052351 saving as /var/lib/lava/dispatcher/tmp/8948148/tftp-deploy-h6ydgl8z/ramdisk/initrd.cpio.gz
20 12:21:09.052417 total size: 5432098 (5MB)
21 12:21:09.055006 progress 0% (0MB)
22 12:21:09.057467 progress 5% (0MB)
23 12:21:09.059762 progress 10% (0MB)
24 12:21:09.061874 progress 15% (0MB)
25 12:21:09.064331 progress 20% (1MB)
26 12:21:09.067238 progress 25% (1MB)
27 12:21:09.068927 progress 30% (1MB)
28 12:21:09.071542 progress 35% (1MB)
29 12:21:09.073539 progress 40% (2MB)
30 12:21:09.076017 progress 45% (2MB)
31 12:21:09.078267 progress 50% (2MB)
32 12:21:09.080678 progress 55% (2MB)
33 12:21:09.082797 progress 60% (3MB)
34 12:21:09.085044 progress 65% (3MB)
35 12:21:09.087526 progress 70% (3MB)
36 12:21:09.089834 progress 75% (3MB)
37 12:21:09.091974 progress 80% (4MB)
38 12:21:09.094247 progress 85% (4MB)
39 12:21:09.096746 progress 90% (4MB)
40 12:21:09.099084 progress 95% (4MB)
41 12:21:09.101223 progress 100% (5MB)
42 12:21:09.101514 5MB downloaded in 0.05s (105.53MB/s)
43 12:21:09.101715 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:21:09.102021 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:21:09.102142 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:21:09.102257 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:21:09.102391 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:21:09.102461 saving as /var/lib/lava/dispatcher/tmp/8948148/tftp-deploy-h6ydgl8z/kernel/bzImage
50 12:21:09.102529 total size: 7569296 (7MB)
51 12:21:09.102632 No compression specified
52 12:21:09.104651 progress 0% (0MB)
53 12:21:09.107901 progress 5% (0MB)
54 12:21:09.111163 progress 10% (0MB)
55 12:21:09.114629 progress 15% (1MB)
56 12:21:09.117669 progress 20% (1MB)
57 12:21:09.120740 progress 25% (1MB)
58 12:21:09.124008 progress 30% (2MB)
59 12:21:09.127078 progress 35% (2MB)
60 12:21:09.130548 progress 40% (2MB)
61 12:21:09.133644 progress 45% (3MB)
62 12:21:09.136887 progress 50% (3MB)
63 12:21:09.140365 progress 55% (4MB)
64 12:21:09.143425 progress 60% (4MB)
65 12:21:09.146672 progress 65% (4MB)
66 12:21:09.149764 progress 70% (5MB)
67 12:21:09.153020 progress 75% (5MB)
68 12:21:09.156071 progress 80% (5MB)
69 12:21:09.159913 progress 85% (6MB)
70 12:21:09.162652 progress 90% (6MB)
71 12:21:09.165904 progress 95% (6MB)
72 12:21:09.168960 progress 100% (7MB)
73 12:21:09.169251 7MB downloaded in 0.07s (108.20MB/s)
74 12:21:09.169403 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:21:09.169647 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:21:09.169739 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:21:09.169828 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:21:09.169935 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230127.0/amd64/full.rootfs.tar.xz
80 12:21:09.170003 saving as /var/lib/lava/dispatcher/tmp/8948148/tftp-deploy-h6ydgl8z/nfsrootfs/full.rootfs.tar
81 12:21:09.170067 total size: 207177260 (197MB)
82 12:21:09.170128 Using unxz to decompress xz
83 12:21:09.174578 progress 0% (0MB)
84 12:21:09.726655 progress 5% (9MB)
85 12:21:10.263168 progress 10% (19MB)
86 12:21:10.854452 progress 15% (29MB)
87 12:21:11.225130 progress 20% (39MB)
88 12:21:11.573873 progress 25% (49MB)
89 12:21:12.156629 progress 30% (59MB)
90 12:21:12.694336 progress 35% (69MB)
91 12:21:13.283694 progress 40% (79MB)
92 12:21:13.830604 progress 45% (88MB)
93 12:21:14.401081 progress 50% (98MB)
94 12:21:15.020715 progress 55% (108MB)
95 12:21:15.697446 progress 60% (118MB)
96 12:21:15.846099 progress 65% (128MB)
97 12:21:15.993037 progress 70% (138MB)
98 12:21:16.091363 progress 75% (148MB)
99 12:21:16.163609 progress 80% (158MB)
100 12:21:16.229787 progress 85% (167MB)
101 12:21:16.330925 progress 90% (177MB)
102 12:21:16.594259 progress 95% (187MB)
103 12:21:17.178299 progress 100% (197MB)
104 12:21:17.183986 197MB downloaded in 8.01s (24.65MB/s)
105 12:21:17.184258 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:21:17.184518 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:21:17.184609 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:21:17.184698 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:21:17.184813 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:21:17.184880 saving as /var/lib/lava/dispatcher/tmp/8948148/tftp-deploy-h6ydgl8z/modules/modules.tar
112 12:21:17.184942 total size: 51860 (0MB)
113 12:21:17.185005 Using unxz to decompress xz
114 12:21:17.485914 progress 63% (0MB)
115 12:21:17.487964 progress 100% (0MB)
116 12:21:17.495789 0MB downloaded in 0.31s (0.16MB/s)
117 12:21:17.496018 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:21:17.496324 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:21:17.496434 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 12:21:17.496530 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 12:21:19.457176 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8948148/extract-nfsrootfs-cnk9dp79
123 12:21:19.457383 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:21:19.457492 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 12:21:19.457627 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_
126 12:21:19.457726 makedir: /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin
127 12:21:19.457811 makedir: /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/tests
128 12:21:19.457893 makedir: /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/results
129 12:21:19.457988 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-add-keys
130 12:21:19.458117 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-add-sources
131 12:21:19.458231 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-background-process-start
132 12:21:19.458341 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-background-process-stop
133 12:21:19.458450 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-common-functions
134 12:21:19.458585 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-echo-ipv4
135 12:21:19.458705 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-install-packages
136 12:21:19.458814 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-installed-packages
137 12:21:19.458920 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-os-build
138 12:21:19.459026 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-probe-channel
139 12:21:19.459132 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-probe-ip
140 12:21:19.459237 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-target-ip
141 12:21:19.459342 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-target-mac
142 12:21:19.459448 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-target-storage
143 12:21:19.459556 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-test-case
144 12:21:19.459663 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-test-event
145 12:21:19.459769 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-test-feedback
146 12:21:19.459874 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-test-raise
147 12:21:19.459979 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-test-reference
148 12:21:19.460084 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-test-runner
149 12:21:19.460217 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-test-set
150 12:21:19.460321 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-test-shell
151 12:21:19.460427 Updating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-add-keys (debian)
152 12:21:19.460536 Updating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-add-sources (debian)
153 12:21:19.460644 Updating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-install-packages (debian)
154 12:21:19.460751 Updating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-installed-packages (debian)
155 12:21:19.460857 Updating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/bin/lava-os-build (debian)
156 12:21:19.460950 Creating /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/environment
157 12:21:19.461033 LAVA metadata
158 12:21:19.461097 - LAVA_JOB_ID=8948148
159 12:21:19.461158 - LAVA_DISPATCHER_IP=192.168.201.1
160 12:21:19.461253 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
161 12:21:19.461317 skipped lava-vland-overlay
162 12:21:19.461391 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 12:21:19.461470 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
164 12:21:19.461530 skipped lava-multinode-overlay
165 12:21:19.461602 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 12:21:19.461680 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
167 12:21:19.461749 Loading test definitions
168 12:21:19.461837 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
169 12:21:19.461905 Using /lava-8948148 at stage 0
170 12:21:19.462125 uuid=8948148_1.5.2.3.1 testdef=None
171 12:21:19.462211 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 12:21:19.462295 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
173 12:21:19.462760 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 12:21:19.462991 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
176 12:21:19.463463 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 12:21:19.463698 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
179 12:21:19.464149 runner path: /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/0/tests/0_timesync-off test_uuid 8948148_1.5.2.3.1
180 12:21:19.464326 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 12:21:19.464586 start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
183 12:21:19.464659 Using /lava-8948148 at stage 0
184 12:21:19.464754 Fetching tests from https://github.com/kernelci/test-definitions.git
185 12:21:19.464833 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/0/tests/1_kselftest-alsa'
186 12:21:26.617146 Running '/usr/bin/git checkout kernelci.org
187 12:21:26.749828 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
188 12:21:26.750509 uuid=8948148_1.5.2.3.5 testdef=None
189 12:21:26.750739 end: 1.5.2.3.5 git-repo-action (duration 00:00:07) [common]
191 12:21:26.751010 start: 1.5.2.3.6 test-overlay (timeout 00:09:42) [common]
192 12:21:26.751715 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 12:21:26.751952 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:42) [common]
195 12:21:26.752830 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 12:21:26.753075 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
198 12:21:26.753982 runner path: /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/0/tests/1_kselftest-alsa test_uuid 8948148_1.5.2.3.5
199 12:21:26.754072 BOARD='asus-C436FA-Flip-hatch'
200 12:21:26.754138 BRANCH='cip'
201 12:21:26.754198 SKIPFILE='skipfile-lkft.yaml'
202 12:21:26.754258 SKIP_INSTALL='True'
203 12:21:26.754314 TESTPROG_URL='None'
204 12:21:26.754370 TST_CASENAME=''
205 12:21:26.754426 TST_CMDFILES='alsa'
206 12:21:26.754594 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
208 12:21:26.754799 Creating lava-test-runner.conf files
209 12:21:26.754863 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8948148/lava-overlay-vadcrrf_/lava-8948148/0 for stage 0
210 12:21:26.754946 - 0_timesync-off
211 12:21:26.755013 - 1_kselftest-alsa
212 12:21:26.755104 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
213 12:21:26.755191 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
214 12:21:34.303387 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
215 12:21:34.303550 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
216 12:21:34.303653 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
217 12:21:34.303754 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
218 12:21:34.303847 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
219 12:21:34.405862 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
220 12:21:34.406215 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
221 12:21:34.406330 extracting modules file /var/lib/lava/dispatcher/tmp/8948148/tftp-deploy-h6ydgl8z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8948148/extract-nfsrootfs-cnk9dp79
222 12:21:34.410391 extracting modules file /var/lib/lava/dispatcher/tmp/8948148/tftp-deploy-h6ydgl8z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8948148/extract-overlay-ramdisk-qd6fpc71/ramdisk
223 12:21:34.414102 end: 1.5.4 extract-modules (duration 00:00:00) [common]
224 12:21:34.414218 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
225 12:21:34.414305 [common] Applying overlay to NFS
226 12:21:34.414382 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8948148/compress-overlay-45oiifcd/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8948148/extract-nfsrootfs-cnk9dp79
227 12:21:34.865098 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
228 12:21:34.865268 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
229 12:21:34.865370 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
230 12:21:34.865464 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
231 12:21:34.865545 Building ramdisk /var/lib/lava/dispatcher/tmp/8948148/extract-overlay-ramdisk-qd6fpc71/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8948148/extract-overlay-ramdisk-qd6fpc71/ramdisk
232 12:21:34.898851 >> 24548 blocks
233 12:21:35.380142 rename /var/lib/lava/dispatcher/tmp/8948148/extract-overlay-ramdisk-qd6fpc71/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8948148/tftp-deploy-h6ydgl8z/ramdisk/ramdisk.cpio.gz
234 12:21:35.380565 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
235 12:21:35.380695 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
236 12:21:35.380801 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
237 12:21:35.380894 No mkimage arch provided, not using FIT.
238 12:21:35.380987 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
239 12:21:35.381072 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
240 12:21:35.381172 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
241 12:21:35.381269 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
242 12:21:35.381353 No LXC device requested
243 12:21:35.381439 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
244 12:21:35.381531 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
245 12:21:35.381659 end: 1.7 deploy-device-env (duration 00:00:00) [common]
246 12:21:35.381758 Checking files for TFTP limit of 4294967296 bytes.
247 12:21:35.382166 end: 1 tftp-deploy (duration 00:00:26) [common]
248 12:21:35.382277 start: 2 depthcharge-action (timeout 00:05:00) [common]
249 12:21:35.382376 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
250 12:21:35.382523 substitutions:
251 12:21:35.382630 - {DTB}: None
252 12:21:35.382697 - {INITRD}: 8948148/tftp-deploy-h6ydgl8z/ramdisk/ramdisk.cpio.gz
253 12:21:35.382760 - {KERNEL}: 8948148/tftp-deploy-h6ydgl8z/kernel/bzImage
254 12:21:35.382822 - {LAVA_MAC}: None
255 12:21:35.382882 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8948148/extract-nfsrootfs-cnk9dp79
256 12:21:35.382943 - {NFS_SERVER_IP}: 192.168.201.1
257 12:21:35.383008 - {PRESEED_CONFIG}: None
258 12:21:35.383068 - {PRESEED_LOCAL}: None
259 12:21:35.383126 - {RAMDISK}: 8948148/tftp-deploy-h6ydgl8z/ramdisk/ramdisk.cpio.gz
260 12:21:35.383184 - {ROOT_PART}: None
261 12:21:35.383241 - {ROOT}: None
262 12:21:35.383297 - {SERVER_IP}: 192.168.201.1
263 12:21:35.383354 - {TEE}: None
264 12:21:35.383410 Parsed boot commands:
265 12:21:35.383491 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
266 12:21:35.383750 Parsed boot commands: tftpboot 192.168.201.1 8948148/tftp-deploy-h6ydgl8z/kernel/bzImage 8948148/tftp-deploy-h6ydgl8z/kernel/cmdline 8948148/tftp-deploy-h6ydgl8z/ramdisk/ramdisk.cpio.gz
267 12:21:35.383876 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
268 12:21:35.383981 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
269 12:21:35.384086 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
270 12:21:35.384181 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
271 12:21:35.384254 Not connected, no need to disconnect.
272 12:21:35.384337 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
273 12:21:35.384423 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
274 12:21:35.384546 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
275 12:21:35.387660 Setting prompt string to ['lava-test: # ']
276 12:21:35.387989 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
277 12:21:35.388103 end: 2.2.1 reset-connection (duration 00:00:00) [common]
278 12:21:35.388208 start: 2.2.2 reset-device (timeout 00:05:00) [common]
279 12:21:35.388308 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
280 12:21:35.388490 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
281 12:21:35.408870 >> Command sent successfully.
282 12:21:35.411014 Returned 0 in 0 seconds
283 12:21:35.511825 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
285 12:21:35.512161 end: 2.2.2 reset-device (duration 00:00:00) [common]
286 12:21:35.512267 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
287 12:21:35.512358 Setting prompt string to 'Starting depthcharge on Helios...'
288 12:21:35.512424 Changing prompt to 'Starting depthcharge on Helios...'
289 12:21:35.512494 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
290 12:21:35.512774 [Enter `^Ec?' for help]
291 12:21:41.885609
292 12:21:41.886208
293 12:21:41.895265 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 12:21:41.898635 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 12:21:41.904827 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 12:21:41.908028 CPU: AES supported, TXT NOT supported, VT supported
297 12:21:41.914721 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 12:21:41.917954 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 12:21:41.925276 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 12:21:41.928294 VBOOT: Loading verstage.
301 12:21:41.931061 FMAP: Found "FLASH" version 1.1 at 0xc04000.
302 12:21:41.937942 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 12:21:41.944585 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 12:21:41.944745 CBFS @ c08000 size 3f8000
305 12:21:41.950752 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 12:21:41.954119 CBFS: Locating 'fallback/verstage'
307 12:21:41.957524 CBFS: Found @ offset 10fb80 size 1072c
308 12:21:41.961764
309 12:21:41.961906
310 12:21:41.971444 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 12:21:41.986096 Probing TPM: . done!
312 12:21:41.989711 TPM ready after 0 ms
313 12:21:41.993015 Connected to device vid:did:rid of 1ae0:0028:00
314 12:21:42.002781 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
315 12:21:42.006251 Initialized TPM device CR50 revision 0
316 12:21:42.048718 tlcl_send_startup: Startup return code is 0
317 12:21:42.049228 TPM: setup succeeded
318 12:21:42.061659 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 12:21:42.065478 Chrome EC: UHEPI supported
320 12:21:42.068731 Phase 1
321 12:21:42.071792 FMAP: area GBB found @ c05000 (12288 bytes)
322 12:21:42.078341 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
323 12:21:42.082000 Phase 2
324 12:21:42.082439 Phase 3
325 12:21:42.084792 FMAP: area GBB found @ c05000 (12288 bytes)
326 12:21:42.091671 VB2:vb2_report_dev_firmware() This is developer signed firmware
327 12:21:42.098337 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
328 12:21:42.101695 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
329 12:21:42.108134 VB2:vb2_verify_keyblock() Checking keyblock signature...
330 12:21:42.123664 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
331 12:21:42.127123 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
332 12:21:42.133656 VB2:vb2_verify_fw_preamble() Verifying preamble.
333 12:21:42.138282 Phase 4
334 12:21:42.141326 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
335 12:21:42.147925 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
336 12:21:42.150895
337 12:21:42.327860 VB2:vb2_rsa_verify_digest() Digest check failed!
338 12:21:42.331005 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
339 12:21:42.334100
340 12:21:42.334575 Saving nvdata
341 12:21:42.337848 Reboot requested (10020007)
342 12:21:42.340921 board_reset() called!
343 12:21:42.341513 full_reset() called!
344 12:21:46.852319
345 12:21:46.852476
346 12:21:46.861647 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
347 12:21:46.864917 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
348 12:21:46.871833 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
349 12:21:46.874827 CPU: AES supported, TXT NOT supported, VT supported
350 12:21:46.881671 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
351 12:21:46.888215 PCH: device id 0284 (rev 00) is Cometlake-U Premium
352 12:21:46.891302 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
353 12:21:46.894531 VBOOT: Loading verstage.
354 12:21:46.901053 FMAP: Found "FLASH" version 1.1 at 0xc04000.
355 12:21:46.904480 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
356 12:21:46.911241 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
357 12:21:46.914496 CBFS @ c08000 size 3f8000
358 12:21:46.917428 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
359 12:21:46.920776 CBFS: Locating 'fallback/verstage'
360 12:21:46.927174 CBFS: Found @ offset 10fb80 size 1072c
361 12:21:46.927257
362 12:21:46.927324
363 12:21:46.936869 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
364 12:21:46.953010 Probing TPM: . done!
365 12:21:46.956474 TPM ready after 0 ms
366 12:21:46.960055 Connected to device vid:did:rid of 1ae0:0028:00
367 12:21:46.970055 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
368 12:21:46.973584 Initialized TPM device CR50 revision 0
369 12:21:47.016011 tlcl_send_startup: Startup return code is 0
370 12:21:47.016098 TPM: setup succeeded
371 12:21:47.028358 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
372 12:21:47.032297 Chrome EC: UHEPI supported
373 12:21:47.035648 Phase 1
374 12:21:47.039092 FMAP: area GBB found @ c05000 (12288 bytes)
375 12:21:47.045262 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
376 12:21:47.052107 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
377 12:21:47.055444 Recovery requested (1009000e)
378 12:21:47.061167 Saving nvdata
379 12:21:47.067224 tlcl_extend: response is 0
380 12:21:47.075928 tlcl_extend: response is 0
381 12:21:47.082786 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
382 12:21:47.086166 CBFS @ c08000 size 3f8000
383 12:21:47.092928 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
384 12:21:47.096009 CBFS: Locating 'fallback/romstage'
385 12:21:47.099630 CBFS: Found @ offset 80 size 145fc
386 12:21:47.102454 Accumulated console time in verstage 98 ms
387 12:21:47.102559
388 12:21:47.102674
389 12:21:47.105812
390 12:21:47.115623 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
391 12:21:47.122152 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
392 12:21:47.125637 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
393 12:21:47.129139 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
394 12:21:47.135557 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
395 12:21:47.138645 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
396 12:21:47.141995 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
397 12:21:47.145075 TCO_STS: 0000 0000
398 12:21:47.148480 GEN_PMCON: e0015238 00000200
399 12:21:47.151714 GBLRST_CAUSE: 00000000 00000000
400 12:21:47.151800 prev_sleep_state 5
401 12:21:47.156018 Boot Count incremented to 45751
402 12:21:47.162672 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
403 12:21:47.165949 CBFS @ c08000 size 3f8000
404 12:21:47.172445 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
405 12:21:47.172532 CBFS: Locating 'fspm.bin'
406 12:21:47.178827 CBFS: Found @ offset 5ffc0 size 71000
407 12:21:47.181937 Chrome EC: UHEPI supported
408 12:21:47.188503 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
409 12:21:47.192760 Probing TPM: done!
410 12:21:47.199444 Connected to device vid:did:rid of 1ae0:0028:00
411 12:21:47.209352 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
412 12:21:47.215341 Initialized TPM device CR50 revision 0
413 12:21:47.223982 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 12:21:47.230618 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
415 12:21:47.233936
416 12:21:47.234019 MRC cache found, size 1948
417 12:21:47.237022 bootmode is set to: 2
418 12:21:47.240411 PRMRR disabled by config.
419 12:21:47.243721 SPD INDEX = 1
420 12:21:47.247274 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
421 12:21:47.250233 CBFS @ c08000 size 3f8000
422 12:21:47.256795 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
423 12:21:47.256878 CBFS: Locating 'spd.bin'
424 12:21:47.260137 CBFS: Found @ offset 5fb80 size 400
425 12:21:47.263522 SPD: module type is LPDDR3
426 12:21:47.266823 SPD: module part is
427 12:21:47.273476 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
428 12:21:47.277132 SPD: device width 4 bits, bus width 8 bits
429 12:21:47.280051 SPD: module size is 4096 MB (per channel)
430 12:21:47.283599 memory slot: 0 configuration done.
431 12:21:47.286778 memory slot: 2 configuration done.
432 12:21:47.338040 CBMEM:
433 12:21:47.341468 IMD: root @ 99fff000 254 entries.
434 12:21:47.344741 IMD: root @ 99ffec00 62 entries.
435 12:21:47.348252 External stage cache:
436 12:21:47.351632 IMD: root @ 9abff000 254 entries.
437 12:21:47.354861 IMD: root @ 9abfec00 62 entries.
438 12:21:47.361275 Chrome EC: clear events_b mask to 0x0000000020004000
439 12:21:47.374107 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
440 12:21:47.387166 tlcl_write: response is 0
441 12:21:47.396011 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 12:21:47.403187 MRC: TPM MRC hash updated successfully.
443 12:21:47.403272 2 DIMMs found
444 12:21:47.405967 SMM Memory Map
445 12:21:47.409334 SMRAM : 0x9a000000 0x1000000
446 12:21:47.412674 Subregion 0: 0x9a000000 0xa00000
447 12:21:47.415970 Subregion 1: 0x9aa00000 0x200000
448 12:21:47.419027 Subregion 2: 0x9ac00000 0x400000
449 12:21:47.422390 top_of_ram = 0x9a000000
450 12:21:47.425843 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
451 12:21:47.432527 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
452 12:21:47.435512 MTRR Range: Start=ff000000 End=0 (Size 1000000)
453 12:21:47.441996 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 12:21:47.445363 CBFS @ c08000 size 3f8000
455 12:21:47.452109 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 12:21:47.455105 CBFS: Locating 'fallback/postcar'
457 12:21:47.458459 CBFS: Found @ offset 107000 size 4b44
458 12:21:47.465025 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
459 12:21:47.474865 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
460 12:21:47.478260 Processing 180 relocs. Offset value of 0x97c0c000
461 12:21:47.486302 Accumulated console time in romstage 286 ms
462 12:21:47.486386
463 12:21:47.486452
464 12:21:47.496348 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
465 12:21:47.502589 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 12:21:47.506374 CBFS @ c08000 size 3f8000
467 12:21:47.512947 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 12:21:47.515807 CBFS: Locating 'fallback/ramstage'
469 12:21:47.519603 CBFS: Found @ offset 43380 size 1b9e8
470 12:21:47.525857 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
471 12:21:47.558058 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
472 12:21:47.564447 Processing 3976 relocs. Offset value of 0x98db0000
473 12:21:47.567711 Accumulated console time in postcar 52 ms
474 12:21:47.567795
475 12:21:47.567863
476 12:21:47.577655 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
477 12:21:47.584377 FMAP: area RO_VPD found @ c00000 (16384 bytes)
478 12:21:47.587898 WARNING: RO_VPD is uninitialized or empty.
479 12:21:47.590875 FMAP: area RW_VPD found @ af8000 (8192 bytes)
480 12:21:47.597330 FMAP: area RW_VPD found @ af8000 (8192 bytes)
481 12:21:47.597415 Normal boot.
482 12:21:47.604173 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
483 12:21:47.607279 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
484 12:21:47.610711 CBFS @ c08000 size 3f8000
485 12:21:47.617024 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
486 12:21:47.620761 CBFS: Locating 'cpu_microcode_blob.bin'
487 12:21:47.623575 CBFS: Found @ offset 14700 size 2ec00
488 12:21:47.630046 microcode: sig=0x806ec pf=0x4 revision=0xc9
489 12:21:47.630130 Skip microcode update
490 12:21:47.636761 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
491 12:21:47.640166 CBFS @ c08000 size 3f8000
492 12:21:47.643735 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
493 12:21:47.646569 CBFS: Locating 'fsps.bin'
494 12:21:47.650028 CBFS: Found @ offset d1fc0 size 35000
495 12:21:47.676330 Detected 4 core, 8 thread CPU.
496 12:21:47.679507 Setting up SMI for CPU
497 12:21:47.683001 IED base = 0x9ac00000
498 12:21:47.683085 IED size = 0x00400000
499 12:21:47.686370
500 12:21:47.686454 Will perform SMM setup.
501 12:21:47.692781 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
502 12:21:47.699358 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
503 12:21:47.702843 Processing 16 relocs. Offset value of 0x00030000
504 12:21:47.705892
505 12:21:47.705978 Attempting to start 7 APs
506 12:21:47.712153 Waiting for 10ms after sending INIT.
507 12:21:47.726134 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
508 12:21:47.726219 done.
509 12:21:47.729213 AP: slot 4 apic_id 6.
510 12:21:47.732496 AP: slot 5 apic_id 7.
511 12:21:47.732580 AP: slot 7 apic_id 4.
512 12:21:47.735781 AP: slot 6 apic_id 5.
513 12:21:47.739365 Waiting for 2nd SIPI to complete...done.
514 12:21:47.742271 AP: slot 1 apic_id 3.
515 12:21:47.745650 AP: slot 3 apic_id 2.
516 12:21:47.752402 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 12:21:47.758969 Processing 13 relocs. Offset value of 0x00038000
518 12:21:47.765933 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 12:21:47.769092 Installing SMM handler to 0x9a000000
520 12:21:47.776073 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 12:21:47.781756 Processing 658 relocs. Offset value of 0x9a010000
522 12:21:47.788422 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 12:21:47.791839 Processing 13 relocs. Offset value of 0x9a008000
524 12:21:47.798711 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 12:21:47.805016 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 12:21:47.811668 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 12:21:47.815190 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 12:21:47.821744 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 12:21:47.828359 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 12:21:47.834742 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 12:21:47.841334 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 12:21:47.844897 Clearing SMI status registers
533 12:21:47.844981 SMI_STS: PM1
534 12:21:47.847880 PM1_STS: PWRBTN
535 12:21:47.847963 TCO_STS: SECOND_TO
536 12:21:47.851233 New SMBASE 0x9a000000
537 12:21:47.854157 In relocation handler: CPU 0
538 12:21:47.857664 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 12:21:47.864302 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 12:21:47.864387 Relocation complete.
541 12:21:47.867632 New SMBASE 0x99fff800
542 12:21:47.871047 In relocation handler: CPU 2
543 12:21:47.874381 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
544 12:21:47.880754 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 12:21:47.880880 Relocation complete.
546 12:21:47.884247 New SMBASE 0x99fff400
547 12:21:47.887068 In relocation handler: CPU 3
548 12:21:47.890461 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
549 12:21:47.897144 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 12:21:47.897228 Relocation complete.
551 12:21:47.900610 New SMBASE 0x99fffc00
552 12:21:47.903430 In relocation handler: CPU 1
553 12:21:47.906726 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
554 12:21:47.913894 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 12:21:47.913978 Relocation complete.
556 12:21:47.916719 New SMBASE 0x99fff000
557 12:21:47.919809 In relocation handler: CPU 4
558 12:21:47.923175 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
559 12:21:47.929624 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 12:21:47.929708 Relocation complete.
561 12:21:47.933102 New SMBASE 0x99ffec00
562 12:21:47.936542 In relocation handler: CPU 5
563 12:21:47.939911 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
564 12:21:47.946487 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 12:21:47.946621 Relocation complete.
566 12:21:47.949427 New SMBASE 0x99ffe800
567 12:21:47.952497 In relocation handler: CPU 6
568 12:21:47.956038 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
569 12:21:47.962675 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 12:21:47.962759 Relocation complete.
571 12:21:47.965907 New SMBASE 0x99ffe400
572 12:21:47.968911 In relocation handler: CPU 7
573 12:21:47.972379 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
574 12:21:47.979110 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 12:21:47.979195 Relocation complete.
576 12:21:47.982391 Initializing CPU #0
577 12:21:47.985291 CPU: vendor Intel device 806ec
578 12:21:47.988963 CPU: family 06, model 8e, stepping 0c
579 12:21:47.992014 Clearing out pending MCEs
580 12:21:47.995327 Setting up local APIC...
581 12:21:47.995411 apic_id: 0x00 done.
582 12:21:47.998376 Turbo is available but hidden
583 12:21:48.001710 Turbo is available and visible
584 12:21:48.005514 VMX status: enabled
585 12:21:48.008294 IA32_FEATURE_CONTROL status: locked
586 12:21:48.011694 Skip microcode update
587 12:21:48.011779 CPU #0 initialized
588 12:21:48.015273 Initializing CPU #5
589 12:21:48.015358 Initializing CPU #4
590 12:21:48.018223 CPU: vendor Intel device 806ec
591 12:21:48.024770 CPU: family 06, model 8e, stepping 0c
592 12:21:48.028210 CPU: vendor Intel device 806ec
593 12:21:48.031175 CPU: family 06, model 8e, stepping 0c
594 12:21:48.031261 Clearing out pending MCEs
595 12:21:48.034463
596 12:21:48.034572 Clearing out pending MCEs
597 12:21:48.037962 Setting up local APIC...
598 12:21:48.040941 Initializing CPU #1
599 12:21:48.041027 Initializing CPU #3
600 12:21:48.044094 CPU: vendor Intel device 806ec
601 12:21:48.047543 CPU: family 06, model 8e, stepping 0c
602 12:21:48.050999 CPU: vendor Intel device 806ec
603 12:21:48.057351 CPU: family 06, model 8e, stepping 0c
604 12:21:48.057437 Clearing out pending MCEs
605 12:21:48.060648 Clearing out pending MCEs
606 12:21:48.064158 Setting up local APIC...
607 12:21:48.067303 Initializing CPU #2
608 12:21:48.067389 Initializing CPU #6
609 12:21:48.070698 Initializing CPU #7
610 12:21:48.074031 CPU: vendor Intel device 806ec
611 12:21:48.077331 CPU: family 06, model 8e, stepping 0c
612 12:21:48.080388 CPU: vendor Intel device 806ec
613 12:21:48.083600 CPU: family 06, model 8e, stepping 0c
614 12:21:48.087013 Clearing out pending MCEs
615 12:21:48.090292 Clearing out pending MCEs
616 12:21:48.090377 Setting up local APIC...
617 12:21:48.093905 Setting up local APIC...
618 12:21:48.096812 Setting up local APIC...
619 12:21:48.100166 apic_id: 0x02 done.
620 12:21:48.100250 apic_id: 0x03 done.
621 12:21:48.103782 VMX status: enabled
622 12:21:48.103874 VMX status: enabled
623 12:21:48.110137 IA32_FEATURE_CONTROL status: locked
624 12:21:48.113496 IA32_FEATURE_CONTROL status: locked
625 12:21:48.113580 Skip microcode update
626 12:21:48.116920 Skip microcode update
627 12:21:48.120158 CPU #3 initialized
628 12:21:48.120241 CPU #1 initialized
629 12:21:48.123258 CPU: vendor Intel device 806ec
630 12:21:48.126615 CPU: family 06, model 8e, stepping 0c
631 12:21:48.130160 Clearing out pending MCEs
632 12:21:48.133142 apic_id: 0x05 done.
633 12:21:48.133225 apic_id: 0x04 done.
634 12:21:48.136410 VMX status: enabled
635 12:21:48.139874 VMX status: enabled
636 12:21:48.142821 IA32_FEATURE_CONTROL status: locked
637 12:21:48.146224 IA32_FEATURE_CONTROL status: locked
638 12:21:48.146337 Skip microcode update
639 12:21:48.149640 Skip microcode update
640 12:21:48.153141 Setting up local APIC...
641 12:21:48.156041 apic_id: 0x07 done.
642 12:21:48.156125 CPU #6 initialized
643 12:21:48.159446 CPU #7 initialized
644 12:21:48.159530 apic_id: 0x01 done.
645 12:21:48.162915 VMX status: enabled
646 12:21:48.165865 Setting up local APIC...
647 12:21:48.165948 VMX status: enabled
648 12:21:48.169597 IA32_FEATURE_CONTROL status: locked
649 12:21:48.172551
650 12:21:48.172636 apic_id: 0x06 done.
651 12:21:48.176079 Skip microcode update
652 12:21:48.176163 VMX status: enabled
653 12:21:48.179011 CPU #5 initialized
654 12:21:48.182563 IA32_FEATURE_CONTROL status: locked
655 12:21:48.185885 IA32_FEATURE_CONTROL status: locked
656 12:21:48.189267 Skip microcode update
657 12:21:48.192565 Skip microcode update
658 12:21:48.192649 CPU #4 initialized
659 12:21:48.195500 CPU #2 initialized
660 12:21:48.198929 bsp_do_flight_plan done after 457 msecs.
661 12:21:48.202423 CPU: frequency set to 4200 MHz
662 12:21:48.202508 Enabling SMIs.
663 12:21:48.205341 Locking SMM.
664 12:21:48.219844 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
665 12:21:48.223056 CBFS @ c08000 size 3f8000
666 12:21:48.230074 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
667 12:21:48.230159 CBFS: Locating 'vbt.bin'
668 12:21:48.236525 CBFS: Found @ offset 5f5c0 size 499
669 12:21:48.239489 Found a VBT of 4608 bytes after decompression
670 12:21:48.423423 Display FSP Version Info HOB
671 12:21:48.426688 Reference Code - CPU = 9.0.1e.30
672 12:21:48.430144 uCode Version = 0.0.0.ca
673 12:21:48.433518 TXT ACM version = ff.ff.ff.ffff
674 12:21:48.436506 Display FSP Version Info HOB
675 12:21:48.439708 Reference Code - ME = 9.0.1e.30
676 12:21:48.442900 MEBx version = 0.0.0.0
677 12:21:48.446255 ME Firmware Version = Consumer SKU
678 12:21:48.449777 Display FSP Version Info HOB
679 12:21:48.452966 Reference Code - CML PCH = 9.0.1e.30
680 12:21:48.455970 PCH-CRID Status = Disabled
681 12:21:48.459219 PCH-CRID Original Value = ff.ff.ff.ffff
682 12:21:48.462796 PCH-CRID New Value = ff.ff.ff.ffff
683 12:21:48.465918 OPROM - RST - RAID = ff.ff.ff.ffff
684 12:21:48.469410 ChipsetInit Base Version = ff.ff.ff.ffff
685 12:21:48.475423 ChipsetInit Oem Version = ff.ff.ff.ffff
686 12:21:48.475506 Display FSP Version Info HOB
687 12:21:48.482254 Reference Code - SA - System Agent = 9.0.1e.30
688 12:21:48.485449 Reference Code - MRC = 0.7.1.6c
689 12:21:48.488871 SA - PCIe Version = 9.0.1e.30
690 12:21:48.492077 SA-CRID Status = Disabled
691 12:21:48.495453 SA-CRID Original Value = 0.0.0.c
692 12:21:48.495551 SA-CRID New Value = 0.0.0.c
693 12:21:48.498498 OPROM - VBIOS = ff.ff.ff.ffff
694 12:21:48.502323 RTC Init
695 12:21:48.505629 Set power on after power failure.
696 12:21:48.505712 Disabling Deep S3
697 12:21:48.509131 Disabling Deep S3
698 12:21:48.512065 Disabling Deep S4
699 12:21:48.512148 Disabling Deep S4
700 12:21:48.515420 Disabling Deep S5
701 12:21:48.515502 Disabling Deep S5
702 12:21:48.521641 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
703 12:21:48.525438 Enumerating buses...
704 12:21:48.528842 Show all devs... Before device enumeration.
705 12:21:48.531673 Root Device: enabled 1
706 12:21:48.535073 CPU_CLUSTER: 0: enabled 1
707 12:21:48.535157 DOMAIN: 0000: enabled 1
708 12:21:48.538064 APIC: 00: enabled 1
709 12:21:48.541199 PCI: 00:00.0: enabled 1
710 12:21:48.541283 PCI: 00:02.0: enabled 1
711 12:21:48.544990
712 12:21:48.545074 PCI: 00:04.0: enabled 0
713 12:21:48.548008 PCI: 00:05.0: enabled 0
714 12:21:48.551038 PCI: 00:12.0: enabled 1
715 12:21:48.551121 PCI: 00:12.5: enabled 0
716 12:21:48.554305 PCI: 00:12.6: enabled 0
717 12:21:48.557905 PCI: 00:14.0: enabled 1
718 12:21:48.561210 PCI: 00:14.1: enabled 0
719 12:21:48.561293 PCI: 00:14.3: enabled 1
720 12:21:48.564195 PCI: 00:14.5: enabled 0
721 12:21:48.567501 PCI: 00:15.0: enabled 1
722 12:21:48.570618 PCI: 00:15.1: enabled 1
723 12:21:48.570701 PCI: 00:15.2: enabled 0
724 12:21:48.573999 PCI: 00:15.3: enabled 0
725 12:21:48.577246 PCI: 00:16.0: enabled 1
726 12:21:48.580623 PCI: 00:16.1: enabled 0
727 12:21:48.580706 PCI: 00:16.2: enabled 0
728 12:21:48.584108 PCI: 00:16.3: enabled 0
729 12:21:48.587134 PCI: 00:16.4: enabled 0
730 12:21:48.590231 PCI: 00:16.5: enabled 0
731 12:21:48.590315 PCI: 00:17.0: enabled 1
732 12:21:48.593653 PCI: 00:19.0: enabled 1
733 12:21:48.596996 PCI: 00:19.1: enabled 0
734 12:21:48.600062 PCI: 00:19.2: enabled 0
735 12:21:48.600145 PCI: 00:1a.0: enabled 0
736 12:21:48.603340 PCI: 00:1c.0: enabled 0
737 12:21:48.606797 PCI: 00:1c.1: enabled 0
738 12:21:48.610307 PCI: 00:1c.2: enabled 0
739 12:21:48.610392 PCI: 00:1c.3: enabled 0
740 12:21:48.613229 PCI: 00:1c.4: enabled 0
741 12:21:48.616474 PCI: 00:1c.5: enabled 0
742 12:21:48.619794 PCI: 00:1c.6: enabled 0
743 12:21:48.619879 PCI: 00:1c.7: enabled 0
744 12:21:48.622934 PCI: 00:1d.0: enabled 1
745 12:21:48.626818 PCI: 00:1d.1: enabled 0
746 12:21:48.629376 PCI: 00:1d.2: enabled 0
747 12:21:48.629460 PCI: 00:1d.3: enabled 0
748 12:21:48.632695 PCI: 00:1d.4: enabled 0
749 12:21:48.635821 PCI: 00:1d.5: enabled 1
750 12:21:48.639353 PCI: 00:1e.0: enabled 1
751 12:21:48.639444 PCI: 00:1e.1: enabled 0
752 12:21:48.642543 PCI: 00:1e.2: enabled 1
753 12:21:48.645924 PCI: 00:1e.3: enabled 1
754 12:21:48.649134 PCI: 00:1f.0: enabled 1
755 12:21:48.649219 PCI: 00:1f.1: enabled 1
756 12:21:48.652246 PCI: 00:1f.2: enabled 1
757 12:21:48.655426 PCI: 00:1f.3: enabled 1
758 12:21:48.658795 PCI: 00:1f.4: enabled 1
759 12:21:48.658881 PCI: 00:1f.5: enabled 1
760 12:21:48.661812 PCI: 00:1f.6: enabled 0
761 12:21:48.665355 USB0 port 0: enabled 1
762 12:21:48.665440 I2C: 00:15: enabled 1
763 12:21:48.668867 I2C: 00:5d: enabled 1
764 12:21:48.671801 GENERIC: 0.0: enabled 1
765 12:21:48.675128 I2C: 00:1a: enabled 1
766 12:21:48.675214 I2C: 00:38: enabled 1
767 12:21:48.678127 I2C: 00:39: enabled 1
768 12:21:48.681682 I2C: 00:3a: enabled 1
769 12:21:48.681768 I2C: 00:3b: enabled 1
770 12:21:48.684656 PCI: 00:00.0: enabled 1
771 12:21:48.688319 SPI: 00: enabled 1
772 12:21:48.688404 SPI: 01: enabled 1
773 12:21:48.691619 PNP: 0c09.0: enabled 1
774 12:21:48.694873 USB2 port 0: enabled 1
775 12:21:48.694958 USB2 port 1: enabled 1
776 12:21:48.697786 USB2 port 2: enabled 0
777 12:21:48.701012 USB2 port 3: enabled 0
778 12:21:48.704498 USB2 port 5: enabled 0
779 12:21:48.704583 USB2 port 6: enabled 1
780 12:21:48.707802 USB2 port 9: enabled 1
781 12:21:48.710798 USB3 port 0: enabled 1
782 12:21:48.710883 USB3 port 1: enabled 1
783 12:21:48.714156 USB3 port 2: enabled 1
784 12:21:48.717599 USB3 port 3: enabled 1
785 12:21:48.720915 USB3 port 4: enabled 0
786 12:21:48.721000 APIC: 03: enabled 1
787 12:21:48.723954 APIC: 01: enabled 1
788 12:21:48.724040 APIC: 02: enabled 1
789 12:21:48.727347 APIC: 06: enabled 1
790 12:21:48.730430 APIC: 07: enabled 1
791 12:21:48.730519 APIC: 05: enabled 1
792 12:21:48.733716 APIC: 04: enabled 1
793 12:21:48.737281 Compare with tree...
794 12:21:48.737366 Root Device: enabled 1
795 12:21:48.740358 CPU_CLUSTER: 0: enabled 1
796 12:21:48.743576 APIC: 00: enabled 1
797 12:21:48.746646 APIC: 03: enabled 1
798 12:21:48.746731 APIC: 01: enabled 1
799 12:21:48.750061 APIC: 02: enabled 1
800 12:21:48.753570 APIC: 06: enabled 1
801 12:21:48.753655 APIC: 07: enabled 1
802 12:21:48.756650 APIC: 05: enabled 1
803 12:21:48.759981 APIC: 04: enabled 1
804 12:21:48.760066 DOMAIN: 0000: enabled 1
805 12:21:48.763589 PCI: 00:00.0: enabled 1
806 12:21:48.766464 PCI: 00:02.0: enabled 1
807 12:21:48.769565 PCI: 00:04.0: enabled 0
808 12:21:48.772952 PCI: 00:05.0: enabled 0
809 12:21:48.773038 PCI: 00:12.0: enabled 1
810 12:21:48.776457 PCI: 00:12.5: enabled 0
811 12:21:48.779403 PCI: 00:12.6: enabled 0
812 12:21:48.782457 PCI: 00:14.0: enabled 1
813 12:21:48.786042 USB0 port 0: enabled 1
814 12:21:48.789300 USB2 port 0: enabled 1
815 12:21:48.789414 USB2 port 1: enabled 1
816 12:21:48.792633 USB2 port 2: enabled 0
817 12:21:48.795891 USB2 port 3: enabled 0
818 12:21:48.798893 USB2 port 5: enabled 0
819 12:21:48.802230 USB2 port 6: enabled 1
820 12:21:48.805569 USB2 port 9: enabled 1
821 12:21:48.805655 USB3 port 0: enabled 1
822 12:21:48.809110 USB3 port 1: enabled 1
823 12:21:48.811949 USB3 port 2: enabled 1
824 12:21:48.815353 USB3 port 3: enabled 1
825 12:21:48.818865 USB3 port 4: enabled 0
826 12:21:48.821687 PCI: 00:14.1: enabled 0
827 12:21:48.821778 PCI: 00:14.3: enabled 1
828 12:21:48.825128 PCI: 00:14.5: enabled 0
829 12:21:48.828439 PCI: 00:15.0: enabled 1
830 12:21:48.831762 I2C: 00:15: enabled 1
831 12:21:48.834881 PCI: 00:15.1: enabled 1
832 12:21:48.834966 I2C: 00:5d: enabled 1
833 12:21:48.838253 GENERIC: 0.0: enabled 1
834 12:21:48.841260 PCI: 00:15.2: enabled 0
835 12:21:48.844694 PCI: 00:15.3: enabled 0
836 12:21:48.847870 PCI: 00:16.0: enabled 1
837 12:21:48.847955 PCI: 00:16.1: enabled 0
838 12:21:48.851226 PCI: 00:16.2: enabled 0
839 12:21:48.854327 PCI: 00:16.3: enabled 0
840 12:21:48.857678 PCI: 00:16.4: enabled 0
841 12:21:48.861004 PCI: 00:16.5: enabled 0
842 12:21:48.861089 PCI: 00:17.0: enabled 1
843 12:21:48.864422 PCI: 00:19.0: enabled 1
844 12:21:48.867256 I2C: 00:1a: enabled 1
845 12:21:48.870824 I2C: 00:38: enabled 1
846 12:21:48.873970 I2C: 00:39: enabled 1
847 12:21:48.874055 I2C: 00:3a: enabled 1
848 12:21:48.877242 I2C: 00:3b: enabled 1
849 12:21:48.880396 PCI: 00:19.1: enabled 0
850 12:21:48.883850 PCI: 00:19.2: enabled 0
851 12:21:48.883935 PCI: 00:1a.0: enabled 0
852 12:21:48.886783
853 12:21:48.886868 PCI: 00:1c.0: enabled 0
854 12:21:48.890269 PCI: 00:1c.1: enabled 0
855 12:21:48.893527 PCI: 00:1c.2: enabled 0
856 12:21:48.896782 PCI: 00:1c.3: enabled 0
857 12:21:48.899923 PCI: 00:1c.4: enabled 0
858 12:21:48.900012 PCI: 00:1c.5: enabled 0
859 12:21:48.903182 PCI: 00:1c.6: enabled 0
860 12:21:48.906759 PCI: 00:1c.7: enabled 0
861 12:21:48.909796 PCI: 00:1d.0: enabled 1
862 12:21:48.913159 PCI: 00:1d.1: enabled 0
863 12:21:48.913243 PCI: 00:1d.2: enabled 0
864 12:21:48.916595 PCI: 00:1d.3: enabled 0
865 12:21:48.919619 PCI: 00:1d.4: enabled 0
866 12:21:48.922543 PCI: 00:1d.5: enabled 1
867 12:21:48.925903 PCI: 00:00.0: enabled 1
868 12:21:48.925986 PCI: 00:1e.0: enabled 1
869 12:21:48.929288 PCI: 00:1e.1: enabled 0
870 12:21:48.932570 PCI: 00:1e.2: enabled 1
871 12:21:48.935777 SPI: 00: enabled 1
872 12:21:48.939175 PCI: 00:1e.3: enabled 1
873 12:21:48.939260 SPI: 01: enabled 1
874 12:21:48.942220 PCI: 00:1f.0: enabled 1
875 12:21:48.945631 PNP: 0c09.0: enabled 1
876 12:21:48.949007 PCI: 00:1f.1: enabled 1
877 12:21:48.949090 PCI: 00:1f.2: enabled 1
878 12:21:48.952375 PCI: 00:1f.3: enabled 1
879 12:21:48.955685 PCI: 00:1f.4: enabled 1
880 12:21:48.958816 PCI: 00:1f.5: enabled 1
881 12:21:48.962012 PCI: 00:1f.6: enabled 0
882 12:21:48.962095 Root Device scanning...
883 12:21:48.965415 scan_static_bus for Root Device
884 12:21:48.968469 CPU_CLUSTER: 0 enabled
885 12:21:48.972016 DOMAIN: 0000 enabled
886 12:21:48.974982 DOMAIN: 0000 scanning...
887 12:21:48.978427 PCI: pci_scan_bus for bus 00
888 12:21:48.981529 PCI: 00:00.0 [8086/0000] ops
889 12:21:48.984749 PCI: 00:00.0 [8086/9b61] enabled
890 12:21:48.987862 PCI: 00:02.0 [8086/0000] bus ops
891 12:21:48.991495 PCI: 00:02.0 [8086/9b41] enabled
892 12:21:48.994422 PCI: 00:04.0 [8086/1903] disabled
893 12:21:48.997811 PCI: 00:08.0 [8086/1911] enabled
894 12:21:49.001319 PCI: 00:12.0 [8086/02f9] enabled
895 12:21:49.004269 PCI: 00:14.0 [8086/0000] bus ops
896 12:21:49.008061 PCI: 00:14.0 [8086/02ed] enabled
897 12:21:49.010867 PCI: 00:14.2 [8086/02ef] enabled
898 12:21:49.013981 PCI: 00:14.3 [8086/02f0] enabled
899 12:21:49.017343 PCI: 00:15.0 [8086/0000] bus ops
900 12:21:49.020841 PCI: 00:15.0 [8086/02e8] enabled
901 12:21:49.024202 PCI: 00:15.1 [8086/0000] bus ops
902 12:21:49.027670 PCI: 00:15.1 [8086/02e9] enabled
903 12:21:49.030801 PCI: 00:16.0 [8086/0000] ops
904 12:21:49.033862 PCI: 00:16.0 [8086/02e0] enabled
905 12:21:49.037231 PCI: 00:17.0 [8086/0000] ops
906 12:21:49.040280 PCI: 00:17.0 [8086/02d3] enabled
907 12:21:49.043603 PCI: 00:19.0 [8086/0000] bus ops
908 12:21:49.046821 PCI: 00:19.0 [8086/02c5] enabled
909 12:21:49.050266 PCI: 00:1d.0 [8086/0000] bus ops
910 12:21:49.053249 PCI: 00:1d.0 [8086/02b0] enabled
911 12:21:49.056594 PCI: Static device PCI: 00:1d.5 not found, disabling it.
912 12:21:49.059999
913 12:21:49.060085 PCI: 00:1e.0 [8086/0000] ops
914 12:21:49.063398 PCI: 00:1e.0 [8086/02a8] enabled
915 12:21:49.066322 PCI: 00:1e.2 [8086/0000] bus ops
916 12:21:49.069501 PCI: 00:1e.2 [8086/02aa] enabled
917 12:21:49.072862 PCI: 00:1e.3 [8086/0000] bus ops
918 12:21:49.076109
919 12:21:49.076195 PCI: 00:1e.3 [8086/02ab] enabled
920 12:21:49.079421
921 12:21:49.082943 PCI: 00:1f.0 [8086/0000] bus ops
922 12:21:49.086142 PCI: 00:1f.0 [8086/0284] enabled
923 12:21:49.089046 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 12:21:49.095586 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 12:21:49.098728 PCI: 00:1f.3 [8086/0000] bus ops
926 12:21:49.102163 PCI: 00:1f.3 [8086/02c8] enabled
927 12:21:49.105507 PCI: 00:1f.4 [8086/0000] bus ops
928 12:21:49.108924 PCI: 00:1f.4 [8086/02a3] enabled
929 12:21:49.111689 PCI: 00:1f.5 [8086/0000] bus ops
930 12:21:49.114998 PCI: 00:1f.5 [8086/02a4] enabled
931 12:21:49.118362 PCI: Leftover static devices:
932 12:21:49.121761 PCI: 00:05.0
933 12:21:49.121847 PCI: 00:12.5
934 12:21:49.121914 PCI: 00:12.6
935 12:21:49.124644 PCI: 00:14.1
936 12:21:49.124729 PCI: 00:14.5
937 12:21:49.128345 PCI: 00:15.2
938 12:21:49.128430 PCI: 00:15.3
939 12:21:49.128497 PCI: 00:16.1
940 12:21:49.131221 PCI: 00:16.2
941 12:21:49.131306 PCI: 00:16.3
942 12:21:49.134757 PCI: 00:16.4
943 12:21:49.134842 PCI: 00:16.5
944 12:21:49.137918 PCI: 00:19.1
945 12:21:49.138003 PCI: 00:19.2
946 12:21:49.138081 PCI: 00:1a.0
947 12:21:49.141335 PCI: 00:1c.0
948 12:21:49.141420 PCI: 00:1c.1
949 12:21:49.144456 PCI: 00:1c.2
950 12:21:49.144542 PCI: 00:1c.3
951 12:21:49.144609 PCI: 00:1c.4
952 12:21:49.147657 PCI: 00:1c.5
953 12:21:49.147742 PCI: 00:1c.6
954 12:21:49.151239 PCI: 00:1c.7
955 12:21:49.151324 PCI: 00:1d.1
956 12:21:49.154355 PCI: 00:1d.2
957 12:21:49.154439 PCI: 00:1d.3
958 12:21:49.154507 PCI: 00:1d.4
959 12:21:49.157369 PCI: 00:1d.5
960 12:21:49.157454 PCI: 00:1e.1
961 12:21:49.160810 PCI: 00:1f.1
962 12:21:49.160896 PCI: 00:1f.2
963 12:21:49.160963 PCI: 00:1f.6
964 12:21:49.163834
965 12:21:49.163949 PCI: Check your devicetree.cb.
966 12:21:49.167369 PCI: 00:02.0 scanning...
967 12:21:49.170418 scan_generic_bus for PCI: 00:02.0
968 12:21:49.177015 scan_generic_bus for PCI: 00:02.0 done
969 12:21:49.180473 scan_bus: scanning of bus PCI: 00:02.0 took 10192 usecs
970 12:21:49.183421 PCI: 00:14.0 scanning...
971 12:21:49.186858 scan_static_bus for PCI: 00:14.0
972 12:21:49.190266 USB0 port 0 enabled
973 12:21:49.190351 USB0 port 0 scanning...
974 12:21:49.193532
975 12:21:49.196426 scan_static_bus for USB0 port 0
976 12:21:49.196511 USB2 port 0 enabled
977 12:21:49.200131 USB2 port 1 enabled
978 12:21:49.200217 USB2 port 2 disabled
979 12:21:49.203208
980 12:21:49.203294 USB2 port 3 disabled
981 12:21:49.206523 USB2 port 5 disabled
982 12:21:49.206609 USB2 port 6 enabled
983 12:21:49.209711 USB2 port 9 enabled
984 12:21:49.212951 USB3 port 0 enabled
985 12:21:49.213041 USB3 port 1 enabled
986 12:21:49.216552 USB3 port 2 enabled
987 12:21:49.219277 USB3 port 3 enabled
988 12:21:49.219370 USB3 port 4 disabled
989 12:21:49.222753 USB2 port 0 scanning...
990 12:21:49.225828 scan_static_bus for USB2 port 0
991 12:21:49.229498 scan_static_bus for USB2 port 0 done
992 12:21:49.235857 scan_bus: scanning of bus USB2 port 0 took 9719 usecs
993 12:21:49.238728 USB2 port 1 scanning...
994 12:21:49.242686 scan_static_bus for USB2 port 1
995 12:21:49.245349 scan_static_bus for USB2 port 1 done
996 12:21:49.248557 scan_bus: scanning of bus USB2 port 1 took 9737 usecs
997 12:21:49.251793 USB2 port 6 scanning...
998 12:21:49.255115 scan_static_bus for USB2 port 6
999 12:21:49.258691 scan_static_bus for USB2 port 6 done
1000 12:21:49.264857 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
1001 12:21:49.268602 USB2 port 9 scanning...
1002 12:21:49.271476 scan_static_bus for USB2 port 9
1003 12:21:49.274932 scan_static_bus for USB2 port 9 done
1004 12:21:49.281595 scan_bus: scanning of bus USB2 port 9 took 9710 usecs
1005 12:21:49.281681 USB3 port 0 scanning...
1006 12:21:49.284748 scan_static_bus for USB3 port 0
1007 12:21:49.291372 scan_static_bus for USB3 port 0 done
1008 12:21:49.294703 scan_bus: scanning of bus USB3 port 0 took 9709 usecs
1009 12:21:49.297709 USB3 port 1 scanning...
1010 12:21:49.300988 scan_static_bus for USB3 port 1
1011 12:21:49.304303 scan_static_bus for USB3 port 1 done
1012 12:21:49.310722 scan_bus: scanning of bus USB3 port 1 took 9712 usecs
1013 12:21:49.314053 USB3 port 2 scanning...
1014 12:21:49.317105 scan_static_bus for USB3 port 2
1015 12:21:49.320753 scan_static_bus for USB3 port 2 done
1016 12:21:49.323920 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
1017 12:21:49.326847 USB3 port 3 scanning...
1018 12:21:49.330334 scan_static_bus for USB3 port 3
1019 12:21:49.333620 scan_static_bus for USB3 port 3 done
1020 12:21:49.340295 scan_bus: scanning of bus USB3 port 3 took 9711 usecs
1021 12:21:49.343367 scan_static_bus for USB0 port 0 done
1022 12:21:49.350102 scan_bus: scanning of bus USB0 port 0 took 155520 usecs
1023 12:21:49.353040 scan_static_bus for PCI: 00:14.0 done
1024 12:21:49.360068 scan_bus: scanning of bus PCI: 00:14.0 took 173153 usecs
1025 12:21:49.362967 PCI: 00:15.0 scanning...
1026 12:21:49.366096 scan_generic_bus for PCI: 00:15.0
1027 12:21:49.369846 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1028 12:21:49.372491 scan_generic_bus for PCI: 00:15.0 done
1029 12:21:49.379555 scan_bus: scanning of bus PCI: 00:15.0 took 14297 usecs
1030 12:21:49.382459 PCI: 00:15.1 scanning...
1031 12:21:49.385927 scan_generic_bus for PCI: 00:15.1
1032 12:21:49.388925 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1033 12:21:49.392135 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1034 12:21:49.398465 scan_generic_bus for PCI: 00:15.1 done
1035 12:21:49.401738 scan_bus: scanning of bus PCI: 00:15.1 took 18619 usecs
1036 12:21:49.405022 PCI: 00:19.0 scanning...
1037 12:21:49.408200 scan_generic_bus for PCI: 00:19.0
1038 12:21:49.411447 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1039 12:21:49.418051 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1040 12:21:49.421714 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1041 12:21:49.424699 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1042 12:21:49.427961 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1043 12:21:49.431080
1044 12:21:49.434530 scan_generic_bus for PCI: 00:19.0 done
1045 12:21:49.437884 scan_bus: scanning of bus PCI: 00:19.0 took 30733 usecs
1046 12:21:49.440778 PCI: 00:1d.0 scanning...
1047 12:21:49.444023 do_pci_scan_bridge for PCI: 00:1d.0
1048 12:21:49.447704 PCI: pci_scan_bus for bus 01
1049 12:21:49.450567 PCI: 01:00.0 [1c5c/1327] enabled
1050 12:21:49.454140 Enabling Common Clock Configuration
1051 12:21:49.460851 L1 Sub-State supported from root port 29
1052 12:21:49.463945 L1 Sub-State Support = 0xf
1053 12:21:49.464030 CommonModeRestoreTime = 0x28
1054 12:21:49.470289 Power On Value = 0x16, Power On Scale = 0x0
1055 12:21:49.470375 ASPM: Enabled L1
1056 12:21:49.476981 scan_bus: scanning of bus PCI: 00:1d.0 took 32785 usecs
1057 12:21:49.480088 PCI: 00:1e.2 scanning...
1058 12:21:49.483575 scan_generic_bus for PCI: 00:1e.2
1059 12:21:49.486492 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1060 12:21:49.489927 scan_generic_bus for PCI: 00:1e.2 done
1061 12:21:49.496631 scan_bus: scanning of bus PCI: 00:1e.2 took 14015 usecs
1062 12:21:49.499638 PCI: 00:1e.3 scanning...
1063 12:21:49.503087 scan_generic_bus for PCI: 00:1e.3
1064 12:21:49.506407 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1065 12:21:49.509883 scan_generic_bus for PCI: 00:1e.3 done
1066 12:21:49.516183 scan_bus: scanning of bus PCI: 00:1e.3 took 14018 usecs
1067 12:21:49.519536 PCI: 00:1f.0 scanning...
1068 12:21:49.522949 scan_static_bus for PCI: 00:1f.0
1069 12:21:49.523032 PNP: 0c09.0 enabled
1070 12:21:49.525870
1071 12:21:49.529282 scan_static_bus for PCI: 00:1f.0 done
1072 12:21:49.532594 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1073 12:21:49.535965 PCI: 00:1f.3 scanning...
1074 12:21:49.542189 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1075 12:21:49.545570 PCI: 00:1f.4 scanning...
1076 12:21:49.548765 scan_generic_bus for PCI: 00:1f.4
1077 12:21:49.552200 scan_generic_bus for PCI: 00:1f.4 done
1078 12:21:49.558290 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
1079 12:21:49.558376 PCI: 00:1f.5 scanning...
1080 12:21:49.561787
1081 12:21:49.564731 scan_generic_bus for PCI: 00:1f.5
1082 12:21:49.568023 scan_generic_bus for PCI: 00:1f.5 done
1083 12:21:49.574631 scan_bus: scanning of bus PCI: 00:1f.5 took 10200 usecs
1084 12:21:49.578123 scan_bus: scanning of bus DOMAIN: 0000 took 605325 usecs
1085 12:21:49.580980 scan_static_bus for Root Device done
1086 12:21:49.587541 scan_bus: scanning of bus Root Device took 625234 usecs
1087 12:21:49.587635 done
1088 12:21:49.591171 Chrome EC: UHEPI supported
1089 12:21:49.597874 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1090 12:21:49.604313 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1091 12:21:49.610537 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1092 12:21:49.617022 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1093 12:21:49.620635 SPI flash protection: WPSW=0 SRP0=0
1094 12:21:49.627039 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1095 12:21:49.630302 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1096 12:21:49.633380 found VGA at PCI: 00:02.0
1097 12:21:49.636610 Setting up VGA for PCI: 00:02.0
1098 12:21:49.643358 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1099 12:21:49.646804 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1100 12:21:49.649631 Allocating resources...
1101 12:21:49.653171 Reading resources...
1102 12:21:49.656238 Root Device read_resources bus 0 link: 0
1103 12:21:49.659613 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1104 12:21:49.666205 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1105 12:21:49.669294 DOMAIN: 0000 read_resources bus 0 link: 0
1106 12:21:49.676673 PCI: 00:14.0 read_resources bus 0 link: 0
1107 12:21:49.680108 USB0 port 0 read_resources bus 0 link: 0
1108 12:21:49.688164 USB0 port 0 read_resources bus 0 link: 0 done
1109 12:21:49.691571 PCI: 00:14.0 read_resources bus 0 link: 0 done
1110 12:21:49.698722 PCI: 00:15.0 read_resources bus 1 link: 0
1111 12:21:49.702156 PCI: 00:15.0 read_resources bus 1 link: 0 done
1112 12:21:49.708723 PCI: 00:15.1 read_resources bus 2 link: 0
1113 12:21:49.711859 PCI: 00:15.1 read_resources bus 2 link: 0 done
1114 12:21:49.715418
1115 12:21:49.718451 PCI: 00:19.0 read_resources bus 3 link: 0
1116 12:21:49.725668 PCI: 00:19.0 read_resources bus 3 link: 0 done
1117 12:21:49.728762 PCI: 00:1d.0 read_resources bus 1 link: 0
1118 12:21:49.735578 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1119 12:21:49.738941 PCI: 00:1e.2 read_resources bus 4 link: 0
1120 12:21:49.745563 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1121 12:21:49.748960 PCI: 00:1e.3 read_resources bus 5 link: 0
1122 12:21:49.755915 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1123 12:21:49.758929 PCI: 00:1f.0 read_resources bus 0 link: 0
1124 12:21:49.765798 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1125 12:21:49.772403 DOMAIN: 0000 read_resources bus 0 link: 0 done
1126 12:21:49.775572 Root Device read_resources bus 0 link: 0 done
1127 12:21:49.778511 Done reading resources.
1128 12:21:49.785177 Show resources in subtree (Root Device)...After reading.
1129 12:21:49.788674 Root Device child on link 0 CPU_CLUSTER: 0
1130 12:21:49.791473 CPU_CLUSTER: 0 child on link 0 APIC: 00
1131 12:21:49.795001 APIC: 00
1132 12:21:49.795084 APIC: 03
1133 12:21:49.798495 APIC: 01
1134 12:21:49.798606 APIC: 02
1135 12:21:49.798672 APIC: 06
1136 12:21:49.801681 APIC: 07
1137 12:21:49.801764 APIC: 05
1138 12:21:49.801828 APIC: 04
1139 12:21:49.804555
1140 12:21:49.854397 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1141 12:21:49.854802 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1142 12:21:49.855148 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1143 12:21:49.855237 PCI: 00:00.0
1144 12:21:49.855672 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1145 12:21:49.855965 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1146 12:21:49.904069 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1147 12:21:49.904382 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1148 12:21:49.904707 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1149 12:21:49.904836 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1150 12:21:49.905118 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1151 12:21:49.905203 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1152 12:21:49.935587 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1153 12:21:49.936219 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1154 12:21:49.936521 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1155 12:21:49.939705 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1156 12:21:49.949465 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1157 12:21:49.959269 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1158 12:21:49.968907 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1159 12:21:49.978725 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1160 12:21:49.978809 PCI: 00:02.0
1161 12:21:49.988577 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1162 12:21:50.001876 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1163 12:21:50.007889 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1164 12:21:50.011546 PCI: 00:04.0
1165 12:21:50.011628 PCI: 00:08.0
1166 12:21:50.021440 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 12:21:50.024622 PCI: 00:12.0
1168 12:21:50.034042 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 12:21:50.037741 PCI: 00:14.0 child on link 0 USB0 port 0
1170 12:21:50.046943 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1171 12:21:50.053604 USB0 port 0 child on link 0 USB2 port 0
1172 12:21:50.053687 USB2 port 0
1173 12:21:50.057030 USB2 port 1
1174 12:21:50.057113 USB2 port 2
1175 12:21:50.060288 USB2 port 3
1176 12:21:50.060371 USB2 port 5
1177 12:21:50.063384 USB2 port 6
1178 12:21:50.063496 USB2 port 9
1179 12:21:50.066865 USB3 port 0
1180 12:21:50.066947 USB3 port 1
1181 12:21:50.070247 USB3 port 2
1182 12:21:50.070329 USB3 port 3
1183 12:21:50.073122 USB3 port 4
1184 12:21:50.076608 PCI: 00:14.2
1185 12:21:50.086547 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1186 12:21:50.096216 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1187 12:21:50.096300 PCI: 00:14.3
1188 12:21:50.105899 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 12:21:50.109185 PCI: 00:15.0 child on link 0 I2C: 01:15
1190 12:21:50.112288
1191 12:21:50.121938 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 12:21:50.122023 I2C: 01:15
1193 12:21:50.125499 PCI: 00:15.1 child on link 0 I2C: 02:5d
1194 12:21:50.135460 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 12:21:50.138387 I2C: 02:5d
1196 12:21:50.138495 GENERIC: 0.0
1197 12:21:50.141662 PCI: 00:16.0
1198 12:21:50.151732 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 12:21:50.151819 PCI: 00:17.0
1200 12:21:50.161295 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1201 12:21:50.171377 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1202 12:21:50.177471 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1203 12:21:50.180803
1204 12:21:50.187309 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1205 12:21:50.197033 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1206 12:21:50.203503 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1207 12:21:50.210162 PCI: 00:19.0 child on link 0 I2C: 03:1a
1208 12:21:50.219815 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 12:21:50.219900 I2C: 03:1a
1210 12:21:50.222860 I2C: 03:38
1211 12:21:50.222942 I2C: 03:39
1212 12:21:50.226255 I2C: 03:3a
1213 12:21:50.226337 I2C: 03:3b
1214 12:21:50.232538 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1215 12:21:50.239286 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 12:21:50.249084 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 12:21:50.259372 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 12:21:50.262247 PCI: 01:00.0
1219 12:21:50.271947 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 12:21:50.272032 PCI: 00:1e.0
1221 12:21:50.285030 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1222 12:21:50.294802 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 12:21:50.297924 PCI: 00:1e.2 child on link 0 SPI: 00
1224 12:21:50.307864 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 12:21:50.307949 SPI: 00
1226 12:21:50.311097 PCI: 00:1e.3 child on link 0 SPI: 01
1227 12:21:50.320884 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 12:21:50.324118
1229 12:21:50.324202 SPI: 01
1230 12:21:50.327439 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 12:21:50.337138 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 12:21:50.347013 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1233 12:21:50.347097 PNP: 0c09.0
1234 12:21:50.356675 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1235 12:21:50.356759 PCI: 00:1f.3
1236 12:21:50.366659 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1237 12:21:50.379399 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1238 12:21:50.379483 PCI: 00:1f.4
1239 12:21:50.389148 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1240 12:21:50.398769 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1241 12:21:50.398853 PCI: 00:1f.5
1242 12:21:50.409050 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1243 12:21:50.415465 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1244 12:21:50.421779 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1245 12:21:50.428488 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1246 12:21:50.431993 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1247 12:21:50.434854 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1248 12:21:50.438103 PCI: 00:17.0 18 * [0x60 - 0x67] io
1249 12:21:50.441735 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1250 12:21:50.451032 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1251 12:21:50.457752 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1252 12:21:50.464140 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1253 12:21:50.474086 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1254 12:21:50.480903 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1255 12:21:50.483783 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1256 12:21:50.490606 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1257 12:21:50.496780 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1258 12:21:50.500257 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1259 12:21:50.506775 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1260 12:21:50.510382 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1261 12:21:50.516345 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1262 12:21:50.519887 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1263 12:21:50.526295 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1264 12:21:50.529672 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1265 12:21:50.536235 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1266 12:21:50.539529 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1267 12:21:50.545895 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1268 12:21:50.549240 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1269 12:21:50.555492 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1270 12:21:50.558982 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1271 12:21:50.565364 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1272 12:21:50.568578 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1273 12:21:50.575381 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1274 12:21:50.578214 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1275 12:21:50.584852 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1276 12:21:50.588389 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1277 12:21:50.594549 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1278 12:21:50.598274 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1279 12:21:50.604621 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1280 12:21:50.610956 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1281 12:21:50.614466 avoid_fixed_resources: DOMAIN: 0000
1282 12:21:50.620579 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1283 12:21:50.627339 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1284 12:21:50.633548 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1285 12:21:50.643422 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1286 12:21:50.650279 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1287 12:21:50.656706 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1288 12:21:50.666233 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1289 12:21:50.673464 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1290 12:21:50.679701 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1291 12:21:50.689342 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1292 12:21:50.695828 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1293 12:21:50.702455 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1294 12:21:50.706020 Setting resources...
1295 12:21:50.711963 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1296 12:21:50.715284 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1297 12:21:50.718342 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1298 12:21:50.721766 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1299 12:21:50.728297 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1300 12:21:50.734932 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1301 12:21:50.737941 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1302 12:21:50.744685 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1303 12:21:50.754590 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1304 12:21:50.757675 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1305 12:21:50.764289 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1306 12:21:50.767630 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1307 12:21:50.774033 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1308 12:21:50.777363 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1309 12:21:50.783852 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1310 12:21:50.787056 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1311 12:21:50.793835 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1312 12:21:50.796779 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1313 12:21:50.803258 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1314 12:21:50.806602 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1315 12:21:50.813526 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1316 12:21:50.816971 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1317 12:21:50.823177 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1318 12:21:50.826479 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1319 12:21:50.832780 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1320 12:21:50.836348 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1321 12:21:50.842847 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1322 12:21:50.845813 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1323 12:21:50.852641 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1324 12:21:50.855704 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1325 12:21:50.862288 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1326 12:21:50.865475 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1327 12:21:50.871972 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1328 12:21:50.881895 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1329 12:21:50.888204 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1330 12:21:50.894891 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1331 12:21:50.901367 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1332 12:21:50.907786 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1333 12:21:50.911175 Root Device assign_resources, bus 0 link: 0
1334 12:21:50.917802 DOMAIN: 0000 assign_resources, bus 0 link: 0
1335 12:21:50.924251 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1336 12:21:50.934169 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1337 12:21:50.940442 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1338 12:21:50.950199 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1339 12:21:50.956989 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1340 12:21:50.966650 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1341 12:21:50.969962 PCI: 00:14.0 assign_resources, bus 0 link: 0
1342 12:21:50.976205 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 12:21:50.982816 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1344 12:21:50.992452 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1345 12:21:50.999284 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1346 12:21:51.009107 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1347 12:21:51.012624 PCI: 00:15.0 assign_resources, bus 1 link: 0
1348 12:21:51.019054 PCI: 00:15.0 assign_resources, bus 1 link: 0
1349 12:21:51.025171 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1350 12:21:51.031958 PCI: 00:15.1 assign_resources, bus 2 link: 0
1351 12:21:51.035402 PCI: 00:15.1 assign_resources, bus 2 link: 0
1352 12:21:51.044973 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1353 12:21:51.051104 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1354 12:21:51.057861 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1355 12:21:51.067770 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1356 12:21:51.074150 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1357 12:21:51.083742 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1358 12:21:51.090650 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1359 12:21:51.096974 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1360 12:21:51.103303 PCI: 00:19.0 assign_resources, bus 3 link: 0
1361 12:21:51.106861 PCI: 00:19.0 assign_resources, bus 3 link: 0
1362 12:21:51.116366 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1363 12:21:51.126233 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1364 12:21:51.133007 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1365 12:21:51.139525 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1366 12:21:51.145730 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1367 12:21:51.152602 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1368 12:21:51.158989 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1369 12:21:51.168834 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1370 12:21:51.172045 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1371 12:21:51.178188 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1372 12:21:51.185056 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1373 12:21:51.188103 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1374 12:21:51.191503
1375 12:21:51.194509 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1376 12:21:51.197850 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 12:21:51.205141 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 12:21:51.208154 LPC: Trying to open IO window from 800 size 1ff
1379 12:21:51.218133 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1380 12:21:51.224381 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1381 12:21:51.234428 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1382 12:21:51.240824 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1383 12:21:51.247421 DOMAIN: 0000 assign_resources, bus 0 link: 0
1384 12:21:51.250490 Root Device assign_resources, bus 0 link: 0
1385 12:21:51.253622 Done setting resources.
1386 12:21:51.260134 Show resources in subtree (Root Device)...After assigning values.
1387 12:21:51.263447 Root Device child on link 0 CPU_CLUSTER: 0
1388 12:21:51.269944 CPU_CLUSTER: 0 child on link 0 APIC: 00
1389 12:21:51.270026 APIC: 00
1390 12:21:51.270090 APIC: 03
1391 12:21:51.273260 APIC: 01
1392 12:21:51.273341 APIC: 02
1393 12:21:51.276700 APIC: 06
1394 12:21:51.276781 APIC: 07
1395 12:21:51.276845 APIC: 05
1396 12:21:51.279905 APIC: 04
1397 12:21:51.283268 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1398 12:21:51.292926 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1399 12:21:51.302804 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1400 12:21:51.306060 PCI: 00:00.0
1401 12:21:51.316024 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1402 12:21:51.325532 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1403 12:21:51.335424 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1404 12:21:51.341849 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1405 12:21:51.345118
1406 12:21:51.351649 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1407 12:21:51.361902 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1408 12:21:51.371444 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1409 12:21:51.381590 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1410 12:21:51.390859 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1411 12:21:51.397789 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1412 12:21:51.407241 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1413 12:21:51.416961 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1414 12:21:51.426946 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1415 12:21:51.436622 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1416 12:21:51.446291 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1417 12:21:51.456435 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1418 12:21:51.456521 PCI: 00:02.0
1419 12:21:51.469271 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1420 12:21:51.478923 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1421 12:21:51.488924 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1422 12:21:51.489010 PCI: 00:04.0
1423 12:21:51.492032 PCI: 00:08.0
1424 12:21:51.501864 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1425 12:21:51.501949 PCI: 00:12.0
1426 12:21:51.514877 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1427 12:21:51.518177 PCI: 00:14.0 child on link 0 USB0 port 0
1428 12:21:51.527940 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1429 12:21:51.531059 USB0 port 0 child on link 0 USB2 port 0
1430 12:21:51.534568 USB2 port 0
1431 12:21:51.537794 USB2 port 1
1432 12:21:51.537877 USB2 port 2
1433 12:21:51.541223 USB2 port 3
1434 12:21:51.541306 USB2 port 5
1435 12:21:51.544140 USB2 port 6
1436 12:21:51.544224 USB2 port 9
1437 12:21:51.547702 USB3 port 0
1438 12:21:51.547785 USB3 port 1
1439 12:21:51.550499 USB3 port 2
1440 12:21:51.550632 USB3 port 3
1441 12:21:51.553921 USB3 port 4
1442 12:21:51.554003 PCI: 00:14.2
1443 12:21:51.566979 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1444 12:21:51.576643 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1445 12:21:51.576727 PCI: 00:14.3
1446 12:21:51.586700 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1447 12:21:51.589947
1448 12:21:51.593303 PCI: 00:15.0 child on link 0 I2C: 01:15
1449 12:21:51.602712 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1450 12:21:51.602797 I2C: 01:15
1451 12:21:51.608931 PCI: 00:15.1 child on link 0 I2C: 02:5d
1452 12:21:51.618831 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1453 12:21:51.618915 I2C: 02:5d
1454 12:21:51.622144 GENERIC: 0.0
1455 12:21:51.625657 PCI: 00:16.0
1456 12:21:51.635030 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1457 12:21:51.635113 PCI: 00:17.0
1458 12:21:51.644838 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1459 12:21:51.654725 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1460 12:21:51.664453 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1461 12:21:51.674163 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1462 12:21:51.683976 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1463 12:21:51.693741 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1464 12:21:51.697198 PCI: 00:19.0 child on link 0 I2C: 03:1a
1465 12:21:51.706829 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1466 12:21:51.709923 I2C: 03:1a
1467 12:21:51.710022 I2C: 03:38
1468 12:21:51.713708 I2C: 03:39
1469 12:21:51.713791 I2C: 03:3a
1470 12:21:51.716550 I2C: 03:3b
1471 12:21:51.720182 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1472 12:21:51.729749 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1473 12:21:51.739477 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1474 12:21:51.749350 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1475 12:21:51.752642 PCI: 01:00.0
1476 12:21:51.762551 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1477 12:21:51.762661 PCI: 00:1e.0
1478 12:21:51.765822
1479 12:21:51.775338 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1480 12:21:51.784974 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1481 12:21:51.788287 PCI: 00:1e.2 child on link 0 SPI: 00
1482 12:21:51.798448 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1483 12:21:51.801768 SPI: 00
1484 12:21:51.804865 PCI: 00:1e.3 child on link 0 SPI: 01
1485 12:21:51.814611 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1486 12:21:51.818126 SPI: 01
1487 12:21:51.820871 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1488 12:21:51.830918 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1489 12:21:51.837274 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1490 12:21:51.840731 PNP: 0c09.0
1491 12:21:51.850296 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1492 12:21:51.850380 PCI: 00:1f.3
1493 12:21:51.860208 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1494 12:21:51.869654 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1495 12:21:51.872947 PCI: 00:1f.4
1496 12:21:51.883320 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1497 12:21:51.893046 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1498 12:21:51.893131 PCI: 00:1f.5
1499 12:21:51.902713 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1500 12:21:51.906109 Done allocating resources.
1501 12:21:51.912290 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1502 12:21:51.915742 Enabling resources...
1503 12:21:51.919301 PCI: 00:00.0 subsystem <- 8086/9b61
1504 12:21:51.922097 PCI: 00:00.0 cmd <- 06
1505 12:21:51.925517 PCI: 00:02.0 subsystem <- 8086/9b41
1506 12:21:51.928842 PCI: 00:02.0 cmd <- 03
1507 12:21:51.931718 PCI: 00:08.0 cmd <- 06
1508 12:21:51.935085 PCI: 00:12.0 subsystem <- 8086/02f9
1509 12:21:51.938196 PCI: 00:12.0 cmd <- 02
1510 12:21:51.941637 PCI: 00:14.0 subsystem <- 8086/02ed
1511 12:21:51.941736 PCI: 00:14.0 cmd <- 02
1512 12:21:51.945049
1513 12:21:51.945132 PCI: 00:14.2 cmd <- 02
1514 12:21:51.951370 PCI: 00:14.3 subsystem <- 8086/02f0
1515 12:21:51.951453 PCI: 00:14.3 cmd <- 02
1516 12:21:51.955005 PCI: 00:15.0 subsystem <- 8086/02e8
1517 12:21:51.957739 PCI: 00:15.0 cmd <- 02
1518 12:21:51.961211 PCI: 00:15.1 subsystem <- 8086/02e9
1519 12:21:51.964301 PCI: 00:15.1 cmd <- 02
1520 12:21:51.967638 PCI: 00:16.0 subsystem <- 8086/02e0
1521 12:21:51.970907 PCI: 00:16.0 cmd <- 02
1522 12:21:51.974376 PCI: 00:17.0 subsystem <- 8086/02d3
1523 12:21:51.977797 PCI: 00:17.0 cmd <- 03
1524 12:21:51.980940 PCI: 00:19.0 subsystem <- 8086/02c5
1525 12:21:51.984234 PCI: 00:19.0 cmd <- 02
1526 12:21:51.987171 PCI: 00:1d.0 bridge ctrl <- 0013
1527 12:21:51.990469 PCI: 00:1d.0 subsystem <- 8086/02b0
1528 12:21:51.993898 PCI: 00:1d.0 cmd <- 06
1529 12:21:51.997284 PCI: 00:1e.0 subsystem <- 8086/02a8
1530 12:21:52.000332 PCI: 00:1e.0 cmd <- 06
1531 12:21:52.003529 PCI: 00:1e.2 subsystem <- 8086/02aa
1532 12:21:52.006955 PCI: 00:1e.2 cmd <- 06
1533 12:21:52.010378 PCI: 00:1e.3 subsystem <- 8086/02ab
1534 12:21:52.013331 PCI: 00:1e.3 cmd <- 02
1535 12:21:52.016758 PCI: 00:1f.0 subsystem <- 8086/0284
1536 12:21:52.016841 PCI: 00:1f.0 cmd <- 407
1537 12:21:52.023985 PCI: 00:1f.3 subsystem <- 8086/02c8
1538 12:21:52.024068 PCI: 00:1f.3 cmd <- 02
1539 12:21:52.026768 PCI: 00:1f.4 subsystem <- 8086/02a3
1540 12:21:52.030299
1541 12:21:52.030383 PCI: 00:1f.4 cmd <- 03
1542 12:21:52.033182 PCI: 00:1f.5 subsystem <- 8086/02a4
1543 12:21:52.036748 PCI: 00:1f.5 cmd <- 406
1544 12:21:52.045981 PCI: 01:00.0 cmd <- 02
1545 12:21:52.051297 done.
1546 12:21:52.062385 ME: Version: 14.0.39.1367
1547 12:21:52.068787 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 10
1548 12:21:52.072060 Initializing devices...
1549 12:21:52.072178 Root Device init ...
1550 12:21:52.078754 Chrome EC: Set SMI mask to 0x0000000000000000
1551 12:21:52.081960 Chrome EC: clear events_b mask to 0x0000000000000000
1552 12:21:52.085457
1553 12:21:52.088372 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1554 12:21:52.094729 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1555 12:21:52.101449 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1556 12:21:52.104541 Chrome EC: Set WAKE mask to 0x0000000000000000
1557 12:21:52.110991 Root Device init finished in 35160 usecs
1558 12:21:52.114385 CPU_CLUSTER: 0 init ...
1559 12:21:52.117705 CPU_CLUSTER: 0 init finished in 2448 usecs
1560 12:21:52.123140 PCI: 00:00.0 init ...
1561 12:21:52.126144 CPU TDP: 15 Watts
1562 12:21:52.129486 CPU PL2 = 64 Watts
1563 12:21:52.132861 PCI: 00:00.0 init finished in 7080 usecs
1564 12:21:52.136443 PCI: 00:02.0 init ...
1565 12:21:52.139361 PCI: 00:02.0 init finished in 2252 usecs
1566 12:21:52.142421 PCI: 00:08.0 init ...
1567 12:21:52.145825 PCI: 00:08.0 init finished in 2251 usecs
1568 12:21:52.149216 PCI: 00:12.0 init ...
1569 12:21:52.152232 PCI: 00:12.0 init finished in 2250 usecs
1570 12:21:52.155860 PCI: 00:14.0 init ...
1571 12:21:52.158731 PCI: 00:14.0 init finished in 2243 usecs
1572 12:21:52.162298 PCI: 00:14.2 init ...
1573 12:21:52.165752 PCI: 00:14.2 init finished in 2252 usecs
1574 12:21:52.168938 PCI: 00:14.3 init ...
1575 12:21:52.171682 PCI: 00:14.3 init finished in 2268 usecs
1576 12:21:52.175327 PCI: 00:15.0 init ...
1577 12:21:52.178811 DW I2C bus 0 at 0xd121f000 (400 KHz)
1578 12:21:52.185293 PCI: 00:15.0 init finished in 5976 usecs
1579 12:21:52.185382 PCI: 00:15.1 init ...
1580 12:21:52.191509 DW I2C bus 1 at 0xd1220000 (400 KHz)
1581 12:21:52.194816 PCI: 00:15.1 init finished in 5974 usecs
1582 12:21:52.198224 PCI: 00:16.0 init ...
1583 12:21:52.201687 PCI: 00:16.0 init finished in 2251 usecs
1584 12:21:52.204853 PCI: 00:19.0 init ...
1585 12:21:52.207930 DW I2C bus 4 at 0xd1222000 (400 KHz)
1586 12:21:52.211117 PCI: 00:19.0 init finished in 5976 usecs
1587 12:21:52.214474 PCI: 00:1d.0 init ...
1588 12:21:52.217817 Initializing PCH PCIe bridge.
1589 12:21:52.220954 PCI: 00:1d.0 init finished in 5283 usecs
1590 12:21:52.225085 PCI: 00:1f.0 init ...
1591 12:21:52.227904 IOAPIC: Initializing IOAPIC at 0xfec00000
1592 12:21:52.234484 IOAPIC: Bootstrap Processor Local APIC = 0x00
1593 12:21:52.234618 IOAPIC: ID = 0x02
1594 12:21:52.237971 IOAPIC: Dumping registers
1595 12:21:52.240905 reg 0x0000: 0x02000000
1596 12:21:52.244367 reg 0x0001: 0x00770020
1597 12:21:52.247423 reg 0x0002: 0x00000000
1598 12:21:52.250850 PCI: 00:1f.0 init finished in 23532 usecs
1599 12:21:52.254004 PCI: 00:1f.4 init ...
1600 12:21:52.257300 PCI: 00:1f.4 init finished in 2261 usecs
1601 12:21:52.269058 PCI: 01:00.0 init ...
1602 12:21:52.272274 PCI: 01:00.0 init finished in 2253 usecs
1603 12:21:52.276372 PNP: 0c09.0 init ...
1604 12:21:52.279673 Google Chrome EC uptime: 11.044 seconds
1605 12:21:52.286322 Google Chrome AP resets since EC boot: 0
1606 12:21:52.289884 Google Chrome most recent AP reset causes:
1607 12:21:52.296094 Google Chrome EC reset flags at last EC boot: reset-pin
1608 12:21:52.299791 PNP: 0c09.0 init finished in 20565 usecs
1609 12:21:52.302511 Devices initialized
1610 12:21:52.305889 Show all devs... After init.
1611 12:21:52.305971 Root Device: enabled 1
1612 12:21:52.309517 CPU_CLUSTER: 0: enabled 1
1613 12:21:52.312380 DOMAIN: 0000: enabled 1
1614 12:21:52.312463 APIC: 00: enabled 1
1615 12:21:52.315804
1616 12:21:52.315888 PCI: 00:00.0: enabled 1
1617 12:21:52.319299 PCI: 00:02.0: enabled 1
1618 12:21:52.322268 PCI: 00:04.0: enabled 0
1619 12:21:52.322350 PCI: 00:05.0: enabled 0
1620 12:21:52.325635 PCI: 00:12.0: enabled 1
1621 12:21:52.329111 PCI: 00:12.5: enabled 0
1622 12:21:52.332025 PCI: 00:12.6: enabled 0
1623 12:21:52.332107 PCI: 00:14.0: enabled 1
1624 12:21:52.335254 PCI: 00:14.1: enabled 0
1625 12:21:52.338709 PCI: 00:14.3: enabled 1
1626 12:21:52.341657 PCI: 00:14.5: enabled 0
1627 12:21:52.341752 PCI: 00:15.0: enabled 1
1628 12:21:52.345210 PCI: 00:15.1: enabled 1
1629 12:21:52.348451 PCI: 00:15.2: enabled 0
1630 12:21:52.351376 PCI: 00:15.3: enabled 0
1631 12:21:52.351458 PCI: 00:16.0: enabled 1
1632 12:21:52.354824 PCI: 00:16.1: enabled 0
1633 12:21:52.357953 PCI: 00:16.2: enabled 0
1634 12:21:52.361230 PCI: 00:16.3: enabled 0
1635 12:21:52.361313 PCI: 00:16.4: enabled 0
1636 12:21:52.364352 PCI: 00:16.5: enabled 0
1637 12:21:52.367838 PCI: 00:17.0: enabled 1
1638 12:21:52.370951 PCI: 00:19.0: enabled 1
1639 12:21:52.371034 PCI: 00:19.1: enabled 0
1640 12:21:52.374573 PCI: 00:19.2: enabled 0
1641 12:21:52.377652 PCI: 00:1a.0: enabled 0
1642 12:21:52.380779 PCI: 00:1c.0: enabled 0
1643 12:21:52.380862 PCI: 00:1c.1: enabled 0
1644 12:21:52.384269 PCI: 00:1c.2: enabled 0
1645 12:21:52.387537 PCI: 00:1c.3: enabled 0
1646 12:21:52.390699 PCI: 00:1c.4: enabled 0
1647 12:21:52.390781 PCI: 00:1c.5: enabled 0
1648 12:21:52.394004 PCI: 00:1c.6: enabled 0
1649 12:21:52.397354 PCI: 00:1c.7: enabled 0
1650 12:21:52.400752 PCI: 00:1d.0: enabled 1
1651 12:21:52.400835 PCI: 00:1d.1: enabled 0
1652 12:21:52.403536 PCI: 00:1d.2: enabled 0
1653 12:21:52.406975 PCI: 00:1d.3: enabled 0
1654 12:21:52.410113 PCI: 00:1d.4: enabled 0
1655 12:21:52.410195 PCI: 00:1d.5: enabled 0
1656 12:21:52.413818 PCI: 00:1e.0: enabled 1
1657 12:21:52.416930 PCI: 00:1e.1: enabled 0
1658 12:21:52.419891 PCI: 00:1e.2: enabled 1
1659 12:21:52.419974 PCI: 00:1e.3: enabled 1
1660 12:21:52.423298 PCI: 00:1f.0: enabled 1
1661 12:21:52.426675 PCI: 00:1f.1: enabled 0
1662 12:21:52.429970 PCI: 00:1f.2: enabled 0
1663 12:21:52.430054 PCI: 00:1f.3: enabled 1
1664 12:21:52.433063 PCI: 00:1f.4: enabled 1
1665 12:21:52.436228 PCI: 00:1f.5: enabled 1
1666 12:21:52.439618 PCI: 00:1f.6: enabled 0
1667 12:21:52.439701 USB0 port 0: enabled 1
1668 12:21:52.442628 I2C: 01:15: enabled 1
1669 12:21:52.445980 I2C: 02:5d: enabled 1
1670 12:21:52.446063 GENERIC: 0.0: enabled 1
1671 12:21:52.449358 I2C: 03:1a: enabled 1
1672 12:21:52.452905 I2C: 03:38: enabled 1
1673 12:21:52.452989 I2C: 03:39: enabled 1
1674 12:21:52.455762 I2C: 03:3a: enabled 1
1675 12:21:52.458823 I2C: 03:3b: enabled 1
1676 12:21:52.462150 PCI: 00:00.0: enabled 1
1677 12:21:52.462232 SPI: 00: enabled 1
1678 12:21:52.465591 SPI: 01: enabled 1
1679 12:21:52.465674 PNP: 0c09.0: enabled 1
1680 12:21:52.468920
1681 12:21:52.469006 USB2 port 0: enabled 1
1682 12:21:52.472246 USB2 port 1: enabled 1
1683 12:21:52.475658 USB2 port 2: enabled 0
1684 12:21:52.475742 USB2 port 3: enabled 0
1685 12:21:52.478943 USB2 port 5: enabled 0
1686 12:21:52.481731 USB2 port 6: enabled 1
1687 12:21:52.481814 USB2 port 9: enabled 1
1688 12:21:52.485053
1689 12:21:52.485137 USB3 port 0: enabled 1
1690 12:21:52.488634 USB3 port 1: enabled 1
1691 12:21:52.491919 USB3 port 2: enabled 1
1692 12:21:52.492002 USB3 port 3: enabled 1
1693 12:21:52.494806 USB3 port 4: enabled 0
1694 12:21:52.498137 APIC: 03: enabled 1
1695 12:21:52.498219 APIC: 01: enabled 1
1696 12:21:52.501713 APIC: 02: enabled 1
1697 12:21:52.504925 APIC: 06: enabled 1
1698 12:21:52.505009 APIC: 07: enabled 1
1699 12:21:52.507902 APIC: 05: enabled 1
1700 12:21:52.507987 APIC: 04: enabled 1
1701 12:21:52.511214 PCI: 00:08.0: enabled 1
1702 12:21:52.514494 PCI: 00:14.2: enabled 1
1703 12:21:52.518033 PCI: 01:00.0: enabled 1
1704 12:21:52.521372 Disabling ACPI via APMC:
1705 12:21:52.524767 done.
1706 12:21:52.527730 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1707 12:21:52.531085 ELOG: NV offset 0xaf0000 size 0x4000
1708 12:21:52.538315 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1709 12:21:52.544845 ELOG: Event(17) added with size 13 at 2023-01-31 12:21:51 UTC
1710 12:21:52.550982 POST: Unexpected post code in previous boot: 0x25
1711 12:21:52.557586 ELOG: Event(A3) added with size 11 at 2023-01-31 12:21:51 UTC
1712 12:21:52.564113 ELOG: Event(A6) added with size 13 at 2023-01-31 12:21:51 UTC
1713 12:21:52.570904 ELOG: Event(92) added with size 9 at 2023-01-31 12:21:51 UTC
1714 12:21:52.577051 ELOG: Event(93) added with size 9 at 2023-01-31 12:21:51 UTC
1715 12:21:52.583747 ELOG: Event(9A) added with size 9 at 2023-01-31 12:21:51 UTC
1716 12:21:52.586986 ELOG: Event(9E) added with size 10 at 2023-01-31 12:21:51 UTC
1717 12:21:52.593616 ELOG: Event(9F) added with size 14 at 2023-01-31 12:21:51 UTC
1718 12:21:52.600366 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1719 12:21:52.606696 ELOG: Event(A1) added with size 10 at 2023-01-31 12:21:51 UTC
1720 12:21:52.613406 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1721 12:21:52.620085 ELOG: Event(A0) added with size 9 at 2023-01-31 12:21:51 UTC
1722 12:21:52.626413 elog_add_boot_reason: Logged dev mode boot
1723 12:21:52.626502 Finalize devices...
1724 12:21:52.629672 PCI: 00:17.0 final
1725 12:21:52.629757 Devices finalized
1726 12:21:52.636569 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1727 12:21:52.642877 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1728 12:21:52.646235 ME: HFSTS1 : 0x90000245
1729 12:21:52.649642 ME: HFSTS2 : 0x3B850126
1730 12:21:52.653027 ME: HFSTS3 : 0x00000020
1731 12:21:52.659342 ME: HFSTS4 : 0x00004800
1732 12:21:52.662445 ME: HFSTS5 : 0x00000000
1733 12:21:52.665907 ME: HFSTS6 : 0x40400006
1734 12:21:52.669144 ME: Manufacturing Mode : NO
1735 12:21:52.672501 ME: FW Partition Table : OK
1736 12:21:52.675585 ME: Bringup Loader Failure : NO
1737 12:21:52.678701 ME: Firmware Init Complete : YES
1738 12:21:52.682165 ME: Boot Options Present : NO
1739 12:21:52.685278 ME: Update In Progress : NO
1740 12:21:52.688602 ME: D0i3 Support : YES
1741 12:21:52.692033 ME: Low Power State Enabled : NO
1742 12:21:52.695429 ME: CPU Replaced : NO
1743 12:21:52.698166 ME: CPU Replacement Valid : YES
1744 12:21:52.701810 ME: Current Working State : 5
1745 12:21:52.704771 ME: Current Operation State : 1
1746 12:21:52.708235 ME: Current Operation Mode : 0
1747 12:21:52.711570 ME: Error Code : 0
1748 12:21:52.714442 ME: CPU Debug Disabled : YES
1749 12:21:52.717849 ME: TXT Support : NO
1750 12:21:52.724699 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1751 12:21:52.731215 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1752 12:21:52.731300 CBFS @ c08000 size 3f8000
1753 12:21:52.734544
1754 12:21:52.737525 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1755 12:21:52.740591 CBFS: Locating 'fallback/dsdt.aml'
1756 12:21:52.747349 CBFS: Found @ offset 10bb80 size 3fa5
1757 12:21:52.750389 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1758 12:21:52.753907 CBFS @ c08000 size 3f8000
1759 12:21:52.760235 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1760 12:21:52.763520 CBFS: Locating 'fallback/slic'
1761 12:21:52.766814 CBFS: 'fallback/slic' not found.
1762 12:21:52.773095 ACPI: Writing ACPI tables at 99b3e000.
1763 12:21:52.773181 ACPI: * FACS
1764 12:21:52.776513 ACPI: * DSDT
1765 12:21:52.779852 Ramoops buffer: 0x100000@0x99a3d000.
1766 12:21:52.783384 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1767 12:21:52.789421 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1768 12:21:52.792872 Google Chrome EC: version:
1769 12:21:52.796157 ro: helios_v2.0.2659-56403530b
1770 12:21:52.798990 rw: helios_v2.0.2849-c41de27e7d
1771 12:21:52.799075 running image: 1
1772 12:21:52.803577 ACPI: * FADT
1773 12:21:52.803673 SCI is IRQ9
1774 12:21:52.810404 ACPI: added table 1/32, length now 40
1775 12:21:52.810504 ACPI: * SSDT
1776 12:21:52.813747 Found 1 CPU(s) with 8 core(s) each.
1777 12:21:52.817037 Error: Could not locate 'wifi_sar' in VPD.
1778 12:21:52.819912
1779 12:21:52.823567 Checking CBFS for default SAR values
1780 12:21:52.826843 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1781 12:21:52.830299 CBFS @ c08000 size 3f8000
1782 12:21:52.836465 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1783 12:21:52.839833 CBFS: Locating 'wifi_sar_defaults.hex'
1784 12:21:52.842873 CBFS: Found @ offset 5fac0 size 77
1785 12:21:52.846347 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1786 12:21:52.852559 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1787 12:21:52.855962 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1788 12:21:52.862302 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1789 12:21:52.865879 failed to find key in VPD: dsm_calib_r0_0
1790 12:21:52.875479 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1791 12:21:52.881771 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1792 12:21:52.885159 failed to find key in VPD: dsm_calib_r0_1
1793 12:21:52.891839 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1794 12:21:52.894795
1795 12:21:52.898292 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1796 12:21:52.901404 failed to find key in VPD: dsm_calib_r0_2
1797 12:21:52.911338 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1798 12:21:52.918115 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1799 12:21:52.920920 failed to find key in VPD: dsm_calib_r0_3
1800 12:21:52.930882 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1801 12:21:52.934286 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1802 12:21:52.940587 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1803 12:21:52.943932 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1804 12:21:52.947483 EC returned error result code 1
1805 12:21:52.950586 EC returned error result code 1
1806 12:21:52.954366 EC returned error result code 1
1807 12:21:52.960734 PS2K: Bad resp from EC. Vivaldi disabled!
1808 12:21:52.963641 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1809 12:21:52.966778
1810 12:21:52.970572 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1811 12:21:52.976913 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1812 12:21:52.980231 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1813 12:21:52.986957 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1814 12:21:52.993246 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1815 12:21:52.999403 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1816 12:21:53.006013 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1817 12:21:53.009362 ACPI: added table 2/32, length now 44
1818 12:21:53.009448 ACPI: * MCFG
1819 12:21:53.012796 ACPI: added table 3/32, length now 48
1820 12:21:53.015919 ACPI: * TPM2
1821 12:21:53.019353 TPM2 log created at 99a2d000
1822 12:21:53.022771 ACPI: added table 4/32, length now 52
1823 12:21:53.025520 ACPI: * MADT
1824 12:21:53.025604 SCI is IRQ9
1825 12:21:53.029128 ACPI: added table 5/32, length now 56
1826 12:21:53.032138 current = 99b43ac0
1827 12:21:53.032223 ACPI: * DMAR
1828 12:21:53.035470 ACPI: added table 6/32, length now 60
1829 12:21:53.038657 ACPI: * IGD OpRegion
1830 12:21:53.042334 GMA: Found VBT in CBFS
1831 12:21:53.045187 GMA: Found valid VBT in CBFS
1832 12:21:53.048655 ACPI: added table 7/32, length now 64
1833 12:21:53.048743 ACPI: * HPET
1834 12:21:53.054889 ACPI: added table 8/32, length now 68
1835 12:21:53.054977 ACPI: done.
1836 12:21:53.058013 ACPI tables: 31744 bytes.
1837 12:21:53.061538 smbios_write_tables: 99a2c000
1838 12:21:53.064912 EC returned error result code 3
1839 12:21:53.068082 Couldn't obtain OEM name from CBI
1840 12:21:53.071476 Create SMBIOS type 17
1841 12:21:53.074635 PCI: 00:00.0 (Intel Cannonlake)
1842 12:21:53.074721 PCI: 00:14.3 (Intel WiFi)
1843 12:21:53.077929
1844 12:21:53.078015 SMBIOS tables: 939 bytes.
1845 12:21:53.084485 Writing table forward entry at 0x00000500
1846 12:21:53.087831 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1847 12:21:53.094433 Writing coreboot table at 0x99b62000
1848 12:21:53.097295 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1849 12:21:53.104124 1. 0000000000001000-000000000009ffff: RAM
1850 12:21:53.107420 2. 00000000000a0000-00000000000fffff: RESERVED
1851 12:21:53.110369 3. 0000000000100000-0000000099a2bfff: RAM
1852 12:21:53.117164 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1853 12:21:53.124133 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1854 12:21:53.129987 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1855 12:21:53.133542 7. 000000009a000000-000000009f7fffff: RESERVED
1856 12:21:53.136898 8. 00000000e0000000-00000000efffffff: RESERVED
1857 12:21:53.139857
1858 12:21:53.143008 9. 00000000fc000000-00000000fc000fff: RESERVED
1859 12:21:53.146458 10. 00000000fe000000-00000000fe00ffff: RESERVED
1860 12:21:53.152719 11. 00000000fed10000-00000000fed17fff: RESERVED
1861 12:21:53.156130 12. 00000000fed80000-00000000fed83fff: RESERVED
1862 12:21:53.162491 13. 00000000fed90000-00000000fed91fff: RESERVED
1863 12:21:53.166007 14. 00000000feda0000-00000000feda1fff: RESERVED
1864 12:21:53.172357 15. 0000000100000000-000000045e7fffff: RAM
1865 12:21:53.175838 Graphics framebuffer located at 0xc0000000
1866 12:21:53.178928 Passing 5 GPIOs to payload:
1867 12:21:53.182539 NAME | PORT | POLARITY | VALUE
1868 12:21:53.188697 write protect | undefined | high | low
1869 12:21:53.195172 lid | undefined | high | high
1870 12:21:53.198470 power | undefined | high | low
1871 12:21:53.205254 oprom | undefined | high | low
1872 12:21:53.208221 EC in RW | 0x000000cb | high | low
1873 12:21:53.211576 Board ID: 4
1874 12:21:53.214986 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1875 12:21:53.218368 CBFS @ c08000 size 3f8000
1876 12:21:53.224760 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1877 12:21:53.231524 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861
1878 12:21:53.234401 coreboot table: 1492 bytes.
1879 12:21:53.237735 IMD ROOT 0. 99fff000 00001000
1880 12:21:53.240734 IMD SMALL 1. 99ffe000 00001000
1881 12:21:53.244032 FSP MEMORY 2. 99c4e000 003b0000
1882 12:21:53.247589 CONSOLE 3. 99c2e000 00020000
1883 12:21:53.250476 FMAP 4. 99c2d000 0000054e
1884 12:21:53.254002 TIME STAMP 5. 99c2c000 00000910
1885 12:21:53.257498 VBOOT WORK 6. 99c18000 00014000
1886 12:21:53.260396 MRC DATA 7. 99c16000 00001958
1887 12:21:53.263864 ROMSTG STCK 8. 99c15000 00001000
1888 12:21:53.267106 AFTER CAR 9. 99c0b000 0000a000
1889 12:21:53.270137 RAMSTAGE 10. 99baf000 0005c000
1890 12:21:53.273521 REFCODE 11. 99b7a000 00035000
1891 12:21:53.276879 SMM BACKUP 12. 99b6a000 00010000
1892 12:21:53.280140 COREBOOT 13. 99b62000 00008000
1893 12:21:53.283239 ACPI 14. 99b3e000 00024000
1894 12:21:53.286652 ACPI GNVS 15. 99b3d000 00001000
1895 12:21:53.289751 RAMOOPS 16. 99a3d000 00100000
1896 12:21:53.293337 TPM2 TCGLOG17. 99a2d000 00010000
1897 12:21:53.296298 SMBIOS 18. 99a2c000 00000800
1898 12:21:53.299775 IMD small region:
1899 12:21:53.302722 IMD ROOT 0. 99ffec00 00000400
1900 12:21:53.306500 FSP RUNTIME 1. 99ffebe0 00000004
1901 12:21:53.309315 EC HOSTEVENT 2. 99ffebc0 00000008
1902 12:21:53.312420 POWER STATE 3. 99ffeb80 00000040
1903 12:21:53.315761 ROMSTAGE 4. 99ffeb60 00000004
1904 12:21:53.319052 MEM INFO 5. 99ffe9a0 000001b9
1905 12:21:53.322451 VPD 6. 99ffe920 0000006c
1906 12:21:53.325797 MTRR: Physical address space:
1907 12:21:53.332186 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1908 12:21:53.338828 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1909 12:21:53.345230 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1910 12:21:53.351699 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1911 12:21:53.358463 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1912 12:21:53.364905 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1913 12:21:53.371023 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1914 12:21:53.374338 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 12:21:53.377398 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 12:21:53.381011 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 12:21:53.387227 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 12:21:53.390565 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 12:21:53.394061 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 12:21:53.397055 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 12:21:53.404054 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 12:21:53.406760 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 12:21:53.410365 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 12:21:53.413292 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 12:21:53.417336 call enable_fixed_mtrr()
1926 12:21:53.420615 CPU physical address size: 39 bits
1927 12:21:53.427301 MTRR: default type WB/UC MTRR counts: 6/8.
1928 12:21:53.430493 MTRR: WB selected as default type.
1929 12:21:53.437016 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1930 12:21:53.443418 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1931 12:21:53.446886 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1932 12:21:53.453191 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1933 12:21:53.459793 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1934 12:21:53.466187 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1935 12:21:53.472993 MTRR: Fixed MSR 0x250 0x0606060606060606
1936 12:21:53.475833 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 12:21:53.479113 MTRR: Fixed MSR 0x259 0x0000000000000000
1938 12:21:53.482429 MTRR: Fixed MSR 0x268 0x0606060606060606
1939 12:21:53.489222 MTRR: Fixed MSR 0x269 0x0606060606060606
1940 12:21:53.492622 MTRR: Fixed MSR 0x26a 0x0606060606060606
1941 12:21:53.495599 MTRR: Fixed MSR 0x26b 0x0606060606060606
1942 12:21:53.498988 MTRR: Fixed MSR 0x26c 0x0606060606060606
1943 12:21:53.505462 MTRR: Fixed MSR 0x26d 0x0606060606060606
1944 12:21:53.508814 MTRR: Fixed MSR 0x26e 0x0606060606060606
1945 12:21:53.511775 MTRR: Fixed MSR 0x26f 0x0606060606060606
1946 12:21:53.511859
1947 12:21:53.515139 MTRR check
1948 12:21:53.515223 Fixed MTRRs : Enabled
1949 12:21:53.518393 Variable MTRRs: Enabled
1950 12:21:53.518498
1951 12:21:53.522006 call enable_fixed_mtrr()
1952 12:21:53.528604 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1953 12:21:53.531980 CPU physical address size: 39 bits
1954 12:21:53.534998 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1955 12:21:53.541510 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 12:21:53.544918 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 12:21:53.548416 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 12:21:53.551397 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 12:21:53.557804 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 12:21:53.560789 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 12:21:53.564335 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 12:21:53.567305 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 12:21:53.574316 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 12:21:53.577202 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 12:21:53.580463 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 12:21:53.587279 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 12:21:53.590769 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 12:21:53.593764 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 12:21:53.597282 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 12:21:53.603650 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 12:21:53.606827 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 12:21:53.610190 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 12:21:53.613256 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 12:21:53.620046 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 12:21:53.623246 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 12:21:53.626404 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 12:21:53.629804 call enable_fixed_mtrr()
1978 12:21:53.633139 call enable_fixed_mtrr()
1979 12:21:53.636372 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 12:21:53.639743 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 12:21:53.645831 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 12:21:53.649281 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 12:21:53.652795 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 12:21:53.655792 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 12:21:53.662339 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 12:21:53.665601 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 12:21:53.668761 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 12:21:53.671874 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 12:21:53.678451 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 12:21:53.681943 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 12:21:53.684930 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 12:21:53.688254 call enable_fixed_mtrr()
1993 12:21:53.691732 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 12:21:53.694548 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 12:21:53.701412 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 12:21:53.704820 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 12:21:53.708112 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 12:21:53.711133 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 12:21:53.717774 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 12:21:53.720784 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 12:21:53.723861 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 12:21:53.727695 CPU physical address size: 39 bits
2003 12:21:53.730666 call enable_fixed_mtrr()
2004 12:21:53.734108 CBFS @ c08000 size 3f8000
2005 12:21:53.740361 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2006 12:21:53.743711 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 12:21:53.747044 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 12:21:53.753559 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 12:21:53.756922 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 12:21:53.760017 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 12:21:53.763604 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 12:21:53.769909 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 12:21:53.773074 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 12:21:53.776339 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 12:21:53.779690 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 12:21:53.786353 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 12:21:53.789746 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 12:21:53.792751 call enable_fixed_mtrr()
2019 12:21:53.796334 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 12:21:53.799069 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 12:21:53.802712 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 12:21:53.809031 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 12:21:53.812104 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 12:21:53.815777 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 12:21:53.818655 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 12:21:53.825154 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 12:21:53.828586 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 12:21:53.831808 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 12:21:53.835486 CPU physical address size: 39 bits
2030 12:21:53.838454 call enable_fixed_mtrr()
2031 12:21:53.841607 CBFS: Locating 'fallback/payload'
2032 12:21:53.844829 CPU physical address size: 39 bits
2033 12:21:53.851382 CBFS: Found @ offset 1c96c0 size 3f798
2034 12:21:53.854951 CPU physical address size: 39 bits
2035 12:21:53.857907 Checking segment from ROM address 0xffdd16f8
2036 12:21:53.861440 CPU physical address size: 39 bits
2037 12:21:53.864773 CPU physical address size: 39 bits
2038 12:21:53.870911 Checking segment from ROM address 0xffdd1714
2039 12:21:53.874388 Loading segment from ROM address 0xffdd16f8
2040 12:21:53.877782 code (compression=0)
2041 12:21:53.884145 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2042 12:21:53.894271 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2043 12:21:53.897131 it's not compressed!
2044 12:21:53.988217 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2045 12:21:53.994739 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2046 12:21:53.998154 Loading segment from ROM address 0xffdd1714
2047 12:21:54.000940
2048 12:21:54.001400 Entry Point 0x30000000
2049 12:21:54.004226 Loaded segments
2050 12:21:54.010665 Finalizing chipset.
2051 12:21:54.013303 Finalizing SMM.
2052 12:21:54.017002 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2053 12:21:54.019890 mp_park_aps done after 0 msecs.
2054 12:21:54.026454 Jumping to boot code at 30000000(99b62000)
2055 12:21:54.032990 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2056 12:21:54.033455
2057 12:21:54.033877
2058 12:21:54.034310
2059 12:21:54.036105 Starting depthcharge on Helios...
2060 12:21:54.037227 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2061 12:21:54.037775 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2062 12:21:54.038218 Setting prompt string to ['hatch:']
2063 12:21:54.038663 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2064 12:21:54.039424
2065 12:21:54.046135 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2066 12:21:54.046607
2067 12:21:54.052628 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2068 12:21:54.053047
2069 12:21:54.059194 board_setup: Info: eMMC controller not present; skipping
2070 12:21:54.059604
2071 12:21:54.062311 New NVMe Controller 0x30053ac0 @ 00:1d:00
2072 12:21:54.062813
2073 12:21:54.068979 board_setup: Info: SDHCI controller not present; skipping
2074 12:21:54.069498
2075 12:21:54.075401 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2076 12:21:54.075862
2077 12:21:54.076192 Wipe memory regions:
2078 12:21:54.076507
2079 12:21:54.082105 [0x00000000001000, 0x000000000a0000)
2080 12:21:54.082547
2081 12:21:54.085110 [0x00000000100000, 0x00000030000000)
2082 12:21:54.085511
2083 12:21:54.151951 [0x00000030657430, 0x00000099a2c000)
2084 12:21:54.152102
2085 12:21:54.293454 [0x00000100000000, 0x0000045e800000)
2086 12:21:54.293749
2087 12:21:55.676013 R8152: Initializing
2088 12:21:55.676582
2089 12:21:55.679293 Version 9 (ocp_data = 6010)
2090 12:21:55.679776
2091 12:21:55.683693 R8152: Done initializing
2092 12:21:55.684275
2093 12:21:55.686666 Adding net device
2094 12:21:55.687233
2095 12:21:56.291238 R8152: Initializing
2096 12:21:56.291814
2097 12:21:56.294200 Version 6 (ocp_data = 5c30)
2098 12:21:56.294699
2099 12:21:56.297514 R8152: Done initializing
2100 12:21:56.297595
2101 12:21:56.303762 net_add_device: Attemp to include the same device
2102 12:21:56.303929
2103 12:21:56.310519 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2104 12:21:56.310698
2105 12:21:56.310787
2106 12:21:56.310863
2107 12:21:56.311230 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2109 12:21:56.412521 hatch: tftpboot 192.168.201.1 8948148/tftp-deploy-h6ydgl8z/kernel/bzImage 8948148/tftp-deploy-h6ydgl8z/kernel/cmdline 8948148/tftp-deploy-h6ydgl8z/ramdisk/ramdisk.cpio.gz
2110 12:21:56.413241 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2111 12:21:56.413737 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2112 12:21:56.418688 tftpboot 192.168.201.1 8948148/tftp-deploy-h6ydgl8z/kernel/bzImoy-h6ydgl8z/kernel/cmdline 8948148/tftp-deploy-h6ydgl8z/ramdisk/ramdisk.cpio.gz
2113 12:21:56.419292
2114 12:21:56.419700 Waiting for link
2115 12:21:56.420045
2116 12:21:56.619290 done.
2117 12:21:56.619871
2118 12:21:56.620254 MAC: 00:24:32:30:7f:7f
2119 12:21:56.620605
2120 12:21:56.622460 Sending DHCP discover... done.
2121 12:21:56.622966
2122 12:21:56.625992 Waiting for reply... done.
2123 12:21:56.626470
2124 12:21:56.628914 Sending DHCP request... done.
2125 12:21:56.629423
2126 12:21:56.632391 Waiting for reply... done.
2127 12:21:56.632868
2128 12:21:56.635340 My ip is 192.168.201.15
2129 12:21:56.635817
2130 12:21:56.639244 The DHCP server ip is 192.168.201.1
2131 12:21:56.639911
2132 12:21:56.642206 TFTP server IP predefined by user: 192.168.201.1
2133 12:21:56.642834
2134 12:21:56.648692 Bootfile predefined by user: 8948148/tftp-deploy-h6ydgl8z/kernel/bzImage
2135 12:21:56.649275
2136 12:21:56.655137 Sending tftp read request... done.
2137 12:21:56.655717
2138 12:21:56.659785 Waiting for the transfer...
2139 12:21:56.660265
2140 12:21:57.327659 00000000 ################################################################
2141 12:21:57.328191
2142 12:21:58.005944 00080000 ################################################################
2143 12:21:58.006586
2144 12:21:58.686895 00100000 ################################################################
2145 12:21:58.687472
2146 12:21:59.313749 00180000 ################################################################
2147 12:21:59.314314
2148 12:21:59.985556 00200000 ################################################################
2149 12:21:59.986126
2150 12:22:00.662716 00280000 ################################################################
2151 12:22:00.663294
2152 12:22:01.335787 00300000 ################################################################
2153 12:22:01.336355
2154 12:22:02.006641 00380000 ################################################################
2155 12:22:02.007158
2156 12:22:02.680958 00400000 ################################################################
2157 12:22:02.681542
2158 12:22:03.354073 00480000 ################################################################
2159 12:22:03.354683
2160 12:22:04.015445 00500000 ################################################################
2161 12:22:04.015992
2162 12:22:04.687331 00580000 ################################################################
2163 12:22:04.687918
2164 12:22:05.351216 00600000 ################################################################
2165 12:22:05.351783
2166 12:22:06.014768 00680000 ################################################################
2167 12:22:06.015312
2168 12:22:06.310731 00700000 ############################ done.
2169 12:22:06.311282
2170 12:22:06.313950 The bootfile was 7569296 bytes long.
2171 12:22:06.314443
2172 12:22:06.317132 Sending tftp read request... done.
2173 12:22:06.317610
2174 12:22:06.320642 Waiting for the transfer...
2175 12:22:06.321249
2176 12:22:06.986081 00000000 ################################################################
2177 12:22:06.986707
2178 12:22:07.559783 00080000 ################################################################
2179 12:22:07.559930
2180 12:22:08.093708 00100000 ################################################################
2181 12:22:08.093851
2182 12:22:08.603118 00180000 ################################################################
2183 12:22:08.603264
2184 12:22:09.111591 00200000 ################################################################
2185 12:22:09.111738
2186 12:22:09.620124 00280000 ################################################################
2187 12:22:09.620268
2188 12:22:10.130473 00300000 ################################################################
2189 12:22:10.130641
2190 12:22:10.644371 00380000 ################################################################
2191 12:22:10.644511
2192 12:22:11.156622 00400000 ################################################################
2193 12:22:11.156779
2194 12:22:11.669077 00480000 ################################################################
2195 12:22:11.669227
2196 12:22:11.918180 00500000 ################################ done.
2197 12:22:11.918338
2198 12:22:11.921349 Sending tftp read request... done.
2199 12:22:11.921427
2200 12:22:11.924990 Waiting for the transfer...
2201 12:22:11.925070
2202 12:22:11.925137 00000000 # done.
2203 12:22:11.925201
2204 12:22:11.934852 Command line loaded dynamically from TFTP file: 8948148/tftp-deploy-h6ydgl8z/kernel/cmdline
2205 12:22:11.934933
2206 12:22:11.957514 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8948148/extract-nfsrootfs-cnk9dp79,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2207 12:22:11.957604
2208 12:22:11.963968 ec_init(0): CrosEC protocol v3 supported (256, 256)
2209 12:22:11.964051
2210 12:22:11.971153 Shutting down all USB controllers.
2211 12:22:11.971231
2212 12:22:11.971301 Removing current net device
2213 12:22:11.971364
2214 12:22:11.978611 Finalizing coreboot
2215 12:22:11.978689
2216 12:22:11.985078 Exiting depthcharge with code 4 at timestamp: 25290656
2217 12:22:11.985158
2218 12:22:11.985225
2219 12:22:11.985286 Starting kernel ...
2220 12:22:11.985350
2221 12:22:11.985721 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2222 12:22:11.985820 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2223 12:22:11.985903 Setting prompt string to ['Linux version [0-9]']
2224 12:22:11.985974 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2225 12:22:11.986045 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2226 12:22:11.988330
2227 12:22:11.988406
2228 12:22:11.988472
2230 12:26:34.986948 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2232 12:26:34.988092 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2234 12:26:34.988996 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2237 12:26:34.990652 end: 2 depthcharge-action (duration 00:05:00) [common]
2239 12:26:34.991635 Cleaning after the job
2240 12:26:34.991722 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948148/tftp-deploy-h6ydgl8z/ramdisk
2241 12:26:34.992178 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948148/tftp-deploy-h6ydgl8z/kernel
2242 12:26:34.992727 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948148/tftp-deploy-h6ydgl8z/nfsrootfs
2243 12:26:35.030291 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948148/tftp-deploy-h6ydgl8z/modules
2244 12:26:35.030649 start: 4.1 power-off (timeout 00:00:30) [common]
2245 12:26:35.030813 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2246 12:26:35.049719 >> Command sent successfully.
2247 12:26:35.051723 Returned 0 in 0 seconds
2248 12:26:35.152827 end: 4.1 power-off (duration 00:00:00) [common]
2250 12:26:35.154449 start: 4.2 read-feedback (timeout 00:10:00) [common]
2251 12:26:35.155703 Listened to connection for namespace 'common' for up to 1s
2252 12:26:36.159038 Finalising connection for namespace 'common'
2253 12:26:36.159753 Disconnecting from shell: Finalise
2254 12:26:36.261284 end: 4.2 read-feedback (duration 00:00:01) [common]
2255 12:26:36.261992 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8948148
2256 12:26:36.426317 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8948148
2257 12:26:36.426511 JobError: Your job cannot terminate cleanly.