Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:22:18.985443 lava-dispatcher, installed at version: 2022.11
2 12:22:18.985625 start: 0 validate
3 12:22:18.985749 Start time: 2023-01-31 12:22:18.985742+00:00 (UTC)
4 12:22:18.985875 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:22:18.985997 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230127.0%2Famd64%2Finitrd.cpio.gz exists
6 12:22:19.297042 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:22:19.297801 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:22:19.594860 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:22:19.595647 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230127.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:22:19.894008 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:22:19.894725 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:22:20.196099 validate duration: 1.21
14 12:22:20.197580 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:22:20.198183 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:22:20.198762 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:22:20.199291 Not decompressing ramdisk as can be used compressed.
18 12:22:20.200211 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230127.0/amd64/initrd.cpio.gz
19 12:22:20.200707 saving as /var/lib/lava/dispatcher/tmp/8948149/tftp-deploy-6l1x5blo/ramdisk/initrd.cpio.gz
20 12:22:20.201081 total size: 5432098 (5MB)
21 12:22:20.207465 progress 0% (0MB)
22 12:22:20.217008 progress 5% (0MB)
23 12:22:20.224561 progress 10% (0MB)
24 12:22:20.229325 progress 15% (0MB)
25 12:22:20.233472 progress 20% (1MB)
26 12:22:20.236724 progress 25% (1MB)
27 12:22:20.239375 progress 30% (1MB)
28 12:22:20.242218 progress 35% (1MB)
29 12:22:20.244470 progress 40% (2MB)
30 12:22:20.247702 progress 45% (2MB)
31 12:22:20.252260 progress 50% (2MB)
32 12:22:20.257337 progress 55% (2MB)
33 12:22:20.262406 progress 60% (3MB)
34 12:22:20.266729 progress 65% (3MB)
35 12:22:20.271148 progress 70% (3MB)
36 12:22:20.276011 progress 75% (3MB)
37 12:22:20.280111 progress 80% (4MB)
38 12:22:20.284613 progress 85% (4MB)
39 12:22:20.290221 progress 90% (4MB)
40 12:22:20.294101 progress 95% (4MB)
41 12:22:20.298634 progress 100% (5MB)
42 12:22:20.298912 5MB downloaded in 0.10s (52.95MB/s)
43 12:22:20.299072 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:22:20.299347 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:22:20.299452 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:22:20.299551 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:22:20.299668 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:22:20.299741 saving as /var/lib/lava/dispatcher/tmp/8948149/tftp-deploy-6l1x5blo/kernel/bzImage
50 12:22:20.299822 total size: 7569296 (7MB)
51 12:22:20.299899 No compression specified
52 12:22:20.301971 progress 0% (0MB)
53 12:22:20.308220 progress 5% (0MB)
54 12:22:20.314805 progress 10% (0MB)
55 12:22:20.321340 progress 15% (1MB)
56 12:22:20.327679 progress 20% (1MB)
57 12:22:20.333843 progress 25% (1MB)
58 12:22:20.340342 progress 30% (2MB)
59 12:22:20.347643 progress 35% (2MB)
60 12:22:20.353372 progress 40% (2MB)
61 12:22:20.359160 progress 45% (3MB)
62 12:22:20.366618 progress 50% (3MB)
63 12:22:20.372920 progress 55% (4MB)
64 12:22:20.379037 progress 60% (4MB)
65 12:22:20.385460 progress 65% (4MB)
66 12:22:20.392376 progress 70% (5MB)
67 12:22:20.398290 progress 75% (5MB)
68 12:22:20.404499 progress 80% (5MB)
69 12:22:20.411184 progress 85% (6MB)
70 12:22:20.417646 progress 90% (6MB)
71 12:22:20.424065 progress 95% (6MB)
72 12:22:20.430227 progress 100% (7MB)
73 12:22:20.430531 7MB downloaded in 0.13s (55.23MB/s)
74 12:22:20.430694 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:22:20.430964 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:22:20.431069 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:22:20.431172 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:22:20.431291 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230127.0/amd64/full.rootfs.tar.xz
80 12:22:20.431365 saving as /var/lib/lava/dispatcher/tmp/8948149/tftp-deploy-6l1x5blo/nfsrootfs/full.rootfs.tar
81 12:22:20.431450 total size: 207177260 (197MB)
82 12:22:20.431535 Using unxz to decompress xz
83 12:22:20.435965 progress 0% (0MB)
84 12:22:20.987234 progress 5% (9MB)
85 12:22:21.523425 progress 10% (19MB)
86 12:22:22.113938 progress 15% (29MB)
87 12:22:22.486087 progress 20% (39MB)
88 12:22:22.834022 progress 25% (49MB)
89 12:22:23.412947 progress 30% (59MB)
90 12:22:23.947653 progress 35% (69MB)
91 12:22:24.536978 progress 40% (79MB)
92 12:22:25.081839 progress 45% (88MB)
93 12:22:25.647038 progress 50% (98MB)
94 12:22:26.261222 progress 55% (108MB)
95 12:22:26.935484 progress 60% (118MB)
96 12:22:27.084371 progress 65% (128MB)
97 12:22:27.230469 progress 70% (138MB)
98 12:22:27.327693 progress 75% (148MB)
99 12:22:27.400620 progress 80% (158MB)
100 12:22:27.467302 progress 85% (167MB)
101 12:22:27.568388 progress 90% (177MB)
102 12:22:27.830610 progress 95% (187MB)
103 12:22:28.409165 progress 100% (197MB)
104 12:22:28.414794 197MB downloaded in 7.98s (24.75MB/s)
105 12:22:28.415051 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:22:28.415321 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:22:28.415416 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:22:28.415509 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:22:28.415631 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:22:28.415702 saving as /var/lib/lava/dispatcher/tmp/8948149/tftp-deploy-6l1x5blo/modules/modules.tar
112 12:22:28.415767 total size: 51860 (0MB)
113 12:22:28.415833 Using unxz to decompress xz
114 12:22:28.421285 progress 63% (0MB)
115 12:22:28.421659 progress 100% (0MB)
116 12:22:28.424842 0MB downloaded in 0.01s (5.45MB/s)
117 12:22:28.425046 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:22:28.425307 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:22:28.425405 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 12:22:28.425504 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 12:22:30.387370 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8948149/extract-nfsrootfs-q2bagkbd
123 12:22:30.387599 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:22:30.387708 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 12:22:30.387847 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp
126 12:22:30.387949 makedir: /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin
127 12:22:30.388034 makedir: /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/tests
128 12:22:30.388116 makedir: /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/results
129 12:22:30.388218 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-add-keys
130 12:22:30.388374 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-add-sources
131 12:22:30.388520 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-background-process-start
132 12:22:30.388631 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-background-process-stop
133 12:22:30.388740 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-common-functions
134 12:22:30.388848 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-echo-ipv4
135 12:22:30.388955 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-install-packages
136 12:22:30.389060 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-installed-packages
137 12:22:30.389166 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-os-build
138 12:22:30.389272 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-probe-channel
139 12:22:30.389377 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-probe-ip
140 12:22:30.389482 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-target-ip
141 12:22:30.389587 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-target-mac
142 12:22:30.389692 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-target-storage
143 12:22:30.389800 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-test-case
144 12:22:30.389909 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-test-event
145 12:22:30.390014 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-test-feedback
146 12:22:30.390134 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-test-raise
147 12:22:30.390242 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-test-reference
148 12:22:30.390389 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-test-runner
149 12:22:30.390495 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-test-set
150 12:22:30.390600 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-test-shell
151 12:22:30.390707 Updating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-add-keys (debian)
152 12:22:30.390817 Updating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-add-sources (debian)
153 12:22:30.390926 Updating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-install-packages (debian)
154 12:22:30.391033 Updating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-installed-packages (debian)
155 12:22:30.391140 Updating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/bin/lava-os-build (debian)
156 12:22:30.391234 Creating /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/environment
157 12:22:30.391317 LAVA metadata
158 12:22:30.391381 - LAVA_JOB_ID=8948149
159 12:22:30.391444 - LAVA_DISPATCHER_IP=192.168.201.1
160 12:22:30.391540 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
161 12:22:30.391603 skipped lava-vland-overlay
162 12:22:30.391677 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 12:22:30.391756 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
164 12:22:30.391816 skipped lava-multinode-overlay
165 12:22:30.391889 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 12:22:30.391968 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
167 12:22:30.392037 Loading test definitions
168 12:22:30.392126 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
169 12:22:30.392195 Using /lava-8948149 at stage 0
170 12:22:30.392589 uuid=8948149_1.5.2.3.1 testdef=None
171 12:22:30.392678 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 12:22:30.392764 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
173 12:22:30.393166 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 12:22:30.393400 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
176 12:22:30.393870 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 12:22:30.394111 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
179 12:22:30.394556 runner path: /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/0/tests/0_timesync-off test_uuid 8948149_1.5.2.3.1
180 12:22:30.394696 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 12:22:30.394928 start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
183 12:22:30.395002 Using /lava-8948149 at stage 0
184 12:22:30.395097 Fetching tests from https://github.com/kernelci/test-definitions.git
185 12:22:30.395178 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/0/tests/1_kselftest-rtc'
186 12:22:34.644831 Running '/usr/bin/git checkout kernelci.org
187 12:22:34.777554 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
188 12:22:34.778233 uuid=8948149_1.5.2.3.5 testdef=None
189 12:22:34.778427 end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
191 12:22:34.778686 start: 1.5.2.3.6 test-overlay (timeout 00:09:45) [common]
192 12:22:34.779433 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 12:22:34.779705 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:45) [common]
195 12:22:34.780644 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 12:22:34.780892 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
198 12:22:34.781808 runner path: /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/0/tests/1_kselftest-rtc test_uuid 8948149_1.5.2.3.5
199 12:22:34.781899 BOARD='asus-C436FA-Flip-hatch'
200 12:22:34.781967 BRANCH='cip'
201 12:22:34.782028 SKIPFILE='skipfile-lkft.yaml'
202 12:22:34.782089 SKIP_INSTALL='True'
203 12:22:34.782148 TESTPROG_URL='None'
204 12:22:34.782206 TST_CASENAME=''
205 12:22:34.782264 TST_CMDFILES='rtc'
206 12:22:34.782394 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
208 12:22:34.782619 Creating lava-test-runner.conf files
209 12:22:34.782685 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8948149/lava-overlay-0w1ptqbp/lava-8948149/0 for stage 0
210 12:22:34.782771 - 0_timesync-off
211 12:22:34.782841 - 1_kselftest-rtc
212 12:22:34.782930 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
213 12:22:34.783016 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
214 12:22:42.098104 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
215 12:22:42.098272 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
216 12:22:42.098367 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
217 12:22:42.098468 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
218 12:22:42.098559 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
219 12:22:42.198740 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
220 12:22:42.199085 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
221 12:22:42.199198 extracting modules file /var/lib/lava/dispatcher/tmp/8948149/tftp-deploy-6l1x5blo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8948149/extract-nfsrootfs-q2bagkbd
222 12:22:42.203250 extracting modules file /var/lib/lava/dispatcher/tmp/8948149/tftp-deploy-6l1x5blo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8948149/extract-overlay-ramdisk-d6jgtt6d/ramdisk
223 12:22:42.206973 end: 1.5.4 extract-modules (duration 00:00:00) [common]
224 12:22:42.207081 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
225 12:22:42.207169 [common] Applying overlay to NFS
226 12:22:42.207243 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8948149/compress-overlay-ps3hdplj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8948149/extract-nfsrootfs-q2bagkbd
227 12:22:42.652387 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
228 12:22:42.652558 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
229 12:22:42.652657 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
230 12:22:42.652756 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
231 12:22:42.652843 Building ramdisk /var/lib/lava/dispatcher/tmp/8948149/extract-overlay-ramdisk-d6jgtt6d/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8948149/extract-overlay-ramdisk-d6jgtt6d/ramdisk
232 12:22:42.685584 >> 24548 blocks
233 12:22:43.150171 rename /var/lib/lava/dispatcher/tmp/8948149/extract-overlay-ramdisk-d6jgtt6d/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8948149/tftp-deploy-6l1x5blo/ramdisk/ramdisk.cpio.gz
234 12:22:43.150582 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
235 12:22:43.150713 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
236 12:22:43.150817 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
237 12:22:43.150913 No mkimage arch provided, not using FIT.
238 12:22:43.151003 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
239 12:22:43.151099 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
240 12:22:43.151202 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
241 12:22:43.151295 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
242 12:22:43.151373 No LXC device requested
243 12:22:43.151457 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
244 12:22:43.151548 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
245 12:22:43.151633 end: 1.7 deploy-device-env (duration 00:00:00) [common]
246 12:22:43.151704 Checking files for TFTP limit of 4294967296 bytes.
247 12:22:43.152086 end: 1 tftp-deploy (duration 00:00:23) [common]
248 12:22:43.152194 start: 2 depthcharge-action (timeout 00:05:00) [common]
249 12:22:43.152286 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
250 12:22:43.152461 substitutions:
251 12:22:43.152531 - {DTB}: None
252 12:22:43.152597 - {INITRD}: 8948149/tftp-deploy-6l1x5blo/ramdisk/ramdisk.cpio.gz
253 12:22:43.152661 - {KERNEL}: 8948149/tftp-deploy-6l1x5blo/kernel/bzImage
254 12:22:43.152722 - {LAVA_MAC}: None
255 12:22:43.152783 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8948149/extract-nfsrootfs-q2bagkbd
256 12:22:43.152843 - {NFS_SERVER_IP}: 192.168.201.1
257 12:22:43.152901 - {PRESEED_CONFIG}: None
258 12:22:43.152959 - {PRESEED_LOCAL}: None
259 12:22:43.153016 - {RAMDISK}: 8948149/tftp-deploy-6l1x5blo/ramdisk/ramdisk.cpio.gz
260 12:22:43.153074 - {ROOT_PART}: None
261 12:22:43.153131 - {ROOT}: None
262 12:22:43.153187 - {SERVER_IP}: 192.168.201.1
263 12:22:43.153253 - {TEE}: None
264 12:22:43.153311 Parsed boot commands:
265 12:22:43.153367 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
266 12:22:43.153521 Parsed boot commands: tftpboot 192.168.201.1 8948149/tftp-deploy-6l1x5blo/kernel/bzImage 8948149/tftp-deploy-6l1x5blo/kernel/cmdline 8948149/tftp-deploy-6l1x5blo/ramdisk/ramdisk.cpio.gz
267 12:22:43.153616 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
268 12:22:43.153707 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
269 12:22:43.153799 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
270 12:22:43.153889 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
271 12:22:43.153961 Not connected, no need to disconnect.
272 12:22:43.154041 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
273 12:22:43.154125 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
274 12:22:43.154196 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
275 12:22:43.156955 Setting prompt string to ['lava-test: # ']
276 12:22:43.157238 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
277 12:22:43.157347 end: 2.2.1 reset-connection (duration 00:00:00) [common]
278 12:22:43.157447 start: 2.2.2 reset-device (timeout 00:05:00) [common]
279 12:22:43.157544 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
280 12:22:43.157720 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
281 12:22:43.176580 >> Command sent successfully.
282 12:22:43.178352 Returned 0 in 0 seconds
283 12:22:43.279510 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
285 12:22:43.281061 end: 2.2.2 reset-device (duration 00:00:00) [common]
286 12:22:43.281573 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
287 12:22:43.282021 Setting prompt string to 'Starting depthcharge on Helios...'
288 12:22:43.282373 Changing prompt to 'Starting depthcharge on Helios...'
289 12:22:43.282731 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
290 12:22:43.283954 [Enter `^Ec?' for help]
291 12:22:50.490512
292 12:22:50.491188
293 12:22:50.500776 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 12:22:50.504247 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 12:22:50.510852 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 12:22:50.513867 CPU: AES supported, TXT NOT supported, VT supported
297 12:22:50.520948 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 12:22:50.523907 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 12:22:50.530726 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 12:22:50.533874 VBOOT: Loading verstage.
301 12:22:50.537293 FMAP: Found "FLASH" version 1.1 at 0xc04000.
302 12:22:50.544297 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 12:22:50.547007 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 12:22:50.550803 CBFS @ c08000 size 3f8000
305 12:22:50.557478 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 12:22:50.560741 CBFS: Locating 'fallback/verstage'
307 12:22:50.563888 CBFS: Found @ offset 10fb80 size 1072c
308 12:22:50.564396
309 12:22:50.564789
310 12:22:50.576931 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 12:22:50.591177 Probing TPM: . done!
312 12:22:50.594048 TPM ready after 0 ms
313 12:22:50.597626 Connected to device vid:did:rid of 1ae0:0028:00
314 12:22:50.607747 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
315 12:22:50.611184 Initialized TPM device CR50 revision 0
316 12:22:50.654999 tlcl_send_startup: Startup return code is 0
317 12:22:50.655605 TPM: setup succeeded
318 12:22:50.667818 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 12:22:50.671578 Chrome EC: UHEPI supported
320 12:22:50.674782 Phase 1
321 12:22:50.678363 FMAP: area GBB found @ c05000 (12288 bytes)
322 12:22:50.685022 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
323 12:22:50.685673 Phase 2
324 12:22:50.688226 Phase 3
325 12:22:50.691754 FMAP: area GBB found @ c05000 (12288 bytes)
326 12:22:50.697995 VB2:vb2_report_dev_firmware() This is developer signed firmware
327 12:22:50.704771 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
328 12:22:50.708022 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
329 12:22:50.714563 VB2:vb2_verify_keyblock() Checking keyblock signature...
330 12:22:50.730151 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
331 12:22:50.733253 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
332 12:22:50.740209 VB2:vb2_verify_fw_preamble() Verifying preamble.
333 12:22:50.744683 Phase 4
334 12:22:50.747490 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
335 12:22:50.754219 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
336 12:22:50.934036 VB2:vb2_rsa_verify_digest() Digest check failed!
337 12:22:50.937152 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
338 12:22:50.940974
339 12:22:50.941572 Saving nvdata
340 12:22:50.943734 Reboot requested (10020007)
341 12:22:50.946805 board_reset() called!
342 12:22:50.947304 full_reset() called!
343 12:22:55.457013
344 12:22:55.457657
345 12:22:55.466812 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
346 12:22:55.470743 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
347 12:22:55.476972 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
348 12:22:55.479984 CPU: AES supported, TXT NOT supported, VT supported
349 12:22:55.486900 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
350 12:22:55.489924 PCH: device id 0284 (rev 00) is Cometlake-U Premium
351 12:22:55.496971 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
352 12:22:55.500283 VBOOT: Loading verstage.
353 12:22:55.503767 FMAP: Found "FLASH" version 1.1 at 0xc04000.
354 12:22:55.510225 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
355 12:22:55.513904 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
356 12:22:55.516812
357 12:22:55.517396 CBFS @ c08000 size 3f8000
358 12:22:55.523559 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
359 12:22:55.527181 CBFS: Locating 'fallback/verstage'
360 12:22:55.530174 CBFS: Found @ offset 10fb80 size 1072c
361 12:22:55.534680
362 12:22:55.535272
363 12:22:55.544458 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
364 12:22:55.558638 Probing TPM: . done!
365 12:22:55.561661 TPM ready after 0 ms
366 12:22:55.565251 Connected to device vid:did:rid of 1ae0:0028:00
367 12:22:55.575226 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
368 12:22:55.579211 Initialized TPM device CR50 revision 0
369 12:22:55.622294 tlcl_send_startup: Startup return code is 0
370 12:22:55.622876 TPM: setup succeeded
371 12:22:55.635315 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
372 12:22:55.638445 Chrome EC: UHEPI supported
373 12:22:55.642562 Phase 1
374 12:22:55.645337 FMAP: area GBB found @ c05000 (12288 bytes)
375 12:22:55.653110 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
376 12:22:55.658362 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
377 12:22:55.661756 Recovery requested (1009000e)
378 12:22:55.667660 Saving nvdata
379 12:22:55.674111 tlcl_extend: response is 0
380 12:22:55.682959 tlcl_extend: response is 0
381 12:22:55.689698 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
382 12:22:55.693852 CBFS @ c08000 size 3f8000
383 12:22:55.699720 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
384 12:22:55.703140 CBFS: Locating 'fallback/romstage'
385 12:22:55.706448 CBFS: Found @ offset 80 size 145fc
386 12:22:55.709759 Accumulated console time in verstage 99 ms
387 12:22:55.710350
388 12:22:55.710850
389 12:22:55.722425 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
390 12:22:55.729316 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
391 12:22:55.732414 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
392 12:22:55.735544 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
393 12:22:55.742817 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
394 12:22:55.746082 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
395 12:22:55.749432 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
396 12:22:55.752348 TCO_STS: 0000 0000
397 12:22:55.756412 GEN_PMCON: e0015238 00000200
398 12:22:55.758810 GBLRST_CAUSE: 00000000 00000000
399 12:22:55.759448 prev_sleep_state 5
400 12:22:55.762368 Boot Count incremented to 53183
401 12:22:55.769323 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 12:22:55.772981 CBFS @ c08000 size 3f8000
403 12:22:55.779088 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 12:22:55.779687 CBFS: Locating 'fspm.bin'
405 12:22:55.785952 CBFS: Found @ offset 5ffc0 size 71000
406 12:22:55.789606 Chrome EC: UHEPI supported
407 12:22:55.795395 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
408 12:22:55.799810 Probing TPM: done!
409 12:22:55.806210 Connected to device vid:did:rid of 1ae0:0028:00
410 12:22:55.816001 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
411 12:22:55.822051 Initialized TPM device CR50 revision 0
412 12:22:55.831153 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
413 12:22:55.838156 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
414 12:22:55.841265 MRC cache found, size 1948
415 12:22:55.844698 bootmode is set to: 2
416 12:22:55.847508 PRMRR disabled by config.
417 12:22:55.848101 SPD INDEX = 1
418 12:22:55.850997
419 12:22:55.854218 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
420 12:22:55.857434 CBFS @ c08000 size 3f8000
421 12:22:55.864007 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
422 12:22:55.864534 CBFS: Locating 'spd.bin'
423 12:22:55.868358 CBFS: Found @ offset 5fb80 size 400
424 12:22:55.871116 SPD: module type is LPDDR3
425 12:22:55.874303 SPD: module part is
426 12:22:55.881025 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
427 12:22:55.883965 SPD: device width 4 bits, bus width 8 bits
428 12:22:55.887560 SPD: module size is 4096 MB (per channel)
429 12:22:55.890872 memory slot: 0 configuration done.
430 12:22:55.894368 memory slot: 2 configuration done.
431 12:22:55.945573 CBMEM:
432 12:22:55.948810 IMD: root @ 99fff000 254 entries.
433 12:22:55.952133 IMD: root @ 99ffec00 62 entries.
434 12:22:55.955581 External stage cache:
435 12:22:55.958707 IMD: root @ 9abff000 254 entries.
436 12:22:55.962042 IMD: root @ 9abfec00 62 entries.
437 12:22:55.965405 Chrome EC: clear events_b mask to 0x0000000020004000
438 12:22:55.981182 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
439 12:22:55.994598 tlcl_write: response is 0
440 12:22:56.003876 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
441 12:22:56.010615 MRC: TPM MRC hash updated successfully.
442 12:22:56.011206 2 DIMMs found
443 12:22:56.013905 SMM Memory Map
444 12:22:56.017256 SMRAM : 0x9a000000 0x1000000
445 12:22:56.020882 Subregion 0: 0x9a000000 0xa00000
446 12:22:56.023604 Subregion 1: 0x9aa00000 0x200000
447 12:22:56.027375 Subregion 2: 0x9ac00000 0x400000
448 12:22:56.030551 top_of_ram = 0x9a000000
449 12:22:56.033698 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
450 12:22:56.040329 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
451 12:22:56.043788 MTRR Range: Start=ff000000 End=0 (Size 1000000)
452 12:22:56.050052 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 12:22:56.053150 CBFS @ c08000 size 3f8000
454 12:22:56.056725 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 12:22:56.059925 CBFS: Locating 'fallback/postcar'
456 12:22:56.063161 CBFS: Found @ offset 107000 size 4b44
457 12:22:56.066455
458 12:22:56.069708 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
459 12:22:56.082651 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
460 12:22:56.085660 Processing 180 relocs. Offset value of 0x97c0c000
461 12:22:56.094566 Accumulated console time in romstage 286 ms
462 12:22:56.095159
463 12:22:56.095557
464 12:22:56.104483 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
465 12:22:56.110955 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 12:22:56.114389 CBFS @ c08000 size 3f8000
467 12:22:56.117929 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 12:22:56.121205 CBFS: Locating 'fallback/ramstage'
469 12:22:56.124206
470 12:22:56.127988 CBFS: Found @ offset 43380 size 1b9e8
471 12:22:56.134198 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
472 12:22:56.166144 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
473 12:22:56.169272 Processing 3976 relocs. Offset value of 0x98db0000
474 12:22:56.176423 Accumulated console time in postcar 52 ms
475 12:22:56.177009
476 12:22:56.177451
477 12:22:56.185994 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
478 12:22:56.192415 FMAP: area RO_VPD found @ c00000 (16384 bytes)
479 12:22:56.195660 WARNING: RO_VPD is uninitialized or empty.
480 12:22:56.199427 FMAP: area RW_VPD found @ af8000 (8192 bytes)
481 12:22:56.205865 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 12:22:56.206532 Normal boot.
483 12:22:56.212462 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
484 12:22:56.215951 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
485 12:22:56.219407 CBFS @ c08000 size 3f8000
486 12:22:56.225644 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
487 12:22:56.229058 CBFS: Locating 'cpu_microcode_blob.bin'
488 12:22:56.232464 CBFS: Found @ offset 14700 size 2ec00
489 12:22:56.235712 microcode: sig=0x806ec pf=0x4 revision=0xc9
490 12:22:56.239074 Skip microcode update
491 12:22:56.245147 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
492 12:22:56.245733 CBFS @ c08000 size 3f8000
493 12:22:56.252248 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
494 12:22:56.255536 CBFS: Locating 'fsps.bin'
495 12:22:56.258807 CBFS: Found @ offset d1fc0 size 35000
496 12:22:56.285026 Detected 4 core, 8 thread CPU.
497 12:22:56.288246 Setting up SMI for CPU
498 12:22:56.290974 IED base = 0x9ac00000
499 12:22:56.291567 IED size = 0x00400000
500 12:22:56.294042 Will perform SMM setup.
501 12:22:56.301134 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
502 12:22:56.307636 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
503 12:22:56.310820 Processing 16 relocs. Offset value of 0x00030000
504 12:22:56.314591 Attempting to start 7 APs
505 12:22:56.317842 Waiting for 10ms after sending INIT.
506 12:22:56.334117 Waiting for 1st SIPI to complete...done.
507 12:22:56.334719 AP: slot 4 apic_id 2.
508 12:22:56.337332 AP: slot 5 apic_id 3.
509 12:22:56.341331 AP: slot 3 apic_id 7.
510 12:22:56.341935 AP: slot 2 apic_id 6.
511 12:22:56.344192 AP: slot 6 apic_id 5.
512 12:22:56.347758 AP: slot 7 apic_id 4.
513 12:22:56.348390 AP: slot 1 apic_id 1.
514 12:22:56.354033 Waiting for 2nd SIPI to complete...done.
515 12:22:56.360645 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
516 12:22:56.363968 Processing 13 relocs. Offset value of 0x00038000
517 12:22:56.370663 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
518 12:22:56.377753 Installing SMM handler to 0x9a000000
519 12:22:56.384148 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
520 12:22:56.387498 Processing 658 relocs. Offset value of 0x9a010000
521 12:22:56.397212 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
522 12:22:56.400697 Processing 13 relocs. Offset value of 0x9a008000
523 12:22:56.406838 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
524 12:22:56.413802 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
525 12:22:56.417451 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
526 12:22:56.423859 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
527 12:22:56.430431 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
528 12:22:56.437111 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
529 12:22:56.440495 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
530 12:22:56.446845 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
531 12:22:56.450021 Clearing SMI status registers
532 12:22:56.454019 SMI_STS: PM1
533 12:22:56.454638 PM1_STS: PWRBTN
534 12:22:56.456918 TCO_STS: SECOND_TO
535 12:22:56.460170 New SMBASE 0x9a000000
536 12:22:56.463412 In relocation handler: CPU 0
537 12:22:56.467168 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
538 12:22:56.470652 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 12:22:56.473525 Relocation complete.
540 12:22:56.476992 New SMBASE 0x99fffc00
541 12:22:56.477483 In relocation handler: CPU 1
542 12:22:56.483494 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
543 12:22:56.487019 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 12:22:56.490342 Relocation complete.
545 12:22:56.490885 New SMBASE 0x99fff800
546 12:22:56.493406
547 12:22:56.493851 In relocation handler: CPU 2
548 12:22:56.500423 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
549 12:22:56.503131 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 12:22:56.506932 Relocation complete.
551 12:22:56.507477 New SMBASE 0x99ffe400
552 12:22:56.510351 In relocation handler: CPU 7
553 12:22:56.516834 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
554 12:22:56.520003 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 12:22:56.523540 Relocation complete.
556 12:22:56.523980 New SMBASE 0x99ffe800
557 12:22:56.526365 In relocation handler: CPU 6
558 12:22:56.529961 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
559 12:22:56.533434
560 12:22:56.536496 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 12:22:56.539968 Relocation complete.
562 12:22:56.540574 New SMBASE 0x99fff400
563 12:22:56.543242 In relocation handler: CPU 3
564 12:22:56.546414 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
565 12:22:56.553213 Writing SMRR. base = 0x9a000006, mask=0xff000800
566 12:22:56.556477 Relocation complete.
567 12:22:56.557058 New SMBASE 0x99ffec00
568 12:22:56.559750 In relocation handler: CPU 5
569 12:22:56.563020 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
570 12:22:56.569815 Writing SMRR. base = 0x9a000006, mask=0xff000800
571 12:22:56.570263 Relocation complete.
572 12:22:56.572821
573 12:22:56.573264 New SMBASE 0x99fff000
574 12:22:56.576605 In relocation handler: CPU 4
575 12:22:56.579467 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
576 12:22:56.586701 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 12:22:56.587293 Relocation complete.
578 12:22:56.590478 Initializing CPU #0
579 12:22:56.592991 CPU: vendor Intel device 806ec
580 12:22:56.596592 CPU: family 06, model 8e, stepping 0c
581 12:22:56.599746 Clearing out pending MCEs
582 12:22:56.603097 Setting up local APIC...
583 12:22:56.603586 apic_id: 0x00 done.
584 12:22:56.606555 Turbo is available but hidden
585 12:22:56.609898 Turbo is available and visible
586 12:22:56.613025 VMX status: enabled
587 12:22:56.616593 IA32_FEATURE_CONTROL status: locked
588 12:22:56.619973 Skip microcode update
589 12:22:56.620591 CPU #0 initialized
590 12:22:56.623344 Initializing CPU #1
591 12:22:56.623981 Initializing CPU #3
592 12:22:56.626642 Initializing CPU #2
593 12:22:56.629750 CPU: vendor Intel device 806ec
594 12:22:56.633236 CPU: family 06, model 8e, stepping 0c
595 12:22:56.636492 CPU: vendor Intel device 806ec
596 12:22:56.639347 CPU: family 06, model 8e, stepping 0c
597 12:22:56.643021 Clearing out pending MCEs
598 12:22:56.645960 Clearing out pending MCEs
599 12:22:56.649501 Setting up local APIC...
600 12:22:56.649993 Initializing CPU #4
601 12:22:56.652678 Initializing CPU #5
602 12:22:56.657070 CPU: vendor Intel device 806ec
603 12:22:56.659846 CPU: family 06, model 8e, stepping 0c
604 12:22:56.662623 CPU: vendor Intel device 806ec
605 12:22:56.665843 CPU: family 06, model 8e, stepping 0c
606 12:22:56.669151 Clearing out pending MCEs
607 12:22:56.673000 Clearing out pending MCEs
608 12:22:56.673488 Setting up local APIC...
609 12:22:56.676910 Initializing CPU #6
610 12:22:56.679244 Initializing CPU #7
611 12:22:56.682541 CPU: vendor Intel device 806ec
612 12:22:56.685567 CPU: family 06, model 8e, stepping 0c
613 12:22:56.689376 CPU: vendor Intel device 806ec
614 12:22:56.692775 CPU: family 06, model 8e, stepping 0c
615 12:22:56.695927 Clearing out pending MCEs
616 12:22:56.696557 Clearing out pending MCEs
617 12:22:56.699288 Setting up local APIC...
618 12:22:56.702339 CPU: vendor Intel device 806ec
619 12:22:56.705495 CPU: family 06, model 8e, stepping 0c
620 12:22:56.708683 Clearing out pending MCEs
621 12:22:56.712250 apic_id: 0x02 done.
622 12:22:56.712824 Setting up local APIC...
623 12:22:56.715464 Setting up local APIC...
624 12:22:56.718751 apic_id: 0x05 done.
625 12:22:56.722482 Setting up local APIC...
626 12:22:56.723076 apic_id: 0x07 done.
627 12:22:56.725465 apic_id: 0x06 done.
628 12:22:56.728776 VMX status: enabled
629 12:22:56.729267 VMX status: enabled
630 12:22:56.732293 IA32_FEATURE_CONTROL status: locked
631 12:22:56.735873 IA32_FEATURE_CONTROL status: locked
632 12:22:56.738551 Skip microcode update
633 12:22:56.742153 Skip microcode update
634 12:22:56.742736 CPU #3 initialized
635 12:22:56.745551 apic_id: 0x04 done.
636 12:22:56.748913 VMX status: enabled
637 12:22:56.749500 VMX status: enabled
638 12:22:56.752227 IA32_FEATURE_CONTROL status: locked
639 12:22:56.755449 IA32_FEATURE_CONTROL status: locked
640 12:22:56.758625 Skip microcode update
641 12:22:56.761734 Skip microcode update
642 12:22:56.762266 CPU #6 initialized
643 12:22:56.765174 CPU #7 initialized
644 12:22:56.765669 apic_id: 0x03 done.
645 12:22:56.768784
646 12:22:56.769277 VMX status: enabled
647 12:22:56.772184 VMX status: enabled
648 12:22:56.775200 IA32_FEATURE_CONTROL status: locked
649 12:22:56.778903 IA32_FEATURE_CONTROL status: locked
650 12:22:56.782335 Skip microcode update
651 12:22:56.782924 Skip microcode update
652 12:22:56.785876 CPU #4 initialized
653 12:22:56.786465 CPU #5 initialized
654 12:22:56.789137 CPU #2 initialized
655 12:22:56.791848 Setting up local APIC...
656 12:22:56.792382 apic_id: 0x01 done.
657 12:22:56.795285 VMX status: enabled
658 12:22:56.798903 IA32_FEATURE_CONTROL status: locked
659 12:22:56.802687 Skip microcode update
660 12:22:56.803282 CPU #1 initialized
661 12:22:56.808266 bsp_do_flight_plan done after 452 msecs.
662 12:22:56.812215 CPU: frequency set to 4200 MHz
663 12:22:56.812877 Enabling SMIs.
664 12:22:56.814984 Locking SMM.
665 12:22:56.828582 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
666 12:22:56.832008 CBFS @ c08000 size 3f8000
667 12:22:56.835975 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
668 12:22:56.838043
669 12:22:56.838557 CBFS: Locating 'vbt.bin'
670 12:22:56.841653 CBFS: Found @ offset 5f5c0 size 499
671 12:22:56.848307 Found a VBT of 4608 bytes after decompression
672 12:22:57.033682 Display FSP Version Info HOB
673 12:22:57.037061 Reference Code - CPU = 9.0.1e.30
674 12:22:57.040002 uCode Version = 0.0.0.ca
675 12:22:57.043400 TXT ACM version = ff.ff.ff.ffff
676 12:22:57.046760 Display FSP Version Info HOB
677 12:22:57.049966 Reference Code - ME = 9.0.1e.30
678 12:22:57.053674 MEBx version = 0.0.0.0
679 12:22:57.056574 ME Firmware Version = Consumer SKU
680 12:22:57.060045 Display FSP Version Info HOB
681 12:22:57.063177 Reference Code - CML PCH = 9.0.1e.30
682 12:22:57.066900 PCH-CRID Status = Disabled
683 12:22:57.069483 PCH-CRID Original Value = ff.ff.ff.ffff
684 12:22:57.073024 PCH-CRID New Value = ff.ff.ff.ffff
685 12:22:57.076039 OPROM - RST - RAID = ff.ff.ff.ffff
686 12:22:57.080155 ChipsetInit Base Version = ff.ff.ff.ffff
687 12:22:57.082987 ChipsetInit Oem Version = ff.ff.ff.ffff
688 12:22:57.086676 Display FSP Version Info HOB
689 12:22:57.093051 Reference Code - SA - System Agent = 9.0.1e.30
690 12:22:57.096254 Reference Code - MRC = 0.7.1.6c
691 12:22:57.099734 SA - PCIe Version = 9.0.1e.30
692 12:22:57.100375 SA-CRID Status = Disabled
693 12:22:57.102814 SA-CRID Original Value = 0.0.0.c
694 12:22:57.105658 SA-CRID New Value = 0.0.0.c
695 12:22:57.109357 OPROM - VBIOS = ff.ff.ff.ffff
696 12:22:57.112932 RTC Init
697 12:22:57.115986 Set power on after power failure.
698 12:22:57.116612 Disabling Deep S3
699 12:22:57.119501 Disabling Deep S3
700 12:22:57.120100 Disabling Deep S4
701 12:22:57.122155 Disabling Deep S4
702 12:22:57.126132 Disabling Deep S5
703 12:22:57.126727 Disabling Deep S5
704 12:22:57.132471 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
705 12:22:57.135815 Enumerating buses...
706 12:22:57.138761 Show all devs... Before device enumeration.
707 12:22:57.142310 Root Device: enabled 1
708 12:22:57.142903 CPU_CLUSTER: 0: enabled 1
709 12:22:57.145371 DOMAIN: 0000: enabled 1
710 12:22:57.149025 APIC: 00: enabled 1
711 12:22:57.149636 PCI: 00:00.0: enabled 1
712 12:22:57.152060 PCI: 00:02.0: enabled 1
713 12:22:57.155885 PCI: 00:04.0: enabled 0
714 12:22:57.158742 PCI: 00:05.0: enabled 0
715 12:22:57.159234 PCI: 00:12.0: enabled 1
716 12:22:57.162766 PCI: 00:12.5: enabled 0
717 12:22:57.165232 PCI: 00:12.6: enabled 0
718 12:22:57.168683 PCI: 00:14.0: enabled 1
719 12:22:57.169177 PCI: 00:14.1: enabled 0
720 12:22:57.171731 PCI: 00:14.3: enabled 1
721 12:22:57.175242 PCI: 00:14.5: enabled 0
722 12:22:57.178432 PCI: 00:15.0: enabled 1
723 12:22:57.179051 PCI: 00:15.1: enabled 1
724 12:22:57.182285 PCI: 00:15.2: enabled 0
725 12:22:57.185596 PCI: 00:15.3: enabled 0
726 12:22:57.186193 PCI: 00:16.0: enabled 1
727 12:22:57.189603 PCI: 00:16.1: enabled 0
728 12:22:57.192051 PCI: 00:16.2: enabled 0
729 12:22:57.195788 PCI: 00:16.3: enabled 0
730 12:22:57.196420 PCI: 00:16.4: enabled 0
731 12:22:57.198610 PCI: 00:16.5: enabled 0
732 12:22:57.202368 PCI: 00:17.0: enabled 1
733 12:22:57.205199 PCI: 00:19.0: enabled 1
734 12:22:57.205794 PCI: 00:19.1: enabled 0
735 12:22:57.208763 PCI: 00:19.2: enabled 0
736 12:22:57.212449 PCI: 00:1a.0: enabled 0
737 12:22:57.215489 PCI: 00:1c.0: enabled 0
738 12:22:57.215982 PCI: 00:1c.1: enabled 0
739 12:22:57.218630 PCI: 00:1c.2: enabled 0
740 12:22:57.221579 PCI: 00:1c.3: enabled 0
741 12:22:57.222110 PCI: 00:1c.4: enabled 0
742 12:22:57.225397
743 12:22:57.225893 PCI: 00:1c.5: enabled 0
744 12:22:57.228893 PCI: 00:1c.6: enabled 0
745 12:22:57.232595 PCI: 00:1c.7: enabled 0
746 12:22:57.233192 PCI: 00:1d.0: enabled 1
747 12:22:57.235102 PCI: 00:1d.1: enabled 0
748 12:22:57.238830 PCI: 00:1d.2: enabled 0
749 12:22:57.241712 PCI: 00:1d.3: enabled 0
750 12:22:57.242309 PCI: 00:1d.4: enabled 0
751 12:22:57.245252 PCI: 00:1d.5: enabled 1
752 12:22:57.249216 PCI: 00:1e.0: enabled 1
753 12:22:57.251734 PCI: 00:1e.1: enabled 0
754 12:22:57.252364 PCI: 00:1e.2: enabled 1
755 12:22:57.254996 PCI: 00:1e.3: enabled 1
756 12:22:57.258326 PCI: 00:1f.0: enabled 1
757 12:22:57.258855 PCI: 00:1f.1: enabled 1
758 12:22:57.262021 PCI: 00:1f.2: enabled 1
759 12:22:57.265016 PCI: 00:1f.3: enabled 1
760 12:22:57.268401 PCI: 00:1f.4: enabled 1
761 12:22:57.268898 PCI: 00:1f.5: enabled 1
762 12:22:57.271730 PCI: 00:1f.6: enabled 0
763 12:22:57.274899 USB0 port 0: enabled 1
764 12:22:57.278518 I2C: 00:15: enabled 1
765 12:22:57.279152 I2C: 00:5d: enabled 1
766 12:22:57.281415 GENERIC: 0.0: enabled 1
767 12:22:57.284664 I2C: 00:1a: enabled 1
768 12:22:57.285258 I2C: 00:38: enabled 1
769 12:22:57.288103 I2C: 00:39: enabled 1
770 12:22:57.291971 I2C: 00:3a: enabled 1
771 12:22:57.292615 I2C: 00:3b: enabled 1
772 12:22:57.295233 PCI: 00:00.0: enabled 1
773 12:22:57.298099 SPI: 00: enabled 1
774 12:22:57.298602 SPI: 01: enabled 1
775 12:22:57.301472 PNP: 0c09.0: enabled 1
776 12:22:57.304867 USB2 port 0: enabled 1
777 12:22:57.305458 USB2 port 1: enabled 1
778 12:22:57.308458 USB2 port 2: enabled 0
779 12:22:57.311751 USB2 port 3: enabled 0
780 12:22:57.312376 USB2 port 5: enabled 0
781 12:22:57.314637 USB2 port 6: enabled 1
782 12:22:57.318070 USB2 port 9: enabled 1
783 12:22:57.321231 USB3 port 0: enabled 1
784 12:22:57.321732 USB3 port 1: enabled 1
785 12:22:57.324747 USB3 port 2: enabled 1
786 12:22:57.328482 USB3 port 3: enabled 1
787 12:22:57.329115 USB3 port 4: enabled 0
788 12:22:57.331469 APIC: 01: enabled 1
789 12:22:57.334553 APIC: 06: enabled 1
790 12:22:57.335146 APIC: 07: enabled 1
791 12:22:57.338146 APIC: 02: enabled 1
792 12:22:57.338738 APIC: 03: enabled 1
793 12:22:57.341036 APIC: 05: enabled 1
794 12:22:57.344748 APIC: 04: enabled 1
795 12:22:57.345337 Compare with tree...
796 12:22:57.348131 Root Device: enabled 1
797 12:22:57.350996 CPU_CLUSTER: 0: enabled 1
798 12:22:57.351503 APIC: 00: enabled 1
799 12:22:57.354509
800 12:22:57.355009 APIC: 01: enabled 1
801 12:22:57.357931 APIC: 06: enabled 1
802 12:22:57.361195 APIC: 07: enabled 1
803 12:22:57.361691 APIC: 02: enabled 1
804 12:22:57.364275 APIC: 03: enabled 1
805 12:22:57.367775 APIC: 05: enabled 1
806 12:22:57.368270 APIC: 04: enabled 1
807 12:22:57.371112 DOMAIN: 0000: enabled 1
808 12:22:57.375188 PCI: 00:00.0: enabled 1
809 12:22:57.377826 PCI: 00:02.0: enabled 1
810 12:22:57.378323 PCI: 00:04.0: enabled 0
811 12:22:57.380965 PCI: 00:05.0: enabled 0
812 12:22:57.384630 PCI: 00:12.0: enabled 1
813 12:22:57.387748 PCI: 00:12.5: enabled 0
814 12:22:57.391084 PCI: 00:12.6: enabled 0
815 12:22:57.391675 PCI: 00:14.0: enabled 1
816 12:22:57.394231 USB0 port 0: enabled 1
817 12:22:57.397690 USB2 port 0: enabled 1
818 12:22:57.401212 USB2 port 1: enabled 1
819 12:22:57.404259 USB2 port 2: enabled 0
820 12:22:57.404812 USB2 port 3: enabled 0
821 12:22:57.407645 USB2 port 5: enabled 0
822 12:22:57.410975 USB2 port 6: enabled 1
823 12:22:57.413975 USB2 port 9: enabled 1
824 12:22:57.417653 USB3 port 0: enabled 1
825 12:22:57.420675 USB3 port 1: enabled 1
826 12:22:57.421278 USB3 port 2: enabled 1
827 12:22:57.423838 USB3 port 3: enabled 1
828 12:22:57.427377 USB3 port 4: enabled 0
829 12:22:57.430402 PCI: 00:14.1: enabled 0
830 12:22:57.433885 PCI: 00:14.3: enabled 1
831 12:22:57.434381 PCI: 00:14.5: enabled 0
832 12:22:57.438248 PCI: 00:15.0: enabled 1
833 12:22:57.440410 I2C: 00:15: enabled 1
834 12:22:57.444163 PCI: 00:15.1: enabled 1
835 12:22:57.444789 I2C: 00:5d: enabled 1
836 12:22:57.446957
837 12:22:57.447455 GENERIC: 0.0: enabled 1
838 12:22:57.450647 PCI: 00:15.2: enabled 0
839 12:22:57.453929 PCI: 00:15.3: enabled 0
840 12:22:57.457112 PCI: 00:16.0: enabled 1
841 12:22:57.457611 PCI: 00:16.1: enabled 0
842 12:22:57.460973
843 12:22:57.461572 PCI: 00:16.2: enabled 0
844 12:22:57.463716 PCI: 00:16.3: enabled 0
845 12:22:57.466976 PCI: 00:16.4: enabled 0
846 12:22:57.470263 PCI: 00:16.5: enabled 0
847 12:22:57.470759 PCI: 00:17.0: enabled 1
848 12:22:57.473700 PCI: 00:19.0: enabled 1
849 12:22:57.477045 I2C: 00:1a: enabled 1
850 12:22:57.480583 I2C: 00:38: enabled 1
851 12:22:57.483469 I2C: 00:39: enabled 1
852 12:22:57.483967 I2C: 00:3a: enabled 1
853 12:22:57.487085 I2C: 00:3b: enabled 1
854 12:22:57.490611 PCI: 00:19.1: enabled 0
855 12:22:57.493909 PCI: 00:19.2: enabled 0
856 12:22:57.494426 PCI: 00:1a.0: enabled 0
857 12:22:57.496996 PCI: 00:1c.0: enabled 0
858 12:22:57.500645 PCI: 00:1c.1: enabled 0
859 12:22:57.503868 PCI: 00:1c.2: enabled 0
860 12:22:57.506943 PCI: 00:1c.3: enabled 0
861 12:22:57.507564 PCI: 00:1c.4: enabled 0
862 12:22:57.510327 PCI: 00:1c.5: enabled 0
863 12:22:57.513393 PCI: 00:1c.6: enabled 0
864 12:22:57.517236 PCI: 00:1c.7: enabled 0
865 12:22:57.520452 PCI: 00:1d.0: enabled 1
866 12:22:57.521064 PCI: 00:1d.1: enabled 0
867 12:22:57.523630 PCI: 00:1d.2: enabled 0
868 12:22:57.526390 PCI: 00:1d.3: enabled 0
869 12:22:57.530022 PCI: 00:1d.4: enabled 0
870 12:22:57.530660 PCI: 00:1d.5: enabled 1
871 12:22:57.533356
872 12:22:57.533856 PCI: 00:00.0: enabled 1
873 12:22:57.536603 PCI: 00:1e.0: enabled 1
874 12:22:57.540414 PCI: 00:1e.1: enabled 0
875 12:22:57.543871 PCI: 00:1e.2: enabled 1
876 12:22:57.544492 SPI: 00: enabled 1
877 12:22:57.546709 PCI: 00:1e.3: enabled 1
878 12:22:57.550128 SPI: 01: enabled 1
879 12:22:57.553249 PCI: 00:1f.0: enabled 1
880 12:22:57.553835 PNP: 0c09.0: enabled 1
881 12:22:57.556982 PCI: 00:1f.1: enabled 1
882 12:22:57.559873 PCI: 00:1f.2: enabled 1
883 12:22:57.563517 PCI: 00:1f.3: enabled 1
884 12:22:57.566554 PCI: 00:1f.4: enabled 1
885 12:22:57.567202 PCI: 00:1f.5: enabled 1
886 12:22:57.570128 PCI: 00:1f.6: enabled 0
887 12:22:57.572956 Root Device scanning...
888 12:22:57.576530 scan_static_bus for Root Device
889 12:22:57.580253 CPU_CLUSTER: 0 enabled
890 12:22:57.580904 DOMAIN: 0000 enabled
891 12:22:57.582940 DOMAIN: 0000 scanning...
892 12:22:57.587101 PCI: pci_scan_bus for bus 00
893 12:22:57.590182 PCI: 00:00.0 [8086/0000] ops
894 12:22:57.593414 PCI: 00:00.0 [8086/9b61] enabled
895 12:22:57.596671 PCI: 00:02.0 [8086/0000] bus ops
896 12:22:57.599922 PCI: 00:02.0 [8086/9b41] enabled
897 12:22:57.603589 PCI: 00:04.0 [8086/1903] disabled
898 12:22:57.606647 PCI: 00:08.0 [8086/1911] enabled
899 12:22:57.609803 PCI: 00:12.0 [8086/02f9] enabled
900 12:22:57.613418 PCI: 00:14.0 [8086/0000] bus ops
901 12:22:57.616120 PCI: 00:14.0 [8086/02ed] enabled
902 12:22:57.620123 PCI: 00:14.2 [8086/02ef] enabled
903 12:22:57.623143 PCI: 00:14.3 [8086/02f0] enabled
904 12:22:57.626090 PCI: 00:15.0 [8086/0000] bus ops
905 12:22:57.630019 PCI: 00:15.0 [8086/02e8] enabled
906 12:22:57.633018 PCI: 00:15.1 [8086/0000] bus ops
907 12:22:57.636674 PCI: 00:15.1 [8086/02e9] enabled
908 12:22:57.639468 PCI: 00:16.0 [8086/0000] ops
909 12:22:57.643256 PCI: 00:16.0 [8086/02e0] enabled
910 12:22:57.646615 PCI: 00:17.0 [8086/0000] ops
911 12:22:57.649306 PCI: 00:17.0 [8086/02d3] enabled
912 12:22:57.652914 PCI: 00:19.0 [8086/0000] bus ops
913 12:22:57.656513 PCI: 00:19.0 [8086/02c5] enabled
914 12:22:57.659913 PCI: 00:1d.0 [8086/0000] bus ops
915 12:22:57.662858 PCI: 00:1d.0 [8086/02b0] enabled
916 12:22:57.669538 PCI: Static device PCI: 00:1d.5 not found, disabling it.
917 12:22:57.670044 PCI: 00:1e.0 [8086/0000] ops
918 12:22:57.672962 PCI: 00:1e.0 [8086/02a8] enabled
919 12:22:57.675928 PCI: 00:1e.2 [8086/0000] bus ops
920 12:22:57.679622 PCI: 00:1e.2 [8086/02aa] enabled
921 12:22:57.683077 PCI: 00:1e.3 [8086/0000] bus ops
922 12:22:57.685829 PCI: 00:1e.3 [8086/02ab] enabled
923 12:22:57.689313 PCI: 00:1f.0 [8086/0000] bus ops
924 12:22:57.692728 PCI: 00:1f.0 [8086/0284] enabled
925 12:22:57.699711 PCI: Static device PCI: 00:1f.1 not found, disabling it.
926 12:22:57.705837 PCI: Static device PCI: 00:1f.2 not found, disabling it.
927 12:22:57.709244 PCI: 00:1f.3 [8086/0000] bus ops
928 12:22:57.712570 PCI: 00:1f.3 [8086/02c8] enabled
929 12:22:57.715965 PCI: 00:1f.4 [8086/0000] bus ops
930 12:22:57.719168 PCI: 00:1f.4 [8086/02a3] enabled
931 12:22:57.722340 PCI: 00:1f.5 [8086/0000] bus ops
932 12:22:57.725554 PCI: 00:1f.5 [8086/02a4] enabled
933 12:22:57.729335 PCI: Leftover static devices:
934 12:22:57.729935 PCI: 00:05.0
935 12:22:57.732589 PCI: 00:12.5
936 12:22:57.733195 PCI: 00:12.6
937 12:22:57.733589 PCI: 00:14.1
938 12:22:57.735694 PCI: 00:14.5
939 12:22:57.736194 PCI: 00:15.2
940 12:22:57.739386 PCI: 00:15.3
941 12:22:57.739986 PCI: 00:16.1
942 12:22:57.740414 PCI: 00:16.2
943 12:22:57.742641 PCI: 00:16.3
944 12:22:57.743248 PCI: 00:16.4
945 12:22:57.745858 PCI: 00:16.5
946 12:22:57.746463 PCI: 00:19.1
947 12:22:57.746862 PCI: 00:19.2
948 12:22:57.748685
949 12:22:57.749182 PCI: 00:1a.0
950 12:22:57.749573 PCI: 00:1c.0
951 12:22:57.752667 PCI: 00:1c.1
952 12:22:57.753266 PCI: 00:1c.2
953 12:22:57.755685 PCI: 00:1c.3
954 12:22:57.756284 PCI: 00:1c.4
955 12:22:57.756717 PCI: 00:1c.5
956 12:22:57.759630 PCI: 00:1c.6
957 12:22:57.760228 PCI: 00:1c.7
958 12:22:57.762657 PCI: 00:1d.1
959 12:22:57.763261 PCI: 00:1d.2
960 12:22:57.763657 PCI: 00:1d.3
961 12:22:57.765607 PCI: 00:1d.4
962 12:22:57.766102 PCI: 00:1d.5
963 12:22:57.768922 PCI: 00:1e.1
964 12:22:57.769419 PCI: 00:1f.1
965 12:22:57.769811 PCI: 00:1f.2
966 12:22:57.772275
967 12:22:57.772829 PCI: 00:1f.6
968 12:22:57.775334 PCI: Check your devicetree.cb.
969 12:22:57.779314 PCI: 00:02.0 scanning...
970 12:22:57.782079 scan_generic_bus for PCI: 00:02.0
971 12:22:57.785702 scan_generic_bus for PCI: 00:02.0 done
972 12:22:57.792063 scan_bus: scanning of bus PCI: 00:02.0 took 10175 usecs
973 12:22:57.792670 PCI: 00:14.0 scanning...
974 12:22:57.795215 scan_static_bus for PCI: 00:14.0
975 12:22:57.799220 USB0 port 0 enabled
976 12:22:57.802282 USB0 port 0 scanning...
977 12:22:57.805532 scan_static_bus for USB0 port 0
978 12:22:57.806126 USB2 port 0 enabled
979 12:22:57.808964 USB2 port 1 enabled
980 12:22:57.812273 USB2 port 2 disabled
981 12:22:57.812802 USB2 port 3 disabled
982 12:22:57.815364 USB2 port 5 disabled
983 12:22:57.818797 USB2 port 6 enabled
984 12:22:57.819387 USB2 port 9 enabled
985 12:22:57.821722 USB3 port 0 enabled
986 12:22:57.822219 USB3 port 1 enabled
987 12:22:57.825880 USB3 port 2 enabled
988 12:22:57.828640 USB3 port 3 enabled
989 12:22:57.829230 USB3 port 4 disabled
990 12:22:57.832022 USB2 port 0 scanning...
991 12:22:57.835193 scan_static_bus for USB2 port 0
992 12:22:57.838556 scan_static_bus for USB2 port 0 done
993 12:22:57.845656 scan_bus: scanning of bus USB2 port 0 took 9695 usecs
994 12:22:57.848334 USB2 port 1 scanning...
995 12:22:57.852135 scan_static_bus for USB2 port 1
996 12:22:57.854873 scan_static_bus for USB2 port 1 done
997 12:22:57.858534 scan_bus: scanning of bus USB2 port 1 took 9704 usecs
998 12:22:57.861715 USB2 port 6 scanning...
999 12:22:57.865471 scan_static_bus for USB2 port 6
1000 12:22:57.868964 scan_static_bus for USB2 port 6 done
1001 12:22:57.875000 scan_bus: scanning of bus USB2 port 6 took 9704 usecs
1002 12:22:57.878128 USB2 port 9 scanning...
1003 12:22:57.881890 scan_static_bus for USB2 port 9
1004 12:22:57.884698 scan_static_bus for USB2 port 9 done
1005 12:22:57.888542 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
1006 12:22:57.891745 USB3 port 0 scanning...
1007 12:22:57.894853 scan_static_bus for USB3 port 0
1008 12:22:57.898337 scan_static_bus for USB3 port 0 done
1009 12:22:57.905225 scan_bus: scanning of bus USB3 port 0 took 9685 usecs
1010 12:22:57.908120 USB3 port 1 scanning...
1011 12:22:57.912015 scan_static_bus for USB3 port 1
1012 12:22:57.914734 scan_static_bus for USB3 port 1 done
1013 12:22:57.918310 scan_bus: scanning of bus USB3 port 1 took 9686 usecs
1014 12:22:57.921649
1015 12:22:57.922247 USB3 port 2 scanning...
1016 12:22:57.924488 scan_static_bus for USB3 port 2
1017 12:22:57.928422 scan_static_bus for USB3 port 2 done
1018 12:22:57.934524 scan_bus: scanning of bus USB3 port 2 took 9702 usecs
1019 12:22:57.937960 USB3 port 3 scanning...
1020 12:22:57.941633 scan_static_bus for USB3 port 3
1021 12:22:57.944804 scan_static_bus for USB3 port 3 done
1022 12:22:57.951945 scan_bus: scanning of bus USB3 port 3 took 9696 usecs
1023 12:22:57.954630 scan_static_bus for USB0 port 0 done
1024 12:22:57.957560 scan_bus: scanning of bus USB0 port 0 took 155297 usecs
1025 12:22:57.961227 scan_static_bus for PCI: 00:14.0 done
1026 12:22:57.964673
1027 12:22:57.967994 scan_bus: scanning of bus PCI: 00:14.0 took 172918 usecs
1028 12:22:57.970967 PCI: 00:15.0 scanning...
1029 12:22:57.974126 scan_generic_bus for PCI: 00:15.0
1030 12:22:57.977737 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1031 12:22:57.980570 scan_generic_bus for PCI: 00:15.0 done
1032 12:22:57.984506
1033 12:22:57.987570 scan_bus: scanning of bus PCI: 00:15.0 took 14294 usecs
1034 12:22:57.991207 PCI: 00:15.1 scanning...
1035 12:22:57.993964 scan_generic_bus for PCI: 00:15.1
1036 12:22:57.997551 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1037 12:22:58.004349 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1038 12:22:58.008032 scan_generic_bus for PCI: 00:15.1 done
1039 12:22:58.011102 scan_bus: scanning of bus PCI: 00:15.1 took 18606 usecs
1040 12:22:58.014836 PCI: 00:19.0 scanning...
1041 12:22:58.017558 scan_generic_bus for PCI: 00:19.0
1042 12:22:58.024412 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1043 12:22:58.027682 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1044 12:22:58.030801 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1045 12:22:58.034129 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1046 12:22:58.037615 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1047 12:22:58.044371 scan_generic_bus for PCI: 00:19.0 done
1048 12:22:58.046945 scan_bus: scanning of bus PCI: 00:19.0 took 30715 usecs
1049 12:22:58.050964 PCI: 00:1d.0 scanning...
1050 12:22:58.054275 do_pci_scan_bridge for PCI: 00:1d.0
1051 12:22:58.057276 PCI: pci_scan_bus for bus 01
1052 12:22:58.060357 PCI: 01:00.0 [1c5c/1327] enabled
1053 12:22:58.064120 Enabling Common Clock Configuration
1054 12:22:58.070468 L1 Sub-State supported from root port 29
1055 12:22:58.071064 L1 Sub-State Support = 0xf
1056 12:22:58.073997 CommonModeRestoreTime = 0x28
1057 12:22:58.080614 Power On Value = 0x16, Power On Scale = 0x0
1058 12:22:58.081109 ASPM: Enabled L1
1059 12:22:58.087255 scan_bus: scanning of bus PCI: 00:1d.0 took 32776 usecs
1060 12:22:58.090359 PCI: 00:1e.2 scanning...
1061 12:22:58.093435 scan_generic_bus for PCI: 00:1e.2
1062 12:22:58.096447 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1063 12:22:58.100046 scan_generic_bus for PCI: 00:1e.2 done
1064 12:22:58.107064 scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs
1065 12:22:58.107663 PCI: 00:1e.3 scanning...
1066 12:22:58.110448
1067 12:22:58.113184 scan_generic_bus for PCI: 00:1e.3
1068 12:22:58.116449 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1069 12:22:58.120207 scan_generic_bus for PCI: 00:1e.3 done
1070 12:22:58.126652 scan_bus: scanning of bus PCI: 00:1e.3 took 14007 usecs
1071 12:22:58.127246 PCI: 00:1f.0 scanning...
1072 12:22:58.130261 scan_static_bus for PCI: 00:1f.0
1073 12:22:58.133507 PNP: 0c09.0 enabled
1074 12:22:58.136682 scan_static_bus for PCI: 00:1f.0 done
1075 12:22:58.143360 scan_bus: scanning of bus PCI: 00:1f.0 took 12047 usecs
1076 12:22:58.146385 PCI: 00:1f.3 scanning...
1077 12:22:58.150309 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1078 12:22:58.153361 PCI: 00:1f.4 scanning...
1079 12:22:58.156475 scan_generic_bus for PCI: 00:1f.4
1080 12:22:58.159413 scan_generic_bus for PCI: 00:1f.4 done
1081 12:22:58.166465 scan_bus: scanning of bus PCI: 00:1f.4 took 10190 usecs
1082 12:22:58.169445 PCI: 00:1f.5 scanning...
1083 12:22:58.173197 scan_generic_bus for PCI: 00:1f.5
1084 12:22:58.176139 scan_generic_bus for PCI: 00:1f.5 done
1085 12:22:58.183717 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1086 12:22:58.189606 scan_bus: scanning of bus DOMAIN: 0000 took 604802 usecs
1087 12:22:58.193080 scan_static_bus for Root Device done
1088 12:22:58.196653 scan_bus: scanning of bus Root Device took 624660 usecs
1089 12:22:58.199947 done
1090 12:22:58.202732 Chrome EC: UHEPI supported
1091 12:22:58.206300 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1092 12:22:58.212916 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1093 12:22:58.219593 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1094 12:22:58.226016 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1095 12:22:58.229532 SPI flash protection: WPSW=0 SRP0=0
1096 12:22:58.236183 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1097 12:22:58.239297 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1098 12:22:58.242747 found VGA at PCI: 00:02.0
1099 12:22:58.246013 Setting up VGA for PCI: 00:02.0
1100 12:22:58.252295 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1101 12:22:58.255781 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1102 12:22:58.259624 Allocating resources...
1103 12:22:58.262418 Reading resources...
1104 12:22:58.265831 Root Device read_resources bus 0 link: 0
1105 12:22:58.269115 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1106 12:22:58.275904 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1107 12:22:58.279101 DOMAIN: 0000 read_resources bus 0 link: 0
1108 12:22:58.286340 PCI: 00:14.0 read_resources bus 0 link: 0
1109 12:22:58.289376 USB0 port 0 read_resources bus 0 link: 0
1110 12:22:58.297656 USB0 port 0 read_resources bus 0 link: 0 done
1111 12:22:58.301678 PCI: 00:14.0 read_resources bus 0 link: 0 done
1112 12:22:58.308413 PCI: 00:15.0 read_resources bus 1 link: 0
1113 12:22:58.311436 PCI: 00:15.0 read_resources bus 1 link: 0 done
1114 12:22:58.318176 PCI: 00:15.1 read_resources bus 2 link: 0
1115 12:22:58.321207 PCI: 00:15.1 read_resources bus 2 link: 0 done
1116 12:22:58.328967 PCI: 00:19.0 read_resources bus 3 link: 0
1117 12:22:58.335435 PCI: 00:19.0 read_resources bus 3 link: 0 done
1118 12:22:58.338655 PCI: 00:1d.0 read_resources bus 1 link: 0
1119 12:22:58.345477 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1120 12:22:58.348979 PCI: 00:1e.2 read_resources bus 4 link: 0
1121 12:22:58.355759 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1122 12:22:58.358885 PCI: 00:1e.3 read_resources bus 5 link: 0
1123 12:22:58.365432 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1124 12:22:58.368456 PCI: 00:1f.0 read_resources bus 0 link: 0
1125 12:22:58.375230 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1126 12:22:58.381945 DOMAIN: 0000 read_resources bus 0 link: 0 done
1127 12:22:58.385112 Root Device read_resources bus 0 link: 0 done
1128 12:22:58.388430 Done reading resources.
1129 12:22:58.395125 Show resources in subtree (Root Device)...After reading.
1130 12:22:58.397937 Root Device child on link 0 CPU_CLUSTER: 0
1131 12:22:58.401321 CPU_CLUSTER: 0 child on link 0 APIC: 00
1132 12:22:58.404679 APIC: 00
1133 12:22:58.405428 APIC: 01
1134 12:22:58.405847 APIC: 06
1135 12:22:58.408091 APIC: 07
1136 12:22:58.408623 APIC: 02
1137 12:22:58.409044 APIC: 03
1138 12:22:58.411353 APIC: 05
1139 12:22:58.412009 APIC: 04
1140 12:22:58.418894 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1141 12:22:58.424771 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1142 12:22:58.474693 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1143 12:22:58.475286 PCI: 00:00.0
1144 12:22:58.476084 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1145 12:22:58.476549 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1146 12:22:58.477258 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1147 12:22:58.477646 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1148 12:22:58.511764 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1149 12:22:58.512458 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1150 12:22:58.513247 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1151 12:22:58.513662 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1152 12:22:58.522512 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1153 12:22:58.529037 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1154 12:22:58.539409 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1155 12:22:58.548750 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1156 12:22:58.559198 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1157 12:22:58.568891 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1158 12:22:58.578758 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1159 12:22:58.585771 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1160 12:22:58.588358
1161 12:22:58.588853 PCI: 00:02.0
1162 12:22:58.599072 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1163 12:22:58.608246 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1164 12:22:58.618441 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1165 12:22:58.619045 PCI: 00:04.0
1166 12:22:58.621591 PCI: 00:08.0
1167 12:22:58.631801 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 12:22:58.632433 PCI: 00:12.0
1169 12:22:58.641963 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 12:22:58.648549 PCI: 00:14.0 child on link 0 USB0 port 0
1171 12:22:58.658239 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1172 12:22:58.661626 USB0 port 0 child on link 0 USB2 port 0
1173 12:22:58.662241 USB2 port 0
1174 12:22:58.664694 USB2 port 1
1175 12:22:58.665187 USB2 port 2
1176 12:22:58.668086 USB2 port 3
1177 12:22:58.671665 USB2 port 5
1178 12:22:58.672497 USB2 port 6
1179 12:22:58.674711 USB2 port 9
1180 12:22:58.675214 USB3 port 0
1181 12:22:58.678264 USB3 port 1
1182 12:22:58.678875 USB3 port 2
1183 12:22:58.681493 USB3 port 3
1184 12:22:58.681995 USB3 port 4
1185 12:22:58.684703 PCI: 00:14.2
1186 12:22:58.694954 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1187 12:22:58.704843 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1188 12:22:58.705470 PCI: 00:14.3
1189 12:22:58.715400 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1190 12:22:58.721245 PCI: 00:15.0 child on link 0 I2C: 01:15
1191 12:22:58.731426 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 12:22:58.732045 I2C: 01:15
1193 12:22:58.734381 PCI: 00:15.1 child on link 0 I2C: 02:5d
1194 12:22:58.744431 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 12:22:58.747666 I2C: 02:5d
1196 12:22:58.748276 GENERIC: 0.0
1197 12:22:58.751112 PCI: 00:16.0
1198 12:22:58.760821 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 12:22:58.761447 PCI: 00:17.0
1200 12:22:58.770855 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1201 12:22:58.780634 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1202 12:22:58.787800 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1203 12:22:58.797204 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1204 12:22:58.803879 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1205 12:22:58.813917 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1206 12:22:58.817033 PCI: 00:19.0 child on link 0 I2C: 03:1a
1207 12:22:58.827224 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 12:22:58.830264 I2C: 03:1a
1209 12:22:58.830706 I2C: 03:38
1210 12:22:58.833947 I2C: 03:39
1211 12:22:58.834536 I2C: 03:3a
1212 12:22:58.836831 I2C: 03:3b
1213 12:22:58.840689 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1214 12:22:58.850417 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1215 12:22:58.860191 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1216 12:22:58.867118 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1217 12:22:58.870092 PCI: 01:00.0
1218 12:22:58.880624 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 12:22:58.881219 PCI: 00:1e.0
1220 12:22:58.893558 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1221 12:22:58.903634 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1222 12:22:58.906849 PCI: 00:1e.2 child on link 0 SPI: 00
1223 12:22:58.916756 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 12:22:58.917401 SPI: 00
1225 12:22:58.920256 PCI: 00:1e.3 child on link 0 SPI: 01
1226 12:22:58.930105 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 12:22:58.933259 SPI: 01
1228 12:22:58.936662 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1229 12:22:58.946560 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1230 12:22:58.953185 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1231 12:22:58.956715 PNP: 0c09.0
1232 12:22:58.963270 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1233 12:22:58.966747
1234 12:22:58.967333 PCI: 00:1f.3
1235 12:22:58.976261 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 12:22:58.986494 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 12:22:58.990360 PCI: 00:1f.4
1238 12:22:58.996897 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1239 12:22:59.006390 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1240 12:22:59.009652 PCI: 00:1f.5
1241 12:22:59.016748 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1242 12:22:59.023585 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1243 12:22:59.030130 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1244 12:22:59.037240 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1245 12:22:59.039770 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1246 12:22:59.043208 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1247 12:22:59.049632 PCI: 00:17.0 18 * [0x60 - 0x67] io
1248 12:22:59.052900 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1249 12:22:59.059590 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1250 12:22:59.066342 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1251 12:22:59.072760 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1252 12:22:59.082950 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1253 12:22:59.089309 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1254 12:22:59.092744 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1255 12:22:59.099629 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 12:22:59.106045 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1257 12:22:59.108870 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1258 12:22:59.115949 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1259 12:22:59.119242 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1260 12:22:59.122543 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1261 12:22:59.125709
1262 12:22:59.129013 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1263 12:22:59.132458 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1264 12:22:59.139172 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1265 12:22:59.142729 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1266 12:22:59.148902 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1267 12:22:59.152279 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1268 12:22:59.159196 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1269 12:22:59.162738 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1270 12:22:59.168628 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1271 12:22:59.172068 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1272 12:22:59.178384 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1273 12:22:59.182180 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1274 12:22:59.188779 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1275 12:22:59.192057 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1276 12:22:59.195771 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1277 12:22:59.198526
1278 12:22:59.201993 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1279 12:22:59.205484 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1280 12:22:59.211853 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1281 12:22:59.218757 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1282 12:22:59.225679 avoid_fixed_resources: DOMAIN: 0000
1283 12:22:59.228250 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1284 12:22:59.235041 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1285 12:22:59.241992 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1286 12:22:59.251861 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1287 12:22:59.258698 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1288 12:22:59.264982 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1289 12:22:59.274671 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1290 12:22:59.281527 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1291 12:22:59.287968 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1292 12:22:59.298123 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1293 12:22:59.305063 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1294 12:22:59.311852 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1295 12:22:59.314558 Setting resources...
1296 12:22:59.321151 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1297 12:22:59.324692 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1298 12:22:59.327917 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1299 12:22:59.331359 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1300 12:22:59.334597 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1301 12:22:59.341274 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1302 12:22:59.347823 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1303 12:22:59.354376 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1304 12:22:59.361025 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1305 12:22:59.367926 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1306 12:22:59.371230 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1307 12:22:59.377388 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1308 12:22:59.380646 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1309 12:22:59.387866 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1310 12:22:59.390723 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1311 12:22:59.397505 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1312 12:22:59.400758 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1313 12:22:59.407629 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1314 12:22:59.411416 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1315 12:22:59.417274 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1316 12:22:59.420752 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1317 12:22:59.423974 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1318 12:22:59.430446 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1319 12:22:59.435502 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1320 12:22:59.440442 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1321 12:22:59.443942 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1322 12:22:59.450533 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1323 12:22:59.453935 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1324 12:22:59.461130 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1325 12:22:59.463752 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1326 12:22:59.470313 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1327 12:22:59.473825 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1328 12:22:59.480202 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1329 12:22:59.490673 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1330 12:22:59.496964 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1331 12:22:59.503962 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1332 12:22:59.510656 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1333 12:22:59.516922 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1334 12:22:59.519915 Root Device assign_resources, bus 0 link: 0
1335 12:22:59.523565 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 12:22:59.526758
1337 12:22:59.533757 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1338 12:22:59.543585 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1339 12:22:59.550322 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1340 12:22:59.556806 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1341 12:22:59.567216 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1342 12:22:59.573222 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1343 12:22:59.579577 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 12:22:59.583488 PCI: 00:14.0 assign_resources, bus 0 link: 0
1345 12:22:59.593077 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1346 12:22:59.599705 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1347 12:22:59.610069 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1348 12:22:59.616394 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1349 12:22:59.619688 PCI: 00:15.0 assign_resources, bus 1 link: 0
1350 12:22:59.626981 PCI: 00:15.0 assign_resources, bus 1 link: 0
1351 12:22:59.633301 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1352 12:22:59.639735 PCI: 00:15.1 assign_resources, bus 2 link: 0
1353 12:22:59.643164 PCI: 00:15.1 assign_resources, bus 2 link: 0
1354 12:22:59.653186 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1355 12:22:59.660123 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1356 12:22:59.666383 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1357 12:22:59.676442 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1358 12:22:59.682486 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1359 12:22:59.689268 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1360 12:22:59.699315 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1361 12:22:59.706391 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1362 12:22:59.712753 PCI: 00:19.0 assign_resources, bus 3 link: 0
1363 12:22:59.716004 PCI: 00:19.0 assign_resources, bus 3 link: 0
1364 12:22:59.725869 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1365 12:22:59.732675 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1366 12:22:59.742255 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1367 12:22:59.745690 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1368 12:22:59.756045 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1369 12:22:59.759212 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1370 12:22:59.769168 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1371 12:22:59.775276 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1372 12:22:59.782063 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1373 12:22:59.785006 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1374 12:22:59.795514 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1375 12:22:59.798384 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1376 12:22:59.801540 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1377 12:22:59.808612 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 12:22:59.812014 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1379 12:22:59.818256 LPC: Trying to open IO window from 800 size 1ff
1380 12:22:59.824676 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1381 12:22:59.834624 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1382 12:22:59.841485 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1383 12:22:59.851304 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1384 12:22:59.854633 DOMAIN: 0000 assign_resources, bus 0 link: 0
1385 12:22:59.861249 Root Device assign_resources, bus 0 link: 0
1386 12:22:59.861837 Done setting resources.
1387 12:22:59.868181 Show resources in subtree (Root Device)...After assigning values.
1388 12:22:59.874354 Root Device child on link 0 CPU_CLUSTER: 0
1389 12:22:59.878342 CPU_CLUSTER: 0 child on link 0 APIC: 00
1390 12:22:59.878928 APIC: 00
1391 12:22:59.880840 APIC: 01
1392 12:22:59.881327 APIC: 06
1393 12:22:59.881737 APIC: 07
1394 12:22:59.884668 APIC: 02
1395 12:22:59.885266 APIC: 03
1396 12:22:59.887399 APIC: 05
1397 12:22:59.887882 APIC: 04
1398 12:22:59.890758 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1399 12:22:59.901367 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1400 12:22:59.913846 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1401 12:22:59.914450 PCI: 00:00.0
1402 12:22:59.924231 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1403 12:22:59.933928 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1404 12:22:59.943439 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1405 12:22:59.950225 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1406 12:22:59.953762
1407 12:22:59.960594 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1408 12:22:59.970134 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1409 12:22:59.980216 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1410 12:22:59.990125 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1411 12:22:59.999989 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1412 12:23:00.006555 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1413 12:23:00.016346 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1414 12:23:00.026548 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1415 12:23:00.036481 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1416 12:23:00.046128 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1417 12:23:00.056395 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1418 12:23:00.062741 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1419 12:23:00.066399 PCI: 00:02.0
1420 12:23:00.076153 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1421 12:23:00.085900 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1422 12:23:00.095877 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1423 12:23:00.099157 PCI: 00:04.0
1424 12:23:00.099776 PCI: 00:08.0
1425 12:23:00.108967 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1426 12:23:00.111931 PCI: 00:12.0
1427 12:23:00.122385 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1428 12:23:00.125529 PCI: 00:14.0 child on link 0 USB0 port 0
1429 12:23:00.135127 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1430 12:23:00.141960 USB0 port 0 child on link 0 USB2 port 0
1431 12:23:00.142566 USB2 port 0
1432 12:23:00.145377 USB2 port 1
1433 12:23:00.145870 USB2 port 2
1434 12:23:00.148784 USB2 port 3
1435 12:23:00.149381 USB2 port 5
1436 12:23:00.151909 USB2 port 6
1437 12:23:00.152527 USB2 port 9
1438 12:23:00.155029 USB3 port 0
1439 12:23:00.155525 USB3 port 1
1440 12:23:00.158823 USB3 port 2
1441 12:23:00.161996 USB3 port 3
1442 12:23:00.162599 USB3 port 4
1443 12:23:00.165888 PCI: 00:14.2
1444 12:23:00.175337 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1445 12:23:00.185175 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1446 12:23:00.185731 PCI: 00:14.3
1447 12:23:00.195233 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1448 12:23:00.201666 PCI: 00:15.0 child on link 0 I2C: 01:15
1449 12:23:00.211460 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1450 12:23:00.212081 I2C: 01:15
1451 12:23:00.218559 PCI: 00:15.1 child on link 0 I2C: 02:5d
1452 12:23:00.228412 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1453 12:23:00.229006 I2C: 02:5d
1454 12:23:00.231417 GENERIC: 0.0
1455 12:23:00.232009 PCI: 00:16.0
1456 12:23:00.241140 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1457 12:23:00.244546 PCI: 00:17.0
1458 12:23:00.254552 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1459 12:23:00.264481 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1460 12:23:00.274687 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1461 12:23:00.281627 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1462 12:23:00.291218 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1463 12:23:00.300843 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1464 12:23:00.307387 PCI: 00:19.0 child on link 0 I2C: 03:1a
1465 12:23:00.317535 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1466 12:23:00.318133 I2C: 03:1a
1467 12:23:00.320425 I2C: 03:38
1468 12:23:00.320914 I2C: 03:39
1469 12:23:00.324108 I2C: 03:3a
1470 12:23:00.324742 I2C: 03:3b
1471 12:23:00.327453 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1472 12:23:00.336990 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1473 12:23:00.346825 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1474 12:23:00.356982 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1475 12:23:00.360011 PCI: 01:00.0
1476 12:23:00.370346 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1477 12:23:00.373298 PCI: 00:1e.0
1478 12:23:00.383433 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1479 12:23:00.393285 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1480 12:23:00.396836 PCI: 00:1e.2 child on link 0 SPI: 00
1481 12:23:00.406696 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1482 12:23:00.409834 SPI: 00
1483 12:23:00.413257 PCI: 00:1e.3 child on link 0 SPI: 01
1484 12:23:00.423055 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1485 12:23:00.426696 SPI: 01
1486 12:23:00.429465 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1487 12:23:00.435811 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1488 12:23:00.439371
1489 12:23:00.445891 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1490 12:23:00.449530 PNP: 0c09.0
1491 12:23:00.456418 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1492 12:23:00.459514 PCI: 00:1f.3
1493 12:23:00.469123 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1494 12:23:00.479389 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1495 12:23:00.482588 PCI: 00:1f.4
1496 12:23:00.488761 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1497 12:23:00.499036 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1498 12:23:00.502770 PCI: 00:1f.5
1499 12:23:00.512656 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1500 12:23:00.515704 Done allocating resources.
1501 12:23:00.522100 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1502 12:23:00.522693 Enabling resources...
1503 12:23:00.529510 PCI: 00:00.0 subsystem <- 8086/9b61
1504 12:23:00.530101 PCI: 00:00.0 cmd <- 06
1505 12:23:00.532751 PCI: 00:02.0 subsystem <- 8086/9b41
1506 12:23:00.536372 PCI: 00:02.0 cmd <- 03
1507 12:23:00.539552 PCI: 00:08.0 cmd <- 06
1508 12:23:00.542389 PCI: 00:12.0 subsystem <- 8086/02f9
1509 12:23:00.545768 PCI: 00:12.0 cmd <- 02
1510 12:23:00.549688 PCI: 00:14.0 subsystem <- 8086/02ed
1511 12:23:00.552262 PCI: 00:14.0 cmd <- 02
1512 12:23:00.556119 PCI: 00:14.2 cmd <- 02
1513 12:23:00.559191 PCI: 00:14.3 subsystem <- 8086/02f0
1514 12:23:00.559791 PCI: 00:14.3 cmd <- 02
1515 12:23:00.565728 PCI: 00:15.0 subsystem <- 8086/02e8
1516 12:23:00.566313 PCI: 00:15.0 cmd <- 02
1517 12:23:00.569245 PCI: 00:15.1 subsystem <- 8086/02e9
1518 12:23:00.572398 PCI: 00:15.1 cmd <- 02
1519 12:23:00.576016 PCI: 00:16.0 subsystem <- 8086/02e0
1520 12:23:00.579362 PCI: 00:16.0 cmd <- 02
1521 12:23:00.582652 PCI: 00:17.0 subsystem <- 8086/02d3
1522 12:23:00.585678 PCI: 00:17.0 cmd <- 03
1523 12:23:00.589437 PCI: 00:19.0 subsystem <- 8086/02c5
1524 12:23:00.592132 PCI: 00:19.0 cmd <- 02
1525 12:23:00.595976 PCI: 00:1d.0 bridge ctrl <- 0013
1526 12:23:00.599159 PCI: 00:1d.0 subsystem <- 8086/02b0
1527 12:23:00.602183 PCI: 00:1d.0 cmd <- 06
1528 12:23:00.605292 PCI: 00:1e.0 subsystem <- 8086/02a8
1529 12:23:00.608918 PCI: 00:1e.0 cmd <- 06
1530 12:23:00.611866 PCI: 00:1e.2 subsystem <- 8086/02aa
1531 12:23:00.615327 PCI: 00:1e.2 cmd <- 06
1532 12:23:00.618758 PCI: 00:1e.3 subsystem <- 8086/02ab
1533 12:23:00.619359 PCI: 00:1e.3 cmd <- 02
1534 12:23:00.626306 PCI: 00:1f.0 subsystem <- 8086/0284
1535 12:23:00.626908 PCI: 00:1f.0 cmd <- 407
1536 12:23:00.628993 PCI: 00:1f.3 subsystem <- 8086/02c8
1537 12:23:00.632274
1538 12:23:00.632898 PCI: 00:1f.3 cmd <- 02
1539 12:23:00.635873 PCI: 00:1f.4 subsystem <- 8086/02a3
1540 12:23:00.638727 PCI: 00:1f.4 cmd <- 03
1541 12:23:00.642554 PCI: 00:1f.5 subsystem <- 8086/02a4
1542 12:23:00.645903 PCI: 00:1f.5 cmd <- 406
1543 12:23:00.655064 PCI: 01:00.0 cmd <- 02
1544 12:23:00.659886 done.
1545 12:23:00.672566 ME: Version: 14.0.39.1367
1546 12:23:00.679251 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 12
1547 12:23:00.682491 Initializing devices...
1548 12:23:00.683010 Root Device init ...
1549 12:23:00.690332 Chrome EC: Set SMI mask to 0x0000000000000000
1550 12:23:00.691996 Chrome EC: clear events_b mask to 0x0000000000000000
1551 12:23:00.699030 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1552 12:23:00.705726 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1553 12:23:00.712596 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1554 12:23:00.715649 Chrome EC: Set WAKE mask to 0x0000000000000000
1555 12:23:00.718720 Root Device init finished in 35189 usecs
1556 12:23:00.722848 CPU_CLUSTER: 0 init ...
1557 12:23:00.725469 CPU_CLUSTER: 0 init finished in 2449 usecs
1558 12:23:00.729602
1559 12:23:00.733490 PCI: 00:00.0 init ...
1560 12:23:00.736491 CPU TDP: 15 Watts
1561 12:23:00.740743 CPU PL2 = 64 Watts
1562 12:23:00.743226 PCI: 00:00.0 init finished in 7082 usecs
1563 12:23:00.746409 PCI: 00:02.0 init ...
1564 12:23:00.749932 PCI: 00:02.0 init finished in 2254 usecs
1565 12:23:00.753323 PCI: 00:08.0 init ...
1566 12:23:00.756574 PCI: 00:08.0 init finished in 2254 usecs
1567 12:23:00.759446 PCI: 00:12.0 init ...
1568 12:23:00.763358 PCI: 00:12.0 init finished in 2253 usecs
1569 12:23:00.766464 PCI: 00:14.0 init ...
1570 12:23:00.770012 PCI: 00:14.0 init finished in 2254 usecs
1571 12:23:00.772861 PCI: 00:14.2 init ...
1572 12:23:00.776089 PCI: 00:14.2 init finished in 2253 usecs
1573 12:23:00.779977 PCI: 00:14.3 init ...
1574 12:23:00.782876 PCI: 00:14.3 init finished in 2271 usecs
1575 12:23:00.785935 PCI: 00:15.0 init ...
1576 12:23:00.789463 DW I2C bus 0 at 0xd121f000 (400 KHz)
1577 12:23:00.793267 PCI: 00:15.0 init finished in 5981 usecs
1578 12:23:00.796657 PCI: 00:15.1 init ...
1579 12:23:00.799213 DW I2C bus 1 at 0xd1220000 (400 KHz)
1580 12:23:00.802982 PCI: 00:15.1 init finished in 5980 usecs
1581 12:23:00.806140
1582 12:23:00.806639 PCI: 00:16.0 init ...
1583 12:23:00.812708 PCI: 00:16.0 init finished in 2254 usecs
1584 12:23:00.813307 PCI: 00:19.0 init ...
1585 12:23:00.815789
1586 12:23:00.819500 DW I2C bus 4 at 0xd1222000 (400 KHz)
1587 12:23:00.822680 PCI: 00:19.0 init finished in 5981 usecs
1588 12:23:00.825853 PCI: 00:1d.0 init ...
1589 12:23:00.829522 Initializing PCH PCIe bridge.
1590 12:23:00.832983 PCI: 00:1d.0 init finished in 5289 usecs
1591 12:23:00.835924 PCI: 00:1f.0 init ...
1592 12:23:00.839172 IOAPIC: Initializing IOAPIC at 0xfec00000
1593 12:23:00.846548 IOAPIC: Bootstrap Processor Local APIC = 0x00
1594 12:23:00.847144 IOAPIC: ID = 0x02
1595 12:23:00.849119 IOAPIC: Dumping registers
1596 12:23:00.852174 reg 0x0000: 0x02000000
1597 12:23:00.856035 reg 0x0001: 0x00770020
1598 12:23:00.856671 reg 0x0002: 0x00000000
1599 12:23:00.862955 PCI: 00:1f.0 init finished in 23557 usecs
1600 12:23:00.865600 PCI: 00:1f.4 init ...
1601 12:23:00.868631 PCI: 00:1f.4 init finished in 2264 usecs
1602 12:23:00.879600 PCI: 01:00.0 init ...
1603 12:23:00.883030 PCI: 01:00.0 init finished in 2254 usecs
1604 12:23:00.887757 PNP: 0c09.0 init ...
1605 12:23:00.890605 Google Chrome EC uptime: 11.100 seconds
1606 12:23:00.897089 Google Chrome AP resets since EC boot: 0
1607 12:23:00.900415 Google Chrome most recent AP reset causes:
1608 12:23:00.906943 Google Chrome EC reset flags at last EC boot: reset-pin
1609 12:23:00.910292 PNP: 0c09.0 init finished in 20608 usecs
1610 12:23:00.913440 Devices initialized
1611 12:23:00.913939 Show all devs... After init.
1612 12:23:00.916753 Root Device: enabled 1
1613 12:23:00.920066 CPU_CLUSTER: 0: enabled 1
1614 12:23:00.923531 DOMAIN: 0000: enabled 1
1615 12:23:00.924132 APIC: 00: enabled 1
1616 12:23:00.927028 PCI: 00:00.0: enabled 1
1617 12:23:00.930453 PCI: 00:02.0: enabled 1
1618 12:23:00.933771 PCI: 00:04.0: enabled 0
1619 12:23:00.934374 PCI: 00:05.0: enabled 0
1620 12:23:00.936583 PCI: 00:12.0: enabled 1
1621 12:23:00.940652 PCI: 00:12.5: enabled 0
1622 12:23:00.941248 PCI: 00:12.6: enabled 0
1623 12:23:00.943660 PCI: 00:14.0: enabled 1
1624 12:23:00.946675 PCI: 00:14.1: enabled 0
1625 12:23:00.950218 PCI: 00:14.3: enabled 1
1626 12:23:00.950818 PCI: 00:14.5: enabled 0
1627 12:23:00.953291 PCI: 00:15.0: enabled 1
1628 12:23:00.956436 PCI: 00:15.1: enabled 1
1629 12:23:00.959849 PCI: 00:15.2: enabled 0
1630 12:23:00.960485 PCI: 00:15.3: enabled 0
1631 12:23:00.963814 PCI: 00:16.0: enabled 1
1632 12:23:00.966661 PCI: 00:16.1: enabled 0
1633 12:23:00.969673 PCI: 00:16.2: enabled 0
1634 12:23:00.970171 PCI: 00:16.3: enabled 0
1635 12:23:00.973212 PCI: 00:16.4: enabled 0
1636 12:23:00.976286 PCI: 00:16.5: enabled 0
1637 12:23:00.976813 PCI: 00:17.0: enabled 1
1638 12:23:00.979852
1639 12:23:00.980494 PCI: 00:19.0: enabled 1
1640 12:23:00.983022 PCI: 00:19.1: enabled 0
1641 12:23:00.986329 PCI: 00:19.2: enabled 0
1642 12:23:00.986827 PCI: 00:1a.0: enabled 0
1643 12:23:00.989877 PCI: 00:1c.0: enabled 0
1644 12:23:00.993094 PCI: 00:1c.1: enabled 0
1645 12:23:00.996792 PCI: 00:1c.2: enabled 0
1646 12:23:00.997397 PCI: 00:1c.3: enabled 0
1647 12:23:00.999901 PCI: 00:1c.4: enabled 0
1648 12:23:01.003438 PCI: 00:1c.5: enabled 0
1649 12:23:01.006534 PCI: 00:1c.6: enabled 0
1650 12:23:01.007133 PCI: 00:1c.7: enabled 0
1651 12:23:01.009847 PCI: 00:1d.0: enabled 1
1652 12:23:01.013202 PCI: 00:1d.1: enabled 0
1653 12:23:01.016345 PCI: 00:1d.2: enabled 0
1654 12:23:01.016851 PCI: 00:1d.3: enabled 0
1655 12:23:01.019322 PCI: 00:1d.4: enabled 0
1656 12:23:01.023047 PCI: 00:1d.5: enabled 0
1657 12:23:01.023676 PCI: 00:1e.0: enabled 1
1658 12:23:01.026032 PCI: 00:1e.1: enabled 0
1659 12:23:01.030044 PCI: 00:1e.2: enabled 1
1660 12:23:01.032603 PCI: 00:1e.3: enabled 1
1661 12:23:01.033104 PCI: 00:1f.0: enabled 1
1662 12:23:01.035817 PCI: 00:1f.1: enabled 0
1663 12:23:01.039457 PCI: 00:1f.2: enabled 0
1664 12:23:01.042823 PCI: 00:1f.3: enabled 1
1665 12:23:01.043423 PCI: 00:1f.4: enabled 1
1666 12:23:01.046680 PCI: 00:1f.5: enabled 1
1667 12:23:01.049372 PCI: 00:1f.6: enabled 0
1668 12:23:01.053249 USB0 port 0: enabled 1
1669 12:23:01.053850 I2C: 01:15: enabled 1
1670 12:23:01.056359 I2C: 02:5d: enabled 1
1671 12:23:01.059092 GENERIC: 0.0: enabled 1
1672 12:23:01.059591 I2C: 03:1a: enabled 1
1673 12:23:01.063056 I2C: 03:38: enabled 1
1674 12:23:01.065599 I2C: 03:39: enabled 1
1675 12:23:01.066095 I2C: 03:3a: enabled 1
1676 12:23:01.069166 I2C: 03:3b: enabled 1
1677 12:23:01.072553 PCI: 00:00.0: enabled 1
1678 12:23:01.073142 SPI: 00: enabled 1
1679 12:23:01.075720 SPI: 01: enabled 1
1680 12:23:01.079418 PNP: 0c09.0: enabled 1
1681 12:23:01.080037 USB2 port 0: enabled 1
1682 12:23:01.082958 USB2 port 1: enabled 1
1683 12:23:01.085765 USB2 port 2: enabled 0
1684 12:23:01.086259 USB2 port 3: enabled 0
1685 12:23:01.088889 USB2 port 5: enabled 0
1686 12:23:01.092241 USB2 port 6: enabled 1
1687 12:23:01.095713 USB2 port 9: enabled 1
1688 12:23:01.096349 USB3 port 0: enabled 1
1689 12:23:01.099246 USB3 port 1: enabled 1
1690 12:23:01.102608 USB3 port 2: enabled 1
1691 12:23:01.103210 USB3 port 3: enabled 1
1692 12:23:01.105794 USB3 port 4: enabled 0
1693 12:23:01.108759 APIC: 01: enabled 1
1694 12:23:01.109361 APIC: 06: enabled 1
1695 12:23:01.112114 APIC: 07: enabled 1
1696 12:23:01.115659 APIC: 02: enabled 1
1697 12:23:01.116424 APIC: 03: enabled 1
1698 12:23:01.118871 APIC: 05: enabled 1
1699 12:23:01.119370 APIC: 04: enabled 1
1700 12:23:01.121722 PCI: 00:08.0: enabled 1
1701 12:23:01.125552 PCI: 00:14.2: enabled 1
1702 12:23:01.128920 PCI: 01:00.0: enabled 1
1703 12:23:01.132167 Disabling ACPI via APMC:
1704 12:23:01.132803 done.
1705 12:23:01.138829 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1706 12:23:01.142033 ELOG: NV offset 0xaf0000 size 0x4000
1707 12:23:01.148686 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1708 12:23:01.155527 ELOG: Event(17) added with size 13 at 2023-01-31 12:23:01 UTC
1709 12:23:01.162098 ELOG: Event(92) added with size 9 at 2023-01-31 12:23:01 UTC
1710 12:23:01.168576 ELOG: Event(93) added with size 9 at 2023-01-31 12:23:01 UTC
1711 12:23:01.175822 ELOG: Event(9A) added with size 9 at 2023-01-31 12:23:01 UTC
1712 12:23:01.182028 ELOG: Event(9E) added with size 10 at 2023-01-31 12:23:01 UTC
1713 12:23:01.188368 ELOG: Event(9F) added with size 14 at 2023-01-31 12:23:01 UTC
1714 12:23:01.195376 ELOG: Event(16) added with size 11 at 2023-01-31 12:23:01 UTC
1715 12:23:01.198198 Erasing flash addr af0000 + 4 KiB
1716 12:23:01.270711 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 64
1717 12:23:01.277852 ELOG: Event(A1) added with size 10 at 2023-01-31 12:23:01 UTC
1718 12:23:01.287150 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1719 12:23:01.290560 ELOG: Event(A0) added with size 9 at 2023-01-31 12:23:01 UTC
1720 12:23:01.297146 elog_add_boot_reason: Logged dev mode boot
1721 12:23:01.297757 Finalize devices...
1722 12:23:01.300577 PCI: 00:17.0 final
1723 12:23:01.303793 Devices finalized
1724 12:23:01.307566 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1725 12:23:01.314358 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1726 12:23:01.316757 ME: HFSTS1 : 0x90000245
1727 12:23:01.320410 ME: HFSTS2 : 0x3B850126
1728 12:23:01.323773 ME: HFSTS3 : 0x00000020
1729 12:23:01.330721 ME: HFSTS4 : 0x00004800
1730 12:23:01.333397 ME: HFSTS5 : 0x00000000
1731 12:23:01.336547 ME: HFSTS6 : 0x40400006
1732 12:23:01.340305 ME: Manufacturing Mode : NO
1733 12:23:01.343697 ME: FW Partition Table : OK
1734 12:23:01.346633 ME: Bringup Loader Failure : NO
1735 12:23:01.350448 ME: Firmware Init Complete : YES
1736 12:23:01.353674 ME: Boot Options Present : NO
1737 12:23:01.356677 ME: Update In Progress : NO
1738 12:23:01.360020 ME: D0i3 Support : YES
1739 12:23:01.363666 ME: Low Power State Enabled : NO
1740 12:23:01.366440 ME: CPU Replaced : NO
1741 12:23:01.369831 ME: CPU Replacement Valid : YES
1742 12:23:01.373286 ME: Current Working State : 5
1743 12:23:01.376850 ME: Current Operation State : 1
1744 12:23:01.380157 ME: Current Operation Mode : 0
1745 12:23:01.383174 ME: Error Code : 0
1746 12:23:01.386557 ME: CPU Debug Disabled : YES
1747 12:23:01.389356 ME: TXT Support : NO
1748 12:23:01.396479 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1749 12:23:01.399664 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1750 12:23:01.402670 CBFS @ c08000 size 3f8000
1751 12:23:01.409528 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1752 12:23:01.412684 CBFS: Locating 'fallback/dsdt.aml'
1753 12:23:01.416220 CBFS: Found @ offset 10bb80 size 3fa5
1754 12:23:01.422862 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1755 12:23:01.425939 CBFS @ c08000 size 3f8000
1756 12:23:01.429158 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1757 12:23:01.432744 CBFS: Locating 'fallback/slic'
1758 12:23:01.437195 CBFS: 'fallback/slic' not found.
1759 12:23:01.444022 ACPI: Writing ACPI tables at 99b3e000.
1760 12:23:01.444650 ACPI: * FACS
1761 12:23:01.447157 ACPI: * DSDT
1762 12:23:01.450667 Ramoops buffer: 0x100000@0x99a3d000.
1763 12:23:01.454291 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1764 12:23:01.461151 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1765 12:23:01.464002 Google Chrome EC: version:
1766 12:23:01.467473 ro: helios_v2.0.2659-56403530b
1767 12:23:01.470504 rw: helios_v2.0.2849-c41de27e7d
1768 12:23:01.471269 running image: 1
1769 12:23:01.474636 ACPI: * FADT
1770 12:23:01.475130 SCI is IRQ9
1771 12:23:01.478333 ACPI: added table 1/32, length now 40
1772 12:23:01.481646
1773 12:23:01.482255 ACPI: * SSDT
1774 12:23:01.484670 Found 1 CPU(s) with 8 core(s) each.
1775 12:23:01.487707 Error: Could not locate 'wifi_sar' in VPD.
1776 12:23:01.494371 Checking CBFS for default SAR values
1777 12:23:01.498015 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1778 12:23:01.501197 CBFS @ c08000 size 3f8000
1779 12:23:01.507927 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1780 12:23:01.511740 CBFS: Locating 'wifi_sar_defaults.hex'
1781 12:23:01.514395 CBFS: Found @ offset 5fac0 size 77
1782 12:23:01.517618 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1783 12:23:01.524473 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1784 12:23:01.527574 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1785 12:23:01.534019 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1786 12:23:01.537980 failed to find key in VPD: dsm_calib_r0_0
1787 12:23:01.547466 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1788 12:23:01.550781 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1789 12:23:01.554165 failed to find key in VPD: dsm_calib_r0_1
1790 12:23:01.557012
1791 12:23:01.564138 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1792 12:23:01.570494 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1793 12:23:01.573878 failed to find key in VPD: dsm_calib_r0_2
1794 12:23:01.583524 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1795 12:23:01.586987 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1796 12:23:01.593792 failed to find key in VPD: dsm_calib_r0_3
1797 12:23:01.600429 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1798 12:23:01.606940 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1799 12:23:01.610419 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1800 12:23:01.613807 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1801 12:23:01.617209
1802 12:23:01.620837 EC returned error result code 1
1803 12:23:01.623857 EC returned error result code 1
1804 12:23:01.627397 EC returned error result code 1
1805 12:23:01.630478 PS2K: Bad resp from EC. Vivaldi disabled!
1806 12:23:01.636960 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1807 12:23:01.644479 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1808 12:23:01.647174 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1809 12:23:01.654070 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1810 12:23:01.657215 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1811 12:23:01.663441 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1812 12:23:01.670148 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1813 12:23:01.676950 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1814 12:23:01.679854 ACPI: added table 2/32, length now 44
1815 12:23:01.680369 ACPI: * MCFG
1816 12:23:01.686459 ACPI: added table 3/32, length now 48
1817 12:23:01.687190 ACPI: * TPM2
1818 12:23:01.690059 TPM2 log created at 99a2d000
1819 12:23:01.693086 ACPI: added table 4/32, length now 52
1820 12:23:01.696761 ACPI: * MADT
1821 12:23:01.697248 SCI is IRQ9
1822 12:23:01.700094 ACPI: added table 5/32, length now 56
1823 12:23:01.703102 current = 99b43ac0
1824 12:23:01.703615 ACPI: * DMAR
1825 12:23:01.706585 ACPI: added table 6/32, length now 60
1826 12:23:01.710241 ACPI: * IGD OpRegion
1827 12:23:01.713641 GMA: Found VBT in CBFS
1828 12:23:01.716749 GMA: Found valid VBT in CBFS
1829 12:23:01.719746 ACPI: added table 7/32, length now 64
1830 12:23:01.720241 ACPI: * HPET
1831 12:23:01.722728 ACPI: added table 8/32, length now 68
1832 12:23:01.726968
1833 12:23:01.727465 ACPI: done.
1834 12:23:01.729836 ACPI tables: 31744 bytes.
1835 12:23:01.732959 smbios_write_tables: 99a2c000
1836 12:23:01.736476 EC returned error result code 3
1837 12:23:01.739327 Couldn't obtain OEM name from CBI
1838 12:23:01.742766 Create SMBIOS type 17
1839 12:23:01.746514 PCI: 00:00.0 (Intel Cannonlake)
1840 12:23:01.747126 PCI: 00:14.3 (Intel WiFi)
1841 12:23:01.750335 SMBIOS tables: 939 bytes.
1842 12:23:01.753064 Writing table forward entry at 0x00000500
1843 12:23:01.759892 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1844 12:23:01.762695 Writing coreboot table at 0x99b62000
1845 12:23:01.769788 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1846 12:23:01.772774 1. 0000000000001000-000000000009ffff: RAM
1847 12:23:01.779233 2. 00000000000a0000-00000000000fffff: RESERVED
1848 12:23:01.783363 3. 0000000000100000-0000000099a2bfff: RAM
1849 12:23:01.789415 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1850 12:23:01.792685 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1851 12:23:01.799158 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1852 12:23:01.805794 7. 000000009a000000-000000009f7fffff: RESERVED
1853 12:23:01.809273 8. 00000000e0000000-00000000efffffff: RESERVED
1854 12:23:01.815739 9. 00000000fc000000-00000000fc000fff: RESERVED
1855 12:23:01.819297 10. 00000000fe000000-00000000fe00ffff: RESERVED
1856 12:23:01.822151 11. 00000000fed10000-00000000fed17fff: RESERVED
1857 12:23:01.829205 12. 00000000fed80000-00000000fed83fff: RESERVED
1858 12:23:01.832349 13. 00000000fed90000-00000000fed91fff: RESERVED
1859 12:23:01.838561 14. 00000000feda0000-00000000feda1fff: RESERVED
1860 12:23:01.842446 15. 0000000100000000-000000045e7fffff: RAM
1861 12:23:01.845426 Graphics framebuffer located at 0xc0000000
1862 12:23:01.848901 Passing 5 GPIOs to payload:
1863 12:23:01.854932 NAME | PORT | POLARITY | VALUE
1864 12:23:01.858400 write protect | undefined | high | low
1865 12:23:01.862213
1866 12:23:01.865218 lid | undefined | high | high
1867 12:23:01.871936 power | undefined | high | low
1868 12:23:01.875158 oprom | undefined | high | low
1869 12:23:01.881442 EC in RW | 0x000000cb | high | low
1870 12:23:01.881954 Board ID: 4
1871 12:23:01.888294 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1872 12:23:01.891261 CBFS @ c08000 size 3f8000
1873 12:23:01.894458 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1874 12:23:01.901229 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1875 12:23:01.904250 coreboot table: 1492 bytes.
1876 12:23:01.908017 IMD ROOT 0. 99fff000 00001000
1877 12:23:01.911939 IMD SMALL 1. 99ffe000 00001000
1878 12:23:01.915170 FSP MEMORY 2. 99c4e000 003b0000
1879 12:23:01.918305 CONSOLE 3. 99c2e000 00020000
1880 12:23:01.921211 FMAP 4. 99c2d000 0000054e
1881 12:23:01.925264 TIME STAMP 5. 99c2c000 00000910
1882 12:23:01.927751 VBOOT WORK 6. 99c18000 00014000
1883 12:23:01.931898 MRC DATA 7. 99c16000 00001958
1884 12:23:01.935047 ROMSTG STCK 8. 99c15000 00001000
1885 12:23:01.937951 AFTER CAR 9. 99c0b000 0000a000
1886 12:23:01.941151 RAMSTAGE 10. 99baf000 0005c000
1887 12:23:01.944209 REFCODE 11. 99b7a000 00035000
1888 12:23:01.948108 SMM BACKUP 12. 99b6a000 00010000
1889 12:23:01.951018 COREBOOT 13. 99b62000 00008000
1890 12:23:01.954053 ACPI 14. 99b3e000 00024000
1891 12:23:01.957330 ACPI GNVS 15. 99b3d000 00001000
1892 12:23:01.961164 RAMOOPS 16. 99a3d000 00100000
1893 12:23:01.964534 TPM2 TCGLOG17. 99a2d000 00010000
1894 12:23:01.968201 SMBIOS 18. 99a2c000 00000800
1895 12:23:01.971032 IMD small region:
1896 12:23:01.974242 IMD ROOT 0. 99ffec00 00000400
1897 12:23:01.977582 FSP RUNTIME 1. 99ffebe0 00000004
1898 12:23:01.980788 EC HOSTEVENT 2. 99ffebc0 00000008
1899 12:23:01.984172 POWER STATE 3. 99ffeb80 00000040
1900 12:23:01.987262 ROMSTAGE 4. 99ffeb60 00000004
1901 12:23:01.990545 MEM INFO 5. 99ffe9a0 000001b9
1902 12:23:01.993473 VPD 6. 99ffe920 0000006c
1903 12:23:01.997427 MTRR: Physical address space:
1904 12:23:02.003800 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1905 12:23:02.010697 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1906 12:23:02.017376 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1907 12:23:02.023447 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1908 12:23:02.031206 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1909 12:23:02.033604 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1910 12:23:02.039860 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1911 12:23:02.046669 MTRR: Fixed MSR 0x250 0x0606060606060606
1912 12:23:02.050240 MTRR: Fixed MSR 0x258 0x0606060606060606
1913 12:23:02.053164 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 12:23:02.056820 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 12:23:02.063457 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 12:23:02.067052 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 12:23:02.070182 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 12:23:02.073099 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 12:23:02.076404 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 12:23:02.079708
1921 12:23:02.083148 MTRR: Fixed MSR 0x26e 0x0606060606060606
1922 12:23:02.085976 MTRR: Fixed MSR 0x26f 0x0606060606060606
1923 12:23:02.090238 call enable_fixed_mtrr()
1924 12:23:02.092602 CPU physical address size: 39 bits
1925 12:23:02.096822 MTRR: default type WB/UC MTRR counts: 6/8.
1926 12:23:02.099459 MTRR: WB selected as default type.
1927 12:23:02.105984 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1928 12:23:02.112815 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1929 12:23:02.119438 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1930 12:23:02.126173 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1931 12:23:02.132815 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1932 12:23:02.139307 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1933 12:23:02.142211 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 12:23:02.149307 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 12:23:02.152436 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 12:23:02.155847 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 12:23:02.159129 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 12:23:02.162517 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 12:23:02.169238 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 12:23:02.172495 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 12:23:02.175396 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 12:23:02.178931 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 12:23:02.185382 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 12:23:02.189169 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 12:23:02.191983 call enable_fixed_mtrr()
1946 12:23:02.195461 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 12:23:02.198417 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 12:23:02.202338 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 12:23:02.208513 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 12:23:02.211863 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 12:23:02.215188 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 12:23:02.218731 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 12:23:02.224854 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 12:23:02.228695 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 12:23:02.232277 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 12:23:02.234892 CPU physical address size: 39 bits
1957 12:23:02.238536 call enable_fixed_mtrr()
1958 12:23:02.241612 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 12:23:02.248403 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 12:23:02.252167 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 12:23:02.254864 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 12:23:02.258122 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 12:23:02.261538 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 12:23:02.265126
1965 12:23:02.268185 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 12:23:02.271590 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 12:23:02.274376 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 12:23:02.277797 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 12:23:02.284674 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 12:23:02.287943 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 12:23:02.291274 call enable_fixed_mtrr()
1972 12:23:02.294581 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 12:23:02.297720 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 12:23:02.300780 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 12:23:02.304548
1976 12:23:02.307531 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 12:23:02.311100 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 12:23:02.314562 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 12:23:02.317688 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 12:23:02.324211 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 12:23:02.327352 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 12:23:02.331359 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 12:23:02.334675 CPU physical address size: 39 bits
1984 12:23:02.337340 call enable_fixed_mtrr()
1985 12:23:02.337837
1986 12:23:02.340942 MTRR check
1987 12:23:02.344106 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 12:23:02.347444 Fixed MTRRs : Enabled
1989 12:23:02.347950 Variable MTRRs: Enabled
1990 12:23:02.348373
1991 12:23:02.354395 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 12:23:02.357119 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 12:23:02.360480 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 12:23:02.364191 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 12:23:02.370529 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 12:23:02.373954 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 12:23:02.376857 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 12:23:02.380995 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 12:23:02.384061 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 12:23:02.387323
2001 12:23:02.390609 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 12:23:02.393522 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
2003 12:23:02.396873 call enable_fixed_mtrr()
2004 12:23:02.403367 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
2005 12:23:02.407237 CPU physical address size: 39 bits
2006 12:23:02.410354 CBFS @ c08000 size 3f8000
2007 12:23:02.413714 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2008 12:23:02.416648 CPU physical address size: 39 bits
2009 12:23:02.420479
2010 12:23:02.423354 CPU physical address size: 39 bits
2011 12:23:02.426879 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 12:23:02.430108 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 12:23:02.433311 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 12:23:02.436866 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 12:23:02.439751
2016 12:23:02.443764 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 12:23:02.446378 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 12:23:02.450545 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 12:23:02.453141 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 12:23:02.460099 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 12:23:02.463030 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 12:23:02.466848 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 12:23:02.470100 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 12:23:02.476685 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 12:23:02.479972 call enable_fixed_mtrr()
2026 12:23:02.483209 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 12:23:02.486427 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 12:23:02.489947 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 12:23:02.492735 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 12:23:02.499671 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 12:23:02.502681 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 12:23:02.505798 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 12:23:02.509610 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 12:23:02.516217 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 12:23:02.519721 CPU physical address size: 39 bits
2036 12:23:02.522619 call enable_fixed_mtrr()
2037 12:23:02.525796 CBFS: Locating 'fallback/payload'
2038 12:23:02.529507 CPU physical address size: 39 bits
2039 12:23:02.532973 CBFS: Found @ offset 1c96c0 size 3f798
2040 12:23:02.536173 Checking segment from ROM address 0xffdd16f8
2041 12:23:02.542667 Checking segment from ROM address 0xffdd1714
2042 12:23:02.545980 Loading segment from ROM address 0xffdd16f8
2043 12:23:02.549114 code (compression=0)
2044 12:23:02.556215 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2045 12:23:02.565874 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2046 12:23:02.566478 it's not compressed!
2047 12:23:02.659432 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2048 12:23:02.666182 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2049 12:23:02.669384 Loading segment from ROM address 0xffdd1714
2050 12:23:02.672975 Entry Point 0x30000000
2051 12:23:02.675912 Loaded segments
2052 12:23:02.681284 Finalizing chipset.
2053 12:23:02.685172 Finalizing SMM.
2054 12:23:02.688380 BS: BS_PAYLOAD_LOAD times (ms): entry 1 run 88 exit 5
2055 12:23:02.691282 mp_park_aps done after 0 msecs.
2056 12:23:02.698014 Jumping to boot code at 30000000(99b62000)
2057 12:23:02.704546 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2058 12:23:02.705142
2059 12:23:02.705535
2060 12:23:02.705898
2061 12:23:02.708095 Starting depthcharge on Helios...
2062 12:23:02.708633
2063 12:23:02.709777 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2064 12:23:02.710352 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2065 12:23:02.710805 Setting prompt string to ['hatch:']
2066 12:23:02.711284 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2067 12:23:02.717831 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2068 12:23:02.718412
2069 12:23:02.724421 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2070 12:23:02.724917
2071 12:23:02.731729 board_setup: Info: eMMC controller not present; skipping
2072 12:23:02.732349
2073 12:23:02.734228 New NVMe Controller 0x30053ac0 @ 00:1d:00
2074 12:23:02.734820
2075 12:23:02.741274 board_setup: Info: SDHCI controller not present; skipping
2076 12:23:02.741863
2077 12:23:02.747289 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2078 12:23:02.747882
2079 12:23:02.748284 Wipe memory regions:
2080 12:23:02.748704
2081 12:23:02.750541 [0x00000000001000, 0x000000000a0000)
2082 12:23:02.751131
2083 12:23:02.756895 [0x00000000100000, 0x00000030000000)
2084 12:23:02.757388
2085 12:23:02.823440 [0x00000030657430, 0x00000099a2c000)
2086 12:23:02.824060
2087 12:23:02.964124 [0x00000100000000, 0x0000045e800000)
2088 12:23:02.964755
2089 12:23:04.346924 R8152: Initializing
2090 12:23:04.347509
2091 12:23:04.349325 Version 9 (ocp_data = 6010)
2092 12:23:04.349816
2093 12:23:04.354329 R8152: Done initializing
2094 12:23:04.354915
2095 12:23:04.356861 Adding net device
2096 12:23:04.357351
2097 12:23:04.967228 R8152: Initializing
2098 12:23:04.967820
2099 12:23:04.969895 Version 6 (ocp_data = 5c30)
2100 12:23:04.970377
2101 12:23:04.972894 R8152: Done initializing
2102 12:23:04.972978
2103 12:23:04.977227 net_add_device: Attemp to include the same device
2104 12:23:04.979545
2105 12:23:04.986415 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2106 12:23:04.986590
2107 12:23:04.986673
2108 12:23:04.986747
2109 12:23:04.987051 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2111 12:23:05.088002 hatch: tftpboot 192.168.201.1 8948149/tftp-deploy-6l1x5blo/kernel/bzImage 8948149/tftp-deploy-6l1x5blo/kernel/cmdline 8948149/tftp-deploy-6l1x5blo/ramdisk/ramdisk.cpio.gz
2112 12:23:05.088827 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2113 12:23:05.089313 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2114 12:23:05.094222 tftpboot 192.168.201.1 8948149/tftp-deploy-6l1x5blo/kernel/bzImoy-6l1x5blo/kernel/cmdline 8948149/tftp-deploy-6l1x5blo/ramdisk/ramdisk.cpio.gz
2115 12:23:05.094815
2116 12:23:05.095197 Waiting for link
2117 12:23:05.095550
2118 12:23:05.295037 done.
2119 12:23:05.295628
2120 12:23:05.296234 MAC: 00:24:32:50:1a:5f
2121 12:23:05.296676
2122 12:23:05.298476 Sending DHCP discover... done.
2123 12:23:05.299067
2124 12:23:05.301349 Waiting for reply... done.
2125 12:23:05.302153
2126 12:23:05.304424 Sending DHCP request... done.
2127 12:23:05.304916
2128 12:23:05.307981 Waiting for reply... done.
2129 12:23:05.308519
2130 12:23:05.310994 My ip is 192.168.201.21
2131 12:23:05.311504
2132 12:23:05.314724 The DHCP server ip is 192.168.201.1
2133 12:23:05.315355
2134 12:23:05.317749 TFTP server IP predefined by user: 192.168.201.1
2135 12:23:05.318344
2136 12:23:05.324193 Bootfile predefined by user: 8948149/tftp-deploy-6l1x5blo/kernel/bzImage
2137 12:23:05.324763
2138 12:23:05.327630 Sending tftp read request... done.
2139 12:23:05.328223
2140 12:23:05.335301 Waiting for the transfer...
2141 12:23:05.335843
2142 12:23:06.030146 00000000 ################################################################
2143 12:23:06.030878
2144 12:23:06.718176 00080000 ################################################################
2145 12:23:06.718720
2146 12:23:07.429352 00100000 ################################################################
2147 12:23:07.429997
2148 12:23:08.125152 00180000 ################################################################
2149 12:23:08.125739
2150 12:23:08.838058 00200000 ################################################################
2151 12:23:08.838655
2152 12:23:09.501762 00280000 ################################################################
2153 12:23:09.502299
2154 12:23:10.176233 00300000 ################################################################
2155 12:23:10.176385
2156 12:23:10.839013 00380000 ################################################################
2157 12:23:10.839556
2158 12:23:11.552989 00400000 ################################################################
2159 12:23:11.553598
2160 12:23:12.264513 00480000 ################################################################
2161 12:23:12.265074
2162 12:23:12.939198 00500000 ################################################################
2163 12:23:12.939748
2164 12:23:13.606061 00580000 ################################################################
2165 12:23:13.606595
2166 12:23:14.273672 00600000 ################################################################
2167 12:23:14.274262
2168 12:23:14.942344 00680000 ################################################################
2169 12:23:14.942881
2170 12:23:15.233836 00700000 ############################ done.
2171 12:23:15.234359
2172 12:23:15.237845 The bootfile was 7569296 bytes long.
2173 12:23:15.238279
2174 12:23:15.240530 Sending tftp read request... done.
2175 12:23:15.240962
2176 12:23:15.244019 Waiting for the transfer...
2177 12:23:15.244591
2178 12:23:15.973289 00000000 ################################################################
2179 12:23:15.973888
2180 12:23:16.686422 00080000 ################################################################
2181 12:23:16.687079
2182 12:23:17.402942 00100000 ################################################################
2183 12:23:17.403553
2184 12:23:18.121507 00180000 ################################################################
2185 12:23:18.122094
2186 12:23:18.845394 00200000 ################################################################
2187 12:23:18.846044
2188 12:23:19.568454 00280000 ################################################################
2189 12:23:19.569043
2190 12:23:20.281122 00300000 ################################################################
2191 12:23:20.281717
2192 12:23:20.996028 00380000 ################################################################
2193 12:23:20.996709
2194 12:23:21.703249 00400000 ################################################################
2195 12:23:21.703795
2196 12:23:22.409004 00480000 ################################################################
2197 12:23:22.409667
2198 12:23:22.751925 00500000 ############################### done.
2199 12:23:22.752536
2200 12:23:22.754962 Sending tftp read request... done.
2201 12:23:22.755408
2202 12:23:22.758500 Waiting for the transfer...
2203 12:23:22.758975
2204 12:23:22.759334 00000000 # done.
2205 12:23:22.759675
2206 12:23:22.768515 Command line loaded dynamically from TFTP file: 8948149/tftp-deploy-6l1x5blo/kernel/cmdline
2207 12:23:22.769105
2208 12:23:22.795218 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8948149/extract-nfsrootfs-q2bagkbd,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2209 12:23:22.795823
2210 12:23:22.801547 ec_init(0): CrosEC protocol v3 supported (256, 256)
2211 12:23:22.802042
2212 12:23:22.804789 Shutting down all USB controllers.
2213 12:23:22.805280
2214 12:23:22.808094 Removing current net device
2215 12:23:22.808611
2216 12:23:22.815652 Finalizing coreboot
2217 12:23:22.816262
2218 12:23:22.821698 Exiting depthcharge with code 4 at timestamp: 27535003
2219 12:23:22.822283
2220 12:23:22.822675
2221 12:23:22.823036 Starting kernel ...
2222 12:23:22.823383
2223 12:23:22.824684 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2224 12:23:22.825229 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2225 12:23:22.825655 Setting prompt string to ['Linux version [0-9]']
2226 12:23:22.826062 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2227 12:23:22.826461 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2228 12:23:22.827419
2229 12:23:22.827835
2230 12:23:22.828200
2232 12:27:42.825450 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2234 12:27:42.825673 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2236 12:27:42.825835 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2239 12:27:42.826099 end: 2 depthcharge-action (duration 00:05:00) [common]
2241 12:27:42.826335 Cleaning after the job
2242 12:27:42.826427 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948149/tftp-deploy-6l1x5blo/ramdisk
2243 12:27:42.826862 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948149/tftp-deploy-6l1x5blo/kernel
2244 12:27:42.827422 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948149/tftp-deploy-6l1x5blo/nfsrootfs
2245 12:27:42.863155 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8948149/tftp-deploy-6l1x5blo/modules
2246 12:27:42.863462 start: 4.1 power-off (timeout 00:00:30) [common]
2247 12:27:42.863624 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2248 12:27:42.882694 >> Command sent successfully.
2249 12:27:42.884706 Returned 0 in 0 seconds
2250 12:27:42.985492 end: 4.1 power-off (duration 00:00:00) [common]
2252 12:27:42.985838 start: 4.2 read-feedback (timeout 00:10:00) [common]
2253 12:27:42.986089 Listened to connection for namespace 'common' for up to 1s
2254 12:27:43.486035 Listened to connection for namespace 'common' for up to 1s
2255 12:27:43.489318 Listened to connection for namespace 'common' for up to 1s
2256 12:27:43.493070 Listened to connection for namespace 'common' for up to 1s
2257 12:27:43.496149 Listened to connection for namespace 'common' for up to 1s
2258 12:27:43.499653 Listened to connection for namespace 'common' for up to 1s
2259 12:27:43.503250 Listened to connection for namespace 'common' for up to 1s
2260 12:27:43.505977 Listened to connection for namespace 'common' for up to 1s
2261 12:27:43.509436 Listened to connection for namespace 'common' for up to 1s
2262 12:27:43.512639 Listened to connection for namespace 'common' for up to 1s
2263 12:27:43.516507 Listened to connection for namespace 'common' for up to 1s
2264 12:27:43.519717 Listened to connection for namespace 'common' for up to 1s
2265 12:27:43.523024 Listened to connection for namespace 'common' for up to 1s
2266 12:27:43.525742 Listened to connection for namespace 'common' for up to 1s
2267 12:27:43.529283 Listened to connection for namespace 'common' for up to 1s
2268 12:27:43.532806 Listened to connection for namespace 'common' for up to 1s
2269 12:27:43.535913 Listened to connection for namespace 'common' for up to 1s
2270 12:27:43.541265 Listened to connection for namespace 'common' for up to 1s
2271 12:27:43.544417 Listened to connection for namespace 'common' for up to 1s
2272 12:27:43.988226 Finalising connection for namespace 'common'
2273 12:27:43.988417 Disconnecting from shell: Finalise
2274 12:27:43.988514
2275 12:27:44.089227 end: 4.2 read-feedback (duration 00:00:01) [common]
2276 12:27:44.089396 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8948149
2277 12:27:44.254954 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8948149
2278 12:27:44.255157 JobError: Your job cannot terminate cleanly.