Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:12:13.734552 lava-dispatcher, installed at version: 2023.01
2 12:12:13.734762 start: 0 validate
3 12:12:13.734889 Start time: 2023-04-03 12:12:13.734881+00:00 (UTC)
4 12:12:13.735008 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:12:13.735132 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230324.0%2Famd64%2Finitrd.cpio.gz exists
6 12:12:14.026485 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:12:14.026675 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1097-g52d843097a439%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:12:14.317665 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:12:14.317847 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230324.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:12:14.603241 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:12:14.603429 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1097-g52d843097a439%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:12:14.894230 validate duration: 1.16
14 12:12:14.894499 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:12:14.894595 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:12:14.894680 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:12:14.894778 Not decompressing ramdisk as can be used compressed.
18 12:12:14.894856 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230324.0/amd64/initrd.cpio.gz
19 12:12:14.894919 saving as /var/lib/lava/dispatcher/tmp/9849950/tftp-deploy-i42xxuus/ramdisk/initrd.cpio.gz
20 12:12:14.894977 total size: 5672882 (5MB)
21 12:12:14.896012 progress 0% (0MB)
22 12:12:14.897552 progress 5% (0MB)
23 12:12:14.899011 progress 10% (0MB)
24 12:12:14.900358 progress 15% (0MB)
25 12:12:14.901819 progress 20% (1MB)
26 12:12:14.903268 progress 25% (1MB)
27 12:12:14.904606 progress 30% (1MB)
28 12:12:14.906039 progress 35% (1MB)
29 12:12:14.907524 progress 40% (2MB)
30 12:12:14.908843 progress 45% (2MB)
31 12:12:14.910270 progress 50% (2MB)
32 12:12:14.911731 progress 55% (3MB)
33 12:12:14.913004 progress 60% (3MB)
34 12:12:14.914425 progress 65% (3MB)
35 12:12:14.915891 progress 70% (3MB)
36 12:12:14.917166 progress 75% (4MB)
37 12:12:14.918591 progress 80% (4MB)
38 12:12:14.920051 progress 85% (4MB)
39 12:12:14.921322 progress 90% (4MB)
40 12:12:14.922742 progress 95% (5MB)
41 12:12:14.924217 progress 100% (5MB)
42 12:12:14.924321 5MB downloaded in 0.03s (184.38MB/s)
43 12:12:14.924464 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:12:14.924695 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:12:14.924777 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:12:14.924858 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:12:14.925033 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1097-g52d843097a439/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:12:14.925099 saving as /var/lib/lava/dispatcher/tmp/9849950/tftp-deploy-i42xxuus/kernel/bzImage
50 12:12:14.925158 total size: 7880592 (7MB)
51 12:12:14.925216 No compression specified
52 12:12:14.926257 progress 0% (0MB)
53 12:12:14.928313 progress 5% (0MB)
54 12:12:14.930245 progress 10% (0MB)
55 12:12:14.932321 progress 15% (1MB)
56 12:12:14.934272 progress 20% (1MB)
57 12:12:14.936196 progress 25% (1MB)
58 12:12:14.938107 progress 30% (2MB)
59 12:12:14.940026 progress 35% (2MB)
60 12:12:14.941935 progress 40% (3MB)
61 12:12:14.943874 progress 45% (3MB)
62 12:12:14.945810 progress 50% (3MB)
63 12:12:14.947749 progress 55% (4MB)
64 12:12:14.949634 progress 60% (4MB)
65 12:12:14.951519 progress 65% (4MB)
66 12:12:14.953429 progress 70% (5MB)
67 12:12:14.955455 progress 75% (5MB)
68 12:12:14.957389 progress 80% (6MB)
69 12:12:14.959277 progress 85% (6MB)
70 12:12:14.961175 progress 90% (6MB)
71 12:12:14.963056 progress 95% (7MB)
72 12:12:14.965000 progress 100% (7MB)
73 12:12:14.965165 7MB downloaded in 0.04s (187.87MB/s)
74 12:12:14.965302 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:12:14.965526 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:12:14.965609 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:12:14.965694 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:12:14.965800 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230324.0/amd64/full.rootfs.tar.xz
80 12:12:14.965864 saving as /var/lib/lava/dispatcher/tmp/9849950/tftp-deploy-i42xxuus/nfsrootfs/full.rootfs.tar
81 12:12:14.965922 total size: 125966032 (120MB)
82 12:12:14.965981 Using unxz to decompress xz
83 12:12:14.969461 progress 0% (0MB)
84 12:12:15.414323 progress 5% (6MB)
85 12:12:15.865260 progress 10% (12MB)
86 12:12:16.320988 progress 15% (18MB)
87 12:12:16.778167 progress 20% (24MB)
88 12:12:17.107462 progress 25% (30MB)
89 12:12:17.443091 progress 30% (36MB)
90 12:12:17.707921 progress 35% (42MB)
91 12:12:17.896417 progress 40% (48MB)
92 12:12:18.245872 progress 45% (54MB)
93 12:12:18.598987 progress 50% (60MB)
94 12:12:18.928926 progress 55% (66MB)
95 12:12:19.270460 progress 60% (72MB)
96 12:12:19.592103 progress 65% (78MB)
97 12:12:19.960831 progress 70% (84MB)
98 12:12:20.362549 progress 75% (90MB)
99 12:12:20.764366 progress 80% (96MB)
100 12:12:20.865096 progress 85% (102MB)
101 12:12:21.014094 progress 90% (108MB)
102 12:12:21.334947 progress 95% (114MB)
103 12:12:21.690262 progress 100% (120MB)
104 12:12:21.694997 120MB downloaded in 6.73s (17.85MB/s)
105 12:12:21.695280 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:12:21.695540 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:12:21.695674 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:12:21.695767 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:12:21.695884 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1097-g52d843097a439/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:12:21.695953 saving as /var/lib/lava/dispatcher/tmp/9849950/tftp-deploy-i42xxuus/modules/modules.tar
112 12:12:21.696015 total size: 250852 (0MB)
113 12:12:21.696077 Using unxz to decompress xz
114 12:12:21.699415 progress 13% (0MB)
115 12:12:21.699821 progress 26% (0MB)
116 12:12:21.700055 progress 39% (0MB)
117 12:12:21.701332 progress 52% (0MB)
118 12:12:21.703201 progress 65% (0MB)
119 12:12:21.705057 progress 78% (0MB)
120 12:12:21.706866 progress 91% (0MB)
121 12:12:21.708696 progress 100% (0MB)
122 12:12:21.714079 0MB downloaded in 0.02s (13.25MB/s)
123 12:12:21.714315 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:12:21.714571 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:12:21.714671 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 12:12:21.714772 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 12:12:23.316162 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9849950/extract-nfsrootfs-aj3kseya
129 12:12:23.316358 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 12:12:23.316458 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
131 12:12:23.316594 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h
132 12:12:23.316694 makedir: /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin
133 12:12:23.316778 makedir: /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/tests
134 12:12:23.316857 makedir: /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/results
135 12:12:23.316952 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-add-keys
136 12:12:23.317078 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-add-sources
137 12:12:23.317190 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-background-process-start
138 12:12:23.317301 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-background-process-stop
139 12:12:23.317411 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-common-functions
140 12:12:23.317519 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-echo-ipv4
141 12:12:23.317629 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-install-packages
142 12:12:23.317741 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-installed-packages
143 12:12:23.317847 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-os-build
144 12:12:23.317955 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-probe-channel
145 12:12:23.318063 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-probe-ip
146 12:12:23.318169 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-target-ip
147 12:12:23.318275 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-target-mac
148 12:12:23.318382 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-target-storage
149 12:12:23.318491 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-test-case
150 12:12:23.318600 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-test-event
151 12:12:23.318705 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-test-feedback
152 12:12:23.318812 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-test-raise
153 12:12:23.318951 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-test-reference
154 12:12:23.319086 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-test-runner
155 12:12:23.319192 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-test-set
156 12:12:23.319335 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-test-shell
157 12:12:23.319443 Updating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-install-packages (oe)
158 12:12:23.319554 Updating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/bin/lava-installed-packages (oe)
159 12:12:23.319704 Creating /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/environment
160 12:12:23.319790 LAVA metadata
161 12:12:23.319857 - LAVA_JOB_ID=9849950
162 12:12:23.319919 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:12:23.320012 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
164 12:12:23.320077 skipped lava-vland-overlay
165 12:12:23.320151 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:12:23.320229 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
167 12:12:23.320290 skipped lava-multinode-overlay
168 12:12:23.320361 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:12:23.320457 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
170 12:12:23.320530 Loading test definitions
171 12:12:23.320618 start: 1.5.2.3.1 git-repo-action (timeout 00:09:52) [common]
172 12:12:23.320689 Using /lava-9849950 at stage 0
173 12:12:23.320799 Fetching tests from https://github.com/kernelci/test-definitions
174 12:12:23.320891 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/0/tests/0_ltp-timers'
175 12:12:27.175269 Running '/usr/bin/git checkout kernelci.org
176 12:12:27.302145 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
177 12:12:27.302853 uuid=9849950_1.5.2.3.1 testdef=None
178 12:12:27.303008 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
180 12:12:27.303264 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
181 12:12:27.303939 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 12:12:27.304187 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
184 12:12:27.304974 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 12:12:27.305212 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
187 12:12:27.305957 runner path: /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/0/tests/0_ltp-timers test_uuid 9849950_1.5.2.3.1
188 12:12:27.306050 GRP_TEST='TMR'
189 12:12:27.306116 SKIPFILE='skipfile-lkft.yaml'
190 12:12:27.306176 SKIP_INSTALL='true'
191 12:12:27.306235 TST_CMDFILES=''
192 12:12:27.306376 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
194 12:12:27.306588 Creating lava-test-runner.conf files
195 12:12:27.306653 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849950/lava-overlay-6n9ps16h/lava-9849950/0 for stage 0
196 12:12:27.306739 - 0_ltp-timers
197 12:12:27.306838 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
198 12:12:27.306926 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
199 12:12:34.783773 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
200 12:12:34.783927 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
201 12:12:34.784023 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
202 12:12:34.784130 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
203 12:12:34.784222 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
204 12:12:34.902936 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
205 12:12:34.903306 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
206 12:12:34.903445 extracting modules file /var/lib/lava/dispatcher/tmp/9849950/tftp-deploy-i42xxuus/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849950/extract-nfsrootfs-aj3kseya
207 12:12:34.910640 extracting modules file /var/lib/lava/dispatcher/tmp/9849950/tftp-deploy-i42xxuus/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849950/extract-overlay-ramdisk-wq1htjkd/ramdisk
208 12:12:34.917585 end: 1.5.4 extract-modules (duration 00:00:00) [common]
209 12:12:34.917703 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
210 12:12:34.917793 [common] Applying overlay to NFS
211 12:12:34.917863 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849950/compress-overlay-dl9bqc_p/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9849950/extract-nfsrootfs-aj3kseya
212 12:12:35.722981 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
213 12:12:35.723138 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
214 12:12:35.723235 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
215 12:12:35.723328 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
216 12:12:35.723414 Building ramdisk /var/lib/lava/dispatcher/tmp/9849950/extract-overlay-ramdisk-wq1htjkd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9849950/extract-overlay-ramdisk-wq1htjkd/ramdisk
217 12:12:35.771829 >> 27177 blocks
218 12:12:36.323238 rename /var/lib/lava/dispatcher/tmp/9849950/extract-overlay-ramdisk-wq1htjkd/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9849950/tftp-deploy-i42xxuus/ramdisk/ramdisk.cpio.gz
219 12:12:36.323707 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
220 12:12:36.323836 start: 1.5.8 prepare-kernel (timeout 00:09:39) [common]
221 12:12:36.323949 start: 1.5.8.1 prepare-fit (timeout 00:09:39) [common]
222 12:12:36.324052 No mkimage arch provided, not using FIT.
223 12:12:36.324145 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
224 12:12:36.324236 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
225 12:12:36.324343 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
226 12:12:36.324438 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
227 12:12:36.324518 No LXC device requested
228 12:12:36.324599 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
229 12:12:36.324691 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
230 12:12:36.324776 end: 1.7 deploy-device-env (duration 00:00:00) [common]
231 12:12:36.324854 Checking files for TFTP limit of 4294967296 bytes.
232 12:12:36.325244 end: 1 tftp-deploy (duration 00:00:21) [common]
233 12:12:36.325347 start: 2 depthcharge-action (timeout 00:05:00) [common]
234 12:12:36.325440 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
235 12:12:36.325556 substitutions:
236 12:12:36.325625 - {DTB}: None
237 12:12:36.325687 - {INITRD}: 9849950/tftp-deploy-i42xxuus/ramdisk/ramdisk.cpio.gz
238 12:12:36.325748 - {KERNEL}: 9849950/tftp-deploy-i42xxuus/kernel/bzImage
239 12:12:36.325807 - {LAVA_MAC}: None
240 12:12:36.325865 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9849950/extract-nfsrootfs-aj3kseya
241 12:12:36.325924 - {NFS_SERVER_IP}: 192.168.201.1
242 12:12:36.325981 - {PRESEED_CONFIG}: None
243 12:12:36.326037 - {PRESEED_LOCAL}: None
244 12:12:36.326092 - {RAMDISK}: 9849950/tftp-deploy-i42xxuus/ramdisk/ramdisk.cpio.gz
245 12:12:36.326148 - {ROOT_PART}: None
246 12:12:36.326203 - {ROOT}: None
247 12:12:36.326258 - {SERVER_IP}: 192.168.201.1
248 12:12:36.326312 - {TEE}: None
249 12:12:36.326367 Parsed boot commands:
250 12:12:36.326421 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
251 12:12:36.326579 Parsed boot commands: tftpboot 192.168.201.1 9849950/tftp-deploy-i42xxuus/kernel/bzImage 9849950/tftp-deploy-i42xxuus/kernel/cmdline 9849950/tftp-deploy-i42xxuus/ramdisk/ramdisk.cpio.gz
252 12:12:36.326663 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
253 12:12:36.326750 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
254 12:12:36.326843 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
255 12:12:36.326929 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
256 12:12:36.327000 Not connected, no need to disconnect.
257 12:12:36.327074 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
258 12:12:36.327154 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
259 12:12:36.327223 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
260 12:12:36.330571 Setting prompt string to ['lava-test: # ']
261 12:12:36.330906 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
262 12:12:36.331014 end: 2.2.1 reset-connection (duration 00:00:00) [common]
263 12:12:36.331111 start: 2.2.2 reset-device (timeout 00:05:00) [common]
264 12:12:36.331203 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
265 12:12:36.331384 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
266 12:12:41.456505 >> Command sent successfully.
267 12:12:41.458730 Returned 0 in 5 seconds
268 12:12:41.559471 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
270 12:12:41.559868 end: 2.2.2 reset-device (duration 00:00:05) [common]
271 12:12:41.559969 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
272 12:12:41.560059 Setting prompt string to 'Starting depthcharge on Helios...'
273 12:12:41.560128 Changing prompt to 'Starting depthcharge on Helios...'
274 12:12:41.560201 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
275 12:12:41.560473 [Enter `^Ec?' for help]
276 12:12:42.180164
277 12:12:42.180314
278 12:12:42.189975 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
279 12:12:42.193221 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
280 12:12:42.199856 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
281 12:12:42.203084 CPU: AES supported, TXT NOT supported, VT supported
282 12:12:42.209632 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
283 12:12:42.212871 PCH: device id 0284 (rev 00) is Cometlake-U Premium
284 12:12:42.219723 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
285 12:12:42.222887 VBOOT: Loading verstage.
286 12:12:42.225817 FMAP: Found "FLASH" version 1.1 at 0xc04000.
287 12:12:42.232988 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
288 12:12:42.239443 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
289 12:12:42.239545 CBFS @ c08000 size 3f8000
290 12:12:42.245775 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
291 12:12:42.249470 CBFS: Locating 'fallback/verstage'
292 12:12:42.252628 CBFS: Found @ offset 10fb80 size 1072c
293 12:12:42.256435
294 12:12:42.256532
295 12:12:42.266557 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
296 12:12:42.280890 Probing TPM: . done!
297 12:12:42.284086 TPM ready after 0 ms
298 12:12:42.287472 Connected to device vid:did:rid of 1ae0:0028:00
299 12:12:42.297462 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
300 12:12:42.300863 Initialized TPM device CR50 revision 0
301 12:12:42.343356 tlcl_send_startup: Startup return code is 0
302 12:12:42.343468 TPM: setup succeeded
303 12:12:42.356362 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
304 12:12:42.359780 Chrome EC: UHEPI supported
305 12:12:42.363124 Phase 1
306 12:12:42.366162 FMAP: area GBB found @ c05000 (12288 bytes)
307 12:12:42.373337 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
308 12:12:42.375949 Phase 2
309 12:12:42.376039 Phase 3
310 12:12:42.379244 FMAP: area GBB found @ c05000 (12288 bytes)
311 12:12:42.386083 VB2:vb2_report_dev_firmware() This is developer signed firmware
312 12:12:42.392420 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
313 12:12:42.395970 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
314 12:12:42.402310 VB2:vb2_verify_keyblock() Checking keyblock signature...
315 12:12:42.418469 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
316 12:12:42.421719 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
317 12:12:42.428651 VB2:vb2_verify_fw_preamble() Verifying preamble.
318 12:12:42.432593 Phase 4
319 12:12:42.436003 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
320 12:12:42.445778 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
321 12:12:42.622275 VB2:vb2_rsa_verify_digest() Digest check failed!
322 12:12:42.628822 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
323 12:12:42.628920 Saving nvdata
324 12:12:42.632003 Reboot requested (10020007)
325 12:12:42.635048 board_reset() called!
326 12:12:42.635132 full_reset() called!
327 12:12:47.146271
328 12:12:47.146770
329 12:12:47.156161 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
330 12:12:47.159468 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
331 12:12:47.165702 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
332 12:12:47.169037 CPU: AES supported, TXT NOT supported, VT supported
333 12:12:47.175709 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
334 12:12:47.179007 PCH: device id 0284 (rev 00) is Cometlake-U Premium
335 12:12:47.186130 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
336 12:12:47.188971 VBOOT: Loading verstage.
337 12:12:47.192741 FMAP: Found "FLASH" version 1.1 at 0xc04000.
338 12:12:47.199139 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
339 12:12:47.205717 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 12:12:47.206382 CBFS @ c08000 size 3f8000
341 12:12:47.212210 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
342 12:12:47.215619 CBFS: Locating 'fallback/verstage'
343 12:12:47.218875 CBFS: Found @ offset 10fb80 size 1072c
344 12:12:47.223419
345 12:12:47.224027
346 12:12:47.232933 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
347 12:12:47.247758 Probing TPM: . done!
348 12:12:47.251001 TPM ready after 0 ms
349 12:12:47.254082 Connected to device vid:did:rid of 1ae0:0028:00
350 12:12:47.264514 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
351 12:12:47.267854 Initialized TPM device CR50 revision 0
352 12:12:47.310590 tlcl_send_startup: Startup return code is 0
353 12:12:47.311175 TPM: setup succeeded
354 12:12:47.323671 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
355 12:12:47.326863 Chrome EC: UHEPI supported
356 12:12:47.330019 Phase 1
357 12:12:47.333447 FMAP: area GBB found @ c05000 (12288 bytes)
358 12:12:47.340316 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
359 12:12:47.346941 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
360 12:12:47.349968 Recovery requested (1009000e)
361 12:12:47.355740 Saving nvdata
362 12:12:47.362023 tlcl_extend: response is 0
363 12:12:47.370560 tlcl_extend: response is 0
364 12:12:47.377516 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
365 12:12:47.380821 CBFS @ c08000 size 3f8000
366 12:12:47.387395 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
367 12:12:47.391106 CBFS: Locating 'fallback/romstage'
368 12:12:47.394289 CBFS: Found @ offset 80 size 145fc
369 12:12:47.397333 Accumulated console time in verstage 99 ms
370 12:12:47.397833
371 12:12:47.400561
372 12:12:47.410703 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
373 12:12:47.417230 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
374 12:12:47.420247 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
375 12:12:47.423738 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
376 12:12:47.430248 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
377 12:12:47.433673 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
378 12:12:47.436865 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
379 12:12:47.439873 TCO_STS: 0000 0000
380 12:12:47.443388 GEN_PMCON: e0015238 00000200
381 12:12:47.446776 GBLRST_CAUSE: 00000000 00000000
382 12:12:47.450082 prev_sleep_state 5
383 12:12:47.453160 Boot Count incremented to 50753
384 12:12:47.456513 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
385 12:12:47.459856 CBFS @ c08000 size 3f8000
386 12:12:47.466303 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
387 12:12:47.469427 CBFS: Locating 'fspm.bin'
388 12:12:47.472642 CBFS: Found @ offset 5ffc0 size 71000
389 12:12:47.476063 Chrome EC: UHEPI supported
390 12:12:47.482232 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
391 12:12:47.487293 Probing TPM: done!
392 12:12:47.493611 Connected to device vid:did:rid of 1ae0:0028:00
393 12:12:47.503827 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
394 12:12:47.509783 Initialized TPM device CR50 revision 0
395 12:12:47.518962 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
396 12:12:47.528851 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
397 12:12:47.529443 MRC cache found, size 1948
398 12:12:47.532040 bootmode is set to: 2
399 12:12:47.535759 PRMRR disabled by config.
400 12:12:47.538429 SPD INDEX = 1
401 12:12:47.541586 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 12:12:47.544988 CBFS @ c08000 size 3f8000
403 12:12:47.551374 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 12:12:47.551990 CBFS: Locating 'spd.bin'
405 12:12:47.557895 CBFS: Found @ offset 5fb80 size 400
406 12:12:47.558378 SPD: module type is LPDDR3
407 12:12:47.561647 SPD: module part is
408 12:12:47.567835 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
409 12:12:47.570705 SPD: device width 4 bits, bus width 8 bits
410 12:12:47.577878 SPD: module size is 4096 MB (per channel)
411 12:12:47.581231 memory slot: 0 configuration done.
412 12:12:47.584283 memory slot: 2 configuration done.
413 12:12:47.633529 CBMEM:
414 12:12:47.636756 IMD: root @ 99fff000 254 entries.
415 12:12:47.640233 IMD: root @ 99ffec00 62 entries.
416 12:12:47.643314 External stage cache:
417 12:12:47.646580 IMD: root @ 9abff000 254 entries.
418 12:12:47.650127 IMD: root @ 9abfec00 62 entries.
419 12:12:47.656376 Chrome EC: clear events_b mask to 0x0000000020004000
420 12:12:47.669295 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 12:12:47.679919 tlcl_write: response is 0
422 12:12:47.691772 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
423 12:12:47.698310 MRC: TPM MRC hash updated successfully.
424 12:12:47.698794 2 DIMMs found
425 12:12:47.701961 SMM Memory Map
426 12:12:47.704497 SMRAM : 0x9a000000 0x1000000
427 12:12:47.708168 Subregion 0: 0x9a000000 0xa00000
428 12:12:47.711289 Subregion 1: 0x9aa00000 0x200000
429 12:12:47.714376 Subregion 2: 0x9ac00000 0x400000
430 12:12:47.717986 top_of_ram = 0x9a000000
431 12:12:47.721034 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
432 12:12:47.727971 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
433 12:12:47.731237 MTRR Range: Start=ff000000 End=0 (Size 1000000)
434 12:12:47.737743 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 12:12:47.740892 CBFS @ c08000 size 3f8000
436 12:12:47.747671 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 12:12:47.750825 CBFS: Locating 'fallback/postcar'
438 12:12:47.753989 CBFS: Found @ offset 107000 size 4b44
439 12:12:47.761018 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
440 12:12:47.770834 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
441 12:12:47.773879 Processing 180 relocs. Offset value of 0x97c0c000
442 12:12:47.782722 Accumulated console time in romstage 286 ms
443 12:12:47.783303
444 12:12:47.783744
445 12:12:47.792303 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
446 12:12:47.798996 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
447 12:12:47.802262 CBFS @ c08000 size 3f8000
448 12:12:47.808820 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
449 12:12:47.812139 CBFS: Locating 'fallback/ramstage'
450 12:12:47.815238 CBFS: Found @ offset 43380 size 1b9e8
451 12:12:47.822468 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
452 12:12:47.854096 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
453 12:12:47.860661 Processing 3976 relocs. Offset value of 0x98db0000
454 12:12:47.864004 Accumulated console time in postcar 52 ms
455 12:12:47.864579
456 12:12:47.864959
457 12:12:47.873917 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
458 12:12:47.880825 FMAP: area RO_VPD found @ c00000 (16384 bytes)
459 12:12:47.884158 WARNING: RO_VPD is uninitialized or empty.
460 12:12:47.887043 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 12:12:47.893778 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 12:12:47.894340 Normal boot.
463 12:12:47.900067 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
464 12:12:47.903405 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 12:12:47.906733 CBFS @ c08000 size 3f8000
466 12:12:47.913750 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 12:12:47.916765 CBFS: Locating 'cpu_microcode_blob.bin'
468 12:12:47.919859 CBFS: Found @ offset 14700 size 2ec00
469 12:12:47.926565 microcode: sig=0x806ec pf=0x4 revision=0xc9
470 12:12:47.927142 Skip microcode update
471 12:12:47.933452 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 12:12:47.936304 CBFS @ c08000 size 3f8000
473 12:12:47.939717 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 12:12:47.943157 CBFS: Locating 'fsps.bin'
475 12:12:47.946283 CBFS: Found @ offset d1fc0 size 35000
476 12:12:47.972546 Detected 4 core, 8 thread CPU.
477 12:12:47.976052 Setting up SMI for CPU
478 12:12:47.979364 IED base = 0x9ac00000
479 12:12:47.982251 IED size = 0x00400000
480 12:12:47.982734 Will perform SMM setup.
481 12:12:47.988921 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
482 12:12:47.995492 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
483 12:12:48.002466 Processing 16 relocs. Offset value of 0x00030000
484 12:12:48.003049 Attempting to start 7 APs
485 12:12:48.008420 Waiting for 10ms after sending INIT.
486 12:12:48.022037 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
487 12:12:48.022605 done.
488 12:12:48.025742 AP: slot 1 apic_id 3.
489 12:12:48.028897 AP: slot 4 apic_id 2.
490 12:12:48.032045 Waiting for 2nd SIPI to complete...done.
491 12:12:48.035550 AP: slot 2 apic_id 5.
492 12:12:48.036167 AP: slot 5 apic_id 4.
493 12:12:48.038861 AP: slot 7 apic_id 7.
494 12:12:48.042207 AP: slot 6 apic_id 6.
495 12:12:48.048911 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
496 12:12:48.054958 Processing 13 relocs. Offset value of 0x00038000
497 12:12:48.061752 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
498 12:12:48.064980 Installing SMM handler to 0x9a000000
499 12:12:48.071536 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
500 12:12:48.078097 Processing 658 relocs. Offset value of 0x9a010000
501 12:12:48.085082 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
502 12:12:48.088266 Processing 13 relocs. Offset value of 0x9a008000
503 12:12:48.095153 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
504 12:12:48.101080 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
505 12:12:48.107679 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
506 12:12:48.111187 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
507 12:12:48.117602 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
508 12:12:48.123946 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
509 12:12:48.131095 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
510 12:12:48.137589 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
511 12:12:48.140761 Clearing SMI status registers
512 12:12:48.141266 SMI_STS: PM1
513 12:12:48.143744 PM1_STS: PWRBTN
514 12:12:48.144235 TCO_STS: SECOND_TO
515 12:12:48.146967 New SMBASE 0x9a000000
516 12:12:48.150431 In relocation handler: CPU 0
517 12:12:48.153808 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
518 12:12:48.159887 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 12:12:48.160364 Relocation complete.
520 12:12:48.163831 New SMBASE 0x99fff400
521 12:12:48.166819 In relocation handler: CPU 3
522 12:12:48.169932 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
523 12:12:48.176356 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 12:12:48.176838 Relocation complete.
525 12:12:48.180181 New SMBASE 0x99fffc00
526 12:12:48.183652 In relocation handler: CPU 1
527 12:12:48.186399 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
528 12:12:48.193129 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 12:12:48.193718 Relocation complete.
530 12:12:48.196326 New SMBASE 0x99fff000
531 12:12:48.199742 In relocation handler: CPU 4
532 12:12:48.203301 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
533 12:12:48.209513 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 12:12:48.210079 Relocation complete.
535 12:12:48.212542 New SMBASE 0x99ffec00
536 12:12:48.215790 In relocation handler: CPU 5
537 12:12:48.219546 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
538 12:12:48.225633 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 12:12:48.226117 Relocation complete.
540 12:12:48.229249 New SMBASE 0x99fff800
541 12:12:48.232132 In relocation handler: CPU 2
542 12:12:48.236103 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
543 12:12:48.242308 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 12:12:48.242885 Relocation complete.
545 12:12:48.245413 New SMBASE 0x99ffe400
546 12:12:48.248868 In relocation handler: CPU 7
547 12:12:48.252024 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
548 12:12:48.258712 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 12:12:48.259258 Relocation complete.
550 12:12:48.262215 New SMBASE 0x99ffe800
551 12:12:48.265260 In relocation handler: CPU 6
552 12:12:48.268283 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
553 12:12:48.275064 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 12:12:48.275560 Relocation complete.
555 12:12:48.278595 Initializing CPU #0
556 12:12:48.282166 CPU: vendor Intel device 806ec
557 12:12:48.285067 CPU: family 06, model 8e, stepping 0c
558 12:12:48.288526 Clearing out pending MCEs
559 12:12:48.291440 Setting up local APIC...
560 12:12:48.292099 apic_id: 0x00 done.
561 12:12:48.294983 Turbo is available but hidden
562 12:12:48.298338 Turbo is available and visible
563 12:12:48.301638 VMX status: enabled
564 12:12:48.305004 IA32_FEATURE_CONTROL status: locked
565 12:12:48.307808 Skip microcode update
566 12:12:48.308388 CPU #0 initialized
567 12:12:48.310989 Initializing CPU #3
568 12:12:48.314444 Initializing CPU #7
569 12:12:48.315022 Initializing CPU #4
570 12:12:48.317507 Initializing CPU #1
571 12:12:48.320855 CPU: vendor Intel device 806ec
572 12:12:48.324800 CPU: family 06, model 8e, stepping 0c
573 12:12:48.327385 CPU: vendor Intel device 806ec
574 12:12:48.331009 CPU: family 06, model 8e, stepping 0c
575 12:12:48.334343 Clearing out pending MCEs
576 12:12:48.337463 Clearing out pending MCEs
577 12:12:48.337938 Setting up local APIC...
578 12:12:48.341053 CPU: vendor Intel device 806ec
579 12:12:48.344013 CPU: family 06, model 8e, stepping 0c
580 12:12:48.347457 Clearing out pending MCEs
581 12:12:48.350811 apic_id: 0x02 done.
582 12:12:48.354248 Setting up local APIC...
583 12:12:48.354826 Setting up local APIC...
584 12:12:48.357245 VMX status: enabled
585 12:12:48.360232 apic_id: 0x03 done.
586 12:12:48.363379 IA32_FEATURE_CONTROL status: locked
587 12:12:48.363896 VMX status: enabled
588 12:12:48.366818 Skip microcode update
589 12:12:48.370146 IA32_FEATURE_CONTROL status: locked
590 12:12:48.373183 CPU #4 initialized
591 12:12:48.376757 Skip microcode update
592 12:12:48.377230 apic_id: 0x01 done.
593 12:12:48.379933 CPU #1 initialized
594 12:12:48.380405 VMX status: enabled
595 12:12:48.383225 Initializing CPU #2
596 12:12:48.386462 IA32_FEATURE_CONTROL status: locked
597 12:12:48.389770 Initializing CPU #5
598 12:12:48.393095 CPU: vendor Intel device 806ec
599 12:12:48.396476 CPU: family 06, model 8e, stepping 0c
600 12:12:48.399796 CPU: vendor Intel device 806ec
601 12:12:48.402997 CPU: family 06, model 8e, stepping 0c
602 12:12:48.406329 Initializing CPU #6
603 12:12:48.406899 Clearing out pending MCEs
604 12:12:48.409707 CPU: vendor Intel device 806ec
605 12:12:48.412726 CPU: family 06, model 8e, stepping 0c
606 12:12:48.416075 Clearing out pending MCEs
607 12:12:48.419269 Setting up local APIC...
608 12:12:48.422468 Clearing out pending MCEs
609 12:12:48.426201 CPU: vendor Intel device 806ec
610 12:12:48.429296 CPU: family 06, model 8e, stepping 0c
611 12:12:48.432366 Setting up local APIC...
612 12:12:48.432879 apic_id: 0x07 done.
613 12:12:48.435548 Setting up local APIC...
614 12:12:48.439513 Skip microcode update
615 12:12:48.442564 apic_id: 0x06 done.
616 12:12:48.443138 VMX status: enabled
617 12:12:48.445801 Clearing out pending MCEs
618 12:12:48.448754 CPU #3 initialized
619 12:12:48.449329 VMX status: enabled
620 12:12:48.451879 IA32_FEATURE_CONTROL status: locked
621 12:12:48.455277 IA32_FEATURE_CONTROL status: locked
622 12:12:48.458969 Skip microcode update
623 12:12:48.462167 apic_id: 0x05 done.
624 12:12:48.462742 Setting up local APIC...
625 12:12:48.465129 Skip microcode update
626 12:12:48.468781 CPU #7 initialized
627 12:12:48.469303 CPU #6 initialized
628 12:12:48.471714 apic_id: 0x04 done.
629 12:12:48.474766 VMX status: enabled
630 12:12:48.475246 VMX status: enabled
631 12:12:48.478593 IA32_FEATURE_CONTROL status: locked
632 12:12:48.481813 IA32_FEATURE_CONTROL status: locked
633 12:12:48.485103 Skip microcode update
634 12:12:48.488176 Skip microcode update
635 12:12:48.488650 CPU #2 initialized
636 12:12:48.491478 CPU #5 initialized
637 12:12:48.495072 bsp_do_flight_plan done after 461 msecs.
638 12:12:48.498569 CPU: frequency set to 4200 MHz
639 12:12:48.501740 Enabling SMIs.
640 12:12:48.502316 Locking SMM.
641 12:12:48.516431 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
642 12:12:48.519675 CBFS @ c08000 size 3f8000
643 12:12:48.526619 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
644 12:12:48.527200 CBFS: Locating 'vbt.bin'
645 12:12:48.533155 CBFS: Found @ offset 5f5c0 size 499
646 12:12:48.536363 Found a VBT of 4608 bytes after decompression
647 12:12:48.720880 Display FSP Version Info HOB
648 12:12:48.724323 Reference Code - CPU = 9.0.1e.30
649 12:12:48.727503 uCode Version = 0.0.0.ca
650 12:12:48.730878 TXT ACM version = ff.ff.ff.ffff
651 12:12:48.734171 Display FSP Version Info HOB
652 12:12:48.737566 Reference Code - ME = 9.0.1e.30
653 12:12:48.740614 MEBx version = 0.0.0.0
654 12:12:48.743497 ME Firmware Version = Consumer SKU
655 12:12:48.746781 Display FSP Version Info HOB
656 12:12:48.750374 Reference Code - CML PCH = 9.0.1e.30
657 12:12:48.753662 PCH-CRID Status = Disabled
658 12:12:48.757072 PCH-CRID Original Value = ff.ff.ff.ffff
659 12:12:48.759669 PCH-CRID New Value = ff.ff.ff.ffff
660 12:12:48.763494 OPROM - RST - RAID = ff.ff.ff.ffff
661 12:12:48.766451 ChipsetInit Base Version = ff.ff.ff.ffff
662 12:12:48.772896 ChipsetInit Oem Version = ff.ff.ff.ffff
663 12:12:48.773463 Display FSP Version Info HOB
664 12:12:48.779641 Reference Code - SA - System Agent = 9.0.1e.30
665 12:12:48.783075 Reference Code - MRC = 0.7.1.6c
666 12:12:48.785983 SA - PCIe Version = 9.0.1e.30
667 12:12:48.789234 SA-CRID Status = Disabled
668 12:12:48.792336 SA-CRID Original Value = 0.0.0.c
669 12:12:48.796126 SA-CRID New Value = 0.0.0.c
670 12:12:48.796789 OPROM - VBIOS = ff.ff.ff.ffff
671 12:12:48.799881 RTC Init
672 12:12:48.802684 Set power on after power failure.
673 12:12:48.803158 Disabling Deep S3
674 12:12:48.806542 Disabling Deep S3
675 12:12:48.809363 Disabling Deep S4
676 12:12:48.809856 Disabling Deep S4
677 12:12:48.812622 Disabling Deep S5
678 12:12:48.813094 Disabling Deep S5
679 12:12:48.819359 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
680 12:12:48.822722 Enumerating buses...
681 12:12:48.826251 Show all devs... Before device enumeration.
682 12:12:48.828793 Root Device: enabled 1
683 12:12:48.832858 CPU_CLUSTER: 0: enabled 1
684 12:12:48.833495 DOMAIN: 0000: enabled 1
685 12:12:48.835553 APIC: 00: enabled 1
686 12:12:48.839018 PCI: 00:00.0: enabled 1
687 12:12:48.839635 PCI: 00:02.0: enabled 1
688 12:12:48.842294 PCI: 00:04.0: enabled 0
689 12:12:48.845702 PCI: 00:05.0: enabled 0
690 12:12:48.848678 PCI: 00:12.0: enabled 1
691 12:12:48.849154 PCI: 00:12.5: enabled 0
692 12:12:48.852417 PCI: 00:12.6: enabled 0
693 12:12:48.855934 PCI: 00:14.0: enabled 1
694 12:12:48.858370 PCI: 00:14.1: enabled 0
695 12:12:48.858846 PCI: 00:14.3: enabled 1
696 12:12:48.861823 PCI: 00:14.5: enabled 0
697 12:12:48.865063 PCI: 00:15.0: enabled 1
698 12:12:48.868334 PCI: 00:15.1: enabled 1
699 12:12:48.868909 PCI: 00:15.2: enabled 0
700 12:12:48.871833 PCI: 00:15.3: enabled 0
701 12:12:48.874967 PCI: 00:16.0: enabled 1
702 12:12:48.878127 PCI: 00:16.1: enabled 0
703 12:12:48.878625 PCI: 00:16.2: enabled 0
704 12:12:48.881553 PCI: 00:16.3: enabled 0
705 12:12:48.884761 PCI: 00:16.4: enabled 0
706 12:12:48.887763 PCI: 00:16.5: enabled 0
707 12:12:48.888335 PCI: 00:17.0: enabled 1
708 12:12:48.891312 PCI: 00:19.0: enabled 1
709 12:12:48.894562 PCI: 00:19.1: enabled 0
710 12:12:48.897591 PCI: 00:19.2: enabled 0
711 12:12:48.898062 PCI: 00:1a.0: enabled 0
712 12:12:48.901040 PCI: 00:1c.0: enabled 0
713 12:12:48.904174 PCI: 00:1c.1: enabled 0
714 12:12:48.907471 PCI: 00:1c.2: enabled 0
715 12:12:48.908123 PCI: 00:1c.3: enabled 0
716 12:12:48.910548 PCI: 00:1c.4: enabled 0
717 12:12:48.913748 PCI: 00:1c.5: enabled 0
718 12:12:48.917676 PCI: 00:1c.6: enabled 0
719 12:12:48.918252 PCI: 00:1c.7: enabled 0
720 12:12:48.920224 PCI: 00:1d.0: enabled 1
721 12:12:48.923373 PCI: 00:1d.1: enabled 0
722 12:12:48.927149 PCI: 00:1d.2: enabled 0
723 12:12:48.927770 PCI: 00:1d.3: enabled 0
724 12:12:48.929986 PCI: 00:1d.4: enabled 0
725 12:12:48.933721 PCI: 00:1d.5: enabled 1
726 12:12:48.937169 PCI: 00:1e.0: enabled 1
727 12:12:48.937730 PCI: 00:1e.1: enabled 0
728 12:12:48.940517 PCI: 00:1e.2: enabled 1
729 12:12:48.943265 PCI: 00:1e.3: enabled 1
730 12:12:48.946136 PCI: 00:1f.0: enabled 1
731 12:12:48.946772 PCI: 00:1f.1: enabled 1
732 12:12:48.949747 PCI: 00:1f.2: enabled 1
733 12:12:48.953056 PCI: 00:1f.3: enabled 1
734 12:12:48.956309 PCI: 00:1f.4: enabled 1
735 12:12:48.956785 PCI: 00:1f.5: enabled 1
736 12:12:48.959606 PCI: 00:1f.6: enabled 0
737 12:12:48.963206 USB0 port 0: enabled 1
738 12:12:48.963826 I2C: 00:15: enabled 1
739 12:12:48.966128 I2C: 00:5d: enabled 1
740 12:12:48.969439 GENERIC: 0.0: enabled 1
741 12:12:48.972451 I2C: 00:1a: enabled 1
742 12:12:48.972923 I2C: 00:38: enabled 1
743 12:12:48.975363 I2C: 00:39: enabled 1
744 12:12:48.979094 I2C: 00:3a: enabled 1
745 12:12:48.979570 I2C: 00:3b: enabled 1
746 12:12:48.981946 PCI: 00:00.0: enabled 1
747 12:12:48.985532 SPI: 00: enabled 1
748 12:12:48.986025 SPI: 01: enabled 1
749 12:12:48.988424 PNP: 0c09.0: enabled 1
750 12:12:48.991860 USB2 port 0: enabled 1
751 12:12:48.992339 USB2 port 1: enabled 1
752 12:12:48.995195 USB2 port 2: enabled 0
753 12:12:48.998807 USB2 port 3: enabled 0
754 12:12:49.001843 USB2 port 5: enabled 0
755 12:12:49.002473 USB2 port 6: enabled 1
756 12:12:49.004704 USB2 port 9: enabled 1
757 12:12:49.008118 USB3 port 0: enabled 1
758 12:12:49.008618 USB3 port 1: enabled 1
759 12:12:49.011776 USB3 port 2: enabled 1
760 12:12:49.015033 USB3 port 3: enabled 1
761 12:12:49.017951 USB3 port 4: enabled 0
762 12:12:49.018426 APIC: 03: enabled 1
763 12:12:49.021410 APIC: 05: enabled 1
764 12:12:49.021902 APIC: 01: enabled 1
765 12:12:49.024291 APIC: 02: enabled 1
766 12:12:49.028100 APIC: 04: enabled 1
767 12:12:49.028590 APIC: 06: enabled 1
768 12:12:49.030936 APIC: 07: enabled 1
769 12:12:49.034656 Compare with tree...
770 12:12:49.035249 Root Device: enabled 1
771 12:12:49.037593 CPU_CLUSTER: 0: enabled 1
772 12:12:49.040773 APIC: 00: enabled 1
773 12:12:49.044263 APIC: 03: enabled 1
774 12:12:49.044851 APIC: 05: enabled 1
775 12:12:49.047386 APIC: 01: enabled 1
776 12:12:49.050950 APIC: 02: enabled 1
777 12:12:49.051541 APIC: 04: enabled 1
778 12:12:49.053540 APIC: 06: enabled 1
779 12:12:49.056897 APIC: 07: enabled 1
780 12:12:49.060313 DOMAIN: 0000: enabled 1
781 12:12:49.060804 PCI: 00:00.0: enabled 1
782 12:12:49.063896 PCI: 00:02.0: enabled 1
783 12:12:49.067225 PCI: 00:04.0: enabled 0
784 12:12:49.070576 PCI: 00:05.0: enabled 0
785 12:12:49.073234 PCI: 00:12.0: enabled 1
786 12:12:49.073729 PCI: 00:12.5: enabled 0
787 12:12:49.076686 PCI: 00:12.6: enabled 0
788 12:12:49.079907 PCI: 00:14.0: enabled 1
789 12:12:49.083187 USB0 port 0: enabled 1
790 12:12:49.086592 USB2 port 0: enabled 1
791 12:12:49.087176 USB2 port 1: enabled 1
792 12:12:49.089492 USB2 port 2: enabled 0
793 12:12:49.092534 USB2 port 3: enabled 0
794 12:12:49.096487 USB2 port 5: enabled 0
795 12:12:49.099228 USB2 port 6: enabled 1
796 12:12:49.102435 USB2 port 9: enabled 1
797 12:12:49.102927 USB3 port 0: enabled 1
798 12:12:49.106125 USB3 port 1: enabled 1
799 12:12:49.108966 USB3 port 2: enabled 1
800 12:12:49.112364 USB3 port 3: enabled 1
801 12:12:49.115697 USB3 port 4: enabled 0
802 12:12:49.118978 PCI: 00:14.1: enabled 0
803 12:12:49.119469 PCI: 00:14.3: enabled 1
804 12:12:49.122068 PCI: 00:14.5: enabled 0
805 12:12:49.125755 PCI: 00:15.0: enabled 1
806 12:12:49.128598 I2C: 00:15: enabled 1
807 12:12:49.132100 PCI: 00:15.1: enabled 1
808 12:12:49.132689 I2C: 00:5d: enabled 1
809 12:12:49.135101 GENERIC: 0.0: enabled 1
810 12:12:49.138852 PCI: 00:15.2: enabled 0
811 12:12:49.142155 PCI: 00:15.3: enabled 0
812 12:12:49.145586 PCI: 00:16.0: enabled 1
813 12:12:49.146172 PCI: 00:16.1: enabled 0
814 12:12:49.148552 PCI: 00:16.2: enabled 0
815 12:12:49.151973 PCI: 00:16.3: enabled 0
816 12:12:49.154852 PCI: 00:16.4: enabled 0
817 12:12:49.158499 PCI: 00:16.5: enabled 0
818 12:12:49.158993 PCI: 00:17.0: enabled 1
819 12:12:49.161362 PCI: 00:19.0: enabled 1
820 12:12:49.164979 I2C: 00:1a: enabled 1
821 12:12:49.168086 I2C: 00:38: enabled 1
822 12:12:49.168669 I2C: 00:39: enabled 1
823 12:12:49.171145 I2C: 00:3a: enabled 1
824 12:12:49.174615 I2C: 00:3b: enabled 1
825 12:12:49.178041 PCI: 00:19.1: enabled 0
826 12:12:49.181224 PCI: 00:19.2: enabled 0
827 12:12:49.181725 PCI: 00:1a.0: enabled 0
828 12:12:49.184706 PCI: 00:1c.0: enabled 0
829 12:12:49.187956 PCI: 00:1c.1: enabled 0
830 12:12:49.191040 PCI: 00:1c.2: enabled 0
831 12:12:49.194173 PCI: 00:1c.3: enabled 0
832 12:12:49.194654 PCI: 00:1c.4: enabled 0
833 12:12:49.197685 PCI: 00:1c.5: enabled 0
834 12:12:49.200697 PCI: 00:1c.6: enabled 0
835 12:12:49.203907 PCI: 00:1c.7: enabled 0
836 12:12:49.207636 PCI: 00:1d.0: enabled 1
837 12:12:49.208276 PCI: 00:1d.1: enabled 0
838 12:12:49.210814 PCI: 00:1d.2: enabled 0
839 12:12:49.214004 PCI: 00:1d.3: enabled 0
840 12:12:49.216794 PCI: 00:1d.4: enabled 0
841 12:12:49.220112 PCI: 00:1d.5: enabled 1
842 12:12:49.223858 PCI: 00:00.0: enabled 1
843 12:12:49.224331 PCI: 00:1e.0: enabled 1
844 12:12:49.227038 PCI: 00:1e.1: enabled 0
845 12:12:49.229862 PCI: 00:1e.2: enabled 1
846 12:12:49.233238 SPI: 00: enabled 1
847 12:12:49.233707 PCI: 00:1e.3: enabled 1
848 12:12:49.236342 SPI: 01: enabled 1
849 12:12:49.239760 PCI: 00:1f.0: enabled 1
850 12:12:49.243349 PNP: 0c09.0: enabled 1
851 12:12:49.246601 PCI: 00:1f.1: enabled 1
852 12:12:49.247080 PCI: 00:1f.2: enabled 1
853 12:12:49.249965 PCI: 00:1f.3: enabled 1
854 12:12:49.253058 PCI: 00:1f.4: enabled 1
855 12:12:49.256542 PCI: 00:1f.5: enabled 1
856 12:12:49.259280 PCI: 00:1f.6: enabled 0
857 12:12:49.259783 Root Device scanning...
858 12:12:49.263245 scan_static_bus for Root Device
859 12:12:49.266593 CPU_CLUSTER: 0 enabled
860 12:12:49.269574 DOMAIN: 0000 enabled
861 12:12:49.270167 DOMAIN: 0000 scanning...
862 12:12:49.273096 PCI: pci_scan_bus for bus 00
863 12:12:49.276726 PCI: 00:00.0 [8086/0000] ops
864 12:12:49.279970 PCI: 00:00.0 [8086/9b61] enabled
865 12:12:49.283405 PCI: 00:02.0 [8086/0000] bus ops
866 12:12:49.286016 PCI: 00:02.0 [8086/9b41] enabled
867 12:12:49.289512 PCI: 00:04.0 [8086/1903] disabled
868 12:12:49.292752 PCI: 00:08.0 [8086/1911] enabled
869 12:12:49.295674 PCI: 00:12.0 [8086/02f9] enabled
870 12:12:49.302837 PCI: 00:14.0 [8086/0000] bus ops
871 12:12:49.305734 PCI: 00:14.0 [8086/02ed] enabled
872 12:12:49.308704 PCI: 00:14.2 [8086/02ef] enabled
873 12:12:49.312176 PCI: 00:14.3 [8086/02f0] enabled
874 12:12:49.315570 PCI: 00:15.0 [8086/0000] bus ops
875 12:12:49.318574 PCI: 00:15.0 [8086/02e8] enabled
876 12:12:49.322127 PCI: 00:15.1 [8086/0000] bus ops
877 12:12:49.325227 PCI: 00:15.1 [8086/02e9] enabled
878 12:12:49.328566 PCI: 00:16.0 [8086/0000] ops
879 12:12:49.331702 PCI: 00:16.0 [8086/02e0] enabled
880 12:12:49.332302 PCI: 00:17.0 [8086/0000] ops
881 12:12:49.334917 PCI: 00:17.0 [8086/02d3] enabled
882 12:12:49.338271 PCI: 00:19.0 [8086/0000] bus ops
883 12:12:49.344623 PCI: 00:19.0 [8086/02c5] enabled
884 12:12:49.347738 PCI: 00:1d.0 [8086/0000] bus ops
885 12:12:49.351192 PCI: 00:1d.0 [8086/02b0] enabled
886 12:12:49.354609 PCI: Static device PCI: 00:1d.5 not found, disabling it.
887 12:12:49.357620 PCI: 00:1e.0 [8086/0000] ops
888 12:12:49.361101 PCI: 00:1e.0 [8086/02a8] enabled
889 12:12:49.364511 PCI: 00:1e.2 [8086/0000] bus ops
890 12:12:49.367626 PCI: 00:1e.2 [8086/02aa] enabled
891 12:12:49.371374 PCI: 00:1e.3 [8086/0000] bus ops
892 12:12:49.374471 PCI: 00:1e.3 [8086/02ab] enabled
893 12:12:49.377244 PCI: 00:1f.0 [8086/0000] bus ops
894 12:12:49.380418 PCI: 00:1f.0 [8086/0284] enabled
895 12:12:49.387102 PCI: Static device PCI: 00:1f.1 not found, disabling it.
896 12:12:49.394042 PCI: Static device PCI: 00:1f.2 not found, disabling it.
897 12:12:49.397246 PCI: 00:1f.3 [8086/0000] bus ops
898 12:12:49.400497 PCI: 00:1f.3 [8086/02c8] enabled
899 12:12:49.403377 PCI: 00:1f.4 [8086/0000] bus ops
900 12:12:49.407269 PCI: 00:1f.4 [8086/02a3] enabled
901 12:12:49.410291 PCI: 00:1f.5 [8086/0000] bus ops
902 12:12:49.413780 PCI: 00:1f.5 [8086/02a4] enabled
903 12:12:49.416763 PCI: Leftover static devices:
904 12:12:49.417352 PCI: 00:05.0
905 12:12:49.420092 PCI: 00:12.5
906 12:12:49.420581 PCI: 00:12.6
907 12:12:49.421088 PCI: 00:14.1
908 12:12:49.423127 PCI: 00:14.5
909 12:12:49.423644 PCI: 00:15.2
910 12:12:49.426094 PCI: 00:15.3
911 12:12:49.426582 PCI: 00:16.1
912 12:12:49.429841 PCI: 00:16.2
913 12:12:49.430430 PCI: 00:16.3
914 12:12:49.430929 PCI: 00:16.4
915 12:12:49.433034 PCI: 00:16.5
916 12:12:49.433524 PCI: 00:19.1
917 12:12:49.436481 PCI: 00:19.2
918 12:12:49.436971 PCI: 00:1a.0
919 12:12:49.437461 PCI: 00:1c.0
920 12:12:49.439413 PCI: 00:1c.1
921 12:12:49.439935 PCI: 00:1c.2
922 12:12:49.442846 PCI: 00:1c.3
923 12:12:49.443338 PCI: 00:1c.4
924 12:12:49.446290 PCI: 00:1c.5
925 12:12:49.446880 PCI: 00:1c.6
926 12:12:49.447378 PCI: 00:1c.7
927 12:12:49.449277 PCI: 00:1d.1
928 12:12:49.449770 PCI: 00:1d.2
929 12:12:49.452598 PCI: 00:1d.3
930 12:12:49.453203 PCI: 00:1d.4
931 12:12:49.453700 PCI: 00:1d.5
932 12:12:49.455886 PCI: 00:1e.1
933 12:12:49.456377 PCI: 00:1f.1
934 12:12:49.459254 PCI: 00:1f.2
935 12:12:49.459797 PCI: 00:1f.6
936 12:12:49.462262 PCI: Check your devicetree.cb.
937 12:12:49.465410 PCI: 00:02.0 scanning...
938 12:12:49.469247 scan_generic_bus for PCI: 00:02.0
939 12:12:49.472263 scan_generic_bus for PCI: 00:02.0 done
940 12:12:49.479027 scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs
941 12:12:49.481754 PCI: 00:14.0 scanning...
942 12:12:49.485939 scan_static_bus for PCI: 00:14.0
943 12:12:49.486516 USB0 port 0 enabled
944 12:12:49.488403 USB0 port 0 scanning...
945 12:12:49.491977 scan_static_bus for USB0 port 0
946 12:12:49.494991 USB2 port 0 enabled
947 12:12:49.495693 USB2 port 1 enabled
948 12:12:49.498604 USB2 port 2 disabled
949 12:12:49.502007 USB2 port 3 disabled
950 12:12:49.502585 USB2 port 5 disabled
951 12:12:49.505206 USB2 port 6 enabled
952 12:12:49.507978 USB2 port 9 enabled
953 12:12:49.508445 USB3 port 0 enabled
954 12:12:49.511050 USB3 port 1 enabled
955 12:12:49.514584 USB3 port 2 enabled
956 12:12:49.515050 USB3 port 3 enabled
957 12:12:49.517910 USB3 port 4 disabled
958 12:12:49.521152 USB2 port 0 scanning...
959 12:12:49.524257 scan_static_bus for USB2 port 0
960 12:12:49.527700 scan_static_bus for USB2 port 0 done
961 12:12:49.530979 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
962 12:12:49.534692 USB2 port 1 scanning...
963 12:12:49.538062 scan_static_bus for USB2 port 1
964 12:12:49.540471 scan_static_bus for USB2 port 1 done
965 12:12:49.547252 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
966 12:12:49.550606 USB2 port 6 scanning...
967 12:12:49.553764 scan_static_bus for USB2 port 6
968 12:12:49.556589 scan_static_bus for USB2 port 6 done
969 12:12:49.563238 scan_bus: scanning of bus USB2 port 6 took 9704 usecs
970 12:12:49.563850 USB2 port 9 scanning...
971 12:12:49.567256 scan_static_bus for USB2 port 9
972 12:12:49.573351 scan_static_bus for USB2 port 9 done
973 12:12:49.576804 scan_bus: scanning of bus USB2 port 9 took 9695 usecs
974 12:12:49.579783 USB3 port 0 scanning...
975 12:12:49.583105 scan_static_bus for USB3 port 0
976 12:12:49.586546 scan_static_bus for USB3 port 0 done
977 12:12:49.592869 scan_bus: scanning of bus USB3 port 0 took 9695 usecs
978 12:12:49.596412 USB3 port 1 scanning...
979 12:12:49.599449 scan_static_bus for USB3 port 1
980 12:12:49.602559 scan_static_bus for USB3 port 1 done
981 12:12:49.606067 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
982 12:12:49.608975 USB3 port 2 scanning...
983 12:12:49.612239 scan_static_bus for USB3 port 2
984 12:12:49.615777 scan_static_bus for USB3 port 2 done
985 12:12:49.622538 scan_bus: scanning of bus USB3 port 2 took 9688 usecs
986 12:12:49.625212 USB3 port 3 scanning...
987 12:12:49.629057 scan_static_bus for USB3 port 3
988 12:12:49.632170 scan_static_bus for USB3 port 3 done
989 12:12:49.638187 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
990 12:12:49.641434 scan_static_bus for USB0 port 0 done
991 12:12:49.644742 scan_bus: scanning of bus USB0 port 0 took 155337 usecs
992 12:12:49.651673 scan_static_bus for PCI: 00:14.0 done
993 12:12:49.654805 scan_bus: scanning of bus PCI: 00:14.0 took 172954 usecs
994 12:12:49.657976 PCI: 00:15.0 scanning...
995 12:12:49.661447 scan_generic_bus for PCI: 00:15.0
996 12:12:49.664750 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
997 12:12:49.671048 scan_generic_bus for PCI: 00:15.0 done
998 12:12:49.674647 scan_bus: scanning of bus PCI: 00:15.0 took 14277 usecs
999 12:12:49.677920 PCI: 00:15.1 scanning...
1000 12:12:49.680922 scan_generic_bus for PCI: 00:15.1
1001 12:12:49.687441 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1002 12:12:49.690926 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1003 12:12:49.694265 scan_generic_bus for PCI: 00:15.1 done
1004 12:12:49.700857 scan_bus: scanning of bus PCI: 00:15.1 took 18607 usecs
1005 12:12:49.703921 PCI: 00:19.0 scanning...
1006 12:12:49.707281 scan_generic_bus for PCI: 00:19.0
1007 12:12:49.710587 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1008 12:12:49.713627 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1009 12:12:49.716574 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1010 12:12:49.723801 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1011 12:12:49.726843 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1012 12:12:49.730324 scan_generic_bus for PCI: 00:19.0 done
1013 12:12:49.736475 scan_bus: scanning of bus PCI: 00:19.0 took 30735 usecs
1014 12:12:49.739751 PCI: 00:1d.0 scanning...
1015 12:12:49.743299 do_pci_scan_bridge for PCI: 00:1d.0
1016 12:12:49.746271 PCI: pci_scan_bus for bus 01
1017 12:12:49.749598 PCI: 01:00.0 [1c5c/1327] enabled
1018 12:12:49.753001 Enabling Common Clock Configuration
1019 12:12:49.755979 L1 Sub-State supported from root port 29
1020 12:12:49.758983 L1 Sub-State Support = 0xf
1021 12:12:49.762630 CommonModeRestoreTime = 0x28
1022 12:12:49.765904 Power On Value = 0x16, Power On Scale = 0x0
1023 12:12:49.769277 ASPM: Enabled L1
1024 12:12:49.772389 scan_bus: scanning of bus PCI: 00:1d.0 took 32770 usecs
1025 12:12:49.775500 PCI: 00:1e.2 scanning...
1026 12:12:49.778993 scan_generic_bus for PCI: 00:1e.2
1027 12:12:49.786029 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1028 12:12:49.789105 scan_generic_bus for PCI: 00:1e.2 done
1029 12:12:49.791813 scan_bus: scanning of bus PCI: 00:1e.2 took 13991 usecs
1030 12:12:49.795346 PCI: 00:1e.3 scanning...
1031 12:12:49.798791 scan_generic_bus for PCI: 00:1e.3
1032 12:12:49.804915 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1033 12:12:49.808048 scan_generic_bus for PCI: 00:1e.3 done
1034 12:12:49.811440 scan_bus: scanning of bus PCI: 00:1e.3 took 14004 usecs
1035 12:12:49.814635 PCI: 00:1f.0 scanning...
1036 12:12:49.817878 scan_static_bus for PCI: 00:1f.0
1037 12:12:49.821016 PNP: 0c09.0 enabled
1038 12:12:49.824681 scan_static_bus for PCI: 00:1f.0 done
1039 12:12:49.831159 scan_bus: scanning of bus PCI: 00:1f.0 took 12056 usecs
1040 12:12:49.834276 PCI: 00:1f.3 scanning...
1041 12:12:49.837471 scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs
1042 12:12:49.841127 PCI: 00:1f.4 scanning...
1043 12:12:49.844129 scan_generic_bus for PCI: 00:1f.4
1044 12:12:49.847377 scan_generic_bus for PCI: 00:1f.4 done
1045 12:12:49.854085 scan_bus: scanning of bus PCI: 00:1f.4 took 10190 usecs
1046 12:12:49.857094 PCI: 00:1f.5 scanning...
1047 12:12:49.860241 scan_generic_bus for PCI: 00:1f.5
1048 12:12:49.863517 scan_generic_bus for PCI: 00:1f.5 done
1049 12:12:49.870358 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1050 12:12:49.876643 scan_bus: scanning of bus DOMAIN: 0000 took 604876 usecs
1051 12:12:49.879961 scan_static_bus for Root Device done
1052 12:12:49.886895 scan_bus: scanning of bus Root Device took 624742 usecs
1053 12:12:49.887516 done
1054 12:12:49.889835 Chrome EC: UHEPI supported
1055 12:12:49.896346 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1056 12:12:49.899698 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1057 12:12:49.906238 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1058 12:12:49.913671 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1059 12:12:49.916524 SPI flash protection: WPSW=0 SRP0=0
1060 12:12:49.923762 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1061 12:12:49.926186 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1062 12:12:49.929875 found VGA at PCI: 00:02.0
1063 12:12:49.933443 Setting up VGA for PCI: 00:02.0
1064 12:12:49.939739 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1065 12:12:49.943165 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1066 12:12:49.946105 Allocating resources...
1067 12:12:49.949133 Reading resources...
1068 12:12:49.952709 Root Device read_resources bus 0 link: 0
1069 12:12:49.955574 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1070 12:12:49.962526 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1071 12:12:49.965394 DOMAIN: 0000 read_resources bus 0 link: 0
1072 12:12:49.973762 PCI: 00:14.0 read_resources bus 0 link: 0
1073 12:12:49.976457 USB0 port 0 read_resources bus 0 link: 0
1074 12:12:49.985479 USB0 port 0 read_resources bus 0 link: 0 done
1075 12:12:49.988027 PCI: 00:14.0 read_resources bus 0 link: 0 done
1076 12:12:49.995957 PCI: 00:15.0 read_resources bus 1 link: 0
1077 12:12:49.999264 PCI: 00:15.0 read_resources bus 1 link: 0 done
1078 12:12:50.005659 PCI: 00:15.1 read_resources bus 2 link: 0
1079 12:12:50.008686 PCI: 00:15.1 read_resources bus 2 link: 0 done
1080 12:12:50.016853 PCI: 00:19.0 read_resources bus 3 link: 0
1081 12:12:50.022963 PCI: 00:19.0 read_resources bus 3 link: 0 done
1082 12:12:50.026525 PCI: 00:1d.0 read_resources bus 1 link: 0
1083 12:12:50.032648 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1084 12:12:50.036166 PCI: 00:1e.2 read_resources bus 4 link: 0
1085 12:12:50.042638 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1086 12:12:50.045973 PCI: 00:1e.3 read_resources bus 5 link: 0
1087 12:12:50.052701 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1088 12:12:50.055899 PCI: 00:1f.0 read_resources bus 0 link: 0
1089 12:12:50.062510 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1090 12:12:50.069221 DOMAIN: 0000 read_resources bus 0 link: 0 done
1091 12:12:50.071732 Root Device read_resources bus 0 link: 0 done
1092 12:12:50.074986 Done reading resources.
1093 12:12:50.081766 Show resources in subtree (Root Device)...After reading.
1094 12:12:50.085169 Root Device child on link 0 CPU_CLUSTER: 0
1095 12:12:50.088308 CPU_CLUSTER: 0 child on link 0 APIC: 00
1096 12:12:50.091835 APIC: 00
1097 12:12:50.092295 APIC: 03
1098 12:12:50.094694 APIC: 05
1099 12:12:50.095153 APIC: 01
1100 12:12:50.095518 APIC: 02
1101 12:12:50.098399 APIC: 04
1102 12:12:50.098961 APIC: 06
1103 12:12:50.099334 APIC: 07
1104 12:12:50.148101 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1105 12:12:50.149030 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1106 12:12:50.149467 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1107 12:12:50.149830 PCI: 00:00.0
1108 12:12:50.150166 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1109 12:12:50.150561 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1110 12:12:50.198070 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1111 12:12:50.199025 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1112 12:12:50.199432 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1113 12:12:50.200014 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1114 12:12:50.200710 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1115 12:12:50.244254 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1116 12:12:50.244862 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1117 12:12:50.245250 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1118 12:12:50.245952 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1119 12:12:50.246343 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1120 12:12:50.248431 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1121 12:12:50.257949 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1122 12:12:50.264399 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1123 12:12:50.274337 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1124 12:12:50.277487 PCI: 00:02.0
1125 12:12:50.286873 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1126 12:12:50.296839 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1127 12:12:50.306334 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1128 12:12:50.306812 PCI: 00:04.0
1129 12:12:50.309892 PCI: 00:08.0
1130 12:12:50.319358 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1131 12:12:50.320014 PCI: 00:12.0
1132 12:12:50.329758 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1133 12:12:50.335947 PCI: 00:14.0 child on link 0 USB0 port 0
1134 12:12:50.345733 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1135 12:12:50.348784 USB0 port 0 child on link 0 USB2 port 0
1136 12:12:50.352456 USB2 port 0
1137 12:12:50.353031 USB2 port 1
1138 12:12:50.356037 USB2 port 2
1139 12:12:50.356611 USB2 port 3
1140 12:12:50.358823 USB2 port 5
1141 12:12:50.359396 USB2 port 6
1142 12:12:50.361958 USB2 port 9
1143 12:12:50.362427 USB3 port 0
1144 12:12:50.365462 USB3 port 1
1145 12:12:50.366039 USB3 port 2
1146 12:12:50.368699 USB3 port 3
1147 12:12:50.369274 USB3 port 4
1148 12:12:50.372015 PCI: 00:14.2
1149 12:12:50.381794 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1150 12:12:50.391631 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1151 12:12:50.394661 PCI: 00:14.3
1152 12:12:50.404439 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1153 12:12:50.407777 PCI: 00:15.0 child on link 0 I2C: 01:15
1154 12:12:50.417899 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 12:12:50.418485 I2C: 01:15
1156 12:12:50.424660 PCI: 00:15.1 child on link 0 I2C: 02:5d
1157 12:12:50.433973 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 12:12:50.434546 I2C: 02:5d
1159 12:12:50.437591 GENERIC: 0.0
1160 12:12:50.438173 PCI: 00:16.0
1161 12:12:50.446981 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 12:12:50.450374 PCI: 00:17.0
1163 12:12:50.460381 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1164 12:12:50.467002 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1165 12:12:50.476366 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1166 12:12:50.483048 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1167 12:12:50.492619 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1168 12:12:50.502701 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1169 12:12:50.506042 PCI: 00:19.0 child on link 0 I2C: 03:1a
1170 12:12:50.515744 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1171 12:12:50.519157 I2C: 03:1a
1172 12:12:50.519795 I2C: 03:38
1173 12:12:50.521941 I2C: 03:39
1174 12:12:50.522418 I2C: 03:3a
1175 12:12:50.525355 I2C: 03:3b
1176 12:12:50.528851 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1177 12:12:50.538631 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1178 12:12:50.548188 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1179 12:12:50.554875 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1180 12:12:50.557912 PCI: 01:00.0
1181 12:12:50.567792 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 12:12:50.568284 PCI: 00:1e.0
1183 12:12:50.581272 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1184 12:12:50.590795 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1185 12:12:50.593992 PCI: 00:1e.2 child on link 0 SPI: 00
1186 12:12:50.603669 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 12:12:50.606823 SPI: 00
1188 12:12:50.610089 PCI: 00:1e.3 child on link 0 SPI: 01
1189 12:12:50.619948 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:12:50.620533 SPI: 01
1191 12:12:50.626290 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1192 12:12:50.632922 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1193 12:12:50.642373 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1194 12:12:50.642933 PNP: 0c09.0
1195 12:12:50.652259 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1196 12:12:50.656262 PCI: 00:1f.3
1197 12:12:50.665854 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 12:12:50.675405 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1199 12:12:50.676034 PCI: 00:1f.4
1200 12:12:50.685345 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1201 12:12:50.695055 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1202 12:12:50.698449 PCI: 00:1f.5
1203 12:12:50.704421 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1204 12:12:50.711326 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1205 12:12:50.717979 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1206 12:12:50.724202 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1207 12:12:50.727528 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1208 12:12:50.734015 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1209 12:12:50.737537 PCI: 00:17.0 18 * [0x60 - 0x67] io
1210 12:12:50.740461 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1211 12:12:50.746746 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1212 12:12:50.754016 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1213 12:12:50.759811 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1214 12:12:50.770207 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1215 12:12:50.776098 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1216 12:12:50.779374 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1217 12:12:50.789051 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1218 12:12:50.792319 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1219 12:12:50.799227 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1220 12:12:50.802565 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1221 12:12:50.808951 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1222 12:12:50.811976 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1223 12:12:50.815649 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1224 12:12:50.821744 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1225 12:12:50.825093 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1226 12:12:50.831970 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1227 12:12:50.834994 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1228 12:12:50.841079 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1229 12:12:50.844697 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1230 12:12:50.851376 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1231 12:12:50.854440 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1232 12:12:50.861145 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1233 12:12:50.864493 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1234 12:12:50.870951 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1235 12:12:50.874404 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1236 12:12:50.880229 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1237 12:12:50.883243 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1238 12:12:50.889823 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1239 12:12:50.893108 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1240 12:12:50.899697 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1241 12:12:50.909341 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1242 12:12:50.912864 avoid_fixed_resources: DOMAIN: 0000
1243 12:12:50.919555 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1244 12:12:50.922859 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1245 12:12:50.932805 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1246 12:12:50.938780 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1247 12:12:50.945516 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1248 12:12:50.955241 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1249 12:12:50.961493 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1250 12:12:50.968492 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1251 12:12:50.978604 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1252 12:12:50.984534 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1253 12:12:50.991233 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1254 12:12:51.000635 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1255 12:12:51.001211 Setting resources...
1256 12:12:51.007734 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1257 12:12:51.011275 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1258 12:12:51.017383 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1259 12:12:51.020467 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1260 12:12:51.023995 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1261 12:12:51.030310 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1262 12:12:51.036856 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1263 12:12:51.043757 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1264 12:12:51.049719 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1265 12:12:51.056225 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1266 12:12:51.059814 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1267 12:12:51.066092 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1268 12:12:51.069364 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1269 12:12:51.076069 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1270 12:12:51.079325 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1271 12:12:51.085781 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1272 12:12:51.088795 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1273 12:12:51.095538 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1274 12:12:51.098802 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1275 12:12:51.105310 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1276 12:12:51.108930 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1277 12:12:51.115146 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1278 12:12:51.118393 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1279 12:12:51.124720 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1280 12:12:51.128076 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1281 12:12:51.134798 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1282 12:12:51.138101 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1283 12:12:51.144276 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1284 12:12:51.147409 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1285 12:12:51.154517 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1286 12:12:51.157640 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1287 12:12:51.163913 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1288 12:12:51.171039 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1289 12:12:51.177095 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1290 12:12:51.183371 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1291 12:12:51.192799 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1292 12:12:51.196582 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1293 12:12:51.203360 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1294 12:12:51.209665 Root Device assign_resources, bus 0 link: 0
1295 12:12:51.212953 DOMAIN: 0000 assign_resources, bus 0 link: 0
1296 12:12:51.222476 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1297 12:12:51.229178 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1298 12:12:51.238971 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1299 12:12:51.245519 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1300 12:12:51.255027 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1301 12:12:51.261561 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1302 12:12:51.268123 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 12:12:51.271553 PCI: 00:14.0 assign_resources, bus 0 link: 0
1304 12:12:51.281072 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1305 12:12:51.287784 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1306 12:12:51.297359 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1307 12:12:51.304005 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1308 12:12:51.310528 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 12:12:51.313921 PCI: 00:15.0 assign_resources, bus 1 link: 0
1310 12:12:51.323644 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1311 12:12:51.326690 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 12:12:51.333601 PCI: 00:15.1 assign_resources, bus 2 link: 0
1313 12:12:51.339773 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1314 12:12:51.349794 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1315 12:12:51.356051 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1316 12:12:51.362119 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1317 12:12:51.372458 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1318 12:12:51.378785 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1319 12:12:51.388985 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1320 12:12:51.395604 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1321 12:12:51.398498 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 12:12:51.405146 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 12:12:51.412203 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1324 12:12:51.421713 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1325 12:12:51.431365 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1326 12:12:51.434694 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1327 12:12:51.444509 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1328 12:12:51.447818 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1329 12:12:51.457479 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1330 12:12:51.464081 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1331 12:12:51.470275 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 12:12:51.473823 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 12:12:51.483359 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1334 12:12:51.486607 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 12:12:51.492929 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 12:12:51.496105 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 12:12:51.503246 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 12:12:51.506070 LPC: Trying to open IO window from 800 size 1ff
1339 12:12:51.516049 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1340 12:12:51.522821 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1341 12:12:51.532487 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1342 12:12:51.539003 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1343 12:12:51.545519 DOMAIN: 0000 assign_resources, bus 0 link: 0
1344 12:12:51.548753 Root Device assign_resources, bus 0 link: 0
1345 12:12:51.552137 Done setting resources.
1346 12:12:51.558071 Show resources in subtree (Root Device)...After assigning values.
1347 12:12:51.561724 Root Device child on link 0 CPU_CLUSTER: 0
1348 12:12:51.565029 CPU_CLUSTER: 0 child on link 0 APIC: 00
1349 12:12:51.568300 APIC: 00
1350 12:12:51.568754 APIC: 03
1351 12:12:51.571523 APIC: 05
1352 12:12:51.572060 APIC: 01
1353 12:12:51.572429 APIC: 02
1354 12:12:51.574691 APIC: 04
1355 12:12:51.575144 APIC: 06
1356 12:12:51.575501 APIC: 07
1357 12:12:51.581444 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1358 12:12:51.591033 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1359 12:12:51.600689 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1360 12:12:51.603894 PCI: 00:00.0
1361 12:12:51.613932 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1362 12:12:51.623550 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1363 12:12:51.630449 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1364 12:12:51.639925 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1365 12:12:51.649718 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1366 12:12:51.659509 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1367 12:12:51.669039 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1368 12:12:51.679147 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1369 12:12:51.689134 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1370 12:12:51.695470 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1371 12:12:51.704901 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1372 12:12:51.714953 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1373 12:12:51.724329 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1374 12:12:51.734629 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1375 12:12:51.743965 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1376 12:12:51.753833 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1377 12:12:51.754404 PCI: 00:02.0
1378 12:12:51.767022 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1379 12:12:51.776944 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1380 12:12:51.786470 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1381 12:12:51.787046 PCI: 00:04.0
1382 12:12:51.789947 PCI: 00:08.0
1383 12:12:51.799474 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1384 12:12:51.799997 PCI: 00:12.0
1385 12:12:51.809092 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1386 12:12:51.815760 PCI: 00:14.0 child on link 0 USB0 port 0
1387 12:12:51.825206 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1388 12:12:51.828601 USB0 port 0 child on link 0 USB2 port 0
1389 12:12:51.831968 USB2 port 0
1390 12:12:51.832435 USB2 port 1
1391 12:12:51.835119 USB2 port 2
1392 12:12:51.838646 USB2 port 3
1393 12:12:51.839221 USB2 port 5
1394 12:12:51.841691 USB2 port 6
1395 12:12:51.842156 USB2 port 9
1396 12:12:51.845349 USB3 port 0
1397 12:12:51.845816 USB3 port 1
1398 12:12:51.848119 USB3 port 2
1399 12:12:51.848586 USB3 port 3
1400 12:12:51.851401 USB3 port 4
1401 12:12:51.851886 PCI: 00:14.2
1402 12:12:51.861379 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1403 12:12:51.874348 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1404 12:12:51.874919 PCI: 00:14.3
1405 12:12:51.884255 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1406 12:12:51.891038 PCI: 00:15.0 child on link 0 I2C: 01:15
1407 12:12:51.901066 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1408 12:12:51.901636 I2C: 01:15
1409 12:12:51.907243 PCI: 00:15.1 child on link 0 I2C: 02:5d
1410 12:12:51.917225 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1411 12:12:51.917952 I2C: 02:5d
1412 12:12:51.920013 GENERIC: 0.0
1413 12:12:51.920480 PCI: 00:16.0
1414 12:12:51.930077 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1415 12:12:51.933731 PCI: 00:17.0
1416 12:12:51.943491 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1417 12:12:51.952812 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1418 12:12:51.962852 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1419 12:12:51.972823 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1420 12:12:51.979343 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1421 12:12:51.992190 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1422 12:12:51.995287 PCI: 00:19.0 child on link 0 I2C: 03:1a
1423 12:12:52.005102 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1424 12:12:52.008299 I2C: 03:1a
1425 12:12:52.008767 I2C: 03:38
1426 12:12:52.011492 I2C: 03:39
1427 12:12:52.011997 I2C: 03:3a
1428 12:12:52.014984 I2C: 03:3b
1429 12:12:52.018444 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1430 12:12:52.027918 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1431 12:12:52.037952 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1432 12:12:52.047204 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1433 12:12:52.050604 PCI: 01:00.0
1434 12:12:52.060365 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1435 12:12:52.060932 PCI: 00:1e.0
1436 12:12:52.073507 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1437 12:12:52.083213 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1438 12:12:52.086322 PCI: 00:1e.2 child on link 0 SPI: 00
1439 12:12:52.096469 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1440 12:12:52.099210 SPI: 00
1441 12:12:52.102654 PCI: 00:1e.3 child on link 0 SPI: 01
1442 12:12:52.112502 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1443 12:12:52.113066 SPI: 01
1444 12:12:52.119449 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1445 12:12:52.125905 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1446 12:12:52.135612 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1447 12:12:52.138611 PNP: 0c09.0
1448 12:12:52.144945 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1449 12:12:52.148961 PCI: 00:1f.3
1450 12:12:52.158713 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1451 12:12:52.168038 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1452 12:12:52.171424 PCI: 00:1f.4
1453 12:12:52.181182 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1454 12:12:52.190774 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1455 12:12:52.191345 PCI: 00:1f.5
1456 12:12:52.200719 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1457 12:12:52.203575 Done allocating resources.
1458 12:12:52.210414 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1459 12:12:52.213763 Enabling resources...
1460 12:12:52.217039 PCI: 00:00.0 subsystem <- 8086/9b61
1461 12:12:52.220161 PCI: 00:00.0 cmd <- 06
1462 12:12:52.223735 PCI: 00:02.0 subsystem <- 8086/9b41
1463 12:12:52.227141 PCI: 00:02.0 cmd <- 03
1464 12:12:52.230383 PCI: 00:08.0 cmd <- 06
1465 12:12:52.232882 PCI: 00:12.0 subsystem <- 8086/02f9
1466 12:12:52.233348 PCI: 00:12.0 cmd <- 02
1467 12:12:52.239817 PCI: 00:14.0 subsystem <- 8086/02ed
1468 12:12:52.240369 PCI: 00:14.0 cmd <- 02
1469 12:12:52.243200 PCI: 00:14.2 cmd <- 02
1470 12:12:52.246653 PCI: 00:14.3 subsystem <- 8086/02f0
1471 12:12:52.249838 PCI: 00:14.3 cmd <- 02
1472 12:12:52.252763 PCI: 00:15.0 subsystem <- 8086/02e8
1473 12:12:52.255877 PCI: 00:15.0 cmd <- 02
1474 12:12:52.259444 PCI: 00:15.1 subsystem <- 8086/02e9
1475 12:12:52.262847 PCI: 00:15.1 cmd <- 02
1476 12:12:52.266000 PCI: 00:16.0 subsystem <- 8086/02e0
1477 12:12:52.269691 PCI: 00:16.0 cmd <- 02
1478 12:12:52.272786 PCI: 00:17.0 subsystem <- 8086/02d3
1479 12:12:52.276066 PCI: 00:17.0 cmd <- 03
1480 12:12:52.279013 PCI: 00:19.0 subsystem <- 8086/02c5
1481 12:12:52.282409 PCI: 00:19.0 cmd <- 02
1482 12:12:52.285587 PCI: 00:1d.0 bridge ctrl <- 0013
1483 12:12:52.288799 PCI: 00:1d.0 subsystem <- 8086/02b0
1484 12:12:52.292017 PCI: 00:1d.0 cmd <- 06
1485 12:12:52.295159 PCI: 00:1e.0 subsystem <- 8086/02a8
1486 12:12:52.298917 PCI: 00:1e.0 cmd <- 06
1487 12:12:52.302239 PCI: 00:1e.2 subsystem <- 8086/02aa
1488 12:12:52.302817 PCI: 00:1e.2 cmd <- 06
1489 12:12:52.308275 PCI: 00:1e.3 subsystem <- 8086/02ab
1490 12:12:52.308833 PCI: 00:1e.3 cmd <- 02
1491 12:12:52.315184 PCI: 00:1f.0 subsystem <- 8086/0284
1492 12:12:52.315801 PCI: 00:1f.0 cmd <- 407
1493 12:12:52.318431 PCI: 00:1f.3 subsystem <- 8086/02c8
1494 12:12:52.321503 PCI: 00:1f.3 cmd <- 02
1495 12:12:52.324753 PCI: 00:1f.4 subsystem <- 8086/02a3
1496 12:12:52.328333 PCI: 00:1f.4 cmd <- 03
1497 12:12:52.331314 PCI: 00:1f.5 subsystem <- 8086/02a4
1498 12:12:52.334678 PCI: 00:1f.5 cmd <- 406
1499 12:12:52.343730 PCI: 01:00.0 cmd <- 02
1500 12:12:52.348773 done.
1501 12:12:52.360806 ME: Version: 14.0.39.1367
1502 12:12:52.367157 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1503 12:12:52.370630 Initializing devices...
1504 12:12:52.371200 Root Device init ...
1505 12:12:52.377165 Chrome EC: Set SMI mask to 0x0000000000000000
1506 12:12:52.383366 Chrome EC: clear events_b mask to 0x0000000000000000
1507 12:12:52.386648 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1508 12:12:52.393261 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1509 12:12:52.399552 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1510 12:12:52.403008 Chrome EC: Set WAKE mask to 0x0000000000000000
1511 12:12:52.409563 Root Device init finished in 35151 usecs
1512 12:12:52.412694 CPU_CLUSTER: 0 init ...
1513 12:12:52.416363 CPU_CLUSTER: 0 init finished in 2449 usecs
1514 12:12:52.421274 PCI: 00:00.0 init ...
1515 12:12:52.424470 CPU TDP: 15 Watts
1516 12:12:52.427895 CPU PL2 = 64 Watts
1517 12:12:52.431294 PCI: 00:00.0 init finished in 7082 usecs
1518 12:12:52.434415 PCI: 00:02.0 init ...
1519 12:12:52.437616 PCI: 00:02.0 init finished in 2245 usecs
1520 12:12:52.441167 PCI: 00:08.0 init ...
1521 12:12:52.444362 PCI: 00:08.0 init finished in 2254 usecs
1522 12:12:52.447695 PCI: 00:12.0 init ...
1523 12:12:52.450935 PCI: 00:12.0 init finished in 2253 usecs
1524 12:12:52.454295 PCI: 00:14.0 init ...
1525 12:12:52.457523 PCI: 00:14.0 init finished in 2252 usecs
1526 12:12:52.460825 PCI: 00:14.2 init ...
1527 12:12:52.463687 PCI: 00:14.2 init finished in 2244 usecs
1528 12:12:52.466866 PCI: 00:14.3 init ...
1529 12:12:52.470300 PCI: 00:14.3 init finished in 2271 usecs
1530 12:12:52.473814 PCI: 00:15.0 init ...
1531 12:12:52.477009 DW I2C bus 0 at 0xd121f000 (400 KHz)
1532 12:12:52.483724 PCI: 00:15.0 init finished in 5978 usecs
1533 12:12:52.484309 PCI: 00:15.1 init ...
1534 12:12:52.490542 DW I2C bus 1 at 0xd1220000 (400 KHz)
1535 12:12:52.493264 PCI: 00:15.1 init finished in 5979 usecs
1536 12:12:52.496478 PCI: 00:16.0 init ...
1537 12:12:52.500120 PCI: 00:16.0 init finished in 2253 usecs
1538 12:12:52.503123 PCI: 00:19.0 init ...
1539 12:12:52.506742 DW I2C bus 4 at 0xd1222000 (400 KHz)
1540 12:12:52.509756 PCI: 00:19.0 init finished in 5980 usecs
1541 12:12:52.513156 PCI: 00:1d.0 init ...
1542 12:12:52.516244 Initializing PCH PCIe bridge.
1543 12:12:52.519620 PCI: 00:1d.0 init finished in 5287 usecs
1544 12:12:52.523316 PCI: 00:1f.0 init ...
1545 12:12:52.526501 IOAPIC: Initializing IOAPIC at 0xfec00000
1546 12:12:52.533358 IOAPIC: Bootstrap Processor Local APIC = 0x00
1547 12:12:52.533910 IOAPIC: ID = 0x02
1548 12:12:52.536486 IOAPIC: Dumping registers
1549 12:12:52.539572 reg 0x0000: 0x02000000
1550 12:12:52.542977 reg 0x0001: 0x00770020
1551 12:12:52.546181 reg 0x0002: 0x00000000
1552 12:12:52.549354 PCI: 00:1f.0 init finished in 23552 usecs
1553 12:12:52.552902 PCI: 00:1f.4 init ...
1554 12:12:52.555625 PCI: 00:1f.4 init finished in 2262 usecs
1555 12:12:52.567462 PCI: 01:00.0 init ...
1556 12:12:52.570903 PCI: 01:00.0 init finished in 2252 usecs
1557 12:12:52.574999 PNP: 0c09.0 init ...
1558 12:12:52.578688 Google Chrome EC uptime: 11.137 seconds
1559 12:12:52.585101 Google Chrome AP resets since EC boot: 0
1560 12:12:52.588126 Google Chrome most recent AP reset causes:
1561 12:12:52.595127 Google Chrome EC reset flags at last EC boot: reset-pin
1562 12:12:52.598203 PNP: 0c09.0 init finished in 20580 usecs
1563 12:12:52.601364 Devices initialized
1564 12:12:52.604348 Show all devs... After init.
1565 12:12:52.604817 Root Device: enabled 1
1566 12:12:52.607961 CPU_CLUSTER: 0: enabled 1
1567 12:12:52.611083 DOMAIN: 0000: enabled 1
1568 12:12:52.611546 APIC: 00: enabled 1
1569 12:12:52.614577 PCI: 00:00.0: enabled 1
1570 12:12:52.617740 PCI: 00:02.0: enabled 1
1571 12:12:52.620666 PCI: 00:04.0: enabled 0
1572 12:12:52.621163 PCI: 00:05.0: enabled 0
1573 12:12:52.624476 PCI: 00:12.0: enabled 1
1574 12:12:52.627319 PCI: 00:12.5: enabled 0
1575 12:12:52.630748 PCI: 00:12.6: enabled 0
1576 12:12:52.631362 PCI: 00:14.0: enabled 1
1577 12:12:52.634128 PCI: 00:14.1: enabled 0
1578 12:12:52.637076 PCI: 00:14.3: enabled 1
1579 12:12:52.640380 PCI: 00:14.5: enabled 0
1580 12:12:52.640943 PCI: 00:15.0: enabled 1
1581 12:12:52.644078 PCI: 00:15.1: enabled 1
1582 12:12:52.647361 PCI: 00:15.2: enabled 0
1583 12:12:52.650320 PCI: 00:15.3: enabled 0
1584 12:12:52.650784 PCI: 00:16.0: enabled 1
1585 12:12:52.653336 PCI: 00:16.1: enabled 0
1586 12:12:52.656498 PCI: 00:16.2: enabled 0
1587 12:12:52.660105 PCI: 00:16.3: enabled 0
1588 12:12:52.660669 PCI: 00:16.4: enabled 0
1589 12:12:52.663206 PCI: 00:16.5: enabled 0
1590 12:12:52.666447 PCI: 00:17.0: enabled 1
1591 12:12:52.669646 PCI: 00:19.0: enabled 1
1592 12:12:52.670107 PCI: 00:19.1: enabled 0
1593 12:12:52.673307 PCI: 00:19.2: enabled 0
1594 12:12:52.676406 PCI: 00:1a.0: enabled 0
1595 12:12:52.679655 PCI: 00:1c.0: enabled 0
1596 12:12:52.680235 PCI: 00:1c.1: enabled 0
1597 12:12:52.682658 PCI: 00:1c.2: enabled 0
1598 12:12:52.686044 PCI: 00:1c.3: enabled 0
1599 12:12:52.689366 PCI: 00:1c.4: enabled 0
1600 12:12:52.690099 PCI: 00:1c.5: enabled 0
1601 12:12:52.692621 PCI: 00:1c.6: enabled 0
1602 12:12:52.695957 PCI: 00:1c.7: enabled 0
1603 12:12:52.699277 PCI: 00:1d.0: enabled 1
1604 12:12:52.699937 PCI: 00:1d.1: enabled 0
1605 12:12:52.702224 PCI: 00:1d.2: enabled 0
1606 12:12:52.705380 PCI: 00:1d.3: enabled 0
1607 12:12:52.709275 PCI: 00:1d.4: enabled 0
1608 12:12:52.709857 PCI: 00:1d.5: enabled 0
1609 12:12:52.712279 PCI: 00:1e.0: enabled 1
1610 12:12:52.715730 PCI: 00:1e.1: enabled 0
1611 12:12:52.719137 PCI: 00:1e.2: enabled 1
1612 12:12:52.719749 PCI: 00:1e.3: enabled 1
1613 12:12:52.722188 PCI: 00:1f.0: enabled 1
1614 12:12:52.724874 PCI: 00:1f.1: enabled 0
1615 12:12:52.728108 PCI: 00:1f.2: enabled 0
1616 12:12:52.728570 PCI: 00:1f.3: enabled 1
1617 12:12:52.731372 PCI: 00:1f.4: enabled 1
1618 12:12:52.734769 PCI: 00:1f.5: enabled 1
1619 12:12:52.738190 PCI: 00:1f.6: enabled 0
1620 12:12:52.738659 USB0 port 0: enabled 1
1621 12:12:52.741535 I2C: 01:15: enabled 1
1622 12:12:52.744538 I2C: 02:5d: enabled 1
1623 12:12:52.745007 GENERIC: 0.0: enabled 1
1624 12:12:52.748412 I2C: 03:1a: enabled 1
1625 12:12:52.751154 I2C: 03:38: enabled 1
1626 12:12:52.751767 I2C: 03:39: enabled 1
1627 12:12:52.754379 I2C: 03:3a: enabled 1
1628 12:12:52.758179 I2C: 03:3b: enabled 1
1629 12:12:52.761038 PCI: 00:00.0: enabled 1
1630 12:12:52.761525 SPI: 00: enabled 1
1631 12:12:52.764521 SPI: 01: enabled 1
1632 12:12:52.767635 PNP: 0c09.0: enabled 1
1633 12:12:52.768182 USB2 port 0: enabled 1
1634 12:12:52.770869 USB2 port 1: enabled 1
1635 12:12:52.773589 USB2 port 2: enabled 0
1636 12:12:52.774055 USB2 port 3: enabled 0
1637 12:12:52.777636 USB2 port 5: enabled 0
1638 12:12:52.780515 USB2 port 6: enabled 1
1639 12:12:52.783487 USB2 port 9: enabled 1
1640 12:12:52.784004 USB3 port 0: enabled 1
1641 12:12:52.787138 USB3 port 1: enabled 1
1642 12:12:52.790378 USB3 port 2: enabled 1
1643 12:12:52.790951 USB3 port 3: enabled 1
1644 12:12:52.793836 USB3 port 4: enabled 0
1645 12:12:52.796670 APIC: 03: enabled 1
1646 12:12:52.797136 APIC: 05: enabled 1
1647 12:12:52.799889 APIC: 01: enabled 1
1648 12:12:52.803022 APIC: 02: enabled 1
1649 12:12:52.803487 APIC: 04: enabled 1
1650 12:12:52.806708 APIC: 06: enabled 1
1651 12:12:52.809757 APIC: 07: enabled 1
1652 12:12:52.810222 PCI: 00:08.0: enabled 1
1653 12:12:52.812969 PCI: 00:14.2: enabled 1
1654 12:12:52.816111 PCI: 01:00.0: enabled 1
1655 12:12:52.819744 Disabling ACPI via APMC:
1656 12:12:52.823167 done.
1657 12:12:52.826303 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1658 12:12:52.829549 ELOG: NV offset 0xaf0000 size 0x4000
1659 12:12:52.836178 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1660 12:12:52.843697 ELOG: Event(17) added with size 13 at 2023-04-03 12:12:52 UTC
1661 12:12:52.849646 ELOG: Event(92) added with size 9 at 2023-04-03 12:12:52 UTC
1662 12:12:52.856319 ELOG: Event(93) added with size 9 at 2023-04-03 12:12:52 UTC
1663 12:12:52.862949 ELOG: Event(9A) added with size 9 at 2023-04-03 12:12:52 UTC
1664 12:12:52.869855 ELOG: Event(9E) added with size 10 at 2023-04-03 12:12:52 UTC
1665 12:12:52.876034 ELOG: Event(9F) added with size 14 at 2023-04-03 12:12:52 UTC
1666 12:12:52.882685 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1667 12:12:52.889145 ELOG: Event(A1) added with size 10 at 2023-04-03 12:12:52 UTC
1668 12:12:52.895729 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1669 12:12:52.902154 ELOG: Event(A0) added with size 9 at 2023-04-03 12:12:52 UTC
1670 12:12:52.905332 elog_add_boot_reason: Logged dev mode boot
1671 12:12:52.908329 Finalize devices...
1672 12:12:52.911474 PCI: 00:17.0 final
1673 12:12:52.912086 Devices finalized
1674 12:12:52.918443 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1675 12:12:52.921311 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1676 12:12:52.927991 ME: HFSTS1 : 0x90000245
1677 12:12:52.931164 ME: HFSTS2 : 0x3B850126
1678 12:12:52.934756 ME: HFSTS3 : 0x00000020
1679 12:12:52.938091 ME: HFSTS4 : 0x00004800
1680 12:12:52.944294 ME: HFSTS5 : 0x00000000
1681 12:12:52.947980 ME: HFSTS6 : 0x40400006
1682 12:12:52.951204 ME: Manufacturing Mode : NO
1683 12:12:52.953827 ME: FW Partition Table : OK
1684 12:12:52.957214 ME: Bringup Loader Failure : NO
1685 12:12:52.960717 ME: Firmware Init Complete : YES
1686 12:12:52.964201 ME: Boot Options Present : NO
1687 12:12:52.967268 ME: Update In Progress : NO
1688 12:12:52.970618 ME: D0i3 Support : YES
1689 12:12:52.973503 ME: Low Power State Enabled : NO
1690 12:12:52.977049 ME: CPU Replaced : NO
1691 12:12:52.980237 ME: CPU Replacement Valid : YES
1692 12:12:52.983146 ME: Current Working State : 5
1693 12:12:52.986558 ME: Current Operation State : 1
1694 12:12:52.989869 ME: Current Operation Mode : 0
1695 12:12:52.992996 ME: Error Code : 0
1696 12:12:52.996622 ME: CPU Debug Disabled : YES
1697 12:12:52.999845 ME: TXT Support : NO
1698 12:12:53.006232 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1699 12:12:53.012462 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1700 12:12:53.012936 CBFS @ c08000 size 3f8000
1701 12:12:53.018990 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1702 12:12:53.022877 CBFS: Locating 'fallback/dsdt.aml'
1703 12:12:53.029133 CBFS: Found @ offset 10bb80 size 3fa5
1704 12:12:53.032262 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1705 12:12:53.035360 CBFS @ c08000 size 3f8000
1706 12:12:53.042164 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1707 12:12:53.045747 CBFS: Locating 'fallback/slic'
1708 12:12:53.048150 CBFS: 'fallback/slic' not found.
1709 12:12:53.052055 ACPI: Writing ACPI tables at 99b3e000.
1710 12:12:53.055033 ACPI: * FACS
1711 12:12:53.055636 ACPI: * DSDT
1712 12:12:53.061345 Ramoops buffer: 0x100000@0x99a3d000.
1713 12:12:53.064527 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1714 12:12:53.068283 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1715 12:12:53.071644 Google Chrome EC: version:
1716 12:12:53.075284 ro: helios_v2.0.2659-56403530b
1717 12:12:53.078416 rw: helios_v2.0.2849-c41de27e7d
1718 12:12:53.081950 running image: 1
1719 12:12:53.084685 ACPI: * FADT
1720 12:12:53.085246 SCI is IRQ9
1721 12:12:53.091482 ACPI: added table 1/32, length now 40
1722 12:12:53.092097 ACPI: * SSDT
1723 12:12:53.094630 Found 1 CPU(s) with 8 core(s) each.
1724 12:12:53.101104 Error: Could not locate 'wifi_sar' in VPD.
1725 12:12:53.104262 Checking CBFS for default SAR values
1726 12:12:53.107752 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1727 12:12:53.110899 CBFS @ c08000 size 3f8000
1728 12:12:53.117175 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1729 12:12:53.121069 CBFS: Locating 'wifi_sar_defaults.hex'
1730 12:12:53.123698 CBFS: Found @ offset 5fac0 size 77
1731 12:12:53.127233 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1732 12:12:53.133668 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1733 12:12:53.136805 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1734 12:12:53.143738 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1735 12:12:53.146968 failed to find key in VPD: dsm_calib_r0_0
1736 12:12:53.156702 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1737 12:12:53.163253 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1738 12:12:53.166405 failed to find key in VPD: dsm_calib_r0_1
1739 12:12:53.176401 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1740 12:12:53.179753 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1741 12:12:53.182359 failed to find key in VPD: dsm_calib_r0_2
1742 12:12:53.192742 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1743 12:12:53.198963 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1744 12:12:53.201851 failed to find key in VPD: dsm_calib_r0_3
1745 12:12:53.212051 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1746 12:12:53.215259 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1747 12:12:53.221647 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1748 12:12:53.225056 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1749 12:12:53.228727 EC returned error result code 1
1750 12:12:53.231833 EC returned error result code 1
1751 12:12:53.235198 EC returned error result code 1
1752 12:12:53.241671 PS2K: Bad resp from EC. Vivaldi disabled!
1753 12:12:53.248068 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1754 12:12:53.251351 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1755 12:12:53.258091 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1756 12:12:53.261407 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1757 12:12:53.267724 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1758 12:12:53.274412 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1759 12:12:53.280744 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1760 12:12:53.287623 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1761 12:12:53.290888 ACPI: added table 2/32, length now 44
1762 12:12:53.291449 ACPI: * MCFG
1763 12:12:53.293814 ACPI: added table 3/32, length now 48
1764 12:12:53.297197 ACPI: * TPM2
1765 12:12:53.300190 TPM2 log created at 99a2d000
1766 12:12:53.303698 ACPI: added table 4/32, length now 52
1767 12:12:53.306755 ACPI: * MADT
1768 12:12:53.307222 SCI is IRQ9
1769 12:12:53.309897 ACPI: added table 5/32, length now 56
1770 12:12:53.313071 current = 99b43ac0
1771 12:12:53.313552 ACPI: * DMAR
1772 12:12:53.316946 ACPI: added table 6/32, length now 60
1773 12:12:53.319998 ACPI: * IGD OpRegion
1774 12:12:53.323213 GMA: Found VBT in CBFS
1775 12:12:53.326408 GMA: Found valid VBT in CBFS
1776 12:12:53.329465 ACPI: added table 7/32, length now 64
1777 12:12:53.329932 ACPI: * HPET
1778 12:12:53.336153 ACPI: added table 8/32, length now 68
1779 12:12:53.336717 ACPI: done.
1780 12:12:53.339648 ACPI tables: 31744 bytes.
1781 12:12:53.342848 smbios_write_tables: 99a2c000
1782 12:12:53.346094 EC returned error result code 3
1783 12:12:53.349361 Couldn't obtain OEM name from CBI
1784 12:12:53.352507 Create SMBIOS type 17
1785 12:12:53.356366 PCI: 00:00.0 (Intel Cannonlake)
1786 12:12:53.357013 PCI: 00:14.3 (Intel WiFi)
1787 12:12:53.359380 SMBIOS tables: 939 bytes.
1788 12:12:53.366038 Writing table forward entry at 0x00000500
1789 12:12:53.368788 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1790 12:12:53.375750 Writing coreboot table at 0x99b62000
1791 12:12:53.379073 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1792 12:12:53.385547 1. 0000000000001000-000000000009ffff: RAM
1793 12:12:53.388535 2. 00000000000a0000-00000000000fffff: RESERVED
1794 12:12:53.391943 3. 0000000000100000-0000000099a2bfff: RAM
1795 12:12:53.398531 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1796 12:12:53.405152 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1797 12:12:53.411510 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1798 12:12:53.415024 7. 000000009a000000-000000009f7fffff: RESERVED
1799 12:12:53.418340 8. 00000000e0000000-00000000efffffff: RESERVED
1800 12:12:53.424633 9. 00000000fc000000-00000000fc000fff: RESERVED
1801 12:12:53.427408 10. 00000000fe000000-00000000fe00ffff: RESERVED
1802 12:12:53.434730 11. 00000000fed10000-00000000fed17fff: RESERVED
1803 12:12:53.437567 12. 00000000fed80000-00000000fed83fff: RESERVED
1804 12:12:53.444311 13. 00000000fed90000-00000000fed91fff: RESERVED
1805 12:12:53.447426 14. 00000000feda0000-00000000feda1fff: RESERVED
1806 12:12:53.453574 15. 0000000100000000-000000045e7fffff: RAM
1807 12:12:53.457022 Graphics framebuffer located at 0xc0000000
1808 12:12:53.460860 Passing 5 GPIOs to payload:
1809 12:12:53.463267 NAME | PORT | POLARITY | VALUE
1810 12:12:53.470178 write protect | undefined | high | low
1811 12:12:53.476408 lid | undefined | high | high
1812 12:12:53.479944 power | undefined | high | low
1813 12:12:53.486515 oprom | undefined | high | low
1814 12:12:53.489747 EC in RW | 0x000000cb | high | low
1815 12:12:53.492620 Board ID: 4
1816 12:12:53.496246 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1817 12:12:53.499341 CBFS @ c08000 size 3f8000
1818 12:12:53.505980 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1819 12:12:53.512355 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d56
1820 12:12:53.516023 coreboot table: 1492 bytes.
1821 12:12:53.519136 IMD ROOT 0. 99fff000 00001000
1822 12:12:53.522338 IMD SMALL 1. 99ffe000 00001000
1823 12:12:53.525292 FSP MEMORY 2. 99c4e000 003b0000
1824 12:12:53.528700 CONSOLE 3. 99c2e000 00020000
1825 12:12:53.531959 FMAP 4. 99c2d000 0000054e
1826 12:12:53.535263 TIME STAMP 5. 99c2c000 00000910
1827 12:12:53.538685 VBOOT WORK 6. 99c18000 00014000
1828 12:12:53.542066 MRC DATA 7. 99c16000 00001958
1829 12:12:53.544943 ROMSTG STCK 8. 99c15000 00001000
1830 12:12:53.548182 AFTER CAR 9. 99c0b000 0000a000
1831 12:12:53.552026 RAMSTAGE 10. 99baf000 0005c000
1832 12:12:53.555129 REFCODE 11. 99b7a000 00035000
1833 12:12:53.558340 SMM BACKUP 12. 99b6a000 00010000
1834 12:12:53.561334 COREBOOT 13. 99b62000 00008000
1835 12:12:53.564592 ACPI 14. 99b3e000 00024000
1836 12:12:53.568261 ACPI GNVS 15. 99b3d000 00001000
1837 12:12:53.571253 RAMOOPS 16. 99a3d000 00100000
1838 12:12:53.574530 TPM2 TCGLOG17. 99a2d000 00010000
1839 12:12:53.577915 SMBIOS 18. 99a2c000 00000800
1840 12:12:53.580807 IMD small region:
1841 12:12:53.584227 IMD ROOT 0. 99ffec00 00000400
1842 12:12:53.587740 FSP RUNTIME 1. 99ffebe0 00000004
1843 12:12:53.591110 EC HOSTEVENT 2. 99ffebc0 00000008
1844 12:12:53.594506 POWER STATE 3. 99ffeb80 00000040
1845 12:12:53.597772 ROMSTAGE 4. 99ffeb60 00000004
1846 12:12:53.600684 MEM INFO 5. 99ffe9a0 000001b9
1847 12:12:53.603869 VPD 6. 99ffe920 0000006c
1848 12:12:53.607264 MTRR: Physical address space:
1849 12:12:53.613688 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1850 12:12:53.620378 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1851 12:12:53.626997 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1852 12:12:53.633038 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1853 12:12:53.639625 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1854 12:12:53.646267 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1855 12:12:53.652991 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1856 12:12:53.656217 MTRR: Fixed MSR 0x250 0x0606060606060606
1857 12:12:53.659005 MTRR: Fixed MSR 0x258 0x0606060606060606
1858 12:12:53.662362 MTRR: Fixed MSR 0x259 0x0000000000000000
1859 12:12:53.668802 MTRR: Fixed MSR 0x268 0x0606060606060606
1860 12:12:53.672162 MTRR: Fixed MSR 0x269 0x0606060606060606
1861 12:12:53.675751 MTRR: Fixed MSR 0x26a 0x0606060606060606
1862 12:12:53.678810 MTRR: Fixed MSR 0x26b 0x0606060606060606
1863 12:12:53.685367 MTRR: Fixed MSR 0x26c 0x0606060606060606
1864 12:12:53.688581 MTRR: Fixed MSR 0x26d 0x0606060606060606
1865 12:12:53.691757 MTRR: Fixed MSR 0x26e 0x0606060606060606
1866 12:12:53.695219 MTRR: Fixed MSR 0x26f 0x0606060606060606
1867 12:12:53.699179 call enable_fixed_mtrr()
1868 12:12:53.701644 CPU physical address size: 39 bits
1869 12:12:53.708471 MTRR: default type WB/UC MTRR counts: 6/8.
1870 12:12:53.711419 MTRR: WB selected as default type.
1871 12:12:53.718660 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1872 12:12:53.724469 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1873 12:12:53.728246 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1874 12:12:53.734709 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1875 12:12:53.741456 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1876 12:12:53.747806 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1877 12:12:53.754011 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 12:12:53.757806 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 12:12:53.760834 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 12:12:53.764156 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 12:12:53.770306 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 12:12:53.773587 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 12:12:53.777211 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 12:12:53.780193 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 12:12:53.786678 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 12:12:53.789966 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 12:12:53.793510 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 12:12:53.794085
1889 12:12:53.796637 MTRR check
1890 12:12:53.799963 Fixed MTRRs : Enabled
1891 12:12:53.800527 Variable MTRRs: Enabled
1892 12:12:53.800897
1893 12:12:53.803258 call enable_fixed_mtrr()
1894 12:12:53.809397 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1895 12:12:53.813375 CPU physical address size: 39 bits
1896 12:12:53.816423 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1897 12:12:53.822753 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 12:12:53.825983 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 12:12:53.829127 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 12:12:53.832229 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 12:12:53.838900 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 12:12:53.842744 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 12:12:53.845615 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 12:12:53.848578 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 12:12:53.855783 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 12:12:53.858686 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 12:12:53.861608 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 12:12:53.865038 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 12:12:53.871819 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 12:12:53.875236 call enable_fixed_mtrr()
1911 12:12:53.878608 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 12:12:53.881494 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 12:12:53.884660 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 12:12:53.891076 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 12:12:53.894705 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 12:12:53.898020 MTRR: Fixed MSR 0x26c 0x0606060606060606
1917 12:12:53.901171 MTRR: Fixed MSR 0x26d 0x0606060606060606
1918 12:12:53.907522 MTRR: Fixed MSR 0x26e 0x0606060606060606
1919 12:12:53.910636 MTRR: Fixed MSR 0x26f 0x0606060606060606
1920 12:12:53.914274 CPU physical address size: 39 bits
1921 12:12:53.917558 call enable_fixed_mtrr()
1922 12:12:53.920514 CBFS @ c08000 size 3f8000
1923 12:12:53.923843 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1924 12:12:53.930220 CBFS: Locating 'fallback/payload'
1925 12:12:53.933840 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 12:12:53.936855 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 12:12:53.940251 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 12:12:53.946758 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 12:12:53.950180 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 12:12:53.953157 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 12:12:53.956741 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 12:12:53.963035 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 12:12:53.966326 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 12:12:53.970001 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 12:12:53.972633 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 12:12:53.979510 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 12:12:53.982958 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 12:12:53.986102 call enable_fixed_mtrr()
1939 12:12:53.989107 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 12:12:53.992585 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 12:12:53.995707 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 12:12:54.002212 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 12:12:54.005380 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 12:12:54.008786 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 12:12:54.011669 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 12:12:54.018645 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 12:12:54.021750 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 12:12:54.024923 CPU physical address size: 39 bits
1949 12:12:54.028037 call enable_fixed_mtrr()
1950 12:12:54.031680 CPU physical address size: 39 bits
1951 12:12:54.034820 CPU physical address size: 39 bits
1952 12:12:54.038112 CBFS: Found @ offset 1c96c0 size 3f798
1953 12:12:54.044920 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 12:12:54.047647 MTRR: Fixed MSR 0x258 0x0606060606060606
1955 12:12:54.051406 MTRR: Fixed MSR 0x259 0x0000000000000000
1956 12:12:54.054908 MTRR: Fixed MSR 0x268 0x0606060606060606
1957 12:12:54.061188 MTRR: Fixed MSR 0x269 0x0606060606060606
1958 12:12:54.064372 MTRR: Fixed MSR 0x26a 0x0606060606060606
1959 12:12:54.068118 MTRR: Fixed MSR 0x26b 0x0606060606060606
1960 12:12:54.070866 MTRR: Fixed MSR 0x26c 0x0606060606060606
1961 12:12:54.077171 MTRR: Fixed MSR 0x26d 0x0606060606060606
1962 12:12:54.080496 MTRR: Fixed MSR 0x26e 0x0606060606060606
1963 12:12:54.083719 MTRR: Fixed MSR 0x26f 0x0606060606060606
1964 12:12:54.090560 MTRR: Fixed MSR 0x250 0x0606060606060606
1965 12:12:54.091301 call enable_fixed_mtrr()
1966 12:12:54.097281 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 12:12:54.100386 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 12:12:54.103278 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 12:12:54.106344 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 12:12:54.113242 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 12:12:54.116283 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 12:12:54.119845 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 12:12:54.122984 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 12:12:54.129567 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 12:12:54.132960 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 12:12:54.136180 CPU physical address size: 39 bits
1977 12:12:54.139338 call enable_fixed_mtrr()
1978 12:12:54.142618 Checking segment from ROM address 0xffdd16f8
1979 12:12:54.145956 CPU physical address size: 39 bits
1980 12:12:54.152428 Checking segment from ROM address 0xffdd1714
1981 12:12:54.155461 Loading segment from ROM address 0xffdd16f8
1982 12:12:54.158802 code (compression=0)
1983 12:12:54.165651 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1984 12:12:54.175169 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1985 12:12:54.178823 it's not compressed!
1986 12:12:54.269521 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1987 12:12:54.275842 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1988 12:12:54.282931 Loading segment from ROM address 0xffdd1714
1989 12:12:54.283513 Entry Point 0x30000000
1990 12:12:54.285715 Loaded segments
1991 12:12:54.291643 Finalizing chipset.
1992 12:12:54.294868 Finalizing SMM.
1993 12:12:54.298269 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1994 12:12:54.301473 mp_park_aps done after 0 msecs.
1995 12:12:54.307695 Jumping to boot code at 30000000(99b62000)
1996 12:12:54.314457 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1997 12:12:54.315038
1998 12:12:54.315411
1999 12:12:54.315872
2000 12:12:54.317261 Starting depthcharge on Helios...
2001 12:12:54.318508 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2002 12:12:54.319084 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2003 12:12:54.319545 Setting prompt string to ['hatch:']
2004 12:12:54.320052 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2005 12:12:54.321041
2006 12:12:54.327612 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2007 12:12:54.328202
2008 12:12:54.334130 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2009 12:12:54.334713
2010 12:12:54.340505 board_setup: Info: eMMC controller not present; skipping
2011 12:12:54.341083
2012 12:12:54.343440 New NVMe Controller 0x30053ac0 @ 00:1d:00
2013 12:12:54.344122
2014 12:12:54.350377 board_setup: Info: SDHCI controller not present; skipping
2015 12:12:54.350863
2016 12:12:54.356987 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2017 12:12:54.357566
2018 12:12:54.357935 Wipe memory regions:
2019 12:12:54.359934
2020 12:12:54.362759 [0x00000000001000, 0x000000000a0000)
2021 12:12:54.363219
2022 12:12:54.366372 [0x00000000100000, 0x00000030000000)
2023 12:12:54.428051
2024 12:12:54.430784 [0x00000030657430, 0x00000099a2c000)
2025 12:12:54.560319
2026 12:12:54.563512 [0x00000100000000, 0x0000045e800000)
2027 12:12:55.882750
2028 12:12:55.883320 R8152: Initializing
2029 12:12:55.883751
2030 12:12:55.886062 Version 9 (ocp_data = 6010)
2031 12:12:55.889851
2032 12:12:55.890425 R8152: Done initializing
2033 12:12:55.890800
2034 12:12:55.893052 Adding net device
2035 12:12:56.497659
2036 12:12:56.498367 R8152: Initializing
2037 12:12:56.498745
2038 12:12:56.500700 Version 6 (ocp_data = 5c30)
2039 12:12:56.501150
2040 12:12:56.504039 R8152: Done initializing
2041 12:12:56.504118
2042 12:12:56.509729 net_add_device: Attemp to include the same device
2043 12:12:56.509816
2044 12:12:56.516892 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2045 12:12:56.517065
2046 12:12:56.517144
2047 12:12:56.517212
2048 12:12:56.517526 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2050 12:12:56.618748 hatch: tftpboot 192.168.201.1 9849950/tftp-deploy-i42xxuus/kernel/bzImage 9849950/tftp-deploy-i42xxuus/kernel/cmdline 9849950/tftp-deploy-i42xxuus/ramdisk/ramdisk.cpio.gz
2051 12:12:56.619411 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2052 12:12:56.619967 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2053 12:12:56.624366 tftpboot 192.168.201.1 9849950/tftp-deploy-i42xxuus/kernel/bzImy-i42xxuus/kernel/cmdline 9849950/tftp-deploy-i42xxuus/ramdisk/ramdisk.cpio.gz
2054 12:12:56.624855
2055 12:12:56.625223 Waiting for link
2056 12:12:56.825562
2057 12:12:56.826143 done.
2058 12:12:56.826513
2059 12:12:56.826859 MAC: 00:24:32:50:21:91
2060 12:12:56.827214
2061 12:12:56.828225 Sending DHCP discover... done.
2062 12:12:56.828691
2063 12:12:56.831854 Waiting for reply... done.
2064 12:12:56.832321
2065 12:12:56.834920 Sending DHCP request... done.
2066 12:12:56.835382
2067 12:12:56.838765 Waiting for reply... done.
2068 12:12:56.839330
2069 12:12:56.841711 My ip is 192.168.201.14
2070 12:12:56.842178
2071 12:12:56.844881 The DHCP server ip is 192.168.201.1
2072 12:12:56.845464
2073 12:12:56.847971 TFTP server IP predefined by user: 192.168.201.1
2074 12:12:56.848440
2075 12:12:56.854142 Bootfile predefined by user: 9849950/tftp-deploy-i42xxuus/kernel/bzImage
2076 12:12:56.857957
2077 12:12:56.860608 Sending tftp read request... done.
2078 12:12:56.861073
2079 12:12:56.867823 Waiting for the transfer...
2080 12:12:56.868399
2081 12:12:57.574591 00000000 ################################################################
2082 12:12:57.575242
2083 12:12:58.280821 00080000 ################################################################
2084 12:12:58.281442
2085 12:12:58.999454 00100000 ################################################################
2086 12:12:59.000093
2087 12:12:59.712373 00180000 ################################################################
2088 12:12:59.712974
2089 12:13:00.421587 00200000 ################################################################
2090 12:13:00.422187
2091 12:13:01.134129 00280000 ################################################################
2092 12:13:01.134707
2093 12:13:01.850445 00300000 ################################################################
2094 12:13:01.851003
2095 12:13:02.575644 00380000 ################################################################
2096 12:13:02.576244
2097 12:13:03.297824 00400000 ################################################################
2098 12:13:03.298385
2099 12:13:04.042583 00480000 ################################################################
2100 12:13:04.043147
2101 12:13:04.774794 00500000 ################################################################
2102 12:13:04.775388
2103 12:13:05.495637 00580000 ################################################################
2104 12:13:05.496205
2105 12:13:06.211916 00600000 ################################################################
2106 12:13:06.212432
2107 12:13:06.929558 00680000 ################################################################
2108 12:13:06.930120
2109 12:13:07.646720 00700000 ################################################################
2110 12:13:07.647330
2111 12:13:07.669826 00780000 ## done.
2112 12:13:07.670396
2113 12:13:07.673230 The bootfile was 7880592 bytes long.
2114 12:13:07.673801
2115 12:13:07.675739 Sending tftp read request... done.
2116 12:13:07.676203
2117 12:13:07.679027 Waiting for the transfer...
2118 12:13:07.679496
2119 12:13:08.349665 00000000 ################################################################
2120 12:13:08.350190
2121 12:13:09.020855 00080000 ################################################################
2122 12:13:09.021376
2123 12:13:09.700223 00100000 ################################################################
2124 12:13:09.700736
2125 12:13:10.375470 00180000 ################################################################
2126 12:13:10.376028
2127 12:13:11.055004 00200000 ################################################################
2128 12:13:11.055531
2129 12:13:11.731012 00280000 ################################################################
2130 12:13:11.731538
2131 12:13:12.391311 00300000 ################################################################
2132 12:13:12.391854
2133 12:13:13.072704 00380000 ################################################################
2134 12:13:13.073210
2135 12:13:13.751457 00400000 ################################################################
2136 12:13:13.752057
2137 12:13:14.417867 00480000 ################################################################
2138 12:13:14.418494
2139 12:13:15.071472 00500000 ################################################################
2140 12:13:15.072066
2141 12:13:15.367042 00580000 ############################# done.
2142 12:13:15.367614
2143 12:13:15.370422 Sending tftp read request... done.
2144 12:13:15.370891
2145 12:13:15.374199 Waiting for the transfer...
2146 12:13:15.374667
2147 12:13:15.377285 00000000 # done.
2148 12:13:15.377778
2149 12:13:15.383790 Command line loaded dynamically from TFTP file: 9849950/tftp-deploy-i42xxuus/kernel/cmdline
2150 12:13:15.386745
2151 12:13:15.409741 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9849950/extract-nfsrootfs-aj3kseya,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2152 12:13:15.410349
2153 12:13:15.413145 ec_init(0): CrosEC protocol v3 supported (256, 256)
2154 12:13:15.418681
2155 12:13:15.421314 Shutting down all USB controllers.
2156 12:13:15.421780
2157 12:13:15.422146 Removing current net device
2158 12:13:15.429540
2159 12:13:15.430124 Finalizing coreboot
2160 12:13:15.430604
2161 12:13:15.435834 Exiting depthcharge with code 4 at timestamp: 28464557
2162 12:13:15.436302
2163 12:13:15.436669
2164 12:13:15.437010 Starting kernel ...
2165 12:13:15.437340
2166 12:13:15.437657
2167 12:13:15.438892 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2168 12:13:15.439414 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2169 12:13:15.439902 Setting prompt string to ['Linux version [0-9]']
2170 12:13:15.440298 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2171 12:13:15.440677 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2173 12:17:36.439678 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2175 12:17:36.439881 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2177 12:17:36.440053 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2180 12:17:36.440301 end: 2 depthcharge-action (duration 00:05:00) [common]
2182 12:17:36.440602 Cleaning after the job
2183 12:17:36.440689 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849950/tftp-deploy-i42xxuus/ramdisk
2184 12:17:36.441345 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849950/tftp-deploy-i42xxuus/kernel
2185 12:17:36.442051 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849950/tftp-deploy-i42xxuus/nfsrootfs
2186 12:17:36.504604 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849950/tftp-deploy-i42xxuus/modules
2187 12:17:36.504964 start: 4.1 power-off (timeout 00:00:30) [common]
2188 12:17:36.505130 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2189 12:17:36.574013 >> Command sent successfully.
2190 12:17:36.576405 Returned 0 in 0 seconds
2191 12:17:36.677177 end: 4.1 power-off (duration 00:00:00) [common]
2193 12:17:36.677488 start: 4.2 read-feedback (timeout 00:10:00) [common]
2194 12:17:36.677745 Listened to connection for namespace 'common' for up to 1s
2195 12:17:37.682728 Finalising connection for namespace 'common'
2196 12:17:37.682911 Disconnecting from shell: Finalise
2197 12:17:37.682987
2198 12:17:37.783801 end: 4.2 read-feedback (duration 00:00:01) [common]
2199 12:17:37.784017 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9849950
2200 12:17:37.961565 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9849950
2201 12:17:37.961760 JobError: Your job cannot terminate cleanly.