Boot log: asus-cx9400-volteer

    1 14:56:18.006119  lava-dispatcher, installed at version: 2023.01
    2 14:56:18.006338  start: 0 validate
    3 14:56:18.006469  Start time: 2023-03-29 14:56:18.006462+00:00 (UTC)
    4 14:56:18.006600  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:56:18.006729  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230324.0%2Fx86%2Frootfs.cpio.gz exists
    6 14:56:18.298066  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:56:18.298252  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1097-gd51b0e04681f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:56:21.797815  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:56:21.798003  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1097-gd51b0e04681f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 14:56:22.799576  validate duration: 4.79
   12 14:56:22.799974  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 14:56:22.800123  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 14:56:22.800243  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 14:56:22.800365  Not decompressing ramdisk as can be used compressed.
   16 14:56:22.800447  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230324.0/x86/rootfs.cpio.gz
   17 14:56:22.800517  saving as /var/lib/lava/dispatcher/tmp/9806441/tftp-deploy-_bdrv4rh/ramdisk/rootfs.cpio.gz
   18 14:56:22.800577  total size: 8429597 (8MB)
   19 14:56:22.801892  progress   0% (0MB)
   20 14:56:22.804263  progress   5% (0MB)
   21 14:56:22.806603  progress  10% (0MB)
   22 14:56:22.808900  progress  15% (1MB)
   23 14:56:22.811081  progress  20% (1MB)
   24 14:56:22.813149  progress  25% (2MB)
   25 14:56:22.815340  progress  30% (2MB)
   26 14:56:22.817696  progress  35% (2MB)
   27 14:56:22.819904  progress  40% (3MB)
   28 14:56:22.822305  progress  45% (3MB)
   29 14:56:22.824704  progress  50% (4MB)
   30 14:56:22.826961  progress  55% (4MB)
   31 14:56:22.828995  progress  60% (4MB)
   32 14:56:22.831069  progress  65% (5MB)
   33 14:56:22.833243  progress  70% (5MB)
   34 14:56:22.835663  progress  75% (6MB)
   35 14:56:22.837979  progress  80% (6MB)
   36 14:56:22.840130  progress  85% (6MB)
   37 14:56:22.842300  progress  90% (7MB)
   38 14:56:22.844422  progress  95% (7MB)
   39 14:56:22.846535  progress 100% (8MB)
   40 14:56:22.846672  8MB downloaded in 0.05s (174.42MB/s)
   41 14:56:22.846843  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 14:56:22.847114  end: 1.1 download-retry (duration 00:00:00) [common]
   44 14:56:22.847203  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 14:56:22.847289  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 14:56:22.847397  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1097-gd51b0e04681f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 14:56:22.847467  saving as /var/lib/lava/dispatcher/tmp/9806441/tftp-deploy-_bdrv4rh/kernel/bzImage
   48 14:56:22.847528  total size: 7880592 (7MB)
   49 14:56:22.847588  No compression specified
   50 14:56:22.848681  progress   0% (0MB)
   51 14:56:22.850696  progress   5% (0MB)
   52 14:56:22.852644  progress  10% (0MB)
   53 14:56:22.854594  progress  15% (1MB)
   54 14:56:22.856532  progress  20% (1MB)
   55 14:56:22.858488  progress  25% (1MB)
   56 14:56:22.860429  progress  30% (2MB)
   57 14:56:22.862462  progress  35% (2MB)
   58 14:56:22.865042  progress  40% (3MB)
   59 14:56:22.867015  progress  45% (3MB)
   60 14:56:22.868962  progress  50% (3MB)
   61 14:56:22.870886  progress  55% (4MB)
   62 14:56:22.872804  progress  60% (4MB)
   63 14:56:22.874725  progress  65% (4MB)
   64 14:56:22.876639  progress  70% (5MB)
   65 14:56:22.878619  progress  75% (5MB)
   66 14:56:22.880538  progress  80% (6MB)
   67 14:56:22.882552  progress  85% (6MB)
   68 14:56:22.884494  progress  90% (6MB)
   69 14:56:22.886430  progress  95% (7MB)
   70 14:56:22.888456  progress 100% (7MB)
   71 14:56:22.888661  7MB downloaded in 0.04s (182.74MB/s)
   72 14:56:22.888852  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 14:56:22.889231  end: 1.2 download-retry (duration 00:00:00) [common]
   75 14:56:22.889324  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 14:56:22.889411  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 14:56:22.889515  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1097-gd51b0e04681f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 14:56:22.889582  saving as /var/lib/lava/dispatcher/tmp/9806441/tftp-deploy-_bdrv4rh/modules/modules.tar
   79 14:56:22.889644  total size: 251160 (0MB)
   80 14:56:22.889704  Using unxz to decompress xz
   81 14:56:22.893111  progress  13% (0MB)
   82 14:56:22.893540  progress  26% (0MB)
   83 14:56:22.893782  progress  39% (0MB)
   84 14:56:22.895129  progress  52% (0MB)
   85 14:56:22.897099  progress  65% (0MB)
   86 14:56:22.898947  progress  78% (0MB)
   87 14:56:22.900864  progress  91% (0MB)
   88 14:56:22.902758  progress 100% (0MB)
   89 14:56:22.908407  0MB downloaded in 0.02s (12.77MB/s)
   90 14:56:22.908702  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 14:56:22.908981  end: 1.3 download-retry (duration 00:00:00) [common]
   93 14:56:22.909079  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   94 14:56:22.909191  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   95 14:56:22.909281  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 14:56:22.909371  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   97 14:56:22.909557  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti
   98 14:56:22.909663  makedir: /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin
   99 14:56:22.909752  makedir: /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/tests
  100 14:56:22.909835  makedir: /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/results
  101 14:56:22.909945  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-add-keys
  102 14:56:22.910075  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-add-sources
  103 14:56:22.910191  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-background-process-start
  104 14:56:22.910307  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-background-process-stop
  105 14:56:22.910416  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-common-functions
  106 14:56:22.910524  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-echo-ipv4
  107 14:56:22.910634  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-install-packages
  108 14:56:22.910751  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-installed-packages
  109 14:56:22.910904  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-os-build
  110 14:56:22.911019  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-probe-channel
  111 14:56:22.911130  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-probe-ip
  112 14:56:22.911239  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-target-ip
  113 14:56:22.911348  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-target-mac
  114 14:56:22.911456  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-target-storage
  115 14:56:22.911567  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-test-case
  116 14:56:22.911675  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-test-event
  117 14:56:22.911781  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-test-feedback
  118 14:56:22.911889  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-test-raise
  119 14:56:22.912000  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-test-reference
  120 14:56:22.912111  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-test-runner
  121 14:56:22.912219  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-test-set
  122 14:56:22.912326  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-test-shell
  123 14:56:22.912436  Updating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-install-packages (oe)
  124 14:56:22.912550  Updating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/bin/lava-installed-packages (oe)
  125 14:56:22.912645  Creating /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/environment
  126 14:56:22.912734  LAVA metadata
  127 14:56:22.912805  - LAVA_JOB_ID=9806441
  128 14:56:22.912869  - LAVA_DISPATCHER_IP=192.168.201.1
  129 14:56:22.912971  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  130 14:56:22.913039  skipped lava-vland-overlay
  131 14:56:22.913116  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 14:56:22.913205  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  133 14:56:22.913271  skipped lava-multinode-overlay
  134 14:56:22.913344  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 14:56:22.913425  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  136 14:56:22.913503  Loading test definitions
  137 14:56:22.913599  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  138 14:56:22.913673  Using /lava-9806441 at stage 0
  139 14:56:22.913928  uuid=9806441_1.4.2.3.1 testdef=None
  140 14:56:22.914016  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 14:56:22.914103  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  142 14:56:22.914600  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 14:56:22.914834  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  145 14:56:22.915389  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 14:56:22.915619  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  148 14:56:22.916152  runner path: /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/0/tests/0_dmesg test_uuid 9806441_1.4.2.3.1
  149 14:56:22.916295  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 14:56:22.916523  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  152 14:56:22.916596  Using /lava-9806441 at stage 1
  153 14:56:22.916832  uuid=9806441_1.4.2.3.5 testdef=None
  154 14:56:22.916918  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 14:56:22.917002  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  156 14:56:22.917443  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 14:56:22.917662  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  159 14:56:22.918216  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 14:56:22.918443  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  162 14:56:22.918977  runner path: /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/1/tests/1_bootrr test_uuid 9806441_1.4.2.3.5
  163 14:56:22.919116  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 14:56:22.919319  Creating lava-test-runner.conf files
  166 14:56:22.919383  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/0 for stage 0
  167 14:56:22.919465  - 0_dmesg
  168 14:56:22.919538  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9806441/lava-overlay-s7ht6vti/lava-9806441/1 for stage 1
  169 14:56:22.919619  - 1_bootrr
  170 14:56:22.919707  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 14:56:22.919794  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  172 14:56:22.928126  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 14:56:22.928259  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  174 14:56:22.928352  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 14:56:22.928440  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 14:56:22.928528  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  177 14:56:23.142416  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 14:56:23.142792  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  179 14:56:23.142909  extracting modules file /var/lib/lava/dispatcher/tmp/9806441/tftp-deploy-_bdrv4rh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9806441/extract-overlay-ramdisk-p2g7bio2/ramdisk
  180 14:56:23.150809  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 14:56:23.150995  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  182 14:56:23.151090  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9806441/compress-overlay-gpgc3t_1/overlay-1.4.2.4.tar.gz to ramdisk
  183 14:56:23.151203  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9806441/compress-overlay-gpgc3t_1/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9806441/extract-overlay-ramdisk-p2g7bio2/ramdisk
  184 14:56:23.157232  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 14:56:23.157361  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  186 14:56:23.157454  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 14:56:23.157547  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  188 14:56:23.157629  Building ramdisk /var/lib/lava/dispatcher/tmp/9806441/extract-overlay-ramdisk-p2g7bio2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9806441/extract-overlay-ramdisk-p2g7bio2/ramdisk
  189 14:56:23.246630  >> 49788 blocks

  190 14:56:24.104846  rename /var/lib/lava/dispatcher/tmp/9806441/extract-overlay-ramdisk-p2g7bio2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9806441/tftp-deploy-_bdrv4rh/ramdisk/ramdisk.cpio.gz
  191 14:56:24.105366  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 14:56:24.105530  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  193 14:56:24.105668  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  194 14:56:24.105786  No mkimage arch provided, not using FIT.
  195 14:56:24.105890  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 14:56:24.105988  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 14:56:24.106108  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 14:56:24.106211  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  199 14:56:24.106327  No LXC device requested
  200 14:56:24.106449  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 14:56:24.106578  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  202 14:56:24.106699  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 14:56:24.106807  Checking files for TFTP limit of 4294967296 bytes.
  204 14:56:24.107338  end: 1 tftp-deploy (duration 00:00:01) [common]
  205 14:56:24.107481  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 14:56:24.107614  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 14:56:24.107783  substitutions:
  208 14:56:24.107882  - {DTB}: None
  209 14:56:24.107982  - {INITRD}: 9806441/tftp-deploy-_bdrv4rh/ramdisk/ramdisk.cpio.gz
  210 14:56:24.108079  - {KERNEL}: 9806441/tftp-deploy-_bdrv4rh/kernel/bzImage
  211 14:56:24.108175  - {LAVA_MAC}: None
  212 14:56:24.108251  - {PRESEED_CONFIG}: None
  213 14:56:24.108346  - {PRESEED_LOCAL}: None
  214 14:56:24.108441  - {RAMDISK}: 9806441/tftp-deploy-_bdrv4rh/ramdisk/ramdisk.cpio.gz
  215 14:56:24.108536  - {ROOT_PART}: None
  216 14:56:24.108629  - {ROOT}: None
  217 14:56:24.108723  - {SERVER_IP}: 192.168.201.1
  218 14:56:24.108850  - {TEE}: None
  219 14:56:24.108944  Parsed boot commands:
  220 14:56:24.109050  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 14:56:24.109276  Parsed boot commands: tftpboot 192.168.201.1 9806441/tftp-deploy-_bdrv4rh/kernel/bzImage 9806441/tftp-deploy-_bdrv4rh/kernel/cmdline 9806441/tftp-deploy-_bdrv4rh/ramdisk/ramdisk.cpio.gz
  222 14:56:24.109373  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 14:56:24.109501  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 14:56:24.109636  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 14:56:24.109765  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 14:56:24.109871  Not connected, no need to disconnect.
  227 14:56:24.109989  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 14:56:24.110109  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 14:56:24.110211  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
  230 14:56:24.113751  Setting prompt string to ['lava-test: # ']
  231 14:56:24.114135  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 14:56:24.114260  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 14:56:24.114368  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 14:56:24.114515  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 14:56:24.115021  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
  236 14:56:29.246095  >> Command sent successfully.

  237 14:56:29.248411  Returned 0 in 5 seconds
  238 14:56:29.349215  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 14:56:29.349583  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 14:56:29.349697  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 14:56:29.349794  Setting prompt string to 'Starting depthcharge on Voema...'
  243 14:56:29.349871  Changing prompt to 'Starting depthcharge on Voema...'
  244 14:56:29.349980  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  245 14:56:29.350351  [Enter `^Ec?' for help]

  246 14:56:30.953147  

  247 14:56:30.953336  

  248 14:56:30.962898  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  249 14:56:30.970012  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  250 14:56:30.972909  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  251 14:56:30.976218  CPU: AES supported, TXT NOT supported, VT supported

  252 14:56:30.983217  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  253 14:56:30.989659  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  254 14:56:30.992725  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  255 14:56:30.995898  VBOOT: Loading verstage.

  256 14:56:31.002708  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  257 14:56:31.005998  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  258 14:56:31.009017  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  259 14:56:31.019955  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  260 14:56:31.026743  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  261 14:56:31.026832  

  262 14:56:31.026918  

  263 14:56:31.039568  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  264 14:56:31.053970  Probing TPM: . done!

  265 14:56:31.057303  TPM ready after 0 ms

  266 14:56:31.060112  Connected to device vid:did:rid of 1ae0:0028:00

  267 14:56:31.071551  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  268 14:56:31.078539  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  269 14:56:31.081828  Initialized TPM device CR50 revision 0

  270 14:56:31.216662  tlcl_send_startup: Startup return code is 0

  271 14:56:31.216809  TPM: setup succeeded

  272 14:56:31.232254  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  273 14:56:31.246856  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  274 14:56:31.259495  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  275 14:56:31.269514  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  276 14:56:31.272727  Chrome EC: UHEPI supported

  277 14:56:31.276122  Phase 1

  278 14:56:31.279666  FMAP: area GBB found @ 1805000 (458752 bytes)

  279 14:56:31.289505  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  280 14:56:31.296081  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  281 14:56:31.303077  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  282 14:56:31.309689  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  283 14:56:31.312538  Recovery requested (1009000e)

  284 14:56:31.316214  TPM: Extending digest for VBOOT: boot mode into PCR 0

  285 14:56:31.327731  tlcl_extend: response is 0

  286 14:56:31.334946  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  287 14:56:31.344506  tlcl_extend: response is 0

  288 14:56:31.350911  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  289 14:56:31.357649  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  290 14:56:31.365075  BS: verstage times (exec / console): total (unknown) / 142 ms

  291 14:56:31.365160  

  292 14:56:31.365233  

  293 14:56:31.377933  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  294 14:56:31.384007  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  295 14:56:31.387263  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  296 14:56:31.390883  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  297 14:56:31.397136  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  298 14:56:31.400627  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  299 14:56:31.404968  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  300 14:56:31.408094  TCO_STS:   0000 0000

  301 14:56:31.411547  GEN_PMCON: d0015038 00002200

  302 14:56:31.414915  GBLRST_CAUSE: 00000000 00000000

  303 14:56:31.415028  HPR_CAUSE0: 00000000

  304 14:56:31.418589  prev_sleep_state 5

  305 14:56:31.421522  Boot Count incremented to 18814

  306 14:56:31.428279  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  307 14:56:31.434839  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  308 14:56:31.441428  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  309 14:56:31.447808  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  310 14:56:31.451761  Chrome EC: UHEPI supported

  311 14:56:31.458688  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  312 14:56:31.471492  Probing TPM:  done!

  313 14:56:31.478091  Connected to device vid:did:rid of 1ae0:0028:00

  314 14:56:31.488125  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  315 14:56:31.491353  Initialized TPM device CR50 revision 0

  316 14:56:31.506486  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  317 14:56:31.513461  MRC: Hash idx 0x100b comparison successful.

  318 14:56:31.516511  MRC cache found, size faa8

  319 14:56:31.516595  bootmode is set to: 2

  320 14:56:31.520706  SPD index = 0

  321 14:56:31.526207  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  322 14:56:31.529766  SPD: module type is LPDDR4X

  323 14:56:31.532866  SPD: module part number is MT53E512M64D4NW-046

  324 14:56:31.539815  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  325 14:56:31.542929  SPD: device width 16 bits, bus width 16 bits

  326 14:56:31.549642  SPD: module size is 1024 MB (per channel)

  327 14:56:31.985615  CBMEM:

  328 14:56:31.989165  IMD: root @ 0x76fff000 254 entries.

  329 14:56:31.993288  IMD: root @ 0x76ffec00 62 entries.

  330 14:56:31.996334  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  331 14:56:31.999165  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  332 14:56:32.004640  External stage cache:

  333 14:56:32.008082  IMD: root @ 0x7b3ff000 254 entries.

  334 14:56:32.011197  IMD: root @ 0x7b3fec00 62 entries.

  335 14:56:32.027054  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  336 14:56:32.033831  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  337 14:56:32.040142  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  338 14:56:32.053818  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  339 14:56:32.060879  cse_lite: Skip switching to RW in the recovery path

  340 14:56:32.061444  8 DIMMs found

  341 14:56:32.061808  SMM Memory Map

  342 14:56:32.067375  SMRAM       : 0x7b000000 0x800000

  343 14:56:32.070883   Subregion 0: 0x7b000000 0x200000

  344 14:56:32.074532   Subregion 1: 0x7b200000 0x200000

  345 14:56:32.077108   Subregion 2: 0x7b400000 0x400000

  346 14:56:32.077686  top_of_ram = 0x77000000

  347 14:56:32.084223  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  348 14:56:32.090619  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  349 14:56:32.094174  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  350 14:56:32.100602  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  351 14:56:32.107072  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  352 14:56:32.113810  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  353 14:56:32.123835  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  354 14:56:32.130163  Processing 211 relocs. Offset value of 0x74c0b000

  355 14:56:32.137330  BS: romstage times (exec / console): total (unknown) / 277 ms

  356 14:56:32.142983  

  357 14:56:32.143479  

  358 14:56:32.153094  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  359 14:56:32.156701  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  360 14:56:32.166336  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  361 14:56:32.172849  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  362 14:56:32.179614  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  363 14:56:32.186907  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  364 14:56:32.233341  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  365 14:56:32.239666  Processing 5008 relocs. Offset value of 0x75d98000

  366 14:56:32.242971  BS: postcar times (exec / console): total (unknown) / 59 ms

  367 14:56:32.245780  

  368 14:56:32.246208  

  369 14:56:32.256344  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  370 14:56:32.256871  Normal boot

  371 14:56:32.260714  FW_CONFIG value is 0x804c02

  372 14:56:32.263266  PCI: 00:07.0 disabled by fw_config

  373 14:56:32.267084  PCI: 00:07.1 disabled by fw_config

  374 14:56:32.273457  PCI: 00:0d.2 disabled by fw_config

  375 14:56:32.276518  PCI: 00:1c.7 disabled by fw_config

  376 14:56:32.279974  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  377 14:56:32.286432  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  378 14:56:32.292996  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  379 14:56:32.296644  GENERIC: 0.0 disabled by fw_config

  380 14:56:32.299596  GENERIC: 1.0 disabled by fw_config

  381 14:56:32.303161  fw_config match found: DB_USB=USB3_ACTIVE

  382 14:56:32.306335  fw_config match found: DB_USB=USB3_ACTIVE

  383 14:56:32.309729  fw_config match found: DB_USB=USB3_ACTIVE

  384 14:56:32.316439  fw_config match found: DB_USB=USB3_ACTIVE

  385 14:56:32.319836  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  386 14:56:32.329657  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  387 14:56:32.336595  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  388 14:56:32.342805  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  389 14:56:32.345845  microcode: sig=0x806c1 pf=0x80 revision=0x86

  390 14:56:32.353199  microcode: Update skipped, already up-to-date

  391 14:56:32.359525  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  392 14:56:32.387320  Detected 4 core, 8 thread CPU.

  393 14:56:32.390634  Setting up SMI for CPU

  394 14:56:32.393918  IED base = 0x7b400000

  395 14:56:32.397287  IED size = 0x00400000

  396 14:56:32.397834  Will perform SMM setup.

  397 14:56:32.403735  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  398 14:56:32.410621  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  399 14:56:32.416958  Processing 16 relocs. Offset value of 0x00030000

  400 14:56:32.420056  Attempting to start 7 APs

  401 14:56:32.423504  Waiting for 10ms after sending INIT.

  402 14:56:32.439256  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  403 14:56:32.443038  AP: slot 2 apic_id 7.

  404 14:56:32.446026  AP: slot 5 apic_id 6.

  405 14:56:32.446462  AP: slot 7 apic_id 5.

  406 14:56:32.449239  AP: slot 4 apic_id 4.

  407 14:56:32.452521  AP: slot 6 apic_id 3.

  408 14:56:32.452895  done.

  409 14:56:32.453255  AP: slot 3 apic_id 2.

  410 14:56:32.459723  Waiting for 2nd SIPI to complete...done.

  411 14:56:32.466416  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  412 14:56:32.472718  Processing 13 relocs. Offset value of 0x00038000

  413 14:56:32.473301  Unable to locate Global NVS

  414 14:56:32.482399  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  415 14:56:32.485703  Installing permanent SMM handler to 0x7b000000

  416 14:56:32.495757  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  417 14:56:32.498974  Processing 794 relocs. Offset value of 0x7b010000

  418 14:56:32.509344  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  419 14:56:32.512584  Processing 13 relocs. Offset value of 0x7b008000

  420 14:56:32.519002  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  421 14:56:32.525458  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  422 14:56:32.528807  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  423 14:56:32.535832  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  424 14:56:32.541959  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  425 14:56:32.548788  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  426 14:56:32.555493  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  427 14:56:32.555933  Unable to locate Global NVS

  428 14:56:32.565363  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  429 14:56:32.568896  Clearing SMI status registers

  430 14:56:32.569477  SMI_STS: PM1 

  431 14:56:32.572376  PM1_STS: PWRBTN 

  432 14:56:32.578758  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  433 14:56:32.581849  In relocation handler: CPU 0

  434 14:56:32.584827  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  435 14:56:32.591837  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  436 14:56:32.592386  Relocation complete.

  437 14:56:32.601669  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  438 14:56:32.604980  In relocation handler: CPU 1

  439 14:56:32.608488  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  440 14:56:32.608929  Relocation complete.

  441 14:56:32.618453  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  442 14:56:32.621476  In relocation handler: CPU 3

  443 14:56:32.624492  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  444 14:56:32.627929  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  445 14:56:32.631692  Relocation complete.

  446 14:56:32.638248  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  447 14:56:32.641673  In relocation handler: CPU 6

  448 14:56:32.644729  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  449 14:56:32.647731  Relocation complete.

  450 14:56:32.655605  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  451 14:56:32.659139  In relocation handler: CPU 7

  452 14:56:32.662147  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  453 14:56:32.665659  Relocation complete.

  454 14:56:32.672308  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  455 14:56:32.676079  In relocation handler: CPU 4

  456 14:56:32.679177  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  457 14:56:32.682254  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  458 14:56:32.685852  Relocation complete.

  459 14:56:32.692029  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  460 14:56:32.695750  In relocation handler: CPU 5

  461 14:56:32.698910  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  462 14:56:32.705385  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  463 14:56:32.705915  Relocation complete.

  464 14:56:32.715241  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  465 14:56:32.718329  In relocation handler: CPU 2

  466 14:56:32.721853  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  467 14:56:32.722313  Relocation complete.

  468 14:56:32.724895  Initializing CPU #0

  469 14:56:32.728264  CPU: vendor Intel device 806c1

  470 14:56:32.732056  CPU: family 06, model 8c, stepping 01

  471 14:56:32.735484  Clearing out pending MCEs

  472 14:56:32.738282  Setting up local APIC...

  473 14:56:32.741544   apic_id: 0x00 done.

  474 14:56:32.741980  Turbo is available but hidden

  475 14:56:32.745221  Turbo is available and visible

  476 14:56:32.751504  microcode: Update skipped, already up-to-date

  477 14:56:32.751948  CPU #0 initialized

  478 14:56:32.755095  Initializing CPU #5

  479 14:56:32.758225  Initializing CPU #2

  480 14:56:32.761758  CPU: vendor Intel device 806c1

  481 14:56:32.764838  CPU: family 06, model 8c, stepping 01

  482 14:56:32.768541  CPU: vendor Intel device 806c1

  483 14:56:32.771371  CPU: family 06, model 8c, stepping 01

  484 14:56:32.774940  Clearing out pending MCEs

  485 14:56:32.775413  Clearing out pending MCEs

  486 14:56:32.778561  Setting up local APIC...

  487 14:56:32.781278  Initializing CPU #3

  488 14:56:32.781718  Initializing CPU #6

  489 14:56:32.784376  CPU: vendor Intel device 806c1

  490 14:56:32.791357  CPU: family 06, model 8c, stepping 01

  491 14:56:32.791938  CPU: vendor Intel device 806c1

  492 14:56:32.798689  CPU: family 06, model 8c, stepping 01

  493 14:56:32.799235  Clearing out pending MCEs

  494 14:56:32.801632  Clearing out pending MCEs

  495 14:56:32.804494  Setting up local APIC...

  496 14:56:32.808321  Initializing CPU #4

  497 14:56:32.808865  Initializing CPU #7

  498 14:56:32.810975  CPU: vendor Intel device 806c1

  499 14:56:32.814922  CPU: family 06, model 8c, stepping 01

  500 14:56:32.817794  CPU: vendor Intel device 806c1

  501 14:56:32.821280  CPU: family 06, model 8c, stepping 01

  502 14:56:32.824554  Clearing out pending MCEs

  503 14:56:32.827680  Clearing out pending MCEs

  504 14:56:32.830935  Setting up local APIC...

  505 14:56:32.834500  Setting up local APIC...

  506 14:56:32.834954  Initializing CPU #1

  507 14:56:32.837620   apic_id: 0x06 done.

  508 14:56:32.840814  Setting up local APIC...

  509 14:56:32.841292  Setting up local APIC...

  510 14:56:32.844267   apic_id: 0x03 done.

  511 14:56:32.847626   apic_id: 0x02 done.

  512 14:56:32.850432  microcode: Update skipped, already up-to-date

  513 14:56:32.854266  microcode: Update skipped, already up-to-date

  514 14:56:32.857351  CPU #6 initialized

  515 14:56:32.860537  CPU #3 initialized

  516 14:56:32.861075   apic_id: 0x04 done.

  517 14:56:32.864186   apic_id: 0x05 done.

  518 14:56:32.867547  microcode: Update skipped, already up-to-date

  519 14:56:32.874213  microcode: Update skipped, already up-to-date

  520 14:56:32.874783  CPU #4 initialized

  521 14:56:32.877508  CPU #7 initialized

  522 14:56:32.880567  CPU: vendor Intel device 806c1

  523 14:56:32.884179  CPU: family 06, model 8c, stepping 01

  524 14:56:32.887480   apic_id: 0x07 done.

  525 14:56:32.890559  microcode: Update skipped, already up-to-date

  526 14:56:32.893983  microcode: Update skipped, already up-to-date

  527 14:56:32.897610  CPU #5 initialized

  528 14:56:32.901133  CPU #2 initialized

  529 14:56:32.901738  Clearing out pending MCEs

  530 14:56:32.903601  Setting up local APIC...

  531 14:56:32.906965   apic_id: 0x01 done.

  532 14:56:32.910288  microcode: Update skipped, already up-to-date

  533 14:56:32.913585  CPU #1 initialized

  534 14:56:32.917278  bsp_do_flight_plan done after 455 msecs.

  535 14:56:32.919975  CPU: frequency set to 4000 MHz

  536 14:56:32.923691  Enabling SMIs.

  537 14:56:32.930298  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms

  538 14:56:32.944199  SATAXPCIE1 indicates PCIe NVMe is present

  539 14:56:32.948055  Probing TPM:  done!

  540 14:56:32.951287  Connected to device vid:did:rid of 1ae0:0028:00

  541 14:56:32.962388  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  542 14:56:32.964984  Initialized TPM device CR50 revision 0

  543 14:56:32.968460  Enabling S0i3.4

  544 14:56:32.975448  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  545 14:56:32.978556  Found a VBT of 8704 bytes after decompression

  546 14:56:32.985379  cse_lite: CSE RO boot. HybridStorageMode disabled

  547 14:56:32.991946  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  548 14:56:33.066935  FSPS returned 0

  549 14:56:33.069824  Executing Phase 1 of FspMultiPhaseSiInit

  550 14:56:33.079955  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  551 14:56:33.083784  port C0 DISC req: usage 1 usb3 1 usb2 5

  552 14:56:33.087116  Raw Buffer output 0 00000511

  553 14:56:33.090030  Raw Buffer output 1 00000000

  554 14:56:33.094071  pmc_send_ipc_cmd succeeded

  555 14:56:33.100606  port C1 DISC req: usage 1 usb3 2 usb2 3

  556 14:56:33.101141  Raw Buffer output 0 00000321

  557 14:56:33.104457  Raw Buffer output 1 00000000

  558 14:56:33.108128  pmc_send_ipc_cmd succeeded

  559 14:56:33.113124  Detected 4 core, 8 thread CPU.

  560 14:56:33.116435  Detected 4 core, 8 thread CPU.

  561 14:56:33.350549  Display FSP Version Info HOB

  562 14:56:33.353643  Reference Code - CPU = a.0.4c.31

  563 14:56:33.356665  uCode Version = 0.0.0.86

  564 14:56:33.360124  TXT ACM version = ff.ff.ff.ffff

  565 14:56:33.363926  Reference Code - ME = a.0.4c.31

  566 14:56:33.366624  MEBx version = 0.0.0.0

  567 14:56:33.370082  ME Firmware Version = Consumer SKU

  568 14:56:33.373559  Reference Code - PCH = a.0.4c.31

  569 14:56:33.377457  PCH-CRID Status = Disabled

  570 14:56:33.380346  PCH-CRID Original Value = ff.ff.ff.ffff

  571 14:56:33.383591  PCH-CRID New Value = ff.ff.ff.ffff

  572 14:56:33.386812  OPROM - RST - RAID = ff.ff.ff.ffff

  573 14:56:33.390633  PCH Hsio Version = 4.0.0.0

  574 14:56:33.393679  Reference Code - SA - System Agent = a.0.4c.31

  575 14:56:33.396753  Reference Code - MRC = 2.0.0.1

  576 14:56:33.399916  SA - PCIe Version = a.0.4c.31

  577 14:56:33.403846  SA-CRID Status = Disabled

  578 14:56:33.406581  SA-CRID Original Value = 0.0.0.1

  579 14:56:33.409977  SA-CRID New Value = 0.0.0.1

  580 14:56:33.413341  OPROM - VBIOS = ff.ff.ff.ffff

  581 14:56:33.416733  IO Manageability Engine FW Version = 11.1.4.0

  582 14:56:33.420453  PHY Build Version = 0.0.0.e0

  583 14:56:33.423209  Thunderbolt(TM) FW Version = 0.0.0.0

  584 14:56:33.430392  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  585 14:56:33.433125  ITSS IRQ Polarities Before:

  586 14:56:33.433611  IPC0: 0xffffffff

  587 14:56:33.436600  IPC1: 0xffffffff

  588 14:56:33.437045  IPC2: 0xffffffff

  589 14:56:33.440419  IPC3: 0xffffffff

  590 14:56:33.443031  ITSS IRQ Polarities After:

  591 14:56:33.443484  IPC0: 0xffffffff

  592 14:56:33.446632  IPC1: 0xffffffff

  593 14:56:33.447081  IPC2: 0xffffffff

  594 14:56:33.449480  IPC3: 0xffffffff

  595 14:56:33.452999  Found PCIe Root Port #9 at PCI: 00:1d.0.

  596 14:56:33.466429  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  597 14:56:33.476439  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  598 14:56:33.489247  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  599 14:56:33.496014  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

  600 14:56:33.499344  Enumerating buses...

  601 14:56:33.502766  Show all devs... Before device enumeration.

  602 14:56:33.505829  Root Device: enabled 1

  603 14:56:33.506278  DOMAIN: 0000: enabled 1

  604 14:56:33.509465  CPU_CLUSTER: 0: enabled 1

  605 14:56:33.512802  PCI: 00:00.0: enabled 1

  606 14:56:33.515842  PCI: 00:02.0: enabled 1

  607 14:56:33.516445  PCI: 00:04.0: enabled 1

  608 14:56:33.519305  PCI: 00:05.0: enabled 1

  609 14:56:33.522672  PCI: 00:06.0: enabled 0

  610 14:56:33.526174  PCI: 00:07.0: enabled 0

  611 14:56:33.526719  PCI: 00:07.1: enabled 0

  612 14:56:33.529314  PCI: 00:07.2: enabled 0

  613 14:56:33.532691  PCI: 00:07.3: enabled 0

  614 14:56:33.536148  PCI: 00:08.0: enabled 1

  615 14:56:33.536680  PCI: 00:09.0: enabled 0

  616 14:56:33.539416  PCI: 00:0a.0: enabled 0

  617 14:56:33.542683  PCI: 00:0d.0: enabled 1

  618 14:56:33.543264  PCI: 00:0d.1: enabled 0

  619 14:56:33.545923  PCI: 00:0d.2: enabled 0

  620 14:56:33.548810  PCI: 00:0d.3: enabled 0

  621 14:56:33.552085  PCI: 00:0e.0: enabled 0

  622 14:56:33.552513  PCI: 00:10.2: enabled 1

  623 14:56:33.555811  PCI: 00:10.6: enabled 0

  624 14:56:33.559046  PCI: 00:10.7: enabled 0

  625 14:56:33.562593  PCI: 00:12.0: enabled 0

  626 14:56:33.563130  PCI: 00:12.6: enabled 0

  627 14:56:33.566230  PCI: 00:13.0: enabled 0

  628 14:56:33.568945  PCI: 00:14.0: enabled 1

  629 14:56:33.572542  PCI: 00:14.1: enabled 0

  630 14:56:33.572976  PCI: 00:14.2: enabled 1

  631 14:56:33.575321  PCI: 00:14.3: enabled 1

  632 14:56:33.579084  PCI: 00:15.0: enabled 1

  633 14:56:33.581870  PCI: 00:15.1: enabled 1

  634 14:56:33.582300  PCI: 00:15.2: enabled 1

  635 14:56:33.585308  PCI: 00:15.3: enabled 1

  636 14:56:33.588949  PCI: 00:16.0: enabled 1

  637 14:56:33.591812  PCI: 00:16.1: enabled 0

  638 14:56:33.592348  PCI: 00:16.2: enabled 0

  639 14:56:33.594985  PCI: 00:16.3: enabled 0

  640 14:56:33.598640  PCI: 00:16.4: enabled 0

  641 14:56:33.602432  PCI: 00:16.5: enabled 0

  642 14:56:33.602970  PCI: 00:17.0: enabled 1

  643 14:56:33.605742  PCI: 00:19.0: enabled 0

  644 14:56:33.608384  PCI: 00:19.1: enabled 1

  645 14:56:33.608868  PCI: 00:19.2: enabled 0

  646 14:56:33.611837  PCI: 00:1c.0: enabled 1

  647 14:56:33.614905  PCI: 00:1c.1: enabled 0

  648 14:56:33.618406  PCI: 00:1c.2: enabled 0

  649 14:56:33.618837  PCI: 00:1c.3: enabled 0

  650 14:56:33.621636  PCI: 00:1c.4: enabled 0

  651 14:56:33.624870  PCI: 00:1c.5: enabled 0

  652 14:56:33.628879  PCI: 00:1c.6: enabled 1

  653 14:56:33.629502  PCI: 00:1c.7: enabled 0

  654 14:56:33.631770  PCI: 00:1d.0: enabled 1

  655 14:56:33.635074  PCI: 00:1d.1: enabled 0

  656 14:56:33.638465  PCI: 00:1d.2: enabled 1

  657 14:56:33.639002  PCI: 00:1d.3: enabled 0

  658 14:56:33.642010  PCI: 00:1e.0: enabled 1

  659 14:56:33.645153  PCI: 00:1e.1: enabled 0

  660 14:56:33.648120  PCI: 00:1e.2: enabled 1

  661 14:56:33.648550  PCI: 00:1e.3: enabled 1

  662 14:56:33.651546  PCI: 00:1f.0: enabled 1

  663 14:56:33.654679  PCI: 00:1f.1: enabled 0

  664 14:56:33.655135  PCI: 00:1f.2: enabled 1

  665 14:56:33.658417  PCI: 00:1f.3: enabled 1

  666 14:56:33.661845  PCI: 00:1f.4: enabled 0

  667 14:56:33.664731  PCI: 00:1f.5: enabled 1

  668 14:56:33.665159  PCI: 00:1f.6: enabled 0

  669 14:56:33.668303  PCI: 00:1f.7: enabled 0

  670 14:56:33.671409  APIC: 00: enabled 1

  671 14:56:33.674983  GENERIC: 0.0: enabled 1

  672 14:56:33.675416  GENERIC: 0.0: enabled 1

  673 14:56:33.678448  GENERIC: 1.0: enabled 1

  674 14:56:33.681233  GENERIC: 0.0: enabled 1

  675 14:56:33.681668  GENERIC: 1.0: enabled 1

  676 14:56:33.684921  USB0 port 0: enabled 1

  677 14:56:33.688024  GENERIC: 0.0: enabled 1

  678 14:56:33.691297  USB0 port 0: enabled 1

  679 14:56:33.691840  GENERIC: 0.0: enabled 1

  680 14:56:33.694806  I2C: 00:1a: enabled 1

  681 14:56:33.697622  I2C: 00:31: enabled 1

  682 14:56:33.698059  I2C: 00:32: enabled 1

  683 14:56:33.701471  I2C: 00:10: enabled 1

  684 14:56:33.704337  I2C: 00:15: enabled 1

  685 14:56:33.708215  GENERIC: 0.0: enabled 0

  686 14:56:33.708916  GENERIC: 1.0: enabled 0

  687 14:56:33.710926  GENERIC: 0.0: enabled 1

  688 14:56:33.714325  SPI: 00: enabled 1

  689 14:56:33.714762  SPI: 00: enabled 1

  690 14:56:33.717421  PNP: 0c09.0: enabled 1

  691 14:56:33.721256  GENERIC: 0.0: enabled 1

  692 14:56:33.721699  USB3 port 0: enabled 1

  693 14:56:33.724491  USB3 port 1: enabled 1

  694 14:56:33.727773  USB3 port 2: enabled 0

  695 14:56:33.728354  USB3 port 3: enabled 0

  696 14:56:33.730894  USB2 port 0: enabled 0

  697 14:56:33.734106  USB2 port 1: enabled 1

  698 14:56:33.737774  USB2 port 2: enabled 1

  699 14:56:33.738350  USB2 port 3: enabled 0

  700 14:56:33.740801  USB2 port 4: enabled 1

  701 14:56:33.744487  USB2 port 5: enabled 0

  702 14:56:33.745034  USB2 port 6: enabled 0

  703 14:56:33.747769  USB2 port 7: enabled 0

  704 14:56:33.750708  USB2 port 8: enabled 0

  705 14:56:33.754285  USB2 port 9: enabled 0

  706 14:56:33.754830  USB3 port 0: enabled 0

  707 14:56:33.757804  USB3 port 1: enabled 1

  708 14:56:33.760967  USB3 port 2: enabled 0

  709 14:56:33.761447  USB3 port 3: enabled 0

  710 14:56:33.764071  GENERIC: 0.0: enabled 1

  711 14:56:33.767740  GENERIC: 1.0: enabled 1

  712 14:56:33.768287  APIC: 01: enabled 1

  713 14:56:33.770832  APIC: 07: enabled 1

  714 14:56:33.774038  APIC: 02: enabled 1

  715 14:56:33.774535  APIC: 04: enabled 1

  716 14:56:33.777570  APIC: 06: enabled 1

  717 14:56:33.780438  APIC: 03: enabled 1

  718 14:56:33.780874  APIC: 05: enabled 1

  719 14:56:33.783664  Compare with tree...

  720 14:56:33.786923  Root Device: enabled 1

  721 14:56:33.787390   DOMAIN: 0000: enabled 1

  722 14:56:33.790485    PCI: 00:00.0: enabled 1

  723 14:56:33.793598    PCI: 00:02.0: enabled 1

  724 14:56:33.797013    PCI: 00:04.0: enabled 1

  725 14:56:33.800307     GENERIC: 0.0: enabled 1

  726 14:56:33.800749    PCI: 00:05.0: enabled 1

  727 14:56:33.803815    PCI: 00:06.0: enabled 0

  728 14:56:33.807255    PCI: 00:07.0: enabled 0

  729 14:56:33.810026     GENERIC: 0.0: enabled 1

  730 14:56:33.813528    PCI: 00:07.1: enabled 0

  731 14:56:33.813969     GENERIC: 1.0: enabled 1

  732 14:56:33.816870    PCI: 00:07.2: enabled 0

  733 14:56:33.820328     GENERIC: 0.0: enabled 1

  734 14:56:33.823940    PCI: 00:07.3: enabled 0

  735 14:56:33.826728     GENERIC: 1.0: enabled 1

  736 14:56:33.827174    PCI: 00:08.0: enabled 1

  737 14:56:33.830436    PCI: 00:09.0: enabled 0

  738 14:56:33.833301    PCI: 00:0a.0: enabled 0

  739 14:56:33.836882    PCI: 00:0d.0: enabled 1

  740 14:56:33.840373     USB0 port 0: enabled 1

  741 14:56:33.840808      USB3 port 0: enabled 1

  742 14:56:33.843640      USB3 port 1: enabled 1

  743 14:56:33.846885      USB3 port 2: enabled 0

  744 14:56:33.849755      USB3 port 3: enabled 0

  745 14:56:33.853220    PCI: 00:0d.1: enabled 0

  746 14:56:33.856670    PCI: 00:0d.2: enabled 0

  747 14:56:33.857130     GENERIC: 0.0: enabled 1

  748 14:56:33.859989    PCI: 00:0d.3: enabled 0

  749 14:56:33.863360    PCI: 00:0e.0: enabled 0

  750 14:56:33.866661    PCI: 00:10.2: enabled 1

  751 14:56:33.869961    PCI: 00:10.6: enabled 0

  752 14:56:33.870421    PCI: 00:10.7: enabled 0

  753 14:56:33.873347    PCI: 00:12.0: enabled 0

  754 14:56:33.876677    PCI: 00:12.6: enabled 0

  755 14:56:33.880253    PCI: 00:13.0: enabled 0

  756 14:56:33.883443    PCI: 00:14.0: enabled 1

  757 14:56:33.883994     USB0 port 0: enabled 1

  758 14:56:33.886603      USB2 port 0: enabled 0

  759 14:56:33.889890      USB2 port 1: enabled 1

  760 14:56:33.893377      USB2 port 2: enabled 1

  761 14:56:33.896884      USB2 port 3: enabled 0

  762 14:56:33.897548      USB2 port 4: enabled 1

  763 14:56:33.899806      USB2 port 5: enabled 0

  764 14:56:33.903129      USB2 port 6: enabled 0

  765 14:56:33.952894      USB2 port 7: enabled 0

  766 14:56:33.953465      USB2 port 8: enabled 0

  767 14:56:33.953813      USB2 port 9: enabled 0

  768 14:56:33.954139      USB3 port 0: enabled 0

  769 14:56:33.954510      USB3 port 1: enabled 1

  770 14:56:33.955308      USB3 port 2: enabled 0

  771 14:56:33.955816      USB3 port 3: enabled 0

  772 14:56:33.956277    PCI: 00:14.1: enabled 0

  773 14:56:33.956719    PCI: 00:14.2: enabled 1

  774 14:56:33.957078    PCI: 00:14.3: enabled 1

  775 14:56:33.957544     GENERIC: 0.0: enabled 1

  776 14:56:33.958080    PCI: 00:15.0: enabled 1

  777 14:56:33.958509     I2C: 00:1a: enabled 1

  778 14:56:33.958818     I2C: 00:31: enabled 1

  779 14:56:33.959150     I2C: 00:32: enabled 1

  780 14:56:33.959448    PCI: 00:15.1: enabled 1

  781 14:56:33.959729     I2C: 00:10: enabled 1

  782 14:56:33.960009    PCI: 00:15.2: enabled 1

  783 14:56:33.960287    PCI: 00:15.3: enabled 1

  784 14:56:34.003362    PCI: 00:16.0: enabled 1

  785 14:56:34.004136    PCI: 00:16.1: enabled 0

  786 14:56:34.004557    PCI: 00:16.2: enabled 0

  787 14:56:34.004920    PCI: 00:16.3: enabled 0

  788 14:56:34.005315    PCI: 00:16.4: enabled 0

  789 14:56:34.005659    PCI: 00:16.5: enabled 0

  790 14:56:34.005985    PCI: 00:17.0: enabled 1

  791 14:56:34.006631    PCI: 00:19.0: enabled 0

  792 14:56:34.007000    PCI: 00:19.1: enabled 1

  793 14:56:34.007325     I2C: 00:15: enabled 1

  794 14:56:34.007635    PCI: 00:19.2: enabled 0

  795 14:56:34.007922    PCI: 00:1d.0: enabled 1

  796 14:56:34.008205     GENERIC: 0.0: enabled 1

  797 14:56:34.008489    PCI: 00:1e.0: enabled 1

  798 14:56:34.008771    PCI: 00:1e.1: enabled 0

  799 14:56:34.009110    PCI: 00:1e.2: enabled 1

  800 14:56:34.009667     SPI: 00: enabled 1

  801 14:56:34.009985    PCI: 00:1e.3: enabled 1

  802 14:56:34.010282     SPI: 00: enabled 1

  803 14:56:34.053483    PCI: 00:1f.0: enabled 1

  804 14:56:34.054060     PNP: 0c09.0: enabled 1

  805 14:56:34.054436    PCI: 00:1f.1: enabled 0

  806 14:56:34.054789    PCI: 00:1f.2: enabled 1

  807 14:56:34.055125     GENERIC: 0.0: enabled 1

  808 14:56:34.055784      GENERIC: 0.0: enabled 1

  809 14:56:34.056244      GENERIC: 1.0: enabled 1

  810 14:56:34.056599    PCI: 00:1f.3: enabled 1

  811 14:56:34.056930    PCI: 00:1f.4: enabled 0

  812 14:56:34.057299    PCI: 00:1f.5: enabled 1

  813 14:56:34.057749    PCI: 00:1f.6: enabled 0

  814 14:56:34.058084    PCI: 00:1f.7: enabled 0

  815 14:56:34.058446   CPU_CLUSTER: 0: enabled 1

  816 14:56:34.058778    APIC: 00: enabled 1

  817 14:56:34.059090    APIC: 01: enabled 1

  818 14:56:34.059397    APIC: 07: enabled 1

  819 14:56:34.059704    APIC: 02: enabled 1

  820 14:56:34.060011    APIC: 04: enabled 1

  821 14:56:34.060316    APIC: 06: enabled 1

  822 14:56:34.060624    APIC: 03: enabled 1

  823 14:56:34.062382    APIC: 05: enabled 1

  824 14:56:34.062855  Root Device scanning...

  825 14:56:34.065805  scan_static_bus for Root Device

  826 14:56:34.066278  DOMAIN: 0000 enabled

  827 14:56:34.069088  CPU_CLUSTER: 0 enabled

  828 14:56:34.069723  DOMAIN: 0000 scanning...

  829 14:56:34.072887  PCI: pci_scan_bus for bus 00

  830 14:56:34.075656  PCI: 00:00.0 [8086/0000] ops

  831 14:56:34.078859  PCI: 00:00.0 [8086/9a12] enabled

  832 14:56:34.082294  PCI: 00:02.0 [8086/0000] bus ops

  833 14:56:34.085806  PCI: 00:02.0 [8086/9a40] enabled

  834 14:56:34.089255  PCI: 00:04.0 [8086/0000] bus ops

  835 14:56:34.092322  PCI: 00:04.0 [8086/9a03] enabled

  836 14:56:34.095301  PCI: 00:05.0 [8086/9a19] enabled

  837 14:56:34.099131  PCI: 00:07.0 [0000/0000] hidden

  838 14:56:34.101763  PCI: 00:08.0 [8086/9a11] enabled

  839 14:56:34.105474  PCI: 00:0a.0 [8086/9a0d] disabled

  840 14:56:34.108800  PCI: 00:0d.0 [8086/0000] bus ops

  841 14:56:34.112290  PCI: 00:0d.0 [8086/9a13] enabled

  842 14:56:34.115420  PCI: 00:14.0 [8086/0000] bus ops

  843 14:56:34.118559  PCI: 00:14.0 [8086/a0ed] enabled

  844 14:56:34.122045  PCI: 00:14.2 [8086/a0ef] enabled

  845 14:56:34.125635  PCI: 00:14.3 [8086/0000] bus ops

  846 14:56:34.128678  PCI: 00:14.3 [8086/a0f0] enabled

  847 14:56:34.131955  PCI: 00:15.0 [8086/0000] bus ops

  848 14:56:34.136223  PCI: 00:15.0 [8086/a0e8] enabled

  849 14:56:34.138654  PCI: 00:15.1 [8086/0000] bus ops

  850 14:56:34.142149  PCI: 00:15.1 [8086/a0e9] enabled

  851 14:56:34.145468  PCI: 00:15.2 [8086/0000] bus ops

  852 14:56:34.148608  PCI: 00:15.2 [8086/a0ea] enabled

  853 14:56:34.151861  PCI: 00:15.3 [8086/0000] bus ops

  854 14:56:34.155685  PCI: 00:15.3 [8086/a0eb] enabled

  855 14:56:34.158322  PCI: 00:16.0 [8086/0000] ops

  856 14:56:34.161561  PCI: 00:16.0 [8086/a0e0] enabled

  857 14:56:34.168164  PCI: Static device PCI: 00:17.0 not found, disabling it.

  858 14:56:34.171485  PCI: 00:19.0 [8086/0000] bus ops

  859 14:56:34.175114  PCI: 00:19.0 [8086/a0c5] disabled

  860 14:56:34.178454  PCI: 00:19.1 [8086/0000] bus ops

  861 14:56:34.181539  PCI: 00:19.1 [8086/a0c6] enabled

  862 14:56:34.184538  PCI: 00:1d.0 [8086/0000] bus ops

  863 14:56:34.187865  PCI: 00:1d.0 [8086/a0b0] enabled

  864 14:56:34.191575  PCI: 00:1e.0 [8086/0000] ops

  865 14:56:34.194286  PCI: 00:1e.0 [8086/a0a8] enabled

  866 14:56:34.198083  PCI: 00:1e.2 [8086/0000] bus ops

  867 14:56:34.201528  PCI: 00:1e.2 [8086/a0aa] enabled

  868 14:56:34.204572  PCI: 00:1e.3 [8086/0000] bus ops

  869 14:56:34.207900  PCI: 00:1e.3 [8086/a0ab] enabled

  870 14:56:34.211500  PCI: 00:1f.0 [8086/0000] bus ops

  871 14:56:34.214697  PCI: 00:1f.0 [8086/a087] enabled

  872 14:56:34.217774  RTC Init

  873 14:56:34.220744  Set power on after power failure.

  874 14:56:34.221401  Disabling Deep S3

  875 14:56:34.224074  Disabling Deep S3

  876 14:56:34.224609  Disabling Deep S4

  877 14:56:34.227528  Disabling Deep S4

  878 14:56:34.228061  Disabling Deep S5

  879 14:56:34.230935  Disabling Deep S5

  880 14:56:34.234285  PCI: 00:1f.2 [0000/0000] hidden

  881 14:56:34.237627  PCI: 00:1f.3 [8086/0000] bus ops

  882 14:56:34.241126  PCI: 00:1f.3 [8086/a0c8] enabled

  883 14:56:34.244247  PCI: 00:1f.5 [8086/0000] bus ops

  884 14:56:34.247446  PCI: 00:1f.5 [8086/a0a4] enabled

  885 14:56:34.250826  PCI: Leftover static devices:

  886 14:56:34.251318  PCI: 00:10.2

  887 14:56:34.254449  PCI: 00:10.6

  888 14:56:34.254964  PCI: 00:10.7

  889 14:56:34.257593  PCI: 00:06.0

  890 14:56:34.258013  PCI: 00:07.1

  891 14:56:34.258341  PCI: 00:07.2

  892 14:56:34.261129  PCI: 00:07.3

  893 14:56:34.261966  PCI: 00:09.0

  894 14:56:34.264104  PCI: 00:0d.1

  895 14:56:34.264610  PCI: 00:0d.2

  896 14:56:34.267282  PCI: 00:0d.3

  897 14:56:34.267783  PCI: 00:0e.0

  898 14:56:34.268239  PCI: 00:12.0

  899 14:56:34.270513  PCI: 00:12.6

  900 14:56:34.270931  PCI: 00:13.0

  901 14:56:34.274271  PCI: 00:14.1

  902 14:56:34.274789  PCI: 00:16.1

  903 14:56:34.275121  PCI: 00:16.2

  904 14:56:34.277391  PCI: 00:16.3

  905 14:56:34.277812  PCI: 00:16.4

  906 14:56:34.280352  PCI: 00:16.5

  907 14:56:34.280768  PCI: 00:17.0

  908 14:56:34.281102  PCI: 00:19.2

  909 14:56:34.284077  PCI: 00:1e.1

  910 14:56:34.284504  PCI: 00:1f.1

  911 14:56:34.287345  PCI: 00:1f.4

  912 14:56:34.287891  PCI: 00:1f.6

  913 14:56:34.290731  PCI: 00:1f.7

  914 14:56:34.291249  PCI: Check your devicetree.cb.

  915 14:56:34.293611  PCI: 00:02.0 scanning...

  916 14:56:34.297125  scan_generic_bus for PCI: 00:02.0

  917 14:56:34.303865  scan_generic_bus for PCI: 00:02.0 done

  918 14:56:34.307576  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  919 14:56:34.310375  PCI: 00:04.0 scanning...

  920 14:56:34.313526  scan_generic_bus for PCI: 00:04.0

  921 14:56:34.317267  GENERIC: 0.0 enabled

  922 14:56:34.320580  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  923 14:56:34.327242  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  924 14:56:34.330788  PCI: 00:0d.0 scanning...

  925 14:56:34.333370  scan_static_bus for PCI: 00:0d.0

  926 14:56:34.333850  USB0 port 0 enabled

  927 14:56:34.336823  USB0 port 0 scanning...

  928 14:56:34.340933  scan_static_bus for USB0 port 0

  929 14:56:34.343808  USB3 port 0 enabled

  930 14:56:34.344395  USB3 port 1 enabled

  931 14:56:34.346922  USB3 port 2 disabled

  932 14:56:34.349823  USB3 port 3 disabled

  933 14:56:34.350360  USB3 port 0 scanning...

  934 14:56:34.353259  scan_static_bus for USB3 port 0

  935 14:56:34.356944  scan_static_bus for USB3 port 0 done

  936 14:56:34.363795  scan_bus: bus USB3 port 0 finished in 6 msecs

  937 14:56:34.366497  USB3 port 1 scanning...

  938 14:56:34.370041  scan_static_bus for USB3 port 1

  939 14:56:34.373415  scan_static_bus for USB3 port 1 done

  940 14:56:34.376817  scan_bus: bus USB3 port 1 finished in 6 msecs

  941 14:56:34.380251  scan_static_bus for USB0 port 0 done

  942 14:56:34.386960  scan_bus: bus USB0 port 0 finished in 43 msecs

  943 14:56:34.389932  scan_static_bus for PCI: 00:0d.0 done

  944 14:56:34.393125  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  945 14:56:34.396499  PCI: 00:14.0 scanning...

  946 14:56:34.399855  scan_static_bus for PCI: 00:14.0

  947 14:56:34.403750  USB0 port 0 enabled

  948 14:56:34.404302  USB0 port 0 scanning...

  949 14:56:34.406452  scan_static_bus for USB0 port 0

  950 14:56:34.409815  USB2 port 0 disabled

  951 14:56:34.413028  USB2 port 1 enabled

  952 14:56:34.413546  USB2 port 2 enabled

  953 14:56:34.416170  USB2 port 3 disabled

  954 14:56:34.419918  USB2 port 4 enabled

  955 14:56:34.420464  USB2 port 5 disabled

  956 14:56:34.422933  USB2 port 6 disabled

  957 14:56:34.426377  USB2 port 7 disabled

  958 14:56:34.426927  USB2 port 8 disabled

  959 14:56:34.429829  USB2 port 9 disabled

  960 14:56:34.432779  USB3 port 0 disabled

  961 14:56:34.433400  USB3 port 1 enabled

  962 14:56:34.436049  USB3 port 2 disabled

  963 14:56:34.436477  USB3 port 3 disabled

  964 14:56:34.439344  USB2 port 1 scanning...

  965 14:56:34.443179  scan_static_bus for USB2 port 1

  966 14:56:34.446558  scan_static_bus for USB2 port 1 done

  967 14:56:34.453096  scan_bus: bus USB2 port 1 finished in 6 msecs

  968 14:56:34.453732  USB2 port 2 scanning...

  969 14:56:34.456149  scan_static_bus for USB2 port 2

  970 14:56:34.462733  scan_static_bus for USB2 port 2 done

  971 14:56:34.466210  scan_bus: bus USB2 port 2 finished in 6 msecs

  972 14:56:34.469687  USB2 port 4 scanning...

  973 14:56:34.472670  scan_static_bus for USB2 port 4

  974 14:56:34.476605  scan_static_bus for USB2 port 4 done

  975 14:56:34.479503  scan_bus: bus USB2 port 4 finished in 6 msecs

  976 14:56:34.482766  USB3 port 1 scanning...

  977 14:56:34.486474  scan_static_bus for USB3 port 1

  978 14:56:34.489237  scan_static_bus for USB3 port 1 done

  979 14:56:34.493215  scan_bus: bus USB3 port 1 finished in 6 msecs

  980 14:56:34.500002  scan_static_bus for USB0 port 0 done

  981 14:56:34.503255  scan_bus: bus USB0 port 0 finished in 93 msecs

  982 14:56:34.506350  scan_static_bus for PCI: 00:14.0 done

  983 14:56:34.512689  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  984 14:56:34.513370  PCI: 00:14.3 scanning...

  985 14:56:34.516249  scan_static_bus for PCI: 00:14.3

  986 14:56:34.519593  GENERIC: 0.0 enabled

  987 14:56:34.522714  scan_static_bus for PCI: 00:14.3 done

  988 14:56:34.529569  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  989 14:56:34.530088  PCI: 00:15.0 scanning...

  990 14:56:34.532913  scan_static_bus for PCI: 00:15.0

  991 14:56:34.536461  I2C: 00:1a enabled

  992 14:56:34.540297  I2C: 00:31 enabled

  993 14:56:34.540825  I2C: 00:32 enabled

  994 14:56:34.542922  scan_static_bus for PCI: 00:15.0 done

  995 14:56:34.549524  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

  996 14:56:34.552634  PCI: 00:15.1 scanning...

  997 14:56:34.555778  scan_static_bus for PCI: 00:15.1

  998 14:56:34.556178  I2C: 00:10 enabled

  999 14:56:34.559419  scan_static_bus for PCI: 00:15.1 done

 1000 14:56:34.566529  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1001 14:56:34.569801  PCI: 00:15.2 scanning...

 1002 14:56:34.572840  scan_static_bus for PCI: 00:15.2

 1003 14:56:34.576250  scan_static_bus for PCI: 00:15.2 done

 1004 14:56:34.579692  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1005 14:56:34.582546  PCI: 00:15.3 scanning...

 1006 14:56:34.586069  scan_static_bus for PCI: 00:15.3

 1007 14:56:34.589348  scan_static_bus for PCI: 00:15.3 done

 1008 14:56:34.596298  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1009 14:56:34.596892  PCI: 00:19.1 scanning...

 1010 14:56:34.599189  scan_static_bus for PCI: 00:19.1

 1011 14:56:34.602637  I2C: 00:15 enabled

 1012 14:56:34.606002  scan_static_bus for PCI: 00:19.1 done

 1013 14:56:34.612404  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1014 14:56:34.613043  PCI: 00:1d.0 scanning...

 1015 14:56:34.619287  do_pci_scan_bridge for PCI: 00:1d.0

 1016 14:56:34.619877  PCI: pci_scan_bus for bus 01

 1017 14:56:34.622434  PCI: 01:00.0 [1c5c/174a] enabled

 1018 14:56:34.626147  GENERIC: 0.0 enabled

 1019 14:56:34.629054  Enabling Common Clock Configuration

 1020 14:56:34.635615  L1 Sub-State supported from root port 29

 1021 14:56:34.636181  L1 Sub-State Support = 0xf

 1022 14:56:34.639104  CommonModeRestoreTime = 0x28

 1023 14:56:34.645981  Power On Value = 0x16, Power On Scale = 0x0

 1024 14:56:34.646568  ASPM: Enabled L1

 1025 14:56:34.649290  PCIe: Max_Payload_Size adjusted to 128

 1026 14:56:34.655632  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1027 14:56:34.658751  PCI: 00:1e.2 scanning...

 1028 14:56:34.661931  scan_generic_bus for PCI: 00:1e.2

 1029 14:56:34.662581  SPI: 00 enabled

 1030 14:56:34.668821  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1031 14:56:34.672496  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1032 14:56:34.675937  PCI: 00:1e.3 scanning...

 1033 14:56:34.679036  scan_generic_bus for PCI: 00:1e.3

 1034 14:56:34.682403  SPI: 00 enabled

 1035 14:56:34.688976  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1036 14:56:34.692196  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1037 14:56:34.695110  PCI: 00:1f.0 scanning...

 1038 14:56:34.698537  scan_static_bus for PCI: 00:1f.0

 1039 14:56:34.702183  PNP: 0c09.0 enabled

 1040 14:56:34.702601  PNP: 0c09.0 scanning...

 1041 14:56:34.705833  scan_static_bus for PNP: 0c09.0

 1042 14:56:34.708303  scan_static_bus for PNP: 0c09.0 done

 1043 14:56:34.714927  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1044 14:56:34.718423  scan_static_bus for PCI: 00:1f.0 done

 1045 14:56:34.721599  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1046 14:56:34.724956  PCI: 00:1f.2 scanning...

 1047 14:56:34.728275  scan_static_bus for PCI: 00:1f.2

 1048 14:56:34.731483  GENERIC: 0.0 enabled

 1049 14:56:34.734801  GENERIC: 0.0 scanning...

 1050 14:56:34.738186  scan_static_bus for GENERIC: 0.0

 1051 14:56:34.738605  GENERIC: 0.0 enabled

 1052 14:56:34.741811  GENERIC: 1.0 enabled

 1053 14:56:34.745215  scan_static_bus for GENERIC: 0.0 done

 1054 14:56:34.751813  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1055 14:56:34.754536  scan_static_bus for PCI: 00:1f.2 done

 1056 14:56:34.758003  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1057 14:56:34.761415  PCI: 00:1f.3 scanning...

 1058 14:56:34.765152  scan_static_bus for PCI: 00:1f.3

 1059 14:56:34.768104  scan_static_bus for PCI: 00:1f.3 done

 1060 14:56:34.774962  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1061 14:56:34.775487  PCI: 00:1f.5 scanning...

 1062 14:56:34.781812  scan_generic_bus for PCI: 00:1f.5

 1063 14:56:34.784584  scan_generic_bus for PCI: 00:1f.5 done

 1064 14:56:34.788103  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1065 14:56:34.794335  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1066 14:56:34.797906  scan_static_bus for Root Device done

 1067 14:56:34.801232  scan_bus: bus Root Device finished in 737 msecs

 1068 14:56:34.801704  done

 1069 14:56:34.808033  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1070 14:56:34.812120  Chrome EC: UHEPI supported

 1071 14:56:34.819074  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1072 14:56:34.825742  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1073 14:56:34.828766  SPI flash protection: WPSW=0 SRP0=0

 1074 14:56:34.835330  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1075 14:56:34.838787  BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms

 1076 14:56:34.842182  found VGA at PCI: 00:02.0

 1077 14:56:34.845349  Setting up VGA for PCI: 00:02.0

 1078 14:56:34.852102  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1079 14:56:34.855006  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1080 14:56:34.858718  Allocating resources...

 1081 14:56:34.862148  Reading resources...

 1082 14:56:34.865142  Root Device read_resources bus 0 link: 0

 1083 14:56:34.868728  DOMAIN: 0000 read_resources bus 0 link: 0

 1084 14:56:34.874999  PCI: 00:04.0 read_resources bus 1 link: 0

 1085 14:56:34.878453  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1086 14:56:34.885265  PCI: 00:0d.0 read_resources bus 0 link: 0

 1087 14:56:34.888572  USB0 port 0 read_resources bus 0 link: 0

 1088 14:56:34.895113  USB0 port 0 read_resources bus 0 link: 0 done

 1089 14:56:34.898589  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1090 14:56:34.905247  PCI: 00:14.0 read_resources bus 0 link: 0

 1091 14:56:34.908464  USB0 port 0 read_resources bus 0 link: 0

 1092 14:56:34.914688  USB0 port 0 read_resources bus 0 link: 0 done

 1093 14:56:34.918685  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1094 14:56:34.924871  PCI: 00:14.3 read_resources bus 0 link: 0

 1095 14:56:34.927658  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1096 14:56:34.934377  PCI: 00:15.0 read_resources bus 0 link: 0

 1097 14:56:34.937578  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1098 14:56:34.944553  PCI: 00:15.1 read_resources bus 0 link: 0

 1099 14:56:34.947820  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1100 14:56:34.954286  PCI: 00:19.1 read_resources bus 0 link: 0

 1101 14:56:34.957678  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1102 14:56:34.964687  PCI: 00:1d.0 read_resources bus 1 link: 0

 1103 14:56:34.967908  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1104 14:56:34.974385  PCI: 00:1e.2 read_resources bus 2 link: 0

 1105 14:56:34.977663  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1106 14:56:34.984440  PCI: 00:1e.3 read_resources bus 3 link: 0

 1107 14:56:34.987811  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1108 14:56:34.994112  PCI: 00:1f.0 read_resources bus 0 link: 0

 1109 14:56:34.997785  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1110 14:56:35.004173  PCI: 00:1f.2 read_resources bus 0 link: 0

 1111 14:56:35.007552  GENERIC: 0.0 read_resources bus 0 link: 0

 1112 14:56:35.013756  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1113 14:56:35.017275  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1114 14:56:35.023935  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1115 14:56:35.027605  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1116 14:56:35.033619  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1117 14:56:35.036788  Root Device read_resources bus 0 link: 0 done

 1118 14:56:35.040679  Done reading resources.

 1119 14:56:35.047222  Show resources in subtree (Root Device)...After reading.

 1120 14:56:35.050613   Root Device child on link 0 DOMAIN: 0000

 1121 14:56:35.053396    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1122 14:56:35.063705    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1123 14:56:35.073457    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1124 14:56:35.074042     PCI: 00:00.0

 1125 14:56:35.083052     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1126 14:56:35.093163     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1127 14:56:35.103501     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1128 14:56:35.113481     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1129 14:56:35.122990     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1130 14:56:35.133020     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1131 14:56:35.139607     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1132 14:56:35.149642     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1133 14:56:35.159458     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1134 14:56:35.169116     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1135 14:56:35.179048     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1136 14:56:35.189268     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1137 14:56:35.196129     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1138 14:56:35.205966     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1139 14:56:35.216012     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1140 14:56:35.225703     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1141 14:56:35.235427     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1142 14:56:35.245666     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1143 14:56:35.255517     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1144 14:56:35.261949     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1145 14:56:35.265145     PCI: 00:02.0

 1146 14:56:35.275374     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1147 14:56:35.285065     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1148 14:56:35.294802     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1149 14:56:35.298111     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1150 14:56:35.308319     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1151 14:56:35.311190      GENERIC: 0.0

 1152 14:56:35.311615     PCI: 00:05.0

 1153 14:56:35.321324     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1154 14:56:35.328251     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1155 14:56:35.328781      GENERIC: 0.0

 1156 14:56:35.331515     PCI: 00:08.0

 1157 14:56:35.341122     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1158 14:56:35.341668     PCI: 00:0a.0

 1159 14:56:35.347752     PCI: 00:0d.0 child on link 0 USB0 port 0

 1160 14:56:35.357722     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1161 14:56:35.361096      USB0 port 0 child on link 0 USB3 port 0

 1162 14:56:35.361696       USB3 port 0

 1163 14:56:35.364223       USB3 port 1

 1164 14:56:35.367499       USB3 port 2

 1165 14:56:35.368118       USB3 port 3

 1166 14:56:35.371003     PCI: 00:14.0 child on link 0 USB0 port 0

 1167 14:56:35.380649     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1168 14:56:35.387716      USB0 port 0 child on link 0 USB2 port 0

 1169 14:56:35.388164       USB2 port 0

 1170 14:56:35.390975       USB2 port 1

 1171 14:56:35.391521       USB2 port 2

 1172 14:56:35.393990       USB2 port 3

 1173 14:56:35.394481       USB2 port 4

 1174 14:56:35.397485       USB2 port 5

 1175 14:56:35.397942       USB2 port 6

 1176 14:56:35.400764       USB2 port 7

 1177 14:56:35.404191       USB2 port 8

 1178 14:56:35.404625       USB2 port 9

 1179 14:56:35.407347       USB3 port 0

 1180 14:56:35.407792       USB3 port 1

 1181 14:56:35.410971       USB3 port 2

 1182 14:56:35.411503       USB3 port 3

 1183 14:56:35.413892     PCI: 00:14.2

 1184 14:56:35.423841     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1185 14:56:35.433501     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1186 14:56:35.436916     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1187 14:56:35.447069     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1188 14:56:35.449783      GENERIC: 0.0

 1189 14:56:35.453426     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1190 14:56:35.463927     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1191 14:56:35.464444      I2C: 00:1a

 1192 14:56:35.466860      I2C: 00:31

 1193 14:56:35.467416      I2C: 00:32

 1194 14:56:35.473272     PCI: 00:15.1 child on link 0 I2C: 00:10

 1195 14:56:35.483136     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1196 14:56:35.483659      I2C: 00:10

 1197 14:56:35.486782     PCI: 00:15.2

 1198 14:56:35.496554     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1199 14:56:35.497033     PCI: 00:15.3

 1200 14:56:35.506199     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1201 14:56:35.509783     PCI: 00:16.0

 1202 14:56:35.520192     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1203 14:56:35.520677     PCI: 00:19.0

 1204 14:56:35.526172     PCI: 00:19.1 child on link 0 I2C: 00:15

 1205 14:56:35.536352     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1206 14:56:35.536780      I2C: 00:15

 1207 14:56:35.539587     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1208 14:56:35.549412     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1209 14:56:35.559635     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1210 14:56:35.569570     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1211 14:56:35.570109      GENERIC: 0.0

 1212 14:56:35.572456      PCI: 01:00.0

 1213 14:56:35.582360      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1214 14:56:35.592282      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1215 14:56:35.599002      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1216 14:56:35.602137     PCI: 00:1e.0

 1217 14:56:35.612236     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1218 14:56:35.618775     PCI: 00:1e.2 child on link 0 SPI: 00

 1219 14:56:35.628598     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1220 14:56:35.629254      SPI: 00

 1221 14:56:35.631906     PCI: 00:1e.3 child on link 0 SPI: 00

 1222 14:56:35.641790     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1223 14:56:35.645679      SPI: 00

 1224 14:56:35.648291     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1225 14:56:35.658471     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1226 14:56:35.659050      PNP: 0c09.0

 1227 14:56:35.668497      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1228 14:56:35.671826     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1229 14:56:35.681566     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1230 14:56:35.691962     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1231 14:56:35.694977      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1232 14:56:35.698072       GENERIC: 0.0

 1233 14:56:35.698516       GENERIC: 1.0

 1234 14:56:35.701392     PCI: 00:1f.3

 1235 14:56:35.711471     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1236 14:56:35.720891     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1237 14:56:35.721359     PCI: 00:1f.5

 1238 14:56:35.730968     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1239 14:56:35.734383    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1240 14:56:35.737387     APIC: 00

 1241 14:56:35.737807     APIC: 01

 1242 14:56:35.740822     APIC: 07

 1243 14:56:35.741291     APIC: 02

 1244 14:56:35.741638     APIC: 04

 1245 14:56:35.744137     APIC: 06

 1246 14:56:35.744555     APIC: 03

 1247 14:56:35.744883     APIC: 05

 1248 14:56:35.754162  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1249 14:56:35.757625   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1250 14:56:35.764548   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1251 14:56:35.771141   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1252 14:56:35.774434    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1253 14:56:35.780439    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1254 14:56:35.784117    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1255 14:56:35.790737   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1256 14:56:35.797692   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1257 14:56:35.807100   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1258 14:56:35.813493  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1259 14:56:35.820276  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1260 14:56:35.827100   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1261 14:56:35.834012   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1262 14:56:35.843406   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1263 14:56:35.846930   DOMAIN: 0000: Resource ranges:

 1264 14:56:35.850060   * Base: 1000, Size: 800, Tag: 100

 1265 14:56:35.853285   * Base: 1900, Size: e700, Tag: 100

 1266 14:56:35.857100    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1267 14:56:35.863131  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1268 14:56:35.873318  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1269 14:56:35.879818   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1270 14:56:35.886260   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1271 14:56:35.896084   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1272 14:56:35.902548   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1273 14:56:35.909164   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1274 14:56:35.919435   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1275 14:56:35.925599   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1276 14:56:35.932556   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1277 14:56:35.942716   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1278 14:56:35.948563   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1279 14:56:35.955431   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1280 14:56:35.965341   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1281 14:56:35.971822   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1282 14:56:35.978872   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1283 14:56:35.988666   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1284 14:56:35.995188   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1285 14:56:36.001611   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1286 14:56:36.011488   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1287 14:56:36.018072   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1288 14:56:36.024561   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1289 14:56:36.034655   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1290 14:56:36.041618   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1291 14:56:36.044536   DOMAIN: 0000: Resource ranges:

 1292 14:56:36.048049   * Base: 7fc00000, Size: 40400000, Tag: 200

 1293 14:56:36.054398   * Base: d0000000, Size: 28000000, Tag: 200

 1294 14:56:36.057922   * Base: fa000000, Size: 1000000, Tag: 200

 1295 14:56:36.061274   * Base: fb001000, Size: 2fff000, Tag: 200

 1296 14:56:36.064631   * Base: fe010000, Size: 2e000, Tag: 200

 1297 14:56:36.071586   * Base: fe03f000, Size: d41000, Tag: 200

 1298 14:56:36.074541   * Base: fed88000, Size: 8000, Tag: 200

 1299 14:56:36.078115   * Base: fed93000, Size: d000, Tag: 200

 1300 14:56:36.081099   * Base: feda2000, Size: 1e000, Tag: 200

 1301 14:56:36.088198   * Base: fede0000, Size: 1220000, Tag: 200

 1302 14:56:36.091550   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1303 14:56:36.097599    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1304 14:56:36.104090    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1305 14:56:36.111179    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1306 14:56:36.117787    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1307 14:56:36.124087    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1308 14:56:36.130659    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1309 14:56:36.137674    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1310 14:56:36.143799    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1311 14:56:36.150963    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1312 14:56:36.157595    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1313 14:56:36.163801    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1314 14:56:36.170901    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1315 14:56:36.177161    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1316 14:56:36.184120    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1317 14:56:36.190718    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1318 14:56:36.197605    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1319 14:56:36.204516    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1320 14:56:36.210489    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1321 14:56:36.217292    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1322 14:56:36.223716    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1323 14:56:36.230513    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1324 14:56:36.236942    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1325 14:56:36.243804  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1326 14:56:36.253736  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1327 14:56:36.256761   PCI: 00:1d.0: Resource ranges:

 1328 14:56:36.260013   * Base: 7fc00000, Size: 100000, Tag: 200

 1329 14:56:36.266763    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1330 14:56:36.273632    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1331 14:56:36.280576    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1332 14:56:36.290451  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1333 14:56:36.296984  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1334 14:56:36.300463  Root Device assign_resources, bus 0 link: 0

 1335 14:56:36.306427  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1336 14:56:36.313376  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1337 14:56:36.323302  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1338 14:56:36.329946  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1339 14:56:36.336717  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1340 14:56:36.342969  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1341 14:56:36.346170  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1342 14:56:36.356423  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1343 14:56:36.362647  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1344 14:56:36.372956  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1345 14:56:36.376020  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1346 14:56:36.382642  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1347 14:56:36.389081  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1348 14:56:36.392554  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1349 14:56:36.398933  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1350 14:56:36.405518  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1351 14:56:36.415586  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1352 14:56:36.422606  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1353 14:56:36.428799  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1354 14:56:36.432113  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1355 14:56:36.442231  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1356 14:56:36.445687  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1357 14:56:36.448722  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1358 14:56:36.458507  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1359 14:56:36.462527  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1360 14:56:36.468581  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1361 14:56:36.475328  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1362 14:56:36.484805  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1363 14:56:36.492289  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1364 14:56:36.501552  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1365 14:56:36.504687  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1366 14:56:36.508058  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1367 14:56:36.517815  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1368 14:56:36.527737  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1369 14:56:36.538245  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1370 14:56:36.541111  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1371 14:56:36.547785  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1372 14:56:36.557702  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1373 14:56:36.564328  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1374 14:56:36.571210  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1375 14:56:36.577616  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1376 14:56:36.584012  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1377 14:56:36.588154  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1378 14:56:36.593993  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1379 14:56:36.600815  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1380 14:56:36.604422  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1381 14:56:36.610543  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1382 14:56:36.613984  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1383 14:56:36.620686  LPC: Trying to open IO window from 800 size 1ff

 1384 14:56:36.627782  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1385 14:56:36.637082  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1386 14:56:36.644336  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1387 14:56:36.647100  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1388 14:56:36.653910  Root Device assign_resources, bus 0 link: 0

 1389 14:56:36.657555  Done setting resources.

 1390 14:56:36.663923  Show resources in subtree (Root Device)...After assigning values.

 1391 14:56:36.667196   Root Device child on link 0 DOMAIN: 0000

 1392 14:56:36.670460    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1393 14:56:36.680521    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1394 14:56:36.690160    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1395 14:56:36.690617     PCI: 00:00.0

 1396 14:56:36.700495     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1397 14:56:36.710348     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1398 14:56:36.719695     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1399 14:56:36.729796     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1400 14:56:36.739488     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1401 14:56:36.750062     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1402 14:56:36.756126     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1403 14:56:36.766018     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1404 14:56:36.776189     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1405 14:56:36.785971     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1406 14:56:36.796220     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1407 14:56:36.805945     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1408 14:56:36.812597     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1409 14:56:36.822727     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1410 14:56:36.832449     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1411 14:56:36.842548     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1412 14:56:36.852058     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1413 14:56:36.862061     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1414 14:56:36.868853     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1415 14:56:36.878750     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1416 14:56:36.881785     PCI: 00:02.0

 1417 14:56:36.892004     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1418 14:56:36.901956     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1419 14:56:36.911773     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1420 14:56:36.915152     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1421 14:56:36.928586     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1422 14:56:36.929104      GENERIC: 0.0

 1423 14:56:36.931881     PCI: 00:05.0

 1424 14:56:36.941661     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1425 14:56:36.945116     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1426 14:56:36.947944      GENERIC: 0.0

 1427 14:56:36.948496     PCI: 00:08.0

 1428 14:56:36.958513     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1429 14:56:36.961321     PCI: 00:0a.0

 1430 14:56:36.964628     PCI: 00:0d.0 child on link 0 USB0 port 0

 1431 14:56:36.974537     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1432 14:56:36.981705      USB0 port 0 child on link 0 USB3 port 0

 1433 14:56:36.982277       USB3 port 0

 1434 14:56:36.984572       USB3 port 1

 1435 14:56:36.985005       USB3 port 2

 1436 14:56:36.988238       USB3 port 3

 1437 14:56:36.991456     PCI: 00:14.0 child on link 0 USB0 port 0

 1438 14:56:37.001374     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1439 14:56:37.007678      USB0 port 0 child on link 0 USB2 port 0

 1440 14:56:37.008138       USB2 port 0

 1441 14:56:37.011241       USB2 port 1

 1442 14:56:37.011803       USB2 port 2

 1443 14:56:37.014100       USB2 port 3

 1444 14:56:37.014531       USB2 port 4

 1445 14:56:37.017608       USB2 port 5

 1446 14:56:37.017917       USB2 port 6

 1447 14:56:37.020761       USB2 port 7

 1448 14:56:37.023988       USB2 port 8

 1449 14:56:37.024221       USB2 port 9

 1450 14:56:37.027171       USB3 port 0

 1451 14:56:37.027359       USB3 port 1

 1452 14:56:37.030619       USB3 port 2

 1453 14:56:37.030807       USB3 port 3

 1454 14:56:37.033968     PCI: 00:14.2

 1455 14:56:37.043748     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1456 14:56:37.053518     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1457 14:56:37.056841     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1458 14:56:37.066932     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1459 14:56:37.070107      GENERIC: 0.0

 1460 14:56:37.073712     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1461 14:56:37.083393     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1462 14:56:37.086736      I2C: 00:1a

 1463 14:56:37.086822      I2C: 00:31

 1464 14:56:37.090353      I2C: 00:32

 1465 14:56:37.093284     PCI: 00:15.1 child on link 0 I2C: 00:10

 1466 14:56:37.103121     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1467 14:56:37.106317      I2C: 00:10

 1468 14:56:37.106404     PCI: 00:15.2

 1469 14:56:37.116361     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1470 14:56:37.120055     PCI: 00:15.3

 1471 14:56:37.129857     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1472 14:56:37.129972     PCI: 00:16.0

 1473 14:56:37.143023     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1474 14:56:37.143127     PCI: 00:19.0

 1475 14:56:37.146466     PCI: 00:19.1 child on link 0 I2C: 00:15

 1476 14:56:37.159419     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1477 14:56:37.159537      I2C: 00:15

 1478 14:56:37.162597     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1479 14:56:37.172390     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1480 14:56:37.185991     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1481 14:56:37.195393     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1482 14:56:37.195494      GENERIC: 0.0

 1483 14:56:37.199033      PCI: 01:00.0

 1484 14:56:37.209068      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1485 14:56:37.219112      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1486 14:56:37.228635      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1487 14:56:37.231915     PCI: 00:1e.0

 1488 14:56:37.241729     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1489 14:56:37.248445     PCI: 00:1e.2 child on link 0 SPI: 00

 1490 14:56:37.258444     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1491 14:56:37.258565      SPI: 00

 1492 14:56:37.261541     PCI: 00:1e.3 child on link 0 SPI: 00

 1493 14:56:37.271647     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1494 14:56:37.274784      SPI: 00

 1495 14:56:37.278153     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1496 14:56:37.287869     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1497 14:56:37.287983      PNP: 0c09.0

 1498 14:56:37.298242      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1499 14:56:37.301657     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1500 14:56:37.311050     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1501 14:56:37.321289     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1502 14:56:37.324270      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1503 14:56:37.327875       GENERIC: 0.0

 1504 14:56:37.327993       GENERIC: 1.0

 1505 14:56:37.330990     PCI: 00:1f.3

 1506 14:56:37.341505     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1507 14:56:37.351146     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1508 14:56:37.354382     PCI: 00:1f.5

 1509 14:56:37.364085     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1510 14:56:37.367727    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1511 14:56:37.370986     APIC: 00

 1512 14:56:37.371071     APIC: 01

 1513 14:56:37.371137     APIC: 07

 1514 14:56:37.374024     APIC: 02

 1515 14:56:37.374139     APIC: 04

 1516 14:56:37.374239     APIC: 06

 1517 14:56:37.377142     APIC: 03

 1518 14:56:37.377272     APIC: 05

 1519 14:56:37.380988  Done allocating resources.

 1520 14:56:37.387356  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1521 14:56:37.394413  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1522 14:56:37.397292  Configure GPIOs for I2S audio on UP4.

 1523 14:56:37.403890  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1524 14:56:37.407339  Enabling resources...

 1525 14:56:37.410384  PCI: 00:00.0 subsystem <- 8086/9a12

 1526 14:56:37.414130  PCI: 00:00.0 cmd <- 06

 1527 14:56:37.417044  PCI: 00:02.0 subsystem <- 8086/9a40

 1528 14:56:37.417154  PCI: 00:02.0 cmd <- 03

 1529 14:56:37.424024  PCI: 00:04.0 subsystem <- 8086/9a03

 1530 14:56:37.424131  PCI: 00:04.0 cmd <- 02

 1531 14:56:37.427040  PCI: 00:05.0 subsystem <- 8086/9a19

 1532 14:56:37.430346  PCI: 00:05.0 cmd <- 02

 1533 14:56:37.433709  PCI: 00:08.0 subsystem <- 8086/9a11

 1534 14:56:37.436807  PCI: 00:08.0 cmd <- 06

 1535 14:56:37.440710  PCI: 00:0d.0 subsystem <- 8086/9a13

 1536 14:56:37.443757  PCI: 00:0d.0 cmd <- 02

 1537 14:56:37.446716  PCI: 00:14.0 subsystem <- 8086/a0ed

 1538 14:56:37.450044  PCI: 00:14.0 cmd <- 02

 1539 14:56:37.453808  PCI: 00:14.2 subsystem <- 8086/a0ef

 1540 14:56:37.456655  PCI: 00:14.2 cmd <- 02

 1541 14:56:37.459803  PCI: 00:14.3 subsystem <- 8086/a0f0

 1542 14:56:37.463522  PCI: 00:14.3 cmd <- 02

 1543 14:56:37.466959  PCI: 00:15.0 subsystem <- 8086/a0e8

 1544 14:56:37.467043  PCI: 00:15.0 cmd <- 02

 1545 14:56:37.473627  PCI: 00:15.1 subsystem <- 8086/a0e9

 1546 14:56:37.473713  PCI: 00:15.1 cmd <- 02

 1547 14:56:37.477489  PCI: 00:15.2 subsystem <- 8086/a0ea

 1548 14:56:37.480116  PCI: 00:15.2 cmd <- 02

 1549 14:56:37.484025  PCI: 00:15.3 subsystem <- 8086/a0eb

 1550 14:56:37.486672  PCI: 00:15.3 cmd <- 02

 1551 14:56:37.490125  PCI: 00:16.0 subsystem <- 8086/a0e0

 1552 14:56:37.493368  PCI: 00:16.0 cmd <- 02

 1553 14:56:37.496253  PCI: 00:19.1 subsystem <- 8086/a0c6

 1554 14:56:37.500148  PCI: 00:19.1 cmd <- 02

 1555 14:56:37.502887  PCI: 00:1d.0 bridge ctrl <- 0013

 1556 14:56:37.506887  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1557 14:56:37.509524  PCI: 00:1d.0 cmd <- 06

 1558 14:56:37.512954  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1559 14:56:37.516480  PCI: 00:1e.0 cmd <- 06

 1560 14:56:37.520390  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1561 14:56:37.522991  PCI: 00:1e.2 cmd <- 06

 1562 14:56:37.526446  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1563 14:56:37.526533  PCI: 00:1e.3 cmd <- 02

 1564 14:56:37.532664  PCI: 00:1f.0 subsystem <- 8086/a087

 1565 14:56:37.532752  PCI: 00:1f.0 cmd <- 407

 1566 14:56:37.536223  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1567 14:56:37.539177  PCI: 00:1f.3 cmd <- 02

 1568 14:56:37.542581  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1569 14:56:37.546070  PCI: 00:1f.5 cmd <- 406

 1570 14:56:37.550507  PCI: 01:00.0 cmd <- 02

 1571 14:56:37.554867  done.

 1572 14:56:37.558527  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1573 14:56:37.561969  Initializing devices...

 1574 14:56:37.564802  Root Device init

 1575 14:56:37.568260  Chrome EC: Set SMI mask to 0x0000000000000000

 1576 14:56:37.575107  Chrome EC: clear events_b mask to 0x0000000000000000

 1577 14:56:37.581997  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1578 14:56:37.584955  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1579 14:56:37.592083  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1580 14:56:37.599258  Chrome EC: Set WAKE mask to 0x0000000000000000

 1581 14:56:37.605944  fw_config match found: DB_USB=USB3_ACTIVE

 1582 14:56:37.608782  Configure Right Type-C port orientation for retimer

 1583 14:56:37.611924  Root Device init finished in 45 msecs

 1584 14:56:37.616308  PCI: 00:00.0 init

 1585 14:56:37.619584  CPU TDP = 9 Watts

 1586 14:56:37.619670  CPU PL1 = 9 Watts

 1587 14:56:37.623000  CPU PL2 = 40 Watts

 1588 14:56:37.626111  CPU PL4 = 83 Watts

 1589 14:56:37.629324  PCI: 00:00.0 init finished in 8 msecs

 1590 14:56:37.629409  PCI: 00:02.0 init

 1591 14:56:37.632958  GMA: Found VBT in CBFS

 1592 14:56:37.636247  GMA: Found valid VBT in CBFS

 1593 14:56:37.642523  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1594 14:56:37.649202                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1595 14:56:37.652976  PCI: 00:02.0 init finished in 18 msecs

 1596 14:56:37.655901  PCI: 00:05.0 init

 1597 14:56:37.659004  PCI: 00:05.0 init finished in 0 msecs

 1598 14:56:37.662664  PCI: 00:08.0 init

 1599 14:56:37.665911  PCI: 00:08.0 init finished in 0 msecs

 1600 14:56:37.669160  PCI: 00:14.0 init

 1601 14:56:37.673065  PCI: 00:14.0 init finished in 0 msecs

 1602 14:56:37.675946  PCI: 00:14.2 init

 1603 14:56:37.679136  PCI: 00:14.2 init finished in 0 msecs

 1604 14:56:37.682313  PCI: 00:15.0 init

 1605 14:56:37.685863  I2C bus 0 version 0x3230302a

 1606 14:56:37.689172  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1607 14:56:37.692471  PCI: 00:15.0 init finished in 6 msecs

 1608 14:56:37.692556  PCI: 00:15.1 init

 1609 14:56:37.695827  I2C bus 1 version 0x3230302a

 1610 14:56:37.698647  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1611 14:56:37.705583  PCI: 00:15.1 init finished in 6 msecs

 1612 14:56:37.705668  PCI: 00:15.2 init

 1613 14:56:37.709091  I2C bus 2 version 0x3230302a

 1614 14:56:37.712532  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1615 14:56:37.715714  PCI: 00:15.2 init finished in 6 msecs

 1616 14:56:37.718780  PCI: 00:15.3 init

 1617 14:56:37.722234  I2C bus 3 version 0x3230302a

 1618 14:56:37.725738  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1619 14:56:37.728840  PCI: 00:15.3 init finished in 6 msecs

 1620 14:56:37.732240  PCI: 00:16.0 init

 1621 14:56:37.735688  PCI: 00:16.0 init finished in 0 msecs

 1622 14:56:37.739148  PCI: 00:19.1 init

 1623 14:56:37.742119  I2C bus 5 version 0x3230302a

 1624 14:56:37.745253  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1625 14:56:37.749034  PCI: 00:19.1 init finished in 6 msecs

 1626 14:56:37.751951  PCI: 00:1d.0 init

 1627 14:56:37.755386  Initializing PCH PCIe bridge.

 1628 14:56:37.758762  PCI: 00:1d.0 init finished in 3 msecs

 1629 14:56:37.761753  PCI: 00:1f.0 init

 1630 14:56:37.765672  IOAPIC: Initializing IOAPIC at 0xfec00000

 1631 14:56:37.768711  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1632 14:56:37.771670  IOAPIC: ID = 0x02

 1633 14:56:37.775465  IOAPIC: Dumping registers

 1634 14:56:37.775550    reg 0x0000: 0x02000000

 1635 14:56:37.778757    reg 0x0001: 0x00770020

 1636 14:56:37.781647    reg 0x0002: 0x00000000

 1637 14:56:37.784848  PCI: 00:1f.0 init finished in 21 msecs

 1638 14:56:37.788239  PCI: 00:1f.2 init

 1639 14:56:37.792055  Disabling ACPI via APMC.

 1640 14:56:37.795584  APMC done.

 1641 14:56:37.798528  PCI: 00:1f.2 init finished in 5 msecs

 1642 14:56:37.809818  PCI: 01:00.0 init

 1643 14:56:37.812842  PCI: 01:00.0 init finished in 0 msecs

 1644 14:56:37.816420  PNP: 0c09.0 init

 1645 14:56:37.819287  Google Chrome EC uptime: 8.450 seconds

 1646 14:56:37.825880  Google Chrome AP resets since EC boot: 1

 1647 14:56:37.829571  Google Chrome most recent AP reset causes:

 1648 14:56:37.832641  	0.346: 32775 shutdown: entering G3

 1649 14:56:37.840073  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1650 14:56:37.842900  PNP: 0c09.0 init finished in 22 msecs

 1651 14:56:37.848527  Devices initialized

 1652 14:56:37.851726  Show all devs... After init.

 1653 14:56:37.855146  Root Device: enabled 1

 1654 14:56:37.855232  DOMAIN: 0000: enabled 1

 1655 14:56:37.858588  CPU_CLUSTER: 0: enabled 1

 1656 14:56:37.861533  PCI: 00:00.0: enabled 1

 1657 14:56:37.864938  PCI: 00:02.0: enabled 1

 1658 14:56:37.865097  PCI: 00:04.0: enabled 1

 1659 14:56:37.868182  PCI: 00:05.0: enabled 1

 1660 14:56:37.871770  PCI: 00:06.0: enabled 0

 1661 14:56:37.874910  PCI: 00:07.0: enabled 0

 1662 14:56:37.874997  PCI: 00:07.1: enabled 0

 1663 14:56:37.878151  PCI: 00:07.2: enabled 0

 1664 14:56:37.881933  PCI: 00:07.3: enabled 0

 1665 14:56:37.884702  PCI: 00:08.0: enabled 1

 1666 14:56:37.884787  PCI: 00:09.0: enabled 0

 1667 14:56:37.888659  PCI: 00:0a.0: enabled 0

 1668 14:56:37.891219  PCI: 00:0d.0: enabled 1

 1669 14:56:37.894667  PCI: 00:0d.1: enabled 0

 1670 14:56:37.894753  PCI: 00:0d.2: enabled 0

 1671 14:56:37.898049  PCI: 00:0d.3: enabled 0

 1672 14:56:37.901220  PCI: 00:0e.0: enabled 0

 1673 14:56:37.901305  PCI: 00:10.2: enabled 1

 1674 14:56:37.904691  PCI: 00:10.6: enabled 0

 1675 14:56:37.908329  PCI: 00:10.7: enabled 0

 1676 14:56:37.911336  PCI: 00:12.0: enabled 0

 1677 14:56:37.911422  PCI: 00:12.6: enabled 0

 1678 14:56:37.914549  PCI: 00:13.0: enabled 0

 1679 14:56:37.917973  PCI: 00:14.0: enabled 1

 1680 14:56:37.921197  PCI: 00:14.1: enabled 0

 1681 14:56:37.921298  PCI: 00:14.2: enabled 1

 1682 14:56:37.924450  PCI: 00:14.3: enabled 1

 1683 14:56:37.928009  PCI: 00:15.0: enabled 1

 1684 14:56:37.931654  PCI: 00:15.1: enabled 1

 1685 14:56:37.931741  PCI: 00:15.2: enabled 1

 1686 14:56:37.935041  PCI: 00:15.3: enabled 1

 1687 14:56:37.938390  PCI: 00:16.0: enabled 1

 1688 14:56:37.938499  PCI: 00:16.1: enabled 0

 1689 14:56:37.941143  PCI: 00:16.2: enabled 0

 1690 14:56:37.944763  PCI: 00:16.3: enabled 0

 1691 14:56:37.948081  PCI: 00:16.4: enabled 0

 1692 14:56:37.948165  PCI: 00:16.5: enabled 0

 1693 14:56:37.951332  PCI: 00:17.0: enabled 0

 1694 14:56:37.954929  PCI: 00:19.0: enabled 0

 1695 14:56:37.957711  PCI: 00:19.1: enabled 1

 1696 14:56:37.957797  PCI: 00:19.2: enabled 0

 1697 14:56:37.961319  PCI: 00:1c.0: enabled 1

 1698 14:56:37.964433  PCI: 00:1c.1: enabled 0

 1699 14:56:37.967817  PCI: 00:1c.2: enabled 0

 1700 14:56:37.967902  PCI: 00:1c.3: enabled 0

 1701 14:56:37.971202  PCI: 00:1c.4: enabled 0

 1702 14:56:37.974504  PCI: 00:1c.5: enabled 0

 1703 14:56:37.977905  PCI: 00:1c.6: enabled 1

 1704 14:56:37.977989  PCI: 00:1c.7: enabled 0

 1705 14:56:37.981453  PCI: 00:1d.0: enabled 1

 1706 14:56:37.984163  PCI: 00:1d.1: enabled 0

 1707 14:56:37.984246  PCI: 00:1d.2: enabled 1

 1708 14:56:37.987952  PCI: 00:1d.3: enabled 0

 1709 14:56:37.991472  PCI: 00:1e.0: enabled 1

 1710 14:56:37.994424  PCI: 00:1e.1: enabled 0

 1711 14:56:37.994509  PCI: 00:1e.2: enabled 1

 1712 14:56:37.997693  PCI: 00:1e.3: enabled 1

 1713 14:56:38.001103  PCI: 00:1f.0: enabled 1

 1714 14:56:38.004443  PCI: 00:1f.1: enabled 0

 1715 14:56:38.004527  PCI: 00:1f.2: enabled 1

 1716 14:56:38.007437  PCI: 00:1f.3: enabled 1

 1717 14:56:38.011251  PCI: 00:1f.4: enabled 0

 1718 14:56:38.014388  PCI: 00:1f.5: enabled 1

 1719 14:56:38.014473  PCI: 00:1f.6: enabled 0

 1720 14:56:38.017988  PCI: 00:1f.7: enabled 0

 1721 14:56:38.021012  APIC: 00: enabled 1

 1722 14:56:38.021094  GENERIC: 0.0: enabled 1

 1723 14:56:38.024109  GENERIC: 0.0: enabled 1

 1724 14:56:38.027494  GENERIC: 1.0: enabled 1

 1725 14:56:38.031320  GENERIC: 0.0: enabled 1

 1726 14:56:38.031406  GENERIC: 1.0: enabled 1

 1727 14:56:38.034003  USB0 port 0: enabled 1

 1728 14:56:38.037162  GENERIC: 0.0: enabled 1

 1729 14:56:38.040539  USB0 port 0: enabled 1

 1730 14:56:38.040623  GENERIC: 0.0: enabled 1

 1731 14:56:38.044079  I2C: 00:1a: enabled 1

 1732 14:56:38.047633  I2C: 00:31: enabled 1

 1733 14:56:38.047716  I2C: 00:32: enabled 1

 1734 14:56:38.050650  I2C: 00:10: enabled 1

 1735 14:56:38.053986  I2C: 00:15: enabled 1

 1736 14:56:38.054070  GENERIC: 0.0: enabled 0

 1737 14:56:38.057499  GENERIC: 1.0: enabled 0

 1738 14:56:38.060416  GENERIC: 0.0: enabled 1

 1739 14:56:38.060499  SPI: 00: enabled 1

 1740 14:56:38.064041  SPI: 00: enabled 1

 1741 14:56:38.067308  PNP: 0c09.0: enabled 1

 1742 14:56:38.067395  GENERIC: 0.0: enabled 1

 1743 14:56:38.071014  USB3 port 0: enabled 1

 1744 14:56:38.073705  USB3 port 1: enabled 1

 1745 14:56:38.077127  USB3 port 2: enabled 0

 1746 14:56:38.077231  USB3 port 3: enabled 0

 1747 14:56:38.080416  USB2 port 0: enabled 0

 1748 14:56:38.084167  USB2 port 1: enabled 1

 1749 14:56:38.084249  USB2 port 2: enabled 1

 1750 14:56:38.087453  USB2 port 3: enabled 0

 1751 14:56:38.090060  USB2 port 4: enabled 1

 1752 14:56:38.093831  USB2 port 5: enabled 0

 1753 14:56:38.093915  USB2 port 6: enabled 0

 1754 14:56:38.097077  USB2 port 7: enabled 0

 1755 14:56:38.100474  USB2 port 8: enabled 0

 1756 14:56:38.100557  USB2 port 9: enabled 0

 1757 14:56:38.103476  USB3 port 0: enabled 0

 1758 14:56:38.106674  USB3 port 1: enabled 1

 1759 14:56:38.109975  USB3 port 2: enabled 0

 1760 14:56:38.110079  USB3 port 3: enabled 0

 1761 14:56:38.113213  GENERIC: 0.0: enabled 1

 1762 14:56:38.116751  GENERIC: 1.0: enabled 1

 1763 14:56:38.116835  APIC: 01: enabled 1

 1764 14:56:38.120658  APIC: 07: enabled 1

 1765 14:56:38.123276  APIC: 02: enabled 1

 1766 14:56:38.123363  APIC: 04: enabled 1

 1767 14:56:38.126878  APIC: 06: enabled 1

 1768 14:56:38.126988  APIC: 03: enabled 1

 1769 14:56:38.130290  APIC: 05: enabled 1

 1770 14:56:38.133514  PCI: 01:00.0: enabled 1

 1771 14:56:38.137013  BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms

 1772 14:56:38.143274  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1773 14:56:38.146958  ELOG: NV offset 0xf30000 size 0x1000

 1774 14:56:38.153203  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1775 14:56:38.160068  ELOG: Event(17) added with size 13 at 2023-03-29 14:56:37 UTC

 1776 14:56:38.166683  ELOG: Event(92) added with size 9 at 2023-03-29 14:56:37 UTC

 1777 14:56:38.173873  ELOG: Event(93) added with size 9 at 2023-03-29 14:56:37 UTC

 1778 14:56:38.179738  ELOG: Event(9E) added with size 10 at 2023-03-29 14:56:37 UTC

 1779 14:56:38.186441  ELOG: Event(9F) added with size 14 at 2023-03-29 14:56:37 UTC

 1780 14:56:38.193307  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1781 14:56:38.199643  ELOG: Event(A1) added with size 10 at 2023-03-29 14:56:37 UTC

 1782 14:56:38.206068  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1783 14:56:38.212869  ELOG: Event(A0) added with size 9 at 2023-03-29 14:56:37 UTC

 1784 14:56:38.215811  elog_add_boot_reason: Logged dev mode boot

 1785 14:56:38.222426  BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms

 1786 14:56:38.226118  Finalize devices...

 1787 14:56:38.226205  Devices finalized

 1788 14:56:38.232147  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1789 14:56:38.236132  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1790 14:56:38.242172  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1791 14:56:38.248984  ME: HFSTS1                      : 0x80030055

 1792 14:56:38.251964  ME: HFSTS2                      : 0x30280116

 1793 14:56:38.255877  ME: HFSTS3                      : 0x00000050

 1794 14:56:38.261904  ME: HFSTS4                      : 0x00004000

 1795 14:56:38.265231  ME: HFSTS5                      : 0x00000000

 1796 14:56:38.268646  ME: HFSTS6                      : 0x00400006

 1797 14:56:38.272425  ME: Manufacturing Mode          : YES

 1798 14:56:38.278753  ME: SPI Protection Mode Enabled : NO

 1799 14:56:38.282395  ME: FW Partition Table          : OK

 1800 14:56:38.285580  ME: Bringup Loader Failure      : NO

 1801 14:56:38.288752  ME: Firmware Init Complete      : NO

 1802 14:56:38.292072  ME: Boot Options Present        : NO

 1803 14:56:38.295265  ME: Update In Progress          : NO

 1804 14:56:38.298610  ME: D0i3 Support                : YES

 1805 14:56:38.302062  ME: Low Power State Enabled     : NO

 1806 14:56:38.308600  ME: CPU Replaced                : YES

 1807 14:56:38.311926  ME: CPU Replacement Valid       : YES

 1808 14:56:38.315156  ME: Current Working State       : 5

 1809 14:56:38.318300  ME: Current Operation State     : 1

 1810 14:56:38.321653  ME: Current Operation Mode      : 3

 1811 14:56:38.324855  ME: Error Code                  : 0

 1812 14:56:38.328179  ME: Enhanced Debug Mode         : NO

 1813 14:56:38.331293  ME: CPU Debug Disabled          : YES

 1814 14:56:38.338360  ME: TXT Support                 : NO

 1815 14:56:38.341294  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1816 14:56:38.351266  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1817 14:56:38.354657  CBFS: 'fallback/slic' not found.

 1818 14:56:38.357935  ACPI: Writing ACPI tables at 76b01000.

 1819 14:56:38.358028  ACPI:    * FACS

 1820 14:56:38.361071  ACPI:    * DSDT

 1821 14:56:38.364262  Ramoops buffer: 0x100000@0x76a00000.

 1822 14:56:38.371587  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1823 14:56:38.374341  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1824 14:56:38.378079  Google Chrome EC: version:

 1825 14:56:38.381475  	ro: voema_v2.0.7540-147f8d37d1

 1826 14:56:38.384153  	rw: voema_v2.0.7540-147f8d37d1

 1827 14:56:38.387718    running image: 2

 1828 14:56:38.391365  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1829 14:56:38.396228  ACPI:    * FADT

 1830 14:56:38.396316  SCI is IRQ9

 1831 14:56:38.402928  ACPI: added table 1/32, length now 40

 1832 14:56:38.403019  ACPI:     * SSDT

 1833 14:56:38.406542  Found 1 CPU(s) with 8 core(s) each.

 1834 14:56:38.412870  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1835 14:56:38.416043  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1836 14:56:38.419412  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1837 14:56:38.422653  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1838 14:56:38.429586  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1839 14:56:38.436319  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1840 14:56:38.439227  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1841 14:56:38.446201  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1842 14:56:38.452801  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1843 14:56:38.456181  \_SB.PCI0.RP09: Added StorageD3Enable property

 1844 14:56:38.462334  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1845 14:56:38.466075  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1846 14:56:38.472729  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1847 14:56:38.476101  PS2K: Passing 80 keymaps to kernel

 1848 14:56:38.482469  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1849 14:56:38.489090  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1850 14:56:38.495467  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1851 14:56:38.502300  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1852 14:56:38.509101  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1853 14:56:38.515393  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1854 14:56:38.522330  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1855 14:56:38.528713  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1856 14:56:38.532147  ACPI: added table 2/32, length now 44

 1857 14:56:38.532234  ACPI:    * MCFG

 1858 14:56:38.535415  ACPI: added table 3/32, length now 48

 1859 14:56:38.539026  ACPI:    * TPM2

 1860 14:56:38.542394  TPM2 log created at 0x769f0000

 1861 14:56:38.545640  ACPI: added table 4/32, length now 52

 1862 14:56:38.545721  ACPI:    * MADT

 1863 14:56:38.548995  SCI is IRQ9

 1864 14:56:38.552025  ACPI: added table 5/32, length now 56

 1865 14:56:38.555245  current = 76b09850

 1866 14:56:38.555326  ACPI:    * DMAR

 1867 14:56:38.558532  ACPI: added table 6/32, length now 60

 1868 14:56:38.561989  ACPI: added table 7/32, length now 64

 1869 14:56:38.565434  ACPI:    * HPET

 1870 14:56:38.568306  ACPI: added table 8/32, length now 68

 1871 14:56:38.568387  ACPI: done.

 1872 14:56:38.572096  ACPI tables: 35216 bytes.

 1873 14:56:38.575550  smbios_write_tables: 769ef000

 1874 14:56:38.578659  EC returned error result code 3

 1875 14:56:38.582100  Couldn't obtain OEM name from CBI

 1876 14:56:38.584909  Create SMBIOS type 16

 1877 14:56:38.588570  Create SMBIOS type 17

 1878 14:56:38.591782  GENERIC: 0.0 (WIFI Device)

 1879 14:56:38.591863  SMBIOS tables: 1750 bytes.

 1880 14:56:38.598423  Writing table forward entry at 0x00000500

 1881 14:56:38.604742  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1882 14:56:38.608482  Writing coreboot table at 0x76b25000

 1883 14:56:38.611541   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1884 14:56:38.618459   1. 0000000000001000-000000000009ffff: RAM

 1885 14:56:38.621616   2. 00000000000a0000-00000000000fffff: RESERVED

 1886 14:56:38.628330   3. 0000000000100000-00000000769eefff: RAM

 1887 14:56:38.631528   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1888 14:56:38.638119   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1889 14:56:38.644775   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1890 14:56:38.648101   7. 0000000077000000-000000007fbfffff: RESERVED

 1891 14:56:38.651584   8. 00000000c0000000-00000000cfffffff: RESERVED

 1892 14:56:38.657958   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1893 14:56:38.661091  10. 00000000fb000000-00000000fb000fff: RESERVED

 1894 14:56:38.667737  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1895 14:56:38.671153  12. 00000000fed80000-00000000fed87fff: RESERVED

 1896 14:56:38.677980  13. 00000000fed90000-00000000fed92fff: RESERVED

 1897 14:56:38.681411  14. 00000000feda0000-00000000feda1fff: RESERVED

 1898 14:56:38.687777  15. 00000000fedc0000-00000000feddffff: RESERVED

 1899 14:56:38.690696  16. 0000000100000000-00000002803fffff: RAM

 1900 14:56:38.694488  Passing 4 GPIOs to payload:

 1901 14:56:38.697880              NAME |       PORT | POLARITY |     VALUE

 1902 14:56:38.704487               lid |  undefined |     high |      high

 1903 14:56:38.708093             power |  undefined |     high |       low

 1904 14:56:38.714372             oprom |  undefined |     high |       low

 1905 14:56:38.720559          EC in RW | 0x000000e5 |     high |      high

 1906 14:56:38.727098  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 6600

 1907 14:56:38.727183  coreboot table: 1576 bytes.

 1908 14:56:38.733854  IMD ROOT    0. 0x76fff000 0x00001000

 1909 14:56:38.737384  IMD SMALL   1. 0x76ffe000 0x00001000

 1910 14:56:38.740415  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1911 14:56:38.743670  VPD         3. 0x76c4d000 0x00000367

 1912 14:56:38.747119  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1913 14:56:38.750516  CONSOLE     5. 0x76c2c000 0x00020000

 1914 14:56:38.753430  FMAP        6. 0x76c2b000 0x00000578

 1915 14:56:38.760242  TIME STAMP  7. 0x76c2a000 0x00000910

 1916 14:56:38.763370  VBOOT WORK  8. 0x76c16000 0x00014000

 1917 14:56:38.766512  ROMSTG STCK 9. 0x76c15000 0x00001000

 1918 14:56:38.770099  AFTER CAR  10. 0x76c0a000 0x0000b000

 1919 14:56:38.773534  RAMSTAGE   11. 0x76b97000 0x00073000

 1920 14:56:38.776995  REFCODE    12. 0x76b42000 0x00055000

 1921 14:56:38.780251  SMM BACKUP 13. 0x76b32000 0x00010000

 1922 14:56:38.783194  4f444749   14. 0x76b30000 0x00002000

 1923 14:56:38.786465  EXT VBT15. 0x76b2d000 0x0000219f

 1924 14:56:38.793034  COREBOOT   16. 0x76b25000 0x00008000

 1925 14:56:38.796391  ACPI       17. 0x76b01000 0x00024000

 1926 14:56:38.799734  ACPI GNVS  18. 0x76b00000 0x00001000

 1927 14:56:38.803226  RAMOOPS    19. 0x76a00000 0x00100000

 1928 14:56:38.806403  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1929 14:56:38.810088  SMBIOS     21. 0x769ef000 0x00000800

 1930 14:56:38.812756  IMD small region:

 1931 14:56:38.816248    IMD ROOT    0. 0x76ffec00 0x00000400

 1932 14:56:38.819775    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1933 14:56:38.823145    POWER STATE 2. 0x76ffeb80 0x00000044

 1934 14:56:38.829955    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1935 14:56:38.832820    MEM INFO    4. 0x76ffe980 0x000001e0

 1936 14:56:38.836380  BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms

 1937 14:56:38.839833  MTRR: Physical address space:

 1938 14:56:38.846036  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1939 14:56:38.852796  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1940 14:56:38.859439  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1941 14:56:38.865729  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1942 14:56:38.872473  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1943 14:56:38.879334  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1944 14:56:38.885967  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1945 14:56:38.889417  MTRR: Fixed MSR 0x250 0x0606060606060606

 1946 14:56:38.892466  MTRR: Fixed MSR 0x258 0x0606060606060606

 1947 14:56:38.895805  MTRR: Fixed MSR 0x259 0x0000000000000000

 1948 14:56:38.902172  MTRR: Fixed MSR 0x268 0x0606060606060606

 1949 14:56:38.905695  MTRR: Fixed MSR 0x269 0x0606060606060606

 1950 14:56:38.909161  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1951 14:56:38.912122  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1952 14:56:38.918511  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1953 14:56:38.922052  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1954 14:56:38.925881  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1955 14:56:38.928454  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1956 14:56:38.932530  call enable_fixed_mtrr()

 1957 14:56:38.935982  CPU physical address size: 39 bits

 1958 14:56:38.942943  MTRR: default type WB/UC MTRR counts: 6/6.

 1959 14:56:38.945588  MTRR: UC selected as default type.

 1960 14:56:38.952222  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1961 14:56:38.955586  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1962 14:56:38.962535  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1963 14:56:38.968962  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1964 14:56:38.975677  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1965 14:56:38.982137  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1966 14:56:38.985142  

 1967 14:56:38.985264  MTRR check

 1968 14:56:38.988575  Fixed MTRRs   : Enabled

 1969 14:56:38.988659  Variable MTRRs: Enabled

 1970 14:56:38.988724  

 1971 14:56:38.995317  MTRR: Fixed MSR 0x250 0x0606060606060606

 1972 14:56:38.998701  MTRR: Fixed MSR 0x258 0x0606060606060606

 1973 14:56:39.001820  MTRR: Fixed MSR 0x259 0x0000000000000000

 1974 14:56:39.005367  MTRR: Fixed MSR 0x268 0x0606060606060606

 1975 14:56:39.011540  MTRR: Fixed MSR 0x269 0x0606060606060606

 1976 14:56:39.015369  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1977 14:56:39.018392  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1978 14:56:39.021931  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1979 14:56:39.028568  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1980 14:56:39.031508  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1981 14:56:39.035217  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1982 14:56:39.041947  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 1983 14:56:39.045458  call enable_fixed_mtrr()

 1984 14:56:39.048970  Checking cr50 for pending updates

 1985 14:56:39.052078  CPU physical address size: 39 bits

 1986 14:56:39.055284  MTRR: Fixed MSR 0x250 0x0606060606060606

 1987 14:56:39.058635  MTRR: Fixed MSR 0x250 0x0606060606060606

 1988 14:56:39.065118  MTRR: Fixed MSR 0x258 0x0606060606060606

 1989 14:56:39.068481  MTRR: Fixed MSR 0x259 0x0000000000000000

 1990 14:56:39.072538  MTRR: Fixed MSR 0x268 0x0606060606060606

 1991 14:56:39.075201  MTRR: Fixed MSR 0x269 0x0606060606060606

 1992 14:56:39.082005  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1993 14:56:39.085055  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1994 14:56:39.088405  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1995 14:56:39.092004  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1996 14:56:39.095606  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1997 14:56:39.101534  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1998 14:56:39.104944  MTRR: Fixed MSR 0x258 0x0606060606060606

 1999 14:56:39.108462  MTRR: Fixed MSR 0x259 0x0000000000000000

 2000 14:56:39.115370  MTRR: Fixed MSR 0x268 0x0606060606060606

 2001 14:56:39.118706  MTRR: Fixed MSR 0x269 0x0606060606060606

 2002 14:56:39.121841  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2003 14:56:39.125360  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2004 14:56:39.131807  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2005 14:56:39.134825  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2006 14:56:39.138147  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2007 14:56:39.141743  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2008 14:56:39.146038  call enable_fixed_mtrr()

 2009 14:56:39.149137  call enable_fixed_mtrr()

 2010 14:56:39.152633  MTRR: Fixed MSR 0x250 0x0606060606060606

 2011 14:56:39.155590  MTRR: Fixed MSR 0x250 0x0606060606060606

 2012 14:56:39.162781  MTRR: Fixed MSR 0x258 0x0606060606060606

 2013 14:56:39.165694  MTRR: Fixed MSR 0x259 0x0000000000000000

 2014 14:56:39.168834  MTRR: Fixed MSR 0x268 0x0606060606060606

 2015 14:56:39.172638  MTRR: Fixed MSR 0x269 0x0606060606060606

 2016 14:56:39.178983  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2017 14:56:39.182249  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2018 14:56:39.185531  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2019 14:56:39.188751  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2020 14:56:39.195257  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2021 14:56:39.199008  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2022 14:56:39.201940  MTRR: Fixed MSR 0x258 0x0606060606060606

 2023 14:56:39.205440  call enable_fixed_mtrr()

 2024 14:56:39.208952  MTRR: Fixed MSR 0x259 0x0000000000000000

 2025 14:56:39.215564  MTRR: Fixed MSR 0x268 0x0606060606060606

 2026 14:56:39.218657  MTRR: Fixed MSR 0x269 0x0606060606060606

 2027 14:56:39.221685  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2028 14:56:39.225364  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2029 14:56:39.231651  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2030 14:56:39.235622  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2031 14:56:39.238711  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2032 14:56:39.241708  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2033 14:56:39.245825  CPU physical address size: 39 bits

 2034 14:56:39.252216  call enable_fixed_mtrr()

 2035 14:56:39.255696  MTRR: Fixed MSR 0x250 0x0606060606060606

 2036 14:56:39.258960  MTRR: Fixed MSR 0x250 0x0606060606060606

 2037 14:56:39.262171  MTRR: Fixed MSR 0x258 0x0606060606060606

 2038 14:56:39.268637  MTRR: Fixed MSR 0x259 0x0000000000000000

 2039 14:56:39.272481  MTRR: Fixed MSR 0x268 0x0606060606060606

 2040 14:56:39.275084  MTRR: Fixed MSR 0x269 0x0606060606060606

 2041 14:56:39.278465  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2042 14:56:39.285113  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2043 14:56:39.288664  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2044 14:56:39.291993  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2045 14:56:39.295122  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2046 14:56:39.298468  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2047 14:56:39.305355  MTRR: Fixed MSR 0x258 0x0606060606060606

 2048 14:56:39.308550  call enable_fixed_mtrr()

 2049 14:56:39.311597  MTRR: Fixed MSR 0x259 0x0000000000000000

 2050 14:56:39.315435  MTRR: Fixed MSR 0x268 0x0606060606060606

 2051 14:56:39.321680  MTRR: Fixed MSR 0x269 0x0606060606060606

 2052 14:56:39.324602  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2053 14:56:39.328233  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2054 14:56:39.331644  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2055 14:56:39.334729  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2056 14:56:39.341193  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2057 14:56:39.344717  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2058 14:56:39.348121  CPU physical address size: 39 bits

 2059 14:56:39.352336  call enable_fixed_mtrr()

 2060 14:56:39.355764  Reading cr50 TPM mode

 2061 14:56:39.359424  CPU physical address size: 39 bits

 2062 14:56:39.362893  CPU physical address size: 39 bits

 2063 14:56:39.366082  CPU physical address size: 39 bits

 2064 14:56:39.373017  BS: BS_PAYLOAD_LOAD entry times (exec / console): 312 / 6 ms

 2065 14:56:39.375891  CPU physical address size: 39 bits

 2066 14:56:39.382603  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2067 14:56:39.389443  Checking segment from ROM address 0xffc02b38

 2068 14:56:39.392748  Checking segment from ROM address 0xffc02b54

 2069 14:56:39.396024  Loading segment from ROM address 0xffc02b38

 2070 14:56:39.399264    code (compression=0)

 2071 14:56:39.409301    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2072 14:56:39.415820  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2073 14:56:39.418779  it's not compressed!

 2074 14:56:39.557633  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2075 14:56:39.564417  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2076 14:56:39.570702  Loading segment from ROM address 0xffc02b54

 2077 14:56:39.570785    Entry Point 0x30000000

 2078 14:56:39.574441  Loaded segments

 2079 14:56:39.580643  BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms

 2080 14:56:39.623957  Finalizing chipset.

 2081 14:56:39.626918  Finalizing SMM.

 2082 14:56:39.627014  APMC done.

 2083 14:56:39.633729  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2084 14:56:39.637093  mp_park_aps done after 0 msecs.

 2085 14:56:39.640181  Jumping to boot code at 0x30000000(0x76b25000)

 2086 14:56:39.650220  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2087 14:56:39.650305  

 2088 14:56:39.650371  

 2089 14:56:39.653421  

 2090 14:56:39.653510  Starting depthcharge on Voema...

 2091 14:56:39.653855  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2092 14:56:39.653954  start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
 2093 14:56:39.654038  Setting prompt string to ['volteer:']
 2094 14:56:39.654117  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
 2095 14:56:39.656863  

 2096 14:56:39.663061  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2097 14:56:39.663186  

 2098 14:56:39.670150  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2099 14:56:39.670233  

 2100 14:56:39.676336  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2101 14:56:39.676420  

 2102 14:56:39.680115  Failed to find eMMC card reader

 2103 14:56:39.680198  

 2104 14:56:39.680264  Wipe memory regions:

 2105 14:56:39.683403  

 2106 14:56:39.686344  	[0x00000000001000, 0x000000000a0000)

 2107 14:56:39.686452  

 2108 14:56:39.689764  	[0x00000000100000, 0x00000030000000)

 2109 14:56:39.715267  

 2110 14:56:39.718509  	[0x00000032662db0, 0x000000769ef000)

 2111 14:56:39.754740  

 2112 14:56:39.757910  	[0x00000100000000, 0x00000280400000)

 2113 14:56:39.960773  

 2114 14:56:39.963767  ec_init: CrosEC protocol v3 supported (256, 256)

 2115 14:56:39.963861  

 2116 14:56:39.971207  update_port_state: port C0 state: usb enable 1 mux conn 0

 2117 14:56:39.971292  

 2118 14:56:39.977231  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2119 14:56:39.980732  

 2120 14:56:39.984327  pmc_check_ipc_sts: STS_BUSY done after 1512 us

 2121 14:56:39.984412  

 2122 14:56:39.990346  send_conn_disc_msg: pmc_send_cmd succeeded

 2123 14:56:40.421045  

 2124 14:56:40.421215  R8152: Initializing

 2125 14:56:40.421314  

 2126 14:56:40.424359  Version 6 (ocp_data = 5c30)

 2127 14:56:40.424444  

 2128 14:56:40.427250  R8152: Done initializing

 2129 14:56:40.427325  

 2130 14:56:40.430633  Adding net device

 2131 14:56:40.733461  

 2132 14:56:40.736477  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2133 14:56:40.736569  

 2134 14:56:40.736638  

 2135 14:56:40.736702  

 2136 14:56:40.739704  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2138 14:56:40.840473  volteer: tftpboot 192.168.201.1 9806441/tftp-deploy-_bdrv4rh/kernel/bzImage 9806441/tftp-deploy-_bdrv4rh/kernel/cmdline 9806441/tftp-deploy-_bdrv4rh/ramdisk/ramdisk.cpio.gz

 2139 14:56:40.840632  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2140 14:56:40.840756  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2141 14:56:40.845001  tftpboot 192.168.201.1 9806441/tftp-deploy-_bdrv4rh/kernel/bzImy-_bdrv4rh/kernel/cmdline 9806441/tftp-deploy-_bdrv4rh/ramdisk/ramdisk.cpio.gz

 2142 14:56:40.845090  

 2143 14:56:40.845157  Waiting for link

 2144 14:56:41.049262  

 2145 14:56:41.049396  done.

 2146 14:56:41.049466  

 2147 14:56:41.049529  MAC: 00:24:32:30:79:06

 2148 14:56:41.049588  

 2149 14:56:41.052325  Sending DHCP discover... done.

 2150 14:56:41.052451  

 2151 14:56:41.055590  Waiting for reply... done.

 2152 14:56:41.055667  

 2153 14:56:41.059379  Sending DHCP request... done.

 2154 14:56:41.059456  

 2155 14:56:41.062680  Waiting for reply... done.

 2156 14:56:41.062759  

 2157 14:56:41.065678  My ip is 192.168.201.23

 2158 14:56:41.065764  

 2159 14:56:41.069150  The DHCP server ip is 192.168.201.1

 2160 14:56:41.069250  

 2161 14:56:41.072457  TFTP server IP predefined by user: 192.168.201.1

 2162 14:56:41.072535  

 2163 14:56:41.079248  Bootfile predefined by user: 9806441/tftp-deploy-_bdrv4rh/kernel/bzImage

 2164 14:56:41.079330  

 2165 14:56:41.082139  Sending tftp read request... done.

 2166 14:56:41.085896  

 2167 14:56:41.089006  Waiting for the transfer... 

 2168 14:56:41.089084  

 2169 14:56:41.614646  00000000 ################################################################

 2170 14:56:41.614774  

 2171 14:56:42.150831  00080000 ################################################################

 2172 14:56:42.151031  

 2173 14:56:42.695987  00100000 ################################################################

 2174 14:56:42.696147  

 2175 14:56:43.248026  00180000 ################################################################

 2176 14:56:43.248159  

 2177 14:56:43.795274  00200000 ################################################################

 2178 14:56:43.795410  

 2179 14:56:44.348246  00280000 ################################################################

 2180 14:56:44.348392  

 2181 14:56:44.883161  00300000 ################################################################

 2182 14:56:44.883337  

 2183 14:56:45.412014  00380000 ################################################################

 2184 14:56:45.412188  

 2185 14:56:45.950025  00400000 ################################################################

 2186 14:56:45.950168  

 2187 14:56:46.492666  00480000 ################################################################

 2188 14:56:46.492822  

 2189 14:56:47.027466  00500000 ################################################################

 2190 14:56:47.027614  

 2191 14:56:47.543871  00580000 ################################################################

 2192 14:56:47.544029  

 2193 14:56:48.061438  00600000 ################################################################

 2194 14:56:48.061608  

 2195 14:56:48.602695  00680000 ################################################################

 2196 14:56:48.602842  

 2197 14:56:49.144193  00700000 ################################################################

 2198 14:56:49.144364  

 2199 14:56:49.161102  00780000 ## done.

 2200 14:56:49.161239  

 2201 14:56:49.164689  The bootfile was 7880592 bytes long.

 2202 14:56:49.164794  

 2203 14:56:49.167926  Sending tftp read request... done.

 2204 14:56:49.168038  

 2205 14:56:49.171259  Waiting for the transfer... 

 2206 14:56:49.171365  

 2207 14:56:49.702559  00000000 ################################################################

 2208 14:56:49.702723  

 2209 14:56:50.240056  00080000 ################################################################

 2210 14:56:50.240191  

 2211 14:56:50.786756  00100000 ################################################################

 2212 14:56:50.786897  

 2213 14:56:51.320636  00180000 ################################################################

 2214 14:56:51.320797  

 2215 14:56:51.856737  00200000 ################################################################

 2216 14:56:51.856886  

 2217 14:56:52.404256  00280000 ################################################################

 2218 14:56:52.404399  

 2219 14:56:53.011378  00300000 ################################################################

 2220 14:56:53.011528  

 2221 14:56:53.594196  00380000 ################################################################

 2222 14:56:53.594343  

 2223 14:56:54.170788  00400000 ################################################################

 2224 14:56:54.170935  

 2225 14:56:54.748460  00480000 ################################################################

 2226 14:56:54.748609  

 2227 14:56:55.308995  00500000 ################################################################

 2228 14:56:55.309166  

 2229 14:56:55.855233  00580000 ################################################################

 2230 14:56:55.855368  

 2231 14:56:56.398970  00600000 ################################################################

 2232 14:56:56.399112  

 2233 14:56:56.951709  00680000 ################################################################

 2234 14:56:56.951872  

 2235 14:56:57.496187  00700000 ################################################################

 2236 14:56:57.496352  

 2237 14:56:58.036304  00780000 ################################################################

 2238 14:56:58.036439  

 2239 14:56:58.476252  00800000 ###################################################### done.

 2240 14:56:58.476423  

 2241 14:56:58.479761  Sending tftp read request... done.

 2242 14:56:58.479871  

 2243 14:56:58.482823  Waiting for the transfer... 

 2244 14:56:58.482907  

 2245 14:56:58.482974  00000000 # done.

 2246 14:56:58.483046  

 2247 14:56:58.492822  Command line loaded dynamically from TFTP file: 9806441/tftp-deploy-_bdrv4rh/kernel/cmdline

 2248 14:56:58.492935  

 2249 14:56:58.506003  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2250 14:56:58.510253  

 2251 14:56:58.513438  Shutting down all USB controllers.

 2252 14:56:58.513529  

 2253 14:56:58.513595  Removing current net device

 2254 14:56:58.513657  

 2255 14:56:58.516406  Finalizing coreboot

 2256 14:56:58.516517  

 2257 14:56:58.523066  Exiting depthcharge with code 4 at timestamp: 27609074

 2258 14:56:58.523178  

 2259 14:56:58.523273  

 2260 14:56:58.523363  Starting kernel ...

 2261 14:56:58.523459  

 2262 14:56:58.523550  

 2263 14:56:58.524149  end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
 2264 14:56:58.524273  start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
 2265 14:56:58.524381  Setting prompt string to ['Linux version [0-9]']
 2266 14:56:58.524481  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2267 14:56:58.524582  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2269 15:01:24.525164  end: 2.2.5 auto-login-action (duration 00:04:26) [common]
 2271 15:01:24.526309  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
 2273 15:01:24.527154  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2276 15:01:24.528718  end: 2 depthcharge-action (duration 00:05:00) [common]
 2278 15:01:24.530221  Cleaning after the job
 2279 15:01:24.530773  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9806441/tftp-deploy-_bdrv4rh/ramdisk
 2280 15:01:24.535058  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9806441/tftp-deploy-_bdrv4rh/kernel
 2281 15:01:24.538908  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9806441/tftp-deploy-_bdrv4rh/modules
 2282 15:01:24.540274  start: 5.1 power-off (timeout 00:00:30) [common]
 2283 15:01:24.541307  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
 2284 15:01:24.651534  >> Command sent successfully.

 2285 15:01:24.655626  Returned 0 in 0 seconds
 2286 15:01:24.756923  end: 5.1 power-off (duration 00:00:00) [common]
 2288 15:01:24.758726  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2289 15:01:24.760132  Listened to connection for namespace 'common' for up to 1s
 2290 15:01:25.761647  Finalising connection for namespace 'common'
 2291 15:01:25.762367  Disconnecting from shell: Finalise
 2292 15:01:25.762791  

 2293 15:01:25.864204  end: 5.2 read-feedback (duration 00:00:01) [common]
 2294 15:01:25.864846  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9806441
 2295 15:01:25.896512  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9806441
 2296 15:01:25.896974  JobError: Your job cannot terminate cleanly.