Boot log: acer-cb317-1h-c3z6-dedede
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 09:19:10.601103 lava-dispatcher, installed at version: 2023.03
2 09:19:10.601384 start: 0 validate
3 09:19:10.601573 Start time: 2023-05-31 09:19:10.601563+00:00 (UTC)
4 09:19:10.601791 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:19:10.601984 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 09:19:10.891060 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:19:10.891326 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1307-g20af3740f4fc%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:19:11.182913 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:19:11.183134 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 09:19:11.491675 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:19:11.492542 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1307-g20af3740f4fc%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 09:19:11.786673 validate duration: 1.19
14 09:19:11.788354 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:19:11.789035 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:19:11.789675 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:19:11.790251 Not decompressing ramdisk as can be used compressed.
18 09:19:11.790710 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/initrd.cpio.gz
19 09:19:11.791055 saving as /var/lib/lava/dispatcher/tmp/10539073/tftp-deploy-wxmmrtq5/ramdisk/initrd.cpio.gz
20 09:19:11.791375 total size: 5432865 (5MB)
21 09:19:11.797346 progress 0% (0MB)
22 09:19:11.805635 progress 5% (0MB)
23 09:19:11.810292 progress 10% (0MB)
24 09:19:11.814063 progress 15% (0MB)
25 09:19:11.817423 progress 20% (1MB)
26 09:19:11.820219 progress 25% (1MB)
27 09:19:11.822746 progress 30% (1MB)
28 09:19:11.825342 progress 35% (1MB)
29 09:19:11.827520 progress 40% (2MB)
30 09:19:11.829612 progress 45% (2MB)
31 09:19:11.831524 progress 50% (2MB)
32 09:19:11.833667 progress 55% (2MB)
33 09:19:11.835408 progress 60% (3MB)
34 09:19:11.837102 progress 65% (3MB)
35 09:19:11.839027 progress 70% (3MB)
36 09:19:11.840575 progress 75% (3MB)
37 09:19:11.842113 progress 80% (4MB)
38 09:19:11.843644 progress 85% (4MB)
39 09:19:11.845353 progress 90% (4MB)
40 09:19:11.846894 progress 95% (4MB)
41 09:19:11.848447 progress 100% (5MB)
42 09:19:11.848681 5MB downloaded in 0.06s (90.40MB/s)
43 09:19:11.848845 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:19:11.849118 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:19:11.849217 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:19:11.849318 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:19:11.849453 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1307-g20af3740f4fc/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 09:19:11.849540 saving as /var/lib/lava/dispatcher/tmp/10539073/tftp-deploy-wxmmrtq5/kernel/bzImage
50 09:19:11.849625 total size: 7884688 (7MB)
51 09:19:11.849695 No compression specified
52 09:19:11.850894 progress 0% (0MB)
53 09:19:11.853257 progress 5% (0MB)
54 09:19:11.855569 progress 10% (0MB)
55 09:19:11.857872 progress 15% (1MB)
56 09:19:11.860162 progress 20% (1MB)
57 09:19:11.862456 progress 25% (1MB)
58 09:19:11.864748 progress 30% (2MB)
59 09:19:11.867044 progress 35% (2MB)
60 09:19:11.869334 progress 40% (3MB)
61 09:19:11.871607 progress 45% (3MB)
62 09:19:11.873881 progress 50% (3MB)
63 09:19:11.876132 progress 55% (4MB)
64 09:19:11.878393 progress 60% (4MB)
65 09:19:11.880650 progress 65% (4MB)
66 09:19:11.882904 progress 70% (5MB)
67 09:19:11.885154 progress 75% (5MB)
68 09:19:11.887412 progress 80% (6MB)
69 09:19:11.889680 progress 85% (6MB)
70 09:19:11.891928 progress 90% (6MB)
71 09:19:11.894196 progress 95% (7MB)
72 09:19:11.896459 progress 100% (7MB)
73 09:19:11.896666 7MB downloaded in 0.05s (159.86MB/s)
74 09:19:11.896822 end: 1.2.1 http-download (duration 00:00:00) [common]
76 09:19:11.897077 end: 1.2 download-retry (duration 00:00:00) [common]
77 09:19:11.897175 start: 1.3 download-retry (timeout 00:10:00) [common]
78 09:19:11.897273 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 09:19:11.897418 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/full.rootfs.tar.xz
80 09:19:11.897497 saving as /var/lib/lava/dispatcher/tmp/10539073/tftp-deploy-wxmmrtq5/nfsrootfs/full.rootfs.tar
81 09:19:11.897567 total size: 133381488 (127MB)
82 09:19:11.897659 Using unxz to decompress xz
83 09:19:11.901649 progress 0% (0MB)
84 09:19:12.275743 progress 5% (6MB)
85 09:19:12.664808 progress 10% (12MB)
86 09:19:12.979587 progress 15% (19MB)
87 09:19:13.186565 progress 20% (25MB)
88 09:19:13.457611 progress 25% (31MB)
89 09:19:13.843649 progress 30% (38MB)
90 09:19:14.227415 progress 35% (44MB)
91 09:19:14.675944 progress 40% (50MB)
92 09:19:15.105614 progress 45% (57MB)
93 09:19:15.508232 progress 50% (63MB)
94 09:19:15.921493 progress 55% (69MB)
95 09:19:16.324959 progress 60% (76MB)
96 09:19:16.731444 progress 65% (82MB)
97 09:19:17.137269 progress 70% (89MB)
98 09:19:17.543934 progress 75% (95MB)
99 09:19:18.033819 progress 80% (101MB)
100 09:19:18.515550 progress 85% (108MB)
101 09:19:18.814723 progress 90% (114MB)
102 09:19:19.198130 progress 95% (120MB)
103 09:19:19.632842 progress 100% (127MB)
104 09:19:19.638927 127MB downloaded in 7.74s (16.43MB/s)
105 09:19:19.639239 end: 1.3.1 http-download (duration 00:00:08) [common]
107 09:19:19.639533 end: 1.3 download-retry (duration 00:00:08) [common]
108 09:19:19.639638 start: 1.4 download-retry (timeout 00:09:52) [common]
109 09:19:19.639738 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 09:19:19.639904 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1307-g20af3740f4fc/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 09:19:19.639987 saving as /var/lib/lava/dispatcher/tmp/10539073/tftp-deploy-wxmmrtq5/modules/modules.tar
112 09:19:19.640058 total size: 250948 (0MB)
113 09:19:19.640128 Using unxz to decompress xz
114 09:19:19.644022 progress 13% (0MB)
115 09:19:19.644452 progress 26% (0MB)
116 09:19:19.644712 progress 39% (0MB)
117 09:19:19.646169 progress 52% (0MB)
118 09:19:19.648324 progress 65% (0MB)
119 09:19:19.650434 progress 78% (0MB)
120 09:19:19.652551 progress 91% (0MB)
121 09:19:19.654543 progress 100% (0MB)
122 09:19:19.660878 0MB downloaded in 0.02s (11.50MB/s)
123 09:19:19.661160 end: 1.4.1 http-download (duration 00:00:00) [common]
125 09:19:19.661465 end: 1.4 download-retry (duration 00:00:00) [common]
126 09:19:19.661575 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 09:19:19.661698 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 09:19:21.992631 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10539073/extract-nfsrootfs-z82tjie_
129 09:19:21.992848 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 09:19:21.992982 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 09:19:21.993173 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde
132 09:19:21.993314 makedir: /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin
133 09:19:21.993430 makedir: /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/tests
134 09:19:21.993538 makedir: /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/results
135 09:19:21.993662 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-add-keys
136 09:19:21.993815 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-add-sources
137 09:19:21.993954 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-background-process-start
138 09:19:21.994092 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-background-process-stop
139 09:19:21.994226 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-common-functions
140 09:19:21.994359 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-echo-ipv4
141 09:19:21.994493 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-install-packages
142 09:19:21.994626 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-installed-packages
143 09:19:21.994758 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-os-build
144 09:19:21.994891 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-probe-channel
145 09:19:21.995025 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-probe-ip
146 09:19:21.995157 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-target-ip
147 09:19:21.995291 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-target-mac
148 09:19:21.995423 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-target-storage
149 09:19:21.995558 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-test-case
150 09:19:21.995690 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-test-event
151 09:19:21.995833 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-test-feedback
152 09:19:21.995967 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-test-raise
153 09:19:21.996098 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-test-reference
154 09:19:21.996230 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-test-runner
155 09:19:21.996361 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-test-set
156 09:19:21.996491 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-test-shell
157 09:19:21.996624 Updating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-install-packages (oe)
158 09:19:21.996780 Updating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/bin/lava-installed-packages (oe)
159 09:19:21.996918 Creating /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/environment
160 09:19:21.997025 LAVA metadata
161 09:19:21.997103 - LAVA_JOB_ID=10539073
162 09:19:21.997172 - LAVA_DISPATCHER_IP=192.168.201.1
163 09:19:21.997281 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 09:19:21.997354 skipped lava-vland-overlay
165 09:19:21.997437 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 09:19:21.997523 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 09:19:21.997876 skipped lava-multinode-overlay
168 09:19:21.997967 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 09:19:21.998057 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 09:19:21.998138 Loading test definitions
171 09:19:21.998236 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 09:19:21.998316 Using /lava-10539073 at stage 0
173 09:19:21.998658 uuid=10539073_1.5.2.3.1 testdef=None
174 09:19:21.998757 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 09:19:21.998851 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 09:19:21.999397 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 09:19:21.999641 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 09:19:22.000336 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 09:19:22.000592 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 09:19:22.001278 runner path: /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/0/tests/0_dmesg test_uuid 10539073_1.5.2.3.1
183 09:19:22.001448 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 09:19:22.001717 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 09:19:22.001798 Using /lava-10539073 at stage 1
187 09:19:22.002116 uuid=10539073_1.5.2.3.5 testdef=None
188 09:19:22.002214 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 09:19:22.002308 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 09:19:22.002814 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 09:19:22.003053 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 09:19:22.003760 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 09:19:22.004014 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 09:19:22.004703 runner path: /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/1/tests/1_bootrr test_uuid 10539073_1.5.2.3.5
197 09:19:22.004867 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 09:19:22.005093 Creating lava-test-runner.conf files
200 09:19:22.005162 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/0 for stage 0
201 09:19:22.005258 - 0_dmesg
202 09:19:22.005343 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10539073/lava-overlay-pxllatde/lava-10539073/1 for stage 1
203 09:19:22.005440 - 1_bootrr
204 09:19:22.005543 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 09:19:22.005646 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 09:19:22.013603 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 09:19:22.013720 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 09:19:22.013816 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 09:19:22.013910 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 09:19:22.014004 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 09:19:22.158562 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 09:19:22.158977 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 09:19:22.159107 extracting modules file /var/lib/lava/dispatcher/tmp/10539073/tftp-deploy-wxmmrtq5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10539073/extract-nfsrootfs-z82tjie_
214 09:19:22.173050 extracting modules file /var/lib/lava/dispatcher/tmp/10539073/tftp-deploy-wxmmrtq5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10539073/extract-overlay-ramdisk-w9anl3am/ramdisk
215 09:19:22.186785 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 09:19:22.186925 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 09:19:22.187025 [common] Applying overlay to NFS
218 09:19:22.187105 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10539073/compress-overlay-3jv3zj34/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10539073/extract-nfsrootfs-z82tjie_
219 09:19:22.195742 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 09:19:22.195870 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 09:19:22.195974 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 09:19:22.196077 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 09:19:22.196168 Building ramdisk /var/lib/lava/dispatcher/tmp/10539073/extract-overlay-ramdisk-w9anl3am/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10539073/extract-overlay-ramdisk-w9anl3am/ramdisk
224 09:19:22.269162 >> 26159 blocks
225 09:19:22.888821 rename /var/lib/lava/dispatcher/tmp/10539073/extract-overlay-ramdisk-w9anl3am/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10539073/tftp-deploy-wxmmrtq5/ramdisk/ramdisk.cpio.gz
226 09:19:22.889290 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 09:19:22.889428 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 09:19:22.889543 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 09:19:22.889654 No mkimage arch provided, not using FIT.
230 09:19:22.889755 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 09:19:22.889868 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 09:19:22.889989 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 09:19:22.890091 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 09:19:22.890183 No LXC device requested
235 09:19:22.890273 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 09:19:22.890373 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 09:19:22.890467 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 09:19:22.890546 Checking files for TFTP limit of 4294967296 bytes.
239 09:19:22.890981 end: 1 tftp-deploy (duration 00:00:11) [common]
240 09:19:22.891100 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 09:19:22.891203 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 09:19:22.891340 substitutions:
243 09:19:22.891417 - {DTB}: None
244 09:19:22.891486 - {INITRD}: 10539073/tftp-deploy-wxmmrtq5/ramdisk/ramdisk.cpio.gz
245 09:19:22.891554 - {KERNEL}: 10539073/tftp-deploy-wxmmrtq5/kernel/bzImage
246 09:19:22.891619 - {LAVA_MAC}: None
247 09:19:22.891681 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10539073/extract-nfsrootfs-z82tjie_
248 09:19:22.891745 - {NFS_SERVER_IP}: 192.168.201.1
249 09:19:22.891807 - {PRESEED_CONFIG}: None
250 09:19:22.891909 - {PRESEED_LOCAL}: None
251 09:19:22.891988 - {RAMDISK}: 10539073/tftp-deploy-wxmmrtq5/ramdisk/ramdisk.cpio.gz
252 09:19:22.892053 - {ROOT_PART}: None
253 09:19:22.892116 - {ROOT}: None
254 09:19:22.892177 - {SERVER_IP}: 192.168.201.1
255 09:19:22.892239 - {TEE}: None
256 09:19:22.892300 Parsed boot commands:
257 09:19:22.892362 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 09:19:22.892547 Parsed boot commands: tftpboot 192.168.201.1 10539073/tftp-deploy-wxmmrtq5/kernel/bzImage 10539073/tftp-deploy-wxmmrtq5/kernel/cmdline 10539073/tftp-deploy-wxmmrtq5/ramdisk/ramdisk.cpio.gz
259 09:19:22.892648 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 09:19:22.892744 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 09:19:22.892851 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 09:19:22.892947 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 09:19:22.893027 Not connected, no need to disconnect.
264 09:19:22.893111 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 09:19:22.893205 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 09:19:22.893282 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-2'
267 09:19:22.897065 Setting prompt string to ['lava-test: # ']
268 09:19:22.897434 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 09:19:22.897556 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 09:19:22.897679 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 09:19:22.897783 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 09:19:22.897991 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=reboot'
273 09:19:28.053153 >> Command sent successfully.
274 09:19:28.063453 Returned 0 in 5 seconds
275 09:19:28.164744 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 09:19:28.166342 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 09:19:28.166899 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 09:19:28.167430 Setting prompt string to 'Starting depthcharge on Magolor...'
280 09:19:28.167789 Changing prompt to 'Starting depthcharge on Magolor...'
281 09:19:28.168161 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
282 09:19:28.169389 [Enter `^Ec?' for help]
283 09:19:29.296306
284 09:19:29.296490
285 09:19:29.307131 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
286 09:19:29.310651 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
287 09:19:29.314194 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
288 09:19:29.320455 CPU: AES supported, TXT NOT supported, VT supported
289 09:19:29.324181 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
290 09:19:29.331739 PCH: device id 4d87 (rev 01) is Jasperlake Super
291 09:19:29.334920 IGD: device id 4e55 (rev 01) is Jasperlake GT4
292 09:19:29.338118 VBOOT: Loading verstage.
293 09:19:29.341740 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 09:19:29.348639 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
295 09:19:29.351868 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 09:19:29.359609 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
297 09:19:29.360148
298 09:19:29.360577
299 09:19:29.370065 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
300 09:19:29.385548 Probing TPM: . done!
301 09:19:29.389046 TPM ready after 0 ms
302 09:19:29.392048 Connected to device vid:did:rid of 1ae0:0028:00
303 09:19:29.402665 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
304 09:19:29.410259 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 09:19:29.413861 Initialized TPM device CR50 revision 0
306 09:19:29.480602 tlcl_send_startup: Startup return code is 0
307 09:19:29.481090 TPM: setup succeeded
308 09:19:29.488775 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 09:19:29.503193 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 09:19:29.515621 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 09:19:29.526643 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 09:19:29.530473 Chrome EC: UHEPI supported
313 09:19:29.531039 Phase 1
314 09:19:29.534592 FMAP: area GBB found @ c05000 (12288 bytes)
315 09:19:29.541493 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
316 09:19:29.548561 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
317 09:19:29.551553 Recovery requested (1009000e)
318 09:19:29.558251 TPM: Extending digest for VBOOT: boot mode into PCR 0
319 09:19:29.568437 tlcl_extend: response is 0
320 09:19:29.574592 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
321 09:19:29.584292 tlcl_extend: response is 0
322 09:19:29.590885 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
323 09:19:29.594119 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
324 09:19:29.600547 BS: verstage times (exec / console): total (unknown) / 124 ms
325 09:19:29.600987
326 09:19:29.604309
327 09:19:29.614080 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
328 09:19:29.621076 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
329 09:19:29.624285 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
330 09:19:29.627298 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
331 09:19:29.633710 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
332 09:19:29.637537 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
333 09:19:29.640752 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
334 09:19:29.643720 TCO_STS: 0000 0001
335 09:19:29.647428 GEN_PMCON: d0015038 00002200
336 09:19:29.650469 GBLRST_CAUSE: 00000000 00000000
337 09:19:29.650906 prev_sleep_state 5
338 09:19:29.654251 Boot Count incremented to 3095
339 09:19:29.661520 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 09:19:29.664882 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
341 09:19:29.668789 Chrome EC: UHEPI supported
342 09:19:29.675640 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
343 09:19:29.682192 Probing TPM: done!
344 09:19:29.688397 Connected to device vid:did:rid of 1ae0:0028:00
345 09:19:29.698448 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
346 09:19:29.702213 Initialized TPM device CR50 revision 0
347 09:19:29.716087 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 09:19:29.723210 MRC: Hash idx 0x100b comparison successful.
349 09:19:29.726422 MRC cache found, size 5458
350 09:19:29.726868 bootmode is set to: 2
351 09:19:29.729658 SPD INDEX = 0
352 09:19:29.733339 CBFS: Found 'spd.bin' @0x40c40 size 0x600
353 09:19:29.736245 SPD: module type is LPDDR4X
354 09:19:29.743093 SPD: module part number is MT53E512M32D2NP-046 WT:E
355 09:19:29.749809 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
356 09:19:29.752985 SPD: device width 16 bits, bus width 32 bits
357 09:19:29.756235 SPD: module size is 4096 MB (per channel)
358 09:19:29.759939 meminit_channels: DRAM half-populated
359 09:19:29.843105 CBMEM:
360 09:19:29.846299 IMD: root @ 0x76fff000 254 entries.
361 09:19:29.849217 IMD: root @ 0x76ffec00 62 entries.
362 09:19:29.852846 FMAP: area RO_VPD found @ c00000 (16384 bytes)
363 09:19:29.859161 WARNING: RO_VPD is uninitialized or empty.
364 09:19:29.863070 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
365 09:19:29.866585 External stage cache:
366 09:19:29.869483 IMD: root @ 0x7b3ff000 254 entries.
367 09:19:29.873572 IMD: root @ 0x7b3fec00 62 entries.
368 09:19:29.882707 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
369 09:19:29.889409 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 09:19:29.896270 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
371 09:19:29.904787 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 09:19:29.911039 cse_lite: Skip switching to RW in the recovery path
373 09:19:29.911490 1 DIMMs found
374 09:19:29.911865 SMM Memory Map
375 09:19:29.914203 SMRAM : 0x7b000000 0x800000
376 09:19:29.920945 Subregion 0: 0x7b000000 0x200000
377 09:19:29.924480 Subregion 1: 0x7b200000 0x200000
378 09:19:29.927295 Subregion 2: 0x7b400000 0x400000
379 09:19:29.927734 top_of_ram = 0x77000000
380 09:19:29.934529 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
381 09:19:29.940548 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
382 09:19:29.944120 MTRR Range: Start=ff000000 End=0 (Size 1000000)
383 09:19:29.951249 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
384 09:19:29.954295 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
385 09:19:29.966150 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
386 09:19:29.972772 Processing 188 relocs. Offset value of 0x74c0e000
387 09:19:29.979908 BS: romstage times (exec / console): total (unknown) / 255 ms
388 09:19:29.984226
389 09:19:29.984685
390 09:19:29.994345 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
391 09:19:30.000740 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 09:19:30.004308 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
393 09:19:30.010364 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
394 09:19:30.067057 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
395 09:19:30.073316 Processing 4805 relocs. Offset value of 0x75da8000
396 09:19:30.077046 BS: postcar times (exec / console): total (unknown) / 42 ms
397 09:19:30.080089
398 09:19:30.080521
399 09:19:30.090429 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
400 09:19:30.090877 Normal boot
401 09:19:30.094370 EC returned error result code 3
402 09:19:30.097354 FW_CONFIG value is 0x204
403 09:19:30.100356 GENERIC: 0.0 disabled by fw_config
404 09:19:30.107433 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
405 09:19:30.110617 I2C: 00:10 disabled by fw_config
406 09:19:30.113504 I2C: 00:10 disabled by fw_config
407 09:19:30.117177 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
408 09:19:30.124264 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
409 09:19:30.127113 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
410 09:19:30.134068 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
411 09:19:30.137775 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
412 09:19:30.140983 I2C: 00:10 disabled by fw_config
413 09:19:30.147997 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
414 09:19:30.154868 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
415 09:19:30.157807 I2C: 00:1a disabled by fw_config
416 09:19:30.161193 I2C: 00:1a disabled by fw_config
417 09:19:30.164882 fw_config match found: AUDIO_AMP=UNPROVISIONED
418 09:19:30.171146 fw_config match found: AUDIO_AMP=UNPROVISIONED
419 09:19:30.174366 GENERIC: 0.0 disabled by fw_config
420 09:19:30.177867 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
421 09:19:30.184579 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
422 09:19:30.187796 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
423 09:19:30.194742 microcode: Update skipped, already up-to-date
424 09:19:30.197748 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
425 09:19:30.226106 Detected 2 core, 2 thread CPU.
426 09:19:30.228893 Setting up SMI for CPU
427 09:19:30.231901 IED base = 0x7b400000
428 09:19:30.232028 IED size = 0x00400000
429 09:19:30.235836 Will perform SMM setup.
430 09:19:30.238777 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
431 09:19:30.249056 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
432 09:19:30.251837 Processing 16 relocs. Offset value of 0x00030000
433 09:19:30.256029 Attempting to start 1 APs
434 09:19:30.259442 Waiting for 10ms after sending INIT.
435 09:19:30.275720 Waiting for 1st SIPI to complete...done.
436 09:19:30.278639 Waiting for 2nd SIPI to complete...done.
437 09:19:30.282073 AP: slot 1 apic_id 2.
438 09:19:30.288587 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
439 09:19:30.295431 Processing 13 relocs. Offset value of 0x00038000
440 09:19:30.295720 Unable to locate Global NVS
441 09:19:30.305667 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
442 09:19:30.308759 Installing permanent SMM handler to 0x7b000000
443 09:19:30.318874 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
444 09:19:30.322007 Processing 704 relocs. Offset value of 0x7b010000
445 09:19:30.332080 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
446 09:19:30.335020 Processing 13 relocs. Offset value of 0x7b008000
447 09:19:30.342032 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
448 09:19:30.345042 Unable to locate Global NVS
449 09:19:30.352161 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
450 09:19:30.355324 Clearing SMI status registers
451 09:19:30.355785 SMI_STS: PM1
452 09:19:30.358787 PM1_STS: PWRBTN
453 09:19:30.359267 TCO_STS: INTRD_DET
454 09:19:30.361699 GPE0 STD STS:
455 09:19:30.368857 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
456 09:19:30.371897 In relocation handler: CPU 0
457 09:19:30.375539 New SMBASE=0x7b000000 IEDBASE=0x7b400000
458 09:19:30.381616 Writing SMRR. base = 0x7b000006, mask=0xff800800
459 09:19:30.381792 Relocation complete.
460 09:19:30.388503 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
461 09:19:30.391971 In relocation handler: CPU 1
462 09:19:30.398612 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
463 09:19:30.401570 Writing SMRR. base = 0x7b000006, mask=0xff800800
464 09:19:30.404758 Relocation complete.
465 09:19:30.404857 Initializing CPU #0
466 09:19:30.408711 CPU: vendor Intel device 906c0
467 09:19:30.411328 CPU: family 06, model 9c, stepping 00
468 09:19:30.415053 Clearing out pending MCEs
469 09:19:30.418314 Setting up local APIC...
470 09:19:30.421391 apic_id: 0x00 done.
471 09:19:30.424699 Turbo is available but hidden
472 09:19:30.424801 Turbo is available and visible
473 09:19:30.431954 microcode: Update skipped, already up-to-date
474 09:19:30.432055 CPU #0 initialized
475 09:19:30.435054 Initializing CPU #1
476 09:19:30.438254 CPU: vendor Intel device 906c0
477 09:19:30.441613 CPU: family 06, model 9c, stepping 00
478 09:19:30.444606 Clearing out pending MCEs
479 09:19:30.447702 Setting up local APIC...
480 09:19:30.447803 apic_id: 0x02 done.
481 09:19:30.454613 microcode: Update skipped, already up-to-date
482 09:19:30.454725 CPU #1 initialized
483 09:19:30.461257 bsp_do_flight_plan done after 177 msecs.
484 09:19:30.464699 CPU: frequency set to 2800 MHz
485 09:19:30.464832 Enabling SMIs.
486 09:19:30.471463 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 289 ms
487 09:19:30.481691 Probing TPM: done!
488 09:19:30.488089 Connected to device vid:did:rid of 1ae0:0028:00
489 09:19:30.497608 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
490 09:19:30.501293 Initialized TPM device CR50 revision 0
491 09:19:30.507814 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
492 09:19:30.511040 Found a VBT of 7680 bytes after decompression
493 09:19:30.517859 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
494 09:19:30.553472 Detected 2 core, 2 thread CPU.
495 09:19:30.556540 Detected 2 core, 2 thread CPU.
496 09:19:30.920003 Display FSP Version Info HOB
497 09:19:30.923072 Reference Code - CPU = 8.7.22.30
498 09:19:30.926524 uCode Version = 24.0.0.1f
499 09:19:30.930116 TXT ACM version = ff.ff.ff.ffff
500 09:19:30.933229 Reference Code - ME = 8.7.22.30
501 09:19:30.936636 MEBx version = 0.0.0.0
502 09:19:30.939815 ME Firmware Version = Consumer SKU
503 09:19:30.943380 Reference Code - PCH = 8.7.22.30
504 09:19:30.946408 PCH-CRID Status = Disabled
505 09:19:30.950018 PCH-CRID Original Value = ff.ff.ff.ffff
506 09:19:30.952992 PCH-CRID New Value = ff.ff.ff.ffff
507 09:19:30.956798 OPROM - RST - RAID = ff.ff.ff.ffff
508 09:19:30.959904 PCH Hsio Version = 4.0.0.0
509 09:19:30.963005 Reference Code - SA - System Agent = 8.7.22.30
510 09:19:30.966276 Reference Code - MRC = 0.0.4.68
511 09:19:30.970032 SA - PCIe Version = 8.7.22.30
512 09:19:30.973107 SA-CRID Status = Disabled
513 09:19:30.976115 SA-CRID Original Value = 0.0.0.0
514 09:19:30.979448 SA-CRID New Value = 0.0.0.0
515 09:19:30.983314 OPROM - VBIOS = ff.ff.ff.ffff
516 09:19:30.986475 IO Manageability Engine FW Version = ff.ff.ff.ffff
517 09:19:30.989611 PHY Build Version = ff.ff.ff.ffff
518 09:19:30.993422 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
519 09:19:30.999612 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
520 09:19:31.003166 ITSS IRQ Polarities Before:
521 09:19:31.006111 IPC0: 0xffffffff
522 09:19:31.006204 IPC1: 0xffffffff
523 09:19:31.009519 IPC2: 0xffffffff
524 09:19:31.009646 IPC3: 0xffffffff
525 09:19:31.013020 ITSS IRQ Polarities After:
526 09:19:31.016553 IPC0: 0xffffffff
527 09:19:31.016643 IPC1: 0xffffffff
528 09:19:31.019617 IPC2: 0xffffffff
529 09:19:31.019707 IPC3: 0xffffffff
530 09:19:31.033062 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
531 09:19:31.039512 BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
532 09:19:31.039608 Enumerating buses...
533 09:19:31.046362 Show all devs... Before device enumeration.
534 09:19:31.046455 Root Device: enabled 1
535 09:19:31.049267 CPU_CLUSTER: 0: enabled 1
536 09:19:31.052709 DOMAIN: 0000: enabled 1
537 09:19:31.055915 PCI: 00:00.0: enabled 1
538 09:19:31.056012 PCI: 00:02.0: enabled 1
539 09:19:31.059456 PCI: 00:04.0: enabled 1
540 09:19:31.062427 PCI: 00:05.0: enabled 1
541 09:19:31.066043 PCI: 00:09.0: enabled 0
542 09:19:31.066134 PCI: 00:12.6: enabled 0
543 09:19:31.069321 PCI: 00:14.0: enabled 1
544 09:19:31.072544 PCI: 00:14.1: enabled 0
545 09:19:31.076288 PCI: 00:14.2: enabled 0
546 09:19:31.076384 PCI: 00:14.3: enabled 1
547 09:19:31.079620 PCI: 00:14.5: enabled 1
548 09:19:31.082656 PCI: 00:15.0: enabled 1
549 09:19:31.085849 PCI: 00:15.1: enabled 1
550 09:19:31.085938 PCI: 00:15.2: enabled 1
551 09:19:31.088955 PCI: 00:15.3: enabled 1
552 09:19:31.092605 PCI: 00:16.0: enabled 1
553 09:19:31.092693 PCI: 00:16.1: enabled 0
554 09:19:31.095896 PCI: 00:16.4: enabled 0
555 09:19:31.099193 PCI: 00:16.5: enabled 0
556 09:19:31.102305 PCI: 00:17.0: enabled 0
557 09:19:31.102393 PCI: 00:19.0: enabled 1
558 09:19:31.106049 PCI: 00:19.1: enabled 0
559 09:19:31.109076 PCI: 00:19.2: enabled 1
560 09:19:31.112084 PCI: 00:1a.0: enabled 1
561 09:19:31.112180 PCI: 00:1c.0: enabled 0
562 09:19:31.115597 PCI: 00:1c.1: enabled 0
563 09:19:31.118676 PCI: 00:1c.2: enabled 0
564 09:19:31.122639 PCI: 00:1c.3: enabled 0
565 09:19:31.122728 PCI: 00:1c.4: enabled 0
566 09:19:31.125444 PCI: 00:1c.5: enabled 0
567 09:19:31.129045 PCI: 00:1c.6: enabled 0
568 09:19:31.129136 PCI: 00:1c.7: enabled 1
569 09:19:31.132115 PCI: 00:1e.0: enabled 0
570 09:19:31.135204 PCI: 00:1e.1: enabled 0
571 09:19:31.139145 PCI: 00:1e.2: enabled 1
572 09:19:31.139235 PCI: 00:1e.3: enabled 0
573 09:19:31.142276 PCI: 00:1f.0: enabled 1
574 09:19:31.145518 PCI: 00:1f.1: enabled 1
575 09:19:31.148704 PCI: 00:1f.2: enabled 1
576 09:19:31.148801 PCI: 00:1f.3: enabled 1
577 09:19:31.151963 PCI: 00:1f.4: enabled 0
578 09:19:31.156084 PCI: 00:1f.5: enabled 1
579 09:19:31.159005 PCI: 00:1f.7: enabled 0
580 09:19:31.159104 GENERIC: 0.0: enabled 1
581 09:19:31.162238 GENERIC: 0.0: enabled 1
582 09:19:31.165369 USB0 port 0: enabled 1
583 09:19:31.165460 GENERIC: 0.0: enabled 1
584 09:19:31.168849 I2C: 00:2c: enabled 1
585 09:19:31.171696 I2C: 00:15: enabled 1
586 09:19:31.175410 GENERIC: 0.0: enabled 0
587 09:19:31.175501 I2C: 00:15: enabled 1
588 09:19:31.178444 I2C: 00:10: enabled 0
589 09:19:31.181627 I2C: 00:10: enabled 0
590 09:19:31.181720 I2C: 00:2c: enabled 1
591 09:19:31.184849 I2C: 00:40: enabled 1
592 09:19:31.188797 I2C: 00:10: enabled 1
593 09:19:31.188886 I2C: 00:39: enabled 1
594 09:19:31.192013 I2C: 00:36: enabled 1
595 09:19:31.195329 I2C: 00:10: enabled 0
596 09:19:31.195416 I2C: 00:0c: enabled 1
597 09:19:31.198299 I2C: 00:50: enabled 1
598 09:19:31.201513 I2C: 00:1a: enabled 1
599 09:19:31.201639 I2C: 00:1a: enabled 0
600 09:19:31.205374 I2C: 00:1a: enabled 0
601 09:19:31.208372 I2C: 00:28: enabled 1
602 09:19:31.208459 I2C: 00:29: enabled 1
603 09:19:31.211868 PCI: 00:00.0: enabled 1
604 09:19:31.215078 SPI: 00: enabled 1
605 09:19:31.215170 PNP: 0c09.0: enabled 1
606 09:19:31.218578 GENERIC: 0.0: enabled 0
607 09:19:31.221342 USB2 port 0: enabled 1
608 09:19:31.225030 USB2 port 1: enabled 1
609 09:19:31.225123 USB2 port 2: enabled 1
610 09:19:31.228083 USB2 port 3: enabled 1
611 09:19:31.231576 USB2 port 4: enabled 0
612 09:19:31.231674 USB2 port 5: enabled 1
613 09:19:31.234712 USB2 port 6: enabled 0
614 09:19:31.238329 USB2 port 7: enabled 1
615 09:19:31.238416 USB3 port 0: enabled 1
616 09:19:31.241393 USB3 port 1: enabled 1
617 09:19:31.244583 USB3 port 2: enabled 1
618 09:19:31.247737 USB3 port 3: enabled 1
619 09:19:31.247824 APIC: 00: enabled 1
620 09:19:31.251667 APIC: 02: enabled 1
621 09:19:31.251752 Compare with tree...
622 09:19:31.254851 Root Device: enabled 1
623 09:19:31.257868 CPU_CLUSTER: 0: enabled 1
624 09:19:31.261106 APIC: 00: enabled 1
625 09:19:31.261199 APIC: 02: enabled 1
626 09:19:31.264720 DOMAIN: 0000: enabled 1
627 09:19:31.267704 PCI: 00:00.0: enabled 1
628 09:19:31.271304 PCI: 00:02.0: enabled 1
629 09:19:31.271398 PCI: 00:04.0: enabled 1
630 09:19:31.274682 GENERIC: 0.0: enabled 1
631 09:19:31.277785 PCI: 00:05.0: enabled 1
632 09:19:31.281337 GENERIC: 0.0: enabled 1
633 09:19:31.284416 PCI: 00:09.0: enabled 0
634 09:19:31.288080 PCI: 00:12.6: enabled 0
635 09:19:31.288171 PCI: 00:14.0: enabled 1
636 09:19:31.291450 USB0 port 0: enabled 1
637 09:19:31.294602 USB2 port 0: enabled 1
638 09:19:31.297807 USB2 port 1: enabled 1
639 09:19:31.301498 USB2 port 2: enabled 1
640 09:19:31.301587 USB2 port 3: enabled 1
641 09:19:31.304803 USB2 port 4: enabled 0
642 09:19:31.308029 USB2 port 5: enabled 1
643 09:19:31.311189 USB2 port 6: enabled 0
644 09:19:31.314460 USB2 port 7: enabled 1
645 09:19:31.314549 USB3 port 0: enabled 1
646 09:19:31.317933 USB3 port 1: enabled 1
647 09:19:31.320903 USB3 port 2: enabled 1
648 09:19:31.324316 USB3 port 3: enabled 1
649 09:19:31.327908 PCI: 00:14.1: enabled 0
650 09:19:31.327999 PCI: 00:14.2: enabled 0
651 09:19:31.331110 PCI: 00:14.3: enabled 1
652 09:19:31.334597 GENERIC: 0.0: enabled 1
653 09:19:31.337705 PCI: 00:14.5: enabled 1
654 09:19:31.341243 PCI: 00:15.0: enabled 1
655 09:19:31.341334 I2C: 00:2c: enabled 1
656 09:19:31.344900 I2C: 00:15: enabled 1
657 09:19:31.348026 PCI: 00:15.1: enabled 1
658 09:19:31.351329 PCI: 00:15.2: enabled 1
659 09:19:31.354497 GENERIC: 0.0: enabled 0
660 09:19:31.354587 I2C: 00:15: enabled 1
661 09:19:31.357742 I2C: 00:10: enabled 0
662 09:19:31.360819 I2C: 00:10: enabled 0
663 09:19:31.364619 I2C: 00:2c: enabled 1
664 09:19:31.364706 I2C: 00:40: enabled 1
665 09:19:31.367688 I2C: 00:10: enabled 1
666 09:19:31.370805 I2C: 00:39: enabled 1
667 09:19:31.374260 PCI: 00:15.3: enabled 1
668 09:19:31.374355 I2C: 00:36: enabled 1
669 09:19:31.377475 I2C: 00:10: enabled 0
670 09:19:31.380877 I2C: 00:0c: enabled 1
671 09:19:31.384469 I2C: 00:50: enabled 1
672 09:19:31.387525 PCI: 00:16.0: enabled 1
673 09:19:31.387650 PCI: 00:16.1: enabled 0
674 09:19:31.391350 PCI: 00:16.4: enabled 0
675 09:19:31.394335 PCI: 00:16.5: enabled 0
676 09:19:31.398198 PCI: 00:17.0: enabled 0
677 09:19:31.398287 PCI: 00:19.0: enabled 1
678 09:19:31.401405 I2C: 00:1a: enabled 1
679 09:19:31.405094 I2C: 00:1a: enabled 0
680 09:19:31.405191 I2C: 00:1a: enabled 0
681 09:19:31.408448 I2C: 00:28: enabled 1
682 09:19:31.412034 I2C: 00:29: enabled 1
683 09:19:31.415187 PCI: 00:19.1: enabled 0
684 09:19:31.418817 PCI: 00:19.2: enabled 1
685 09:19:31.418916 PCI: 00:1a.0: enabled 1
686 09:19:31.421985 PCI: 00:1e.0: enabled 0
687 09:19:31.424931 PCI: 00:1e.1: enabled 0
688 09:19:31.428482 PCI: 00:1e.2: enabled 1
689 09:19:31.428579 SPI: 00: enabled 1
690 09:19:31.432099 PCI: 00:1e.3: enabled 0
691 09:19:31.435545 PCI: 00:1f.0: enabled 1
692 09:19:31.438283 PNP: 0c09.0: enabled 1
693 09:19:31.441749 PCI: 00:1f.1: enabled 1
694 09:19:31.441835 PCI: 00:1f.2: enabled 1
695 09:19:31.445365 PCI: 00:1f.3: enabled 1
696 09:19:31.448196 GENERIC: 0.0: enabled 0
697 09:19:31.451776 PCI: 00:1f.4: enabled 0
698 09:19:31.454794 PCI: 00:1f.5: enabled 1
699 09:19:31.454882 PCI: 00:1f.7: enabled 0
700 09:19:31.458605 Root Device scanning...
701 09:19:31.461867 scan_static_bus for Root Device
702 09:19:31.465088 CPU_CLUSTER: 0 enabled
703 09:19:31.465174 DOMAIN: 0000 enabled
704 09:19:31.468222 DOMAIN: 0000 scanning...
705 09:19:31.471895 PCI: pci_scan_bus for bus 00
706 09:19:31.475114 PCI: 00:00.0 [8086/0000] ops
707 09:19:31.478718 PCI: 00:00.0 [8086/4e22] enabled
708 09:19:31.481697 PCI: 00:02.0 [8086/0000] bus ops
709 09:19:31.485388 PCI: 00:02.0 [8086/4e55] enabled
710 09:19:31.488163 PCI: 00:04.0 [8086/0000] bus ops
711 09:19:31.491817 PCI: 00:04.0 [8086/4e03] enabled
712 09:19:31.494798 PCI: 00:05.0 [8086/0000] bus ops
713 09:19:31.498044 PCI: 00:05.0 [8086/4e19] enabled
714 09:19:31.501904 PCI: 00:08.0 [8086/4e11] enabled
715 09:19:31.505125 PCI: 00:14.0 [8086/0000] bus ops
716 09:19:31.508145 PCI: 00:14.0 [8086/4ded] enabled
717 09:19:31.511921 PCI: 00:14.2 [8086/4def] disabled
718 09:19:31.515040 PCI: 00:14.3 [8086/0000] bus ops
719 09:19:31.518153 PCI: 00:14.3 [8086/4df0] enabled
720 09:19:31.521333 PCI: 00:14.5 [8086/0000] ops
721 09:19:31.525182 PCI: 00:14.5 [8086/4df8] enabled
722 09:19:31.528291 PCI: 00:15.0 [8086/0000] bus ops
723 09:19:31.531484 PCI: 00:15.0 [8086/4de8] enabled
724 09:19:31.535700 PCI: 00:15.1 [8086/0000] bus ops
725 09:19:31.538066 PCI: 00:15.1 [8086/4de9] enabled
726 09:19:31.541531 PCI: 00:15.2 [8086/0000] bus ops
727 09:19:31.544595 PCI: 00:15.2 [8086/4dea] enabled
728 09:19:31.548292 PCI: 00:15.3 [8086/0000] bus ops
729 09:19:31.551222 PCI: 00:15.3 [8086/4deb] enabled
730 09:19:31.554696 PCI: 00:16.0 [8086/0000] ops
731 09:19:31.558389 PCI: 00:16.0 [8086/4de0] enabled
732 09:19:31.561475 PCI: 00:19.0 [8086/0000] bus ops
733 09:19:31.564586 PCI: 00:19.0 [8086/4dc5] enabled
734 09:19:31.568277 PCI: 00:19.2 [8086/0000] ops
735 09:19:31.571579 PCI: 00:19.2 [8086/4dc7] enabled
736 09:19:31.574515 PCI: 00:1a.0 [8086/0000] ops
737 09:19:31.578464 PCI: 00:1a.0 [8086/4dc4] enabled
738 09:19:31.578555 PCI: 00:1e.0 [8086/0000] ops
739 09:19:31.581479 PCI: 00:1e.0 [8086/4da8] disabled
740 09:19:31.585233 PCI: 00:1e.2 [8086/0000] bus ops
741 09:19:31.588139 PCI: 00:1e.2 [8086/4daa] enabled
742 09:19:31.591802 PCI: 00:1f.0 [8086/0000] bus ops
743 09:19:31.595117 PCI: 00:1f.0 [8086/4d87] enabled
744 09:19:31.601587 PCI: Static device PCI: 00:1f.1 not found, disabling it.
745 09:19:31.601722 RTC Init
746 09:19:31.608025 Set power on after power failure.
747 09:19:31.608122 Disabling Deep S3
748 09:19:31.611124 Disabling Deep S3
749 09:19:31.611227 Disabling Deep S4
750 09:19:31.614788 Disabling Deep S4
751 09:19:31.614918 Disabling Deep S5
752 09:19:31.618180 Disabling Deep S5
753 09:19:31.621466 PCI: 00:1f.2 [0000/0000] hidden
754 09:19:31.624491 PCI: 00:1f.3 [8086/0000] bus ops
755 09:19:31.627647 PCI: 00:1f.3 [8086/4dc8] enabled
756 09:19:31.631476 PCI: 00:1f.5 [8086/0000] bus ops
757 09:19:31.634599 PCI: 00:1f.5 [8086/4da4] enabled
758 09:19:31.637718 PCI: Leftover static devices:
759 09:19:31.637824 PCI: 00:12.6
760 09:19:31.641727 PCI: 00:09.0
761 09:19:31.641823 PCI: 00:14.1
762 09:19:31.641904 PCI: 00:16.1
763 09:19:31.644816 PCI: 00:16.4
764 09:19:31.644912 PCI: 00:16.5
765 09:19:31.647529 PCI: 00:17.0
766 09:19:31.647625 PCI: 00:19.1
767 09:19:31.651477 PCI: 00:1e.1
768 09:19:31.651578 PCI: 00:1e.3
769 09:19:31.651656 PCI: 00:1f.1
770 09:19:31.654400 PCI: 00:1f.4
771 09:19:31.654496 PCI: 00:1f.7
772 09:19:31.657977 PCI: Check your devicetree.cb.
773 09:19:31.660986 PCI: 00:02.0 scanning...
774 09:19:31.664300 scan_generic_bus for PCI: 00:02.0
775 09:19:31.667971 scan_generic_bus for PCI: 00:02.0 done
776 09:19:31.674575 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
777 09:19:31.674686 PCI: 00:04.0 scanning...
778 09:19:31.677246 scan_generic_bus for PCI: 00:04.0
779 09:19:31.680989 GENERIC: 0.0 enabled
780 09:19:31.687950 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
781 09:19:31.691013 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
782 09:19:31.694693 PCI: 00:05.0 scanning...
783 09:19:31.697521 scan_generic_bus for PCI: 00:05.0
784 09:19:31.700591 GENERIC: 0.0 enabled
785 09:19:31.707670 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
786 09:19:31.710939 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
787 09:19:31.713913 PCI: 00:14.0 scanning...
788 09:19:31.717299 scan_static_bus for PCI: 00:14.0
789 09:19:31.720293 USB0 port 0 enabled
790 09:19:31.720410 USB0 port 0 scanning...
791 09:19:31.724203 scan_static_bus for USB0 port 0
792 09:19:31.727379 USB2 port 0 enabled
793 09:19:31.730444 USB2 port 1 enabled
794 09:19:31.730564 USB2 port 2 enabled
795 09:19:31.733765 USB2 port 3 enabled
796 09:19:31.733880 USB2 port 4 disabled
797 09:19:31.736911 USB2 port 5 enabled
798 09:19:31.740126 USB2 port 6 disabled
799 09:19:31.740235 USB2 port 7 enabled
800 09:19:31.743934 USB3 port 0 enabled
801 09:19:31.747185 USB3 port 1 enabled
802 09:19:31.747265 USB3 port 2 enabled
803 09:19:31.750220 USB3 port 3 enabled
804 09:19:31.753775 USB2 port 0 scanning...
805 09:19:31.756961 scan_static_bus for USB2 port 0
806 09:19:31.760500 scan_static_bus for USB2 port 0 done
807 09:19:31.763394 scan_bus: bus USB2 port 0 finished in 6 msecs
808 09:19:31.766898 USB2 port 1 scanning...
809 09:19:31.769995 scan_static_bus for USB2 port 1
810 09:19:31.773631 scan_static_bus for USB2 port 1 done
811 09:19:31.776591 scan_bus: bus USB2 port 1 finished in 6 msecs
812 09:19:31.780018 USB2 port 2 scanning...
813 09:19:31.783770 scan_static_bus for USB2 port 2
814 09:19:31.787109 scan_static_bus for USB2 port 2 done
815 09:19:31.793884 scan_bus: bus USB2 port 2 finished in 6 msecs
816 09:19:31.794008 USB2 port 3 scanning...
817 09:19:31.797007 scan_static_bus for USB2 port 3
818 09:19:31.799931 scan_static_bus for USB2 port 3 done
819 09:19:31.806684 scan_bus: bus USB2 port 3 finished in 6 msecs
820 09:19:31.806823 USB2 port 5 scanning...
821 09:19:31.810128 scan_static_bus for USB2 port 5
822 09:19:31.816875 scan_static_bus for USB2 port 5 done
823 09:19:31.819998 scan_bus: bus USB2 port 5 finished in 6 msecs
824 09:19:31.823319 USB2 port 7 scanning...
825 09:19:31.827201 scan_static_bus for USB2 port 7
826 09:19:31.830266 scan_static_bus for USB2 port 7 done
827 09:19:31.833401 scan_bus: bus USB2 port 7 finished in 6 msecs
828 09:19:31.836662 USB3 port 0 scanning...
829 09:19:31.840463 scan_static_bus for USB3 port 0
830 09:19:31.843408 scan_static_bus for USB3 port 0 done
831 09:19:31.846591 scan_bus: bus USB3 port 0 finished in 6 msecs
832 09:19:31.850490 USB3 port 1 scanning...
833 09:19:31.853476 scan_static_bus for USB3 port 1
834 09:19:31.856900 scan_static_bus for USB3 port 1 done
835 09:19:31.863582 scan_bus: bus USB3 port 1 finished in 6 msecs
836 09:19:31.863724 USB3 port 2 scanning...
837 09:19:31.866530 scan_static_bus for USB3 port 2
838 09:19:31.873420 scan_static_bus for USB3 port 2 done
839 09:19:31.876816 scan_bus: bus USB3 port 2 finished in 6 msecs
840 09:19:31.879831 USB3 port 3 scanning...
841 09:19:31.883316 scan_static_bus for USB3 port 3
842 09:19:31.886711 scan_static_bus for USB3 port 3 done
843 09:19:31.890155 scan_bus: bus USB3 port 3 finished in 6 msecs
844 09:19:31.893399 scan_static_bus for USB0 port 0 done
845 09:19:31.900009 scan_bus: bus USB0 port 0 finished in 172 msecs
846 09:19:31.903404 scan_static_bus for PCI: 00:14.0 done
847 09:19:31.906477 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
848 09:19:31.910118 PCI: 00:14.3 scanning...
849 09:19:31.913147 scan_static_bus for PCI: 00:14.3
850 09:19:31.916600 GENERIC: 0.0 enabled
851 09:19:31.919645 scan_static_bus for PCI: 00:14.3 done
852 09:19:31.923221 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
853 09:19:31.926332 PCI: 00:15.0 scanning...
854 09:19:31.929933 scan_static_bus for PCI: 00:15.0
855 09:19:31.933018 I2C: 00:2c enabled
856 09:19:31.933141 I2C: 00:15 enabled
857 09:19:31.939461 scan_static_bus for PCI: 00:15.0 done
858 09:19:31.943006 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
859 09:19:31.946393 PCI: 00:15.1 scanning...
860 09:19:31.949507 scan_static_bus for PCI: 00:15.1
861 09:19:31.952740 scan_static_bus for PCI: 00:15.1 done
862 09:19:31.956537 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
863 09:19:31.959648 PCI: 00:15.2 scanning...
864 09:19:31.962871 scan_static_bus for PCI: 00:15.2
865 09:19:31.966012 GENERIC: 0.0 disabled
866 09:19:31.966150 I2C: 00:15 enabled
867 09:19:31.969781 I2C: 00:10 disabled
868 09:19:31.972910 I2C: 00:10 disabled
869 09:19:31.973046 I2C: 00:2c enabled
870 09:19:31.975968 I2C: 00:40 enabled
871 09:19:31.976094 I2C: 00:10 enabled
872 09:19:31.980373 I2C: 00:39 enabled
873 09:19:31.983938 scan_static_bus for PCI: 00:15.2 done
874 09:19:31.987402 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
875 09:19:31.991307 PCI: 00:15.3 scanning...
876 09:19:31.994661 scan_static_bus for PCI: 00:15.3
877 09:19:31.994791 I2C: 00:36 enabled
878 09:19:31.998309 I2C: 00:10 disabled
879 09:19:32.001535 I2C: 00:0c enabled
880 09:19:32.001676 I2C: 00:50 enabled
881 09:19:32.004577 scan_static_bus for PCI: 00:15.3 done
882 09:19:32.011466 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
883 09:19:32.011600 PCI: 00:19.0 scanning...
884 09:19:32.015016 scan_static_bus for PCI: 00:19.0
885 09:19:32.018049 I2C: 00:1a enabled
886 09:19:32.021516 I2C: 00:1a disabled
887 09:19:32.021642 I2C: 00:1a disabled
888 09:19:32.025257 I2C: 00:28 enabled
889 09:19:32.025373 I2C: 00:29 enabled
890 09:19:32.031489 scan_static_bus for PCI: 00:19.0 done
891 09:19:32.034606 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
892 09:19:32.038216 PCI: 00:1e.2 scanning...
893 09:19:32.041420 scan_generic_bus for PCI: 00:1e.2
894 09:19:32.041538 SPI: 00 enabled
895 09:19:32.048226 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
896 09:19:32.054562 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
897 09:19:32.054651 PCI: 00:1f.0 scanning...
898 09:19:32.057850 scan_static_bus for PCI: 00:1f.0
899 09:19:32.061642 PNP: 0c09.0 enabled
900 09:19:32.064690 PNP: 0c09.0 scanning...
901 09:19:32.068589 scan_static_bus for PNP: 0c09.0
902 09:19:32.071607 scan_static_bus for PNP: 0c09.0 done
903 09:19:32.074911 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
904 09:19:32.081027 scan_static_bus for PCI: 00:1f.0 done
905 09:19:32.084740 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
906 09:19:32.087695 PCI: 00:1f.3 scanning...
907 09:19:32.091049 scan_static_bus for PCI: 00:1f.3
908 09:19:32.091168 GENERIC: 0.0 disabled
909 09:19:32.097856 scan_static_bus for PCI: 00:1f.3 done
910 09:19:32.100968 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
911 09:19:32.104598 PCI: 00:1f.5 scanning...
912 09:19:32.107462 scan_generic_bus for PCI: 00:1f.5
913 09:19:32.111326 scan_generic_bus for PCI: 00:1f.5 done
914 09:19:32.114391 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
915 09:19:32.121126 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
916 09:19:32.124659 scan_static_bus for Root Device done
917 09:19:32.127780 scan_bus: bus Root Device finished in 665 msecs
918 09:19:32.131067 done
919 09:19:32.134668 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1085 ms
920 09:19:32.138318 Chrome EC: UHEPI supported
921 09:19:32.144979 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
922 09:19:32.151450 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
923 09:19:32.154700 SPI flash protection: WPSW=1 SRP0=1
924 09:19:32.161696 fast_spi_flash_protect: FPR 0 is enabled for range 0x00bca000-0x00bf9fff
925 09:19:32.167922 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
926 09:19:32.174847 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 31 ms
927 09:19:32.174982 found VGA at PCI: 00:02.0
928 09:19:32.178095 Setting up VGA for PCI: 00:02.0
929 09:19:32.184392 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
930 09:19:32.188050 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
931 09:19:32.191111 Allocating resources...
932 09:19:32.194553 Reading resources...
933 09:19:32.198141 Root Device read_resources bus 0 link: 0
934 09:19:32.201136 CPU_CLUSTER: 0 read_resources bus 0 link: 0
935 09:19:32.208358 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
936 09:19:32.211325 DOMAIN: 0000 read_resources bus 0 link: 0
937 09:19:32.218123 PCI: 00:04.0 read_resources bus 1 link: 0
938 09:19:32.221163 PCI: 00:04.0 read_resources bus 1 link: 0 done
939 09:19:32.227869 PCI: 00:05.0 read_resources bus 2 link: 0
940 09:19:32.231559 PCI: 00:05.0 read_resources bus 2 link: 0 done
941 09:19:32.234525 PCI: 00:14.0 read_resources bus 0 link: 0
942 09:19:32.241580 USB0 port 0 read_resources bus 0 link: 0
943 09:19:32.247907 USB0 port 0 read_resources bus 0 link: 0 done
944 09:19:32.251156 PCI: 00:14.0 read_resources bus 0 link: 0 done
945 09:19:32.257947 PCI: 00:14.3 read_resources bus 0 link: 0
946 09:19:32.313962 PCI: 00:14.3 read_resources bus 0 link: 0 done
947 09:19:32.314135 PCI: 00:15.0 read_resources bus 0 link: 0
948 09:19:32.314408 PCI: 00:15.0 read_resources bus 0 link: 0 done
949 09:19:32.314499 PCI: 00:15.2 read_resources bus 0 link: 0
950 09:19:32.314762 PCI: 00:15.2 read_resources bus 0 link: 0 done
951 09:19:32.314887 PCI: 00:15.3 read_resources bus 0 link: 0
952 09:19:32.315006 PCI: 00:15.3 read_resources bus 0 link: 0 done
953 09:19:32.315124 PCI: 00:19.0 read_resources bus 0 link: 0
954 09:19:32.315228 PCI: 00:19.0 read_resources bus 0 link: 0 done
955 09:19:32.315342 PCI: 00:1e.2 read_resources bus 3 link: 0
956 09:19:32.315629 PCI: 00:1e.2 read_resources bus 3 link: 0 done
957 09:19:32.349825 PCI: 00:1f.0 read_resources bus 0 link: 0
958 09:19:32.349987 PCI: 00:1f.0 read_resources bus 0 link: 0 done
959 09:19:32.350261 PCI: 00:1f.3 read_resources bus 0 link: 0
960 09:19:32.350378 PCI: 00:1f.3 read_resources bus 0 link: 0 done
961 09:19:32.350479 DOMAIN: 0000 read_resources bus 0 link: 0 done
962 09:19:32.350564 Root Device read_resources bus 0 link: 0 done
963 09:19:32.350648 Done reading resources.
964 09:19:32.353367 Show resources in subtree (Root Device)...After reading.
965 09:19:32.353455 Root Device child on link 0 CPU_CLUSTER: 0
966 09:19:32.357032 CPU_CLUSTER: 0 child on link 0 APIC: 00
967 09:19:32.357154 APIC: 00
968 09:19:32.360176 APIC: 02
969 09:19:32.363487 DOMAIN: 0000 child on link 0 PCI: 00:00.0
970 09:19:32.373716 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
971 09:19:32.383445 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
972 09:19:32.383562 PCI: 00:00.0
973 09:19:32.393577 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
974 09:19:32.403475 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
975 09:19:32.413384 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
976 09:19:32.423564 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
977 09:19:32.430303 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
978 09:19:32.440224 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
979 09:19:32.449751 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
980 09:19:32.460671 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
981 09:19:32.469908 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
982 09:19:32.479528 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
983 09:19:32.486275 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
984 09:19:32.496315 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
985 09:19:32.506606 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
986 09:19:32.516494 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
987 09:19:32.522803 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
988 09:19:32.532642 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
989 09:19:32.542753 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
990 09:19:32.553147 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
991 09:19:32.562907 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
992 09:19:32.563056 PCI: 00:02.0
993 09:19:32.572904 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
994 09:19:32.585983 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
995 09:19:32.592249 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
996 09:19:32.599261 PCI: 00:04.0 child on link 0 GENERIC: 0.0
997 09:19:32.609213 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
998 09:19:32.609324 GENERIC: 0.0
999 09:19:32.612311 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1000 09:19:32.622611 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1001 09:19:32.625697 GENERIC: 0.0
1002 09:19:32.629126 PCI: 00:08.0
1003 09:19:32.635873 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1004 09:19:32.642199 PCI: 00:14.0 child on link 0 USB0 port 0
1005 09:19:32.652093 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1006 09:19:32.655836 USB0 port 0 child on link 0 USB2 port 0
1007 09:19:32.658887 USB2 port 0
1008 09:19:32.658984 USB2 port 1
1009 09:19:32.663179 USB2 port 2
1010 09:19:32.663277 USB2 port 3
1011 09:19:32.666916 USB2 port 4
1012 09:19:32.667014 USB2 port 5
1013 09:19:32.670508 USB2 port 6
1014 09:19:32.670605 USB2 port 7
1015 09:19:32.673477 USB3 port 0
1016 09:19:32.673610 USB3 port 1
1017 09:19:32.676592 USB3 port 2
1018 09:19:32.676718 USB3 port 3
1019 09:19:32.680150 PCI: 00:14.2
1020 09:19:32.683170 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1021 09:19:32.693332 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1022 09:19:32.696490 GENERIC: 0.0
1023 09:19:32.696589 PCI: 00:14.5
1024 09:19:32.706575 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 09:19:32.709861 PCI: 00:15.0 child on link 0 I2C: 00:2c
1026 09:19:32.719750 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1027 09:19:32.722918 I2C: 00:2c
1028 09:19:32.723052 I2C: 00:15
1029 09:19:32.726141 PCI: 00:15.1
1030 09:19:32.736497 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1031 09:19:32.739514 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1032 09:19:32.749527 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1033 09:19:32.752762 GENERIC: 0.0
1034 09:19:32.752864 I2C: 00:15
1035 09:19:32.756301 I2C: 00:10
1036 09:19:32.756425 I2C: 00:10
1037 09:19:32.759553 I2C: 00:2c
1038 09:19:32.759651 I2C: 00:40
1039 09:19:32.759727 I2C: 00:10
1040 09:19:32.762735 I2C: 00:39
1041 09:19:32.766569 PCI: 00:15.3 child on link 0 I2C: 00:36
1042 09:19:32.776020 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1043 09:19:32.779463 I2C: 00:36
1044 09:19:32.779592 I2C: 00:10
1045 09:19:32.782966 I2C: 00:0c
1046 09:19:32.783062 I2C: 00:50
1047 09:19:32.785922 PCI: 00:16.0
1048 09:19:32.796297 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1049 09:19:32.799715 PCI: 00:19.0 child on link 0 I2C: 00:1a
1050 09:19:32.809176 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1051 09:19:32.809280 I2C: 00:1a
1052 09:19:32.812917 I2C: 00:1a
1053 09:19:32.813013 I2C: 00:1a
1054 09:19:32.815914 I2C: 00:28
1055 09:19:32.816011 I2C: 00:29
1056 09:19:32.819505 PCI: 00:19.2
1057 09:19:32.829005 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1058 09:19:32.839138 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1059 09:19:32.842780 PCI: 00:1a.0
1060 09:19:32.852109 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1061 09:19:32.852216 PCI: 00:1e.0
1062 09:19:32.855922 PCI: 00:1e.2 child on link 0 SPI: 00
1063 09:19:32.865490 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1064 09:19:32.868595 SPI: 00
1065 09:19:32.872474 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1066 09:19:32.881971 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1067 09:19:32.882121 PNP: 0c09.0
1068 09:19:32.891703 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1069 09:19:32.891851 PCI: 00:1f.2
1070 09:19:32.902029 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1071 09:19:32.911725 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1072 09:19:32.915544 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1073 09:19:32.924866 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1074 09:19:32.935139 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1075 09:19:32.938722 GENERIC: 0.0
1076 09:19:32.938822 PCI: 00:1f.5
1077 09:19:32.948186 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1078 09:19:32.954785 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1079 09:19:32.964682 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1080 09:19:32.967730 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1081 09:19:32.977856 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1082 09:19:32.984918 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1083 09:19:32.991387 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1084 09:19:32.994862 DOMAIN: 0000: Resource ranges:
1085 09:19:32.997989 * Base: 1000, Size: 800, Tag: 100
1086 09:19:33.001521 * Base: 1900, Size: e700, Tag: 100
1087 09:19:33.007751 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1088 09:19:33.014770 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1089 09:19:33.021076 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1090 09:19:33.027855 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1091 09:19:33.038065 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1092 09:19:33.044315 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1093 09:19:33.050751 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1094 09:19:33.061100 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1095 09:19:33.067637 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1096 09:19:33.073900 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1097 09:19:33.084063 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1098 09:19:33.090804 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1099 09:19:33.096995 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1100 09:19:33.106975 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1101 09:19:33.113763 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1102 09:19:33.120550 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1103 09:19:33.130715 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1104 09:19:33.136843 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1105 09:19:33.143369 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1106 09:19:33.153770 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1107 09:19:33.160465 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1108 09:19:33.167140 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1109 09:19:33.176897 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1110 09:19:33.183191 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1111 09:19:33.186431 DOMAIN: 0000: Resource ranges:
1112 09:19:33.190083 * Base: 7fc00000, Size: 40400000, Tag: 200
1113 09:19:33.196553 * Base: d0000000, Size: 2b000000, Tag: 200
1114 09:19:33.200253 * Base: fb001000, Size: 2fff000, Tag: 200
1115 09:19:33.203071 * Base: fe010000, Size: 22000, Tag: 200
1116 09:19:33.206695 * Base: fe033000, Size: a4d000, Tag: 200
1117 09:19:33.213233 * Base: fea88000, Size: 2f8000, Tag: 200
1118 09:19:33.216337 * Base: fed88000, Size: 8000, Tag: 200
1119 09:19:33.219736 * Base: fed93000, Size: d000, Tag: 200
1120 09:19:33.222862 * Base: feda2000, Size: 125e000, Tag: 200
1121 09:19:33.230029 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1122 09:19:33.236530 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1123 09:19:33.243513 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1124 09:19:33.250653 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1125 09:19:33.257395 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1126 09:19:33.263816 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1127 09:19:33.270644 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1128 09:19:33.277117 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1129 09:19:33.283583 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1130 09:19:33.290131 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1131 09:19:33.296346 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1132 09:19:33.303222 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1133 09:19:33.310105 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1134 09:19:33.316323 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1135 09:19:33.322982 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1136 09:19:33.329814 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1137 09:19:33.336300 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1138 09:19:33.343152 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1139 09:19:33.350126 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1140 09:19:33.356358 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1141 09:19:33.363126 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1142 09:19:33.369648 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1143 09:19:33.376507 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1144 09:19:33.379277 Root Device assign_resources, bus 0 link: 0
1145 09:19:33.386348 DOMAIN: 0000 assign_resources, bus 0 link: 0
1146 09:19:33.392597 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1147 09:19:33.402738 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1148 09:19:33.409709 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1149 09:19:33.416074 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1150 09:19:33.422652 PCI: 00:04.0 assign_resources, bus 1 link: 0
1151 09:19:33.425806 PCI: 00:04.0 assign_resources, bus 1 link: 0
1152 09:19:33.435954 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1153 09:19:33.439235 PCI: 00:05.0 assign_resources, bus 2 link: 0
1154 09:19:33.442552 PCI: 00:05.0 assign_resources, bus 2 link: 0
1155 09:19:33.452812 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1156 09:19:33.459140 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1157 09:19:33.465990 PCI: 00:14.0 assign_resources, bus 0 link: 0
1158 09:19:33.469075 PCI: 00:14.0 assign_resources, bus 0 link: 0
1159 09:19:33.479203 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1160 09:19:33.482375 PCI: 00:14.3 assign_resources, bus 0 link: 0
1161 09:19:33.485772 PCI: 00:14.3 assign_resources, bus 0 link: 0
1162 09:19:33.495516 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1163 09:19:33.502365 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1164 09:19:33.508606 PCI: 00:15.0 assign_resources, bus 0 link: 0
1165 09:19:33.512044 PCI: 00:15.0 assign_resources, bus 0 link: 0
1166 09:19:33.518869 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1167 09:19:33.529279 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1168 09:19:33.532213 PCI: 00:15.2 assign_resources, bus 0 link: 0
1169 09:19:33.539267 PCI: 00:15.2 assign_resources, bus 0 link: 0
1170 09:19:33.545335 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1171 09:19:33.549109 PCI: 00:15.3 assign_resources, bus 0 link: 0
1172 09:19:33.555607 PCI: 00:15.3 assign_resources, bus 0 link: 0
1173 09:19:33.561863 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1174 09:19:33.572214 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1175 09:19:33.575099 PCI: 00:19.0 assign_resources, bus 0 link: 0
1176 09:19:33.578733 PCI: 00:19.0 assign_resources, bus 0 link: 0
1177 09:19:33.588885 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1178 09:19:33.595684 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1179 09:19:33.605724 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1180 09:19:33.608865 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1181 09:19:33.615218 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1182 09:19:33.619016 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1183 09:19:33.622128 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1184 09:19:33.629037 LPC: Trying to open IO window from 800 size 1ff
1185 09:19:33.635059 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1186 09:19:33.645159 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1187 09:19:33.648778 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1188 09:19:33.655465 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1189 09:19:33.662002 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1190 09:19:33.665016 DOMAIN: 0000 assign_resources, bus 0 link: 0
1191 09:19:33.671459 Root Device assign_resources, bus 0 link: 0
1192 09:19:33.671589 Done setting resources.
1193 09:19:33.678300 Show resources in subtree (Root Device)...After assigning values.
1194 09:19:33.684730 Root Device child on link 0 CPU_CLUSTER: 0
1195 09:19:33.688554 CPU_CLUSTER: 0 child on link 0 APIC: 00
1196 09:19:33.688679 APIC: 00
1197 09:19:33.691817 APIC: 02
1198 09:19:33.695046 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1199 09:19:33.705023 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1200 09:19:33.715342 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1201 09:19:33.715465 PCI: 00:00.0
1202 09:19:33.724945 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1203 09:19:33.735030 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1204 09:19:33.745063 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1205 09:19:33.754791 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1206 09:19:33.761236 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1207 09:19:33.771430 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1208 09:19:33.781717 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1209 09:19:33.791291 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1210 09:19:33.801455 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1211 09:19:33.811358 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1212 09:19:33.817878 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1213 09:19:33.827536 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1214 09:19:33.837653 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1215 09:19:33.847566 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1216 09:19:33.854202 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1217 09:19:33.864445 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1218 09:19:33.874348 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1219 09:19:33.884489 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1220 09:19:33.894504 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1221 09:19:33.894626 PCI: 00:02.0
1222 09:19:33.904611 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1223 09:19:33.917645 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1224 09:19:33.924205 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1225 09:19:33.931050 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1226 09:19:33.941174 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1227 09:19:33.941287 GENERIC: 0.0
1228 09:19:33.947815 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1229 09:19:33.958027 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1230 09:19:33.958144 GENERIC: 0.0
1231 09:19:33.961133 PCI: 00:08.0
1232 09:19:33.971123 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1233 09:19:33.974367 PCI: 00:14.0 child on link 0 USB0 port 0
1234 09:19:33.987496 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1235 09:19:33.990815 USB0 port 0 child on link 0 USB2 port 0
1236 09:19:33.990913 USB2 port 0
1237 09:19:33.993949 USB2 port 1
1238 09:19:33.994044 USB2 port 2
1239 09:19:33.997558 USB2 port 3
1240 09:19:34.000653 USB2 port 4
1241 09:19:34.000747 USB2 port 5
1242 09:19:34.004380 USB2 port 6
1243 09:19:34.004477 USB2 port 7
1244 09:19:34.007698 USB3 port 0
1245 09:19:34.007823 USB3 port 1
1246 09:19:34.010660 USB3 port 2
1247 09:19:34.010761 USB3 port 3
1248 09:19:34.014090 PCI: 00:14.2
1249 09:19:34.017545 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1250 09:19:34.027873 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1251 09:19:34.030680 GENERIC: 0.0
1252 09:19:34.030790 PCI: 00:14.5
1253 09:19:34.040384 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1254 09:19:34.047358 PCI: 00:15.0 child on link 0 I2C: 00:2c
1255 09:19:34.057186 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1256 09:19:34.057289 I2C: 00:2c
1257 09:19:34.060601 I2C: 00:15
1258 09:19:34.060696 PCI: 00:15.1
1259 09:19:34.070344 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1260 09:19:34.076944 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1261 09:19:34.086788 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1262 09:19:34.086888 GENERIC: 0.0
1263 09:19:34.090494 I2C: 00:15
1264 09:19:34.090589 I2C: 00:10
1265 09:19:34.093766 I2C: 00:10
1266 09:19:34.093861 I2C: 00:2c
1267 09:19:34.096842 I2C: 00:40
1268 09:19:34.096935 I2C: 00:10
1269 09:19:34.099976 I2C: 00:39
1270 09:19:34.103100 PCI: 00:15.3 child on link 0 I2C: 00:36
1271 09:19:34.113504 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1272 09:19:34.113635 I2C: 00:36
1273 09:19:34.117137 I2C: 00:10
1274 09:19:34.117233 I2C: 00:0c
1275 09:19:34.119936 I2C: 00:50
1276 09:19:34.120030 PCI: 00:16.0
1277 09:19:34.130009 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1278 09:19:34.136366 PCI: 00:19.0 child on link 0 I2C: 00:1a
1279 09:19:34.146561 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1280 09:19:34.146670 I2C: 00:1a
1281 09:19:34.149803 I2C: 00:1a
1282 09:19:34.149903 I2C: 00:1a
1283 09:19:34.153465 I2C: 00:28
1284 09:19:34.153601 I2C: 00:29
1285 09:19:34.156434 PCI: 00:19.2
1286 09:19:34.166618 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1287 09:19:34.176048 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1288 09:19:34.179496 PCI: 00:1a.0
1289 09:19:34.189556 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1290 09:19:34.189677 PCI: 00:1e.0
1291 09:19:34.196348 PCI: 00:1e.2 child on link 0 SPI: 00
1292 09:19:34.206005 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1293 09:19:34.206105 SPI: 00
1294 09:19:34.209613 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1295 09:19:34.219558 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1296 09:19:34.219689 PNP: 0c09.0
1297 09:19:34.229456 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1298 09:19:34.232538 PCI: 00:1f.2
1299 09:19:34.242215 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1300 09:19:34.248615 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1301 09:19:34.255268 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1302 09:19:34.265769 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1303 09:19:34.275308 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1304 09:19:34.275449 GENERIC: 0.0
1305 09:19:34.278495 PCI: 00:1f.5
1306 09:19:34.289054 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1307 09:19:34.291821 Done allocating resources.
1308 09:19:34.298539 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2098 ms
1309 09:19:34.301821 Enabling resources...
1310 09:19:34.304991 PCI: 00:00.0 subsystem <- 8086/4e22
1311 09:19:34.305094 PCI: 00:00.0 cmd <- 06
1312 09:19:34.311796 PCI: 00:02.0 subsystem <- 8086/4e55
1313 09:19:34.311894 PCI: 00:02.0 cmd <- 03
1314 09:19:34.315070 PCI: 00:04.0 subsystem <- 8086/4e03
1315 09:19:34.318544 PCI: 00:04.0 cmd <- 02
1316 09:19:34.322357 PCI: 00:05.0 bridge ctrl <- 0003
1317 09:19:34.325457 PCI: 00:05.0 subsystem <- 8086/4e19
1318 09:19:34.328621 PCI: 00:05.0 cmd <- 02
1319 09:19:34.331955 PCI: 00:08.0 cmd <- 06
1320 09:19:34.335670 PCI: 00:14.0 subsystem <- 8086/4ded
1321 09:19:34.338514 PCI: 00:14.0 cmd <- 02
1322 09:19:34.342296 PCI: 00:14.3 subsystem <- 8086/4df0
1323 09:19:34.342390 PCI: 00:14.3 cmd <- 02
1324 09:19:34.348780 PCI: 00:14.5 subsystem <- 8086/4df8
1325 09:19:34.348905 PCI: 00:14.5 cmd <- 06
1326 09:19:34.351720 PCI: 00:15.0 subsystem <- 8086/4de8
1327 09:19:34.355217 PCI: 00:15.0 cmd <- 02
1328 09:19:34.358619 PCI: 00:15.1 subsystem <- 8086/4de9
1329 09:19:34.361633 PCI: 00:15.1 cmd <- 02
1330 09:19:34.365234 PCI: 00:15.2 subsystem <- 8086/4dea
1331 09:19:34.369088 PCI: 00:15.2 cmd <- 02
1332 09:19:34.372267 PCI: 00:15.3 subsystem <- 8086/4deb
1333 09:19:34.375241 PCI: 00:15.3 cmd <- 02
1334 09:19:34.378443 PCI: 00:16.0 subsystem <- 8086/4de0
1335 09:19:34.378529 PCI: 00:16.0 cmd <- 02
1336 09:19:34.385416 PCI: 00:19.0 subsystem <- 8086/4dc5
1337 09:19:34.385504 PCI: 00:19.0 cmd <- 02
1338 09:19:34.389032 PCI: 00:19.2 subsystem <- 8086/4dc7
1339 09:19:34.392231 PCI: 00:19.2 cmd <- 06
1340 09:19:34.395285 PCI: 00:1a.0 subsystem <- 8086/4dc4
1341 09:19:34.398987 PCI: 00:1a.0 cmd <- 06
1342 09:19:34.402471 PCI: 00:1e.2 subsystem <- 8086/4daa
1343 09:19:34.405497 PCI: 00:1e.2 cmd <- 06
1344 09:19:34.408758 PCI: 00:1f.0 subsystem <- 8086/4d87
1345 09:19:34.412122 PCI: 00:1f.0 cmd <- 407
1346 09:19:34.415087 PCI: 00:1f.3 subsystem <- 8086/4dc8
1347 09:19:34.418862 PCI: 00:1f.3 cmd <- 02
1348 09:19:34.422018 PCI: 00:1f.5 subsystem <- 8086/4da4
1349 09:19:34.422140 PCI: 00:1f.5 cmd <- 406
1350 09:19:34.427544 done.
1351 09:19:34.431222 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1352 09:19:34.434386 Initializing devices...
1353 09:19:34.437494 Root Device init
1354 09:19:34.437625 mainboard: EC init
1355 09:19:34.444246 Chrome EC: Set SMI mask to 0x0000000000000000
1356 09:19:34.450897 Chrome EC: clear events_b mask to 0x0000000000000000
1357 09:19:34.454613 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1358 09:19:34.460914 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1359 09:19:34.467550 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1360 09:19:34.470818 Chrome EC: Set WAKE mask to 0x0000000000000000
1361 09:19:34.478514 Root Device init finished in 36 msecs
1362 09:19:34.481744 PCI: 00:00.0 init
1363 09:19:34.481865 CPU TDP = 6 Watts
1364 09:19:34.484834 CPU PL1 = 7 Watts
1365 09:19:34.488813 CPU PL2 = 12 Watts
1366 09:19:34.491816 PCI: 00:00.0 init finished in 6 msecs
1367 09:19:34.491912 PCI: 00:02.0 init
1368 09:19:34.495102 GMA: Found VBT in CBFS
1369 09:19:34.498520 GMA: Found valid VBT in CBFS
1370 09:19:34.505472 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1371 09:19:34.511912 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1372 09:19:34.515093 PCI: 00:02.0 init finished in 18 msecs
1373 09:19:34.518274 PCI: 00:08.0 init
1374 09:19:34.522022 PCI: 00:08.0 init finished in 0 msecs
1375 09:19:34.524986 PCI: 00:14.0 init
1376 09:19:34.528448 XHCI: Updated LFPS sampling OFF time to 9 ms
1377 09:19:34.531688 PCI: 00:14.0 init finished in 4 msecs
1378 09:19:34.535242 PCI: 00:15.0 init
1379 09:19:34.538414 I2C bus 0 version 0x3230302a
1380 09:19:34.541696 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1381 09:19:34.544798 PCI: 00:15.0 init finished in 6 msecs
1382 09:19:34.548578 PCI: 00:15.1 init
1383 09:19:34.551636 I2C bus 1 version 0x3230302a
1384 09:19:34.555212 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1385 09:19:34.558112 PCI: 00:15.1 init finished in 6 msecs
1386 09:19:34.561816 PCI: 00:15.2 init
1387 09:19:34.561912 I2C bus 2 version 0x3230302a
1388 09:19:34.568404 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1389 09:19:34.571301 PCI: 00:15.2 init finished in 6 msecs
1390 09:19:34.571397 PCI: 00:15.3 init
1391 09:19:34.574811 I2C bus 3 version 0x3230302a
1392 09:19:34.578425 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1393 09:19:34.581604 PCI: 00:15.3 init finished in 6 msecs
1394 09:19:34.584861 PCI: 00:16.0 init
1395 09:19:34.587993 PCI: 00:16.0 init finished in 0 msecs
1396 09:19:34.591949 PCI: 00:19.0 init
1397 09:19:34.595030 I2C bus 4 version 0x3230302a
1398 09:19:34.598205 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1399 09:19:34.601473 PCI: 00:19.0 init finished in 6 msecs
1400 09:19:34.605041 PCI: 00:1a.0 init
1401 09:19:34.608425 PCI: 00:1a.0 init finished in 0 msecs
1402 09:19:34.611391 PCI: 00:1f.0 init
1403 09:19:34.615073 IOAPIC: Initializing IOAPIC at 0xfec00000
1404 09:19:34.617966 IOAPIC: Bootstrap Processor Local APIC = 0x00
1405 09:19:34.621731 IOAPIC: ID = 0x02
1406 09:19:34.624967 IOAPIC: Dumping registers
1407 09:19:34.625062 reg 0x0000: 0x02000000
1408 09:19:34.628243 reg 0x0001: 0x00770020
1409 09:19:34.631406 reg 0x0002: 0x00000000
1410 09:19:34.634959 PCI: 00:1f.0 init finished in 21 msecs
1411 09:19:34.638087 PCI: 00:1f.2 init
1412 09:19:34.638182 Disabling ACPI via APMC.
1413 09:19:34.644419 APMC done.
1414 09:19:34.647760 PCI: 00:1f.2 init finished in 6 msecs
1415 09:19:34.658755 PNP: 0c09.0 init
1416 09:19:34.662357 Google Chrome EC uptime: 6.528 seconds
1417 09:19:34.669155 Google Chrome AP resets since EC boot: 0
1418 09:19:34.672306 Google Chrome most recent AP reset causes:
1419 09:19:34.678908 Google Chrome EC reset flags at last EC boot: reset-pin
1420 09:19:34.681980 PNP: 0c09.0 init finished in 18 msecs
1421 09:19:34.685661 Devices initialized
1422 09:19:34.685748 Show all devs... After init.
1423 09:19:34.688772 Root Device: enabled 1
1424 09:19:34.691819 CPU_CLUSTER: 0: enabled 1
1425 09:19:34.695711 DOMAIN: 0000: enabled 1
1426 09:19:34.695835 PCI: 00:00.0: enabled 1
1427 09:19:34.698745 PCI: 00:02.0: enabled 1
1428 09:19:34.701817 PCI: 00:04.0: enabled 1
1429 09:19:34.705095 PCI: 00:05.0: enabled 1
1430 09:19:34.705217 PCI: 00:09.0: enabled 0
1431 09:19:34.708923 PCI: 00:12.6: enabled 0
1432 09:19:34.711624 PCI: 00:14.0: enabled 1
1433 09:19:34.715473 PCI: 00:14.1: enabled 0
1434 09:19:34.715585 PCI: 00:14.2: enabled 0
1435 09:19:34.718721 PCI: 00:14.3: enabled 1
1436 09:19:34.721715 PCI: 00:14.5: enabled 1
1437 09:19:34.721809 PCI: 00:15.0: enabled 1
1438 09:19:34.725380 PCI: 00:15.1: enabled 1
1439 09:19:34.728871 PCI: 00:15.2: enabled 1
1440 09:19:34.731893 PCI: 00:15.3: enabled 1
1441 09:19:34.732015 PCI: 00:16.0: enabled 1
1442 09:19:34.735030 PCI: 00:16.1: enabled 0
1443 09:19:34.738551 PCI: 00:16.4: enabled 0
1444 09:19:34.742205 PCI: 00:16.5: enabled 0
1445 09:19:34.742326 PCI: 00:17.0: enabled 0
1446 09:19:34.745214 PCI: 00:19.0: enabled 1
1447 09:19:34.748883 PCI: 00:19.1: enabled 0
1448 09:19:34.751907 PCI: 00:19.2: enabled 1
1449 09:19:34.752031 PCI: 00:1a.0: enabled 1
1450 09:19:34.755311 PCI: 00:1c.0: enabled 0
1451 09:19:34.758477 PCI: 00:1c.1: enabled 0
1452 09:19:34.758602 PCI: 00:1c.2: enabled 0
1453 09:19:34.761569 PCI: 00:1c.3: enabled 0
1454 09:19:34.765252 PCI: 00:1c.4: enabled 0
1455 09:19:34.768060 PCI: 00:1c.5: enabled 0
1456 09:19:34.768179 PCI: 00:1c.6: enabled 0
1457 09:19:34.771805 PCI: 00:1c.7: enabled 1
1458 09:19:34.775292 PCI: 00:1e.0: enabled 0
1459 09:19:34.778086 PCI: 00:1e.1: enabled 0
1460 09:19:34.778202 PCI: 00:1e.2: enabled 1
1461 09:19:34.781666 PCI: 00:1e.3: enabled 0
1462 09:19:34.784703 PCI: 00:1f.0: enabled 1
1463 09:19:34.788302 PCI: 00:1f.1: enabled 0
1464 09:19:34.788433 PCI: 00:1f.2: enabled 1
1465 09:19:34.791993 PCI: 00:1f.3: enabled 1
1466 09:19:34.795166 PCI: 00:1f.4: enabled 0
1467 09:19:34.795261 PCI: 00:1f.5: enabled 1
1468 09:19:34.798408 PCI: 00:1f.7: enabled 0
1469 09:19:34.801555 GENERIC: 0.0: enabled 1
1470 09:19:34.804630 GENERIC: 0.0: enabled 1
1471 09:19:34.804731 USB0 port 0: enabled 1
1472 09:19:34.808426 GENERIC: 0.0: enabled 1
1473 09:19:34.811712 I2C: 00:2c: enabled 1
1474 09:19:34.811808 I2C: 00:15: enabled 1
1475 09:19:34.814816 GENERIC: 0.0: enabled 0
1476 09:19:34.817928 I2C: 00:15: enabled 1
1477 09:19:34.821823 I2C: 00:10: enabled 0
1478 09:19:34.821917 I2C: 00:10: enabled 0
1479 09:19:34.825001 I2C: 00:2c: enabled 1
1480 09:19:34.828223 I2C: 00:40: enabled 1
1481 09:19:34.828319 I2C: 00:10: enabled 1
1482 09:19:34.831319 I2C: 00:39: enabled 1
1483 09:19:34.835023 I2C: 00:36: enabled 1
1484 09:19:34.835117 I2C: 00:10: enabled 0
1485 09:19:34.838076 I2C: 00:0c: enabled 1
1486 09:19:34.841341 I2C: 00:50: enabled 1
1487 09:19:34.841436 I2C: 00:1a: enabled 1
1488 09:19:34.844742 I2C: 00:1a: enabled 0
1489 09:19:34.848269 I2C: 00:1a: enabled 0
1490 09:19:34.848362 I2C: 00:28: enabled 1
1491 09:19:34.851057 I2C: 00:29: enabled 1
1492 09:19:34.854468 PCI: 00:00.0: enabled 1
1493 09:19:34.854566 SPI: 00: enabled 1
1494 09:19:34.858013 PNP: 0c09.0: enabled 1
1495 09:19:34.861156 GENERIC: 0.0: enabled 0
1496 09:19:34.861250 USB2 port 0: enabled 1
1497 09:19:34.864334 USB2 port 1: enabled 1
1498 09:19:34.868170 USB2 port 2: enabled 1
1499 09:19:34.871139 USB2 port 3: enabled 1
1500 09:19:34.871262 USB2 port 4: enabled 0
1501 09:19:34.874716 USB2 port 5: enabled 1
1502 09:19:34.877622 USB2 port 6: enabled 0
1503 09:19:34.877719 USB2 port 7: enabled 1
1504 09:19:34.881048 USB3 port 0: enabled 1
1505 09:19:34.884075 USB3 port 1: enabled 1
1506 09:19:34.887776 USB3 port 2: enabled 1
1507 09:19:34.887864 USB3 port 3: enabled 1
1508 09:19:34.890996 APIC: 00: enabled 1
1509 09:19:34.891081 APIC: 02: enabled 1
1510 09:19:34.894419 PCI: 00:08.0: enabled 1
1511 09:19:34.901116 BS: BS_DEV_INIT run times (exec / console): 25 / 438 ms
1512 09:19:34.904387 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1513 09:19:34.907403 ELOG: NV offset 0xbfa000 size 0x1000
1514 09:19:34.915504 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1515 09:19:34.922635 ELOG: Event(17) added with size 13 at 2023-05-31 09:19:35 UTC
1516 09:19:34.928922 ELOG: Event(92) added with size 9 at 2023-05-31 09:19:35 UTC
1517 09:19:34.935932 ELOG: Event(93) added with size 9 at 2023-05-31 09:19:35 UTC
1518 09:19:34.942219 ELOG: Event(9E) added with size 10 at 2023-05-31 09:19:35 UTC
1519 09:19:34.948930 ELOG: Event(9F) added with size 14 at 2023-05-31 09:19:35 UTC
1520 09:19:34.952153 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1521 09:19:34.959324 ELOG: Event(A1) added with size 10 at 2023-05-31 09:19:35 UTC
1522 09:19:34.968882 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1523 09:19:34.975703 ELOG: Event(A0) added with size 9 at 2023-05-31 09:19:35 UTC
1524 09:19:34.979486 elog_add_boot_reason: Logged dev mode boot
1525 09:19:34.986108 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1526 09:19:34.986203 Finalize devices...
1527 09:19:34.988891 Devices finalized
1528 09:19:34.992291 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1529 09:19:34.999349 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1530 09:19:35.005714 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1531 09:19:35.008915 ME: HFSTS1 : 0x80030045
1532 09:19:35.012003 ME: HFSTS2 : 0x30280136
1533 09:19:35.015119 ME: HFSTS3 : 0x00000050
1534 09:19:35.022116 ME: HFSTS4 : 0x00004000
1535 09:19:35.025169 ME: HFSTS5 : 0x00000000
1536 09:19:35.028469 ME: HFSTS6 : 0x40400006
1537 09:19:35.032204 ME: Manufacturing Mode : NO
1538 09:19:35.035385 ME: FW Partition Table : OK
1539 09:19:35.038557 ME: Bringup Loader Failure : NO
1540 09:19:35.041664 ME: Firmware Init Complete : NO
1541 09:19:35.045415 ME: Boot Options Present : NO
1542 09:19:35.048645 ME: Update In Progress : NO
1543 09:19:35.051460 ME: D0i3 Support : YES
1544 09:19:35.055548 ME: Low Power State Enabled : NO
1545 09:19:35.058389 ME: CPU Replaced : YES
1546 09:19:35.061395 ME: CPU Replacement Valid : YES
1547 09:19:35.065022 ME: Current Working State : 5
1548 09:19:35.068508 ME: Current Operation State : 1
1549 09:19:35.071765 ME: Current Operation Mode : 3
1550 09:19:35.075436 ME: Error Code : 0
1551 09:19:35.078350 ME: CPU Debug Disabled : YES
1552 09:19:35.081324 ME: TXT Support : NO
1553 09:19:35.088048 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1554 09:19:35.094588 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1555 09:19:35.098254 ACPI: Writing ACPI tables at 76b27000.
1556 09:19:35.098385 ACPI: * FACS
1557 09:19:35.101788 ACPI: * DSDT
1558 09:19:35.104562 Ramoops buffer: 0x100000@0x76a26000.
1559 09:19:35.108007 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1560 09:19:35.114863 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1561 09:19:35.118009 Google Chrome EC: version:
1562 09:19:35.121545 ro: magolor_1.1.9999-103b6f9
1563 09:19:35.124727 rw: magolor_1.1.9999-103b6f9
1564 09:19:35.124848 running image: 1
1565 09:19:35.131598 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1566 09:19:35.135440 ACPI: * FADT
1567 09:19:35.135560 SCI is IRQ9
1568 09:19:35.141741 ACPI: added table 1/32, length now 40
1569 09:19:35.141831 ACPI: * SSDT
1570 09:19:35.145060 Found 1 CPU(s) with 2 core(s) each.
1571 09:19:35.148183 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1572 09:19:35.154939 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1573 09:19:35.158531 Could not locate 'wifi_sar' in VPD.
1574 09:19:35.161409 Checking CBFS for default SAR values
1575 09:19:35.168476 wifi_sar_defaults.hex has bad len in CBFS
1576 09:19:35.171325 failed from getting SAR limits!
1577 09:19:35.175066 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1578 09:19:35.181517 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1579 09:19:35.184721 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1580 09:19:35.191684 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1581 09:19:35.194965 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1582 09:19:35.201334 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1583 09:19:35.205182 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1584 09:19:35.211888 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1585 09:19:35.218205 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1586 09:19:35.224560 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1587 09:19:35.228390 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1588 09:19:35.235252 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1589 09:19:35.238597 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1590 09:19:35.244780 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1591 09:19:35.248116 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1592 09:19:35.256366 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1593 09:19:35.260185 PS2K: Passing 101 keymaps to kernel
1594 09:19:35.266653 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1595 09:19:35.272774 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1596 09:19:35.276726 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1597 09:19:35.282926 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1598 09:19:35.286679 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1599 09:19:35.292935 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1600 09:19:35.299760 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1601 09:19:35.305858 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1602 09:19:35.309254 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1603 09:19:35.316419 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1604 09:19:35.319493 ACPI: added table 2/32, length now 44
1605 09:19:35.322900 ACPI: * MCFG
1606 09:19:35.326435 ACPI: added table 3/32, length now 48
1607 09:19:35.326533 ACPI: * TPM2
1608 09:19:35.329512 TPM2 log created at 0x76a16000
1609 09:19:35.332798 ACPI: added table 4/32, length now 52
1610 09:19:35.336658 ACPI: * MADT
1611 09:19:35.336756 SCI is IRQ9
1612 09:19:35.339780 ACPI: added table 5/32, length now 56
1613 09:19:35.342733 current = 76b2d580
1614 09:19:35.342822 ACPI: * DMAR
1615 09:19:35.349906 ACPI: added table 6/32, length now 60
1616 09:19:35.352733 ACPI: added table 7/32, length now 64
1617 09:19:35.352835 ACPI: * HPET
1618 09:19:35.356446 ACPI: added table 8/32, length now 68
1619 09:19:35.359717 ACPI: done.
1620 09:19:35.362799 ACPI tables: 26304 bytes.
1621 09:19:35.362893 smbios_write_tables: 76a15000
1622 09:19:35.367168 EC returned error result code 3
1623 09:19:35.370250 Couldn't obtain OEM name from CBI
1624 09:19:35.374361 Create SMBIOS type 16
1625 09:19:35.377369 Create SMBIOS type 17
1626 09:19:35.381190 GENERIC: 0.0 (WIFI Device)
1627 09:19:35.381316 SMBIOS tables: 913 bytes.
1628 09:19:35.387072 Writing table forward entry at 0x00000500
1629 09:19:35.394252 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1630 09:19:35.397572 Writing coreboot table at 0x76b4b000
1631 09:19:35.404050 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1632 09:19:35.406974 1. 0000000000001000-000000000009ffff: RAM
1633 09:19:35.410612 2. 00000000000a0000-00000000000fffff: RESERVED
1634 09:19:35.417319 3. 0000000000100000-0000000076a14fff: RAM
1635 09:19:35.420327 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1636 09:19:35.426675 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1637 09:19:35.433307 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1638 09:19:35.436988 7. 0000000077000000-000000007fbfffff: RESERVED
1639 09:19:35.443284 8. 00000000c0000000-00000000cfffffff: RESERVED
1640 09:19:35.447005 9. 00000000fb000000-00000000fb000fff: RESERVED
1641 09:19:35.450359 10. 00000000fe000000-00000000fe00ffff: RESERVED
1642 09:19:35.456677 11. 00000000fea80000-00000000fea87fff: RESERVED
1643 09:19:35.459904 12. 00000000fed80000-00000000fed87fff: RESERVED
1644 09:19:35.466828 13. 00000000fed90000-00000000fed92fff: RESERVED
1645 09:19:35.469940 14. 00000000feda0000-00000000feda1fff: RESERVED
1646 09:19:35.473024 15. 0000000100000000-00000001803fffff: RAM
1647 09:19:35.476513 Passing 4 GPIOs to payload:
1648 09:19:35.483282 NAME | PORT | POLARITY | VALUE
1649 09:19:35.486794 lid | undefined | high | high
1650 09:19:35.493187 power | undefined | high | low
1651 09:19:35.499775 oprom | undefined | high | low
1652 09:19:35.502762 EC in RW | 0x000000b9 | high | low
1653 09:19:35.509676 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 9968
1654 09:19:35.513120 coreboot table: 1504 bytes.
1655 09:19:35.516153 IMD ROOT 0. 0x76fff000 0x00001000
1656 09:19:35.519985 IMD SMALL 1. 0x76ffe000 0x00001000
1657 09:19:35.522991 FSP MEMORY 2. 0x76c4e000 0x003b0000
1658 09:19:35.525990 CONSOLE 3. 0x76c2e000 0x00020000
1659 09:19:35.533002 FMAP 4. 0x76c2d000 0x00000578
1660 09:19:35.536064 TIME STAMP 5. 0x76c2c000 0x00000910
1661 09:19:35.539475 VBOOT WORK 6. 0x76c18000 0x00014000
1662 09:19:35.543057 ROMSTG STCK 7. 0x76c17000 0x00001000
1663 09:19:35.546480 AFTER CAR 8. 0x76c0d000 0x0000a000
1664 09:19:35.549584 RAMSTAGE 9. 0x76ba7000 0x00066000
1665 09:19:35.552770 REFCODE 10. 0x76b67000 0x00040000
1666 09:19:35.555976 SMM BACKUP 11. 0x76b57000 0x00010000
1667 09:19:35.562908 4f444749 12. 0x76b55000 0x00002000
1668 09:19:35.566097 EXT VBT13. 0x76b53000 0x00001c43
1669 09:19:35.569286 COREBOOT 14. 0x76b4b000 0x00008000
1670 09:19:35.572398 ACPI 15. 0x76b27000 0x00024000
1671 09:19:35.576015 ACPI GNVS 16. 0x76b26000 0x00001000
1672 09:19:35.579129 RAMOOPS 17. 0x76a26000 0x00100000
1673 09:19:35.583107 TPM2 TCGLOG18. 0x76a16000 0x00010000
1674 09:19:35.586319 SMBIOS 19. 0x76a15000 0x00000800
1675 09:19:35.589310 IMD small region:
1676 09:19:35.592555 IMD ROOT 0. 0x76ffec00 0x00000400
1677 09:19:35.595926 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1678 09:19:35.598848 VPD 2. 0x76ffeb60 0x0000006c
1679 09:19:35.605544 POWER STATE 3. 0x76ffeb20 0x00000040
1680 09:19:35.608927 ROMSTAGE 4. 0x76ffeb00 0x00000004
1681 09:19:35.612775 MEM INFO 5. 0x76ffe920 0x000001e0
1682 09:19:35.619261 BS: BS_WRITE_TABLES run times (exec / console): 7 / 517 ms
1683 09:19:35.622568 MTRR: Physical address space:
1684 09:19:35.625734 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1685 09:19:35.632166 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1686 09:19:35.638992 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1687 09:19:35.645246 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1688 09:19:35.652249 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1689 09:19:35.658381 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1690 09:19:35.665352 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1691 09:19:35.668597 MTRR: Fixed MSR 0x250 0x0606060606060606
1692 09:19:35.671711 MTRR: Fixed MSR 0x258 0x0606060606060606
1693 09:19:35.678541 MTRR: Fixed MSR 0x259 0x0000000000000000
1694 09:19:35.681773 MTRR: Fixed MSR 0x268 0x0606060606060606
1695 09:19:35.684981 MTRR: Fixed MSR 0x269 0x0606060606060606
1696 09:19:35.688160 MTRR: Fixed MSR 0x26a 0x0606060606060606
1697 09:19:35.691924 MTRR: Fixed MSR 0x26b 0x0606060606060606
1698 09:19:35.698282 MTRR: Fixed MSR 0x26c 0x0606060606060606
1699 09:19:35.702066 MTRR: Fixed MSR 0x26d 0x0606060606060606
1700 09:19:35.704925 MTRR: Fixed MSR 0x26e 0x0606060606060606
1701 09:19:35.708036 MTRR: Fixed MSR 0x26f 0x0606060606060606
1702 09:19:35.711360 call enable_fixed_mtrr()
1703 09:19:35.715091 CPU physical address size: 39 bits
1704 09:19:35.721838 MTRR: default type WB/UC MTRR counts: 6/5.
1705 09:19:35.724892 MTRR: UC selected as default type.
1706 09:19:35.731362 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1707 09:19:35.734610 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1708 09:19:35.741514 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1709 09:19:35.748237 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1710 09:19:35.754401 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1711 09:19:35.754497
1712 09:19:35.757819 MTRR check
1713 09:19:35.757914 Fixed MTRRs : Enabled
1714 09:19:35.761703 Variable MTRRs: Enabled
1715 09:19:35.761798
1716 09:19:35.764828 MTRR: Fixed MSR 0x250 0x0606060606060606
1717 09:19:35.771403 MTRR: Fixed MSR 0x258 0x0606060606060606
1718 09:19:35.774431 MTRR: Fixed MSR 0x259 0x0000000000000000
1719 09:19:35.778119 MTRR: Fixed MSR 0x268 0x0606060606060606
1720 09:19:35.781291 MTRR: Fixed MSR 0x269 0x0606060606060606
1721 09:19:35.787541 MTRR: Fixed MSR 0x26a 0x0606060606060606
1722 09:19:35.790892 MTRR: Fixed MSR 0x26b 0x0606060606060606
1723 09:19:35.794740 MTRR: Fixed MSR 0x26c 0x0606060606060606
1724 09:19:35.797789 MTRR: Fixed MSR 0x26d 0x0606060606060606
1725 09:19:35.804046 MTRR: Fixed MSR 0x26e 0x0606060606060606
1726 09:19:35.807709 MTRR: Fixed MSR 0x26f 0x0606060606060606
1727 09:19:35.814343 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1728 09:19:35.814474 call enable_fixed_mtrr()
1729 09:19:35.818536 Checking cr50 for pending updates
1730 09:19:35.822171 CPU physical address size: 39 bits
1731 09:19:35.825958 Reading cr50 TPM mode
1732 09:19:35.836027 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1733 09:19:35.843322 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1734 09:19:35.846572 Checking segment from ROM address 0xfff9d5b8
1735 09:19:35.853037 Checking segment from ROM address 0xfff9d5d4
1736 09:19:35.856611 Loading segment from ROM address 0xfff9d5b8
1737 09:19:35.860035 code (compression=0)
1738 09:19:35.866553 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1739 09:19:35.876588 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1740 09:19:35.879551 it's not compressed!
1741 09:19:36.004497 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1742 09:19:36.010865 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1743 09:19:36.018407 Loading segment from ROM address 0xfff9d5d4
1744 09:19:36.022182 Entry Point 0x30000000
1745 09:19:36.022287 Loaded segments
1746 09:19:36.028972 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1747 09:19:36.044849 Finalizing chipset.
1748 09:19:36.047962 Finalizing SMM.
1749 09:19:36.048091 APMC done.
1750 09:19:36.055097 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1751 09:19:36.058406 mp_park_aps done after 0 msecs.
1752 09:19:36.061552 Jumping to boot code at 0x30000000(0x76b4b000)
1753 09:19:36.071130 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1754 09:19:36.071258
1755 09:19:36.071384
1756 09:19:36.071491
1757 09:19:36.074744 Starting depthcharge on Magolor...
1758 09:19:36.074845
1759 09:19:36.075196 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1760 09:19:36.075308 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1761 09:19:36.075426 Setting prompt string to ['dedede:']
1762 09:19:36.075547 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1763 09:19:36.084888 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1764 09:19:36.084985
1765 09:19:36.091505 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1766 09:19:36.091603
1767 09:19:36.094710 fw_config match found: AUDIO_AMP=UNPROVISIONED
1768 09:19:36.094809
1769 09:19:36.098058 Wipe memory regions:
1770 09:19:36.098153
1771 09:19:36.101629 [0x00000000001000, 0x000000000a0000)
1772 09:19:36.101714
1773 09:19:36.104726 [0x00000000100000, 0x00000030000000)
1774 09:19:36.232819
1775 09:19:36.236575 [0x00000031062170, 0x00000076a15000)
1776 09:19:36.405334
1777 09:19:36.408252 [0x00000100000000, 0x00000180400000)
1778 09:19:37.473098
1779 09:19:37.473261 R8152: Initializing
1780 09:19:37.473337
1781 09:19:37.475689 Version 9 (ocp_data = 6010)
1782 09:19:37.475783
1783 09:19:37.479163 R8152: Done initializing
1784 09:19:37.479255
1785 09:19:37.481949 Adding net device
1786 09:19:37.482041
1787 09:19:37.485762 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1788 09:19:37.485855
1789 09:19:37.488634
1790 09:19:37.488727
1791 09:19:37.489040 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1793 09:19:37.589427 dedede: tftpboot 192.168.201.1 10539073/tftp-deploy-wxmmrtq5/kernel/bzImage 10539073/tftp-deploy-wxmmrtq5/kernel/cmdline 10539073/tftp-deploy-wxmmrtq5/ramdisk/ramdisk.cpio.gz
1794 09:19:37.589657 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1795 09:19:37.589776 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1796 09:19:37.593911 tftpboot 192.168.201.1 10539073/tftp-deploy-wxmmrtq5/kernel/bzImaploy-wxmmrtq5/kernel/cmdline 10539073/tftp-deploy-wxmmrtq5/ramdisk/ramdisk.cpio.gz
1797 09:19:37.594009
1798 09:19:37.594103 Waiting for link
1799 09:19:37.796350
1800 09:19:37.796521 done.
1801 09:19:37.796626
1802 09:19:37.796717 MAC: 00:e0:4c:78:86:ac
1803 09:19:37.796805
1804 09:19:37.799299 Sending DHCP discover... done.
1805 09:19:37.799395
1806 09:19:37.802668 Waiting for reply... done.
1807 09:19:37.802764
1808 09:19:37.805804 Sending DHCP request... done.
1809 09:19:37.805900
1810 09:19:37.809401 Waiting for reply... done.
1811 09:19:37.809516
1812 09:19:37.812528 My ip is 192.168.201.16
1813 09:19:37.812641
1814 09:19:37.815764 The DHCP server ip is 192.168.201.1
1815 09:19:37.815845
1816 09:19:37.819522 TFTP server IP predefined by user: 192.168.201.1
1817 09:19:37.819601
1818 09:19:37.825594 Bootfile predefined by user: 10539073/tftp-deploy-wxmmrtq5/kernel/bzImage
1819 09:19:37.825716
1820 09:19:37.828925 Sending tftp read request... done.
1821 09:19:37.829018
1822 09:19:37.835978 Waiting for the transfer...
1823 09:19:37.836104
1824 09:19:38.098487 00000000 ################################################################
1825 09:19:38.098685
1826 09:19:38.368582 00080000 ################################################################
1827 09:19:38.368743
1828 09:19:38.633897 00100000 ################################################################
1829 09:19:38.634059
1830 09:19:38.897286 00180000 ################################################################
1831 09:19:38.897446
1832 09:19:39.161020 00200000 ################################################################
1833 09:19:39.161183
1834 09:19:39.471487 00280000 ################################################################
1835 09:19:39.471681
1836 09:19:39.732891 00300000 ################################################################
1837 09:19:39.733052
1838 09:19:39.987514 00380000 ################################################################
1839 09:19:39.987674
1840 09:19:40.249226 00400000 ################################################################
1841 09:19:40.249390
1842 09:19:40.503469 00480000 ################################################################
1843 09:19:40.503663
1844 09:19:40.758380 00500000 ################################################################
1845 09:19:40.758548
1846 09:19:41.011776 00580000 ################################################################
1847 09:19:41.011943
1848 09:19:41.269376 00600000 ################################################################
1849 09:19:41.269550
1850 09:19:41.543066 00680000 ################################################################
1851 09:19:41.543234
1852 09:19:41.813419 00700000 ################################################################
1853 09:19:41.813582
1854 09:19:41.822066 00780000 ### done.
1855 09:19:41.822167
1856 09:19:41.825758 The bootfile was 7884688 bytes long.
1857 09:19:41.825853
1858 09:19:41.829033 Sending tftp read request... done.
1859 09:19:41.829131
1860 09:19:41.832145 Waiting for the transfer...
1861 09:19:41.832241
1862 09:19:42.094654 00000000 ################################################################
1863 09:19:42.094821
1864 09:19:42.352720 00080000 ################################################################
1865 09:19:42.352886
1866 09:19:42.654660 00100000 ################################################################
1867 09:19:42.654824
1868 09:19:42.953433 00180000 ################################################################
1869 09:19:42.953603
1870 09:19:43.277876 00200000 ################################################################
1871 09:19:43.278038
1872 09:19:43.569380 00280000 ################################################################
1873 09:19:43.569544
1874 09:19:43.863007 00300000 ################################################################
1875 09:19:43.863172
1876 09:19:44.163357 00380000 ################################################################
1877 09:19:44.163519
1878 09:19:44.481329 00400000 ################################################################
1879 09:19:44.481523
1880 09:19:44.812434 00480000 ################################################################
1881 09:19:44.812626
1882 09:19:45.113738 00500000 ############################################################### done.
1883 09:19:45.113899
1884 09:19:45.117799 Sending tftp read request... done.
1885 09:19:45.117900
1886 09:19:45.120913 Waiting for the transfer...
1887 09:19:45.121006
1888 09:19:45.121082 00000000 # done.
1889 09:19:45.121157
1890 09:19:45.130505 Command line loaded dynamically from TFTP file: 10539073/tftp-deploy-wxmmrtq5/kernel/cmdline
1891 09:19:45.130642
1892 09:19:45.153863 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10539073/extract-nfsrootfs-z82tjie_,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1893 09:19:45.153974
1894 09:19:45.156821 ec_init: CrosEC protocol v3 supported (256, 256)
1895 09:19:45.163902
1896 09:19:45.166986 Shutting down all USB controllers.
1897 09:19:45.167079
1898 09:19:45.167154 Removing current net device
1899 09:19:45.167224
1900 09:19:45.170095 Finalizing coreboot
1901 09:19:45.170189
1902 09:19:45.176742 Exiting depthcharge with code 4 at timestamp: 15916731
1903 09:19:45.176837
1904 09:19:45.176911
1905 09:19:45.176981 Starting kernel ...
1906 09:19:45.177048
1907 09:19:45.177112
1908 09:19:45.177486 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
1909 09:19:45.177607 start: 2.2.5 auto-login-action (timeout 00:04:38) [common]
1910 09:19:45.177695 Setting prompt string to ['Linux version [0-9]']
1911 09:19:45.177773 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1912 09:19:45.177850 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1914 09:24:23.178412 end: 2.2.5 auto-login-action (duration 00:04:38) [common]
1916 09:24:23.179521 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 278 seconds'
1918 09:24:23.180357 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1921 09:24:23.181680 end: 2 depthcharge-action (duration 00:05:00) [common]
1923 09:24:23.182832 Cleaning after the job
1924 09:24:23.183288 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10539073/tftp-deploy-wxmmrtq5/ramdisk
1925 09:24:23.186826 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10539073/tftp-deploy-wxmmrtq5/kernel
1926 09:24:23.191221 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10539073/tftp-deploy-wxmmrtq5/nfsrootfs
1927 09:24:23.274564 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10539073/tftp-deploy-wxmmrtq5/modules
1928 09:24:23.275036 start: 5.1 power-off (timeout 00:00:30) [common]
1929 09:24:23.275233 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=off'
1930 09:24:23.353321 >> Command sent successfully.
1931 09:24:23.357549 Returned 0 in 0 seconds
1932 09:24:23.458205 end: 5.1 power-off (duration 00:00:00) [common]
1934 09:24:23.458978 start: 5.2 read-feedback (timeout 00:10:00) [common]
1935 09:24:23.459595 Listened to connection for namespace 'common' for up to 1s
1937 09:24:23.460354 Listened to connection for namespace 'common' for up to 1s
1938 09:24:24.459766 Finalising connection for namespace 'common'
1939 09:24:24.459956 Disconnecting from shell: Finalise
1940 09:24:24.460054
1941 09:24:24.560685 end: 5.2 read-feedback (duration 00:00:01) [common]
1942 09:24:24.561269 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10539073
1943 09:24:24.877395 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10539073
1944 09:24:24.878034 JobError: Your job cannot terminate cleanly.