Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 11:13:14.333845 lava-dispatcher, installed at version: 2023.05.1
2 11:13:14.334089 start: 0 validate
3 11:13:14.334238 Start time: 2023-08-01 11:13:14.334230+00:00 (UTC)
4 11:13:14.334382 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:13:14.334540 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 11:13:14.604840 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:13:14.605342 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1446-g679130ec67b34%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:13:14.875123 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:13:14.875849 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1446-g679130ec67b34%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:13:18.989233 validate duration: 4.66
12 11:13:18.990503 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:13:18.990996 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:13:18.991458 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:13:18.992056 Not decompressing ramdisk as can be used compressed.
16 11:13:18.992567 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 11:13:18.992908 saving as /var/lib/lava/dispatcher/tmp/11183364/tftp-deploy-nyn_6uj6/ramdisk/rootfs.cpio.gz
18 11:13:18.993352 total size: 8418130 (8MB)
19 11:13:19.516422 progress 0% (0MB)
20 11:13:19.524026 progress 5% (0MB)
21 11:13:19.526562 progress 10% (0MB)
22 11:13:19.529012 progress 15% (1MB)
23 11:13:19.531629 progress 20% (1MB)
24 11:13:19.534170 progress 25% (2MB)
25 11:13:19.536779 progress 30% (2MB)
26 11:13:19.539158 progress 35% (2MB)
27 11:13:19.541750 progress 40% (3MB)
28 11:13:19.544329 progress 45% (3MB)
29 11:13:19.546901 progress 50% (4MB)
30 11:13:19.549436 progress 55% (4MB)
31 11:13:19.552053 progress 60% (4MB)
32 11:13:19.554314 progress 65% (5MB)
33 11:13:19.556774 progress 70% (5MB)
34 11:13:19.559243 progress 75% (6MB)
35 11:13:19.561665 progress 80% (6MB)
36 11:13:19.564145 progress 85% (6MB)
37 11:13:19.566616 progress 90% (7MB)
38 11:13:19.569062 progress 95% (7MB)
39 11:13:19.571408 progress 100% (8MB)
40 11:13:19.571656 8MB downloaded in 0.58s (13.88MB/s)
41 11:13:19.571809 end: 1.1.1 http-download (duration 00:00:01) [common]
43 11:13:19.572063 end: 1.1 download-retry (duration 00:00:01) [common]
44 11:13:19.572156 start: 1.2 download-retry (timeout 00:09:59) [common]
45 11:13:19.572251 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 11:13:19.572396 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1446-g679130ec67b34/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:13:19.572472 saving as /var/lib/lava/dispatcher/tmp/11183364/tftp-deploy-nyn_6uj6/kernel/bzImage
48 11:13:19.572537 total size: 7884688 (7MB)
49 11:13:19.572600 No compression specified
50 11:13:19.573782 progress 0% (0MB)
51 11:13:19.576192 progress 5% (0MB)
52 11:13:19.578512 progress 10% (0MB)
53 11:13:19.580844 progress 15% (1MB)
54 11:13:19.583175 progress 20% (1MB)
55 11:13:19.585462 progress 25% (1MB)
56 11:13:19.587796 progress 30% (2MB)
57 11:13:19.590093 progress 35% (2MB)
58 11:13:19.592568 progress 40% (3MB)
59 11:13:19.595020 progress 45% (3MB)
60 11:13:19.597453 progress 50% (3MB)
61 11:13:19.599748 progress 55% (4MB)
62 11:13:19.602022 progress 60% (4MB)
63 11:13:19.604327 progress 65% (4MB)
64 11:13:19.606617 progress 70% (5MB)
65 11:13:19.608893 progress 75% (5MB)
66 11:13:19.611203 progress 80% (6MB)
67 11:13:19.613503 progress 85% (6MB)
68 11:13:19.615795 progress 90% (6MB)
69 11:13:19.618106 progress 95% (7MB)
70 11:13:19.620439 progress 100% (7MB)
71 11:13:19.620657 7MB downloaded in 0.05s (156.28MB/s)
72 11:13:19.620810 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:13:19.621074 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:13:19.621176 start: 1.3 download-retry (timeout 00:09:59) [common]
76 11:13:19.621304 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 11:13:19.621487 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1446-g679130ec67b34/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:13:19.621565 saving as /var/lib/lava/dispatcher/tmp/11183364/tftp-deploy-nyn_6uj6/modules/modules.tar
79 11:13:19.621633 total size: 250928 (0MB)
80 11:13:19.621701 Using unxz to decompress xz
81 11:13:19.626228 progress 13% (0MB)
82 11:13:19.626686 progress 26% (0MB)
83 11:13:19.626950 progress 39% (0MB)
84 11:13:19.628727 progress 52% (0MB)
85 11:13:19.630877 progress 65% (0MB)
86 11:13:19.632804 progress 78% (0MB)
87 11:13:19.634918 progress 91% (0MB)
88 11:13:19.636920 progress 100% (0MB)
89 11:13:19.643049 0MB downloaded in 0.02s (11.18MB/s)
90 11:13:19.643351 end: 1.3.1 http-download (duration 00:00:00) [common]
92 11:13:19.643655 end: 1.3 download-retry (duration 00:00:00) [common]
93 11:13:19.643768 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 11:13:19.643878 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 11:13:19.643969 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 11:13:19.644062 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 11:13:19.644302 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf
98 11:13:19.644451 makedir: /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin
99 11:13:19.644570 makedir: /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/tests
100 11:13:19.644678 makedir: /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/results
101 11:13:19.644801 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-add-keys
102 11:13:19.644959 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-add-sources
103 11:13:19.645104 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-background-process-start
104 11:13:19.645261 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-background-process-stop
105 11:13:19.645404 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-common-functions
106 11:13:19.645544 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-echo-ipv4
107 11:13:19.645687 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-install-packages
108 11:13:19.645826 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-installed-packages
109 11:13:19.645965 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-os-build
110 11:13:19.646105 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-probe-channel
111 11:13:19.646243 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-probe-ip
112 11:13:19.646381 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-target-ip
113 11:13:19.646533 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-target-mac
114 11:13:19.646673 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-target-storage
115 11:13:19.646819 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-test-case
116 11:13:19.646959 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-test-event
117 11:13:19.647096 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-test-feedback
118 11:13:19.647242 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-test-raise
119 11:13:19.647389 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-test-reference
120 11:13:19.647531 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-test-runner
121 11:13:19.647669 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-test-set
122 11:13:19.647812 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-test-shell
123 11:13:19.647956 Updating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-install-packages (oe)
124 11:13:19.648129 Updating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/bin/lava-installed-packages (oe)
125 11:13:19.648276 Creating /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/environment
126 11:13:19.648386 LAVA metadata
127 11:13:19.648468 - LAVA_JOB_ID=11183364
128 11:13:19.648542 - LAVA_DISPATCHER_IP=192.168.201.1
129 11:13:19.648653 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 11:13:19.648730 skipped lava-vland-overlay
131 11:13:19.648812 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 11:13:19.648902 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 11:13:19.648969 skipped lava-multinode-overlay
134 11:13:19.649049 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 11:13:19.649135 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 11:13:19.649230 Loading test definitions
137 11:13:19.649333 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 11:13:19.649414 Using /lava-11183364 at stage 0
139 11:13:19.649773 uuid=11183364_1.4.2.3.1 testdef=None
140 11:13:19.649870 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 11:13:19.649966 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 11:13:19.650580 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 11:13:19.650832 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 11:13:19.651565 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 11:13:19.651816 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 11:13:19.652514 runner path: /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/0/tests/0_dmesg test_uuid 11183364_1.4.2.3.1
149 11:13:19.652690 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 11:13:19.652940 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 11:13:19.653020 Using /lava-11183364 at stage 1
153 11:13:19.653377 uuid=11183364_1.4.2.3.5 testdef=None
154 11:13:19.653475 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 11:13:19.653567 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 11:13:19.654089 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 11:13:19.654332 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 11:13:19.655084 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 11:13:19.655356 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 11:13:19.656125 runner path: /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/1/tests/1_bootrr test_uuid 11183364_1.4.2.3.5
163 11:13:19.656294 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 11:13:19.656526 Creating lava-test-runner.conf files
166 11:13:19.656595 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/0 for stage 0
167 11:13:19.656695 - 0_dmesg
168 11:13:19.656783 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11183364/lava-overlay-ist1bmdf/lava-11183364/1 for stage 1
169 11:13:19.656883 - 1_bootrr
170 11:13:19.656987 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 11:13:19.657082 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 11:13:19.666492 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 11:13:19.666606 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 11:13:19.666700 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 11:13:19.666792 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 11:13:19.666885 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 11:13:19.949813 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 11:13:19.950226 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 11:13:19.950361 extracting modules file /var/lib/lava/dispatcher/tmp/11183364/tftp-deploy-nyn_6uj6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11183364/extract-overlay-ramdisk-5uru6as2/ramdisk
180 11:13:19.965115 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 11:13:19.965258 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 11:13:19.965354 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11183364/compress-overlay-k_qbzruh/overlay-1.4.2.4.tar.gz to ramdisk
183 11:13:19.965432 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11183364/compress-overlay-k_qbzruh/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11183364/extract-overlay-ramdisk-5uru6as2/ramdisk
184 11:13:19.976591 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 11:13:19.976725 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 11:13:19.976824 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 11:13:19.976924 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 11:13:19.977017 Building ramdisk /var/lib/lava/dispatcher/tmp/11183364/extract-overlay-ramdisk-5uru6as2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11183364/extract-overlay-ramdisk-5uru6as2/ramdisk
189 11:13:20.122297 >> 49788 blocks
190 11:13:21.059142 rename /var/lib/lava/dispatcher/tmp/11183364/extract-overlay-ramdisk-5uru6as2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11183364/tftp-deploy-nyn_6uj6/ramdisk/ramdisk.cpio.gz
191 11:13:21.059649 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 11:13:21.059789 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 11:13:21.059908 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 11:13:21.060011 No mkimage arch provided, not using FIT.
195 11:13:21.060111 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 11:13:21.060200 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 11:13:21.060318 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 11:13:21.060414 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 11:13:21.060506 No LXC device requested
200 11:13:21.060591 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 11:13:21.060687 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 11:13:21.060796 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 11:13:21.060880 Checking files for TFTP limit of 4294967296 bytes.
204 11:13:21.061321 end: 1 tftp-deploy (duration 00:00:02) [common]
205 11:13:21.061437 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 11:13:21.061535 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 11:13:21.061672 substitutions:
208 11:13:21.061745 - {DTB}: None
209 11:13:21.061816 - {INITRD}: 11183364/tftp-deploy-nyn_6uj6/ramdisk/ramdisk.cpio.gz
210 11:13:21.061883 - {KERNEL}: 11183364/tftp-deploy-nyn_6uj6/kernel/bzImage
211 11:13:21.061947 - {LAVA_MAC}: None
212 11:13:21.062009 - {PRESEED_CONFIG}: None
213 11:13:21.062071 - {PRESEED_LOCAL}: None
214 11:13:21.062131 - {RAMDISK}: 11183364/tftp-deploy-nyn_6uj6/ramdisk/ramdisk.cpio.gz
215 11:13:21.062192 - {ROOT_PART}: None
216 11:13:21.062252 - {ROOT}: None
217 11:13:21.062311 - {SERVER_IP}: 192.168.201.1
218 11:13:21.062370 - {TEE}: None
219 11:13:21.062440 Parsed boot commands:
220 11:13:21.062503 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 11:13:21.062689 Parsed boot commands: tftpboot 192.168.201.1 11183364/tftp-deploy-nyn_6uj6/kernel/bzImage 11183364/tftp-deploy-nyn_6uj6/kernel/cmdline 11183364/tftp-deploy-nyn_6uj6/ramdisk/ramdisk.cpio.gz
222 11:13:21.062785 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 11:13:21.062894 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 11:13:21.062996 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 11:13:21.063088 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 11:13:21.063167 Not connected, no need to disconnect.
227 11:13:21.063247 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 11:13:21.063339 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 11:13:21.063413 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-4'
230 11:13:21.067843 Setting prompt string to ['lava-test: # ']
231 11:13:21.068247 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 11:13:21.068368 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 11:13:21.068477 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 11:13:21.068576 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 11:13:21.068781 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=reboot'
236 11:13:26.214586 >> Command sent successfully.
237 11:13:26.224223 Returned 0 in 5 seconds
238 11:13:26.325494 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 11:13:26.326810 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 11:13:26.327379 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 11:13:26.327823 Setting prompt string to 'Starting depthcharge on Voema...'
243 11:13:26.328182 Changing prompt to 'Starting depthcharge on Voema...'
244 11:13:26.328515 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 11:13:26.329636 [Enter `^Ec?' for help]
246 11:13:27.920774
247 11:13:27.921324
248 11:13:27.930453 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 11:13:27.934119 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 11:13:27.939868 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 11:13:27.943193 CPU: AES supported, TXT NOT supported, VT supported
252 11:13:27.949984 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 11:13:27.957050 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 11:13:27.960212 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 11:13:27.963224 VBOOT: Loading verstage.
256 11:13:27.970021 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 11:13:27.973741 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 11:13:27.976843 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 11:13:27.987486 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 11:13:27.994078 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 11:13:27.994655
262 11:13:27.995003
263 11:13:28.007329 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 11:13:28.021040 Probing TPM: . done!
265 11:13:28.024407 TPM ready after 0 ms
266 11:13:28.027966 Connected to device vid:did:rid of 1ae0:0028:00
267 11:13:28.038958 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
268 11:13:28.045831 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 11:13:28.049166 Initialized TPM device CR50 revision 0
270 11:13:28.116015 tlcl_send_startup: Startup return code is 0
271 11:13:28.116531 TPM: setup succeeded
272 11:13:28.131763 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 11:13:28.145923 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 11:13:28.158469 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 11:13:28.168214 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 11:13:28.171810 Chrome EC: UHEPI supported
277 11:13:28.175395 Phase 1
278 11:13:28.178508 FMAP: area GBB found @ 1805000 (458752 bytes)
279 11:13:28.188462 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 11:13:28.195402 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 11:13:28.201669 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 11:13:28.208575 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 11:13:28.211746 Recovery requested (1009000e)
284 11:13:28.215319 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 11:13:28.226894 tlcl_extend: response is 0
286 11:13:28.233577 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 11:13:28.243130 tlcl_extend: response is 0
288 11:13:28.250107 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 11:13:28.256551 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 11:13:28.263035 BS: verstage times (exec / console): total (unknown) / 142 ms
291 11:13:28.263585
292 11:13:28.263931
293 11:13:28.276541 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 11:13:28.282893 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 11:13:28.286279 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 11:13:28.289552 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 11:13:28.296376 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 11:13:28.299903 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 11:13:28.303382 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 11:13:28.306477 TCO_STS: 0000 0000
301 11:13:28.309404 GEN_PMCON: d0015038 00002200
302 11:13:28.312733 GBLRST_CAUSE: 00000000 00000000
303 11:13:28.313258 HPR_CAUSE0: 00000000
304 11:13:28.316177 prev_sleep_state 5
305 11:13:28.319334 Boot Count incremented to 27684
306 11:13:28.326649 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 11:13:28.332939 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 11:13:28.339393 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 11:13:28.345921 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 11:13:28.350680 Chrome EC: UHEPI supported
311 11:13:28.357370 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 11:13:28.370380 Probing TPM: done!
313 11:13:28.376817 Connected to device vid:did:rid of 1ae0:0028:00
314 11:13:28.386687 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
315 11:13:28.390723 Initialized TPM device CR50 revision 0
316 11:13:28.405106 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 11:13:28.411905 MRC: Hash idx 0x100b comparison successful.
318 11:13:28.414952 MRC cache found, size faa8
319 11:13:28.415375 bootmode is set to: 2
320 11:13:28.418595 SPD index = 0
321 11:13:28.425153 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 11:13:28.428769 SPD: module type is LPDDR4X
323 11:13:28.432483 SPD: module part number is MT53E512M64D4NW-046
324 11:13:28.438386 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 11:13:28.441698 SPD: device width 16 bits, bus width 16 bits
326 11:13:28.448144 SPD: module size is 1024 MB (per channel)
327 11:13:28.882459 CBMEM:
328 11:13:28.885254 IMD: root @ 0x76fff000 254 entries.
329 11:13:28.888852 IMD: root @ 0x76ffec00 62 entries.
330 11:13:28.892155 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 11:13:28.898914 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 11:13:28.902382 External stage cache:
333 11:13:28.905609 IMD: root @ 0x7b3ff000 254 entries.
334 11:13:28.908932 IMD: root @ 0x7b3fec00 62 entries.
335 11:13:28.924498 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 11:13:28.930261 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 11:13:28.937399 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 11:13:28.951721 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 11:13:28.954891 cse_lite: Skip switching to RW in the recovery path
340 11:13:28.958542 8 DIMMs found
341 11:13:28.959084 SMM Memory Map
342 11:13:28.961661 SMRAM : 0x7b000000 0x800000
343 11:13:28.965459 Subregion 0: 0x7b000000 0x200000
344 11:13:28.968422 Subregion 1: 0x7b200000 0x200000
345 11:13:28.971459 Subregion 2: 0x7b400000 0x400000
346 11:13:28.974649 top_of_ram = 0x77000000
347 11:13:28.981672 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 11:13:28.984911 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 11:13:28.991690 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 11:13:28.998245 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 11:13:29.004958 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 11:13:29.011251 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 11:13:29.021379 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 11:13:29.024649 Processing 211 relocs. Offset value of 0x74c0b000
355 11:13:29.033961 BS: romstage times (exec / console): total (unknown) / 277 ms
356 11:13:29.039987
357 11:13:29.040522
358 11:13:29.049980 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 11:13:29.053371 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 11:13:29.063546 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 11:13:29.070008 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 11:13:29.076710 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 11:13:29.083385 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 11:13:29.130322 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 11:13:29.136869 Processing 5008 relocs. Offset value of 0x75d98000
366 11:13:29.140433 BS: postcar times (exec / console): total (unknown) / 59 ms
367 11:13:29.140990
368 11:13:29.141445
369 11:13:29.153541 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 11:13:29.154070 Normal boot
371 11:13:29.157193 FW_CONFIG value is 0x804c02
372 11:13:29.160375 PCI: 00:07.0 disabled by fw_config
373 11:13:29.163751 PCI: 00:07.1 disabled by fw_config
374 11:13:29.167158 PCI: 00:0d.2 disabled by fw_config
375 11:13:29.170876 PCI: 00:1c.7 disabled by fw_config
376 11:13:29.177202 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 11:13:29.184060 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 11:13:29.187041 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 11:13:29.190479 GENERIC: 0.0 disabled by fw_config
380 11:13:29.193410 GENERIC: 1.0 disabled by fw_config
381 11:13:29.199836 fw_config match found: DB_USB=USB3_ACTIVE
382 11:13:29.203852 fw_config match found: DB_USB=USB3_ACTIVE
383 11:13:29.206528 fw_config match found: DB_USB=USB3_ACTIVE
384 11:13:29.213660 fw_config match found: DB_USB=USB3_ACTIVE
385 11:13:29.216398 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 11:13:29.223475 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 11:13:29.233526 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 11:13:29.240274 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 11:13:29.243555 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 11:13:29.250338 microcode: Update skipped, already up-to-date
391 11:13:29.256376 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 11:13:29.283911 Detected 4 core, 8 thread CPU.
393 11:13:29.287182 Setting up SMI for CPU
394 11:13:29.290394 IED base = 0x7b400000
395 11:13:29.290964 IED size = 0x00400000
396 11:13:29.293379 Will perform SMM setup.
397 11:13:29.300540 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 11:13:29.307418 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 11:13:29.313360 Processing 16 relocs. Offset value of 0x00030000
400 11:13:29.316829 Attempting to start 7 APs
401 11:13:29.320093 Waiting for 10ms after sending INIT.
402 11:13:29.335487 Waiting for 1st SIPI to complete...done.
403 11:13:29.335996 AP: slot 1 apic_id 1.
404 11:13:29.339274 AP: slot 2 apic_id 3.
405 11:13:29.342564 AP: slot 6 apic_id 2.
406 11:13:29.343081 AP: slot 3 apic_id 4.
407 11:13:29.346273 AP: slot 7 apic_id 5.
408 11:13:29.349350 AP: slot 5 apic_id 6.
409 11:13:29.350021 AP: slot 4 apic_id 7.
410 11:13:29.355425 Waiting for 2nd SIPI to complete...done.
411 11:13:29.362823 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 11:13:29.369219 Processing 13 relocs. Offset value of 0x00038000
413 11:13:29.369743 Unable to locate Global NVS
414 11:13:29.379181 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 11:13:29.382142 Installing permanent SMM handler to 0x7b000000
416 11:13:29.392209 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 11:13:29.395465 Processing 794 relocs. Offset value of 0x7b010000
418 11:13:29.405756 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 11:13:29.409000 Processing 13 relocs. Offset value of 0x7b008000
420 11:13:29.415221 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 11:13:29.422358 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 11:13:29.425766 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 11:13:29.432403 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 11:13:29.439130 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 11:13:29.445466 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 11:13:29.452479 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 11:13:29.453037 Unable to locate Global NVS
428 11:13:29.462261 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 11:13:29.465639 Clearing SMI status registers
430 11:13:29.466172 SMI_STS: PM1
431 11:13:29.469049 PM1_STS: PWRBTN
432 11:13:29.475395 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 11:13:29.478692 In relocation handler: CPU 0
434 11:13:29.481975 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 11:13:29.488855 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 11:13:29.489370 Relocation complete.
437 11:13:29.498612 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 11:13:29.499138 In relocation handler: CPU 1
439 11:13:29.505143 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 11:13:29.505653 Relocation complete.
441 11:13:29.512005 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
442 11:13:29.515387 In relocation handler: CPU 5
443 11:13:29.521662 New SMBASE=0x7affec00 IEDBASE=0x7b400000
444 11:13:29.525078 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 11:13:29.528318 Relocation complete.
446 11:13:29.534982 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
447 11:13:29.538487 In relocation handler: CPU 4
448 11:13:29.541817 New SMBASE=0x7afff000 IEDBASE=0x7b400000
449 11:13:29.544980 Relocation complete.
450 11:13:29.551867 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
451 11:13:29.554821 In relocation handler: CPU 3
452 11:13:29.558312 New SMBASE=0x7afff400 IEDBASE=0x7b400000
453 11:13:29.561808 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 11:13:29.564915 Relocation complete.
455 11:13:29.571246 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
456 11:13:29.575259 In relocation handler: CPU 7
457 11:13:29.578175 New SMBASE=0x7affe400 IEDBASE=0x7b400000
458 11:13:29.581991 Relocation complete.
459 11:13:29.588058 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
460 11:13:29.591559 In relocation handler: CPU 6
461 11:13:29.594839 New SMBASE=0x7affe800 IEDBASE=0x7b400000
462 11:13:29.601182 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 11:13:29.605060 Relocation complete.
464 11:13:29.613719 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
465 11:13:29.614245 In relocation handler: CPU 2
466 11:13:29.616075 New SMBASE=0x7afff800 IEDBASE=0x7b400000
467 11:13:29.619230 Relocation complete.
468 11:13:29.622625 Initializing CPU #0
469 11:13:29.625797 CPU: vendor Intel device 806c1
470 11:13:29.629469 CPU: family 06, model 8c, stepping 01
471 11:13:29.632400 Clearing out pending MCEs
472 11:13:29.632824 Setting up local APIC...
473 11:13:29.635811 apic_id: 0x00 done.
474 11:13:29.639767 Turbo is available but hidden
475 11:13:29.642511 Turbo is available and visible
476 11:13:29.646106 microcode: Update skipped, already up-to-date
477 11:13:29.649537 CPU #0 initialized
478 11:13:29.652963 Initializing CPU #6
479 11:13:29.653487 Initializing CPU #2
480 11:13:29.655920 CPU: vendor Intel device 806c1
481 11:13:29.659391 CPU: family 06, model 8c, stepping 01
482 11:13:29.662570 CPU: vendor Intel device 806c1
483 11:13:29.666014 CPU: family 06, model 8c, stepping 01
484 11:13:29.669086 Clearing out pending MCEs
485 11:13:29.672639 Clearing out pending MCEs
486 11:13:29.675902 Setting up local APIC...
487 11:13:29.676431 Initializing CPU #3
488 11:13:29.679128 Initializing CPU #7
489 11:13:29.682337 CPU: vendor Intel device 806c1
490 11:13:29.685902 CPU: family 06, model 8c, stepping 01
491 11:13:29.689308 CPU: vendor Intel device 806c1
492 11:13:29.692890 CPU: family 06, model 8c, stepping 01
493 11:13:29.695988 Clearing out pending MCEs
494 11:13:29.699296 Clearing out pending MCEs
495 11:13:29.702757 Setting up local APIC...
496 11:13:29.703182 apic_id: 0x02 done.
497 11:13:29.706143 Setting up local APIC...
498 11:13:29.709250 Setting up local APIC...
499 11:13:29.709773 Initializing CPU #5
500 11:13:29.712473 Initializing CPU #4
501 11:13:29.715553 CPU: vendor Intel device 806c1
502 11:13:29.719068 CPU: family 06, model 8c, stepping 01
503 11:13:29.722167 CPU: vendor Intel device 806c1
504 11:13:29.725706 CPU: family 06, model 8c, stepping 01
505 11:13:29.729335 Clearing out pending MCEs
506 11:13:29.732153 Clearing out pending MCEs
507 11:13:29.735375 Setting up local APIC...
508 11:13:29.735935 apic_id: 0x04 done.
509 11:13:29.739452 apic_id: 0x05 done.
510 11:13:29.742154 microcode: Update skipped, already up-to-date
511 11:13:29.748480 microcode: Update skipped, already up-to-date
512 11:13:29.748909 CPU #3 initialized
513 11:13:29.752568 CPU #7 initialized
514 11:13:29.755024 microcode: Update skipped, already up-to-date
515 11:13:29.758721 apic_id: 0x03 done.
516 11:13:29.759145 CPU #6 initialized
517 11:13:29.765062 microcode: Update skipped, already up-to-date
518 11:13:29.768402 Setting up local APIC...
519 11:13:29.768836 Initializing CPU #1
520 11:13:29.772314 apic_id: 0x07 done.
521 11:13:29.772830 apic_id: 0x06 done.
522 11:13:29.778846 microcode: Update skipped, already up-to-date
523 11:13:29.781758 microcode: Update skipped, already up-to-date
524 11:13:29.785409 CPU #4 initialized
525 11:13:29.785932 CPU #5 initialized
526 11:13:29.788320 CPU: vendor Intel device 806c1
527 11:13:29.792193 CPU: family 06, model 8c, stepping 01
528 11:13:29.795177 Clearing out pending MCEs
529 11:13:29.798678 CPU #2 initialized
530 11:13:29.801645 Setting up local APIC...
531 11:13:29.802065 apic_id: 0x01 done.
532 11:13:29.808546 microcode: Update skipped, already up-to-date
533 11:13:29.809067 CPU #1 initialized
534 11:13:29.814984 bsp_do_flight_plan done after 455 msecs.
535 11:13:29.818542 CPU: frequency set to 4000 MHz
536 11:13:29.818971 Enabling SMIs.
537 11:13:29.825310 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 11:13:29.840814 SATAXPCIE1 indicates PCIe NVMe is present
539 11:13:29.844375 Probing TPM: done!
540 11:13:29.847693 Connected to device vid:did:rid of 1ae0:0028:00
541 11:13:29.858283 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
542 11:13:29.861501 Initialized TPM device CR50 revision 0
543 11:13:29.864997 Enabling S0i3.4
544 11:13:29.871899 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 11:13:29.874742 Found a VBT of 8704 bytes after decompression
546 11:13:29.881358 cse_lite: CSE RO boot. HybridStorageMode disabled
547 11:13:29.887893 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 11:13:29.964041 FSPS returned 0
549 11:13:29.966784 Executing Phase 1 of FspMultiPhaseSiInit
550 11:13:29.976564 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 11:13:29.980190 port C0 DISC req: usage 1 usb3 1 usb2 5
552 11:13:29.983238 Raw Buffer output 0 00000511
553 11:13:29.986657 Raw Buffer output 1 00000000
554 11:13:29.990648 pmc_send_ipc_cmd succeeded
555 11:13:29.997464 port C1 DISC req: usage 1 usb3 2 usb2 3
556 11:13:29.997992 Raw Buffer output 0 00000321
557 11:13:30.000739 Raw Buffer output 1 00000000
558 11:13:30.004539 pmc_send_ipc_cmd succeeded
559 11:13:30.010263 Detected 4 core, 8 thread CPU.
560 11:13:30.013166 Detected 4 core, 8 thread CPU.
561 11:13:30.247657 Display FSP Version Info HOB
562 11:13:30.250785 Reference Code - CPU = a.0.4c.31
563 11:13:30.254105 uCode Version = 0.0.0.86
564 11:13:30.257005 TXT ACM version = ff.ff.ff.ffff
565 11:13:30.260658 Reference Code - ME = a.0.4c.31
566 11:13:30.264111 MEBx version = 0.0.0.0
567 11:13:30.267281 ME Firmware Version = Consumer SKU
568 11:13:30.270554 Reference Code - PCH = a.0.4c.31
569 11:13:30.274180 PCH-CRID Status = Disabled
570 11:13:30.277234 PCH-CRID Original Value = ff.ff.ff.ffff
571 11:13:30.280917 PCH-CRID New Value = ff.ff.ff.ffff
572 11:13:30.283771 OPROM - RST - RAID = ff.ff.ff.ffff
573 11:13:30.287130 PCH Hsio Version = 4.0.0.0
574 11:13:30.290290 Reference Code - SA - System Agent = a.0.4c.31
575 11:13:30.294108 Reference Code - MRC = 2.0.0.1
576 11:13:30.297537 SA - PCIe Version = a.0.4c.31
577 11:13:30.300907 SA-CRID Status = Disabled
578 11:13:30.303645 SA-CRID Original Value = 0.0.0.1
579 11:13:30.307018 SA-CRID New Value = 0.0.0.1
580 11:13:30.310537 OPROM - VBIOS = ff.ff.ff.ffff
581 11:13:30.313427 IO Manageability Engine FW Version = 11.1.4.0
582 11:13:30.316817 PHY Build Version = 0.0.0.e0
583 11:13:30.320488 Thunderbolt(TM) FW Version = 0.0.0.0
584 11:13:30.327408 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 11:13:30.330561 ITSS IRQ Polarities Before:
586 11:13:30.331090 IPC0: 0xffffffff
587 11:13:30.333463 IPC1: 0xffffffff
588 11:13:30.333891 IPC2: 0xffffffff
589 11:13:30.337511 IPC3: 0xffffffff
590 11:13:30.340598 ITSS IRQ Polarities After:
591 11:13:30.341132 IPC0: 0xffffffff
592 11:13:30.343735 IPC1: 0xffffffff
593 11:13:30.344264 IPC2: 0xffffffff
594 11:13:30.346970 IPC3: 0xffffffff
595 11:13:30.350669 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 11:13:30.364024 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 11:13:30.373576 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 11:13:30.387151 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 11:13:30.393894 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 11:13:30.394467 Enumerating buses...
601 11:13:30.400254 Show all devs... Before device enumeration.
602 11:13:30.400787 Root Device: enabled 1
603 11:13:30.403558 DOMAIN: 0000: enabled 1
604 11:13:30.406591 CPU_CLUSTER: 0: enabled 1
605 11:13:30.409979 PCI: 00:00.0: enabled 1
606 11:13:30.413099 PCI: 00:02.0: enabled 1
607 11:13:30.413530 PCI: 00:04.0: enabled 1
608 11:13:30.416545 PCI: 00:05.0: enabled 1
609 11:13:30.419856 PCI: 00:06.0: enabled 0
610 11:13:30.420286 PCI: 00:07.0: enabled 0
611 11:13:30.423327 PCI: 00:07.1: enabled 0
612 11:13:30.426554 PCI: 00:07.2: enabled 0
613 11:13:30.430316 PCI: 00:07.3: enabled 0
614 11:13:30.430893 PCI: 00:08.0: enabled 1
615 11:13:30.433418 PCI: 00:09.0: enabled 0
616 11:13:30.436666 PCI: 00:0a.0: enabled 0
617 11:13:30.440507 PCI: 00:0d.0: enabled 1
618 11:13:30.441039 PCI: 00:0d.1: enabled 0
619 11:13:30.442971 PCI: 00:0d.2: enabled 0
620 11:13:30.446254 PCI: 00:0d.3: enabled 0
621 11:13:30.450026 PCI: 00:0e.0: enabled 0
622 11:13:30.450598 PCI: 00:10.2: enabled 1
623 11:13:30.453025 PCI: 00:10.6: enabled 0
624 11:13:30.456507 PCI: 00:10.7: enabled 0
625 11:13:30.456938 PCI: 00:12.0: enabled 0
626 11:13:30.459744 PCI: 00:12.6: enabled 0
627 11:13:30.463078 PCI: 00:13.0: enabled 0
628 11:13:30.466560 PCI: 00:14.0: enabled 1
629 11:13:30.467205 PCI: 00:14.1: enabled 0
630 11:13:30.470233 PCI: 00:14.2: enabled 1
631 11:13:30.473177 PCI: 00:14.3: enabled 1
632 11:13:30.476628 PCI: 00:15.0: enabled 1
633 11:13:30.477152 PCI: 00:15.1: enabled 1
634 11:13:30.479690 PCI: 00:15.2: enabled 1
635 11:13:30.483317 PCI: 00:15.3: enabled 1
636 11:13:30.486646 PCI: 00:16.0: enabled 1
637 11:13:30.487167 PCI: 00:16.1: enabled 0
638 11:13:30.489256 PCI: 00:16.2: enabled 0
639 11:13:30.493145 PCI: 00:16.3: enabled 0
640 11:13:30.496303 PCI: 00:16.4: enabled 0
641 11:13:30.496751 PCI: 00:16.5: enabled 0
642 11:13:30.500079 PCI: 00:17.0: enabled 1
643 11:13:30.502517 PCI: 00:19.0: enabled 0
644 11:13:30.503089 PCI: 00:19.1: enabled 1
645 11:13:30.506405 PCI: 00:19.2: enabled 0
646 11:13:30.510342 PCI: 00:1c.0: enabled 1
647 11:13:30.513109 PCI: 00:1c.1: enabled 0
648 11:13:30.513599 PCI: 00:1c.2: enabled 0
649 11:13:30.516375 PCI: 00:1c.3: enabled 0
650 11:13:30.519294 PCI: 00:1c.4: enabled 0
651 11:13:30.522575 PCI: 00:1c.5: enabled 0
652 11:13:30.523007 PCI: 00:1c.6: enabled 1
653 11:13:30.526171 PCI: 00:1c.7: enabled 0
654 11:13:30.529238 PCI: 00:1d.0: enabled 1
655 11:13:30.533142 PCI: 00:1d.1: enabled 0
656 11:13:30.533667 PCI: 00:1d.2: enabled 1
657 11:13:30.536347 PCI: 00:1d.3: enabled 0
658 11:13:30.539502 PCI: 00:1e.0: enabled 1
659 11:13:30.542663 PCI: 00:1e.1: enabled 0
660 11:13:30.543192 PCI: 00:1e.2: enabled 1
661 11:13:30.546413 PCI: 00:1e.3: enabled 1
662 11:13:30.549860 PCI: 00:1f.0: enabled 1
663 11:13:30.550408 PCI: 00:1f.1: enabled 0
664 11:13:30.552851 PCI: 00:1f.2: enabled 1
665 11:13:30.555814 PCI: 00:1f.3: enabled 1
666 11:13:30.559090 PCI: 00:1f.4: enabled 0
667 11:13:30.559578 PCI: 00:1f.5: enabled 1
668 11:13:30.562677 PCI: 00:1f.6: enabled 0
669 11:13:30.566215 PCI: 00:1f.7: enabled 0
670 11:13:30.566795 APIC: 00: enabled 1
671 11:13:30.569437 GENERIC: 0.0: enabled 1
672 11:13:30.572706 GENERIC: 0.0: enabled 1
673 11:13:30.576245 GENERIC: 1.0: enabled 1
674 11:13:30.576670 GENERIC: 0.0: enabled 1
675 11:13:30.579491 GENERIC: 1.0: enabled 1
676 11:13:30.583120 USB0 port 0: enabled 1
677 11:13:30.586078 GENERIC: 0.0: enabled 1
678 11:13:30.586537 USB0 port 0: enabled 1
679 11:13:30.588946 GENERIC: 0.0: enabled 1
680 11:13:30.592558 I2C: 00:1a: enabled 1
681 11:13:30.593082 I2C: 00:31: enabled 1
682 11:13:30.595611 I2C: 00:32: enabled 1
683 11:13:30.598995 I2C: 00:10: enabled 1
684 11:13:30.599421 I2C: 00:15: enabled 1
685 11:13:30.602842 GENERIC: 0.0: enabled 0
686 11:13:30.605844 GENERIC: 1.0: enabled 0
687 11:13:30.609359 GENERIC: 0.0: enabled 1
688 11:13:30.609879 SPI: 00: enabled 1
689 11:13:30.612301 SPI: 00: enabled 1
690 11:13:30.615969 PNP: 0c09.0: enabled 1
691 11:13:30.616488 GENERIC: 0.0: enabled 1
692 11:13:30.619114 USB3 port 0: enabled 1
693 11:13:30.622509 USB3 port 1: enabled 1
694 11:13:30.623027 USB3 port 2: enabled 0
695 11:13:30.626316 USB3 port 3: enabled 0
696 11:13:30.629218 USB2 port 0: enabled 0
697 11:13:30.629643 USB2 port 1: enabled 1
698 11:13:30.632253 USB2 port 2: enabled 1
699 11:13:30.635779 USB2 port 3: enabled 0
700 11:13:30.639109 USB2 port 4: enabled 1
701 11:13:30.639535 USB2 port 5: enabled 0
702 11:13:30.642680 USB2 port 6: enabled 0
703 11:13:30.646084 USB2 port 7: enabled 0
704 11:13:30.646669 USB2 port 8: enabled 0
705 11:13:30.649346 USB2 port 9: enabled 0
706 11:13:30.652502 USB3 port 0: enabled 0
707 11:13:30.655470 USB3 port 1: enabled 1
708 11:13:30.656000 USB3 port 2: enabled 0
709 11:13:30.659614 USB3 port 3: enabled 0
710 11:13:30.662978 GENERIC: 0.0: enabled 1
711 11:13:30.663496 GENERIC: 1.0: enabled 1
712 11:13:30.665904 APIC: 01: enabled 1
713 11:13:30.669620 APIC: 03: enabled 1
714 11:13:30.670153 APIC: 04: enabled 1
715 11:13:30.672493 APIC: 07: enabled 1
716 11:13:30.675789 APIC: 06: enabled 1
717 11:13:30.676217 APIC: 02: enabled 1
718 11:13:30.678916 APIC: 05: enabled 1
719 11:13:30.679651 Compare with tree...
720 11:13:30.682237 Root Device: enabled 1
721 11:13:30.685583 DOMAIN: 0000: enabled 1
722 11:13:30.688860 PCI: 00:00.0: enabled 1
723 11:13:30.689304 PCI: 00:02.0: enabled 1
724 11:13:30.692276 PCI: 00:04.0: enabled 1
725 11:13:30.695610 GENERIC: 0.0: enabled 1
726 11:13:30.699122 PCI: 00:05.0: enabled 1
727 11:13:30.702396 PCI: 00:06.0: enabled 0
728 11:13:30.702979 PCI: 00:07.0: enabled 0
729 11:13:30.705530 GENERIC: 0.0: enabled 1
730 11:13:30.709169 PCI: 00:07.1: enabled 0
731 11:13:30.712325 GENERIC: 1.0: enabled 1
732 11:13:30.715220 PCI: 00:07.2: enabled 0
733 11:13:30.718489 GENERIC: 0.0: enabled 1
734 11:13:30.718918 PCI: 00:07.3: enabled 0
735 11:13:30.722103 GENERIC: 1.0: enabled 1
736 11:13:30.725833 PCI: 00:08.0: enabled 1
737 11:13:30.729203 PCI: 00:09.0: enabled 0
738 11:13:30.732425 PCI: 00:0a.0: enabled 0
739 11:13:30.732954 PCI: 00:0d.0: enabled 1
740 11:13:30.735685 USB0 port 0: enabled 1
741 11:13:30.739084 USB3 port 0: enabled 1
742 11:13:30.742414 USB3 port 1: enabled 1
743 11:13:30.745544 USB3 port 2: enabled 0
744 11:13:30.746080 USB3 port 3: enabled 0
745 11:13:30.749206 PCI: 00:0d.1: enabled 0
746 11:13:30.752095 PCI: 00:0d.2: enabled 0
747 11:13:30.755048 GENERIC: 0.0: enabled 1
748 11:13:30.758559 PCI: 00:0d.3: enabled 0
749 11:13:30.759084 PCI: 00:0e.0: enabled 0
750 11:13:30.762051 PCI: 00:10.2: enabled 1
751 11:13:30.765570 PCI: 00:10.6: enabled 0
752 11:13:30.768275 PCI: 00:10.7: enabled 0
753 11:13:30.772080 PCI: 00:12.0: enabled 0
754 11:13:30.772611 PCI: 00:12.6: enabled 0
755 11:13:30.775683 PCI: 00:13.0: enabled 0
756 11:13:30.778540 PCI: 00:14.0: enabled 1
757 11:13:30.782240 USB0 port 0: enabled 1
758 11:13:30.785328 USB2 port 0: enabled 0
759 11:13:30.785864 USB2 port 1: enabled 1
760 11:13:30.788493 USB2 port 2: enabled 1
761 11:13:30.791810 USB2 port 3: enabled 0
762 11:13:30.794943 USB2 port 4: enabled 1
763 11:13:30.798450 USB2 port 5: enabled 0
764 11:13:30.799049 USB2 port 6: enabled 0
765 11:13:30.801660 USB2 port 7: enabled 0
766 11:13:30.804746 USB2 port 8: enabled 0
767 11:13:30.808802 USB2 port 9: enabled 0
768 11:13:30.811970 USB3 port 0: enabled 0
769 11:13:30.815045 USB3 port 1: enabled 1
770 11:13:30.815532 USB3 port 2: enabled 0
771 11:13:30.818385 USB3 port 3: enabled 0
772 11:13:30.821687 PCI: 00:14.1: enabled 0
773 11:13:30.825168 PCI: 00:14.2: enabled 1
774 11:13:30.828264 PCI: 00:14.3: enabled 1
775 11:13:30.828729 GENERIC: 0.0: enabled 1
776 11:13:30.831653 PCI: 00:15.0: enabled 1
777 11:13:30.835222 I2C: 00:1a: enabled 1
778 11:13:30.838525 I2C: 00:31: enabled 1
779 11:13:30.841784 I2C: 00:32: enabled 1
780 11:13:30.842300 PCI: 00:15.1: enabled 1
781 11:13:30.845110 I2C: 00:10: enabled 1
782 11:13:30.847973 PCI: 00:15.2: enabled 1
783 11:13:30.851205 PCI: 00:15.3: enabled 1
784 11:13:30.855432 PCI: 00:16.0: enabled 1
785 11:13:30.855892 PCI: 00:16.1: enabled 0
786 11:13:30.859311 PCI: 00:16.2: enabled 0
787 11:13:30.862734 PCI: 00:16.3: enabled 0
788 11:13:30.863167 PCI: 00:16.4: enabled 0
789 11:13:30.865938 PCI: 00:16.5: enabled 0
790 11:13:30.869199 PCI: 00:17.0: enabled 1
791 11:13:30.872698 PCI: 00:19.0: enabled 0
792 11:13:30.923078 PCI: 00:19.1: enabled 1
793 11:13:30.923714 I2C: 00:15: enabled 1
794 11:13:30.924208 PCI: 00:19.2: enabled 0
795 11:13:30.924663 PCI: 00:1d.0: enabled 1
796 11:13:30.924982 GENERIC: 0.0: enabled 1
797 11:13:30.925285 PCI: 00:1e.0: enabled 1
798 11:13:30.925576 PCI: 00:1e.1: enabled 0
799 11:13:30.925863 PCI: 00:1e.2: enabled 1
800 11:13:30.926575 SPI: 00: enabled 1
801 11:13:30.926916 PCI: 00:1e.3: enabled 1
802 11:13:30.927212 SPI: 00: enabled 1
803 11:13:30.927498 PCI: 00:1f.0: enabled 1
804 11:13:30.927781 PNP: 0c09.0: enabled 1
805 11:13:30.928059 PCI: 00:1f.1: enabled 0
806 11:13:30.928337 PCI: 00:1f.2: enabled 1
807 11:13:30.928613 GENERIC: 0.0: enabled 1
808 11:13:30.928888 GENERIC: 0.0: enabled 1
809 11:13:30.929163 GENERIC: 1.0: enabled 1
810 11:13:30.929439 PCI: 00:1f.3: enabled 1
811 11:13:30.929712 PCI: 00:1f.4: enabled 0
812 11:13:30.939968 PCI: 00:1f.5: enabled 1
813 11:13:30.940562 PCI: 00:1f.6: enabled 0
814 11:13:30.941122 PCI: 00:1f.7: enabled 0
815 11:13:30.941623 CPU_CLUSTER: 0: enabled 1
816 11:13:30.943116 APIC: 00: enabled 1
817 11:13:30.943540 APIC: 01: enabled 1
818 11:13:30.943877 APIC: 03: enabled 1
819 11:13:30.946332 APIC: 04: enabled 1
820 11:13:30.946804 APIC: 07: enabled 1
821 11:13:30.949934 APIC: 06: enabled 1
822 11:13:30.950498 APIC: 02: enabled 1
823 11:13:30.953194 APIC: 05: enabled 1
824 11:13:30.956399 Root Device scanning...
825 11:13:30.960545 scan_static_bus for Root Device
826 11:13:30.963230 DOMAIN: 0000 enabled
827 11:13:30.963760 CPU_CLUSTER: 0 enabled
828 11:13:30.967059 DOMAIN: 0000 scanning...
829 11:13:30.970360 PCI: pci_scan_bus for bus 00
830 11:13:30.973101 PCI: 00:00.0 [8086/0000] ops
831 11:13:30.976466 PCI: 00:00.0 [8086/9a12] enabled
832 11:13:30.979424 PCI: 00:02.0 [8086/0000] bus ops
833 11:13:30.983085 PCI: 00:02.0 [8086/9a40] enabled
834 11:13:30.986160 PCI: 00:04.0 [8086/0000] bus ops
835 11:13:30.989898 PCI: 00:04.0 [8086/9a03] enabled
836 11:13:30.992979 PCI: 00:05.0 [8086/9a19] enabled
837 11:13:30.996392 PCI: 00:07.0 [0000/0000] hidden
838 11:13:30.999550 PCI: 00:08.0 [8086/9a11] enabled
839 11:13:31.002958 PCI: 00:0a.0 [8086/9a0d] disabled
840 11:13:31.006391 PCI: 00:0d.0 [8086/0000] bus ops
841 11:13:31.009833 PCI: 00:0d.0 [8086/9a13] enabled
842 11:13:31.013110 PCI: 00:14.0 [8086/0000] bus ops
843 11:13:31.016472 PCI: 00:14.0 [8086/a0ed] enabled
844 11:13:31.019569 PCI: 00:14.2 [8086/a0ef] enabled
845 11:13:31.022939 PCI: 00:14.3 [8086/0000] bus ops
846 11:13:31.026919 PCI: 00:14.3 [8086/a0f0] enabled
847 11:13:31.030383 PCI: 00:15.0 [8086/0000] bus ops
848 11:13:31.033140 PCI: 00:15.0 [8086/a0e8] enabled
849 11:13:31.036899 PCI: 00:15.1 [8086/0000] bus ops
850 11:13:31.039658 PCI: 00:15.1 [8086/a0e9] enabled
851 11:13:31.043113 PCI: 00:15.2 [8086/0000] bus ops
852 11:13:31.046510 PCI: 00:15.2 [8086/a0ea] enabled
853 11:13:31.049723 PCI: 00:15.3 [8086/0000] bus ops
854 11:13:31.053032 PCI: 00:15.3 [8086/a0eb] enabled
855 11:13:31.056450 PCI: 00:16.0 [8086/0000] ops
856 11:13:31.059414 PCI: 00:16.0 [8086/a0e0] enabled
857 11:13:31.066802 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 11:13:31.069704 PCI: 00:19.0 [8086/0000] bus ops
859 11:13:31.072862 PCI: 00:19.0 [8086/a0c5] disabled
860 11:13:31.076389 PCI: 00:19.1 [8086/0000] bus ops
861 11:13:31.079609 PCI: 00:19.1 [8086/a0c6] enabled
862 11:13:31.082867 PCI: 00:1d.0 [8086/0000] bus ops
863 11:13:31.086272 PCI: 00:1d.0 [8086/a0b0] enabled
864 11:13:31.089336 PCI: 00:1e.0 [8086/0000] ops
865 11:13:31.092932 PCI: 00:1e.0 [8086/a0a8] enabled
866 11:13:31.096084 PCI: 00:1e.2 [8086/0000] bus ops
867 11:13:31.099309 PCI: 00:1e.2 [8086/a0aa] enabled
868 11:13:31.103031 PCI: 00:1e.3 [8086/0000] bus ops
869 11:13:31.106043 PCI: 00:1e.3 [8086/a0ab] enabled
870 11:13:31.109706 PCI: 00:1f.0 [8086/0000] bus ops
871 11:13:31.113078 PCI: 00:1f.0 [8086/a087] enabled
872 11:13:31.113507 RTC Init
873 11:13:31.116037 Set power on after power failure.
874 11:13:31.119532 Disabling Deep S3
875 11:13:31.119950 Disabling Deep S3
876 11:13:31.123041 Disabling Deep S4
877 11:13:31.123462 Disabling Deep S4
878 11:13:31.126056 Disabling Deep S5
879 11:13:31.126509 Disabling Deep S5
880 11:13:31.129258 PCI: 00:1f.2 [0000/0000] hidden
881 11:13:31.133056 PCI: 00:1f.3 [8086/0000] bus ops
882 11:13:31.136380 PCI: 00:1f.3 [8086/a0c8] enabled
883 11:13:31.139841 PCI: 00:1f.5 [8086/0000] bus ops
884 11:13:31.142952 PCI: 00:1f.5 [8086/a0a4] enabled
885 11:13:31.146049 PCI: Leftover static devices:
886 11:13:31.149919 PCI: 00:10.2
887 11:13:31.150475 PCI: 00:10.6
888 11:13:31.152912 PCI: 00:10.7
889 11:13:31.153329 PCI: 00:06.0
890 11:13:31.153662 PCI: 00:07.1
891 11:13:31.156479 PCI: 00:07.2
892 11:13:31.156900 PCI: 00:07.3
893 11:13:31.159559 PCI: 00:09.0
894 11:13:31.159983 PCI: 00:0d.1
895 11:13:31.160315 PCI: 00:0d.2
896 11:13:31.162784 PCI: 00:0d.3
897 11:13:31.163201 PCI: 00:0e.0
898 11:13:31.166711 PCI: 00:12.0
899 11:13:31.167237 PCI: 00:12.6
900 11:13:31.170003 PCI: 00:13.0
901 11:13:31.170719 PCI: 00:14.1
902 11:13:31.171071 PCI: 00:16.1
903 11:13:31.173303 PCI: 00:16.2
904 11:13:31.173817 PCI: 00:16.3
905 11:13:31.176392 PCI: 00:16.4
906 11:13:31.176813 PCI: 00:16.5
907 11:13:31.177147 PCI: 00:17.0
908 11:13:31.180053 PCI: 00:19.2
909 11:13:31.180574 PCI: 00:1e.1
910 11:13:31.183054 PCI: 00:1f.1
911 11:13:31.183474 PCI: 00:1f.4
912 11:13:31.183807 PCI: 00:1f.6
913 11:13:31.186534 PCI: 00:1f.7
914 11:13:31.189859 PCI: Check your devicetree.cb.
915 11:13:31.193243 PCI: 00:02.0 scanning...
916 11:13:31.196637 scan_generic_bus for PCI: 00:02.0
917 11:13:31.199749 scan_generic_bus for PCI: 00:02.0 done
918 11:13:31.203161 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 11:13:31.206306 PCI: 00:04.0 scanning...
920 11:13:31.209799 scan_generic_bus for PCI: 00:04.0
921 11:13:31.213067 GENERIC: 0.0 enabled
922 11:13:31.219473 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 11:13:31.222776 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 11:13:31.225961 PCI: 00:0d.0 scanning...
925 11:13:31.229266 scan_static_bus for PCI: 00:0d.0
926 11:13:31.229703 USB0 port 0 enabled
927 11:13:31.232401 USB0 port 0 scanning...
928 11:13:31.236354 scan_static_bus for USB0 port 0
929 11:13:31.239473 USB3 port 0 enabled
930 11:13:31.239911 USB3 port 1 enabled
931 11:13:31.242856 USB3 port 2 disabled
932 11:13:31.246232 USB3 port 3 disabled
933 11:13:31.249240 USB3 port 0 scanning...
934 11:13:31.252989 scan_static_bus for USB3 port 0
935 11:13:31.256792 scan_static_bus for USB3 port 0 done
936 11:13:31.259214 scan_bus: bus USB3 port 0 finished in 6 msecs
937 11:13:31.262963 USB3 port 1 scanning...
938 11:13:31.266246 scan_static_bus for USB3 port 1
939 11:13:31.269514 scan_static_bus for USB3 port 1 done
940 11:13:31.273135 scan_bus: bus USB3 port 1 finished in 6 msecs
941 11:13:31.276154 scan_static_bus for USB0 port 0 done
942 11:13:31.282948 scan_bus: bus USB0 port 0 finished in 43 msecs
943 11:13:31.286337 scan_static_bus for PCI: 00:0d.0 done
944 11:13:31.289624 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 11:13:31.292768 PCI: 00:14.0 scanning...
946 11:13:31.296442 scan_static_bus for PCI: 00:14.0
947 11:13:31.299587 USB0 port 0 enabled
948 11:13:31.302409 USB0 port 0 scanning...
949 11:13:31.306169 scan_static_bus for USB0 port 0
950 11:13:31.306649 USB2 port 0 disabled
951 11:13:31.309684 USB2 port 1 enabled
952 11:13:31.312878 USB2 port 2 enabled
953 11:13:31.313403 USB2 port 3 disabled
954 11:13:31.315972 USB2 port 4 enabled
955 11:13:31.316499 USB2 port 5 disabled
956 11:13:31.319398 USB2 port 6 disabled
957 11:13:31.323014 USB2 port 7 disabled
958 11:13:31.323579 USB2 port 8 disabled
959 11:13:31.325744 USB2 port 9 disabled
960 11:13:31.329357 USB3 port 0 disabled
961 11:13:31.329906 USB3 port 1 enabled
962 11:13:31.332677 USB3 port 2 disabled
963 11:13:31.336260 USB3 port 3 disabled
964 11:13:31.336794 USB2 port 1 scanning...
965 11:13:31.339202 scan_static_bus for USB2 port 1
966 11:13:31.342461 scan_static_bus for USB2 port 1 done
967 11:13:31.349626 scan_bus: bus USB2 port 1 finished in 6 msecs
968 11:13:31.352541 USB2 port 2 scanning...
969 11:13:31.356107 scan_static_bus for USB2 port 2
970 11:13:31.359050 scan_static_bus for USB2 port 2 done
971 11:13:31.362395 scan_bus: bus USB2 port 2 finished in 6 msecs
972 11:13:31.366012 USB2 port 4 scanning...
973 11:13:31.369231 scan_static_bus for USB2 port 4
974 11:13:31.372520 scan_static_bus for USB2 port 4 done
975 11:13:31.375692 scan_bus: bus USB2 port 4 finished in 6 msecs
976 11:13:31.378885 USB3 port 1 scanning...
977 11:13:31.382364 scan_static_bus for USB3 port 1
978 11:13:31.385756 scan_static_bus for USB3 port 1 done
979 11:13:31.392202 scan_bus: bus USB3 port 1 finished in 6 msecs
980 11:13:31.396366 scan_static_bus for USB0 port 0 done
981 11:13:31.399347 scan_bus: bus USB0 port 0 finished in 93 msecs
982 11:13:31.402379 scan_static_bus for PCI: 00:14.0 done
983 11:13:31.409114 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
984 11:13:31.412404 PCI: 00:14.3 scanning...
985 11:13:31.415533 scan_static_bus for PCI: 00:14.3
986 11:13:31.415959 GENERIC: 0.0 enabled
987 11:13:31.419105 scan_static_bus for PCI: 00:14.3 done
988 11:13:31.425970 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 11:13:31.429279 PCI: 00:15.0 scanning...
990 11:13:31.432687 scan_static_bus for PCI: 00:15.0
991 11:13:31.433209 I2C: 00:1a enabled
992 11:13:31.435988 I2C: 00:31 enabled
993 11:13:31.436409 I2C: 00:32 enabled
994 11:13:31.442486 scan_static_bus for PCI: 00:15.0 done
995 11:13:31.445958 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 11:13:31.448921 PCI: 00:15.1 scanning...
997 11:13:31.452399 scan_static_bus for PCI: 00:15.1
998 11:13:31.452915 I2C: 00:10 enabled
999 11:13:31.459199 scan_static_bus for PCI: 00:15.1 done
1000 11:13:31.462845 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 11:13:31.465788 PCI: 00:15.2 scanning...
1002 11:13:31.469176 scan_static_bus for PCI: 00:15.2
1003 11:13:31.472951 scan_static_bus for PCI: 00:15.2 done
1004 11:13:31.476046 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 11:13:31.479057 PCI: 00:15.3 scanning...
1006 11:13:31.482556 scan_static_bus for PCI: 00:15.3
1007 11:13:31.486018 scan_static_bus for PCI: 00:15.3 done
1008 11:13:31.492126 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 11:13:31.495732 PCI: 00:19.1 scanning...
1010 11:13:31.498863 scan_static_bus for PCI: 00:19.1
1011 11:13:31.499419 I2C: 00:15 enabled
1012 11:13:31.502518 scan_static_bus for PCI: 00:19.1 done
1013 11:13:31.508564 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 11:13:31.512478 PCI: 00:1d.0 scanning...
1015 11:13:31.515251 do_pci_scan_bridge for PCI: 00:1d.0
1016 11:13:31.518838 PCI: pci_scan_bus for bus 01
1017 11:13:31.521932 PCI: 01:00.0 [1c5c/174a] enabled
1018 11:13:31.522538 GENERIC: 0.0 enabled
1019 11:13:31.525661 Enabling Common Clock Configuration
1020 11:13:31.531953 L1 Sub-State supported from root port 29
1021 11:13:31.535624 L1 Sub-State Support = 0xf
1022 11:13:31.536154 CommonModeRestoreTime = 0x28
1023 11:13:31.542082 Power On Value = 0x16, Power On Scale = 0x0
1024 11:13:31.542717 ASPM: Enabled L1
1025 11:13:31.545274 PCIe: Max_Payload_Size adjusted to 128
1026 11:13:31.551788 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 11:13:31.555369 PCI: 00:1e.2 scanning...
1028 11:13:31.558493 scan_generic_bus for PCI: 00:1e.2
1029 11:13:31.558916 SPI: 00 enabled
1030 11:13:31.565045 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 11:13:31.571648 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 11:13:31.572077 PCI: 00:1e.3 scanning...
1033 11:13:31.575395 scan_generic_bus for PCI: 00:1e.3
1034 11:13:31.578311 SPI: 00 enabled
1035 11:13:31.585359 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 11:13:31.588471 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 11:13:31.591327 PCI: 00:1f.0 scanning...
1038 11:13:31.594991 scan_static_bus for PCI: 00:1f.0
1039 11:13:31.598918 PNP: 0c09.0 enabled
1040 11:13:31.599442 PNP: 0c09.0 scanning...
1041 11:13:31.601636 scan_static_bus for PNP: 0c09.0
1042 11:13:31.608209 scan_static_bus for PNP: 0c09.0 done
1043 11:13:31.611685 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 11:13:31.614755 scan_static_bus for PCI: 00:1f.0 done
1045 11:13:31.621201 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 11:13:31.621624 PCI: 00:1f.2 scanning...
1047 11:13:31.624771 scan_static_bus for PCI: 00:1f.2
1048 11:13:31.628401 GENERIC: 0.0 enabled
1049 11:13:31.631473 GENERIC: 0.0 scanning...
1050 11:13:31.634783 scan_static_bus for GENERIC: 0.0
1051 11:13:31.638262 GENERIC: 0.0 enabled
1052 11:13:31.638836 GENERIC: 1.0 enabled
1053 11:13:31.641199 scan_static_bus for GENERIC: 0.0 done
1054 11:13:31.648227 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 11:13:31.651147 scan_static_bus for PCI: 00:1f.2 done
1056 11:13:31.654618 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 11:13:31.657999 PCI: 00:1f.3 scanning...
1058 11:13:31.661654 scan_static_bus for PCI: 00:1f.3
1059 11:13:31.664581 scan_static_bus for PCI: 00:1f.3 done
1060 11:13:31.671319 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 11:13:31.671835 PCI: 00:1f.5 scanning...
1062 11:13:31.678502 scan_generic_bus for PCI: 00:1f.5
1063 11:13:31.681872 scan_generic_bus for PCI: 00:1f.5 done
1064 11:13:31.684542 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 11:13:31.691446 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 11:13:31.694889 scan_static_bus for Root Device done
1067 11:13:31.698510 scan_bus: bus Root Device finished in 736 msecs
1068 11:13:31.699034 done
1069 11:13:31.704868 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 11:13:31.708431 Chrome EC: UHEPI supported
1071 11:13:31.714886 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 11:13:31.721447 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 11:13:31.724647 SPI flash protection: WPSW=1 SRP0=0
1074 11:13:31.728316 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 11:13:31.734832 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 11:13:31.738383 found VGA at PCI: 00:02.0
1077 11:13:31.740971 Setting up VGA for PCI: 00:02.0
1078 11:13:31.747783 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 11:13:31.751389 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 11:13:31.754149 Allocating resources...
1081 11:13:31.754621 Reading resources...
1082 11:13:31.760690 Root Device read_resources bus 0 link: 0
1083 11:13:31.764228 DOMAIN: 0000 read_resources bus 0 link: 0
1084 11:13:31.771044 PCI: 00:04.0 read_resources bus 1 link: 0
1085 11:13:31.774371 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 11:13:31.780740 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 11:13:31.784294 USB0 port 0 read_resources bus 0 link: 0
1088 11:13:31.787484 USB0 port 0 read_resources bus 0 link: 0 done
1089 11:13:31.794345 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 11:13:31.797689 PCI: 00:14.0 read_resources bus 0 link: 0
1091 11:13:31.804549 USB0 port 0 read_resources bus 0 link: 0
1092 11:13:31.807759 USB0 port 0 read_resources bus 0 link: 0 done
1093 11:13:31.814572 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 11:13:31.817669 PCI: 00:14.3 read_resources bus 0 link: 0
1095 11:13:31.824685 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 11:13:31.827850 PCI: 00:15.0 read_resources bus 0 link: 0
1097 11:13:31.834243 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 11:13:31.838223 PCI: 00:15.1 read_resources bus 0 link: 0
1099 11:13:31.844218 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 11:13:31.847866 PCI: 00:19.1 read_resources bus 0 link: 0
1101 11:13:31.855112 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 11:13:31.857386 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 11:13:31.864352 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 11:13:31.867557 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 11:13:31.874263 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 11:13:31.877864 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 11:13:31.884887 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 11:13:31.887903 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 11:13:31.894898 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 11:13:31.897753 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 11:13:31.900731 GENERIC: 0.0 read_resources bus 0 link: 0
1112 11:13:31.908394 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 11:13:31.911667 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 11:13:31.918243 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 11:13:31.921930 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 11:13:31.928522 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 11:13:31.932142 Root Device read_resources bus 0 link: 0 done
1118 11:13:31.935199 Done reading resources.
1119 11:13:31.941570 Show resources in subtree (Root Device)...After reading.
1120 11:13:31.945206 Root Device child on link 0 DOMAIN: 0000
1121 11:13:31.948369 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 11:13:31.958195 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 11:13:31.968252 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 11:13:31.971457 PCI: 00:00.0
1125 11:13:31.978502 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 11:13:31.988449 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 11:13:31.998353 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 11:13:32.008283 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 11:13:32.018038 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 11:13:32.027947 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 11:13:32.034738 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 11:13:32.044768 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 11:13:32.054505 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 11:13:32.064964 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 11:13:32.074893 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 11:13:32.084546 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 11:13:32.091453 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 11:13:32.101191 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 11:13:32.111119 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 11:13:32.121008 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 11:13:32.131038 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 11:13:32.140869 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 11:13:32.147622 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 11:13:32.157970 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 11:13:32.161163 PCI: 00:02.0
1146 11:13:32.171012 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 11:13:32.181160 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 11:13:32.190457 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 11:13:32.193669 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 11:13:32.203935 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 11:13:32.207357 GENERIC: 0.0
1152 11:13:32.207932 PCI: 00:05.0
1153 11:13:32.217049 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 11:13:32.220348 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 11:13:32.223961 GENERIC: 0.0
1156 11:13:32.224385 PCI: 00:08.0
1157 11:13:32.233920 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 11:13:32.236938 PCI: 00:0a.0
1159 11:13:32.240876 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 11:13:32.250629 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 11:13:32.257398 USB0 port 0 child on link 0 USB3 port 0
1162 11:13:32.257919 USB3 port 0
1163 11:13:32.260166 USB3 port 1
1164 11:13:32.260677 USB3 port 2
1165 11:13:32.263812 USB3 port 3
1166 11:13:32.267003 PCI: 00:14.0 child on link 0 USB0 port 0
1167 11:13:32.277327 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 11:13:32.280356 USB0 port 0 child on link 0 USB2 port 0
1169 11:13:32.283826 USB2 port 0
1170 11:13:32.286923 USB2 port 1
1171 11:13:32.287445 USB2 port 2
1172 11:13:32.289876 USB2 port 3
1173 11:13:32.290298 USB2 port 4
1174 11:13:32.293146 USB2 port 5
1175 11:13:32.293569 USB2 port 6
1176 11:13:32.296822 USB2 port 7
1177 11:13:32.297336 USB2 port 8
1178 11:13:32.300228 USB2 port 9
1179 11:13:32.300746 USB3 port 0
1180 11:13:32.303619 USB3 port 1
1181 11:13:32.304140 USB3 port 2
1182 11:13:32.306776 USB3 port 3
1183 11:13:32.307296 PCI: 00:14.2
1184 11:13:32.316844 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 11:13:32.326977 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 11:13:32.333104 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 11:13:32.343042 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 11:13:32.343550 GENERIC: 0.0
1189 11:13:32.349794 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 11:13:32.359781 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 11:13:32.360297 I2C: 00:1a
1192 11:13:32.363234 I2C: 00:31
1193 11:13:32.363741 I2C: 00:32
1194 11:13:32.366578 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 11:13:32.376848 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 11:13:32.379571 I2C: 00:10
1197 11:13:32.379988 PCI: 00:15.2
1198 11:13:32.389749 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 11:13:32.392987 PCI: 00:15.3
1200 11:13:32.403146 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 11:13:32.403664 PCI: 00:16.0
1202 11:13:32.413461 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 11:13:32.416267 PCI: 00:19.0
1204 11:13:32.419984 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 11:13:32.429719 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 11:13:32.433245 I2C: 00:15
1207 11:13:32.436472 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 11:13:32.446211 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 11:13:32.456515 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 11:13:32.462382 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 11:13:32.466171 GENERIC: 0.0
1212 11:13:32.466728 PCI: 01:00.0
1213 11:13:32.475770 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 11:13:32.486248 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 11:13:32.495866 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 11:13:32.496285 PCI: 00:1e.0
1217 11:13:32.509130 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 11:13:32.512637 PCI: 00:1e.2 child on link 0 SPI: 00
1219 11:13:32.522636 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 11:13:32.523136 SPI: 00
1221 11:13:32.529102 PCI: 00:1e.3 child on link 0 SPI: 00
1222 11:13:32.539381 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 11:13:32.539901 SPI: 00
1224 11:13:32.542715 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 11:13:32.552253 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 11:13:32.552757 PNP: 0c09.0
1227 11:13:32.562335 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 11:13:32.565892 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 11:13:32.575313 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 11:13:32.585824 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 11:13:32.588574 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 11:13:32.592145 GENERIC: 0.0
1233 11:13:32.595261 GENERIC: 1.0
1234 11:13:32.595767 PCI: 00:1f.3
1235 11:13:32.605458 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 11:13:32.615923 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 11:13:32.619046 PCI: 00:1f.5
1238 11:13:32.625545 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 11:13:32.632118 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 11:13:32.632647 APIC: 00
1241 11:13:32.633094 APIC: 01
1242 11:13:32.635348 APIC: 03
1243 11:13:32.635808 APIC: 04
1244 11:13:32.638639 APIC: 07
1245 11:13:32.639160 APIC: 06
1246 11:13:32.639605 APIC: 02
1247 11:13:32.642288 APIC: 05
1248 11:13:32.648965 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 11:13:32.655354 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 11:13:32.661854 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 11:13:32.665208 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 11:13:32.671584 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 11:13:32.675354 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 11:13:32.678815 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 11:13:32.685065 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 11:13:32.695148 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 11:13:32.701592 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 11:13:32.708211 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 11:13:32.715246 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 11:13:32.721567 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 11:13:32.731759 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 11:13:32.738274 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 11:13:32.741960 DOMAIN: 0000: Resource ranges:
1264 11:13:32.745285 * Base: 1000, Size: 800, Tag: 100
1265 11:13:32.748246 * Base: 1900, Size: e700, Tag: 100
1266 11:13:32.754786 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 11:13:32.761467 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 11:13:32.768533 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 11:13:32.774594 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 11:13:32.781231 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 11:13:32.791190 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 11:13:32.797689 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 11:13:32.804396 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 11:13:32.814523 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 11:13:32.821121 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 11:13:32.828168 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 11:13:32.838131 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 11:13:32.844765 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 11:13:32.851073 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 11:13:32.861100 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 11:13:32.867936 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 11:13:32.874105 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 11:13:32.881136 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 11:13:32.890793 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 11:13:32.897608 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 11:13:32.907324 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 11:13:32.913883 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 11:13:32.920595 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 11:13:32.927129 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 11:13:32.937494 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 11:13:32.940855 DOMAIN: 0000: Resource ranges:
1292 11:13:32.943554 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 11:13:32.946802 * Base: d0000000, Size: 28000000, Tag: 200
1294 11:13:32.954163 * Base: fa000000, Size: 1000000, Tag: 200
1295 11:13:32.957435 * Base: fb001000, Size: 2fff000, Tag: 200
1296 11:13:32.960382 * Base: fe010000, Size: 2e000, Tag: 200
1297 11:13:32.967094 * Base: fe03f000, Size: d41000, Tag: 200
1298 11:13:32.970611 * Base: fed88000, Size: 8000, Tag: 200
1299 11:13:32.973722 * Base: fed93000, Size: d000, Tag: 200
1300 11:13:32.977238 * Base: feda2000, Size: 1e000, Tag: 200
1301 11:13:32.980425 * Base: fede0000, Size: 1220000, Tag: 200
1302 11:13:32.986639 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 11:13:32.993331 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 11:13:33.000585 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 11:13:33.007119 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 11:13:33.013582 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 11:13:33.020288 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 11:13:33.027283 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 11:13:33.033561 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 11:13:33.040290 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 11:13:33.046781 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 11:13:33.053564 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 11:13:33.059991 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 11:13:33.066582 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 11:13:33.073168 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 11:13:33.079954 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 11:13:33.086185 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 11:13:33.093065 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 11:13:33.100172 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 11:13:33.106570 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 11:13:33.113035 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 11:13:33.119735 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 11:13:33.126246 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 11:13:33.133270 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 11:13:33.139518 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 11:13:33.149738 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 11:13:33.153133 PCI: 00:1d.0: Resource ranges:
1328 11:13:33.156214 * Base: 7fc00000, Size: 100000, Tag: 200
1329 11:13:33.162713 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 11:13:33.169493 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 11:13:33.176076 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 11:13:33.183164 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 11:13:33.192655 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 11:13:33.195847 Root Device assign_resources, bus 0 link: 0
1335 11:13:33.199407 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 11:13:33.209089 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 11:13:33.216315 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 11:13:33.226266 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 11:13:33.232605 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 11:13:33.239176 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 11:13:33.242527 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 11:13:33.252526 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 11:13:33.258856 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 11:13:33.268611 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 11:13:33.272406 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 11:13:33.275421 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 11:13:33.285596 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 11:13:33.288544 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 11:13:33.295058 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 11:13:33.301502 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 11:13:33.308197 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 11:13:33.318470 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 11:13:33.321954 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 11:13:33.328487 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 11:13:33.334948 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 11:13:33.342046 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 11:13:33.345346 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 11:13:33.351708 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 11:13:33.358658 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 11:13:33.362028 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 11:13:33.371765 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 11:13:33.378269 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 11:13:33.388212 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 11:13:33.394683 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 11:13:33.401325 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 11:13:33.404743 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 11:13:33.414338 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 11:13:33.424411 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 11:13:33.431246 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 11:13:33.437766 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 11:13:33.444449 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 11:13:33.451389 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 11:13:33.461151 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 11:13:33.463899 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 11:13:33.474407 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 11:13:33.477242 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 11:13:33.484456 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 11:13:33.490954 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 11:13:33.494539 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 11:13:33.500721 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 11:13:33.504144 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 11:13:33.510511 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 11:13:33.514136 LPC: Trying to open IO window from 800 size 1ff
1384 11:13:33.524035 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 11:13:33.531028 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 11:13:33.540198 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 11:13:33.544059 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 11:13:33.547307 Root Device assign_resources, bus 0 link: 0
1389 11:13:33.550867 Done setting resources.
1390 11:13:33.556759 Show resources in subtree (Root Device)...After assigning values.
1391 11:13:33.560877 Root Device child on link 0 DOMAIN: 0000
1392 11:13:33.566952 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 11:13:33.573770 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 11:13:33.583367 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 11:13:33.587413 PCI: 00:00.0
1396 11:13:33.597001 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 11:13:33.607053 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 11:13:33.616727 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 11:13:33.623235 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 11:13:33.633488 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 11:13:33.643299 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 11:13:33.653190 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 11:13:33.663281 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 11:13:33.673226 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 11:13:33.680015 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 11:13:33.689516 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 11:13:33.699750 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 11:13:33.709699 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 11:13:33.716128 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 11:13:33.726333 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 11:13:33.736214 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 11:13:33.745898 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 11:13:33.755981 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 11:13:33.766219 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 11:13:33.775634 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 11:13:33.776150 PCI: 00:02.0
1417 11:13:33.789386 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 11:13:33.798672 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 11:13:33.808865 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 11:13:33.812060 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 11:13:33.822290 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 11:13:33.825249 GENERIC: 0.0
1423 11:13:33.825669 PCI: 00:05.0
1424 11:13:33.835468 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 11:13:33.842078 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 11:13:33.842626 GENERIC: 0.0
1427 11:13:33.845450 PCI: 00:08.0
1428 11:13:33.855140 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 11:13:33.855672 PCI: 00:0a.0
1430 11:13:33.862518 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 11:13:33.872370 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 11:13:33.875410 USB0 port 0 child on link 0 USB3 port 0
1433 11:13:33.879139 USB3 port 0
1434 11:13:33.879653 USB3 port 1
1435 11:13:33.882350 USB3 port 2
1436 11:13:33.882912 USB3 port 3
1437 11:13:33.885565 PCI: 00:14.0 child on link 0 USB0 port 0
1438 11:13:33.898717 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 11:13:33.902112 USB0 port 0 child on link 0 USB2 port 0
1440 11:13:33.902679 USB2 port 0
1441 11:13:33.905481 USB2 port 1
1442 11:13:33.909630 USB2 port 2
1443 11:13:33.910147 USB2 port 3
1444 11:13:33.912069 USB2 port 4
1445 11:13:33.912488 USB2 port 5
1446 11:13:33.915865 USB2 port 6
1447 11:13:33.916379 USB2 port 7
1448 11:13:33.918740 USB2 port 8
1449 11:13:33.919190 USB2 port 9
1450 11:13:33.921663 USB3 port 0
1451 11:13:33.922084 USB3 port 1
1452 11:13:33.925219 USB3 port 2
1453 11:13:33.925789 USB3 port 3
1454 11:13:33.928556 PCI: 00:14.2
1455 11:13:33.938808 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 11:13:33.948939 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 11:13:33.952232 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 11:13:33.965569 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 11:13:33.966100 GENERIC: 0.0
1460 11:13:33.968636 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 11:13:33.981993 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 11:13:33.982550 I2C: 00:1a
1463 11:13:33.982895 I2C: 00:31
1464 11:13:33.985510 I2C: 00:32
1465 11:13:33.988855 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 11:13:33.998565 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 11:13:34.001783 I2C: 00:10
1468 11:13:34.002296 PCI: 00:15.2
1469 11:13:34.011557 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 11:13:34.015376 PCI: 00:15.3
1471 11:13:34.024549 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 11:13:34.028380 PCI: 00:16.0
1473 11:13:34.038226 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 11:13:34.038807 PCI: 00:19.0
1475 11:13:34.041714 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 11:13:34.055416 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 11:13:34.055938 I2C: 00:15
1478 11:13:34.058141 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 11:13:34.068405 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 11:13:34.081524 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 11:13:34.091253 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 11:13:34.091788 GENERIC: 0.0
1483 11:13:34.094816 PCI: 01:00.0
1484 11:13:34.105128 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 11:13:34.114524 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 11:13:34.125211 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 11:13:34.127987 PCI: 00:1e.0
1488 11:13:34.137600 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 11:13:34.141204 PCI: 00:1e.2 child on link 0 SPI: 00
1490 11:13:34.154617 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 11:13:34.155130 SPI: 00
1492 11:13:34.157843 PCI: 00:1e.3 child on link 0 SPI: 00
1493 11:13:34.167911 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 11:13:34.171142 SPI: 00
1495 11:13:34.174672 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 11:13:34.184483 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 11:13:34.185001 PNP: 0c09.0
1498 11:13:34.194249 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 11:13:34.197338 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 11:13:34.207526 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 11:13:34.217914 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 11:13:34.220678 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 11:13:34.224144 GENERIC: 0.0
1504 11:13:34.224666 GENERIC: 1.0
1505 11:13:34.227047 PCI: 00:1f.3
1506 11:13:34.237684 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 11:13:34.247470 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 11:13:34.247986 PCI: 00:1f.5
1509 11:13:34.260712 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 11:13:34.263878 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 11:13:34.264397 APIC: 00
1512 11:13:34.267665 APIC: 01
1513 11:13:34.268178 APIC: 03
1514 11:13:34.268512 APIC: 04
1515 11:13:34.270590 APIC: 07
1516 11:13:34.271103 APIC: 06
1517 11:13:34.273927 APIC: 02
1518 11:13:34.274344 APIC: 05
1519 11:13:34.277082 Done allocating resources.
1520 11:13:34.284383 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 11:13:34.287397 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 11:13:34.293518 Configure GPIOs for I2S audio on UP4.
1523 11:13:34.300383 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 11:13:34.300894 Enabling resources...
1525 11:13:34.307024 PCI: 00:00.0 subsystem <- 8086/9a12
1526 11:13:34.307441 PCI: 00:00.0 cmd <- 06
1527 11:13:34.310813 PCI: 00:02.0 subsystem <- 8086/9a40
1528 11:13:34.313888 PCI: 00:02.0 cmd <- 03
1529 11:13:34.317281 PCI: 00:04.0 subsystem <- 8086/9a03
1530 11:13:34.320506 PCI: 00:04.0 cmd <- 02
1531 11:13:34.323425 PCI: 00:05.0 subsystem <- 8086/9a19
1532 11:13:34.326787 PCI: 00:05.0 cmd <- 02
1533 11:13:34.330739 PCI: 00:08.0 subsystem <- 8086/9a11
1534 11:13:34.333388 PCI: 00:08.0 cmd <- 06
1535 11:13:34.336954 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 11:13:34.340494 PCI: 00:0d.0 cmd <- 02
1537 11:13:34.343757 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 11:13:34.346814 PCI: 00:14.0 cmd <- 02
1539 11:13:34.350165 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 11:13:34.350717 PCI: 00:14.2 cmd <- 02
1541 11:13:34.356783 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 11:13:34.357295 PCI: 00:14.3 cmd <- 02
1543 11:13:34.360151 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 11:13:34.363360 PCI: 00:15.0 cmd <- 02
1545 11:13:34.367087 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 11:13:34.369824 PCI: 00:15.1 cmd <- 02
1547 11:13:34.373585 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 11:13:34.376413 PCI: 00:15.2 cmd <- 02
1549 11:13:34.379724 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 11:13:34.383102 PCI: 00:15.3 cmd <- 02
1551 11:13:34.386817 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 11:13:34.390119 PCI: 00:16.0 cmd <- 02
1553 11:13:34.392904 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 11:13:34.396257 PCI: 00:19.1 cmd <- 02
1555 11:13:34.399897 PCI: 00:1d.0 bridge ctrl <- 0013
1556 11:13:34.403108 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 11:13:34.403622 PCI: 00:1d.0 cmd <- 06
1558 11:13:34.409725 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 11:13:34.410246 PCI: 00:1e.0 cmd <- 06
1560 11:13:34.413213 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 11:13:34.416403 PCI: 00:1e.2 cmd <- 06
1562 11:13:34.419642 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 11:13:34.422745 PCI: 00:1e.3 cmd <- 02
1564 11:13:34.426285 PCI: 00:1f.0 subsystem <- 8086/a087
1565 11:13:34.429348 PCI: 00:1f.0 cmd <- 407
1566 11:13:34.432945 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 11:13:34.435996 PCI: 00:1f.3 cmd <- 02
1568 11:13:34.439219 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 11:13:34.442827 PCI: 00:1f.5 cmd <- 406
1570 11:13:34.446022 PCI: 01:00.0 cmd <- 02
1571 11:13:34.451293 done.
1572 11:13:34.454166 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 11:13:34.457362 Initializing devices...
1574 11:13:34.460563 Root Device init
1575 11:13:34.463771 Chrome EC: Set SMI mask to 0x0000000000000000
1576 11:13:34.470450 Chrome EC: clear events_b mask to 0x0000000000000000
1577 11:13:34.477128 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 11:13:34.480065 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 11:13:34.487312 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 11:13:34.493601 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 11:13:34.496918 fw_config match found: DB_USB=USB3_ACTIVE
1582 11:13:34.503764 Configure Right Type-C port orientation for retimer
1583 11:13:34.506561 Root Device init finished in 43 msecs
1584 11:13:34.510244 PCI: 00:00.0 init
1585 11:13:34.513417 CPU TDP = 9 Watts
1586 11:13:34.513840 CPU PL1 = 9 Watts
1587 11:13:34.516880 CPU PL2 = 40 Watts
1588 11:13:34.517395 CPU PL4 = 83 Watts
1589 11:13:34.523732 PCI: 00:00.0 init finished in 8 msecs
1590 11:13:34.524152 PCI: 00:02.0 init
1591 11:13:34.527004 GMA: Found VBT in CBFS
1592 11:13:34.530658 GMA: Found valid VBT in CBFS
1593 11:13:34.536592 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 11:13:34.543363 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 11:13:34.546829 PCI: 00:02.0 init finished in 18 msecs
1596 11:13:34.550206 PCI: 00:05.0 init
1597 11:13:34.553559 PCI: 00:05.0 init finished in 0 msecs
1598 11:13:34.556740 PCI: 00:08.0 init
1599 11:13:34.559990 PCI: 00:08.0 init finished in 0 msecs
1600 11:13:34.563355 PCI: 00:14.0 init
1601 11:13:34.566703 PCI: 00:14.0 init finished in 0 msecs
1602 11:13:34.567129 PCI: 00:14.2 init
1603 11:13:34.573258 PCI: 00:14.2 init finished in 0 msecs
1604 11:13:34.573766 PCI: 00:15.0 init
1605 11:13:34.577122 I2C bus 0 version 0x3230302a
1606 11:13:34.580133 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 11:13:34.583238 PCI: 00:15.0 init finished in 6 msecs
1608 11:13:34.586992 PCI: 00:15.1 init
1609 11:13:34.590149 I2C bus 1 version 0x3230302a
1610 11:13:34.593168 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 11:13:34.596540 PCI: 00:15.1 init finished in 6 msecs
1612 11:13:34.600235 PCI: 00:15.2 init
1613 11:13:34.603146 I2C bus 2 version 0x3230302a
1614 11:13:34.607316 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 11:13:34.610228 PCI: 00:15.2 init finished in 6 msecs
1616 11:13:34.613115 PCI: 00:15.3 init
1617 11:13:34.616674 I2C bus 3 version 0x3230302a
1618 11:13:34.620370 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 11:13:34.623721 PCI: 00:15.3 init finished in 6 msecs
1620 11:13:34.624236 PCI: 00:16.0 init
1621 11:13:34.630204 PCI: 00:16.0 init finished in 0 msecs
1622 11:13:34.630763 PCI: 00:19.1 init
1623 11:13:34.633277 I2C bus 5 version 0x3230302a
1624 11:13:34.636702 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 11:13:34.639891 PCI: 00:19.1 init finished in 6 msecs
1626 11:13:34.643519 PCI: 00:1d.0 init
1627 11:13:34.647012 Initializing PCH PCIe bridge.
1628 11:13:34.650758 PCI: 00:1d.0 init finished in 3 msecs
1629 11:13:34.653839 PCI: 00:1f.0 init
1630 11:13:34.656893 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 11:13:34.663479 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 11:13:34.664170 IOAPIC: ID = 0x02
1633 11:13:34.666655 IOAPIC: Dumping registers
1634 11:13:34.670331 reg 0x0000: 0x02000000
1635 11:13:34.673762 reg 0x0001: 0x00770020
1636 11:13:34.674269 reg 0x0002: 0x00000000
1637 11:13:34.680141 PCI: 00:1f.0 init finished in 21 msecs
1638 11:13:34.680652 PCI: 00:1f.2 init
1639 11:13:34.683494 Disabling ACPI via APMC.
1640 11:13:34.686581 APMC done.
1641 11:13:34.689818 PCI: 00:1f.2 init finished in 5 msecs
1642 11:13:34.701629 PCI: 01:00.0 init
1643 11:13:34.705275 PCI: 01:00.0 init finished in 0 msecs
1644 11:13:34.708453 PNP: 0c09.0 init
1645 11:13:34.711943 Google Chrome EC uptime: 8.408 seconds
1646 11:13:34.718374 Google Chrome AP resets since EC boot: 1
1647 11:13:34.721319 Google Chrome most recent AP reset causes:
1648 11:13:34.725344 0.349: 32775 shutdown: entering G3
1649 11:13:34.731819 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 11:13:34.735141 PNP: 0c09.0 init finished in 22 msecs
1651 11:13:34.740614 Devices initialized
1652 11:13:34.744243 Show all devs... After init.
1653 11:13:34.747354 Root Device: enabled 1
1654 11:13:34.747874 DOMAIN: 0000: enabled 1
1655 11:13:34.750570 CPU_CLUSTER: 0: enabled 1
1656 11:13:34.753862 PCI: 00:00.0: enabled 1
1657 11:13:34.757420 PCI: 00:02.0: enabled 1
1658 11:13:34.757933 PCI: 00:04.0: enabled 1
1659 11:13:34.760873 PCI: 00:05.0: enabled 1
1660 11:13:34.763850 PCI: 00:06.0: enabled 0
1661 11:13:34.767067 PCI: 00:07.0: enabled 0
1662 11:13:34.767478 PCI: 00:07.1: enabled 0
1663 11:13:34.770624 PCI: 00:07.2: enabled 0
1664 11:13:34.773609 PCI: 00:07.3: enabled 0
1665 11:13:34.777381 PCI: 00:08.0: enabled 1
1666 11:13:34.777895 PCI: 00:09.0: enabled 0
1667 11:13:34.780538 PCI: 00:0a.0: enabled 0
1668 11:13:34.783932 PCI: 00:0d.0: enabled 1
1669 11:13:34.787155 PCI: 00:0d.1: enabled 0
1670 11:13:34.787567 PCI: 00:0d.2: enabled 0
1671 11:13:34.790383 PCI: 00:0d.3: enabled 0
1672 11:13:34.793942 PCI: 00:0e.0: enabled 0
1673 11:13:34.794498 PCI: 00:10.2: enabled 1
1674 11:13:34.797180 PCI: 00:10.6: enabled 0
1675 11:13:34.800285 PCI: 00:10.7: enabled 0
1676 11:13:34.804106 PCI: 00:12.0: enabled 0
1677 11:13:34.804632 PCI: 00:12.6: enabled 0
1678 11:13:34.807232 PCI: 00:13.0: enabled 0
1679 11:13:34.810498 PCI: 00:14.0: enabled 1
1680 11:13:34.813881 PCI: 00:14.1: enabled 0
1681 11:13:34.814455 PCI: 00:14.2: enabled 1
1682 11:13:34.817181 PCI: 00:14.3: enabled 1
1683 11:13:34.820240 PCI: 00:15.0: enabled 1
1684 11:13:34.823564 PCI: 00:15.1: enabled 1
1685 11:13:34.824075 PCI: 00:15.2: enabled 1
1686 11:13:34.826906 PCI: 00:15.3: enabled 1
1687 11:13:34.830092 PCI: 00:16.0: enabled 1
1688 11:13:34.830534 PCI: 00:16.1: enabled 0
1689 11:13:34.833665 PCI: 00:16.2: enabled 0
1690 11:13:34.836854 PCI: 00:16.3: enabled 0
1691 11:13:34.840275 PCI: 00:16.4: enabled 0
1692 11:13:34.840695 PCI: 00:16.5: enabled 0
1693 11:13:34.843811 PCI: 00:17.0: enabled 0
1694 11:13:34.847065 PCI: 00:19.0: enabled 0
1695 11:13:34.850373 PCI: 00:19.1: enabled 1
1696 11:13:34.850920 PCI: 00:19.2: enabled 0
1697 11:13:34.853726 PCI: 00:1c.0: enabled 1
1698 11:13:34.856811 PCI: 00:1c.1: enabled 0
1699 11:13:34.860249 PCI: 00:1c.2: enabled 0
1700 11:13:34.860765 PCI: 00:1c.3: enabled 0
1701 11:13:34.863451 PCI: 00:1c.4: enabled 0
1702 11:13:34.866768 PCI: 00:1c.5: enabled 0
1703 11:13:34.870280 PCI: 00:1c.6: enabled 1
1704 11:13:34.870861 PCI: 00:1c.7: enabled 0
1705 11:13:34.873904 PCI: 00:1d.0: enabled 1
1706 11:13:34.876886 PCI: 00:1d.1: enabled 0
1707 11:13:34.877402 PCI: 00:1d.2: enabled 1
1708 11:13:34.880257 PCI: 00:1d.3: enabled 0
1709 11:13:34.883427 PCI: 00:1e.0: enabled 1
1710 11:13:34.886819 PCI: 00:1e.1: enabled 0
1711 11:13:34.887492 PCI: 00:1e.2: enabled 1
1712 11:13:34.889969 PCI: 00:1e.3: enabled 1
1713 11:13:34.893385 PCI: 00:1f.0: enabled 1
1714 11:13:34.896832 PCI: 00:1f.1: enabled 0
1715 11:13:34.897216 PCI: 00:1f.2: enabled 1
1716 11:13:34.900288 PCI: 00:1f.3: enabled 1
1717 11:13:34.903224 PCI: 00:1f.4: enabled 0
1718 11:13:34.906552 PCI: 00:1f.5: enabled 1
1719 11:13:34.906972 PCI: 00:1f.6: enabled 0
1720 11:13:34.910099 PCI: 00:1f.7: enabled 0
1721 11:13:34.913445 APIC: 00: enabled 1
1722 11:13:34.913989 GENERIC: 0.0: enabled 1
1723 11:13:34.916672 GENERIC: 0.0: enabled 1
1724 11:13:34.920078 GENERIC: 1.0: enabled 1
1725 11:13:34.923084 GENERIC: 0.0: enabled 1
1726 11:13:34.923501 GENERIC: 1.0: enabled 1
1727 11:13:34.926615 USB0 port 0: enabled 1
1728 11:13:34.929916 GENERIC: 0.0: enabled 1
1729 11:13:34.930476 USB0 port 0: enabled 1
1730 11:13:34.933522 GENERIC: 0.0: enabled 1
1731 11:13:34.936585 I2C: 00:1a: enabled 1
1732 11:13:34.939776 I2C: 00:31: enabled 1
1733 11:13:34.940193 I2C: 00:32: enabled 1
1734 11:13:34.943323 I2C: 00:10: enabled 1
1735 11:13:34.946669 I2C: 00:15: enabled 1
1736 11:13:34.947178 GENERIC: 0.0: enabled 0
1737 11:13:34.949899 GENERIC: 1.0: enabled 0
1738 11:13:34.953235 GENERIC: 0.0: enabled 1
1739 11:13:34.953811 SPI: 00: enabled 1
1740 11:13:34.957206 SPI: 00: enabled 1
1741 11:13:34.959896 PNP: 0c09.0: enabled 1
1742 11:13:34.960400 GENERIC: 0.0: enabled 1
1743 11:13:34.962761 USB3 port 0: enabled 1
1744 11:13:34.966063 USB3 port 1: enabled 1
1745 11:13:34.970037 USB3 port 2: enabled 0
1746 11:13:34.970588 USB3 port 3: enabled 0
1747 11:13:34.973282 USB2 port 0: enabled 0
1748 11:13:34.976132 USB2 port 1: enabled 1
1749 11:13:34.976553 USB2 port 2: enabled 1
1750 11:13:34.979965 USB2 port 3: enabled 0
1751 11:13:34.983203 USB2 port 4: enabled 1
1752 11:13:34.983716 USB2 port 5: enabled 0
1753 11:13:34.986595 USB2 port 6: enabled 0
1754 11:13:34.989829 USB2 port 7: enabled 0
1755 11:13:34.992868 USB2 port 8: enabled 0
1756 11:13:34.993374 USB2 port 9: enabled 0
1757 11:13:34.996142 USB3 port 0: enabled 0
1758 11:13:34.999566 USB3 port 1: enabled 1
1759 11:13:34.999980 USB3 port 2: enabled 0
1760 11:13:35.002899 USB3 port 3: enabled 0
1761 11:13:35.006405 GENERIC: 0.0: enabled 1
1762 11:13:35.009277 GENERIC: 1.0: enabled 1
1763 11:13:35.009785 APIC: 01: enabled 1
1764 11:13:35.013124 APIC: 03: enabled 1
1765 11:13:35.013641 APIC: 04: enabled 1
1766 11:13:35.016565 APIC: 07: enabled 1
1767 11:13:35.019537 APIC: 06: enabled 1
1768 11:13:35.019955 APIC: 02: enabled 1
1769 11:13:35.023315 APIC: 05: enabled 1
1770 11:13:35.026255 PCI: 01:00.0: enabled 1
1771 11:13:35.029542 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1772 11:13:35.036136 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 11:13:35.039745 ELOG: NV offset 0xf30000 size 0x1000
1774 11:13:35.046221 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 11:13:35.052948 ELOG: Event(17) added with size 13 at 2023-08-01 11:13:35 UTC
1776 11:13:35.059657 ELOG: Event(92) added with size 9 at 2023-08-01 11:13:35 UTC
1777 11:13:35.066156 ELOG: Event(93) added with size 9 at 2023-08-01 11:13:35 UTC
1778 11:13:35.072673 ELOG: Event(9E) added with size 10 at 2023-08-01 11:13:35 UTC
1779 11:13:35.079499 ELOG: Event(9F) added with size 14 at 2023-08-01 11:13:35 UTC
1780 11:13:35.085729 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 11:13:35.089297 ELOG: Event(A1) added with size 10 at 2023-08-01 11:13:35 UTC
1782 11:13:35.095938 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1783 11:13:35.102508 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1784 11:13:35.105657 Finalize devices...
1785 11:13:35.106081 Devices finalized
1786 11:13:35.112939 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1787 11:13:35.115351 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1788 11:13:35.122551 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1789 11:13:35.128754 ME: HFSTS1 : 0x80030055
1790 11:13:35.132319 ME: HFSTS2 : 0x30280116
1791 11:13:35.135386 ME: HFSTS3 : 0x00000050
1792 11:13:35.142242 ME: HFSTS4 : 0x00004000
1793 11:13:35.145506 ME: HFSTS5 : 0x00000000
1794 11:13:35.148549 ME: HFSTS6 : 0x00400006
1795 11:13:35.155462 ME: Manufacturing Mode : YES
1796 11:13:35.158328 ME: SPI Protection Mode Enabled : NO
1797 11:13:35.161707 ME: FW Partition Table : OK
1798 11:13:35.165254 ME: Bringup Loader Failure : NO
1799 11:13:35.168761 ME: Firmware Init Complete : NO
1800 11:13:35.171980 ME: Boot Options Present : NO
1801 11:13:35.175374 ME: Update In Progress : NO
1802 11:13:35.178819 ME: D0i3 Support : YES
1803 11:13:35.185371 ME: Low Power State Enabled : NO
1804 11:13:35.188426 ME: CPU Replaced : YES
1805 11:13:35.191840 ME: CPU Replacement Valid : YES
1806 11:13:35.195058 ME: Current Working State : 5
1807 11:13:35.198158 ME: Current Operation State : 1
1808 11:13:35.201871 ME: Current Operation Mode : 3
1809 11:13:35.205178 ME: Error Code : 0
1810 11:13:35.208597 ME: Enhanced Debug Mode : NO
1811 11:13:35.211851 ME: CPU Debug Disabled : YES
1812 11:13:35.218357 ME: TXT Support : NO
1813 11:13:35.221725 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1814 11:13:35.231311 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1815 11:13:35.234734 CBFS: 'fallback/slic' not found.
1816 11:13:35.238209 ACPI: Writing ACPI tables at 76b01000.
1817 11:13:35.238764 ACPI: * FACS
1818 11:13:35.241535 ACPI: * DSDT
1819 11:13:35.245148 Ramoops buffer: 0x100000@0x76a00000.
1820 11:13:35.248003 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1821 11:13:35.255076 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1822 11:13:35.258576 Google Chrome EC: version:
1823 11:13:35.261436 ro: voema_v2.0.7540-147f8d37d1
1824 11:13:35.264847 rw: voema_v2.0.7540-147f8d37d1
1825 11:13:35.265360 running image: 2
1826 11:13:35.271614 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1827 11:13:35.276883 ACPI: * FADT
1828 11:13:35.277391 SCI is IRQ9
1829 11:13:35.283461 ACPI: added table 1/32, length now 40
1830 11:13:35.283972 ACPI: * SSDT
1831 11:13:35.286656 Found 1 CPU(s) with 8 core(s) each.
1832 11:13:35.294046 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1833 11:13:35.296504 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1834 11:13:35.299844 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1835 11:13:35.303489 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1836 11:13:35.309845 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1837 11:13:35.316383 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1838 11:13:35.319847 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1839 11:13:35.326821 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1840 11:13:35.333289 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1841 11:13:35.336073 \_SB.PCI0.RP09: Added StorageD3Enable property
1842 11:13:35.339729 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1843 11:13:35.346158 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1844 11:13:35.352930 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1845 11:13:35.356374 PS2K: Passing 80 keymaps to kernel
1846 11:13:35.363063 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1847 11:13:35.369454 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1848 11:13:35.376530 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1849 11:13:35.382805 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1850 11:13:35.389271 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1851 11:13:35.396182 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1852 11:13:35.402467 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1853 11:13:35.409097 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1854 11:13:35.412710 ACPI: added table 2/32, length now 44
1855 11:13:35.413391 ACPI: * MCFG
1856 11:13:35.416062 ACPI: added table 3/32, length now 48
1857 11:13:35.419355 ACPI: * TPM2
1858 11:13:35.422874 TPM2 log created at 0x769f0000
1859 11:13:35.425684 ACPI: added table 4/32, length now 52
1860 11:13:35.426199 ACPI: * MADT
1861 11:13:35.428569 SCI is IRQ9
1862 11:13:35.431828 ACPI: added table 5/32, length now 56
1863 11:13:35.435726 current = 76b09850
1864 11:13:35.436137 ACPI: * DMAR
1865 11:13:35.438824 ACPI: added table 6/32, length now 60
1866 11:13:35.442130 ACPI: added table 7/32, length now 64
1867 11:13:35.445364 ACPI: * HPET
1868 11:13:35.448933 ACPI: added table 8/32, length now 68
1869 11:13:35.449372 ACPI: done.
1870 11:13:35.451693 ACPI tables: 35216 bytes.
1871 11:13:35.455215 smbios_write_tables: 769ef000
1872 11:13:35.458958 EC returned error result code 3
1873 11:13:35.462527 Couldn't obtain OEM name from CBI
1874 11:13:35.465460 Create SMBIOS type 16
1875 11:13:35.468965 Create SMBIOS type 17
1876 11:13:35.471828 GENERIC: 0.0 (WIFI Device)
1877 11:13:35.472245 SMBIOS tables: 1750 bytes.
1878 11:13:35.478578 Writing table forward entry at 0x00000500
1879 11:13:35.485736 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1880 11:13:35.488811 Writing coreboot table at 0x76b25000
1881 11:13:35.495608 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1882 11:13:35.499201 1. 0000000000001000-000000000009ffff: RAM
1883 11:13:35.502144 2. 00000000000a0000-00000000000fffff: RESERVED
1884 11:13:35.508883 3. 0000000000100000-00000000769eefff: RAM
1885 11:13:35.511641 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1886 11:13:35.518487 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1887 11:13:35.525520 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1888 11:13:35.528458 7. 0000000077000000-000000007fbfffff: RESERVED
1889 11:13:35.532031 8. 00000000c0000000-00000000cfffffff: RESERVED
1890 11:13:35.538645 9. 00000000f8000000-00000000f9ffffff: RESERVED
1891 11:13:35.542454 10. 00000000fb000000-00000000fb000fff: RESERVED
1892 11:13:35.549135 11. 00000000fe000000-00000000fe00ffff: RESERVED
1893 11:13:35.552096 12. 00000000fed80000-00000000fed87fff: RESERVED
1894 11:13:35.558955 13. 00000000fed90000-00000000fed92fff: RESERVED
1895 11:13:35.561953 14. 00000000feda0000-00000000feda1fff: RESERVED
1896 11:13:35.568609 15. 00000000fedc0000-00000000feddffff: RESERVED
1897 11:13:35.571929 16. 0000000100000000-00000002803fffff: RAM
1898 11:13:35.575214 Passing 4 GPIOs to payload:
1899 11:13:35.578617 NAME | PORT | POLARITY | VALUE
1900 11:13:35.585260 lid | undefined | high | high
1901 11:13:35.588199 power | undefined | high | low
1902 11:13:35.595121 oprom | undefined | high | low
1903 11:13:35.602073 EC in RW | 0x000000e5 | high | high
1904 11:13:35.608415 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 2408
1905 11:13:35.608917 coreboot table: 1576 bytes.
1906 11:13:35.611755 IMD ROOT 0. 0x76fff000 0x00001000
1907 11:13:35.618857 IMD SMALL 1. 0x76ffe000 0x00001000
1908 11:13:35.622041 FSP MEMORY 2. 0x76c4e000 0x003b0000
1909 11:13:35.625192 VPD 3. 0x76c4d000 0x00000367
1910 11:13:35.628501 RO MCACHE 4. 0x76c4c000 0x00000fdc
1911 11:13:35.631713 CONSOLE 5. 0x76c2c000 0x00020000
1912 11:13:35.635432 FMAP 6. 0x76c2b000 0x00000578
1913 11:13:35.639062 TIME STAMP 7. 0x76c2a000 0x00000910
1914 11:13:35.642036 VBOOT WORK 8. 0x76c16000 0x00014000
1915 11:13:35.648917 ROMSTG STCK 9. 0x76c15000 0x00001000
1916 11:13:35.652244 AFTER CAR 10. 0x76c0a000 0x0000b000
1917 11:13:35.655232 RAMSTAGE 11. 0x76b97000 0x00073000
1918 11:13:35.658589 REFCODE 12. 0x76b42000 0x00055000
1919 11:13:35.661665 SMM BACKUP 13. 0x76b32000 0x00010000
1920 11:13:35.665014 4f444749 14. 0x76b30000 0x00002000
1921 11:13:35.668295 EXT VBT15. 0x76b2d000 0x0000219f
1922 11:13:35.671960 COREBOOT 16. 0x76b25000 0x00008000
1923 11:13:35.675270 ACPI 17. 0x76b01000 0x00024000
1924 11:13:35.678621 ACPI GNVS 18. 0x76b00000 0x00001000
1925 11:13:35.685304 RAMOOPS 19. 0x76a00000 0x00100000
1926 11:13:35.688204 TPM2 TCGLOG20. 0x769f0000 0x00010000
1927 11:13:35.692004 SMBIOS 21. 0x769ef000 0x00000800
1928 11:13:35.692515 IMD small region:
1929 11:13:35.698591 IMD ROOT 0. 0x76ffec00 0x00000400
1930 11:13:35.701810 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1931 11:13:35.705047 POWER STATE 2. 0x76ffeb80 0x00000044
1932 11:13:35.708631 ROMSTAGE 3. 0x76ffeb60 0x00000004
1933 11:13:35.711822 MEM INFO 4. 0x76ffe980 0x000001e0
1934 11:13:35.718271 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1935 11:13:35.721475 MTRR: Physical address space:
1936 11:13:35.728370 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1937 11:13:35.736561 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1938 11:13:35.741490 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1939 11:13:35.744867 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1940 11:13:35.751869 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1941 11:13:35.758142 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1942 11:13:35.764827 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1943 11:13:35.768241 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 11:13:35.775329 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 11:13:35.778088 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 11:13:35.781410 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 11:13:35.785338 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 11:13:35.791632 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 11:13:35.794708 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 11:13:35.798006 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 11:13:35.801627 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 11:13:35.805043 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 11:13:35.811372 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 11:13:35.814804 call enable_fixed_mtrr()
1955 11:13:35.817997 CPU physical address size: 39 bits
1956 11:13:35.820923 MTRR: default type WB/UC MTRR counts: 6/6.
1957 11:13:35.824299 MTRR: UC selected as default type.
1958 11:13:35.830928 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1959 11:13:35.837684 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1960 11:13:35.844560 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1961 11:13:35.851055 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1962 11:13:35.857724 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1963 11:13:35.864249 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1964 11:13:35.864807
1965 11:13:35.865153 MTRR check
1966 11:13:35.867622 Fixed MTRRs : Enabled
1967 11:13:35.871286 Variable MTRRs: Enabled
1968 11:13:35.871799
1969 11:13:35.874208 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 11:13:35.877834 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 11:13:35.884468 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 11:13:35.887402 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 11:13:35.891157 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 11:13:35.894307 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 11:13:35.901057 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 11:13:35.904313 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 11:13:35.907355 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 11:13:35.910581 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 11:13:35.917147 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 11:13:35.924031 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1981 11:13:35.924580 call enable_fixed_mtrr()
1982 11:13:35.927208 Checking cr50 for pending updates
1983 11:13:35.930871 CPU physical address size: 39 bits
1984 11:13:35.937829 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 11:13:35.941262 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 11:13:35.944776 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 11:13:35.947980 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 11:13:35.954200 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 11:13:35.957555 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 11:13:35.960911 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 11:13:35.964387 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 11:13:35.971230 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 11:13:35.974336 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 11:13:35.977498 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 11:13:35.981296 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 11:13:35.988023 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 11:13:35.988538 call enable_fixed_mtrr()
1998 11:13:35.994536 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 11:13:35.997793 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 11:13:36.001240 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 11:13:36.004757 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 11:13:36.011207 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 11:13:36.014655 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 11:13:36.017355 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 11:13:36.020774 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 11:13:36.027539 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 11:13:36.031101 CPU physical address size: 39 bits
2008 11:13:36.034079 call enable_fixed_mtrr()
2009 11:13:36.037619 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 11:13:36.041020 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 11:13:36.047544 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 11:13:36.051140 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 11:13:36.054131 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 11:13:36.057320 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 11:13:36.064384 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 11:13:36.067558 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 11:13:36.070515 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 11:13:36.074345 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 11:13:36.080662 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 11:13:36.084160 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 11:13:36.087548 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 11:13:36.090546 call enable_fixed_mtrr()
2023 11:13:36.094579 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 11:13:36.101069 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 11:13:36.104038 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 11:13:36.107296 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 11:13:36.110790 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 11:13:36.114393 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 11:13:36.120977 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 11:13:36.123988 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 11:13:36.127414 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 11:13:36.130790 CPU physical address size: 39 bits
2033 11:13:36.138079 call enable_fixed_mtrr()
2034 11:13:36.141281 MTRR: Fixed MSR 0x250 0x0606060606060606
2035 11:13:36.144338 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 11:13:36.147459 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 11:13:36.154479 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 11:13:36.157448 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 11:13:36.161228 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 11:13:36.164399 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 11:13:36.167590 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 11:13:36.174342 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 11:13:36.177233 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 11:13:36.180536 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 11:13:36.183796 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 11:13:36.191563 MTRR: Fixed MSR 0x258 0x0606060606060606
2047 11:13:36.192062 call enable_fixed_mtrr()
2048 11:13:36.197834 MTRR: Fixed MSR 0x259 0x0000000000000000
2049 11:13:36.201510 MTRR: Fixed MSR 0x268 0x0606060606060606
2050 11:13:36.204549 MTRR: Fixed MSR 0x269 0x0606060606060606
2051 11:13:36.207998 MTRR: Fixed MSR 0x26a 0x0606060606060606
2052 11:13:36.215175 MTRR: Fixed MSR 0x26b 0x0606060606060606
2053 11:13:36.217913 MTRR: Fixed MSR 0x26c 0x0606060606060606
2054 11:13:36.221631 MTRR: Fixed MSR 0x26d 0x0606060606060606
2055 11:13:36.224657 MTRR: Fixed MSR 0x26e 0x0606060606060606
2056 11:13:36.231611 MTRR: Fixed MSR 0x26f 0x0606060606060606
2057 11:13:36.234855 CPU physical address size: 39 bits
2058 11:13:36.238310 call enable_fixed_mtrr()
2059 11:13:36.242593 Reading cr50 TPM mode
2060 11:13:36.245727 CPU physical address size: 39 bits
2061 11:13:36.248880 CPU physical address size: 39 bits
2062 11:13:36.252324 BS: BS_PAYLOAD_LOAD entry times (exec / console): 316 / 6 ms
2063 11:13:36.255836 CPU physical address size: 39 bits
2064 11:13:36.265527 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2065 11:13:36.268999 Checking segment from ROM address 0xffc02b38
2066 11:13:36.272211 Checking segment from ROM address 0xffc02b54
2067 11:13:36.278839 Loading segment from ROM address 0xffc02b38
2068 11:13:36.279355 code (compression=0)
2069 11:13:36.289477 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2070 11:13:36.299196 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2071 11:13:36.299792 it's not compressed!
2072 11:13:36.438895 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2073 11:13:36.445651 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2074 11:13:36.452400 Loading segment from ROM address 0xffc02b54
2075 11:13:36.452916 Entry Point 0x30000000
2076 11:13:36.455351 Loaded segments
2077 11:13:36.462243 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2078 11:13:36.504764 Finalizing chipset.
2079 11:13:36.508555 Finalizing SMM.
2080 11:13:36.509111 APMC done.
2081 11:13:36.515124 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2082 11:13:36.518388 mp_park_aps done after 0 msecs.
2083 11:13:36.521412 Jumping to boot code at 0x30000000(0x76b25000)
2084 11:13:36.531529 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2085 11:13:36.532085
2086 11:13:36.532453
2087 11:13:36.532793
2088 11:13:36.534862 Starting depthcharge on Voema...
2089 11:13:36.535337
2090 11:13:36.536403 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2091 11:13:36.536868 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2092 11:13:36.537285 Setting prompt string to ['volteer:']
2093 11:13:36.537680 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2094 11:13:36.544691 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2095 11:13:36.545212
2096 11:13:36.550971 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2097 11:13:36.551391
2098 11:13:36.554208 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2099 11:13:36.557942
2100 11:13:36.561397 Failed to find eMMC card reader
2101 11:13:36.561923
2102 11:13:36.562259 Wipe memory regions:
2103 11:13:36.562631
2104 11:13:36.567939 [0x00000000001000, 0x000000000a0000)
2105 11:13:36.568476
2106 11:13:36.571338 [0x00000000100000, 0x00000030000000)
2107 11:13:36.597468
2108 11:13:36.600273 [0x00000032662db0, 0x000000769ef000)
2109 11:13:36.636422
2110 11:13:36.639278 [0x00000100000000, 0x00000280400000)
2111 11:13:36.842090
2112 11:13:36.845198 ec_init: CrosEC protocol v3 supported (256, 256)
2113 11:13:36.845718
2114 11:13:36.851617 update_port_state: port C0 state: usb enable 1 mux conn 0
2115 11:13:36.852036
2116 11:13:36.858295 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2117 11:13:36.863323
2118 11:13:36.866321 pmc_check_ipc_sts: STS_BUSY done after 1566 us
2119 11:13:36.867028
2120 11:13:36.869259 send_conn_disc_msg: pmc_send_cmd succeeded
2121 11:13:37.300904
2122 11:13:37.301413 R8152: Initializing
2123 11:13:37.301747
2124 11:13:37.303895 Version 6 (ocp_data = 5c30)
2125 11:13:37.304314
2126 11:13:37.307234 R8152: Done initializing
2127 11:13:37.307647
2128 11:13:37.310666 Adding net device
2129 11:13:37.612282
2130 11:13:37.615594 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2131 11:13:37.616010
2132 11:13:37.616397
2133 11:13:37.616941
2134 11:13:37.619389 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2136 11:13:37.720861 volteer: tftpboot 192.168.201.1 11183364/tftp-deploy-nyn_6uj6/kernel/bzImage 11183364/tftp-deploy-nyn_6uj6/kernel/cmdline 11183364/tftp-deploy-nyn_6uj6/ramdisk/ramdisk.cpio.gz
2137 11:13:37.721454 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 11:13:37.721836 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2139 11:13:37.726336 tftpboot 192.168.201.1 11183364/tftp-deploy-nyn_6uj6/kernel/bzIploy-nyn_6uj6/kernel/cmdline 11183364/tftp-deploy-nyn_6uj6/ramdisk/ramdisk.cpio.gz
2140 11:13:37.726976
2141 11:13:37.727364 Waiting for link
2142 11:13:37.930047
2143 11:13:37.930605 done.
2144 11:13:37.930946
2145 11:13:37.931256 MAC: 00:24:32:30:7b:87
2146 11:13:37.931555
2147 11:13:37.932767 Sending DHCP discover... done.
2148 11:13:37.933178
2149 11:13:37.936132 Waiting for reply... done.
2150 11:13:37.936663
2151 11:13:37.939401 Sending DHCP request... done.
2152 11:13:37.939817
2153 11:13:37.946802 Waiting for reply... done.
2154 11:13:37.947214
2155 11:13:37.947539 My ip is 192.168.201.19
2156 11:13:37.947846
2157 11:13:37.950111 The DHCP server ip is 192.168.201.1
2158 11:13:37.953777
2159 11:13:37.956857 TFTP server IP predefined by user: 192.168.201.1
2160 11:13:37.957378
2161 11:13:37.963149 Bootfile predefined by user: 11183364/tftp-deploy-nyn_6uj6/kernel/bzImage
2162 11:13:37.963670
2163 11:13:37.966457 Sending tftp read request... done.
2164 11:13:37.966877
2165 11:13:37.975390 Waiting for the transfer...
2166 11:13:37.975914
2167 11:13:38.695152 00000000 ################################################################
2168 11:13:38.695653
2169 11:13:39.405159 00080000 ################################################################
2170 11:13:39.405663
2171 11:13:40.125867 00100000 ################################################################
2172 11:13:40.126364
2173 11:13:40.831016 00180000 ################################################################
2174 11:13:40.831532
2175 11:13:41.540807 00200000 ################################################################
2176 11:13:41.541305
2177 11:13:42.114829 00280000 ################################################################
2178 11:13:42.114977
2179 11:13:42.672740 00300000 ################################################################
2180 11:13:42.672895
2181 11:13:43.211123 00380000 ################################################################
2182 11:13:43.211275
2183 11:13:43.796414 00400000 ################################################################
2184 11:13:43.796565
2185 11:13:44.390006 00480000 ################################################################
2186 11:13:44.390189
2187 11:13:44.966258 00500000 ################################################################
2188 11:13:44.966456
2189 11:13:45.538088 00580000 ################################################################
2190 11:13:45.538282
2191 11:13:46.099997 00600000 ################################################################
2192 11:13:46.100141
2193 11:13:46.650371 00680000 ################################################################
2194 11:13:46.650541
2195 11:13:47.196603 00700000 ################################################################
2196 11:13:47.196761
2197 11:13:47.218324 00780000 ### done.
2198 11:13:47.218450
2199 11:13:47.221509 The bootfile was 7884688 bytes long.
2200 11:13:47.221588
2201 11:13:47.224931 Sending tftp read request... done.
2202 11:13:47.225020
2203 11:13:47.227962 Waiting for the transfer...
2204 11:13:47.228041
2205 11:13:47.771947 00000000 ################################################################
2206 11:13:47.772092
2207 11:13:48.325711 00080000 ################################################################
2208 11:13:48.325860
2209 11:13:48.873908 00100000 ################################################################
2210 11:13:48.874064
2211 11:13:49.419999 00180000 ################################################################
2212 11:13:49.420154
2213 11:13:49.969938 00200000 ################################################################
2214 11:13:49.970086
2215 11:13:50.516981 00280000 ################################################################
2216 11:13:50.517161
2217 11:13:51.063300 00300000 ################################################################
2218 11:13:51.063457
2219 11:13:51.609037 00380000 ################################################################
2220 11:13:51.609192
2221 11:13:52.154057 00400000 ################################################################
2222 11:13:52.154248
2223 11:13:52.702632 00480000 ################################################################
2224 11:13:52.702889
2225 11:13:53.250833 00500000 ################################################################
2226 11:13:53.250982
2227 11:13:53.798582 00580000 ################################################################
2228 11:13:53.798725
2229 11:13:54.346664 00600000 ################################################################
2230 11:13:54.346848
2231 11:13:54.896418 00680000 ################################################################
2232 11:13:54.896577
2233 11:13:55.440557 00700000 ################################################################
2234 11:13:55.440711
2235 11:13:56.001330 00780000 ################################################################
2236 11:13:56.001491
2237 11:13:56.458847 00800000 ###################################################### done.
2238 11:13:56.459006
2239 11:13:56.461566 Sending tftp read request... done.
2240 11:13:56.461656
2241 11:13:56.467491 Waiting for the transfer...
2242 11:13:56.467590
2243 11:13:56.467664 00000000 # done.
2244 11:13:56.467736
2245 11:13:56.474961 Command line loaded dynamically from TFTP file: 11183364/tftp-deploy-nyn_6uj6/kernel/cmdline
2246 11:13:56.475050
2247 11:13:56.490947 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2248 11:13:56.494459
2249 11:13:56.497901 Shutting down all USB controllers.
2250 11:13:56.497987
2251 11:13:56.498058 Removing current net device
2252 11:13:56.498125
2253 11:13:56.500958 Finalizing coreboot
2254 11:13:56.501041
2255 11:13:56.507457 Exiting depthcharge with code 4 at timestamp: 28626917
2256 11:13:56.507549
2257 11:13:56.507622
2258 11:13:56.507692 Starting kernel ...
2259 11:13:56.507761
2260 11:13:56.507825
2261 11:13:56.508210 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2262 11:13:56.508320 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2263 11:13:56.508403 Setting prompt string to ['Linux version [0-9]']
2264 11:13:56.508482 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2265 11:13:56.508558 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2267 11:18:21.509407 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2269 11:18:21.510541 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2271 11:18:21.511447 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2274 11:18:21.512793 end: 2 depthcharge-action (duration 00:05:00) [common]
2276 11:18:21.513834 Cleaning after the job
2277 11:18:21.513930 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11183364/tftp-deploy-nyn_6uj6/ramdisk
2278 11:18:21.515486 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11183364/tftp-deploy-nyn_6uj6/kernel
2279 11:18:21.516867 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11183364/tftp-deploy-nyn_6uj6/modules
2280 11:18:21.517401 start: 5.1 power-off (timeout 00:00:30) [common]
2281 11:18:21.517580 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=off'
2282 11:18:21.592108 >> Command sent successfully.
2283 11:18:21.597304 Returned 0 in 0 seconds
2284 11:18:21.698254 end: 5.1 power-off (duration 00:00:00) [common]
2286 11:18:21.699910 start: 5.2 read-feedback (timeout 00:10:00) [common]
2287 11:18:21.701178 Listened to connection for namespace 'common' for up to 1s
2288 11:18:22.701820 Finalising connection for namespace 'common'
2289 11:18:22.702531 Disconnecting from shell: Finalise
2290 11:18:22.702984
2291 11:18:22.803983 end: 5.2 read-feedback (duration 00:00:01) [common]
2292 11:18:22.804595 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11183364
2293 11:18:22.825695 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11183364
2294 11:18:22.825842 JobError: Your job cannot terminate cleanly.