Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 11:13:29.366491 lava-dispatcher, installed at version: 2023.05.1
2 11:13:29.366717 start: 0 validate
3 11:13:29.366853 Start time: 2023-08-01 11:13:29.366846+00:00 (UTC)
4 11:13:29.367015 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:13:29.367194 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 11:13:29.633507 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:13:29.633729 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1446-g679130ec67b34%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:13:33.634773 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:13:33.635032 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1446-g679130ec67b34%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:13:34.636267 validate duration: 5.27
12 11:13:34.636562 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:13:34.636665 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:13:34.636764 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:13:34.636902 Not decompressing ramdisk as can be used compressed.
16 11:13:34.636991 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 11:13:34.637056 saving as /var/lib/lava/dispatcher/tmp/11183378/tftp-deploy-cg5mwaay/ramdisk/rootfs.cpio.gz
18 11:13:34.637116 total size: 35760064 (34MB)
19 11:13:34.638277 progress 0% (0MB)
20 11:13:34.647507 progress 5% (1MB)
21 11:13:34.657743 progress 10% (3MB)
22 11:13:34.667409 progress 15% (5MB)
23 11:13:34.676917 progress 20% (6MB)
24 11:13:34.685896 progress 25% (8MB)
25 11:13:34.695072 progress 30% (10MB)
26 11:13:34.704398 progress 35% (11MB)
27 11:13:34.714171 progress 40% (13MB)
28 11:13:34.723981 progress 45% (15MB)
29 11:13:34.733137 progress 50% (17MB)
30 11:13:34.742524 progress 55% (18MB)
31 11:13:34.751487 progress 60% (20MB)
32 11:13:34.760711 progress 65% (22MB)
33 11:13:34.769692 progress 70% (23MB)
34 11:13:34.778821 progress 75% (25MB)
35 11:13:34.787897 progress 80% (27MB)
36 11:13:34.796846 progress 85% (29MB)
37 11:13:34.806474 progress 90% (30MB)
38 11:13:34.815765 progress 95% (32MB)
39 11:13:34.825179 progress 100% (34MB)
40 11:13:34.825343 34MB downloaded in 0.19s (181.19MB/s)
41 11:13:34.825500 end: 1.1.1 http-download (duration 00:00:00) [common]
43 11:13:34.825744 end: 1.1 download-retry (duration 00:00:00) [common]
44 11:13:34.825833 start: 1.2 download-retry (timeout 00:10:00) [common]
45 11:13:34.825917 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 11:13:34.826049 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1446-g679130ec67b34/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:13:34.826155 saving as /var/lib/lava/dispatcher/tmp/11183378/tftp-deploy-cg5mwaay/kernel/bzImage
48 11:13:34.826216 total size: 7884688 (7MB)
49 11:13:34.826276 No compression specified
50 11:13:34.827387 progress 0% (0MB)
51 11:13:34.829661 progress 5% (0MB)
52 11:13:34.831807 progress 10% (0MB)
53 11:13:34.833897 progress 15% (1MB)
54 11:13:34.835946 progress 20% (1MB)
55 11:13:34.838084 progress 25% (1MB)
56 11:13:34.840408 progress 30% (2MB)
57 11:13:34.842668 progress 35% (2MB)
58 11:13:34.844850 progress 40% (3MB)
59 11:13:34.847031 progress 45% (3MB)
60 11:13:34.849399 progress 50% (3MB)
61 11:13:34.851587 progress 55% (4MB)
62 11:13:34.853694 progress 60% (4MB)
63 11:13:34.855806 progress 65% (4MB)
64 11:13:34.857951 progress 70% (5MB)
65 11:13:34.860088 progress 75% (5MB)
66 11:13:34.862204 progress 80% (6MB)
67 11:13:34.864317 progress 85% (6MB)
68 11:13:34.866423 progress 90% (6MB)
69 11:13:34.868513 progress 95% (7MB)
70 11:13:34.870589 progress 100% (7MB)
71 11:13:34.870790 7MB downloaded in 0.04s (168.71MB/s)
72 11:13:34.870940 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:13:34.871172 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:13:34.871264 start: 1.3 download-retry (timeout 00:10:00) [common]
76 11:13:34.871353 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 11:13:34.871493 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1446-g679130ec67b34/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:13:34.871564 saving as /var/lib/lava/dispatcher/tmp/11183378/tftp-deploy-cg5mwaay/modules/modules.tar
79 11:13:34.871627 total size: 250928 (0MB)
80 11:13:34.871689 Using unxz to decompress xz
81 11:13:34.875219 progress 13% (0MB)
82 11:13:34.875608 progress 26% (0MB)
83 11:13:34.875847 progress 39% (0MB)
84 11:13:34.877311 progress 52% (0MB)
85 11:13:34.879179 progress 65% (0MB)
86 11:13:34.880956 progress 78% (0MB)
87 11:13:34.882808 progress 91% (0MB)
88 11:13:34.884633 progress 100% (0MB)
89 11:13:34.890047 0MB downloaded in 0.02s (13.00MB/s)
90 11:13:34.890305 end: 1.3.1 http-download (duration 00:00:00) [common]
92 11:13:34.890572 end: 1.3 download-retry (duration 00:00:00) [common]
93 11:13:34.890671 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 11:13:34.890772 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 11:13:34.890856 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 11:13:34.890939 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 11:13:34.891149 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok
98 11:13:34.891275 makedir: /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin
99 11:13:34.891379 makedir: /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/tests
100 11:13:34.891475 makedir: /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/results
101 11:13:34.891586 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-add-keys
102 11:13:34.891726 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-add-sources
103 11:13:34.891852 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-background-process-start
104 11:13:34.891976 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-background-process-stop
105 11:13:34.892097 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-common-functions
106 11:13:34.892217 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-echo-ipv4
107 11:13:34.892340 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-install-packages
108 11:13:34.892461 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-installed-packages
109 11:13:34.892582 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-os-build
110 11:13:34.892703 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-probe-channel
111 11:13:34.892862 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-probe-ip
112 11:13:34.892982 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-target-ip
113 11:13:34.893102 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-target-mac
114 11:13:34.893221 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-target-storage
115 11:13:34.893345 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-test-case
116 11:13:34.893464 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-test-event
117 11:13:34.893583 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-test-feedback
118 11:13:34.893702 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-test-raise
119 11:13:34.893825 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-test-reference
120 11:13:34.893946 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-test-runner
121 11:13:34.894067 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-test-set
122 11:13:34.894188 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-test-shell
123 11:13:34.894312 Updating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-install-packages (oe)
124 11:13:34.894464 Updating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/bin/lava-installed-packages (oe)
125 11:13:34.894592 Creating /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/environment
126 11:13:34.894691 LAVA metadata
127 11:13:34.894769 - LAVA_JOB_ID=11183378
128 11:13:34.894835 - LAVA_DISPATCHER_IP=192.168.201.1
129 11:13:34.894936 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 11:13:34.895003 skipped lava-vland-overlay
131 11:13:34.895077 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 11:13:34.895160 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 11:13:34.895223 skipped lava-multinode-overlay
134 11:13:34.895295 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 11:13:34.895379 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 11:13:34.895453 Loading test definitions
137 11:13:34.895548 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 11:13:34.895623 Using /lava-11183378 at stage 0
139 11:13:34.895909 uuid=11183378_1.4.2.3.1 testdef=None
140 11:13:34.895997 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 11:13:34.896082 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 11:13:34.896581 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 11:13:34.896840 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 11:13:34.897446 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 11:13:34.897675 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 11:13:34.898259 runner path: /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/0/tests/0_cros-ec test_uuid 11183378_1.4.2.3.1
149 11:13:34.898412 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 11:13:34.898615 Creating lava-test-runner.conf files
152 11:13:34.898679 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11183378/lava-overlay-t8exu9ok/lava-11183378/0 for stage 0
153 11:13:34.898768 - 0_cros-ec
154 11:13:34.898870 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 11:13:34.898957 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 11:13:34.905514 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 11:13:34.905618 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 11:13:34.905705 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 11:13:34.905790 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 11:13:34.905876 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 11:13:35.879793 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 11:13:35.880162 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 11:13:35.880302 extracting modules file /var/lib/lava/dispatcher/tmp/11183378/tftp-deploy-cg5mwaay/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11183378/extract-overlay-ramdisk-08dosf4j/ramdisk
164 11:13:35.894207 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 11:13:35.894354 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 11:13:35.894459 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11183378/compress-overlay-z_ss7zdd/overlay-1.4.2.4.tar.gz to ramdisk
167 11:13:35.894541 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11183378/compress-overlay-z_ss7zdd/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11183378/extract-overlay-ramdisk-08dosf4j/ramdisk
168 11:13:35.901623 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 11:13:35.901783 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 11:13:35.901920 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 11:13:35.902029 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 11:13:35.902123 Building ramdisk /var/lib/lava/dispatcher/tmp/11183378/extract-overlay-ramdisk-08dosf4j/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11183378/extract-overlay-ramdisk-08dosf4j/ramdisk
173 11:13:36.393556 >> 184082 blocks
174 11:13:40.003501 rename /var/lib/lava/dispatcher/tmp/11183378/extract-overlay-ramdisk-08dosf4j/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11183378/tftp-deploy-cg5mwaay/ramdisk/ramdisk.cpio.gz
175 11:13:40.004007 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 11:13:40.004180 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
177 11:13:40.004321 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
178 11:13:40.004455 No mkimage arch provided, not using FIT.
179 11:13:40.004584 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 11:13:40.004716 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 11:13:40.004909 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 11:13:40.005051 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
183 11:13:40.005167 No LXC device requested
184 11:13:40.005295 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 11:13:40.005430 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
186 11:13:40.005559 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 11:13:40.005673 Checking files for TFTP limit of 4294967296 bytes.
188 11:13:40.006203 end: 1 tftp-deploy (duration 00:00:05) [common]
189 11:13:40.006348 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 11:13:40.006480 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 11:13:40.006657 substitutions:
192 11:13:40.006798 - {DTB}: None
193 11:13:40.006915 - {INITRD}: 11183378/tftp-deploy-cg5mwaay/ramdisk/ramdisk.cpio.gz
194 11:13:40.007024 - {KERNEL}: 11183378/tftp-deploy-cg5mwaay/kernel/bzImage
195 11:13:40.007117 - {LAVA_MAC}: None
196 11:13:40.007210 - {PRESEED_CONFIG}: None
197 11:13:40.007301 - {PRESEED_LOCAL}: None
198 11:13:40.007395 - {RAMDISK}: 11183378/tftp-deploy-cg5mwaay/ramdisk/ramdisk.cpio.gz
199 11:13:40.007485 - {ROOT_PART}: None
200 11:13:40.007578 - {ROOT}: None
201 11:13:40.007668 - {SERVER_IP}: 192.168.201.1
202 11:13:40.007764 - {TEE}: None
203 11:13:40.007857 Parsed boot commands:
204 11:13:40.007948 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 11:13:40.008182 Parsed boot commands: tftpboot 192.168.201.1 11183378/tftp-deploy-cg5mwaay/kernel/bzImage 11183378/tftp-deploy-cg5mwaay/kernel/cmdline 11183378/tftp-deploy-cg5mwaay/ramdisk/ramdisk.cpio.gz
206 11:13:40.008314 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 11:13:40.008445 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 11:13:40.008580 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 11:13:40.008730 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 11:13:40.008861 Not connected, no need to disconnect.
211 11:13:40.008980 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 11:13:40.009108 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 11:13:40.009213 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-1'
214 11:13:40.013185 Setting prompt string to ['lava-test: # ']
215 11:13:40.013588 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 11:13:40.013733 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 11:13:40.013911 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 11:13:40.014049 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 11:13:40.014350 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
220 11:13:45.144840 >> Command sent successfully.
221 11:13:45.147150 Returned 0 in 5 seconds
222 11:13:45.247501 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 11:13:45.247853 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 11:13:45.247988 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 11:13:45.248107 Setting prompt string to 'Starting depthcharge on Voema...'
227 11:13:45.248206 Changing prompt to 'Starting depthcharge on Voema...'
228 11:13:45.248305 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 11:13:45.248588 [Enter `^Ec?' for help]
230 11:13:46.850682
231 11:13:46.850845
232 11:13:46.860894 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 11:13:46.864276 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
234 11:13:46.870587 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 11:13:46.874202 CPU: AES supported, TXT NOT supported, VT supported
236 11:13:46.880645 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 11:13:46.884022 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 11:13:46.891036 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 11:13:46.893989 VBOOT: Loading verstage.
240 11:13:46.897733 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 11:13:46.904138 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 11:13:46.907505 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 11:13:46.917840 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 11:13:46.924577 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 11:13:46.924663
246 11:13:46.924730
247 11:13:46.937625 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 11:13:46.951133 Probing TPM: . done!
249 11:13:46.954580 TPM ready after 0 ms
250 11:13:46.958074 Connected to device vid:did:rid of 1ae0:0028:00
251 11:13:46.969164 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
252 11:13:46.975558 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 11:13:46.979189 Initialized TPM device CR50 revision 0
254 11:13:47.029740 tlcl_send_startup: Startup return code is 0
255 11:13:47.029832 TPM: setup succeeded
256 11:13:47.045628 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 11:13:47.059465 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 11:13:47.072653 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 11:13:47.082276 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 11:13:47.086733 Chrome EC: UHEPI supported
261 11:13:47.089776 Phase 1
262 11:13:47.093196 FMAP: area GBB found @ 1805000 (458752 bytes)
263 11:13:47.099938 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 11:13:47.109999 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 11:13:47.116258 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 11:13:47.123253 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 11:13:47.126855 Recovery requested (1009000e)
268 11:13:47.130074 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 11:13:47.141191 tlcl_extend: response is 0
270 11:13:47.147923 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 11:13:47.157803 tlcl_extend: response is 0
272 11:13:47.164722 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 11:13:47.171078 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 11:13:47.177978 BS: verstage times (exec / console): total (unknown) / 142 ms
275 11:13:47.178064
276 11:13:47.178132
277 11:13:47.191272 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 11:13:47.194591 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 11:13:47.201761 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 11:13:47.205031 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 11:13:47.208702 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 11:13:47.215025 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 11:13:47.218282 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
284 11:13:47.221934 TCO_STS: 0000 0000
285 11:13:47.225190 GEN_PMCON: d0015038 00002200
286 11:13:47.228474 GBLRST_CAUSE: 00000000 00000000
287 11:13:47.228558 HPR_CAUSE0: 00000000
288 11:13:47.231958 prev_sleep_state 5
289 11:13:47.235032 Boot Count incremented to 24566
290 11:13:47.241840 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 11:13:47.248391 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 11:13:47.255171 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 11:13:47.261885 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 11:13:47.265251 Chrome EC: UHEPI supported
295 11:13:47.271980 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 11:13:47.285060 Probing TPM: done!
297 11:13:47.293161 Connected to device vid:did:rid of 1ae0:0028:00
298 11:13:47.299845 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
299 11:13:47.309620 Initialized TPM device CR50 revision 0
300 11:13:47.319848 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 11:13:47.326598 MRC: Hash idx 0x100b comparison successful.
302 11:13:47.329897 MRC cache found, size faa8
303 11:13:47.329982 bootmode is set to: 2
304 11:13:47.333259 SPD index = 0
305 11:13:47.339825 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 11:13:47.343227 SPD: module type is LPDDR4X
307 11:13:47.346383 SPD: module part number is MT53E512M64D4NW-046
308 11:13:47.353147 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
309 11:13:47.356589 SPD: device width 16 bits, bus width 16 bits
310 11:13:47.363274 SPD: module size is 1024 MB (per channel)
311 11:13:47.796591 CBMEM:
312 11:13:47.799884 IMD: root @ 0x76fff000 254 entries.
313 11:13:47.802957 IMD: root @ 0x76ffec00 62 entries.
314 11:13:47.806167 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 11:13:47.812936 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 11:13:47.816399 External stage cache:
317 11:13:47.819605 IMD: root @ 0x7b3ff000 254 entries.
318 11:13:47.822851 IMD: root @ 0x7b3fec00 62 entries.
319 11:13:47.837966 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 11:13:47.844592 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 11:13:47.851358 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 11:13:47.866763 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 11:13:47.870313 cse_lite: Skip switching to RW in the recovery path
324 11:13:47.873471 8 DIMMs found
325 11:13:47.873557 SMM Memory Map
326 11:13:47.876782 SMRAM : 0x7b000000 0x800000
327 11:13:47.880268 Subregion 0: 0x7b000000 0x200000
328 11:13:47.883216 Subregion 1: 0x7b200000 0x200000
329 11:13:47.886739 Subregion 2: 0x7b400000 0x400000
330 11:13:47.890208 top_of_ram = 0x77000000
331 11:13:47.896837 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 11:13:47.899944 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 11:13:47.906796 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 11:13:47.909722 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 11:13:47.916613 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 11:13:47.923504 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 11:13:47.935309 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 11:13:47.941596 Processing 211 relocs. Offset value of 0x74c0b000
339 11:13:47.948169 BS: romstage times (exec / console): total (unknown) / 277 ms
340 11:13:47.954096
341 11:13:47.954197
342 11:13:47.964160 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 11:13:47.967450 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 11:13:47.977551 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 11:13:47.984281 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 11:13:47.990805 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 11:13:47.997277 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 11:13:48.044430 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 11:13:48.051250 Processing 5008 relocs. Offset value of 0x75d98000
350 11:13:48.054355 BS: postcar times (exec / console): total (unknown) / 59 ms
351 11:13:48.058270
352 11:13:48.058354
353 11:13:48.067879 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 11:13:48.067965 Normal boot
355 11:13:48.071395 FW_CONFIG value is 0x804c02
356 11:13:48.074789 PCI: 00:07.0 disabled by fw_config
357 11:13:48.078121 PCI: 00:07.1 disabled by fw_config
358 11:13:48.081480 PCI: 00:0d.2 disabled by fw_config
359 11:13:48.084594 PCI: 00:1c.7 disabled by fw_config
360 11:13:48.091227 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 11:13:48.098188 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 11:13:48.101299 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 11:13:48.104808 GENERIC: 0.0 disabled by fw_config
364 11:13:48.108044 GENERIC: 1.0 disabled by fw_config
365 11:13:48.114863 fw_config match found: DB_USB=USB3_ACTIVE
366 11:13:48.118101 fw_config match found: DB_USB=USB3_ACTIVE
367 11:13:48.121374 fw_config match found: DB_USB=USB3_ACTIVE
368 11:13:48.124526 fw_config match found: DB_USB=USB3_ACTIVE
369 11:13:48.131302 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 11:13:48.138119 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 11:13:48.144984 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 11:13:48.154789 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 11:13:48.158065 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 11:13:48.164804 microcode: Update skipped, already up-to-date
375 11:13:48.171370 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 11:13:48.197984 Detected 4 core, 8 thread CPU.
377 11:13:48.201522 Setting up SMI for CPU
378 11:13:48.204947 IED base = 0x7b400000
379 11:13:48.205031 IED size = 0x00400000
380 11:13:48.208302 Will perform SMM setup.
381 11:13:48.215052 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
382 11:13:48.221574 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 11:13:48.228079 Processing 16 relocs. Offset value of 0x00030000
384 11:13:48.231393 Attempting to start 7 APs
385 11:13:48.234515 Waiting for 10ms after sending INIT.
386 11:13:48.250022 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
387 11:13:48.253500 AP: slot 7 apic_id 7.
388 11:13:48.256706 AP: slot 3 apic_id 6.
389 11:13:48.256839 AP: slot 6 apic_id 2.
390 11:13:48.260325 AP: slot 2 apic_id 3.
391 11:13:48.263410 AP: slot 5 apic_id 5.
392 11:13:48.263532 AP: slot 4 apic_id 4.
393 11:13:48.263652 done.
394 11:13:48.270218 Waiting for 2nd SIPI to complete...done.
395 11:13:48.276961 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 11:13:48.283433 Processing 13 relocs. Offset value of 0x00038000
397 11:13:48.283558 Unable to locate Global NVS
398 11:13:48.293495 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 11:13:48.296605 Installing permanent SMM handler to 0x7b000000
400 11:13:48.306684 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 11:13:48.309911 Processing 794 relocs. Offset value of 0x7b010000
402 11:13:48.319806 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 11:13:48.323228 Processing 13 relocs. Offset value of 0x7b008000
404 11:13:48.329959 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 11:13:48.336595 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 11:13:48.339825 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 11:13:48.346404 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 11:13:48.352978 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 11:13:48.359791 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 11:13:48.367048 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 11:13:48.367175 Unable to locate Global NVS
412 11:13:48.376344 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 11:13:48.379927 Clearing SMI status registers
414 11:13:48.380055 SMI_STS: PM1
415 11:13:48.383140 PM1_STS: PWRBTN
416 11:13:48.389827 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 11:13:48.393105 In relocation handler: CPU 0
418 11:13:48.396590 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 11:13:48.403420 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 11:13:48.403547 Relocation complete.
421 11:13:48.409719 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 11:13:48.413185 In relocation handler: CPU 1
423 11:13:48.419904 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 11:13:48.420033 Relocation complete.
425 11:13:48.426509 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
426 11:13:48.430017 In relocation handler: CPU 5
427 11:13:48.437345 New SMBASE=0x7affec00 IEDBASE=0x7b400000
428 11:13:48.437473 Relocation complete.
429 11:13:48.443292 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
430 11:13:48.446464 In relocation handler: CPU 7
431 11:13:48.449960 New SMBASE=0x7affe400 IEDBASE=0x7b400000
432 11:13:48.453213 Relocation complete.
433 11:13:48.459732 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
434 11:13:48.463184 In relocation handler: CPU 3
435 11:13:48.466400 New SMBASE=0x7afff400 IEDBASE=0x7b400000
436 11:13:48.473287 Writing SMRR. base = 0x7b000006, mask=0xff800c00
437 11:13:48.473372 Relocation complete.
438 11:13:48.483259 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
439 11:13:48.486557 In relocation handler: CPU 6
440 11:13:48.489987 New SMBASE=0x7affe800 IEDBASE=0x7b400000
441 11:13:48.493609 Writing SMRR. base = 0x7b000006, mask=0xff800c00
442 11:13:48.497045 Relocation complete.
443 11:13:48.503556 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
444 11:13:48.506793 In relocation handler: CPU 2
445 11:13:48.510438 New SMBASE=0x7afff800 IEDBASE=0x7b400000
446 11:13:48.513329 Relocation complete.
447 11:13:48.520220 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
448 11:13:48.523614 In relocation handler: CPU 4
449 11:13:48.526701 New SMBASE=0x7afff000 IEDBASE=0x7b400000
450 11:13:48.531317 Writing SMRR. base = 0x7b000006, mask=0xff800c00
451 11:13:48.534923 Relocation complete.
452 11:13:48.535008 Initializing CPU #0
453 11:13:48.538414 CPU: vendor Intel device 806c1
454 11:13:48.544877 CPU: family 06, model 8c, stepping 01
455 11:13:48.544962 Clearing out pending MCEs
456 11:13:48.548092 Setting up local APIC...
457 11:13:48.551411 apic_id: 0x00 done.
458 11:13:48.554752 Turbo is available but hidden
459 11:13:48.558191 Turbo is available and visible
460 11:13:48.561312 microcode: Update skipped, already up-to-date
461 11:13:48.565092 CPU #0 initialized
462 11:13:48.565216 Initializing CPU #4
463 11:13:48.568000 Initializing CPU #5
464 11:13:48.571277 CPU: vendor Intel device 806c1
465 11:13:48.574940 CPU: family 06, model 8c, stepping 01
466 11:13:48.578155 CPU: vendor Intel device 806c1
467 11:13:48.581711 CPU: family 06, model 8c, stepping 01
468 11:13:48.584847 Clearing out pending MCEs
469 11:13:48.587916 Clearing out pending MCEs
470 11:13:48.588047 Setting up local APIC...
471 11:13:48.591616 Initializing CPU #6
472 11:13:48.594599 Initializing CPU #2
473 11:13:48.597857 CPU: vendor Intel device 806c1
474 11:13:48.601315 CPU: family 06, model 8c, stepping 01
475 11:13:48.604873 CPU: vendor Intel device 806c1
476 11:13:48.608007 CPU: family 06, model 8c, stepping 01
477 11:13:48.611694 Clearing out pending MCEs
478 11:13:48.611818 Clearing out pending MCEs
479 11:13:48.614612 Setting up local APIC...
480 11:13:48.618178 apic_id: 0x04 done.
481 11:13:48.621249 Setting up local APIC...
482 11:13:48.621370 Setting up local APIC...
483 11:13:48.628046 microcode: Update skipped, already up-to-date
484 11:13:48.628173 apic_id: 0x05 done.
485 11:13:48.631284 CPU #4 initialized
486 11:13:48.634623 Initializing CPU #3
487 11:13:48.634745 Initializing CPU #7
488 11:13:48.637785 apic_id: 0x02 done.
489 11:13:48.641438 apic_id: 0x03 done.
490 11:13:48.644476 microcode: Update skipped, already up-to-date
491 11:13:48.647648 microcode: Update skipped, already up-to-date
492 11:13:48.651252 CPU #6 initialized
493 11:13:48.651375 CPU #2 initialized
494 11:13:48.657728 microcode: Update skipped, already up-to-date
495 11:13:48.661155 CPU: vendor Intel device 806c1
496 11:13:48.664571 CPU: family 06, model 8c, stepping 01
497 11:13:48.668115 CPU: vendor Intel device 806c1
498 11:13:48.671224 CPU: family 06, model 8c, stepping 01
499 11:13:48.674507 Clearing out pending MCEs
500 11:13:48.677609 Clearing out pending MCEs
501 11:13:48.677731 Setting up local APIC...
502 11:13:48.680897 CPU #5 initialized
503 11:13:48.684649 apic_id: 0x07 done.
504 11:13:48.684777 Setting up local APIC...
505 11:13:48.687966 Initializing CPU #1
506 11:13:48.691091 microcode: Update skipped, already up-to-date
507 11:13:48.694378 apic_id: 0x06 done.
508 11:13:48.697570 CPU #7 initialized
509 11:13:48.701037 microcode: Update skipped, already up-to-date
510 11:13:48.704475 CPU: vendor Intel device 806c1
511 11:13:48.708078 CPU: family 06, model 8c, stepping 01
512 11:13:48.710891 Clearing out pending MCEs
513 11:13:48.711015 CPU #3 initialized
514 11:13:48.714520 Setting up local APIC...
515 11:13:48.717920 apic_id: 0x01 done.
516 11:13:48.720986 microcode: Update skipped, already up-to-date
517 11:13:48.724626 CPU #1 initialized
518 11:13:48.727559 bsp_do_flight_plan done after 455 msecs.
519 11:13:48.731079 CPU: frequency set to 4000 MHz
520 11:13:48.734242 Enabling SMIs.
521 11:13:48.740716 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 11:13:48.754947 SATAXPCIE1 indicates PCIe NVMe is present
523 11:13:48.758644 Probing TPM: done!
524 11:13:48.762026 Connected to device vid:did:rid of 1ae0:0028:00
525 11:13:48.772670 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
526 11:13:48.776384 Initialized TPM device CR50 revision 0
527 11:13:48.779298 Enabling S0i3.4
528 11:13:48.786141 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 11:13:48.789708 Found a VBT of 8704 bytes after decompression
530 11:13:48.795886 cse_lite: CSE RO boot. HybridStorageMode disabled
531 11:13:48.802322 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 11:13:48.878320 FSPS returned 0
533 11:13:48.881720 Executing Phase 1 of FspMultiPhaseSiInit
534 11:13:48.891607 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 11:13:48.894904 port C0 DISC req: usage 1 usb3 1 usb2 5
536 11:13:48.898513 Raw Buffer output 0 00000511
537 11:13:48.901983 Raw Buffer output 1 00000000
538 11:13:48.905327 pmc_send_ipc_cmd succeeded
539 11:13:48.911868 port C1 DISC req: usage 1 usb3 2 usb2 3
540 11:13:48.911956 Raw Buffer output 0 00000321
541 11:13:48.915359 Raw Buffer output 1 00000000
542 11:13:48.919428 pmc_send_ipc_cmd succeeded
543 11:13:48.924792 Detected 4 core, 8 thread CPU.
544 11:13:48.927926 Detected 4 core, 8 thread CPU.
545 11:13:49.162036 Display FSP Version Info HOB
546 11:13:49.165243 Reference Code - CPU = a.0.4c.31
547 11:13:49.168738 uCode Version = 0.0.0.86
548 11:13:49.171910 TXT ACM version = ff.ff.ff.ffff
549 11:13:49.175628 Reference Code - ME = a.0.4c.31
550 11:13:49.178551 MEBx version = 0.0.0.0
551 11:13:49.181824 ME Firmware Version = Consumer SKU
552 11:13:49.185389 Reference Code - PCH = a.0.4c.31
553 11:13:49.188706 PCH-CRID Status = Disabled
554 11:13:49.192092 PCH-CRID Original Value = ff.ff.ff.ffff
555 11:13:49.195415 PCH-CRID New Value = ff.ff.ff.ffff
556 11:13:49.198916 OPROM - RST - RAID = ff.ff.ff.ffff
557 11:13:49.201919 PCH Hsio Version = 4.0.0.0
558 11:13:49.205284 Reference Code - SA - System Agent = a.0.4c.31
559 11:13:49.208695 Reference Code - MRC = 2.0.0.1
560 11:13:49.211854 SA - PCIe Version = a.0.4c.31
561 11:13:49.215089 SA-CRID Status = Disabled
562 11:13:49.218614 SA-CRID Original Value = 0.0.0.1
563 11:13:49.222295 SA-CRID New Value = 0.0.0.1
564 11:13:49.225226 OPROM - VBIOS = ff.ff.ff.ffff
565 11:13:49.228588 IO Manageability Engine FW Version = 11.1.4.0
566 11:13:49.232123 PHY Build Version = 0.0.0.e0
567 11:13:49.235237 Thunderbolt(TM) FW Version = 0.0.0.0
568 11:13:49.241848 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 11:13:49.245137 ITSS IRQ Polarities Before:
570 11:13:49.245222 IPC0: 0xffffffff
571 11:13:49.248962 IPC1: 0xffffffff
572 11:13:49.249046 IPC2: 0xffffffff
573 11:13:49.251867 IPC3: 0xffffffff
574 11:13:49.255328 ITSS IRQ Polarities After:
575 11:13:49.255413 IPC0: 0xffffffff
576 11:13:49.258485 IPC1: 0xffffffff
577 11:13:49.258569 IPC2: 0xffffffff
578 11:13:49.261927 IPC3: 0xffffffff
579 11:13:49.265216 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 11:13:49.278567 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 11:13:49.288687 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 11:13:49.301827 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 11:13:49.308666 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
584 11:13:49.308814 Enumerating buses...
585 11:13:49.315212 Show all devs... Before device enumeration.
586 11:13:49.315340 Root Device: enabled 1
587 11:13:49.318759 DOMAIN: 0000: enabled 1
588 11:13:49.322008 CPU_CLUSTER: 0: enabled 1
589 11:13:49.325430 PCI: 00:00.0: enabled 1
590 11:13:49.325557 PCI: 00:02.0: enabled 1
591 11:13:49.328697 PCI: 00:04.0: enabled 1
592 11:13:49.331877 PCI: 00:05.0: enabled 1
593 11:13:49.335057 PCI: 00:06.0: enabled 0
594 11:13:49.335181 PCI: 00:07.0: enabled 0
595 11:13:49.338386 PCI: 00:07.1: enabled 0
596 11:13:49.341810 PCI: 00:07.2: enabled 0
597 11:13:49.344947 PCI: 00:07.3: enabled 0
598 11:13:49.345034 PCI: 00:08.0: enabled 1
599 11:13:49.348628 PCI: 00:09.0: enabled 0
600 11:13:49.351898 PCI: 00:0a.0: enabled 0
601 11:13:49.351984 PCI: 00:0d.0: enabled 1
602 11:13:49.355336 PCI: 00:0d.1: enabled 0
603 11:13:49.358469 PCI: 00:0d.2: enabled 0
604 11:13:49.361808 PCI: 00:0d.3: enabled 0
605 11:13:49.361936 PCI: 00:0e.0: enabled 0
606 11:13:49.365230 PCI: 00:10.2: enabled 1
607 11:13:49.368636 PCI: 00:10.6: enabled 0
608 11:13:49.372042 PCI: 00:10.7: enabled 0
609 11:13:49.372165 PCI: 00:12.0: enabled 0
610 11:13:49.375145 PCI: 00:12.6: enabled 0
611 11:13:49.378498 PCI: 00:13.0: enabled 0
612 11:13:49.381855 PCI: 00:14.0: enabled 1
613 11:13:49.381979 PCI: 00:14.1: enabled 0
614 11:13:49.385053 PCI: 00:14.2: enabled 1
615 11:13:49.388263 PCI: 00:14.3: enabled 1
616 11:13:49.388405 PCI: 00:15.0: enabled 1
617 11:13:49.391697 PCI: 00:15.1: enabled 1
618 11:13:49.394981 PCI: 00:15.2: enabled 1
619 11:13:49.398680 PCI: 00:15.3: enabled 1
620 11:13:49.398806 PCI: 00:16.0: enabled 1
621 11:13:49.401989 PCI: 00:16.1: enabled 0
622 11:13:49.405015 PCI: 00:16.2: enabled 0
623 11:13:49.408613 PCI: 00:16.3: enabled 0
624 11:13:49.408739 PCI: 00:16.4: enabled 0
625 11:13:49.411545 PCI: 00:16.5: enabled 0
626 11:13:49.414866 PCI: 00:17.0: enabled 1
627 11:13:49.418234 PCI: 00:19.0: enabled 0
628 11:13:49.418354 PCI: 00:19.1: enabled 1
629 11:13:49.421455 PCI: 00:19.2: enabled 0
630 11:13:49.425259 PCI: 00:1c.0: enabled 1
631 11:13:49.425384 PCI: 00:1c.1: enabled 0
632 11:13:49.428150 PCI: 00:1c.2: enabled 0
633 11:13:49.431758 PCI: 00:1c.3: enabled 0
634 11:13:49.434959 PCI: 00:1c.4: enabled 0
635 11:13:49.435080 PCI: 00:1c.5: enabled 0
636 11:13:49.438489 PCI: 00:1c.6: enabled 1
637 11:13:49.441650 PCI: 00:1c.7: enabled 0
638 11:13:49.445042 PCI: 00:1d.0: enabled 1
639 11:13:49.445165 PCI: 00:1d.1: enabled 0
640 11:13:49.448458 PCI: 00:1d.2: enabled 1
641 11:13:49.451580 PCI: 00:1d.3: enabled 0
642 11:13:49.455145 PCI: 00:1e.0: enabled 1
643 11:13:49.455269 PCI: 00:1e.1: enabled 0
644 11:13:49.458262 PCI: 00:1e.2: enabled 1
645 11:13:49.461726 PCI: 00:1e.3: enabled 1
646 11:13:49.461811 PCI: 00:1f.0: enabled 1
647 11:13:49.465124 PCI: 00:1f.1: enabled 0
648 11:13:49.468412 PCI: 00:1f.2: enabled 1
649 11:13:49.471975 PCI: 00:1f.3: enabled 1
650 11:13:49.472060 PCI: 00:1f.4: enabled 0
651 11:13:49.474995 PCI: 00:1f.5: enabled 1
652 11:13:49.478242 PCI: 00:1f.6: enabled 0
653 11:13:49.481990 PCI: 00:1f.7: enabled 0
654 11:13:49.482075 APIC: 00: enabled 1
655 11:13:49.484928 GENERIC: 0.0: enabled 1
656 11:13:49.488321 GENERIC: 0.0: enabled 1
657 11:13:49.488405 GENERIC: 1.0: enabled 1
658 11:13:49.491512 GENERIC: 0.0: enabled 1
659 11:13:49.495066 GENERIC: 1.0: enabled 1
660 11:13:49.498305 USB0 port 0: enabled 1
661 11:13:49.498390 GENERIC: 0.0: enabled 1
662 11:13:49.501850 USB0 port 0: enabled 1
663 11:13:49.505163 GENERIC: 0.0: enabled 1
664 11:13:49.505248 I2C: 00:1a: enabled 1
665 11:13:49.508132 I2C: 00:31: enabled 1
666 11:13:49.511384 I2C: 00:32: enabled 1
667 11:13:49.514765 I2C: 00:10: enabled 1
668 11:13:49.514850 I2C: 00:15: enabled 1
669 11:13:49.518669 GENERIC: 0.0: enabled 0
670 11:13:49.521326 GENERIC: 1.0: enabled 0
671 11:13:49.521410 GENERIC: 0.0: enabled 1
672 11:13:49.524668 SPI: 00: enabled 1
673 11:13:49.528076 SPI: 00: enabled 1
674 11:13:49.528160 PNP: 0c09.0: enabled 1
675 11:13:49.531139 GENERIC: 0.0: enabled 1
676 11:13:49.534604 USB3 port 0: enabled 1
677 11:13:49.534687 USB3 port 1: enabled 1
678 11:13:49.538057 USB3 port 2: enabled 0
679 11:13:49.541235 USB3 port 3: enabled 0
680 11:13:49.544840 USB2 port 0: enabled 0
681 11:13:49.544924 USB2 port 1: enabled 1
682 11:13:49.547847 USB2 port 2: enabled 1
683 11:13:49.551099 USB2 port 3: enabled 0
684 11:13:49.551183 USB2 port 4: enabled 1
685 11:13:49.554371 USB2 port 5: enabled 0
686 11:13:49.557750 USB2 port 6: enabled 0
687 11:13:49.561153 USB2 port 7: enabled 0
688 11:13:49.561235 USB2 port 8: enabled 0
689 11:13:49.564460 USB2 port 9: enabled 0
690 11:13:49.567814 USB3 port 0: enabled 0
691 11:13:49.567897 USB3 port 1: enabled 1
692 11:13:49.571087 USB3 port 2: enabled 0
693 11:13:49.574756 USB3 port 3: enabled 0
694 11:13:49.574839 GENERIC: 0.0: enabled 1
695 11:13:49.578034 GENERIC: 1.0: enabled 1
696 11:13:49.581176 APIC: 01: enabled 1
697 11:13:49.581259 APIC: 03: enabled 1
698 11:13:49.584762 APIC: 06: enabled 1
699 11:13:49.587782 APIC: 04: enabled 1
700 11:13:49.587865 APIC: 05: enabled 1
701 11:13:49.591344 APIC: 02: enabled 1
702 11:13:49.591427 APIC: 07: enabled 1
703 11:13:49.594530 Compare with tree...
704 11:13:49.598126 Root Device: enabled 1
705 11:13:49.601189 DOMAIN: 0000: enabled 1
706 11:13:49.601272 PCI: 00:00.0: enabled 1
707 11:13:49.604521 PCI: 00:02.0: enabled 1
708 11:13:49.607932 PCI: 00:04.0: enabled 1
709 11:13:49.611296 GENERIC: 0.0: enabled 1
710 11:13:49.614407 PCI: 00:05.0: enabled 1
711 11:13:49.614516 PCI: 00:06.0: enabled 0
712 11:13:49.618071 PCI: 00:07.0: enabled 0
713 11:13:49.621036 GENERIC: 0.0: enabled 1
714 11:13:49.624620 PCI: 00:07.1: enabled 0
715 11:13:49.627941 GENERIC: 1.0: enabled 1
716 11:13:49.628025 PCI: 00:07.2: enabled 0
717 11:13:49.631262 GENERIC: 0.0: enabled 1
718 11:13:49.634783 PCI: 00:07.3: enabled 0
719 11:13:49.638037 GENERIC: 1.0: enabled 1
720 11:13:49.641034 PCI: 00:08.0: enabled 1
721 11:13:49.641118 PCI: 00:09.0: enabled 0
722 11:13:49.644468 PCI: 00:0a.0: enabled 0
723 11:13:49.647792 PCI: 00:0d.0: enabled 1
724 11:13:49.651236 USB0 port 0: enabled 1
725 11:13:49.654327 USB3 port 0: enabled 1
726 11:13:49.654411 USB3 port 1: enabled 1
727 11:13:49.657829 USB3 port 2: enabled 0
728 11:13:49.661177 USB3 port 3: enabled 0
729 11:13:49.664370 PCI: 00:0d.1: enabled 0
730 11:13:49.667649 PCI: 00:0d.2: enabled 0
731 11:13:49.671023 GENERIC: 0.0: enabled 1
732 11:13:49.671106 PCI: 00:0d.3: enabled 0
733 11:13:49.674508 PCI: 00:0e.0: enabled 0
734 11:13:49.677926 PCI: 00:10.2: enabled 1
735 11:13:49.681371 PCI: 00:10.6: enabled 0
736 11:13:49.681454 PCI: 00:10.7: enabled 0
737 11:13:49.684604 PCI: 00:12.0: enabled 0
738 11:13:49.687751 PCI: 00:12.6: enabled 0
739 11:13:49.691542 PCI: 00:13.0: enabled 0
740 11:13:49.694399 PCI: 00:14.0: enabled 1
741 11:13:49.694483 USB0 port 0: enabled 1
742 11:13:49.697688 USB2 port 0: enabled 0
743 11:13:49.701016 USB2 port 1: enabled 1
744 11:13:49.704327 USB2 port 2: enabled 1
745 11:13:49.707768 USB2 port 3: enabled 0
746 11:13:49.710936 USB2 port 4: enabled 1
747 11:13:49.711019 USB2 port 5: enabled 0
748 11:13:49.714643 USB2 port 6: enabled 0
749 11:13:49.717773 USB2 port 7: enabled 0
750 11:13:49.721258 USB2 port 8: enabled 0
751 11:13:49.724555 USB2 port 9: enabled 0
752 11:13:49.724638 USB3 port 0: enabled 0
753 11:13:49.727595 USB3 port 1: enabled 1
754 11:13:49.730969 USB3 port 2: enabled 0
755 11:13:49.734427 USB3 port 3: enabled 0
756 11:13:49.737853 PCI: 00:14.1: enabled 0
757 11:13:49.740763 PCI: 00:14.2: enabled 1
758 11:13:49.740887 PCI: 00:14.3: enabled 1
759 11:13:49.744566 GENERIC: 0.0: enabled 1
760 11:13:49.747412 PCI: 00:15.0: enabled 1
761 11:13:49.750733 I2C: 00:1a: enabled 1
762 11:13:49.750854 I2C: 00:31: enabled 1
763 11:13:49.754288 I2C: 00:32: enabled 1
764 11:13:49.757316 PCI: 00:15.1: enabled 1
765 11:13:49.760904 I2C: 00:10: enabled 1
766 11:13:49.764368 PCI: 00:15.2: enabled 1
767 11:13:49.764490 PCI: 00:15.3: enabled 1
768 11:13:49.767545 PCI: 00:16.0: enabled 1
769 11:13:49.771453 PCI: 00:16.1: enabled 0
770 11:13:49.775060 PCI: 00:16.2: enabled 0
771 11:13:49.775190 PCI: 00:16.3: enabled 0
772 11:13:49.779023 PCI: 00:16.4: enabled 0
773 11:13:49.782393 PCI: 00:16.5: enabled 0
774 11:13:49.782518 PCI: 00:17.0: enabled 1
775 11:13:49.785645 PCI: 00:19.0: enabled 0
776 11:13:49.789096 PCI: 00:19.1: enabled 1
777 11:13:49.792562 I2C: 00:15: enabled 1
778 11:13:49.795492 PCI: 00:19.2: enabled 0
779 11:13:49.795616 PCI: 00:1d.0: enabled 1
780 11:13:49.798961 GENERIC: 0.0: enabled 1
781 11:13:49.802260 PCI: 00:1e.0: enabled 1
782 11:13:49.805633 PCI: 00:1e.1: enabled 0
783 11:13:49.809057 PCI: 00:1e.2: enabled 1
784 11:13:49.809132 SPI: 00: enabled 1
785 11:13:49.812181 PCI: 00:1e.3: enabled 1
786 11:13:49.815946 SPI: 00: enabled 1
787 11:13:49.857020 PCI: 00:1f.0: enabled 1
788 11:13:49.857107 PNP: 0c09.0: enabled 1
789 11:13:49.857192 PCI: 00:1f.1: enabled 0
790 11:13:49.857751 PCI: 00:1f.2: enabled 1
791 11:13:49.857868 GENERIC: 0.0: enabled 1
792 11:13:49.858141 GENERIC: 0.0: enabled 1
793 11:13:49.858211 GENERIC: 1.0: enabled 1
794 11:13:49.858305 PCI: 00:1f.3: enabled 1
795 11:13:49.858367 PCI: 00:1f.4: enabled 0
796 11:13:49.858427 PCI: 00:1f.5: enabled 1
797 11:13:49.858812 PCI: 00:1f.6: enabled 0
798 11:13:49.858897 PCI: 00:1f.7: enabled 0
799 11:13:49.859141 CPU_CLUSTER: 0: enabled 1
800 11:13:49.859230 APIC: 00: enabled 1
801 11:13:49.859306 APIC: 01: enabled 1
802 11:13:49.861670 APIC: 03: enabled 1
803 11:13:49.861755 APIC: 06: enabled 1
804 11:13:49.861822 APIC: 04: enabled 1
805 11:13:49.865118 APIC: 05: enabled 1
806 11:13:49.865203 APIC: 02: enabled 1
807 11:13:49.868639 APIC: 07: enabled 1
808 11:13:49.871772 Root Device scanning...
809 11:13:49.875130 scan_static_bus for Root Device
810 11:13:49.878740 DOMAIN: 0000 enabled
811 11:13:49.878825 CPU_CLUSTER: 0 enabled
812 11:13:49.881864 DOMAIN: 0000 scanning...
813 11:13:49.885100 PCI: pci_scan_bus for bus 00
814 11:13:49.888694 PCI: 00:00.0 [8086/0000] ops
815 11:13:49.891780 PCI: 00:00.0 [8086/9a12] enabled
816 11:13:49.895130 PCI: 00:02.0 [8086/0000] bus ops
817 11:13:49.898257 PCI: 00:02.0 [8086/9a40] enabled
818 11:13:49.901873 PCI: 00:04.0 [8086/0000] bus ops
819 11:13:49.904858 PCI: 00:04.0 [8086/9a03] enabled
820 11:13:49.908233 PCI: 00:05.0 [8086/9a19] enabled
821 11:13:49.911814 PCI: 00:07.0 [0000/0000] hidden
822 11:13:49.914971 PCI: 00:08.0 [8086/9a11] enabled
823 11:13:49.918306 PCI: 00:0a.0 [8086/9a0d] disabled
824 11:13:49.921900 PCI: 00:0d.0 [8086/0000] bus ops
825 11:13:49.924930 PCI: 00:0d.0 [8086/9a13] enabled
826 11:13:49.928246 PCI: 00:14.0 [8086/0000] bus ops
827 11:13:49.931896 PCI: 00:14.0 [8086/a0ed] enabled
828 11:13:49.935296 PCI: 00:14.2 [8086/a0ef] enabled
829 11:13:49.938377 PCI: 00:14.3 [8086/0000] bus ops
830 11:13:49.941771 PCI: 00:14.3 [8086/a0f0] enabled
831 11:13:49.945028 PCI: 00:15.0 [8086/0000] bus ops
832 11:13:49.948490 PCI: 00:15.0 [8086/a0e8] enabled
833 11:13:49.952026 PCI: 00:15.1 [8086/0000] bus ops
834 11:13:49.955353 PCI: 00:15.1 [8086/a0e9] enabled
835 11:13:49.958543 PCI: 00:15.2 [8086/0000] bus ops
836 11:13:49.961952 PCI: 00:15.2 [8086/a0ea] enabled
837 11:13:49.965208 PCI: 00:15.3 [8086/0000] bus ops
838 11:13:49.968583 PCI: 00:15.3 [8086/a0eb] enabled
839 11:13:49.971734 PCI: 00:16.0 [8086/0000] ops
840 11:13:49.975228 PCI: 00:16.0 [8086/a0e0] enabled
841 11:13:49.981655 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 11:13:49.985073 PCI: 00:19.0 [8086/0000] bus ops
843 11:13:49.988844 PCI: 00:19.0 [8086/a0c5] disabled
844 11:13:49.991813 PCI: 00:19.1 [8086/0000] bus ops
845 11:13:49.995432 PCI: 00:19.1 [8086/a0c6] enabled
846 11:13:49.998323 PCI: 00:1d.0 [8086/0000] bus ops
847 11:13:50.001939 PCI: 00:1d.0 [8086/a0b0] enabled
848 11:13:50.002023 PCI: 00:1e.0 [8086/0000] ops
849 11:13:50.005111 PCI: 00:1e.0 [8086/a0a8] enabled
850 11:13:50.008320 PCI: 00:1e.2 [8086/0000] bus ops
851 11:13:50.011874 PCI: 00:1e.2 [8086/a0aa] enabled
852 11:13:50.015355 PCI: 00:1e.3 [8086/0000] bus ops
853 11:13:50.018785 PCI: 00:1e.3 [8086/a0ab] enabled
854 11:13:50.021759 PCI: 00:1f.0 [8086/0000] bus ops
855 11:13:50.025281 PCI: 00:1f.0 [8086/a087] enabled
856 11:13:50.028511 RTC Init
857 11:13:50.031773 Set power on after power failure.
858 11:13:50.031861 Disabling Deep S3
859 11:13:50.035396 Disabling Deep S3
860 11:13:50.038548 Disabling Deep S4
861 11:13:50.038633 Disabling Deep S4
862 11:13:50.041759 Disabling Deep S5
863 11:13:50.041844 Disabling Deep S5
864 11:13:50.045024 PCI: 00:1f.2 [0000/0000] hidden
865 11:13:50.048965 PCI: 00:1f.3 [8086/0000] bus ops
866 11:13:50.051935 PCI: 00:1f.3 [8086/a0c8] enabled
867 11:13:50.055080 PCI: 00:1f.5 [8086/0000] bus ops
868 11:13:50.058337 PCI: 00:1f.5 [8086/a0a4] enabled
869 11:13:50.061750 PCI: Leftover static devices:
870 11:13:50.065039 PCI: 00:10.2
871 11:13:50.065124 PCI: 00:10.6
872 11:13:50.065191 PCI: 00:10.7
873 11:13:50.068388 PCI: 00:06.0
874 11:13:50.068472 PCI: 00:07.1
875 11:13:50.071733 PCI: 00:07.2
876 11:13:50.071817 PCI: 00:07.3
877 11:13:50.071885 PCI: 00:09.0
878 11:13:50.075512 PCI: 00:0d.1
879 11:13:50.075597 PCI: 00:0d.2
880 11:13:50.078533 PCI: 00:0d.3
881 11:13:50.078618 PCI: 00:0e.0
882 11:13:50.078685 PCI: 00:12.0
883 11:13:50.081966 PCI: 00:12.6
884 11:13:50.082097 PCI: 00:13.0
885 11:13:50.085221 PCI: 00:14.1
886 11:13:50.085347 PCI: 00:16.1
887 11:13:50.088509 PCI: 00:16.2
888 11:13:50.088633 PCI: 00:16.3
889 11:13:50.088747 PCI: 00:16.4
890 11:13:50.091857 PCI: 00:16.5
891 11:13:50.091983 PCI: 00:17.0
892 11:13:50.095230 PCI: 00:19.2
893 11:13:50.095337 PCI: 00:1e.1
894 11:13:50.095431 PCI: 00:1f.1
895 11:13:50.098449 PCI: 00:1f.4
896 11:13:50.098576 PCI: 00:1f.6
897 11:13:50.101676 PCI: 00:1f.7
898 11:13:50.105266 PCI: Check your devicetree.cb.
899 11:13:50.105348 PCI: 00:02.0 scanning...
900 11:13:50.108564 scan_generic_bus for PCI: 00:02.0
901 11:13:50.115201 scan_generic_bus for PCI: 00:02.0 done
902 11:13:50.118451 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 11:13:50.121894 PCI: 00:04.0 scanning...
904 11:13:50.125155 scan_generic_bus for PCI: 00:04.0
905 11:13:50.128573 GENERIC: 0.0 enabled
906 11:13:50.132196 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 11:13:50.138613 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 11:13:50.141792 PCI: 00:0d.0 scanning...
909 11:13:50.145138 scan_static_bus for PCI: 00:0d.0
910 11:13:50.145220 USB0 port 0 enabled
911 11:13:50.148651 USB0 port 0 scanning...
912 11:13:50.151911 scan_static_bus for USB0 port 0
913 11:13:50.155481 USB3 port 0 enabled
914 11:13:50.155563 USB3 port 1 enabled
915 11:13:50.158330 USB3 port 2 disabled
916 11:13:50.161724 USB3 port 3 disabled
917 11:13:50.161814 USB3 port 0 scanning...
918 11:13:50.165375 scan_static_bus for USB3 port 0
919 11:13:50.168405 scan_static_bus for USB3 port 0 done
920 11:13:50.175004 scan_bus: bus USB3 port 0 finished in 6 msecs
921 11:13:50.178498 USB3 port 1 scanning...
922 11:13:50.181811 scan_static_bus for USB3 port 1
923 11:13:50.184961 scan_static_bus for USB3 port 1 done
924 11:13:50.188330 scan_bus: bus USB3 port 1 finished in 6 msecs
925 11:13:50.191626 scan_static_bus for USB0 port 0 done
926 11:13:50.198625 scan_bus: bus USB0 port 0 finished in 43 msecs
927 11:13:50.201496 scan_static_bus for PCI: 00:0d.0 done
928 11:13:50.204961 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 11:13:50.208502 PCI: 00:14.0 scanning...
930 11:13:50.211709 scan_static_bus for PCI: 00:14.0
931 11:13:50.214749 USB0 port 0 enabled
932 11:13:50.214871 USB0 port 0 scanning...
933 11:13:50.218416 scan_static_bus for USB0 port 0
934 11:13:50.221580 USB2 port 0 disabled
935 11:13:50.224948 USB2 port 1 enabled
936 11:13:50.225067 USB2 port 2 enabled
937 11:13:50.228198 USB2 port 3 disabled
938 11:13:50.231343 USB2 port 4 enabled
939 11:13:50.231464 USB2 port 5 disabled
940 11:13:50.234775 USB2 port 6 disabled
941 11:13:50.238219 USB2 port 7 disabled
942 11:13:50.238334 USB2 port 8 disabled
943 11:13:50.241558 USB2 port 9 disabled
944 11:13:50.241661 USB3 port 0 disabled
945 11:13:50.244940 USB3 port 1 enabled
946 11:13:50.248303 USB3 port 2 disabled
947 11:13:50.248384 USB3 port 3 disabled
948 11:13:50.251585 USB2 port 1 scanning...
949 11:13:50.254742 scan_static_bus for USB2 port 1
950 11:13:50.258249 scan_static_bus for USB2 port 1 done
951 11:13:50.264612 scan_bus: bus USB2 port 1 finished in 6 msecs
952 11:13:50.264694 USB2 port 2 scanning...
953 11:13:50.268053 scan_static_bus for USB2 port 2
954 11:13:50.274854 scan_static_bus for USB2 port 2 done
955 11:13:50.278002 scan_bus: bus USB2 port 2 finished in 6 msecs
956 11:13:50.281603 USB2 port 4 scanning...
957 11:13:50.284886 scan_static_bus for USB2 port 4
958 11:13:50.288168 scan_static_bus for USB2 port 4 done
959 11:13:50.291695 scan_bus: bus USB2 port 4 finished in 6 msecs
960 11:13:50.294874 USB3 port 1 scanning...
961 11:13:50.298263 scan_static_bus for USB3 port 1
962 11:13:50.301333 scan_static_bus for USB3 port 1 done
963 11:13:50.304818 scan_bus: bus USB3 port 1 finished in 6 msecs
964 11:13:50.311688 scan_static_bus for USB0 port 0 done
965 11:13:50.314796 scan_bus: bus USB0 port 0 finished in 93 msecs
966 11:13:50.318205 scan_static_bus for PCI: 00:14.0 done
967 11:13:50.324809 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
968 11:13:50.324891 PCI: 00:14.3 scanning...
969 11:13:50.328308 scan_static_bus for PCI: 00:14.3
970 11:13:50.331554 GENERIC: 0.0 enabled
971 11:13:50.334696 scan_static_bus for PCI: 00:14.3 done
972 11:13:50.341820 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 11:13:50.341905 PCI: 00:15.0 scanning...
974 11:13:50.345300 scan_static_bus for PCI: 00:15.0
975 11:13:50.348558 I2C: 00:1a enabled
976 11:13:50.348667 I2C: 00:31 enabled
977 11:13:50.352379 I2C: 00:32 enabled
978 11:13:50.355850 scan_static_bus for PCI: 00:15.0 done
979 11:13:50.358969 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 11:13:50.362318 PCI: 00:15.1 scanning...
981 11:13:50.365815 scan_static_bus for PCI: 00:15.1
982 11:13:50.369291 I2C: 00:10 enabled
983 11:13:50.372530 scan_static_bus for PCI: 00:15.1 done
984 11:13:50.375763 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 11:13:50.379184 PCI: 00:15.2 scanning...
986 11:13:50.382602 scan_static_bus for PCI: 00:15.2
987 11:13:50.385852 scan_static_bus for PCI: 00:15.2 done
988 11:13:50.392626 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 11:13:50.395757 PCI: 00:15.3 scanning...
990 11:13:50.399147 scan_static_bus for PCI: 00:15.3
991 11:13:50.402203 scan_static_bus for PCI: 00:15.3 done
992 11:13:50.405662 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 11:13:50.408929 PCI: 00:19.1 scanning...
994 11:13:50.412630 scan_static_bus for PCI: 00:19.1
995 11:13:50.415658 I2C: 00:15 enabled
996 11:13:50.418903 scan_static_bus for PCI: 00:19.1 done
997 11:13:50.422067 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 11:13:50.425575 PCI: 00:1d.0 scanning...
999 11:13:50.429244 do_pci_scan_bridge for PCI: 00:1d.0
1000 11:13:50.432238 PCI: pci_scan_bus for bus 01
1001 11:13:50.435752 PCI: 01:00.0 [1c5c/174a] enabled
1002 11:13:50.439024 GENERIC: 0.0 enabled
1003 11:13:50.442140 Enabling Common Clock Configuration
1004 11:13:50.445640 L1 Sub-State supported from root port 29
1005 11:13:50.449037 L1 Sub-State Support = 0xf
1006 11:13:50.452304 CommonModeRestoreTime = 0x28
1007 11:13:50.455813 Power On Value = 0x16, Power On Scale = 0x0
1008 11:13:50.459080 ASPM: Enabled L1
1009 11:13:50.462382 PCIe: Max_Payload_Size adjusted to 128
1010 11:13:50.465872 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 11:13:50.469456 PCI: 00:1e.2 scanning...
1012 11:13:50.472317 scan_generic_bus for PCI: 00:1e.2
1013 11:13:50.475936 SPI: 00 enabled
1014 11:13:50.479215 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 11:13:50.485805 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 11:13:50.489010 PCI: 00:1e.3 scanning...
1017 11:13:50.492311 scan_generic_bus for PCI: 00:1e.3
1018 11:13:50.492395 SPI: 00 enabled
1019 11:13:50.498884 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 11:13:50.502397 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 11:13:50.505597 PCI: 00:1f.0 scanning...
1022 11:13:50.508889 scan_static_bus for PCI: 00:1f.0
1023 11:13:50.512195 PNP: 0c09.0 enabled
1024 11:13:50.515609 PNP: 0c09.0 scanning...
1025 11:13:50.519183 scan_static_bus for PNP: 0c09.0
1026 11:13:50.522674 scan_static_bus for PNP: 0c09.0 done
1027 11:13:50.525611 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 11:13:50.529286 scan_static_bus for PCI: 00:1f.0 done
1029 11:13:50.535562 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 11:13:50.538838 PCI: 00:1f.2 scanning...
1031 11:13:50.542275 scan_static_bus for PCI: 00:1f.2
1032 11:13:50.542357 GENERIC: 0.0 enabled
1033 11:13:50.545446 GENERIC: 0.0 scanning...
1034 11:13:50.549157 scan_static_bus for GENERIC: 0.0
1035 11:13:50.552192 GENERIC: 0.0 enabled
1036 11:13:50.552273 GENERIC: 1.0 enabled
1037 11:13:50.558855 scan_static_bus for GENERIC: 0.0 done
1038 11:13:50.561930 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 11:13:50.565410 scan_static_bus for PCI: 00:1f.2 done
1040 11:13:50.572456 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 11:13:50.572556 PCI: 00:1f.3 scanning...
1042 11:13:50.575575 scan_static_bus for PCI: 00:1f.3
1043 11:13:50.582057 scan_static_bus for PCI: 00:1f.3 done
1044 11:13:50.585341 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 11:13:50.588684 PCI: 00:1f.5 scanning...
1046 11:13:50.592014 scan_generic_bus for PCI: 00:1f.5
1047 11:13:50.595251 scan_generic_bus for PCI: 00:1f.5 done
1048 11:13:50.598684 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 11:13:50.605497 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1050 11:13:50.608914 scan_static_bus for Root Device done
1051 11:13:50.612141 scan_bus: bus Root Device finished in 737 msecs
1052 11:13:50.615340 done
1053 11:13:50.621827 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1054 11:13:50.621910 Chrome EC: UHEPI supported
1055 11:13:50.629296 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 11:13:50.635907 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 11:13:50.638971 SPI flash protection: WPSW=0 SRP0=0
1058 11:13:50.645714 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 11:13:50.649288 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 11:13:50.652438 found VGA at PCI: 00:02.0
1061 11:13:50.655426 Setting up VGA for PCI: 00:02.0
1062 11:13:50.662466 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 11:13:50.665665 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 11:13:50.668996 Allocating resources...
1065 11:13:50.672263 Reading resources...
1066 11:13:50.675366 Root Device read_resources bus 0 link: 0
1067 11:13:50.679006 DOMAIN: 0000 read_resources bus 0 link: 0
1068 11:13:50.685599 PCI: 00:04.0 read_resources bus 1 link: 0
1069 11:13:50.688990 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 11:13:50.695502 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 11:13:50.698837 USB0 port 0 read_resources bus 0 link: 0
1072 11:13:50.705806 USB0 port 0 read_resources bus 0 link: 0 done
1073 11:13:50.709029 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 11:13:50.712324 PCI: 00:14.0 read_resources bus 0 link: 0
1075 11:13:50.718844 USB0 port 0 read_resources bus 0 link: 0
1076 11:13:50.722240 USB0 port 0 read_resources bus 0 link: 0 done
1077 11:13:50.729304 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 11:13:50.732325 PCI: 00:14.3 read_resources bus 0 link: 0
1079 11:13:50.739252 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 11:13:50.742391 PCI: 00:15.0 read_resources bus 0 link: 0
1081 11:13:50.749223 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 11:13:50.752465 PCI: 00:15.1 read_resources bus 0 link: 0
1083 11:13:50.759478 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 11:13:50.762707 PCI: 00:19.1 read_resources bus 0 link: 0
1085 11:13:50.769497 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 11:13:50.773053 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 11:13:50.779598 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 11:13:50.782761 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 11:13:50.789502 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 11:13:50.793069 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 11:13:50.799574 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 11:13:50.802724 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 11:13:50.809286 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 11:13:50.812766 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 11:13:50.815959 GENERIC: 0.0 read_resources bus 0 link: 0
1096 11:13:50.822967 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 11:13:50.826456 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 11:13:50.833843 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 11:13:50.837059 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 11:13:50.843782 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 11:13:50.847496 Root Device read_resources bus 0 link: 0 done
1102 11:13:50.850111 Done reading resources.
1103 11:13:50.856981 Show resources in subtree (Root Device)...After reading.
1104 11:13:50.860536 Root Device child on link 0 DOMAIN: 0000
1105 11:13:50.863583 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 11:13:50.873734 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 11:13:50.883506 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 11:13:50.886856 PCI: 00:00.0
1109 11:13:50.893422 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 11:13:50.903703 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 11:13:50.913807 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 11:13:50.923127 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 11:13:50.933532 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 11:13:50.943683 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 11:13:50.949928 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 11:13:50.959896 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 11:13:50.969802 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 11:13:50.979913 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 11:13:50.989705 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 11:13:50.999756 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 11:13:51.006293 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 11:13:51.016273 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 11:13:51.026474 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 11:13:51.036289 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 11:13:51.046157 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 11:13:51.056097 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 11:13:51.062942 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 11:13:51.072724 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 11:13:51.076084 PCI: 00:02.0
1130 11:13:51.086235 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 11:13:51.096287 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 11:13:51.106122 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 11:13:51.109188 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 11:13:51.119101 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 11:13:51.119186 GENERIC: 0.0
1136 11:13:51.122480 PCI: 00:05.0
1137 11:13:51.132463 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 11:13:51.135845 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 11:13:51.139305 GENERIC: 0.0
1140 11:13:51.139389 PCI: 00:08.0
1141 11:13:51.149549 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 11:13:51.152650 PCI: 00:0a.0
1143 11:13:51.155924 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 11:13:51.165763 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 11:13:51.172474 USB0 port 0 child on link 0 USB3 port 0
1146 11:13:51.172559 USB3 port 0
1147 11:13:51.175862 USB3 port 1
1148 11:13:51.175945 USB3 port 2
1149 11:13:51.179191 USB3 port 3
1150 11:13:51.182651 PCI: 00:14.0 child on link 0 USB0 port 0
1151 11:13:51.192625 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 11:13:51.196105 USB0 port 0 child on link 0 USB2 port 0
1153 11:13:51.199412 USB2 port 0
1154 11:13:51.199494 USB2 port 1
1155 11:13:51.202628 USB2 port 2
1156 11:13:51.202711 USB2 port 3
1157 11:13:51.206082 USB2 port 4
1158 11:13:51.206166 USB2 port 5
1159 11:13:51.209421 USB2 port 6
1160 11:13:51.212524 USB2 port 7
1161 11:13:51.212607 USB2 port 8
1162 11:13:51.215708 USB2 port 9
1163 11:13:51.215816 USB3 port 0
1164 11:13:51.219080 USB3 port 1
1165 11:13:51.219180 USB3 port 2
1166 11:13:51.222584 USB3 port 3
1167 11:13:51.222680 PCI: 00:14.2
1168 11:13:51.232610 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 11:13:51.242430 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 11:13:51.248923 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 11:13:51.258840 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 11:13:51.258964 GENERIC: 0.0
1173 11:13:51.262238 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 11:13:51.272228 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 11:13:51.275980 I2C: 00:1a
1176 11:13:51.276101 I2C: 00:31
1177 11:13:51.279170 I2C: 00:32
1178 11:13:51.282268 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 11:13:51.292301 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 11:13:51.295545 I2C: 00:10
1181 11:13:51.295628 PCI: 00:15.2
1182 11:13:51.305681 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 11:13:51.308998 PCI: 00:15.3
1184 11:13:51.318689 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 11:13:51.318797 PCI: 00:16.0
1186 11:13:51.329240 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 11:13:51.332561 PCI: 00:19.0
1188 11:13:51.335715 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 11:13:51.345653 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 11:13:51.345737 I2C: 00:15
1191 11:13:51.352355 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 11:13:51.358856 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 11:13:51.368698 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 11:13:51.379069 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 11:13:51.379153 GENERIC: 0.0
1196 11:13:51.382225 PCI: 01:00.0
1197 11:13:51.392229 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 11:13:51.402381 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1199 11:13:51.412256 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1200 11:13:51.412340 PCI: 00:1e.0
1201 11:13:51.422091 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1202 11:13:51.428706 PCI: 00:1e.2 child on link 0 SPI: 00
1203 11:13:51.438570 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 11:13:51.438654 SPI: 00
1205 11:13:51.442453 PCI: 00:1e.3 child on link 0 SPI: 00
1206 11:13:51.452464 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 11:13:51.455470 SPI: 00
1208 11:13:51.458635 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1209 11:13:51.468632 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1210 11:13:51.468715 PNP: 0c09.0
1211 11:13:51.478833 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1212 11:13:51.482139 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1213 11:13:51.492209 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1214 11:13:51.502096 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1215 11:13:51.505351 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1216 11:13:51.508530 GENERIC: 0.0
1217 11:13:51.508656 GENERIC: 1.0
1218 11:13:51.511973 PCI: 00:1f.3
1219 11:13:51.522193 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 11:13:51.532350 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1221 11:13:51.532434 PCI: 00:1f.5
1222 11:13:51.541993 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1223 11:13:51.545405 CPU_CLUSTER: 0 child on link 0 APIC: 00
1224 11:13:51.548401 APIC: 00
1225 11:13:51.548523 APIC: 01
1226 11:13:51.548637 APIC: 03
1227 11:13:51.551849 APIC: 06
1228 11:13:51.551970 APIC: 04
1229 11:13:51.552081 APIC: 05
1230 11:13:51.555124 APIC: 02
1231 11:13:51.555244 APIC: 07
1232 11:13:51.565372 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1233 11:13:51.568452 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1234 11:13:51.575045 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1235 11:13:51.582277 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1236 11:13:51.585336 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1237 11:13:51.588543 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1238 11:13:51.595133 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1239 11:13:51.602346 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1240 11:13:51.608648 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1241 11:13:51.615218 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1242 11:13:51.625220 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1243 11:13:51.628356 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1244 11:13:51.638253 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 11:13:51.645048 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1246 11:13:51.651455 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1247 11:13:51.655039 DOMAIN: 0000: Resource ranges:
1248 11:13:51.658110 * Base: 1000, Size: 800, Tag: 100
1249 11:13:51.661802 * Base: 1900, Size: e700, Tag: 100
1250 11:13:51.668082 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1251 11:13:51.675097 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1252 11:13:51.681396 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1253 11:13:51.688121 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1254 11:13:51.697876 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1255 11:13:51.704901 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1256 11:13:51.711497 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1257 11:13:51.721416 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1258 11:13:51.728057 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1259 11:13:51.734707 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1260 11:13:51.745023 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1261 11:13:51.751453 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1262 11:13:51.758145 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1263 11:13:51.768083 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1264 11:13:51.774867 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1265 11:13:51.781487 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1266 11:13:51.788395 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1267 11:13:51.798083 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1268 11:13:51.804777 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1269 11:13:51.811818 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1270 11:13:51.821667 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1271 11:13:51.828649 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1272 11:13:51.834927 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1273 11:13:51.844606 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1274 11:13:51.851613 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1275 11:13:51.854943 DOMAIN: 0000: Resource ranges:
1276 11:13:51.858021 * Base: 7fc00000, Size: 40400000, Tag: 200
1277 11:13:51.864795 * Base: d0000000, Size: 28000000, Tag: 200
1278 11:13:51.868114 * Base: fa000000, Size: 1000000, Tag: 200
1279 11:13:51.871328 * Base: fb001000, Size: 2fff000, Tag: 200
1280 11:13:51.874852 * Base: fe010000, Size: 2e000, Tag: 200
1281 11:13:51.881402 * Base: fe03f000, Size: d41000, Tag: 200
1282 11:13:51.884968 * Base: fed88000, Size: 8000, Tag: 200
1283 11:13:51.888141 * Base: fed93000, Size: d000, Tag: 200
1284 11:13:51.891794 * Base: feda2000, Size: 1e000, Tag: 200
1285 11:13:51.898287 * Base: fede0000, Size: 1220000, Tag: 200
1286 11:13:51.901336 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1287 11:13:51.908250 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1288 11:13:51.914556 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1289 11:13:51.921271 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1290 11:13:51.927950 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1291 11:13:51.934526 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1292 11:13:51.941112 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1293 11:13:51.947989 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1294 11:13:51.954413 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1295 11:13:51.961159 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1296 11:13:51.967608 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1297 11:13:51.974169 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1298 11:13:51.980868 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1299 11:13:51.987797 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1300 11:13:51.994324 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1301 11:13:52.001002 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1302 11:13:52.007289 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1303 11:13:52.013956 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1304 11:13:52.020872 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1305 11:13:52.027451 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1306 11:13:52.034086 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1307 11:13:52.040559 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1308 11:13:52.047554 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1309 11:13:52.054142 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1310 11:13:52.063843 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1311 11:13:52.067090 PCI: 00:1d.0: Resource ranges:
1312 11:13:52.070442 * Base: 7fc00000, Size: 100000, Tag: 200
1313 11:13:52.077001 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1314 11:13:52.083706 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1315 11:13:52.090321 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1316 11:13:52.100670 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1317 11:13:52.107221 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1318 11:13:52.110545 Root Device assign_resources, bus 0 link: 0
1319 11:13:52.116892 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 11:13:52.123921 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1321 11:13:52.133541 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1322 11:13:52.140274 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1323 11:13:52.146762 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1324 11:13:52.153572 PCI: 00:04.0 assign_resources, bus 1 link: 0
1325 11:13:52.157412 PCI: 00:04.0 assign_resources, bus 1 link: 0
1326 11:13:52.166996 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1327 11:13:52.173692 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1328 11:13:52.183558 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1329 11:13:52.186918 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1330 11:13:52.190346 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1331 11:13:52.200138 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1332 11:13:52.203394 PCI: 00:14.0 assign_resources, bus 0 link: 0
1333 11:13:52.210103 PCI: 00:14.0 assign_resources, bus 0 link: 0
1334 11:13:52.216938 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1335 11:13:52.226898 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1336 11:13:52.233394 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1337 11:13:52.236479 PCI: 00:14.3 assign_resources, bus 0 link: 0
1338 11:13:52.243324 PCI: 00:14.3 assign_resources, bus 0 link: 0
1339 11:13:52.250278 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1340 11:13:52.256715 PCI: 00:15.0 assign_resources, bus 0 link: 0
1341 11:13:52.260263 PCI: 00:15.0 assign_resources, bus 0 link: 0
1342 11:13:52.266588 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1343 11:13:52.273171 PCI: 00:15.1 assign_resources, bus 0 link: 0
1344 11:13:52.276489 PCI: 00:15.1 assign_resources, bus 0 link: 0
1345 11:13:52.286659 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1346 11:13:52.293472 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1347 11:13:52.303118 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1348 11:13:52.309920 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1349 11:13:52.317105 PCI: 00:19.1 assign_resources, bus 0 link: 0
1350 11:13:52.319923 PCI: 00:19.1 assign_resources, bus 0 link: 0
1351 11:13:52.329987 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1352 11:13:52.339867 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 11:13:52.346334 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1354 11:13:52.349850 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 11:13:52.360021 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1356 11:13:52.366740 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1357 11:13:52.376706 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1358 11:13:52.380009 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 11:13:52.389876 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1360 11:13:52.393661 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1361 11:13:52.396534 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1362 11:13:52.406637 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1363 11:13:52.409791 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1364 11:13:52.416427 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1365 11:13:52.419780 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 11:13:52.423310 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1367 11:13:52.430198 LPC: Trying to open IO window from 800 size 1ff
1368 11:13:52.439892 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1369 11:13:52.446899 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1370 11:13:52.452981 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1371 11:13:52.460034 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 11:13:52.463194 Root Device assign_resources, bus 0 link: 0
1373 11:13:52.466507 Done setting resources.
1374 11:13:52.473198 Show resources in subtree (Root Device)...After assigning values.
1375 11:13:52.476333 Root Device child on link 0 DOMAIN: 0000
1376 11:13:52.480030 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1377 11:13:52.489710 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1378 11:13:52.499808 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1379 11:13:52.503021 PCI: 00:00.0
1380 11:13:52.512863 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1381 11:13:52.519459 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1382 11:13:52.529685 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1383 11:13:52.539984 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1384 11:13:52.549733 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1385 11:13:52.559590 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1386 11:13:52.569608 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1387 11:13:52.576230 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1388 11:13:52.586193 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1389 11:13:52.595990 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1390 11:13:52.606131 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1391 11:13:52.616120 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1392 11:13:52.622870 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1393 11:13:52.632746 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1394 11:13:52.642953 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1395 11:13:52.652779 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1396 11:13:52.662749 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1397 11:13:52.672990 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1398 11:13:52.679551 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1399 11:13:52.689226 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1400 11:13:52.692989 PCI: 00:02.0
1401 11:13:52.702800 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1402 11:13:52.712544 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1403 11:13:52.722516 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1404 11:13:52.725887 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1405 11:13:52.735795 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1406 11:13:52.739541 GENERIC: 0.0
1407 11:13:52.739624 PCI: 00:05.0
1408 11:13:52.752470 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1409 11:13:52.755897 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1410 11:13:52.759096 GENERIC: 0.0
1411 11:13:52.759179 PCI: 00:08.0
1412 11:13:52.769263 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1413 11:13:52.772475 PCI: 00:0a.0
1414 11:13:52.775672 PCI: 00:0d.0 child on link 0 USB0 port 0
1415 11:13:52.785907 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1416 11:13:52.788952 USB0 port 0 child on link 0 USB3 port 0
1417 11:13:52.792258 USB3 port 0
1418 11:13:52.795546 USB3 port 1
1419 11:13:52.795628 USB3 port 2
1420 11:13:52.799374 USB3 port 3
1421 11:13:52.802759 PCI: 00:14.0 child on link 0 USB0 port 0
1422 11:13:52.812454 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1423 11:13:52.815532 USB0 port 0 child on link 0 USB2 port 0
1424 11:13:52.819021 USB2 port 0
1425 11:13:52.819102 USB2 port 1
1426 11:13:52.822333 USB2 port 2
1427 11:13:52.825650 USB2 port 3
1428 11:13:52.825732 USB2 port 4
1429 11:13:52.828999 USB2 port 5
1430 11:13:52.829081 USB2 port 6
1431 11:13:52.832162 USB2 port 7
1432 11:13:52.832244 USB2 port 8
1433 11:13:52.835626 USB2 port 9
1434 11:13:52.835707 USB3 port 0
1435 11:13:52.839020 USB3 port 1
1436 11:13:52.839102 USB3 port 2
1437 11:13:52.842433 USB3 port 3
1438 11:13:52.842514 PCI: 00:14.2
1439 11:13:52.852180 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1440 11:13:52.865663 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1441 11:13:52.868916 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1442 11:13:52.879261 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1443 11:13:52.882383 GENERIC: 0.0
1444 11:13:52.885690 PCI: 00:15.0 child on link 0 I2C: 00:1a
1445 11:13:52.895704 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1446 11:13:52.895788 I2C: 00:1a
1447 11:13:52.898992 I2C: 00:31
1448 11:13:52.899074 I2C: 00:32
1449 11:13:52.905748 PCI: 00:15.1 child on link 0 I2C: 00:10
1450 11:13:52.915319 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1451 11:13:52.915403 I2C: 00:10
1452 11:13:52.918989 PCI: 00:15.2
1453 11:13:52.929020 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1454 11:13:52.929104 PCI: 00:15.3
1455 11:13:52.938714 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1456 11:13:52.942076 PCI: 00:16.0
1457 11:13:52.951849 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1458 11:13:52.955118 PCI: 00:19.0
1459 11:13:52.958595 PCI: 00:19.1 child on link 0 I2C: 00:15
1460 11:13:52.968551 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1461 11:13:52.968638 I2C: 00:15
1462 11:13:52.975574 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1463 11:13:52.985569 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1464 11:13:52.995271 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1465 11:13:53.005276 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1466 11:13:53.008714 GENERIC: 0.0
1467 11:13:53.008833 PCI: 01:00.0
1468 11:13:53.018654 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1469 11:13:53.031680 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1470 11:13:53.041498 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1471 11:13:53.041583 PCI: 00:1e.0
1472 11:13:53.055143 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1473 11:13:53.058297 PCI: 00:1e.2 child on link 0 SPI: 00
1474 11:13:53.068534 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1475 11:13:53.068633 SPI: 00
1476 11:13:53.074688 PCI: 00:1e.3 child on link 0 SPI: 00
1477 11:13:53.085096 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1478 11:13:53.085180 SPI: 00
1479 11:13:53.087959 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1480 11:13:53.097881 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1481 11:13:53.101210 PNP: 0c09.0
1482 11:13:53.107965 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1483 11:13:53.114328 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1484 11:13:53.121171 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1485 11:13:53.131165 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1486 11:13:53.137740 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1487 11:13:53.137847 GENERIC: 0.0
1488 11:13:53.141321 GENERIC: 1.0
1489 11:13:53.141429 PCI: 00:1f.3
1490 11:13:53.150973 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1491 11:13:53.161228 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1492 11:13:53.164410 PCI: 00:1f.5
1493 11:13:53.174066 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1494 11:13:53.177360 CPU_CLUSTER: 0 child on link 0 APIC: 00
1495 11:13:53.180758 APIC: 00
1496 11:13:53.180880 APIC: 01
1497 11:13:53.180991 APIC: 03
1498 11:13:53.184550 APIC: 06
1499 11:13:53.184668 APIC: 04
1500 11:13:53.187777 APIC: 05
1501 11:13:53.187897 APIC: 02
1502 11:13:53.188005 APIC: 07
1503 11:13:53.190920 Done allocating resources.
1504 11:13:53.197615 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1505 11:13:53.204595 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1506 11:13:53.207511 Configure GPIOs for I2S audio on UP4.
1507 11:13:53.214196 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1508 11:13:53.217554 Enabling resources...
1509 11:13:53.220641 PCI: 00:00.0 subsystem <- 8086/9a12
1510 11:13:53.224302 PCI: 00:00.0 cmd <- 06
1511 11:13:53.227528 PCI: 00:02.0 subsystem <- 8086/9a40
1512 11:13:53.230814 PCI: 00:02.0 cmd <- 03
1513 11:13:53.234143 PCI: 00:04.0 subsystem <- 8086/9a03
1514 11:13:53.234261 PCI: 00:04.0 cmd <- 02
1515 11:13:53.240986 PCI: 00:05.0 subsystem <- 8086/9a19
1516 11:13:53.241091 PCI: 00:05.0 cmd <- 02
1517 11:13:53.244369 PCI: 00:08.0 subsystem <- 8086/9a11
1518 11:13:53.247684 PCI: 00:08.0 cmd <- 06
1519 11:13:53.250857 PCI: 00:0d.0 subsystem <- 8086/9a13
1520 11:13:53.253959 PCI: 00:0d.0 cmd <- 02
1521 11:13:53.257645 PCI: 00:14.0 subsystem <- 8086/a0ed
1522 11:13:53.260798 PCI: 00:14.0 cmd <- 02
1523 11:13:53.264326 PCI: 00:14.2 subsystem <- 8086/a0ef
1524 11:13:53.267424 PCI: 00:14.2 cmd <- 02
1525 11:13:53.270949 PCI: 00:14.3 subsystem <- 8086/a0f0
1526 11:13:53.274245 PCI: 00:14.3 cmd <- 02
1527 11:13:53.277574 PCI: 00:15.0 subsystem <- 8086/a0e8
1528 11:13:53.277657 PCI: 00:15.0 cmd <- 02
1529 11:13:53.284322 PCI: 00:15.1 subsystem <- 8086/a0e9
1530 11:13:53.284404 PCI: 00:15.1 cmd <- 02
1531 11:13:53.287676 PCI: 00:15.2 subsystem <- 8086/a0ea
1532 11:13:53.291422 PCI: 00:15.2 cmd <- 02
1533 11:13:53.294586 PCI: 00:15.3 subsystem <- 8086/a0eb
1534 11:13:53.297946 PCI: 00:15.3 cmd <- 02
1535 11:13:53.301140 PCI: 00:16.0 subsystem <- 8086/a0e0
1536 11:13:53.304580 PCI: 00:16.0 cmd <- 02
1537 11:13:53.308022 PCI: 00:19.1 subsystem <- 8086/a0c6
1538 11:13:53.311417 PCI: 00:19.1 cmd <- 02
1539 11:13:53.314613 PCI: 00:1d.0 bridge ctrl <- 0013
1540 11:13:53.318058 PCI: 00:1d.0 subsystem <- 8086/a0b0
1541 11:13:53.321076 PCI: 00:1d.0 cmd <- 06
1542 11:13:53.324425 PCI: 00:1e.0 subsystem <- 8086/a0a8
1543 11:13:53.324507 PCI: 00:1e.0 cmd <- 06
1544 11:13:53.331219 PCI: 00:1e.2 subsystem <- 8086/a0aa
1545 11:13:53.331302 PCI: 00:1e.2 cmd <- 06
1546 11:13:53.334578 PCI: 00:1e.3 subsystem <- 8086/a0ab
1547 11:13:53.337956 PCI: 00:1e.3 cmd <- 02
1548 11:13:53.341113 PCI: 00:1f.0 subsystem <- 8086/a087
1549 11:13:53.344547 PCI: 00:1f.0 cmd <- 407
1550 11:13:53.347777 PCI: 00:1f.3 subsystem <- 8086/a0c8
1551 11:13:53.351422 PCI: 00:1f.3 cmd <- 02
1552 11:13:53.354491 PCI: 00:1f.5 subsystem <- 8086/a0a4
1553 11:13:53.357814 PCI: 00:1f.5 cmd <- 406
1554 11:13:53.361524 PCI: 01:00.0 cmd <- 02
1555 11:13:53.365893 done.
1556 11:13:53.369254 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1557 11:13:53.372623 Initializing devices...
1558 11:13:53.375767 Root Device init
1559 11:13:53.379027 Chrome EC: Set SMI mask to 0x0000000000000000
1560 11:13:53.386380 Chrome EC: clear events_b mask to 0x0000000000000000
1561 11:13:53.392671 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1562 11:13:53.395948 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1563 11:13:53.402407 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1564 11:13:53.409212 Chrome EC: Set WAKE mask to 0x0000000000000000
1565 11:13:53.412370 fw_config match found: DB_USB=USB3_ACTIVE
1566 11:13:53.419084 Configure Right Type-C port orientation for retimer
1567 11:13:53.422458 Root Device init finished in 42 msecs
1568 11:13:53.425777 PCI: 00:00.0 init
1569 11:13:53.425876 CPU TDP = 9 Watts
1570 11:13:53.428919 CPU PL1 = 9 Watts
1571 11:13:53.432399 CPU PL2 = 40 Watts
1572 11:13:53.432526 CPU PL4 = 83 Watts
1573 11:13:53.435667 PCI: 00:00.0 init finished in 8 msecs
1574 11:13:53.438996 PCI: 00:02.0 init
1575 11:13:53.442169 GMA: Found VBT in CBFS
1576 11:13:53.445591 GMA: Found valid VBT in CBFS
1577 11:13:53.449193 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1578 11:13:53.458930 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1579 11:13:53.462539 PCI: 00:02.0 init finished in 18 msecs
1580 11:13:53.462622 PCI: 00:05.0 init
1581 11:13:53.468920 PCI: 00:05.0 init finished in 0 msecs
1582 11:13:53.469019 PCI: 00:08.0 init
1583 11:13:53.472287 PCI: 00:08.0 init finished in 0 msecs
1584 11:13:53.476469 PCI: 00:14.0 init
1585 11:13:53.480080 PCI: 00:14.0 init finished in 0 msecs
1586 11:13:53.483140 PCI: 00:14.2 init
1587 11:13:53.486513 PCI: 00:14.2 init finished in 0 msecs
1588 11:13:53.489924 PCI: 00:15.0 init
1589 11:13:53.493156 I2C bus 0 version 0x3230302a
1590 11:13:53.496672 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1591 11:13:53.499960 PCI: 00:15.0 init finished in 6 msecs
1592 11:13:53.503203 PCI: 00:15.1 init
1593 11:13:53.503285 I2C bus 1 version 0x3230302a
1594 11:13:53.509856 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1595 11:13:53.513117 PCI: 00:15.1 init finished in 6 msecs
1596 11:13:53.513198 PCI: 00:15.2 init
1597 11:13:53.516644 I2C bus 2 version 0x3230302a
1598 11:13:53.520236 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1599 11:13:53.523486 PCI: 00:15.2 init finished in 6 msecs
1600 11:13:53.526783 PCI: 00:15.3 init
1601 11:13:53.530139 I2C bus 3 version 0x3230302a
1602 11:13:53.533209 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1603 11:13:53.536842 PCI: 00:15.3 init finished in 6 msecs
1604 11:13:53.540356 PCI: 00:16.0 init
1605 11:13:53.543291 PCI: 00:16.0 init finished in 0 msecs
1606 11:13:53.546832 PCI: 00:19.1 init
1607 11:13:53.550628 I2C bus 5 version 0x3230302a
1608 11:13:53.553753 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1609 11:13:53.556642 PCI: 00:19.1 init finished in 6 msecs
1610 11:13:53.559985 PCI: 00:1d.0 init
1611 11:13:53.560067 Initializing PCH PCIe bridge.
1612 11:13:53.566551 PCI: 00:1d.0 init finished in 3 msecs
1613 11:13:53.570288 PCI: 00:1f.0 init
1614 11:13:53.573491 IOAPIC: Initializing IOAPIC at 0xfec00000
1615 11:13:53.576840 IOAPIC: Bootstrap Processor Local APIC = 0x00
1616 11:13:53.579892 IOAPIC: ID = 0x02
1617 11:13:53.583270 IOAPIC: Dumping registers
1618 11:13:53.583352 reg 0x0000: 0x02000000
1619 11:13:53.586673 reg 0x0001: 0x00770020
1620 11:13:53.589969 reg 0x0002: 0x00000000
1621 11:13:53.593278 PCI: 00:1f.0 init finished in 21 msecs
1622 11:13:53.596638 PCI: 00:1f.2 init
1623 11:13:53.596720 Disabling ACPI via APMC.
1624 11:13:53.601572 APMC done.
1625 11:13:53.604736 PCI: 00:1f.2 init finished in 5 msecs
1626 11:13:53.616695 PCI: 01:00.0 init
1627 11:13:53.619777 PCI: 01:00.0 init finished in 0 msecs
1628 11:13:53.623139 PNP: 0c09.0 init
1629 11:13:53.626956 Google Chrome EC uptime: 8.422 seconds
1630 11:13:53.633178 Google Chrome AP resets since EC boot: 1
1631 11:13:53.636682 Google Chrome most recent AP reset causes:
1632 11:13:53.639918 0.349: 32775 shutdown: entering G3
1633 11:13:53.646475 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1634 11:13:53.649800 PNP: 0c09.0 init finished in 22 msecs
1635 11:13:53.655682 Devices initialized
1636 11:13:53.658829 Show all devs... After init.
1637 11:13:53.662523 Root Device: enabled 1
1638 11:13:53.662605 DOMAIN: 0000: enabled 1
1639 11:13:53.665610 CPU_CLUSTER: 0: enabled 1
1640 11:13:53.668860 PCI: 00:00.0: enabled 1
1641 11:13:53.672465 PCI: 00:02.0: enabled 1
1642 11:13:53.672546 PCI: 00:04.0: enabled 1
1643 11:13:53.675564 PCI: 00:05.0: enabled 1
1644 11:13:53.678745 PCI: 00:06.0: enabled 0
1645 11:13:53.682277 PCI: 00:07.0: enabled 0
1646 11:13:53.682360 PCI: 00:07.1: enabled 0
1647 11:13:53.685517 PCI: 00:07.2: enabled 0
1648 11:13:53.688821 PCI: 00:07.3: enabled 0
1649 11:13:53.692313 PCI: 00:08.0: enabled 1
1650 11:13:53.692395 PCI: 00:09.0: enabled 0
1651 11:13:53.695379 PCI: 00:0a.0: enabled 0
1652 11:13:53.698514 PCI: 00:0d.0: enabled 1
1653 11:13:53.702040 PCI: 00:0d.1: enabled 0
1654 11:13:53.702123 PCI: 00:0d.2: enabled 0
1655 11:13:53.705258 PCI: 00:0d.3: enabled 0
1656 11:13:53.708604 PCI: 00:0e.0: enabled 0
1657 11:13:53.708695 PCI: 00:10.2: enabled 1
1658 11:13:53.711914 PCI: 00:10.6: enabled 0
1659 11:13:53.715318 PCI: 00:10.7: enabled 0
1660 11:13:53.718605 PCI: 00:12.0: enabled 0
1661 11:13:53.718687 PCI: 00:12.6: enabled 0
1662 11:13:53.721829 PCI: 00:13.0: enabled 0
1663 11:13:53.725178 PCI: 00:14.0: enabled 1
1664 11:13:53.728432 PCI: 00:14.1: enabled 0
1665 11:13:53.728531 PCI: 00:14.2: enabled 1
1666 11:13:53.731848 PCI: 00:14.3: enabled 1
1667 11:13:53.735328 PCI: 00:15.0: enabled 1
1668 11:13:53.738741 PCI: 00:15.1: enabled 1
1669 11:13:53.738823 PCI: 00:15.2: enabled 1
1670 11:13:53.742084 PCI: 00:15.3: enabled 1
1671 11:13:53.745231 PCI: 00:16.0: enabled 1
1672 11:13:53.745314 PCI: 00:16.1: enabled 0
1673 11:13:53.748490 PCI: 00:16.2: enabled 0
1674 11:13:53.752417 PCI: 00:16.3: enabled 0
1675 11:13:53.755184 PCI: 00:16.4: enabled 0
1676 11:13:53.755265 PCI: 00:16.5: enabled 0
1677 11:13:53.758552 PCI: 00:17.0: enabled 0
1678 11:13:53.761996 PCI: 00:19.0: enabled 0
1679 11:13:53.765824 PCI: 00:19.1: enabled 1
1680 11:13:53.765906 PCI: 00:19.2: enabled 0
1681 11:13:53.768564 PCI: 00:1c.0: enabled 1
1682 11:13:53.771924 PCI: 00:1c.1: enabled 0
1683 11:13:53.772006 PCI: 00:1c.2: enabled 0
1684 11:13:53.775343 PCI: 00:1c.3: enabled 0
1685 11:13:53.778858 PCI: 00:1c.4: enabled 0
1686 11:13:53.782259 PCI: 00:1c.5: enabled 0
1687 11:13:53.782341 PCI: 00:1c.6: enabled 1
1688 11:13:53.785500 PCI: 00:1c.7: enabled 0
1689 11:13:53.788798 PCI: 00:1d.0: enabled 1
1690 11:13:53.792428 PCI: 00:1d.1: enabled 0
1691 11:13:53.792510 PCI: 00:1d.2: enabled 1
1692 11:13:53.795430 PCI: 00:1d.3: enabled 0
1693 11:13:53.799286 PCI: 00:1e.0: enabled 1
1694 11:13:53.799368 PCI: 00:1e.1: enabled 0
1695 11:13:53.802197 PCI: 00:1e.2: enabled 1
1696 11:13:53.805430 PCI: 00:1e.3: enabled 1
1697 11:13:53.809035 PCI: 00:1f.0: enabled 1
1698 11:13:53.809117 PCI: 00:1f.1: enabled 0
1699 11:13:53.812063 PCI: 00:1f.2: enabled 1
1700 11:13:53.815992 PCI: 00:1f.3: enabled 1
1701 11:13:53.819051 PCI: 00:1f.4: enabled 0
1702 11:13:53.819134 PCI: 00:1f.5: enabled 1
1703 11:13:53.822075 PCI: 00:1f.6: enabled 0
1704 11:13:53.825381 PCI: 00:1f.7: enabled 0
1705 11:13:53.825463 APIC: 00: enabled 1
1706 11:13:53.828919 GENERIC: 0.0: enabled 1
1707 11:13:53.832233 GENERIC: 0.0: enabled 1
1708 11:13:53.835356 GENERIC: 1.0: enabled 1
1709 11:13:53.835438 GENERIC: 0.0: enabled 1
1710 11:13:53.839017 GENERIC: 1.0: enabled 1
1711 11:13:53.842013 USB0 port 0: enabled 1
1712 11:13:53.845580 GENERIC: 0.0: enabled 1
1713 11:13:53.845662 USB0 port 0: enabled 1
1714 11:13:53.848999 GENERIC: 0.0: enabled 1
1715 11:13:53.852008 I2C: 00:1a: enabled 1
1716 11:13:53.852090 I2C: 00:31: enabled 1
1717 11:13:53.855448 I2C: 00:32: enabled 1
1718 11:13:53.858834 I2C: 00:10: enabled 1
1719 11:13:53.858916 I2C: 00:15: enabled 1
1720 11:13:53.862333 GENERIC: 0.0: enabled 0
1721 11:13:53.865219 GENERIC: 1.0: enabled 0
1722 11:13:53.868619 GENERIC: 0.0: enabled 1
1723 11:13:53.868702 SPI: 00: enabled 1
1724 11:13:53.872368 SPI: 00: enabled 1
1725 11:13:53.872450 PNP: 0c09.0: enabled 1
1726 11:13:53.875330 GENERIC: 0.0: enabled 1
1727 11:13:53.878877 USB3 port 0: enabled 1
1728 11:13:53.882616 USB3 port 1: enabled 1
1729 11:13:53.882697 USB3 port 2: enabled 0
1730 11:13:53.885291 USB3 port 3: enabled 0
1731 11:13:53.888744 USB2 port 0: enabled 0
1732 11:13:53.888863 USB2 port 1: enabled 1
1733 11:13:53.891998 USB2 port 2: enabled 1
1734 11:13:53.895221 USB2 port 3: enabled 0
1735 11:13:53.898667 USB2 port 4: enabled 1
1736 11:13:53.898751 USB2 port 5: enabled 0
1737 11:13:53.901991 USB2 port 6: enabled 0
1738 11:13:53.905289 USB2 port 7: enabled 0
1739 11:13:53.905371 USB2 port 8: enabled 0
1740 11:13:53.908673 USB2 port 9: enabled 0
1741 11:13:53.911887 USB3 port 0: enabled 0
1742 11:13:53.911969 USB3 port 1: enabled 1
1743 11:13:53.915289 USB3 port 2: enabled 0
1744 11:13:53.918747 USB3 port 3: enabled 0
1745 11:13:53.922073 GENERIC: 0.0: enabled 1
1746 11:13:53.922155 GENERIC: 1.0: enabled 1
1747 11:13:53.925409 APIC: 01: enabled 1
1748 11:13:53.928594 APIC: 03: enabled 1
1749 11:13:53.928676 APIC: 06: enabled 1
1750 11:13:53.932188 APIC: 04: enabled 1
1751 11:13:53.932270 APIC: 05: enabled 1
1752 11:13:53.935269 APIC: 02: enabled 1
1753 11:13:53.938531 APIC: 07: enabled 1
1754 11:13:53.938652 PCI: 01:00.0: enabled 1
1755 11:13:53.945111 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1756 11:13:53.948631 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1757 11:13:53.955133 ELOG: NV offset 0xf30000 size 0x1000
1758 11:13:53.961763 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1759 11:13:53.968424 ELOG: Event(17) added with size 13 at 2023-08-01 11:13:45 UTC
1760 11:13:53.975261 ELOG: Event(92) added with size 9 at 2023-08-01 11:13:45 UTC
1761 11:13:53.982038 ELOG: Event(93) added with size 9 at 2023-08-01 11:13:45 UTC
1762 11:13:53.988518 ELOG: Event(9E) added with size 10 at 2023-08-01 11:13:45 UTC
1763 11:13:53.995480 ELOG: Event(9F) added with size 14 at 2023-08-01 11:13:45 UTC
1764 11:13:53.998467 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1765 11:13:54.005274 ELOG: Event(A1) added with size 10 at 2023-08-01 11:13:45 UTC
1766 11:13:54.011755 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1767 11:13:54.018721 ELOG: Event(A0) added with size 9 at 2023-08-01 11:13:45 UTC
1768 11:13:54.025380 elog_add_boot_reason: Logged dev mode boot
1769 11:13:54.028633 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1770 11:13:54.031897 Finalize devices...
1771 11:13:54.031980 Devices finalized
1772 11:13:54.038840 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1773 11:13:54.045359 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1774 11:13:54.048677 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1775 11:13:54.055425 ME: HFSTS1 : 0x80030055
1776 11:13:54.058401 ME: HFSTS2 : 0x30280116
1777 11:13:54.065146 ME: HFSTS3 : 0x00000050
1778 11:13:54.068412 ME: HFSTS4 : 0x00004000
1779 11:13:54.071640 ME: HFSTS5 : 0x00000000
1780 11:13:54.078558 ME: HFSTS6 : 0x00400006
1781 11:13:54.081757 ME: Manufacturing Mode : YES
1782 11:13:54.085428 ME: SPI Protection Mode Enabled : NO
1783 11:13:54.088786 ME: FW Partition Table : OK
1784 11:13:54.091967 ME: Bringup Loader Failure : NO
1785 11:13:54.095409 ME: Firmware Init Complete : NO
1786 11:13:54.098312 ME: Boot Options Present : NO
1787 11:13:54.101710 ME: Update In Progress : NO
1788 11:13:54.108241 ME: D0i3 Support : YES
1789 11:13:54.111901 ME: Low Power State Enabled : NO
1790 11:13:54.114838 ME: CPU Replaced : YES
1791 11:13:54.118554 ME: CPU Replacement Valid : YES
1792 11:13:54.121760 ME: Current Working State : 5
1793 11:13:54.125114 ME: Current Operation State : 1
1794 11:13:54.128217 ME: Current Operation Mode : 3
1795 11:13:54.131618 ME: Error Code : 0
1796 11:13:54.135033 ME: Enhanced Debug Mode : NO
1797 11:13:54.141812 ME: CPU Debug Disabled : YES
1798 11:13:54.145205 ME: TXT Support : NO
1799 11:13:54.148305 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1800 11:13:54.158671 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1801 11:13:54.161737 CBFS: 'fallback/slic' not found.
1802 11:13:54.165438 ACPI: Writing ACPI tables at 76b01000.
1803 11:13:54.165542 ACPI: * FACS
1804 11:13:54.168428 ACPI: * DSDT
1805 11:13:54.172061 Ramoops buffer: 0x100000@0x76a00000.
1806 11:13:54.175343 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1807 11:13:54.181746 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1808 11:13:54.185319 Google Chrome EC: version:
1809 11:13:54.188882 ro: voema_v2.0.7540-147f8d37d1
1810 11:13:54.191834 rw: voema_v2.0.7540-147f8d37d1
1811 11:13:54.195262 running image: 2
1812 11:13:54.202103 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1813 11:13:54.205276 ACPI: * FADT
1814 11:13:54.205358 SCI is IRQ9
1815 11:13:54.208566 ACPI: added table 1/32, length now 40
1816 11:13:54.211996 ACPI: * SSDT
1817 11:13:54.215040 Found 1 CPU(s) with 8 core(s) each.
1818 11:13:54.218367 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1819 11:13:54.221748 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1820 11:13:54.228718 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1821 11:13:54.232111 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1822 11:13:54.238450 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1823 11:13:54.241580 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1824 11:13:54.248927 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1825 11:13:54.251568 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1826 11:13:54.261642 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1827 11:13:54.265054 \_SB.PCI0.RP09: Added StorageD3Enable property
1828 11:13:54.268358 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1829 11:13:54.275262 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1830 11:13:54.278268 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1831 11:13:54.281585 PS2K: Passing 80 keymaps to kernel
1832 11:13:54.288409 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1833 11:13:54.294974 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1834 11:13:54.301483 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1835 11:13:54.308092 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1836 11:13:54.314734 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1837 11:13:54.321229 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1838 11:13:54.328332 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1839 11:13:54.334404 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1840 11:13:54.337888 ACPI: added table 2/32, length now 44
1841 11:13:54.341050 ACPI: * MCFG
1842 11:13:54.344320 ACPI: added table 3/32, length now 48
1843 11:13:54.347751 ACPI: * TPM2
1844 11:13:54.351068 TPM2 log created at 0x769f0000
1845 11:13:54.354322 ACPI: added table 4/32, length now 52
1846 11:13:54.354406 ACPI: * MADT
1847 11:13:54.357409 SCI is IRQ9
1848 11:13:54.361050 ACPI: added table 5/32, length now 56
1849 11:13:54.361134 current = 76b09850
1850 11:13:54.364642 ACPI: * DMAR
1851 11:13:54.367842 ACPI: added table 6/32, length now 60
1852 11:13:54.371390 ACPI: added table 7/32, length now 64
1853 11:13:54.374199 ACPI: * HPET
1854 11:13:54.377498 ACPI: added table 8/32, length now 68
1855 11:13:54.377606 ACPI: done.
1856 11:13:54.380891 ACPI tables: 35216 bytes.
1857 11:13:54.384257 smbios_write_tables: 769ef000
1858 11:13:54.387295 EC returned error result code 3
1859 11:13:54.390653 Couldn't obtain OEM name from CBI
1860 11:13:54.394053 Create SMBIOS type 16
1861 11:13:54.394137 Create SMBIOS type 17
1862 11:13:54.397514 GENERIC: 0.0 (WIFI Device)
1863 11:13:54.400690 SMBIOS tables: 1750 bytes.
1864 11:13:54.404638 Writing table forward entry at 0x00000500
1865 11:13:54.410768 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1866 11:13:54.414168 Writing coreboot table at 0x76b25000
1867 11:13:54.420417 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1868 11:13:54.423817 1. 0000000000001000-000000000009ffff: RAM
1869 11:13:54.430832 2. 00000000000a0000-00000000000fffff: RESERVED
1870 11:13:54.433853 3. 0000000000100000-00000000769eefff: RAM
1871 11:13:54.440564 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1872 11:13:54.443982 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1873 11:13:54.450313 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1874 11:13:54.457111 7. 0000000077000000-000000007fbfffff: RESERVED
1875 11:13:54.460485 8. 00000000c0000000-00000000cfffffff: RESERVED
1876 11:13:54.467148 9. 00000000f8000000-00000000f9ffffff: RESERVED
1877 11:13:54.470534 10. 00000000fb000000-00000000fb000fff: RESERVED
1878 11:13:54.474017 11. 00000000fe000000-00000000fe00ffff: RESERVED
1879 11:13:54.480716 12. 00000000fed80000-00000000fed87fff: RESERVED
1880 11:13:54.483726 13. 00000000fed90000-00000000fed92fff: RESERVED
1881 11:13:54.490729 14. 00000000feda0000-00000000feda1fff: RESERVED
1882 11:13:54.493826 15. 00000000fedc0000-00000000feddffff: RESERVED
1883 11:13:54.497334 16. 0000000100000000-00000002803fffff: RAM
1884 11:13:54.500631 Passing 4 GPIOs to payload:
1885 11:13:54.507131 NAME | PORT | POLARITY | VALUE
1886 11:13:54.510747 lid | undefined | high | high
1887 11:13:54.517337 power | undefined | high | low
1888 11:13:54.524169 oprom | undefined | high | low
1889 11:13:54.527415 EC in RW | 0x000000e5 | high | high
1890 11:13:54.534120 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum d753
1891 11:13:54.537304 coreboot table: 1576 bytes.
1892 11:13:54.540545 IMD ROOT 0. 0x76fff000 0x00001000
1893 11:13:54.543906 IMD SMALL 1. 0x76ffe000 0x00001000
1894 11:13:54.547290 FSP MEMORY 2. 0x76c4e000 0x003b0000
1895 11:13:54.550405 VPD 3. 0x76c4d000 0x00000367
1896 11:13:54.557071 RO MCACHE 4. 0x76c4c000 0x00000fdc
1897 11:13:54.560409 CONSOLE 5. 0x76c2c000 0x00020000
1898 11:13:54.563721 FMAP 6. 0x76c2b000 0x00000578
1899 11:13:54.567365 TIME STAMP 7. 0x76c2a000 0x00000910
1900 11:13:54.570593 VBOOT WORK 8. 0x76c16000 0x00014000
1901 11:13:54.573703 ROMSTG STCK 9. 0x76c15000 0x00001000
1902 11:13:54.576932 AFTER CAR 10. 0x76c0a000 0x0000b000
1903 11:13:54.580320 RAMSTAGE 11. 0x76b97000 0x00073000
1904 11:13:54.584022 REFCODE 12. 0x76b42000 0x00055000
1905 11:13:54.590420 SMM BACKUP 13. 0x76b32000 0x00010000
1906 11:13:54.593720 4f444749 14. 0x76b30000 0x00002000
1907 11:13:54.597015 EXT VBT15. 0x76b2d000 0x0000219f
1908 11:13:54.600663 COREBOOT 16. 0x76b25000 0x00008000
1909 11:13:54.603911 ACPI 17. 0x76b01000 0x00024000
1910 11:13:54.607329 ACPI GNVS 18. 0x76b00000 0x00001000
1911 11:13:54.610422 RAMOOPS 19. 0x76a00000 0x00100000
1912 11:13:54.613993 TPM2 TCGLOG20. 0x769f0000 0x00010000
1913 11:13:54.617476 SMBIOS 21. 0x769ef000 0x00000800
1914 11:13:54.620518 IMD small region:
1915 11:13:54.623845 IMD ROOT 0. 0x76ffec00 0x00000400
1916 11:13:54.627495 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1917 11:13:54.633882 POWER STATE 2. 0x76ffeb80 0x00000044
1918 11:13:54.637117 ROMSTAGE 3. 0x76ffeb60 0x00000004
1919 11:13:54.640391 MEM INFO 4. 0x76ffe980 0x000001e0
1920 11:13:54.647465 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1921 11:13:54.650550 MTRR: Physical address space:
1922 11:13:54.653821 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1923 11:13:54.660431 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1924 11:13:54.667225 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1925 11:13:54.673773 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1926 11:13:54.680628 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1927 11:13:54.687117 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1928 11:13:54.693802 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1929 11:13:54.697200 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 11:13:54.700646 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 11:13:54.703667 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 11:13:54.710582 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 11:13:54.713900 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 11:13:54.717291 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 11:13:54.720632 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 11:13:54.727061 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 11:13:54.730442 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 11:13:54.733770 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 11:13:54.736902 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 11:13:54.740907 call enable_fixed_mtrr()
1941 11:13:54.744242 CPU physical address size: 39 bits
1942 11:13:54.750857 MTRR: default type WB/UC MTRR counts: 6/6.
1943 11:13:54.754417 MTRR: UC selected as default type.
1944 11:13:54.761177 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1945 11:13:54.764224 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1946 11:13:54.771024 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1947 11:13:54.777647 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1948 11:13:54.784182 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1949 11:13:54.790886 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1950 11:13:54.797727 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 11:13:54.800661 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 11:13:54.804125 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 11:13:54.807468 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 11:13:54.810609 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 11:13:54.817365 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 11:13:54.820603 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 11:13:54.823812 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 11:13:54.827278 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 11:13:54.833779 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 11:13:54.837177 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 11:13:54.837260
1962 11:13:54.840718 MTRR check
1963 11:13:54.840852 call enable_fixed_mtrr()
1964 11:13:54.844027 Fixed MTRRs : Enabled
1965 11:13:54.847150 Variable MTRRs: Enabled
1966 11:13:54.847233
1967 11:13:54.850484 CPU physical address size: 39 bits
1968 11:13:54.857394 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
1969 11:13:54.860468 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 11:13:54.867256 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 11:13:54.870470 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 11:13:54.874209 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 11:13:54.877266 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 11:13:54.883653 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 11:13:54.887438 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 11:13:54.890361 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 11:13:54.894227 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 11:13:54.897060 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 11:13:54.903881 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 11:13:54.907162 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 11:13:54.910331 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 11:13:54.913642 call enable_fixed_mtrr()
1983 11:13:54.917385 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 11:13:54.923702 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 11:13:54.927046 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 11:13:54.930146 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 11:13:54.933687 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 11:13:54.940193 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 11:13:54.943303 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 11:13:54.946754 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 11:13:54.949950 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 11:13:54.954517 CPU physical address size: 39 bits
1993 11:13:54.961033 call enable_fixed_mtrr()
1994 11:13:54.964262 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 11:13:54.967428 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 11:13:54.970957 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 11:13:54.977637 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 11:13:54.980669 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 11:13:54.984081 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 11:13:54.987514 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 11:13:54.991136 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 11:13:54.997484 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 11:13:55.000960 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 11:13:55.004261 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 11:13:55.007292 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 11:13:55.014905 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 11:13:55.018162 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 11:13:55.021598 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 11:13:55.025103 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 11:13:55.031679 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 11:13:55.034854 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 11:13:55.038401 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 11:13:55.041645 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 11:13:55.048002 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 11:13:55.051441 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 11:13:55.054959 call enable_fixed_mtrr()
2017 11:13:55.058077 call enable_fixed_mtrr()
2018 11:13:55.062511 Checking cr50 for pending updates
2019 11:13:55.065716 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 11:13:55.069225 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 11:13:55.072230 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 11:13:55.075850 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 11:13:55.082420 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 11:13:55.085833 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 11:13:55.089029 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 11:13:55.092783 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 11:13:55.095717 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 11:13:55.102759 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 11:13:55.105725 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 11:13:55.108984 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 11:13:55.115771 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 11:13:55.115852 call enable_fixed_mtrr()
2033 11:13:55.122413 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 11:13:55.125775 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 11:13:55.128991 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 11:13:55.132392 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 11:13:55.139046 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 11:13:55.142415 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 11:13:55.145532 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 11:13:55.148887 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 11:13:55.155653 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 11:13:55.158823 CPU physical address size: 39 bits
2043 11:13:55.162539 call enable_fixed_mtrr()
2044 11:13:55.165378 CPU physical address size: 39 bits
2045 11:13:55.168871 CPU physical address size: 39 bits
2046 11:13:55.172337 CPU physical address size: 39 bits
2047 11:13:55.176246 Reading cr50 TPM mode
2048 11:13:55.180031 CPU physical address size: 39 bits
2049 11:13:55.186280 BS: BS_PAYLOAD_LOAD entry times (exec / console): 317 / 6 ms
2050 11:13:55.196214 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2051 11:13:55.200342 Checking segment from ROM address 0xffc02b38
2052 11:13:55.202957 Checking segment from ROM address 0xffc02b54
2053 11:13:55.209666 Loading segment from ROM address 0xffc02b38
2054 11:13:55.209764 code (compression=0)
2055 11:13:55.219657 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2056 11:13:55.226169 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2057 11:13:55.229462 it's not compressed!
2058 11:13:55.368898 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2059 11:13:55.375662 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2060 11:13:55.382312 Loading segment from ROM address 0xffc02b54
2061 11:13:55.382395 Entry Point 0x30000000
2062 11:13:55.386074 Loaded segments
2063 11:13:55.392682 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2064 11:13:55.435145 Finalizing chipset.
2065 11:13:55.438344 Finalizing SMM.
2066 11:13:55.438442 APMC done.
2067 11:13:55.445437 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2068 11:13:55.448438 mp_park_aps done after 0 msecs.
2069 11:13:55.451861 Jumping to boot code at 0x30000000(0x76b25000)
2070 11:13:55.461863 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2071 11:13:55.461992
2072 11:13:55.462112
2073 11:13:55.462221
2074 11:13:55.465068 Starting depthcharge on Voema...
2075 11:13:55.465189
2076 11:13:55.465619 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2077 11:13:55.465781 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2078 11:13:55.465916 Setting prompt string to ['volteer:']
2079 11:13:55.466042 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2080 11:13:55.474939 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2081 11:13:55.475064
2082 11:13:55.481720 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2083 11:13:55.481847
2084 11:13:55.485069 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2085 11:13:55.489228
2086 11:13:55.489349 Failed to find eMMC card reader
2087 11:13:55.489462
2088 11:13:55.492597 Wipe memory regions:
2089 11:13:55.492716
2090 11:13:55.496288 [0x00000000001000, 0x000000000a0000)
2091 11:13:55.496409
2092 11:13:55.499175 [0x00000000100000, 0x00000030000000)
2093 11:13:55.526729
2094 11:13:55.530319 [0x00000032662db0, 0x000000769ef000)
2095 11:13:55.565990
2096 11:13:55.569106 [0x00000100000000, 0x00000280400000)
2097 11:13:55.770371
2098 11:13:55.773442 ec_init: CrosEC protocol v3 supported (256, 256)
2099 11:13:55.773526
2100 11:13:55.780265 update_port_state: port C0 state: usb enable 1 mux conn 0
2101 11:13:55.780348
2102 11:13:55.790133 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2103 11:13:55.793503
2104 11:13:55.797189 pmc_check_ipc_sts: STS_BUSY done after 2012 us
2105 11:13:55.797272
2106 11:13:55.800078 send_conn_disc_msg: pmc_send_cmd succeeded
2107 11:13:56.233879
2108 11:13:56.234008 R8152: Initializing
2109 11:13:56.234075
2110 11:13:56.237034 Version 6 (ocp_data = 5c30)
2111 11:13:56.237117
2112 11:13:56.240226 R8152: Done initializing
2113 11:13:56.240308
2114 11:13:56.243582 Adding net device
2115 11:13:56.545006
2116 11:13:56.548447 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2117 11:13:56.548528
2118 11:13:56.548593
2119 11:13:56.548654
2120 11:13:56.552149 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2122 11:13:56.652601 volteer: tftpboot 192.168.201.1 11183378/tftp-deploy-cg5mwaay/kernel/bzImage 11183378/tftp-deploy-cg5mwaay/kernel/cmdline 11183378/tftp-deploy-cg5mwaay/ramdisk/ramdisk.cpio.gz
2123 11:13:56.652728 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2124 11:13:56.652845 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2125 11:13:56.657264 tftpboot 192.168.201.1 11183378/tftp-deploy-cg5mwaay/kernel/bzImploy-cg5mwaay/kernel/cmdline 11183378/tftp-deploy-cg5mwaay/ramdisk/ramdisk.cpio.gz
2126 11:13:56.657350
2127 11:13:56.657415 Waiting for link
2128 11:13:56.860614
2129 11:13:56.860819 done.
2130 11:13:56.860938
2131 11:13:56.861046 MAC: 00:24:32:30:78:74
2132 11:13:56.861159
2133 11:13:56.863630 Sending DHCP discover... done.
2134 11:13:56.863753
2135 11:13:56.867078 Waiting for reply... done.
2136 11:13:56.867160
2137 11:13:56.870532 Sending DHCP request... done.
2138 11:13:56.870614
2139 11:13:56.873603 Waiting for reply... done.
2140 11:13:56.873685
2141 11:13:56.876891 My ip is 192.168.201.14
2142 11:13:56.876972
2143 11:13:56.880279 The DHCP server ip is 192.168.201.1
2144 11:13:56.880361
2145 11:13:56.883639 TFTP server IP predefined by user: 192.168.201.1
2146 11:13:56.883721
2147 11:13:56.890230 Bootfile predefined by user: 11183378/tftp-deploy-cg5mwaay/kernel/bzImage
2148 11:13:56.890356
2149 11:13:56.893377 Sending tftp read request... done.
2150 11:13:56.896517
2151 11:13:56.900241 Waiting for the transfer...
2152 11:13:56.900324
2153 11:13:57.443013 00000000 ################################################################
2154 11:13:57.443200
2155 11:13:57.986727 00080000 ################################################################
2156 11:13:57.986857
2157 11:13:58.524639 00100000 ################################################################
2158 11:13:58.524804
2159 11:13:59.070931 00180000 ################################################################
2160 11:13:59.071062
2161 11:13:59.601851 00200000 ################################################################
2162 11:13:59.601988
2163 11:14:00.136710 00280000 ################################################################
2164 11:14:00.136939
2165 11:14:00.683409 00300000 ################################################################
2166 11:14:00.683541
2167 11:14:01.217315 00380000 ################################################################
2168 11:14:01.217500
2169 11:14:01.752279 00400000 ################################################################
2170 11:14:01.752431
2171 11:14:02.273735 00480000 ################################################################
2172 11:14:02.273886
2173 11:14:02.804296 00500000 ################################################################
2174 11:14:02.804446
2175 11:14:03.343330 00580000 ################################################################
2176 11:14:03.343503
2177 11:14:03.888079 00600000 ################################################################
2178 11:14:03.888271
2179 11:14:04.417535 00680000 ################################################################
2180 11:14:04.417751
2181 11:14:04.945408 00700000 ################################################################
2182 11:14:04.945561
2183 11:14:04.967472 00780000 ### done.
2184 11:14:04.967597
2185 11:14:04.970925 The bootfile was 7884688 bytes long.
2186 11:14:04.971035
2187 11:14:04.974144 Sending tftp read request... done.
2188 11:14:04.974223
2189 11:14:04.977360 Waiting for the transfer...
2190 11:14:04.977445
2191 11:14:05.498591 00000000 ################################################################
2192 11:14:05.498806
2193 11:14:06.026861 00080000 ################################################################
2194 11:14:06.027005
2195 11:14:06.567481 00100000 ################################################################
2196 11:14:06.567649
2197 11:14:07.121049 00180000 ################################################################
2198 11:14:07.121249
2199 11:14:07.661479 00200000 ################################################################
2200 11:14:07.661684
2201 11:14:08.213988 00280000 ################################################################
2202 11:14:08.214130
2203 11:14:08.767134 00300000 ################################################################
2204 11:14:08.767336
2205 11:14:09.350527 00380000 ################################################################
2206 11:14:09.350730
2207 11:14:09.930528 00400000 ################################################################
2208 11:14:09.930717
2209 11:14:10.491514 00480000 ################################################################
2210 11:14:10.491654
2211 11:14:11.035144 00500000 ################################################################
2212 11:14:11.035306
2213 11:14:11.586259 00580000 ################################################################
2214 11:14:11.586437
2215 11:14:12.127383 00600000 ################################################################
2216 11:14:12.127561
2217 11:14:12.659535 00680000 ################################################################
2218 11:14:12.659685
2219 11:14:13.217252 00700000 ################################################################
2220 11:14:13.217491
2221 11:14:13.759666 00780000 ################################################################
2222 11:14:13.759873
2223 11:14:14.285097 00800000 ################################################################
2224 11:14:14.285241
2225 11:14:14.816253 00880000 ################################################################
2226 11:14:14.816405
2227 11:14:15.348981 00900000 ################################################################
2228 11:14:15.349131
2229 11:14:15.884919 00980000 ################################################################
2230 11:14:15.885123
2231 11:14:16.395906 00a00000 ################################################################
2232 11:14:16.396056
2233 11:14:16.945709 00a80000 ################################################################
2234 11:14:16.945906
2235 11:14:17.511055 00b00000 ################################################################
2236 11:14:17.511205
2237 11:14:18.083283 00b80000 ################################################################
2238 11:14:18.083530
2239 11:14:18.649427 00c00000 ################################################################
2240 11:14:18.649579
2241 11:14:19.189380 00c80000 ################################################################
2242 11:14:19.189540
2243 11:14:19.721012 00d00000 ################################################################
2244 11:14:19.721212
2245 11:14:20.281941 00d80000 ################################################################
2246 11:14:20.282096
2247 11:14:20.846139 00e00000 ################################################################
2248 11:14:20.846312
2249 11:14:21.408351 00e80000 ################################################################
2250 11:14:21.408496
2251 11:14:21.972149 00f00000 ################################################################
2252 11:14:21.972303
2253 11:14:22.531493 00f80000 ################################################################
2254 11:14:22.531700
2255 11:14:23.105275 01000000 ################################################################
2256 11:14:23.105425
2257 11:14:23.679201 01080000 ################################################################
2258 11:14:23.679348
2259 11:14:24.232172 01100000 ################################################################
2260 11:14:24.232341
2261 11:14:24.786603 01180000 ################################################################
2262 11:14:24.786738
2263 11:14:25.381507 01200000 ################################################################
2264 11:14:25.381708
2265 11:14:25.949869 01280000 ################################################################
2266 11:14:25.950060
2267 11:14:26.514638 01300000 ################################################################
2268 11:14:26.514827
2269 11:14:27.065249 01380000 ################################################################
2270 11:14:27.065379
2271 11:14:27.613570 01400000 ################################################################
2272 11:14:27.613755
2273 11:14:28.173447 01480000 ################################################################
2274 11:14:28.173586
2275 11:14:28.711958 01500000 ################################################################
2276 11:14:28.712094
2277 11:14:29.256882 01580000 ################################################################
2278 11:14:29.257056
2279 11:14:29.827414 01600000 ################################################################
2280 11:14:29.827546
2281 11:14:30.380692 01680000 ################################################################
2282 11:14:30.380837
2283 11:14:30.951046 01700000 ################################################################
2284 11:14:30.951185
2285 11:14:31.522851 01780000 ################################################################
2286 11:14:31.523041
2287 11:14:32.094551 01800000 ################################################################
2288 11:14:32.094682
2289 11:14:32.661734 01880000 ################################################################
2290 11:14:32.661870
2291 11:14:33.199004 01900000 ################################################################
2292 11:14:33.199152
2293 11:14:33.721766 01980000 ################################################################
2294 11:14:33.721938
2295 11:14:34.253773 01a00000 ################################################################
2296 11:14:34.253973
2297 11:14:34.784537 01a80000 ################################################################
2298 11:14:34.784682
2299 11:14:35.321157 01b00000 ################################################################
2300 11:14:35.321353
2301 11:14:35.842249 01b80000 ################################################################
2302 11:14:35.842396
2303 11:14:36.378865 01c00000 ################################################################
2304 11:14:36.379012
2305 11:14:36.910764 01c80000 ################################################################
2306 11:14:36.910935
2307 11:14:37.443151 01d00000 ################################################################
2308 11:14:37.443353
2309 11:14:37.976986 01d80000 ################################################################
2310 11:14:37.977184
2311 11:14:38.501379 01e00000 ################################################################
2312 11:14:38.501516
2313 11:14:39.024516 01e80000 ################################################################
2314 11:14:39.024717
2315 11:14:39.551698 01f00000 ################################################################
2316 11:14:39.551839
2317 11:14:40.113761 01f80000 ################################################################
2318 11:14:40.113956
2319 11:14:40.691277 02000000 ################################################################
2320 11:14:40.691465
2321 11:14:41.248660 02080000 ################################################################
2322 11:14:41.248830
2323 11:14:41.807580 02100000 ################################################################
2324 11:14:41.807717
2325 11:14:42.344170 02180000 ################################################################
2326 11:14:42.344393
2327 11:14:42.822829 02200000 ###################################################### done.
2328 11:14:42.822974
2329 11:14:42.826063 Sending tftp read request... done.
2330 11:14:42.826146
2331 11:14:42.829502 Waiting for the transfer...
2332 11:14:42.829585
2333 11:14:42.829651 00000000 # done.
2334 11:14:42.829713
2335 11:14:42.839311 Command line loaded dynamically from TFTP file: 11183378/tftp-deploy-cg5mwaay/kernel/cmdline
2336 11:14:42.839395
2337 11:14:42.855770 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2338 11:14:42.860858
2339 11:14:42.864238 Shutting down all USB controllers.
2340 11:14:42.864320
2341 11:14:42.864387 Removing current net device
2342 11:14:42.864448
2343 11:14:42.867592 Finalizing coreboot
2344 11:14:42.867674
2345 11:14:42.874431 Exiting depthcharge with code 4 at timestamp: 56074774
2346 11:14:42.874512
2347 11:14:42.874577
2348 11:14:42.874635 Starting kernel ...
2349 11:14:42.874693
2350 11:14:42.874747
2351 11:14:42.875138 end: 2.2.4 bootloader-commands (duration 00:00:47) [common]
2352 11:14:42.875231 start: 2.2.5 auto-login-action (timeout 00:03:57) [common]
2353 11:14:42.875309 Setting prompt string to ['Linux version [0-9]']
2354 11:14:42.875377 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2355 11:14:42.875445 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2357 11:18:39.875486 end: 2.2.5 auto-login-action (duration 00:03:57) [common]
2359 11:18:39.875684 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 237 seconds'
2361 11:18:39.875838 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2364 11:18:39.876082 end: 2 depthcharge-action (duration 00:05:00) [common]
2366 11:18:39.876309 Cleaning after the job
2367 11:18:39.876433 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11183378/tftp-deploy-cg5mwaay/ramdisk
2368 11:18:39.880387 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11183378/tftp-deploy-cg5mwaay/kernel
2369 11:18:39.881391 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11183378/tftp-deploy-cg5mwaay/modules
2370 11:18:39.881712 start: 4.1 power-off (timeout 00:00:30) [common]
2371 11:18:39.881871 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2372 11:18:39.957357 >> Command sent successfully.
2373 11:18:39.959679 Returned 0 in 0 seconds
2374 11:18:40.060048 end: 4.1 power-off (duration 00:00:00) [common]
2376 11:18:40.060350 start: 4.2 read-feedback (timeout 00:10:00) [common]
2377 11:18:40.060620 Listened to connection for namespace 'common' for up to 1s
2378 11:18:41.060922 Finalising connection for namespace 'common'
2379 11:18:41.061097 Disconnecting from shell: Finalise
2380 11:18:41.061180
2381 11:18:41.161494 end: 4.2 read-feedback (duration 00:00:01) [common]
2382 11:18:41.161622 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11183378
2383 11:18:41.235880 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11183378
2384 11:18:41.236072 JobError: Your job cannot terminate cleanly.