Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 08:43:10.803399 lava-dispatcher, installed at version: 2023.05.1
2 08:43:10.803612 start: 0 validate
3 08:43:10.803809 Start time: 2023-08-07 08:43:10.803801+00:00 (UTC)
4 08:43:10.803941 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:43:10.804071 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 08:43:11.097970 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:43:11.098248 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:43:11.356955 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:43:11.357144 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 08:43:16.014016 validate duration: 5.21
12 08:43:16.014300 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 08:43:16.014396 start: 1.1 download-retry (timeout 00:10:00) [common]
14 08:43:16.014484 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 08:43:16.014602 Not decompressing ramdisk as can be used compressed.
16 08:43:16.014685 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 08:43:16.014748 saving as /var/lib/lava/dispatcher/tmp/11220721/tftp-deploy-lx_8w1eq/ramdisk/rootfs.cpio.gz
18 08:43:16.014807 total size: 8418130 (8MB)
19 08:43:16.546412 progress 0% (0MB)
20 08:43:16.548682 progress 5% (0MB)
21 08:43:16.550915 progress 10% (0MB)
22 08:43:16.553230 progress 15% (1MB)
23 08:43:16.555501 progress 20% (1MB)
24 08:43:16.557757 progress 25% (2MB)
25 08:43:16.559996 progress 30% (2MB)
26 08:43:16.562083 progress 35% (2MB)
27 08:43:16.564279 progress 40% (3MB)
28 08:43:16.566519 progress 45% (3MB)
29 08:43:16.568753 progress 50% (4MB)
30 08:43:16.570975 progress 55% (4MB)
31 08:43:16.573197 progress 60% (4MB)
32 08:43:16.575216 progress 65% (5MB)
33 08:43:16.577448 progress 70% (5MB)
34 08:43:16.579629 progress 75% (6MB)
35 08:43:16.581876 progress 80% (6MB)
36 08:43:16.584057 progress 85% (6MB)
37 08:43:16.586288 progress 90% (7MB)
38 08:43:16.588525 progress 95% (7MB)
39 08:43:16.590652 progress 100% (8MB)
40 08:43:16.590911 8MB downloaded in 0.58s (13.94MB/s)
41 08:43:16.591108 end: 1.1.1 http-download (duration 00:00:01) [common]
43 08:43:16.591490 end: 1.1 download-retry (duration 00:00:01) [common]
44 08:43:16.591639 start: 1.2 download-retry (timeout 00:09:59) [common]
45 08:43:16.591757 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 08:43:16.591923 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 08:43:16.591999 saving as /var/lib/lava/dispatcher/tmp/11220721/tftp-deploy-lx_8w1eq/kernel/bzImage
48 08:43:16.592061 total size: 7884688 (7MB)
49 08:43:16.592121 No compression specified
50 08:43:16.593431 progress 0% (0MB)
51 08:43:16.595626 progress 5% (0MB)
52 08:43:16.597772 progress 10% (0MB)
53 08:43:16.599831 progress 15% (1MB)
54 08:43:16.601932 progress 20% (1MB)
55 08:43:16.603970 progress 25% (1MB)
56 08:43:16.606061 progress 30% (2MB)
57 08:43:16.608137 progress 35% (2MB)
58 08:43:16.610217 progress 40% (3MB)
59 08:43:16.612303 progress 45% (3MB)
60 08:43:16.614398 progress 50% (3MB)
61 08:43:16.616455 progress 55% (4MB)
62 08:43:16.618533 progress 60% (4MB)
63 08:43:16.620547 progress 65% (4MB)
64 08:43:16.622648 progress 70% (5MB)
65 08:43:16.624679 progress 75% (5MB)
66 08:43:16.626757 progress 80% (6MB)
67 08:43:16.628837 progress 85% (6MB)
68 08:43:16.630834 progress 90% (6MB)
69 08:43:16.632887 progress 95% (7MB)
70 08:43:16.634947 progress 100% (7MB)
71 08:43:16.635137 7MB downloaded in 0.04s (174.58MB/s)
72 08:43:16.635276 end: 1.2.1 http-download (duration 00:00:00) [common]
74 08:43:16.635503 end: 1.2 download-retry (duration 00:00:00) [common]
75 08:43:16.635594 start: 1.3 download-retry (timeout 00:09:59) [common]
76 08:43:16.635679 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 08:43:16.635811 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 08:43:16.635879 saving as /var/lib/lava/dispatcher/tmp/11220721/tftp-deploy-lx_8w1eq/modules/modules.tar
79 08:43:16.635941 total size: 250852 (0MB)
80 08:43:16.636001 Using unxz to decompress xz
81 08:43:16.639723 progress 13% (0MB)
82 08:43:16.640106 progress 26% (0MB)
83 08:43:16.640341 progress 39% (0MB)
84 08:43:16.641718 progress 52% (0MB)
85 08:43:16.643571 progress 65% (0MB)
86 08:43:16.645535 progress 78% (0MB)
87 08:43:16.647561 progress 91% (0MB)
88 08:43:16.649441 progress 100% (0MB)
89 08:43:16.655540 0MB downloaded in 0.02s (12.21MB/s)
90 08:43:16.655853 end: 1.3.1 http-download (duration 00:00:00) [common]
92 08:43:16.656155 end: 1.3 download-retry (duration 00:00:00) [common]
93 08:43:16.656269 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 08:43:16.656412 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 08:43:16.656534 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 08:43:16.656665 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 08:43:16.656968 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553
98 08:43:16.657140 makedir: /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin
99 08:43:16.657285 makedir: /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/tests
100 08:43:16.657452 makedir: /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/results
101 08:43:16.657605 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-add-keys
102 08:43:16.657766 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-add-sources
103 08:43:16.657910 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-background-process-start
104 08:43:16.658055 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-background-process-stop
105 08:43:16.658203 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-common-functions
106 08:43:16.658372 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-echo-ipv4
107 08:43:16.658541 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-install-packages
108 08:43:16.658705 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-installed-packages
109 08:43:16.658843 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-os-build
110 08:43:16.658986 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-probe-channel
111 08:43:16.659153 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-probe-ip
112 08:43:16.659318 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-target-ip
113 08:43:16.659460 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-target-mac
114 08:43:16.659627 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-target-storage
115 08:43:16.659798 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-test-case
116 08:43:16.659966 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-test-event
117 08:43:16.660134 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-test-feedback
118 08:43:16.660309 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-test-raise
119 08:43:16.660481 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-test-reference
120 08:43:16.660673 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-test-runner
121 08:43:16.660862 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-test-set
122 08:43:16.661003 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-test-shell
123 08:43:16.661146 Updating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-install-packages (oe)
124 08:43:16.661317 Updating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/bin/lava-installed-packages (oe)
125 08:43:16.661484 Creating /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/environment
126 08:43:16.661596 LAVA metadata
127 08:43:16.661683 - LAVA_JOB_ID=11220721
128 08:43:16.661788 - LAVA_DISPATCHER_IP=192.168.201.1
129 08:43:16.661941 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 08:43:16.662041 skipped lava-vland-overlay
131 08:43:16.662162 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 08:43:16.662289 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 08:43:16.662388 skipped lava-multinode-overlay
134 08:43:16.662505 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 08:43:16.662629 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 08:43:16.662746 Loading test definitions
137 08:43:16.662884 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 08:43:16.662993 Using /lava-11220721 at stage 0
139 08:43:16.663425 uuid=11220721_1.4.2.3.1 testdef=None
140 08:43:16.663549 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 08:43:16.663680 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 08:43:16.664465 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 08:43:16.664871 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 08:43:16.665563 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 08:43:16.665823 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 08:43:16.666732 runner path: /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/0/tests/0_dmesg test_uuid 11220721_1.4.2.3.1
149 08:43:16.666931 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 08:43:16.667310 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 08:43:16.667418 Using /lava-11220721 at stage 1
153 08:43:16.667836 uuid=11220721_1.4.2.3.5 testdef=None
154 08:43:16.667959 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 08:43:16.668060 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 08:43:16.668545 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 08:43:16.668887 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 08:43:16.669571 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 08:43:16.669831 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 08:43:16.670485 runner path: /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/1/tests/1_bootrr test_uuid 11220721_1.4.2.3.5
163 08:43:16.670667 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 08:43:16.671023 Creating lava-test-runner.conf files
166 08:43:16.671126 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/0 for stage 0
167 08:43:16.671260 - 0_dmesg
168 08:43:16.671380 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11220721/lava-overlay-fvocs553/lava-11220721/1 for stage 1
169 08:43:16.671512 - 1_bootrr
170 08:43:16.671647 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 08:43:16.671772 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 08:43:16.680914 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 08:43:16.681038 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 08:43:16.681143 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 08:43:16.681245 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 08:43:16.681351 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 08:43:16.922369 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 08:43:16.922747 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 08:43:16.922891 extracting modules file /var/lib/lava/dispatcher/tmp/11220721/tftp-deploy-lx_8w1eq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11220721/extract-overlay-ramdisk-pdww0hcj/ramdisk
180 08:43:16.935454 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 08:43:16.935600 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 08:43:16.935707 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11220721/compress-overlay-vsnowdpn/overlay-1.4.2.4.tar.gz to ramdisk
183 08:43:16.935793 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11220721/compress-overlay-vsnowdpn/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11220721/extract-overlay-ramdisk-pdww0hcj/ramdisk
184 08:43:16.944508 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 08:43:16.944652 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 08:43:16.944808 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 08:43:16.944934 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 08:43:16.945104 Building ramdisk /var/lib/lava/dispatcher/tmp/11220721/extract-overlay-ramdisk-pdww0hcj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11220721/extract-overlay-ramdisk-pdww0hcj/ramdisk
189 08:43:17.064583 >> 49788 blocks
190 08:43:17.905593 rename /var/lib/lava/dispatcher/tmp/11220721/extract-overlay-ramdisk-pdww0hcj/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11220721/tftp-deploy-lx_8w1eq/ramdisk/ramdisk.cpio.gz
191 08:43:17.906043 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 08:43:17.906187 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 08:43:17.906308 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 08:43:17.906416 No mkimage arch provided, not using FIT.
195 08:43:17.906519 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 08:43:17.906652 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 08:43:17.906756 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 08:43:17.906850 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 08:43:17.906932 No LXC device requested
200 08:43:17.907012 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 08:43:17.907101 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 08:43:17.907188 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 08:43:17.907258 Checking files for TFTP limit of 4294967296 bytes.
204 08:43:17.907651 end: 1 tftp-deploy (duration 00:00:02) [common]
205 08:43:17.907756 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 08:43:17.907847 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 08:43:17.907968 substitutions:
208 08:43:17.908036 - {DTB}: None
209 08:43:17.908099 - {INITRD}: 11220721/tftp-deploy-lx_8w1eq/ramdisk/ramdisk.cpio.gz
210 08:43:17.908159 - {KERNEL}: 11220721/tftp-deploy-lx_8w1eq/kernel/bzImage
211 08:43:17.908218 - {LAVA_MAC}: None
212 08:43:17.908274 - {PRESEED_CONFIG}: None
213 08:43:17.908329 - {PRESEED_LOCAL}: None
214 08:43:17.908384 - {RAMDISK}: 11220721/tftp-deploy-lx_8w1eq/ramdisk/ramdisk.cpio.gz
215 08:43:17.908439 - {ROOT_PART}: None
216 08:43:17.908493 - {ROOT}: None
217 08:43:17.908548 - {SERVER_IP}: 192.168.201.1
218 08:43:17.908620 - {TEE}: None
219 08:43:17.908722 Parsed boot commands:
220 08:43:17.908847 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 08:43:17.909075 Parsed boot commands: tftpboot 192.168.201.1 11220721/tftp-deploy-lx_8w1eq/kernel/bzImage 11220721/tftp-deploy-lx_8w1eq/kernel/cmdline 11220721/tftp-deploy-lx_8w1eq/ramdisk/ramdisk.cpio.gz
222 08:43:17.909202 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 08:43:17.909331 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 08:43:17.909444 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 08:43:17.909552 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 08:43:17.909657 Not connected, no need to disconnect.
227 08:43:17.909777 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 08:43:17.909902 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 08:43:17.910005 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-0'
230 08:43:17.913703 Setting prompt string to ['lava-test: # ']
231 08:43:17.914046 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 08:43:17.914166 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 08:43:17.914297 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 08:43:17.914407 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 08:43:17.914620 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=reboot'
236 08:43:23.048429 >> Command sent successfully.
237 08:43:23.050793 Returned 0 in 5 seconds
238 08:43:23.151173 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 08:43:23.151498 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 08:43:23.151604 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 08:43:23.151696 Setting prompt string to 'Starting depthcharge on Volmar...'
243 08:43:23.151766 Changing prompt to 'Starting depthcharge on Volmar...'
244 08:43:23.151836 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
245 08:43:23.152096 [Enter `^Ec?' for help]
246 08:43:24.529787
247 08:43:24.529956
248 08:43:24.536097 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
249 08:43:24.539452 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
250 08:43:24.546318 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
251 08:43:24.549507 CPU: AES supported, TXT NOT supported, VT supported
252 08:43:24.556004 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
253 08:43:24.559895 Cache size = 10 MiB
254 08:43:24.563307 MCH: device id 4609 (rev 04) is Alderlake-P
255 08:43:24.570469 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
256 08:43:24.573800 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
257 08:43:24.577191 VBOOT: Loading verstage.
258 08:43:24.581172 FMAP: Found "FLASH" version 1.1 at 0x1804000.
259 08:43:24.584365 FMAP: base = 0x0 size = 0x2000000 #areas = 37
260 08:43:24.591017 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
261 08:43:24.598022 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
262 08:43:24.608196 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
263 08:43:24.608283
264 08:43:24.608351
265 08:43:24.615075 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
266 08:43:24.623113 Probing TPM I2C: I2C bus 1 version 0x3230302a
267 08:43:24.626324 DW I2C bus 1 at 0xfe022000 (400 KHz)
268 08:43:24.630408 I2C TX abort detected (00000001)
269 08:43:24.633258 cr50_i2c_read: Address write failed
270 08:43:24.645153 .done! DID_VID 0x00281ae0
271 08:43:24.648328 TPM ready after 0 ms
272 08:43:24.652081 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
273 08:43:24.665731 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
274 08:43:24.672787 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 08:43:24.717939 tlcl_send_startup: Startup return code is 0
276 08:43:24.718033 TPM: setup succeeded
277 08:43:24.741145 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
278 08:43:24.762658 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
279 08:43:24.766380 Chrome EC: UHEPI supported
280 08:43:24.769921 Reading cr50 boot mode
281 08:43:24.784904 Cr50 says boot_mode is VERIFIED_RW(0x00).
282 08:43:24.784994 Phase 1
283 08:43:24.791218 FMAP: area GBB found @ 1805000 (458752 bytes)
284 08:43:24.798200 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
285 08:43:24.804487 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
286 08:43:24.811265 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
287 08:43:24.814828 Phase 2
288 08:43:24.814918 Phase 3
289 08:43:24.817783 FMAP: area GBB found @ 1805000 (458752 bytes)
290 08:43:24.824891 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
291 08:43:24.827926 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
292 08:43:24.834360 VB2:vb2_verify_keyblock() Checking keyblock signature...
293 08:43:24.841277 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
294 08:43:24.847972 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
295 08:43:24.857860 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
296 08:43:24.869928 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 08:43:24.872823 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 08:43:24.879662 VB2:vb2_verify_fw_preamble() Verifying preamble.
299 08:43:24.886499 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
300 08:43:24.892945 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
301 08:43:24.899443 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
302 08:43:24.903595 Phase 4
303 08:43:24.906963 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
304 08:43:24.913457 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
305 08:43:25.126287 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
306 08:43:25.132921 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
307 08:43:25.136434 Saving vboot hash.
308 08:43:25.143270 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
309 08:43:25.158479 tlcl_extend: response is 0
310 08:43:25.165494 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
311 08:43:25.171816 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
312 08:43:25.186143 tlcl_extend: response is 0
313 08:43:25.193436 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
314 08:43:25.213259 tlcl_lock_nv_write: response is 0
315 08:43:25.232148 tlcl_lock_nv_write: response is 0
316 08:43:25.232239 Slot A is selected
317 08:43:25.239034 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
318 08:43:25.245600 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
319 08:43:25.252355 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
320 08:43:25.258936 BS: verstage times (exec / console): total (unknown) / 264 ms
321 08:43:25.259026
322 08:43:25.259114
323 08:43:25.265318 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
324 08:43:25.269485 Google Chrome EC: version:
325 08:43:25.272918 ro: volmar_v2.0.14126-e605144e9c
326 08:43:25.276084 rw: volmar_v0.0.55-22d1557
327 08:43:25.279650 running image: 2
328 08:43:25.283077 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
329 08:43:25.292781 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
330 08:43:25.299931 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
331 08:43:25.305858 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
332 08:43:25.315875 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
333 08:43:25.325726 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
334 08:43:25.329187 EC took 941us to calculate image hash
335 08:43:25.339275 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
336 08:43:25.342903 VB2:sync_ec() select_rw=RW(active)
337 08:43:25.355570 Waited 269us to clear limit power flag.
338 08:43:25.358787 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 08:43:25.362602 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 08:43:25.365711 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
341 08:43:25.372090 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
342 08:43:25.375413 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
343 08:43:25.378720 TCO_STS: 0000 0000
344 08:43:25.382196 GEN_PMCON: d0015038 00002200
345 08:43:25.385420 GBLRST_CAUSE: 00000000 00000000
346 08:43:25.385547 HPR_CAUSE0: 00000000
347 08:43:25.388943 prev_sleep_state 5
348 08:43:25.392030 Abort disabling TXT, as CPU is not TXT capable.
349 08:43:25.399790 cse_lite: Number of partitions = 3
350 08:43:25.403132 cse_lite: Current partition = RO
351 08:43:25.403258 cse_lite: Next partition = RO
352 08:43:25.406262 cse_lite: Flags = 0x7
353 08:43:25.413213 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
354 08:43:25.423251 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
355 08:43:25.426290 FMAP: area SI_ME found @ 1000 (5238784 bytes)
356 08:43:25.433175 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
357 08:43:25.439827 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
358 08:43:25.446605 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
359 08:43:25.449782 cse_lite: CSE CBFS RW version : 16.1.25.2049
360 08:43:25.456303 cse_lite: Set Boot Partition Info Command (RW)
361 08:43:25.460392 HECI: Global Reset(Type:1) Command
362 08:43:26.942327 f�v�ilt for 72 files, used 0xfd8 of 0x2000 bytes
363 08:43:26.948745 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
364 08:43:26.952721
365 08:43:26.952862
366 08:43:26.959138 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
367 08:43:26.965596 Probing TPM I2C: I2C bus 1 version 0x3230302a
368 08:43:26.969047 DW I2C bus 1 at 0xfe022000 (400 KHz)
369 08:43:26.972516 done! DID_VID 0x00281ae0
370 08:43:26.975846 TPM ready after 0 ms
371 08:43:26.979137 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
372 08:43:26.987849 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
373 08:43:26.996481 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
374 08:43:27.049077 tlcl_send_startup: Startup return code is 0
375 08:43:27.049187 TPM: setup succeeded
376 08:43:27.068880 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
377 08:43:27.091004 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
378 08:43:27.094928 Chrome EC: UHEPI supported
379 08:43:27.097921 Reading cr50 boot mode
380 08:43:27.112679 Cr50 says boot_mode is VERIFIED_RW(0x00).
381 08:43:27.112849 Phase 1
382 08:43:27.119580 FMAP: area GBB found @ 1805000 (458752 bytes)
383 08:43:27.126206 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
384 08:43:27.133026 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
385 08:43:27.139720 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
386 08:43:27.139871 Phase 2
387 08:43:27.143148 Phase 3
388 08:43:27.146265 FMAP: area GBB found @ 1805000 (458752 bytes)
389 08:43:27.153083 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
390 08:43:27.156382 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
391 08:43:27.163323 VB2:vb2_verify_keyblock() Checking keyblock signature...
392 08:43:27.169948 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
393 08:43:27.176454 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
394 08:43:27.186355 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
395 08:43:27.197851 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
396 08:43:27.201250 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
397 08:43:27.207880 VB2:vb2_verify_fw_preamble() Verifying preamble.
398 08:43:27.215060 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
399 08:43:27.221143 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
400 08:43:27.227981 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
401 08:43:27.231754 Phase 4
402 08:43:27.235209 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
403 08:43:27.241896 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
404 08:43:27.454614 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
405 08:43:27.461371 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
406 08:43:27.464581 Saving vboot hash.
407 08:43:27.471143 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
408 08:43:27.487293 tlcl_extend: response is 0
409 08:43:27.493488 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
410 08:43:27.497274 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
411 08:43:27.514421 tlcl_extend: response is 0
412 08:43:27.521234 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
413 08:43:27.539853 tlcl_lock_nv_write: response is 0
414 08:43:27.559067 tlcl_lock_nv_write: response is 0
415 08:43:27.559211 Slot A is selected
416 08:43:27.565891 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
417 08:43:27.572904 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
418 08:43:27.578910 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
419 08:43:27.585398 BS: verstage times (exec / console): total (unknown) / 256 ms
420 08:43:27.585511
421 08:43:27.585608
422 08:43:27.592240 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
423 08:43:27.596197 Google Chrome EC: version:
424 08:43:27.599287 ro: volmar_v2.0.14126-e605144e9c
425 08:43:27.602835 rw: volmar_v0.0.55-22d1557
426 08:43:27.606410 running image: 2
427 08:43:27.609669 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
428 08:43:27.619813 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
429 08:43:27.626101 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
430 08:43:27.632801 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
431 08:43:27.643178 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
432 08:43:27.653324 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
433 08:43:27.656204 EC took 942us to calculate image hash
434 08:43:27.666517 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
435 08:43:27.669238 VB2:sync_ec() select_rw=RW(active)
436 08:43:27.681543 Waited 300us to clear limit power flag.
437 08:43:27.685032 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
438 08:43:27.689174 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
439 08:43:27.692621 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
440 08:43:27.695619 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
441 08:43:27.702761 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
442 08:43:27.702848 TCO_STS: 0000 0000
443 08:43:27.705472 GEN_PMCON: d1001038 00002200
444 08:43:27.709089 GBLRST_CAUSE: 00000040 00000000
445 08:43:27.712151 HPR_CAUSE0: 00000000
446 08:43:27.712237 prev_sleep_state 5
447 08:43:27.719037 Abort disabling TXT, as CPU is not TXT capable.
448 08:43:27.725852 cse_lite: Number of partitions = 3
449 08:43:27.729386 cse_lite: Current partition = RW
450 08:43:27.729472 cse_lite: Next partition = RW
451 08:43:27.732217 cse_lite: Flags = 0x7
452 08:43:27.739292 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
453 08:43:27.749087 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
454 08:43:27.752298 FMAP: area SI_ME found @ 1000 (5238784 bytes)
455 08:43:27.758998 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
456 08:43:27.765800 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
457 08:43:27.772173 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
458 08:43:27.775550 cse_lite: CSE CBFS RW version : 16.1.25.2049
459 08:43:27.778584 Boot Count incremented to 2086
460 08:43:27.785536 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
461 08:43:27.792042 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
462 08:43:27.804990 Probing TPM I2C: done! DID_VID 0x00281ae0
463 08:43:27.808689 Locality already claimed
464 08:43:27.811725 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
465 08:43:27.831453 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
466 08:43:27.837864 MRC: Hash idx 0x100d comparison successful.
467 08:43:27.841345 MRC cache found, size f6c8
468 08:43:27.841431 bootmode is set to: 2
469 08:43:27.846137 EC returned error result code 3
470 08:43:27.849381 FW_CONFIG value from CBI is 0x131
471 08:43:27.856577 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
472 08:43:27.859273 SPD index = 0
473 08:43:27.865989 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
474 08:43:27.866076 SPD: module type is LPDDR4X
475 08:43:27.873006 SPD: module part number is K4U6E3S4AB-MGCL
476 08:43:27.879390 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
477 08:43:27.882465 SPD: device width 16 bits, bus width 16 bits
478 08:43:27.886175 SPD: module size is 1024 MB (per channel)
479 08:43:27.955343 CBMEM:
480 08:43:27.958849 IMD: root @ 0x76fff000 254 entries.
481 08:43:27.962020 IMD: root @ 0x76ffec00 62 entries.
482 08:43:27.969478 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
483 08:43:27.972927 RO_VPD is uninitialized or empty.
484 08:43:27.976271 FMAP: area RW_VPD found @ f29000 (8192 bytes)
485 08:43:27.979689 RW_VPD is uninitialized or empty.
486 08:43:27.986196 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
487 08:43:27.989609 External stage cache:
488 08:43:27.992897 IMD: root @ 0x7bbff000 254 entries.
489 08:43:27.996256 IMD: root @ 0x7bbfec00 62 entries.
490 08:43:28.003061 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
491 08:43:28.009641 MRC: Checking cached data update for 'RW_MRC_CACHE'.
492 08:43:28.012684 MRC: 'RW_MRC_CACHE' does not need update.
493 08:43:28.012842 8 DIMMs found
494 08:43:28.016353 SMM Memory Map
495 08:43:28.019742 SMRAM : 0x7b800000 0x800000
496 08:43:28.022923 Subregion 0: 0x7b800000 0x200000
497 08:43:28.026436 Subregion 1: 0x7ba00000 0x200000
498 08:43:28.029495 Subregion 2: 0x7bc00000 0x400000
499 08:43:28.032714 top_of_ram = 0x77000000
500 08:43:28.036354 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
501 08:43:28.042880 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
502 08:43:28.049477 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
503 08:43:28.052730 MTRR Range: Start=ff000000 End=0 (Size 1000000)
504 08:43:28.052826 Normal boot
505 08:43:28.063107 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
506 08:43:28.069639 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
507 08:43:28.076073 Processing 237 relocs. Offset value of 0x74ab9000
508 08:43:28.084214 BS: romstage times (exec / console): total (unknown) / 380 ms
509 08:43:28.091519
510 08:43:28.091604
511 08:43:28.098332 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
512 08:43:28.098419 Normal boot
513 08:43:28.104929 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
514 08:43:28.111573 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
515 08:43:28.118476 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
516 08:43:28.128466 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
517 08:43:28.176727 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
518 08:43:28.182759 Processing 5931 relocs. Offset value of 0x72a2f000
519 08:43:28.185990 BS: postcar times (exec / console): total (unknown) / 51 ms
520 08:43:28.186076
521 08:43:28.189810
522 08:43:28.196223 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
523 08:43:28.199516 Reserving BERT start 76a1e000, size 10000
524 08:43:28.202660 Normal boot
525 08:43:28.206414 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
526 08:43:28.212744 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
527 08:43:28.222674 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
528 08:43:28.226376 FMAP: area RW_VPD found @ f29000 (8192 bytes)
529 08:43:28.229193 Google Chrome EC: version:
530 08:43:28.232778 ro: volmar_v2.0.14126-e605144e9c
531 08:43:28.236047 rw: volmar_v0.0.55-22d1557
532 08:43:28.236132 running image: 2
533 08:43:28.242646 ACPI _SWS is PM1 Index 8 GPE Index -1
534 08:43:28.245938 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
535 08:43:28.250882 EC returned error result code 3
536 08:43:28.254186 FW_CONFIG value from CBI is 0x131
537 08:43:28.260682 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
538 08:43:28.265106 PCI: 00:1c.2 disabled by fw_config
539 08:43:28.268325 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
540 08:43:28.275017 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
541 08:43:28.281558 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
542 08:43:28.284990 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
543 08:43:28.291539 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
544 08:43:28.298386 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
545 08:43:28.301929 microcode: sig=0x906a4 pf=0x80 revision=0x423
546 08:43:28.308350 microcode: Update skipped, already up-to-date
547 08:43:28.315040 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
548 08:43:28.347306 Detected 6 core, 8 thread CPU.
549 08:43:28.350451 Setting up SMI for CPU
550 08:43:28.353791 IED base = 0x7bc00000
551 08:43:28.353877 IED size = 0x00400000
552 08:43:28.356937 Will perform SMM setup.
553 08:43:28.360743 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
554 08:43:28.363473 LAPIC 0x0 in XAPIC mode.
555 08:43:28.373822 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
556 08:43:28.376937 Processing 18 relocs. Offset value of 0x00030000
557 08:43:28.381417 Attempting to start 7 APs
558 08:43:28.384666 Waiting for 10ms after sending INIT.
559 08:43:28.397775 Waiting for SIPI to complete...
560 08:43:28.401294 done.
561 08:43:28.401381 LAPIC 0x14 in XAPIC mode.
562 08:43:28.404770 Waiting for SIPI to complete...
563 08:43:28.408040 done.
564 08:43:28.408128 LAPIC 0x12 in XAPIC mode.
565 08:43:28.411047 LAPIC 0x16 in XAPIC mode.
566 08:43:28.414274 LAPIC 0x9 in XAPIC mode.
567 08:43:28.417965 AP: slot 2 apic_id 14, MCU rev: 0x00000423
568 08:43:28.421186 LAPIC 0x1 in XAPIC mode.
569 08:43:28.424728 AP: slot 1 apic_id 12, MCU rev: 0x00000423
570 08:43:28.427972 LAPIC 0x10 in XAPIC mode.
571 08:43:28.430878 AP: slot 3 apic_id 16, MCU rev: 0x00000423
572 08:43:28.437817 AP: slot 4 apic_id 10, MCU rev: 0x00000423
573 08:43:28.441284 AP: slot 6 apic_id 9, MCU rev: 0x00000423
574 08:43:28.444434 AP: slot 5 apic_id 1, MCU rev: 0x00000423
575 08:43:28.447868 LAPIC 0x8 in XAPIC mode.
576 08:43:28.450993 AP: slot 7 apic_id 8, MCU rev: 0x00000423
577 08:43:28.454467 smm_setup_relocation_handler: enter
578 08:43:28.457714 smm_setup_relocation_handler: exit
579 08:43:28.467970 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
580 08:43:28.471510 Processing 11 relocs. Offset value of 0x00038000
581 08:43:28.477806 smm_module_setup_stub: stack_top = 0x7b804000
582 08:43:28.481392 smm_module_setup_stub: per cpu stack_size = 0x800
583 08:43:28.487746 smm_module_setup_stub: runtime.start32_offset = 0x4c
584 08:43:28.491152 smm_module_setup_stub: runtime.smm_size = 0x10000
585 08:43:28.497740 SMM Module: stub loaded at 38000. Will call 0x76a52094
586 08:43:28.501163 Installing permanent SMM handler to 0x7b800000
587 08:43:28.507889 smm_load_module: total_smm_space_needed e468, available -> 200000
588 08:43:28.517963 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
589 08:43:28.521482 Processing 255 relocs. Offset value of 0x7b9f6000
590 08:43:28.527826 smm_load_module: smram_start: 0x7b800000
591 08:43:28.531083 smm_load_module: smram_end: 7ba00000
592 08:43:28.534349 smm_load_module: handler start 0x7b9f6d5f
593 08:43:28.537832 smm_load_module: handler_size 98d0
594 08:43:28.541423 smm_load_module: fxsave_area 0x7b9ff000
595 08:43:28.544606 smm_load_module: fxsave_size 1000
596 08:43:28.547601 smm_load_module: CONFIG_MSEG_SIZE 0x0
597 08:43:28.554258 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
598 08:43:28.561461 smm_load_module: handler_mod_params.smbase = 0x7b800000
599 08:43:28.564520 smm_load_module: per_cpu_save_state_size = 0x400
600 08:43:28.567790 smm_load_module: num_cpus = 0x8
601 08:43:28.574415 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
602 08:43:28.577804 smm_load_module: total_save_state_size = 0x2000
603 08:43:28.581348 smm_load_module: cpu0 entry: 7b9e6000
604 08:43:28.587974 smm_create_map: cpus allowed in one segment 30
605 08:43:28.591208 smm_create_map: min # of segments needed 1
606 08:43:28.591295 CPU 0x0
607 08:43:28.594565 smbase 7b9e6000 entry 7b9ee000
608 08:43:28.601207 ss_start 7b9f5c00 code_end 7b9ee208
609 08:43:28.601293 CPU 0x1
610 08:43:28.604868 smbase 7b9e5c00 entry 7b9edc00
611 08:43:28.610888 ss_start 7b9f5800 code_end 7b9ede08
612 08:43:28.610974 CPU 0x2
613 08:43:28.614256 smbase 7b9e5800 entry 7b9ed800
614 08:43:28.618057 ss_start 7b9f5400 code_end 7b9eda08
615 08:43:28.621183 CPU 0x3
616 08:43:28.624542 smbase 7b9e5400 entry 7b9ed400
617 08:43:28.627988 ss_start 7b9f5000 code_end 7b9ed608
618 08:43:28.628075 CPU 0x4
619 08:43:28.631084 smbase 7b9e5000 entry 7b9ed000
620 08:43:28.637871 ss_start 7b9f4c00 code_end 7b9ed208
621 08:43:28.637957 CPU 0x5
622 08:43:28.641185 smbase 7b9e4c00 entry 7b9ecc00
623 08:43:28.648393 ss_start 7b9f4800 code_end 7b9ece08
624 08:43:28.648504 CPU 0x6
625 08:43:28.651386 smbase 7b9e4800 entry 7b9ec800
626 08:43:28.654677 ss_start 7b9f4400 code_end 7b9eca08
627 08:43:28.657716 CPU 0x7
628 08:43:28.661531 smbase 7b9e4400 entry 7b9ec400
629 08:43:28.664480 ss_start 7b9f4000 code_end 7b9ec608
630 08:43:28.675206 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
631 08:43:28.678054 Processing 11 relocs. Offset value of 0x7b9ee000
632 08:43:28.684633 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
633 08:43:28.691156 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
634 08:43:28.698324 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
635 08:43:28.701707 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
636 08:43:28.707926 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
637 08:43:28.715162 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
638 08:43:28.721212 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
639 08:43:28.728124 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
640 08:43:28.734610 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
641 08:43:28.741373 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
642 08:43:28.748286 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
643 08:43:28.751298 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
644 08:43:28.761280 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
645 08:43:28.764536 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
646 08:43:28.771394 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
647 08:43:28.777661 smm_module_setup_stub: stack_top = 0x7b804000
648 08:43:28.781181 smm_module_setup_stub: per cpu stack_size = 0x800
649 08:43:28.787939 smm_module_setup_stub: runtime.start32_offset = 0x4c
650 08:43:28.791201 smm_module_setup_stub: runtime.smm_size = 0x200000
651 08:43:28.797581 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
652 08:43:28.801842 Clearing SMI status registers
653 08:43:28.805178 SMI_STS: PM1
654 08:43:28.805265 PM1_STS: WAK PWRBTN
655 08:43:28.815419 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
656 08:43:28.818754 In relocation handler: CPU 0
657 08:43:28.821765 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
658 08:43:28.825419 Writing SMRR. base = 0x7b800006, mask=0xff800c00
659 08:43:28.828273 Relocation complete.
660 08:43:28.835228 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
661 08:43:28.839062 In relocation handler: CPU 5
662 08:43:28.842217 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
663 08:43:28.845154 Relocation complete.
664 08:43:28.852061 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
665 08:43:28.855412 In relocation handler: CPU 4
666 08:43:28.858745 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
667 08:43:28.865159 Writing SMRR. base = 0x7b800006, mask=0xff800c00
668 08:43:28.865269 Relocation complete.
669 08:43:28.871825 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
670 08:43:28.875416 In relocation handler: CPU 1
671 08:43:28.878646 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
672 08:43:28.885339 Writing SMRR. base = 0x7b800006, mask=0xff800c00
673 08:43:28.888434 Relocation complete.
674 08:43:28.895365 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
675 08:43:28.898346 In relocation handler: CPU 2
676 08:43:28.901884 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
677 08:43:28.905372 Writing SMRR. base = 0x7b800006, mask=0xff800c00
678 08:43:28.909020 Relocation complete.
679 08:43:28.915074 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
680 08:43:28.918873 In relocation handler: CPU 3
681 08:43:28.921945 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
682 08:43:28.928713 Writing SMRR. base = 0x7b800006, mask=0xff800c00
683 08:43:28.928822 Relocation complete.
684 08:43:28.935346 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
685 08:43:28.938514 In relocation handler: CPU 6
686 08:43:28.942051 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
687 08:43:28.945204 Relocation complete.
688 08:43:28.952285 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
689 08:43:28.955199 In relocation handler: CPU 7
690 08:43:28.958914 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
691 08:43:28.965627 Writing SMRR. base = 0x7b800006, mask=0xff800c00
692 08:43:28.968870 Relocation complete.
693 08:43:28.968983 Initializing CPU #0
694 08:43:28.971721 CPU: vendor Intel device 906a4
695 08:43:28.975110 CPU: family 06, model 9a, stepping 04
696 08:43:28.979125 Clearing out pending MCEs
697 08:43:28.981765 cpu: energy policy set to 7
698 08:43:28.986049 Turbo is available but hidden
699 08:43:28.988621 Turbo is available and visible
700 08:43:28.991832 microcode: Update skipped, already up-to-date
701 08:43:28.995589 CPU #0 initialized
702 08:43:28.995675 Initializing CPU #5
703 08:43:28.998912 Initializing CPU #4
704 08:43:29.002065 Initializing CPU #2
705 08:43:29.002153 CPU: vendor Intel device 906a4
706 08:43:29.008547 CPU: family 06, model 9a, stepping 04
707 08:43:29.008635 Initializing CPU #7
708 08:43:29.012185 CPU: vendor Intel device 906a4
709 08:43:29.015400 CPU: family 06, model 9a, stepping 04
710 08:43:29.018824 CPU: vendor Intel device 906a4
711 08:43:29.022120 CPU: family 06, model 9a, stepping 04
712 08:43:29.025461 Initializing CPU #6
713 08:43:29.028533 Initializing CPU #3
714 08:43:29.028620 Clearing out pending MCEs
715 08:43:29.032341 CPU: vendor Intel device 906a4
716 08:43:29.035648 CPU: family 06, model 9a, stepping 04
717 08:43:29.038999 cpu: energy policy set to 7
718 08:43:29.042027 Clearing out pending MCEs
719 08:43:29.045555 Initializing CPU #1
720 08:43:29.048662 Clearing out pending MCEs
721 08:43:29.048748 cpu: energy policy set to 7
722 08:43:29.052326 CPU: vendor Intel device 906a4
723 08:43:29.058910 CPU: family 06, model 9a, stepping 04
724 08:43:29.061763 microcode: Update skipped, already up-to-date
725 08:43:29.061850 CPU #3 initialized
726 08:43:29.068572 microcode: Update skipped, already up-to-date
727 08:43:29.068687 CPU #2 initialized
728 08:43:29.071806 CPU: vendor Intel device 906a4
729 08:43:29.075289 CPU: family 06, model 9a, stepping 04
730 08:43:29.078547 cpu: energy policy set to 7
731 08:43:29.081993 Clearing out pending MCEs
732 08:43:29.085136 microcode: Update skipped, already up-to-date
733 08:43:29.088698 CPU #4 initialized
734 08:43:29.092328 cpu: energy policy set to 7
735 08:43:29.095169 Clearing out pending MCEs
736 08:43:29.098641 microcode: Update skipped, already up-to-date
737 08:43:29.102002 CPU #1 initialized
738 08:43:29.102088 Clearing out pending MCEs
739 08:43:29.105367 CPU: vendor Intel device 906a4
740 08:43:29.111935 CPU: family 06, model 9a, stepping 04
741 08:43:29.112022 cpu: energy policy set to 7
742 08:43:29.115292 Clearing out pending MCEs
743 08:43:29.118715 cpu: energy policy set to 7
744 08:43:29.121846 microcode: Update skipped, already up-to-date
745 08:43:29.125193 CPU #7 initialized
746 08:43:29.128670 cpu: energy policy set to 7
747 08:43:29.131824 microcode: Update skipped, already up-to-date
748 08:43:29.134980 CPU #5 initialized
749 08:43:29.138854 microcode: Update skipped, already up-to-date
750 08:43:29.141761 CPU #6 initialized
751 08:43:29.145252 bsp_do_flight_plan done after 734 msecs.
752 08:43:29.148390 CPU: frequency set to 4400 MHz
753 08:43:29.148476 Enabling SMIs.
754 08:43:29.155286 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 382 / 521 ms
755 08:43:29.172432 Probing TPM I2C: done! DID_VID 0x00281ae0
756 08:43:29.175875 Locality already claimed
757 08:43:29.179726 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
758 08:43:29.187576 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
759 08:43:29.194690 Enabling GPIO PM b/c CR50 has long IRQ pulse support
760 08:43:29.201101 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
761 08:43:29.207934 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
762 08:43:29.211314 Found a VBT of 9216 bytes after decompression
763 08:43:29.214512 PCI 1.0, PIN A, using IRQ #16
764 08:43:29.217977 PCI 2.0, PIN A, using IRQ #17
765 08:43:29.221318 PCI 4.0, PIN A, using IRQ #18
766 08:43:29.224331 PCI 5.0, PIN A, using IRQ #16
767 08:43:29.227958 PCI 6.0, PIN A, using IRQ #16
768 08:43:29.230923 PCI 6.2, PIN C, using IRQ #18
769 08:43:29.234598 PCI 7.0, PIN A, using IRQ #19
770 08:43:29.237598 PCI 7.1, PIN B, using IRQ #20
771 08:43:29.241208 PCI 7.2, PIN C, using IRQ #21
772 08:43:29.241294 PCI 7.3, PIN D, using IRQ #22
773 08:43:29.244666 PCI 8.0, PIN A, using IRQ #23
774 08:43:29.247633 PCI D.0, PIN A, using IRQ #17
775 08:43:29.251234 PCI D.1, PIN B, using IRQ #19
776 08:43:29.254380 PCI 10.0, PIN A, using IRQ #24
777 08:43:29.257932 PCI 10.1, PIN B, using IRQ #25
778 08:43:29.261196 PCI 10.6, PIN C, using IRQ #20
779 08:43:29.264325 PCI 10.7, PIN D, using IRQ #21
780 08:43:29.267661 PCI 11.0, PIN A, using IRQ #26
781 08:43:29.270863 PCI 11.1, PIN B, using IRQ #27
782 08:43:29.274490 PCI 11.2, PIN C, using IRQ #28
783 08:43:29.277901 PCI 11.3, PIN D, using IRQ #29
784 08:43:29.280803 PCI 12.0, PIN A, using IRQ #30
785 08:43:29.284477 PCI 12.6, PIN B, using IRQ #31
786 08:43:29.287913 PCI 12.7, PIN C, using IRQ #22
787 08:43:29.291494 PCI 13.0, PIN A, using IRQ #32
788 08:43:29.294255 PCI 13.1, PIN B, using IRQ #33
789 08:43:29.294341 PCI 13.2, PIN C, using IRQ #34
790 08:43:29.297693 PCI 13.3, PIN D, using IRQ #35
791 08:43:29.301163 PCI 14.0, PIN B, using IRQ #23
792 08:43:29.304292 PCI 14.1, PIN A, using IRQ #36
793 08:43:29.308146 PCI 14.3, PIN C, using IRQ #17
794 08:43:29.310986 PCI 15.0, PIN A, using IRQ #37
795 08:43:29.314423 PCI 15.1, PIN B, using IRQ #38
796 08:43:29.317896 PCI 15.2, PIN C, using IRQ #39
797 08:43:29.321214 PCI 15.3, PIN D, using IRQ #40
798 08:43:29.324729 PCI 16.0, PIN A, using IRQ #18
799 08:43:29.327763 PCI 16.1, PIN B, using IRQ #19
800 08:43:29.331033 PCI 16.2, PIN C, using IRQ #20
801 08:43:29.334720 PCI 16.3, PIN D, using IRQ #21
802 08:43:29.337875 PCI 16.4, PIN A, using IRQ #18
803 08:43:29.341129 PCI 16.5, PIN B, using IRQ #19
804 08:43:29.344287 PCI 17.0, PIN A, using IRQ #22
805 08:43:29.344418 PCI 19.0, PIN A, using IRQ #41
806 08:43:29.347747 PCI 19.1, PIN B, using IRQ #42
807 08:43:29.351078 PCI 19.2, PIN C, using IRQ #43
808 08:43:29.354450 PCI 1C.0, PIN A, using IRQ #16
809 08:43:29.357913 PCI 1C.1, PIN B, using IRQ #17
810 08:43:29.360743 PCI 1C.2, PIN C, using IRQ #18
811 08:43:29.363980 PCI 1C.3, PIN D, using IRQ #19
812 08:43:29.367563 PCI 1C.4, PIN A, using IRQ #16
813 08:43:29.371303 PCI 1C.5, PIN B, using IRQ #17
814 08:43:29.374056 PCI 1C.6, PIN C, using IRQ #18
815 08:43:29.377625 PCI 1C.7, PIN D, using IRQ #19
816 08:43:29.381008 PCI 1D.0, PIN A, using IRQ #16
817 08:43:29.384568 PCI 1D.1, PIN B, using IRQ #17
818 08:43:29.387632 PCI 1D.2, PIN C, using IRQ #18
819 08:43:29.391077 PCI 1D.3, PIN D, using IRQ #19
820 08:43:29.394331 PCI 1E.0, PIN A, using IRQ #23
821 08:43:29.394417 PCI 1E.1, PIN B, using IRQ #20
822 08:43:29.397854 PCI 1E.2, PIN C, using IRQ #44
823 08:43:29.401678 PCI 1E.3, PIN D, using IRQ #45
824 08:43:29.404725 PCI 1F.3, PIN B, using IRQ #22
825 08:43:29.407630 PCI 1F.4, PIN C, using IRQ #23
826 08:43:29.411259 PCI 1F.6, PIN D, using IRQ #20
827 08:43:29.414484 PCI 1F.7, PIN A, using IRQ #21
828 08:43:29.418115 IRQ: Using dynamically assigned PCI IO-APIC IRQs
829 08:43:29.427635 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
830 08:43:29.608813 FSPS returned 0
831 08:43:29.612654 Executing Phase 1 of FspMultiPhaseSiInit
832 08:43:29.622292 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
833 08:43:29.626150 port C0 DISC req: usage 1 usb3 1 usb2 1
834 08:43:29.628692 Raw Buffer output 0 00000111
835 08:43:29.631961 Raw Buffer output 1 00000000
836 08:43:29.635719 pmc_send_ipc_cmd succeeded
837 08:43:29.639108 port C1 DISC req: usage 1 usb3 3 usb2 3
838 08:43:29.642607 Raw Buffer output 0 00000331
839 08:43:29.645642 Raw Buffer output 1 00000000
840 08:43:29.649864 pmc_send_ipc_cmd succeeded
841 08:43:29.653603 Detected 6 core, 8 thread CPU.
842 08:43:29.656946 Detected 6 core, 8 thread CPU.
843 08:43:29.662342 Detected 6 core, 8 thread CPU.
844 08:43:29.665800 Detected 6 core, 8 thread CPU.
845 08:43:29.668791 Detected 6 core, 8 thread CPU.
846 08:43:29.672542 Detected 6 core, 8 thread CPU.
847 08:43:29.676063 Detected 6 core, 8 thread CPU.
848 08:43:29.679084 Detected 6 core, 8 thread CPU.
849 08:43:29.682460 Detected 6 core, 8 thread CPU.
850 08:43:29.685557 Detected 6 core, 8 thread CPU.
851 08:43:29.688744 Detected 6 core, 8 thread CPU.
852 08:43:29.692131 Detected 6 core, 8 thread CPU.
853 08:43:29.695756 Detected 6 core, 8 thread CPU.
854 08:43:29.699110 Detected 6 core, 8 thread CPU.
855 08:43:29.702656 Detected 6 core, 8 thread CPU.
856 08:43:29.705559 Detected 6 core, 8 thread CPU.
857 08:43:29.708985 Detected 6 core, 8 thread CPU.
858 08:43:29.712462 Detected 6 core, 8 thread CPU.
859 08:43:29.716036 Detected 6 core, 8 thread CPU.
860 08:43:29.719101 Detected 6 core, 8 thread CPU.
861 08:43:29.722435 Detected 6 core, 8 thread CPU.
862 08:43:29.722523 Detected 6 core, 8 thread CPU.
863 08:43:30.015073 Detected 6 core, 8 thread CPU.
864 08:43:30.018422 Detected 6 core, 8 thread CPU.
865 08:43:30.021898 Detected 6 core, 8 thread CPU.
866 08:43:30.025674 Detected 6 core, 8 thread CPU.
867 08:43:30.029052 Detected 6 core, 8 thread CPU.
868 08:43:30.031837 Detected 6 core, 8 thread CPU.
869 08:43:30.035539 Detected 6 core, 8 thread CPU.
870 08:43:30.038807 Detected 6 core, 8 thread CPU.
871 08:43:30.042062 Detected 6 core, 8 thread CPU.
872 08:43:30.045224 Detected 6 core, 8 thread CPU.
873 08:43:30.048992 Detected 6 core, 8 thread CPU.
874 08:43:30.051890 Detected 6 core, 8 thread CPU.
875 08:43:30.055534 Detected 6 core, 8 thread CPU.
876 08:43:30.058619 Detected 6 core, 8 thread CPU.
877 08:43:30.061947 Detected 6 core, 8 thread CPU.
878 08:43:30.065359 Detected 6 core, 8 thread CPU.
879 08:43:30.068823 Detected 6 core, 8 thread CPU.
880 08:43:30.072132 Detected 6 core, 8 thread CPU.
881 08:43:30.072218 Detected 6 core, 8 thread CPU.
882 08:43:30.075207 Detected 6 core, 8 thread CPU.
883 08:43:30.079224 Display FSP Version Info HOB
884 08:43:30.082121 Reference Code - CPU = c.0.65.70
885 08:43:30.085584 uCode Version = 0.0.4.23
886 08:43:30.088986 TXT ACM version = ff.ff.ff.ffff
887 08:43:30.092819 Reference Code - ME = c.0.65.70
888 08:43:30.095586 MEBx version = 0.0.0.0
889 08:43:30.099399 ME Firmware Version = Lite SKU
890 08:43:30.102502 Reference Code - PCH = c.0.65.70
891 08:43:30.105493 PCH-CRID Status = Disabled
892 08:43:30.108976 PCH-CRID Original Value = ff.ff.ff.ffff
893 08:43:30.112308 PCH-CRID New Value = ff.ff.ff.ffff
894 08:43:30.115941 OPROM - RST - RAID = ff.ff.ff.ffff
895 08:43:30.118814 PCH Hsio Version = 4.0.0.0
896 08:43:30.122408 Reference Code - SA - System Agent = c.0.65.70
897 08:43:30.125750 Reference Code - MRC = 0.0.3.80
898 08:43:30.129656 SA - PCIe Version = c.0.65.70
899 08:43:30.132128 SA-CRID Status = Disabled
900 08:43:30.135398 SA-CRID Original Value = 0.0.0.4
901 08:43:30.138888 SA-CRID New Value = 0.0.0.4
902 08:43:30.142428 OPROM - VBIOS = ff.ff.ff.ffff
903 08:43:30.145489 IO Manageability Engine FW Version = 24.0.4.0
904 08:43:30.149008 PHY Build Version = 0.0.0.2016
905 08:43:30.152437 Thunderbolt(TM) FW Version = 0.0.0.0
906 08:43:30.159121 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
907 08:43:30.165849 BS: BS_DEV_INIT_CHIPS run times (exec / console): 493 / 507 ms
908 08:43:30.165935 Enumerating buses...
909 08:43:30.172316 Show all devs... Before device enumeration.
910 08:43:30.172402 Root Device: enabled 1
911 08:43:30.176065 CPU_CLUSTER: 0: enabled 1
912 08:43:30.179066 DOMAIN: 0000: enabled 1
913 08:43:30.179150 GPIO: 0: enabled 1
914 08:43:30.182340 PCI: 00:00.0: enabled 1
915 08:43:30.185694 PCI: 00:01.0: enabled 0
916 08:43:30.189074 PCI: 00:01.1: enabled 0
917 08:43:30.189158 PCI: 00:02.0: enabled 1
918 08:43:30.192313 PCI: 00:04.0: enabled 1
919 08:43:30.195739 PCI: 00:05.0: enabled 0
920 08:43:30.199184 PCI: 00:06.0: enabled 1
921 08:43:30.199269 PCI: 00:06.2: enabled 0
922 08:43:30.202373 PCI: 00:07.0: enabled 0
923 08:43:30.205527 PCI: 00:07.1: enabled 0
924 08:43:30.208776 PCI: 00:07.2: enabled 0
925 08:43:30.208874 PCI: 00:07.3: enabled 0
926 08:43:30.212376 PCI: 00:08.0: enabled 0
927 08:43:30.215580 PCI: 00:09.0: enabled 0
928 08:43:30.215665 PCI: 00:0a.0: enabled 1
929 08:43:30.219252 PCI: 00:0d.0: enabled 1
930 08:43:30.222236 PCI: 00:0d.1: enabled 0
931 08:43:30.225447 PCI: 00:0d.2: enabled 0
932 08:43:30.225531 PCI: 00:0d.3: enabled 0
933 08:43:30.229198 PCI: 00:0e.0: enabled 0
934 08:43:30.232427 PCI: 00:10.0: enabled 0
935 08:43:30.235528 PCI: 00:10.1: enabled 0
936 08:43:30.235613 PCI: 00:10.6: enabled 0
937 08:43:30.238742 PCI: 00:10.7: enabled 0
938 08:43:30.242252 PCI: 00:12.0: enabled 0
939 08:43:30.245452 PCI: 00:12.6: enabled 0
940 08:43:30.245555 PCI: 00:12.7: enabled 0
941 08:43:30.248640 PCI: 00:13.0: enabled 0
942 08:43:30.252109 PCI: 00:14.0: enabled 1
943 08:43:30.255398 PCI: 00:14.1: enabled 0
944 08:43:30.255483 PCI: 00:14.2: enabled 1
945 08:43:30.259015 PCI: 00:14.3: enabled 1
946 08:43:30.261956 PCI: 00:15.0: enabled 1
947 08:43:30.262042 PCI: 00:15.1: enabled 1
948 08:43:30.265729 PCI: 00:15.2: enabled 0
949 08:43:30.269139 PCI: 00:15.3: enabled 1
950 08:43:30.271893 PCI: 00:16.0: enabled 1
951 08:43:30.271996 PCI: 00:16.1: enabled 0
952 08:43:30.275228 PCI: 00:16.2: enabled 0
953 08:43:30.278584 PCI: 00:16.3: enabled 0
954 08:43:30.282163 PCI: 00:16.4: enabled 0
955 08:43:30.282248 PCI: 00:16.5: enabled 0
956 08:43:30.285439 PCI: 00:17.0: enabled 1
957 08:43:30.288723 PCI: 00:19.0: enabled 0
958 08:43:30.292033 PCI: 00:19.1: enabled 1
959 08:43:30.292118 PCI: 00:19.2: enabled 0
960 08:43:30.295689 PCI: 00:1a.0: enabled 0
961 08:43:30.298608 PCI: 00:1c.0: enabled 0
962 08:43:30.298693 PCI: 00:1c.1: enabled 0
963 08:43:30.302333 PCI: 00:1c.2: enabled 0
964 08:43:30.305421 PCI: 00:1c.3: enabled 0
965 08:43:30.308588 PCI: 00:1c.4: enabled 0
966 08:43:30.308673 PCI: 00:1c.5: enabled 0
967 08:43:30.311818 PCI: 00:1c.6: enabled 0
968 08:43:30.315106 PCI: 00:1c.7: enabled 0
969 08:43:30.318318 PCI: 00:1d.0: enabled 0
970 08:43:30.318402 PCI: 00:1d.1: enabled 0
971 08:43:30.321640 PCI: 00:1d.2: enabled 0
972 08:43:30.325224 PCI: 00:1d.3: enabled 0
973 08:43:30.328846 PCI: 00:1e.0: enabled 1
974 08:43:30.328930 PCI: 00:1e.1: enabled 0
975 08:43:30.331660 PCI: 00:1e.2: enabled 0
976 08:43:30.335199 PCI: 00:1e.3: enabled 1
977 08:43:30.338792 PCI: 00:1f.0: enabled 1
978 08:43:30.338877 PCI: 00:1f.1: enabled 0
979 08:43:30.341888 PCI: 00:1f.2: enabled 1
980 08:43:30.345200 PCI: 00:1f.3: enabled 1
981 08:43:30.345285 PCI: 00:1f.4: enabled 0
982 08:43:30.348775 PCI: 00:1f.5: enabled 1
983 08:43:30.351926 PCI: 00:1f.6: enabled 0
984 08:43:30.355059 PCI: 00:1f.7: enabled 0
985 08:43:30.355160 GENERIC: 0.0: enabled 1
986 08:43:30.358738 GENERIC: 0.0: enabled 1
987 08:43:30.362089 GENERIC: 1.0: enabled 1
988 08:43:30.365284 GENERIC: 0.0: enabled 1
989 08:43:30.365369 GENERIC: 1.0: enabled 1
990 08:43:30.368353 USB0 port 0: enabled 1
991 08:43:30.371876 USB0 port 0: enabled 1
992 08:43:30.371960 GENERIC: 0.0: enabled 1
993 08:43:30.375113 I2C: 00:1a: enabled 1
994 08:43:30.378534 I2C: 00:31: enabled 1
995 08:43:30.378618 I2C: 00:32: enabled 1
996 08:43:30.381602 I2C: 00:50: enabled 1
997 08:43:30.384892 I2C: 00:10: enabled 1
998 08:43:30.388540 I2C: 00:15: enabled 1
999 08:43:30.388651 I2C: 00:2c: enabled 1
1000 08:43:30.391734 GENERIC: 0.0: enabled 1
1001 08:43:30.395054 SPI: 00: enabled 1
1002 08:43:30.395139 PNP: 0c09.0: enabled 1
1003 08:43:30.398851 GENERIC: 0.0: enabled 1
1004 08:43:30.401609 USB3 port 0: enabled 1
1005 08:43:30.401694 USB3 port 1: enabled 0
1006 08:43:30.404984 USB3 port 2: enabled 1
1007 08:43:30.408506 USB3 port 3: enabled 0
1008 08:43:30.408590 USB2 port 0: enabled 1
1009 08:43:30.411692 USB2 port 1: enabled 0
1010 08:43:30.414807 USB2 port 2: enabled 1
1011 08:43:30.418524 USB2 port 3: enabled 0
1012 08:43:30.418609 USB2 port 4: enabled 0
1013 08:43:30.421652 USB2 port 5: enabled 1
1014 08:43:30.425689 USB2 port 6: enabled 0
1015 08:43:30.425774 USB2 port 7: enabled 0
1016 08:43:30.428383 USB2 port 8: enabled 1
1017 08:43:30.431926 USB2 port 9: enabled 1
1018 08:43:30.434910 USB3 port 0: enabled 1
1019 08:43:30.434995 USB3 port 1: enabled 0
1020 08:43:30.438540 USB3 port 2: enabled 0
1021 08:43:30.441432 USB3 port 3: enabled 0
1022 08:43:30.441517 GENERIC: 0.0: enabled 1
1023 08:43:30.444964 GENERIC: 1.0: enabled 1
1024 08:43:30.448262 APIC: 00: enabled 1
1025 08:43:30.448370 APIC: 12: enabled 1
1026 08:43:30.451504 APIC: 14: enabled 1
1027 08:43:30.454689 APIC: 16: enabled 1
1028 08:43:30.454773 APIC: 10: enabled 1
1029 08:43:30.458075 APIC: 01: enabled 1
1030 08:43:30.458158 APIC: 09: enabled 1
1031 08:43:30.461520 APIC: 08: enabled 1
1032 08:43:30.465057 Compare with tree...
1033 08:43:30.465141 Root Device: enabled 1
1034 08:43:30.468050 CPU_CLUSTER: 0: enabled 1
1035 08:43:30.471679 APIC: 00: enabled 1
1036 08:43:30.474749 APIC: 12: enabled 1
1037 08:43:30.474833 APIC: 14: enabled 1
1038 08:43:30.478297 APIC: 16: enabled 1
1039 08:43:30.481389 APIC: 10: enabled 1
1040 08:43:30.481473 APIC: 01: enabled 1
1041 08:43:30.484683 APIC: 09: enabled 1
1042 08:43:30.488213 APIC: 08: enabled 1
1043 08:43:30.488297 DOMAIN: 0000: enabled 1
1044 08:43:30.491201 GPIO: 0: enabled 1
1045 08:43:30.494696 PCI: 00:00.0: enabled 1
1046 08:43:30.498091 PCI: 00:01.0: enabled 0
1047 08:43:30.498174 PCI: 00:01.1: enabled 0
1048 08:43:30.501779 PCI: 00:02.0: enabled 1
1049 08:43:30.504501 PCI: 00:04.0: enabled 1
1050 08:43:30.508280 GENERIC: 0.0: enabled 1
1051 08:43:30.511592 PCI: 00:05.0: enabled 0
1052 08:43:30.511675 PCI: 00:06.0: enabled 1
1053 08:43:30.515042 PCI: 00:06.2: enabled 0
1054 08:43:30.517933 PCI: 00:08.0: enabled 0
1055 08:43:30.521367 PCI: 00:09.0: enabled 0
1056 08:43:30.524624 PCI: 00:0a.0: enabled 1
1057 08:43:30.524709 PCI: 00:0d.0: enabled 1
1058 08:43:30.528654 USB0 port 0: enabled 1
1059 08:43:30.531663 USB3 port 0: enabled 1
1060 08:43:30.534860 USB3 port 1: enabled 0
1061 08:43:30.538506 USB3 port 2: enabled 1
1062 08:43:30.538590 USB3 port 3: enabled 0
1063 08:43:30.541356 PCI: 00:0d.1: enabled 0
1064 08:43:30.545147 PCI: 00:0d.2: enabled 0
1065 08:43:30.548175 PCI: 00:0d.3: enabled 0
1066 08:43:30.551514 PCI: 00:0e.0: enabled 0
1067 08:43:30.551598 PCI: 00:10.0: enabled 0
1068 08:43:30.554893 PCI: 00:10.1: enabled 0
1069 08:43:30.558228 PCI: 00:10.6: enabled 0
1070 08:43:30.561556 PCI: 00:10.7: enabled 0
1071 08:43:30.564909 PCI: 00:12.0: enabled 0
1072 08:43:30.564992 PCI: 00:12.6: enabled 0
1073 08:43:30.568307 PCI: 00:12.7: enabled 0
1074 08:43:30.571738 PCI: 00:13.0: enabled 0
1075 08:43:30.574860 PCI: 00:14.0: enabled 1
1076 08:43:30.578577 USB0 port 0: enabled 1
1077 08:43:30.578661 USB2 port 0: enabled 1
1078 08:43:30.581473 USB2 port 1: enabled 0
1079 08:43:30.584641 USB2 port 2: enabled 1
1080 08:43:30.587850 USB2 port 3: enabled 0
1081 08:43:30.591429 USB2 port 4: enabled 0
1082 08:43:30.591538 USB2 port 5: enabled 1
1083 08:43:30.594883 USB2 port 6: enabled 0
1084 08:43:30.597977 USB2 port 7: enabled 0
1085 08:43:30.601224 USB2 port 8: enabled 1
1086 08:43:30.604664 USB2 port 9: enabled 1
1087 08:43:30.608149 USB3 port 0: enabled 1
1088 08:43:30.608233 USB3 port 1: enabled 0
1089 08:43:30.611822 USB3 port 2: enabled 0
1090 08:43:30.614934 USB3 port 3: enabled 0
1091 08:43:30.618331 PCI: 00:14.1: enabled 0
1092 08:43:30.621423 PCI: 00:14.2: enabled 1
1093 08:43:30.621507 PCI: 00:14.3: enabled 1
1094 08:43:30.624673 GENERIC: 0.0: enabled 1
1095 08:43:30.628041 PCI: 00:15.0: enabled 1
1096 08:43:30.631476 I2C: 00:1a: enabled 1
1097 08:43:30.634924 I2C: 00:31: enabled 1
1098 08:43:30.635010 I2C: 00:32: enabled 1
1099 08:43:30.638442 PCI: 00:15.1: enabled 1
1100 08:43:30.641371 I2C: 00:50: enabled 1
1101 08:43:30.644894 PCI: 00:15.2: enabled 0
1102 08:43:30.644980 PCI: 00:15.3: enabled 1
1103 08:43:30.648139 I2C: 00:10: enabled 1
1104 08:43:30.651167 PCI: 00:16.0: enabled 1
1105 08:43:30.655564 PCI: 00:16.1: enabled 0
1106 08:43:30.658257 PCI: 00:16.2: enabled 0
1107 08:43:30.658342 PCI: 00:16.3: enabled 0
1108 08:43:30.661410 PCI: 00:16.4: enabled 0
1109 08:43:30.664713 PCI: 00:16.5: enabled 0
1110 08:43:30.668138 PCI: 00:17.0: enabled 1
1111 08:43:30.671128 PCI: 00:19.0: enabled 0
1112 08:43:30.671213 PCI: 00:19.1: enabled 1
1113 08:43:30.674646 I2C: 00:15: enabled 1
1114 08:43:30.677770 I2C: 00:2c: enabled 1
1115 08:43:30.681282 PCI: 00:19.2: enabled 0
1116 08:43:30.681367 PCI: 00:1a.0: enabled 0
1117 08:43:30.684382 PCI: 00:1e.0: enabled 1
1118 08:43:30.688058 PCI: 00:1e.1: enabled 0
1119 08:43:30.691134 PCI: 00:1e.2: enabled 0
1120 08:43:30.694385 PCI: 00:1e.3: enabled 1
1121 08:43:30.694526 SPI: 00: enabled 1
1122 08:43:30.698105 PCI: 00:1f.0: enabled 1
1123 08:43:30.700987 PNP: 0c09.0: enabled 1
1124 08:43:30.705045 PCI: 00:1f.1: enabled 0
1125 08:43:30.707571 PCI: 00:1f.2: enabled 1
1126 08:43:30.707658 GENERIC: 0.0: enabled 1
1127 08:43:30.711099 GENERIC: 0.0: enabled 1
1128 08:43:30.714422 GENERIC: 1.0: enabled 1
1129 08:43:30.717921 PCI: 00:1f.3: enabled 1
1130 08:43:30.721067 PCI: 00:1f.4: enabled 0
1131 08:43:30.721282 PCI: 00:1f.5: enabled 1
1132 08:43:30.724351 PCI: 00:1f.6: enabled 0
1133 08:43:30.727764 PCI: 00:1f.7: enabled 0
1134 08:43:30.731140 Root Device scanning...
1135 08:43:30.734395 scan_static_bus for Root Device
1136 08:43:30.734527 CPU_CLUSTER: 0 enabled
1137 08:43:30.738263 DOMAIN: 0000 enabled
1138 08:43:30.741542 DOMAIN: 0000 scanning...
1139 08:43:30.744550 PCI: pci_scan_bus for bus 00
1140 08:43:30.747685 PCI: 00:00.0 [8086/0000] ops
1141 08:43:30.751257 PCI: 00:00.0 [8086/4609] enabled
1142 08:43:30.754537 PCI: 00:02.0 [8086/0000] bus ops
1143 08:43:30.758075 PCI: 00:02.0 [8086/46b3] enabled
1144 08:43:30.761111 PCI: 00:04.0 [8086/0000] bus ops
1145 08:43:30.764564 PCI: 00:04.0 [8086/461d] enabled
1146 08:43:30.767583 PCI: 00:06.0 [8086/0000] bus ops
1147 08:43:30.771177 PCI: 00:06.0 [8086/464d] enabled
1148 08:43:30.774546 PCI: 00:08.0 [8086/464f] disabled
1149 08:43:30.777653 PCI: 00:0a.0 [8086/467d] enabled
1150 08:43:30.780967 PCI: 00:0d.0 [8086/0000] bus ops
1151 08:43:30.784920 PCI: 00:0d.0 [8086/461e] enabled
1152 08:43:30.787751 PCI: 00:14.0 [8086/0000] bus ops
1153 08:43:30.790988 PCI: 00:14.0 [8086/51ed] enabled
1154 08:43:30.794441 PCI: 00:14.2 [8086/51ef] enabled
1155 08:43:30.797928 PCI: 00:14.3 [8086/0000] bus ops
1156 08:43:30.800849 PCI: 00:14.3 [8086/51f0] enabled
1157 08:43:30.804511 PCI: 00:15.0 [8086/0000] bus ops
1158 08:43:30.807766 PCI: 00:15.0 [8086/51e8] enabled
1159 08:43:30.810883 PCI: 00:15.1 [8086/0000] bus ops
1160 08:43:30.814276 PCI: 00:15.1 [8086/51e9] enabled
1161 08:43:30.817698 PCI: 00:15.2 [8086/0000] bus ops
1162 08:43:30.821074 PCI: 00:15.2 [8086/51ea] disabled
1163 08:43:30.824216 PCI: 00:15.3 [8086/0000] bus ops
1164 08:43:30.827551 PCI: 00:15.3 [8086/51eb] enabled
1165 08:43:30.831240 PCI: 00:16.0 [8086/0000] ops
1166 08:43:30.834550 PCI: 00:16.0 [8086/51e0] enabled
1167 08:43:30.841227 PCI: Static device PCI: 00:17.0 not found, disabling it.
1168 08:43:30.844205 PCI: 00:19.0 [8086/0000] bus ops
1169 08:43:30.847517 PCI: 00:19.0 [8086/51c5] disabled
1170 08:43:30.850835 PCI: 00:19.1 [8086/0000] bus ops
1171 08:43:30.854078 PCI: 00:19.1 [8086/51c6] enabled
1172 08:43:30.857948 PCI: 00:1e.0 [8086/0000] ops
1173 08:43:30.860706 PCI: 00:1e.0 [8086/51a8] enabled
1174 08:43:30.864266 PCI: 00:1e.3 [8086/0000] bus ops
1175 08:43:30.867726 PCI: 00:1e.3 [8086/51ab] enabled
1176 08:43:30.871242 PCI: 00:1f.0 [8086/0000] bus ops
1177 08:43:30.874091 PCI: 00:1f.0 [8086/5182] enabled
1178 08:43:30.874192 RTC Init
1179 08:43:30.877614 Set power on after power failure.
1180 08:43:30.881171 Disabling Deep S3
1181 08:43:30.881285 Disabling Deep S3
1182 08:43:30.884261 Disabling Deep S4
1183 08:43:30.887430 Disabling Deep S4
1184 08:43:30.887516 Disabling Deep S5
1185 08:43:30.890974 Disabling Deep S5
1186 08:43:30.893866 PCI: 00:1f.2 [0000/0000] hidden
1187 08:43:30.898091 PCI: 00:1f.3 [8086/0000] bus ops
1188 08:43:30.900939 PCI: 00:1f.3 [8086/51c8] enabled
1189 08:43:30.903957 PCI: 00:1f.5 [8086/0000] bus ops
1190 08:43:30.907314 PCI: 00:1f.5 [8086/51a4] enabled
1191 08:43:30.907401 GPIO: 0 enabled
1192 08:43:30.910906 PCI: Leftover static devices:
1193 08:43:30.910993 PCI: 00:01.0
1194 08:43:30.914092 PCI: 00:01.1
1195 08:43:30.914179 PCI: 00:05.0
1196 08:43:30.917598 PCI: 00:06.2
1197 08:43:30.917685 PCI: 00:09.0
1198 08:43:30.920890 PCI: 00:0d.1
1199 08:43:30.920976 PCI: 00:0d.2
1200 08:43:30.921062 PCI: 00:0d.3
1201 08:43:30.924046 PCI: 00:0e.0
1202 08:43:30.924132 PCI: 00:10.0
1203 08:43:30.927560 PCI: 00:10.1
1204 08:43:30.927648 PCI: 00:10.6
1205 08:43:30.927736 PCI: 00:10.7
1206 08:43:30.931258 PCI: 00:12.0
1207 08:43:30.931346 PCI: 00:12.6
1208 08:43:30.934043 PCI: 00:12.7
1209 08:43:30.934156 PCI: 00:13.0
1210 08:43:30.934254 PCI: 00:14.1
1211 08:43:30.937940 PCI: 00:16.1
1212 08:43:30.938025 PCI: 00:16.2
1213 08:43:30.940942 PCI: 00:16.3
1214 08:43:30.941031 PCI: 00:16.4
1215 08:43:30.944504 PCI: 00:16.5
1216 08:43:30.944590 PCI: 00:17.0
1217 08:43:30.944658 PCI: 00:19.2
1218 08:43:30.947914 PCI: 00:1a.0
1219 08:43:30.948011 PCI: 00:1e.1
1220 08:43:30.951017 PCI: 00:1e.2
1221 08:43:30.951104 PCI: 00:1f.1
1222 08:43:30.951172 PCI: 00:1f.4
1223 08:43:30.954149 PCI: 00:1f.6
1224 08:43:30.954234 PCI: 00:1f.7
1225 08:43:30.957793 PCI: Check your devicetree.cb.
1226 08:43:30.960678 PCI: 00:02.0 scanning...
1227 08:43:30.964331 scan_generic_bus for PCI: 00:02.0
1228 08:43:30.967685 scan_generic_bus for PCI: 00:02.0 done
1229 08:43:30.974031 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1230 08:43:30.974115 PCI: 00:04.0 scanning...
1231 08:43:30.977682 scan_generic_bus for PCI: 00:04.0
1232 08:43:30.980900 GENERIC: 0.0 enabled
1233 08:43:30.987375 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1234 08:43:30.990916 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1235 08:43:30.994055 PCI: 00:06.0 scanning...
1236 08:43:30.997306 do_pci_scan_bridge for PCI: 00:06.0
1237 08:43:31.000935 PCI: pci_scan_bus for bus 01
1238 08:43:31.004394 PCI: 01:00.0 [15b7/5009] enabled
1239 08:43:31.007463 Enabling Common Clock Configuration
1240 08:43:31.010624 L1 Sub-State supported from root port 6
1241 08:43:31.013975 L1 Sub-State Support = 0x5
1242 08:43:31.017606 CommonModeRestoreTime = 0x6e
1243 08:43:31.020604 Power On Value = 0x5, Power On Scale = 0x2
1244 08:43:31.024194 ASPM: Enabled L1
1245 08:43:31.027598 PCIe: Max_Payload_Size adjusted to 256
1246 08:43:31.031177 PCI: 01:00.0: Enabled LTR
1247 08:43:31.034432 PCI: 01:00.0: Programmed LTR max latencies
1248 08:43:31.040654 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1249 08:43:31.040772 PCI: 00:0d.0 scanning...
1250 08:43:31.044052 scan_static_bus for PCI: 00:0d.0
1251 08:43:31.047664 USB0 port 0 enabled
1252 08:43:31.050851 USB0 port 0 scanning...
1253 08:43:31.053966 scan_static_bus for USB0 port 0
1254 08:43:31.054051 USB3 port 0 enabled
1255 08:43:31.057301 USB3 port 1 disabled
1256 08:43:31.060512 USB3 port 2 enabled
1257 08:43:31.060597 USB3 port 3 disabled
1258 08:43:31.064005 USB3 port 0 scanning...
1259 08:43:31.067452 scan_static_bus for USB3 port 0
1260 08:43:31.070530 scan_static_bus for USB3 port 0 done
1261 08:43:31.074074 scan_bus: bus USB3 port 0 finished in 6 msecs
1262 08:43:31.077209 USB3 port 2 scanning...
1263 08:43:31.080686 scan_static_bus for USB3 port 2
1264 08:43:31.083962 scan_static_bus for USB3 port 2 done
1265 08:43:31.090679 scan_bus: bus USB3 port 2 finished in 6 msecs
1266 08:43:31.093877 scan_static_bus for USB0 port 0 done
1267 08:43:31.097318 scan_bus: bus USB0 port 0 finished in 43 msecs
1268 08:43:31.100367 scan_static_bus for PCI: 00:0d.0 done
1269 08:43:31.107247 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1270 08:43:31.107333 PCI: 00:14.0 scanning...
1271 08:43:31.110832 scan_static_bus for PCI: 00:14.0
1272 08:43:31.113873 USB0 port 0 enabled
1273 08:43:31.117506 USB0 port 0 scanning...
1274 08:43:31.120784 scan_static_bus for USB0 port 0
1275 08:43:31.120867 USB2 port 0 enabled
1276 08:43:31.123924 USB2 port 1 disabled
1277 08:43:31.127037 USB2 port 2 enabled
1278 08:43:31.127121 USB2 port 3 disabled
1279 08:43:31.130608 USB2 port 4 disabled
1280 08:43:31.134098 USB2 port 5 enabled
1281 08:43:31.134182 USB2 port 6 disabled
1282 08:43:31.137075 USB2 port 7 disabled
1283 08:43:31.137159 USB2 port 8 enabled
1284 08:43:31.140559 USB2 port 9 enabled
1285 08:43:31.144033 USB3 port 0 enabled
1286 08:43:31.144116 USB3 port 1 disabled
1287 08:43:31.147258 USB3 port 2 disabled
1288 08:43:31.150615 USB3 port 3 disabled
1289 08:43:31.150690 USB2 port 0 scanning...
1290 08:43:31.153854 scan_static_bus for USB2 port 0
1291 08:43:31.157658 scan_static_bus for USB2 port 0 done
1292 08:43:31.164406 scan_bus: bus USB2 port 0 finished in 6 msecs
1293 08:43:31.164497 USB2 port 2 scanning...
1294 08:43:31.167591 scan_static_bus for USB2 port 2
1295 08:43:31.174450 scan_static_bus for USB2 port 2 done
1296 08:43:31.177299 scan_bus: bus USB2 port 2 finished in 6 msecs
1297 08:43:31.180713 USB2 port 5 scanning...
1298 08:43:31.183899 scan_static_bus for USB2 port 5
1299 08:43:31.187442 scan_static_bus for USB2 port 5 done
1300 08:43:31.190914 scan_bus: bus USB2 port 5 finished in 6 msecs
1301 08:43:31.194044 USB2 port 8 scanning...
1302 08:43:31.197306 scan_static_bus for USB2 port 8
1303 08:43:31.200628 scan_static_bus for USB2 port 8 done
1304 08:43:31.204017 scan_bus: bus USB2 port 8 finished in 6 msecs
1305 08:43:31.207602 USB2 port 9 scanning...
1306 08:43:31.210935 scan_static_bus for USB2 port 9
1307 08:43:31.214108 scan_static_bus for USB2 port 9 done
1308 08:43:31.217781 scan_bus: bus USB2 port 9 finished in 6 msecs
1309 08:43:31.221007 USB3 port 0 scanning...
1310 08:43:31.223911 scan_static_bus for USB3 port 0
1311 08:43:31.227392 scan_static_bus for USB3 port 0 done
1312 08:43:31.234338 scan_bus: bus USB3 port 0 finished in 6 msecs
1313 08:43:31.237757 scan_static_bus for USB0 port 0 done
1314 08:43:31.240828 scan_bus: bus USB0 port 0 finished in 120 msecs
1315 08:43:31.243928 scan_static_bus for PCI: 00:14.0 done
1316 08:43:31.250746 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1317 08:43:31.254478 PCI: 00:14.3 scanning...
1318 08:43:31.258055 scan_static_bus for PCI: 00:14.3
1319 08:43:31.258179 GENERIC: 0.0 enabled
1320 08:43:31.260788 scan_static_bus for PCI: 00:14.3 done
1321 08:43:31.267888 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1322 08:43:31.270947 PCI: 00:15.0 scanning...
1323 08:43:31.274331 scan_static_bus for PCI: 00:15.0
1324 08:43:31.274454 I2C: 00:1a enabled
1325 08:43:31.277453 I2C: 00:31 enabled
1326 08:43:31.277574 I2C: 00:32 enabled
1327 08:43:31.280688 scan_static_bus for PCI: 00:15.0 done
1328 08:43:31.287571 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1329 08:43:31.290877 PCI: 00:15.1 scanning...
1330 08:43:31.293957 scan_static_bus for PCI: 00:15.1
1331 08:43:31.294083 I2C: 00:50 enabled
1332 08:43:31.297276 scan_static_bus for PCI: 00:15.1 done
1333 08:43:31.304306 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1334 08:43:31.307394 PCI: 00:15.3 scanning...
1335 08:43:31.310604 scan_static_bus for PCI: 00:15.3
1336 08:43:31.310725 I2C: 00:10 enabled
1337 08:43:31.314197 scan_static_bus for PCI: 00:15.3 done
1338 08:43:31.320687 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1339 08:43:31.320818 PCI: 00:19.1 scanning...
1340 08:43:31.323766 scan_static_bus for PCI: 00:19.1
1341 08:43:31.327423 I2C: 00:15 enabled
1342 08:43:31.330889 I2C: 00:2c enabled
1343 08:43:31.333929 scan_static_bus for PCI: 00:19.1 done
1344 08:43:31.337563 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1345 08:43:31.340480 PCI: 00:1e.3 scanning...
1346 08:43:31.343951 scan_generic_bus for PCI: 00:1e.3
1347 08:43:31.344074 SPI: 00 enabled
1348 08:43:31.350543 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1349 08:43:31.357286 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1350 08:43:31.357415 PCI: 00:1f.0 scanning...
1351 08:43:31.360491 scan_static_bus for PCI: 00:1f.0
1352 08:43:31.364324 PNP: 0c09.0 enabled
1353 08:43:31.367836 PNP: 0c09.0 scanning...
1354 08:43:31.370672 scan_static_bus for PNP: 0c09.0
1355 08:43:31.373937 scan_static_bus for PNP: 0c09.0 done
1356 08:43:31.377414 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1357 08:43:31.380993 scan_static_bus for PCI: 00:1f.0 done
1358 08:43:31.387396 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1359 08:43:31.390790 PCI: 00:1f.2 scanning...
1360 08:43:31.394303 scan_static_bus for PCI: 00:1f.2
1361 08:43:31.394427 GENERIC: 0.0 enabled
1362 08:43:31.397395 GENERIC: 0.0 scanning...
1363 08:43:31.400564 scan_static_bus for GENERIC: 0.0
1364 08:43:31.404297 GENERIC: 0.0 enabled
1365 08:43:31.404403 GENERIC: 1.0 enabled
1366 08:43:31.407557 scan_static_bus for GENERIC: 0.0 done
1367 08:43:31.414338 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1368 08:43:31.417435 scan_static_bus for PCI: 00:1f.2 done
1369 08:43:31.420728 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1370 08:43:31.423997 PCI: 00:1f.3 scanning...
1371 08:43:31.427386 scan_static_bus for PCI: 00:1f.3
1372 08:43:31.430803 scan_static_bus for PCI: 00:1f.3 done
1373 08:43:31.437255 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1374 08:43:31.441382 PCI: 00:1f.5 scanning...
1375 08:43:31.444124 scan_generic_bus for PCI: 00:1f.5
1376 08:43:31.447677 scan_generic_bus for PCI: 00:1f.5 done
1377 08:43:31.450627 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1378 08:43:31.457278 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1379 08:43:31.460848 scan_static_bus for Root Device done
1380 08:43:31.464524 scan_bus: bus Root Device finished in 729 msecs
1381 08:43:31.464648 done
1382 08:43:31.470786 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1383 08:43:31.477403 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1384 08:43:31.484217 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1385 08:43:31.487455 SPI flash protection: WPSW=0 SRP0=0
1386 08:43:31.491122 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1387 08:43:31.497309 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1388 08:43:31.500906 found VGA at PCI: 00:02.0
1389 08:43:31.504346 Setting up VGA for PCI: 00:02.0
1390 08:43:31.507823 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1391 08:43:31.514715 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1392 08:43:31.514801 Allocating resources...
1393 08:43:31.517617 Reading resources...
1394 08:43:31.521314 Root Device read_resources bus 0 link: 0
1395 08:43:31.527530 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1396 08:43:31.530694 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1397 08:43:31.534140 DOMAIN: 0000 read_resources bus 0 link: 0
1398 08:43:31.540843 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1399 08:43:31.548000 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1400 08:43:31.554127 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1401 08:43:31.560907 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1402 08:43:31.567767 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1403 08:43:31.574220 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1404 08:43:31.577798 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1405 08:43:31.584353 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1406 08:43:31.591604 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1407 08:43:31.597677 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1408 08:43:31.604556 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1409 08:43:31.611042 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1410 08:43:31.618004 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1411 08:43:31.624255 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1412 08:43:31.631167 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1413 08:43:31.637675 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1414 08:43:31.644459 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1415 08:43:31.650841 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1416 08:43:31.654771 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1417 08:43:31.660877 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1418 08:43:31.667441 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1419 08:43:31.671025 PCI: 00:04.0 read_resources bus 1 link: 0
1420 08:43:31.677624 PCI: 00:04.0 read_resources bus 1 link: 0 done
1421 08:43:31.681328 PCI: 00:06.0 read_resources bus 1 link: 0
1422 08:43:31.687446 PCI: 00:06.0 read_resources bus 1 link: 0 done
1423 08:43:31.690888 PCI: 00:0d.0 read_resources bus 0 link: 0
1424 08:43:31.694233 USB0 port 0 read_resources bus 0 link: 0
1425 08:43:31.697601 USB0 port 0 read_resources bus 0 link: 0 done
1426 08:43:31.704689 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1427 08:43:31.707618 PCI: 00:14.0 read_resources bus 0 link: 0
1428 08:43:31.710958 USB0 port 0 read_resources bus 0 link: 0
1429 08:43:31.717646 USB0 port 0 read_resources bus 0 link: 0 done
1430 08:43:31.720712 PCI: 00:14.0 read_resources bus 0 link: 0 done
1431 08:43:31.724421 PCI: 00:14.3 read_resources bus 0 link: 0
1432 08:43:31.730819 PCI: 00:14.3 read_resources bus 0 link: 0 done
1433 08:43:31.734097 PCI: 00:15.0 read_resources bus 0 link: 0
1434 08:43:31.740658 PCI: 00:15.0 read_resources bus 0 link: 0 done
1435 08:43:31.744082 PCI: 00:15.1 read_resources bus 0 link: 0
1436 08:43:31.747367 PCI: 00:15.1 read_resources bus 0 link: 0 done
1437 08:43:31.754298 PCI: 00:15.3 read_resources bus 0 link: 0
1438 08:43:31.757679 PCI: 00:15.3 read_resources bus 0 link: 0 done
1439 08:43:31.760829 PCI: 00:19.1 read_resources bus 0 link: 0
1440 08:43:31.767735 PCI: 00:19.1 read_resources bus 0 link: 0 done
1441 08:43:31.770904 PCI: 00:1e.3 read_resources bus 2 link: 0
1442 08:43:31.774462 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1443 08:43:31.780739 PCI: 00:1f.0 read_resources bus 0 link: 0
1444 08:43:31.784214 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1445 08:43:31.787594 PCI: 00:1f.2 read_resources bus 0 link: 0
1446 08:43:31.794172 GENERIC: 0.0 read_resources bus 0 link: 0
1447 08:43:31.797423 GENERIC: 0.0 read_resources bus 0 link: 0 done
1448 08:43:31.800868 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1449 08:43:31.807821 DOMAIN: 0000 read_resources bus 0 link: 0 done
1450 08:43:31.810961 Root Device read_resources bus 0 link: 0 done
1451 08:43:31.814209 Done reading resources.
1452 08:43:31.821657 Show resources in subtree (Root Device)...After reading.
1453 08:43:31.824225 Root Device child on link 0 CPU_CLUSTER: 0
1454 08:43:31.827967 CPU_CLUSTER: 0 child on link 0 APIC: 00
1455 08:43:31.831167 APIC: 00
1456 08:43:31.831252 APIC: 12
1457 08:43:31.831319 APIC: 14
1458 08:43:31.834254 APIC: 16
1459 08:43:31.834338 APIC: 10
1460 08:43:31.837817 APIC: 01
1461 08:43:31.837902 APIC: 09
1462 08:43:31.837970 APIC: 08
1463 08:43:31.844222 DOMAIN: 0000 child on link 0 GPIO: 0
1464 08:43:31.851043 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1465 08:43:31.861314 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1466 08:43:31.865054 GPIO: 0
1467 08:43:31.865139 PCI: 00:00.0
1468 08:43:31.874501 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1469 08:43:31.884200 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1470 08:43:31.894470 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1471 08:43:31.901071 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1472 08:43:31.910871 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1473 08:43:31.921149 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1474 08:43:31.930997 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1475 08:43:31.941262 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1476 08:43:31.951217 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1477 08:43:31.958137 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1478 08:43:31.968128 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1479 08:43:31.978058 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1480 08:43:31.988069 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1481 08:43:31.998385 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1482 08:43:32.004342 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1483 08:43:32.014275 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1484 08:43:32.024137 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1485 08:43:32.034071 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1486 08:43:32.044416 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1487 08:43:32.054198 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1488 08:43:32.064292 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1489 08:43:32.073952 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1490 08:43:32.080823 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1491 08:43:32.090611 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1492 08:43:32.100730 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1493 08:43:32.110721 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1494 08:43:32.120876 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1495 08:43:32.130335 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1496 08:43:32.130483 PCI: 00:02.0
1497 08:43:32.143683 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1498 08:43:32.153611 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1499 08:43:32.160258 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1500 08:43:32.166874 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1501 08:43:32.177246 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1502 08:43:32.177382 GENERIC: 0.0
1503 08:43:32.180429 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1504 08:43:32.190286 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1505 08:43:32.200483 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1506 08:43:32.210415 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1507 08:43:32.210547 PCI: 01:00.0
1508 08:43:32.220367 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1509 08:43:32.230381 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1510 08:43:32.233582 PCI: 00:08.0
1511 08:43:32.233709 PCI: 00:0a.0
1512 08:43:32.243799 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1513 08:43:32.250673 PCI: 00:0d.0 child on link 0 USB0 port 0
1514 08:43:32.260140 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1515 08:43:32.263748 USB0 port 0 child on link 0 USB3 port 0
1516 08:43:32.263837 USB3 port 0
1517 08:43:32.266966 USB3 port 1
1518 08:43:32.267070 USB3 port 2
1519 08:43:32.270475 USB3 port 3
1520 08:43:32.273681 PCI: 00:14.0 child on link 0 USB0 port 0
1521 08:43:32.283728 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1522 08:43:32.290380 USB0 port 0 child on link 0 USB2 port 0
1523 08:43:32.290483 USB2 port 0
1524 08:43:32.293844 USB2 port 1
1525 08:43:32.293961 USB2 port 2
1526 08:43:32.297204 USB2 port 3
1527 08:43:32.297289 USB2 port 4
1528 08:43:32.300172 USB2 port 5
1529 08:43:32.300284 USB2 port 6
1530 08:43:32.303745 USB2 port 7
1531 08:43:32.303830 USB2 port 8
1532 08:43:32.306890 USB2 port 9
1533 08:43:32.306976 USB3 port 0
1534 08:43:32.310077 USB3 port 1
1535 08:43:32.313701 USB3 port 2
1536 08:43:32.313787 USB3 port 3
1537 08:43:32.316919 PCI: 00:14.2
1538 08:43:32.327733 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1539 08:43:32.336889 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1540 08:43:32.340340 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1541 08:43:32.350174 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1542 08:43:32.350260 GENERIC: 0.0
1543 08:43:32.356663 PCI: 00:15.0 child on link 0 I2C: 00:1a
1544 08:43:32.366769 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1545 08:43:32.366905 I2C: 00:1a
1546 08:43:32.370079 I2C: 00:31
1547 08:43:32.370168 I2C: 00:32
1548 08:43:32.373362 PCI: 00:15.1 child on link 0 I2C: 00:50
1549 08:43:32.383181 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1550 08:43:32.386767 I2C: 00:50
1551 08:43:32.386893 PCI: 00:15.2
1552 08:43:32.393732 PCI: 00:15.3 child on link 0 I2C: 00:10
1553 08:43:32.403334 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1554 08:43:32.403421 I2C: 00:10
1555 08:43:32.406861 PCI: 00:16.0
1556 08:43:32.416932 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1557 08:43:32.417019 PCI: 00:19.0
1558 08:43:32.420023 PCI: 00:19.1 child on link 0 I2C: 00:15
1559 08:43:32.429675 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1560 08:43:32.433032 I2C: 00:15
1561 08:43:32.433163 I2C: 00:2c
1562 08:43:32.436947 PCI: 00:1e.0
1563 08:43:32.446360 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1564 08:43:32.449668 PCI: 00:1e.3 child on link 0 SPI: 00
1565 08:43:32.460057 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1566 08:43:32.463921 SPI: 00
1567 08:43:32.466793 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1568 08:43:32.476248 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1569 08:43:32.476351 PNP: 0c09.0
1570 08:43:32.486503 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1571 08:43:32.489604 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1572 08:43:32.499593 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1573 08:43:32.509973 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1574 08:43:32.512878 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1575 08:43:32.516285 GENERIC: 0.0
1576 08:43:32.516369 GENERIC: 1.0
1577 08:43:32.519785 PCI: 00:1f.3
1578 08:43:32.529483 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1579 08:43:32.540785 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1580 08:43:32.540872 PCI: 00:1f.5
1581 08:43:32.549507 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1582 08:43:32.556227 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1583 08:43:32.562860 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1584 08:43:32.569706 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1585 08:43:32.576358 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1586 08:43:32.579477 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1587 08:43:32.582865 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1588 08:43:32.589461 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1589 08:43:32.599846 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1590 08:43:32.606256 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1591 08:43:32.612784 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1592 08:43:32.619567 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1593 08:43:32.626451 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1594 08:43:32.633491 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1595 08:43:32.642993 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1596 08:43:32.646498 DOMAIN: 0000: Resource ranges:
1597 08:43:32.649606 * Base: 1000, Size: 800, Tag: 100
1598 08:43:32.652623 * Base: 1900, Size: e700, Tag: 100
1599 08:43:32.659556 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1600 08:43:32.666086 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1601 08:43:32.672631 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1602 08:43:32.679383 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1603 08:43:32.685887 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1604 08:43:32.696166 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1605 08:43:32.702689 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1606 08:43:32.709505 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1607 08:43:32.718983 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1608 08:43:32.725679 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1609 08:43:32.732654 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1610 08:43:32.739082 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1611 08:43:32.749378 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1612 08:43:32.755900 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1613 08:43:32.762817 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1614 08:43:32.772016 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1615 08:43:32.779247 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1616 08:43:32.785337 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1617 08:43:32.795563 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1618 08:43:32.802333 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1619 08:43:32.808654 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1620 08:43:32.819276 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1621 08:43:32.825245 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1622 08:43:32.832207 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1623 08:43:32.842031 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1624 08:43:32.848775 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1625 08:43:32.855238 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1626 08:43:32.865265 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1627 08:43:32.871926 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1628 08:43:32.878573 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1629 08:43:32.888475 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1630 08:43:32.895210 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1631 08:43:32.901909 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1632 08:43:32.905185 DOMAIN: 0000: Resource ranges:
1633 08:43:32.908913 * Base: 80400000, Size: 3fc00000, Tag: 200
1634 08:43:32.915083 * Base: d0000000, Size: 28000000, Tag: 200
1635 08:43:32.918564 * Base: fa000000, Size: 1000000, Tag: 200
1636 08:43:32.921568 * Base: fb001000, Size: 17ff000, Tag: 200
1637 08:43:32.928517 * Base: fe800000, Size: 300000, Tag: 200
1638 08:43:32.931718 * Base: feb80000, Size: 80000, Tag: 200
1639 08:43:32.935411 * Base: fed00000, Size: 40000, Tag: 200
1640 08:43:32.938724 * Base: fed70000, Size: 10000, Tag: 200
1641 08:43:32.945097 * Base: fed88000, Size: 8000, Tag: 200
1642 08:43:32.948412 * Base: fed93000, Size: d000, Tag: 200
1643 08:43:32.951722 * Base: feda2000, Size: 1e000, Tag: 200
1644 08:43:32.955106 * Base: fede0000, Size: 1220000, Tag: 200
1645 08:43:32.961961 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1646 08:43:32.968227 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1647 08:43:32.975029 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1648 08:43:32.981693 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1649 08:43:32.988008 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1650 08:43:32.995204 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1651 08:43:33.001612 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1652 08:43:33.008417 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1653 08:43:33.014804 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1654 08:43:33.021251 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1655 08:43:33.028145 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1656 08:43:33.034610 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1657 08:43:33.041475 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1658 08:43:33.048052 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1659 08:43:33.055031 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1660 08:43:33.061332 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1661 08:43:33.067932 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1662 08:43:33.074558 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1663 08:43:33.081388 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1664 08:43:33.088056 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1665 08:43:33.094546 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1666 08:43:33.101120 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1667 08:43:33.104310 PCI: 00:06.0: Resource ranges:
1668 08:43:33.110880 * Base: 80400000, Size: 100000, Tag: 200
1669 08:43:33.117617 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1670 08:43:33.124560 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1671 08:43:33.130836 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1672 08:43:33.137675 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1673 08:43:33.144497 Root Device assign_resources, bus 0 link: 0
1674 08:43:33.147321 DOMAIN: 0000 assign_resources, bus 0 link: 0
1675 08:43:33.157403 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1676 08:43:33.164311 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1677 08:43:33.171000 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1678 08:43:33.180620 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1679 08:43:33.183903 PCI: 00:04.0 assign_resources, bus 1 link: 0
1680 08:43:33.190848 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1681 08:43:33.197757 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1682 08:43:33.207395 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1683 08:43:33.217103 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1684 08:43:33.220543 PCI: 00:06.0 assign_resources, bus 1 link: 0
1685 08:43:33.230530 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1686 08:43:33.237177 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1687 08:43:33.240729 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1688 08:43:33.250552 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1689 08:43:33.256843 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1690 08:43:33.263737 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1691 08:43:33.266861 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1692 08:43:33.276783 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1693 08:43:33.280280 PCI: 00:14.0 assign_resources, bus 0 link: 0
1694 08:43:33.283380 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1695 08:43:33.293573 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1696 08:43:33.300138 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1697 08:43:33.310057 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1698 08:43:33.313352 PCI: 00:14.3 assign_resources, bus 0 link: 0
1699 08:43:33.316993 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1700 08:43:33.326876 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1701 08:43:33.330170 PCI: 00:15.0 assign_resources, bus 0 link: 0
1702 08:43:33.337042 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1703 08:43:33.343176 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1704 08:43:33.346688 PCI: 00:15.1 assign_resources, bus 0 link: 0
1705 08:43:33.353344 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1706 08:43:33.360331 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1707 08:43:33.366393 PCI: 00:15.3 assign_resources, bus 0 link: 0
1708 08:43:33.370464 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1709 08:43:33.380059 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1710 08:43:33.386998 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1711 08:43:33.389896 PCI: 00:19.1 assign_resources, bus 0 link: 0
1712 08:43:33.396472 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1713 08:43:33.403459 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1714 08:43:33.409725 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1715 08:43:33.413022 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1716 08:43:33.419893 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1717 08:43:33.422930 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1718 08:43:33.429966 LPC: Trying to open IO window from 800 size 1ff
1719 08:43:33.436230 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1720 08:43:33.442883 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1721 08:43:33.452655 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1722 08:43:33.455884 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1723 08:43:33.462701 Root Device assign_resources, bus 0 link: 0 done
1724 08:43:33.462850 Done setting resources.
1725 08:43:33.469297 Show resources in subtree (Root Device)...After assigning values.
1726 08:43:33.475786 Root Device child on link 0 CPU_CLUSTER: 0
1727 08:43:33.479309 CPU_CLUSTER: 0 child on link 0 APIC: 00
1728 08:43:33.479430 APIC: 00
1729 08:43:33.482680 APIC: 12
1730 08:43:33.482770 APIC: 14
1731 08:43:33.485968 APIC: 16
1732 08:43:33.486055 APIC: 10
1733 08:43:33.486158 APIC: 01
1734 08:43:33.489297 APIC: 09
1735 08:43:33.489384 APIC: 08
1736 08:43:33.492552 DOMAIN: 0000 child on link 0 GPIO: 0
1737 08:43:33.502414 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1738 08:43:33.512403 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1739 08:43:33.512496 GPIO: 0
1740 08:43:33.515566 PCI: 00:00.0
1741 08:43:33.525813 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1742 08:43:33.535749 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1743 08:43:33.542881 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1744 08:43:33.552200 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1745 08:43:33.562466 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1746 08:43:33.572111 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1747 08:43:33.582207 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1748 08:43:33.591820 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1749 08:43:33.601897 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1750 08:43:33.608465 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1751 08:43:33.618187 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1752 08:43:33.628246 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1753 08:43:33.638152 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1754 08:43:33.648286 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1755 08:43:33.658022 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1756 08:43:33.665169 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1757 08:43:33.674775 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1758 08:43:33.684743 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1759 08:43:33.694602 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1760 08:43:33.704718 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1761 08:43:33.714832 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1762 08:43:33.724529 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1763 08:43:33.731265 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1764 08:43:33.741210 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1765 08:43:33.751031 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1766 08:43:33.760988 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1767 08:43:33.770779 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1768 08:43:33.781115 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1769 08:43:33.781238 PCI: 00:02.0
1770 08:43:33.794200 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1771 08:43:33.804254 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1772 08:43:33.814346 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1773 08:43:33.817505 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1774 08:43:33.827673 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1775 08:43:33.830742 GENERIC: 0.0
1776 08:43:33.834064 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1777 08:43:33.844158 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1778 08:43:33.853959 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1779 08:43:33.867499 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1780 08:43:33.867617 PCI: 01:00.0
1781 08:43:33.877166 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1782 08:43:33.887181 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1783 08:43:33.890599 PCI: 00:08.0
1784 08:43:33.890684 PCI: 00:0a.0
1785 08:43:33.900473 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1786 08:43:33.907131 PCI: 00:0d.0 child on link 0 USB0 port 0
1787 08:43:33.916855 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1788 08:43:33.920165 USB0 port 0 child on link 0 USB3 port 0
1789 08:43:33.923477 USB3 port 0
1790 08:43:33.923586 USB3 port 1
1791 08:43:33.927081 USB3 port 2
1792 08:43:33.927163 USB3 port 3
1793 08:43:33.933731 PCI: 00:14.0 child on link 0 USB0 port 0
1794 08:43:33.943363 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1795 08:43:33.946942 USB0 port 0 child on link 0 USB2 port 0
1796 08:43:33.950031 USB2 port 0
1797 08:43:33.950118 USB2 port 1
1798 08:43:33.953668 USB2 port 2
1799 08:43:33.953777 USB2 port 3
1800 08:43:33.956735 USB2 port 4
1801 08:43:33.956856 USB2 port 5
1802 08:43:33.960223 USB2 port 6
1803 08:43:33.960308 USB2 port 7
1804 08:43:33.963650 USB2 port 8
1805 08:43:33.963736 USB2 port 9
1806 08:43:33.967120 USB3 port 0
1807 08:43:33.967206 USB3 port 1
1808 08:43:33.970434 USB3 port 2
1809 08:43:33.973925 USB3 port 3
1810 08:43:33.974011 PCI: 00:14.2
1811 08:43:33.983422 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1812 08:43:33.994065 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1813 08:43:34.000255 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1814 08:43:34.010144 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1815 08:43:34.010237 GENERIC: 0.0
1816 08:43:34.016665 PCI: 00:15.0 child on link 0 I2C: 00:1a
1817 08:43:34.026624 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1818 08:43:34.026714 I2C: 00:1a
1819 08:43:34.030196 I2C: 00:31
1820 08:43:34.030281 I2C: 00:32
1821 08:43:34.033613 PCI: 00:15.1 child on link 0 I2C: 00:50
1822 08:43:34.046896 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1823 08:43:34.046989 I2C: 00:50
1824 08:43:34.047058 PCI: 00:15.2
1825 08:43:34.053371 PCI: 00:15.3 child on link 0 I2C: 00:10
1826 08:43:34.063144 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1827 08:43:34.063251 I2C: 00:10
1828 08:43:34.066617 PCI: 00:16.0
1829 08:43:34.077000 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1830 08:43:34.077102 PCI: 00:19.0
1831 08:43:34.083241 PCI: 00:19.1 child on link 0 I2C: 00:15
1832 08:43:34.093095 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1833 08:43:34.093190 I2C: 00:15
1834 08:43:34.096399 I2C: 00:2c
1835 08:43:34.096486 PCI: 00:1e.0
1836 08:43:34.109582 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1837 08:43:34.112995 PCI: 00:1e.3 child on link 0 SPI: 00
1838 08:43:34.123008 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1839 08:43:34.123102 SPI: 00
1840 08:43:34.129545 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1841 08:43:34.136642 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1842 08:43:34.139643 PNP: 0c09.0
1843 08:43:34.146462 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1844 08:43:34.152704 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1845 08:43:34.163031 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1846 08:43:34.169758 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1847 08:43:34.175998 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1848 08:43:34.176093 GENERIC: 0.0
1849 08:43:34.179524 GENERIC: 1.0
1850 08:43:34.179612 PCI: 00:1f.3
1851 08:43:34.193055 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1852 08:43:34.202849 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1853 08:43:34.203008 PCI: 00:1f.5
1854 08:43:34.212610 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1855 08:43:34.216246 Done allocating resources.
1856 08:43:34.222887 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1857 08:43:34.229508 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1858 08:43:34.232862 Configure audio over I2S with MAX98373 NAU88L25B.
1859 08:43:34.237614 Enabling BT offload
1860 08:43:34.244686 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1861 08:43:34.248205 Enabling resources...
1862 08:43:34.251579 PCI: 00:00.0 subsystem <- 8086/4609
1863 08:43:34.254719 PCI: 00:00.0 cmd <- 06
1864 08:43:34.258732 PCI: 00:02.0 subsystem <- 8086/46b3
1865 08:43:34.261465 PCI: 00:02.0 cmd <- 03
1866 08:43:34.264942 PCI: 00:04.0 subsystem <- 8086/461d
1867 08:43:34.265075 PCI: 00:04.0 cmd <- 02
1868 08:43:34.268141 PCI: 00:06.0 bridge ctrl <- 0013
1869 08:43:34.271478 PCI: 00:06.0 subsystem <- 8086/464d
1870 08:43:34.274818 PCI: 00:06.0 cmd <- 106
1871 08:43:34.278246 PCI: 00:0a.0 subsystem <- 8086/467d
1872 08:43:34.281417 PCI: 00:0a.0 cmd <- 02
1873 08:43:34.284932 PCI: 00:0d.0 subsystem <- 8086/461e
1874 08:43:34.288411 PCI: 00:0d.0 cmd <- 02
1875 08:43:34.291340 PCI: 00:14.0 subsystem <- 8086/51ed
1876 08:43:34.294673 PCI: 00:14.0 cmd <- 02
1877 08:43:34.297997 PCI: 00:14.2 subsystem <- 8086/51ef
1878 08:43:34.298101 PCI: 00:14.2 cmd <- 02
1879 08:43:34.301134 PCI: 00:14.3 subsystem <- 8086/51f0
1880 08:43:34.304570 PCI: 00:14.3 cmd <- 02
1881 08:43:34.308449 PCI: 00:15.0 subsystem <- 8086/51e8
1882 08:43:34.311332 PCI: 00:15.0 cmd <- 02
1883 08:43:34.314582 PCI: 00:15.1 subsystem <- 8086/51e9
1884 08:43:34.318331 PCI: 00:15.1 cmd <- 06
1885 08:43:34.321407 PCI: 00:15.3 subsystem <- 8086/51eb
1886 08:43:34.324882 PCI: 00:15.3 cmd <- 02
1887 08:43:34.327806 PCI: 00:16.0 subsystem <- 8086/51e0
1888 08:43:34.327929 PCI: 00:16.0 cmd <- 02
1889 08:43:34.331555 PCI: 00:19.1 subsystem <- 8086/51c6
1890 08:43:34.334335 PCI: 00:19.1 cmd <- 02
1891 08:43:34.338173 PCI: 00:1e.0 subsystem <- 8086/51a8
1892 08:43:34.341628 PCI: 00:1e.0 cmd <- 06
1893 08:43:34.344777 PCI: 00:1e.3 subsystem <- 8086/51ab
1894 08:43:34.348009 PCI: 00:1e.3 cmd <- 02
1895 08:43:34.351369 PCI: 00:1f.0 subsystem <- 8086/5182
1896 08:43:34.354824 PCI: 00:1f.0 cmd <- 407
1897 08:43:34.358021 PCI: 00:1f.3 subsystem <- 8086/51c8
1898 08:43:34.358134 PCI: 00:1f.3 cmd <- 02
1899 08:43:34.361806 PCI: 00:1f.5 subsystem <- 8086/51a4
1900 08:43:34.365000 PCI: 00:1f.5 cmd <- 406
1901 08:43:34.368679 PCI: 01:00.0 cmd <- 02
1902 08:43:34.368799 done.
1903 08:43:34.374382 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1904 08:43:34.377963 ME: Version: Unavailable
1905 08:43:34.381214 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1906 08:43:34.384764 Initializing devices...
1907 08:43:34.387623 Root Device init
1908 08:43:34.387706 mainboard: EC init
1909 08:43:34.394647 Chrome EC: Set SMI mask to 0x0000000000000000
1910 08:43:34.397560 Chrome EC: UHEPI supported
1911 08:43:34.404698 Chrome EC: clear events_b mask to 0x0000000000000000
1912 08:43:34.407342 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1913 08:43:34.414363 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1914 08:43:34.420745 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1915 08:43:34.423984 Chrome EC: Set WAKE mask to 0x0000000000000000
1916 08:43:34.431151 Root Device init finished in 39 msecs
1917 08:43:34.431283 PCI: 00:00.0 init
1918 08:43:34.434650 CPU TDP = 15 Watts
1919 08:43:34.437787 CPU PL1 = 15 Watts
1920 08:43:34.437912 CPU PL2 = 55 Watts
1921 08:43:34.440987 CPU PL4 = 123 Watts
1922 08:43:34.444740 PCI: 00:00.0 init finished in 8 msecs
1923 08:43:34.447758 PCI: 00:02.0 init
1924 08:43:34.447882 GMA: Found VBT in CBFS
1925 08:43:34.451510 GMA: Found valid VBT in CBFS
1926 08:43:34.457696 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1927 08:43:34.464539 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1928 08:43:34.467636 PCI: 00:02.0 init finished in 18 msecs
1929 08:43:34.471283 PCI: 00:06.0 init
1930 08:43:34.474209 Initializing PCH PCIe bridge.
1931 08:43:34.477509 PCI: 00:06.0 init finished in 3 msecs
1932 08:43:34.480940 PCI: 00:0a.0 init
1933 08:43:34.484179 PCI: 00:0a.0 init finished in 0 msecs
1934 08:43:34.484268 PCI: 00:14.0 init
1935 08:43:34.487577 PCI: 00:14.0 init finished in 0 msecs
1936 08:43:34.491160 PCI: 00:14.2 init
1937 08:43:34.494368 PCI: 00:14.2 init finished in 0 msecs
1938 08:43:34.497648 PCI: 00:15.0 init
1939 08:43:34.501185 I2C bus 0 version 0x3230302a
1940 08:43:34.504589 DW I2C bus 0 at 0x80655000 (400 KHz)
1941 08:43:34.507538 PCI: 00:15.0 init finished in 6 msecs
1942 08:43:34.507624 PCI: 00:15.1 init
1943 08:43:34.510942 I2C bus 1 version 0x3230302a
1944 08:43:34.514176 DW I2C bus 1 at 0x80656000 (400 KHz)
1945 08:43:34.517821 PCI: 00:15.1 init finished in 6 msecs
1946 08:43:34.521053 PCI: 00:15.3 init
1947 08:43:34.524674 I2C bus 3 version 0x3230302a
1948 08:43:34.527685 DW I2C bus 3 at 0x80657000 (400 KHz)
1949 08:43:34.530732 PCI: 00:15.3 init finished in 6 msecs
1950 08:43:34.534332 PCI: 00:16.0 init
1951 08:43:34.537620 PCI: 00:16.0 init finished in 0 msecs
1952 08:43:34.537708 PCI: 00:19.1 init
1953 08:43:34.540707 I2C bus 5 version 0x3230302a
1954 08:43:34.544250 DW I2C bus 5 at 0x80659000 (400 KHz)
1955 08:43:34.551006 PCI: 00:19.1 init finished in 6 msecs
1956 08:43:34.551093 PCI: 00:1f.0 init
1957 08:43:34.554174 IOAPIC: Initializing IOAPIC at 0xfec00000
1958 08:43:34.557467 IOAPIC: ID = 0x02
1959 08:43:34.560691 IOAPIC: Dumping registers
1960 08:43:34.564758 reg 0x0000: 0x02000000
1961 08:43:34.564896 reg 0x0001: 0x00770020
1962 08:43:34.567608 reg 0x0002: 0x00000000
1963 08:43:34.570875 IOAPIC: 120 interrupts
1964 08:43:34.574059 IOAPIC: Clearing IOAPIC at 0xfec00000
1965 08:43:34.577558 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1966 08:43:34.584453 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1967 08:43:34.587381 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1968 08:43:34.594105 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1969 08:43:34.597594 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1970 08:43:34.604038 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1971 08:43:34.607659 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1972 08:43:34.613943 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1973 08:43:34.617363 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1974 08:43:34.620912 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1975 08:43:34.627219 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1976 08:43:34.630579 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1977 08:43:34.637382 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1978 08:43:34.640454 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1979 08:43:34.647275 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1980 08:43:34.650497 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1981 08:43:34.653855 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1982 08:43:34.660524 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1983 08:43:34.663859 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1984 08:43:34.670491 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1985 08:43:34.673814 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1986 08:43:34.680581 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1987 08:43:34.683770 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1988 08:43:34.690523 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1989 08:43:34.694268 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1990 08:43:34.697243 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1991 08:43:34.703883 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1992 08:43:34.707874 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1993 08:43:34.713806 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1994 08:43:34.717077 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1995 08:43:34.723860 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1996 08:43:34.727238 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1997 08:43:34.733997 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1998 08:43:34.737249 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1999 08:43:34.740318 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2000 08:43:34.746886 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2001 08:43:34.750377 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2002 08:43:34.757189 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2003 08:43:34.760402 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2004 08:43:34.766842 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2005 08:43:34.770659 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2006 08:43:34.773944 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2007 08:43:34.780314 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2008 08:43:34.783791 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2009 08:43:34.790172 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2010 08:43:34.793739 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2011 08:43:34.800302 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2012 08:43:34.803759 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2013 08:43:34.810269 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2014 08:43:34.813919 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2015 08:43:34.817070 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2016 08:43:34.823548 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2017 08:43:34.826812 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2018 08:43:34.833577 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2019 08:43:34.837161 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2020 08:43:34.844061 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2021 08:43:34.847032 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2022 08:43:34.850598 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2023 08:43:34.857446 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2024 08:43:34.860159 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2025 08:43:34.866868 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2026 08:43:34.870049 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2027 08:43:34.876757 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2028 08:43:34.880254 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2029 08:43:34.886594 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2030 08:43:34.890111 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2031 08:43:34.893295 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2032 08:43:34.900216 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2033 08:43:34.903351 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2034 08:43:34.910062 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2035 08:43:34.913267 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2036 08:43:34.919930 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2037 08:43:34.923419 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2038 08:43:34.929831 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2039 08:43:34.933363 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2040 08:43:34.936304 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2041 08:43:34.943124 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2042 08:43:34.946409 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2043 08:43:34.953549 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2044 08:43:34.956405 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2045 08:43:34.963092 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2046 08:43:34.966342 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2047 08:43:34.973042 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2048 08:43:34.976453 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2049 08:43:34.979765 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2050 08:43:34.986358 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2051 08:43:34.990061 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2052 08:43:34.996465 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2053 08:43:34.999731 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2054 08:43:35.006366 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2055 08:43:35.009767 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2056 08:43:35.016273 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2057 08:43:35.019769 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2058 08:43:35.023134 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2059 08:43:35.029741 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2060 08:43:35.032726 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2061 08:43:35.039695 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2062 08:43:35.042915 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2063 08:43:35.049922 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2064 08:43:35.053122 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2065 08:43:35.056307 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2066 08:43:35.062877 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2067 08:43:35.066379 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2068 08:43:35.073134 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2069 08:43:35.076245 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2070 08:43:35.082951 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2071 08:43:35.086357 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2072 08:43:35.093433 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2073 08:43:35.095986 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2074 08:43:35.099558 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2075 08:43:35.106177 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2076 08:43:35.109592 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2077 08:43:35.116136 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2078 08:43:35.119655 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2079 08:43:35.126029 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2080 08:43:35.129386 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2081 08:43:35.136006 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2082 08:43:35.139178 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2083 08:43:35.142488 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2084 08:43:35.149346 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2085 08:43:35.152656 IOAPIC: Bootstrap Processor Local APIC = 0x00
2086 08:43:35.159247 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2087 08:43:35.162550 PCI: 00:1f.0 init finished in 607 msecs
2088 08:43:35.165903 PCI: 00:1f.2 init
2089 08:43:35.165990 apm_control: Disabling ACPI.
2090 08:43:35.172545 APMC done.
2091 08:43:35.175803 PCI: 00:1f.2 init finished in 7 msecs
2092 08:43:35.179063 PCI: 00:1f.3 init
2093 08:43:35.182412 PCI: 00:1f.3 init finished in 0 msecs
2094 08:43:35.182492 PCI: 01:00.0 init
2095 08:43:35.185711 PCI: 01:00.0 init finished in 0 msecs
2096 08:43:35.189434 PNP: 0c09.0 init
2097 08:43:35.192229 Google Chrome EC uptime: 12.070 seconds
2098 08:43:35.199055 Google Chrome AP resets since EC boot: 1
2099 08:43:35.202530 Google Chrome most recent AP reset causes:
2100 08:43:35.205838 0.340: 32775 shutdown: entering G3
2101 08:43:35.212264 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2102 08:43:35.215625 PNP: 0c09.0 init finished in 23 msecs
2103 08:43:35.218842 GENERIC: 0.0 init
2104 08:43:35.222290 GENERIC: 0.0 init finished in 0 msecs
2105 08:43:35.222414 GENERIC: 1.0 init
2106 08:43:35.228874 GENERIC: 1.0 init finished in 0 msecs
2107 08:43:35.228962 Devices initialized
2108 08:43:35.232393 Show all devs... After init.
2109 08:43:35.235901 Root Device: enabled 1
2110 08:43:35.239033 CPU_CLUSTER: 0: enabled 1
2111 08:43:35.239157 DOMAIN: 0000: enabled 1
2112 08:43:35.242384 GPIO: 0: enabled 1
2113 08:43:35.245438 PCI: 00:00.0: enabled 1
2114 08:43:35.245557 PCI: 00:01.0: enabled 0
2115 08:43:35.248954 PCI: 00:01.1: enabled 0
2116 08:43:35.251975 PCI: 00:02.0: enabled 1
2117 08:43:35.255331 PCI: 00:04.0: enabled 1
2118 08:43:35.255456 PCI: 00:05.0: enabled 0
2119 08:43:35.258692 PCI: 00:06.0: enabled 1
2120 08:43:35.262101 PCI: 00:06.2: enabled 0
2121 08:43:35.262187 PCI: 00:07.0: enabled 0
2122 08:43:35.265405 PCI: 00:07.1: enabled 0
2123 08:43:35.268775 PCI: 00:07.2: enabled 0
2124 08:43:35.272565 PCI: 00:07.3: enabled 0
2125 08:43:35.272651 PCI: 00:08.0: enabled 0
2126 08:43:35.275392 PCI: 00:09.0: enabled 0
2127 08:43:35.279174 PCI: 00:0a.0: enabled 1
2128 08:43:35.282116 PCI: 00:0d.0: enabled 1
2129 08:43:35.282245 PCI: 00:0d.1: enabled 0
2130 08:43:35.285439 PCI: 00:0d.2: enabled 0
2131 08:43:35.288859 PCI: 00:0d.3: enabled 0
2132 08:43:35.292021 PCI: 00:0e.0: enabled 0
2133 08:43:35.292159 PCI: 00:10.0: enabled 0
2134 08:43:35.295976 PCI: 00:10.1: enabled 0
2135 08:43:35.298810 PCI: 00:10.6: enabled 0
2136 08:43:35.298911 PCI: 00:10.7: enabled 0
2137 08:43:35.302190 PCI: 00:12.0: enabled 0
2138 08:43:35.305231 PCI: 00:12.6: enabled 0
2139 08:43:35.308738 PCI: 00:12.7: enabled 0
2140 08:43:35.308834 PCI: 00:13.0: enabled 0
2141 08:43:35.311860 PCI: 00:14.0: enabled 1
2142 08:43:35.315085 PCI: 00:14.1: enabled 0
2143 08:43:35.318697 PCI: 00:14.2: enabled 1
2144 08:43:35.318818 PCI: 00:14.3: enabled 1
2145 08:43:35.321892 PCI: 00:15.0: enabled 1
2146 08:43:35.325292 PCI: 00:15.1: enabled 1
2147 08:43:35.329340 PCI: 00:15.2: enabled 0
2148 08:43:35.329463 PCI: 00:15.3: enabled 1
2149 08:43:35.331824 PCI: 00:16.0: enabled 1
2150 08:43:35.335153 PCI: 00:16.1: enabled 0
2151 08:43:35.338617 PCI: 00:16.2: enabled 0
2152 08:43:35.338734 PCI: 00:16.3: enabled 0
2153 08:43:35.342224 PCI: 00:16.4: enabled 0
2154 08:43:35.345391 PCI: 00:16.5: enabled 0
2155 08:43:35.345470 PCI: 00:17.0: enabled 0
2156 08:43:35.348673 PCI: 00:19.0: enabled 0
2157 08:43:35.351756 PCI: 00:19.1: enabled 1
2158 08:43:35.355198 PCI: 00:19.2: enabled 0
2159 08:43:35.355277 PCI: 00:1a.0: enabled 0
2160 08:43:35.358504 PCI: 00:1c.0: enabled 0
2161 08:43:35.362225 PCI: 00:1c.1: enabled 0
2162 08:43:35.365372 PCI: 00:1c.2: enabled 0
2163 08:43:35.365460 PCI: 00:1c.3: enabled 0
2164 08:43:35.368651 PCI: 00:1c.4: enabled 0
2165 08:43:35.371875 PCI: 00:1c.5: enabled 0
2166 08:43:35.374993 PCI: 00:1c.6: enabled 0
2167 08:43:35.375077 PCI: 00:1c.7: enabled 0
2168 08:43:35.378652 PCI: 00:1d.0: enabled 0
2169 08:43:35.382216 PCI: 00:1d.1: enabled 0
2170 08:43:35.382304 PCI: 00:1d.2: enabled 0
2171 08:43:35.385151 PCI: 00:1d.3: enabled 0
2172 08:43:35.388381 PCI: 00:1e.0: enabled 1
2173 08:43:35.391903 PCI: 00:1e.1: enabled 0
2174 08:43:35.391990 PCI: 00:1e.2: enabled 0
2175 08:43:35.395478 PCI: 00:1e.3: enabled 1
2176 08:43:35.398573 PCI: 00:1f.0: enabled 1
2177 08:43:35.401751 PCI: 00:1f.1: enabled 0
2178 08:43:35.401838 PCI: 00:1f.2: enabled 1
2179 08:43:35.405210 PCI: 00:1f.3: enabled 1
2180 08:43:35.408589 PCI: 00:1f.4: enabled 0
2181 08:43:35.412184 PCI: 00:1f.5: enabled 1
2182 08:43:35.412296 PCI: 00:1f.6: enabled 0
2183 08:43:35.415009 PCI: 00:1f.7: enabled 0
2184 08:43:35.418617 GENERIC: 0.0: enabled 1
2185 08:43:35.418704 GENERIC: 0.0: enabled 1
2186 08:43:35.421878 GENERIC: 1.0: enabled 1
2187 08:43:35.425191 GENERIC: 0.0: enabled 1
2188 08:43:35.428321 GENERIC: 1.0: enabled 1
2189 08:43:35.428434 USB0 port 0: enabled 1
2190 08:43:35.431850 USB0 port 0: enabled 1
2191 08:43:35.434748 GENERIC: 0.0: enabled 1
2192 08:43:35.438443 I2C: 00:1a: enabled 1
2193 08:43:35.438534 I2C: 00:31: enabled 1
2194 08:43:35.441807 I2C: 00:32: enabled 1
2195 08:43:35.444763 I2C: 00:50: enabled 1
2196 08:43:35.444851 I2C: 00:10: enabled 1
2197 08:43:35.448397 I2C: 00:15: enabled 1
2198 08:43:35.451742 I2C: 00:2c: enabled 1
2199 08:43:35.451873 GENERIC: 0.0: enabled 1
2200 08:43:35.454819 SPI: 00: enabled 1
2201 08:43:35.458502 PNP: 0c09.0: enabled 1
2202 08:43:35.458590 GENERIC: 0.0: enabled 1
2203 08:43:35.461560 USB3 port 0: enabled 1
2204 08:43:35.464698 USB3 port 1: enabled 0
2205 08:43:35.464794 USB3 port 2: enabled 1
2206 08:43:35.468086 USB3 port 3: enabled 0
2207 08:43:35.471211 USB2 port 0: enabled 1
2208 08:43:35.474746 USB2 port 1: enabled 0
2209 08:43:35.474835 USB2 port 2: enabled 1
2210 08:43:35.478403 USB2 port 3: enabled 0
2211 08:43:35.481459 USB2 port 4: enabled 0
2212 08:43:35.481546 USB2 port 5: enabled 1
2213 08:43:35.484606 USB2 port 6: enabled 0
2214 08:43:35.488000 USB2 port 7: enabled 0
2215 08:43:35.491144 USB2 port 8: enabled 1
2216 08:43:35.491231 USB2 port 9: enabled 1
2217 08:43:35.494622 USB3 port 0: enabled 1
2218 08:43:35.497896 USB3 port 1: enabled 0
2219 08:43:35.497984 USB3 port 2: enabled 0
2220 08:43:35.501416 USB3 port 3: enabled 0
2221 08:43:35.504629 GENERIC: 0.0: enabled 1
2222 08:43:35.507884 GENERIC: 1.0: enabled 1
2223 08:43:35.507972 APIC: 00: enabled 1
2224 08:43:35.511702 APIC: 12: enabled 1
2225 08:43:35.511790 APIC: 14: enabled 1
2226 08:43:35.514732 APIC: 16: enabled 1
2227 08:43:35.518141 APIC: 10: enabled 1
2228 08:43:35.518229 APIC: 01: enabled 1
2229 08:43:35.521204 APIC: 09: enabled 1
2230 08:43:35.521292 APIC: 08: enabled 1
2231 08:43:35.524634 PCI: 01:00.0: enabled 1
2232 08:43:35.531303 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2233 08:43:35.534562 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2234 08:43:35.537807 ELOG: NV offset 0xf20000 size 0x4000
2235 08:43:35.546298 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2236 08:43:35.553043 ELOG: Event(17) added with size 13 at 2023-08-07 08:43:37 UTC
2237 08:43:35.560037 ELOG: Event(9E) added with size 10 at 2023-08-07 08:43:37 UTC
2238 08:43:35.566475 ELOG: Event(9F) added with size 14 at 2023-08-07 08:43:37 UTC
2239 08:43:35.572874 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2240 08:43:35.580064 ELOG: Event(A0) added with size 9 at 2023-08-07 08:43:37 UTC
2241 08:43:35.583077 elog_add_boot_reason: Logged dev mode boot
2242 08:43:35.589637 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2243 08:43:35.589724 Finalize devices...
2244 08:43:35.592886 PCI: 00:16.0 final
2245 08:43:35.596365 PCI: 00:1f.2 final
2246 08:43:35.596451 GENERIC: 0.0 final
2247 08:43:35.602838 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2248 08:43:35.606443 GENERIC: 1.0 final
2249 08:43:35.609656 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2250 08:43:35.613126 Devices finalized
2251 08:43:35.619762 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2252 08:43:35.622932 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2253 08:43:35.629731 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2254 08:43:35.632949 ME: HFSTS1 : 0x90000245
2255 08:43:35.639749 ME: HFSTS2 : 0x82100116
2256 08:43:35.643179 ME: HFSTS3 : 0x00000050
2257 08:43:35.646220 ME: HFSTS4 : 0x00004000
2258 08:43:35.652973 ME: HFSTS5 : 0x00000000
2259 08:43:35.656218 ME: HFSTS6 : 0x40600006
2260 08:43:35.659487 ME: Manufacturing Mode : NO
2261 08:43:35.662865 ME: SPI Protection Mode Enabled : YES
2262 08:43:35.669356 ME: FPFs Committed : YES
2263 08:43:35.673166 ME: Manufacturing Vars Locked : YES
2264 08:43:35.676069 ME: FW Partition Table : OK
2265 08:43:35.679651 ME: Bringup Loader Failure : NO
2266 08:43:35.682959 ME: Firmware Init Complete : YES
2267 08:43:35.685913 ME: Boot Options Present : NO
2268 08:43:35.689284 ME: Update In Progress : NO
2269 08:43:35.696232 ME: D0i3 Support : YES
2270 08:43:35.699224 ME: Low Power State Enabled : NO
2271 08:43:35.702795 ME: CPU Replaced : YES
2272 08:43:35.705915 ME: CPU Replacement Valid : YES
2273 08:43:35.709437 ME: Current Working State : 5
2274 08:43:35.712390 ME: Current Operation State : 1
2275 08:43:35.716093 ME: Current Operation Mode : 0
2276 08:43:35.719041 ME: Error Code : 0
2277 08:43:35.722900 ME: Enhanced Debug Mode : NO
2278 08:43:35.729403 ME: CPU Debug Disabled : YES
2279 08:43:35.733027 ME: TXT Support : NO
2280 08:43:35.735983 ME: WP for RO is enabled : YES
2281 08:43:35.742558 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2282 08:43:35.745783 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2283 08:43:35.752686 Ramoops buffer: 0x100000@0x76899000.
2284 08:43:35.755721 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2285 08:43:35.765749 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2286 08:43:35.768897 CBFS: 'fallback/slic' not found.
2287 08:43:35.772238 ACPI: Writing ACPI tables at 7686d000.
2288 08:43:35.772371 ACPI: * FACS
2289 08:43:35.775523 ACPI: * DSDT
2290 08:43:35.782177 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2291 08:43:35.785648 ACPI: * FADT
2292 08:43:35.785760 SCI is IRQ9
2293 08:43:35.789320 ACPI: added table 1/32, length now 40
2294 08:43:35.792622 ACPI: * SSDT
2295 08:43:35.799106 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2296 08:43:35.802001 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2297 08:43:35.809087 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2298 08:43:35.812088 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2299 08:43:35.818777 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2300 08:43:35.822340 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2301 08:43:35.828960 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2302 08:43:35.835784 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2303 08:43:35.839162 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2304 08:43:35.842047 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2305 08:43:35.848714 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2306 08:43:35.855483 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2307 08:43:35.858854 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2308 08:43:35.862208 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2309 08:43:35.871787 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2310 08:43:35.875330 PS2K: Passing 80 keymaps to kernel
2311 08:43:35.882208 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2312 08:43:35.888472 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2313 08:43:35.895127 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2314 08:43:35.901571 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2315 08:43:35.908521 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2316 08:43:35.914949 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2317 08:43:35.918265 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2318 08:43:35.925220 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2319 08:43:35.931574 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2320 08:43:35.938482 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2321 08:43:35.941904 ACPI: added table 2/32, length now 44
2322 08:43:35.945103 ACPI: * MCFG
2323 08:43:35.948313 ACPI: added table 3/32, length now 48
2324 08:43:35.948400 ACPI: * TPM2
2325 08:43:35.951568 TPM2 log created at 0x7685d000
2326 08:43:35.958159 ACPI: added table 4/32, length now 52
2327 08:43:35.958246 ACPI: * LPIT
2328 08:43:35.961720 ACPI: added table 5/32, length now 56
2329 08:43:35.964876 ACPI: * MADT
2330 08:43:35.964960 SCI is IRQ9
2331 08:43:35.968086 ACPI: added table 6/32, length now 60
2332 08:43:35.971564 cmd_reg from pmc_make_ipc_cmd 1052838
2333 08:43:35.978348 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2334 08:43:35.984913 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2335 08:43:35.991687 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2336 08:43:35.995184 PMC CrashLog size in discovery mode: 0xC00
2337 08:43:35.997864 cpu crashlog bar addr: 0x80640000
2338 08:43:36.001237 cpu discovery table offset: 0x6030
2339 08:43:36.007922 cpu_crashlog_discovery_table buffer count: 0x3
2340 08:43:36.014879 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2341 08:43:36.021329 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2342 08:43:36.027638 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2343 08:43:36.031148 PMC crashLog size in discovery mode : 0xC00
2344 08:43:36.037771 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2345 08:43:36.044784 discover mode PMC crashlog size adjusted to: 0x200
2346 08:43:36.051269 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2347 08:43:36.054566 discover mode PMC crashlog size adjusted to: 0x0
2348 08:43:36.057846 m_cpu_crashLog_size : 0x3480 bytes
2349 08:43:36.061085 CPU crashLog present.
2350 08:43:36.064585 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2351 08:43:36.074223 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2352 08:43:36.074347 current = 76876550
2353 08:43:36.077787 ACPI: * DMAR
2354 08:43:36.081056 ACPI: added table 7/32, length now 64
2355 08:43:36.084601 ACPI: added table 8/32, length now 68
2356 08:43:36.084743 ACPI: * HPET
2357 08:43:36.090997 ACPI: added table 9/32, length now 72
2358 08:43:36.091125 ACPI: done.
2359 08:43:36.094503 ACPI tables: 38528 bytes.
2360 08:43:36.097848 smbios_write_tables: 76857000
2361 08:43:36.101306 EC returned error result code 3
2362 08:43:36.104849 Couldn't obtain OEM name from CBI
2363 08:43:36.107995 Create SMBIOS type 16
2364 08:43:36.108127 Create SMBIOS type 17
2365 08:43:36.111245 Create SMBIOS type 20
2366 08:43:36.114512 GENERIC: 0.0 (WIFI Device)
2367 08:43:36.118039 SMBIOS tables: 2156 bytes.
2368 08:43:36.121578 Writing table forward entry at 0x00000500
2369 08:43:36.128165 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2370 08:43:36.131316 Writing coreboot table at 0x76891000
2371 08:43:36.138055 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2372 08:43:36.141408 1. 0000000000001000-000000000009ffff: RAM
2373 08:43:36.144702 2. 00000000000a0000-00000000000fffff: RESERVED
2374 08:43:36.151376 3. 0000000000100000-0000000076856fff: RAM
2375 08:43:36.158019 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2376 08:43:36.161185 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2377 08:43:36.167895 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2378 08:43:36.171325 7. 0000000077000000-00000000803fffff: RESERVED
2379 08:43:36.177550 8. 00000000c0000000-00000000cfffffff: RESERVED
2380 08:43:36.181051 9. 00000000f8000000-00000000f9ffffff: RESERVED
2381 08:43:36.187802 10. 00000000fb000000-00000000fb000fff: RESERVED
2382 08:43:36.190900 11. 00000000fc800000-00000000fe7fffff: RESERVED
2383 08:43:36.194596 12. 00000000feb00000-00000000feb7ffff: RESERVED
2384 08:43:36.201036 13. 00000000fec00000-00000000fecfffff: RESERVED
2385 08:43:36.204343 14. 00000000fed40000-00000000fed6ffff: RESERVED
2386 08:43:36.211925 15. 00000000fed80000-00000000fed87fff: RESERVED
2387 08:43:36.214293 16. 00000000fed90000-00000000fed92fff: RESERVED
2388 08:43:36.221151 17. 00000000feda0000-00000000feda1fff: RESERVED
2389 08:43:36.224396 18. 00000000fedc0000-00000000feddffff: RESERVED
2390 08:43:36.227683 19. 0000000100000000-000000027fbfffff: RAM
2391 08:43:36.231324 Passing 4 GPIOs to payload:
2392 08:43:36.237561 NAME | PORT | POLARITY | VALUE
2393 08:43:36.241099 lid | undefined | high | high
2394 08:43:36.247435 power | undefined | high | low
2395 08:43:36.254269 oprom | undefined | high | low
2396 08:43:36.257598 EC in RW | 0x00000151 | high | high
2397 08:43:36.260675 Board ID: 3
2398 08:43:36.260771 FW config: 0x131
2399 08:43:36.267412 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 572f
2400 08:43:36.271008 coreboot table: 1748 bytes.
2401 08:43:36.274288 IMD ROOT 0. 0x76fff000 0x00001000
2402 08:43:36.277619 IMD SMALL 1. 0x76ffe000 0x00001000
2403 08:43:36.280655 FSP MEMORY 2. 0x76afe000 0x00500000
2404 08:43:36.283847 CONSOLE 3. 0x76ade000 0x00020000
2405 08:43:36.287354 RW MCACHE 4. 0x76add000 0x0000043c
2406 08:43:36.293810 RO MCACHE 5. 0x76adc000 0x00000fd8
2407 08:43:36.297220 FMAP 6. 0x76adb000 0x0000064a
2408 08:43:36.300986 TIME STAMP 7. 0x76ada000 0x00000910
2409 08:43:36.303911 VBOOT WORK 8. 0x76ac6000 0x00014000
2410 08:43:36.307514 MEM INFO 9. 0x76ac5000 0x000003b8
2411 08:43:36.310883 ROMSTG STCK10. 0x76ac4000 0x00001000
2412 08:43:36.314719 AFTER CAR 11. 0x76ab8000 0x0000c000
2413 08:43:36.317325 RAMSTAGE 12. 0x76a2e000 0x0008a000
2414 08:43:36.323766 ACPI BERT 13. 0x76a1e000 0x00010000
2415 08:43:36.327391 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2416 08:43:36.330576 REFCODE 15. 0x769ae000 0x0006f000
2417 08:43:36.333859 SMM BACKUP 16. 0x7699e000 0x00010000
2418 08:43:36.337799 IGD OPREGION17. 0x76999000 0x00004203
2419 08:43:36.340693 RAMOOPS 18. 0x76899000 0x00100000
2420 08:43:36.344210 COREBOOT 19. 0x76891000 0x00008000
2421 08:43:36.347173 ACPI 20. 0x7686d000 0x00024000
2422 08:43:36.353992 TPM2 TCGLOG21. 0x7685d000 0x00010000
2423 08:43:36.357087 PMC CRASHLOG22. 0x7685c000 0x00000c00
2424 08:43:36.361090 CPU CRASHLOG23. 0x76858000 0x00003480
2425 08:43:36.363788 SMBIOS 24. 0x76857000 0x00001000
2426 08:43:36.367449 IMD small region:
2427 08:43:36.370517 IMD ROOT 0. 0x76ffec00 0x00000400
2428 08:43:36.373903 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2429 08:43:36.377219 POWER STATE 2. 0x76ffeb80 0x00000044
2430 08:43:36.380633 ROMSTAGE 3. 0x76ffeb60 0x00000004
2431 08:43:36.383932 ACPI GNVS 4. 0x76ffeb00 0x00000048
2432 08:43:36.390678 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2433 08:43:36.393902 BS: BS_WRITE_TABLES run times (exec / console): 8 / 624 ms
2434 08:43:36.397230 MTRR: Physical address space:
2435 08:43:36.403956 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2436 08:43:36.410548 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2437 08:43:36.417383 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2438 08:43:36.424022 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2439 08:43:36.430173 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2440 08:43:36.436956 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2441 08:43:36.444098 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2442 08:43:36.447419 MTRR: Fixed MSR 0x250 0x0606060606060606
2443 08:43:36.450217 MTRR: Fixed MSR 0x258 0x0606060606060606
2444 08:43:36.453785 MTRR: Fixed MSR 0x259 0x0000000000000000
2445 08:43:36.457410 MTRR: Fixed MSR 0x268 0x0606060606060606
2446 08:43:36.463495 MTRR: Fixed MSR 0x269 0x0606060606060606
2447 08:43:36.467288 MTRR: Fixed MSR 0x26a 0x0606060606060606
2448 08:43:36.470155 MTRR: Fixed MSR 0x26b 0x0606060606060606
2449 08:43:36.473772 MTRR: Fixed MSR 0x26c 0x0606060606060606
2450 08:43:36.480190 MTRR: Fixed MSR 0x26d 0x0606060606060606
2451 08:43:36.483280 MTRR: Fixed MSR 0x26e 0x0606060606060606
2452 08:43:36.486602 MTRR: Fixed MSR 0x26f 0x0606060606060606
2453 08:43:36.490241 call enable_fixed_mtrr()
2454 08:43:36.493838 CPU physical address size: 39 bits
2455 08:43:36.500829 MTRR: default type WB/UC MTRR counts: 6/6.
2456 08:43:36.503855 MTRR: UC selected as default type.
2457 08:43:36.510132 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2458 08:43:36.513423 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2459 08:43:36.520302 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2460 08:43:36.526811 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2461 08:43:36.533723 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2462 08:43:36.540375 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2463 08:43:36.547194 MTRR: Fixed MSR 0x250 0x0606060606060606
2464 08:43:36.550368 MTRR: Fixed MSR 0x258 0x0606060606060606
2465 08:43:36.553544 MTRR: Fixed MSR 0x259 0x0000000000000000
2466 08:43:36.556852 MTRR: Fixed MSR 0x268 0x0606060606060606
2467 08:43:36.563484 MTRR: Fixed MSR 0x269 0x0606060606060606
2468 08:43:36.567031 MTRR: Fixed MSR 0x26a 0x0606060606060606
2469 08:43:36.570810 MTRR: Fixed MSR 0x26b 0x0606060606060606
2470 08:43:36.573788 MTRR: Fixed MSR 0x26c 0x0606060606060606
2471 08:43:36.576945 MTRR: Fixed MSR 0x26d 0x0606060606060606
2472 08:43:36.583555 MTRR: Fixed MSR 0x26e 0x0606060606060606
2473 08:43:36.587117 MTRR: Fixed MSR 0x26f 0x0606060606060606
2474 08:43:36.590166 MTRR: Fixed MSR 0x250 0x0606060606060606
2475 08:43:36.593484 MTRR: Fixed MSR 0x250 0x0606060606060606
2476 08:43:36.600100 MTRR: Fixed MSR 0x250 0x0606060606060606
2477 08:43:36.603167 MTRR: Fixed MSR 0x250 0x0606060606060606
2478 08:43:36.606740 MTRR: Fixed MSR 0x250 0x0606060606060606
2479 08:43:36.610601 MTRR: Fixed MSR 0x250 0x0606060606060606
2480 08:43:36.616765 MTRR: Fixed MSR 0x258 0x0606060606060606
2481 08:43:36.620346 MTRR: Fixed MSR 0x259 0x0000000000000000
2482 08:43:36.623525 MTRR: Fixed MSR 0x268 0x0606060606060606
2483 08:43:36.626805 MTRR: Fixed MSR 0x269 0x0606060606060606
2484 08:43:36.630062 MTRR: Fixed MSR 0x26a 0x0606060606060606
2485 08:43:36.636715 MTRR: Fixed MSR 0x26b 0x0606060606060606
2486 08:43:36.640105 MTRR: Fixed MSR 0x26c 0x0606060606060606
2487 08:43:36.643249 MTRR: Fixed MSR 0x26d 0x0606060606060606
2488 08:43:36.646530 MTRR: Fixed MSR 0x26e 0x0606060606060606
2489 08:43:36.653324 MTRR: Fixed MSR 0x26f 0x0606060606060606
2490 08:43:36.657171 MTRR: Fixed MSR 0x258 0x0606060606060606
2491 08:43:36.660148 call enable_fixed_mtrr()
2492 08:43:36.663399 MTRR: Fixed MSR 0x259 0x0000000000000000
2493 08:43:36.666488 MTRR: Fixed MSR 0x268 0x0606060606060606
2494 08:43:36.670122 MTRR: Fixed MSR 0x269 0x0606060606060606
2495 08:43:36.676511 MTRR: Fixed MSR 0x258 0x0606060606060606
2496 08:43:36.679894 MTRR: Fixed MSR 0x258 0x0606060606060606
2497 08:43:36.683085 MTRR: Fixed MSR 0x26a 0x0606060606060606
2498 08:43:36.686311 MTRR: Fixed MSR 0x26b 0x0606060606060606
2499 08:43:36.690122 MTRR: Fixed MSR 0x26c 0x0606060606060606
2500 08:43:36.696766 MTRR: Fixed MSR 0x26d 0x0606060606060606
2501 08:43:36.699883 MTRR: Fixed MSR 0x26e 0x0606060606060606
2502 08:43:36.703068 MTRR: Fixed MSR 0x26f 0x0606060606060606
2503 08:43:36.706589 MTRR: Fixed MSR 0x259 0x0000000000000000
2504 08:43:36.713172 MTRR: Fixed MSR 0x258 0x0606060606060606
2505 08:43:36.713260 call enable_fixed_mtrr()
2506 08:43:36.720260 CPU physical address size: 39 bits
2507 08:43:36.723143 CPU physical address size: 39 bits
2508 08:43:36.726269 MTRR: Fixed MSR 0x259 0x0000000000000000
2509 08:43:36.729953 MTRR: Fixed MSR 0x258 0x0606060606060606
2510 08:43:36.733243 MTRR: Fixed MSR 0x268 0x0606060606060606
2511 08:43:36.739675 MTRR: Fixed MSR 0x268 0x0606060606060606
2512 08:43:36.742752 MTRR: Fixed MSR 0x269 0x0606060606060606
2513 08:43:36.746408 MTRR: Fixed MSR 0x259 0x0000000000000000
2514 08:43:36.749432 MTRR: Fixed MSR 0x268 0x0606060606060606
2515 08:43:36.752736 MTRR: Fixed MSR 0x269 0x0606060606060606
2516 08:43:36.759544 MTRR: Fixed MSR 0x26a 0x0606060606060606
2517 08:43:36.762767 MTRR: Fixed MSR 0x26b 0x0606060606060606
2518 08:43:36.765965 MTRR: Fixed MSR 0x26c 0x0606060606060606
2519 08:43:36.769523 MTRR: Fixed MSR 0x26d 0x0606060606060606
2520 08:43:36.776047 MTRR: Fixed MSR 0x26e 0x0606060606060606
2521 08:43:36.779709 MTRR: Fixed MSR 0x26f 0x0606060606060606
2522 08:43:36.782834 MTRR: Fixed MSR 0x26a 0x0606060606060606
2523 08:43:36.786159 call enable_fixed_mtrr()
2524 08:43:36.789336 MTRR: Fixed MSR 0x26b 0x0606060606060606
2525 08:43:36.792352 MTRR: Fixed MSR 0x26c 0x0606060606060606
2526 08:43:36.799241 MTRR: Fixed MSR 0x26d 0x0606060606060606
2527 08:43:36.802516 MTRR: Fixed MSR 0x26e 0x0606060606060606
2528 08:43:36.805680 MTRR: Fixed MSR 0x26f 0x0606060606060606
2529 08:43:36.809143 CPU physical address size: 39 bits
2530 08:43:36.812474 call enable_fixed_mtrr()
2531 08:43:36.815554 call enable_fixed_mtrr()
2532 08:43:36.819430 CPU physical address size: 39 bits
2533 08:43:36.822475 MTRR: Fixed MSR 0x259 0x0000000000000000
2534 08:43:36.825719 MTRR: Fixed MSR 0x269 0x0606060606060606
2535 08:43:36.829063 MTRR: Fixed MSR 0x268 0x0606060606060606
2536 08:43:36.835544 MTRR: Fixed MSR 0x269 0x0606060606060606
2537 08:43:36.838758 CPU physical address size: 39 bits
2538 08:43:36.842345 MTRR: Fixed MSR 0x26a 0x0606060606060606
2539 08:43:36.845439 MTRR: Fixed MSR 0x26a 0x0606060606060606
2540 08:43:36.852128 MTRR: Fixed MSR 0x26b 0x0606060606060606
2541 08:43:36.855366 MTRR: Fixed MSR 0x26c 0x0606060606060606
2542 08:43:36.858818 MTRR: Fixed MSR 0x26d 0x0606060606060606
2543 08:43:36.861928 MTRR: Fixed MSR 0x26e 0x0606060606060606
2544 08:43:36.865304 MTRR: Fixed MSR 0x26f 0x0606060606060606
2545 08:43:36.872138 MTRR: Fixed MSR 0x26b 0x0606060606060606
2546 08:43:36.875077 call enable_fixed_mtrr()
2547 08:43:36.878362 MTRR: Fixed MSR 0x26c 0x0606060606060606
2548 08:43:36.882197 MTRR: Fixed MSR 0x26d 0x0606060606060606
2549 08:43:36.885432 MTRR: Fixed MSR 0x26e 0x0606060606060606
2550 08:43:36.891898 MTRR: Fixed MSR 0x26f 0x0606060606060606
2551 08:43:36.895231 CPU physical address size: 39 bits
2552 08:43:36.898669 call enable_fixed_mtrr()
2553 08:43:36.902104 CPU physical address size: 39 bits
2554 08:43:36.902233
2555 08:43:36.905346 MTRR check
2556 08:43:36.908453 Fixed MTRRs : Enabled
2557 08:43:36.908581 Variable MTRRs: Enabled
2558 08:43:36.908701
2559 08:43:36.915017 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2560 08:43:36.918137 Checking cr50 for pending updates
2561 08:43:36.930257 Reading cr50 TPM mode
2562 08:43:36.945663 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2563 08:43:36.955657 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2564 08:43:36.959110 Checking segment from ROM address 0xf96cbe6c
2565 08:43:36.962114 Checking segment from ROM address 0xf96cbe88
2566 08:43:36.968970 Loading segment from ROM address 0xf96cbe6c
2567 08:43:36.969067 code (compression=1)
2568 08:43:36.978857 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2569 08:43:36.985665 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2570 08:43:36.988705 using LZMA
2571 08:43:37.011730 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2572 08:43:37.018114 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2573 08:43:37.026641 Loading segment from ROM address 0xf96cbe88
2574 08:43:37.029760 Entry Point 0x30000000
2575 08:43:37.029848 Loaded segments
2576 08:43:37.036347 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2577 08:43:37.043185 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2578 08:43:37.046579 Finalizing chipset.
2579 08:43:37.049842 apm_control: Finalizing SMM.
2580 08:43:37.049942 APMC done.
2581 08:43:37.053180 HECI: CSE device 16.1 is disabled
2582 08:43:37.056624 HECI: CSE device 16.2 is disabled
2583 08:43:37.060245 HECI: CSE device 16.3 is disabled
2584 08:43:37.063441 HECI: CSE device 16.4 is disabled
2585 08:43:37.066395 HECI: CSE device 16.5 is disabled
2586 08:43:37.069679 HECI: Sending End-of-Post
2587 08:43:37.077916 CSE: EOP requested action: continue boot
2588 08:43:37.081761 CSE EOP successful, continuing boot
2589 08:43:37.088033 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2590 08:43:37.091537 mp_park_aps done after 0 msecs.
2591 08:43:37.095165 Jumping to boot code at 0x30000000(0x76891000)
2592 08:43:37.104734 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2593 08:43:37.109426
2594 08:43:37.109531
2595 08:43:37.109630
2596 08:43:37.112307 Starting depthcharge on Volmar...
2597 08:43:37.112445
2598 08:43:37.113108 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2599 08:43:37.113312 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2600 08:43:37.113450 Setting prompt string to ['brya:']
2601 08:43:37.113592 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2602 08:43:37.119194 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2603 08:43:37.119326
2604 08:43:37.125405 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2605 08:43:37.125534
2606 08:43:37.132317 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2607 08:43:37.132407
2608 08:43:37.135590 configure_storage: Failed to remap 1C:2
2609 08:43:37.135701
2610 08:43:37.135798 Wipe memory regions:
2611 08:43:37.138826
2612 08:43:37.142229 [0x00000000001000, 0x000000000a0000)
2613 08:43:37.142308
2614 08:43:37.145268 [0x00000000100000, 0x00000030000000)
2615 08:43:37.255158
2616 08:43:37.258243 [0x00000032668e60, 0x00000076857000)
2617 08:43:37.409993
2618 08:43:37.413022 [0x00000100000000, 0x0000027fc00000)
2619 08:43:38.266937
2620 08:43:38.270304 ec_init: CrosEC protocol v3 supported (256, 256)
2621 08:43:38.880880
2622 08:43:38.881056 R8152: Initializing
2623 08:43:38.881158
2624 08:43:38.883995 Version 9 (ocp_data = 6010)
2625 08:43:38.884101
2626 08:43:38.887326 R8152: Done initializing
2627 08:43:38.887463
2628 08:43:38.890750 Adding net device
2629 08:43:39.191375
2630 08:43:39.194473 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2631 08:43:39.194572
2632 08:43:39.194641
2633 08:43:39.194706
2634 08:43:39.194984 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2636 08:43:39.295305 brya: tftpboot 192.168.201.1 11220721/tftp-deploy-lx_8w1eq/kernel/bzImage 11220721/tftp-deploy-lx_8w1eq/kernel/cmdline 11220721/tftp-deploy-lx_8w1eq/ramdisk/ramdisk.cpio.gz
2637 08:43:39.295467 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2638 08:43:39.295552 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2639 08:43:39.299544 tftpboot 192.168.201.1 11220721/tftp-deploy-lx_8w1eq/kernel/bzIploy-lx_8w1eq/kernel/cmdline 11220721/tftp-deploy-lx_8w1eq/ramdisk/ramdisk.cpio.gz
2640 08:43:39.299674
2641 08:43:39.299774 Waiting for link
2642 08:43:39.502447
2643 08:43:39.502626 done.
2644 08:43:39.502734
2645 08:43:39.502837 MAC: 00:e0:4c:68:01:8f
2646 08:43:39.502941
2647 08:43:39.505710 Sending DHCP discover... done.
2648 08:43:39.505823
2649 08:43:39.509411 Waiting for reply... done.
2650 08:43:39.509526
2651 08:43:39.512536 Sending DHCP request... done.
2652 08:43:39.512645
2653 08:43:39.515699 Waiting for reply... done.
2654 08:43:39.515815
2655 08:43:39.519129 My ip is 192.168.201.28
2656 08:43:39.519258
2657 08:43:39.522258 The DHCP server ip is 192.168.201.1
2658 08:43:39.522388
2659 08:43:39.525754 TFTP server IP predefined by user: 192.168.201.1
2660 08:43:39.525886
2661 08:43:39.532303 Bootfile predefined by user: 11220721/tftp-deploy-lx_8w1eq/kernel/bzImage
2662 08:43:39.532427
2663 08:43:39.535514 Sending tftp read request... done.
2664 08:43:39.539437
2665 08:43:39.541957 Waiting for the transfer...
2666 08:43:39.542073
2667 08:43:39.804675 00000000 ################################################################
2668 08:43:39.804850
2669 08:43:40.052897 00080000 ################################################################
2670 08:43:40.053050
2671 08:43:40.295780 00100000 ################################################################
2672 08:43:40.295935
2673 08:43:40.541857 00180000 ################################################################
2674 08:43:40.542014
2675 08:43:40.790659 00200000 ################################################################
2676 08:43:40.790815
2677 08:43:41.040893 00280000 ################################################################
2678 08:43:41.041065
2679 08:43:41.293729 00300000 ################################################################
2680 08:43:41.293904
2681 08:43:41.541147 00380000 ################################################################
2682 08:43:41.541342
2683 08:43:41.783373 00400000 ################################################################
2684 08:43:41.783538
2685 08:43:42.021146 00480000 ################################################################
2686 08:43:42.021303
2687 08:43:42.276706 00500000 ################################################################
2688 08:43:42.276858
2689 08:43:42.560467 00580000 ################################################################
2690 08:43:42.560681
2691 08:43:42.842395 00600000 ################################################################
2692 08:43:42.842533
2693 08:43:43.126790 00680000 ################################################################
2694 08:43:43.126931
2695 08:43:43.401139 00700000 ################################################################
2696 08:43:43.401349
2697 08:43:43.410550 00780000 ### done.
2698 08:43:43.410729
2699 08:43:43.413620 The bootfile was 7884688 bytes long.
2700 08:43:43.413735
2701 08:43:43.416964 Sending tftp read request... done.
2702 08:43:43.417060
2703 08:43:43.420627 Waiting for the transfer...
2704 08:43:43.420745
2705 08:43:43.693607 00000000 ################################################################
2706 08:43:43.693755
2707 08:43:43.963050 00080000 ################################################################
2708 08:43:43.963230
2709 08:43:44.236993 00100000 ################################################################
2710 08:43:44.237134
2711 08:43:44.522420 00180000 ################################################################
2712 08:43:44.522562
2713 08:43:44.803527 00200000 ################################################################
2714 08:43:44.803691
2715 08:43:45.067405 00280000 ################################################################
2716 08:43:45.067548
2717 08:43:45.335667 00300000 ################################################################
2718 08:43:45.335807
2719 08:43:45.622622 00380000 ################################################################
2720 08:43:45.622792
2721 08:43:45.899319 00400000 ################################################################
2722 08:43:45.899506
2723 08:43:46.166717 00480000 ################################################################
2724 08:43:46.166847
2725 08:43:46.439461 00500000 ################################################################
2726 08:43:46.439667
2727 08:43:46.720544 00580000 ################################################################
2728 08:43:46.720691
2729 08:43:46.996482 00600000 ################################################################
2730 08:43:46.996728
2731 08:43:47.250070 00680000 ################################################################
2732 08:43:47.250280
2733 08:43:47.510322 00700000 ################################################################
2734 08:43:47.510532
2735 08:43:47.786439 00780000 ################################################################
2736 08:43:47.786590
2737 08:43:48.001537 00800000 #################################################### done.
2738 08:43:48.001697
2739 08:43:48.004818 Sending tftp read request... done.
2740 08:43:48.004904
2741 08:43:48.008433 Waiting for the transfer...
2742 08:43:48.008518
2743 08:43:48.008585 00000000 # done.
2744 08:43:48.008649
2745 08:43:48.018701 Command line loaded dynamically from TFTP file: 11220721/tftp-deploy-lx_8w1eq/kernel/cmdline
2746 08:43:48.018787
2747 08:43:48.031875 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2748 08:43:48.038393
2749 08:43:48.041737 Shutting down all USB controllers.
2750 08:43:48.041822
2751 08:43:48.041888 Removing current net device
2752 08:43:48.041950
2753 08:43:48.045155 Finalizing coreboot
2754 08:43:48.045240
2755 08:43:48.051310 Exiting depthcharge with code 4 at timestamp: 21190813
2756 08:43:48.051401
2757 08:43:48.051468
2758 08:43:48.051531 Starting kernel ...
2759 08:43:48.051590
2760 08:43:48.051650
2761 08:43:48.052012 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2762 08:43:48.052166 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2763 08:43:48.052275 Setting prompt string to ['Linux version [0-9]']
2764 08:43:48.052375 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2765 08:43:48.052478 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2767 08:48:18.052425 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2769 08:48:18.052634 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2771 08:48:18.052840 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2774 08:48:18.053096 end: 2 depthcharge-action (duration 00:05:00) [common]
2776 08:48:18.053313 Cleaning after the job
2777 08:48:18.053408 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220721/tftp-deploy-lx_8w1eq/ramdisk
2778 08:48:18.054541 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220721/tftp-deploy-lx_8w1eq/kernel
2779 08:48:18.055507 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220721/tftp-deploy-lx_8w1eq/modules
2780 08:48:18.055829 start: 5.1 power-off (timeout 00:00:30) [common]
2781 08:48:18.055995 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=off'
2782 08:48:18.131591 >> Command sent successfully.
2783 08:48:18.133993 Returned 0 in 0 seconds
2784 08:48:18.234413 end: 5.1 power-off (duration 00:00:00) [common]
2786 08:48:18.234779 start: 5.2 read-feedback (timeout 00:10:00) [common]
2787 08:48:18.235051 Listened to connection for namespace 'common' for up to 1s
2789 08:48:18.235479 Listened to connection for namespace 'common' for up to 1s
2790 08:48:19.235993 Finalising connection for namespace 'common'
2791 08:48:19.236245 Disconnecting from shell: Finalise
2792 08:48:19.236383
2793 08:48:19.336825 end: 5.2 read-feedback (duration 00:00:01) [common]
2794 08:48:19.337075 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11220721
2795 08:48:19.359367 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11220721
2796 08:48:19.359573 JobError: Your job cannot terminate cleanly.