Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 08:43:02.212694 lava-dispatcher, installed at version: 2023.05.1
2 08:43:02.212905 start: 0 validate
3 08:43:02.213029 Start time: 2023-08-07 08:43:02.213020+00:00 (UTC)
4 08:43:02.213144 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:43:02.213272 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 08:43:02.480578 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:43:02.480772 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:43:02.756501 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:43:02.756756 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 08:43:07.870873 validate duration: 5.66
12 08:43:07.872262 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 08:43:07.872817 start: 1.1 download-retry (timeout 00:10:00) [common]
14 08:43:07.873312 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 08:43:07.873965 Not decompressing ramdisk as can be used compressed.
16 08:43:07.874443 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 08:43:07.874864 saving as /var/lib/lava/dispatcher/tmp/11220723/tftp-deploy-t25zlu2g/ramdisk/rootfs.cpio.gz
18 08:43:07.875218 total size: 8418130 (8MB)
19 08:43:08.396881 progress 0% (0MB)
20 08:43:08.402845 progress 5% (0MB)
21 08:43:08.405315 progress 10% (0MB)
22 08:43:08.407604 progress 15% (1MB)
23 08:43:08.409878 progress 20% (1MB)
24 08:43:08.412164 progress 25% (2MB)
25 08:43:08.414388 progress 30% (2MB)
26 08:43:08.416487 progress 35% (2MB)
27 08:43:08.418714 progress 40% (3MB)
28 08:43:08.420981 progress 45% (3MB)
29 08:43:08.423195 progress 50% (4MB)
30 08:43:08.425450 progress 55% (4MB)
31 08:43:08.427673 progress 60% (4MB)
32 08:43:08.429684 progress 65% (5MB)
33 08:43:08.431903 progress 70% (5MB)
34 08:43:08.434151 progress 75% (6MB)
35 08:43:08.436323 progress 80% (6MB)
36 08:43:08.438556 progress 85% (6MB)
37 08:43:08.440768 progress 90% (7MB)
38 08:43:08.442944 progress 95% (7MB)
39 08:43:08.444984 progress 100% (8MB)
40 08:43:08.445211 8MB downloaded in 0.57s (14.08MB/s)
41 08:43:08.445358 end: 1.1.1 http-download (duration 00:00:01) [common]
43 08:43:08.445596 end: 1.1 download-retry (duration 00:00:01) [common]
44 08:43:08.445682 start: 1.2 download-retry (timeout 00:09:59) [common]
45 08:43:08.445767 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 08:43:08.445906 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 08:43:08.445976 saving as /var/lib/lava/dispatcher/tmp/11220723/tftp-deploy-t25zlu2g/kernel/bzImage
48 08:43:08.446037 total size: 7884688 (7MB)
49 08:43:08.446095 No compression specified
50 08:43:08.447295 progress 0% (0MB)
51 08:43:08.449435 progress 5% (0MB)
52 08:43:08.451548 progress 10% (0MB)
53 08:43:08.453697 progress 15% (1MB)
54 08:43:08.455831 progress 20% (1MB)
55 08:43:08.457943 progress 25% (1MB)
56 08:43:08.460384 progress 30% (2MB)
57 08:43:08.462471 progress 35% (2MB)
58 08:43:08.464894 progress 40% (3MB)
59 08:43:08.466990 progress 45% (3MB)
60 08:43:08.469212 progress 50% (3MB)
61 08:43:08.471314 progress 55% (4MB)
62 08:43:08.473441 progress 60% (4MB)
63 08:43:08.475529 progress 65% (4MB)
64 08:43:08.477565 progress 70% (5MB)
65 08:43:08.479848 progress 75% (5MB)
66 08:43:08.481985 progress 80% (6MB)
67 08:43:08.484125 progress 85% (6MB)
68 08:43:08.486282 progress 90% (6MB)
69 08:43:08.488379 progress 95% (7MB)
70 08:43:08.490412 progress 100% (7MB)
71 08:43:08.490595 7MB downloaded in 0.04s (168.77MB/s)
72 08:43:08.490739 end: 1.2.1 http-download (duration 00:00:00) [common]
74 08:43:08.491022 end: 1.2 download-retry (duration 00:00:00) [common]
75 08:43:08.491171 start: 1.3 download-retry (timeout 00:09:59) [common]
76 08:43:08.491260 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 08:43:08.491421 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 08:43:08.491518 saving as /var/lib/lava/dispatcher/tmp/11220723/tftp-deploy-t25zlu2g/modules/modules.tar
79 08:43:08.491578 total size: 250852 (0MB)
80 08:43:08.491638 Using unxz to decompress xz
81 08:43:08.495861 progress 13% (0MB)
82 08:43:08.496262 progress 26% (0MB)
83 08:43:08.496496 progress 39% (0MB)
84 08:43:08.498096 progress 52% (0MB)
85 08:43:08.499967 progress 65% (0MB)
86 08:43:08.501976 progress 78% (0MB)
87 08:43:08.503965 progress 91% (0MB)
88 08:43:08.505846 progress 100% (0MB)
89 08:43:08.511461 0MB downloaded in 0.02s (12.04MB/s)
90 08:43:08.511753 end: 1.3.1 http-download (duration 00:00:00) [common]
92 08:43:08.512027 end: 1.3 download-retry (duration 00:00:00) [common]
93 08:43:08.512130 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 08:43:08.512233 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 08:43:08.512317 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 08:43:08.512404 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 08:43:08.512618 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8
98 08:43:08.512753 makedir: /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin
99 08:43:08.512859 makedir: /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/tests
100 08:43:08.512959 makedir: /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/results
101 08:43:08.513072 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-add-keys
102 08:43:08.513219 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-add-sources
103 08:43:08.513352 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-background-process-start
104 08:43:08.513483 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-background-process-stop
105 08:43:08.513611 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-common-functions
106 08:43:08.513739 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-echo-ipv4
107 08:43:08.513869 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-install-packages
108 08:43:08.513995 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-installed-packages
109 08:43:08.514123 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-os-build
110 08:43:08.514251 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-probe-channel
111 08:43:08.514376 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-probe-ip
112 08:43:08.514502 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-target-ip
113 08:43:08.514628 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-target-mac
114 08:43:08.514754 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-target-storage
115 08:43:08.514886 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-test-case
116 08:43:08.515014 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-test-event
117 08:43:08.515141 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-test-feedback
118 08:43:08.515268 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-test-raise
119 08:43:08.515454 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-test-reference
120 08:43:08.515588 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-test-runner
121 08:43:08.515731 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-test-set
122 08:43:08.515862 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-test-shell
123 08:43:08.515997 Updating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-install-packages (oe)
124 08:43:08.516151 Updating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/bin/lava-installed-packages (oe)
125 08:43:08.516284 Creating /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/environment
126 08:43:08.516389 LAVA metadata
127 08:43:08.516466 - LAVA_JOB_ID=11220723
128 08:43:08.516533 - LAVA_DISPATCHER_IP=192.168.201.1
129 08:43:08.516637 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 08:43:08.516708 skipped lava-vland-overlay
131 08:43:08.516784 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 08:43:08.516870 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 08:43:08.516932 skipped lava-multinode-overlay
134 08:43:08.517006 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 08:43:08.517090 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 08:43:08.517168 Loading test definitions
137 08:43:08.517261 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 08:43:08.517334 Using /lava-11220723 at stage 0
139 08:43:08.517656 uuid=11220723_1.4.2.3.1 testdef=None
140 08:43:08.517743 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 08:43:08.517828 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 08:43:08.518378 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 08:43:08.518604 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 08:43:08.519260 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 08:43:08.519540 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 08:43:08.520172 runner path: /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/0/tests/0_dmesg test_uuid 11220723_1.4.2.3.1
149 08:43:08.520330 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 08:43:08.520561 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 08:43:08.520634 Using /lava-11220723 at stage 1
153 08:43:08.520941 uuid=11220723_1.4.2.3.5 testdef=None
154 08:43:08.521029 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 08:43:08.521114 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 08:43:08.521592 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 08:43:08.521813 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 08:43:08.522467 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 08:43:08.522697 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 08:43:08.523345 runner path: /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/1/tests/1_bootrr test_uuid 11220723_1.4.2.3.5
163 08:43:08.523550 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 08:43:08.523760 Creating lava-test-runner.conf files
166 08:43:08.523824 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/0 for stage 0
167 08:43:08.523916 - 0_dmesg
168 08:43:08.523994 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11220723/lava-overlay-zdltykc8/lava-11220723/1 for stage 1
169 08:43:08.524086 - 1_bootrr
170 08:43:08.524182 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 08:43:08.524267 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 08:43:08.532901 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 08:43:08.533009 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 08:43:08.533097 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 08:43:08.533183 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 08:43:08.533272 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 08:43:08.790890 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 08:43:08.791265 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 08:43:08.791432 extracting modules file /var/lib/lava/dispatcher/tmp/11220723/tftp-deploy-t25zlu2g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11220723/extract-overlay-ramdisk-8qjv0nim/ramdisk
180 08:43:08.805094 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 08:43:08.805273 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 08:43:08.805380 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11220723/compress-overlay-lak9bqr8/overlay-1.4.2.4.tar.gz to ramdisk
183 08:43:08.805459 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11220723/compress-overlay-lak9bqr8/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11220723/extract-overlay-ramdisk-8qjv0nim/ramdisk
184 08:43:08.814772 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 08:43:08.814918 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 08:43:08.815020 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 08:43:08.815113 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 08:43:08.815200 Building ramdisk /var/lib/lava/dispatcher/tmp/11220723/extract-overlay-ramdisk-8qjv0nim/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11220723/extract-overlay-ramdisk-8qjv0nim/ramdisk
189 08:43:08.971146 >> 49788 blocks
190 08:43:09.821778 rename /var/lib/lava/dispatcher/tmp/11220723/extract-overlay-ramdisk-8qjv0nim/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11220723/tftp-deploy-t25zlu2g/ramdisk/ramdisk.cpio.gz
191 08:43:09.822263 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 08:43:09.822404 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 08:43:09.822525 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 08:43:09.822636 No mkimage arch provided, not using FIT.
195 08:43:09.822759 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 08:43:09.822867 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 08:43:09.823021 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 08:43:09.823160 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 08:43:09.823279 No LXC device requested
200 08:43:09.823427 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 08:43:09.823579 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 08:43:09.823679 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 08:43:09.823766 Checking files for TFTP limit of 4294967296 bytes.
204 08:43:09.824202 end: 1 tftp-deploy (duration 00:00:02) [common]
205 08:43:09.824320 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 08:43:09.824452 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 08:43:09.824619 substitutions:
208 08:43:09.824694 - {DTB}: None
209 08:43:09.824796 - {INITRD}: 11220723/tftp-deploy-t25zlu2g/ramdisk/ramdisk.cpio.gz
210 08:43:09.824895 - {KERNEL}: 11220723/tftp-deploy-t25zlu2g/kernel/bzImage
211 08:43:09.824992 - {LAVA_MAC}: None
212 08:43:09.825088 - {PRESEED_CONFIG}: None
213 08:43:09.825183 - {PRESEED_LOCAL}: None
214 08:43:09.825278 - {RAMDISK}: 11220723/tftp-deploy-t25zlu2g/ramdisk/ramdisk.cpio.gz
215 08:43:09.825375 - {ROOT_PART}: None
216 08:43:09.825470 - {ROOT}: None
217 08:43:09.825564 - {SERVER_IP}: 192.168.201.1
218 08:43:09.825658 - {TEE}: None
219 08:43:09.825751 Parsed boot commands:
220 08:43:09.825846 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 08:43:09.826071 Parsed boot commands: tftpboot 192.168.201.1 11220723/tftp-deploy-t25zlu2g/kernel/bzImage 11220723/tftp-deploy-t25zlu2g/kernel/cmdline 11220723/tftp-deploy-t25zlu2g/ramdisk/ramdisk.cpio.gz
222 08:43:09.826195 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 08:43:09.826324 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 08:43:09.826462 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 08:43:09.826592 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 08:43:09.826703 Not connected, no need to disconnect.
227 08:43:09.826822 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 08:43:09.826951 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 08:43:09.827058 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-1'
230 08:43:09.831568 Setting prompt string to ['lava-test: # ']
231 08:43:09.831982 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 08:43:09.832109 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 08:43:09.832243 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 08:43:09.832358 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 08:43:09.832597 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
236 08:43:14.954774 >> Command sent successfully.
237 08:43:14.957472 Returned 0 in 5 seconds
238 08:43:15.057888 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 08:43:15.058222 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 08:43:15.058328 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 08:43:15.058420 Setting prompt string to 'Starting depthcharge on Helios...'
243 08:43:15.058492 Changing prompt to 'Starting depthcharge on Helios...'
244 08:43:15.058561 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
245 08:43:15.058830 [Enter `^Ec?' for help]
246 08:43:15.677256
247 08:43:15.677420
248 08:43:15.687135 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
249 08:43:15.690778 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
250 08:43:15.696877 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
251 08:43:15.700343 CPU: AES supported, TXT NOT supported, VT supported
252 08:43:15.707264 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
253 08:43:15.710319 PCH: device id 0284 (rev 00) is Cometlake-U Premium
254 08:43:15.716663 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
255 08:43:15.720110 VBOOT: Loading verstage.
256 08:43:15.723288 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 08:43:15.730322 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
258 08:43:15.736591 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 08:43:15.736689 CBFS @ c08000 size 3f8000
260 08:43:15.743152 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
261 08:43:15.746655 CBFS: Locating 'fallback/verstage'
262 08:43:15.749680 CBFS: Found @ offset 10fb80 size 1072c
263 08:43:15.753626
264 08:43:15.753711
265 08:43:15.763531 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
266 08:43:15.778102 Probing TPM: . done!
267 08:43:15.781315 TPM ready after 0 ms
268 08:43:15.784545 Connected to device vid:did:rid of 1ae0:0028:00
269 08:43:15.794583 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
270 08:43:15.798517 Initialized TPM device CR50 revision 0
271 08:43:15.837017 tlcl_send_startup: Startup return code is 0
272 08:43:15.837163 TPM: setup succeeded
273 08:43:15.849629 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
274 08:43:15.853835 Chrome EC: UHEPI supported
275 08:43:15.856551 Phase 1
276 08:43:15.859942 FMAP: area GBB found @ c05000 (12288 bytes)
277 08:43:15.866503 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 08:43:15.870069 Phase 2
279 08:43:15.870155 Phase 3
280 08:43:15.873351 FMAP: area GBB found @ c05000 (12288 bytes)
281 08:43:15.880192 VB2:vb2_report_dev_firmware() This is developer signed firmware
282 08:43:15.886747 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
283 08:43:15.889562 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
284 08:43:15.896321 VB2:vb2_verify_keyblock() Checking keyblock signature...
285 08:43:15.912242 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
286 08:43:15.915559 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
287 08:43:15.922443 VB2:vb2_verify_fw_preamble() Verifying preamble.
288 08:43:15.926462 Phase 4
289 08:43:15.929798 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
290 08:43:15.936212 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
291 08:43:16.116227 VB2:vb2_rsa_verify_digest() Digest check failed!
292 08:43:16.122817 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
293 08:43:16.122968 Saving nvdata
294 08:43:16.126233 Reboot requested (10020007)
295 08:43:16.129481 board_reset() called!
296 08:43:16.129565 full_reset() called!
297 08:43:20.643943
298 08:43:20.644465
299 08:43:20.653813 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 08:43:20.657338 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 08:43:20.663701 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 08:43:20.666677 CPU: AES supported, TXT NOT supported, VT supported
303 08:43:20.673028 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 08:43:20.679483 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 08:43:20.682944 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 08:43:20.686298 VBOOT: Loading verstage.
307 08:43:20.692852 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 08:43:20.695860 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 08:43:20.702538 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 08:43:20.702977 CBFS @ c08000 size 3f8000
311 08:43:20.709213 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 08:43:20.712827 CBFS: Locating 'fallback/verstage'
313 08:43:20.719540 CBFS: Found @ offset 10fb80 size 1072c
314 08:43:20.720059
315 08:43:20.720474
316 08:43:20.728770 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 08:43:20.744742 Probing TPM: . done!
318 08:43:20.748070 TPM ready after 0 ms
319 08:43:20.751319 Connected to device vid:did:rid of 1ae0:0028:00
320 08:43:20.762389 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
321 08:43:20.765313 Initialized TPM device CR50 revision 0
322 08:43:20.803922 tlcl_send_startup: Startup return code is 0
323 08:43:20.804424 TPM: setup succeeded
324 08:43:20.816576 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 08:43:20.820770 Chrome EC: UHEPI supported
326 08:43:20.823935 Phase 1
327 08:43:20.826973 FMAP: area GBB found @ c05000 (12288 bytes)
328 08:43:20.833529 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
329 08:43:20.840055 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
330 08:43:20.843491 Recovery requested (1009000e)
331 08:43:20.849526 Saving nvdata
332 08:43:20.855551 tlcl_extend: response is 0
333 08:43:20.864116 tlcl_extend: response is 0
334 08:43:20.871072 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 08:43:20.874345 CBFS @ c08000 size 3f8000
336 08:43:20.880951 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 08:43:20.884196 CBFS: Locating 'fallback/romstage'
338 08:43:20.887543 CBFS: Found @ offset 80 size 145fc
339 08:43:20.891023 Accumulated console time in verstage 99 ms
340 08:43:20.891585
341 08:43:20.894105
342 08:43:20.904046 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
343 08:43:20.910521 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
344 08:43:20.913465 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 08:43:20.919967 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 08:43:20.923072 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
347 08:43:20.926749 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 08:43:20.930509 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
349 08:43:20.933432 TCO_STS: 0000 0000
350 08:43:20.937170 GEN_PMCON: e0015238 00000200
351 08:43:20.940744 GBLRST_CAUSE: 00000000 00000000
352 08:43:20.943654 prev_sleep_state 5
353 08:43:20.946506 Boot Count incremented to 60106
354 08:43:20.950292 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 08:43:20.953030 CBFS @ c08000 size 3f8000
356 08:43:20.959923 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 08:43:20.962879 CBFS: Locating 'fspm.bin'
358 08:43:20.966516 CBFS: Found @ offset 5ffc0 size 71000
359 08:43:20.969420 Chrome EC: UHEPI supported
360 08:43:20.975952 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
361 08:43:20.980828 Probing TPM: done!
362 08:43:20.987670 Connected to device vid:did:rid of 1ae0:0028:00
363 08:43:20.997559 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
364 08:43:21.003050 Initialized TPM device CR50 revision 0
365 08:43:21.012234 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
366 08:43:21.022680 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
367 08:43:21.023169 MRC cache found, size 1948
368 08:43:21.025311 bootmode is set to: 2
369 08:43:21.028948 PRMRR disabled by config.
370 08:43:21.031870 SPD INDEX = 1
371 08:43:21.035279 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 08:43:21.038595 CBFS @ c08000 size 3f8000
373 08:43:21.045108 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 08:43:21.045614 CBFS: Locating 'spd.bin'
375 08:43:21.051800 CBFS: Found @ offset 5fb80 size 400
376 08:43:21.052228 SPD: module type is LPDDR3
377 08:43:21.054986 SPD: module part is
378 08:43:21.061974 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
379 08:43:21.064768 SPD: device width 4 bits, bus width 8 bits
380 08:43:21.067752 SPD: module size is 4096 MB (per channel)
381 08:43:21.074804 memory slot: 0 configuration done.
382 08:43:21.077876 memory slot: 2 configuration done.
383 08:43:21.126580 CBMEM:
384 08:43:21.130210 IMD: root @ 99fff000 254 entries.
385 08:43:21.133594 IMD: root @ 99ffec00 62 entries.
386 08:43:21.136289 External stage cache:
387 08:43:21.139595 IMD: root @ 9abff000 254 entries.
388 08:43:21.143145 IMD: root @ 9abfec00 62 entries.
389 08:43:21.149727 Chrome EC: clear events_b mask to 0x0000000020004000
390 08:43:21.162432 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 08:43:21.172920 tlcl_write: response is 0
392 08:43:21.184545 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 08:43:21.191438 MRC: TPM MRC hash updated successfully.
394 08:43:21.192033 2 DIMMs found
395 08:43:21.194934 SMM Memory Map
396 08:43:21.198010 SMRAM : 0x9a000000 0x1000000
397 08:43:21.201748 Subregion 0: 0x9a000000 0xa00000
398 08:43:21.204366 Subregion 1: 0x9aa00000 0x200000
399 08:43:21.207863 Subregion 2: 0x9ac00000 0x400000
400 08:43:21.210796 top_of_ram = 0x9a000000
401 08:43:21.214167 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
402 08:43:21.220854 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
403 08:43:21.224610 MTRR Range: Start=ff000000 End=0 (Size 1000000)
404 08:43:21.230634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 08:43:21.234310 CBFS @ c08000 size 3f8000
406 08:43:21.237390 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 08:43:21.243905 CBFS: Locating 'fallback/postcar'
408 08:43:21.247516 CBFS: Found @ offset 107000 size 4b44
409 08:43:21.253724 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 08:43:21.263714 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 08:43:21.267288 Processing 180 relocs. Offset value of 0x97c0c000
412 08:43:21.275323 Accumulated console time in romstage 286 ms
413 08:43:21.275838
414 08:43:21.276176
415 08:43:21.285101 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 08:43:21.291874 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 08:43:21.295124 CBFS @ c08000 size 3f8000
418 08:43:21.301758 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 08:43:21.304623 CBFS: Locating 'fallback/ramstage'
420 08:43:21.308417 CBFS: Found @ offset 43380 size 1b9e8
421 08:43:21.314585 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 08:43:21.347213 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 08:43:21.354224 Processing 3976 relocs. Offset value of 0x98db0000
424 08:43:21.356886 Accumulated console time in postcar 52 ms
425 08:43:21.357317
426 08:43:21.357657
427 08:43:21.367081 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
428 08:43:21.373278 FMAP: area RO_VPD found @ c00000 (16384 bytes)
429 08:43:21.376467 WARNING: RO_VPD is uninitialized or empty.
430 08:43:21.379912 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 08:43:21.386407 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 08:43:21.386938 Normal boot.
433 08:43:21.393170 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
434 08:43:21.396482 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 08:43:21.399465 CBFS @ c08000 size 3f8000
436 08:43:21.406216 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 08:43:21.409516 CBFS: Locating 'cpu_microcode_blob.bin'
438 08:43:21.412955 CBFS: Found @ offset 14700 size 2ec00
439 08:43:21.416621 microcode: sig=0x806ec pf=0x4 revision=0xc9
440 08:43:21.419674 Skip microcode update
441 08:43:21.426397 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 08:43:21.429472 CBFS @ c08000 size 3f8000
443 08:43:21.432520 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 08:43:21.435623 CBFS: Locating 'fsps.bin'
445 08:43:21.439165 CBFS: Found @ offset d1fc0 size 35000
446 08:43:21.466153 Detected 4 core, 8 thread CPU.
447 08:43:21.468765 Setting up SMI for CPU
448 08:43:21.472302 IED base = 0x9ac00000
449 08:43:21.475345 IED size = 0x00400000
450 08:43:21.475930 Will perform SMM setup.
451 08:43:21.481687 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 08:43:21.488479 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 08:43:21.494923 Processing 16 relocs. Offset value of 0x00030000
454 08:43:21.495355 Attempting to start 7 APs
455 08:43:21.501585 Waiting for 10ms after sending INIT.
456 08:43:21.515026 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
457 08:43:21.515570 done.
458 08:43:21.519040 AP: slot 7 apic_id 6.
459 08:43:21.521533 AP: slot 2 apic_id 7.
460 08:43:21.522050 AP: slot 4 apic_id 3.
461 08:43:21.524625 AP: slot 1 apic_id 2.
462 08:43:21.528051 AP: slot 6 apic_id 5.
463 08:43:21.531573 AP: slot 5 apic_id 4.
464 08:43:21.534857 Waiting for 2nd SIPI to complete...done.
465 08:43:21.541630 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 08:43:21.548128 Processing 13 relocs. Offset value of 0x00038000
467 08:43:21.554449 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 08:43:21.558137 Installing SMM handler to 0x9a000000
469 08:43:21.564769 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 08:43:21.570888 Processing 658 relocs. Offset value of 0x9a010000
471 08:43:21.577751 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 08:43:21.580811 Processing 13 relocs. Offset value of 0x9a008000
473 08:43:21.587531 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 08:43:21.594246 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 08:43:21.600685 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 08:43:21.603953 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 08:43:21.610429 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 08:43:21.617079 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 08:43:21.623621 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 08:43:21.630411 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 08:43:21.633196 Clearing SMI status registers
482 08:43:21.633623 SMI_STS: PM1
483 08:43:21.636730 PM1_STS: PWRBTN
484 08:43:21.637155 TCO_STS: SECOND_TO
485 08:43:21.640059 New SMBASE 0x9a000000
486 08:43:21.643312 In relocation handler: CPU 0
487 08:43:21.646267 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 08:43:21.652774 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 08:43:21.653199 Relocation complete.
490 08:43:21.656045 New SMBASE 0x99fff400
491 08:43:21.659226 In relocation handler: CPU 3
492 08:43:21.662975 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
493 08:43:21.669420 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 08:43:21.669915 Relocation complete.
495 08:43:21.672763 New SMBASE 0x99fff800
496 08:43:21.675804 In relocation handler: CPU 2
497 08:43:21.679394 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
498 08:43:21.685486 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 08:43:21.686026 Relocation complete.
500 08:43:21.689001 New SMBASE 0x99ffe400
501 08:43:21.692366 In relocation handler: CPU 7
502 08:43:21.695498 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
503 08:43:21.702298 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 08:43:21.702824 Relocation complete.
505 08:43:21.705240 New SMBASE 0x99fff000
506 08:43:21.708536 In relocation handler: CPU 4
507 08:43:21.711860 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
508 08:43:21.718576 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 08:43:21.719135 Relocation complete.
510 08:43:21.721768 New SMBASE 0x99fffc00
511 08:43:21.725080 In relocation handler: CPU 1
512 08:43:21.728391 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
513 08:43:21.735212 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 08:43:21.735803 Relocation complete.
515 08:43:21.738517 New SMBASE 0x99ffec00
516 08:43:21.741445 In relocation handler: CPU 5
517 08:43:21.744882 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
518 08:43:21.751603 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 08:43:21.752035 Relocation complete.
520 08:43:21.755000 New SMBASE 0x99ffe800
521 08:43:21.758014 In relocation handler: CPU 6
522 08:43:21.761279 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
523 08:43:21.767601 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 08:43:21.768101 Relocation complete.
525 08:43:21.770894 Initializing CPU #0
526 08:43:21.774513 CPU: vendor Intel device 806ec
527 08:43:21.777888 CPU: family 06, model 8e, stepping 0c
528 08:43:21.780748 Clearing out pending MCEs
529 08:43:21.784355 Setting up local APIC...
530 08:43:21.784871 apic_id: 0x00 done.
531 08:43:21.788126 Turbo is available but hidden
532 08:43:21.790822 Turbo is available and visible
533 08:43:21.794144 VMX status: enabled
534 08:43:21.797557 IA32_FEATURE_CONTROL status: locked
535 08:43:21.800657 Skip microcode update
536 08:43:21.801085 CPU #0 initialized
537 08:43:21.804112 Initializing CPU #3
538 08:43:21.807064 Initializing CPU #7
539 08:43:21.807599 Initializing CPU #6
540 08:43:21.810889 Initializing CPU #5
541 08:43:21.813576 CPU: vendor Intel device 806ec
542 08:43:21.817038 CPU: family 06, model 8e, stepping 0c
543 08:43:21.820543 Clearing out pending MCEs
544 08:43:21.820967 Initializing CPU #1
545 08:43:21.823566 Initializing CPU #4
546 08:43:21.826944 Initializing CPU #2
547 08:43:21.827409 CPU: vendor Intel device 806ec
548 08:43:21.833191 CPU: family 06, model 8e, stepping 0c
549 08:43:21.837020 CPU: vendor Intel device 806ec
550 08:43:21.839911 CPU: family 06, model 8e, stepping 0c
551 08:43:21.843048 Clearing out pending MCEs
552 08:43:21.843504 Clearing out pending MCEs
553 08:43:21.846507 Setting up local APIC...
554 08:43:21.850176 Setting up local APIC...
555 08:43:21.853105 CPU: vendor Intel device 806ec
556 08:43:21.856261 CPU: family 06, model 8e, stepping 0c
557 08:43:21.859697 CPU: vendor Intel device 806ec
558 08:43:21.863555 CPU: family 06, model 8e, stepping 0c
559 08:43:21.866715 Clearing out pending MCEs
560 08:43:21.869646 Clearing out pending MCEs
561 08:43:21.870160 Setting up local APIC...
562 08:43:21.872617 Setting up local APIC...
563 08:43:21.876042 CPU: vendor Intel device 806ec
564 08:43:21.879489 CPU: family 06, model 8e, stepping 0c
565 08:43:21.882325 CPU: vendor Intel device 806ec
566 08:43:21.885948 CPU: family 06, model 8e, stepping 0c
567 08:43:21.889443 Clearing out pending MCEs
568 08:43:21.892569 Clearing out pending MCEs
569 08:43:21.895794 Setting up local APIC...
570 08:43:21.898977 apic_id: 0x06 done.
571 08:43:21.899583 apic_id: 0x07 done.
572 08:43:21.902044 VMX status: enabled
573 08:43:21.902738 VMX status: enabled
574 08:43:21.909022 IA32_FEATURE_CONTROL status: locked
575 08:43:21.912399 IA32_FEATURE_CONTROL status: locked
576 08:43:21.912936 Skip microcode update
577 08:43:21.915619 Skip microcode update
578 08:43:21.918823 CPU #7 initialized
579 08:43:21.919350 CPU #2 initialized
580 08:43:21.921960 apic_id: 0x01 done.
581 08:43:21.924939 Setting up local APIC...
582 08:43:21.925426 Setting up local APIC...
583 08:43:21.928582 apic_id: 0x05 done.
584 08:43:21.931904 apic_id: 0x04 done.
585 08:43:21.932331 VMX status: enabled
586 08:43:21.935104 VMX status: enabled
587 08:43:21.938407 IA32_FEATURE_CONTROL status: locked
588 08:43:21.942171 IA32_FEATURE_CONTROL status: locked
589 08:43:21.944786 Skip microcode update
590 08:43:21.945217 Skip microcode update
591 08:43:21.948196 CPU #6 initialized
592 08:43:21.951662 CPU #5 initialized
593 08:43:21.952094 apic_id: 0x03 done.
594 08:43:21.954734 apic_id: 0x02 done.
595 08:43:21.957819 VMX status: enabled
596 08:43:21.958271 VMX status: enabled
597 08:43:21.961405 IA32_FEATURE_CONTROL status: locked
598 08:43:21.965090 IA32_FEATURE_CONTROL status: locked
599 08:43:21.968009 Skip microcode update
600 08:43:21.971315 VMX status: enabled
601 08:43:21.971954 CPU #4 initialized
602 08:43:21.974718 Skip microcode update
603 08:43:21.977971 IA32_FEATURE_CONTROL status: locked
604 08:43:21.981156 CPU #1 initialized
605 08:43:21.981601 Skip microcode update
606 08:43:21.984700 CPU #3 initialized
607 08:43:21.987896 bsp_do_flight_plan done after 452 msecs.
608 08:43:21.990652 CPU: frequency set to 4200 MHz
609 08:43:21.994194 Enabling SMIs.
610 08:43:21.994636 Locking SMM.
611 08:43:22.009616 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 08:43:22.012661 CBFS @ c08000 size 3f8000
613 08:43:22.019407 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 08:43:22.019875 CBFS: Locating 'vbt.bin'
615 08:43:22.025952 CBFS: Found @ offset 5f5c0 size 499
616 08:43:22.029280 Found a VBT of 4608 bytes after decompression
617 08:43:22.214744 Display FSP Version Info HOB
618 08:43:22.217811 Reference Code - CPU = 9.0.1e.30
619 08:43:22.220684 uCode Version = 0.0.0.ca
620 08:43:22.224410 TXT ACM version = ff.ff.ff.ffff
621 08:43:22.227578 Display FSP Version Info HOB
622 08:43:22.231000 Reference Code - ME = 9.0.1e.30
623 08:43:22.234176 MEBx version = 0.0.0.0
624 08:43:22.237137 ME Firmware Version = Consumer SKU
625 08:43:22.240789 Display FSP Version Info HOB
626 08:43:22.244078 Reference Code - CML PCH = 9.0.1e.30
627 08:43:22.247111 PCH-CRID Status = Disabled
628 08:43:22.251034 PCH-CRID Original Value = ff.ff.ff.ffff
629 08:43:22.253715 PCH-CRID New Value = ff.ff.ff.ffff
630 08:43:22.256603 OPROM - RST - RAID = ff.ff.ff.ffff
631 08:43:22.260029 ChipsetInit Base Version = ff.ff.ff.ffff
632 08:43:22.266539 ChipsetInit Oem Version = ff.ff.ff.ffff
633 08:43:22.269562 Display FSP Version Info HOB
634 08:43:22.273044 Reference Code - SA - System Agent = 9.0.1e.30
635 08:43:22.276127 Reference Code - MRC = 0.7.1.6c
636 08:43:22.279507 SA - PCIe Version = 9.0.1e.30
637 08:43:22.282956 SA-CRID Status = Disabled
638 08:43:22.286038 SA-CRID Original Value = 0.0.0.c
639 08:43:22.289318 SA-CRID New Value = 0.0.0.c
640 08:43:22.289867 OPROM - VBIOS = ff.ff.ff.ffff
641 08:43:22.293646 RTC Init
642 08:43:22.296450 Set power on after power failure.
643 08:43:22.296896 Disabling Deep S3
644 08:43:22.299895 Disabling Deep S3
645 08:43:22.302906 Disabling Deep S4
646 08:43:22.303392 Disabling Deep S4
647 08:43:22.306325 Disabling Deep S5
648 08:43:22.306975 Disabling Deep S5
649 08:43:22.312818 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
650 08:43:22.316420 Enumerating buses...
651 08:43:22.319244 Show all devs... Before device enumeration.
652 08:43:22.322585 Root Device: enabled 1
653 08:43:22.326036 CPU_CLUSTER: 0: enabled 1
654 08:43:22.326573 DOMAIN: 0000: enabled 1
655 08:43:22.329264 APIC: 00: enabled 1
656 08:43:22.332701 PCI: 00:00.0: enabled 1
657 08:43:22.335484 PCI: 00:02.0: enabled 1
658 08:43:22.335933 PCI: 00:04.0: enabled 0
659 08:43:22.338829 PCI: 00:05.0: enabled 0
660 08:43:22.342404 PCI: 00:12.0: enabled 1
661 08:43:22.345624 PCI: 00:12.5: enabled 0
662 08:43:22.346233 PCI: 00:12.6: enabled 0
663 08:43:22.348570 PCI: 00:14.0: enabled 1
664 08:43:22.352345 PCI: 00:14.1: enabled 0
665 08:43:22.355686 PCI: 00:14.3: enabled 1
666 08:43:22.356276 PCI: 00:14.5: enabled 0
667 08:43:22.358478 PCI: 00:15.0: enabled 1
668 08:43:22.361971 PCI: 00:15.1: enabled 1
669 08:43:22.365097 PCI: 00:15.2: enabled 0
670 08:43:22.365647 PCI: 00:15.3: enabled 0
671 08:43:22.368507 PCI: 00:16.0: enabled 1
672 08:43:22.371762 PCI: 00:16.1: enabled 0
673 08:43:22.372311 PCI: 00:16.2: enabled 0
674 08:43:22.374794 PCI: 00:16.3: enabled 0
675 08:43:22.378187 PCI: 00:16.4: enabled 0
676 08:43:22.381115 PCI: 00:16.5: enabled 0
677 08:43:22.381561 PCI: 00:17.0: enabled 1
678 08:43:22.384474 PCI: 00:19.0: enabled 1
679 08:43:22.388255 PCI: 00:19.1: enabled 0
680 08:43:22.390885 PCI: 00:19.2: enabled 0
681 08:43:22.391334 PCI: 00:1a.0: enabled 0
682 08:43:22.394391 PCI: 00:1c.0: enabled 0
683 08:43:22.397395 PCI: 00:1c.1: enabled 0
684 08:43:22.400697 PCI: 00:1c.2: enabled 0
685 08:43:22.401187 PCI: 00:1c.3: enabled 0
686 08:43:22.404115 PCI: 00:1c.4: enabled 0
687 08:43:22.407301 PCI: 00:1c.5: enabled 0
688 08:43:22.410771 PCI: 00:1c.6: enabled 0
689 08:43:22.411212 PCI: 00:1c.7: enabled 0
690 08:43:22.413989 PCI: 00:1d.0: enabled 1
691 08:43:22.417739 PCI: 00:1d.1: enabled 0
692 08:43:22.420529 PCI: 00:1d.2: enabled 0
693 08:43:22.421066 PCI: 00:1d.3: enabled 0
694 08:43:22.423847 PCI: 00:1d.4: enabled 0
695 08:43:22.426639 PCI: 00:1d.5: enabled 1
696 08:43:22.429952 PCI: 00:1e.0: enabled 1
697 08:43:22.430395 PCI: 00:1e.1: enabled 0
698 08:43:22.433408 PCI: 00:1e.2: enabled 1
699 08:43:22.436162 PCI: 00:1e.3: enabled 1
700 08:43:22.440079 PCI: 00:1f.0: enabled 1
701 08:43:22.440622 PCI: 00:1f.1: enabled 1
702 08:43:22.442713 PCI: 00:1f.2: enabled 1
703 08:43:22.446148 PCI: 00:1f.3: enabled 1
704 08:43:22.449504 PCI: 00:1f.4: enabled 1
705 08:43:22.449948 PCI: 00:1f.5: enabled 1
706 08:43:22.452735 PCI: 00:1f.6: enabled 0
707 08:43:22.456459 USB0 port 0: enabled 1
708 08:43:22.459036 I2C: 00:15: enabled 1
709 08:43:22.459602 I2C: 00:5d: enabled 1
710 08:43:22.462824 GENERIC: 0.0: enabled 1
711 08:43:22.465809 I2C: 00:1a: enabled 1
712 08:43:22.466314 I2C: 00:38: enabled 1
713 08:43:22.469710 I2C: 00:39: enabled 1
714 08:43:22.472080 I2C: 00:3a: enabled 1
715 08:43:22.472545 I2C: 00:3b: enabled 1
716 08:43:22.475365 PCI: 00:00.0: enabled 1
717 08:43:22.478868 SPI: 00: enabled 1
718 08:43:22.479299 SPI: 01: enabled 1
719 08:43:22.481883 PNP: 0c09.0: enabled 1
720 08:43:22.485312 USB2 port 0: enabled 1
721 08:43:22.488538 USB2 port 1: enabled 1
722 08:43:22.488966 USB2 port 2: enabled 0
723 08:43:22.491761 USB2 port 3: enabled 0
724 08:43:22.494964 USB2 port 5: enabled 0
725 08:43:22.495421 USB2 port 6: enabled 1
726 08:43:22.498619 USB2 port 9: enabled 1
727 08:43:22.501861 USB3 port 0: enabled 1
728 08:43:22.504838 USB3 port 1: enabled 1
729 08:43:22.505266 USB3 port 2: enabled 1
730 08:43:22.508465 USB3 port 3: enabled 1
731 08:43:22.511291 USB3 port 4: enabled 0
732 08:43:22.511759 APIC: 02: enabled 1
733 08:43:22.514433 APIC: 07: enabled 1
734 08:43:22.518079 APIC: 01: enabled 1
735 08:43:22.518518 APIC: 03: enabled 1
736 08:43:22.521734 APIC: 04: enabled 1
737 08:43:22.524407 APIC: 05: enabled 1
738 08:43:22.524851 APIC: 06: enabled 1
739 08:43:22.528410 Compare with tree...
740 08:43:22.531217 Root Device: enabled 1
741 08:43:22.531703 CPU_CLUSTER: 0: enabled 1
742 08:43:22.534427 APIC: 00: enabled 1
743 08:43:22.537678 APIC: 02: enabled 1
744 08:43:22.538124 APIC: 07: enabled 1
745 08:43:22.540538 APIC: 01: enabled 1
746 08:43:22.544160 APIC: 03: enabled 1
747 08:43:22.544605 APIC: 04: enabled 1
748 08:43:22.547230 APIC: 05: enabled 1
749 08:43:22.550665 APIC: 06: enabled 1
750 08:43:22.554056 DOMAIN: 0000: enabled 1
751 08:43:22.554500 PCI: 00:00.0: enabled 1
752 08:43:22.556873 PCI: 00:02.0: enabled 1
753 08:43:22.560959 PCI: 00:04.0: enabled 0
754 08:43:22.563466 PCI: 00:05.0: enabled 0
755 08:43:22.566863 PCI: 00:12.0: enabled 1
756 08:43:22.567356 PCI: 00:12.5: enabled 0
757 08:43:22.570265 PCI: 00:12.6: enabled 0
758 08:43:22.573734 PCI: 00:14.0: enabled 1
759 08:43:22.576382 USB0 port 0: enabled 1
760 08:43:22.579752 USB2 port 0: enabled 1
761 08:43:22.583233 USB2 port 1: enabled 1
762 08:43:22.583717 USB2 port 2: enabled 0
763 08:43:22.586239 USB2 port 3: enabled 0
764 08:43:22.589899 USB2 port 5: enabled 0
765 08:43:22.592911 USB2 port 6: enabled 1
766 08:43:22.596395 USB2 port 9: enabled 1
767 08:43:22.599448 USB3 port 0: enabled 1
768 08:43:22.599944 USB3 port 1: enabled 1
769 08:43:22.602679 USB3 port 2: enabled 1
770 08:43:22.605969 USB3 port 3: enabled 1
771 08:43:22.609494 USB3 port 4: enabled 0
772 08:43:22.612600 PCI: 00:14.1: enabled 0
773 08:43:22.615547 PCI: 00:14.3: enabled 1
774 08:43:22.616269 PCI: 00:14.5: enabled 0
775 08:43:22.619263 PCI: 00:15.0: enabled 1
776 08:43:22.622301 I2C: 00:15: enabled 1
777 08:43:22.625596 PCI: 00:15.1: enabled 1
778 08:43:22.628671 I2C: 00:5d: enabled 1
779 08:43:22.629205 GENERIC: 0.0: enabled 1
780 08:43:22.632009 PCI: 00:15.2: enabled 0
781 08:43:22.635316 PCI: 00:15.3: enabled 0
782 08:43:22.638848 PCI: 00:16.0: enabled 1
783 08:43:22.642135 PCI: 00:16.1: enabled 0
784 08:43:22.642700 PCI: 00:16.2: enabled 0
785 08:43:22.645554 PCI: 00:16.3: enabled 0
786 08:43:22.648151 PCI: 00:16.4: enabled 0
787 08:43:22.651644 PCI: 00:16.5: enabled 0
788 08:43:22.654610 PCI: 00:17.0: enabled 1
789 08:43:22.655085 PCI: 00:19.0: enabled 1
790 08:43:22.658188 I2C: 00:1a: enabled 1
791 08:43:22.661874 I2C: 00:38: enabled 1
792 08:43:22.664932 I2C: 00:39: enabled 1
793 08:43:22.668061 I2C: 00:3a: enabled 1
794 08:43:22.668534 I2C: 00:3b: enabled 1
795 08:43:22.671515 PCI: 00:19.1: enabled 0
796 08:43:22.675049 PCI: 00:19.2: enabled 0
797 08:43:22.677878 PCI: 00:1a.0: enabled 0
798 08:43:22.681216 PCI: 00:1c.0: enabled 0
799 08:43:22.681867 PCI: 00:1c.1: enabled 0
800 08:43:22.685035 PCI: 00:1c.2: enabled 0
801 08:43:22.687899 PCI: 00:1c.3: enabled 0
802 08:43:22.691295 PCI: 00:1c.4: enabled 0
803 08:43:22.694461 PCI: 00:1c.5: enabled 0
804 08:43:22.695113 PCI: 00:1c.6: enabled 0
805 08:43:22.697384 PCI: 00:1c.7: enabled 0
806 08:43:22.700564 PCI: 00:1d.0: enabled 1
807 08:43:22.704093 PCI: 00:1d.1: enabled 0
808 08:43:22.706936 PCI: 00:1d.2: enabled 0
809 08:43:22.707433 PCI: 00:1d.3: enabled 0
810 08:43:22.710758 PCI: 00:1d.4: enabled 0
811 08:43:22.714016 PCI: 00:1d.5: enabled 1
812 08:43:22.716622 PCI: 00:00.0: enabled 1
813 08:43:22.720317 PCI: 00:1e.0: enabled 1
814 08:43:22.720747 PCI: 00:1e.1: enabled 0
815 08:43:22.723464 PCI: 00:1e.2: enabled 1
816 08:43:22.726428 SPI: 00: enabled 1
817 08:43:22.729954 PCI: 00:1e.3: enabled 1
818 08:43:22.730467 SPI: 01: enabled 1
819 08:43:22.733141 PCI: 00:1f.0: enabled 1
820 08:43:22.736319 PNP: 0c09.0: enabled 1
821 08:43:22.739895 PCI: 00:1f.1: enabled 1
822 08:43:22.742881 PCI: 00:1f.2: enabled 1
823 08:43:22.743448 PCI: 00:1f.3: enabled 1
824 08:43:22.746378 PCI: 00:1f.4: enabled 1
825 08:43:22.749808 PCI: 00:1f.5: enabled 1
826 08:43:22.753212 PCI: 00:1f.6: enabled 0
827 08:43:22.755960 Root Device scanning...
828 08:43:22.759497 scan_static_bus for Root Device
829 08:43:22.759970 CPU_CLUSTER: 0 enabled
830 08:43:22.762331 DOMAIN: 0000 enabled
831 08:43:22.765835 DOMAIN: 0000 scanning...
832 08:43:22.768846 PCI: pci_scan_bus for bus 00
833 08:43:22.771960 PCI: 00:00.0 [8086/0000] ops
834 08:43:22.775474 PCI: 00:00.0 [8086/9b61] enabled
835 08:43:22.779066 PCI: 00:02.0 [8086/0000] bus ops
836 08:43:22.782078 PCI: 00:02.0 [8086/9b41] enabled
837 08:43:22.785146 PCI: 00:04.0 [8086/1903] disabled
838 08:43:22.789012 PCI: 00:08.0 [8086/1911] enabled
839 08:43:22.791870 PCI: 00:12.0 [8086/02f9] enabled
840 08:43:22.795270 PCI: 00:14.0 [8086/0000] bus ops
841 08:43:22.798332 PCI: 00:14.0 [8086/02ed] enabled
842 08:43:22.802111 PCI: 00:14.2 [8086/02ef] enabled
843 08:43:22.805334 PCI: 00:14.3 [8086/02f0] enabled
844 08:43:22.808428 PCI: 00:15.0 [8086/0000] bus ops
845 08:43:22.812011 PCI: 00:15.0 [8086/02e8] enabled
846 08:43:22.814679 PCI: 00:15.1 [8086/0000] bus ops
847 08:43:22.818198 PCI: 00:15.1 [8086/02e9] enabled
848 08:43:22.821471 PCI: 00:16.0 [8086/0000] ops
849 08:43:22.824606 PCI: 00:16.0 [8086/02e0] enabled
850 08:43:22.828066 PCI: 00:17.0 [8086/0000] ops
851 08:43:22.831049 PCI: 00:17.0 [8086/02d3] enabled
852 08:43:22.834810 PCI: 00:19.0 [8086/0000] bus ops
853 08:43:22.837940 PCI: 00:19.0 [8086/02c5] enabled
854 08:43:22.841030 PCI: 00:1d.0 [8086/0000] bus ops
855 08:43:22.843917 PCI: 00:1d.0 [8086/02b0] enabled
856 08:43:22.850616 PCI: Static device PCI: 00:1d.5 not found, disabling it.
857 08:43:22.854023 PCI: 00:1e.0 [8086/0000] ops
858 08:43:22.857586 PCI: 00:1e.0 [8086/02a8] enabled
859 08:43:22.860272 PCI: 00:1e.2 [8086/0000] bus ops
860 08:43:22.863729 PCI: 00:1e.2 [8086/02aa] enabled
861 08:43:22.867319 PCI: 00:1e.3 [8086/0000] bus ops
862 08:43:22.870020 PCI: 00:1e.3 [8086/02ab] enabled
863 08:43:22.873705 PCI: 00:1f.0 [8086/0000] bus ops
864 08:43:22.876941 PCI: 00:1f.0 [8086/0284] enabled
865 08:43:22.880460 PCI: Static device PCI: 00:1f.1 not found, disabling it.
866 08:43:22.887256 PCI: Static device PCI: 00:1f.2 not found, disabling it.
867 08:43:22.889528 PCI: 00:1f.3 [8086/0000] bus ops
868 08:43:22.893268 PCI: 00:1f.3 [8086/02c8] enabled
869 08:43:22.895990 PCI: 00:1f.4 [8086/0000] bus ops
870 08:43:22.899895 PCI: 00:1f.4 [8086/02a3] enabled
871 08:43:22.902725 PCI: 00:1f.5 [8086/0000] bus ops
872 08:43:22.906271 PCI: 00:1f.5 [8086/02a4] enabled
873 08:43:22.909232 PCI: Leftover static devices:
874 08:43:22.913097 PCI: 00:05.0
875 08:43:22.913634 PCI: 00:12.5
876 08:43:22.915659 PCI: 00:12.6
877 08:43:22.916115 PCI: 00:14.1
878 08:43:22.916565 PCI: 00:14.5
879 08:43:22.918892 PCI: 00:15.2
880 08:43:22.919333 PCI: 00:15.3
881 08:43:22.922538 PCI: 00:16.1
882 08:43:22.923046 PCI: 00:16.2
883 08:43:22.923595 PCI: 00:16.3
884 08:43:22.925376 PCI: 00:16.4
885 08:43:22.925925 PCI: 00:16.5
886 08:43:22.929000 PCI: 00:19.1
887 08:43:22.929444 PCI: 00:19.2
888 08:43:22.931838 PCI: 00:1a.0
889 08:43:22.932281 PCI: 00:1c.0
890 08:43:22.932728 PCI: 00:1c.1
891 08:43:22.935490 PCI: 00:1c.2
892 08:43:22.935937 PCI: 00:1c.3
893 08:43:22.938903 PCI: 00:1c.4
894 08:43:22.939345 PCI: 00:1c.5
895 08:43:22.939829 PCI: 00:1c.6
896 08:43:22.941874 PCI: 00:1c.7
897 08:43:22.942315 PCI: 00:1d.1
898 08:43:22.945030 PCI: 00:1d.2
899 08:43:22.945549 PCI: 00:1d.3
900 08:43:22.948290 PCI: 00:1d.4
901 08:43:22.948731 PCI: 00:1d.5
902 08:43:22.949183 PCI: 00:1e.1
903 08:43:22.951936 PCI: 00:1f.1
904 08:43:22.952381 PCI: 00:1f.2
905 08:43:22.955062 PCI: 00:1f.6
906 08:43:22.958098 PCI: Check your devicetree.cb.
907 08:43:22.958642 PCI: 00:02.0 scanning...
908 08:43:22.964876 scan_generic_bus for PCI: 00:02.0
909 08:43:22.967858 scan_generic_bus for PCI: 00:02.0 done
910 08:43:22.971142 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
911 08:43:22.974569 PCI: 00:14.0 scanning...
912 08:43:22.977689 scan_static_bus for PCI: 00:14.0
913 08:43:22.981309 USB0 port 0 enabled
914 08:43:22.984368 USB0 port 0 scanning...
915 08:43:22.987977 scan_static_bus for USB0 port 0
916 08:43:22.988422 USB2 port 0 enabled
917 08:43:22.991000 USB2 port 1 enabled
918 08:43:22.994571 USB2 port 2 disabled
919 08:43:22.995115 USB2 port 3 disabled
920 08:43:22.997826 USB2 port 5 disabled
921 08:43:23.000772 USB2 port 6 enabled
922 08:43:23.001316 USB2 port 9 enabled
923 08:43:23.004119 USB3 port 0 enabled
924 08:43:23.004562 USB3 port 1 enabled
925 08:43:23.007283 USB3 port 2 enabled
926 08:43:23.010500 USB3 port 3 enabled
927 08:43:23.010918 USB3 port 4 disabled
928 08:43:23.014152 USB2 port 0 scanning...
929 08:43:23.017000 scan_static_bus for USB2 port 0
930 08:43:23.020347 scan_static_bus for USB2 port 0 done
931 08:43:23.026834 scan_bus: scanning of bus USB2 port 0 took 9713 usecs
932 08:43:23.030407 USB2 port 1 scanning...
933 08:43:23.033335 scan_static_bus for USB2 port 1
934 08:43:23.036778 scan_static_bus for USB2 port 1 done
935 08:43:23.042733 scan_bus: scanning of bus USB2 port 1 took 9706 usecs
936 08:43:23.043331 USB2 port 6 scanning...
937 08:43:23.046266 scan_static_bus for USB2 port 6
938 08:43:23.052653 scan_static_bus for USB2 port 6 done
939 08:43:23.056047 scan_bus: scanning of bus USB2 port 6 took 9713 usecs
940 08:43:23.059752 USB2 port 9 scanning...
941 08:43:23.062517 scan_static_bus for USB2 port 9
942 08:43:23.065790 scan_static_bus for USB2 port 9 done
943 08:43:23.072117 scan_bus: scanning of bus USB2 port 9 took 9713 usecs
944 08:43:23.075897 USB3 port 0 scanning...
945 08:43:23.079004 scan_static_bus for USB3 port 0
946 08:43:23.082244 scan_static_bus for USB3 port 0 done
947 08:43:23.085139 scan_bus: scanning of bus USB3 port 0 took 9705 usecs
948 08:43:23.088882 USB3 port 1 scanning...
949 08:43:23.092439 scan_static_bus for USB3 port 1
950 08:43:23.095069 scan_static_bus for USB3 port 1 done
951 08:43:23.101595 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
952 08:43:23.104842 USB3 port 2 scanning...
953 08:43:23.108132 scan_static_bus for USB3 port 2
954 08:43:23.111608 scan_static_bus for USB3 port 2 done
955 08:43:23.118296 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
956 08:43:23.118803 USB3 port 3 scanning...
957 08:43:23.121303 scan_static_bus for USB3 port 3
958 08:43:23.128011 scan_static_bus for USB3 port 3 done
959 08:43:23.131003 scan_bus: scanning of bus USB3 port 3 took 9713 usecs
960 08:43:23.134626 scan_static_bus for USB0 port 0 done
961 08:43:23.140946 scan_bus: scanning of bus USB0 port 0 took 155457 usecs
962 08:43:23.144487 scan_static_bus for PCI: 00:14.0 done
963 08:43:23.150506 scan_bus: scanning of bus PCI: 00:14.0 took 173090 usecs
964 08:43:23.153956 PCI: 00:15.0 scanning...
965 08:43:23.157290 scan_generic_bus for PCI: 00:15.0
966 08:43:23.160540 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
967 08:43:23.163956 scan_generic_bus for PCI: 00:15.0 done
968 08:43:23.170196 scan_bus: scanning of bus PCI: 00:15.0 took 14316 usecs
969 08:43:23.173672 PCI: 00:15.1 scanning...
970 08:43:23.176950 scan_generic_bus for PCI: 00:15.1
971 08:43:23.180329 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
972 08:43:23.186427 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
973 08:43:23.189672 scan_generic_bus for PCI: 00:15.1 done
974 08:43:23.192817 scan_bus: scanning of bus PCI: 00:15.1 took 18678 usecs
975 08:43:23.196506 PCI: 00:19.0 scanning...
976 08:43:23.199469 scan_generic_bus for PCI: 00:19.0
977 08:43:23.206011 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
978 08:43:23.209251 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
979 08:43:23.212527 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
980 08:43:23.216173 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
981 08:43:23.222185 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
982 08:43:23.225795 scan_generic_bus for PCI: 00:19.0 done
983 08:43:23.232257 scan_bus: scanning of bus PCI: 00:19.0 took 30751 usecs
984 08:43:23.232678 PCI: 00:1d.0 scanning...
985 08:43:23.235433 do_pci_scan_bridge for PCI: 00:1d.0
986 08:43:23.238863 PCI: pci_scan_bus for bus 01
987 08:43:23.241819 PCI: 01:00.0 [1c5c/1327] enabled
988 08:43:23.248590 Enabling Common Clock Configuration
989 08:43:23.251922 L1 Sub-State supported from root port 29
990 08:43:23.254672 L1 Sub-State Support = 0xf
991 08:43:23.258116 CommonModeRestoreTime = 0x28
992 08:43:23.261217 Power On Value = 0x16, Power On Scale = 0x0
993 08:43:23.264618 ASPM: Enabled L1
994 08:43:23.267922 scan_bus: scanning of bus PCI: 00:1d.0 took 32812 usecs
995 08:43:23.271343 PCI: 00:1e.2 scanning...
996 08:43:23.275139 scan_generic_bus for PCI: 00:1e.2
997 08:43:23.277674 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
998 08:43:23.281207 scan_generic_bus for PCI: 00:1e.2 done
999 08:43:23.287596 scan_bus: scanning of bus PCI: 00:1e.2 took 14018 usecs
1000 08:43:23.290964 PCI: 00:1e.3 scanning...
1001 08:43:23.293873 scan_generic_bus for PCI: 00:1e.3
1002 08:43:23.297421 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1003 08:43:23.300782 scan_generic_bus for PCI: 00:1e.3 done
1004 08:43:23.306925 scan_bus: scanning of bus PCI: 00:1e.3 took 14022 usecs
1005 08:43:23.310300 PCI: 00:1f.0 scanning...
1006 08:43:23.313563 scan_static_bus for PCI: 00:1f.0
1007 08:43:23.317131 PNP: 0c09.0 enabled
1008 08:43:23.320268 scan_static_bus for PCI: 00:1f.0 done
1009 08:43:23.327057 scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs
1010 08:43:23.327662 PCI: 00:1f.3 scanning...
1011 08:43:23.333827 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1012 08:43:23.336841 PCI: 00:1f.4 scanning...
1013 08:43:23.340203 scan_generic_bus for PCI: 00:1f.4
1014 08:43:23.343174 scan_generic_bus for PCI: 00:1f.4 done
1015 08:43:23.349828 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1016 08:43:23.352947 PCI: 00:1f.5 scanning...
1017 08:43:23.356370 scan_generic_bus for PCI: 00:1f.5
1018 08:43:23.359418 scan_generic_bus for PCI: 00:1f.5 done
1019 08:43:23.365756 scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs
1020 08:43:23.369484 scan_bus: scanning of bus DOMAIN: 0000 took 605493 usecs
1021 08:43:23.375771 scan_static_bus for Root Device done
1022 08:43:23.379464 scan_bus: scanning of bus Root Device took 625371 usecs
1023 08:43:23.383083 done
1024 08:43:23.383737 Chrome EC: UHEPI supported
1025 08:43:23.389003 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1026 08:43:23.395254 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1027 08:43:23.401820 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1028 08:43:23.408432 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1029 08:43:23.411658 SPI flash protection: WPSW=0 SRP0=0
1030 08:43:23.418200 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1031 08:43:23.422000 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1032 08:43:23.424632 found VGA at PCI: 00:02.0
1033 08:43:23.428078 Setting up VGA for PCI: 00:02.0
1034 08:43:23.434423 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1035 08:43:23.438044 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1036 08:43:23.441456 Allocating resources...
1037 08:43:23.444806 Reading resources...
1038 08:43:23.447547 Root Device read_resources bus 0 link: 0
1039 08:43:23.450968 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1040 08:43:23.457868 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1041 08:43:23.460502 DOMAIN: 0000 read_resources bus 0 link: 0
1042 08:43:23.468125 PCI: 00:14.0 read_resources bus 0 link: 0
1043 08:43:23.471474 USB0 port 0 read_resources bus 0 link: 0
1044 08:43:23.479603 USB0 port 0 read_resources bus 0 link: 0 done
1045 08:43:23.483446 PCI: 00:14.0 read_resources bus 0 link: 0 done
1046 08:43:23.490668 PCI: 00:15.0 read_resources bus 1 link: 0
1047 08:43:23.493650 PCI: 00:15.0 read_resources bus 1 link: 0 done
1048 08:43:23.500362 PCI: 00:15.1 read_resources bus 2 link: 0
1049 08:43:23.503405 PCI: 00:15.1 read_resources bus 2 link: 0 done
1050 08:43:23.510959 PCI: 00:19.0 read_resources bus 3 link: 0
1051 08:43:23.518000 PCI: 00:19.0 read_resources bus 3 link: 0 done
1052 08:43:23.521295 PCI: 00:1d.0 read_resources bus 1 link: 0
1053 08:43:23.527866 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1054 08:43:23.530948 PCI: 00:1e.2 read_resources bus 4 link: 0
1055 08:43:23.537602 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1056 08:43:23.540393 PCI: 00:1e.3 read_resources bus 5 link: 0
1057 08:43:23.547511 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1058 08:43:23.550528 PCI: 00:1f.0 read_resources bus 0 link: 0
1059 08:43:23.556940 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1060 08:43:23.563425 DOMAIN: 0000 read_resources bus 0 link: 0 done
1061 08:43:23.567078 Root Device read_resources bus 0 link: 0 done
1062 08:43:23.570045 Done reading resources.
1063 08:43:23.576773 Show resources in subtree (Root Device)...After reading.
1064 08:43:23.579851 Root Device child on link 0 CPU_CLUSTER: 0
1065 08:43:23.583296 CPU_CLUSTER: 0 child on link 0 APIC: 00
1066 08:43:23.586165 APIC: 00
1067 08:43:23.586597 APIC: 02
1068 08:43:23.589910 APIC: 07
1069 08:43:23.590533 APIC: 01
1070 08:43:23.591019 APIC: 03
1071 08:43:23.593564 APIC: 04
1072 08:43:23.594082 APIC: 05
1073 08:43:23.594538 APIC: 06
1074 08:43:23.642772 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1075 08:43:23.643807 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1076 08:43:23.644259 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1077 08:43:23.644705 PCI: 00:00.0
1078 08:43:23.645122 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1079 08:43:23.645618 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1080 08:43:23.690506 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1081 08:43:23.691484 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1082 08:43:23.692032 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1083 08:43:23.692567 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1084 08:43:23.692999 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1085 08:43:23.698741 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1086 08:43:23.705266 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1087 08:43:23.711886 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1088 08:43:23.721615 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1089 08:43:23.731231 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1090 08:43:23.741323 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1091 08:43:23.751349 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1092 08:43:23.760350 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1093 08:43:23.770605 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1094 08:43:23.771095 PCI: 00:02.0
1095 08:43:23.780165 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1096 08:43:23.793130 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1097 08:43:23.799924 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1098 08:43:23.802999 PCI: 00:04.0
1099 08:43:23.803455 PCI: 00:08.0
1100 08:43:23.812347 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1101 08:43:23.816119 PCI: 00:12.0
1102 08:43:23.825723 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 08:43:23.829036 PCI: 00:14.0 child on link 0 USB0 port 0
1104 08:43:23.839108 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1105 08:43:23.845326 USB0 port 0 child on link 0 USB2 port 0
1106 08:43:23.845891 USB2 port 0
1107 08:43:23.848661 USB2 port 1
1108 08:43:23.849229 USB2 port 2
1109 08:43:23.852099 USB2 port 3
1110 08:43:23.852669 USB2 port 5
1111 08:43:23.854925 USB2 port 6
1112 08:43:23.855440 USB2 port 9
1113 08:43:23.858615 USB3 port 0
1114 08:43:23.859080 USB3 port 1
1115 08:43:23.861932 USB3 port 2
1116 08:43:23.865079 USB3 port 3
1117 08:43:23.865546 USB3 port 4
1118 08:43:23.868453 PCI: 00:14.2
1119 08:43:23.877732 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1120 08:43:23.887524 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1121 08:43:23.887873 PCI: 00:14.3
1122 08:43:23.897376 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1123 08:43:23.903859 PCI: 00:15.0 child on link 0 I2C: 01:15
1124 08:43:23.913305 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 08:43:23.913736 I2C: 01:15
1126 08:43:23.916920 PCI: 00:15.1 child on link 0 I2C: 02:5d
1127 08:43:23.926375 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1128 08:43:23.930593 I2C: 02:5d
1129 08:43:23.930921 GENERIC: 0.0
1130 08:43:23.933036 PCI: 00:16.0
1131 08:43:23.943632 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 08:43:23.944175 PCI: 00:17.0
1133 08:43:23.953021 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1134 08:43:23.962555 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1135 08:43:23.972358 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1136 08:43:23.978895 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1137 08:43:23.988727 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1138 08:43:23.994914 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1139 08:43:24.001571 PCI: 00:19.0 child on link 0 I2C: 03:1a
1140 08:43:24.011490 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 08:43:24.011970 I2C: 03:1a
1142 08:43:24.015007 I2C: 03:38
1143 08:43:24.015702 I2C: 03:39
1144 08:43:24.018164 I2C: 03:3a
1145 08:43:24.018651 I2C: 03:3b
1146 08:43:24.024460 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1147 08:43:24.030769 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1148 08:43:24.040642 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1149 08:43:24.050472 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1150 08:43:24.053551 PCI: 01:00.0
1151 08:43:24.063594 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 08:43:24.064029 PCI: 00:1e.0
1153 08:43:24.077043 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1154 08:43:24.086419 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1155 08:43:24.089331 PCI: 00:1e.2 child on link 0 SPI: 00
1156 08:43:24.099492 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 08:43:24.099992 SPI: 00
1158 08:43:24.105715 PCI: 00:1e.3 child on link 0 SPI: 01
1159 08:43:24.115409 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 08:43:24.115845 SPI: 01
1161 08:43:24.118805 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1162 08:43:24.128330 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1163 08:43:24.138611 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1164 08:43:24.139032 PNP: 0c09.0
1165 08:43:24.147942 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1166 08:43:24.148365 PCI: 00:1f.3
1167 08:43:24.157803 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 08:43:24.170474 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1169 08:43:24.170948 PCI: 00:1f.4
1170 08:43:24.180608 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1171 08:43:24.190467 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1172 08:43:24.190979 PCI: 00:1f.5
1173 08:43:24.200382 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1174 08:43:24.206820 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1175 08:43:24.213492 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1176 08:43:24.219767 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1177 08:43:24.223338 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1178 08:43:24.226634 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1179 08:43:24.229476 PCI: 00:17.0 18 * [0x60 - 0x67] io
1180 08:43:24.236233 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1181 08:43:24.242768 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1182 08:43:24.249015 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1183 08:43:24.255564 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1184 08:43:24.265474 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1185 08:43:24.272880 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1186 08:43:24.275444 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1187 08:43:24.281960 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1188 08:43:24.288502 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1189 08:43:24.291694 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1190 08:43:24.298101 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1191 08:43:24.301147 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1192 08:43:24.307657 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1193 08:43:24.311296 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1194 08:43:24.317278 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1195 08:43:24.320630 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1196 08:43:24.327032 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1197 08:43:24.330507 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1198 08:43:24.337235 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1199 08:43:24.340744 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1200 08:43:24.346908 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1201 08:43:24.350301 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1202 08:43:24.356732 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1203 08:43:24.359736 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1204 08:43:24.367053 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1205 08:43:24.369951 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1206 08:43:24.376349 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1207 08:43:24.379675 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1208 08:43:24.386128 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1209 08:43:24.389922 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1210 08:43:24.396301 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1211 08:43:24.402559 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1212 08:43:24.406223 avoid_fixed_resources: DOMAIN: 0000
1213 08:43:24.412121 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 08:43:24.419192 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 08:43:24.425457 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 08:43:24.435294 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1217 08:43:24.441994 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1218 08:43:24.448300 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1219 08:43:24.458330 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1220 08:43:24.464402 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 08:43:24.471225 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 08:43:24.480897 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 08:43:24.487521 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 08:43:24.493685 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 08:43:24.497163 Setting resources...
1226 08:43:24.503497 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 08:43:24.507241 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 08:43:24.510780 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 08:43:24.513193 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 08:43:24.520078 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 08:43:24.527071 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 08:43:24.533208 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 08:43:24.536528 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 08:43:24.545847 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1235 08:43:24.549462 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 08:43:24.555500 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 08:43:24.558812 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 08:43:24.565453 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1239 08:43:24.569104 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1240 08:43:24.575684 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1241 08:43:24.578579 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1242 08:43:24.585111 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1243 08:43:24.588049 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1244 08:43:24.595016 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1245 08:43:24.598367 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1246 08:43:24.604778 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1247 08:43:24.608205 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1248 08:43:24.614523 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1249 08:43:24.617786 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1250 08:43:24.624270 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1251 08:43:24.627219 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1252 08:43:24.633741 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1253 08:43:24.636916 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1254 08:43:24.643843 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1255 08:43:24.646990 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1256 08:43:24.653599 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1257 08:43:24.656696 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1258 08:43:24.666490 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1259 08:43:24.673112 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1260 08:43:24.679549 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1261 08:43:24.686190 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1262 08:43:24.692778 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1263 08:43:24.699466 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1264 08:43:24.702876 Root Device assign_resources, bus 0 link: 0
1265 08:43:24.709194 DOMAIN: 0000 assign_resources, bus 0 link: 0
1266 08:43:24.719491 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1267 08:43:24.725677 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1268 08:43:24.732193 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1269 08:43:24.741880 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1270 08:43:24.748352 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1271 08:43:24.758463 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1272 08:43:24.761920 PCI: 00:14.0 assign_resources, bus 0 link: 0
1273 08:43:24.768103 PCI: 00:14.0 assign_resources, bus 0 link: 0
1274 08:43:24.774749 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1275 08:43:24.784631 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1276 08:43:24.791460 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1277 08:43:24.800747 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1278 08:43:24.804573 PCI: 00:15.0 assign_resources, bus 1 link: 0
1279 08:43:24.810826 PCI: 00:15.0 assign_resources, bus 1 link: 0
1280 08:43:24.817121 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1281 08:43:24.823560 PCI: 00:15.1 assign_resources, bus 2 link: 0
1282 08:43:24.826858 PCI: 00:15.1 assign_resources, bus 2 link: 0
1283 08:43:24.836773 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1284 08:43:24.842970 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1285 08:43:24.849923 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1286 08:43:24.859246 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1287 08:43:24.865736 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1288 08:43:24.875441 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1289 08:43:24.882180 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1290 08:43:24.892320 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1291 08:43:24.895538 PCI: 00:19.0 assign_resources, bus 3 link: 0
1292 08:43:24.898430 PCI: 00:19.0 assign_resources, bus 3 link: 0
1293 08:43:24.908912 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1294 08:43:24.917925 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1295 08:43:24.925162 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1296 08:43:24.930954 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1297 08:43:24.937766 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1298 08:43:24.943857 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1299 08:43:24.950297 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1300 08:43:24.960344 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1301 08:43:24.963485 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1302 08:43:24.970181 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1303 08:43:24.976764 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1304 08:43:24.983189 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1305 08:43:24.986537 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1306 08:43:24.992563 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1307 08:43:24.995690 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1308 08:43:25.002388 LPC: Trying to open IO window from 800 size 1ff
1309 08:43:25.009168 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1310 08:43:25.019018 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1311 08:43:25.025679 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1312 08:43:25.035202 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1313 08:43:25.038690 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 08:43:25.044753 Root Device assign_resources, bus 0 link: 0
1315 08:43:25.045213 Done setting resources.
1316 08:43:25.051734 Show resources in subtree (Root Device)...After assigning values.
1317 08:43:25.058000 Root Device child on link 0 CPU_CLUSTER: 0
1318 08:43:25.061568 CPU_CLUSTER: 0 child on link 0 APIC: 00
1319 08:43:25.062152 APIC: 00
1320 08:43:25.065187 APIC: 02
1321 08:43:25.065751 APIC: 07
1322 08:43:25.066229 APIC: 01
1323 08:43:25.067690 APIC: 03
1324 08:43:25.068147 APIC: 04
1325 08:43:25.070777 APIC: 05
1326 08:43:25.071232 APIC: 06
1327 08:43:25.074263 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1328 08:43:25.084665 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1329 08:43:25.097664 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1330 08:43:25.098235 PCI: 00:00.0
1331 08:43:25.107500 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1332 08:43:25.116758 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1333 08:43:25.126620 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1334 08:43:25.137039 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1335 08:43:25.145897 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1336 08:43:25.152964 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1337 08:43:25.162907 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1338 08:43:25.172066 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1339 08:43:25.182119 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1340 08:43:25.191866 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1341 08:43:25.201541 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1342 08:43:25.211848 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1343 08:43:25.221394 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1344 08:43:25.231031 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1345 08:43:25.237594 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1346 08:43:25.247726 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1347 08:43:25.250686 PCI: 00:02.0
1348 08:43:25.260354 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1349 08:43:25.270322 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1350 08:43:25.280068 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1351 08:43:25.283290 PCI: 00:04.0
1352 08:43:25.283908 PCI: 00:08.0
1353 08:43:25.293367 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1354 08:43:25.296160 PCI: 00:12.0
1355 08:43:25.306012 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1356 08:43:25.309177 PCI: 00:14.0 child on link 0 USB0 port 0
1357 08:43:25.318973 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1358 08:43:25.325528 USB0 port 0 child on link 0 USB2 port 0
1359 08:43:25.326059 USB2 port 0
1360 08:43:25.329412 USB2 port 1
1361 08:43:25.329873 USB2 port 2
1362 08:43:25.331809 USB2 port 3
1363 08:43:25.332274 USB2 port 5
1364 08:43:25.335679 USB2 port 6
1365 08:43:25.338412 USB2 port 9
1366 08:43:25.338876 USB3 port 0
1367 08:43:25.341842 USB3 port 1
1368 08:43:25.342416 USB3 port 2
1369 08:43:25.345390 USB3 port 3
1370 08:43:25.345960 USB3 port 4
1371 08:43:25.348421 PCI: 00:14.2
1372 08:43:25.358343 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1373 08:43:25.368255 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1374 08:43:25.371139 PCI: 00:14.3
1375 08:43:25.381041 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1376 08:43:25.384078 PCI: 00:15.0 child on link 0 I2C: 01:15
1377 08:43:25.393995 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1378 08:43:25.396938 I2C: 01:15
1379 08:43:25.400544 PCI: 00:15.1 child on link 0 I2C: 02:5d
1380 08:43:25.410508 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1381 08:43:25.413746 I2C: 02:5d
1382 08:43:25.414307 GENERIC: 0.0
1383 08:43:25.416749 PCI: 00:16.0
1384 08:43:25.426344 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1385 08:43:25.426866 PCI: 00:17.0
1386 08:43:25.440057 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1387 08:43:25.449270 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1388 08:43:25.456107 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1389 08:43:25.466146 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1390 08:43:25.475364 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1391 08:43:25.485327 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1392 08:43:25.488445 PCI: 00:19.0 child on link 0 I2C: 03:1a
1393 08:43:25.501459 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1394 08:43:25.502017 I2C: 03:1a
1395 08:43:25.504444 I2C: 03:38
1396 08:43:25.504903 I2C: 03:39
1397 08:43:25.508055 I2C: 03:3a
1398 08:43:25.508614 I2C: 03:3b
1399 08:43:25.511582 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1400 08:43:25.520874 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1401 08:43:25.531273 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1402 08:43:25.543839 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1403 08:43:25.544413 PCI: 01:00.0
1404 08:43:25.553810 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1405 08:43:25.557251 PCI: 00:1e.0
1406 08:43:25.566790 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1407 08:43:25.576234 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1408 08:43:25.583051 PCI: 00:1e.2 child on link 0 SPI: 00
1409 08:43:25.592645 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1410 08:43:25.593210 SPI: 00
1411 08:43:25.595912 PCI: 00:1e.3 child on link 0 SPI: 01
1412 08:43:25.609472 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1413 08:43:25.610042 SPI: 01
1414 08:43:25.612124 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 08:43:25.622195 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 08:43:25.631763 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1417 08:43:25.632312 PNP: 0c09.0
1418 08:43:25.641758 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 08:43:25.642324 PCI: 00:1f.3
1420 08:43:25.654726 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1421 08:43:25.664324 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1422 08:43:25.664950 PCI: 00:1f.4
1423 08:43:25.674360 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1424 08:43:25.683909 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1425 08:43:25.687476 PCI: 00:1f.5
1426 08:43:25.697100 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1427 08:43:25.700597 Done allocating resources.
1428 08:43:25.703736 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1429 08:43:25.706325 Enabling resources...
1430 08:43:25.714002 PCI: 00:00.0 subsystem <- 8086/9b61
1431 08:43:25.714576 PCI: 00:00.0 cmd <- 06
1432 08:43:25.720043 PCI: 00:02.0 subsystem <- 8086/9b41
1433 08:43:25.720511 PCI: 00:02.0 cmd <- 03
1434 08:43:25.722684 PCI: 00:08.0 cmd <- 06
1435 08:43:25.726686 PCI: 00:12.0 subsystem <- 8086/02f9
1436 08:43:25.729330 PCI: 00:12.0 cmd <- 02
1437 08:43:25.732837 PCI: 00:14.0 subsystem <- 8086/02ed
1438 08:43:25.736055 PCI: 00:14.0 cmd <- 02
1439 08:43:25.739605 PCI: 00:14.2 cmd <- 02
1440 08:43:25.742720 PCI: 00:14.3 subsystem <- 8086/02f0
1441 08:43:25.746278 PCI: 00:14.3 cmd <- 02
1442 08:43:25.749086 PCI: 00:15.0 subsystem <- 8086/02e8
1443 08:43:25.752687 PCI: 00:15.0 cmd <- 02
1444 08:43:25.755545 PCI: 00:15.1 subsystem <- 8086/02e9
1445 08:43:25.756110 PCI: 00:15.1 cmd <- 02
1446 08:43:25.762542 PCI: 00:16.0 subsystem <- 8086/02e0
1447 08:43:25.763120 PCI: 00:16.0 cmd <- 02
1448 08:43:25.769297 PCI: 00:17.0 subsystem <- 8086/02d3
1449 08:43:25.769867 PCI: 00:17.0 cmd <- 03
1450 08:43:25.772271 PCI: 00:19.0 subsystem <- 8086/02c5
1451 08:43:25.775275 PCI: 00:19.0 cmd <- 02
1452 08:43:25.778885 PCI: 00:1d.0 bridge ctrl <- 0013
1453 08:43:25.781806 PCI: 00:1d.0 subsystem <- 8086/02b0
1454 08:43:25.785302 PCI: 00:1d.0 cmd <- 06
1455 08:43:25.788000 PCI: 00:1e.0 subsystem <- 8086/02a8
1456 08:43:25.791532 PCI: 00:1e.0 cmd <- 06
1457 08:43:25.794884 PCI: 00:1e.2 subsystem <- 8086/02aa
1458 08:43:25.798384 PCI: 00:1e.2 cmd <- 06
1459 08:43:25.801850 PCI: 00:1e.3 subsystem <- 8086/02ab
1460 08:43:25.804428 PCI: 00:1e.3 cmd <- 02
1461 08:43:25.807758 PCI: 00:1f.0 subsystem <- 8086/0284
1462 08:43:25.811457 PCI: 00:1f.0 cmd <- 407
1463 08:43:25.814405 PCI: 00:1f.3 subsystem <- 8086/02c8
1464 08:43:25.817539 PCI: 00:1f.3 cmd <- 02
1465 08:43:25.821034 PCI: 00:1f.4 subsystem <- 8086/02a3
1466 08:43:25.824302 PCI: 00:1f.4 cmd <- 03
1467 08:43:25.827423 PCI: 00:1f.5 subsystem <- 8086/02a4
1468 08:43:25.830749 PCI: 00:1f.5 cmd <- 406
1469 08:43:25.838541 PCI: 01:00.0 cmd <- 02
1470 08:43:25.843458 done.
1471 08:43:25.853895 ME: Version: 14.0.39.1367
1472 08:43:25.860152 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1473 08:43:25.863331 Initializing devices...
1474 08:43:25.863865 Root Device init ...
1475 08:43:25.870384 Chrome EC: Set SMI mask to 0x0000000000000000
1476 08:43:25.876852 Chrome EC: clear events_b mask to 0x0000000000000000
1477 08:43:25.879621 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1478 08:43:25.886440 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1479 08:43:25.892898 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1480 08:43:25.896337 Chrome EC: Set WAKE mask to 0x0000000000000000
1481 08:43:25.902672 Root Device init finished in 35160 usecs
1482 08:43:25.906056 CPU_CLUSTER: 0 init ...
1483 08:43:25.909084 CPU_CLUSTER: 0 init finished in 2448 usecs
1484 08:43:25.914361 PCI: 00:00.0 init ...
1485 08:43:25.917577 CPU TDP: 15 Watts
1486 08:43:25.921076 CPU PL2 = 64 Watts
1487 08:43:25.924179 PCI: 00:00.0 init finished in 7063 usecs
1488 08:43:25.927293 PCI: 00:02.0 init ...
1489 08:43:25.930632 PCI: 00:02.0 init finished in 2253 usecs
1490 08:43:25.933997 PCI: 00:08.0 init ...
1491 08:43:25.937211 PCI: 00:08.0 init finished in 2252 usecs
1492 08:43:25.940699 PCI: 00:12.0 init ...
1493 08:43:25.943817 PCI: 00:12.0 init finished in 2253 usecs
1494 08:43:25.947048 PCI: 00:14.0 init ...
1495 08:43:25.950749 PCI: 00:14.0 init finished in 2253 usecs
1496 08:43:25.953511 PCI: 00:14.2 init ...
1497 08:43:25.956611 PCI: 00:14.2 init finished in 2252 usecs
1498 08:43:25.960073 PCI: 00:14.3 init ...
1499 08:43:25.963987 PCI: 00:14.3 init finished in 2271 usecs
1500 08:43:25.966751 PCI: 00:15.0 init ...
1501 08:43:25.970397 DW I2C bus 0 at 0xd121f000 (400 KHz)
1502 08:43:25.976281 PCI: 00:15.0 init finished in 5970 usecs
1503 08:43:25.976811 PCI: 00:15.1 init ...
1504 08:43:25.982938 DW I2C bus 1 at 0xd1220000 (400 KHz)
1505 08:43:25.986080 PCI: 00:15.1 init finished in 5976 usecs
1506 08:43:25.989340 PCI: 00:16.0 init ...
1507 08:43:25.992973 PCI: 00:16.0 init finished in 2252 usecs
1508 08:43:25.995841 PCI: 00:19.0 init ...
1509 08:43:25.999656 DW I2C bus 4 at 0xd1222000 (400 KHz)
1510 08:43:26.002690 PCI: 00:19.0 init finished in 5977 usecs
1511 08:43:26.006167 PCI: 00:1d.0 init ...
1512 08:43:26.009259 Initializing PCH PCIe bridge.
1513 08:43:26.012505 PCI: 00:1d.0 init finished in 5276 usecs
1514 08:43:26.016163 PCI: 00:1f.0 init ...
1515 08:43:26.019448 IOAPIC: Initializing IOAPIC at 0xfec00000
1516 08:43:26.025927 IOAPIC: Bootstrap Processor Local APIC = 0x00
1517 08:43:26.026397 IOAPIC: ID = 0x02
1518 08:43:26.029046 IOAPIC: Dumping registers
1519 08:43:26.032917 reg 0x0000: 0x02000000
1520 08:43:26.035711 reg 0x0001: 0x00770020
1521 08:43:26.039315 reg 0x0002: 0x00000000
1522 08:43:26.041925 PCI: 00:1f.0 init finished in 23536 usecs
1523 08:43:26.045419 PCI: 00:1f.4 init ...
1524 08:43:26.048935 PCI: 00:1f.4 init finished in 2262 usecs
1525 08:43:26.060318 PCI: 01:00.0 init ...
1526 08:43:26.063435 PCI: 01:00.0 init finished in 2252 usecs
1527 08:43:26.068050 PNP: 0c09.0 init ...
1528 08:43:26.074381 Google Chrome EC uptime: 11.132 seconds
1529 08:43:26.077904 Google Chrome AP resets since EC boot: 0
1530 08:43:26.081063 Google Chrome most recent AP reset causes:
1531 08:43:26.087226 Google Chrome EC reset flags at last EC boot: reset-pin
1532 08:43:26.090710 PNP: 0c09.0 init finished in 20592 usecs
1533 08:43:26.094318 Devices initialized
1534 08:43:26.097330 Show all devs... After init.
1535 08:43:26.097787 Root Device: enabled 1
1536 08:43:26.101144 CPU_CLUSTER: 0: enabled 1
1537 08:43:26.103894 DOMAIN: 0000: enabled 1
1538 08:43:26.107543 APIC: 00: enabled 1
1539 08:43:26.108072 PCI: 00:00.0: enabled 1
1540 08:43:26.110490 PCI: 00:02.0: enabled 1
1541 08:43:26.113919 PCI: 00:04.0: enabled 0
1542 08:43:26.117338 PCI: 00:05.0: enabled 0
1543 08:43:26.117803 PCI: 00:12.0: enabled 1
1544 08:43:26.120411 PCI: 00:12.5: enabled 0
1545 08:43:26.123352 PCI: 00:12.6: enabled 0
1546 08:43:26.123864 PCI: 00:14.0: enabled 1
1547 08:43:26.126886 PCI: 00:14.1: enabled 0
1548 08:43:26.130128 PCI: 00:14.3: enabled 1
1549 08:43:26.133609 PCI: 00:14.5: enabled 0
1550 08:43:26.134075 PCI: 00:15.0: enabled 1
1551 08:43:26.136688 PCI: 00:15.1: enabled 1
1552 08:43:26.139649 PCI: 00:15.2: enabled 0
1553 08:43:26.143939 PCI: 00:15.3: enabled 0
1554 08:43:26.144585 PCI: 00:16.0: enabled 1
1555 08:43:26.146189 PCI: 00:16.1: enabled 0
1556 08:43:26.150064 PCI: 00:16.2: enabled 0
1557 08:43:26.153134 PCI: 00:16.3: enabled 0
1558 08:43:26.153593 PCI: 00:16.4: enabled 0
1559 08:43:26.155887 PCI: 00:16.5: enabled 0
1560 08:43:26.159511 PCI: 00:17.0: enabled 1
1561 08:43:26.162341 PCI: 00:19.0: enabled 1
1562 08:43:26.162798 PCI: 00:19.1: enabled 0
1563 08:43:26.165990 PCI: 00:19.2: enabled 0
1564 08:43:26.169037 PCI: 00:1a.0: enabled 0
1565 08:43:26.172441 PCI: 00:1c.0: enabled 0
1566 08:43:26.172898 PCI: 00:1c.1: enabled 0
1567 08:43:26.175934 PCI: 00:1c.2: enabled 0
1568 08:43:26.178817 PCI: 00:1c.3: enabled 0
1569 08:43:26.181938 PCI: 00:1c.4: enabled 0
1570 08:43:26.182402 PCI: 00:1c.5: enabled 0
1571 08:43:26.185458 PCI: 00:1c.6: enabled 0
1572 08:43:26.188667 PCI: 00:1c.7: enabled 0
1573 08:43:26.191877 PCI: 00:1d.0: enabled 1
1574 08:43:26.192333 PCI: 00:1d.1: enabled 0
1575 08:43:26.195364 PCI: 00:1d.2: enabled 0
1576 08:43:26.198300 PCI: 00:1d.3: enabled 0
1577 08:43:26.202278 PCI: 00:1d.4: enabled 0
1578 08:43:26.202835 PCI: 00:1d.5: enabled 0
1579 08:43:26.204844 PCI: 00:1e.0: enabled 1
1580 08:43:26.208448 PCI: 00:1e.1: enabled 0
1581 08:43:26.211302 PCI: 00:1e.2: enabled 1
1582 08:43:26.211880 PCI: 00:1e.3: enabled 1
1583 08:43:26.214666 PCI: 00:1f.0: enabled 1
1584 08:43:26.218002 PCI: 00:1f.1: enabled 0
1585 08:43:26.220992 PCI: 00:1f.2: enabled 0
1586 08:43:26.221448 PCI: 00:1f.3: enabled 1
1587 08:43:26.224932 PCI: 00:1f.4: enabled 1
1588 08:43:26.227588 PCI: 00:1f.5: enabled 1
1589 08:43:26.230958 PCI: 00:1f.6: enabled 0
1590 08:43:26.231485 USB0 port 0: enabled 1
1591 08:43:26.234088 I2C: 01:15: enabled 1
1592 08:43:26.237258 I2C: 02:5d: enabled 1
1593 08:43:26.237733 GENERIC: 0.0: enabled 1
1594 08:43:26.240841 I2C: 03:1a: enabled 1
1595 08:43:26.243943 I2C: 03:38: enabled 1
1596 08:43:26.247695 I2C: 03:39: enabled 1
1597 08:43:26.248291 I2C: 03:3a: enabled 1
1598 08:43:26.250524 I2C: 03:3b: enabled 1
1599 08:43:26.254082 PCI: 00:00.0: enabled 1
1600 08:43:26.254644 SPI: 00: enabled 1
1601 08:43:26.257119 SPI: 01: enabled 1
1602 08:43:26.260729 PNP: 0c09.0: enabled 1
1603 08:43:26.261186 USB2 port 0: enabled 1
1604 08:43:26.263415 USB2 port 1: enabled 1
1605 08:43:26.267028 USB2 port 2: enabled 0
1606 08:43:26.267533 USB2 port 3: enabled 0
1607 08:43:26.270053 USB2 port 5: enabled 0
1608 08:43:26.273711 USB2 port 6: enabled 1
1609 08:43:26.276846 USB2 port 9: enabled 1
1610 08:43:26.277306 USB3 port 0: enabled 1
1611 08:43:26.279959 USB3 port 1: enabled 1
1612 08:43:26.283187 USB3 port 2: enabled 1
1613 08:43:26.283802 USB3 port 3: enabled 1
1614 08:43:26.286428 USB3 port 4: enabled 0
1615 08:43:26.289645 APIC: 02: enabled 1
1616 08:43:26.290101 APIC: 07: enabled 1
1617 08:43:26.292714 APIC: 01: enabled 1
1618 08:43:26.296081 APIC: 03: enabled 1
1619 08:43:26.296542 APIC: 04: enabled 1
1620 08:43:26.299412 APIC: 05: enabled 1
1621 08:43:26.299894 APIC: 06: enabled 1
1622 08:43:26.302885 PCI: 00:08.0: enabled 1
1623 08:43:26.305956 PCI: 00:14.2: enabled 1
1624 08:43:26.309433 PCI: 01:00.0: enabled 1
1625 08:43:26.312726 Disabling ACPI via APMC:
1626 08:43:26.316091 done.
1627 08:43:26.319161 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1628 08:43:26.322404 ELOG: NV offset 0xaf0000 size 0x4000
1629 08:43:26.329854 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1630 08:43:26.335983 ELOG: Event(17) added with size 13 at 2023-08-07 08:43:26 UTC
1631 08:43:26.342969 ELOG: Event(92) added with size 9 at 2023-08-07 08:43:26 UTC
1632 08:43:26.349514 ELOG: Event(93) added with size 9 at 2023-08-07 08:43:26 UTC
1633 08:43:26.355935 ELOG: Event(9A) added with size 9 at 2023-08-07 08:43:26 UTC
1634 08:43:26.362528 ELOG: Event(9E) added with size 10 at 2023-08-07 08:43:26 UTC
1635 08:43:26.368666 ELOG: Event(9F) added with size 14 at 2023-08-07 08:43:26 UTC
1636 08:43:26.375238 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1637 08:43:26.381957 ELOG: Event(A1) added with size 10 at 2023-08-07 08:43:26 UTC
1638 08:43:26.388428 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1639 08:43:26.395014 ELOG: Event(A0) added with size 9 at 2023-08-07 08:43:26 UTC
1640 08:43:26.398443 elog_add_boot_reason: Logged dev mode boot
1641 08:43:26.401605 Finalize devices...
1642 08:43:26.404579 PCI: 00:17.0 final
1643 08:43:26.405039 Devices finalized
1644 08:43:26.411020 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1645 08:43:26.414356 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1646 08:43:26.420607 ME: HFSTS1 : 0x90000245
1647 08:43:26.423939 ME: HFSTS2 : 0x3B850126
1648 08:43:26.427332 ME: HFSTS3 : 0x00000020
1649 08:43:26.434101 ME: HFSTS4 : 0x00004800
1650 08:43:26.437544 ME: HFSTS5 : 0x00000000
1651 08:43:26.440311 ME: HFSTS6 : 0x40400006
1652 08:43:26.443538 ME: Manufacturing Mode : NO
1653 08:43:26.446843 ME: FW Partition Table : OK
1654 08:43:26.450465 ME: Bringup Loader Failure : NO
1655 08:43:26.453280 ME: Firmware Init Complete : YES
1656 08:43:26.457107 ME: Boot Options Present : NO
1657 08:43:26.459895 ME: Update In Progress : NO
1658 08:43:26.463544 ME: D0i3 Support : YES
1659 08:43:26.466320 ME: Low Power State Enabled : NO
1660 08:43:26.469854 ME: CPU Replaced : NO
1661 08:43:26.473177 ME: CPU Replacement Valid : YES
1662 08:43:26.475938 ME: Current Working State : 5
1663 08:43:26.479292 ME: Current Operation State : 1
1664 08:43:26.483052 ME: Current Operation Mode : 0
1665 08:43:26.486097 ME: Error Code : 0
1666 08:43:26.489010 ME: CPU Debug Disabled : YES
1667 08:43:26.492200 ME: TXT Support : NO
1668 08:43:26.498946 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1669 08:43:26.505327 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1670 08:43:26.505868 CBFS @ c08000 size 3f8000
1671 08:43:26.512011 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1672 08:43:26.515540 CBFS: Locating 'fallback/dsdt.aml'
1673 08:43:26.518336 CBFS: Found @ offset 10bb80 size 3fa5
1674 08:43:26.525086 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1675 08:43:26.528380 CBFS @ c08000 size 3f8000
1676 08:43:26.534934 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1677 08:43:26.538371 CBFS: Locating 'fallback/slic'
1678 08:43:26.541317 CBFS: 'fallback/slic' not found.
1679 08:43:26.544406 ACPI: Writing ACPI tables at 99b3e000.
1680 08:43:26.548129 ACPI: * FACS
1681 08:43:26.548703 ACPI: * DSDT
1682 08:43:26.554416 Ramoops buffer: 0x100000@0x99a3d000.
1683 08:43:26.558189 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1684 08:43:26.561299 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1685 08:43:26.564730 Google Chrome EC: version:
1686 08:43:26.568341 ro: helios_v2.0.2659-56403530b
1687 08:43:26.571435 rw: helios_v2.0.2849-c41de27e7d
1688 08:43:26.574854 running image: 1
1689 08:43:26.577763 ACPI: * FADT
1690 08:43:26.578220 SCI is IRQ9
1691 08:43:26.584309 ACPI: added table 1/32, length now 40
1692 08:43:26.584871 ACPI: * SSDT
1693 08:43:26.587843 Found 1 CPU(s) with 8 core(s) each.
1694 08:43:26.594340 Error: Could not locate 'wifi_sar' in VPD.
1695 08:43:26.597554 Checking CBFS for default SAR values
1696 08:43:26.600376 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1697 08:43:26.603916 CBFS @ c08000 size 3f8000
1698 08:43:26.610374 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1699 08:43:26.613480 CBFS: Locating 'wifi_sar_defaults.hex'
1700 08:43:26.616910 CBFS: Found @ offset 5fac0 size 77
1701 08:43:26.619962 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1702 08:43:26.626483 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1703 08:43:26.630301 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1704 08:43:26.636956 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1705 08:43:26.639726 failed to find key in VPD: dsm_calib_r0_0
1706 08:43:26.649396 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1707 08:43:26.655961 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1708 08:43:26.659155 failed to find key in VPD: dsm_calib_r0_1
1709 08:43:26.668825 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1710 08:43:26.672386 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1711 08:43:26.675885 failed to find key in VPD: dsm_calib_r0_2
1712 08:43:26.685626 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1713 08:43:26.692122 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1714 08:43:26.694806 failed to find key in VPD: dsm_calib_r0_3
1715 08:43:26.704683 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1716 08:43:26.711740 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1717 08:43:26.714546 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1718 08:43:26.717773 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1719 08:43:26.721097 EC returned error result code 1
1720 08:43:26.724738 EC returned error result code 1
1721 08:43:26.728136 EC returned error result code 1
1722 08:43:26.734555 PS2K: Bad resp from EC. Vivaldi disabled!
1723 08:43:26.741021 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1724 08:43:26.744607 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1725 08:43:26.750666 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1726 08:43:26.754295 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1727 08:43:26.760603 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1728 08:43:26.767463 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1729 08:43:26.773904 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1730 08:43:26.780168 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1731 08:43:26.783439 ACPI: added table 2/32, length now 44
1732 08:43:26.784029 ACPI: * MCFG
1733 08:43:26.789782 ACPI: added table 3/32, length now 48
1734 08:43:26.790246 ACPI: * TPM2
1735 08:43:26.793359 TPM2 log created at 99a2d000
1736 08:43:26.796703 ACPI: added table 4/32, length now 52
1737 08:43:26.799919 ACPI: * MADT
1738 08:43:26.800383 SCI is IRQ9
1739 08:43:26.802704 ACPI: added table 5/32, length now 56
1740 08:43:26.806218 current = 99b43ac0
1741 08:43:26.806685 ACPI: * DMAR
1742 08:43:26.809160 ACPI: added table 6/32, length now 60
1743 08:43:26.812710 ACPI: * IGD OpRegion
1744 08:43:26.816383 GMA: Found VBT in CBFS
1745 08:43:26.818985 GMA: Found valid VBT in CBFS
1746 08:43:26.822109 ACPI: added table 7/32, length now 64
1747 08:43:26.822577 ACPI: * HPET
1748 08:43:26.829027 ACPI: added table 8/32, length now 68
1749 08:43:26.829496 ACPI: done.
1750 08:43:26.832424 ACPI tables: 31744 bytes.
1751 08:43:26.835991 smbios_write_tables: 99a2c000
1752 08:43:26.838807 EC returned error result code 3
1753 08:43:26.842346 Couldn't obtain OEM name from CBI
1754 08:43:26.845383 Create SMBIOS type 17
1755 08:43:26.848818 PCI: 00:00.0 (Intel Cannonlake)
1756 08:43:26.851955 PCI: 00:14.3 (Intel WiFi)
1757 08:43:26.852502 SMBIOS tables: 939 bytes.
1758 08:43:26.858558 Writing table forward entry at 0x00000500
1759 08:43:26.861941 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1760 08:43:26.868184 Writing coreboot table at 0x99b62000
1761 08:43:26.871598 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1762 08:43:26.878372 1. 0000000000001000-000000000009ffff: RAM
1763 08:43:26.881488 2. 00000000000a0000-00000000000fffff: RESERVED
1764 08:43:26.888107 3. 0000000000100000-0000000099a2bfff: RAM
1765 08:43:26.891143 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1766 08:43:26.897627 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1767 08:43:26.904073 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1768 08:43:26.907622 7. 000000009a000000-000000009f7fffff: RESERVED
1769 08:43:26.914036 8. 00000000e0000000-00000000efffffff: RESERVED
1770 08:43:26.917276 9. 00000000fc000000-00000000fc000fff: RESERVED
1771 08:43:26.920255 10. 00000000fe000000-00000000fe00ffff: RESERVED
1772 08:43:26.927196 11. 00000000fed10000-00000000fed17fff: RESERVED
1773 08:43:26.930541 12. 00000000fed80000-00000000fed83fff: RESERVED
1774 08:43:26.936812 13. 00000000fed90000-00000000fed91fff: RESERVED
1775 08:43:26.940045 14. 00000000feda0000-00000000feda1fff: RESERVED
1776 08:43:26.946676 15. 0000000100000000-000000045e7fffff: RAM
1777 08:43:26.949767 Graphics framebuffer located at 0xc0000000
1778 08:43:26.952866 Passing 5 GPIOs to payload:
1779 08:43:26.956718 NAME | PORT | POLARITY | VALUE
1780 08:43:26.962699 write protect | undefined | high | low
1781 08:43:26.969201 lid | undefined | high | high
1782 08:43:26.972734 power | undefined | high | low
1783 08:43:26.979108 oprom | undefined | high | low
1784 08:43:26.985667 EC in RW | 0x000000cb | high | low
1785 08:43:26.986215 Board ID: 4
1786 08:43:26.988730 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1787 08:43:26.992158 CBFS @ c08000 size 3f8000
1788 08:43:26.998548 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1789 08:43:27.005172 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d56
1790 08:43:27.008479 coreboot table: 1492 bytes.
1791 08:43:27.012045 IMD ROOT 0. 99fff000 00001000
1792 08:43:27.014854 IMD SMALL 1. 99ffe000 00001000
1793 08:43:27.018348 FSP MEMORY 2. 99c4e000 003b0000
1794 08:43:27.021530 CONSOLE 3. 99c2e000 00020000
1795 08:43:27.024961 FMAP 4. 99c2d000 0000054e
1796 08:43:27.027838 TIME STAMP 5. 99c2c000 00000910
1797 08:43:27.031265 VBOOT WORK 6. 99c18000 00014000
1798 08:43:27.034391 MRC DATA 7. 99c16000 00001958
1799 08:43:27.037416 ROMSTG STCK 8. 99c15000 00001000
1800 08:43:27.041208 AFTER CAR 9. 99c0b000 0000a000
1801 08:43:27.043906 RAMSTAGE 10. 99baf000 0005c000
1802 08:43:27.047758 REFCODE 11. 99b7a000 00035000
1803 08:43:27.050382 SMM BACKUP 12. 99b6a000 00010000
1804 08:43:27.054087 COREBOOT 13. 99b62000 00008000
1805 08:43:27.057631 ACPI 14. 99b3e000 00024000
1806 08:43:27.060576 ACPI GNVS 15. 99b3d000 00001000
1807 08:43:27.063738 RAMOOPS 16. 99a3d000 00100000
1808 08:43:27.066865 TPM2 TCGLOG17. 99a2d000 00010000
1809 08:43:27.070044 SMBIOS 18. 99a2c000 00000800
1810 08:43:27.073643 IMD small region:
1811 08:43:27.076653 IMD ROOT 0. 99ffec00 00000400
1812 08:43:27.079925 FSP RUNTIME 1. 99ffebe0 00000004
1813 08:43:27.083254 EC HOSTEVENT 2. 99ffebc0 00000008
1814 08:43:27.086511 POWER STATE 3. 99ffeb80 00000040
1815 08:43:27.089845 ROMSTAGE 4. 99ffeb60 00000004
1816 08:43:27.093280 MEM INFO 5. 99ffe9a0 000001b9
1817 08:43:27.096483 VPD 6. 99ffe920 0000006c
1818 08:43:27.099767 MTRR: Physical address space:
1819 08:43:27.105814 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1820 08:43:27.112889 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1821 08:43:27.119351 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1822 08:43:27.125885 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1823 08:43:27.132179 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1824 08:43:27.138712 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1825 08:43:27.145462 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1826 08:43:27.148590 MTRR: Fixed MSR 0x250 0x0606060606060606
1827 08:43:27.152045 MTRR: Fixed MSR 0x258 0x0606060606060606
1828 08:43:27.155047 MTRR: Fixed MSR 0x259 0x0000000000000000
1829 08:43:27.161675 MTRR: Fixed MSR 0x268 0x0606060606060606
1830 08:43:27.165003 MTRR: Fixed MSR 0x269 0x0606060606060606
1831 08:43:27.167878 MTRR: Fixed MSR 0x26a 0x0606060606060606
1832 08:43:27.171253 MTRR: Fixed MSR 0x26b 0x0606060606060606
1833 08:43:27.178200 MTRR: Fixed MSR 0x26c 0x0606060606060606
1834 08:43:27.181848 MTRR: Fixed MSR 0x26d 0x0606060606060606
1835 08:43:27.184270 MTRR: Fixed MSR 0x26e 0x0606060606060606
1836 08:43:27.187325 MTRR: Fixed MSR 0x26f 0x0606060606060606
1837 08:43:27.191742 call enable_fixed_mtrr()
1838 08:43:27.194692 CPU physical address size: 39 bits
1839 08:43:27.201329 MTRR: default type WB/UC MTRR counts: 6/8.
1840 08:43:27.204305 MTRR: WB selected as default type.
1841 08:43:27.211429 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1842 08:43:27.217705 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1843 08:43:27.220546 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1844 08:43:27.227629 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1845 08:43:27.234273 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1846 08:43:27.240178 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1847 08:43:27.247020 MTRR: Fixed MSR 0x250 0x0606060606060606
1848 08:43:27.250390 MTRR: Fixed MSR 0x258 0x0606060606060606
1849 08:43:27.253081 MTRR: Fixed MSR 0x259 0x0000000000000000
1850 08:43:27.256668 MTRR: Fixed MSR 0x268 0x0606060606060606
1851 08:43:27.263453 MTRR: Fixed MSR 0x269 0x0606060606060606
1852 08:43:27.266084 MTRR: Fixed MSR 0x26a 0x0606060606060606
1853 08:43:27.269727 MTRR: Fixed MSR 0x26b 0x0606060606060606
1854 08:43:27.275927 MTRR: Fixed MSR 0x26c 0x0606060606060606
1855 08:43:27.279437 MTRR: Fixed MSR 0x26d 0x0606060606060606
1856 08:43:27.282359 MTRR: Fixed MSR 0x26e 0x0606060606060606
1857 08:43:27.286156 MTRR: Fixed MSR 0x26f 0x0606060606060606
1858 08:43:27.286574
1859 08:43:27.289491 MTRR check
1860 08:43:27.292536 Fixed MTRRs : Enabled
1861 08:43:27.292953 Variable MTRRs: Enabled
1862 08:43:27.293286
1863 08:43:27.295495 call enable_fixed_mtrr()
1864 08:43:27.302095 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1865 08:43:27.306285 CPU physical address size: 39 bits
1866 08:43:27.308921 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1867 08:43:27.315211 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 08:43:27.318424 MTRR: Fixed MSR 0x250 0x0606060606060606
1869 08:43:27.321599 MTRR: Fixed MSR 0x258 0x0606060606060606
1870 08:43:27.325163 MTRR: Fixed MSR 0x259 0x0000000000000000
1871 08:43:27.331782 MTRR: Fixed MSR 0x268 0x0606060606060606
1872 08:43:27.334957 MTRR: Fixed MSR 0x269 0x0606060606060606
1873 08:43:27.338147 MTRR: Fixed MSR 0x26a 0x0606060606060606
1874 08:43:27.341458 MTRR: Fixed MSR 0x26b 0x0606060606060606
1875 08:43:27.347754 MTRR: Fixed MSR 0x26c 0x0606060606060606
1876 08:43:27.351097 MTRR: Fixed MSR 0x26d 0x0606060606060606
1877 08:43:27.354175 MTRR: Fixed MSR 0x26e 0x0606060606060606
1878 08:43:27.357414 MTRR: Fixed MSR 0x26f 0x0606060606060606
1879 08:43:27.364395 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 08:43:27.367482 call enable_fixed_mtrr()
1881 08:43:27.371019 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 08:43:27.373977 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 08:43:27.377485 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 08:43:27.383717 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 08:43:27.387330 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 08:43:27.390340 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 08:43:27.393825 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 08:43:27.399939 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 08:43:27.403215 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 08:43:27.406935 CPU physical address size: 39 bits
1891 08:43:27.409966 call enable_fixed_mtrr()
1892 08:43:27.413423 CBFS @ c08000 size 3f8000
1893 08:43:27.416174 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 08:43:27.419638 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 08:43:27.425983 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 08:43:27.429362 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 08:43:27.432541 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 08:43:27.435761 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 08:43:27.442501 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 08:43:27.445666 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 08:43:27.448667 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 08:43:27.451906 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 08:43:27.458696 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 08:43:27.461849 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 08:43:27.465117 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 08:43:27.468526 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 08:43:27.474814 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 08:43:27.478171 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 08:43:27.481585 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 08:43:27.485072 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 08:43:27.491453 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 08:43:27.494874 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 08:43:27.497958 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 08:43:27.501521 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 08:43:27.504545 call enable_fixed_mtrr()
1916 08:43:27.508254 call enable_fixed_mtrr()
1917 08:43:27.511027 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 08:43:27.517212 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 08:43:27.520856 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 08:43:27.523555 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 08:43:27.527200 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 08:43:27.533766 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 08:43:27.536765 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 08:43:27.540276 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 08:43:27.543163 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 08:43:27.549918 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 08:43:27.553483 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 08:43:27.556784 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 08:43:27.562974 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 08:43:27.566216 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 08:43:27.569382 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 08:43:27.572907 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 08:43:27.578916 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 08:43:27.582347 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 08:43:27.585636 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 08:43:27.588782 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 08:43:27.595440 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 08:43:27.598685 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 08:43:27.602005 call enable_fixed_mtrr()
1940 08:43:27.602467 call enable_fixed_mtrr()
1941 08:43:27.608447 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1942 08:43:27.611722 CPU physical address size: 39 bits
1943 08:43:27.615169 CPU physical address size: 39 bits
1944 08:43:27.618810 CPU physical address size: 39 bits
1945 08:43:27.625275 CPU physical address size: 39 bits
1946 08:43:27.628551 CPU physical address size: 39 bits
1947 08:43:27.631343 CBFS: Locating 'fallback/payload'
1948 08:43:27.634865 CBFS: Found @ offset 1c96c0 size 3f798
1949 08:43:27.641575 Checking segment from ROM address 0xffdd16f8
1950 08:43:27.644808 Checking segment from ROM address 0xffdd1714
1951 08:43:27.647830 Loading segment from ROM address 0xffdd16f8
1952 08:43:27.651315 code (compression=0)
1953 08:43:27.661044 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1954 08:43:27.667471 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1955 08:43:27.670989 it's not compressed!
1956 08:43:27.762904 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1957 08:43:27.769240 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1958 08:43:27.775623 Loading segment from ROM address 0xffdd1714
1959 08:43:27.776130 Entry Point 0x30000000
1960 08:43:27.778866 Loaded segments
1961 08:43:27.785270 Finalizing chipset.
1962 08:43:27.788236 Finalizing SMM.
1963 08:43:27.791730 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1964 08:43:27.794594 mp_park_aps done after 0 msecs.
1965 08:43:27.801426 Jumping to boot code at 30000000(99b62000)
1966 08:43:27.807916 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1967 08:43:27.808557
1968 08:43:27.809000
1969 08:43:27.809359
1970 08:43:27.811288 Starting depthcharge on Helios...
1971 08:43:27.811875
1972 08:43:27.813075 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1973 08:43:27.813671 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1974 08:43:27.814138 Setting prompt string to ['hatch:']
1975 08:43:27.814665 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1976 08:43:27.820907 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1977 08:43:27.821462
1978 08:43:27.827707 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1979 08:43:27.828171
1980 08:43:27.833889 board_setup: Info: eMMC controller not present; skipping
1981 08:43:27.834460
1982 08:43:27.837121 New NVMe Controller 0x30053ac0 @ 00:1d:00
1983 08:43:27.837726
1984 08:43:27.843883 board_setup: Info: SDHCI controller not present; skipping
1985 08:43:27.844352
1986 08:43:27.850222 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1987 08:43:27.850701
1988 08:43:27.851168 Wipe memory regions:
1989 08:43:27.851635
1990 08:43:27.856979 [0x00000000001000, 0x000000000a0000)
1991 08:43:27.857532
1992 08:43:27.860266 [0x00000000100000, 0x00000030000000)
1993 08:43:27.920822
1994 08:43:27.923678 [0x00000030657430, 0x00000099a2c000)
1995 08:43:28.060816
1996 08:43:28.064151 [0x00000100000000, 0x0000045e800000)
1997 08:43:29.436949
1998 08:43:29.437500 R8152: Initializing
1999 08:43:29.438057
2000 08:43:29.440125 Version 9 (ocp_data = 6010)
2001 08:43:30.046372
2002 08:43:30.046898 R8152: Initializing
2003 08:43:30.047270
2004 08:43:30.049374 Version 6 (ocp_data = 5c30)
2005 08:43:30.049828
2006 08:43:30.053069 R8152: Done initializing
2007 08:43:30.053527
2008 08:43:30.056310 Adding net device
2009 08:43:30.056768
2010 08:43:30.063276 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2011 08:43:30.063918
2012 08:43:30.064300
2013 08:43:30.064661
2014 08:43:30.065451 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2016 08:43:30.166640 hatch: tftpboot 192.168.201.1 11220723/tftp-deploy-t25zlu2g/kernel/bzImage 11220723/tftp-deploy-t25zlu2g/kernel/cmdline 11220723/tftp-deploy-t25zlu2g/ramdisk/ramdisk.cpio.gz
2017 08:43:30.167251 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2018 08:43:30.167760 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2019 08:43:30.172338 tftpboot 192.168.201.1 11220723/tftp-deploy-t25zlu2g/kernel/bzIloy-t25zlu2g/kernel/cmdline 11220723/tftp-deploy-t25zlu2g/ramdisk/ramdisk.cpio.gz
2020 08:43:30.172993
2021 08:43:30.173568 Waiting for link
2022 08:43:30.372875
2023 08:43:30.373426 done.
2024 08:43:30.373891
2025 08:43:30.374267 MAC: 00:24:32:50:21:91
2026 08:43:30.374657
2027 08:43:30.376315 Sending DHCP discover... done.
2028 08:43:30.376819
2029 08:43:30.379550 Waiting for reply... done.
2030 08:43:30.380035
2031 08:43:30.382883 Sending DHCP request... done.
2032 08:43:30.383426
2033 08:43:30.389644 Waiting for reply... done.
2034 08:43:30.390104
2035 08:43:30.390464 My ip is 192.168.201.14
2036 08:43:30.390800
2037 08:43:30.392505 The DHCP server ip is 192.168.201.1
2038 08:43:30.395860
2039 08:43:30.399408 TFTP server IP predefined by user: 192.168.201.1
2040 08:43:30.399966
2041 08:43:30.405610 Bootfile predefined by user: 11220723/tftp-deploy-t25zlu2g/kernel/bzImage
2042 08:43:30.406070
2043 08:43:30.409020 Sending tftp read request... done.
2044 08:43:30.409474
2045 08:43:30.418647 Waiting for the transfer...
2046 08:43:30.419121
2047 08:43:31.093587 00000000 ################################################################
2048 08:43:31.094149
2049 08:43:31.763963 00080000 ################################################################
2050 08:43:31.764623
2051 08:43:32.413914 00100000 ################################################################
2052 08:43:32.414429
2053 08:43:33.095487 00180000 ################################################################
2054 08:43:33.095976
2055 08:43:33.765798 00200000 ################################################################
2056 08:43:33.766352
2057 08:43:34.408056 00280000 ################################################################
2058 08:43:34.408192
2059 08:43:34.935507 00300000 ################################################################
2060 08:43:34.935639
2061 08:43:35.475859 00380000 ################################################################
2062 08:43:35.476023
2063 08:43:35.997951 00400000 ################################################################
2064 08:43:35.998104
2065 08:43:36.521268 00480000 ################################################################
2066 08:43:36.521410
2067 08:43:37.043416 00500000 ################################################################
2068 08:43:37.043545
2069 08:43:37.564103 00580000 ################################################################
2070 08:43:37.564259
2071 08:43:38.093340 00600000 ################################################################
2072 08:43:38.093477
2073 08:43:38.626273 00680000 ################################################################
2074 08:43:38.626416
2075 08:43:39.161030 00700000 ################################################################
2076 08:43:39.161161
2077 08:43:39.182719 00780000 ### done.
2078 08:43:39.182814
2079 08:43:39.185735 The bootfile was 7884688 bytes long.
2080 08:43:39.185817
2081 08:43:39.189152 Sending tftp read request... done.
2082 08:43:39.189234
2083 08:43:39.191895 Waiting for the transfer...
2084 08:43:39.191976
2085 08:43:39.734044 00000000 ################################################################
2086 08:43:39.734215
2087 08:43:40.261029 00080000 ################################################################
2088 08:43:40.261213
2089 08:43:40.794027 00100000 ################################################################
2090 08:43:40.794222
2091 08:43:41.324634 00180000 ################################################################
2092 08:43:41.324841
2093 08:43:41.857252 00200000 ################################################################
2094 08:43:41.857401
2095 08:43:42.389235 00280000 ################################################################
2096 08:43:42.389372
2097 08:43:42.944314 00300000 ################################################################
2098 08:43:42.944450
2099 08:43:43.476413 00380000 ################################################################
2100 08:43:43.476558
2101 08:43:43.997439 00400000 ################################################################
2102 08:43:43.997621
2103 08:43:44.510285 00480000 ################################################################
2104 08:43:44.510461
2105 08:43:45.059608 00500000 ################################################################
2106 08:43:45.059796
2107 08:43:45.594565 00580000 ################################################################
2108 08:43:45.594699
2109 08:43:46.127909 00600000 ################################################################
2110 08:43:46.128083
2111 08:43:46.671407 00680000 ################################################################
2112 08:43:46.671565
2113 08:43:47.211409 00700000 ################################################################
2114 08:43:47.211540
2115 08:43:47.746504 00780000 ################################################################
2116 08:43:47.746640
2117 08:43:48.188228 00800000 ###################################################### done.
2118 08:43:48.188364
2119 08:43:48.191365 Sending tftp read request... done.
2120 08:43:48.191471
2121 08:43:48.194326 Waiting for the transfer...
2122 08:43:48.194408
2123 08:43:48.194473 00000000 # done.
2124 08:43:48.194536
2125 08:43:48.204621 Command line loaded dynamically from TFTP file: 11220723/tftp-deploy-t25zlu2g/kernel/cmdline
2126 08:43:48.204705
2127 08:43:48.223714 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2128 08:43:48.223802
2129 08:43:48.230438 ec_init(0): CrosEC protocol v3 supported (256, 256)
2130 08:43:48.235273
2131 08:43:48.238527 Shutting down all USB controllers.
2132 08:43:48.242130
2133 08:43:48.242210 Removing current net device
2134 08:43:48.245643
2135 08:43:48.245723 Finalizing coreboot
2136 08:43:48.245791
2137 08:43:48.252414 Exiting depthcharge with code 4 at timestamp: 27780519
2138 08:43:48.252496
2139 08:43:48.252561
2140 08:43:48.252621 Starting kernel ...
2141 08:43:48.252988 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2142 08:43:48.253084 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2143 08:43:48.253162 Setting prompt string to ['Linux version [0-9]']
2144 08:43:48.253229 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2145 08:43:48.253295 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2146 08:43:48.255610
2147 08:43:48.255691
2149 08:48:10.254175 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2151 08:48:10.255169 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2153 08:48:10.256026 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2156 08:48:10.257382 end: 2 depthcharge-action (duration 00:05:00) [common]
2158 08:48:10.258121 Cleaning after the job
2159 08:48:10.258213 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220723/tftp-deploy-t25zlu2g/ramdisk
2160 08:48:10.259527 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220723/tftp-deploy-t25zlu2g/kernel
2161 08:48:10.260710 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220723/tftp-deploy-t25zlu2g/modules
2162 08:48:10.261163 start: 5.1 power-off (timeout 00:00:30) [common]
2163 08:48:10.261319 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2164 08:48:10.332851 >> Command sent successfully.
2165 08:48:10.336766 Returned 0 in 0 seconds
2166 08:48:10.437692 end: 5.1 power-off (duration 00:00:00) [common]
2168 08:48:10.439150 start: 5.2 read-feedback (timeout 00:10:00) [common]
2169 08:48:10.440693 Listened to connection for namespace 'common' for up to 1s
2170 08:48:11.441164 Finalising connection for namespace 'common'
2171 08:48:11.441841 Disconnecting from shell: Finalise
2172 08:48:11.442263
2173 08:48:11.543519 end: 5.2 read-feedback (duration 00:00:01) [common]
2174 08:48:11.544067 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11220723
2175 08:48:11.564278 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11220723
2176 08:48:11.564426 JobError: Your job cannot terminate cleanly.