Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 08:43:04.748996 lava-dispatcher, installed at version: 2023.05.1
2 08:43:04.749206 start: 0 validate
3 08:43:04.749333 Start time: 2023-08-07 08:43:04.749325+00:00 (UTC)
4 08:43:04.749453 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:43:04.749588 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 08:43:05.020329 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:43:05.021188 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:43:14.027701 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:43:14.028467 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 08:43:15.035884 validate duration: 10.29
12 08:43:15.036148 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 08:43:15.036272 start: 1.1 download-retry (timeout 00:10:00) [common]
14 08:43:15.036355 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 08:43:15.036480 Not decompressing ramdisk as can be used compressed.
16 08:43:15.036565 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 08:43:15.036628 saving as /var/lib/lava/dispatcher/tmp/11220707/tftp-deploy-f60wx2zm/ramdisk/rootfs.cpio.gz
18 08:43:15.036734 total size: 8418130 (8MB)
19 08:43:15.037836 progress 0% (0MB)
20 08:43:15.040066 progress 5% (0MB)
21 08:43:15.042442 progress 10% (0MB)
22 08:43:15.044878 progress 15% (1MB)
23 08:43:15.047117 progress 20% (1MB)
24 08:43:15.049385 progress 25% (2MB)
25 08:43:15.051611 progress 30% (2MB)
26 08:43:15.053709 progress 35% (2MB)
27 08:43:15.055927 progress 40% (3MB)
28 08:43:15.058204 progress 45% (3MB)
29 08:43:15.060407 progress 50% (4MB)
30 08:43:15.062656 progress 55% (4MB)
31 08:43:15.065030 progress 60% (4MB)
32 08:43:15.067307 progress 65% (5MB)
33 08:43:15.069663 progress 70% (5MB)
34 08:43:15.071882 progress 75% (6MB)
35 08:43:15.074129 progress 80% (6MB)
36 08:43:15.076325 progress 85% (6MB)
37 08:43:15.078578 progress 90% (7MB)
38 08:43:15.080796 progress 95% (7MB)
39 08:43:15.082839 progress 100% (8MB)
40 08:43:15.083066 8MB downloaded in 0.05s (173.23MB/s)
41 08:43:15.083213 end: 1.1.1 http-download (duration 00:00:00) [common]
43 08:43:15.083445 end: 1.1 download-retry (duration 00:00:00) [common]
44 08:43:15.083530 start: 1.2 download-retry (timeout 00:10:00) [common]
45 08:43:15.083616 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 08:43:15.083760 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 08:43:15.083829 saving as /var/lib/lava/dispatcher/tmp/11220707/tftp-deploy-f60wx2zm/kernel/bzImage
48 08:43:15.083890 total size: 7884688 (7MB)
49 08:43:15.083947 No compression specified
50 08:43:15.085105 progress 0% (0MB)
51 08:43:15.087235 progress 5% (0MB)
52 08:43:15.089363 progress 10% (0MB)
53 08:43:15.091412 progress 15% (1MB)
54 08:43:15.093541 progress 20% (1MB)
55 08:43:15.095595 progress 25% (1MB)
56 08:43:15.097714 progress 30% (2MB)
57 08:43:15.099887 progress 35% (2MB)
58 08:43:15.102005 progress 40% (3MB)
59 08:43:15.104053 progress 45% (3MB)
60 08:43:15.106260 progress 50% (3MB)
61 08:43:15.108342 progress 55% (4MB)
62 08:43:15.110413 progress 60% (4MB)
63 08:43:15.112464 progress 65% (4MB)
64 08:43:15.114501 progress 70% (5MB)
65 08:43:15.116504 progress 75% (5MB)
66 08:43:15.118565 progress 80% (6MB)
67 08:43:15.120605 progress 85% (6MB)
68 08:43:15.122674 progress 90% (6MB)
69 08:43:15.124764 progress 95% (7MB)
70 08:43:15.126835 progress 100% (7MB)
71 08:43:15.127025 7MB downloaded in 0.04s (174.34MB/s)
72 08:43:15.127167 end: 1.2.1 http-download (duration 00:00:00) [common]
74 08:43:15.127392 end: 1.2 download-retry (duration 00:00:00) [common]
75 08:43:15.127481 start: 1.3 download-retry (timeout 00:10:00) [common]
76 08:43:15.127574 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 08:43:15.127712 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 08:43:15.127781 saving as /var/lib/lava/dispatcher/tmp/11220707/tftp-deploy-f60wx2zm/modules/modules.tar
79 08:43:15.127842 total size: 250852 (0MB)
80 08:43:15.127901 Using unxz to decompress xz
81 08:43:15.132118 progress 13% (0MB)
82 08:43:15.132561 progress 26% (0MB)
83 08:43:15.132841 progress 39% (0MB)
84 08:43:15.134443 progress 52% (0MB)
85 08:43:15.136305 progress 65% (0MB)
86 08:43:15.138276 progress 78% (0MB)
87 08:43:15.140137 progress 91% (0MB)
88 08:43:15.141955 progress 100% (0MB)
89 08:43:15.147703 0MB downloaded in 0.02s (12.05MB/s)
90 08:43:15.147986 end: 1.3.1 http-download (duration 00:00:00) [common]
92 08:43:15.148255 end: 1.3 download-retry (duration 00:00:00) [common]
93 08:43:15.148356 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 08:43:15.148453 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 08:43:15.148535 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 08:43:15.148619 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 08:43:15.148888 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb
98 08:43:15.149023 makedir: /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin
99 08:43:15.149129 makedir: /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/tests
100 08:43:15.149229 makedir: /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/results
101 08:43:15.149343 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-add-keys
102 08:43:15.149493 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-add-sources
103 08:43:15.149628 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-background-process-start
104 08:43:15.149761 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-background-process-stop
105 08:43:15.149890 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-common-functions
106 08:43:15.150018 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-echo-ipv4
107 08:43:15.150148 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-install-packages
108 08:43:15.150275 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-installed-packages
109 08:43:15.150401 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-os-build
110 08:43:15.150530 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-probe-channel
111 08:43:15.150659 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-probe-ip
112 08:43:15.150787 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-target-ip
113 08:43:15.150914 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-target-mac
114 08:43:15.151039 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-target-storage
115 08:43:15.151171 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-test-case
116 08:43:15.151299 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-test-event
117 08:43:15.151425 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-test-feedback
118 08:43:15.151551 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-test-raise
119 08:43:15.151683 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-test-reference
120 08:43:15.151813 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-test-runner
121 08:43:15.151940 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-test-set
122 08:43:15.152070 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-test-shell
123 08:43:15.152201 Updating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-install-packages (oe)
124 08:43:15.152360 Updating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/bin/lava-installed-packages (oe)
125 08:43:15.152556 Creating /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/environment
126 08:43:15.152704 LAVA metadata
127 08:43:15.152796 - LAVA_JOB_ID=11220707
128 08:43:15.152863 - LAVA_DISPATCHER_IP=192.168.201.1
129 08:43:15.152969 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 08:43:15.153039 skipped lava-vland-overlay
131 08:43:15.153113 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 08:43:15.153195 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 08:43:15.153258 skipped lava-multinode-overlay
134 08:43:15.153330 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 08:43:15.153411 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 08:43:15.153488 Loading test definitions
137 08:43:15.153596 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 08:43:15.153672 Using /lava-11220707 at stage 0
139 08:43:15.153989 uuid=11220707_1.4.2.3.1 testdef=None
140 08:43:15.154077 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 08:43:15.154163 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 08:43:15.154757 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 08:43:15.154980 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 08:43:15.155648 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 08:43:15.155880 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 08:43:15.156518 runner path: /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/0/tests/0_dmesg test_uuid 11220707_1.4.2.3.1
149 08:43:15.156704 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 08:43:15.156946 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 08:43:15.157018 Using /lava-11220707 at stage 1
153 08:43:15.157320 uuid=11220707_1.4.2.3.5 testdef=None
154 08:43:15.157407 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 08:43:15.157491 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 08:43:15.157963 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 08:43:15.158184 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 08:43:15.158850 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 08:43:15.159078 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 08:43:15.159732 runner path: /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/1/tests/1_bootrr test_uuid 11220707_1.4.2.3.5
163 08:43:15.159888 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 08:43:15.160097 Creating lava-test-runner.conf files
166 08:43:15.160161 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/0 for stage 0
167 08:43:15.160253 - 0_dmesg
168 08:43:15.160336 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11220707/lava-overlay-g5896yfb/lava-11220707/1 for stage 1
169 08:43:15.160429 - 1_bootrr
170 08:43:15.160527 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 08:43:15.160612 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 08:43:15.169734 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 08:43:15.169861 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 08:43:15.169949 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 08:43:15.170037 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 08:43:15.170125 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 08:43:15.424332 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 08:43:15.424737 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 08:43:15.424862 extracting modules file /var/lib/lava/dispatcher/tmp/11220707/tftp-deploy-f60wx2zm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11220707/extract-overlay-ramdisk-1via_j8x/ramdisk
180 08:43:15.438164 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 08:43:15.438282 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 08:43:15.438368 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11220707/compress-overlay-eq3x966u/overlay-1.4.2.4.tar.gz to ramdisk
183 08:43:15.438438 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11220707/compress-overlay-eq3x966u/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11220707/extract-overlay-ramdisk-1via_j8x/ramdisk
184 08:43:15.447385 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 08:43:15.447498 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 08:43:15.447587 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 08:43:15.447676 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 08:43:15.447757 Building ramdisk /var/lib/lava/dispatcher/tmp/11220707/extract-overlay-ramdisk-1via_j8x/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11220707/extract-overlay-ramdisk-1via_j8x/ramdisk
189 08:43:15.577758 >> 49788 blocks
190 08:43:16.448472 rename /var/lib/lava/dispatcher/tmp/11220707/extract-overlay-ramdisk-1via_j8x/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11220707/tftp-deploy-f60wx2zm/ramdisk/ramdisk.cpio.gz
191 08:43:16.448944 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 08:43:16.449073 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 08:43:16.449181 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 08:43:16.449279 No mkimage arch provided, not using FIT.
195 08:43:16.449370 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 08:43:16.449454 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 08:43:16.449557 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 08:43:16.449650 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 08:43:16.449730 No LXC device requested
200 08:43:16.449809 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 08:43:16.449899 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 08:43:16.449985 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 08:43:16.450062 Checking files for TFTP limit of 4294967296 bytes.
204 08:43:16.450473 end: 1 tftp-deploy (duration 00:00:01) [common]
205 08:43:16.450581 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 08:43:16.450671 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 08:43:16.450791 substitutions:
208 08:43:16.450859 - {DTB}: None
209 08:43:16.450925 - {INITRD}: 11220707/tftp-deploy-f60wx2zm/ramdisk/ramdisk.cpio.gz
210 08:43:16.450987 - {KERNEL}: 11220707/tftp-deploy-f60wx2zm/kernel/bzImage
211 08:43:16.451046 - {LAVA_MAC}: None
212 08:43:16.451103 - {PRESEED_CONFIG}: None
213 08:43:16.451161 - {PRESEED_LOCAL}: None
214 08:43:16.451217 - {RAMDISK}: 11220707/tftp-deploy-f60wx2zm/ramdisk/ramdisk.cpio.gz
215 08:43:16.451273 - {ROOT_PART}: None
216 08:43:16.451329 - {ROOT}: None
217 08:43:16.451383 - {SERVER_IP}: 192.168.201.1
218 08:43:16.451437 - {TEE}: None
219 08:43:16.451492 Parsed boot commands:
220 08:43:16.451546 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 08:43:16.451719 Parsed boot commands: tftpboot 192.168.201.1 11220707/tftp-deploy-f60wx2zm/kernel/bzImage 11220707/tftp-deploy-f60wx2zm/kernel/cmdline 11220707/tftp-deploy-f60wx2zm/ramdisk/ramdisk.cpio.gz
222 08:43:16.451807 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 08:43:16.451893 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 08:43:16.451982 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 08:43:16.452071 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 08:43:16.452142 Not connected, no need to disconnect.
227 08:43:16.452216 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 08:43:16.452299 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 08:43:16.452368 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-0'
230 08:43:16.456395 Setting prompt string to ['lava-test: # ']
231 08:43:16.456762 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 08:43:16.456869 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 08:43:16.456966 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 08:43:16.457058 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 08:43:16.457275 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
236 08:43:21.590087 >> Command sent successfully.
237 08:43:21.592503 Returned 0 in 5 seconds
238 08:43:21.692847 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 08:43:21.693157 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 08:43:21.693264 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 08:43:21.693359 Setting prompt string to 'Starting depthcharge on Voema...'
243 08:43:21.693431 Changing prompt to 'Starting depthcharge on Voema...'
244 08:43:21.693503 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 08:43:21.693764 [Enter `^Ec?' for help]
246 08:43:23.294474
247 08:43:23.294632
248 08:43:23.305286 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 08:43:23.307934 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 08:43:23.314232 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 08:43:23.317592 CPU: AES supported, TXT NOT supported, VT supported
252 08:43:23.324190 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 08:43:23.330941 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 08:43:23.334381 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 08:43:23.337855 VBOOT: Loading verstage.
256 08:43:23.340657 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 08:43:23.347554 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 08:43:23.350595 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 08:43:23.361281 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 08:43:23.367827 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 08:43:23.367910
262 08:43:23.367975
263 08:43:23.381397 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 08:43:23.395017 Probing TPM: . done!
265 08:43:23.398661 TPM ready after 0 ms
266 08:43:23.401715 Connected to device vid:did:rid of 1ae0:0028:00
267 08:43:23.413656 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
268 08:43:23.419422 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 08:43:23.423327 Initialized TPM device CR50 revision 0
270 08:43:23.473400 tlcl_send_startup: Startup return code is 0
271 08:43:23.473487 TPM: setup succeeded
272 08:43:23.487564 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 08:43:23.501504 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 08:43:23.514335 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 08:43:23.524807 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 08:43:23.528882 Chrome EC: UHEPI supported
277 08:43:23.532575 Phase 1
278 08:43:23.535287 FMAP: area GBB found @ 1805000 (458752 bytes)
279 08:43:23.544890 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 08:43:23.551998 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 08:43:23.558333 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 08:43:23.564929 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 08:43:23.569156 Recovery requested (1009000e)
284 08:43:23.571721 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 08:43:23.582969 tlcl_extend: response is 0
286 08:43:23.590241 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 08:43:23.599692 tlcl_extend: response is 0
288 08:43:23.606791 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 08:43:23.613086 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 08:43:23.619555 BS: verstage times (exec / console): total (unknown) / 142 ms
291 08:43:23.619638
292 08:43:23.619703
293 08:43:23.632631 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 08:43:23.639425 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 08:43:23.642836 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 08:43:23.646208 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 08:43:23.652971 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 08:43:23.656585 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 08:43:23.659757 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 08:43:23.662666 TCO_STS: 0000 0000
301 08:43:23.665842 GEN_PMCON: d0015038 00002200
302 08:43:23.669588 GBLRST_CAUSE: 00000000 00000000
303 08:43:23.669672 HPR_CAUSE0: 00000000
304 08:43:23.673126 prev_sleep_state 5
305 08:43:23.676138 Boot Count incremented to 22564
306 08:43:23.683358 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 08:43:23.689673 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 08:43:23.696168 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 08:43:23.703018 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 08:43:23.707292 Chrome EC: UHEPI supported
311 08:43:23.713982 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 08:43:23.727113 Probing TPM: done!
313 08:43:23.733528 Connected to device vid:did:rid of 1ae0:0028:00
314 08:43:23.745213 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
315 08:43:23.750694 Initialized TPM device CR50 revision 0
316 08:43:23.760519 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 08:43:23.767472 MRC: Hash idx 0x100b comparison successful.
318 08:43:23.770619 MRC cache found, size faa8
319 08:43:23.770719 bootmode is set to: 2
320 08:43:23.773627 SPD index = 0
321 08:43:23.780597 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 08:43:23.783974 SPD: module type is LPDDR4X
323 08:43:23.786953 SPD: module part number is MT53E512M64D4NW-046
324 08:43:23.793841 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 08:43:23.800553 SPD: device width 16 bits, bus width 16 bits
326 08:43:23.803823 SPD: module size is 1024 MB (per channel)
327 08:43:24.237367 CBMEM:
328 08:43:24.240393 IMD: root @ 0x76fff000 254 entries.
329 08:43:24.244376 IMD: root @ 0x76ffec00 62 entries.
330 08:43:24.248350 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 08:43:24.254155 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 08:43:24.257041 External stage cache:
333 08:43:24.260215 IMD: root @ 0x7b3ff000 254 entries.
334 08:43:24.263803 IMD: root @ 0x7b3fec00 62 entries.
335 08:43:24.278959 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 08:43:24.285344 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 08:43:24.291853 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 08:43:24.306200 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 08:43:24.312566 cse_lite: Skip switching to RW in the recovery path
340 08:43:24.312694 8 DIMMs found
341 08:43:24.312777 SMM Memory Map
342 08:43:24.316483 SMRAM : 0x7b000000 0x800000
343 08:43:24.320608 Subregion 0: 0x7b000000 0x200000
344 08:43:24.324428 Subregion 1: 0x7b200000 0x200000
345 08:43:24.329130 Subregion 2: 0x7b400000 0x400000
346 08:43:24.331479 top_of_ram = 0x77000000
347 08:43:24.334802 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 08:43:24.340865 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 08:43:24.347663 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 08:43:24.351146 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 08:43:24.357694 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 08:43:24.364116 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 08:43:24.375555 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 08:43:24.382314 Processing 211 relocs. Offset value of 0x74c0b000
355 08:43:24.388945 BS: romstage times (exec / console): total (unknown) / 277 ms
356 08:43:24.395847
357 08:43:24.395928
358 08:43:24.405297 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 08:43:24.408069 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 08:43:24.418039 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 08:43:24.424829 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 08:43:24.431705 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 08:43:24.438025 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 08:43:24.485093 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 08:43:24.491883 Processing 5008 relocs. Offset value of 0x75d98000
366 08:43:24.494990 BS: postcar times (exec / console): total (unknown) / 59 ms
367 08:43:24.498530
368 08:43:24.498612
369 08:43:24.508262 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 08:43:24.508345 Normal boot
371 08:43:24.511588 FW_CONFIG value is 0x804c02
372 08:43:24.515245 PCI: 00:07.0 disabled by fw_config
373 08:43:24.518977 PCI: 00:07.1 disabled by fw_config
374 08:43:24.522348 PCI: 00:0d.2 disabled by fw_config
375 08:43:24.525504 PCI: 00:1c.7 disabled by fw_config
376 08:43:24.532505 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 08:43:24.538575 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 08:43:24.542558 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 08:43:24.545252 GENERIC: 0.0 disabled by fw_config
380 08:43:24.548945 GENERIC: 1.0 disabled by fw_config
381 08:43:24.555174 fw_config match found: DB_USB=USB3_ACTIVE
382 08:43:24.558859 fw_config match found: DB_USB=USB3_ACTIVE
383 08:43:24.561870 fw_config match found: DB_USB=USB3_ACTIVE
384 08:43:24.564968 fw_config match found: DB_USB=USB3_ACTIVE
385 08:43:24.571536 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 08:43:24.578366 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 08:43:24.588219 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 08:43:24.595011 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 08:43:24.598531 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 08:43:24.605976 microcode: Update skipped, already up-to-date
391 08:43:24.612133 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 08:43:24.639059 Detected 4 core, 8 thread CPU.
393 08:43:24.641902 Setting up SMI for CPU
394 08:43:24.645060 IED base = 0x7b400000
395 08:43:24.645143 IED size = 0x00400000
396 08:43:24.648494 Will perform SMM setup.
397 08:43:24.655169 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 08:43:24.661808 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 08:43:24.669070 Processing 16 relocs. Offset value of 0x00030000
400 08:43:24.671776 Attempting to start 7 APs
401 08:43:24.675326 Waiting for 10ms after sending INIT.
402 08:43:24.690516 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 08:43:24.690605 done.
404 08:43:24.694034 AP: slot 6 apic_id 2.
405 08:43:24.697465 AP: slot 2 apic_id 3.
406 08:43:24.700727 Waiting for 2nd SIPI to complete...done.
407 08:43:24.703790 AP: slot 7 apic_id 6.
408 08:43:24.703872 AP: slot 3 apic_id 7.
409 08:43:24.707621 AP: slot 5 apic_id 4.
410 08:43:24.710572 AP: slot 4 apic_id 5.
411 08:43:24.717529 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 08:43:24.724091 Processing 13 relocs. Offset value of 0x00038000
413 08:43:24.724173 Unable to locate Global NVS
414 08:43:24.733655 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 08:43:24.737448 Installing permanent SMM handler to 0x7b000000
416 08:43:24.747243 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 08:43:24.750367 Processing 794 relocs. Offset value of 0x7b010000
418 08:43:24.760235 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 08:43:24.763571 Processing 13 relocs. Offset value of 0x7b008000
420 08:43:24.770918 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 08:43:24.777147 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 08:43:24.780314 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 08:43:24.787511 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 08:43:24.793333 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 08:43:24.800558 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 08:43:24.807669 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 08:43:24.807751 Unable to locate Global NVS
428 08:43:24.816588 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 08:43:24.819912 Clearing SMI status registers
430 08:43:24.820006 SMI_STS: PM1
431 08:43:24.823676 PM1_STS: PWRBTN
432 08:43:24.829865 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 08:43:24.833493 In relocation handler: CPU 0
434 08:43:24.836787 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 08:43:24.843320 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 08:43:24.843404 Relocation complete.
437 08:43:24.854230 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 08:43:24.854314 In relocation handler: CPU 1
439 08:43:24.860410 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 08:43:24.860493 Relocation complete.
441 08:43:24.869959 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
442 08:43:24.870043 In relocation handler: CPU 3
443 08:43:24.876580 New SMBASE=0x7afff400 IEDBASE=0x7b400000
444 08:43:24.876663 Relocation complete.
445 08:43:24.883043 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
446 08:43:24.886659 In relocation handler: CPU 7
447 08:43:24.893965 New SMBASE=0x7affe400 IEDBASE=0x7b400000
448 08:43:24.896158 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 08:43:24.899740 Relocation complete.
450 08:43:24.906761 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
451 08:43:24.909987 In relocation handler: CPU 2
452 08:43:24.913593 New SMBASE=0x7afff800 IEDBASE=0x7b400000
453 08:43:24.917745 Relocation complete.
454 08:43:24.923209 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
455 08:43:24.926460 In relocation handler: CPU 6
456 08:43:24.929708 New SMBASE=0x7affe800 IEDBASE=0x7b400000
457 08:43:24.933051 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 08:43:24.936398 Relocation complete.
459 08:43:24.943330 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
460 08:43:24.947068 In relocation handler: CPU 4
461 08:43:24.950066 New SMBASE=0x7afff000 IEDBASE=0x7b400000
462 08:43:24.953427 Relocation complete.
463 08:43:24.960416 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
464 08:43:24.963398 In relocation handler: CPU 5
465 08:43:24.966578 New SMBASE=0x7affec00 IEDBASE=0x7b400000
466 08:43:24.973193 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 08:43:24.973277 Relocation complete.
468 08:43:24.976940 Initializing CPU #0
469 08:43:24.979970 CPU: vendor Intel device 806c1
470 08:43:24.983910 CPU: family 06, model 8c, stepping 01
471 08:43:24.986794 Clearing out pending MCEs
472 08:43:24.990741 Setting up local APIC...
473 08:43:24.990825 apic_id: 0x00 done.
474 08:43:24.994012 Turbo is available but hidden
475 08:43:24.997021 Turbo is available and visible
476 08:43:25.000548 microcode: Update skipped, already up-to-date
477 08:43:25.003985 CPU #0 initialized
478 08:43:25.007395 Initializing CPU #5
479 08:43:25.007478 Initializing CPU #4
480 08:43:25.010474 CPU: vendor Intel device 806c1
481 08:43:25.014311 CPU: family 06, model 8c, stepping 01
482 08:43:25.017157 CPU: vendor Intel device 806c1
483 08:43:25.020589 CPU: family 06, model 8c, stepping 01
484 08:43:25.024082 Clearing out pending MCEs
485 08:43:25.027215 Clearing out pending MCEs
486 08:43:25.030551 Initializing CPU #6
487 08:43:25.030634 Initializing CPU #2
488 08:43:25.033760 CPU: vendor Intel device 806c1
489 08:43:25.037297 CPU: family 06, model 8c, stepping 01
490 08:43:25.040408 CPU: vendor Intel device 806c1
491 08:43:25.043913 CPU: family 06, model 8c, stepping 01
492 08:43:25.047127 Clearing out pending MCEs
493 08:43:25.050439 Clearing out pending MCEs
494 08:43:25.053510 Setting up local APIC...
495 08:43:25.053593 Initializing CPU #7
496 08:43:25.057318 Initializing CPU #3
497 08:43:25.060177 CPU: vendor Intel device 806c1
498 08:43:25.063516 CPU: family 06, model 8c, stepping 01
499 08:43:25.067093 CPU: vendor Intel device 806c1
500 08:43:25.070830 CPU: family 06, model 8c, stepping 01
501 08:43:25.073954 Clearing out pending MCEs
502 08:43:25.077439 Clearing out pending MCEs
503 08:43:25.077522 apic_id: 0x02 done.
504 08:43:25.080367 Setting up local APIC...
505 08:43:25.084371 Initializing CPU #1
506 08:43:25.087127 Setting up local APIC...
507 08:43:25.087210 Setting up local APIC...
508 08:43:25.090808 apic_id: 0x07 done.
509 08:43:25.093371 Setting up local APIC...
510 08:43:25.093453 apic_id: 0x05 done.
511 08:43:25.097178 Setting up local APIC...
512 08:43:25.103947 microcode: Update skipped, already up-to-date
513 08:43:25.104031 apic_id: 0x06 done.
514 08:43:25.106861 CPU #3 initialized
515 08:43:25.110396 microcode: Update skipped, already up-to-date
516 08:43:25.116935 microcode: Update skipped, already up-to-date
517 08:43:25.117018 apic_id: 0x03 done.
518 08:43:25.121307 CPU #6 initialized
519 08:43:25.123480 microcode: Update skipped, already up-to-date
520 08:43:25.126770 CPU: vendor Intel device 806c1
521 08:43:25.130524 CPU: family 06, model 8c, stepping 01
522 08:43:25.133389 CPU #7 initialized
523 08:43:25.137088 apic_id: 0x04 done.
524 08:43:25.139819 microcode: Update skipped, already up-to-date
525 08:43:25.143315 microcode: Update skipped, already up-to-date
526 08:43:25.146746 CPU #4 initialized
527 08:43:25.146828 CPU #5 initialized
528 08:43:25.150071 Clearing out pending MCEs
529 08:43:25.154317 CPU #2 initialized
530 08:43:25.156686 Setting up local APIC...
531 08:43:25.156770 apic_id: 0x01 done.
532 08:43:25.163796 microcode: Update skipped, already up-to-date
533 08:43:25.163880 CPU #1 initialized
534 08:43:25.170785 bsp_do_flight_plan done after 464 msecs.
535 08:43:25.173548 CPU: frequency set to 4000 MHz
536 08:43:25.173631 Enabling SMIs.
537 08:43:25.180317 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 08:43:25.195507 SATAXPCIE1 indicates PCIe NVMe is present
539 08:43:25.198908 Probing TPM: done!
540 08:43:25.202143 Connected to device vid:did:rid of 1ae0:0028:00
541 08:43:25.213438 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
542 08:43:25.216153 Initialized TPM device CR50 revision 0
543 08:43:25.220127 Enabling S0i3.4
544 08:43:25.226237 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 08:43:25.229639 Found a VBT of 8704 bytes after decompression
546 08:43:25.236579 cse_lite: CSE RO boot. HybridStorageMode disabled
547 08:43:25.242785 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 08:43:25.319172 FSPS returned 0
549 08:43:25.322700 Executing Phase 1 of FspMultiPhaseSiInit
550 08:43:25.332356 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 08:43:25.336006 port C0 DISC req: usage 1 usb3 1 usb2 5
552 08:43:25.339741 Raw Buffer output 0 00000511
553 08:43:25.341823 Raw Buffer output 1 00000000
554 08:43:25.346331 pmc_send_ipc_cmd succeeded
555 08:43:25.352560 port C1 DISC req: usage 1 usb3 2 usb2 3
556 08:43:25.352675 Raw Buffer output 0 00000321
557 08:43:25.355979 Raw Buffer output 1 00000000
558 08:43:25.360288 pmc_send_ipc_cmd succeeded
559 08:43:25.365594 Detected 4 core, 8 thread CPU.
560 08:43:25.368730 Detected 4 core, 8 thread CPU.
561 08:43:25.602485 Display FSP Version Info HOB
562 08:43:25.605964 Reference Code - CPU = a.0.4c.31
563 08:43:25.609234 uCode Version = 0.0.0.86
564 08:43:25.612911 TXT ACM version = ff.ff.ff.ffff
565 08:43:25.616556 Reference Code - ME = a.0.4c.31
566 08:43:25.619664 MEBx version = 0.0.0.0
567 08:43:25.622441 ME Firmware Version = Consumer SKU
568 08:43:25.625596 Reference Code - PCH = a.0.4c.31
569 08:43:25.629290 PCH-CRID Status = Disabled
570 08:43:25.632458 PCH-CRID Original Value = ff.ff.ff.ffff
571 08:43:25.635744 PCH-CRID New Value = ff.ff.ff.ffff
572 08:43:25.639682 OPROM - RST - RAID = ff.ff.ff.ffff
573 08:43:25.642599 PCH Hsio Version = 4.0.0.0
574 08:43:25.646133 Reference Code - SA - System Agent = a.0.4c.31
575 08:43:25.649497 Reference Code - MRC = 2.0.0.1
576 08:43:25.652221 SA - PCIe Version = a.0.4c.31
577 08:43:25.655637 SA-CRID Status = Disabled
578 08:43:25.659344 SA-CRID Original Value = 0.0.0.1
579 08:43:25.662442 SA-CRID New Value = 0.0.0.1
580 08:43:25.666024 OPROM - VBIOS = ff.ff.ff.ffff
581 08:43:25.669656 IO Manageability Engine FW Version = 11.1.4.0
582 08:43:25.672262 PHY Build Version = 0.0.0.e0
583 08:43:25.675599 Thunderbolt(TM) FW Version = 0.0.0.0
584 08:43:25.682105 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 08:43:25.685732 ITSS IRQ Polarities Before:
586 08:43:25.685814 IPC0: 0xffffffff
587 08:43:25.689052 IPC1: 0xffffffff
588 08:43:25.689134 IPC2: 0xffffffff
589 08:43:25.692846 IPC3: 0xffffffff
590 08:43:25.696091 ITSS IRQ Polarities After:
591 08:43:25.696172 IPC0: 0xffffffff
592 08:43:25.698971 IPC1: 0xffffffff
593 08:43:25.699052 IPC2: 0xffffffff
594 08:43:25.702386 IPC3: 0xffffffff
595 08:43:25.705763 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 08:43:25.718746 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 08:43:25.729480 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 08:43:25.742370 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 08:43:25.748991 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 08:43:25.749073 Enumerating buses...
601 08:43:25.755543 Show all devs... Before device enumeration.
602 08:43:25.755625 Root Device: enabled 1
603 08:43:25.758793 DOMAIN: 0000: enabled 1
604 08:43:25.761923 CPU_CLUSTER: 0: enabled 1
605 08:43:25.765398 PCI: 00:00.0: enabled 1
606 08:43:25.765479 PCI: 00:02.0: enabled 1
607 08:43:25.769561 PCI: 00:04.0: enabled 1
608 08:43:25.771937 PCI: 00:05.0: enabled 1
609 08:43:25.776222 PCI: 00:06.0: enabled 0
610 08:43:25.776303 PCI: 00:07.0: enabled 0
611 08:43:25.778880 PCI: 00:07.1: enabled 0
612 08:43:25.781967 PCI: 00:07.2: enabled 0
613 08:43:25.786097 PCI: 00:07.3: enabled 0
614 08:43:25.786218 PCI: 00:08.0: enabled 1
615 08:43:25.789038 PCI: 00:09.0: enabled 0
616 08:43:25.791895 PCI: 00:0a.0: enabled 0
617 08:43:25.795685 PCI: 00:0d.0: enabled 1
618 08:43:25.795765 PCI: 00:0d.1: enabled 0
619 08:43:25.799187 PCI: 00:0d.2: enabled 0
620 08:43:25.802686 PCI: 00:0d.3: enabled 0
621 08:43:25.802767 PCI: 00:0e.0: enabled 0
622 08:43:25.805257 PCI: 00:10.2: enabled 1
623 08:43:25.808623 PCI: 00:10.6: enabled 0
624 08:43:25.812275 PCI: 00:10.7: enabled 0
625 08:43:25.812355 PCI: 00:12.0: enabled 0
626 08:43:25.815628 PCI: 00:12.6: enabled 0
627 08:43:25.818720 PCI: 00:13.0: enabled 0
628 08:43:25.822263 PCI: 00:14.0: enabled 1
629 08:43:25.822348 PCI: 00:14.1: enabled 0
630 08:43:25.825311 PCI: 00:14.2: enabled 1
631 08:43:25.828564 PCI: 00:14.3: enabled 1
632 08:43:25.832044 PCI: 00:15.0: enabled 1
633 08:43:25.832124 PCI: 00:15.1: enabled 1
634 08:43:25.835696 PCI: 00:15.2: enabled 1
635 08:43:25.838541 PCI: 00:15.3: enabled 1
636 08:43:25.838621 PCI: 00:16.0: enabled 1
637 08:43:25.842108 PCI: 00:16.1: enabled 0
638 08:43:25.845450 PCI: 00:16.2: enabled 0
639 08:43:25.848607 PCI: 00:16.3: enabled 0
640 08:43:25.848772 PCI: 00:16.4: enabled 0
641 08:43:25.852089 PCI: 00:16.5: enabled 0
642 08:43:25.855870 PCI: 00:17.0: enabled 1
643 08:43:25.858473 PCI: 00:19.0: enabled 0
644 08:43:25.858553 PCI: 00:19.1: enabled 1
645 08:43:25.862093 PCI: 00:19.2: enabled 0
646 08:43:25.865457 PCI: 00:1c.0: enabled 1
647 08:43:25.868464 PCI: 00:1c.1: enabled 0
648 08:43:25.868544 PCI: 00:1c.2: enabled 0
649 08:43:25.871660 PCI: 00:1c.3: enabled 0
650 08:43:25.875251 PCI: 00:1c.4: enabled 0
651 08:43:25.878501 PCI: 00:1c.5: enabled 0
652 08:43:25.878581 PCI: 00:1c.6: enabled 1
653 08:43:25.882227 PCI: 00:1c.7: enabled 0
654 08:43:25.885150 PCI: 00:1d.0: enabled 1
655 08:43:25.885230 PCI: 00:1d.1: enabled 0
656 08:43:25.889010 PCI: 00:1d.2: enabled 1
657 08:43:25.892325 PCI: 00:1d.3: enabled 0
658 08:43:25.894911 PCI: 00:1e.0: enabled 1
659 08:43:25.894992 PCI: 00:1e.1: enabled 0
660 08:43:25.898633 PCI: 00:1e.2: enabled 1
661 08:43:25.901587 PCI: 00:1e.3: enabled 1
662 08:43:25.905191 PCI: 00:1f.0: enabled 1
663 08:43:25.905271 PCI: 00:1f.1: enabled 0
664 08:43:25.908446 PCI: 00:1f.2: enabled 1
665 08:43:25.911778 PCI: 00:1f.3: enabled 1
666 08:43:25.915065 PCI: 00:1f.4: enabled 0
667 08:43:25.915146 PCI: 00:1f.5: enabled 1
668 08:43:25.918564 PCI: 00:1f.6: enabled 0
669 08:43:25.921671 PCI: 00:1f.7: enabled 0
670 08:43:25.921752 APIC: 00: enabled 1
671 08:43:25.925915 GENERIC: 0.0: enabled 1
672 08:43:25.928474 GENERIC: 0.0: enabled 1
673 08:43:25.931868 GENERIC: 1.0: enabled 1
674 08:43:25.931990 GENERIC: 0.0: enabled 1
675 08:43:25.935028 GENERIC: 1.0: enabled 1
676 08:43:25.938754 USB0 port 0: enabled 1
677 08:43:25.938835 GENERIC: 0.0: enabled 1
678 08:43:25.941803 USB0 port 0: enabled 1
679 08:43:25.944870 GENERIC: 0.0: enabled 1
680 08:43:25.948838 I2C: 00:1a: enabled 1
681 08:43:25.948919 I2C: 00:31: enabled 1
682 08:43:25.951714 I2C: 00:32: enabled 1
683 08:43:25.955033 I2C: 00:10: enabled 1
684 08:43:25.955114 I2C: 00:15: enabled 1
685 08:43:25.958230 GENERIC: 0.0: enabled 0
686 08:43:25.961519 GENERIC: 1.0: enabled 0
687 08:43:25.964993 GENERIC: 0.0: enabled 1
688 08:43:25.965073 SPI: 00: enabled 1
689 08:43:25.968248 SPI: 00: enabled 1
690 08:43:25.968328 PNP: 0c09.0: enabled 1
691 08:43:25.972073 GENERIC: 0.0: enabled 1
692 08:43:25.975056 USB3 port 0: enabled 1
693 08:43:25.978315 USB3 port 1: enabled 1
694 08:43:25.978395 USB3 port 2: enabled 0
695 08:43:25.981842 USB3 port 3: enabled 0
696 08:43:25.984857 USB2 port 0: enabled 0
697 08:43:25.984937 USB2 port 1: enabled 1
698 08:43:25.988414 USB2 port 2: enabled 1
699 08:43:25.991965 USB2 port 3: enabled 0
700 08:43:25.992045 USB2 port 4: enabled 1
701 08:43:25.995106 USB2 port 5: enabled 0
702 08:43:25.998806 USB2 port 6: enabled 0
703 08:43:26.001356 USB2 port 7: enabled 0
704 08:43:26.001512 USB2 port 8: enabled 0
705 08:43:26.004677 USB2 port 9: enabled 0
706 08:43:26.008550 USB3 port 0: enabled 0
707 08:43:26.008652 USB3 port 1: enabled 1
708 08:43:26.011276 USB3 port 2: enabled 0
709 08:43:26.015352 USB3 port 3: enabled 0
710 08:43:26.018132 GENERIC: 0.0: enabled 1
711 08:43:26.018213 GENERIC: 1.0: enabled 1
712 08:43:26.021767 APIC: 01: enabled 1
713 08:43:26.024684 APIC: 03: enabled 1
714 08:43:26.024765 APIC: 07: enabled 1
715 08:43:26.028628 APIC: 05: enabled 1
716 08:43:26.028716 APIC: 04: enabled 1
717 08:43:26.031332 APIC: 02: enabled 1
718 08:43:26.034713 APIC: 06: enabled 1
719 08:43:26.034795 Compare with tree...
720 08:43:26.038400 Root Device: enabled 1
721 08:43:26.041551 DOMAIN: 0000: enabled 1
722 08:43:26.044726 PCI: 00:00.0: enabled 1
723 08:43:26.044807 PCI: 00:02.0: enabled 1
724 08:43:26.048124 PCI: 00:04.0: enabled 1
725 08:43:26.051508 GENERIC: 0.0: enabled 1
726 08:43:26.054753 PCI: 00:05.0: enabled 1
727 08:43:26.058016 PCI: 00:06.0: enabled 0
728 08:43:26.058098 PCI: 00:07.0: enabled 0
729 08:43:26.061581 GENERIC: 0.0: enabled 1
730 08:43:26.064595 PCI: 00:07.1: enabled 0
731 08:43:26.068266 GENERIC: 1.0: enabled 1
732 08:43:26.071580 PCI: 00:07.2: enabled 0
733 08:43:26.071695 GENERIC: 0.0: enabled 1
734 08:43:26.074925 PCI: 00:07.3: enabled 0
735 08:43:26.078062 GENERIC: 1.0: enabled 1
736 08:43:26.081224 PCI: 00:08.0: enabled 1
737 08:43:26.084436 PCI: 00:09.0: enabled 0
738 08:43:26.084545 PCI: 00:0a.0: enabled 0
739 08:43:26.088810 PCI: 00:0d.0: enabled 1
740 08:43:26.091250 USB0 port 0: enabled 1
741 08:43:26.094413 USB3 port 0: enabled 1
742 08:43:26.097800 USB3 port 1: enabled 1
743 08:43:26.097882 USB3 port 2: enabled 0
744 08:43:26.101320 USB3 port 3: enabled 0
745 08:43:26.104271 PCI: 00:0d.1: enabled 0
746 08:43:26.107831 PCI: 00:0d.2: enabled 0
747 08:43:26.111533 GENERIC: 0.0: enabled 1
748 08:43:26.111615 PCI: 00:0d.3: enabled 0
749 08:43:26.115102 PCI: 00:0e.0: enabled 0
750 08:43:26.118013 PCI: 00:10.2: enabled 1
751 08:43:26.122373 PCI: 00:10.6: enabled 0
752 08:43:26.124316 PCI: 00:10.7: enabled 0
753 08:43:26.124398 PCI: 00:12.0: enabled 0
754 08:43:26.128341 PCI: 00:12.6: enabled 0
755 08:43:26.131197 PCI: 00:13.0: enabled 0
756 08:43:26.134226 PCI: 00:14.0: enabled 1
757 08:43:26.137564 USB0 port 0: enabled 1
758 08:43:26.137646 USB2 port 0: enabled 0
759 08:43:26.140921 USB2 port 1: enabled 1
760 08:43:26.144478 USB2 port 2: enabled 1
761 08:43:26.147690 USB2 port 3: enabled 0
762 08:43:26.150875 USB2 port 4: enabled 1
763 08:43:26.154482 USB2 port 5: enabled 0
764 08:43:26.154564 USB2 port 6: enabled 0
765 08:43:26.157678 USB2 port 7: enabled 0
766 08:43:26.160839 USB2 port 8: enabled 0
767 08:43:26.164802 USB2 port 9: enabled 0
768 08:43:26.167927 USB3 port 0: enabled 0
769 08:43:26.168009 USB3 port 1: enabled 1
770 08:43:26.171439 USB3 port 2: enabled 0
771 08:43:26.174549 USB3 port 3: enabled 0
772 08:43:26.177835 PCI: 00:14.1: enabled 0
773 08:43:26.181176 PCI: 00:14.2: enabled 1
774 08:43:26.184251 PCI: 00:14.3: enabled 1
775 08:43:26.184371 GENERIC: 0.0: enabled 1
776 08:43:26.188206 PCI: 00:15.0: enabled 1
777 08:43:26.190939 I2C: 00:1a: enabled 1
778 08:43:26.194122 I2C: 00:31: enabled 1
779 08:43:26.194204 I2C: 00:32: enabled 1
780 08:43:26.197380 PCI: 00:15.1: enabled 1
781 08:43:26.200629 I2C: 00:10: enabled 1
782 08:43:26.204415 PCI: 00:15.2: enabled 1
783 08:43:26.207850 PCI: 00:15.3: enabled 1
784 08:43:26.207932 PCI: 00:16.0: enabled 1
785 08:43:26.211316 PCI: 00:16.1: enabled 0
786 08:43:26.214222 PCI: 00:16.2: enabled 0
787 08:43:26.217534 PCI: 00:16.3: enabled 0
788 08:43:26.221162 PCI: 00:16.4: enabled 0
789 08:43:26.221244 PCI: 00:16.5: enabled 0
790 08:43:26.224047 PCI: 00:17.0: enabled 1
791 08:43:26.228945 PCI: 00:19.0: enabled 0
792 08:43:26.231847 PCI: 00:19.1: enabled 1
793 08:43:26.231928 I2C: 00:15: enabled 1
794 08:43:26.235215 PCI: 00:19.2: enabled 0
795 08:43:26.238715 PCI: 00:1d.0: enabled 1
796 08:43:26.242239 GENERIC: 0.0: enabled 1
797 08:43:26.242322 PCI: 00:1e.0: enabled 1
798 08:43:26.245383 PCI: 00:1e.1: enabled 0
799 08:43:26.296123 PCI: 00:1e.2: enabled 1
800 08:43:26.296218 SPI: 00: enabled 1
801 08:43:26.296830 PCI: 00:1e.3: enabled 1
802 08:43:26.296912 SPI: 00: enabled 1
803 08:43:26.296977 PCI: 00:1f.0: enabled 1
804 08:43:26.297519 PNP: 0c09.0: enabled 1
805 08:43:26.297601 PCI: 00:1f.1: enabled 0
806 08:43:26.298108 PCI: 00:1f.2: enabled 1
807 08:43:26.298190 GENERIC: 0.0: enabled 1
808 08:43:26.298254 GENERIC: 0.0: enabled 1
809 08:43:26.298496 GENERIC: 1.0: enabled 1
810 08:43:26.298575 PCI: 00:1f.3: enabled 1
811 08:43:26.298649 PCI: 00:1f.4: enabled 0
812 08:43:26.298706 PCI: 00:1f.5: enabled 1
813 08:43:26.298773 PCI: 00:1f.6: enabled 0
814 08:43:26.298830 PCI: 00:1f.7: enabled 0
815 08:43:26.298885 CPU_CLUSTER: 0: enabled 1
816 08:43:26.299570 APIC: 00: enabled 1
817 08:43:26.299651 APIC: 01: enabled 1
818 08:43:26.347184 APIC: 03: enabled 1
819 08:43:26.347267 APIC: 07: enabled 1
820 08:43:26.347333 APIC: 05: enabled 1
821 08:43:26.347574 APIC: 04: enabled 1
822 08:43:26.347637 APIC: 02: enabled 1
823 08:43:26.347696 APIC: 06: enabled 1
824 08:43:26.348264 Root Device scanning...
825 08:43:26.348346 scan_static_bus for Root Device
826 08:43:26.348411 DOMAIN: 0000 enabled
827 08:43:26.348471 CPU_CLUSTER: 0 enabled
828 08:43:26.348530 DOMAIN: 0000 scanning...
829 08:43:26.349255 PCI: pci_scan_bus for bus 00
830 08:43:26.349337 PCI: 00:00.0 [8086/0000] ops
831 08:43:26.349659 PCI: 00:00.0 [8086/9a12] enabled
832 08:43:26.349741 PCI: 00:02.0 [8086/0000] bus ops
833 08:43:26.350548 PCI: 00:02.0 [8086/9a40] enabled
834 08:43:26.350631 PCI: 00:04.0 [8086/0000] bus ops
835 08:43:26.351034 PCI: 00:04.0 [8086/9a03] enabled
836 08:43:26.351116 PCI: 00:05.0 [8086/9a19] enabled
837 08:43:26.356023 PCI: 00:07.0 [0000/0000] hidden
838 08:43:26.359223 PCI: 00:08.0 [8086/9a11] enabled
839 08:43:26.359304 PCI: 00:0a.0 [8086/9a0d] disabled
840 08:43:26.362917 PCI: 00:0d.0 [8086/0000] bus ops
841 08:43:26.365995 PCI: 00:0d.0 [8086/9a13] enabled
842 08:43:26.369097 PCI: 00:14.0 [8086/0000] bus ops
843 08:43:26.372409 PCI: 00:14.0 [8086/a0ed] enabled
844 08:43:26.376103 PCI: 00:14.2 [8086/a0ef] enabled
845 08:43:26.379255 PCI: 00:14.3 [8086/0000] bus ops
846 08:43:26.382927 PCI: 00:14.3 [8086/a0f0] enabled
847 08:43:26.385720 PCI: 00:15.0 [8086/0000] bus ops
848 08:43:26.389131 PCI: 00:15.0 [8086/a0e8] enabled
849 08:43:26.392509 PCI: 00:15.1 [8086/0000] bus ops
850 08:43:26.396175 PCI: 00:15.1 [8086/a0e9] enabled
851 08:43:26.399662 PCI: 00:15.2 [8086/0000] bus ops
852 08:43:26.402307 PCI: 00:15.2 [8086/a0ea] enabled
853 08:43:26.405742 PCI: 00:15.3 [8086/0000] bus ops
854 08:43:26.408871 PCI: 00:15.3 [8086/a0eb] enabled
855 08:43:26.413034 PCI: 00:16.0 [8086/0000] ops
856 08:43:26.415889 PCI: 00:16.0 [8086/a0e0] enabled
857 08:43:26.422588 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 08:43:26.426041 PCI: 00:19.0 [8086/0000] bus ops
859 08:43:26.429089 PCI: 00:19.0 [8086/a0c5] disabled
860 08:43:26.432444 PCI: 00:19.1 [8086/0000] bus ops
861 08:43:26.435848 PCI: 00:19.1 [8086/a0c6] enabled
862 08:43:26.439423 PCI: 00:1d.0 [8086/0000] bus ops
863 08:43:26.442891 PCI: 00:1d.0 [8086/a0b0] enabled
864 08:43:26.442973 PCI: 00:1e.0 [8086/0000] ops
865 08:43:26.445889 PCI: 00:1e.0 [8086/a0a8] enabled
866 08:43:26.449292 PCI: 00:1e.2 [8086/0000] bus ops
867 08:43:26.452484 PCI: 00:1e.2 [8086/a0aa] enabled
868 08:43:26.456448 PCI: 00:1e.3 [8086/0000] bus ops
869 08:43:26.458919 PCI: 00:1e.3 [8086/a0ab] enabled
870 08:43:26.463001 PCI: 00:1f.0 [8086/0000] bus ops
871 08:43:26.465719 PCI: 00:1f.0 [8086/a087] enabled
872 08:43:26.469751 RTC Init
873 08:43:26.472225 Set power on after power failure.
874 08:43:26.472307 Disabling Deep S3
875 08:43:26.475994 Disabling Deep S3
876 08:43:26.478854 Disabling Deep S4
877 08:43:26.478935 Disabling Deep S4
878 08:43:26.482568 Disabling Deep S5
879 08:43:26.482649 Disabling Deep S5
880 08:43:26.486081 PCI: 00:1f.2 [0000/0000] hidden
881 08:43:26.489205 PCI: 00:1f.3 [8086/0000] bus ops
882 08:43:26.492687 PCI: 00:1f.3 [8086/a0c8] enabled
883 08:43:26.495768 PCI: 00:1f.5 [8086/0000] bus ops
884 08:43:26.499269 PCI: 00:1f.5 [8086/a0a4] enabled
885 08:43:26.502428 PCI: Leftover static devices:
886 08:43:26.505719 PCI: 00:10.2
887 08:43:26.505800 PCI: 00:10.6
888 08:43:26.505864 PCI: 00:10.7
889 08:43:26.509394 PCI: 00:06.0
890 08:43:26.509475 PCI: 00:07.1
891 08:43:26.512804 PCI: 00:07.2
892 08:43:26.512885 PCI: 00:07.3
893 08:43:26.512950 PCI: 00:09.0
894 08:43:26.516144 PCI: 00:0d.1
895 08:43:26.516225 PCI: 00:0d.2
896 08:43:26.519148 PCI: 00:0d.3
897 08:43:26.519228 PCI: 00:0e.0
898 08:43:26.519292 PCI: 00:12.0
899 08:43:26.522836 PCI: 00:12.6
900 08:43:26.522917 PCI: 00:13.0
901 08:43:26.526597 PCI: 00:14.1
902 08:43:26.526678 PCI: 00:16.1
903 08:43:26.529462 PCI: 00:16.2
904 08:43:26.529543 PCI: 00:16.3
905 08:43:26.529607 PCI: 00:16.4
906 08:43:26.532257 PCI: 00:16.5
907 08:43:26.532337 PCI: 00:17.0
908 08:43:26.535900 PCI: 00:19.2
909 08:43:26.535981 PCI: 00:1e.1
910 08:43:26.536045 PCI: 00:1f.1
911 08:43:26.539201 PCI: 00:1f.4
912 08:43:26.539282 PCI: 00:1f.6
913 08:43:26.542368 PCI: 00:1f.7
914 08:43:26.546299 PCI: Check your devicetree.cb.
915 08:43:26.546380 PCI: 00:02.0 scanning...
916 08:43:26.548925 scan_generic_bus for PCI: 00:02.0
917 08:43:26.555779 scan_generic_bus for PCI: 00:02.0 done
918 08:43:26.559369 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 08:43:26.562110 PCI: 00:04.0 scanning...
920 08:43:26.565593 scan_generic_bus for PCI: 00:04.0
921 08:43:26.569112 GENERIC: 0.0 enabled
922 08:43:26.571871 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 08:43:26.578841 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 08:43:26.582377 PCI: 00:0d.0 scanning...
925 08:43:26.585392 scan_static_bus for PCI: 00:0d.0
926 08:43:26.585473 USB0 port 0 enabled
927 08:43:26.588793 USB0 port 0 scanning...
928 08:43:26.592245 scan_static_bus for USB0 port 0
929 08:43:26.595835 USB3 port 0 enabled
930 08:43:26.595917 USB3 port 1 enabled
931 08:43:26.598614 USB3 port 2 disabled
932 08:43:26.602557 USB3 port 3 disabled
933 08:43:26.602639 USB3 port 0 scanning...
934 08:43:26.605271 scan_static_bus for USB3 port 0
935 08:43:26.612539 scan_static_bus for USB3 port 0 done
936 08:43:26.615189 scan_bus: bus USB3 port 0 finished in 6 msecs
937 08:43:26.619550 USB3 port 1 scanning...
938 08:43:26.622602 scan_static_bus for USB3 port 1
939 08:43:26.625338 scan_static_bus for USB3 port 1 done
940 08:43:26.628938 scan_bus: bus USB3 port 1 finished in 6 msecs
941 08:43:26.633007 scan_static_bus for USB0 port 0 done
942 08:43:26.638473 scan_bus: bus USB0 port 0 finished in 43 msecs
943 08:43:26.642261 scan_static_bus for PCI: 00:0d.0 done
944 08:43:26.645109 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 08:43:26.648909 PCI: 00:14.0 scanning...
946 08:43:26.652149 scan_static_bus for PCI: 00:14.0
947 08:43:26.655422 USB0 port 0 enabled
948 08:43:26.655503 USB0 port 0 scanning...
949 08:43:26.658925 scan_static_bus for USB0 port 0
950 08:43:26.662202 USB2 port 0 disabled
951 08:43:26.665239 USB2 port 1 enabled
952 08:43:26.665331 USB2 port 2 enabled
953 08:43:26.668839 USB2 port 3 disabled
954 08:43:26.672196 USB2 port 4 enabled
955 08:43:26.672277 USB2 port 5 disabled
956 08:43:26.675647 USB2 port 6 disabled
957 08:43:26.679773 USB2 port 7 disabled
958 08:43:26.679854 USB2 port 8 disabled
959 08:43:26.682094 USB2 port 9 disabled
960 08:43:26.682176 USB3 port 0 disabled
961 08:43:26.685286 USB3 port 1 enabled
962 08:43:26.688927 USB3 port 2 disabled
963 08:43:26.689009 USB3 port 3 disabled
964 08:43:26.692463 USB2 port 1 scanning...
965 08:43:26.695444 scan_static_bus for USB2 port 1
966 08:43:26.698836 scan_static_bus for USB2 port 1 done
967 08:43:26.706116 scan_bus: bus USB2 port 1 finished in 6 msecs
968 08:43:26.706198 USB2 port 2 scanning...
969 08:43:26.709090 scan_static_bus for USB2 port 2
970 08:43:26.715720 scan_static_bus for USB2 port 2 done
971 08:43:26.718708 scan_bus: bus USB2 port 2 finished in 6 msecs
972 08:43:26.721940 USB2 port 4 scanning...
973 08:43:26.725649 scan_static_bus for USB2 port 4
974 08:43:26.728881 scan_static_bus for USB2 port 4 done
975 08:43:26.732196 scan_bus: bus USB2 port 4 finished in 6 msecs
976 08:43:26.735215 USB3 port 1 scanning...
977 08:43:26.738615 scan_static_bus for USB3 port 1
978 08:43:26.742238 scan_static_bus for USB3 port 1 done
979 08:43:26.748584 scan_bus: bus USB3 port 1 finished in 6 msecs
980 08:43:26.751901 scan_static_bus for USB0 port 0 done
981 08:43:26.755380 scan_bus: bus USB0 port 0 finished in 93 msecs
982 08:43:26.758120 scan_static_bus for PCI: 00:14.0 done
983 08:43:26.765753 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 08:43:26.765833 PCI: 00:14.3 scanning...
985 08:43:26.768518 scan_static_bus for PCI: 00:14.3
986 08:43:26.771808 GENERIC: 0.0 enabled
987 08:43:26.775617 scan_static_bus for PCI: 00:14.3 done
988 08:43:26.781618 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 08:43:26.781698 PCI: 00:15.0 scanning...
990 08:43:26.785126 scan_static_bus for PCI: 00:15.0
991 08:43:26.788585 I2C: 00:1a enabled
992 08:43:26.792050 I2C: 00:31 enabled
993 08:43:26.792131 I2C: 00:32 enabled
994 08:43:26.795438 scan_static_bus for PCI: 00:15.0 done
995 08:43:26.801527 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 08:43:26.805210 PCI: 00:15.1 scanning...
997 08:43:26.808834 scan_static_bus for PCI: 00:15.1
998 08:43:26.808934 I2C: 00:10 enabled
999 08:43:26.812546 scan_static_bus for PCI: 00:15.1 done
1000 08:43:26.819340 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 08:43:26.819421 PCI: 00:15.2 scanning...
1002 08:43:26.822467 scan_static_bus for PCI: 00:15.2
1003 08:43:26.829527 scan_static_bus for PCI: 00:15.2 done
1004 08:43:26.832297 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 08:43:26.835836 PCI: 00:15.3 scanning...
1006 08:43:26.839094 scan_static_bus for PCI: 00:15.3
1007 08:43:26.842248 scan_static_bus for PCI: 00:15.3 done
1008 08:43:26.845902 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 08:43:26.849441 PCI: 00:19.1 scanning...
1010 08:43:26.852675 scan_static_bus for PCI: 00:19.1
1011 08:43:26.855559 I2C: 00:15 enabled
1012 08:43:26.859000 scan_static_bus for PCI: 00:19.1 done
1013 08:43:26.862021 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 08:43:26.865823 PCI: 00:1d.0 scanning...
1015 08:43:26.869763 do_pci_scan_bridge for PCI: 00:1d.0
1016 08:43:26.872547 PCI: pci_scan_bus for bus 01
1017 08:43:26.875417 PCI: 01:00.0 [1c5c/174a] enabled
1018 08:43:26.878811 GENERIC: 0.0 enabled
1019 08:43:26.882314 Enabling Common Clock Configuration
1020 08:43:26.885764 L1 Sub-State supported from root port 29
1021 08:43:26.888781 L1 Sub-State Support = 0xf
1022 08:43:26.892124 CommonModeRestoreTime = 0x28
1023 08:43:26.895453 Power On Value = 0x16, Power On Scale = 0x0
1024 08:43:26.899380 ASPM: Enabled L1
1025 08:43:26.902228 PCIe: Max_Payload_Size adjusted to 128
1026 08:43:26.905552 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 08:43:26.908778 PCI: 00:1e.2 scanning...
1028 08:43:26.912436 scan_generic_bus for PCI: 00:1e.2
1029 08:43:26.915290 SPI: 00 enabled
1030 08:43:26.922319 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 08:43:26.925831 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 08:43:26.928882 PCI: 00:1e.3 scanning...
1033 08:43:26.931956 scan_generic_bus for PCI: 00:1e.3
1034 08:43:26.932035 SPI: 00 enabled
1035 08:43:26.938869 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 08:43:26.945713 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 08:43:26.945793 PCI: 00:1f.0 scanning...
1038 08:43:26.949028 scan_static_bus for PCI: 00:1f.0
1039 08:43:26.953182 PNP: 0c09.0 enabled
1040 08:43:26.955420 PNP: 0c09.0 scanning...
1041 08:43:26.959129 scan_static_bus for PNP: 0c09.0
1042 08:43:26.963027 scan_static_bus for PNP: 0c09.0 done
1043 08:43:26.966683 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 08:43:26.972808 scan_static_bus for PCI: 00:1f.0 done
1045 08:43:26.975511 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 08:43:26.978990 PCI: 00:1f.2 scanning...
1047 08:43:26.982139 scan_static_bus for PCI: 00:1f.2
1048 08:43:26.982219 GENERIC: 0.0 enabled
1049 08:43:26.985283 GENERIC: 0.0 scanning...
1050 08:43:26.989231 scan_static_bus for GENERIC: 0.0
1051 08:43:26.991917 GENERIC: 0.0 enabled
1052 08:43:26.995423 GENERIC: 1.0 enabled
1053 08:43:26.998831 scan_static_bus for GENERIC: 0.0 done
1054 08:43:27.001997 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 08:43:27.005286 scan_static_bus for PCI: 00:1f.2 done
1056 08:43:27.011719 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 08:43:27.015532 PCI: 00:1f.3 scanning...
1058 08:43:27.018457 scan_static_bus for PCI: 00:1f.3
1059 08:43:27.022119 scan_static_bus for PCI: 00:1f.3 done
1060 08:43:27.025651 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 08:43:27.028785 PCI: 00:1f.5 scanning...
1062 08:43:27.031581 scan_generic_bus for PCI: 00:1f.5
1063 08:43:27.035243 scan_generic_bus for PCI: 00:1f.5 done
1064 08:43:27.041593 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 08:43:27.045157 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 08:43:27.048239 scan_static_bus for Root Device done
1067 08:43:27.055042 scan_bus: bus Root Device finished in 737 msecs
1068 08:43:27.055149 done
1069 08:43:27.061463 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 08:43:27.065185 Chrome EC: UHEPI supported
1071 08:43:27.071715 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 08:43:27.078390 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 08:43:27.081466 SPI flash protection: WPSW=0 SRP0=0
1074 08:43:27.084924 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 08:43:27.091329 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1076 08:43:27.095082 found VGA at PCI: 00:02.0
1077 08:43:27.097921 Setting up VGA for PCI: 00:02.0
1078 08:43:27.101206 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 08:43:27.108815 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 08:43:27.112166 Allocating resources...
1081 08:43:27.112247 Reading resources...
1082 08:43:27.117990 Root Device read_resources bus 0 link: 0
1083 08:43:27.121162 DOMAIN: 0000 read_resources bus 0 link: 0
1084 08:43:27.127849 PCI: 00:04.0 read_resources bus 1 link: 0
1085 08:43:27.131051 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 08:43:27.138099 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 08:43:27.140937 USB0 port 0 read_resources bus 0 link: 0
1088 08:43:27.144280 USB0 port 0 read_resources bus 0 link: 0 done
1089 08:43:27.151561 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 08:43:27.154474 PCI: 00:14.0 read_resources bus 0 link: 0
1091 08:43:27.161771 USB0 port 0 read_resources bus 0 link: 0
1092 08:43:27.164618 USB0 port 0 read_resources bus 0 link: 0 done
1093 08:43:27.171164 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 08:43:27.175179 PCI: 00:14.3 read_resources bus 0 link: 0
1095 08:43:27.181194 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 08:43:27.184662 PCI: 00:15.0 read_resources bus 0 link: 0
1097 08:43:27.190968 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 08:43:27.194899 PCI: 00:15.1 read_resources bus 0 link: 0
1099 08:43:27.200725 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 08:43:27.204100 PCI: 00:19.1 read_resources bus 0 link: 0
1101 08:43:27.210904 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 08:43:27.214460 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 08:43:27.221375 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 08:43:27.224290 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 08:43:27.231342 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 08:43:27.234567 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 08:43:27.240834 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 08:43:27.244382 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 08:43:27.250867 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 08:43:27.254485 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 08:43:27.257401 GENERIC: 0.0 read_resources bus 0 link: 0
1112 08:43:27.265018 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 08:43:27.267907 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 08:43:27.275175 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 08:43:27.278656 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 08:43:27.285757 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 08:43:27.288834 Root Device read_resources bus 0 link: 0 done
1118 08:43:27.292012 Done reading resources.
1119 08:43:27.298313 Show resources in subtree (Root Device)...After reading.
1120 08:43:27.301829 Root Device child on link 0 DOMAIN: 0000
1121 08:43:27.304986 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 08:43:27.315075 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 08:43:27.325009 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 08:43:27.328412 PCI: 00:00.0
1125 08:43:27.338367 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 08:43:27.344845 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 08:43:27.354974 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 08:43:27.364945 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 08:43:27.374827 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 08:43:27.385024 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 08:43:27.394649 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 08:43:27.400974 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 08:43:27.410953 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 08:43:27.420851 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 08:43:27.431432 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 08:43:27.441132 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 08:43:27.447964 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 08:43:27.457814 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 08:43:27.467544 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 08:43:27.477441 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 08:43:27.487415 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 08:43:27.498086 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 08:43:27.504227 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 08:43:27.514403 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 08:43:27.517037 PCI: 00:02.0
1146 08:43:27.527160 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 08:43:27.536957 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 08:43:27.547397 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 08:43:27.550578 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 08:43:27.560455 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 08:43:27.563676 GENERIC: 0.0
1152 08:43:27.563755 PCI: 00:05.0
1153 08:43:27.573777 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 08:43:27.580936 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 08:43:27.581016 GENERIC: 0.0
1156 08:43:27.583657 PCI: 00:08.0
1157 08:43:27.593553 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 08:43:27.593635 PCI: 00:0a.0
1159 08:43:27.596870 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 08:43:27.606846 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 08:43:27.613554 USB0 port 0 child on link 0 USB3 port 0
1162 08:43:27.613634 USB3 port 0
1163 08:43:27.617157 USB3 port 1
1164 08:43:27.617236 USB3 port 2
1165 08:43:27.620051 USB3 port 3
1166 08:43:27.623450 PCI: 00:14.0 child on link 0 USB0 port 0
1167 08:43:27.633749 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 08:43:27.640304 USB0 port 0 child on link 0 USB2 port 0
1169 08:43:27.640384 USB2 port 0
1170 08:43:27.643578 USB2 port 1
1171 08:43:27.643657 USB2 port 2
1172 08:43:27.646718 USB2 port 3
1173 08:43:27.646797 USB2 port 4
1174 08:43:27.650654 USB2 port 5
1175 08:43:27.650733 USB2 port 6
1176 08:43:27.653559 USB2 port 7
1177 08:43:27.653637 USB2 port 8
1178 08:43:27.656851 USB2 port 9
1179 08:43:27.656930 USB3 port 0
1180 08:43:27.660163 USB3 port 1
1181 08:43:27.660241 USB3 port 2
1182 08:43:27.663508 USB3 port 3
1183 08:43:27.663587 PCI: 00:14.2
1184 08:43:27.673175 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 08:43:27.683190 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 08:43:27.690516 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 08:43:27.700104 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 08:43:27.700188 GENERIC: 0.0
1189 08:43:27.706753 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 08:43:27.716592 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 08:43:27.716701 I2C: 00:1a
1192 08:43:27.720221 I2C: 00:31
1193 08:43:27.720302 I2C: 00:32
1194 08:43:27.723551 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 08:43:27.733587 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 08:43:27.736672 I2C: 00:10
1197 08:43:27.736755 PCI: 00:15.2
1198 08:43:27.746810 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 08:43:27.749996 PCI: 00:15.3
1200 08:43:27.760738 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 08:43:27.760822 PCI: 00:16.0
1202 08:43:27.769394 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 08:43:27.772691 PCI: 00:19.0
1204 08:43:27.776424 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 08:43:27.786024 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 08:43:27.789623 I2C: 00:15
1207 08:43:27.793142 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 08:43:27.802923 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 08:43:27.812538 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 08:43:27.819615 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 08:43:27.823080 GENERIC: 0.0
1212 08:43:27.823161 PCI: 01:00.0
1213 08:43:27.833327 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 08:43:27.843055 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 08:43:27.852626 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 08:43:27.852728 PCI: 00:1e.0
1217 08:43:27.866438 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 08:43:27.869323 PCI: 00:1e.2 child on link 0 SPI: 00
1219 08:43:27.879034 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 08:43:27.879116 SPI: 00
1221 08:43:27.886329 PCI: 00:1e.3 child on link 0 SPI: 00
1222 08:43:27.896039 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 08:43:27.896122 SPI: 00
1224 08:43:27.898972 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 08:43:27.909569 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 08:43:27.909651 PNP: 0c09.0
1227 08:43:27.918883 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 08:43:27.922397 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 08:43:27.932437 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 08:43:27.942219 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 08:43:27.945868 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 08:43:27.949141 GENERIC: 0.0
1233 08:43:27.952725 GENERIC: 1.0
1234 08:43:27.952806 PCI: 00:1f.3
1235 08:43:27.962612 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 08:43:27.972354 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 08:43:27.975612 PCI: 00:1f.5
1238 08:43:27.982359 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 08:43:27.988945 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 08:43:27.989026 APIC: 00
1241 08:43:27.989090 APIC: 01
1242 08:43:27.992407 APIC: 03
1243 08:43:27.992488 APIC: 07
1244 08:43:27.995834 APIC: 05
1245 08:43:27.995914 APIC: 04
1246 08:43:27.995978 APIC: 02
1247 08:43:27.998738 APIC: 06
1248 08:43:28.005675 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 08:43:28.011891 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 08:43:28.019227 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 08:43:28.022535 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 08:43:28.028946 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 08:43:28.031711 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 08:43:28.035178 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 08:43:28.042176 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 08:43:28.052039 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 08:43:28.058601 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 08:43:28.065457 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 08:43:28.072381 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 08:43:28.078445 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 08:43:28.088198 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 08:43:28.095074 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 08:43:28.098941 DOMAIN: 0000: Resource ranges:
1264 08:43:28.101725 * Base: 1000, Size: 800, Tag: 100
1265 08:43:28.105023 * Base: 1900, Size: e700, Tag: 100
1266 08:43:28.111485 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 08:43:28.118416 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 08:43:28.125052 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 08:43:28.131423 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 08:43:28.137960 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 08:43:28.148293 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 08:43:28.154659 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 08:43:28.162167 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 08:43:28.171000 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 08:43:28.178302 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 08:43:28.184656 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 08:43:28.194544 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 08:43:28.201334 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 08:43:28.207459 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 08:43:28.214389 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 08:43:28.224470 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 08:43:28.230995 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 08:43:28.241041 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 08:43:28.247517 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 08:43:28.254200 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 08:43:28.263810 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 08:43:28.270396 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 08:43:28.277041 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 08:43:28.287460 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 08:43:28.293538 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 08:43:28.297195 DOMAIN: 0000: Resource ranges:
1292 08:43:28.300082 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 08:43:28.303685 * Base: d0000000, Size: 28000000, Tag: 200
1294 08:43:28.310739 * Base: fa000000, Size: 1000000, Tag: 200
1295 08:43:28.313535 * Base: fb001000, Size: 2fff000, Tag: 200
1296 08:43:28.317445 * Base: fe010000, Size: 2e000, Tag: 200
1297 08:43:28.323598 * Base: fe03f000, Size: d41000, Tag: 200
1298 08:43:28.326904 * Base: fed88000, Size: 8000, Tag: 200
1299 08:43:28.330587 * Base: fed93000, Size: d000, Tag: 200
1300 08:43:28.333774 * Base: feda2000, Size: 1e000, Tag: 200
1301 08:43:28.340196 * Base: fede0000, Size: 1220000, Tag: 200
1302 08:43:28.343622 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 08:43:28.350414 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 08:43:28.356527 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 08:43:28.363221 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 08:43:28.369974 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 08:43:28.376381 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 08:43:28.383039 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 08:43:28.389695 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 08:43:28.396532 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 08:43:28.403374 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 08:43:28.409840 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 08:43:28.416601 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 08:43:28.423465 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 08:43:28.429837 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 08:43:28.436399 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 08:43:28.443274 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 08:43:28.449667 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 08:43:28.456421 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 08:43:28.463050 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 08:43:28.469375 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 08:43:28.476448 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 08:43:28.482731 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 08:43:28.489413 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 08:43:28.496218 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 08:43:28.506281 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 08:43:28.509302 PCI: 00:1d.0: Resource ranges:
1328 08:43:28.512517 * Base: 7fc00000, Size: 100000, Tag: 200
1329 08:43:28.519146 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 08:43:28.525731 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 08:43:28.532457 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 08:43:28.542904 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 08:43:28.548921 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 08:43:28.552429 Root Device assign_resources, bus 0 link: 0
1335 08:43:28.555850 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 08:43:28.566385 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 08:43:28.572565 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 08:43:28.582704 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 08:43:28.589484 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 08:43:28.595728 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 08:43:28.598843 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 08:43:28.609093 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 08:43:28.615551 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 08:43:28.625615 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 08:43:28.629125 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 08:43:28.632334 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 08:43:28.642434 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 08:43:28.645168 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 08:43:28.652151 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 08:43:28.658393 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 08:43:28.668915 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 08:43:28.674929 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 08:43:28.678344 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 08:43:28.684952 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 08:43:28.691534 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 08:43:28.698496 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 08:43:28.701828 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 08:43:28.711708 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 08:43:28.714717 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 08:43:28.718204 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 08:43:28.728134 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 08:43:28.734724 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 08:43:28.745238 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 08:43:28.751484 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 08:43:28.758073 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 08:43:28.761525 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 08:43:28.770974 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 08:43:28.781121 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 08:43:28.787688 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 08:43:28.794298 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 08:43:28.801833 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 08:43:28.807382 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 08:43:28.817498 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 08:43:28.820599 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 08:43:28.830940 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 08:43:28.834118 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 08:43:28.840561 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 08:43:28.847291 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 08:43:28.850767 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 08:43:28.857943 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 08:43:28.860899 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 08:43:28.868035 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 08:43:28.871181 LPC: Trying to open IO window from 800 size 1ff
1384 08:43:28.880786 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 08:43:28.887607 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 08:43:28.897104 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 08:43:28.900823 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 08:43:28.903940 Root Device assign_resources, bus 0 link: 0
1389 08:43:28.907228 Done setting resources.
1390 08:43:28.913729 Show resources in subtree (Root Device)...After assigning values.
1391 08:43:28.917598 Root Device child on link 0 DOMAIN: 0000
1392 08:43:28.923998 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 08:43:28.933900 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 08:43:28.940459 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 08:43:28.943510 PCI: 00:00.0
1396 08:43:28.954787 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 08:43:28.963531 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 08:43:28.973654 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 08:43:28.980115 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 08:43:28.990372 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 08:43:28.999959 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 08:43:29.010542 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 08:43:29.020017 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 08:43:29.030549 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 08:43:29.036508 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 08:43:29.046732 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 08:43:29.056569 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 08:43:29.067076 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 08:43:29.073541 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 08:43:29.083422 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 08:43:29.092865 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 08:43:29.103068 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 08:43:29.112770 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 08:43:29.122507 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 08:43:29.132602 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 08:43:29.132822 PCI: 00:02.0
1417 08:43:29.146211 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 08:43:29.156569 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 08:43:29.165976 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 08:43:29.169748 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 08:43:29.179501 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 08:43:29.182654 GENERIC: 0.0
1423 08:43:29.183043 PCI: 00:05.0
1424 08:43:29.192280 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 08:43:29.199026 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 08:43:29.199652 GENERIC: 0.0
1427 08:43:29.202091 PCI: 00:08.0
1428 08:43:29.212402 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 08:43:29.212908 PCI: 00:0a.0
1430 08:43:29.218853 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 08:43:29.229258 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 08:43:29.232603 USB0 port 0 child on link 0 USB3 port 0
1433 08:43:29.235674 USB3 port 0
1434 08:43:29.236155 USB3 port 1
1435 08:43:29.239165 USB3 port 2
1436 08:43:29.239652 USB3 port 3
1437 08:43:29.245636 PCI: 00:14.0 child on link 0 USB0 port 0
1438 08:43:29.255773 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 08:43:29.259022 USB0 port 0 child on link 0 USB2 port 0
1440 08:43:29.262097 USB2 port 0
1441 08:43:29.262493 USB2 port 1
1442 08:43:29.265443 USB2 port 2
1443 08:43:29.265937 USB2 port 3
1444 08:43:29.269220 USB2 port 4
1445 08:43:29.269702 USB2 port 5
1446 08:43:29.272239 USB2 port 6
1447 08:43:29.272768 USB2 port 7
1448 08:43:29.276087 USB2 port 8
1449 08:43:29.276602 USB2 port 9
1450 08:43:29.278894 USB3 port 0
1451 08:43:29.279282 USB3 port 1
1452 08:43:29.282538 USB3 port 2
1453 08:43:29.283017 USB3 port 3
1454 08:43:29.285477 PCI: 00:14.2
1455 08:43:29.295198 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 08:43:29.305537 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 08:43:29.312569 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 08:43:29.321884 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 08:43:29.322360 GENERIC: 0.0
1460 08:43:29.329139 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 08:43:29.339264 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 08:43:29.339747 I2C: 00:1a
1463 08:43:29.341869 I2C: 00:31
1464 08:43:29.342256 I2C: 00:32
1465 08:43:29.345247 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 08:43:29.355566 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 08:43:29.359015 I2C: 00:10
1468 08:43:29.359496 PCI: 00:15.2
1469 08:43:29.372104 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 08:43:29.372607 PCI: 00:15.3
1471 08:43:29.382315 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 08:43:29.385559 PCI: 00:16.0
1473 08:43:29.395845 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 08:43:29.396324 PCI: 00:19.0
1475 08:43:29.401918 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 08:43:29.411815 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 08:43:29.412303 I2C: 00:15
1478 08:43:29.418673 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 08:43:29.425204 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 08:43:29.438640 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 08:43:29.448611 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 08:43:29.452040 GENERIC: 0.0
1483 08:43:29.452519 PCI: 01:00.0
1484 08:43:29.462061 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 08:43:29.471447 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 08:43:29.481502 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 08:43:29.484631 PCI: 00:1e.0
1488 08:43:29.494663 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 08:43:29.501280 PCI: 00:1e.2 child on link 0 SPI: 00
1490 08:43:29.511865 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 08:43:29.512364 SPI: 00
1492 08:43:29.514789 PCI: 00:1e.3 child on link 0 SPI: 00
1493 08:43:29.524751 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 08:43:29.528414 SPI: 00
1495 08:43:29.531485 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 08:43:29.541630 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 08:43:29.542119 PNP: 0c09.0
1498 08:43:29.551360 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 08:43:29.554915 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 08:43:29.564472 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 08:43:29.574890 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 08:43:29.578234 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 08:43:29.581641 GENERIC: 0.0
1504 08:43:29.582159 GENERIC: 1.0
1505 08:43:29.584533 PCI: 00:1f.3
1506 08:43:29.594512 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 08:43:29.604711 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 08:43:29.607708 PCI: 00:1f.5
1509 08:43:29.617489 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 08:43:29.621145 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 08:43:29.621694 APIC: 00
1512 08:43:29.624430 APIC: 01
1513 08:43:29.624903 APIC: 03
1514 08:43:29.625248 APIC: 07
1515 08:43:29.627561 APIC: 05
1516 08:43:29.627983 APIC: 04
1517 08:43:29.631199 APIC: 02
1518 08:43:29.631587 APIC: 06
1519 08:43:29.634825 Done allocating resources.
1520 08:43:29.641034 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 08:43:29.644060 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 08:43:29.651431 Configure GPIOs for I2S audio on UP4.
1523 08:43:29.657592 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 08:43:29.658078 Enabling resources...
1525 08:43:29.664728 PCI: 00:00.0 subsystem <- 8086/9a12
1526 08:43:29.665212 PCI: 00:00.0 cmd <- 06
1527 08:43:29.668086 PCI: 00:02.0 subsystem <- 8086/9a40
1528 08:43:29.671154 PCI: 00:02.0 cmd <- 03
1529 08:43:29.674414 PCI: 00:04.0 subsystem <- 8086/9a03
1530 08:43:29.677692 PCI: 00:04.0 cmd <- 02
1531 08:43:29.680772 PCI: 00:05.0 subsystem <- 8086/9a19
1532 08:43:29.684722 PCI: 00:05.0 cmd <- 02
1533 08:43:29.687676 PCI: 00:08.0 subsystem <- 8086/9a11
1534 08:43:29.691070 PCI: 00:08.0 cmd <- 06
1535 08:43:29.694182 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 08:43:29.697484 PCI: 00:0d.0 cmd <- 02
1537 08:43:29.700710 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 08:43:29.704489 PCI: 00:14.0 cmd <- 02
1539 08:43:29.707544 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 08:43:29.708095 PCI: 00:14.2 cmd <- 02
1541 08:43:29.713996 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 08:43:29.714499 PCI: 00:14.3 cmd <- 02
1543 08:43:29.717645 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 08:43:29.720569 PCI: 00:15.0 cmd <- 02
1545 08:43:29.723875 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 08:43:29.727356 PCI: 00:15.1 cmd <- 02
1547 08:43:29.730913 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 08:43:29.733777 PCI: 00:15.2 cmd <- 02
1549 08:43:29.737297 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 08:43:29.740854 PCI: 00:15.3 cmd <- 02
1551 08:43:29.744200 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 08:43:29.747506 PCI: 00:16.0 cmd <- 02
1553 08:43:29.750439 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 08:43:29.753760 PCI: 00:19.1 cmd <- 02
1555 08:43:29.757030 PCI: 00:1d.0 bridge ctrl <- 0013
1556 08:43:29.760324 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 08:43:29.760843 PCI: 00:1d.0 cmd <- 06
1558 08:43:29.767042 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 08:43:29.767526 PCI: 00:1e.0 cmd <- 06
1560 08:43:29.770205 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 08:43:29.773811 PCI: 00:1e.2 cmd <- 06
1562 08:43:29.776817 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 08:43:29.780510 PCI: 00:1e.3 cmd <- 02
1564 08:43:29.783843 PCI: 00:1f.0 subsystem <- 8086/a087
1565 08:43:29.786910 PCI: 00:1f.0 cmd <- 407
1566 08:43:29.790079 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 08:43:29.793597 PCI: 00:1f.3 cmd <- 02
1568 08:43:29.797224 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 08:43:29.800350 PCI: 00:1f.5 cmd <- 406
1570 08:43:29.803523 PCI: 01:00.0 cmd <- 02
1571 08:43:29.807917 done.
1572 08:43:29.810958 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 08:43:29.814734 Initializing devices...
1574 08:43:29.818015 Root Device init
1575 08:43:29.821059 Chrome EC: Set SMI mask to 0x0000000000000000
1576 08:43:29.828260 Chrome EC: clear events_b mask to 0x0000000000000000
1577 08:43:29.835112 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 08:43:29.837250 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 08:43:29.844497 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 08:43:29.851009 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 08:43:29.854293 fw_config match found: DB_USB=USB3_ACTIVE
1582 08:43:29.860780 Configure Right Type-C port orientation for retimer
1583 08:43:29.864421 Root Device init finished in 43 msecs
1584 08:43:29.867690 PCI: 00:00.0 init
1585 08:43:29.871630 CPU TDP = 9 Watts
1586 08:43:29.872149 CPU PL1 = 9 Watts
1587 08:43:29.874484 CPU PL2 = 40 Watts
1588 08:43:29.878142 CPU PL4 = 83 Watts
1589 08:43:29.880841 PCI: 00:00.0 init finished in 8 msecs
1590 08:43:29.881265 PCI: 00:02.0 init
1591 08:43:29.884864 GMA: Found VBT in CBFS
1592 08:43:29.887427 GMA: Found valid VBT in CBFS
1593 08:43:29.894277 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 08:43:29.901257 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 08:43:29.904300 PCI: 00:02.0 init finished in 18 msecs
1596 08:43:29.907813 PCI: 00:05.0 init
1597 08:43:29.910829 PCI: 00:05.0 init finished in 0 msecs
1598 08:43:29.913916 PCI: 00:08.0 init
1599 08:43:29.917200 PCI: 00:08.0 init finished in 0 msecs
1600 08:43:29.920575 PCI: 00:14.0 init
1601 08:43:29.924112 PCI: 00:14.0 init finished in 0 msecs
1602 08:43:29.927674 PCI: 00:14.2 init
1603 08:43:29.931008 PCI: 00:14.2 init finished in 0 msecs
1604 08:43:29.931528 PCI: 00:15.0 init
1605 08:43:29.933973 I2C bus 0 version 0x3230302a
1606 08:43:29.937984 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 08:43:29.944298 PCI: 00:15.0 init finished in 6 msecs
1608 08:43:29.944844 PCI: 00:15.1 init
1609 08:43:29.947538 I2C bus 1 version 0x3230302a
1610 08:43:29.950897 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 08:43:29.953961 PCI: 00:15.1 init finished in 6 msecs
1612 08:43:29.957542 PCI: 00:15.2 init
1613 08:43:29.960920 I2C bus 2 version 0x3230302a
1614 08:43:29.963915 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 08:43:29.967886 PCI: 00:15.2 init finished in 6 msecs
1616 08:43:29.970603 PCI: 00:15.3 init
1617 08:43:29.974201 I2C bus 3 version 0x3230302a
1618 08:43:29.977083 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 08:43:29.981617 PCI: 00:15.3 init finished in 6 msecs
1620 08:43:29.984300 PCI: 00:16.0 init
1621 08:43:29.986905 PCI: 00:16.0 init finished in 0 msecs
1622 08:43:29.990353 PCI: 00:19.1 init
1623 08:43:29.990775 I2C bus 5 version 0x3230302a
1624 08:43:29.997065 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 08:43:30.000421 PCI: 00:19.1 init finished in 6 msecs
1626 08:43:30.001081 PCI: 00:1d.0 init
1627 08:43:30.004414 Initializing PCH PCIe bridge.
1628 08:43:30.007368 PCI: 00:1d.0 init finished in 3 msecs
1629 08:43:30.011892 PCI: 00:1f.0 init
1630 08:43:30.014657 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 08:43:30.021390 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 08:43:30.021909 IOAPIC: ID = 0x02
1633 08:43:30.024718 IOAPIC: Dumping registers
1634 08:43:30.028210 reg 0x0000: 0x02000000
1635 08:43:30.031570 reg 0x0001: 0x00770020
1636 08:43:30.032081 reg 0x0002: 0x00000000
1637 08:43:30.038215 PCI: 00:1f.0 init finished in 21 msecs
1638 08:43:30.038727 PCI: 00:1f.2 init
1639 08:43:30.041083 Disabling ACPI via APMC.
1640 08:43:30.044448 APMC done.
1641 08:43:30.048329 PCI: 00:1f.2 init finished in 5 msecs
1642 08:43:30.060010 PCI: 01:00.0 init
1643 08:43:30.062965 PCI: 01:00.0 init finished in 0 msecs
1644 08:43:30.066687 PNP: 0c09.0 init
1645 08:43:30.069756 Google Chrome EC uptime: 8.394 seconds
1646 08:43:30.077239 Google Chrome AP resets since EC boot: 1
1647 08:43:30.079769 Google Chrome most recent AP reset causes:
1648 08:43:30.082790 0.347: 32775 shutdown: entering G3
1649 08:43:30.089901 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 08:43:30.093021 PNP: 0c09.0 init finished in 22 msecs
1651 08:43:30.098731 Devices initialized
1652 08:43:30.102478 Show all devs... After init.
1653 08:43:30.105477 Root Device: enabled 1
1654 08:43:30.105900 DOMAIN: 0000: enabled 1
1655 08:43:30.108501 CPU_CLUSTER: 0: enabled 1
1656 08:43:30.111926 PCI: 00:00.0: enabled 1
1657 08:43:30.115053 PCI: 00:02.0: enabled 1
1658 08:43:30.115589 PCI: 00:04.0: enabled 1
1659 08:43:30.118465 PCI: 00:05.0: enabled 1
1660 08:43:30.122534 PCI: 00:06.0: enabled 0
1661 08:43:30.125170 PCI: 00:07.0: enabled 0
1662 08:43:30.125594 PCI: 00:07.1: enabled 0
1663 08:43:30.128637 PCI: 00:07.2: enabled 0
1664 08:43:30.132190 PCI: 00:07.3: enabled 0
1665 08:43:30.135313 PCI: 00:08.0: enabled 1
1666 08:43:30.135827 PCI: 00:09.0: enabled 0
1667 08:43:30.138698 PCI: 00:0a.0: enabled 0
1668 08:43:30.142207 PCI: 00:0d.0: enabled 1
1669 08:43:30.145395 PCI: 00:0d.1: enabled 0
1670 08:43:30.145913 PCI: 00:0d.2: enabled 0
1671 08:43:30.148806 PCI: 00:0d.3: enabled 0
1672 08:43:30.152187 PCI: 00:0e.0: enabled 0
1673 08:43:30.152734 PCI: 00:10.2: enabled 1
1674 08:43:30.155005 PCI: 00:10.6: enabled 0
1675 08:43:30.158788 PCI: 00:10.7: enabled 0
1676 08:43:30.161613 PCI: 00:12.0: enabled 0
1677 08:43:30.162128 PCI: 00:12.6: enabled 0
1678 08:43:30.165339 PCI: 00:13.0: enabled 0
1679 08:43:30.168456 PCI: 00:14.0: enabled 1
1680 08:43:30.172069 PCI: 00:14.1: enabled 0
1681 08:43:30.172587 PCI: 00:14.2: enabled 1
1682 08:43:30.175041 PCI: 00:14.3: enabled 1
1683 08:43:30.178385 PCI: 00:15.0: enabled 1
1684 08:43:30.181958 PCI: 00:15.1: enabled 1
1685 08:43:30.182472 PCI: 00:15.2: enabled 1
1686 08:43:30.185407 PCI: 00:15.3: enabled 1
1687 08:43:30.188343 PCI: 00:16.0: enabled 1
1688 08:43:30.188903 PCI: 00:16.1: enabled 0
1689 08:43:30.191622 PCI: 00:16.2: enabled 0
1690 08:43:30.194995 PCI: 00:16.3: enabled 0
1691 08:43:30.198017 PCI: 00:16.4: enabled 0
1692 08:43:30.198440 PCI: 00:16.5: enabled 0
1693 08:43:30.201677 PCI: 00:17.0: enabled 0
1694 08:43:30.204913 PCI: 00:19.0: enabled 0
1695 08:43:30.208136 PCI: 00:19.1: enabled 1
1696 08:43:30.208699 PCI: 00:19.2: enabled 0
1697 08:43:30.211654 PCI: 00:1c.0: enabled 1
1698 08:43:30.214779 PCI: 00:1c.1: enabled 0
1699 08:43:30.218316 PCI: 00:1c.2: enabled 0
1700 08:43:30.218737 PCI: 00:1c.3: enabled 0
1701 08:43:30.221609 PCI: 00:1c.4: enabled 0
1702 08:43:30.224934 PCI: 00:1c.5: enabled 0
1703 08:43:30.228050 PCI: 00:1c.6: enabled 1
1704 08:43:30.228529 PCI: 00:1c.7: enabled 0
1705 08:43:30.231481 PCI: 00:1d.0: enabled 1
1706 08:43:30.234841 PCI: 00:1d.1: enabled 0
1707 08:43:30.235270 PCI: 00:1d.2: enabled 1
1708 08:43:30.237975 PCI: 00:1d.3: enabled 0
1709 08:43:30.241390 PCI: 00:1e.0: enabled 1
1710 08:43:30.244427 PCI: 00:1e.1: enabled 0
1711 08:43:30.244852 PCI: 00:1e.2: enabled 1
1712 08:43:30.248021 PCI: 00:1e.3: enabled 1
1713 08:43:30.251410 PCI: 00:1f.0: enabled 1
1714 08:43:30.254593 PCI: 00:1f.1: enabled 0
1715 08:43:30.255102 PCI: 00:1f.2: enabled 1
1716 08:43:30.258151 PCI: 00:1f.3: enabled 1
1717 08:43:30.261047 PCI: 00:1f.4: enabled 0
1718 08:43:30.264208 PCI: 00:1f.5: enabled 1
1719 08:43:30.264588 PCI: 00:1f.6: enabled 0
1720 08:43:30.268547 PCI: 00:1f.7: enabled 0
1721 08:43:30.271435 APIC: 00: enabled 1
1722 08:43:30.271844 GENERIC: 0.0: enabled 1
1723 08:43:30.274656 GENERIC: 0.0: enabled 1
1724 08:43:30.277938 GENERIC: 1.0: enabled 1
1725 08:43:30.281241 GENERIC: 0.0: enabled 1
1726 08:43:30.281764 GENERIC: 1.0: enabled 1
1727 08:43:30.284611 USB0 port 0: enabled 1
1728 08:43:30.288003 GENERIC: 0.0: enabled 1
1729 08:43:30.288545 USB0 port 0: enabled 1
1730 08:43:30.291782 GENERIC: 0.0: enabled 1
1731 08:43:30.294683 I2C: 00:1a: enabled 1
1732 08:43:30.297632 I2C: 00:31: enabled 1
1733 08:43:30.298147 I2C: 00:32: enabled 1
1734 08:43:30.301267 I2C: 00:10: enabled 1
1735 08:43:30.304460 I2C: 00:15: enabled 1
1736 08:43:30.305043 GENERIC: 0.0: enabled 0
1737 08:43:30.308014 GENERIC: 1.0: enabled 0
1738 08:43:30.311185 GENERIC: 0.0: enabled 1
1739 08:43:30.311709 SPI: 00: enabled 1
1740 08:43:30.314599 SPI: 00: enabled 1
1741 08:43:30.317528 PNP: 0c09.0: enabled 1
1742 08:43:30.317951 GENERIC: 0.0: enabled 1
1743 08:43:30.321124 USB3 port 0: enabled 1
1744 08:43:30.324517 USB3 port 1: enabled 1
1745 08:43:30.327633 USB3 port 2: enabled 0
1746 08:43:30.328083 USB3 port 3: enabled 0
1747 08:43:30.331110 USB2 port 0: enabled 0
1748 08:43:30.334395 USB2 port 1: enabled 1
1749 08:43:30.334938 USB2 port 2: enabled 1
1750 08:43:30.337578 USB2 port 3: enabled 0
1751 08:43:30.341477 USB2 port 4: enabled 1
1752 08:43:30.341997 USB2 port 5: enabled 0
1753 08:43:30.344378 USB2 port 6: enabled 0
1754 08:43:30.348294 USB2 port 7: enabled 0
1755 08:43:30.351158 USB2 port 8: enabled 0
1756 08:43:30.351667 USB2 port 9: enabled 0
1757 08:43:30.354595 USB3 port 0: enabled 0
1758 08:43:30.358003 USB3 port 1: enabled 1
1759 08:43:30.358510 USB3 port 2: enabled 0
1760 08:43:30.360707 USB3 port 3: enabled 0
1761 08:43:30.364118 GENERIC: 0.0: enabled 1
1762 08:43:30.367513 GENERIC: 1.0: enabled 1
1763 08:43:30.367933 APIC: 01: enabled 1
1764 08:43:30.370674 APIC: 03: enabled 1
1765 08:43:30.371259 APIC: 07: enabled 1
1766 08:43:30.374065 APIC: 05: enabled 1
1767 08:43:30.377451 APIC: 04: enabled 1
1768 08:43:30.377971 APIC: 02: enabled 1
1769 08:43:30.380785 APIC: 06: enabled 1
1770 08:43:30.384012 PCI: 01:00.0: enabled 1
1771 08:43:30.387082 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1772 08:43:30.394158 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 08:43:30.397227 ELOG: NV offset 0xf30000 size 0x1000
1774 08:43:30.404235 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 08:43:30.410667 ELOG: Event(17) added with size 13 at 2023-08-07 08:43:29 UTC
1776 08:43:30.417398 ELOG: Event(92) added with size 9 at 2023-08-07 08:43:29 UTC
1777 08:43:30.423763 ELOG: Event(93) added with size 9 at 2023-08-07 08:43:29 UTC
1778 08:43:30.430507 ELOG: Event(9E) added with size 10 at 2023-08-07 08:43:29 UTC
1779 08:43:30.437157 ELOG: Event(9F) added with size 14 at 2023-08-07 08:43:29 UTC
1780 08:43:30.443774 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 08:43:30.449764 ELOG: Event(A1) added with size 10 at 2023-08-07 08:43:30 UTC
1782 08:43:30.453311 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1783 08:43:30.460088 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1784 08:43:30.463129 Finalize devices...
1785 08:43:30.463548 Devices finalized
1786 08:43:30.469909 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1787 08:43:30.477272 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1788 08:43:30.480393 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1789 08:43:30.486697 ME: HFSTS1 : 0x80030055
1790 08:43:30.489561 ME: HFSTS2 : 0x30280116
1791 08:43:30.493214 ME: HFSTS3 : 0x00000050
1792 08:43:30.499704 ME: HFSTS4 : 0x00004000
1793 08:43:30.503580 ME: HFSTS5 : 0x00000000
1794 08:43:30.506090 ME: HFSTS6 : 0x00400006
1795 08:43:30.513214 ME: Manufacturing Mode : YES
1796 08:43:30.516081 ME: SPI Protection Mode Enabled : NO
1797 08:43:30.519692 ME: FW Partition Table : OK
1798 08:43:30.523219 ME: Bringup Loader Failure : NO
1799 08:43:30.526688 ME: Firmware Init Complete : NO
1800 08:43:30.529705 ME: Boot Options Present : NO
1801 08:43:30.532747 ME: Update In Progress : NO
1802 08:43:30.536358 ME: D0i3 Support : YES
1803 08:43:30.543540 ME: Low Power State Enabled : NO
1804 08:43:30.547009 ME: CPU Replaced : YES
1805 08:43:30.549633 ME: CPU Replacement Valid : YES
1806 08:43:30.552803 ME: Current Working State : 5
1807 08:43:30.556285 ME: Current Operation State : 1
1808 08:43:30.559926 ME: Current Operation Mode : 3
1809 08:43:30.562763 ME: Error Code : 0
1810 08:43:30.566400 ME: Enhanced Debug Mode : NO
1811 08:43:30.572621 ME: CPU Debug Disabled : YES
1812 08:43:30.576292 ME: TXT Support : NO
1813 08:43:30.579986 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1814 08:43:30.589683 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1815 08:43:30.592463 CBFS: 'fallback/slic' not found.
1816 08:43:30.596426 ACPI: Writing ACPI tables at 76b01000.
1817 08:43:30.597005 ACPI: * FACS
1818 08:43:30.599196 ACPI: * DSDT
1819 08:43:30.603344 Ramoops buffer: 0x100000@0x76a00000.
1820 08:43:30.609688 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1821 08:43:30.612946 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1822 08:43:30.616014 Google Chrome EC: version:
1823 08:43:30.619555 ro: voema_v2.0.7540-147f8d37d1
1824 08:43:30.622903 rw: voema_v2.0.7540-147f8d37d1
1825 08:43:30.625858 running image: 2
1826 08:43:30.633215 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1827 08:43:30.636065 ACPI: * FADT
1828 08:43:30.636610 SCI is IRQ9
1829 08:43:30.639399 ACPI: added table 1/32, length now 40
1830 08:43:30.642364 ACPI: * SSDT
1831 08:43:30.646400 Found 1 CPU(s) with 8 core(s) each.
1832 08:43:30.649632 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1833 08:43:30.656100 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1834 08:43:30.658998 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1835 08:43:30.662529 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1836 08:43:30.669299 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1837 08:43:30.675834 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1838 08:43:30.679222 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1839 08:43:30.685793 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1840 08:43:30.692377 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1841 08:43:30.695844 \_SB.PCI0.RP09: Added StorageD3Enable property
1842 08:43:30.698783 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1843 08:43:30.705717 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1844 08:43:30.712477 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1845 08:43:30.716025 PS2K: Passing 80 keymaps to kernel
1846 08:43:30.722456 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1847 08:43:30.729512 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1848 08:43:30.735877 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1849 08:43:30.742117 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1850 08:43:30.749061 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1851 08:43:30.751798 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1852 08:43:30.758756 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1853 08:43:30.765282 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1854 08:43:30.772267 ACPI: added table 2/32, length now 44
1855 08:43:30.772814 ACPI: * MCFG
1856 08:43:30.775311 ACPI: added table 3/32, length now 48
1857 08:43:30.779200 ACPI: * TPM2
1858 08:43:30.782078 TPM2 log created at 0x769f0000
1859 08:43:30.785838 ACPI: added table 4/32, length now 52
1860 08:43:30.786352 ACPI: * MADT
1861 08:43:30.788659 SCI is IRQ9
1862 08:43:30.792287 ACPI: added table 5/32, length now 56
1863 08:43:30.792866 current = 76b09850
1864 08:43:30.796159 ACPI: * DMAR
1865 08:43:30.799342 ACPI: added table 6/32, length now 60
1866 08:43:30.801788 ACPI: added table 7/32, length now 64
1867 08:43:30.805211 ACPI: * HPET
1868 08:43:30.808744 ACPI: added table 8/32, length now 68
1869 08:43:30.809175 ACPI: done.
1870 08:43:30.812114 ACPI tables: 35216 bytes.
1871 08:43:30.814924 smbios_write_tables: 769ef000
1872 08:43:30.818580 EC returned error result code 3
1873 08:43:30.821867 Couldn't obtain OEM name from CBI
1874 08:43:30.825150 Create SMBIOS type 16
1875 08:43:30.828162 Create SMBIOS type 17
1876 08:43:30.828604 GENERIC: 0.0 (WIFI Device)
1877 08:43:30.831536 SMBIOS tables: 1750 bytes.
1878 08:43:30.834748 Writing table forward entry at 0x00000500
1879 08:43:30.842258 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1880 08:43:30.845046 Writing coreboot table at 0x76b25000
1881 08:43:30.852403 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1882 08:43:30.859039 1. 0000000000001000-000000000009ffff: RAM
1883 08:43:30.862015 2. 00000000000a0000-00000000000fffff: RESERVED
1884 08:43:30.864611 3. 0000000000100000-00000000769eefff: RAM
1885 08:43:30.871802 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1886 08:43:30.878454 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1887 08:43:30.881597 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1888 08:43:30.887792 7. 0000000077000000-000000007fbfffff: RESERVED
1889 08:43:30.891635 8. 00000000c0000000-00000000cfffffff: RESERVED
1890 08:43:30.898212 9. 00000000f8000000-00000000f9ffffff: RESERVED
1891 08:43:30.901659 10. 00000000fb000000-00000000fb000fff: RESERVED
1892 08:43:30.908470 11. 00000000fe000000-00000000fe00ffff: RESERVED
1893 08:43:30.911944 12. 00000000fed80000-00000000fed87fff: RESERVED
1894 08:43:30.914861 13. 00000000fed90000-00000000fed92fff: RESERVED
1895 08:43:30.920883 14. 00000000feda0000-00000000feda1fff: RESERVED
1896 08:43:30.924621 15. 00000000fedc0000-00000000feddffff: RESERVED
1897 08:43:30.931288 16. 0000000100000000-00000002803fffff: RAM
1898 08:43:30.931809 Passing 4 GPIOs to payload:
1899 08:43:30.938283 NAME | PORT | POLARITY | VALUE
1900 08:43:30.944643 lid | undefined | high | high
1901 08:43:30.948097 power | undefined | high | low
1902 08:43:30.954702 oprom | undefined | high | low
1903 08:43:30.957696 EC in RW | 0x000000e5 | high | high
1904 08:43:30.964423 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 9e14
1905 08:43:30.967920 coreboot table: 1576 bytes.
1906 08:43:30.973118 IMD ROOT 0. 0x76fff000 0x00001000
1907 08:43:30.974291 IMD SMALL 1. 0x76ffe000 0x00001000
1908 08:43:30.978186 FSP MEMORY 2. 0x76c4e000 0x003b0000
1909 08:43:30.984521 VPD 3. 0x76c4d000 0x00000367
1910 08:43:30.988112 RO MCACHE 4. 0x76c4c000 0x00000fdc
1911 08:43:30.991639 CONSOLE 5. 0x76c2c000 0x00020000
1912 08:43:30.994703 FMAP 6. 0x76c2b000 0x00000578
1913 08:43:30.997605 TIME STAMP 7. 0x76c2a000 0x00000910
1914 08:43:31.001162 VBOOT WORK 8. 0x76c16000 0x00014000
1915 08:43:31.004402 ROMSTG STCK 9. 0x76c15000 0x00001000
1916 08:43:31.007870 AFTER CAR 10. 0x76c0a000 0x0000b000
1917 08:43:31.014592 RAMSTAGE 11. 0x76b97000 0x00073000
1918 08:43:31.017928 REFCODE 12. 0x76b42000 0x00055000
1919 08:43:31.021331 SMM BACKUP 13. 0x76b32000 0x00010000
1920 08:43:31.024816 4f444749 14. 0x76b30000 0x00002000
1921 08:43:31.028101 EXT VBT15. 0x76b2d000 0x0000219f
1922 08:43:31.031066 COREBOOT 16. 0x76b25000 0x00008000
1923 08:43:31.034553 ACPI 17. 0x76b01000 0x00024000
1924 08:43:31.038018 ACPI GNVS 18. 0x76b00000 0x00001000
1925 08:43:31.041343 RAMOOPS 19. 0x76a00000 0x00100000
1926 08:43:31.045078 TPM2 TCGLOG20. 0x769f0000 0x00010000
1927 08:43:31.051481 SMBIOS 21. 0x769ef000 0x00000800
1928 08:43:31.051997 IMD small region:
1929 08:43:31.054295 IMD ROOT 0. 0x76ffec00 0x00000400
1930 08:43:31.061618 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1931 08:43:31.065080 POWER STATE 2. 0x76ffeb80 0x00000044
1932 08:43:31.068160 ROMSTAGE 3. 0x76ffeb60 0x00000004
1933 08:43:31.071497 MEM INFO 4. 0x76ffe980 0x000001e0
1934 08:43:31.078594 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1935 08:43:31.081301 MTRR: Physical address space:
1936 08:43:31.097385 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1937 08:43:31.097544 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1938 08:43:31.097986 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1939 08:43:31.103731 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1940 08:43:31.110991 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1941 08:43:31.117183 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1942 08:43:31.124330 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1943 08:43:31.127854 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 08:43:31.130833 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 08:43:31.137632 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 08:43:31.141185 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 08:43:31.144138 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 08:43:31.147588 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 08:43:31.154274 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 08:43:31.157404 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 08:43:31.161336 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 08:43:31.164643 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 08:43:31.170873 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 08:43:31.174167 call enable_fixed_mtrr()
1955 08:43:31.177538 CPU physical address size: 39 bits
1956 08:43:31.180759 MTRR: default type WB/UC MTRR counts: 6/6.
1957 08:43:31.184429 MTRR: UC selected as default type.
1958 08:43:31.190536 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1959 08:43:31.197583 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1960 08:43:31.204165 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1961 08:43:31.210331 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1962 08:43:31.217354 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1963 08:43:31.220474 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1964 08:43:31.227917 MTRR: Fixed MSR 0x250 0x0606060606060606
1965 08:43:31.231342 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 08:43:31.235042 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 08:43:31.238198 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 08:43:31.244928 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 08:43:31.248026 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 08:43:31.251441 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 08:43:31.255100 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 08:43:31.260969 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 08:43:31.264683 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 08:43:31.267989 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 08:43:31.274973 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 08:43:31.275504 call enable_fixed_mtrr()
1977 08:43:31.281402 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 08:43:31.284555 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 08:43:31.288074 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 08:43:31.291711 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 08:43:31.297949 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 08:43:31.300962 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 08:43:31.304613 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 08:43:31.307556 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 08:43:31.315035 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 08:43:31.317913 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 08:43:31.321327 CPU physical address size: 39 bits
1988 08:43:31.324364 call enable_fixed_mtrr()
1989 08:43:31.328313 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 08:43:31.334598 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 08:43:31.337895 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 08:43:31.340750 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 08:43:31.344595 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 08:43:31.351431 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 08:43:31.354542 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 08:43:31.357540 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 08:43:31.360709 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 08:43:31.367721 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 08:43:31.370887 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 08:43:31.374802 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 08:43:31.380663 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 08:43:31.384606 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 08:43:31.387736 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 08:43:31.390472 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 08:43:31.397481 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 08:43:31.400850 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 08:43:31.403632 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 08:43:31.406751 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 08:43:31.413811 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 08:43:31.416806 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 08:43:31.420297 call enable_fixed_mtrr()
2012 08:43:31.423857 call enable_fixed_mtrr()
2013 08:43:31.427205 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 08:43:31.430318 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 08:43:31.433786 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 08:43:31.440708 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 08:43:31.443490 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 08:43:31.446633 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 08:43:31.450055 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 08:43:31.453450 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 08:43:31.460537 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 08:43:31.463367 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 08:43:31.466561 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 08:43:31.469993 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 08:43:31.477824 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 08:43:31.478341 call enable_fixed_mtrr()
2027 08:43:31.484395 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 08:43:31.488532 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 08:43:31.490825 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 08:43:31.494149 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 08:43:31.501040 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 08:43:31.504410 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 08:43:31.507829 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 08:43:31.511145 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 08:43:31.517407 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 08:43:31.521059 CPU physical address size: 39 bits
2037 08:43:31.525041 call enable_fixed_mtrr()
2038 08:43:31.527220 CPU physical address size: 39 bits
2039 08:43:31.530883 CPU physical address size: 39 bits
2040 08:43:31.534267 CPU physical address size: 39 bits
2041 08:43:31.537870 CPU physical address size: 39 bits
2042 08:43:31.544227 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 08:43:31.544783
2044 08:43:31.545120 MTRR check
2045 08:43:31.547465 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 08:43:31.554155 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 08:43:31.557688 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 08:43:31.561233 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 08:43:31.563983 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 08:43:31.571356 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 08:43:31.574498 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 08:43:31.577902 MTRR: Fixed MSR 0x26d 0x0606060606060606
2053 08:43:31.581221 MTRR: Fixed MSR 0x26e 0x0606060606060606
2054 08:43:31.584475 MTRR: Fixed MSR 0x26f 0x0606060606060606
2055 08:43:31.591786 Fixed MTRRs : call enable_fixed_mtrr()
2056 08:43:31.592302 Enabled
2057 08:43:31.594104 Variable MTRRs: Enabled
2058 08:43:31.594580
2059 08:43:31.597031 CPU physical address size: 39 bits
2060 08:43:31.604452 BS: BS_WRITE_TABLES exit times (exec / console): 367 / 151 ms
2061 08:43:31.607764 Checking cr50 for pending updates
2062 08:43:31.615477 Reading cr50 TPM mode
2063 08:43:31.625678 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 6 ms
2064 08:43:31.635964 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2065 08:43:31.639257 Checking segment from ROM address 0xffc02b38
2066 08:43:31.642575 Checking segment from ROM address 0xffc02b54
2067 08:43:31.648856 Loading segment from ROM address 0xffc02b38
2068 08:43:31.649273 code (compression=0)
2069 08:43:31.658777 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2070 08:43:31.665767 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2071 08:43:31.668996 it's not compressed!
2072 08:43:31.808774 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2073 08:43:31.815120 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2074 08:43:31.821653 Loading segment from ROM address 0xffc02b54
2075 08:43:31.824800 Entry Point 0x30000000
2076 08:43:31.825359 Loaded segments
2077 08:43:31.831294 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2078 08:43:31.874493 Finalizing chipset.
2079 08:43:31.877702 Finalizing SMM.
2080 08:43:31.878252 APMC done.
2081 08:43:31.884411 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2082 08:43:31.888224 mp_park_aps done after 0 msecs.
2083 08:43:31.890970 Jumping to boot code at 0x30000000(0x76b25000)
2084 08:43:31.900868 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2085 08:43:31.901437
2086 08:43:31.901815
2087 08:43:31.902225
2088 08:43:31.904303 Starting depthcharge on Voema...
2089 08:43:31.904894
2090 08:43:31.906210 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2091 08:43:31.906725 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2092 08:43:31.907143 Setting prompt string to ['volteer:']
2093 08:43:31.907715 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2094 08:43:31.914464 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2095 08:43:31.915056
2096 08:43:31.921326 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2097 08:43:31.921870
2098 08:43:31.928189 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2099 08:43:31.928815
2100 08:43:31.930636 Failed to find eMMC card reader
2101 08:43:31.931089
2102 08:43:31.931427 Wipe memory regions:
2103 08:43:31.931746
2104 08:43:31.937564 [0x00000000001000, 0x000000000a0000)
2105 08:43:31.938082
2106 08:43:31.941002 [0x00000000100000, 0x00000030000000)
2107 08:43:31.966013
2108 08:43:31.969232 [0x00000032662db0, 0x000000769ef000)
2109 08:43:32.004340
2110 08:43:32.007582 [0x00000100000000, 0x00000280400000)
2111 08:43:32.208403
2112 08:43:32.211367 ec_init: CrosEC protocol v3 supported (256, 256)
2113 08:43:32.211832
2114 08:43:32.217957 update_port_state: port C0 state: usb enable 1 mux conn 0
2115 08:43:32.218544
2116 08:43:32.228553 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2117 08:43:32.229201
2118 08:43:32.235226 pmc_check_ipc_sts: STS_BUSY done after 1574 us
2119 08:43:32.235789
2120 08:43:32.238022 send_conn_disc_msg: pmc_send_cmd succeeded
2121 08:43:32.668504
2122 08:43:32.669242 R8152: Initializing
2123 08:43:32.669627
2124 08:43:32.671603 Version 6 (ocp_data = 5c30)
2125 08:43:32.672160
2126 08:43:32.675077 R8152: Done initializing
2127 08:43:32.675632
2128 08:43:32.678230 Adding net device
2129 08:43:32.979739
2130 08:43:32.983035 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2131 08:43:32.983594
2132 08:43:32.983968
2133 08:43:32.984313
2134 08:43:32.986733 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2136 08:43:33.088107 volteer: tftpboot 192.168.201.1 11220707/tftp-deploy-f60wx2zm/kernel/bzImage 11220707/tftp-deploy-f60wx2zm/kernel/cmdline 11220707/tftp-deploy-f60wx2zm/ramdisk/ramdisk.cpio.gz
2137 08:43:33.088876 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 08:43:33.089465 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2139 08:43:33.094175 tftpboot 192.168.201.1 11220707/tftp-deploy-f60wx2zm/kernel/bzImploy-f60wx2zm/kernel/cmdline 11220707/tftp-deploy-f60wx2zm/ramdisk/ramdisk.cpio.gz
2140 08:43:33.094667
2141 08:43:33.095038 Waiting for link
2142 08:43:33.296789
2143 08:43:33.297368 done.
2144 08:43:33.297764
2145 08:43:33.298188 MAC: 00:24:32:30:7b:ec
2146 08:43:33.298773
2147 08:43:33.300001 Sending DHCP discover... done.
2148 08:43:33.300473
2149 08:43:33.303708 Waiting for reply... done.
2150 08:43:33.304506
2151 08:43:33.307145 Sending DHCP request... done.
2152 08:43:33.307810
2153 08:43:33.313322 Waiting for reply... done.
2154 08:43:33.313826
2155 08:43:33.314469 My ip is 192.168.201.11
2156 08:43:33.315086
2157 08:43:33.316874 The DHCP server ip is 192.168.201.1
2158 08:43:33.317395
2159 08:43:33.323250 TFTP server IP predefined by user: 192.168.201.1
2160 08:43:33.323732
2161 08:43:33.330123 Bootfile predefined by user: 11220707/tftp-deploy-f60wx2zm/kernel/bzImage
2162 08:43:33.330754
2163 08:43:33.333091 Sending tftp read request... done.
2164 08:43:33.333579
2165 08:43:33.343602 Waiting for the transfer...
2166 08:43:33.344209
2167 08:43:34.012576 00000000 ################################################################
2168 08:43:34.013144
2169 08:43:34.684489 00080000 ################################################################
2170 08:43:34.685169
2171 08:43:35.361538 00100000 ################################################################
2172 08:43:35.362076
2173 08:43:36.040346 00180000 ################################################################
2174 08:43:36.040998
2175 08:43:36.713290 00200000 ################################################################
2176 08:43:36.713851
2177 08:43:37.386912 00280000 ################################################################
2178 08:43:37.387420
2179 08:43:38.051359 00300000 ################################################################
2180 08:43:38.051876
2181 08:43:38.735817 00380000 ################################################################
2182 08:43:38.736389
2183 08:43:39.411762 00400000 ################################################################
2184 08:43:39.412320
2185 08:43:40.090041 00480000 ################################################################
2186 08:43:40.090584
2187 08:43:40.774310 00500000 ################################################################
2188 08:43:40.774945
2189 08:43:41.422289 00580000 ################################################################
2190 08:43:41.422449
2191 08:43:42.067497 00600000 ################################################################
2192 08:43:42.068011
2193 08:43:42.734202 00680000 ################################################################
2194 08:43:42.734798
2195 08:43:43.369843 00700000 ################################################################
2196 08:43:43.369980
2197 08:43:43.393213 00780000 ### done.
2198 08:43:43.393300
2199 08:43:43.396355 The bootfile was 7884688 bytes long.
2200 08:43:43.396440
2201 08:43:43.399784 Sending tftp read request... done.
2202 08:43:43.399872
2203 08:43:43.402702 Waiting for the transfer...
2204 08:43:43.402796
2205 08:43:44.023775 00000000 ################################################################
2206 08:43:44.023912
2207 08:43:44.614054 00080000 ################################################################
2208 08:43:44.614548
2209 08:43:45.278692 00100000 ################################################################
2210 08:43:45.279181
2211 08:43:45.932927 00180000 ################################################################
2212 08:43:45.933386
2213 08:43:46.565733 00200000 ################################################################
2214 08:43:46.565864
2215 08:43:47.221021 00280000 ################################################################
2216 08:43:47.221154
2217 08:43:47.822494 00300000 ################################################################
2218 08:43:47.823049
2219 08:43:48.507144 00380000 ################################################################
2220 08:43:48.507730
2221 08:43:49.218843 00400000 ################################################################
2222 08:43:49.219373
2223 08:43:49.814297 00480000 ################################################################
2224 08:43:49.814445
2225 08:43:50.361258 00500000 ################################################################
2226 08:43:50.361402
2227 08:43:50.896305 00580000 ################################################################
2228 08:43:50.896448
2229 08:43:51.458704 00600000 ################################################################
2230 08:43:51.458879
2231 08:43:51.998521 00680000 ################################################################
2232 08:43:51.998654
2233 08:43:52.537393 00700000 ################################################################
2234 08:43:52.537547
2235 08:43:53.084815 00780000 ################################################################
2236 08:43:53.084995
2237 08:43:53.540588 00800000 #################################################### done.
2238 08:43:53.540749
2239 08:43:53.543241 Sending tftp read request... done.
2240 08:43:53.543315
2241 08:43:53.547157 Waiting for the transfer...
2242 08:43:53.547240
2243 08:43:53.547307 00000000 # done.
2244 08:43:53.547394
2245 08:43:53.556899 Command line loaded dynamically from TFTP file: 11220707/tftp-deploy-f60wx2zm/kernel/cmdline
2246 08:43:53.556983
2247 08:43:53.573560 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2248 08:43:53.573645
2249 08:43:53.577043 Shutting down all USB controllers.
2250 08:43:53.580063
2251 08:43:53.580144 Removing current net device
2252 08:43:53.580210
2253 08:43:53.583353 Finalizing coreboot
2254 08:43:53.583435
2255 08:43:53.590092 Exiting depthcharge with code 4 at timestamp: 30335672
2256 08:43:53.590175
2257 08:43:53.590242
2258 08:43:53.590305 Starting kernel ...
2259 08:43:53.590365
2260 08:43:53.590422
2261 08:43:53.590786 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2262 08:43:53.590880 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2263 08:43:53.590957 Setting prompt string to ['Linux version [0-9]']
2264 08:43:53.591026 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2265 08:43:53.591095 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2267 08:48:16.591139 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2269 08:48:16.591344 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2271 08:48:16.591504 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2274 08:48:16.591758 end: 2 depthcharge-action (duration 00:05:00) [common]
2276 08:48:16.592009 Cleaning after the job
2277 08:48:16.592101 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220707/tftp-deploy-f60wx2zm/ramdisk
2278 08:48:16.593400 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220707/tftp-deploy-f60wx2zm/kernel
2279 08:48:16.594634 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220707/tftp-deploy-f60wx2zm/modules
2280 08:48:16.595108 start: 5.1 power-off (timeout 00:00:30) [common]
2281 08:48:16.595267 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2282 08:48:16.671478 >> Command sent successfully.
2283 08:48:16.674052 Returned 0 in 0 seconds
2284 08:48:16.774402 end: 5.1 power-off (duration 00:00:00) [common]
2286 08:48:16.774715 start: 5.2 read-feedback (timeout 00:10:00) [common]
2287 08:48:16.774977 Listened to connection for namespace 'common' for up to 1s
2288 08:48:17.774970 Finalising connection for namespace 'common'
2289 08:48:17.775156 Disconnecting from shell: Finalise
2290 08:48:17.775265
2291 08:48:17.875584 end: 5.2 read-feedback (duration 00:00:01) [common]
2292 08:48:17.875727 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11220707
2293 08:48:17.893464 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11220707
2294 08:48:17.893650 JobError: Your job cannot terminate cleanly.