Boot log: dell-latitude-5400-8665U-sarien

    1 08:43:04.770088  lava-dispatcher, installed at version: 2023.05.1
    2 08:43:04.770324  start: 0 validate
    3 08:43:04.770462  Start time: 2023-08-07 08:43:04.770451+00:00 (UTC)
    4 08:43:04.770597  Using caching service: 'http://localhost/cache/?uri=%s'
    5 08:43:04.770727  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 08:43:05.030557  Using caching service: 'http://localhost/cache/?uri=%s'
    7 08:43:05.030737  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 08:43:21.536585  Using caching service: 'http://localhost/cache/?uri=%s'
    9 08:43:21.537294  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 08:43:22.544144  validate duration: 17.77
   12 08:43:22.544450  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 08:43:22.544547  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 08:43:22.544636  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 08:43:22.544761  Not decompressing ramdisk as can be used compressed.
   16 08:43:22.544845  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 08:43:22.544910  saving as /var/lib/lava/dispatcher/tmp/11220710/tftp-deploy-j1pugucc/ramdisk/rootfs.cpio.gz
   18 08:43:22.544970  total size: 8418130 (8MB)
   19 08:43:22.811178  progress   0% (0MB)
   20 08:43:22.814992  progress   5% (0MB)
   21 08:43:22.818817  progress  10% (0MB)
   22 08:43:22.822685  progress  15% (1MB)
   23 08:43:22.826531  progress  20% (1MB)
   24 08:43:22.830360  progress  25% (2MB)
   25 08:43:22.834197  progress  30% (2MB)
   26 08:43:22.837722  progress  35% (2MB)
   27 08:43:22.841554  progress  40% (3MB)
   28 08:43:22.845382  progress  45% (3MB)
   29 08:43:22.849199  progress  50% (4MB)
   30 08:43:22.853017  progress  55% (4MB)
   31 08:43:22.856803  progress  60% (4MB)
   32 08:43:22.860289  progress  65% (5MB)
   33 08:43:22.864054  progress  70% (5MB)
   34 08:43:22.867838  progress  75% (6MB)
   35 08:43:22.871612  progress  80% (6MB)
   36 08:43:22.875402  progress  85% (6MB)
   37 08:43:22.879183  progress  90% (7MB)
   38 08:43:22.882924  progress  95% (7MB)
   39 08:43:22.886409  progress 100% (8MB)
   40 08:43:22.886815  8MB downloaded in 0.34s (23.49MB/s)
   41 08:43:22.887055  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 08:43:22.887448  end: 1.1 download-retry (duration 00:00:00) [common]
   44 08:43:22.887585  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 08:43:22.887720  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 08:43:22.887925  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 08:43:22.888036  saving as /var/lib/lava/dispatcher/tmp/11220710/tftp-deploy-j1pugucc/kernel/bzImage
   48 08:43:22.888140  total size: 7884688 (7MB)
   49 08:43:22.888239  No compression specified
   50 08:43:22.889883  progress   0% (0MB)
   51 08:43:22.893429  progress   5% (0MB)
   52 08:43:22.896933  progress  10% (0MB)
   53 08:43:22.900487  progress  15% (1MB)
   54 08:43:22.904055  progress  20% (1MB)
   55 08:43:22.907594  progress  25% (1MB)
   56 08:43:22.911134  progress  30% (2MB)
   57 08:43:22.914650  progress  35% (2MB)
   58 08:43:22.918155  progress  40% (3MB)
   59 08:43:22.921886  progress  45% (3MB)
   60 08:43:22.925430  progress  50% (3MB)
   61 08:43:22.928904  progress  55% (4MB)
   62 08:43:22.932374  progress  60% (4MB)
   63 08:43:22.935860  progress  65% (4MB)
   64 08:43:22.939332  progress  70% (5MB)
   65 08:43:22.942793  progress  75% (5MB)
   66 08:43:22.946292  progress  80% (6MB)
   67 08:43:22.949781  progress  85% (6MB)
   68 08:43:22.953265  progress  90% (6MB)
   69 08:43:22.956744  progress  95% (7MB)
   70 08:43:22.960222  progress 100% (7MB)
   71 08:43:22.960546  7MB downloaded in 0.07s (103.86MB/s)
   72 08:43:22.960765  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 08:43:22.961144  end: 1.2 download-retry (duration 00:00:00) [common]
   75 08:43:22.961283  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 08:43:22.961417  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 08:43:22.961619  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 08:43:22.961735  saving as /var/lib/lava/dispatcher/tmp/11220710/tftp-deploy-j1pugucc/modules/modules.tar
   79 08:43:22.961844  total size: 250852 (0MB)
   80 08:43:22.961949  Using unxz to decompress xz
   81 08:43:22.967350  progress  13% (0MB)
   82 08:43:22.968126  progress  26% (0MB)
   83 08:43:22.968531  progress  39% (0MB)
   84 08:43:22.970058  progress  52% (0MB)
   85 08:43:22.972042  progress  65% (0MB)
   86 08:43:22.974175  progress  78% (0MB)
   87 08:43:22.976357  progress  91% (0MB)
   88 08:43:22.978300  progress 100% (0MB)
   89 08:43:22.984063  0MB downloaded in 0.02s (10.77MB/s)
   90 08:43:22.984509  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 08:43:22.984961  end: 1.3 download-retry (duration 00:00:00) [common]
   93 08:43:22.985126  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   94 08:43:22.985319  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   95 08:43:22.985466  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 08:43:22.985601  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   97 08:43:22.985919  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu
   98 08:43:22.986150  makedir: /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin
   99 08:43:22.986328  makedir: /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/tests
  100 08:43:22.986509  makedir: /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/results
  101 08:43:22.986719  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-add-keys
  102 08:43:22.986959  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-add-sources
  103 08:43:22.987185  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-background-process-start
  104 08:43:22.987396  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-background-process-stop
  105 08:43:22.987607  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-common-functions
  106 08:43:22.987832  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-echo-ipv4
  107 08:43:22.988069  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-install-packages
  108 08:43:22.988304  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-installed-packages
  109 08:43:22.988511  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-os-build
  110 08:43:22.988706  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-probe-channel
  111 08:43:22.988913  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-probe-ip
  112 08:43:22.989137  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-target-ip
  113 08:43:22.989359  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-target-mac
  114 08:43:22.989565  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-target-storage
  115 08:43:22.989770  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-test-case
  116 08:43:22.990006  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-test-event
  117 08:43:22.990234  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-test-feedback
  118 08:43:22.990439  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-test-raise
  119 08:43:22.990638  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-test-reference
  120 08:43:22.990837  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-test-runner
  121 08:43:22.991034  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-test-set
  122 08:43:22.991234  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-test-shell
  123 08:43:22.991431  Updating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-install-packages (oe)
  124 08:43:22.991662  Updating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/bin/lava-installed-packages (oe)
  125 08:43:22.991857  Creating /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/environment
  126 08:43:22.992022  LAVA metadata
  127 08:43:22.992142  - LAVA_JOB_ID=11220710
  128 08:43:22.992251  - LAVA_DISPATCHER_IP=192.168.201.1
  129 08:43:22.992424  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  130 08:43:22.992535  skipped lava-vland-overlay
  131 08:43:22.992666  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 08:43:22.992804  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  133 08:43:22.992906  skipped lava-multinode-overlay
  134 08:43:22.993022  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 08:43:22.993153  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  136 08:43:22.993286  Loading test definitions
  137 08:43:22.993437  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  138 08:43:22.993558  Using /lava-11220710 at stage 0
  139 08:43:22.994087  uuid=11220710_1.4.2.3.1 testdef=None
  140 08:43:22.994217  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 08:43:22.994349  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  142 08:43:22.995187  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 08:43:22.995566  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  145 08:43:22.996587  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 08:43:22.996961  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  148 08:43:22.997948  runner path: /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/0/tests/0_dmesg test_uuid 11220710_1.4.2.3.1
  149 08:43:22.998173  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 08:43:22.998550  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  152 08:43:22.998663  Using /lava-11220710 at stage 1
  153 08:43:22.999150  uuid=11220710_1.4.2.3.5 testdef=None
  154 08:43:22.999285  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 08:43:22.999421  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  156 08:43:23.000167  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 08:43:23.000529  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  159 08:43:23.001546  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 08:43:23.001927  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  162 08:43:23.002950  runner path: /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/1/tests/1_bootrr test_uuid 11220710_1.4.2.3.5
  163 08:43:23.003169  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 08:43:23.003521  Creating lava-test-runner.conf files
  166 08:43:23.003632  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/0 for stage 0
  167 08:43:23.003770  - 0_dmesg
  168 08:43:23.003897  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11220710/lava-overlay-vsjzcwuu/lava-11220710/1 for stage 1
  169 08:43:23.004042  - 1_bootrr
  170 08:43:23.004186  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 08:43:23.004319  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  172 08:43:23.017174  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 08:43:23.017394  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  174 08:43:23.017541  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 08:43:23.017684  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 08:43:23.017827  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  177 08:43:23.342477  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 08:43:23.343002  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 08:43:23.343211  extracting modules file /var/lib/lava/dispatcher/tmp/11220710/tftp-deploy-j1pugucc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11220710/extract-overlay-ramdisk-5ipkbp5t/ramdisk
  180 08:43:23.368032  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 08:43:23.368307  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 08:43:23.368455  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11220710/compress-overlay-rgeqrli2/overlay-1.4.2.4.tar.gz to ramdisk
  183 08:43:23.368566  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11220710/compress-overlay-rgeqrli2/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11220710/extract-overlay-ramdisk-5ipkbp5t/ramdisk
  184 08:43:23.385595  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 08:43:23.385817  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 08:43:23.385963  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 08:43:23.386101  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 08:43:23.386236  Building ramdisk /var/lib/lava/dispatcher/tmp/11220710/extract-overlay-ramdisk-5ipkbp5t/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11220710/extract-overlay-ramdisk-5ipkbp5t/ramdisk
  189 08:43:23.527395  >> 49788 blocks

  190 08:43:24.435941  rename /var/lib/lava/dispatcher/tmp/11220710/extract-overlay-ramdisk-5ipkbp5t/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11220710/tftp-deploy-j1pugucc/ramdisk/ramdisk.cpio.gz
  191 08:43:24.436424  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 08:43:24.436557  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 08:43:24.436670  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 08:43:24.436812  No mkimage arch provided, not using FIT.
  195 08:43:24.436933  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 08:43:24.437019  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 08:43:24.437133  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 08:43:24.437239  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 08:43:24.437321  No LXC device requested
  200 08:43:24.437403  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 08:43:24.437495  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 08:43:24.437584  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 08:43:24.437660  Checking files for TFTP limit of 4294967296 bytes.
  204 08:43:24.438131  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 08:43:24.438238  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 08:43:24.438340  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 08:43:24.438470  substitutions:
  208 08:43:24.438540  - {DTB}: None
  209 08:43:24.438606  - {INITRD}: 11220710/tftp-deploy-j1pugucc/ramdisk/ramdisk.cpio.gz
  210 08:43:24.438667  - {KERNEL}: 11220710/tftp-deploy-j1pugucc/kernel/bzImage
  211 08:43:24.438726  - {LAVA_MAC}: None
  212 08:43:24.438784  - {PRESEED_CONFIG}: None
  213 08:43:24.438864  - {PRESEED_LOCAL}: None
  214 08:43:24.438952  - {RAMDISK}: 11220710/tftp-deploy-j1pugucc/ramdisk/ramdisk.cpio.gz
  215 08:43:24.439034  - {ROOT_PART}: None
  216 08:43:24.439112  - {ROOT}: None
  217 08:43:24.439169  - {SERVER_IP}: 192.168.201.1
  218 08:43:24.439225  - {TEE}: None
  219 08:43:24.439281  Parsed boot commands:
  220 08:43:24.439337  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 08:43:24.439524  Parsed boot commands: tftpboot 192.168.201.1 11220710/tftp-deploy-j1pugucc/kernel/bzImage 11220710/tftp-deploy-j1pugucc/kernel/cmdline 11220710/tftp-deploy-j1pugucc/ramdisk/ramdisk.cpio.gz
  222 08:43:24.439616  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 08:43:24.439705  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 08:43:24.439804  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 08:43:24.439895  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 08:43:24.439973  Not connected, no need to disconnect.
  227 08:43:24.440053  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 08:43:24.440135  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 08:43:24.440206  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-2'
  230 08:43:24.444607  Setting prompt string to ['lava-test: # ']
  231 08:43:24.445195  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 08:43:24.445402  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 08:43:24.445567  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 08:43:24.445742  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 08:43:24.446007  Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-2' '--port=1' '--command=reboot'
  236 08:43:41.342730  >> Command sent successfully.

  237 08:43:41.345190  Returned 0 in 16 seconds
  238 08:43:41.445633  end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
  240 08:43:41.446105  end: 2.2.2 reset-device (duration 00:00:17) [common]
  241 08:43:41.446254  start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
  242 08:43:41.446387  Setting prompt string to 'Starting depthcharge on sarien...'
  243 08:43:41.446494  Changing prompt to 'Starting depthcharge on sarien...'
  244 08:43:41.446603  depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
  245 08:43:41.446984  [Enter `^Ec?' for help]

  246 08:43:41.447100  

  247 08:43:41.447216  

  248 08:43:41.447350  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  249 08:43:41.447511  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz

  250 08:43:41.447638  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  251 08:43:41.447764  CPU: AES supported, TXT supported, VT supported

  252 08:43:41.447890  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)

  253 08:43:41.448014  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  254 08:43:41.448139  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1

  255 08:43:41.448263  VBOOT: Loading verstage.

  256 08:43:41.448389  CBFS @ 1d00000 size 300000

  257 08:43:41.448512  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  258 08:43:41.448622  CBFS: Locating 'fallback/verstage'

  259 08:43:41.448739  CBFS: Found @ offset 10f6c0 size 1435c

  260 08:43:41.448854  

  261 08:43:41.448963  

  262 08:43:41.449114  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  263 08:43:41.449235  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  264 08:43:41.449364  done! DID_VID 0x00281ae0

  265 08:43:41.449462  TPM ready after 0 ms

  266 08:43:41.449554  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  267 08:43:41.449644  tlcl_send_startup: Startup return code is 0

  268 08:43:41.449752  TPM: setup succeeded

  269 08:43:41.449882  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  270 08:43:41.450019  Checking cr50 for recovery request

  271 08:43:41.450108  Phase 1

  272 08:43:41.450196  FMAP: Found "FLASH" version 1.1 at 1c10000.

  273 08:43:41.450318  FMAP: base = fe000000 size = 2000000 #areas = 37

  274 08:43:41.450407  FMAP: area GBB found @ 1c11000 (978944 bytes)

  275 08:43:41.450543  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  276 08:43:41.450634  Phase 2

  277 08:43:41.450724  Phase 3

  278 08:43:41.450813  FMAP: area GBB found @ 1c11000 (978944 bytes)

  279 08:43:41.450904  VB2:vb2_report_dev_firmware() This is developer signed firmware

  280 08:43:41.450993  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  281 08:43:41.451128  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  282 08:43:41.451216  VB2:vb2_verify_keyblock() Checking key block signature...

  283 08:43:41.451323  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  284 08:43:41.451427  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  285 08:43:41.451516  VB2:vb2_verify_fw_preamble() Verifying preamble.

  286 08:43:41.451637  Phase 4

  287 08:43:41.451724  FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)

  288 08:43:41.451814  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  289 08:43:41.451939  VB2:vb2_rsa_verify_digest() Digest check failed!

  290 08:43:41.452028  VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7

  291 08:43:41.452118  Saving nvdata

  292 08:43:41.452205  Reboot requested (10020007)

  293 08:43:41.452293  board_reset() called!

  294 08:43:41.452381  full_reset() called!

  295 08:43:45.644701  

  296 08:43:45.644851  

  297 08:43:45.653821  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  298 08:43:45.657773  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz

  299 08:43:45.663234  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  300 08:43:45.667706  CPU: AES supported, TXT supported, VT supported

  301 08:43:45.673028  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)

  302 08:43:45.677874  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  303 08:43:45.682760  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1

  304 08:43:45.686793  VBOOT: Loading verstage.

  305 08:43:45.689243  CBFS @ 1d00000 size 300000

  306 08:43:45.695299  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  307 08:43:45.699021  CBFS: Locating 'fallback/verstage'

  308 08:43:45.703718  CBFS: Found @ offset 10f6c0 size 1435c

  309 08:43:45.717073  

  310 08:43:45.718213  

  311 08:43:45.725887  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  312 08:43:45.732956  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  313 08:43:45.735911  done! DID_VID 0x00281ae0

  314 08:43:45.738207  TPM ready after 0 ms

  315 08:43:45.741988  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  316 08:43:45.826425  tlcl_send_startup: Startup return code is 0

  317 08:43:45.828801  TPM: setup succeeded

  318 08:43:45.846008  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  319 08:43:45.849194  Checking cr50 for recovery request

  320 08:43:45.859346  Phase 1

  321 08:43:45.863685  FMAP: Found "FLASH" version 1.1 at 1c10000.

  322 08:43:45.868931  FMAP: base = fe000000 size = 2000000 #areas = 37

  323 08:43:45.873665  FMAP: area GBB found @ 1c11000 (978944 bytes)

  324 08:43:45.880908  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  325 08:43:45.886931  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  326 08:43:45.889685  Recovery requested (1009000e)

  327 08:43:45.892002  Saving nvdata

  328 08:43:45.906266  tlcl_extend: response is 0

  329 08:43:45.921869  tlcl_extend: response is 0

  330 08:43:45.926158  CBFS @ 1d00000 size 300000

  331 08:43:45.932471  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  332 08:43:45.936065  CBFS: Locating 'fallback/romstage'

  333 08:43:45.939127  CBFS: Found @ offset 80 size 15b2c

  334 08:43:45.940506  

  335 08:43:45.940589  

  336 08:43:45.948896  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...

  337 08:43:45.953697  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  338 08:43:45.958381  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  339 08:43:45.963081  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  340 08:43:45.967351  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  341 08:43:45.971243  gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000

  342 08:43:45.973630  TCO_STS:   0000 0004

  343 08:43:45.976265  GEN_PMCON: d0015209 00002200

  344 08:43:45.979093  GBLRST_CAUSE: 00000000 00000000

  345 08:43:45.981224  prev_sleep_state 5

  346 08:43:45.985316  Boot Count incremented to 28134

  347 08:43:45.988474  CBFS @ 1d00000 size 300000

  348 08:43:45.994530  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  349 08:43:45.997174  CBFS: Locating 'fspm.bin'

  350 08:43:46.001074  CBFS: Found @ offset 60fc0 size 70000

  351 08:43:46.006289  FMAP: Found "FLASH" version 1.1 at 1c10000.

  352 08:43:46.011674  FMAP: base = fe000000 size = 2000000 #areas = 37

  353 08:43:46.017123  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

  354 08:43:46.023803  Probing TPM I2C: done! DID_VID 0x00281ae0

  355 08:43:46.026385  Locality already claimed

  356 08:43:46.029703  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  357 08:43:46.049244  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  358 08:43:46.055766  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  359 08:43:46.058458  MRC cache found, size 18e0

  360 08:43:46.060323  bootmode is set to :2

  361 08:43:46.153204  CBMEM:

  362 08:43:46.156634  IMD: root @ 89fff000 254 entries.

  363 08:43:46.159781  IMD: root @ 89ffec00 62 entries.

  364 08:43:46.163293  External stage cache:

  365 08:43:46.166851  IMD: root @ 8abff000 254 entries.

  366 08:43:46.169463  IMD: root @ 8abfec00 62 entries.

  367 08:43:46.175645  VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...

  368 08:43:46.179777  creating vboot_handoff structure

  369 08:43:46.198903  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  370 08:43:46.214693  tlcl_write: response is 0

  371 08:43:46.233197  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  372 08:43:46.237740  MRC: TPM MRC hash updated successfully.

  373 08:43:46.239092  1 DIMMs found

  374 08:43:46.241491  top_of_ram = 0x8a000000

  375 08:43:46.247132  MTRR Range: Start=89000000 End=8a000000 (Size 1000000)

  376 08:43:46.252143  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  377 08:43:46.254185  CBFS @ 1d00000 size 300000

  378 08:43:46.260428  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  379 08:43:46.264029  CBFS: Locating 'fallback/postcar'

  380 08:43:46.267453  CBFS: Found @ offset 107000 size 41a4

  381 08:43:46.274186  Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)

  382 08:43:46.284370  Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210

  383 08:43:46.288910  Processing 126 relocs. Offset value of 0x87cdd000

  384 08:43:46.292062  

  385 08:43:46.292357  

  386 08:43:46.300873  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...

  387 08:43:46.303609  CBFS @ 1d00000 size 300000

  388 08:43:46.309194  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  389 08:43:46.312826  CBFS: Locating 'fallback/ramstage'

  390 08:43:46.316544  CBFS: Found @ offset 458c0 size 1a8a8

  391 08:43:46.323509  Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)

  392 08:43:46.352853  Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0

  393 08:43:46.357796  Processing 3754 relocs. Offset value of 0x88e81000

  394 08:43:46.363879  

  395 08:43:46.363997  

  396 08:43:46.371787  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...

  397 08:43:46.377356  FMAP: Found "FLASH" version 1.1 at 1c10000.

  398 08:43:46.381718  FMAP: base = fe000000 size = 2000000 #areas = 37

  399 08:43:46.386746  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

  400 08:43:46.391051  WARNING: RO_VPD is uninitialized or empty.

  401 08:43:46.395097  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  402 08:43:46.399976  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  403 08:43:46.401443  Normal boot.

  404 08:43:46.408680  BS: BS_PRE_DEVICE times (us): entry 0 run 59 exit 1161

  405 08:43:46.411033  CBFS @ 1d00000 size 300000

  406 08:43:46.417852  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  407 08:43:46.420846  CBFS: Locating 'cpu_microcode_blob.bin'

  408 08:43:46.424910  CBFS: Found @ offset 15c40 size 2fc00

  409 08:43:46.429411  microcode: sig=0x806ec pf=0x80 revision=0xb7

  410 08:43:46.431596  Skip microcode update

  411 08:43:46.435115  CBFS @ 1d00000 size 300000

  412 08:43:46.441332  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  413 08:43:46.443857  CBFS: Locating 'fsps.bin'

  414 08:43:46.447207  CBFS: Found @ offset d1fc0 size 35000

  415 08:43:46.481893  Detected 4 core, 8 thread CPU.

  416 08:43:46.484267  Setting up SMI for CPU

  417 08:43:46.486622  IED base = 0x8ac00000

  418 08:43:46.489064  IED size = 0x00400000

  419 08:43:46.491573  Will perform SMM setup.

  420 08:43:46.496603  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.

  421 08:43:46.504426  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  422 08:43:46.508877  Processing 16 relocs. Offset value of 0x00030000

  423 08:43:46.512050  Attempting to start 7 APs

  424 08:43:46.515763  Waiting for 10ms after sending INIT.

  425 08:43:46.532053  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.

  426 08:43:46.532705  done.

  427 08:43:46.534155  AP: slot 1 apic_id 2.

  428 08:43:46.536746  AP: slot 3 apic_id 3.

  429 08:43:46.539085  AP: slot 4 apic_id 4.

  430 08:43:46.541088  AP: slot 5 apic_id 5.

  431 08:43:46.545487  Waiting for 2nd SIPI to complete...done.

  432 08:43:46.547795  AP: slot 7 apic_id 7.

  433 08:43:46.549666  AP: slot 6 apic_id 6.

  434 08:43:46.557167  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  435 08:43:46.562608  Processing 13 relocs. Offset value of 0x00038000

  436 08:43:46.569293  SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)

  437 08:43:46.572411  Installing SMM handler to 0x8a000000

  438 08:43:46.581147  Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40

  439 08:43:46.586007  Processing 867 relocs. Offset value of 0x8a010000

  440 08:43:46.594322  Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8

  441 08:43:46.598986  Processing 13 relocs. Offset value of 0x8a008000

  442 08:43:46.604833  SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd

  443 08:43:46.610366  SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd

  444 08:43:46.616334  SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd

  445 08:43:46.621969  SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd

  446 08:43:46.627435  SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd

  447 08:43:46.633584  SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd

  448 08:43:46.639260  SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd

  449 08:43:46.645461  SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)

  450 08:43:46.649752  Clearing SMI status registers

  451 08:43:46.650614  SMI_STS: PM1 

  452 08:43:46.652862  PM1_STS: WAK PWRBTN 

  453 08:43:46.655326  TCO_STS: BOOT SECOND_TO 

  454 08:43:46.656984  GPE0 STD STS: eSPI 

  455 08:43:46.659572  New SMBASE 0x8a000000

  456 08:43:46.662948  In relocation handler: CPU 0

  457 08:43:46.666775  New SMBASE=0x8a000000 IEDBASE=0x8ac00000

  458 08:43:46.671123  Writing SMRR. base = 0x8a000006, mask=0xff000800

  459 08:43:46.673519  Relocation complete.

  460 08:43:46.675770  New SMBASE 0x89fff800

  461 08:43:46.678876  In relocation handler: CPU 2

  462 08:43:46.683153  New SMBASE=0x89fff800 IEDBASE=0x8ac00000

  463 08:43:46.688538  Writing SMRR. base = 0x8a000006, mask=0xff000800

  464 08:43:46.690371  Relocation complete.

  465 08:43:46.692825  New SMBASE 0x89fff400

  466 08:43:46.695024  In relocation handler: CPU 3

  467 08:43:46.699148  New SMBASE=0x89fff400 IEDBASE=0x8ac00000

  468 08:43:46.704759  Writing SMRR. base = 0x8a000006, mask=0xff000800

  469 08:43:46.706416  Relocation complete.

  470 08:43:46.708829  New SMBASE 0x89fffc00

  471 08:43:46.711505  In relocation handler: CPU 1

  472 08:43:46.715408  New SMBASE=0x89fffc00 IEDBASE=0x8ac00000

  473 08:43:46.720136  Writing SMRR. base = 0x8a000006, mask=0xff000800

  474 08:43:46.722735  Relocation complete.

  475 08:43:46.724793  New SMBASE 0x89ffec00

  476 08:43:46.728404  In relocation handler: CPU 5

  477 08:43:46.731882  New SMBASE=0x89ffec00 IEDBASE=0x8ac00000

  478 08:43:46.736600  Writing SMRR. base = 0x8a000006, mask=0xff000800

  479 08:43:46.739278  Relocation complete.

  480 08:43:46.741691  New SMBASE 0x89fff000

  481 08:43:46.744490  In relocation handler: CPU 4

  482 08:43:46.749008  New SMBASE=0x89fff000 IEDBASE=0x8ac00000

  483 08:43:46.753400  Writing SMRR. base = 0x8a000006, mask=0xff000800

  484 08:43:46.755879  Relocation complete.

  485 08:43:46.757723  New SMBASE 0x89ffe800

  486 08:43:46.759847  In relocation handler: CPU 6

  487 08:43:46.764522  New SMBASE=0x89ffe800 IEDBASE=0x8ac00000

  488 08:43:46.769457  Writing SMRR. base = 0x8a000006, mask=0xff000800

  489 08:43:46.771896  Relocation complete.

  490 08:43:46.773998  New SMBASE 0x89ffe400

  491 08:43:46.776930  In relocation handler: CPU 7

  492 08:43:46.780720  New SMBASE=0x89ffe400 IEDBASE=0x8ac00000

  493 08:43:46.785592  Writing SMRR. base = 0x8a000006, mask=0xff000800

  494 08:43:46.787566  Relocation complete.

  495 08:43:46.790333  Initializing CPU #0

  496 08:43:46.793348  CPU: vendor Intel device 806ec

  497 08:43:46.796661  CPU: family 06, model 8e, stepping 0c

  498 08:43:46.799190  Clearing out pending MCEs

  499 08:43:46.804195  Setting up local APIC... apic_id: 0x00 done.

  500 08:43:46.807400  Turbo is available but hidden

  501 08:43:46.809697  Turbo has been enabled

  502 08:43:46.811528  VMX status: enabled

  503 08:43:46.814924  IA32_FEATURE_CONTROL status: locked

  504 08:43:46.817256  Skip microcode update

  505 08:43:46.819962  CPU #0 initialized

  506 08:43:46.821982  Initializing CPU #2

  507 08:43:46.823785  Initializing CPU #5

  508 08:43:46.825930  Initializing CPU #4

  509 08:43:46.828859  CPU: vendor Intel device 806ec

  510 08:43:46.832674  CPU: family 06, model 8e, stepping 0c

  511 08:43:46.835411  CPU: vendor Intel device 806ec

  512 08:43:46.839132  CPU: family 06, model 8e, stepping 0c

  513 08:43:46.842441  Clearing out pending MCEs

  514 08:43:46.844315  Clearing out pending MCEs

  515 08:43:46.848944  Setting up local APIC...Initializing CPU #1

  516 08:43:46.850961  Initializing CPU #3

  517 08:43:46.854333  CPU: vendor Intel device 806ec

  518 08:43:46.858171  CPU: family 06, model 8e, stepping 0c

  519 08:43:46.861597  CPU: vendor Intel device 806ec

  520 08:43:46.864383  CPU: family 06, model 8e, stepping 0c

  521 08:43:46.867214  Clearing out pending MCEs

  522 08:43:46.870080  Clearing out pending MCEs

  523 08:43:46.875165  Setting up local APIC...CPU: vendor Intel device 806ec

  524 08:43:46.879320  CPU: family 06, model 8e, stepping 0c

  525 08:43:46.881394  Initializing CPU #7

  526 08:43:46.884012  Clearing out pending MCEs

  527 08:43:46.887612  CPU: vendor Intel device 806ec

  528 08:43:46.891322  CPU: family 06, model 8e, stepping 0c

  529 08:43:46.892568  Initializing CPU #6

  530 08:43:46.895577  Clearing out pending MCEs

  531 08:43:46.898619  CPU: vendor Intel device 806ec

  532 08:43:46.902424  CPU: family 06, model 8e, stepping 0c

  533 08:43:46.906871  Setting up local APIC... apic_id: 0x02 done.

  534 08:43:46.910960  Setting up local APIC... apic_id: 0x05 done.

  535 08:43:46.918256  Setting up local APIC...Setting up local APIC...Clearing out pending MCEs

  536 08:43:46.921182   apic_id: 0x07 done.

  537 08:43:46.925566  Setting up local APIC...VMX status: enabled

  538 08:43:46.926891   apic_id: 0x04 done.

  539 08:43:46.930711  IA32_FEATURE_CONTROL status: locked

  540 08:43:46.932873  VMX status: enabled

  541 08:43:46.935442  Skip microcode update

  542 08:43:46.938912  IA32_FEATURE_CONTROL status: locked

  543 08:43:46.940843  CPU #5 initialized

  544 08:43:46.942576  Skip microcode update

  545 08:43:46.945722   apic_id: 0x06 done.

  546 08:43:46.947213  VMX status: enabled

  547 08:43:46.949022  VMX status: enabled

  548 08:43:46.952500  IA32_FEATURE_CONTROL status: locked

  549 08:43:46.956109  IA32_FEATURE_CONTROL status: locked

  550 08:43:46.958703  Skip microcode update

  551 08:43:46.960658  Skip microcode update

  552 08:43:46.962971  CPU #7 initialized

  553 08:43:46.964848  CPU #6 initialized

  554 08:43:46.966696   apic_id: 0x01 done.

  555 08:43:46.968838  CPU #4 initialized

  556 08:43:46.970528  VMX status: enabled

  557 08:43:46.973373  VMX status: enabled

  558 08:43:46.975095   apic_id: 0x03 done.

  559 08:43:46.978855  IA32_FEATURE_CONTROL status: locked

  560 08:43:46.980803  VMX status: enabled

  561 08:43:46.982967  Skip microcode update

  562 08:43:46.986714  IA32_FEATURE_CONTROL status: locked

  563 08:43:46.988253  CPU #1 initialized

  564 08:43:46.990904  Skip microcode update

  565 08:43:46.994249  IA32_FEATURE_CONTROL status: locked

  566 08:43:46.996473  CPU #3 initialized

  567 08:43:46.998806  Skip microcode update

  568 08:43:47.000293  CPU #2 initialized

  569 08:43:47.004951  bsp_do_flight_plan done after 455 msecs.

  570 08:43:47.007527  CPU: frequency set to 4800 MHz

  571 08:43:47.009460  Enabling SMIs.

  572 08:43:47.010755  Locking SMM.

  573 08:43:47.013734  CBFS @ 1d00000 size 300000

  574 08:43:47.020446  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  575 08:43:47.022976  CBFS: Locating 'vbt.bin'

  576 08:43:47.026248  CBFS: Found @ offset 60a40 size 4a0

  577 08:43:47.030952  Found a VBT of 4608 bytes after decompression

  578 08:43:47.044883  FMAP: area GBB found @ 1c11000 (978944 bytes)

  579 08:43:47.106719  Detected 4 core, 8 thread CPU.

  580 08:43:47.110240  Detected 4 core, 8 thread CPU.

  581 08:43:47.336051  Display FSP Version Info HOB

  582 08:43:47.339642  Reference Code - CPU = 7.0.5e.40

  583 08:43:47.341732  uCode Version = 0.0.0.b8

  584 08:43:47.345494  Display FSP Version Info HOB

  585 08:43:47.348476  Reference Code - ME = 7.0.5e.40

  586 08:43:47.350571  MEBx version = 0.0.0.0

  587 08:43:47.354514  ME Firmware Version = Consumer SKU

  588 08:43:47.356962  Display FSP Version Info HOB

  589 08:43:47.361214  Reference Code - CNL PCH = 7.0.5e.40

  590 08:43:47.363551  PCH-CRID Status = Disabled

  591 08:43:47.367219  CNL PCH H A0 Hsio Version = 2.0.0.0

  592 08:43:47.370344  CNL PCH H Ax Hsio Version = 9.0.0.0

  593 08:43:47.374517  CNL PCH H Bx Hsio Version = a.0.0.0

  594 08:43:47.377593  CNL PCH LP B0 Hsio Version = 7.0.0.0

  595 08:43:47.381733  CNL PCH LP Bx Hsio Version = 6.0.0.0

  596 08:43:47.385097  CNL PCH LP Dx Hsio Version = 7.0.0.0

  597 08:43:47.388892  Display FSP Version Info HOB

  598 08:43:47.392863  Reference Code - SA - System Agent = 7.0.5e.40

  599 08:43:47.396337  Reference Code - MRC = 0.7.1.68

  600 08:43:47.398791  SA - PCIe Version = 7.0.5e.40

  601 08:43:47.401737  SA-CRID Status = Disabled

  602 08:43:47.404763  SA-CRID Original Value = 0.0.0.c

  603 08:43:47.408003  SA-CRID New Value = 0.0.0.c

  604 08:43:47.426379  RTC Init

  605 08:43:47.430081  Set power off after power failure.

  606 08:43:47.432102  Disabling Deep S3

  607 08:43:47.434304  Disabling Deep S3

  608 08:43:47.436160  Disabling Deep S4

  609 08:43:47.437712  Disabling Deep S4

  610 08:43:47.439979  Disabling Deep S5

  611 08:43:47.441439  Disabling Deep S5

  612 08:43:47.448405  BS: BS_DEV_INIT_CHIPS times (us): entry 602581 run 414330 exit 16239

  613 08:43:47.450402  Enumerating buses...

  614 08:43:47.454535  Show all devs... Before device enumeration.

  615 08:43:47.457375  Root Device: enabled 1

  616 08:43:47.460168  CPU_CLUSTER: 0: enabled 1

  617 08:43:47.462043  DOMAIN: 0000: enabled 1

  618 08:43:47.464358  APIC: 00: enabled 1

  619 08:43:47.466142  PCI: 00:00.0: enabled 1

  620 08:43:47.469171  PCI: 00:02.0: enabled 1

  621 08:43:47.471751  PCI: 00:04.0: enabled 1

  622 08:43:47.473756  PCI: 00:12.0: enabled 1

  623 08:43:47.476558  PCI: 00:12.5: enabled 0

  624 08:43:47.479063  PCI: 00:12.6: enabled 0

  625 08:43:47.480984  PCI: 00:13.0: enabled 0

  626 08:43:47.483756  PCI: 00:14.0: enabled 1

  627 08:43:47.486018  PCI: 00:14.1: enabled 0

  628 08:43:47.488852  PCI: 00:14.3: enabled 1

  629 08:43:47.490906  PCI: 00:14.5: enabled 0

  630 08:43:47.493390  PCI: 00:15.0: enabled 1

  631 08:43:47.495900  PCI: 00:15.1: enabled 1

  632 08:43:47.498078  PCI: 00:15.2: enabled 0

  633 08:43:47.500774  PCI: 00:15.3: enabled 0

  634 08:43:47.503304  PCI: 00:16.0: enabled 1

  635 08:43:47.505381  PCI: 00:16.1: enabled 0

  636 08:43:47.507905  PCI: 00:16.2: enabled 0

  637 08:43:47.510528  PCI: 00:16.3: enabled 0

  638 08:43:47.512555  PCI: 00:16.4: enabled 0

  639 08:43:47.515187  PCI: 00:16.5: enabled 0

  640 08:43:47.518205  PCI: 00:17.0: enabled 1

  641 08:43:47.519900  PCI: 00:19.0: enabled 1

  642 08:43:47.522422  PCI: 00:19.1: enabled 0

  643 08:43:47.524861  PCI: 00:19.2: enabled 1

  644 08:43:47.527119  PCI: 00:1a.0: enabled 0

  645 08:43:47.529869  PCI: 00:1c.0: enabled 1

  646 08:43:47.532332  PCI: 00:1c.1: enabled 0

  647 08:43:47.535143  PCI: 00:1c.2: enabled 0

  648 08:43:47.537206  PCI: 00:1c.3: enabled 0

  649 08:43:47.539506  PCI: 00:1c.4: enabled 0

  650 08:43:47.542034  PCI: 00:1c.5: enabled 0

  651 08:43:47.544617  PCI: 00:1c.6: enabled 0

  652 08:43:47.547127  PCI: 00:1c.7: enabled 1

  653 08:43:47.549045  PCI: 00:1d.0: enabled 1

  654 08:43:47.552044  PCI: 00:1d.1: enabled 1

  655 08:43:47.554141  PCI: 00:1d.2: enabled 0

  656 08:43:47.557084  PCI: 00:1d.3: enabled 0

  657 08:43:47.559534  PCI: 00:1d.4: enabled 1

  658 08:43:47.561636  PCI: 00:1e.0: enabled 0

  659 08:43:47.564178  PCI: 00:1e.1: enabled 0

  660 08:43:47.566380  PCI: 00:1e.2: enabled 0

  661 08:43:47.568913  PCI: 00:1e.3: enabled 0

  662 08:43:47.571749  PCI: 00:1f.0: enabled 1

  663 08:43:47.573864  PCI: 00:1f.1: enabled 1

  664 08:43:47.576273  PCI: 00:1f.2: enabled 1

  665 08:43:47.578491  PCI: 00:1f.3: enabled 1

  666 08:43:47.581415  PCI: 00:1f.4: enabled 1

  667 08:43:47.583982  PCI: 00:1f.5: enabled 1

  668 08:43:47.585582  PCI: 00:1f.6: enabled 1

  669 08:43:47.588043  USB0 port 0: enabled 1

  670 08:43:47.590608  I2C: 00:10: enabled 1

  671 08:43:47.592386  I2C: 00:10: enabled 1

  672 08:43:47.594875  I2C: 00:34: enabled 1

  673 08:43:47.597222  I2C: 00:2c: enabled 1

  674 08:43:47.599230  I2C: 00:50: enabled 1

  675 08:43:47.601796  PNP: 0c09.0: enabled 1

  676 08:43:47.604092  USB2 port 0: enabled 1

  677 08:43:47.606738  USB2 port 1: enabled 1

  678 08:43:47.608460  USB2 port 2: enabled 1

  679 08:43:47.611005  USB2 port 4: enabled 1

  680 08:43:47.613529  USB2 port 5: enabled 1

  681 08:43:47.615877  USB2 port 6: enabled 1

  682 08:43:47.617976  USB2 port 7: enabled 1

  683 08:43:47.620075  USB2 port 8: enabled 1

  684 08:43:47.622902  USB2 port 9: enabled 1

  685 08:43:47.624794  USB3 port 0: enabled 1

  686 08:43:47.627759  USB3 port 1: enabled 1

  687 08:43:47.629517  USB3 port 2: enabled 1

  688 08:43:47.632279  USB3 port 3: enabled 1

  689 08:43:47.634029  USB3 port 4: enabled 1

  690 08:43:47.636632  APIC: 02: enabled 1

  691 08:43:47.638350  APIC: 01: enabled 1

  692 08:43:47.640283  APIC: 03: enabled 1

  693 08:43:47.642250  APIC: 04: enabled 1

  694 08:43:47.644932  APIC: 05: enabled 1

  695 08:43:47.646522  APIC: 06: enabled 1

  696 08:43:47.648517  APIC: 07: enabled 1

  697 08:43:47.650912  Compare with tree...

  698 08:43:47.652947  Root Device: enabled 1

  699 08:43:47.655732   CPU_CLUSTER: 0: enabled 1

  700 08:43:47.658399    APIC: 00: enabled 1

  701 08:43:47.660227    APIC: 02: enabled 1

  702 08:43:47.662302    APIC: 01: enabled 1

  703 08:43:47.664865    APIC: 03: enabled 1

  704 08:43:47.667137    APIC: 04: enabled 1

  705 08:43:47.669331    APIC: 05: enabled 1

  706 08:43:47.671243    APIC: 06: enabled 1

  707 08:43:47.673729    APIC: 07: enabled 1

  708 08:43:47.676692   DOMAIN: 0000: enabled 1

  709 08:43:47.678507    PCI: 00:00.0: enabled 1

  710 08:43:47.681539    PCI: 00:02.0: enabled 1

  711 08:43:47.683691    PCI: 00:04.0: enabled 1

  712 08:43:47.687067    PCI: 00:12.0: enabled 1

  713 08:43:47.689547    PCI: 00:12.5: enabled 0

  714 08:43:47.691703    PCI: 00:12.6: enabled 0

  715 08:43:47.695083    PCI: 00:13.0: enabled 0

  716 08:43:47.697308    PCI: 00:14.0: enabled 1

  717 08:43:47.700425     USB0 port 0: enabled 1

  718 08:43:47.702428      USB2 port 0: enabled 1

  719 08:43:47.705531      USB2 port 1: enabled 1

  720 08:43:47.708093      USB2 port 2: enabled 1

  721 08:43:47.710821      USB2 port 4: enabled 1

  722 08:43:47.713776      USB2 port 5: enabled 1

  723 08:43:47.716316      USB2 port 6: enabled 1

  724 08:43:47.719049      USB2 port 7: enabled 1

  725 08:43:47.721930      USB2 port 8: enabled 1

  726 08:43:47.724180      USB2 port 9: enabled 1

  727 08:43:47.726750      USB3 port 0: enabled 1

  728 08:43:47.729889      USB3 port 1: enabled 1

  729 08:43:47.732682      USB3 port 2: enabled 1

  730 08:43:47.735352      USB3 port 3: enabled 1

  731 08:43:47.738137      USB3 port 4: enabled 1

  732 08:43:47.740595    PCI: 00:14.1: enabled 0

  733 08:43:47.743463    PCI: 00:14.3: enabled 1

  734 08:43:47.746179    PCI: 00:14.5: enabled 0

  735 08:43:47.748408    PCI: 00:15.0: enabled 1

  736 08:43:47.750883     I2C: 00:10: enabled 1

  737 08:43:47.753117     I2C: 00:10: enabled 1

  738 08:43:47.756346     I2C: 00:34: enabled 1

  739 08:43:47.758533    PCI: 00:15.1: enabled 1

  740 08:43:47.760998     I2C: 00:2c: enabled 1

  741 08:43:47.763390    PCI: 00:15.2: enabled 0

  742 08:43:47.766758    PCI: 00:15.3: enabled 0

  743 08:43:47.768860    PCI: 00:16.0: enabled 1

  744 08:43:47.771828    PCI: 00:16.1: enabled 0

  745 08:43:47.774330    PCI: 00:16.2: enabled 0

  746 08:43:47.777489    PCI: 00:16.3: enabled 0

  747 08:43:47.780070    PCI: 00:16.4: enabled 0

  748 08:43:47.782154    PCI: 00:16.5: enabled 0

  749 08:43:47.784790    PCI: 00:17.0: enabled 1

  750 08:43:47.787387    PCI: 00:19.0: enabled 1

  751 08:43:47.789910     I2C: 00:50: enabled 1

  752 08:43:47.792399    PCI: 00:19.1: enabled 0

  753 08:43:47.795898    PCI: 00:19.2: enabled 1

  754 08:43:47.798363    PCI: 00:1a.0: enabled 0

  755 08:43:47.800378    PCI: 00:1c.0: enabled 1

  756 08:43:47.803239    PCI: 00:1c.1: enabled 0

  757 08:43:47.806155    PCI: 00:1c.2: enabled 0

  758 08:43:47.808331    PCI: 00:1c.3: enabled 0

  759 08:43:47.811176    PCI: 00:1c.4: enabled 0

  760 08:43:47.813232    PCI: 00:1c.5: enabled 0

  761 08:43:47.816145    PCI: 00:1c.6: enabled 0

  762 08:43:47.818747    PCI: 00:1c.7: enabled 1

  763 08:43:47.821341    PCI: 00:1d.0: enabled 1

  764 08:43:47.824192    PCI: 00:1d.1: enabled 1

  765 08:43:47.826426    PCI: 00:1d.2: enabled 0

  766 08:43:47.829622    PCI: 00:1d.3: enabled 0

  767 08:43:47.832041    PCI: 00:1d.4: enabled 1

  768 08:43:47.834478    PCI: 00:1e.0: enabled 0

  769 08:43:47.837852    PCI: 00:1e.1: enabled 0

  770 08:43:47.840175    PCI: 00:1e.2: enabled 0

  771 08:43:47.842313    PCI: 00:1e.3: enabled 0

  772 08:43:47.845306    PCI: 00:1f.0: enabled 1

  773 08:43:47.848492     PNP: 0c09.0: enabled 1

  774 08:43:47.850222    PCI: 00:1f.1: enabled 1

  775 08:43:47.853461    PCI: 00:1f.2: enabled 1

  776 08:43:47.855449    PCI: 00:1f.3: enabled 1

  777 08:43:47.858212    PCI: 00:1f.4: enabled 1

  778 08:43:47.860937    PCI: 00:1f.5: enabled 1

  779 08:43:47.863605    PCI: 00:1f.6: enabled 1

  780 08:43:47.866169  Root Device scanning...

  781 08:43:47.869575  root_dev_scan_bus for Root Device

  782 08:43:47.872116  CPU_CLUSTER: 0 enabled

  783 08:43:47.874401  DOMAIN: 0000 enabled

  784 08:43:47.876225  DOMAIN: 0000 scanning...

  785 08:43:47.880160  PCI: pci_scan_bus for bus 00

  786 08:43:47.882733  PCI: 00:00.0 [8086/0000] ops

  787 08:43:47.886340  PCI: 00:00.0 [8086/3e34] enabled

  788 08:43:47.889057  PCI: 00:02.0 [8086/0000] ops

  789 08:43:47.892289  PCI: 00:02.0 [8086/3ea0] enabled

  790 08:43:47.896123  PCI: 00:04.0 [8086/1903] enabled

  791 08:43:47.898586  PCI: 00:08.0 [8086/1911] enabled

  792 08:43:47.902546  PCI: 00:12.0 [8086/9df9] enabled

  793 08:43:47.905583  PCI: 00:14.0 [8086/0000] bus ops

  794 08:43:47.909384  PCI: 00:14.0 [8086/9ded] enabled

  795 08:43:47.912777  PCI: 00:14.2 [8086/9def] enabled

  796 08:43:47.915441  PCI: 00:14.3 [8086/9df0] enabled

  797 08:43:47.919151  PCI: 00:15.0 [8086/0000] bus ops

  798 08:43:47.922262  PCI: 00:15.0 [8086/9de8] enabled

  799 08:43:47.925536  PCI: 00:15.1 [8086/0000] bus ops

  800 08:43:47.928828  PCI: 00:15.1 [8086/9de9] enabled

  801 08:43:47.932389  PCI: 00:16.0 [8086/0000] ops

  802 08:43:47.935728  PCI: 00:16.0 [8086/9de0] enabled

  803 08:43:47.937892  PCI: 00:17.0 [8086/0000] ops

  804 08:43:47.941096  PCI: 00:17.0 [8086/9dd3] enabled

  805 08:43:47.944519  PCI: 00:19.0 [8086/0000] bus ops

  806 08:43:47.948296  PCI: 00:19.0 [8086/9dc5] enabled

  807 08:43:47.951294  PCI: 00:19.2 [8086/0000] ops

  808 08:43:47.954816  PCI: 00:19.2 [8086/9dc7] enabled

  809 08:43:47.957486  PCI: 00:1c.0 [8086/0000] bus ops

  810 08:43:47.961187  PCI: 00:1c.0 [8086/9dbf] enabled

  811 08:43:47.966605  PCI: Static device PCI: 00:1c.7 not found, disabling it.

  812 08:43:47.969932  PCI: 00:1d.0 [8086/0000] bus ops

  813 08:43:47.973611  PCI: 00:1d.0 [8086/9db4] enabled

  814 08:43:47.978807  PCI: Static device PCI: 00:1d.1 not found, disabling it.

  815 08:43:47.984396  PCI: Static device PCI: 00:1d.4 not found, disabling it.

  816 08:43:47.987606  PCI: 00:1f.0 [8086/0000] bus ops

  817 08:43:47.991333  PCI: 00:1f.0 [8086/9d84] enabled

  818 08:43:47.996864  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  819 08:43:48.002500  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  820 08:43:48.005554  PCI: 00:1f.3 [8086/0000] bus ops

  821 08:43:48.009471  PCI: 00:1f.3 [8086/9dc8] enabled

  822 08:43:48.012376  PCI: 00:1f.4 [8086/0000] bus ops

  823 08:43:48.015707  PCI: 00:1f.4 [8086/9da3] enabled

  824 08:43:48.018900  PCI: 00:1f.5 [8086/0000] bus ops

  825 08:43:48.022659  PCI: 00:1f.5 [8086/9da4] enabled

  826 08:43:48.025694  PCI: 00:1f.6 [8086/15be] enabled

  827 08:43:48.029162  PCI: Leftover static devices:

  828 08:43:48.030144  PCI: 00:12.5

  829 08:43:48.031876  PCI: 00:12.6

  830 08:43:48.033180  PCI: 00:13.0

  831 08:43:48.034692  PCI: 00:14.1

  832 08:43:48.035565  PCI: 00:14.5

  833 08:43:48.036684  PCI: 00:15.2

  834 08:43:48.038372  PCI: 00:15.3

  835 08:43:48.039624  PCI: 00:16.1

  836 08:43:48.040918  PCI: 00:16.2

  837 08:43:48.042703  PCI: 00:16.3

  838 08:43:48.043902  PCI: 00:16.4

  839 08:43:48.045140  PCI: 00:16.5

  840 08:43:48.046507  PCI: 00:19.1

  841 08:43:48.048238  PCI: 00:1a.0

  842 08:43:48.049420  PCI: 00:1c.1

  843 08:43:48.050344  PCI: 00:1c.2

  844 08:43:48.052261  PCI: 00:1c.3

  845 08:43:48.053793  PCI: 00:1c.4

  846 08:43:48.054973  PCI: 00:1c.5

  847 08:43:48.055906  PCI: 00:1c.6

  848 08:43:48.057725  PCI: 00:1c.7

  849 08:43:48.059004  PCI: 00:1d.1

  850 08:43:48.059930  PCI: 00:1d.2

  851 08:43:48.061735  PCI: 00:1d.3

  852 08:43:48.062399  PCI: 00:1d.4

  853 08:43:48.064258  PCI: 00:1e.0

  854 08:43:48.065590  PCI: 00:1e.1

  855 08:43:48.067093  PCI: 00:1e.2

  856 08:43:48.068562  PCI: 00:1e.3

  857 08:43:48.069354  PCI: 00:1f.1

  858 08:43:48.071470  PCI: 00:1f.2

  859 08:43:48.074592  PCI: Check your devicetree.cb.

  860 08:43:48.076707  PCI: 00:14.0 scanning...

  861 08:43:48.079737  scan_usb_bus for PCI: 00:14.0

  862 08:43:48.082080  USB0 port 0 enabled

  863 08:43:48.084576  USB0 port 0 scanning...

  864 08:43:48.087419  scan_usb_bus for USB0 port 0

  865 08:43:48.090445  USB2 port 0 enabled

  866 08:43:48.091973  USB2 port 1 enabled

  867 08:43:48.094224  USB2 port 2 enabled

  868 08:43:48.095695  USB2 port 4 enabled

  869 08:43:48.098091  USB2 port 5 enabled

  870 08:43:48.099961  USB2 port 6 enabled

  871 08:43:48.101698  USB2 port 7 enabled

  872 08:43:48.104254  USB2 port 8 enabled

  873 08:43:48.106239  USB2 port 9 enabled

  874 08:43:48.108739  USB3 port 0 enabled

  875 08:43:48.110062  USB3 port 1 enabled

  876 08:43:48.112507  USB3 port 2 enabled

  877 08:43:48.114093  USB3 port 3 enabled

  878 08:43:48.115995  USB3 port 4 enabled

  879 08:43:48.118589  USB2 port 0 scanning...

  880 08:43:48.122419  scan_usb_bus for USB2 port 0

  881 08:43:48.125110  scan_usb_bus for USB2 port 0 done

  882 08:43:48.130801  scan_bus: scanning of bus USB2 port 0 took 9064 usecs

  883 08:43:48.133232  USB2 port 1 scanning...

  884 08:43:48.136720  scan_usb_bus for USB2 port 1

  885 08:43:48.140254  scan_usb_bus for USB2 port 1 done

  886 08:43:48.145166  scan_bus: scanning of bus USB2 port 1 took 9061 usecs

  887 08:43:48.148052  USB2 port 2 scanning...

  888 08:43:48.150726  scan_usb_bus for USB2 port 2

  889 08:43:48.154719  scan_usb_bus for USB2 port 2 done

  890 08:43:48.159493  scan_bus: scanning of bus USB2 port 2 took 9063 usecs

  891 08:43:48.162539  USB2 port 4 scanning...

  892 08:43:48.164912  scan_usb_bus for USB2 port 4

  893 08:43:48.168738  scan_usb_bus for USB2 port 4 done

  894 08:43:48.173858  scan_bus: scanning of bus USB2 port 4 took 9060 usecs

  895 08:43:48.176749  USB2 port 5 scanning...

  896 08:43:48.179962  scan_usb_bus for USB2 port 5

  897 08:43:48.182994  scan_usb_bus for USB2 port 5 done

  898 08:43:48.188423  scan_bus: scanning of bus USB2 port 5 took 9063 usecs

  899 08:43:48.190691  USB2 port 6 scanning...

  900 08:43:48.194019  scan_usb_bus for USB2 port 6

  901 08:43:48.197677  scan_usb_bus for USB2 port 6 done

  902 08:43:48.202728  scan_bus: scanning of bus USB2 port 6 took 9063 usecs

  903 08:43:48.205846  USB2 port 7 scanning...

  904 08:43:48.209063  scan_usb_bus for USB2 port 7

  905 08:43:48.212242  scan_usb_bus for USB2 port 7 done

  906 08:43:48.217863  scan_bus: scanning of bus USB2 port 7 took 9063 usecs

  907 08:43:48.219399  USB2 port 8 scanning...

  908 08:43:48.222415  scan_usb_bus for USB2 port 8

  909 08:43:48.226340  scan_usb_bus for USB2 port 8 done

  910 08:43:48.231674  scan_bus: scanning of bus USB2 port 8 took 9064 usecs

  911 08:43:48.233755  USB2 port 9 scanning...

  912 08:43:48.237444  scan_usb_bus for USB2 port 9

  913 08:43:48.240774  scan_usb_bus for USB2 port 9 done

  914 08:43:48.245793  scan_bus: scanning of bus USB2 port 9 took 9065 usecs

  915 08:43:48.248124  USB3 port 0 scanning...

  916 08:43:48.251492  scan_usb_bus for USB3 port 0

  917 08:43:48.255078  scan_usb_bus for USB3 port 0 done

  918 08:43:48.260524  scan_bus: scanning of bus USB3 port 0 took 9062 usecs

  919 08:43:48.263115  USB3 port 1 scanning...

  920 08:43:48.266689  scan_usb_bus for USB3 port 1

  921 08:43:48.269183  scan_usb_bus for USB3 port 1 done

  922 08:43:48.274739  scan_bus: scanning of bus USB3 port 1 took 9062 usecs

  923 08:43:48.277209  USB3 port 2 scanning...

  924 08:43:48.280661  scan_usb_bus for USB3 port 2

  925 08:43:48.283781  scan_usb_bus for USB3 port 2 done

  926 08:43:48.289847  scan_bus: scanning of bus USB3 port 2 took 9062 usecs

  927 08:43:48.291671  USB3 port 3 scanning...

  928 08:43:48.294956  scan_usb_bus for USB3 port 3

  929 08:43:48.298095  scan_usb_bus for USB3 port 3 done

  930 08:43:48.304162  scan_bus: scanning of bus USB3 port 3 took 9062 usecs

  931 08:43:48.306729  USB3 port 4 scanning...

  932 08:43:48.309772  scan_usb_bus for USB3 port 4

  933 08:43:48.313044  scan_usb_bus for USB3 port 4 done

  934 08:43:48.318255  scan_bus: scanning of bus USB3 port 4 took 9062 usecs

  935 08:43:48.321362  scan_usb_bus for USB0 port 0 done

  936 08:43:48.327017  scan_bus: scanning of bus USB0 port 0 took 239356 usecs

  937 08:43:48.331106  scan_usb_bus for PCI: 00:14.0 done

  938 08:43:48.336078  scan_bus: scanning of bus PCI: 00:14.0 took 256291 usecs

  939 08:43:48.338391  PCI: 00:15.0 scanning...

  940 08:43:48.342412  scan_generic_bus for PCI: 00:15.0

  941 08:43:48.346689  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  942 08:43:48.351069  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  943 08:43:48.354642  bus: PCI: 00:15.0[0]->I2C: 01:34 enabled

  944 08:43:48.358714  scan_generic_bus for PCI: 00:15.0 done

  945 08:43:48.363997  scan_bus: scanning of bus PCI: 00:15.0 took 22385 usecs

  946 08:43:48.367075  PCI: 00:15.1 scanning...

  947 08:43:48.370213  scan_generic_bus for PCI: 00:15.1

  948 08:43:48.374196  bus: PCI: 00:15.1[0]->I2C: 02:2c enabled

  949 08:43:48.378312  scan_generic_bus for PCI: 00:15.1 done

  950 08:43:48.383912  scan_bus: scanning of bus PCI: 00:15.1 took 14216 usecs

  951 08:43:48.386239  PCI: 00:19.0 scanning...

  952 08:43:48.390134  scan_generic_bus for PCI: 00:19.0

  953 08:43:48.394685  bus: PCI: 00:19.0[0]->I2C: 03:50 enabled

  954 08:43:48.398089  scan_generic_bus for PCI: 00:19.0 done

  955 08:43:48.403655  scan_bus: scanning of bus PCI: 00:19.0 took 14215 usecs

  956 08:43:48.405785  PCI: 00:1c.0 scanning...

  957 08:43:48.409776  do_pci_scan_bridge for PCI: 00:1c.0

  958 08:43:48.412743  PCI: pci_scan_bus for bus 01

  959 08:43:48.416087  PCI: 01:00.0 [10ec/525a] enabled

  960 08:43:48.419267  Capability: type 0x01 @ 0x80

  961 08:43:48.422335  Capability: type 0x05 @ 0x90

  962 08:43:48.424899  Capability: type 0x10 @ 0xb0

  963 08:43:48.428363  Capability: type 0x10 @ 0x40

  964 08:43:48.432258  Enabling Common Clock Configuration

  965 08:43:48.436029  L1 Sub-State supported from root port 28

  966 08:43:48.438593  L1 Sub-State Support = 0xf

  967 08:43:48.441779  CommonModeRestoreTime = 0x3c

  968 08:43:48.446071  Power On Value = 0x6, Power On Scale = 0x1

  969 08:43:48.448446  ASPM: Enabled L0s and L1

  970 08:43:48.451069  Capability: type 0x01 @ 0x80

  971 08:43:48.454465  Capability: type 0x05 @ 0x90

  972 08:43:48.457241  Capability: type 0x10 @ 0xb0

  973 08:43:48.462825  scan_bus: scanning of bus PCI: 00:1c.0 took 53675 usecs

  974 08:43:48.465829  PCI: 00:1d.0 scanning...

  975 08:43:48.469404  do_pci_scan_bridge for PCI: 00:1d.0

  976 08:43:48.472082  PCI: pci_scan_bus for bus 02

  977 08:43:48.475129  PCI: 02:00.0 [1217/8620] enabled

  978 08:43:48.479306  Capability: type 0x01 @ 0x6c

  979 08:43:48.481643  Capability: type 0x05 @ 0x48

  980 08:43:48.485111  Capability: type 0x10 @ 0x80

  981 08:43:48.487129  Capability: type 0x10 @ 0x40

  982 08:43:48.491774  L1 Sub-State supported from root port 29

  983 08:43:48.494700  L1 Sub-State Support = 0xf

  984 08:43:48.496974  CommonModeRestoreTime = 0x78

  985 08:43:48.501491  Power On Value = 0x16, Power On Scale = 0x0

  986 08:43:48.503070  ASPM: Enabled L1

  987 08:43:48.507536  Capability: type 0x01 @ 0x6c

  988 08:43:48.512164  Capability: type 0x05 @ 0x48

  989 08:43:48.517630  Capability: type 0x10 @ 0x80

  990 08:43:48.524108  scan_bus: scanning of bus PCI: 00:1d.0 took 56025 usecs

  991 08:43:48.527112  PCI: 00:1f.0 scanning...

  992 08:43:48.530151  scan_lpc_bus for PCI: 00:1f.0

  993 08:43:48.532576  PNP: 0c09.0 enabled

  994 08:43:48.535923  scan_lpc_bus for PCI: 00:1f.0 done

  995 08:43:48.540940  scan_bus: scanning of bus PCI: 00:1f.0 took 11396 usecs

  996 08:43:48.543475  PCI: 00:1f.3 scanning...

  997 08:43:48.549853  scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs

  998 08:43:48.552296  PCI: 00:1f.4 scanning...

  999 08:43:48.556074  scan_generic_bus for PCI: 00:1f.4

 1000 08:43:48.559781  scan_generic_bus for PCI: 00:1f.4 done

 1001 08:43:48.565271  scan_bus: scanning of bus PCI: 00:1f.4 took 10130 usecs

 1002 08:43:48.568130  PCI: 00:1f.5 scanning...

 1003 08:43:48.571504  scan_generic_bus for PCI: 00:1f.5

 1004 08:43:48.575367  scan_generic_bus for PCI: 00:1f.5 done

 1005 08:43:48.580572  scan_bus: scanning of bus PCI: 00:1f.5 took 10131 usecs

 1006 08:43:48.586944  scan_bus: scanning of bus DOMAIN: 0000 took 706859 usecs

 1007 08:43:48.590475  root_dev_scan_bus for Root Device done

 1008 08:43:48.596034  scan_bus: scanning of bus Root Device took 726999 usecs

 1009 08:43:48.597734  done

 1010 08:43:48.603032  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

 1011 08:43:48.609016  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1012 08:43:48.616469  SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000

 1013 08:43:48.623631  FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)

 1014 08:43:48.627029  SPI flash protection: WPSW=1 SRP0=1

 1015 08:43:48.634263  fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff

 1016 08:43:48.639500  MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.

 1017 08:43:48.645929  BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148777 exit 42606

 1018 08:43:48.648697  found VGA at PCI: 00:02.0

 1019 08:43:48.652063  Setting up VGA for PCI: 00:02.0

 1020 08:43:48.657163  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1021 08:43:48.662070  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1022 08:43:48.664236  Allocating resources...

 1023 08:43:48.666174  Reading resources...

 1024 08:43:48.670374  Root Device read_resources bus 0 link: 0

 1025 08:43:48.674976  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1026 08:43:48.680443  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1027 08:43:48.684952  DOMAIN: 0000 read_resources bus 0 link: 0

 1028 08:43:48.690703  PCI: 00:14.0 read_resources bus 0 link: 0

 1029 08:43:48.695023  USB0 port 0 read_resources bus 0 link: 0

 1030 08:43:48.704718  USB0 port 0 read_resources bus 0 link: 0 done

 1031 08:43:48.709744  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1032 08:43:48.715197  PCI: 00:15.0 read_resources bus 1 link: 0

 1033 08:43:48.720861  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1034 08:43:48.725288  PCI: 00:15.1 read_resources bus 2 link: 0

 1035 08:43:48.730742  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1036 08:43:48.735680  PCI: 00:19.0 read_resources bus 3 link: 0

 1037 08:43:48.741807  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1038 08:43:48.745847  PCI: 00:1c.0 read_resources bus 1 link: 0

 1039 08:43:48.751628  PCI: 00:1c.0 read_resources bus 1 link: 0 done

 1040 08:43:48.756430  PCI: 00:1d.0 read_resources bus 2 link: 0

 1041 08:43:48.763211  PCI: 00:1d.0 read_resources bus 2 link: 0 done

 1042 08:43:48.767491  PCI: 00:1f.0 read_resources bus 0 link: 0

 1043 08:43:48.772867  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1044 08:43:48.779199  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1045 08:43:48.784918  Root Device read_resources bus 0 link: 0 done

 1046 08:43:48.786798  Done reading resources.

 1047 08:43:48.792639  Show resources in subtree (Root Device)...After reading.

 1048 08:43:48.796693   Root Device child on link 0 CPU_CLUSTER: 0

 1049 08:43:48.800593    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1050 08:43:48.802126     APIC: 00

 1051 08:43:48.803806     APIC: 02

 1052 08:43:48.804995     APIC: 01

 1053 08:43:48.806250     APIC: 03

 1054 08:43:48.807014     APIC: 04

 1055 08:43:48.808526     APIC: 05

 1056 08:43:48.809729     APIC: 06

 1057 08:43:48.810767     APIC: 07

 1058 08:43:48.815340    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1059 08:43:48.824537    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1060 08:43:48.834334    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1061 08:43:48.835715     PCI: 00:00.0

 1062 08:43:48.846157     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1063 08:43:48.855429     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1064 08:43:48.863891     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1065 08:43:48.873374     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1066 08:43:48.882991     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1067 08:43:48.892684     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1068 08:43:48.901641     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1069 08:43:48.910706     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

 1070 08:43:48.920140     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

 1071 08:43:48.929516     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

 1072 08:43:48.938962     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

 1073 08:43:48.948815     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c

 1074 08:43:48.958506     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

 1075 08:43:48.967504     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1076 08:43:48.968800     PCI: 00:02.0

 1077 08:43:48.978999     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1078 08:43:48.989708     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1079 08:43:48.998092     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1080 08:43:48.999174     PCI: 00:04.0

 1081 08:43:49.009404     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1082 08:43:49.010904     PCI: 00:08.0

 1083 08:43:49.020847     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1084 08:43:49.022399     PCI: 00:12.0

 1085 08:43:49.032794     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1086 08:43:49.036884     PCI: 00:14.0 child on link 0 USB0 port 0

 1087 08:43:49.046762     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1088 08:43:49.051844      USB0 port 0 child on link 0 USB2 port 0

 1089 08:43:49.053561       USB2 port 0

 1090 08:43:49.054756       USB2 port 1

 1091 08:43:49.056320       USB2 port 2

 1092 08:43:49.058677       USB2 port 4

 1093 08:43:49.060043       USB2 port 5

 1094 08:43:49.062053       USB2 port 6

 1095 08:43:49.063770       USB2 port 7

 1096 08:43:49.065749       USB2 port 8

 1097 08:43:49.067121       USB2 port 9

 1098 08:43:49.068709       USB3 port 0

 1099 08:43:49.070860       USB3 port 1

 1100 08:43:49.072537       USB3 port 2

 1101 08:43:49.074022       USB3 port 3

 1102 08:43:49.076407       USB3 port 4

 1103 08:43:49.077260     PCI: 00:14.2

 1104 08:43:49.087289     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1105 08:43:49.097370     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1106 08:43:49.099589     PCI: 00:14.3

 1107 08:43:49.109239     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1108 08:43:49.113092     PCI: 00:15.0 child on link 0 I2C: 01:10

 1109 08:43:49.123128     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1110 08:43:49.124590      I2C: 01:10

 1111 08:43:49.126515      I2C: 01:10

 1112 08:43:49.127608      I2C: 01:34

 1113 08:43:49.132534     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1114 08:43:49.141984     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1115 08:43:49.144094      I2C: 02:2c

 1116 08:43:49.145203     PCI: 00:16.0

 1117 08:43:49.154827     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1118 08:43:49.157414     PCI: 00:17.0

 1119 08:43:49.166506     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1120 08:43:49.175003     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1121 08:43:49.183177     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1122 08:43:49.191060     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1123 08:43:49.199681     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1124 08:43:49.209246     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1125 08:43:49.213401     PCI: 00:19.0 child on link 0 I2C: 03:50

 1126 08:43:49.222907     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1127 08:43:49.232620     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1128 08:43:49.234565      I2C: 03:50

 1129 08:43:49.236261     PCI: 00:19.2

 1130 08:43:49.247004     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1131 08:43:49.256720     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1132 08:43:49.261687     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1133 08:43:49.270021     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1134 08:43:49.279683     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1135 08:43:49.288889     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1136 08:43:49.291319      PCI: 01:00.0

 1137 08:43:49.300666      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14

 1138 08:43:49.304900     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1139 08:43:49.313269     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1140 08:43:49.322692     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1141 08:43:49.331893     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1142 08:43:49.334100      PCI: 02:00.0

 1143 08:43:49.343393      PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1144 08:43:49.352674      PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14

 1145 08:43:49.356835     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1146 08:43:49.365069     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1147 08:43:49.374762     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1148 08:43:49.376274      PNP: 0c09.0

 1149 08:43:49.384726      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1150 08:43:49.392466      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1151 08:43:49.401075      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1152 08:43:49.403279     PCI: 00:1f.3

 1153 08:43:49.413219     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1154 08:43:49.423404     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1155 08:43:49.425020     PCI: 00:1f.4

 1156 08:43:49.433798     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1157 08:43:49.443931     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1158 08:43:49.445574     PCI: 00:1f.5

 1159 08:43:49.454155     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1160 08:43:49.455886     PCI: 00:1f.6

 1161 08:43:49.465087     PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10

 1162 08:43:49.471832  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1163 08:43:49.477716  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1164 08:43:49.484412  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1165 08:43:49.491349  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1166 08:43:49.498334  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1167 08:43:49.501889  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1168 08:43:49.504728  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1169 08:43:49.508664  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1170 08:43:49.512797  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1171 08:43:49.519711  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1172 08:43:49.525919  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1173 08:43:49.533686  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1174 08:43:49.542485  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1175 08:43:49.549020  PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1176 08:43:49.552211  PCI: 01:00.0 14 *  [0x0 - 0xfff] mem

 1177 08:43:49.560390  PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1178 08:43:49.568713  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1179 08:43:49.577854  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1180 08:43:49.583741  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1181 08:43:49.587841  PCI: 02:00.0 10 *  [0x0 - 0xfff] mem

 1182 08:43:49.591629  PCI: 02:00.0 14 *  [0x1000 - 0x17ff] mem

 1183 08:43:49.599986  PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1184 08:43:49.604192  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1185 08:43:49.609420  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1186 08:43:49.613838  PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem

 1187 08:43:49.618451  PCI: 00:1d.0 20 *  [0x11100000 - 0x111fffff] mem

 1188 08:43:49.623514  PCI: 00:1f.3 20 *  [0x11200000 - 0x112fffff] mem

 1189 08:43:49.628846  PCI: 00:1f.6 10 *  [0x11300000 - 0x1131ffff] mem

 1190 08:43:49.633425  PCI: 00:14.0 10 *  [0x11320000 - 0x1132ffff] mem

 1191 08:43:49.638507  PCI: 00:04.0 10 *  [0x11330000 - 0x11337fff] mem

 1192 08:43:49.643034  PCI: 00:14.3 10 *  [0x11338000 - 0x1133bfff] mem

 1193 08:43:49.648173  PCI: 00:1f.3 10 *  [0x1133c000 - 0x1133ffff] mem

 1194 08:43:49.653057  PCI: 00:14.2 10 *  [0x11340000 - 0x11341fff] mem

 1195 08:43:49.657795  PCI: 00:17.0 10 *  [0x11342000 - 0x11343fff] mem

 1196 08:43:49.662666  PCI: 00:08.0 10 *  [0x11344000 - 0x11344fff] mem

 1197 08:43:49.667236  PCI: 00:12.0 10 *  [0x11345000 - 0x11345fff] mem

 1198 08:43:49.672280  PCI: 00:14.2 18 *  [0x11346000 - 0x11346fff] mem

 1199 08:43:49.677717  PCI: 00:15.0 10 *  [0x11347000 - 0x11347fff] mem

 1200 08:43:49.682726  PCI: 00:15.1 10 *  [0x11348000 - 0x11348fff] mem

 1201 08:43:49.686647  PCI: 00:16.0 10 *  [0x11349000 - 0x11349fff] mem

 1202 08:43:49.691626  PCI: 00:19.0 10 *  [0x1134a000 - 0x1134afff] mem

 1203 08:43:49.696980  PCI: 00:19.0 18 *  [0x1134b000 - 0x1134bfff] mem

 1204 08:43:49.701460  PCI: 00:19.2 18 *  [0x1134c000 - 0x1134cfff] mem

 1205 08:43:49.706440  PCI: 00:1f.5 10 *  [0x1134d000 - 0x1134dfff] mem

 1206 08:43:49.711040  PCI: 00:17.0 24 *  [0x1134e000 - 0x1134e7ff] mem

 1207 08:43:49.716343  PCI: 00:17.0 14 *  [0x1134f000 - 0x1134f0ff] mem

 1208 08:43:49.721069  PCI: 00:1f.4 10 *  [0x11350000 - 0x113500ff] mem

 1209 08:43:49.729868  DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done

 1210 08:43:49.733246  avoid_fixed_resources: DOMAIN: 0000

 1211 08:43:49.738841  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1212 08:43:49.745386  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1213 08:43:49.752485  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1214 08:43:49.760477  constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)

 1215 08:43:49.767431  constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)

 1216 08:43:49.775504  constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)

 1217 08:43:49.782923  constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)

 1218 08:43:49.791508  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1219 08:43:49.798252  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1220 08:43:49.806412  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1221 08:43:49.812982  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1222 08:43:49.820391  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1223 08:43:49.822958  Setting resources...

 1224 08:43:49.828806  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1225 08:43:49.833479  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1226 08:43:49.837230  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1227 08:43:49.840739  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1228 08:43:49.845261  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1229 08:43:49.850886  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1230 08:43:49.857837  PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1231 08:43:49.864255  PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1232 08:43:49.870110  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1233 08:43:49.876198  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1234 08:43:49.884363  DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff

 1235 08:43:49.889449  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1236 08:43:49.894212  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1237 08:43:49.899056  PCI: 00:1c.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1238 08:43:49.903483  PCI: 00:1d.0 20 *  [0xd1100000 - 0xd11fffff] mem

 1239 08:43:49.908486  PCI: 00:1f.3 20 *  [0xd1200000 - 0xd12fffff] mem

 1240 08:43:49.913589  PCI: 00:1f.6 10 *  [0xd1300000 - 0xd131ffff] mem

 1241 08:43:49.918518  PCI: 00:14.0 10 *  [0xd1320000 - 0xd132ffff] mem

 1242 08:43:49.922745  PCI: 00:04.0 10 *  [0xd1330000 - 0xd1337fff] mem

 1243 08:43:49.928133  PCI: 00:14.3 10 *  [0xd1338000 - 0xd133bfff] mem

 1244 08:43:49.932804  PCI: 00:1f.3 10 *  [0xd133c000 - 0xd133ffff] mem

 1245 08:43:49.937946  PCI: 00:14.2 10 *  [0xd1340000 - 0xd1341fff] mem

 1246 08:43:49.942923  PCI: 00:17.0 10 *  [0xd1342000 - 0xd1343fff] mem

 1247 08:43:49.947454  PCI: 00:08.0 10 *  [0xd1344000 - 0xd1344fff] mem

 1248 08:43:49.952334  PCI: 00:12.0 10 *  [0xd1345000 - 0xd1345fff] mem

 1249 08:43:49.957494  PCI: 00:14.2 18 *  [0xd1346000 - 0xd1346fff] mem

 1250 08:43:49.962355  PCI: 00:15.0 10 *  [0xd1347000 - 0xd1347fff] mem

 1251 08:43:49.967598  PCI: 00:15.1 10 *  [0xd1348000 - 0xd1348fff] mem

 1252 08:43:49.972315  PCI: 00:16.0 10 *  [0xd1349000 - 0xd1349fff] mem

 1253 08:43:49.977000  PCI: 00:19.0 10 *  [0xd134a000 - 0xd134afff] mem

 1254 08:43:49.981537  PCI: 00:19.0 18 *  [0xd134b000 - 0xd134bfff] mem

 1255 08:43:49.986665  PCI: 00:19.2 18 *  [0xd134c000 - 0xd134cfff] mem

 1256 08:43:49.991596  PCI: 00:1f.5 10 *  [0xd134d000 - 0xd134dfff] mem

 1257 08:43:49.996076  PCI: 00:17.0 24 *  [0xd134e000 - 0xd134e7ff] mem

 1258 08:43:50.000994  PCI: 00:17.0 14 *  [0xd134f000 - 0xd134f0ff] mem

 1259 08:43:50.005831  PCI: 00:1f.4 10 *  [0xd1350000 - 0xd13500ff] mem

 1260 08:43:50.013468  DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done

 1261 08:43:50.020597  PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1262 08:43:50.028105  PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1263 08:43:50.035572  PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1264 08:43:50.040352  PCI: 01:00.0 14 *  [0xd1000000 - 0xd1000fff] mem

 1265 08:43:50.047976  PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done

 1266 08:43:50.055835  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1267 08:43:50.062143  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1268 08:43:50.070130  PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff

 1269 08:43:50.074896  PCI: 02:00.0 10 *  [0xd1100000 - 0xd1100fff] mem

 1270 08:43:50.079394  PCI: 02:00.0 14 *  [0xd1101000 - 0xd11017ff] mem

 1271 08:43:50.086925  PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done

 1272 08:43:50.091012  Root Device assign_resources, bus 0 link: 0

 1273 08:43:50.095768  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1274 08:43:50.104928  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1275 08:43:50.112938  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1276 08:43:50.121278  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1277 08:43:50.128745  PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64

 1278 08:43:50.137388  PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64

 1279 08:43:50.146096  PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64

 1280 08:43:50.154223  PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64

 1281 08:43:50.158556  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1282 08:43:50.162932  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1283 08:43:50.171439  PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64

 1284 08:43:50.179560  PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64

 1285 08:43:50.187627  PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64

 1286 08:43:50.196165  PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64

 1287 08:43:50.200611  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1288 08:43:50.205428  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1289 08:43:50.213859  PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64

 1290 08:43:50.217742  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1291 08:43:50.222822  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1292 08:43:50.231500  PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64

 1293 08:43:50.239736  PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem

 1294 08:43:50.246764  PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem

 1295 08:43:50.254798  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1296 08:43:50.262095  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1297 08:43:50.269589  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1298 08:43:50.277460  PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem

 1299 08:43:50.286067  PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64

 1300 08:43:50.294204  PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64

 1301 08:43:50.298220  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1302 08:43:50.303062  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1303 08:43:50.312147  PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64

 1304 08:43:50.320701  PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1305 08:43:50.328916  PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1306 08:43:50.337440  PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1307 08:43:50.342592  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1308 08:43:50.350142  PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem

 1309 08:43:50.354887  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1310 08:43:50.363736  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io

 1311 08:43:50.372182  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem

 1312 08:43:50.381355  PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem

 1313 08:43:50.384998  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1314 08:43:50.395019  PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem

 1315 08:43:50.404841  PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem

 1316 08:43:50.410706  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1317 08:43:50.415916  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1318 08:43:50.420758  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1319 08:43:50.425223  LPC: Trying to open IO window from 930 size 8

 1320 08:43:50.429904  LPC: Trying to open IO window from 940 size 8

 1321 08:43:50.434909  LPC: Trying to open IO window from 950 size 10

 1322 08:43:50.442859  PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64

 1323 08:43:50.450915  PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64

 1324 08:43:50.459849  PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64

 1325 08:43:50.467441  PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem

 1326 08:43:50.475360  PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem

 1327 08:43:50.480320  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1328 08:43:50.485077  Root Device assign_resources, bus 0 link: 0

 1329 08:43:50.487454  Done setting resources.

 1330 08:43:50.493611  Show resources in subtree (Root Device)...After assigning values.

 1331 08:43:50.497991   Root Device child on link 0 CPU_CLUSTER: 0

 1332 08:43:50.502856    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1333 08:43:50.503677     APIC: 00

 1334 08:43:50.504728     APIC: 02

 1335 08:43:50.506639     APIC: 01

 1336 08:43:50.507851     APIC: 03

 1337 08:43:50.509095     APIC: 04

 1338 08:43:50.510252     APIC: 05

 1339 08:43:50.511480     APIC: 06

 1340 08:43:50.512220     APIC: 07

 1341 08:43:50.517012    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1342 08:43:50.526958    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1343 08:43:50.537681    DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1344 08:43:50.539297     PCI: 00:00.0

 1345 08:43:50.549099     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1346 08:43:50.558132     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1347 08:43:50.567788     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1348 08:43:50.576654     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1349 08:43:50.586440     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1350 08:43:50.595471     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1351 08:43:50.605434     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1352 08:43:50.614304     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

 1353 08:43:50.623262     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

 1354 08:43:50.633016     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

 1355 08:43:50.642457     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

 1356 08:43:50.652560     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c

 1357 08:43:50.661841     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

 1358 08:43:50.670468     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1359 08:43:50.672521     PCI: 00:02.0

 1360 08:43:50.683232     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1361 08:43:50.693865     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1362 08:43:50.702666     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1363 08:43:50.704075     PCI: 00:04.0

 1364 08:43:50.715162     PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10

 1365 08:43:50.716434     PCI: 00:08.0

 1366 08:43:50.726920     PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10

 1367 08:43:50.728257     PCI: 00:12.0

 1368 08:43:50.738768     PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10

 1369 08:43:50.742653     PCI: 00:14.0 child on link 0 USB0 port 0

 1370 08:43:50.753496     PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10

 1371 08:43:50.757562      USB0 port 0 child on link 0 USB2 port 0

 1372 08:43:50.759718       USB2 port 0

 1373 08:43:50.761420       USB2 port 1

 1374 08:43:50.763440       USB2 port 2

 1375 08:43:50.764731       USB2 port 4

 1376 08:43:50.766358       USB2 port 5

 1377 08:43:50.768640       USB2 port 6

 1378 08:43:50.770589       USB2 port 7

 1379 08:43:50.772468       USB2 port 8

 1380 08:43:50.773919       USB2 port 9

 1381 08:43:50.775263       USB3 port 0

 1382 08:43:50.776712       USB3 port 1

 1383 08:43:50.778363       USB3 port 2

 1384 08:43:50.780753       USB3 port 3

 1385 08:43:50.781943       USB3 port 4

 1386 08:43:50.783638     PCI: 00:14.2

 1387 08:43:50.794238     PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10

 1388 08:43:50.804735     PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18

 1389 08:43:50.806448     PCI: 00:14.3

 1390 08:43:50.816915     PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10

 1391 08:43:50.820944     PCI: 00:15.0 child on link 0 I2C: 01:10

 1392 08:43:50.831093     PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10

 1393 08:43:50.832529      I2C: 01:10

 1394 08:43:50.834278      I2C: 01:10

 1395 08:43:50.836170      I2C: 01:34

 1396 08:43:50.839956     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1397 08:43:50.850810     PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10

 1398 08:43:50.851650      I2C: 02:2c

 1399 08:43:50.853853     PCI: 00:16.0

 1400 08:43:50.863593     PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10

 1401 08:43:50.865806     PCI: 00:17.0

 1402 08:43:50.875522     PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10

 1403 08:43:50.886559     PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14

 1404 08:43:50.895008     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1405 08:43:50.904045     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1406 08:43:50.913487     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1407 08:43:50.923485     PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24

 1408 08:43:50.927492     PCI: 00:19.0 child on link 0 I2C: 03:50

 1409 08:43:50.937508     PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10

 1410 08:43:50.947894     PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18

 1411 08:43:50.949739      I2C: 03:50

 1412 08:43:50.951601     PCI: 00:19.2

 1413 08:43:50.962589     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1414 08:43:50.972831     PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18

 1415 08:43:50.977678     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1416 08:43:50.986616     PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1417 08:43:50.996416     PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1418 08:43:51.007075     PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1419 08:43:51.009464      PCI: 01:00.0

 1420 08:43:51.019604      PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14

 1421 08:43:51.023967     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1422 08:43:51.033369     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1423 08:43:51.042908     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1424 08:43:51.053322     PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20

 1425 08:43:51.054742      PCI: 02:00.0

 1426 08:43:51.065185      PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10

 1427 08:43:51.076236      PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14

 1428 08:43:51.079825     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1429 08:43:51.088776     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1430 08:43:51.097989     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1431 08:43:51.099953      PNP: 0c09.0

 1432 08:43:51.108017      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1433 08:43:51.116227      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1434 08:43:51.125168      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1435 08:43:51.126735     PCI: 00:1f.3

 1436 08:43:51.136973     PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10

 1437 08:43:51.148163     PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20

 1438 08:43:51.149545     PCI: 00:1f.4

 1439 08:43:51.158963     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1440 08:43:51.168325     PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10

 1441 08:43:51.170341     PCI: 00:1f.5

 1442 08:43:51.180454     PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10

 1443 08:43:51.182344     PCI: 00:1f.6

 1444 08:43:51.192522     PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10

 1445 08:43:51.195412  Done allocating resources.

 1446 08:43:51.200765  BS: BS_DEV_RESOURCES times (us): entry 0 run 2549359 exit 36

 1447 08:43:51.203948  Enabling resources...

 1448 08:43:51.208534  PCI: 00:00.0 subsystem <- 1028/3e34

 1449 08:43:51.211438  PCI: 00:00.0 cmd <- 06

 1450 08:43:51.214469  PCI: 00:02.0 subsystem <- 1028/3ea0

 1451 08:43:51.217163  PCI: 00:02.0 cmd <- 03

 1452 08:43:51.221079  PCI: 00:04.0 subsystem <- 1028/1903

 1453 08:43:51.224080  PCI: 00:04.0 cmd <- 02

 1454 08:43:51.226221  PCI: 00:08.0 cmd <- 06

 1455 08:43:51.230450  PCI: 00:12.0 subsystem <- 1028/9df9

 1456 08:43:51.232350  PCI: 00:12.0 cmd <- 02

 1457 08:43:51.236672  PCI: 00:14.0 subsystem <- 1028/9ded

 1458 08:43:51.238555  PCI: 00:14.0 cmd <- 02

 1459 08:43:51.240925  PCI: 00:14.2 cmd <- 02

 1460 08:43:51.245045  PCI: 00:14.3 subsystem <- 1028/9df0

 1461 08:43:51.247315  PCI: 00:14.3 cmd <- 02

 1462 08:43:51.251166  PCI: 00:15.0 subsystem <- 1028/9de8

 1463 08:43:51.253706  PCI: 00:15.0 cmd <- 02

 1464 08:43:51.257907  PCI: 00:15.1 subsystem <- 1028/9de9

 1465 08:43:51.260034  PCI: 00:15.1 cmd <- 02

 1466 08:43:51.263965  PCI: 00:16.0 subsystem <- 1028/9de0

 1467 08:43:51.266125  PCI: 00:16.0 cmd <- 02

 1468 08:43:51.270227  PCI: 00:17.0 subsystem <- 1028/9dd3

 1469 08:43:51.272689  PCI: 00:17.0 cmd <- 03

 1470 08:43:51.276651  PCI: 00:19.0 subsystem <- 1028/9dc5

 1471 08:43:51.278454  PCI: 00:19.0 cmd <- 06

 1472 08:43:51.282800  PCI: 00:19.2 subsystem <- 1028/9dc7

 1473 08:43:51.284531  PCI: 00:19.2 cmd <- 06

 1474 08:43:51.288636  PCI: 00:1c.0 bridge ctrl <- 0003

 1475 08:43:51.292720  PCI: 00:1c.0 subsystem <- 1028/9dbf

 1476 08:43:51.294869  Capability: type 0x10 @ 0x40

 1477 08:43:51.298279  Capability: type 0x05 @ 0x80

 1478 08:43:51.301051  Capability: type 0x0d @ 0x90

 1479 08:43:51.302843  PCI: 00:1c.0 cmd <- 06

 1480 08:43:51.307030  PCI: 00:1d.0 bridge ctrl <- 0003

 1481 08:43:51.311028  PCI: 00:1d.0 subsystem <- 1028/9db4

 1482 08:43:51.312873  Capability: type 0x10 @ 0x40

 1483 08:43:51.316340  Capability: type 0x05 @ 0x80

 1484 08:43:51.319320  Capability: type 0x0d @ 0x90

 1485 08:43:51.321181  PCI: 00:1d.0 cmd <- 06

 1486 08:43:51.325805  PCI: 00:1f.0 subsystem <- 1028/9d84

 1487 08:43:51.327890  PCI: 00:1f.0 cmd <- 407

 1488 08:43:51.332135  PCI: 00:1f.3 subsystem <- 1028/9dc8

 1489 08:43:51.334699  PCI: 00:1f.3 cmd <- 02

 1490 08:43:51.338332  PCI: 00:1f.4 subsystem <- 1028/9da3

 1491 08:43:51.340973  PCI: 00:1f.4 cmd <- 03

 1492 08:43:51.344039  PCI: 00:1f.5 subsystem <- 1028/9da4

 1493 08:43:51.346862  PCI: 00:1f.5 cmd <- 406

 1494 08:43:51.350472  PCI: 00:1f.6 subsystem <- 1028/15be

 1495 08:43:51.353139  PCI: 00:1f.6 cmd <- 02

 1496 08:43:51.363214  PCI: 01:00.0 cmd <- 02

 1497 08:43:51.368563  PCI: 02:00.0 cmd <- 06

 1498 08:43:51.372367  done.

 1499 08:43:51.378151  BS: BS_DEV_ENABLE times (us): entry 399 run 170460 exit 0

 1500 08:43:51.380773  Initializing devices...

 1501 08:43:51.382788  Root Device init ...

 1502 08:43:51.387007  Root Device init finished in 2140 usecs

 1503 08:43:51.388957  CPU_CLUSTER: 0 init ...

 1504 08:43:51.394009  CPU_CLUSTER: 0 init finished in 2430 usecs

 1505 08:43:51.400059  PCI: 00:00.0 init ...

 1506 08:43:51.402583  CPU TDP: 15 Watts

 1507 08:43:51.404903  CPU PL2 = 51 Watts

 1508 08:43:51.408801  PCI: 00:00.0 init finished in 7036 usecs

 1509 08:43:51.411591  PCI: 00:02.0 init ...

 1510 08:43:51.415963  PCI: 00:02.0 init finished in 2237 usecs

 1511 08:43:51.418063  PCI: 00:04.0 init ...

 1512 08:43:51.421957  PCI: 00:04.0 init finished in 2234 usecs

 1513 08:43:51.425025  PCI: 00:08.0 init ...

 1514 08:43:51.428898  PCI: 00:08.0 init finished in 2235 usecs

 1515 08:43:51.431358  PCI: 00:12.0 init ...

 1516 08:43:51.435696  PCI: 00:12.0 init finished in 2235 usecs

 1517 08:43:51.438830  PCI: 00:14.0 init ...

 1518 08:43:51.442500  PCI: 00:14.0 init finished in 2235 usecs

 1519 08:43:51.445797  PCI: 00:14.2 init ...

 1520 08:43:51.449074  PCI: 00:14.2 init finished in 2235 usecs

 1521 08:43:51.452111  PCI: 00:14.3 init ...

 1522 08:43:51.456230  PCI: 00:14.3 init finished in 2241 usecs

 1523 08:43:51.458761  PCI: 00:15.0 init ...

 1524 08:43:51.462535  DW I2C bus 0 at 0xd1347000 (400 KHz)

 1525 08:43:51.466302  PCI: 00:15.0 init finished in 5934 usecs

 1526 08:43:51.469401  PCI: 00:15.1 init ...

 1527 08:43:51.472538  DW I2C bus 1 at 0xd1348000 (400 KHz)

 1528 08:43:51.477031  PCI: 00:15.1 init finished in 5923 usecs

 1529 08:43:51.479104  PCI: 00:16.0 init ...

 1530 08:43:51.482990  PCI: 00:16.0 init finished in 2235 usecs

 1531 08:43:51.486240  PCI: 00:19.0 init ...

 1532 08:43:51.490718  DW I2C bus 4 at 0xd134a000 (400 KHz)

 1533 08:43:51.494453  PCI: 00:19.0 init finished in 5933 usecs

 1534 08:43:51.497654  PCI: 00:1c.0 init ...

 1535 08:43:51.500159  Initializing PCH PCIe bridge.

 1536 08:43:51.504698  PCI: 00:1c.0 init finished in 5249 usecs

 1537 08:43:51.506818  PCI: 00:1d.0 init ...

 1538 08:43:51.510637  Initializing PCH PCIe bridge.

 1539 08:43:51.513913  PCI: 00:1d.0 init finished in 5248 usecs

 1540 08:43:51.517270  PCI: 00:1f.0 init ...

 1541 08:43:51.521178  IOAPIC: Initializing IOAPIC at 0xfec00000

 1542 08:43:51.525966  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1543 08:43:51.527877  IOAPIC: ID = 0x02

 1544 08:43:51.530531  IOAPIC: Dumping registers

 1545 08:43:51.533097    reg 0x0000: 0x02000000

 1546 08:43:51.535481    reg 0x0001: 0x00770020

 1547 08:43:51.537426    reg 0x0002: 0x00000000

 1548 08:43:51.543655  PCI: 00:1f.0 init finished in 25027 usecs

 1549 08:43:51.546850  PCI: 00:1f.3 init ...

 1550 08:43:51.551406  HDA: codec_mask = 05

 1551 08:43:51.554435  HDA: Initializing codec #2

 1552 08:43:51.557583  HDA: codec viddid: 8086280b

 1553 08:43:51.560604  HDA: No verb table entry found

 1554 08:43:51.562969  HDA: Initializing codec #0

 1555 08:43:51.566081  HDA: codec viddid: 10ec0236

 1556 08:43:51.572783  HDA: verb loaded.

 1557 08:43:51.576848  PCI: 00:1f.3 init finished in 28834 usecs

 1558 08:43:51.579944  PCI: 00:1f.4 init ...

 1559 08:43:51.584459  PCI: 00:1f.4 init finished in 2244 usecs

 1560 08:43:51.587004  PCI: 00:1f.6 init ...

 1561 08:43:51.591494  PCI: 00:1f.6 init finished in 2235 usecs

 1562 08:43:51.602181  PCI: 01:00.0 init ...

 1563 08:43:51.606479  PCI: 01:00.0 init finished in 2235 usecs

 1564 08:43:51.609002  PCI: 02:00.0 init ...

 1565 08:43:51.612856  PCI: 02:00.0 init finished in 2235 usecs

 1566 08:43:51.615473  PNP: 0c09.0 init ...

 1567 08:43:51.619872  EC Label      : 00.00.20

 1568 08:43:51.623675  EC Revision   : 9ca674bba

 1569 08:43:51.626737  EC Model Num  : 08B9

 1570 08:43:51.630178  EC Build Date : 05/10/19

 1571 08:43:51.638588  PNP: 0c09.0 init finished in 21771 usecs

 1572 08:43:51.641497  Devices initialized

 1573 08:43:51.644354  Show all devs... After init.

 1574 08:43:51.646332  Root Device: enabled 1

 1575 08:43:51.648977  CPU_CLUSTER: 0: enabled 1

 1576 08:43:51.651307  DOMAIN: 0000: enabled 1

 1577 08:43:51.653924  APIC: 00: enabled 1

 1578 08:43:51.656061  PCI: 00:00.0: enabled 1

 1579 08:43:51.659127  PCI: 00:02.0: enabled 1

 1580 08:43:51.661020  PCI: 00:04.0: enabled 1

 1581 08:43:51.663600  PCI: 00:12.0: enabled 1

 1582 08:43:51.665830  PCI: 00:12.5: enabled 0

 1583 08:43:51.668063  PCI: 00:12.6: enabled 0

 1584 08:43:51.671035  PCI: 00:13.0: enabled 0

 1585 08:43:51.672884  PCI: 00:14.0: enabled 1

 1586 08:43:51.675338  PCI: 00:14.1: enabled 0

 1587 08:43:51.678225  PCI: 00:14.3: enabled 1

 1588 08:43:51.680372  PCI: 00:14.5: enabled 0

 1589 08:43:51.683428  PCI: 00:15.0: enabled 1

 1590 08:43:51.685291  PCI: 00:15.1: enabled 1

 1591 08:43:51.687557  PCI: 00:15.2: enabled 0

 1592 08:43:51.690399  PCI: 00:15.3: enabled 0

 1593 08:43:51.693203  PCI: 00:16.0: enabled 1

 1594 08:43:51.695385  PCI: 00:16.1: enabled 0

 1595 08:43:51.697268  PCI: 00:16.2: enabled 0

 1596 08:43:51.700280  PCI: 00:16.3: enabled 0

 1597 08:43:51.701845  PCI: 00:16.4: enabled 0

 1598 08:43:51.704849  PCI: 00:16.5: enabled 0

 1599 08:43:51.707221  PCI: 00:17.0: enabled 1

 1600 08:43:51.709756  PCI: 00:19.0: enabled 1

 1601 08:43:51.712139  PCI: 00:19.1: enabled 0

 1602 08:43:51.714754  PCI: 00:19.2: enabled 1

 1603 08:43:51.716992  PCI: 00:1a.0: enabled 0

 1604 08:43:51.718961  PCI: 00:1c.0: enabled 1

 1605 08:43:51.722092  PCI: 00:1c.1: enabled 0

 1606 08:43:51.724306  PCI: 00:1c.2: enabled 0

 1607 08:43:51.726655  PCI: 00:1c.3: enabled 0

 1608 08:43:51.728796  PCI: 00:1c.4: enabled 0

 1609 08:43:51.731731  PCI: 00:1c.5: enabled 0

 1610 08:43:51.734312  PCI: 00:1c.6: enabled 0

 1611 08:43:51.735972  PCI: 00:1c.7: enabled 0

 1612 08:43:51.738817  PCI: 00:1d.0: enabled 1

 1613 08:43:51.741156  PCI: 00:1d.1: enabled 0

 1614 08:43:51.743589  PCI: 00:1d.2: enabled 0

 1615 08:43:51.746089  PCI: 00:1d.3: enabled 0

 1616 08:43:51.748330  PCI: 00:1d.4: enabled 0

 1617 08:43:51.750904  PCI: 00:1e.0: enabled 0

 1618 08:43:51.753659  PCI: 00:1e.1: enabled 0

 1619 08:43:51.755564  PCI: 00:1e.2: enabled 0

 1620 08:43:51.757880  PCI: 00:1e.3: enabled 0

 1621 08:43:51.760736  PCI: 00:1f.0: enabled 1

 1622 08:43:51.763741  PCI: 00:1f.1: enabled 0

 1623 08:43:51.765363  PCI: 00:1f.2: enabled 0

 1624 08:43:51.767824  PCI: 00:1f.3: enabled 1

 1625 08:43:51.769923  PCI: 00:1f.4: enabled 1

 1626 08:43:51.772539  PCI: 00:1f.5: enabled 1

 1627 08:43:51.775305  PCI: 00:1f.6: enabled 1

 1628 08:43:51.777444  USB0 port 0: enabled 1

 1629 08:43:51.780375  I2C: 01:10: enabled 1

 1630 08:43:51.782272  I2C: 01:10: enabled 1

 1631 08:43:51.784238  I2C: 01:34: enabled 1

 1632 08:43:51.786130  I2C: 02:2c: enabled 1

 1633 08:43:51.789182  I2C: 03:50: enabled 1

 1634 08:43:51.791218  PNP: 0c09.0: enabled 1

 1635 08:43:51.793814  USB2 port 0: enabled 1

 1636 08:43:51.795939  USB2 port 1: enabled 1

 1637 08:43:51.797866  USB2 port 2: enabled 1

 1638 08:43:51.800750  USB2 port 4: enabled 1

 1639 08:43:51.802680  USB2 port 5: enabled 1

 1640 08:43:51.805160  USB2 port 6: enabled 1

 1641 08:43:51.807847  USB2 port 7: enabled 1

 1642 08:43:51.810408  USB2 port 8: enabled 1

 1643 08:43:51.811885  USB2 port 9: enabled 1

 1644 08:43:51.814868  USB3 port 0: enabled 1

 1645 08:43:51.816920  USB3 port 1: enabled 1

 1646 08:43:51.818646  USB3 port 2: enabled 1

 1647 08:43:51.821136  USB3 port 3: enabled 1

 1648 08:43:51.823533  USB3 port 4: enabled 1

 1649 08:43:51.825518  APIC: 02: enabled 1

 1650 08:43:51.827475  APIC: 01: enabled 1

 1651 08:43:51.829471  APIC: 03: enabled 1

 1652 08:43:51.831866  APIC: 04: enabled 1

 1653 08:43:51.834420  APIC: 05: enabled 1

 1654 08:43:51.835906  APIC: 06: enabled 1

 1655 08:43:51.837917  APIC: 07: enabled 1

 1656 08:43:51.840427  PCI: 00:08.0: enabled 1

 1657 08:43:51.843369  PCI: 00:14.2: enabled 1

 1658 08:43:51.844979  PCI: 01:00.0: enabled 1

 1659 08:43:51.847802  PCI: 02:00.0: enabled 1

 1660 08:43:51.852938  Disabling ACPI via APMC:

 1661 08:43:51.855177  done.

 1662 08:43:51.859864  FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)

 1663 08:43:51.863945  ELOG: NV offset 0x1bf0000 size 0x4000

 1664 08:43:51.871552  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1665 08:43:51.877421  ELOG: Event(17) added with size 13 at 2023-08-07 08:43:52 UTC

 1666 08:43:51.882505  POST: Unexpected post code in previous boot: 0x73

 1667 08:43:51.889140  ELOG: Event(A3) added with size 11 at 2023-08-07 08:43:52 UTC

 1668 08:43:51.894944  ELOG: Event(92) added with size 9 at 2023-08-07 08:43:52 UTC

 1669 08:43:51.902122  ELOG: Event(93) added with size 9 at 2023-08-07 08:43:52 UTC

 1670 08:43:51.908043  ELOG: Event(9A) added with size 9 at 2023-08-07 08:43:52 UTC

 1671 08:43:51.914444  ELOG: Event(9E) added with size 10 at 2023-08-07 08:43:52 UTC

 1672 08:43:51.920659  ELOG: Event(9F) added with size 14 at 2023-08-07 08:43:52 UTC

 1673 08:43:51.926724  BS: BS_DEV_INIT times (us): entry 0 run 469821 exit 72513

 1674 08:43:51.933176  ELOG: Event(A1) added with size 10 at 2023-08-07 08:43:52 UTC

 1675 08:43:51.940526  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1676 08:43:51.946831  ELOG: Event(A0) added with size 9 at 2023-08-07 08:43:52 UTC

 1677 08:43:51.951194  elog_add_boot_reason: Logged dev mode boot

 1678 08:43:51.953429  Finalize devices...

 1679 08:43:51.954996  PCI: 00:17.0 final

 1680 08:43:51.957482  Devices finalized

 1681 08:43:51.962714  FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)

 1682 08:43:51.968644  BS: BS_POST_DEVICE times (us): entry 24771 run 5937 exit 5357

 1683 08:43:51.974179  BS: BS_OS_RESUME_CHECK times (us): entry 0 run 90 exit 0

 1684 08:43:51.982506  disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C

 1685 08:43:51.987166  disable_unused_touchscreen: Disable ACPI0C50

 1686 08:43:51.991203  disable_unused_touchscreen: Enable ELAN900C

 1687 08:43:51.994800  CBFS @ 1d00000 size 300000

 1688 08:43:52.000712  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1689 08:43:52.003910  CBFS: Locating 'fallback/dsdt.aml'

 1690 08:43:52.008253  CBFS: Found @ offset 10b200 size 4448

 1691 08:43:52.010794  CBFS @ 1d00000 size 300000

 1692 08:43:52.017755  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1693 08:43:52.020759  CBFS: Locating 'fallback/slic'

 1694 08:43:52.025492  CBFS: 'fallback/slic' not found.

 1695 08:43:52.029350  ACPI: Writing ACPI tables at 89c0f000.

 1696 08:43:52.031259  ACPI:    * FACS

 1697 08:43:52.033003  ACPI:    * DSDT

 1698 08:43:52.036826  Ramoops buffer: 0x100000@0x89b0e000.

 1699 08:43:52.041568  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

 1700 08:43:52.045852  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

 1701 08:43:52.049696  ACPI:    * FADT

 1702 08:43:52.051214  SCI is IRQ9

 1703 08:43:52.055021  ACPI: added table 1/32, length now 40

 1704 08:43:52.056655  ACPI:     * SSDT

 1705 08:43:52.059935  Found 1 CPU(s) with 8 core(s) each.

 1706 08:43:52.064258  Error: Could not locate 'wifi_sar' in VPD.

 1707 08:43:52.068115  Error: failed from getting SAR limits!

 1708 08:43:52.072478  \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3

 1709 08:43:52.076421  dw_i2c: bad counts. hcnt = -14 lcnt = 30

 1710 08:43:52.080207  dw_i2c: bad counts. hcnt = -20 lcnt = 40

 1711 08:43:52.085143  dw_i2c: bad counts. hcnt = -18 lcnt = 48

 1712 08:43:52.089527  \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10

 1713 08:43:52.095276  \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34

 1714 08:43:52.100357  \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c

 1715 08:43:52.104775  \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50

 1716 08:43:52.110680  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1717 08:43:52.116099  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1

 1718 08:43:52.121903  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2

 1719 08:43:52.128226  \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4

 1720 08:43:52.132727  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5

 1721 08:43:52.137199  \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6

 1722 08:43:52.141690  \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7

 1723 08:43:52.146544  \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8

 1724 08:43:52.152056  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1725 08:43:52.157858  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1726 08:43:52.163714  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1

 1727 08:43:52.169784  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1728 08:43:52.175022  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3

 1729 08:43:52.180324  \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4

 1730 08:43:52.184008  ACPI: added table 2/32, length now 44

 1731 08:43:52.184994  ACPI:    * MCFG

 1732 08:43:52.189197  ACPI: added table 3/32, length now 48

 1733 08:43:52.190852  ACPI:    * TPM2

 1734 08:43:52.193500  TPM2 log created at 89afe000

 1735 08:43:52.197437  ACPI: added table 4/32, length now 52

 1736 08:43:52.199546  ACPI:    * MADT

 1737 08:43:52.200431  SCI is IRQ9

 1738 08:43:52.204249  ACPI: added table 5/32, length now 56

 1739 08:43:52.206370  current = 89c14bd0

 1740 08:43:52.208251  ACPI:    * IGD OpRegion

 1741 08:43:52.211198  GMA: Found VBT in CBFS

 1742 08:43:52.214237  GMA: Found valid VBT in CBFS

 1743 08:43:52.217278  ACPI: added table 6/32, length now 60

 1744 08:43:52.219442  ACPI:    * HPET

 1745 08:43:52.222783  ACPI: added table 7/32, length now 64

 1746 08:43:52.224631  ACPI: done.

 1747 08:43:52.226666  ACPI tables: 31872 bytes.

 1748 08:43:52.230319  smbios_write_tables: 89afd000

 1749 08:43:52.231771  recv_ec_data: 0x01

 1750 08:43:52.234916  Create SMBIOS type 17

 1751 08:43:52.236930  PCI: 00:14.3 (Intel WiFi)

 1752 08:43:52.239648  SMBIOS tables: 708 bytes.

 1753 08:43:52.243819  Writing table forward entry at 0x00000500

 1754 08:43:52.250461  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b

 1755 08:43:52.253365  Writing coreboot table at 0x89c33000

 1756 08:43:52.259237   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1757 08:43:52.263712   1. 0000000000001000-000000000009ffff: RAM

 1758 08:43:52.268304   2. 00000000000a0000-00000000000fffff: RESERVED

 1759 08:43:52.273255   3. 0000000000100000-0000000089afcfff: RAM

 1760 08:43:52.278841   4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES

 1761 08:43:52.283479   5. 0000000089c81000-0000000089cdbfff: RAMSTAGE

 1762 08:43:52.289994   6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES

 1763 08:43:52.294633   7. 000000008a000000-000000008f7fffff: RESERVED

 1764 08:43:52.299340   8. 00000000e0000000-00000000efffffff: RESERVED

 1765 08:43:52.303461   9. 00000000fc000000-00000000fc000fff: RESERVED

 1766 08:43:52.308346  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1767 08:43:52.313255  11. 00000000fed10000-00000000fed17fff: RESERVED

 1768 08:43:52.318063  12. 00000000fed80000-00000000fed83fff: RESERVED

 1769 08:43:52.322574  13. 00000000feda0000-00000000feda1fff: RESERVED

 1770 08:43:52.327141  14. 0000000100000000-000000026e7fffff: RAM

 1771 08:43:52.331298  Graphics framebuffer located at 0xc0000000

 1772 08:43:52.334273  Passing 6 GPIOs to payload:

 1773 08:43:52.340090              NAME |       PORT | POLARITY |     VALUE

 1774 08:43:52.344830     write protect | 0x000000dc |     high |      high

 1775 08:43:52.350271          recovery | 0x000000d5 |      low |      high

 1776 08:43:52.354962               lid |  undefined |     high |      high

 1777 08:43:52.360060             power |  undefined |     high |       low

 1778 08:43:52.365701             oprom |  undefined |     high |       low

 1779 08:43:52.371413          EC in RW |  undefined |     high |       low

 1780 08:43:52.373448  recv_ec_data: 0x01

 1781 08:43:52.374135  SKU ID: 3

 1782 08:43:52.377161  CBFS @ 1d00000 size 300000

 1783 08:43:52.382965  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1784 08:43:52.389098  Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum bca

 1785 08:43:52.392648  coreboot table: 1484 bytes.

 1786 08:43:52.395306  IMD ROOT    0. 89fff000 00001000

 1787 08:43:52.398872  IMD SMALL   1. 89ffe000 00001000

 1788 08:43:52.402282  FSP MEMORY  2. 89d0e000 002f0000

 1789 08:43:52.405738  CONSOLE     3. 89cee000 00020000

 1790 08:43:52.408924  TIME STAMP  4. 89ced000 00000910

 1791 08:43:52.412231  VBOOT WORK  5. 89cea000 00003000

 1792 08:43:52.415475  VBOOT       6. 89ce9000 00000c0c

 1793 08:43:52.418279  MRC DATA    7. 89ce7000 000018f0

 1794 08:43:52.422057  ROMSTG STCK 8. 89ce6000 00000400

 1795 08:43:52.425291  AFTER CAR   9. 89cdc000 0000a000

 1796 08:43:52.428795  RAMSTAGE   10. 89c80000 0005c000

 1797 08:43:52.432098  REFCODE    11. 89c4b000 00035000

 1798 08:43:52.435567  SMM BACKUP 12. 89c3b000 00010000

 1799 08:43:52.438430  COREBOOT   13. 89c33000 00008000

 1800 08:43:52.442070  ACPI       14. 89c0f000 00024000

 1801 08:43:52.444957  ACPI GNVS  15. 89c0e000 00001000

 1802 08:43:52.448317  RAMOOPS    16. 89b0e000 00100000

 1803 08:43:52.452037  TPM2 TCGLOG17. 89afe000 00010000

 1804 08:43:52.455093  SMBIOS     18. 89afd000 00000800

 1805 08:43:52.457015  IMD small region:

 1806 08:43:52.460435    IMD ROOT    0. 89ffec00 00000400

 1807 08:43:52.464725    FSP RUNTIME 1. 89ffebe0 00000004

 1808 08:43:52.467937    POWER STATE 2. 89ffeba0 00000040

 1809 08:43:52.470837    ROMSTAGE    3. 89ffeb80 00000004

 1810 08:43:52.474200    MEM INFO    4. 89ffe9c0 000001a9

 1811 08:43:52.478110    VPD         5. 89ffe960 00000047

 1812 08:43:52.481605    COREBOOTFWD 6. 89ffe920 00000028

 1813 08:43:52.485290  MTRR: Physical address space:

 1814 08:43:52.491163  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1815 08:43:52.497389  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1816 08:43:52.503436  0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6

 1817 08:43:52.509386  0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0

 1818 08:43:52.515507  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1819 08:43:52.522103  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1820 08:43:52.528292  0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6

 1821 08:43:52.532487  MTRR: Fixed MSR 0x250 0x0606060606060606

 1822 08:43:52.536183  MTRR: Fixed MSR 0x258 0x0606060606060606

 1823 08:43:52.540376  MTRR: Fixed MSR 0x259 0x0000000000000000

 1824 08:43:52.544594  MTRR: Fixed MSR 0x268 0x0606060606060606

 1825 08:43:52.548631  MTRR: Fixed MSR 0x269 0x0606060606060606

 1826 08:43:52.553369  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1827 08:43:52.557200  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1828 08:43:52.561146  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1829 08:43:52.565102  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1830 08:43:52.569550  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1831 08:43:52.573547  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1832 08:43:52.576868  call enable_fixed_mtrr()

 1833 08:43:52.579926  CPU physical address size: 39 bits

 1834 08:43:52.584428  MTRR: default type WB/UC MTRR counts: 7/7.

 1835 08:43:52.587412  MTRR: UC selected as default type.

 1836 08:43:52.593645  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1837 08:43:52.600030  MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6

 1838 08:43:52.606753  MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6

 1839 08:43:52.612540  MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6

 1840 08:43:52.619217  MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1841 08:43:52.625358  MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1842 08:43:52.631932  MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 1843 08:43:52.632187  

 1844 08:43:52.633664  MTRR check

 1845 08:43:52.636317  Fixed MTRRs   : Enabled

 1846 08:43:52.638835  Variable MTRRs: Enabled

 1847 08:43:52.638912  

 1848 08:43:52.642711  MTRR: Fixed MSR 0x250 0x0606060606060606

 1849 08:43:52.646792  MTRR: Fixed MSR 0x258 0x0606060606060606

 1850 08:43:52.650697  MTRR: Fixed MSR 0x259 0x0000000000000000

 1851 08:43:52.654990  MTRR: Fixed MSR 0x268 0x0606060606060606

 1852 08:43:52.658923  MTRR: Fixed MSR 0x269 0x0606060606060606

 1853 08:43:52.662780  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1854 08:43:52.666844  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1855 08:43:52.671132  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1856 08:43:52.675642  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1857 08:43:52.680067  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1858 08:43:52.683870  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1859 08:43:52.690830  BS: BS_WRITE_TABLES times (us): entry 17195 run 490136 exit 157203

 1860 08:43:52.693245  call enable_fixed_mtrr()

 1861 08:43:52.695428  CBFS @ 1d00000 size 300000

 1862 08:43:52.699203  CPU physical address size: 39 bits

 1863 08:43:52.706034  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1864 08:43:52.709901  MTRR: Fixed MSR 0x250 0x0606060606060606

 1865 08:43:52.714164  MTRR: Fixed MSR 0x250 0x0606060606060606

 1866 08:43:52.718670  MTRR: Fixed MSR 0x258 0x0606060606060606

 1867 08:43:52.722042  MTRR: Fixed MSR 0x259 0x0000000000000000

 1868 08:43:52.726318  MTRR: Fixed MSR 0x268 0x0606060606060606

 1869 08:43:52.730403  MTRR: Fixed MSR 0x269 0x0606060606060606

 1870 08:43:52.734387  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1871 08:43:52.738526  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1872 08:43:52.742849  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1873 08:43:52.746861  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1874 08:43:52.750869  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1875 08:43:52.754711  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1876 08:43:52.759193  MTRR: Fixed MSR 0x258 0x0606060606060606

 1877 08:43:52.761788  call enable_fixed_mtrr()

 1878 08:43:52.766079  MTRR: Fixed MSR 0x259 0x0000000000000000

 1879 08:43:52.769595  MTRR: Fixed MSR 0x268 0x0606060606060606

 1880 08:43:52.774039  MTRR: Fixed MSR 0x269 0x0606060606060606

 1881 08:43:52.778401  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1882 08:43:52.781841  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1883 08:43:52.786662  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1884 08:43:52.790453  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1885 08:43:52.794835  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1886 08:43:52.798640  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1887 08:43:52.802477  CPU physical address size: 39 bits

 1888 08:43:52.805794  call enable_fixed_mtrr()

 1889 08:43:52.809282  MTRR: Fixed MSR 0x250 0x0606060606060606

 1890 08:43:52.813368  MTRR: Fixed MSR 0x250 0x0606060606060606

 1891 08:43:52.817457  MTRR: Fixed MSR 0x258 0x0606060606060606

 1892 08:43:52.821715  MTRR: Fixed MSR 0x259 0x0000000000000000

 1893 08:43:52.825925  MTRR: Fixed MSR 0x268 0x0606060606060606

 1894 08:43:52.829901  MTRR: Fixed MSR 0x269 0x0606060606060606

 1895 08:43:52.833980  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1896 08:43:52.838018  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1897 08:43:52.842255  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1898 08:43:52.846656  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1899 08:43:52.849959  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1900 08:43:52.853887  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1901 08:43:52.858272  MTRR: Fixed MSR 0x258 0x0606060606060606

 1902 08:43:52.860952  call enable_fixed_mtrr()

 1903 08:43:52.865834  MTRR: Fixed MSR 0x259 0x0000000000000000

 1904 08:43:52.869264  MTRR: Fixed MSR 0x268 0x0606060606060606

 1905 08:43:52.873510  MTRR: Fixed MSR 0x269 0x0606060606060606

 1906 08:43:52.877849  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1907 08:43:52.881563  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1908 08:43:52.885461  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1909 08:43:52.889670  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1910 08:43:52.894044  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1911 08:43:52.897984  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1912 08:43:52.902123  CPU physical address size: 39 bits

 1913 08:43:52.904257  call enable_fixed_mtrr()

 1914 08:43:52.909317  MTRR: Fixed MSR 0x250 0x0606060606060606

 1915 08:43:52.913276  MTRR: Fixed MSR 0x250 0x0606060606060606

 1916 08:43:52.916960  MTRR: Fixed MSR 0x258 0x0606060606060606

 1917 08:43:52.921001  MTRR: Fixed MSR 0x259 0x0000000000000000

 1918 08:43:52.925294  MTRR: Fixed MSR 0x268 0x0606060606060606

 1919 08:43:52.929530  MTRR: Fixed MSR 0x269 0x0606060606060606

 1920 08:43:52.933377  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1921 08:43:52.936891  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1922 08:43:52.941497  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1923 08:43:52.945497  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1924 08:43:52.949686  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1925 08:43:52.954136  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1926 08:43:52.957526  MTRR: Fixed MSR 0x258 0x0606060606060606

 1927 08:43:52.960117  call enable_fixed_mtrr()

 1928 08:43:52.964677  MTRR: Fixed MSR 0x259 0x0000000000000000

 1929 08:43:52.968594  MTRR: Fixed MSR 0x268 0x0606060606060606

 1930 08:43:52.973362  MTRR: Fixed MSR 0x269 0x0606060606060606

 1931 08:43:52.977295  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1932 08:43:52.981165  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1933 08:43:52.984923  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1934 08:43:52.989335  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1935 08:43:52.993639  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1936 08:43:52.997070  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1937 08:43:53.000776  CPU physical address size: 39 bits

 1938 08:43:53.005022  CBFS: Locating 'fallback/payload'

 1939 08:43:53.008119  CPU physical address size: 39 bits

 1940 08:43:53.011669  CBFS: Found @ offset 1cf4c0 size 3a954

 1941 08:43:53.014398  call enable_fixed_mtrr()

 1942 08:43:53.017700  CPU physical address size: 39 bits

 1943 08:43:53.021482  CPU physical address size: 39 bits

 1944 08:43:53.026453  Checking segment from ROM address 0xffecf4f8

 1945 08:43:53.030845  Checking segment from ROM address 0xffecf514

 1946 08:43:53.035113  Loading segment from ROM address 0xffecf4f8

 1947 08:43:53.037144    code (compression=0)

 1948 08:43:53.045636    New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c

 1949 08:43:53.054197  Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c

 1950 08:43:53.056285  it's not compressed!

 1951 08:43:53.137574  [ 0x30100018, 3013a934, 0x32751910) <- ffecf530

 1952 08:43:53.144364  Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc

 1953 08:43:53.153440  Loading segment from ROM address 0xffecf514

 1954 08:43:53.156092    Entry Point 0x30100018

 1955 08:43:53.157325  Loaded segments

 1956 08:43:53.166858  Finalizing chipset.

 1957 08:43:53.168312  Finalizing SMM.

 1958 08:43:53.174982  BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466628 exit 11542

 1959 08:43:53.178212  mp_park_aps done after 0 msecs.

 1960 08:43:53.182289  Jumping to boot code at 30100018(89c33000)

 1961 08:43:53.190863  CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes

 1962 08:43:53.190984  

 1963 08:43:53.191322  

 1964 08:43:53.191622  

 1965 08:43:53.194605  Starting depthcharge on sarien...

 1966 08:43:53.194687  

 1967 08:43:53.195338  end: 2.2.3 depthcharge-start (duration 00:00:12) [common]
 1968 08:43:53.195451  start: 2.2.4 bootloader-commands (timeout 00:04:31) [common]
 1969 08:43:53.195564  Setting prompt string to ['sarien:']
 1970 08:43:53.195648  bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:31)
 1971 08:43:53.202760  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1972 08:43:53.202885  

 1973 08:43:53.209733  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1974 08:43:53.209852  

 1975 08:43:53.218079  WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!

 1976 08:43:53.218192  

 1977 08:43:53.219868  BIOS MMAP details:

 1978 08:43:53.220141  

 1979 08:43:53.223179  IFD Base Offset  : 0x1000000

 1980 08:43:53.223265  

 1981 08:43:53.225883  IFD End Offset   : 0x2000000

 1982 08:43:53.225961  

 1983 08:43:53.228466  MMAP Size        : 0x1000000

 1984 08:43:53.228543  

 1985 08:43:53.231629  MMAP Start       : 0xff000000

 1986 08:43:53.231979  

 1987 08:43:53.237954  Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff

 1988 08:43:53.242719  

 1989 08:43:53.247239  New NVMe Controller 0x3214e110 @ 00:1d:04

 1990 08:43:53.247328  

 1991 08:43:53.250970  New NVMe Controller 0x3214e1d8 @ 00:1d:00

 1992 08:43:53.251538  

 1993 08:43:53.257188  The GBB signature is at 0x30000014 and is:  24 47 42 42

 1994 08:43:53.261115  

 1995 08:43:53.263739  Wipe memory regions:

 1996 08:43:53.263823  

 1997 08:43:53.266441  	[0x00000000001000, 0x000000000a0000)

 1998 08:43:53.266546  

 1999 08:43:53.270509  	[0x00000000100000, 0x00000030000000)

 2000 08:43:53.352723  

 2001 08:43:53.356172  	[0x00000032751910, 0x00000089afd000)

 2002 08:43:53.506249  

 2003 08:43:53.510172  	[0x00000100000000, 0x0000026e800000)

 2004 08:43:54.520815  

 2005 08:43:54.522699  R8152: Initializing

 2006 08:43:54.523007  

 2007 08:43:54.525858  Version 6 (ocp_data = 5c30)

 2008 08:43:54.527211  

 2009 08:43:54.529666  R8152: Done initializing

 2010 08:43:54.529800  

 2011 08:43:54.530988  Adding net device

 2012 08:43:54.531538  

 2013 08:43:54.537023  [firmware-sarien-12200.B-collabora] Apr  9 2021 09:49:38

 2014 08:43:54.537139  

 2015 08:43:54.537247  

 2016 08:43:54.537353  

 2017 08:43:54.538459  Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2019 08:43:54.638838  sarien: tftpboot 192.168.201.1 11220710/tftp-deploy-j1pugucc/kernel/bzImage 11220710/tftp-deploy-j1pugucc/kernel/cmdline 11220710/tftp-deploy-j1pugucc/ramdisk/ramdisk.cpio.gz

 2020 08:43:54.639001  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2021 08:43:54.639131  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:30)
 2022 08:43:54.681898  tftpboot 192.168.201.1 11220710/tftp-deploy-j1pugucc/kernel/bzImage 11220710/tftp-deploy-j1pugucc/kernel/cmdline 11220710/tftp-deploy-j1pugucc/ramdisk/ramdisk.cpio.gz

 2023 08:43:54.682022  

 2024 08:43:54.682092  Waiting for link

 2025 08:43:54.842058  

 2026 08:43:54.842430  done.

 2027 08:43:54.842738  

 2028 08:43:54.845200  MAC: 00:24:32:30:7c:12

 2029 08:43:54.845318  

 2030 08:43:54.847753  Sending DHCP discover... done.

 2031 08:43:54.848474  

 2032 08:43:54.850981  Waiting for reply... done.

 2033 08:43:54.851147  

 2034 08:43:54.853523  Sending DHCP request... done.

 2035 08:43:54.855674  

 2036 08:43:54.860083  Waiting for reply... done.

 2037 08:43:54.860187  

 2038 08:43:54.862456  My ip is 192.168.201.190

 2039 08:43:54.862582  

 2040 08:43:54.865910  The DHCP server ip is 192.168.201.1

 2041 08:43:54.866018  

 2042 08:43:54.870870  TFTP server IP predefined by user: 192.168.201.1

 2043 08:43:54.870955  

 2044 08:43:54.877956  Bootfile predefined by user: 11220710/tftp-deploy-j1pugucc/kernel/bzImage

 2045 08:43:54.878128  

 2046 08:43:54.881352  Sending tftp read request... done.

 2047 08:43:54.881689  

 2048 08:43:54.885644  Waiting for the transfer... 

 2049 08:43:54.885790  

 2050 08:43:55.401011  00000000 ################################################################

 2051 08:43:55.401427  

 2052 08:43:55.909888  00080000 ################################################################

 2053 08:43:55.910536  

 2054 08:43:56.420577  00100000 ################################################################

 2055 08:43:56.420925  

 2056 08:43:56.930041  00180000 ################################################################

 2057 08:43:56.930648  

 2058 08:43:57.438575  00200000 ################################################################

 2059 08:43:57.438991  

 2060 08:43:57.944839  00280000 ################################################################

 2061 08:43:57.945550  

 2062 08:43:58.465701  00300000 ################################################################

 2063 08:43:58.466158  

 2064 08:43:58.986876  00380000 ################################################################

 2065 08:43:58.987231  

 2066 08:43:59.518380  00400000 ################################################################

 2067 08:43:59.518859  

 2068 08:44:00.060304  00480000 ################################################################

 2069 08:44:00.060641  

 2070 08:44:00.600173  00500000 ################################################################

 2071 08:44:00.600310  

 2072 08:44:01.133405  00580000 ################################################################

 2073 08:44:01.133550  

 2074 08:44:01.649838  00600000 ################################################################

 2075 08:44:01.650592  

 2076 08:44:02.158640  00680000 ################################################################

 2077 08:44:02.159193  

 2078 08:44:02.668198  00700000 ################################################################

 2079 08:44:02.668551  

 2080 08:44:02.688678  00780000 ### done.

 2081 08:44:02.688791  

 2082 08:44:02.692801  The bootfile was 7884688 bytes long.

 2083 08:44:02.693146  

 2084 08:44:02.695912  Sending tftp read request... done.

 2085 08:44:02.696014  

 2086 08:44:02.698990  Waiting for the transfer... 

 2087 08:44:02.699313  

 2088 08:44:03.208005  00000000 ################################################################

 2089 08:44:03.208140  

 2090 08:44:03.715074  00080000 ################################################################

 2091 08:44:03.715766  

 2092 08:44:04.223500  00100000 ################################################################

 2093 08:44:04.223896  

 2094 08:44:04.731216  00180000 ################################################################

 2095 08:44:04.731582  

 2096 08:44:05.239570  00200000 ################################################################

 2097 08:44:05.240268  

 2098 08:44:05.748956  00280000 ################################################################

 2099 08:44:05.749115  

 2100 08:44:06.257467  00300000 ################################################################

 2101 08:44:06.257906  

 2102 08:44:06.766228  00380000 ################################################################

 2103 08:44:06.766616  

 2104 08:44:07.276621  00400000 ################################################################

 2105 08:44:07.277135  

 2106 08:44:07.785386  00480000 ################################################################

 2107 08:44:07.786061  

 2108 08:44:08.294233  00500000 ################################################################

 2109 08:44:08.294971  

 2110 08:44:08.803002  00580000 ################################################################

 2111 08:44:08.803370  

 2112 08:44:09.312521  00600000 ################################################################

 2113 08:44:09.313087  

 2114 08:44:09.822929  00680000 ################################################################

 2115 08:44:09.823329  

 2116 08:44:10.331947  00700000 ################################################################

 2117 08:44:10.332342  

 2118 08:44:10.840511  00780000 ################################################################

 2119 08:44:10.841140  

 2120 08:44:11.253042  00800000 #################################################### done.

 2121 08:44:11.253602  

 2122 08:44:11.256990  Sending tftp read request... done.

 2123 08:44:11.257085  

 2124 08:44:11.259577  Waiting for the transfer... 

 2125 08:44:11.260162  

 2126 08:44:11.261066  00000000 # done.

 2127 08:44:11.261156  

 2128 08:44:11.270970  Command line loaded dynamically from TFTP file: 11220710/tftp-deploy-j1pugucc/kernel/cmdline

 2129 08:44:11.271057  

 2130 08:44:11.290600  The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2131 08:44:11.293809  

 2132 08:44:11.297520  Shutting down all USB controllers.

 2133 08:44:11.297860  

 2134 08:44:11.300461  Removing current net device

 2135 08:44:11.303994  

 2136 08:44:11.306681  EC: exit firmware mode

 2137 08:44:11.307838  

 2138 08:44:11.309766  Finalizing coreboot

 2139 08:44:11.310135  

 2140 08:44:11.314977  Exiting depthcharge with code 4 at timestamp: 25689762

 2141 08:44:11.315090  

 2142 08:44:11.315471  

 2143 08:44:11.317489  end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
 2144 08:44:11.317596  start: 2.2.5 auto-login-action (timeout 00:04:13) [common]
 2145 08:44:11.317676  Setting prompt string to ['Linux version [0-9]']
 2146 08:44:11.317748  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2147 08:44:11.317831  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2148 08:44:11.318011  Starting kernel ...

 2149 08:44:11.318083  

 2150 08:44:11.318147  

 2152 08:48:24.317911  end: 2.2.5 auto-login-action (duration 00:04:13) [common]
 2154 08:48:24.318136  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 253 seconds'
 2156 08:48:24.318291  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2159 08:48:24.318610  end: 2 depthcharge-action (duration 00:05:00) [common]
 2161 08:48:24.318969  Cleaning after the job
 2162 08:48:24.319074  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220710/tftp-deploy-j1pugucc/ramdisk
 2163 08:48:24.320319  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220710/tftp-deploy-j1pugucc/kernel
 2164 08:48:24.321709  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220710/tftp-deploy-j1pugucc/modules
 2165 08:48:24.322139  start: 5.1 power-off (timeout 00:00:30) [common]
 2166 08:48:24.322303  Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-2' '--port=1' '--command=off'
 2167 08:48:29.462602  >> Command sent successfully.

 2168 08:48:29.465073  Returned 0 in 5 seconds
 2169 08:48:29.565437  end: 5.1 power-off (duration 00:00:05) [common]
 2171 08:48:29.565787  start: 5.2 read-feedback (timeout 00:09:55) [common]
 2172 08:48:29.566056  Listened to connection for namespace 'common' for up to 1s
 2173 08:48:30.567021  Finalising connection for namespace 'common'
 2174 08:48:30.567188  Disconnecting from shell: Finalise
 2175 08:48:30.567269  

 2176 08:48:30.667584  end: 5.2 read-feedback (duration 00:00:01) [common]
 2177 08:48:30.667731  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11220710
 2178 08:48:30.684445  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11220710
 2179 08:48:30.684592  JobError: Your job cannot terminate cleanly.