Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 08:43:23.910357 lava-dispatcher, installed at version: 2023.05.1
2 08:43:23.910563 start: 0 validate
3 08:43:23.910698 Start time: 2023-08-07 08:43:23.910690+00:00 (UTC)
4 08:43:23.910821 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:43:23.910949 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 08:43:24.179141 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:43:24.179337 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:43:24.445962 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:43:24.446169 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 08:43:24.714567 validate duration: 0.80
12 08:43:24.714853 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 08:43:24.714948 start: 1.1 download-retry (timeout 00:10:00) [common]
14 08:43:24.715037 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 08:43:24.715164 Not decompressing ramdisk as can be used compressed.
16 08:43:24.715248 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 08:43:24.715310 saving as /var/lib/lava/dispatcher/tmp/11220738/tftp-deploy-w9rbhkx2/ramdisk/rootfs.cpio.gz
18 08:43:24.715368 total size: 35760064 (34MB)
19 08:43:24.716442 progress 0% (0MB)
20 08:43:24.725875 progress 5% (1MB)
21 08:43:24.735257 progress 10% (3MB)
22 08:43:24.744425 progress 15% (5MB)
23 08:43:24.753784 progress 20% (6MB)
24 08:43:24.763299 progress 25% (8MB)
25 08:43:24.772616 progress 30% (10MB)
26 08:43:24.781873 progress 35% (11MB)
27 08:43:24.791020 progress 40% (13MB)
28 08:43:24.800209 progress 45% (15MB)
29 08:43:24.809350 progress 50% (17MB)
30 08:43:24.818616 progress 55% (18MB)
31 08:43:24.827698 progress 60% (20MB)
32 08:43:24.837096 progress 65% (22MB)
33 08:43:24.846450 progress 70% (23MB)
34 08:43:24.855848 progress 75% (25MB)
35 08:43:24.865292 progress 80% (27MB)
36 08:43:24.874514 progress 85% (29MB)
37 08:43:24.883797 progress 90% (30MB)
38 08:43:24.892692 progress 95% (32MB)
39 08:43:24.901728 progress 100% (34MB)
40 08:43:24.901886 34MB downloaded in 0.19s (182.85MB/s)
41 08:43:24.902042 end: 1.1.1 http-download (duration 00:00:00) [common]
43 08:43:24.902292 end: 1.1 download-retry (duration 00:00:00) [common]
44 08:43:24.902378 start: 1.2 download-retry (timeout 00:10:00) [common]
45 08:43:24.902459 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 08:43:24.902596 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 08:43:24.902670 saving as /var/lib/lava/dispatcher/tmp/11220738/tftp-deploy-w9rbhkx2/kernel/bzImage
48 08:43:24.902731 total size: 7884688 (7MB)
49 08:43:24.902790 No compression specified
50 08:43:24.903913 progress 0% (0MB)
51 08:43:24.906059 progress 5% (0MB)
52 08:43:24.908149 progress 10% (0MB)
53 08:43:24.910286 progress 15% (1MB)
54 08:43:24.912373 progress 20% (1MB)
55 08:43:24.914525 progress 25% (1MB)
56 08:43:24.916610 progress 30% (2MB)
57 08:43:24.918739 progress 35% (2MB)
58 08:43:24.920820 progress 40% (3MB)
59 08:43:24.922948 progress 45% (3MB)
60 08:43:24.925039 progress 50% (3MB)
61 08:43:24.927125 progress 55% (4MB)
62 08:43:24.929184 progress 60% (4MB)
63 08:43:24.931287 progress 65% (4MB)
64 08:43:24.933321 progress 70% (5MB)
65 08:43:24.935397 progress 75% (5MB)
66 08:43:24.937500 progress 80% (6MB)
67 08:43:24.939585 progress 85% (6MB)
68 08:43:24.941704 progress 90% (6MB)
69 08:43:24.943763 progress 95% (7MB)
70 08:43:24.945864 progress 100% (7MB)
71 08:43:24.946053 7MB downloaded in 0.04s (173.59MB/s)
72 08:43:24.946192 end: 1.2.1 http-download (duration 00:00:00) [common]
74 08:43:24.946419 end: 1.2 download-retry (duration 00:00:00) [common]
75 08:43:24.946509 start: 1.3 download-retry (timeout 00:10:00) [common]
76 08:43:24.946597 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 08:43:24.946731 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 08:43:24.946802 saving as /var/lib/lava/dispatcher/tmp/11220738/tftp-deploy-w9rbhkx2/modules/modules.tar
79 08:43:24.946863 total size: 250852 (0MB)
80 08:43:24.946922 Using unxz to decompress xz
81 08:43:24.951202 progress 13% (0MB)
82 08:43:24.951602 progress 26% (0MB)
83 08:43:24.951841 progress 39% (0MB)
84 08:43:24.953427 progress 52% (0MB)
85 08:43:24.955397 progress 65% (0MB)
86 08:43:24.957264 progress 78% (0MB)
87 08:43:24.959180 progress 91% (0MB)
88 08:43:24.960884 progress 100% (0MB)
89 08:43:24.966367 0MB downloaded in 0.02s (12.27MB/s)
90 08:43:24.966646 end: 1.3.1 http-download (duration 00:00:00) [common]
92 08:43:24.966911 end: 1.3 download-retry (duration 00:00:00) [common]
93 08:43:24.967009 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 08:43:24.967110 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 08:43:24.967192 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 08:43:24.967277 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 08:43:24.967496 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd
98 08:43:24.967632 makedir: /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin
99 08:43:24.967737 makedir: /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/tests
100 08:43:24.967837 makedir: /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/results
101 08:43:24.967954 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-add-keys
102 08:43:24.968100 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-add-sources
103 08:43:24.968232 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-background-process-start
104 08:43:24.968367 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-background-process-stop
105 08:43:24.968495 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-common-functions
106 08:43:24.968621 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-echo-ipv4
107 08:43:24.968750 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-install-packages
108 08:43:24.968876 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-installed-packages
109 08:43:24.969001 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-os-build
110 08:43:24.969127 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-probe-channel
111 08:43:24.969256 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-probe-ip
112 08:43:24.969382 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-target-ip
113 08:43:24.969507 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-target-mac
114 08:43:24.969641 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-target-storage
115 08:43:24.969771 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-test-case
116 08:43:24.969898 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-test-event
117 08:43:24.970024 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-test-feedback
118 08:43:24.970151 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-test-raise
119 08:43:24.970285 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-test-reference
120 08:43:24.970417 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-test-runner
121 08:43:24.970543 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-test-set
122 08:43:24.970672 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-test-shell
123 08:43:24.970806 Updating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-install-packages (oe)
124 08:43:24.970963 Updating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/bin/lava-installed-packages (oe)
125 08:43:24.971089 Creating /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/environment
126 08:43:24.971189 LAVA metadata
127 08:43:24.971265 - LAVA_JOB_ID=11220738
128 08:43:24.971330 - LAVA_DISPATCHER_IP=192.168.201.1
129 08:43:24.971430 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 08:43:24.971499 skipped lava-vland-overlay
131 08:43:24.971572 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 08:43:24.971655 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 08:43:24.971715 skipped lava-multinode-overlay
134 08:43:24.971789 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 08:43:24.971870 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 08:43:24.971943 Loading test definitions
137 08:43:24.972038 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 08:43:24.972110 Using /lava-11220738 at stage 0
139 08:43:24.972428 uuid=11220738_1.4.2.3.1 testdef=None
140 08:43:24.972516 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 08:43:24.972600 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 08:43:24.973129 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 08:43:24.973387 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 08:43:24.974010 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 08:43:24.974241 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 08:43:24.974838 runner path: /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/0/tests/0_cros-ec test_uuid 11220738_1.4.2.3.1
149 08:43:24.974997 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 08:43:24.975200 Creating lava-test-runner.conf files
152 08:43:24.975263 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11220738/lava-overlay-w_loj6qd/lava-11220738/0 for stage 0
153 08:43:24.975353 - 0_cros-ec
154 08:43:24.975453 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 08:43:24.975540 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 08:43:24.982258 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 08:43:24.982364 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 08:43:24.982449 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 08:43:24.982534 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 08:43:24.982623 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 08:43:25.999668 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 08:43:26.000047 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 08:43:26.000164 extracting modules file /var/lib/lava/dispatcher/tmp/11220738/tftp-deploy-w9rbhkx2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11220738/extract-overlay-ramdisk-k_2izqdm/ramdisk
164 08:43:26.014651 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 08:43:26.014772 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 08:43:26.014865 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11220738/compress-overlay-nng6exse/overlay-1.4.2.4.tar.gz to ramdisk
167 08:43:26.014938 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11220738/compress-overlay-nng6exse/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11220738/extract-overlay-ramdisk-k_2izqdm/ramdisk
168 08:43:26.022306 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 08:43:26.022424 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 08:43:26.022516 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 08:43:26.022608 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 08:43:26.022686 Building ramdisk /var/lib/lava/dispatcher/tmp/11220738/extract-overlay-ramdisk-k_2izqdm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11220738/extract-overlay-ramdisk-k_2izqdm/ramdisk
173 08:43:26.534526 >> 184082 blocks
174 08:43:29.965363 rename /var/lib/lava/dispatcher/tmp/11220738/extract-overlay-ramdisk-k_2izqdm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11220738/tftp-deploy-w9rbhkx2/ramdisk/ramdisk.cpio.gz
175 08:43:29.965901 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 08:43:29.966089 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
177 08:43:29.966243 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
178 08:43:29.966390 No mkimage arch provided, not using FIT.
179 08:43:29.966534 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 08:43:29.966671 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 08:43:29.966834 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 08:43:29.966987 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
183 08:43:29.967121 No LXC device requested
184 08:43:29.967251 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 08:43:29.967384 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
186 08:43:29.967503 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 08:43:29.967610 Checking files for TFTP limit of 4294967296 bytes.
188 08:43:29.968128 end: 1 tftp-deploy (duration 00:00:05) [common]
189 08:43:29.968265 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 08:43:29.968392 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 08:43:29.968563 substitutions:
192 08:43:29.968661 - {DTB}: None
193 08:43:29.968750 - {INITRD}: 11220738/tftp-deploy-w9rbhkx2/ramdisk/ramdisk.cpio.gz
194 08:43:29.968839 - {KERNEL}: 11220738/tftp-deploy-w9rbhkx2/kernel/bzImage
195 08:43:29.968924 - {LAVA_MAC}: None
196 08:43:29.969021 - {PRESEED_CONFIG}: None
197 08:43:29.969121 - {PRESEED_LOCAL}: None
198 08:43:29.969216 - {RAMDISK}: 11220738/tftp-deploy-w9rbhkx2/ramdisk/ramdisk.cpio.gz
199 08:43:29.969317 - {ROOT_PART}: None
200 08:43:29.969418 - {ROOT}: None
201 08:43:29.969518 - {SERVER_IP}: 192.168.201.1
202 08:43:29.969693 - {TEE}: None
203 08:43:29.969796 Parsed boot commands:
204 08:43:29.969898 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 08:43:29.970163 Parsed boot commands: tftpboot 192.168.201.1 11220738/tftp-deploy-w9rbhkx2/kernel/bzImage 11220738/tftp-deploy-w9rbhkx2/kernel/cmdline 11220738/tftp-deploy-w9rbhkx2/ramdisk/ramdisk.cpio.gz
206 08:43:29.970308 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 08:43:29.970458 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 08:43:29.970617 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 08:43:29.970745 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 08:43:29.970822 Not connected, no need to disconnect.
211 08:43:29.970899 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 08:43:29.970978 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 08:43:29.971043 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-12'
214 08:43:29.974992 Setting prompt string to ['lava-test: # ']
215 08:43:29.975331 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 08:43:29.975436 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 08:43:29.975528 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 08:43:29.975617 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 08:43:29.975829 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
220 08:43:35.126855 >> Command sent successfully.
221 08:43:35.139168 Returned 0 in 5 seconds
222 08:43:35.240438 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 08:43:35.242299 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 08:43:35.242839 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 08:43:35.243340 Setting prompt string to 'Starting depthcharge on Voema...'
227 08:43:35.243723 Changing prompt to 'Starting depthcharge on Voema...'
228 08:43:35.244090 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 08:43:35.245378 [Enter `^Ec?' for help]
230 08:43:36.792723
231 08:43:36.793307
232 08:43:36.802787 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 08:43:36.806258 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
234 08:43:36.812830 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 08:43:36.817000 CPU: AES supported, TXT NOT supported, VT supported
236 08:43:36.824940 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 08:43:36.828250 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 08:43:36.831007 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 08:43:36.835159 VBOOT: Loading verstage.
240 08:43:36.842613 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 08:43:36.845051 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 08:43:36.852180 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 08:43:36.858385 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 08:43:36.865778 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 08:43:36.869825
246 08:43:36.870468
247 08:43:36.879289 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 08:43:36.893403 Probing TPM: . done!
249 08:43:36.897131 TPM ready after 0 ms
250 08:43:36.900722 Connected to device vid:did:rid of 1ae0:0028:00
251 08:43:36.911606 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
252 08:43:36.918696 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 08:43:36.921685 Initialized TPM device CR50 revision 0
254 08:43:36.979203 tlcl_send_startup: Startup return code is 0
255 08:43:36.979743 TPM: setup succeeded
256 08:43:36.994837 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 08:43:37.008549 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 08:43:37.021784 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 08:43:37.031992 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 08:43:37.035246 Chrome EC: UHEPI supported
261 08:43:37.038511 Phase 1
262 08:43:37.041479 FMAP: area GBB found @ 1805000 (458752 bytes)
263 08:43:37.051899 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 08:43:37.057919 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 08:43:37.064840 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 08:43:37.071665 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 08:43:37.074496 Recovery requested (1009000e)
268 08:43:37.083471 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 08:43:37.090504 tlcl_extend: response is 0
270 08:43:37.097029 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 08:43:37.107152 tlcl_extend: response is 0
272 08:43:37.113670 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 08:43:37.120141 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 08:43:37.126603 BS: verstage times (exec / console): total (unknown) / 142 ms
275 08:43:37.127168
276 08:43:37.127540
277 08:43:37.140179 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 08:43:37.146561 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 08:43:37.150051 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 08:43:37.153381 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 08:43:37.159594 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 08:43:37.162841 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 08:43:37.166202 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 08:43:37.169446 TCO_STS: 0000 0000
285 08:43:37.172783 GEN_PMCON: d0015038 00002200
286 08:43:37.176370 GBLRST_CAUSE: 00000000 00000000
287 08:43:37.176836 HPR_CAUSE0: 00000000
288 08:43:37.179334 prev_sleep_state 5
289 08:43:37.182612 Boot Count incremented to 20337
290 08:43:37.189160 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 08:43:37.196282 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 08:43:37.202978 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 08:43:37.209160 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 08:43:37.213786 Chrome EC: UHEPI supported
295 08:43:37.220652 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 08:43:37.233749 Probing TPM: done!
297 08:43:37.240288 Connected to device vid:did:rid of 1ae0:0028:00
298 08:43:37.250200 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
299 08:43:37.253486 Initialized TPM device CR50 revision 0
300 08:43:37.268987 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 08:43:37.275235 MRC: Hash idx 0x100b comparison successful.
302 08:43:37.278641 MRC cache found, size faa8
303 08:43:37.279116 bootmode is set to: 2
304 08:43:37.281960 SPD index = 2
305 08:43:37.288889 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 08:43:37.291866 SPD: module type is LPDDR4X
307 08:43:37.295702 SPD: module part number is MT53D1G64D4NW-046
308 08:43:37.301673 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
309 08:43:37.305536 SPD: device width 16 bits, bus width 16 bits
310 08:43:37.309248 SPD: module size is 2048 MB (per channel)
311 08:43:37.741105 CBMEM:
312 08:43:37.744472 IMD: root @ 0x76fff000 254 entries.
313 08:43:37.747803 IMD: root @ 0x76ffec00 62 entries.
314 08:43:37.751277 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 08:43:37.758124 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 08:43:37.761223 External stage cache:
317 08:43:37.765079 IMD: root @ 0x7b3ff000 254 entries.
318 08:43:37.767833 IMD: root @ 0x7b3fec00 62 entries.
319 08:43:37.782723 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 08:43:37.789365 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 08:43:37.795601 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 08:43:37.809240 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 08:43:37.816072 cse_lite: Skip switching to RW in the recovery path
324 08:43:37.816636 8 DIMMs found
325 08:43:37.817021 SMM Memory Map
326 08:43:37.819341 SMRAM : 0x7b000000 0x800000
327 08:43:37.826251 Subregion 0: 0x7b000000 0x200000
328 08:43:37.829860 Subregion 1: 0x7b200000 0x200000
329 08:43:37.832914 Subregion 2: 0x7b400000 0x400000
330 08:43:37.833486 top_of_ram = 0x77000000
331 08:43:37.839376 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 08:43:37.846327 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 08:43:37.849662 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 08:43:37.856457 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 08:43:37.862699 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 08:43:37.869121 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 08:43:37.879746 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 08:43:37.886298 Processing 211 relocs. Offset value of 0x74c0b000
339 08:43:37.893172 BS: romstage times (exec / console): total (unknown) / 277 ms
340 08:43:37.897807
341 08:43:37.898373
342 08:43:37.908451 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 08:43:37.911672 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 08:43:37.921368 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 08:43:37.927835 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 08:43:37.935145 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 08:43:37.941052 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 08:43:37.985261 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 08:43:37.991592 Processing 5008 relocs. Offset value of 0x75d98000
350 08:43:37.994721 BS: postcar times (exec / console): total (unknown) / 59 ms
351 08:43:37.995197
352 08:43:37.998138
353 08:43:38.008166 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 08:43:38.008744 Normal boot
355 08:43:38.011650 FW_CONFIG value is 0x804c02
356 08:43:38.015067 PCI: 00:07.0 disabled by fw_config
357 08:43:38.018184 PCI: 00:07.1 disabled by fw_config
358 08:43:38.022148 PCI: 00:0d.2 disabled by fw_config
359 08:43:38.024609 PCI: 00:1c.7 disabled by fw_config
360 08:43:38.031701 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 08:43:38.038103 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 08:43:38.041440 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 08:43:38.044913 GENERIC: 0.0 disabled by fw_config
364 08:43:38.051268 GENERIC: 1.0 disabled by fw_config
365 08:43:38.054712 fw_config match found: DB_USB=USB3_ACTIVE
366 08:43:38.057973 fw_config match found: DB_USB=USB3_ACTIVE
367 08:43:38.061059 fw_config match found: DB_USB=USB3_ACTIVE
368 08:43:38.068036 fw_config match found: DB_USB=USB3_ACTIVE
369 08:43:38.071238 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 08:43:38.077470 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 08:43:38.087480 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 08:43:38.094862 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 08:43:38.097973 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 08:43:38.104177 microcode: Update skipped, already up-to-date
375 08:43:38.111564 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 08:43:38.138421 Detected 4 core, 8 thread CPU.
377 08:43:38.141651 Setting up SMI for CPU
378 08:43:38.145446 IED base = 0x7b400000
379 08:43:38.146072 IED size = 0x00400000
380 08:43:38.148216 Will perform SMM setup.
381 08:43:38.154961 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
382 08:43:38.161290 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 08:43:38.168071 Processing 16 relocs. Offset value of 0x00030000
384 08:43:38.171568 Attempting to start 7 APs
385 08:43:38.175491 Waiting for 10ms after sending INIT.
386 08:43:38.190404 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
387 08:43:38.193639 AP: slot 5 apic_id 6.
388 08:43:38.196809 AP: slot 4 apic_id 7.
389 08:43:38.197280 AP: slot 7 apic_id 5.
390 08:43:38.200015 AP: slot 3 apic_id 4.
391 08:43:38.203371 AP: slot 6 apic_id 2.
392 08:43:38.203839 AP: slot 2 apic_id 3.
393 08:43:38.204212 done.
394 08:43:38.210869 Waiting for 2nd SIPI to complete...done.
395 08:43:38.216484 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 08:43:38.223221 Processing 13 relocs. Offset value of 0x00038000
397 08:43:38.226740 Unable to locate Global NVS
398 08:43:38.232780 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 08:43:38.236525 Installing permanent SMM handler to 0x7b000000
400 08:43:38.246562 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 08:43:38.250169 Processing 794 relocs. Offset value of 0x7b010000
402 08:43:38.259480 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 08:43:38.263142 Processing 13 relocs. Offset value of 0x7b008000
404 08:43:38.269665 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 08:43:38.276405 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 08:43:38.279228 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 08:43:38.286206 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 08:43:38.292880 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 08:43:38.299398 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 08:43:38.305702 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 08:43:38.309360 Unable to locate Global NVS
412 08:43:38.316282 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 08:43:38.318869 Clearing SMI status registers
414 08:43:38.322556 SMI_STS: PM1
415 08:43:38.323148 PM1_STS: PWRBTN
416 08:43:38.328864 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 08:43:38.332361 In relocation handler: CPU 0
418 08:43:38.335556 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 08:43:38.342092 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 08:43:38.342696 Relocation complete.
421 08:43:38.352112 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 08:43:38.355865 In relocation handler: CPU 1
423 08:43:38.358757 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 08:43:38.359275 Relocation complete.
425 08:43:38.368591 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
426 08:43:38.369183 In relocation handler: CPU 7
427 08:43:38.375396 New SMBASE=0x7affe400 IEDBASE=0x7b400000
428 08:43:38.375985 Relocation complete.
429 08:43:38.386148 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
430 08:43:38.386678 In relocation handler: CPU 3
431 08:43:38.392035 New SMBASE=0x7afff400 IEDBASE=0x7b400000
432 08:43:38.395463 Writing SMRR. base = 0x7b000006, mask=0xff800c00
433 08:43:38.399060 Relocation complete.
434 08:43:38.405424 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
435 08:43:38.408571 In relocation handler: CPU 6
436 08:43:38.412321 New SMBASE=0x7affe800 IEDBASE=0x7b400000
437 08:43:38.418609 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 08:43:38.419061 Relocation complete.
439 08:43:38.425341 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
440 08:43:38.428778 In relocation handler: CPU 2
441 08:43:38.435018 New SMBASE=0x7afff800 IEDBASE=0x7b400000
442 08:43:38.435472 Relocation complete.
443 08:43:38.442303 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
444 08:43:38.445378 In relocation handler: CPU 4
445 08:43:38.448261 New SMBASE=0x7afff000 IEDBASE=0x7b400000
446 08:43:38.451579 Relocation complete.
447 08:43:38.458736 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
448 08:43:38.461637 In relocation handler: CPU 5
449 08:43:38.465308 New SMBASE=0x7affec00 IEDBASE=0x7b400000
450 08:43:38.471734 Writing SMRR. base = 0x7b000006, mask=0xff800c00
451 08:43:38.475159 Relocation complete.
452 08:43:38.475774 Initializing CPU #0
453 08:43:38.478571 CPU: vendor Intel device 806c1
454 08:43:38.482390 CPU: family 06, model 8c, stepping 01
455 08:43:38.485063 Clearing out pending MCEs
456 08:43:38.488482 Setting up local APIC...
457 08:43:38.491487 apic_id: 0x00 done.
458 08:43:38.494985 Turbo is available but hidden
459 08:43:38.495418 Turbo is available and visible
460 08:43:38.501512 microcode: Update skipped, already up-to-date
461 08:43:38.505560 CPU #0 initialized
462 08:43:38.506028 Initializing CPU #2
463 08:43:38.508517 Initializing CPU #6
464 08:43:38.509002 Initializing CPU #3
465 08:43:38.511865 Initializing CPU #7
466 08:43:38.515136 CPU: vendor Intel device 806c1
467 08:43:38.518799 CPU: family 06, model 8c, stepping 01
468 08:43:38.522029 CPU: vendor Intel device 806c1
469 08:43:38.524796 CPU: family 06, model 8c, stepping 01
470 08:43:38.528246 Clearing out pending MCEs
471 08:43:38.531613 Initializing CPU #5
472 08:43:38.532038 Initializing CPU #4
473 08:43:38.534903 CPU: vendor Intel device 806c1
474 08:43:38.538592 CPU: family 06, model 8c, stepping 01
475 08:43:38.541327 CPU: vendor Intel device 806c1
476 08:43:38.544985 CPU: family 06, model 8c, stepping 01
477 08:43:38.549001 Clearing out pending MCEs
478 08:43:38.551952 Clearing out pending MCEs
479 08:43:38.556206 Setting up local APIC...
480 08:43:38.556630 CPU: vendor Intel device 806c1
481 08:43:38.559042 CPU: family 06, model 8c, stepping 01
482 08:43:38.562425 CPU: vendor Intel device 806c1
483 08:43:38.569916 CPU: family 06, model 8c, stepping 01
484 08:43:38.570341 Clearing out pending MCEs
485 08:43:38.572269 apic_id: 0x07 done.
486 08:43:38.576099 Setting up local APIC...
487 08:43:38.579507 Clearing out pending MCEs
488 08:43:38.579975 Setting up local APIC...
489 08:43:38.582489 apic_id: 0x06 done.
490 08:43:38.587040 microcode: Update skipped, already up-to-date
491 08:43:38.592608 microcode: Update skipped, already up-to-date
492 08:43:38.593076 CPU #4 initialized
493 08:43:38.595853 CPU #5 initialized
494 08:43:38.599266 Setting up local APIC...
495 08:43:38.599707 apic_id: 0x02 done.
496 08:43:38.602409 apic_id: 0x03 done.
497 08:43:38.605647 microcode: Update skipped, already up-to-date
498 08:43:38.612437 microcode: Update skipped, already up-to-date
499 08:43:38.612935 CPU #6 initialized
500 08:43:38.615751 CPU #2 initialized
501 08:43:38.619587 Initializing CPU #1
502 08:43:38.620119 Clearing out pending MCEs
503 08:43:38.622417 Setting up local APIC...
504 08:43:38.625482 CPU: vendor Intel device 806c1
505 08:43:38.629158 CPU: family 06, model 8c, stepping 01
506 08:43:38.632867 Clearing out pending MCEs
507 08:43:38.635704 apic_id: 0x04 done.
508 08:43:38.636243 Setting up local APIC...
509 08:43:38.638915 Setting up local APIC...
510 08:43:38.642208 apic_id: 0x05 done.
511 08:43:38.645546 microcode: Update skipped, already up-to-date
512 08:43:38.652454 microcode: Update skipped, already up-to-date
513 08:43:38.652964 CPU #3 initialized
514 08:43:38.655476 CPU #7 initialized
515 08:43:38.655980 apic_id: 0x01 done.
516 08:43:38.662224 microcode: Update skipped, already up-to-date
517 08:43:38.662760 CPU #1 initialized
518 08:43:38.668882 bsp_do_flight_plan done after 454 msecs.
519 08:43:38.672367 CPU: frequency set to 4400 MHz
520 08:43:38.672951 Enabling SMIs.
521 08:43:38.678773 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 08:43:38.694803 SATAXPCIE1 indicates PCIe NVMe is present
523 08:43:38.697945 Probing TPM: done!
524 08:43:38.701547 Connected to device vid:did:rid of 1ae0:0028:00
525 08:43:38.712020 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
526 08:43:38.715277 Initialized TPM device CR50 revision 0
527 08:43:38.718725 Enabling S0i3.4
528 08:43:38.725239 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 08:43:38.728634 Found a VBT of 8704 bytes after decompression
530 08:43:38.735158 cse_lite: CSE RO boot. HybridStorageMode disabled
531 08:43:38.741968 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 08:43:38.817108 FSPS returned 0
533 08:43:38.820572 Executing Phase 1 of FspMultiPhaseSiInit
534 08:43:38.830444 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 08:43:38.833707 port C0 DISC req: usage 1 usb3 1 usb2 5
536 08:43:38.837222 Raw Buffer output 0 00000511
537 08:43:38.840299 Raw Buffer output 1 00000000
538 08:43:38.843923 pmc_send_ipc_cmd succeeded
539 08:43:38.850787 port C1 DISC req: usage 1 usb3 2 usb2 3
540 08:43:38.851236 Raw Buffer output 0 00000321
541 08:43:38.854102 Raw Buffer output 1 00000000
542 08:43:38.858519 pmc_send_ipc_cmd succeeded
543 08:43:38.863528 Detected 4 core, 8 thread CPU.
544 08:43:38.866790 Detected 4 core, 8 thread CPU.
545 08:43:39.067040 Display FSP Version Info HOB
546 08:43:39.070275 Reference Code - CPU = a.0.4c.31
547 08:43:39.073461 uCode Version = 0.0.0.86
548 08:43:39.077048 TXT ACM version = ff.ff.ff.ffff
549 08:43:39.079974 Reference Code - ME = a.0.4c.31
550 08:43:39.083380 MEBx version = 0.0.0.0
551 08:43:39.086885 ME Firmware Version = Consumer SKU
552 08:43:39.090155 Reference Code - PCH = a.0.4c.31
553 08:43:39.093554 PCH-CRID Status = Disabled
554 08:43:39.096648 PCH-CRID Original Value = ff.ff.ff.ffff
555 08:43:39.099864 PCH-CRID New Value = ff.ff.ff.ffff
556 08:43:39.103560 OPROM - RST - RAID = ff.ff.ff.ffff
557 08:43:39.106412 PCH Hsio Version = 4.0.0.0
558 08:43:39.110083 Reference Code - SA - System Agent = a.0.4c.31
559 08:43:39.113795 Reference Code - MRC = 2.0.0.1
560 08:43:39.116584 SA - PCIe Version = a.0.4c.31
561 08:43:39.119838 SA-CRID Status = Disabled
562 08:43:39.123175 SA-CRID Original Value = 0.0.0.1
563 08:43:39.126775 SA-CRID New Value = 0.0.0.1
564 08:43:39.130975 OPROM - VBIOS = ff.ff.ff.ffff
565 08:43:39.134023 IO Manageability Engine FW Version = 11.1.4.0
566 08:43:39.137754 PHY Build Version = 0.0.0.e0
567 08:43:39.141176 Thunderbolt(TM) FW Version = 0.0.0.0
568 08:43:39.144512 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 08:43:39.147674 ITSS IRQ Polarities Before:
570 08:43:39.151476 IPC0: 0xffffffff
571 08:43:39.151560 IPC1: 0xffffffff
572 08:43:39.154185 IPC2: 0xffffffff
573 08:43:39.154283 IPC3: 0xffffffff
574 08:43:39.157525 ITSS IRQ Polarities After:
575 08:43:39.161149 IPC0: 0xffffffff
576 08:43:39.161246 IPC1: 0xffffffff
577 08:43:39.164381 IPC2: 0xffffffff
578 08:43:39.164476 IPC3: 0xffffffff
579 08:43:39.171207 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 08:43:39.180812 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 08:43:39.193899 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 08:43:39.203808 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 08:43:39.210760 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
584 08:43:39.213896 Enumerating buses...
585 08:43:39.217519 Show all devs... Before device enumeration.
586 08:43:39.220647 Root Device: enabled 1
587 08:43:39.224086 DOMAIN: 0000: enabled 1
588 08:43:39.227201 CPU_CLUSTER: 0: enabled 1
589 08:43:39.227283 PCI: 00:00.0: enabled 1
590 08:43:39.230601 PCI: 00:02.0: enabled 1
591 08:43:39.234048 PCI: 00:04.0: enabled 1
592 08:43:39.237047 PCI: 00:05.0: enabled 1
593 08:43:39.237129 PCI: 00:06.0: enabled 0
594 08:43:39.241012 PCI: 00:07.0: enabled 0
595 08:43:39.243849 PCI: 00:07.1: enabled 0
596 08:43:39.247196 PCI: 00:07.2: enabled 0
597 08:43:39.247279 PCI: 00:07.3: enabled 0
598 08:43:39.250857 PCI: 00:08.0: enabled 1
599 08:43:39.253803 PCI: 00:09.0: enabled 0
600 08:43:39.253879 PCI: 00:0a.0: enabled 0
601 08:43:39.257220 PCI: 00:0d.0: enabled 1
602 08:43:39.260323 PCI: 00:0d.1: enabled 0
603 08:43:39.263832 PCI: 00:0d.2: enabled 0
604 08:43:39.263929 PCI: 00:0d.3: enabled 0
605 08:43:39.267766 PCI: 00:0e.0: enabled 0
606 08:43:39.270242 PCI: 00:10.2: enabled 1
607 08:43:39.273832 PCI: 00:10.6: enabled 0
608 08:43:39.273932 PCI: 00:10.7: enabled 0
609 08:43:39.277400 PCI: 00:12.0: enabled 0
610 08:43:39.280172 PCI: 00:12.6: enabled 0
611 08:43:39.283568 PCI: 00:13.0: enabled 0
612 08:43:39.283672 PCI: 00:14.0: enabled 1
613 08:43:39.286987 PCI: 00:14.1: enabled 0
614 08:43:39.290404 PCI: 00:14.2: enabled 1
615 08:43:39.293409 PCI: 00:14.3: enabled 1
616 08:43:39.293511 PCI: 00:15.0: enabled 1
617 08:43:39.297204 PCI: 00:15.1: enabled 1
618 08:43:39.300051 PCI: 00:15.2: enabled 1
619 08:43:39.300163 PCI: 00:15.3: enabled 1
620 08:43:39.303698 PCI: 00:16.0: enabled 1
621 08:43:39.306865 PCI: 00:16.1: enabled 0
622 08:43:39.310238 PCI: 00:16.2: enabled 0
623 08:43:39.310330 PCI: 00:16.3: enabled 0
624 08:43:39.313584 PCI: 00:16.4: enabled 0
625 08:43:39.316820 PCI: 00:16.5: enabled 0
626 08:43:39.320604 PCI: 00:17.0: enabled 1
627 08:43:39.320681 PCI: 00:19.0: enabled 0
628 08:43:39.323440 PCI: 00:19.1: enabled 1
629 08:43:39.327008 PCI: 00:19.2: enabled 0
630 08:43:39.329902 PCI: 00:1c.0: enabled 1
631 08:43:39.329973 PCI: 00:1c.1: enabled 0
632 08:43:39.333746 PCI: 00:1c.2: enabled 0
633 08:43:39.336770 PCI: 00:1c.3: enabled 0
634 08:43:39.336844 PCI: 00:1c.4: enabled 0
635 08:43:39.340390 PCI: 00:1c.5: enabled 0
636 08:43:39.343442 PCI: 00:1c.6: enabled 1
637 08:43:39.346780 PCI: 00:1c.7: enabled 0
638 08:43:39.346860 PCI: 00:1d.0: enabled 1
639 08:43:39.349915 PCI: 00:1d.1: enabled 0
640 08:43:39.353739 PCI: 00:1d.2: enabled 1
641 08:43:39.356397 PCI: 00:1d.3: enabled 0
642 08:43:39.356509 PCI: 00:1e.0: enabled 1
643 08:43:39.360127 PCI: 00:1e.1: enabled 0
644 08:43:39.363794 PCI: 00:1e.2: enabled 1
645 08:43:39.366644 PCI: 00:1e.3: enabled 1
646 08:43:39.366718 PCI: 00:1f.0: enabled 1
647 08:43:39.370346 PCI: 00:1f.1: enabled 0
648 08:43:39.373064 PCI: 00:1f.2: enabled 1
649 08:43:39.376797 PCI: 00:1f.3: enabled 1
650 08:43:39.376897 PCI: 00:1f.4: enabled 0
651 08:43:39.379757 PCI: 00:1f.5: enabled 1
652 08:43:39.383204 PCI: 00:1f.6: enabled 0
653 08:43:39.383281 PCI: 00:1f.7: enabled 0
654 08:43:39.386328 APIC: 00: enabled 1
655 08:43:39.389857 GENERIC: 0.0: enabled 1
656 08:43:39.393247 GENERIC: 0.0: enabled 1
657 08:43:39.393348 GENERIC: 1.0: enabled 1
658 08:43:39.396525 GENERIC: 0.0: enabled 1
659 08:43:39.400068 GENERIC: 1.0: enabled 1
660 08:43:39.400170 USB0 port 0: enabled 1
661 08:43:39.402972 GENERIC: 0.0: enabled 1
662 08:43:39.406434 USB0 port 0: enabled 1
663 08:43:39.409798 GENERIC: 0.0: enabled 1
664 08:43:39.409869 I2C: 00:1a: enabled 1
665 08:43:39.413393 I2C: 00:31: enabled 1
666 08:43:39.416437 I2C: 00:32: enabled 1
667 08:43:39.416534 I2C: 00:10: enabled 1
668 08:43:39.419586 I2C: 00:15: enabled 1
669 08:43:39.422899 GENERIC: 0.0: enabled 0
670 08:43:39.422981 GENERIC: 1.0: enabled 0
671 08:43:39.426794 GENERIC: 0.0: enabled 1
672 08:43:39.429656 SPI: 00: enabled 1
673 08:43:39.429741 SPI: 00: enabled 1
674 08:43:39.433328 PNP: 0c09.0: enabled 1
675 08:43:39.436309 GENERIC: 0.0: enabled 1
676 08:43:39.439848 USB3 port 0: enabled 1
677 08:43:39.439932 USB3 port 1: enabled 1
678 08:43:39.443294 USB3 port 2: enabled 0
679 08:43:39.446254 USB3 port 3: enabled 0
680 08:43:39.446338 USB2 port 0: enabled 0
681 08:43:39.449981 USB2 port 1: enabled 1
682 08:43:39.453166 USB2 port 2: enabled 1
683 08:43:39.453250 USB2 port 3: enabled 0
684 08:43:39.456203 USB2 port 4: enabled 1
685 08:43:39.460215 USB2 port 5: enabled 0
686 08:43:39.462809 USB2 port 6: enabled 0
687 08:43:39.462893 USB2 port 7: enabled 0
688 08:43:39.466253 USB2 port 8: enabled 0
689 08:43:39.469776 USB2 port 9: enabled 0
690 08:43:39.469866 USB3 port 0: enabled 0
691 08:43:39.472950 USB3 port 1: enabled 1
692 08:43:39.476745 USB3 port 2: enabled 0
693 08:43:39.479388 USB3 port 3: enabled 0
694 08:43:39.479503 GENERIC: 0.0: enabled 1
695 08:43:39.483207 GENERIC: 1.0: enabled 1
696 08:43:39.486147 APIC: 01: enabled 1
697 08:43:39.486257 APIC: 03: enabled 1
698 08:43:39.489592 APIC: 04: enabled 1
699 08:43:39.489707 APIC: 07: enabled 1
700 08:43:39.492912 APIC: 06: enabled 1
701 08:43:39.496212 APIC: 02: enabled 1
702 08:43:39.496335 APIC: 05: enabled 1
703 08:43:39.499414 Compare with tree...
704 08:43:39.502962 Root Device: enabled 1
705 08:43:39.503047 DOMAIN: 0000: enabled 1
706 08:43:39.506067 PCI: 00:00.0: enabled 1
707 08:43:39.509522 PCI: 00:02.0: enabled 1
708 08:43:39.512675 PCI: 00:04.0: enabled 1
709 08:43:39.516262 GENERIC: 0.0: enabled 1
710 08:43:39.516348 PCI: 00:05.0: enabled 1
711 08:43:39.519355 PCI: 00:06.0: enabled 0
712 08:43:39.522540 PCI: 00:07.0: enabled 0
713 08:43:39.526001 GENERIC: 0.0: enabled 1
714 08:43:39.529310 PCI: 00:07.1: enabled 0
715 08:43:39.529394 GENERIC: 1.0: enabled 1
716 08:43:39.532627 PCI: 00:07.2: enabled 0
717 08:43:39.536110 GENERIC: 0.0: enabled 1
718 08:43:39.539426 PCI: 00:07.3: enabled 0
719 08:43:39.542765 GENERIC: 1.0: enabled 1
720 08:43:39.545814 PCI: 00:08.0: enabled 1
721 08:43:39.545898 PCI: 00:09.0: enabled 0
722 08:43:39.550107 PCI: 00:0a.0: enabled 0
723 08:43:39.552902 PCI: 00:0d.0: enabled 1
724 08:43:39.556003 USB0 port 0: enabled 1
725 08:43:39.559430 USB3 port 0: enabled 1
726 08:43:39.559514 USB3 port 1: enabled 1
727 08:43:39.562671 USB3 port 2: enabled 0
728 08:43:39.565987 USB3 port 3: enabled 0
729 08:43:39.569777 PCI: 00:0d.1: enabled 0
730 08:43:39.572628 PCI: 00:0d.2: enabled 0
731 08:43:39.572712 GENERIC: 0.0: enabled 1
732 08:43:39.576006 PCI: 00:0d.3: enabled 0
733 08:43:39.580213 PCI: 00:0e.0: enabled 0
734 08:43:39.582392 PCI: 00:10.2: enabled 1
735 08:43:39.585953 PCI: 00:10.6: enabled 0
736 08:43:39.586036 PCI: 00:10.7: enabled 0
737 08:43:39.589848 PCI: 00:12.0: enabled 0
738 08:43:39.592606 PCI: 00:12.6: enabled 0
739 08:43:39.595829 PCI: 00:13.0: enabled 0
740 08:43:39.599109 PCI: 00:14.0: enabled 1
741 08:43:39.599193 USB0 port 0: enabled 1
742 08:43:39.602799 USB2 port 0: enabled 0
743 08:43:39.605700 USB2 port 1: enabled 1
744 08:43:39.609293 USB2 port 2: enabled 1
745 08:43:39.612389 USB2 port 3: enabled 0
746 08:43:39.612489 USB2 port 4: enabled 1
747 08:43:39.615702 USB2 port 5: enabled 0
748 08:43:39.619105 USB2 port 6: enabled 0
749 08:43:39.622843 USB2 port 7: enabled 0
750 08:43:39.625393 USB2 port 8: enabled 0
751 08:43:39.628982 USB2 port 9: enabled 0
752 08:43:39.629065 USB3 port 0: enabled 0
753 08:43:39.632186 USB3 port 1: enabled 1
754 08:43:39.635661 USB3 port 2: enabled 0
755 08:43:39.638870 USB3 port 3: enabled 0
756 08:43:39.642022 PCI: 00:14.1: enabled 0
757 08:43:39.642105 PCI: 00:14.2: enabled 1
758 08:43:39.645243 PCI: 00:14.3: enabled 1
759 08:43:39.648714 GENERIC: 0.0: enabled 1
760 08:43:39.652689 PCI: 00:15.0: enabled 1
761 08:43:39.655224 I2C: 00:1a: enabled 1
762 08:43:39.655307 I2C: 00:31: enabled 1
763 08:43:39.658767 I2C: 00:32: enabled 1
764 08:43:39.662041 PCI: 00:15.1: enabled 1
765 08:43:39.665545 I2C: 00:10: enabled 1
766 08:43:39.668826 PCI: 00:15.2: enabled 1
767 08:43:39.668910 PCI: 00:15.3: enabled 1
768 08:43:39.671705 PCI: 00:16.0: enabled 1
769 08:43:39.675222 PCI: 00:16.1: enabled 0
770 08:43:39.678754 PCI: 00:16.2: enabled 0
771 08:43:39.682465 PCI: 00:16.3: enabled 0
772 08:43:39.682548 PCI: 00:16.4: enabled 0
773 08:43:39.685140 PCI: 00:16.5: enabled 0
774 08:43:39.688519 PCI: 00:17.0: enabled 1
775 08:43:39.691836 PCI: 00:19.0: enabled 0
776 08:43:39.691920 PCI: 00:19.1: enabled 1
777 08:43:39.695041 I2C: 00:15: enabled 1
778 08:43:39.698553 PCI: 00:19.2: enabled 0
779 08:43:39.701630 PCI: 00:1d.0: enabled 1
780 08:43:39.705164 GENERIC: 0.0: enabled 1
781 08:43:39.705247 PCI: 00:1e.0: enabled 1
782 08:43:39.708552 PCI: 00:1e.1: enabled 0
783 08:43:39.711679 PCI: 00:1e.2: enabled 1
784 08:43:39.715075 SPI: 00: enabled 1
785 08:43:39.718339 PCI: 00:1e.3: enabled 1
786 08:43:39.718423 SPI: 00: enabled 1
787 08:43:39.721733 PCI: 00:1f.0: enabled 1
788 08:43:39.724905 PNP: 0c09.0: enabled 1
789 08:43:39.728148 PCI: 00:1f.1: enabled 0
790 08:43:39.728231 PCI: 00:1f.2: enabled 1
791 08:43:39.732128 GENERIC: 0.0: enabled 1
792 08:43:39.735229 GENERIC: 0.0: enabled 1
793 08:43:39.738375 GENERIC: 1.0: enabled 1
794 08:43:39.741740 PCI: 00:1f.3: enabled 1
795 08:43:39.741824 PCI: 00:1f.4: enabled 0
796 08:43:39.745251 PCI: 00:1f.5: enabled 1
797 08:43:39.796606 PCI: 00:1f.6: enabled 0
798 08:43:39.796742 PCI: 00:1f.7: enabled 0
799 08:43:39.796993 CPU_CLUSTER: 0: enabled 1
800 08:43:39.797060 APIC: 00: enabled 1
801 08:43:39.797121 APIC: 01: enabled 1
802 08:43:39.797179 APIC: 03: enabled 1
803 08:43:39.797236 APIC: 04: enabled 1
804 08:43:39.797293 APIC: 07: enabled 1
805 08:43:39.797360 APIC: 06: enabled 1
806 08:43:39.797418 APIC: 02: enabled 1
807 08:43:39.798054 APIC: 05: enabled 1
808 08:43:39.798137 Root Device scanning...
809 08:43:39.798204 scan_static_bus for Root Device
810 08:43:39.798909 DOMAIN: 0000 enabled
811 08:43:39.798992 CPU_CLUSTER: 0 enabled
812 08:43:39.799502 DOMAIN: 0000 scanning...
813 08:43:39.799584 PCI: pci_scan_bus for bus 00
814 08:43:39.799886 PCI: 00:00.0 [8086/0000] ops
815 08:43:39.799969 PCI: 00:00.0 [8086/9a12] enabled
816 08:43:39.846991 PCI: 00:02.0 [8086/0000] bus ops
817 08:43:39.847078 PCI: 00:02.0 [8086/9a40] enabled
818 08:43:39.847528 PCI: 00:04.0 [8086/0000] bus ops
819 08:43:39.847612 PCI: 00:04.0 [8086/9a03] enabled
820 08:43:39.847942 PCI: 00:05.0 [8086/9a19] enabled
821 08:43:39.848044 PCI: 00:07.0 [0000/0000] hidden
822 08:43:39.848489 PCI: 00:08.0 [8086/9a11] enabled
823 08:43:39.848573 PCI: 00:0a.0 [8086/9a0d] disabled
824 08:43:39.848820 PCI: 00:0d.0 [8086/0000] bus ops
825 08:43:39.848888 PCI: 00:0d.0 [8086/9a13] enabled
826 08:43:39.849292 PCI: 00:14.0 [8086/0000] bus ops
827 08:43:39.849375 PCI: 00:14.0 [8086/a0ed] enabled
828 08:43:39.849441 PCI: 00:14.2 [8086/a0ef] enabled
829 08:43:39.849525 PCI: 00:14.3 [8086/0000] bus ops
830 08:43:39.849787 PCI: 00:14.3 [8086/a0f0] enabled
831 08:43:39.852555 PCI: 00:15.0 [8086/0000] bus ops
832 08:43:39.852638 PCI: 00:15.0 [8086/a0e8] enabled
833 08:43:39.856060 PCI: 00:15.1 [8086/0000] bus ops
834 08:43:39.859264 PCI: 00:15.1 [8086/a0e9] enabled
835 08:43:39.862369 PCI: 00:15.2 [8086/0000] bus ops
836 08:43:39.865598 PCI: 00:15.2 [8086/a0ea] enabled
837 08:43:39.869025 PCI: 00:15.3 [8086/0000] bus ops
838 08:43:39.872333 PCI: 00:15.3 [8086/a0eb] enabled
839 08:43:39.876129 PCI: 00:16.0 [8086/0000] ops
840 08:43:39.878839 PCI: 00:16.0 [8086/a0e0] enabled
841 08:43:39.885578 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 08:43:39.889122 PCI: 00:19.0 [8086/0000] bus ops
843 08:43:39.892282 PCI: 00:19.0 [8086/a0c5] disabled
844 08:43:39.895553 PCI: 00:19.1 [8086/0000] bus ops
845 08:43:39.898880 PCI: 00:19.1 [8086/a0c6] enabled
846 08:43:39.902394 PCI: 00:1d.0 [8086/0000] bus ops
847 08:43:39.905439 PCI: 00:1d.0 [8086/a0b0] enabled
848 08:43:39.905548 PCI: 00:1e.0 [8086/0000] ops
849 08:43:39.908882 PCI: 00:1e.0 [8086/a0a8] enabled
850 08:43:39.915653 PCI: 00:1e.2 [8086/0000] bus ops
851 08:43:39.918778 PCI: 00:1e.2 [8086/a0aa] enabled
852 08:43:39.922333 PCI: 00:1e.3 [8086/0000] bus ops
853 08:43:39.925280 PCI: 00:1e.3 [8086/a0ab] enabled
854 08:43:39.928682 PCI: 00:1f.0 [8086/0000] bus ops
855 08:43:39.931819 PCI: 00:1f.0 [8086/a087] enabled
856 08:43:39.931902 RTC Init
857 08:43:39.935547 Set power on after power failure.
858 08:43:39.938699 Disabling Deep S3
859 08:43:39.938782 Disabling Deep S3
860 08:43:39.942189 Disabling Deep S4
861 08:43:39.942271 Disabling Deep S4
862 08:43:39.945165 Disabling Deep S5
863 08:43:39.945247 Disabling Deep S5
864 08:43:39.948647 PCI: 00:1f.2 [0000/0000] hidden
865 08:43:39.951998 PCI: 00:1f.3 [8086/0000] bus ops
866 08:43:39.955021 PCI: 00:1f.3 [8086/a0c8] enabled
867 08:43:39.958364 PCI: 00:1f.5 [8086/0000] bus ops
868 08:43:39.961749 PCI: 00:1f.5 [8086/a0a4] enabled
869 08:43:39.965154 PCI: Leftover static devices:
870 08:43:39.968184 PCI: 00:10.2
871 08:43:39.968266 PCI: 00:10.6
872 08:43:39.971654 PCI: 00:10.7
873 08:43:39.971736 PCI: 00:06.0
874 08:43:39.971801 PCI: 00:07.1
875 08:43:39.974920 PCI: 00:07.2
876 08:43:39.975003 PCI: 00:07.3
877 08:43:39.978450 PCI: 00:09.0
878 08:43:39.978532 PCI: 00:0d.1
879 08:43:39.978596 PCI: 00:0d.2
880 08:43:39.981452 PCI: 00:0d.3
881 08:43:39.981584 PCI: 00:0e.0
882 08:43:39.984852 PCI: 00:12.0
883 08:43:39.984934 PCI: 00:12.6
884 08:43:39.988254 PCI: 00:13.0
885 08:43:39.988337 PCI: 00:14.1
886 08:43:39.988403 PCI: 00:16.1
887 08:43:39.991335 PCI: 00:16.2
888 08:43:39.991417 PCI: 00:16.3
889 08:43:39.995330 PCI: 00:16.4
890 08:43:39.995413 PCI: 00:16.5
891 08:43:39.995478 PCI: 00:17.0
892 08:43:39.998214 PCI: 00:19.2
893 08:43:39.998299 PCI: 00:1e.1
894 08:43:40.001525 PCI: 00:1f.1
895 08:43:40.001657 PCI: 00:1f.4
896 08:43:40.001723 PCI: 00:1f.6
897 08:43:40.005030 PCI: 00:1f.7
898 08:43:40.008007 PCI: Check your devicetree.cb.
899 08:43:40.011822 PCI: 00:02.0 scanning...
900 08:43:40.015060 scan_generic_bus for PCI: 00:02.0
901 08:43:40.017981 scan_generic_bus for PCI: 00:02.0 done
902 08:43:40.021285 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 08:43:40.024615 PCI: 00:04.0 scanning...
904 08:43:40.028422 scan_generic_bus for PCI: 00:04.0
905 08:43:40.031627 GENERIC: 0.0 enabled
906 08:43:40.038015 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 08:43:40.041194 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 08:43:40.044635 PCI: 00:0d.0 scanning...
909 08:43:40.048007 scan_static_bus for PCI: 00:0d.0
910 08:43:40.051375 USB0 port 0 enabled
911 08:43:40.051457 USB0 port 0 scanning...
912 08:43:40.054913 scan_static_bus for USB0 port 0
913 08:43:40.058583 USB3 port 0 enabled
914 08:43:40.061455 USB3 port 1 enabled
915 08:43:40.061539 USB3 port 2 disabled
916 08:43:40.064440 USB3 port 3 disabled
917 08:43:40.067697 USB3 port 0 scanning...
918 08:43:40.071148 scan_static_bus for USB3 port 0
919 08:43:40.074230 scan_static_bus for USB3 port 0 done
920 08:43:40.078128 scan_bus: bus USB3 port 0 finished in 6 msecs
921 08:43:40.081413 USB3 port 1 scanning...
922 08:43:40.084653 scan_static_bus for USB3 port 1
923 08:43:40.087871 scan_static_bus for USB3 port 1 done
924 08:43:40.091851 scan_bus: bus USB3 port 1 finished in 6 msecs
925 08:43:40.097859 scan_static_bus for USB0 port 0 done
926 08:43:40.100955 scan_bus: bus USB0 port 0 finished in 43 msecs
927 08:43:40.104600 scan_static_bus for PCI: 00:0d.0 done
928 08:43:40.110856 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 08:43:40.110941 PCI: 00:14.0 scanning...
930 08:43:40.114270 scan_static_bus for PCI: 00:14.0
931 08:43:40.118094 USB0 port 0 enabled
932 08:43:40.120862 USB0 port 0 scanning...
933 08:43:40.124160 scan_static_bus for USB0 port 0
934 08:43:40.124241 USB2 port 0 disabled
935 08:43:40.127816 USB2 port 1 enabled
936 08:43:40.130765 USB2 port 2 enabled
937 08:43:40.130847 USB2 port 3 disabled
938 08:43:40.134398 USB2 port 4 enabled
939 08:43:40.138060 USB2 port 5 disabled
940 08:43:40.138141 USB2 port 6 disabled
941 08:43:40.141336 USB2 port 7 disabled
942 08:43:40.141417 USB2 port 8 disabled
943 08:43:40.144091 USB2 port 9 disabled
944 08:43:40.147781 USB3 port 0 disabled
945 08:43:40.147863 USB3 port 1 enabled
946 08:43:40.150663 USB3 port 2 disabled
947 08:43:40.154018 USB3 port 3 disabled
948 08:43:40.154098 USB2 port 1 scanning...
949 08:43:40.157453 scan_static_bus for USB2 port 1
950 08:43:40.164071 scan_static_bus for USB2 port 1 done
951 08:43:40.167413 scan_bus: bus USB2 port 1 finished in 6 msecs
952 08:43:40.170848 USB2 port 2 scanning...
953 08:43:40.174354 scan_static_bus for USB2 port 2
954 08:43:40.177481 scan_static_bus for USB2 port 2 done
955 08:43:40.180721 scan_bus: bus USB2 port 2 finished in 6 msecs
956 08:43:40.184545 USB2 port 4 scanning...
957 08:43:40.187383 scan_static_bus for USB2 port 4
958 08:43:40.190771 scan_static_bus for USB2 port 4 done
959 08:43:40.193992 scan_bus: bus USB2 port 4 finished in 6 msecs
960 08:43:40.197297 USB3 port 1 scanning...
961 08:43:40.200751 scan_static_bus for USB3 port 1
962 08:43:40.203983 scan_static_bus for USB3 port 1 done
963 08:43:40.210961 scan_bus: bus USB3 port 1 finished in 6 msecs
964 08:43:40.214206 scan_static_bus for USB0 port 0 done
965 08:43:40.217348 scan_bus: bus USB0 port 0 finished in 93 msecs
966 08:43:40.220472 scan_static_bus for PCI: 00:14.0 done
967 08:43:40.227249 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
968 08:43:40.230724 PCI: 00:14.3 scanning...
969 08:43:40.234036 scan_static_bus for PCI: 00:14.3
970 08:43:40.234119 GENERIC: 0.0 enabled
971 08:43:40.241088 scan_static_bus for PCI: 00:14.3 done
972 08:43:40.244560 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 08:43:40.247405 PCI: 00:15.0 scanning...
974 08:43:40.250418 scan_static_bus for PCI: 00:15.0
975 08:43:40.250500 I2C: 00:1a enabled
976 08:43:40.254109 I2C: 00:31 enabled
977 08:43:40.258054 I2C: 00:32 enabled
978 08:43:40.260369 scan_static_bus for PCI: 00:15.0 done
979 08:43:40.264013 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 08:43:40.267251 PCI: 00:15.1 scanning...
981 08:43:40.270505 scan_static_bus for PCI: 00:15.1
982 08:43:40.273864 I2C: 00:10 enabled
983 08:43:40.277147 scan_static_bus for PCI: 00:15.1 done
984 08:43:40.280668 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 08:43:40.284102 PCI: 00:15.2 scanning...
986 08:43:40.287058 scan_static_bus for PCI: 00:15.2
987 08:43:40.290517 scan_static_bus for PCI: 00:15.2 done
988 08:43:40.296957 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 08:43:40.297039 PCI: 00:15.3 scanning...
990 08:43:40.300459 scan_static_bus for PCI: 00:15.3
991 08:43:40.307161 scan_static_bus for PCI: 00:15.3 done
992 08:43:40.310085 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 08:43:40.313291 PCI: 00:19.1 scanning...
994 08:43:40.316665 scan_static_bus for PCI: 00:19.1
995 08:43:40.316764 I2C: 00:15 enabled
996 08:43:40.323525 scan_static_bus for PCI: 00:19.1 done
997 08:43:40.327408 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 08:43:40.330277 PCI: 00:1d.0 scanning...
999 08:43:40.333203 do_pci_scan_bridge for PCI: 00:1d.0
1000 08:43:40.336710 PCI: pci_scan_bus for bus 01
1001 08:43:40.340051 PCI: 01:00.0 [15b7/5009] enabled
1002 08:43:40.340134 GENERIC: 0.0 enabled
1003 08:43:40.347091 Enabling Common Clock Configuration
1004 08:43:40.349865 L1 Sub-State supported from root port 29
1005 08:43:40.353299 L1 Sub-State Support = 0x5
1006 08:43:40.356999 CommonModeRestoreTime = 0x28
1007 08:43:40.360146 Power On Value = 0x16, Power On Scale = 0x0
1008 08:43:40.360229 ASPM: Enabled L1
1009 08:43:40.366647 PCIe: Max_Payload_Size adjusted to 128
1010 08:43:40.370048 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 08:43:40.374012 PCI: 00:1e.2 scanning...
1012 08:43:40.376744 scan_generic_bus for PCI: 00:1e.2
1013 08:43:40.376827 SPI: 00 enabled
1014 08:43:40.383593 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 08:43:40.389793 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 08:43:40.389872 PCI: 00:1e.3 scanning...
1017 08:43:40.393370 scan_generic_bus for PCI: 00:1e.3
1018 08:43:40.396673 SPI: 00 enabled
1019 08:43:40.403583 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 08:43:40.406750 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 08:43:40.409910 PCI: 00:1f.0 scanning...
1022 08:43:40.413377 scan_static_bus for PCI: 00:1f.0
1023 08:43:40.416798 PNP: 0c09.0 enabled
1024 08:43:40.416880 PNP: 0c09.0 scanning...
1025 08:43:40.419869 scan_static_bus for PNP: 0c09.0
1026 08:43:40.426585 scan_static_bus for PNP: 0c09.0 done
1027 08:43:40.429661 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 08:43:40.433539 scan_static_bus for PCI: 00:1f.0 done
1029 08:43:40.439915 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 08:43:40.439998 PCI: 00:1f.2 scanning...
1031 08:43:40.443109 scan_static_bus for PCI: 00:1f.2
1032 08:43:40.446347 GENERIC: 0.0 enabled
1033 08:43:40.449891 GENERIC: 0.0 scanning...
1034 08:43:40.453306 scan_static_bus for GENERIC: 0.0
1035 08:43:40.456153 GENERIC: 0.0 enabled
1036 08:43:40.456235 GENERIC: 1.0 enabled
1037 08:43:40.459616 scan_static_bus for GENERIC: 0.0 done
1038 08:43:40.466372 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 08:43:40.469339 scan_static_bus for PCI: 00:1f.2 done
1040 08:43:40.472712 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 08:43:40.476235 PCI: 00:1f.3 scanning...
1042 08:43:40.479220 scan_static_bus for PCI: 00:1f.3
1043 08:43:40.483574 scan_static_bus for PCI: 00:1f.3 done
1044 08:43:40.489538 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 08:43:40.493018 PCI: 00:1f.5 scanning...
1046 08:43:40.495905 scan_generic_bus for PCI: 00:1f.5
1047 08:43:40.499436 scan_generic_bus for PCI: 00:1f.5 done
1048 08:43:40.502446 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 08:43:40.509418 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1050 08:43:40.512941 scan_static_bus for Root Device done
1051 08:43:40.515846 scan_bus: bus Root Device finished in 736 msecs
1052 08:43:40.519124 done
1053 08:43:40.522847 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1054 08:43:40.526627 Chrome EC: UHEPI supported
1055 08:43:40.532634 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 08:43:40.539119 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 08:43:40.542424 SPI flash protection: WPSW=0 SRP0=0
1058 08:43:40.549103 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 08:43:40.552383 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 08:43:40.555933 found VGA at PCI: 00:02.0
1061 08:43:40.559589 Setting up VGA for PCI: 00:02.0
1062 08:43:40.565964 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 08:43:40.569083 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 08:43:40.573126 Allocating resources...
1065 08:43:40.575852 Reading resources...
1066 08:43:40.579172 Root Device read_resources bus 0 link: 0
1067 08:43:40.582417 DOMAIN: 0000 read_resources bus 0 link: 0
1068 08:43:40.588856 PCI: 00:04.0 read_resources bus 1 link: 0
1069 08:43:40.592989 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 08:43:40.599085 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 08:43:40.602432 USB0 port 0 read_resources bus 0 link: 0
1072 08:43:40.609488 USB0 port 0 read_resources bus 0 link: 0 done
1073 08:43:40.612092 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 08:43:40.615496 PCI: 00:14.0 read_resources bus 0 link: 0
1075 08:43:40.622325 USB0 port 0 read_resources bus 0 link: 0
1076 08:43:40.625525 USB0 port 0 read_resources bus 0 link: 0 done
1077 08:43:40.632320 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 08:43:40.635945 PCI: 00:14.3 read_resources bus 0 link: 0
1079 08:43:40.642155 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 08:43:40.645213 PCI: 00:15.0 read_resources bus 0 link: 0
1081 08:43:40.652457 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 08:43:40.656354 PCI: 00:15.1 read_resources bus 0 link: 0
1083 08:43:40.662264 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 08:43:40.665469 PCI: 00:19.1 read_resources bus 0 link: 0
1085 08:43:40.672399 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 08:43:40.676267 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 08:43:40.683324 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 08:43:40.686502 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 08:43:40.692630 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 08:43:40.695888 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 08:43:40.702380 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 08:43:40.705748 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 08:43:40.712511 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 08:43:40.715423 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 08:43:40.719062 GENERIC: 0.0 read_resources bus 0 link: 0
1096 08:43:40.726005 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 08:43:40.729396 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 08:43:40.736528 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 08:43:40.739919 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 08:43:40.746899 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 08:43:40.749664 Root Device read_resources bus 0 link: 0 done
1102 08:43:40.753007 Done reading resources.
1103 08:43:40.759916 Show resources in subtree (Root Device)...After reading.
1104 08:43:40.762956 Root Device child on link 0 DOMAIN: 0000
1105 08:43:40.766189 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 08:43:40.776597 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 08:43:40.786537 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 08:43:40.789638 PCI: 00:00.0
1109 08:43:40.796832 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 08:43:40.806056 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 08:43:40.816378 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 08:43:40.826116 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 08:43:40.836241 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 08:43:40.845840 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 08:43:40.852821 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 08:43:40.862724 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 08:43:40.872226 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 08:43:40.882788 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 08:43:40.892453 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 08:43:40.902153 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 08:43:40.908871 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 08:43:40.919037 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 08:43:40.929108 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 08:43:40.938781 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 08:43:40.948958 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 08:43:40.958608 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 08:43:40.965618 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 08:43:40.975402 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 08:43:40.978856 PCI: 00:02.0
1130 08:43:40.988547 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 08:43:40.998587 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 08:43:41.009002 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 08:43:41.011766 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 08:43:41.021809 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 08:43:41.024893 GENERIC: 0.0
1136 08:43:41.024977 PCI: 00:05.0
1137 08:43:41.035161 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 08:43:41.038179 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 08:43:41.041536 GENERIC: 0.0
1140 08:43:41.045414 PCI: 00:08.0
1141 08:43:41.055403 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 08:43:41.055485 PCI: 00:0a.0
1143 08:43:41.058281 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 08:43:41.068225 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 08:43:41.075010 USB0 port 0 child on link 0 USB3 port 0
1146 08:43:41.075091 USB3 port 0
1147 08:43:41.078246 USB3 port 1
1148 08:43:41.078326 USB3 port 2
1149 08:43:41.081514 USB3 port 3
1150 08:43:41.084685 PCI: 00:14.0 child on link 0 USB0 port 0
1151 08:43:41.095010 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 08:43:41.098215 USB0 port 0 child on link 0 USB2 port 0
1153 08:43:41.101244 USB2 port 0
1154 08:43:41.104550 USB2 port 1
1155 08:43:41.104631 USB2 port 2
1156 08:43:41.107960 USB2 port 3
1157 08:43:41.108041 USB2 port 4
1158 08:43:41.111089 USB2 port 5
1159 08:43:41.111169 USB2 port 6
1160 08:43:41.114496 USB2 port 7
1161 08:43:41.114577 USB2 port 8
1162 08:43:41.118079 USB2 port 9
1163 08:43:41.118159 USB3 port 0
1164 08:43:41.121424 USB3 port 1
1165 08:43:41.121504 USB3 port 2
1166 08:43:41.125145 USB3 port 3
1167 08:43:41.125225 PCI: 00:14.2
1168 08:43:41.134852 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 08:43:41.144524 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 08:43:41.151416 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 08:43:41.161181 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 08:43:41.161262 GENERIC: 0.0
1173 08:43:41.168068 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 08:43:41.178040 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 08:43:41.178122 I2C: 00:1a
1176 08:43:41.178185 I2C: 00:31
1177 08:43:41.181441 I2C: 00:32
1178 08:43:41.184706 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 08:43:41.194283 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 08:43:41.197787 I2C: 00:10
1181 08:43:41.197873 PCI: 00:15.2
1182 08:43:41.207920 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 08:43:41.211286 PCI: 00:15.3
1184 08:43:41.221539 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 08:43:41.221659 PCI: 00:16.0
1186 08:43:41.231050 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 08:43:41.234389 PCI: 00:19.0
1188 08:43:41.237934 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 08:43:41.247544 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 08:43:41.247625 I2C: 00:15
1191 08:43:41.254065 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 08:43:41.260691 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 08:43:41.270897 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 08:43:41.281228 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 08:43:41.284292 GENERIC: 0.0
1196 08:43:41.284402 PCI: 01:00.0
1197 08:43:41.294046 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 08:43:41.304151 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1199 08:43:41.308003 PCI: 00:1e.0
1200 08:43:41.317498 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1201 08:43:41.320842 PCI: 00:1e.2 child on link 0 SPI: 00
1202 08:43:41.330940 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 08:43:41.334025 SPI: 00
1204 08:43:41.337380 PCI: 00:1e.3 child on link 0 SPI: 00
1205 08:43:41.347111 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 08:43:41.347231 SPI: 00
1207 08:43:41.353715 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1208 08:43:41.360330 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1209 08:43:41.363722 PNP: 0c09.0
1210 08:43:41.370667 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1211 08:43:41.376759 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1212 08:43:41.387002 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1213 08:43:41.393479 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1214 08:43:41.400046 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1215 08:43:41.400152 GENERIC: 0.0
1216 08:43:41.403190 GENERIC: 1.0
1217 08:43:41.403292 PCI: 00:1f.3
1218 08:43:41.413192 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 08:43:41.423537 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 08:43:41.426285 PCI: 00:1f.5
1221 08:43:41.436434 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1222 08:43:41.439414 CPU_CLUSTER: 0 child on link 0 APIC: 00
1223 08:43:41.439491 APIC: 00
1224 08:43:41.442862 APIC: 01
1225 08:43:41.442937 APIC: 03
1226 08:43:41.446800 APIC: 04
1227 08:43:41.446899 APIC: 07
1228 08:43:41.446980 APIC: 06
1229 08:43:41.449741 APIC: 02
1230 08:43:41.449831 APIC: 05
1231 08:43:41.456246 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1232 08:43:41.463696 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1233 08:43:41.470010 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1234 08:43:41.476320 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1235 08:43:41.479428 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1236 08:43:41.483480 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1237 08:43:41.489674 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1238 08:43:41.499379 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1239 08:43:41.506223 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1240 08:43:41.512784 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1241 08:43:41.519245 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1242 08:43:41.525943 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1243 08:43:41.536650 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1244 08:43:41.542643 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1245 08:43:41.546289 DOMAIN: 0000: Resource ranges:
1246 08:43:41.549801 * Base: 1000, Size: 800, Tag: 100
1247 08:43:41.552746 * Base: 1900, Size: e700, Tag: 100
1248 08:43:41.559507 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1249 08:43:41.565665 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1250 08:43:41.572185 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1251 08:43:41.579051 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1252 08:43:41.585660 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1253 08:43:41.595708 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1254 08:43:41.602069 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1255 08:43:41.609162 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1256 08:43:41.619044 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1257 08:43:41.625757 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1258 08:43:41.632410 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1259 08:43:41.642236 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1260 08:43:41.648961 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1261 08:43:41.655377 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1262 08:43:41.665316 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1263 08:43:41.671844 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1264 08:43:41.678682 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1265 08:43:41.688401 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1266 08:43:41.695129 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1267 08:43:41.702121 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1268 08:43:41.711405 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1269 08:43:41.718814 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1270 08:43:41.725253 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1271 08:43:41.734780 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1272 08:43:41.741365 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1273 08:43:41.744809 DOMAIN: 0000: Resource ranges:
1274 08:43:41.748303 * Base: 7fc00000, Size: 40400000, Tag: 200
1275 08:43:41.751338 * Base: d0000000, Size: 28000000, Tag: 200
1276 08:43:41.758003 * Base: fa000000, Size: 1000000, Tag: 200
1277 08:43:41.761296 * Base: fb001000, Size: 2fff000, Tag: 200
1278 08:43:41.764661 * Base: fe010000, Size: 2e000, Tag: 200
1279 08:43:41.771410 * Base: fe03f000, Size: d41000, Tag: 200
1280 08:43:41.774656 * Base: fed88000, Size: 8000, Tag: 200
1281 08:43:41.778151 * Base: fed93000, Size: d000, Tag: 200
1282 08:43:41.781333 * Base: feda2000, Size: 1e000, Tag: 200
1283 08:43:41.784586 * Base: fede0000, Size: 1220000, Tag: 200
1284 08:43:41.791135 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1285 08:43:41.797947 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1286 08:43:41.804454 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1287 08:43:41.811052 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1288 08:43:41.817480 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1289 08:43:41.824908 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1290 08:43:41.831145 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1291 08:43:41.837778 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1292 08:43:41.844164 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1293 08:43:41.850873 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1294 08:43:41.857846 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1295 08:43:41.864582 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1296 08:43:41.870890 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1297 08:43:41.877850 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1298 08:43:41.884171 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1299 08:43:41.890689 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1300 08:43:41.897709 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1301 08:43:41.904275 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1302 08:43:41.910627 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1303 08:43:41.917445 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1304 08:43:41.923793 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1305 08:43:41.930378 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1306 08:43:41.937229 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1307 08:43:41.943807 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1308 08:43:41.954332 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1309 08:43:41.957099 PCI: 00:1d.0: Resource ranges:
1310 08:43:41.960519 * Base: 7fc00000, Size: 100000, Tag: 200
1311 08:43:41.967091 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1312 08:43:41.973768 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1313 08:43:41.980476 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1314 08:43:41.990173 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1315 08:43:41.993457 Root Device assign_resources, bus 0 link: 0
1316 08:43:41.996679 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 08:43:42.006717 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1318 08:43:42.013443 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1319 08:43:42.023823 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1320 08:43:42.030569 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1321 08:43:42.036740 PCI: 00:04.0 assign_resources, bus 1 link: 0
1322 08:43:42.040061 PCI: 00:04.0 assign_resources, bus 1 link: 0
1323 08:43:42.046705 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1324 08:43:42.057176 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1325 08:43:42.063424 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1326 08:43:42.070346 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1327 08:43:42.073744 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1328 08:43:42.083360 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1329 08:43:42.086738 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 08:43:42.089999 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 08:43:42.099900 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1332 08:43:42.107059 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1333 08:43:42.116792 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1334 08:43:42.120215 PCI: 00:14.3 assign_resources, bus 0 link: 0
1335 08:43:42.126721 PCI: 00:14.3 assign_resources, bus 0 link: 0
1336 08:43:42.133027 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1337 08:43:42.136930 PCI: 00:15.0 assign_resources, bus 0 link: 0
1338 08:43:42.143088 PCI: 00:15.0 assign_resources, bus 0 link: 0
1339 08:43:42.149534 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1340 08:43:42.156710 PCI: 00:15.1 assign_resources, bus 0 link: 0
1341 08:43:42.159469 PCI: 00:15.1 assign_resources, bus 0 link: 0
1342 08:43:42.169555 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1343 08:43:42.176706 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1344 08:43:42.185992 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1345 08:43:42.192983 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1346 08:43:42.196190 PCI: 00:19.1 assign_resources, bus 0 link: 0
1347 08:43:42.202719 PCI: 00:19.1 assign_resources, bus 0 link: 0
1348 08:43:42.209827 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1349 08:43:42.219261 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1350 08:43:42.229525 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1351 08:43:42.232618 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1352 08:43:42.242749 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1353 08:43:42.249184 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1354 08:43:42.255790 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 08:43:42.262346 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1356 08:43:42.269226 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1357 08:43:42.272093 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1358 08:43:42.278851 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1359 08:43:42.285959 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1360 08:43:42.289088 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1361 08:43:42.295561 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1362 08:43:42.298787 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1363 08:43:42.305230 LPC: Trying to open IO window from 800 size 1ff
1364 08:43:42.312390 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1365 08:43:42.321708 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1366 08:43:42.328230 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1367 08:43:42.331826 DOMAIN: 0000 assign_resources, bus 0 link: 0
1368 08:43:42.338953 Root Device assign_resources, bus 0 link: 0
1369 08:43:42.341916 Done setting resources.
1370 08:43:42.348325 Show resources in subtree (Root Device)...After assigning values.
1371 08:43:42.352556 Root Device child on link 0 DOMAIN: 0000
1372 08:43:42.355355 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1373 08:43:42.364886 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1374 08:43:42.375297 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1375 08:43:42.375380 PCI: 00:00.0
1376 08:43:42.384845 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1377 08:43:42.394831 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1378 08:43:42.405235 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1379 08:43:42.414895 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1380 08:43:42.425239 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1381 08:43:42.431510 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1382 08:43:42.441322 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1383 08:43:42.451722 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1384 08:43:42.461173 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1385 08:43:42.471419 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1386 08:43:42.481113 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1387 08:43:42.487752 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1388 08:43:42.497487 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1389 08:43:42.507943 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1390 08:43:42.517490 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1391 08:43:42.528032 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1392 08:43:42.537230 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1393 08:43:42.544281 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1394 08:43:42.553874 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1395 08:43:42.563956 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1396 08:43:42.567583 PCI: 00:02.0
1397 08:43:42.576969 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1398 08:43:42.587303 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1399 08:43:42.597140 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1400 08:43:42.600441 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1401 08:43:42.610397 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1402 08:43:42.613533 GENERIC: 0.0
1403 08:43:42.613640 PCI: 00:05.0
1404 08:43:42.627163 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1405 08:43:42.630111 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1406 08:43:42.633592 GENERIC: 0.0
1407 08:43:42.633688 PCI: 00:08.0
1408 08:43:42.643598 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1409 08:43:42.646818 PCI: 00:0a.0
1410 08:43:42.650516 PCI: 00:0d.0 child on link 0 USB0 port 0
1411 08:43:42.659949 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1412 08:43:42.663638 USB0 port 0 child on link 0 USB3 port 0
1413 08:43:42.667121 USB3 port 0
1414 08:43:42.667202 USB3 port 1
1415 08:43:42.670216 USB3 port 2
1416 08:43:42.673452 USB3 port 3
1417 08:43:42.677098 PCI: 00:14.0 child on link 0 USB0 port 0
1418 08:43:42.686568 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1419 08:43:42.690473 USB0 port 0 child on link 0 USB2 port 0
1420 08:43:42.693066 USB2 port 0
1421 08:43:42.693171 USB2 port 1
1422 08:43:42.696691 USB2 port 2
1423 08:43:42.696792 USB2 port 3
1424 08:43:42.699892 USB2 port 4
1425 08:43:42.703211 USB2 port 5
1426 08:43:42.703289 USB2 port 6
1427 08:43:42.706912 USB2 port 7
1428 08:43:42.707007 USB2 port 8
1429 08:43:42.710369 USB2 port 9
1430 08:43:42.710442 USB3 port 0
1431 08:43:42.713316 USB3 port 1
1432 08:43:42.713415 USB3 port 2
1433 08:43:42.717256 USB3 port 3
1434 08:43:42.717333 PCI: 00:14.2
1435 08:43:42.726734 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1436 08:43:42.736677 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1437 08:43:42.743276 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1438 08:43:42.753261 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1439 08:43:42.753365 GENERIC: 0.0
1440 08:43:42.759820 PCI: 00:15.0 child on link 0 I2C: 00:1a
1441 08:43:42.769830 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1442 08:43:42.769912 I2C: 00:1a
1443 08:43:42.773239 I2C: 00:31
1444 08:43:42.773320 I2C: 00:32
1445 08:43:42.779873 PCI: 00:15.1 child on link 0 I2C: 00:10
1446 08:43:42.789653 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1447 08:43:42.789740 I2C: 00:10
1448 08:43:42.792817 PCI: 00:15.2
1449 08:43:42.802773 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1450 08:43:42.802860 PCI: 00:15.3
1451 08:43:42.812677 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1452 08:43:42.815954 PCI: 00:16.0
1453 08:43:42.826354 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1454 08:43:42.829496 PCI: 00:19.0
1455 08:43:42.833203 PCI: 00:19.1 child on link 0 I2C: 00:15
1456 08:43:42.842650 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1457 08:43:42.842736 I2C: 00:15
1458 08:43:42.849340 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1459 08:43:42.859352 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1460 08:43:42.869257 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1461 08:43:42.879944 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1462 08:43:42.882669 GENERIC: 0.0
1463 08:43:42.882745 PCI: 01:00.0
1464 08:43:42.892651 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1465 08:43:42.905792 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1466 08:43:42.905879 PCI: 00:1e.0
1467 08:43:42.915834 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1468 08:43:42.922537 PCI: 00:1e.2 child on link 0 SPI: 00
1469 08:43:42.932147 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1470 08:43:42.932230 SPI: 00
1471 08:43:42.935516 PCI: 00:1e.3 child on link 0 SPI: 00
1472 08:43:42.946356 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1473 08:43:42.948893 SPI: 00
1474 08:43:42.952029 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1475 08:43:42.962120 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1476 08:43:42.962229 PNP: 0c09.0
1477 08:43:42.972128 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1478 08:43:42.975606 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1479 08:43:42.985241 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1480 08:43:42.995232 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1481 08:43:42.998568 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1482 08:43:43.002291 GENERIC: 0.0
1483 08:43:43.002393 GENERIC: 1.0
1484 08:43:43.005060 PCI: 00:1f.3
1485 08:43:43.015096 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1486 08:43:43.024998 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1487 08:43:43.028501 PCI: 00:1f.5
1488 08:43:43.038268 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1489 08:43:43.041539 CPU_CLUSTER: 0 child on link 0 APIC: 00
1490 08:43:43.041645 APIC: 00
1491 08:43:43.044878 APIC: 01
1492 08:43:43.044986 APIC: 03
1493 08:43:43.048680 APIC: 04
1494 08:43:43.048761 APIC: 07
1495 08:43:43.048826 APIC: 06
1496 08:43:43.051614 APIC: 02
1497 08:43:43.051718 APIC: 05
1498 08:43:43.055499 Done allocating resources.
1499 08:43:43.062124 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1500 08:43:43.068091 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1501 08:43:43.071441 Configure GPIOs for I2S audio on UP4.
1502 08:43:43.078405 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1503 08:43:43.081729 Enabling resources...
1504 08:43:43.084776 PCI: 00:00.0 subsystem <- 8086/9a12
1505 08:43:43.084858 PCI: 00:00.0 cmd <- 06
1506 08:43:43.091358 PCI: 00:02.0 subsystem <- 8086/9a40
1507 08:43:43.091440 PCI: 00:02.0 cmd <- 03
1508 08:43:43.095000 PCI: 00:04.0 subsystem <- 8086/9a03
1509 08:43:43.098011 PCI: 00:04.0 cmd <- 02
1510 08:43:43.101453 PCI: 00:05.0 subsystem <- 8086/9a19
1511 08:43:43.104990 PCI: 00:05.0 cmd <- 02
1512 08:43:43.108102 PCI: 00:08.0 subsystem <- 8086/9a11
1513 08:43:43.111348 PCI: 00:08.0 cmd <- 06
1514 08:43:43.114697 PCI: 00:0d.0 subsystem <- 8086/9a13
1515 08:43:43.118508 PCI: 00:0d.0 cmd <- 02
1516 08:43:43.121497 PCI: 00:14.0 subsystem <- 8086/a0ed
1517 08:43:43.125075 PCI: 00:14.0 cmd <- 02
1518 08:43:43.127924 PCI: 00:14.2 subsystem <- 8086/a0ef
1519 08:43:43.128007 PCI: 00:14.2 cmd <- 02
1520 08:43:43.134802 PCI: 00:14.3 subsystem <- 8086/a0f0
1521 08:43:43.134893 PCI: 00:14.3 cmd <- 02
1522 08:43:43.137948 PCI: 00:15.0 subsystem <- 8086/a0e8
1523 08:43:43.141477 PCI: 00:15.0 cmd <- 02
1524 08:43:43.145053 PCI: 00:15.1 subsystem <- 8086/a0e9
1525 08:43:43.147936 PCI: 00:15.1 cmd <- 02
1526 08:43:43.151375 PCI: 00:15.2 subsystem <- 8086/a0ea
1527 08:43:43.155512 PCI: 00:15.2 cmd <- 02
1528 08:43:43.158013 PCI: 00:15.3 subsystem <- 8086/a0eb
1529 08:43:43.161348 PCI: 00:15.3 cmd <- 02
1530 08:43:43.164514 PCI: 00:16.0 subsystem <- 8086/a0e0
1531 08:43:43.168001 PCI: 00:16.0 cmd <- 02
1532 08:43:43.171242 PCI: 00:19.1 subsystem <- 8086/a0c6
1533 08:43:43.174578 PCI: 00:19.1 cmd <- 02
1534 08:43:43.177679 PCI: 00:1d.0 bridge ctrl <- 0013
1535 08:43:43.181195 PCI: 00:1d.0 subsystem <- 8086/a0b0
1536 08:43:43.181277 PCI: 00:1d.0 cmd <- 06
1537 08:43:43.188060 PCI: 00:1e.0 subsystem <- 8086/a0a8
1538 08:43:43.188143 PCI: 00:1e.0 cmd <- 06
1539 08:43:43.191262 PCI: 00:1e.2 subsystem <- 8086/a0aa
1540 08:43:43.194335 PCI: 00:1e.2 cmd <- 06
1541 08:43:43.197523 PCI: 00:1e.3 subsystem <- 8086/a0ab
1542 08:43:43.201056 PCI: 00:1e.3 cmd <- 02
1543 08:43:43.204508 PCI: 00:1f.0 subsystem <- 8086/a087
1544 08:43:43.207559 PCI: 00:1f.0 cmd <- 407
1545 08:43:43.211055 PCI: 00:1f.3 subsystem <- 8086/a0c8
1546 08:43:43.214482 PCI: 00:1f.3 cmd <- 02
1547 08:43:43.217497 PCI: 00:1f.5 subsystem <- 8086/a0a4
1548 08:43:43.220888 PCI: 00:1f.5 cmd <- 406
1549 08:43:43.223971 PCI: 01:00.0 cmd <- 02
1550 08:43:43.229216 done.
1551 08:43:43.232075 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1552 08:43:43.235604 Initializing devices...
1553 08:43:43.238980 Root Device init
1554 08:43:43.242114 Chrome EC: Set SMI mask to 0x0000000000000000
1555 08:43:43.248300 Chrome EC: clear events_b mask to 0x0000000000000000
1556 08:43:43.255009 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1557 08:43:43.261695 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1558 08:43:43.265024 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1559 08:43:43.272868 Chrome EC: Set WAKE mask to 0x0000000000000000
1560 08:43:43.278469 fw_config match found: DB_USB=USB3_ACTIVE
1561 08:43:43.282308 Configure Right Type-C port orientation for retimer
1562 08:43:43.285553 Root Device init finished in 44 msecs
1563 08:43:43.288672 PCI: 00:00.0 init
1564 08:43:43.292177 CPU TDP = 9 Watts
1565 08:43:43.292286 CPU PL1 = 9 Watts
1566 08:43:43.295593 CPU PL2 = 40 Watts
1567 08:43:43.298803 CPU PL4 = 83 Watts
1568 08:43:43.302142 PCI: 00:00.0 init finished in 8 msecs
1569 08:43:43.302227 PCI: 00:02.0 init
1570 08:43:43.305261 GMA: Found VBT in CBFS
1571 08:43:43.308654 GMA: Found valid VBT in CBFS
1572 08:43:43.315262 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1573 08:43:43.322238 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1574 08:43:43.326204 PCI: 00:02.0 init finished in 18 msecs
1575 08:43:43.328865 PCI: 00:05.0 init
1576 08:43:43.332143 PCI: 00:05.0 init finished in 0 msecs
1577 08:43:43.335370 PCI: 00:08.0 init
1578 08:43:43.338531 PCI: 00:08.0 init finished in 0 msecs
1579 08:43:43.341905 PCI: 00:14.0 init
1580 08:43:43.345287 PCI: 00:14.0 init finished in 0 msecs
1581 08:43:43.349124 PCI: 00:14.2 init
1582 08:43:43.352019 PCI: 00:14.2 init finished in 0 msecs
1583 08:43:43.355049 PCI: 00:15.0 init
1584 08:43:43.355157 I2C bus 0 version 0x3230302a
1585 08:43:43.361927 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1586 08:43:43.365403 PCI: 00:15.0 init finished in 6 msecs
1587 08:43:43.365516 PCI: 00:15.1 init
1588 08:43:43.368308 I2C bus 1 version 0x3230302a
1589 08:43:43.372159 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1590 08:43:43.378534 PCI: 00:15.1 init finished in 6 msecs
1591 08:43:43.378615 PCI: 00:15.2 init
1592 08:43:43.381598 I2C bus 2 version 0x3230302a
1593 08:43:43.384939 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1594 08:43:43.388185 PCI: 00:15.2 init finished in 6 msecs
1595 08:43:43.391525 PCI: 00:15.3 init
1596 08:43:43.395129 I2C bus 3 version 0x3230302a
1597 08:43:43.398523 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1598 08:43:43.401562 PCI: 00:15.3 init finished in 6 msecs
1599 08:43:43.405290 PCI: 00:16.0 init
1600 08:43:43.408337 PCI: 00:16.0 init finished in 0 msecs
1601 08:43:43.411441 PCI: 00:19.1 init
1602 08:43:43.415026 I2C bus 5 version 0x3230302a
1603 08:43:43.418234 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1604 08:43:43.421321 PCI: 00:19.1 init finished in 6 msecs
1605 08:43:43.421400 PCI: 00:1d.0 init
1606 08:43:43.425122 Initializing PCH PCIe bridge.
1607 08:43:43.431415 PCI: 00:1d.0 init finished in 3 msecs
1608 08:43:43.431491 PCI: 00:1f.0 init
1609 08:43:43.438076 IOAPIC: Initializing IOAPIC at 0xfec00000
1610 08:43:43.441276 IOAPIC: Bootstrap Processor Local APIC = 0x00
1611 08:43:43.444856 IOAPIC: ID = 0x02
1612 08:43:43.444935 IOAPIC: Dumping registers
1613 08:43:43.447980 reg 0x0000: 0x02000000
1614 08:43:43.451338 reg 0x0001: 0x00770020
1615 08:43:43.454592 reg 0x0002: 0x00000000
1616 08:43:43.457929 PCI: 00:1f.0 init finished in 21 msecs
1617 08:43:43.461055 PCI: 00:1f.2 init
1618 08:43:43.461130 Disabling ACPI via APMC.
1619 08:43:43.467461 APMC done.
1620 08:43:43.470794 PCI: 00:1f.2 init finished in 6 msecs
1621 08:43:43.482312 PCI: 01:00.0 init
1622 08:43:43.486368 PCI: 01:00.0 init finished in 0 msecs
1623 08:43:43.488829 PNP: 0c09.0 init
1624 08:43:43.493037 Google Chrome EC uptime: 8.295 seconds
1625 08:43:43.499180 Google Chrome AP resets since EC boot: 1
1626 08:43:43.502155 Google Chrome most recent AP reset causes:
1627 08:43:43.505906 0.455: 32775 shutdown: entering G3
1628 08:43:43.512569 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1629 08:43:43.515754 PNP: 0c09.0 init finished in 22 msecs
1630 08:43:43.521158 Devices initialized
1631 08:43:43.524573 Show all devs... After init.
1632 08:43:43.528232 Root Device: enabled 1
1633 08:43:43.528314 DOMAIN: 0000: enabled 1
1634 08:43:43.531094 CPU_CLUSTER: 0: enabled 1
1635 08:43:43.534572 PCI: 00:00.0: enabled 1
1636 08:43:43.538046 PCI: 00:02.0: enabled 1
1637 08:43:43.538122 PCI: 00:04.0: enabled 1
1638 08:43:43.541431 PCI: 00:05.0: enabled 1
1639 08:43:43.544541 PCI: 00:06.0: enabled 0
1640 08:43:43.547590 PCI: 00:07.0: enabled 0
1641 08:43:43.547665 PCI: 00:07.1: enabled 0
1642 08:43:43.551028 PCI: 00:07.2: enabled 0
1643 08:43:43.554391 PCI: 00:07.3: enabled 0
1644 08:43:43.557695 PCI: 00:08.0: enabled 1
1645 08:43:43.557778 PCI: 00:09.0: enabled 0
1646 08:43:43.560966 PCI: 00:0a.0: enabled 0
1647 08:43:43.564409 PCI: 00:0d.0: enabled 1
1648 08:43:43.567951 PCI: 00:0d.1: enabled 0
1649 08:43:43.568027 PCI: 00:0d.2: enabled 0
1650 08:43:43.571010 PCI: 00:0d.3: enabled 0
1651 08:43:43.574478 PCI: 00:0e.0: enabled 0
1652 08:43:43.574560 PCI: 00:10.2: enabled 1
1653 08:43:43.578203 PCI: 00:10.6: enabled 0
1654 08:43:43.581353 PCI: 00:10.7: enabled 0
1655 08:43:43.584630 PCI: 00:12.0: enabled 0
1656 08:43:43.584709 PCI: 00:12.6: enabled 0
1657 08:43:43.587775 PCI: 00:13.0: enabled 0
1658 08:43:43.591378 PCI: 00:14.0: enabled 1
1659 08:43:43.594709 PCI: 00:14.1: enabled 0
1660 08:43:43.594791 PCI: 00:14.2: enabled 1
1661 08:43:43.597392 PCI: 00:14.3: enabled 1
1662 08:43:43.600605 PCI: 00:15.0: enabled 1
1663 08:43:43.604165 PCI: 00:15.1: enabled 1
1664 08:43:43.604248 PCI: 00:15.2: enabled 1
1665 08:43:43.608030 PCI: 00:15.3: enabled 1
1666 08:43:43.610612 PCI: 00:16.0: enabled 1
1667 08:43:43.610688 PCI: 00:16.1: enabled 0
1668 08:43:43.614447 PCI: 00:16.2: enabled 0
1669 08:43:43.617823 PCI: 00:16.3: enabled 0
1670 08:43:43.620664 PCI: 00:16.4: enabled 0
1671 08:43:43.620733 PCI: 00:16.5: enabled 0
1672 08:43:43.624005 PCI: 00:17.0: enabled 0
1673 08:43:43.627301 PCI: 00:19.0: enabled 0
1674 08:43:43.630844 PCI: 00:19.1: enabled 1
1675 08:43:43.630926 PCI: 00:19.2: enabled 0
1676 08:43:43.633988 PCI: 00:1c.0: enabled 1
1677 08:43:43.637362 PCI: 00:1c.1: enabled 0
1678 08:43:43.640759 PCI: 00:1c.2: enabled 0
1679 08:43:43.640845 PCI: 00:1c.3: enabled 0
1680 08:43:43.643852 PCI: 00:1c.4: enabled 0
1681 08:43:43.647495 PCI: 00:1c.5: enabled 0
1682 08:43:43.650708 PCI: 00:1c.6: enabled 1
1683 08:43:43.650816 PCI: 00:1c.7: enabled 0
1684 08:43:43.653871 PCI: 00:1d.0: enabled 1
1685 08:43:43.657319 PCI: 00:1d.1: enabled 0
1686 08:43:43.657401 PCI: 00:1d.2: enabled 1
1687 08:43:43.660703 PCI: 00:1d.3: enabled 0
1688 08:43:43.664365 PCI: 00:1e.0: enabled 1
1689 08:43:43.667254 PCI: 00:1e.1: enabled 0
1690 08:43:43.667361 PCI: 00:1e.2: enabled 1
1691 08:43:43.670435 PCI: 00:1e.3: enabled 1
1692 08:43:43.673958 PCI: 00:1f.0: enabled 1
1693 08:43:43.677170 PCI: 00:1f.1: enabled 0
1694 08:43:43.677280 PCI: 00:1f.2: enabled 1
1695 08:43:43.681201 PCI: 00:1f.3: enabled 1
1696 08:43:43.683718 PCI: 00:1f.4: enabled 0
1697 08:43:43.687341 PCI: 00:1f.5: enabled 1
1698 08:43:43.687423 PCI: 00:1f.6: enabled 0
1699 08:43:43.690607 PCI: 00:1f.7: enabled 0
1700 08:43:43.694218 APIC: 00: enabled 1
1701 08:43:43.694301 GENERIC: 0.0: enabled 1
1702 08:43:43.697064 GENERIC: 0.0: enabled 1
1703 08:43:43.700508 GENERIC: 1.0: enabled 1
1704 08:43:43.704194 GENERIC: 0.0: enabled 1
1705 08:43:43.704278 GENERIC: 1.0: enabled 1
1706 08:43:43.707336 USB0 port 0: enabled 1
1707 08:43:43.710655 GENERIC: 0.0: enabled 1
1708 08:43:43.710737 USB0 port 0: enabled 1
1709 08:43:43.713900 GENERIC: 0.0: enabled 1
1710 08:43:43.716954 I2C: 00:1a: enabled 1
1711 08:43:43.720492 I2C: 00:31: enabled 1
1712 08:43:43.720561 I2C: 00:32: enabled 1
1713 08:43:43.723803 I2C: 00:10: enabled 1
1714 08:43:43.726901 I2C: 00:15: enabled 1
1715 08:43:43.726979 GENERIC: 0.0: enabled 0
1716 08:43:43.731421 GENERIC: 1.0: enabled 0
1717 08:43:43.733746 GENERIC: 0.0: enabled 1
1718 08:43:43.733824 SPI: 00: enabled 1
1719 08:43:43.737929 SPI: 00: enabled 1
1720 08:43:43.740633 PNP: 0c09.0: enabled 1
1721 08:43:43.740705 GENERIC: 0.0: enabled 1
1722 08:43:43.744442 USB3 port 0: enabled 1
1723 08:43:43.747212 USB3 port 1: enabled 1
1724 08:43:43.747288 USB3 port 2: enabled 0
1725 08:43:43.750445 USB3 port 3: enabled 0
1726 08:43:43.753774 USB2 port 0: enabled 0
1727 08:43:43.757471 USB2 port 1: enabled 1
1728 08:43:43.757550 USB2 port 2: enabled 1
1729 08:43:43.760489 USB2 port 3: enabled 0
1730 08:43:43.763678 USB2 port 4: enabled 1
1731 08:43:43.763754 USB2 port 5: enabled 0
1732 08:43:43.766794 USB2 port 6: enabled 0
1733 08:43:43.769954 USB2 port 7: enabled 0
1734 08:43:43.773379 USB2 port 8: enabled 0
1735 08:43:43.773484 USB2 port 9: enabled 0
1736 08:43:43.777328 USB3 port 0: enabled 0
1737 08:43:43.779969 USB3 port 1: enabled 1
1738 08:43:43.780047 USB3 port 2: enabled 0
1739 08:43:43.783394 USB3 port 3: enabled 0
1740 08:43:43.786951 GENERIC: 0.0: enabled 1
1741 08:43:43.790273 GENERIC: 1.0: enabled 1
1742 08:43:43.790378 APIC: 01: enabled 1
1743 08:43:43.793808 APIC: 03: enabled 1
1744 08:43:43.793890 APIC: 04: enabled 1
1745 08:43:43.796824 APIC: 07: enabled 1
1746 08:43:43.800222 APIC: 06: enabled 1
1747 08:43:43.800296 APIC: 02: enabled 1
1748 08:43:43.803406 APIC: 05: enabled 1
1749 08:43:43.806644 PCI: 01:00.0: enabled 1
1750 08:43:43.810031 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1751 08:43:43.817076 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1752 08:43:43.820025 ELOG: NV offset 0xf30000 size 0x1000
1753 08:43:43.826630 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1754 08:43:43.833287 ELOG: Event(17) added with size 13 at 2023-08-07 08:43:43 UTC
1755 08:43:43.840236 ELOG: Event(92) added with size 9 at 2023-08-07 08:43:43 UTC
1756 08:43:43.846608 ELOG: Event(93) added with size 9 at 2023-08-07 08:43:43 UTC
1757 08:43:43.852951 ELOG: Event(9E) added with size 10 at 2023-08-07 08:43:43 UTC
1758 08:43:43.859839 ELOG: Event(9F) added with size 14 at 2023-08-07 08:43:43 UTC
1759 08:43:43.866890 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1760 08:43:43.869561 ELOG: Event(A1) added with size 10 at 2023-08-07 08:43:43 UTC
1761 08:43:43.876419 ELOG: Event(16) added with size 11 at 2023-08-07 08:43:43 UTC
1762 08:43:43.879611 Erasing flash addr f30000 + 4 KiB
1763 08:43:43.942926 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1764 08:43:43.949863 ELOG: Event(A0) added with size 9 at 2023-08-07 08:43:43 UTC
1765 08:43:43.953325 elog_add_boot_reason: Logged dev mode boot
1766 08:43:43.959674 BS: BS_POST_DEVICE entry times (exec / console): 39 / 34 ms
1767 08:43:43.959751 Finalize devices...
1768 08:43:43.963037 Devices finalized
1769 08:43:43.970047 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1770 08:43:43.973227 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1771 08:43:43.979281 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1772 08:43:43.983103 ME: HFSTS1 : 0x80030055
1773 08:43:43.989474 ME: HFSTS2 : 0x30280116
1774 08:43:43.992691 ME: HFSTS3 : 0x00000050
1775 08:43:43.996754 ME: HFSTS4 : 0x00004000
1776 08:43:44.002636 ME: HFSTS5 : 0x00000000
1777 08:43:44.006098 ME: HFSTS6 : 0x40400006
1778 08:43:44.009450 ME: Manufacturing Mode : YES
1779 08:43:44.012777 ME: SPI Protection Mode Enabled : NO
1780 08:43:44.016295 ME: FW Partition Table : OK
1781 08:43:44.022797 ME: Bringup Loader Failure : NO
1782 08:43:44.025811 ME: Firmware Init Complete : NO
1783 08:43:44.029230 ME: Boot Options Present : NO
1784 08:43:44.032783 ME: Update In Progress : NO
1785 08:43:44.035829 ME: D0i3 Support : YES
1786 08:43:44.039649 ME: Low Power State Enabled : NO
1787 08:43:44.042662 ME: CPU Replaced : YES
1788 08:43:44.049194 ME: CPU Replacement Valid : YES
1789 08:43:44.052979 ME: Current Working State : 5
1790 08:43:44.055714 ME: Current Operation State : 1
1791 08:43:44.059210 ME: Current Operation Mode : 3
1792 08:43:44.062500 ME: Error Code : 0
1793 08:43:44.065935 ME: Enhanced Debug Mode : NO
1794 08:43:44.068930 ME: CPU Debug Disabled : YES
1795 08:43:44.072578 ME: TXT Support : NO
1796 08:43:44.079020 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1797 08:43:44.086004 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1798 08:43:44.089487 CBFS: 'fallback/slic' not found.
1799 08:43:44.095748 ACPI: Writing ACPI tables at 76b01000.
1800 08:43:44.095852 ACPI: * FACS
1801 08:43:44.098899 ACPI: * DSDT
1802 08:43:44.102402 Ramoops buffer: 0x100000@0x76a00000.
1803 08:43:44.105662 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1804 08:43:44.112220 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1805 08:43:44.115815 Google Chrome EC: version:
1806 08:43:44.118892 ro: voema_v2.0.10114-a447f03e46
1807 08:43:44.122447 rw: voema_v2.0.10114-a447f03e46
1808 08:43:44.122518 running image: 2
1809 08:43:44.128847 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1810 08:43:44.133058 ACPI: * FADT
1811 08:43:44.133138 SCI is IRQ9
1812 08:43:44.139885 ACPI: added table 1/32, length now 40
1813 08:43:44.139965 ACPI: * SSDT
1814 08:43:44.143166 Found 1 CPU(s) with 8 core(s) each.
1815 08:43:44.150039 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1816 08:43:44.153225 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1817 08:43:44.156427 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1818 08:43:44.159984 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1819 08:43:44.166319 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1820 08:43:44.172903 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1821 08:43:44.176107 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1822 08:43:44.182748 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1823 08:43:44.189938 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1824 08:43:44.193114 \_SB.PCI0.RP09: Added StorageD3Enable property
1825 08:43:44.196197 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1826 08:43:44.202545 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1827 08:43:44.209191 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1828 08:43:44.212643 PS2K: Passing 80 keymaps to kernel
1829 08:43:44.219073 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1830 08:43:44.225774 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1831 08:43:44.232427 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1832 08:43:44.239110 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1833 08:43:44.245965 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1834 08:43:44.252366 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1835 08:43:44.258978 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1836 08:43:44.266307 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1837 08:43:44.269070 ACPI: added table 2/32, length now 44
1838 08:43:44.272419 ACPI: * MCFG
1839 08:43:44.275764 ACPI: added table 3/32, length now 48
1840 08:43:44.275847 ACPI: * TPM2
1841 08:43:44.278783 TPM2 log created at 0x769f0000
1842 08:43:44.282629 ACPI: added table 4/32, length now 52
1843 08:43:44.285660 ACPI: * MADT
1844 08:43:44.285732 SCI is IRQ9
1845 08:43:44.289292 ACPI: added table 5/32, length now 56
1846 08:43:44.292170 current = 76b09850
1847 08:43:44.292278 ACPI: * DMAR
1848 08:43:44.299195 ACPI: added table 6/32, length now 60
1849 08:43:44.302268 ACPI: added table 7/32, length now 64
1850 08:43:44.302345 ACPI: * HPET
1851 08:43:44.305409 ACPI: added table 8/32, length now 68
1852 08:43:44.308828 ACPI: done.
1853 08:43:44.308902 ACPI tables: 35216 bytes.
1854 08:43:44.311900 smbios_write_tables: 769ef000
1855 08:43:44.315319 EC returned error result code 3
1856 08:43:44.319162 Couldn't obtain OEM name from CBI
1857 08:43:44.323401 Create SMBIOS type 16
1858 08:43:44.326469 Create SMBIOS type 17
1859 08:43:44.329560 GENERIC: 0.0 (WIFI Device)
1860 08:43:44.333236 SMBIOS tables: 1734 bytes.
1861 08:43:44.336547 Writing table forward entry at 0x00000500
1862 08:43:44.343506 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1863 08:43:44.346615 Writing coreboot table at 0x76b25000
1864 08:43:44.353288 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1865 08:43:44.356285 1. 0000000000001000-000000000009ffff: RAM
1866 08:43:44.359775 2. 00000000000a0000-00000000000fffff: RESERVED
1867 08:43:44.366980 3. 0000000000100000-00000000769eefff: RAM
1868 08:43:44.369697 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1869 08:43:44.376516 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1870 08:43:44.383358 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1871 08:43:44.386233 7. 0000000077000000-000000007fbfffff: RESERVED
1872 08:43:44.392837 8. 00000000c0000000-00000000cfffffff: RESERVED
1873 08:43:44.396229 9. 00000000f8000000-00000000f9ffffff: RESERVED
1874 08:43:44.399298 10. 00000000fb000000-00000000fb000fff: RESERVED
1875 08:43:44.405922 11. 00000000fe000000-00000000fe00ffff: RESERVED
1876 08:43:44.409564 12. 00000000fed80000-00000000fed87fff: RESERVED
1877 08:43:44.416240 13. 00000000fed90000-00000000fed92fff: RESERVED
1878 08:43:44.419347 14. 00000000feda0000-00000000feda1fff: RESERVED
1879 08:43:44.426281 15. 00000000fedc0000-00000000feddffff: RESERVED
1880 08:43:44.429459 16. 0000000100000000-00000004803fffff: RAM
1881 08:43:44.433023 Passing 4 GPIOs to payload:
1882 08:43:44.436085 NAME | PORT | POLARITY | VALUE
1883 08:43:44.442580 lid | undefined | high | high
1884 08:43:44.449457 power | undefined | high | low
1885 08:43:44.453016 oprom | undefined | high | low
1886 08:43:44.459400 EC in RW | 0x000000e5 | high | high
1887 08:43:44.465819 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1888 08:43:44.465892 coreboot table: 1576 bytes.
1889 08:43:44.472593 IMD ROOT 0. 0x76fff000 0x00001000
1890 08:43:44.475533 IMD SMALL 1. 0x76ffe000 0x00001000
1891 08:43:44.479230 FSP MEMORY 2. 0x76c4e000 0x003b0000
1892 08:43:44.482380 VPD 3. 0x76c4d000 0x00000367
1893 08:43:44.486046 RO MCACHE 4. 0x76c4c000 0x00000fdc
1894 08:43:44.489220 CONSOLE 5. 0x76c2c000 0x00020000
1895 08:43:44.492577 FMAP 6. 0x76c2b000 0x00000578
1896 08:43:44.495601 TIME STAMP 7. 0x76c2a000 0x00000910
1897 08:43:44.502637 VBOOT WORK 8. 0x76c16000 0x00014000
1898 08:43:44.505708 ROMSTG STCK 9. 0x76c15000 0x00001000
1899 08:43:44.508962 AFTER CAR 10. 0x76c0a000 0x0000b000
1900 08:43:44.512727 RAMSTAGE 11. 0x76b97000 0x00073000
1901 08:43:44.515992 REFCODE 12. 0x76b42000 0x00055000
1902 08:43:44.519201 SMM BACKUP 13. 0x76b32000 0x00010000
1903 08:43:44.522571 4f444749 14. 0x76b30000 0x00002000
1904 08:43:44.525901 EXT VBT15. 0x76b2d000 0x0000219f
1905 08:43:44.529241 COREBOOT 16. 0x76b25000 0x00008000
1906 08:43:44.532534 ACPI 17. 0x76b01000 0x00024000
1907 08:43:44.539256 ACPI GNVS 18. 0x76b00000 0x00001000
1908 08:43:44.542885 RAMOOPS 19. 0x76a00000 0x00100000
1909 08:43:44.545765 TPM2 TCGLOG20. 0x769f0000 0x00010000
1910 08:43:44.549332 SMBIOS 21. 0x769ef000 0x00000800
1911 08:43:44.552149 IMD small region:
1912 08:43:44.555863 IMD ROOT 0. 0x76ffec00 0x00000400
1913 08:43:44.559127 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1914 08:43:44.562346 POWER STATE 2. 0x76ffeb80 0x00000044
1915 08:43:44.565324 ROMSTAGE 3. 0x76ffeb60 0x00000004
1916 08:43:44.569403 MEM INFO 4. 0x76ffe980 0x000001e0
1917 08:43:44.575559 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1918 08:43:44.578891 MTRR: Physical address space:
1919 08:43:44.585518 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1920 08:43:44.592078 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1921 08:43:44.598836 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1922 08:43:44.605358 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1923 08:43:44.611928 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1924 08:43:44.615272 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1925 08:43:44.622551 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1926 08:43:44.628601 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 08:43:44.632208 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 08:43:44.635363 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 08:43:44.638571 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 08:43:44.641972 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 08:43:44.648976 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 08:43:44.652293 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 08:43:44.655566 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 08:43:44.658711 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 08:43:44.665376 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 08:43:44.668257 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 08:43:44.671705 call enable_fixed_mtrr()
1938 08:43:44.676027 CPU physical address size: 39 bits
1939 08:43:44.682182 MTRR: default type WB/UC MTRR counts: 6/7.
1940 08:43:44.685067 MTRR: WB selected as default type.
1941 08:43:44.692454 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1942 08:43:44.694772 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1943 08:43:44.701871 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1944 08:43:44.708375 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1945 08:43:44.714900 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1946 08:43:44.721790 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1947 08:43:44.725127
1948 08:43:44.725235 MTRR check
1949 08:43:44.728496 Fixed MTRRs : Enabled
1950 08:43:44.728591 Variable MTRRs: Enabled
1951 08:43:44.728656
1952 08:43:44.735161 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 08:43:44.738328 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 08:43:44.741510 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 08:43:44.744994 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 08:43:44.751894 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 08:43:44.754921 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 08:43:44.758588 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 08:43:44.761833 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 08:43:44.768022 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 08:43:44.771527 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 08:43:44.775009 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 08:43:44.781948 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1964 08:43:44.785158 call enable_fixed_mtrr()
1965 08:43:44.789166 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 08:43:44.792082 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 08:43:44.798778 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 08:43:44.801813 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 08:43:44.805076 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 08:43:44.808875 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 08:43:44.815130 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 08:43:44.818342 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 08:43:44.821961 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 08:43:44.825456 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 08:43:44.831508 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 08:43:44.834796 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 08:43:44.841836 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 08:43:44.841917 call enable_fixed_mtrr()
1979 08:43:44.848309 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 08:43:44.851601 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 08:43:44.854758 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 08:43:44.858166 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 08:43:44.865711 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 08:43:44.868627 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 08:43:44.871751 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 08:43:44.874753 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 08:43:44.878801 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 08:43:44.883114 CPU physical address size: 39 bits
1989 08:43:44.889958 call enable_fixed_mtrr()
1990 08:43:44.893070 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 08:43:44.896991 MTRR: Fixed MSR 0x250 0x0606060606060606
1992 08:43:44.899686 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 08:43:44.906554 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 08:43:44.909817 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 08:43:44.912974 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 08:43:44.916254 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 08:43:44.923294 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 08:43:44.926334 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 08:43:44.929980 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 08:43:44.932990 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 08:43:44.939581 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 08:43:44.943431 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 08:43:44.949625 MTRR: Fixed MSR 0x259 0x0000000000000000
2004 08:43:44.952821 MTRR: Fixed MSR 0x268 0x0606060606060606
2005 08:43:44.956625 MTRR: Fixed MSR 0x269 0x0606060606060606
2006 08:43:44.959539 MTRR: Fixed MSR 0x26a 0x0606060606060606
2007 08:43:44.966415 MTRR: Fixed MSR 0x26b 0x0606060606060606
2008 08:43:44.969460 MTRR: Fixed MSR 0x26c 0x0606060606060606
2009 08:43:44.973030 MTRR: Fixed MSR 0x26d 0x0606060606060606
2010 08:43:44.976182 MTRR: Fixed MSR 0x26e 0x0606060606060606
2011 08:43:44.979757 MTRR: Fixed MSR 0x26f 0x0606060606060606
2012 08:43:44.985938 call enable_fixed_mtrr()
2013 08:43:44.989462 call enable_fixed_mtrr()
2014 08:43:44.992543 CPU physical address size: 39 bits
2015 08:43:44.997111 Checking cr50 for pending updates
2016 08:43:45.000698 CPU physical address size: 39 bits
2017 08:43:45.003571 CPU physical address size: 39 bits
2018 08:43:45.011343 CPU physical address size: 39 bits
2019 08:43:45.011432 Reading cr50 TPM mode
2020 08:43:45.014942 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 08:43:45.018708 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 08:43:45.024797 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 08:43:45.028349 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 08:43:45.031680 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 08:43:45.034959 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 08:43:45.038121 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 08:43:45.045115 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 08:43:45.048436 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 08:43:45.051637 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 08:43:45.054892 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 08:43:45.061300 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 08:43:45.064646 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 08:43:45.068445 call enable_fixed_mtrr()
2034 08:43:45.071549 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 08:43:45.078314 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 08:43:45.081533 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 08:43:45.084906 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 08:43:45.088452 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 08:43:45.094441 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 08:43:45.097940 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 08:43:45.101031 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 08:43:45.104707 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 08:43:45.109522 CPU physical address size: 39 bits
2044 08:43:45.116128 call enable_fixed_mtrr()
2045 08:43:45.122724 BS: BS_PAYLOAD_LOAD entry times (exec / console): 226 / 7 ms
2046 08:43:45.126152 CPU physical address size: 39 bits
2047 08:43:45.132858 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2048 08:43:45.135879 Checking segment from ROM address 0xffc02b38
2049 08:43:45.142712 Checking segment from ROM address 0xffc02b54
2050 08:43:45.146324 Loading segment from ROM address 0xffc02b38
2051 08:43:45.149268 code (compression=0)
2052 08:43:45.156403 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2053 08:43:45.166183 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2054 08:43:45.166261 it's not compressed!
2055 08:43:45.308872 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2056 08:43:45.315316 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2057 08:43:45.322260 Loading segment from ROM address 0xffc02b54
2058 08:43:45.325916 Entry Point 0x30000000
2059 08:43:45.326378 Loaded segments
2060 08:43:45.332194 BS: BS_PAYLOAD_LOAD run times (exec / console): 141 / 63 ms
2061 08:43:45.377524 Finalizing chipset.
2062 08:43:45.380767 Finalizing SMM.
2063 08:43:45.381182 APMC done.
2064 08:43:45.387009 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2065 08:43:45.390343 mp_park_aps done after 0 msecs.
2066 08:43:45.393633 Jumping to boot code at 0x30000000(0x76b25000)
2067 08:43:45.403453 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2068 08:43:45.403959
2069 08:43:45.404301
2070 08:43:45.406866
2071 08:43:45.407300 Starting depthcharge on Voema...
2072 08:43:45.408899 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2073 08:43:45.409505 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2074 08:43:45.410025 Setting prompt string to ['volteer:']
2075 08:43:45.410519 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2076 08:43:45.411534
2077 08:43:45.416895 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2078 08:43:45.417478
2079 08:43:45.423599 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2080 08:43:45.424181
2081 08:43:45.430468 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2082 08:43:45.431083
2083 08:43:45.433545 Failed to find eMMC card reader
2084 08:43:45.434085
2085 08:43:45.434459 Wipe memory regions:
2086 08:43:45.436728
2087 08:43:45.440117 [0x00000000001000, 0x000000000a0000)
2088 08:43:45.440699
2089 08:43:45.443250 [0x00000000100000, 0x00000030000000)
2090 08:43:45.477472
2091 08:43:45.480606 [0x00000032662db0, 0x000000769ef000)
2092 08:43:45.528422
2093 08:43:45.531838 [0x00000100000000, 0x00000480400000)
2094 08:43:46.148392
2095 08:43:46.151757 ec_init: CrosEC protocol v3 supported (256, 256)
2096 08:43:46.582753
2097 08:43:46.583283 R8152: Initializing
2098 08:43:46.583649
2099 08:43:46.586107 Version 6 (ocp_data = 5c30)
2100 08:43:46.586662
2101 08:43:46.589392 R8152: Done initializing
2102 08:43:46.589906
2103 08:43:46.592883 Adding net device
2104 08:43:46.895310
2105 08:43:46.898790 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2106 08:43:46.899255
2107 08:43:46.899621
2108 08:43:46.899958
2109 08:43:46.902201 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2111 08:43:47.003714 volteer: tftpboot 192.168.201.1 11220738/tftp-deploy-w9rbhkx2/kernel/bzImage 11220738/tftp-deploy-w9rbhkx2/kernel/cmdline 11220738/tftp-deploy-w9rbhkx2/ramdisk/ramdisk.cpio.gz
2112 08:43:47.004374 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2113 08:43:47.004835 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2114 08:43:47.009333 tftpboot 192.168.201.1 11220738/tftp-deploy-w9rbhkx2/kernel/bzIploy-w9rbhkx2/kernel/cmdline 11220738/tftp-deploy-w9rbhkx2/ramdisk/ramdisk.cpio.gz
2115 08:43:47.009851
2116 08:43:47.010215 Waiting for link
2117 08:43:47.213709
2118 08:43:47.214259 done.
2119 08:43:47.214625
2120 08:43:47.214960 MAC: 00:24:32:30:78:e4
2121 08:43:47.215287
2122 08:43:47.217062 Sending DHCP discover... done.
2123 08:43:47.217682
2124 08:43:47.220381 Waiting for reply... done.
2125 08:43:47.220842
2126 08:43:47.224870 Sending DHCP request... done.
2127 08:43:47.225326
2128 08:43:47.230755 Waiting for reply... done.
2129 08:43:47.231212
2130 08:43:47.231576 My ip is 192.168.201.13
2131 08:43:47.231913
2132 08:43:47.233616 The DHCP server ip is 192.168.201.1
2133 08:43:47.237400
2134 08:43:47.240925 TFTP server IP predefined by user: 192.168.201.1
2135 08:43:47.241452
2136 08:43:47.246869 Bootfile predefined by user: 11220738/tftp-deploy-w9rbhkx2/kernel/bzImage
2137 08:43:47.247482
2138 08:43:47.250721 Sending tftp read request... done.
2139 08:43:47.251180
2140 08:43:47.259790 Waiting for the transfer...
2141 08:43:47.260446
2142 08:43:47.952283 00000000 ################################################################
2143 08:43:47.952775
2144 08:43:48.558085 00080000 ################################################################
2145 08:43:48.558220
2146 08:43:49.116815 00100000 ################################################################
2147 08:43:49.116947
2148 08:43:49.665685 00180000 ################################################################
2149 08:43:49.665822
2150 08:43:50.216542 00200000 ################################################################
2151 08:43:50.216735
2152 08:43:50.769730 00280000 ################################################################
2153 08:43:50.769898
2154 08:43:51.318784 00300000 ################################################################
2155 08:43:51.318926
2156 08:43:51.870784 00380000 ################################################################
2157 08:43:51.870921
2158 08:43:52.430603 00400000 ################################################################
2159 08:43:52.430746
2160 08:43:53.005423 00480000 ################################################################
2161 08:43:53.005574
2162 08:43:53.555410 00500000 ################################################################
2163 08:43:53.555553
2164 08:43:54.113074 00580000 ################################################################
2165 08:43:54.113209
2166 08:43:54.669131 00600000 ################################################################
2167 08:43:54.669272
2168 08:43:55.230276 00680000 ################################################################
2169 08:43:55.230419
2170 08:43:55.783471 00700000 ################################################################
2171 08:43:55.783633
2172 08:43:55.805173 00780000 ### done.
2173 08:43:55.805261
2174 08:43:55.809205 The bootfile was 7884688 bytes long.
2175 08:43:55.809311
2176 08:43:55.812120 Sending tftp read request... done.
2177 08:43:55.812223
2178 08:43:55.815046 Waiting for the transfer...
2179 08:43:55.815146
2180 08:43:56.351168 00000000 ################################################################
2181 08:43:56.351334
2182 08:43:56.873339 00080000 ################################################################
2183 08:43:56.873505
2184 08:43:57.405845 00100000 ################################################################
2185 08:43:57.405992
2186 08:43:57.943995 00180000 ################################################################
2187 08:43:57.944129
2188 08:43:58.489901 00200000 ################################################################
2189 08:43:58.490067
2190 08:43:59.037294 00280000 ################################################################
2191 08:43:59.037461
2192 08:43:59.590689 00300000 ################################################################
2193 08:43:59.590823
2194 08:44:00.136105 00380000 ################################################################
2195 08:44:00.136243
2196 08:44:00.684942 00400000 ################################################################
2197 08:44:00.685117
2198 08:44:01.234893 00480000 ################################################################
2199 08:44:01.235053
2200 08:44:01.785719 00500000 ################################################################
2201 08:44:01.785856
2202 08:44:02.341766 00580000 ################################################################
2203 08:44:02.341909
2204 08:44:02.895313 00600000 ################################################################
2205 08:44:02.895466
2206 08:44:03.435495 00680000 ################################################################
2207 08:44:03.435629
2208 08:44:03.975161 00700000 ################################################################
2209 08:44:03.975301
2210 08:44:04.526458 00780000 ################################################################
2211 08:44:04.526599
2212 08:44:05.068319 00800000 ################################################################
2213 08:44:05.068463
2214 08:44:05.610465 00880000 ################################################################
2215 08:44:05.610600
2216 08:44:06.159933 00900000 ################################################################
2217 08:44:06.160073
2218 08:44:06.710300 00980000 ################################################################
2219 08:44:06.710442
2220 08:44:07.262407 00a00000 ################################################################
2221 08:44:07.262539
2222 08:44:07.816314 00a80000 ################################################################
2223 08:44:07.816450
2224 08:44:08.363332 00b00000 ################################################################
2225 08:44:08.363479
2226 08:44:08.904437 00b80000 ################################################################
2227 08:44:08.904579
2228 08:44:09.437245 00c00000 ################################################################
2229 08:44:09.437388
2230 08:44:09.956072 00c80000 ################################################################
2231 08:44:09.956218
2232 08:44:10.482479 00d00000 ################################################################
2233 08:44:10.482631
2234 08:44:11.013527 00d80000 ################################################################
2235 08:44:11.013680
2236 08:44:11.548927 00e00000 ################################################################
2237 08:44:11.549064
2238 08:44:12.088716 00e80000 ################################################################
2239 08:44:12.088854
2240 08:44:12.633712 00f00000 ################################################################
2241 08:44:12.633863
2242 08:44:13.180327 00f80000 ################################################################
2243 08:44:13.180457
2244 08:44:13.718102 01000000 ################################################################
2245 08:44:13.718237
2246 08:44:14.268882 01080000 ################################################################
2247 08:44:14.269023
2248 08:44:14.825695 01100000 ################################################################
2249 08:44:14.825827
2250 08:44:15.366217 01180000 ################################################################
2251 08:44:15.366395
2252 08:44:15.916648 01200000 ################################################################
2253 08:44:15.916801
2254 08:44:16.463474 01280000 ################################################################
2255 08:44:16.463616
2256 08:44:17.013516 01300000 ################################################################
2257 08:44:17.013661
2258 08:44:17.544480 01380000 ################################################################
2259 08:44:17.544623
2260 08:44:18.096672 01400000 ################################################################
2261 08:44:18.096807
2262 08:44:18.628897 01480000 ################################################################
2263 08:44:18.629043
2264 08:44:19.162235 01500000 ################################################################
2265 08:44:19.162366
2266 08:44:19.672997 01580000 ################################################################
2267 08:44:19.673131
2268 08:44:20.200431 01600000 ################################################################
2269 08:44:20.200565
2270 08:44:20.748717 01680000 ################################################################
2271 08:44:20.748857
2272 08:44:21.280981 01700000 ################################################################
2273 08:44:21.281120
2274 08:44:21.829635 01780000 ################################################################
2275 08:44:21.829771
2276 08:44:22.376733 01800000 ################################################################
2277 08:44:22.376875
2278 08:44:22.932619 01880000 ################################################################
2279 08:44:22.932766
2280 08:44:23.461830 01900000 ################################################################
2281 08:44:23.461960
2282 08:44:23.998591 01980000 ################################################################
2283 08:44:23.998726
2284 08:44:24.550107 01a00000 ################################################################
2285 08:44:24.550249
2286 08:44:25.094364 01a80000 ################################################################
2287 08:44:25.094984
2288 08:44:25.764826 01b00000 ################################################################
2289 08:44:25.765372
2290 08:44:26.416481 01b80000 ################################################################
2291 08:44:26.417029
2292 08:44:27.051087 01c00000 ################################################################
2293 08:44:27.051216
2294 08:44:27.602766 01c80000 ################################################################
2295 08:44:27.602901
2296 08:44:28.168752 01d00000 ################################################################
2297 08:44:28.168883
2298 08:44:28.773757 01d80000 ################################################################
2299 08:44:28.774352
2300 08:44:29.396843 01e00000 ################################################################
2301 08:44:29.397387
2302 08:44:30.072157 01e80000 ################################################################
2303 08:44:30.072690
2304 08:44:30.740814 01f00000 ################################################################
2305 08:44:30.741357
2306 08:44:31.430336 01f80000 ################################################################
2307 08:44:31.430878
2308 08:44:32.117650 02000000 ################################################################
2309 08:44:32.118183
2310 08:44:32.753294 02080000 ################################################################
2311 08:44:32.753438
2312 08:44:33.374341 02100000 ################################################################
2313 08:44:33.374497
2314 08:44:34.029059 02180000 ################################################################
2315 08:44:34.029618
2316 08:44:34.573903 02200000 ##################################################### done.
2317 08:44:34.574477
2318 08:44:34.577196 Sending tftp read request... done.
2319 08:44:34.577690
2320 08:44:34.580766 Waiting for the transfer...
2321 08:44:34.581221
2322 08:44:34.581609 00000000 # done.
2323 08:44:34.581963
2324 08:44:34.590237 Command line loaded dynamically from TFTP file: 11220738/tftp-deploy-w9rbhkx2/kernel/cmdline
2325 08:44:34.590786
2326 08:44:34.607245 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2327 08:44:34.613473
2328 08:44:34.616767 Shutting down all USB controllers.
2329 08:44:34.617360
2330 08:44:34.617863 Removing current net device
2331 08:44:34.618213
2332 08:44:34.620051 Finalizing coreboot
2333 08:44:34.620508
2334 08:44:34.626724 Exiting depthcharge with code 4 at timestamp: 57860552
2335 08:44:34.627270
2336 08:44:34.627716
2337 08:44:34.628063 Starting kernel ...
2338 08:44:34.628388
2339 08:44:34.628704
2340 08:44:34.630207 end: 2.2.4 bootloader-commands (duration 00:00:49) [common]
2341 08:44:34.630740 start: 2.2.5 auto-login-action (timeout 00:03:55) [common]
2342 08:44:34.631135 Setting prompt string to ['Linux version [0-9]']
2343 08:44:34.631554 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2344 08:44:34.631931 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2346 08:48:29.631805 end: 2.2.5 auto-login-action (duration 00:03:55) [common]
2348 08:48:29.632856 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 235 seconds'
2350 08:48:29.633673 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2353 08:48:29.635221 end: 2 depthcharge-action (duration 00:05:00) [common]
2355 08:48:29.636267 Cleaning after the job
2356 08:48:29.636714 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220738/tftp-deploy-w9rbhkx2/ramdisk
2357 08:48:29.656040 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220738/tftp-deploy-w9rbhkx2/kernel
2358 08:48:29.659349 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11220738/tftp-deploy-w9rbhkx2/modules
2359 08:48:29.660244 start: 4.1 power-off (timeout 00:00:30) [common]
2360 08:48:29.660654 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2361 08:48:29.762738 >> Command sent successfully.
2362 08:48:29.774708 Returned 0 in 0 seconds
2363 08:48:29.876188 end: 4.1 power-off (duration 00:00:00) [common]
2365 08:48:29.877808 start: 4.2 read-feedback (timeout 00:10:00) [common]
2366 08:48:29.879109 Listened to connection for namespace 'common' for up to 1s
2367 08:48:30.879744 Finalising connection for namespace 'common'
2368 08:48:30.880488 Disconnecting from shell: Finalise
2369 08:48:30.880904
2370 08:48:30.981984 end: 4.2 read-feedback (duration 00:00:01) [common]
2371 08:48:30.982605 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11220738
2372 08:48:31.107745 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11220738
2373 08:48:31.107938 JobError: Your job cannot terminate cleanly.