Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 12:40:17.630110 lava-dispatcher, installed at version: 2023.06
2 12:40:17.630331 start: 0 validate
3 12:40:17.630469 Start time: 2023-08-30 12:40:17.630459+00:00 (UTC)
4 12:40:17.630603 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:40:17.630756 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:40:17.892278 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:40:17.893097 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:40:21.408617 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:40:21.409419 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:40:22.413958 validate duration: 4.78
12 12:40:22.414225 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:40:22.414322 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:40:22.414407 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:40:22.414533 Not decompressing ramdisk as can be used compressed.
16 12:40:22.414632 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:40:22.414705 saving as /var/lib/lava/dispatcher/tmp/11383478/tftp-deploy-1ffutlbg/ramdisk/rootfs.cpio.gz
18 12:40:22.414771 total size: 8418130 (8 MB)
19 12:40:22.415859 progress 0 % (0 MB)
20 12:40:22.418190 progress 5 % (0 MB)
21 12:40:22.420557 progress 10 % (0 MB)
22 12:40:22.422913 progress 15 % (1 MB)
23 12:40:22.425291 progress 20 % (1 MB)
24 12:40:22.427614 progress 25 % (2 MB)
25 12:40:22.429900 progress 30 % (2 MB)
26 12:40:22.432037 progress 35 % (2 MB)
27 12:40:22.434368 progress 40 % (3 MB)
28 12:40:22.436709 progress 45 % (3 MB)
29 12:40:22.439033 progress 50 % (4 MB)
30 12:40:22.441306 progress 55 % (4 MB)
31 12:40:22.443562 progress 60 % (4 MB)
32 12:40:22.445614 progress 65 % (5 MB)
33 12:40:22.447874 progress 70 % (5 MB)
34 12:40:22.450147 progress 75 % (6 MB)
35 12:40:22.452410 progress 80 % (6 MB)
36 12:40:22.454676 progress 85 % (6 MB)
37 12:40:22.456892 progress 90 % (7 MB)
38 12:40:22.459144 progress 95 % (7 MB)
39 12:40:22.461210 progress 100 % (8 MB)
40 12:40:22.461442 8 MB downloaded in 0.05 s (172.02 MB/s)
41 12:40:22.461603 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:40:22.461847 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:40:22.461935 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:40:22.462023 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:40:22.462170 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:40:22.462248 saving as /var/lib/lava/dispatcher/tmp/11383478/tftp-deploy-1ffutlbg/kernel/bzImage
48 12:40:22.462309 total size: 8490896 (8 MB)
49 12:40:22.462371 No compression specified
50 12:40:22.463519 progress 0 % (0 MB)
51 12:40:22.465669 progress 5 % (0 MB)
52 12:40:22.467992 progress 10 % (0 MB)
53 12:40:22.470246 progress 15 % (1 MB)
54 12:40:22.472550 progress 20 % (1 MB)
55 12:40:22.474801 progress 25 % (2 MB)
56 12:40:22.477090 progress 30 % (2 MB)
57 12:40:22.479436 progress 35 % (2 MB)
58 12:40:22.481692 progress 40 % (3 MB)
59 12:40:22.483997 progress 45 % (3 MB)
60 12:40:22.486328 progress 50 % (4 MB)
61 12:40:22.488607 progress 55 % (4 MB)
62 12:40:22.491039 progress 60 % (4 MB)
63 12:40:22.493341 progress 65 % (5 MB)
64 12:40:22.495776 progress 70 % (5 MB)
65 12:40:22.498018 progress 75 % (6 MB)
66 12:40:22.500303 progress 80 % (6 MB)
67 12:40:22.502516 progress 85 % (6 MB)
68 12:40:22.504774 progress 90 % (7 MB)
69 12:40:22.507097 progress 95 % (7 MB)
70 12:40:22.509332 progress 100 % (8 MB)
71 12:40:22.509452 8 MB downloaded in 0.05 s (171.78 MB/s)
72 12:40:22.509600 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:40:22.509830 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:40:22.509917 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:40:22.510001 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:40:22.510140 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:40:22.510217 saving as /var/lib/lava/dispatcher/tmp/11383478/tftp-deploy-1ffutlbg/modules/modules.tar
79 12:40:22.510278 total size: 250888 (0 MB)
80 12:40:22.510340 Using unxz to decompress xz
81 12:40:22.514782 progress 13 % (0 MB)
82 12:40:22.515208 progress 26 % (0 MB)
83 12:40:22.515453 progress 39 % (0 MB)
84 12:40:22.517006 progress 52 % (0 MB)
85 12:40:22.518896 progress 65 % (0 MB)
86 12:40:22.520786 progress 78 % (0 MB)
87 12:40:22.522687 progress 91 % (0 MB)
88 12:40:22.524470 progress 100 % (0 MB)
89 12:40:22.530020 0 MB downloaded in 0.02 s (12.12 MB/s)
90 12:40:22.530323 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:40:22.530760 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:40:22.530895 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 12:40:22.531028 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 12:40:22.531190 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:40:22.531309 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 12:40:22.531605 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79
98 12:40:22.531793 makedir: /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin
99 12:40:22.531903 makedir: /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/tests
100 12:40:22.532015 makedir: /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/results
101 12:40:22.532172 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-add-keys
102 12:40:22.532354 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-add-sources
103 12:40:22.532524 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-background-process-start
104 12:40:22.532690 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-background-process-stop
105 12:40:22.532849 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-common-functions
106 12:40:22.532982 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-echo-ipv4
107 12:40:22.533120 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-install-packages
108 12:40:22.533284 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-installed-packages
109 12:40:22.533444 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-os-build
110 12:40:22.533641 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-probe-channel
111 12:40:22.533827 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-probe-ip
112 12:40:22.533987 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-target-ip
113 12:40:22.534121 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-target-mac
114 12:40:22.534248 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-target-storage
115 12:40:22.534381 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-test-case
116 12:40:22.534548 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-test-event
117 12:40:22.534739 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-test-feedback
118 12:40:22.534869 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-test-raise
119 12:40:22.535004 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-test-reference
120 12:40:22.535141 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-test-runner
121 12:40:22.535269 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-test-set
122 12:40:22.535409 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-test-shell
123 12:40:22.535595 Updating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-install-packages (oe)
124 12:40:22.535771 Updating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/bin/lava-installed-packages (oe)
125 12:40:22.535905 Creating /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/environment
126 12:40:22.536014 environment:
127 12:40:22.536093 - battery_disconnected=1
128 12:40:22.536164 LAVA metadata
129 12:40:22.536225 - LAVA_JOB_ID=11383478
130 12:40:22.536287 - LAVA_DISPATCHER_IP=192.168.201.1
131 12:40:22.536400 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
132 12:40:22.536466 skipped lava-vland-overlay
133 12:40:22.536543 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
134 12:40:22.536624 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
135 12:40:22.536689 skipped lava-multinode-overlay
136 12:40:22.536769 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
137 12:40:22.536851 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
138 12:40:22.536926 Loading test definitions
139 12:40:22.537015 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
140 12:40:22.537125 Using /lava-11383478 at stage 0
141 12:40:22.537533 uuid=11383478_1.4.2.3.1 testdef=None
142 12:40:22.537653 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
143 12:40:22.537772 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
144 12:40:22.538373 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
146 12:40:22.538726 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
147 12:40:22.539543 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
149 12:40:22.539911 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
150 12:40:22.540725 runner path: /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/0/tests/0_dmesg test_uuid 11383478_1.4.2.3.1
151 12:40:22.540884 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
153 12:40:22.541114 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
154 12:40:22.541186 Using /lava-11383478 at stage 1
155 12:40:22.541491 uuid=11383478_1.4.2.3.5 testdef=None
156 12:40:22.541581 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
157 12:40:22.541665 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
158 12:40:22.542148 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
160 12:40:22.542370 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
161 12:40:22.543078 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
163 12:40:22.543308 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
164 12:40:22.543962 runner path: /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/1/tests/1_bootrr test_uuid 11383478_1.4.2.3.5
165 12:40:22.544115 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
167 12:40:22.544323 Creating lava-test-runner.conf files
168 12:40:22.544385 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/0 for stage 0
169 12:40:22.544475 - 0_dmesg
170 12:40:22.544553 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383478/lava-overlay-go07la79/lava-11383478/1 for stage 1
171 12:40:22.544644 - 1_bootrr
172 12:40:22.544738 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
173 12:40:22.544821 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
174 12:40:22.553497 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
175 12:40:22.553610 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
176 12:40:22.553696 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
177 12:40:22.553783 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
178 12:40:22.553870 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
179 12:40:22.809487 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
180 12:40:22.809919 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
181 12:40:22.810041 extracting modules file /var/lib/lava/dispatcher/tmp/11383478/tftp-deploy-1ffutlbg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11383478/extract-overlay-ramdisk-k4dn4fk3/ramdisk
182 12:40:22.825137 end: 1.4.4 extract-modules (duration 00:00:00) [common]
183 12:40:22.825283 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
184 12:40:22.825379 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383478/compress-overlay-104pnxo5/overlay-1.4.2.4.tar.gz to ramdisk
185 12:40:22.825452 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383478/compress-overlay-104pnxo5/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11383478/extract-overlay-ramdisk-k4dn4fk3/ramdisk
186 12:40:22.834646 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
187 12:40:22.834783 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
188 12:40:22.834876 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
189 12:40:22.834967 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
190 12:40:22.835048 Building ramdisk /var/lib/lava/dispatcher/tmp/11383478/extract-overlay-ramdisk-k4dn4fk3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11383478/extract-overlay-ramdisk-k4dn4fk3/ramdisk
191 12:40:22.979809 >> 49788 blocks
192 12:40:23.813404 rename /var/lib/lava/dispatcher/tmp/11383478/extract-overlay-ramdisk-k4dn4fk3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11383478/tftp-deploy-1ffutlbg/ramdisk/ramdisk.cpio.gz
193 12:40:23.813863 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
194 12:40:23.813986 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
195 12:40:23.814091 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
196 12:40:23.814186 No mkimage arch provided, not using FIT.
197 12:40:23.814296 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
198 12:40:23.814381 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
199 12:40:23.814487 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
200 12:40:23.814580 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
201 12:40:23.814711 No LXC device requested
202 12:40:23.814794 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
203 12:40:23.814882 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
204 12:40:23.814961 end: 1.6 deploy-device-env (duration 00:00:00) [common]
205 12:40:23.815038 Checking files for TFTP limit of 4294967296 bytes.
206 12:40:23.815437 end: 1 tftp-deploy (duration 00:00:01) [common]
207 12:40:23.815536 start: 2 depthcharge-action (timeout 00:05:00) [common]
208 12:40:23.815624 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
209 12:40:23.815744 substitutions:
210 12:40:23.815810 - {DTB}: None
211 12:40:23.815872 - {INITRD}: 11383478/tftp-deploy-1ffutlbg/ramdisk/ramdisk.cpio.gz
212 12:40:23.815932 - {KERNEL}: 11383478/tftp-deploy-1ffutlbg/kernel/bzImage
213 12:40:23.815989 - {LAVA_MAC}: None
214 12:40:23.816043 - {PRESEED_CONFIG}: None
215 12:40:23.816097 - {PRESEED_LOCAL}: None
216 12:40:23.816150 - {RAMDISK}: 11383478/tftp-deploy-1ffutlbg/ramdisk/ramdisk.cpio.gz
217 12:40:23.816203 - {ROOT_PART}: None
218 12:40:23.816255 - {ROOT}: None
219 12:40:23.816307 - {SERVER_IP}: 192.168.201.1
220 12:40:23.816359 - {TEE}: None
221 12:40:23.816411 Parsed boot commands:
222 12:40:23.816463 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
223 12:40:23.816638 Parsed boot commands: tftpboot 192.168.201.1 11383478/tftp-deploy-1ffutlbg/kernel/bzImage 11383478/tftp-deploy-1ffutlbg/kernel/cmdline 11383478/tftp-deploy-1ffutlbg/ramdisk/ramdisk.cpio.gz
224 12:40:23.816726 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
225 12:40:23.816812 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
226 12:40:23.816904 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
227 12:40:23.816986 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
228 12:40:23.817052 Not connected, no need to disconnect.
229 12:40:23.817124 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
230 12:40:23.817202 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
231 12:40:23.817266 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-6'
232 12:40:23.821724 Setting prompt string to ['lava-test: # ']
233 12:40:23.822136 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
234 12:40:23.822246 end: 2.2.1 reset-connection (duration 00:00:00) [common]
235 12:40:23.822347 start: 2.2.2 reset-device (timeout 00:05:00) [common]
236 12:40:23.822437 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
237 12:40:23.822676 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-6' '--port=1' '--command=reboot'
238 12:40:28.958744 >> Command sent successfully.
239 12:40:28.961208 Returned 0 in 5 seconds
240 12:40:29.061623 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
242 12:40:29.061956 end: 2.2.2 reset-device (duration 00:00:05) [common]
243 12:40:29.062053 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
244 12:40:29.062139 Setting prompt string to 'Starting depthcharge on Magolor...'
245 12:40:29.062208 Changing prompt to 'Starting depthcharge on Magolor...'
246 12:40:29.062272 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
247 12:40:29.062542 [Enter `^Ec?' for help]
248 12:40:30.201493
249 12:40:30.201646
250 12:40:30.212261 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
251 12:40:30.214478 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
252 12:40:30.221134 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
253 12:40:30.224652 CPU: AES supported, TXT NOT supported, VT supported
254 12:40:30.231214 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
255 12:40:30.235403 PCH: device id 4d87 (rev 01) is Jasperlake Super
256 12:40:30.238102 IGD: device id 4e55 (rev 01) is Jasperlake GT4
257 12:40:30.242081 VBOOT: Loading verstage.
258 12:40:30.248449 FMAP: Found "FLASH" version 1.1 at 0xc04000.
259 12:40:30.251599 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
260 12:40:30.258510 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
261 12:40:30.261862 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
262 12:40:30.266148
263 12:40:30.266229
264 12:40:30.273776 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
265 12:40:30.290121 Probing TPM: . done!
266 12:40:30.293241 TPM ready after 0 ms
267 12:40:30.296915 Connected to device vid:did:rid of 1ae0:0028:00
268 12:40:30.307236 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
269 12:40:30.313802 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
270 12:40:30.317262 Initialized TPM device CR50 revision 0
271 12:40:30.380125 tlcl_send_startup: Startup return code is 0
272 12:40:30.380274 TPM: setup succeeded
273 12:40:30.395752 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
274 12:40:30.405756 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 12:40:30.415141 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
276 12:40:30.432233 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
277 12:40:30.435800 Chrome EC: UHEPI supported
278 12:40:30.435890 Phase 1
279 12:40:30.444299 FMAP: area GBB found @ c05000 (12288 bytes)
280 12:40:30.447874 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
281 12:40:30.455500 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
282 12:40:30.459363 Recovery requested (1009000e)
283 12:40:30.465141 TPM: Extending digest for VBOOT: boot mode into PCR 0
284 12:40:30.476832 tlcl_extend: response is 0
285 12:40:30.483450 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
286 12:40:30.493381 tlcl_extend: response is 0
287 12:40:30.499635 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
288 12:40:30.503252 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
289 12:40:30.510611 BS: verstage times (exec / console): total (unknown) / 124 ms
290 12:40:30.510699
291 12:40:30.510766
292 12:40:30.520841 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
293 12:40:30.527728 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
294 12:40:30.534079 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
295 12:40:30.537475 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
296 12:40:30.540669 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
297 12:40:30.547171 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
298 12:40:30.550445 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
299 12:40:30.553801 TCO_STS: 0000 0001
300 12:40:30.553884 GEN_PMCON: d0015038 00002200
301 12:40:30.557420 GBLRST_CAUSE: 00000000 00000000
302 12:40:30.560718 prev_sleep_state 5
303 12:40:30.563654 Boot Count incremented to 2639
304 12:40:30.570382 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
305 12:40:30.574047 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
306 12:40:30.576966 Chrome EC: UHEPI supported
307 12:40:30.583932 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
308 12:40:30.590760 Probing TPM: done!
309 12:40:30.597472 Connected to device vid:did:rid of 1ae0:0028:00
310 12:40:30.607283 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
311 12:40:30.619668 Initialized TPM device CR50 revision 0
312 12:40:30.628305 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 12:40:30.635568 MRC: Hash idx 0x100b comparison successful.
314 12:40:30.635658 MRC cache found, size 5458
315 12:40:30.638343 bootmode is set to: 2
316 12:40:30.641876 SPD INDEX = 0
317 12:40:30.645198 CBFS: Found 'spd.bin' @0x40c40 size 0x600
318 12:40:30.649066 SPD: module type is LPDDR4X
319 12:40:30.655053 SPD: module part number is MT53E512M32D2NP-046 WT:E
320 12:40:30.658101 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
321 12:40:30.664816 SPD: device width 16 bits, bus width 32 bits
322 12:40:30.668263 SPD: module size is 4096 MB (per channel)
323 12:40:30.671537 meminit_channels: DRAM half-populated
324 12:40:30.754335 CBMEM:
325 12:40:30.757319 IMD: root @ 0x76fff000 254 entries.
326 12:40:30.760598 IMD: root @ 0x76ffec00 62 entries.
327 12:40:30.764116 FMAP: area RO_VPD found @ c00000 (16384 bytes)
328 12:40:30.771311 WARNING: RO_VPD is uninitialized or empty.
329 12:40:30.774193 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
330 12:40:30.778166 External stage cache:
331 12:40:30.782113 IMD: root @ 0x7b3ff000 254 entries.
332 12:40:30.784411 IMD: root @ 0x7b3fec00 62 entries.
333 12:40:30.794556 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
334 12:40:30.801028 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
335 12:40:30.807292 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
336 12:40:30.816282 MRC: 'RECOVERY_MRC_CACHE' does not need update.
337 12:40:30.819310 cse_lite: Skip switching to RW in the recovery path
338 12:40:30.823069 1 DIMMs found
339 12:40:30.823176 SMM Memory Map
340 12:40:30.825881 SMRAM : 0x7b000000 0x800000
341 12:40:30.829178 Subregion 0: 0x7b000000 0x200000
342 12:40:30.832263 Subregion 1: 0x7b200000 0x200000
343 12:40:30.839905 Subregion 2: 0x7b400000 0x400000
344 12:40:30.840057 top_of_ram = 0x77000000
345 12:40:30.845780 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
346 12:40:30.849490 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
347 12:40:30.856148 MTRR Range: Start=ff000000 End=0 (Size 1000000)
348 12:40:30.859276 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
349 12:40:30.865895 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
350 12:40:30.878103 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
351 12:40:30.884374 Processing 188 relocs. Offset value of 0x74c0e000
352 12:40:30.891242 BS: romstage times (exec / console): total (unknown) / 256 ms
353 12:40:30.895760
354 12:40:30.895868
355 12:40:30.906103 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
356 12:40:30.909670 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
357 12:40:30.915978 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
358 12:40:30.922401 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
359 12:40:30.978584 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
360 12:40:30.985481 Processing 4805 relocs. Offset value of 0x75da8000
361 12:40:30.991754 BS: postcar times (exec / console): total (unknown) / 42 ms
362 12:40:30.991859
363 12:40:30.991925
364 12:40:31.001546 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
365 12:40:31.001652 Normal boot
366 12:40:31.006102 EC returned error result code 3
367 12:40:31.009123 FW_CONFIG value is 0x204
368 12:40:31.012500 GENERIC: 0.0 disabled by fw_config
369 12:40:31.019672 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
370 12:40:31.022508 I2C: 00:10 disabled by fw_config
371 12:40:31.025700 I2C: 00:10 disabled by fw_config
372 12:40:31.029307 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 12:40:31.035970 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 12:40:31.038899 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
375 12:40:31.045767 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
376 12:40:31.049293 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
377 12:40:31.052042 I2C: 00:10 disabled by fw_config
378 12:40:31.058791 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
379 12:40:31.065334 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
380 12:40:31.069089 I2C: 00:1a disabled by fw_config
381 12:40:31.072415 I2C: 00:1a disabled by fw_config
382 12:40:31.078825 fw_config match found: AUDIO_AMP=UNPROVISIONED
383 12:40:31.082158 fw_config match found: AUDIO_AMP=UNPROVISIONED
384 12:40:31.085420 GENERIC: 0.0 disabled by fw_config
385 12:40:31.092090 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 12:40:31.095642 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
387 12:40:31.102084 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
388 12:40:31.105121 microcode: Update skipped, already up-to-date
389 12:40:31.112203 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
390 12:40:31.138190 Detected 2 core, 2 thread CPU.
391 12:40:31.141065 Setting up SMI for CPU
392 12:40:31.144805 IED base = 0x7b400000
393 12:40:31.144901 IED size = 0x00400000
394 12:40:31.148060 Will perform SMM setup.
395 12:40:31.151512 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
396 12:40:31.161422 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
397 12:40:31.164467 Processing 16 relocs. Offset value of 0x00030000
398 12:40:31.168095 Attempting to start 1 APs
399 12:40:31.171514 Waiting for 10ms after sending INIT.
400 12:40:31.188242 Waiting for 1st SIPI to complete...done.
401 12:40:31.188393 AP: slot 1 apic_id 2.
402 12:40:31.196176 Waiting for 2nd SIPI to complete...done.
403 12:40:31.201463 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
404 12:40:31.208031 Processing 13 relocs. Offset value of 0x00038000
405 12:40:31.208137 Unable to locate Global NVS
406 12:40:31.215075 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
407 12:40:31.221196 Installing permanent SMM handler to 0x7b000000
408 12:40:31.227796 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
409 12:40:31.234550 Processing 704 relocs. Offset value of 0x7b010000
410 12:40:31.242012 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
411 12:40:31.248015 Processing 13 relocs. Offset value of 0x7b008000
412 12:40:31.255117 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
413 12:40:31.257662 Unable to locate Global NVS
414 12:40:31.264553 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
415 12:40:31.267672 Clearing SMI status registers
416 12:40:31.267771 SMI_STS: PM1
417 12:40:31.271012 PM1_STS: PWRBTN
418 12:40:31.271098 TCO_STS: INTRD_DET
419 12:40:31.274305 GPE0 STD STS:
420 12:40:31.281338 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
421 12:40:31.284511 In relocation handler: CPU 0
422 12:40:31.287965 New SMBASE=0x7b000000 IEDBASE=0x7b400000
423 12:40:31.295676 Writing SMRR. base = 0x7b000006, mask=0xff800800
424 12:40:31.295797 Relocation complete.
425 12:40:31.302525 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
426 12:40:31.305926 In relocation handler: CPU 1
427 12:40:31.309042 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
428 12:40:31.315523 Writing SMRR. base = 0x7b000006, mask=0xff800800
429 12:40:31.315606 Relocation complete.
430 12:40:31.318982 Initializing CPU #0
431 12:40:31.322335 CPU: vendor Intel device 906c0
432 12:40:31.325390 CPU: family 06, model 9c, stepping 00
433 12:40:31.328834 Clearing out pending MCEs
434 12:40:31.332352 Setting up local APIC...
435 12:40:31.332435 apic_id: 0x00 done.
436 12:40:31.335386 Turbo is available but hidden
437 12:40:31.338717 Turbo is available and visible
438 12:40:31.345630 microcode: Update skipped, already up-to-date
439 12:40:31.345716 CPU #0 initialized
440 12:40:31.348779 Initializing CPU #1
441 12:40:31.352230 CPU: vendor Intel device 906c0
442 12:40:31.355294 CPU: family 06, model 9c, stepping 00
443 12:40:31.358546 Clearing out pending MCEs
444 12:40:31.358681 Setting up local APIC...
445 12:40:31.362661 apic_id: 0x02 done.
446 12:40:31.368674 microcode: Update skipped, already up-to-date
447 12:40:31.368784 CPU #1 initialized
448 12:40:31.372482 bsp_do_flight_plan done after 175 msecs.
449 12:40:31.375158 CPU: frequency set to 2800 MHz
450 12:40:31.378807 Enabling SMIs.
451 12:40:31.385064 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
452 12:40:31.394243 Probing TPM: done!
453 12:40:31.400892 Connected to device vid:did:rid of 1ae0:0028:00
454 12:40:31.410881 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
455 12:40:31.414392 Initialized TPM device CR50 revision 0
456 12:40:31.421032 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
457 12:40:31.424423 Found a VBT of 7680 bytes after decompression
458 12:40:31.434256 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
459 12:40:31.466666 Detected 2 core, 2 thread CPU.
460 12:40:31.469733 Detected 2 core, 2 thread CPU.
461 12:40:31.831582 Display FSP Version Info HOB
462 12:40:31.834555 Reference Code - CPU = 8.7.22.30
463 12:40:31.837892 uCode Version = 24.0.0.1f
464 12:40:31.841451 TXT ACM version = ff.ff.ff.ffff
465 12:40:31.844456 Reference Code - ME = 8.7.22.30
466 12:40:31.847655 MEBx version = 0.0.0.0
467 12:40:31.850939 ME Firmware Version = Consumer SKU
468 12:40:31.854861 Reference Code - PCH = 8.7.22.30
469 12:40:31.857628 PCH-CRID Status = Disabled
470 12:40:31.861164 PCH-CRID Original Value = ff.ff.ff.ffff
471 12:40:31.864038 PCH-CRID New Value = ff.ff.ff.ffff
472 12:40:31.867594 OPROM - RST - RAID = ff.ff.ff.ffff
473 12:40:31.871010 PCH Hsio Version = 4.0.0.0
474 12:40:31.875205 Reference Code - SA - System Agent = 8.7.22.30
475 12:40:31.878812 Reference Code - MRC = 0.0.4.68
476 12:40:31.881912 SA - PCIe Version = 8.7.22.30
477 12:40:31.885711 SA-CRID Status = Disabled
478 12:40:31.888788 SA-CRID Original Value = 0.0.0.0
479 12:40:31.888867 SA-CRID New Value = 0.0.0.0
480 12:40:31.892736 OPROM - VBIOS = ff.ff.ff.ffff
481 12:40:31.899225 IO Manageability Engine FW Version = ff.ff.ff.ffff
482 12:40:31.902508 PHY Build Version = ff.ff.ff.ffff
483 12:40:31.906399 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
484 12:40:31.913679 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
485 12:40:31.915792 ITSS IRQ Polarities Before:
486 12:40:31.915900 IPC0: 0xffffffff
487 12:40:31.919424 IPC1: 0xffffffff
488 12:40:31.919504 IPC2: 0xffffffff
489 12:40:31.922352 IPC3: 0xffffffff
490 12:40:31.926144 ITSS IRQ Polarities After:
491 12:40:31.926225 IPC0: 0xffffffff
492 12:40:31.929088 IPC1: 0xffffffff
493 12:40:31.929168 IPC2: 0xffffffff
494 12:40:31.932546 IPC3: 0xffffffff
495 12:40:31.942233 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
496 12:40:31.949400 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
497 12:40:31.952447 Enumerating buses...
498 12:40:31.956159 Show all devs... Before device enumeration.
499 12:40:31.959228 Root Device: enabled 1
500 12:40:31.962531 CPU_CLUSTER: 0: enabled 1
501 12:40:31.966066 DOMAIN: 0000: enabled 1
502 12:40:31.966151 PCI: 00:00.0: enabled 1
503 12:40:31.968649 PCI: 00:02.0: enabled 1
504 12:40:31.972162 PCI: 00:04.0: enabled 1
505 12:40:31.972261 PCI: 00:05.0: enabled 1
506 12:40:31.975462 PCI: 00:09.0: enabled 0
507 12:40:31.978997 PCI: 00:12.6: enabled 0
508 12:40:31.982301 PCI: 00:14.0: enabled 1
509 12:40:31.982381 PCI: 00:14.1: enabled 0
510 12:40:31.985426 PCI: 00:14.2: enabled 0
511 12:40:31.988798 PCI: 00:14.3: enabled 1
512 12:40:31.992128 PCI: 00:14.5: enabled 1
513 12:40:31.992209 PCI: 00:15.0: enabled 1
514 12:40:31.995345 PCI: 00:15.1: enabled 1
515 12:40:31.998557 PCI: 00:15.2: enabled 1
516 12:40:32.002214 PCI: 00:15.3: enabled 1
517 12:40:32.002329 PCI: 00:16.0: enabled 1
518 12:40:32.005676 PCI: 00:16.1: enabled 0
519 12:40:32.009124 PCI: 00:16.4: enabled 0
520 12:40:32.009208 PCI: 00:16.5: enabled 0
521 12:40:32.012155 PCI: 00:17.0: enabled 0
522 12:40:32.015208 PCI: 00:19.0: enabled 1
523 12:40:32.018542 PCI: 00:19.1: enabled 0
524 12:40:32.018644 PCI: 00:19.2: enabled 1
525 12:40:32.022172 PCI: 00:1a.0: enabled 1
526 12:40:32.025226 PCI: 00:1c.0: enabled 0
527 12:40:32.028648 PCI: 00:1c.1: enabled 0
528 12:40:32.028728 PCI: 00:1c.2: enabled 0
529 12:40:32.031908 PCI: 00:1c.3: enabled 0
530 12:40:32.035698 PCI: 00:1c.4: enabled 0
531 12:40:32.038207 PCI: 00:1c.5: enabled 0
532 12:40:32.038287 PCI: 00:1c.6: enabled 0
533 12:40:32.042552 PCI: 00:1c.7: enabled 1
534 12:40:32.044989 PCI: 00:1e.0: enabled 0
535 12:40:32.048199 PCI: 00:1e.1: enabled 0
536 12:40:32.048282 PCI: 00:1e.2: enabled 1
537 12:40:32.052261 PCI: 00:1e.3: enabled 0
538 12:40:32.054978 PCI: 00:1f.0: enabled 1
539 12:40:32.055085 PCI: 00:1f.1: enabled 1
540 12:40:32.058452 PCI: 00:1f.2: enabled 1
541 12:40:32.061758 PCI: 00:1f.3: enabled 1
542 12:40:32.065292 PCI: 00:1f.4: enabled 0
543 12:40:32.065372 PCI: 00:1f.5: enabled 1
544 12:40:32.068881 PCI: 00:1f.7: enabled 0
545 12:40:32.071715 GENERIC: 0.0: enabled 1
546 12:40:32.074801 GENERIC: 0.0: enabled 1
547 12:40:32.074881 USB0 port 0: enabled 1
548 12:40:32.078235 GENERIC: 0.0: enabled 1
549 12:40:32.081857 I2C: 00:2c: enabled 1
550 12:40:32.081938 I2C: 00:15: enabled 1
551 12:40:32.084824 GENERIC: 0.0: enabled 0
552 12:40:32.088080 I2C: 00:15: enabled 1
553 12:40:32.088160 I2C: 00:10: enabled 0
554 12:40:32.091818 I2C: 00:10: enabled 0
555 12:40:32.094698 I2C: 00:2c: enabled 1
556 12:40:32.098875 I2C: 00:40: enabled 1
557 12:40:32.098954 I2C: 00:10: enabled 1
558 12:40:32.101068 I2C: 00:39: enabled 1
559 12:40:32.104650 I2C: 00:36: enabled 1
560 12:40:32.104729 I2C: 00:10: enabled 0
561 12:40:32.108005 I2C: 00:0c: enabled 1
562 12:40:32.111209 I2C: 00:50: enabled 1
563 12:40:32.111288 I2C: 00:1a: enabled 1
564 12:40:32.115304 I2C: 00:1a: enabled 0
565 12:40:32.117834 I2C: 00:1a: enabled 0
566 12:40:32.117917 I2C: 00:28: enabled 1
567 12:40:32.121345 I2C: 00:29: enabled 1
568 12:40:32.124399 PCI: 00:00.0: enabled 1
569 12:40:32.124493 SPI: 00: enabled 1
570 12:40:32.128084 PNP: 0c09.0: enabled 1
571 12:40:32.131388 GENERIC: 0.0: enabled 0
572 12:40:32.131466 USB2 port 0: enabled 1
573 12:40:32.134964 USB2 port 1: enabled 1
574 12:40:32.138025 USB2 port 2: enabled 1
575 12:40:32.141272 USB2 port 3: enabled 1
576 12:40:32.141351 USB2 port 4: enabled 0
577 12:40:32.144358 USB2 port 5: enabled 1
578 12:40:32.147877 USB2 port 6: enabled 0
579 12:40:32.148028 USB2 port 7: enabled 1
580 12:40:32.151606 USB3 port 0: enabled 1
581 12:40:32.154334 USB3 port 1: enabled 1
582 12:40:32.154430 USB3 port 2: enabled 1
583 12:40:32.157922 USB3 port 3: enabled 1
584 12:40:32.161524 APIC: 00: enabled 1
585 12:40:32.161620 APIC: 02: enabled 1
586 12:40:32.164327 Compare with tree...
587 12:40:32.168382 Root Device: enabled 1
588 12:40:32.171098 CPU_CLUSTER: 0: enabled 1
589 12:40:32.171179 APIC: 00: enabled 1
590 12:40:32.174523 APIC: 02: enabled 1
591 12:40:32.177505 DOMAIN: 0000: enabled 1
592 12:40:32.177586 PCI: 00:00.0: enabled 1
593 12:40:32.180983 PCI: 00:02.0: enabled 1
594 12:40:32.184198 PCI: 00:04.0: enabled 1
595 12:40:32.187896 GENERIC: 0.0: enabled 1
596 12:40:32.191041 PCI: 00:05.0: enabled 1
597 12:40:32.191136 GENERIC: 0.0: enabled 1
598 12:40:32.194914 PCI: 00:09.0: enabled 0
599 12:40:32.197955 PCI: 00:12.6: enabled 0
600 12:40:32.200940 PCI: 00:14.0: enabled 1
601 12:40:32.204380 USB0 port 0: enabled 1
602 12:40:32.204462 USB2 port 0: enabled 1
603 12:40:32.207263 USB2 port 1: enabled 1
604 12:40:32.210728 USB2 port 2: enabled 1
605 12:40:32.214172 USB2 port 3: enabled 1
606 12:40:32.217550 USB2 port 4: enabled 0
607 12:40:32.220619 USB2 port 5: enabled 1
608 12:40:32.220699 USB2 port 6: enabled 0
609 12:40:32.223920 USB2 port 7: enabled 1
610 12:40:32.227673 USB3 port 0: enabled 1
611 12:40:32.230517 USB3 port 1: enabled 1
612 12:40:32.233906 USB3 port 2: enabled 1
613 12:40:32.237133 USB3 port 3: enabled 1
614 12:40:32.237214 PCI: 00:14.1: enabled 0
615 12:40:32.240790 PCI: 00:14.2: enabled 0
616 12:40:32.244251 PCI: 00:14.3: enabled 1
617 12:40:32.247094 GENERIC: 0.0: enabled 1
618 12:40:32.250603 PCI: 00:14.5: enabled 1
619 12:40:32.250684 PCI: 00:15.0: enabled 1
620 12:40:32.253774 I2C: 00:2c: enabled 1
621 12:40:32.257873 I2C: 00:15: enabled 1
622 12:40:32.260505 PCI: 00:15.1: enabled 1
623 12:40:32.260586 PCI: 00:15.2: enabled 1
624 12:40:32.264263 GENERIC: 0.0: enabled 0
625 12:40:32.267150 I2C: 00:15: enabled 1
626 12:40:32.270432 I2C: 00:10: enabled 0
627 12:40:32.273857 I2C: 00:10: enabled 0
628 12:40:32.273938 I2C: 00:2c: enabled 1
629 12:40:32.277100 I2C: 00:40: enabled 1
630 12:40:32.280906 I2C: 00:10: enabled 1
631 12:40:32.283963 I2C: 00:39: enabled 1
632 12:40:32.284044 PCI: 00:15.3: enabled 1
633 12:40:32.287212 I2C: 00:36: enabled 1
634 12:40:32.291502 I2C: 00:10: enabled 0
635 12:40:32.293548 I2C: 00:0c: enabled 1
636 12:40:32.293647 I2C: 00:50: enabled 1
637 12:40:32.297063 PCI: 00:16.0: enabled 1
638 12:40:32.300576 PCI: 00:16.1: enabled 0
639 12:40:32.303770 PCI: 00:16.4: enabled 0
640 12:40:32.306745 PCI: 00:16.5: enabled 0
641 12:40:32.306837 PCI: 00:17.0: enabled 0
642 12:40:32.310144 PCI: 00:19.0: enabled 1
643 12:40:32.313485 I2C: 00:1a: enabled 1
644 12:40:32.316571 I2C: 00:1a: enabled 0
645 12:40:32.321551 I2C: 00:1a: enabled 0
646 12:40:32.321637 I2C: 00:28: enabled 1
647 12:40:32.323331 I2C: 00:29: enabled 1
648 12:40:32.327100 PCI: 00:19.1: enabled 0
649 12:40:32.330438 PCI: 00:19.2: enabled 1
650 12:40:32.330547 PCI: 00:1a.0: enabled 1
651 12:40:32.334047 PCI: 00:1e.0: enabled 0
652 12:40:32.337132 PCI: 00:1e.1: enabled 0
653 12:40:32.340115 PCI: 00:1e.2: enabled 1
654 12:40:32.340311 SPI: 00: enabled 1
655 12:40:32.343784 PCI: 00:1e.3: enabled 0
656 12:40:32.347496 PCI: 00:1f.0: enabled 1
657 12:40:32.350343 PNP: 0c09.0: enabled 1
658 12:40:32.353758 PCI: 00:1f.1: enabled 1
659 12:40:32.354115 PCI: 00:1f.2: enabled 1
660 12:40:32.356564 PCI: 00:1f.3: enabled 1
661 12:40:32.360702 GENERIC: 0.0: enabled 0
662 12:40:32.364059 PCI: 00:1f.4: enabled 0
663 12:40:32.366706 PCI: 00:1f.5: enabled 1
664 12:40:32.367087 PCI: 00:1f.7: enabled 0
665 12:40:32.369989 Root Device scanning...
666 12:40:32.373575 scan_static_bus for Root Device
667 12:40:32.376860 CPU_CLUSTER: 0 enabled
668 12:40:32.379926 DOMAIN: 0000 enabled
669 12:40:32.380310 DOMAIN: 0000 scanning...
670 12:40:32.383267 PCI: pci_scan_bus for bus 00
671 12:40:32.387311 PCI: 00:00.0 [8086/0000] ops
672 12:40:32.390975 PCI: 00:00.0 [8086/4e22] enabled
673 12:40:32.393266 PCI: 00:02.0 [8086/0000] bus ops
674 12:40:32.397479 PCI: 00:02.0 [8086/4e55] enabled
675 12:40:32.400123 PCI: 00:04.0 [8086/0000] bus ops
676 12:40:32.403519 PCI: 00:04.0 [8086/4e03] enabled
677 12:40:32.407143 PCI: 00:05.0 [8086/0000] bus ops
678 12:40:32.409894 PCI: 00:05.0 [8086/4e19] enabled
679 12:40:32.413874 PCI: 00:08.0 [8086/4e11] enabled
680 12:40:32.417044 PCI: 00:14.0 [8086/0000] bus ops
681 12:40:32.420230 PCI: 00:14.0 [8086/4ded] enabled
682 12:40:32.423298 PCI: 00:14.2 [8086/4def] disabled
683 12:40:32.426542 PCI: 00:14.3 [8086/0000] bus ops
684 12:40:32.430050 PCI: 00:14.3 [8086/4df0] enabled
685 12:40:32.433574 PCI: 00:14.5 [8086/0000] ops
686 12:40:32.436502 PCI: 00:14.5 [8086/4df8] enabled
687 12:40:32.439597 PCI: 00:15.0 [8086/0000] bus ops
688 12:40:32.444647 PCI: 00:15.0 [8086/4de8] enabled
689 12:40:32.446019 PCI: 00:15.1 [8086/0000] bus ops
690 12:40:32.450467 PCI: 00:15.1 [8086/4de9] enabled
691 12:40:32.453057 PCI: 00:15.2 [8086/0000] bus ops
692 12:40:32.456442 PCI: 00:15.2 [8086/4dea] enabled
693 12:40:32.459559 PCI: 00:15.3 [8086/0000] bus ops
694 12:40:32.462933 PCI: 00:15.3 [8086/4deb] enabled
695 12:40:32.466871 PCI: 00:16.0 [8086/0000] ops
696 12:40:32.469828 PCI: 00:16.0 [8086/4de0] enabled
697 12:40:32.472672 PCI: 00:19.0 [8086/0000] bus ops
698 12:40:32.476785 PCI: 00:19.0 [8086/4dc5] enabled
699 12:40:32.479772 PCI: 00:19.2 [8086/0000] ops
700 12:40:32.482674 PCI: 00:19.2 [8086/4dc7] enabled
701 12:40:32.486291 PCI: 00:1a.0 [8086/0000] ops
702 12:40:32.489578 PCI: 00:1a.0 [8086/4dc4] enabled
703 12:40:32.492794 PCI: 00:1e.0 [8086/0000] ops
704 12:40:32.496292 PCI: 00:1e.0 [8086/4da8] disabled
705 12:40:32.499831 PCI: 00:1e.2 [8086/0000] bus ops
706 12:40:32.503572 PCI: 00:1e.2 [8086/4daa] enabled
707 12:40:32.506020 PCI: 00:1f.0 [8086/0000] bus ops
708 12:40:32.509629 PCI: 00:1f.0 [8086/4d87] enabled
709 12:40:32.512866 PCI: Static device PCI: 00:1f.1 not found, disabling it.
710 12:40:32.516038 RTC Init
711 12:40:32.519215 Set power on after power failure.
712 12:40:32.519729 Disabling Deep S3
713 12:40:32.522720 Disabling Deep S3
714 12:40:32.525596 Disabling Deep S4
715 12:40:32.526038 Disabling Deep S4
716 12:40:32.528828 Disabling Deep S5
717 12:40:32.529212 Disabling Deep S5
718 12:40:32.532021 PCI: 00:1f.2 [0000/0000] hidden
719 12:40:32.535918 PCI: 00:1f.3 [8086/0000] bus ops
720 12:40:32.538893 PCI: 00:1f.3 [8086/4dc8] enabled
721 12:40:32.542496 PCI: 00:1f.5 [8086/0000] bus ops
722 12:40:32.545963 PCI: 00:1f.5 [8086/4da4] enabled
723 12:40:32.549029 PCI: Leftover static devices:
724 12:40:32.552250 PCI: 00:12.6
725 12:40:32.552743 PCI: 00:09.0
726 12:40:32.553073 PCI: 00:14.1
727 12:40:32.556326 PCI: 00:16.1
728 12:40:32.556708 PCI: 00:16.4
729 12:40:32.557012 PCI: 00:16.5
730 12:40:32.560640 PCI: 00:17.0
731 12:40:32.561149 PCI: 00:19.1
732 12:40:32.564358 PCI: 00:1e.1
733 12:40:32.564804 PCI: 00:1e.3
734 12:40:32.565170 PCI: 00:1f.1
735 12:40:32.567203 PCI: 00:1f.4
736 12:40:32.567618 PCI: 00:1f.7
737 12:40:32.570947 PCI: Check your devicetree.cb.
738 12:40:32.574145 PCI: 00:02.0 scanning...
739 12:40:32.577409 scan_generic_bus for PCI: 00:02.0
740 12:40:32.580610 scan_generic_bus for PCI: 00:02.0 done
741 12:40:32.584242 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
742 12:40:32.587990 PCI: 00:04.0 scanning...
743 12:40:32.590699 scan_generic_bus for PCI: 00:04.0
744 12:40:32.594167 GENERIC: 0.0 enabled
745 12:40:32.601241 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
746 12:40:32.603710 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
747 12:40:32.607679 PCI: 00:05.0 scanning...
748 12:40:32.610890 scan_generic_bus for PCI: 00:05.0
749 12:40:32.614529 GENERIC: 0.0 enabled
750 12:40:32.617620 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
751 12:40:32.624710 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
752 12:40:32.626900 PCI: 00:14.0 scanning...
753 12:40:32.630553 scan_static_bus for PCI: 00:14.0
754 12:40:32.631021 USB0 port 0 enabled
755 12:40:32.634140 USB0 port 0 scanning...
756 12:40:32.637038 scan_static_bus for USB0 port 0
757 12:40:32.640614 USB2 port 0 enabled
758 12:40:32.641150 USB2 port 1 enabled
759 12:40:32.643589 USB2 port 2 enabled
760 12:40:32.644015 USB2 port 3 enabled
761 12:40:32.647246 USB2 port 4 disabled
762 12:40:32.650169 USB2 port 5 enabled
763 12:40:32.650753 USB2 port 6 disabled
764 12:40:32.653920 USB2 port 7 enabled
765 12:40:32.657175 USB3 port 0 enabled
766 12:40:32.657707 USB3 port 1 enabled
767 12:40:32.660139 USB3 port 2 enabled
768 12:40:32.660672 USB3 port 3 enabled
769 12:40:32.663518 USB2 port 0 scanning...
770 12:40:32.666514 scan_static_bus for USB2 port 0
771 12:40:32.669752 scan_static_bus for USB2 port 0 done
772 12:40:32.677139 scan_bus: bus USB2 port 0 finished in 6 msecs
773 12:40:32.677673 USB2 port 1 scanning...
774 12:40:32.680529 scan_static_bus for USB2 port 1
775 12:40:32.687578 scan_static_bus for USB2 port 1 done
776 12:40:32.690443 scan_bus: bus USB2 port 1 finished in 6 msecs
777 12:40:32.693630 USB2 port 2 scanning...
778 12:40:32.697073 scan_static_bus for USB2 port 2
779 12:40:32.699892 scan_static_bus for USB2 port 2 done
780 12:40:32.703571 scan_bus: bus USB2 port 2 finished in 6 msecs
781 12:40:32.706977 USB2 port 3 scanning...
782 12:40:32.710042 scan_static_bus for USB2 port 3
783 12:40:32.713736 scan_static_bus for USB2 port 3 done
784 12:40:32.717214 scan_bus: bus USB2 port 3 finished in 6 msecs
785 12:40:32.720844 USB2 port 5 scanning...
786 12:40:32.723561 scan_static_bus for USB2 port 5
787 12:40:32.727164 scan_static_bus for USB2 port 5 done
788 12:40:32.733286 scan_bus: bus USB2 port 5 finished in 6 msecs
789 12:40:32.733823 USB2 port 7 scanning...
790 12:40:32.736992 scan_static_bus for USB2 port 7
791 12:40:32.743546 scan_static_bus for USB2 port 7 done
792 12:40:32.746871 scan_bus: bus USB2 port 7 finished in 6 msecs
793 12:40:32.749794 USB3 port 0 scanning...
794 12:40:32.753629 scan_static_bus for USB3 port 0
795 12:40:32.756908 scan_static_bus for USB3 port 0 done
796 12:40:32.760057 scan_bus: bus USB3 port 0 finished in 6 msecs
797 12:40:32.763280 USB3 port 1 scanning...
798 12:40:32.766569 scan_static_bus for USB3 port 1
799 12:40:32.770161 scan_static_bus for USB3 port 1 done
800 12:40:32.773106 scan_bus: bus USB3 port 1 finished in 6 msecs
801 12:40:32.776607 USB3 port 2 scanning...
802 12:40:32.779918 scan_static_bus for USB3 port 2
803 12:40:32.783137 scan_static_bus for USB3 port 2 done
804 12:40:32.789831 scan_bus: bus USB3 port 2 finished in 6 msecs
805 12:40:32.790305 USB3 port 3 scanning...
806 12:40:32.793077 scan_static_bus for USB3 port 3
807 12:40:32.796796 scan_static_bus for USB3 port 3 done
808 12:40:32.802859 scan_bus: bus USB3 port 3 finished in 6 msecs
809 12:40:32.806128 scan_static_bus for USB0 port 0 done
810 12:40:32.809537 scan_bus: bus USB0 port 0 finished in 172 msecs
811 12:40:32.816451 scan_static_bus for PCI: 00:14.0 done
812 12:40:32.819768 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
813 12:40:32.822910 PCI: 00:14.3 scanning...
814 12:40:32.826905 scan_static_bus for PCI: 00:14.3
815 12:40:32.827410 GENERIC: 0.0 enabled
816 12:40:32.833061 scan_static_bus for PCI: 00:14.3 done
817 12:40:32.836679 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
818 12:40:32.839769 PCI: 00:15.0 scanning...
819 12:40:32.843235 scan_static_bus for PCI: 00:15.0
820 12:40:32.843724 I2C: 00:2c enabled
821 12:40:32.846111 I2C: 00:15 enabled
822 12:40:32.850390 scan_static_bus for PCI: 00:15.0 done
823 12:40:32.856249 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
824 12:40:32.856763 PCI: 00:15.1 scanning...
825 12:40:32.860301 scan_static_bus for PCI: 00:15.1
826 12:40:32.866397 scan_static_bus for PCI: 00:15.1 done
827 12:40:32.869650 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
828 12:40:32.872954 PCI: 00:15.2 scanning...
829 12:40:32.876670 scan_static_bus for PCI: 00:15.2
830 12:40:32.877157 GENERIC: 0.0 disabled
831 12:40:32.879601 I2C: 00:15 enabled
832 12:40:32.883190 I2C: 00:10 disabled
833 12:40:32.883574 I2C: 00:10 disabled
834 12:40:32.886189 I2C: 00:2c enabled
835 12:40:32.886771 I2C: 00:40 enabled
836 12:40:32.889531 I2C: 00:10 enabled
837 12:40:32.892752 I2C: 00:39 enabled
838 12:40:32.896249 scan_static_bus for PCI: 00:15.2 done
839 12:40:32.899748 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
840 12:40:32.902765 PCI: 00:15.3 scanning...
841 12:40:32.906683 scan_static_bus for PCI: 00:15.3
842 12:40:32.909402 I2C: 00:36 enabled
843 12:40:32.909920 I2C: 00:10 disabled
844 12:40:32.912922 I2C: 00:0c enabled
845 12:40:32.913312 I2C: 00:50 enabled
846 12:40:32.919790 scan_static_bus for PCI: 00:15.3 done
847 12:40:32.922585 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
848 12:40:32.926092 PCI: 00:19.0 scanning...
849 12:40:32.929766 scan_static_bus for PCI: 00:19.0
850 12:40:32.930293 I2C: 00:1a enabled
851 12:40:32.932798 I2C: 00:1a disabled
852 12:40:32.936036 I2C: 00:1a disabled
853 12:40:32.936458 I2C: 00:28 enabled
854 12:40:32.939584 I2C: 00:29 enabled
855 12:40:32.943281 scan_static_bus for PCI: 00:19.0 done
856 12:40:32.946312 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
857 12:40:32.949322 PCI: 00:1e.2 scanning...
858 12:40:32.952737 scan_generic_bus for PCI: 00:1e.2
859 12:40:32.956556 SPI: 00 enabled
860 12:40:32.962748 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
861 12:40:32.965745 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
862 12:40:32.969166 PCI: 00:1f.0 scanning...
863 12:40:32.972580 scan_static_bus for PCI: 00:1f.0
864 12:40:32.973102 PNP: 0c09.0 enabled
865 12:40:32.976552 PNP: 0c09.0 scanning...
866 12:40:32.979559 scan_static_bus for PNP: 0c09.0
867 12:40:32.983199 scan_static_bus for PNP: 0c09.0 done
868 12:40:32.989211 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
869 12:40:32.992768 scan_static_bus for PCI: 00:1f.0 done
870 12:40:32.995815 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
871 12:40:32.999389 PCI: 00:1f.3 scanning...
872 12:40:33.002356 scan_static_bus for PCI: 00:1f.3
873 12:40:33.005630 GENERIC: 0.0 disabled
874 12:40:33.009015 scan_static_bus for PCI: 00:1f.3 done
875 12:40:33.012841 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
876 12:40:33.015456 PCI: 00:1f.5 scanning...
877 12:40:33.019137 scan_generic_bus for PCI: 00:1f.5
878 12:40:33.022277 scan_generic_bus for PCI: 00:1f.5 done
879 12:40:33.028784 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
880 12:40:33.032244 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
881 12:40:33.036175 scan_static_bus for Root Device done
882 12:40:33.042441 scan_bus: bus Root Device finished in 665 msecs
883 12:40:33.043031 done
884 12:40:33.048550 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1086 ms
885 12:40:33.051997 Chrome EC: UHEPI supported
886 12:40:33.058451 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
887 12:40:33.065583 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
888 12:40:33.068855 SPI flash protection: WPSW=1 SRP0=0
889 12:40:33.072077 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
890 12:40:33.079213 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
891 12:40:33.082136 found VGA at PCI: 00:02.0
892 12:40:33.086110 Setting up VGA for PCI: 00:02.0
893 12:40:33.089033 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
894 12:40:33.095434 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
895 12:40:33.095980 Allocating resources...
896 12:40:33.098523 Reading resources...
897 12:40:33.102188 Root Device read_resources bus 0 link: 0
898 12:40:33.108403 CPU_CLUSTER: 0 read_resources bus 0 link: 0
899 12:40:33.112028 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
900 12:40:33.115056 DOMAIN: 0000 read_resources bus 0 link: 0
901 12:40:33.122839 PCI: 00:04.0 read_resources bus 1 link: 0
902 12:40:33.126469 PCI: 00:04.0 read_resources bus 1 link: 0 done
903 12:40:33.133142 PCI: 00:05.0 read_resources bus 2 link: 0
904 12:40:33.136381 PCI: 00:05.0 read_resources bus 2 link: 0 done
905 12:40:33.140453 PCI: 00:14.0 read_resources bus 0 link: 0
906 12:40:33.144050 USB0 port 0 read_resources bus 0 link: 0
907 12:40:33.152335 USB0 port 0 read_resources bus 0 link: 0 done
908 12:40:33.156313 PCI: 00:14.0 read_resources bus 0 link: 0 done
909 12:40:33.159864 PCI: 00:14.3 read_resources bus 0 link: 0
910 12:40:33.203882 PCI: 00:14.3 read_resources bus 0 link: 0 done
911 12:40:33.204403 PCI: 00:15.0 read_resources bus 0 link: 0
912 12:40:33.204747 PCI: 00:15.0 read_resources bus 0 link: 0 done
913 12:40:33.205067 PCI: 00:15.2 read_resources bus 0 link: 0
914 12:40:33.205684 PCI: 00:15.2 read_resources bus 0 link: 0 done
915 12:40:33.206016 PCI: 00:15.3 read_resources bus 0 link: 0
916 12:40:33.206318 PCI: 00:15.3 read_resources bus 0 link: 0 done
917 12:40:33.208263 PCI: 00:19.0 read_resources bus 0 link: 0
918 12:40:33.208691 PCI: 00:19.0 read_resources bus 0 link: 0 done
919 12:40:33.210878 PCI: 00:1e.2 read_resources bus 3 link: 0
920 12:40:33.217565 PCI: 00:1e.2 read_resources bus 3 link: 0 done
921 12:40:33.221140 PCI: 00:1f.0 read_resources bus 0 link: 0
922 12:40:33.224384 PCI: 00:1f.0 read_resources bus 0 link: 0 done
923 12:40:33.231871 PCI: 00:1f.3 read_resources bus 0 link: 0
924 12:40:33.234263 PCI: 00:1f.3 read_resources bus 0 link: 0 done
925 12:40:33.241521 DOMAIN: 0000 read_resources bus 0 link: 0 done
926 12:40:33.244546 Root Device read_resources bus 0 link: 0 done
927 12:40:33.247700 Done reading resources.
928 12:40:33.254884 Show resources in subtree (Root Device)...After reading.
929 12:40:33.257658 Root Device child on link 0 CPU_CLUSTER: 0
930 12:40:33.261772 CPU_CLUSTER: 0 child on link 0 APIC: 00
931 12:40:33.264443 APIC: 00
932 12:40:33.264965 APIC: 02
933 12:40:33.268369 DOMAIN: 0000 child on link 0 PCI: 00:00.0
934 12:40:33.278370 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
935 12:40:33.287810 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
936 12:40:33.288340 PCI: 00:00.0
937 12:40:33.298181 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
938 12:40:33.307924 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
939 12:40:33.317715 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
940 12:40:33.327522 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
941 12:40:33.338087 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
942 12:40:33.344327 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
943 12:40:33.354260 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
944 12:40:33.364356 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
945 12:40:33.374325 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
946 12:40:33.384521 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
947 12:40:33.390819 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
948 12:40:33.401216 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
949 12:40:33.411129 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
950 12:40:33.421582 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
951 12:40:33.427752 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
952 12:40:33.437612 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
953 12:40:33.447992 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
954 12:40:33.457540 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
955 12:40:33.467323 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
956 12:40:33.467845 PCI: 00:02.0
957 12:40:33.480589 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
958 12:40:33.490745 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
959 12:40:33.497176 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
960 12:40:33.503952 PCI: 00:04.0 child on link 0 GENERIC: 0.0
961 12:40:33.513613 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
962 12:40:33.514123 GENERIC: 0.0
963 12:40:33.517950 PCI: 00:05.0 child on link 0 GENERIC: 0.0
964 12:40:33.530638 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
965 12:40:33.531152 GENERIC: 0.0
966 12:40:33.533943 PCI: 00:08.0
967 12:40:33.543737 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
968 12:40:33.547021 PCI: 00:14.0 child on link 0 USB0 port 0
969 12:40:33.557398 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
970 12:40:33.560381 USB0 port 0 child on link 0 USB2 port 0
971 12:40:33.563551 USB2 port 0
972 12:40:33.564067 USB2 port 1
973 12:40:33.566690 USB2 port 2
974 12:40:33.567111 USB2 port 3
975 12:40:33.570154 USB2 port 4
976 12:40:33.570573 USB2 port 5
977 12:40:33.573771 USB2 port 6
978 12:40:33.574306 USB2 port 7
979 12:40:33.577480 USB3 port 0
980 12:40:33.580577 USB3 port 1
981 12:40:33.581090 USB3 port 2
982 12:40:33.584076 USB3 port 3
983 12:40:33.584595 PCI: 00:14.2
984 12:40:33.586475 PCI: 00:14.3 child on link 0 GENERIC: 0.0
985 12:40:33.596645 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
986 12:40:33.600115 GENERIC: 0.0
987 12:40:33.600633 PCI: 00:14.5
988 12:40:33.609977 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 12:40:33.616273 PCI: 00:15.0 child on link 0 I2C: 00:2c
990 12:40:33.627010 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
991 12:40:33.627536 I2C: 00:2c
992 12:40:33.629746 I2C: 00:15
993 12:40:33.630174 PCI: 00:15.1
994 12:40:33.639480 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 12:40:33.646545 PCI: 00:15.2 child on link 0 GENERIC: 0.0
996 12:40:33.656120 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
997 12:40:33.656568 GENERIC: 0.0
998 12:40:33.659877 I2C: 00:15
999 12:40:33.660320 I2C: 00:10
1000 12:40:33.660777 I2C: 00:10
1001 12:40:33.662628 I2C: 00:2c
1002 12:40:33.663091 I2C: 00:40
1003 12:40:33.666441 I2C: 00:10
1004 12:40:33.667072 I2C: 00:39
1005 12:40:33.672862 PCI: 00:15.3 child on link 0 I2C: 00:36
1006 12:40:33.682519 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1007 12:40:33.683103 I2C: 00:36
1008 12:40:33.686426 I2C: 00:10
1009 12:40:33.686998 I2C: 00:0c
1010 12:40:33.689500 I2C: 00:50
1011 12:40:33.690027 PCI: 00:16.0
1012 12:40:33.699153 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 12:40:33.703271 PCI: 00:19.0 child on link 0 I2C: 00:1a
1014 12:40:33.712387 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1015 12:40:33.715926 I2C: 00:1a
1016 12:40:33.716441 I2C: 00:1a
1017 12:40:33.719008 I2C: 00:1a
1018 12:40:33.719419 I2C: 00:28
1019 12:40:33.722923 I2C: 00:29
1020 12:40:33.723440 PCI: 00:19.2
1021 12:40:33.735607 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1022 12:40:33.745818 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1023 12:40:33.746345 PCI: 00:1a.0
1024 12:40:33.755574 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 12:40:33.759437 PCI: 00:1e.0
1026 12:40:33.762412 PCI: 00:1e.2 child on link 0 SPI: 00
1027 12:40:33.772291 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1028 12:40:33.772835 SPI: 00
1029 12:40:33.775549 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1030 12:40:33.785852 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1031 12:40:33.788834 PNP: 0c09.0
1032 12:40:33.795747 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1033 12:40:33.798743 PCI: 00:1f.2
1034 12:40:33.808771 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1035 12:40:33.815040 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1036 12:40:33.822815 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1037 12:40:33.829679 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1038 12:40:33.839764 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1039 12:40:33.842989 GENERIC: 0.0
1040 12:40:33.843399 PCI: 00:1f.5
1041 12:40:33.852658 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1042 12:40:33.859946 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1043 12:40:33.869250 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1044 12:40:33.872953 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1045 12:40:33.882480 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1046 12:40:33.889574 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1047 12:40:33.895868 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1048 12:40:33.899350 DOMAIN: 0000: Resource ranges:
1049 12:40:33.902487 * Base: 1000, Size: 800, Tag: 100
1050 12:40:33.906217 * Base: 1900, Size: e700, Tag: 100
1051 12:40:33.912530 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1052 12:40:33.919184 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1053 12:40:33.926134 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1054 12:40:33.932754 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1055 12:40:33.943206 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1056 12:40:33.950135 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1057 12:40:33.955459 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1058 12:40:33.965658 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1059 12:40:33.972202 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1060 12:40:33.979090 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1061 12:40:33.988456 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1062 12:40:33.995227 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1063 12:40:34.002053 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1064 12:40:34.011863 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1065 12:40:34.018881 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1066 12:40:34.025613 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1067 12:40:34.035306 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1068 12:40:34.041861 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1069 12:40:34.048628 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1070 12:40:34.059053 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1071 12:40:34.065264 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1072 12:40:34.071877 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1073 12:40:34.081660 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1074 12:40:34.088663 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1075 12:40:34.092054 DOMAIN: 0000: Resource ranges:
1076 12:40:34.095327 * Base: 7fc00000, Size: 40400000, Tag: 200
1077 12:40:34.097997 * Base: d0000000, Size: 2b000000, Tag: 200
1078 12:40:34.104807 * Base: fb001000, Size: 2fff000, Tag: 200
1079 12:40:34.107914 * Base: fe010000, Size: 22000, Tag: 200
1080 12:40:34.111634 * Base: fe033000, Size: a4d000, Tag: 200
1081 12:40:34.118151 * Base: fea88000, Size: 2f8000, Tag: 200
1082 12:40:34.121509 * Base: fed88000, Size: 8000, Tag: 200
1083 12:40:34.125711 * Base: fed93000, Size: d000, Tag: 200
1084 12:40:34.128162 * Base: feda2000, Size: 125e000, Tag: 200
1085 12:40:34.134796 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1086 12:40:34.141368 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1087 12:40:34.147955 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1088 12:40:34.154922 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1089 12:40:34.161880 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1090 12:40:34.168718 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1091 12:40:34.174516 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1092 12:40:34.181604 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1093 12:40:34.187961 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1094 12:40:34.194906 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1095 12:40:34.201584 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1096 12:40:34.207893 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1097 12:40:34.214975 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1098 12:40:34.221208 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1099 12:40:34.228036 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1100 12:40:34.234292 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1101 12:40:34.241101 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1102 12:40:34.248023 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1103 12:40:34.254115 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1104 12:40:34.261121 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1105 12:40:34.267827 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1106 12:40:34.274956 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1107 12:40:34.281144 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1108 12:40:34.284992 Root Device assign_resources, bus 0 link: 0
1109 12:40:34.291497 DOMAIN: 0000 assign_resources, bus 0 link: 0
1110 12:40:34.297393 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1111 12:40:34.307402 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1112 12:40:34.314056 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1113 12:40:34.324157 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1114 12:40:34.327205 PCI: 00:04.0 assign_resources, bus 1 link: 0
1115 12:40:34.330345 PCI: 00:04.0 assign_resources, bus 1 link: 0
1116 12:40:34.341103 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1117 12:40:34.344216 PCI: 00:05.0 assign_resources, bus 2 link: 0
1118 12:40:34.347297 PCI: 00:05.0 assign_resources, bus 2 link: 0
1119 12:40:34.358013 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1120 12:40:34.364052 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1121 12:40:34.370934 PCI: 00:14.0 assign_resources, bus 0 link: 0
1122 12:40:34.373997 PCI: 00:14.0 assign_resources, bus 0 link: 0
1123 12:40:34.384382 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1124 12:40:34.386937 PCI: 00:14.3 assign_resources, bus 0 link: 0
1125 12:40:34.390739 PCI: 00:14.3 assign_resources, bus 0 link: 0
1126 12:40:34.400942 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1127 12:40:34.407374 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1128 12:40:34.411304 PCI: 00:15.0 assign_resources, bus 0 link: 0
1129 12:40:34.417570 PCI: 00:15.0 assign_resources, bus 0 link: 0
1130 12:40:34.425297 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1131 12:40:34.434317 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1132 12:40:34.437464 PCI: 00:15.2 assign_resources, bus 0 link: 0
1133 12:40:34.441088 PCI: 00:15.2 assign_resources, bus 0 link: 0
1134 12:40:34.451103 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1135 12:40:34.454572 PCI: 00:15.3 assign_resources, bus 0 link: 0
1136 12:40:34.461344 PCI: 00:15.3 assign_resources, bus 0 link: 0
1137 12:40:34.467736 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1138 12:40:34.479069 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1139 12:40:34.481158 PCI: 00:19.0 assign_resources, bus 0 link: 0
1140 12:40:34.484529 PCI: 00:19.0 assign_resources, bus 0 link: 0
1141 12:40:34.494372 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1142 12:40:34.501296 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1143 12:40:34.510767 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1144 12:40:34.513898 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1145 12:40:34.516957 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1146 12:40:34.524336 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1147 12:40:34.527986 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1148 12:40:34.533788 LPC: Trying to open IO window from 800 size 1ff
1149 12:40:34.541181 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1150 12:40:34.550697 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1151 12:40:34.553922 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1152 12:40:34.557967 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1153 12:40:34.567549 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1154 12:40:34.570406 DOMAIN: 0000 assign_resources, bus 0 link: 0
1155 12:40:34.577861 Root Device assign_resources, bus 0 link: 0
1156 12:40:34.578411 Done setting resources.
1157 12:40:34.583689 Show resources in subtree (Root Device)...After assigning values.
1158 12:40:34.591285 Root Device child on link 0 CPU_CLUSTER: 0
1159 12:40:34.593822 CPU_CLUSTER: 0 child on link 0 APIC: 00
1160 12:40:34.594278 APIC: 00
1161 12:40:34.597413 APIC: 02
1162 12:40:34.600326 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1163 12:40:34.610564 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1164 12:40:34.619846 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1165 12:40:34.620262 PCI: 00:00.0
1166 12:40:34.630242 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1167 12:40:34.640287 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1168 12:40:34.649945 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1169 12:40:34.659831 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1170 12:40:34.666654 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1171 12:40:34.676644 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1172 12:40:34.686349 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1173 12:40:34.696018 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1174 12:40:34.706662 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1175 12:40:34.716477 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1176 12:40:34.722838 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1177 12:40:34.732371 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1178 12:40:34.742679 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1179 12:40:34.752872 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1180 12:40:34.758919 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1181 12:40:34.769780 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1182 12:40:34.779105 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1183 12:40:34.789477 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1184 12:40:34.799219 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1185 12:40:34.799777 PCI: 00:02.0
1186 12:40:34.812552 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1187 12:40:34.822779 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1188 12:40:34.832556 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1189 12:40:34.835224 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1190 12:40:34.845292 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1191 12:40:34.848415 GENERIC: 0.0
1192 12:40:34.851653 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1193 12:40:34.862553 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1194 12:40:34.865677 GENERIC: 0.0
1195 12:40:34.866191 PCI: 00:08.0
1196 12:40:34.875556 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1197 12:40:34.882084 PCI: 00:14.0 child on link 0 USB0 port 0
1198 12:40:34.891820 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1199 12:40:34.895721 USB0 port 0 child on link 0 USB2 port 0
1200 12:40:34.898734 USB2 port 0
1201 12:40:34.899329 USB2 port 1
1202 12:40:34.901463 USB2 port 2
1203 12:40:34.901918 USB2 port 3
1204 12:40:34.904988 USB2 port 4
1205 12:40:34.905543 USB2 port 5
1206 12:40:34.908190 USB2 port 6
1207 12:40:34.908644 USB2 port 7
1208 12:40:34.911974 USB3 port 0
1209 12:40:34.912532 USB3 port 1
1210 12:40:34.915562 USB3 port 2
1211 12:40:34.916123 USB3 port 3
1212 12:40:34.918409 PCI: 00:14.2
1213 12:40:34.921645 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1214 12:40:34.931526 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1215 12:40:34.935014 GENERIC: 0.0
1216 12:40:34.935433 PCI: 00:14.5
1217 12:40:34.948508 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1218 12:40:34.951958 PCI: 00:15.0 child on link 0 I2C: 00:2c
1219 12:40:34.961454 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1220 12:40:34.962022 I2C: 00:2c
1221 12:40:34.964782 I2C: 00:15
1222 12:40:34.965317 PCI: 00:15.1
1223 12:40:34.974941 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1224 12:40:34.981825 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1225 12:40:34.991248 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1226 12:40:34.994629 GENERIC: 0.0
1227 12:40:34.995180 I2C: 00:15
1228 12:40:34.995543 I2C: 00:10
1229 12:40:34.997933 I2C: 00:10
1230 12:40:34.998486 I2C: 00:2c
1231 12:40:35.001004 I2C: 00:40
1232 12:40:35.001454 I2C: 00:10
1233 12:40:35.004304 I2C: 00:39
1234 12:40:35.008809 PCI: 00:15.3 child on link 0 I2C: 00:36
1235 12:40:35.017537 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1236 12:40:35.020883 I2C: 00:36
1237 12:40:35.021337 I2C: 00:10
1238 12:40:35.023904 I2C: 00:0c
1239 12:40:35.024335 I2C: 00:50
1240 12:40:35.027280 PCI: 00:16.0
1241 12:40:35.037937 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1242 12:40:35.040562 PCI: 00:19.0 child on link 0 I2C: 00:1a
1243 12:40:35.050761 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1244 12:40:35.054296 I2C: 00:1a
1245 12:40:35.054766 I2C: 00:1a
1246 12:40:35.057477 I2C: 00:1a
1247 12:40:35.058028 I2C: 00:28
1248 12:40:35.058388 I2C: 00:29
1249 12:40:35.060644 PCI: 00:19.2
1250 12:40:35.070662 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1251 12:40:35.080653 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1252 12:40:35.083997 PCI: 00:1a.0
1253 12:40:35.093806 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1254 12:40:35.097414 PCI: 00:1e.0
1255 12:40:35.100945 PCI: 00:1e.2 child on link 0 SPI: 00
1256 12:40:35.110206 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1257 12:40:35.110812 SPI: 00
1258 12:40:35.117094 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1259 12:40:35.123325 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1260 12:40:35.126818 PNP: 0c09.0
1261 12:40:35.133368 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1262 12:40:35.137349 PCI: 00:1f.2
1263 12:40:35.146338 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1264 12:40:35.153258 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1265 12:40:35.159716 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1266 12:40:35.170589 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1267 12:40:35.180357 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1268 12:40:35.183255 GENERIC: 0.0
1269 12:40:35.183711 PCI: 00:1f.5
1270 12:40:35.193325 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1271 12:40:35.196475 Done allocating resources.
1272 12:40:35.202999 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2098 ms
1273 12:40:35.206481 Enabling resources...
1274 12:40:35.209864 PCI: 00:00.0 subsystem <- 8086/4e22
1275 12:40:35.213915 PCI: 00:00.0 cmd <- 06
1276 12:40:35.216346 PCI: 00:02.0 subsystem <- 8086/4e55
1277 12:40:35.216861 PCI: 00:02.0 cmd <- 03
1278 12:40:35.222922 PCI: 00:04.0 subsystem <- 8086/4e03
1279 12:40:35.223461 PCI: 00:04.0 cmd <- 02
1280 12:40:35.226119 PCI: 00:05.0 bridge ctrl <- 0003
1281 12:40:35.229906 PCI: 00:05.0 subsystem <- 8086/4e19
1282 12:40:35.233149 PCI: 00:05.0 cmd <- 02
1283 12:40:35.236587 PCI: 00:08.0 cmd <- 06
1284 12:40:35.239902 PCI: 00:14.0 subsystem <- 8086/4ded
1285 12:40:35.243358 PCI: 00:14.0 cmd <- 02
1286 12:40:35.246094 PCI: 00:14.3 subsystem <- 8086/4df0
1287 12:40:35.250295 PCI: 00:14.3 cmd <- 02
1288 12:40:35.253519 PCI: 00:14.5 subsystem <- 8086/4df8
1289 12:40:35.253933 PCI: 00:14.5 cmd <- 06
1290 12:40:35.259558 PCI: 00:15.0 subsystem <- 8086/4de8
1291 12:40:35.259981 PCI: 00:15.0 cmd <- 02
1292 12:40:35.262975 PCI: 00:15.1 subsystem <- 8086/4de9
1293 12:40:35.266194 PCI: 00:15.1 cmd <- 02
1294 12:40:35.269689 PCI: 00:15.2 subsystem <- 8086/4dea
1295 12:40:35.272733 PCI: 00:15.2 cmd <- 02
1296 12:40:35.276061 PCI: 00:15.3 subsystem <- 8086/4deb
1297 12:40:35.279287 PCI: 00:15.3 cmd <- 02
1298 12:40:35.283360 PCI: 00:16.0 subsystem <- 8086/4de0
1299 12:40:35.286376 PCI: 00:16.0 cmd <- 02
1300 12:40:35.289492 PCI: 00:19.0 subsystem <- 8086/4dc5
1301 12:40:35.292800 PCI: 00:19.0 cmd <- 02
1302 12:40:35.295865 PCI: 00:19.2 subsystem <- 8086/4dc7
1303 12:40:35.296411 PCI: 00:19.2 cmd <- 06
1304 12:40:35.303276 PCI: 00:1a.0 subsystem <- 8086/4dc4
1305 12:40:35.303844 PCI: 00:1a.0 cmd <- 06
1306 12:40:35.305837 PCI: 00:1e.2 subsystem <- 8086/4daa
1307 12:40:35.309110 PCI: 00:1e.2 cmd <- 06
1308 12:40:35.312461 PCI: 00:1f.0 subsystem <- 8086/4d87
1309 12:40:35.315545 PCI: 00:1f.0 cmd <- 407
1310 12:40:35.319249 PCI: 00:1f.3 subsystem <- 8086/4dc8
1311 12:40:35.322678 PCI: 00:1f.3 cmd <- 02
1312 12:40:35.326226 PCI: 00:1f.5 subsystem <- 8086/4da4
1313 12:40:35.329158 PCI: 00:1f.5 cmd <- 406
1314 12:40:35.332791 done.
1315 12:40:35.335403 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1316 12:40:35.339054 Initializing devices...
1317 12:40:35.342473 Root Device init
1318 12:40:35.342974 mainboard: EC init
1319 12:40:35.349237 Chrome EC: Set SMI mask to 0x0000000000000000
1320 12:40:35.355562 Chrome EC: clear events_b mask to 0x0000000000000000
1321 12:40:35.359709 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1322 12:40:35.365573 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1323 12:40:35.371976 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1324 12:40:35.375640 Chrome EC: Set WAKE mask to 0x0000000000000000
1325 12:40:35.383230 Root Device init finished in 36 msecs
1326 12:40:35.386478 PCI: 00:00.0 init
1327 12:40:35.387082 CPU TDP = 6 Watts
1328 12:40:35.390381 CPU PL1 = 7 Watts
1329 12:40:35.393101 CPU PL2 = 12 Watts
1330 12:40:35.396688 PCI: 00:00.0 init finished in 6 msecs
1331 12:40:35.397408 PCI: 00:02.0 init
1332 12:40:35.400485 GMA: Found VBT in CBFS
1333 12:40:35.403257 GMA: Found valid VBT in CBFS
1334 12:40:35.409966 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1335 12:40:35.416093 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1336 12:40:35.419505 PCI: 00:02.0 init finished in 18 msecs
1337 12:40:35.423143 PCI: 00:08.0 init
1338 12:40:35.427636 PCI: 00:08.0 init finished in 0 msecs
1339 12:40:35.429802 PCI: 00:14.0 init
1340 12:40:35.433324 XHCI: Updated LFPS sampling OFF time to 9 ms
1341 12:40:35.436444 PCI: 00:14.0 init finished in 4 msecs
1342 12:40:35.439914 PCI: 00:15.0 init
1343 12:40:35.442965 I2C bus 0 version 0x3230302a
1344 12:40:35.446824 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1345 12:40:35.449814 PCI: 00:15.0 init finished in 6 msecs
1346 12:40:35.452622 PCI: 00:15.1 init
1347 12:40:35.456473 I2C bus 1 version 0x3230302a
1348 12:40:35.459600 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1349 12:40:35.463026 PCI: 00:15.1 init finished in 6 msecs
1350 12:40:35.463549 PCI: 00:15.2 init
1351 12:40:35.466153 I2C bus 2 version 0x3230302a
1352 12:40:35.469824 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1353 12:40:35.476682 PCI: 00:15.2 init finished in 6 msecs
1354 12:40:35.477253 PCI: 00:15.3 init
1355 12:40:35.479820 I2C bus 3 version 0x3230302a
1356 12:40:35.482972 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1357 12:40:35.486156 PCI: 00:15.3 init finished in 6 msecs
1358 12:40:35.489971 PCI: 00:16.0 init
1359 12:40:35.493347 PCI: 00:16.0 init finished in 0 msecs
1360 12:40:35.496241 PCI: 00:19.0 init
1361 12:40:35.500625 I2C bus 4 version 0x3230302a
1362 12:40:35.502723 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1363 12:40:35.506335 PCI: 00:19.0 init finished in 6 msecs
1364 12:40:35.509624 PCI: 00:1a.0 init
1365 12:40:35.513199 PCI: 00:1a.0 init finished in 0 msecs
1366 12:40:35.516004 PCI: 00:1f.0 init
1367 12:40:35.519448 IOAPIC: Initializing IOAPIC at 0xfec00000
1368 12:40:35.522936 IOAPIC: Bootstrap Processor Local APIC = 0x00
1369 12:40:35.525853 IOAPIC: ID = 0x02
1370 12:40:35.529265 IOAPIC: Dumping registers
1371 12:40:35.529724 reg 0x0000: 0x02000000
1372 12:40:35.533247 reg 0x0001: 0x00770020
1373 12:40:35.536186 reg 0x0002: 0x00000000
1374 12:40:35.539267 PCI: 00:1f.0 init finished in 21 msecs
1375 12:40:35.542546 PCI: 00:1f.2 init
1376 12:40:35.543005 Disabling ACPI via APMC.
1377 12:40:35.548764 APMC done.
1378 12:40:35.552005 PCI: 00:1f.2 init finished in 6 msecs
1379 12:40:35.563222 PNP: 0c09.0 init
1380 12:40:35.566531 Google Chrome EC uptime: 6.534 seconds
1381 12:40:35.573397 Google Chrome AP resets since EC boot: 0
1382 12:40:35.576551 Google Chrome most recent AP reset causes:
1383 12:40:35.583460 Google Chrome EC reset flags at last EC boot: reset-pin
1384 12:40:35.586112 PNP: 0c09.0 init finished in 18 msecs
1385 12:40:35.586566 Devices initialized
1386 12:40:35.590408 Show all devs... After init.
1387 12:40:35.593428 Root Device: enabled 1
1388 12:40:35.596597 CPU_CLUSTER: 0: enabled 1
1389 12:40:35.599461 DOMAIN: 0000: enabled 1
1390 12:40:35.599913 PCI: 00:00.0: enabled 1
1391 12:40:35.603040 PCI: 00:02.0: enabled 1
1392 12:40:35.606114 PCI: 00:04.0: enabled 1
1393 12:40:35.606706 PCI: 00:05.0: enabled 1
1394 12:40:35.609738 PCI: 00:09.0: enabled 0
1395 12:40:35.612821 PCI: 00:12.6: enabled 0
1396 12:40:35.616042 PCI: 00:14.0: enabled 1
1397 12:40:35.616494 PCI: 00:14.1: enabled 0
1398 12:40:35.619266 PCI: 00:14.2: enabled 0
1399 12:40:35.623115 PCI: 00:14.3: enabled 1
1400 12:40:35.625859 PCI: 00:14.5: enabled 1
1401 12:40:35.626314 PCI: 00:15.0: enabled 1
1402 12:40:35.629537 PCI: 00:15.1: enabled 1
1403 12:40:35.632562 PCI: 00:15.2: enabled 1
1404 12:40:35.635817 PCI: 00:15.3: enabled 1
1405 12:40:35.636273 PCI: 00:16.0: enabled 1
1406 12:40:35.639436 PCI: 00:16.1: enabled 0
1407 12:40:35.642862 PCI: 00:16.4: enabled 0
1408 12:40:35.643538 PCI: 00:16.5: enabled 0
1409 12:40:35.646086 PCI: 00:17.0: enabled 0
1410 12:40:35.648996 PCI: 00:19.0: enabled 1
1411 12:40:35.652400 PCI: 00:19.1: enabled 0
1412 12:40:35.652907 PCI: 00:19.2: enabled 1
1413 12:40:35.655600 PCI: 00:1a.0: enabled 1
1414 12:40:35.659299 PCI: 00:1c.0: enabled 0
1415 12:40:35.662781 PCI: 00:1c.1: enabled 0
1416 12:40:35.663508 PCI: 00:1c.2: enabled 0
1417 12:40:35.665871 PCI: 00:1c.3: enabled 0
1418 12:40:35.669094 PCI: 00:1c.4: enabled 0
1419 12:40:35.672336 PCI: 00:1c.5: enabled 0
1420 12:40:35.672752 PCI: 00:1c.6: enabled 0
1421 12:40:35.676088 PCI: 00:1c.7: enabled 1
1422 12:40:35.679604 PCI: 00:1e.0: enabled 0
1423 12:40:35.680125 PCI: 00:1e.1: enabled 0
1424 12:40:35.682564 PCI: 00:1e.2: enabled 1
1425 12:40:35.686163 PCI: 00:1e.3: enabled 0
1426 12:40:35.689274 PCI: 00:1f.0: enabled 1
1427 12:40:35.689834 PCI: 00:1f.1: enabled 0
1428 12:40:35.692827 PCI: 00:1f.2: enabled 1
1429 12:40:35.696488 PCI: 00:1f.3: enabled 1
1430 12:40:35.698903 PCI: 00:1f.4: enabled 0
1431 12:40:35.699368 PCI: 00:1f.5: enabled 1
1432 12:40:35.702925 PCI: 00:1f.7: enabled 0
1433 12:40:35.706255 GENERIC: 0.0: enabled 1
1434 12:40:35.709204 GENERIC: 0.0: enabled 1
1435 12:40:35.709765 USB0 port 0: enabled 1
1436 12:40:35.712872 GENERIC: 0.0: enabled 1
1437 12:40:35.715863 I2C: 00:2c: enabled 1
1438 12:40:35.716426 I2C: 00:15: enabled 1
1439 12:40:35.719302 GENERIC: 0.0: enabled 0
1440 12:40:35.722056 I2C: 00:15: enabled 1
1441 12:40:35.722520 I2C: 00:10: enabled 0
1442 12:40:35.725319 I2C: 00:10: enabled 0
1443 12:40:35.728787 I2C: 00:2c: enabled 1
1444 12:40:35.729246 I2C: 00:40: enabled 1
1445 12:40:35.732087 I2C: 00:10: enabled 1
1446 12:40:35.735475 I2C: 00:39: enabled 1
1447 12:40:35.735954 I2C: 00:36: enabled 1
1448 12:40:35.739299 I2C: 00:10: enabled 0
1449 12:40:35.742217 I2C: 00:0c: enabled 1
1450 12:40:35.742786 I2C: 00:50: enabled 1
1451 12:40:35.745978 I2C: 00:1a: enabled 1
1452 12:40:35.749132 I2C: 00:1a: enabled 0
1453 12:40:35.752014 I2C: 00:1a: enabled 0
1454 12:40:35.752473 I2C: 00:28: enabled 1
1455 12:40:35.755250 I2C: 00:29: enabled 1
1456 12:40:35.759027 PCI: 00:00.0: enabled 1
1457 12:40:35.759492 SPI: 00: enabled 1
1458 12:40:35.762212 PNP: 0c09.0: enabled 1
1459 12:40:35.765877 GENERIC: 0.0: enabled 0
1460 12:40:35.766333 USB2 port 0: enabled 1
1461 12:40:35.768626 USB2 port 1: enabled 1
1462 12:40:35.772136 USB2 port 2: enabled 1
1463 12:40:35.772594 USB2 port 3: enabled 1
1464 12:40:35.775304 USB2 port 4: enabled 0
1465 12:40:35.778678 USB2 port 5: enabled 1
1466 12:40:35.782425 USB2 port 6: enabled 0
1467 12:40:35.783030 USB2 port 7: enabled 1
1468 12:40:35.785263 USB3 port 0: enabled 1
1469 12:40:35.789287 USB3 port 1: enabled 1
1470 12:40:35.789841 USB3 port 2: enabled 1
1471 12:40:35.791730 USB3 port 3: enabled 1
1472 12:40:35.795559 APIC: 00: enabled 1
1473 12:40:35.796074 APIC: 02: enabled 1
1474 12:40:35.798759 PCI: 00:08.0: enabled 1
1475 12:40:35.805827 BS: BS_DEV_INIT run times (exec / console): 25 / 437 ms
1476 12:40:35.809071 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1477 12:40:35.811689 ELOG: NV offset 0xbfa000 size 0x1000
1478 12:40:35.819376 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1479 12:40:35.826371 ELOG: Event(17) added with size 13 at 2023-08-30 12:40:35 UTC
1480 12:40:35.832861 ELOG: Event(92) added with size 9 at 2023-08-30 12:40:35 UTC
1481 12:40:35.839555 ELOG: Event(93) added with size 9 at 2023-08-30 12:40:35 UTC
1482 12:40:35.846960 ELOG: Event(9E) added with size 10 at 2023-08-30 12:40:35 UTC
1483 12:40:35.852659 ELOG: Event(9F) added with size 14 at 2023-08-30 12:40:35 UTC
1484 12:40:35.856222 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1485 12:40:35.862827 ELOG: Event(A1) added with size 10 at 2023-08-30 12:40:35 UTC
1486 12:40:35.872623 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1487 12:40:35.879345 ELOG: Event(A0) added with size 9 at 2023-08-30 12:40:35 UTC
1488 12:40:35.882568 elog_add_boot_reason: Logged dev mode boot
1489 12:40:35.889050 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1490 12:40:35.889506 Finalize devices...
1491 12:40:35.892850 Devices finalized
1492 12:40:35.895951 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1493 12:40:35.902888 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1494 12:40:35.909334 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1495 12:40:35.912688 ME: HFSTS1 : 0x80030045
1496 12:40:35.915748 ME: HFSTS2 : 0x30280136
1497 12:40:35.919334 ME: HFSTS3 : 0x00000050
1498 12:40:35.925639 ME: HFSTS4 : 0x00004000
1499 12:40:35.929942 ME: HFSTS5 : 0x00000000
1500 12:40:35.932489 ME: HFSTS6 : 0x40400006
1501 12:40:35.935833 ME: Manufacturing Mode : NO
1502 12:40:35.939101 ME: FW Partition Table : OK
1503 12:40:35.942127 ME: Bringup Loader Failure : NO
1504 12:40:35.945878 ME: Firmware Init Complete : NO
1505 12:40:35.949214 ME: Boot Options Present : NO
1506 12:40:35.952021 ME: Update In Progress : NO
1507 12:40:35.955762 ME: D0i3 Support : YES
1508 12:40:35.958963 ME: Low Power State Enabled : NO
1509 12:40:35.962709 ME: CPU Replaced : YES
1510 12:40:35.965737 ME: CPU Replacement Valid : YES
1511 12:40:35.969453 ME: Current Working State : 5
1512 12:40:35.972227 ME: Current Operation State : 1
1513 12:40:35.975888 ME: Current Operation Mode : 3
1514 12:40:35.979453 ME: Error Code : 0
1515 12:40:35.982376 ME: CPU Debug Disabled : YES
1516 12:40:35.985497 ME: TXT Support : NO
1517 12:40:35.992275 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1518 12:40:35.999020 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1519 12:40:36.002048 ACPI: Writing ACPI tables at 76b27000.
1520 12:40:36.002505 ACPI: * FACS
1521 12:40:36.005748 ACPI: * DSDT
1522 12:40:36.008911 Ramoops buffer: 0x100000@0x76a26000.
1523 12:40:36.012236 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1524 12:40:36.018521 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1525 12:40:36.022204 Google Chrome EC: version:
1526 12:40:36.025112 ro: magolor_1.1.9999-103b6f9
1527 12:40:36.028797 rw: magolor_1.1.9999-103b6f9
1528 12:40:36.029257 running image: 1
1529 12:40:36.035938 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1530 12:40:36.039985 ACPI: * FADT
1531 12:40:36.040552 SCI is IRQ9
1532 12:40:36.045920 ACPI: added table 1/32, length now 40
1533 12:40:36.046483 ACPI: * SSDT
1534 12:40:36.049563 Found 1 CPU(s) with 2 core(s) each.
1535 12:40:36.052799 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1536 12:40:36.059414 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1537 12:40:36.062391 Could not locate 'wifi_sar' in VPD.
1538 12:40:36.065851 Checking CBFS for default SAR values
1539 12:40:36.072595 wifi_sar_defaults.hex has bad len in CBFS
1540 12:40:36.075474 failed from getting SAR limits!
1541 12:40:36.078895 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1542 12:40:36.086137 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1543 12:40:36.089235 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1544 12:40:36.095981 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1545 12:40:36.098947 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1546 12:40:36.105648 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1547 12:40:36.108910 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1548 12:40:36.115447 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1549 12:40:36.122229 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1550 12:40:36.128660 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1551 12:40:36.132016 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1552 12:40:36.138866 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1553 12:40:36.142225 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1554 12:40:36.149103 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1555 12:40:36.152259 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1556 12:40:36.159840 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1557 12:40:36.163150 PS2K: Passing 101 keymaps to kernel
1558 12:40:36.169399 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1559 12:40:36.176516 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1560 12:40:36.179834 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1561 12:40:36.186766 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1562 12:40:36.190008 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1563 12:40:36.197025 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1564 12:40:36.203144 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1565 12:40:36.206396 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1566 12:40:36.213521 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1567 12:40:36.219818 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1568 12:40:36.223368 ACPI: added table 2/32, length now 44
1569 12:40:36.227022 ACPI: * MCFG
1570 12:40:36.229849 ACPI: added table 3/32, length now 48
1571 12:40:36.230400 ACPI: * TPM2
1572 12:40:36.232828 TPM2 log created at 0x76a16000
1573 12:40:36.236582 ACPI: added table 4/32, length now 52
1574 12:40:36.239750 ACPI: * MADT
1575 12:40:36.240302 SCI is IRQ9
1576 12:40:36.243150 ACPI: added table 5/32, length now 56
1577 12:40:36.247306 current = 76b2d580
1578 12:40:36.247852 ACPI: * DMAR
1579 12:40:36.252750 ACPI: added table 6/32, length now 60
1580 12:40:36.256869 ACPI: added table 7/32, length now 64
1581 12:40:36.257431 ACPI: * HPET
1582 12:40:36.260011 ACPI: added table 8/32, length now 68
1583 12:40:36.262537 ACPI: done.
1584 12:40:36.266420 ACPI tables: 26304 bytes.
1585 12:40:36.269656 smbios_write_tables: 76a15000
1586 12:40:36.273966 EC returned error result code 3
1587 12:40:36.275706 Couldn't obtain OEM name from CBI
1588 12:40:36.276161 Create SMBIOS type 16
1589 12:40:36.279346 Create SMBIOS type 17
1590 12:40:36.282543 GENERIC: 0.0 (WIFI Device)
1591 12:40:36.286159 SMBIOS tables: 913 bytes.
1592 12:40:36.289656 Writing table forward entry at 0x00000500
1593 12:40:36.296067 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1594 12:40:36.299794 Writing coreboot table at 0x76b4b000
1595 12:40:36.306782 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1596 12:40:36.309554 1. 0000000000001000-000000000009ffff: RAM
1597 12:40:36.316529 2. 00000000000a0000-00000000000fffff: RESERVED
1598 12:40:36.319259 3. 0000000000100000-0000000076a14fff: RAM
1599 12:40:36.325707 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1600 12:40:36.329293 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1601 12:40:36.335983 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1602 12:40:36.338926 7. 0000000077000000-000000007fbfffff: RESERVED
1603 12:40:36.345747 8. 00000000c0000000-00000000cfffffff: RESERVED
1604 12:40:36.349047 9. 00000000fb000000-00000000fb000fff: RESERVED
1605 12:40:36.355439 10. 00000000fe000000-00000000fe00ffff: RESERVED
1606 12:40:36.358722 11. 00000000fea80000-00000000fea87fff: RESERVED
1607 12:40:36.362246 12. 00000000fed80000-00000000fed87fff: RESERVED
1608 12:40:36.369363 13. 00000000fed90000-00000000fed92fff: RESERVED
1609 12:40:36.372448 14. 00000000feda0000-00000000feda1fff: RESERVED
1610 12:40:36.379321 15. 0000000100000000-00000001803fffff: RAM
1611 12:40:36.379891 Passing 4 GPIOs to payload:
1612 12:40:36.385820 NAME | PORT | POLARITY | VALUE
1613 12:40:36.392121 lid | undefined | high | high
1614 12:40:36.395867 power | undefined | high | low
1615 12:40:36.402291 oprom | undefined | high | low
1616 12:40:36.405312 EC in RW | 0x000000b9 | high | low
1617 12:40:36.412326 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 665d
1618 12:40:36.415510 coreboot table: 1504 bytes.
1619 12:40:36.418757 IMD ROOT 0. 0x76fff000 0x00001000
1620 12:40:36.422118 IMD SMALL 1. 0x76ffe000 0x00001000
1621 12:40:36.429631 FSP MEMORY 2. 0x76c4e000 0x003b0000
1622 12:40:36.431622 CONSOLE 3. 0x76c2e000 0x00020000
1623 12:40:36.435401 FMAP 4. 0x76c2d000 0x00000578
1624 12:40:36.438906 TIME STAMP 5. 0x76c2c000 0x00000910
1625 12:40:36.441918 VBOOT WORK 6. 0x76c18000 0x00014000
1626 12:40:36.445255 ROMSTG STCK 7. 0x76c17000 0x00001000
1627 12:40:36.448503 AFTER CAR 8. 0x76c0d000 0x0000a000
1628 12:40:36.451904 RAMSTAGE 9. 0x76ba7000 0x00066000
1629 12:40:36.458697 REFCODE 10. 0x76b67000 0x00040000
1630 12:40:36.462258 SMM BACKUP 11. 0x76b57000 0x00010000
1631 12:40:36.465117 4f444749 12. 0x76b55000 0x00002000
1632 12:40:36.468230 EXT VBT13. 0x76b53000 0x00001c43
1633 12:40:36.471735 COREBOOT 14. 0x76b4b000 0x00008000
1634 12:40:36.474870 ACPI 15. 0x76b27000 0x00024000
1635 12:40:36.478149 ACPI GNVS 16. 0x76b26000 0x00001000
1636 12:40:36.481588 RAMOOPS 17. 0x76a26000 0x00100000
1637 12:40:36.485150 TPM2 TCGLOG18. 0x76a16000 0x00010000
1638 12:40:36.488384 SMBIOS 19. 0x76a15000 0x00000800
1639 12:40:36.491305 IMD small region:
1640 12:40:36.494762 IMD ROOT 0. 0x76ffec00 0x00000400
1641 12:40:36.498141 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1642 12:40:36.505002 VPD 2. 0x76ffeb60 0x0000006c
1643 12:40:36.508348 POWER STATE 3. 0x76ffeb20 0x00000040
1644 12:40:36.511514 ROMSTAGE 4. 0x76ffeb00 0x00000004
1645 12:40:36.514533 MEM INFO 5. 0x76ffe920 0x000001e0
1646 12:40:36.521089 BS: BS_WRITE_TABLES run times (exec / console): 7 / 517 ms
1647 12:40:36.525272 MTRR: Physical address space:
1648 12:40:36.531408 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1649 12:40:36.538025 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1650 12:40:36.541347 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1651 12:40:36.548179 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1652 12:40:36.554915 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1653 12:40:36.561196 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1654 12:40:36.567945 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1655 12:40:36.571169 MTRR: Fixed MSR 0x250 0x0606060606060606
1656 12:40:36.574682 MTRR: Fixed MSR 0x258 0x0606060606060606
1657 12:40:36.581250 MTRR: Fixed MSR 0x259 0x0000000000000000
1658 12:40:36.584282 MTRR: Fixed MSR 0x268 0x0606060606060606
1659 12:40:36.587756 MTRR: Fixed MSR 0x269 0x0606060606060606
1660 12:40:36.590800 MTRR: Fixed MSR 0x26a 0x0606060606060606
1661 12:40:36.597979 MTRR: Fixed MSR 0x26b 0x0606060606060606
1662 12:40:36.601818 MTRR: Fixed MSR 0x26c 0x0606060606060606
1663 12:40:36.604465 MTRR: Fixed MSR 0x26d 0x0606060606060606
1664 12:40:36.607468 MTRR: Fixed MSR 0x26e 0x0606060606060606
1665 12:40:36.614370 MTRR: Fixed MSR 0x26f 0x0606060606060606
1666 12:40:36.614977 call enable_fixed_mtrr()
1667 12:40:36.621051 CPU physical address size: 39 bits
1668 12:40:36.624248 MTRR: default type WB/UC MTRR counts: 6/5.
1669 12:40:36.627273 MTRR: UC selected as default type.
1670 12:40:36.633685 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1671 12:40:36.640281 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1672 12:40:36.647547 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1673 12:40:36.650735 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1674 12:40:36.657563 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1675 12:40:36.660834
1676 12:40:36.661377 MTRR check
1677 12:40:36.663799 Fixed MTRRs : Enabled
1678 12:40:36.664349 Variable MTRRs: Enabled
1679 12:40:36.664719
1680 12:40:36.670828 MTRR: Fixed MSR 0x250 0x0606060606060606
1681 12:40:36.673735 MTRR: Fixed MSR 0x258 0x0606060606060606
1682 12:40:36.677019 MTRR: Fixed MSR 0x259 0x0000000000000000
1683 12:40:36.680389 MTRR: Fixed MSR 0x268 0x0606060606060606
1684 12:40:36.687094 MTRR: Fixed MSR 0x269 0x0606060606060606
1685 12:40:36.690293 MTRR: Fixed MSR 0x26a 0x0606060606060606
1686 12:40:36.693694 MTRR: Fixed MSR 0x26b 0x0606060606060606
1687 12:40:36.696808 MTRR: Fixed MSR 0x26c 0x0606060606060606
1688 12:40:36.703714 MTRR: Fixed MSR 0x26d 0x0606060606060606
1689 12:40:36.707019 MTRR: Fixed MSR 0x26e 0x0606060606060606
1690 12:40:36.710577 MTRR: Fixed MSR 0x26f 0x0606060606060606
1691 12:40:36.716606 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1692 12:40:36.720908 call enable_fixed_mtrr()
1693 12:40:36.724785 Checking cr50 for pending updates
1694 12:40:36.725336 CPU physical address size: 39 bits
1695 12:40:36.728944 Reading cr50 TPM mode
1696 12:40:36.738887 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1697 12:40:36.746867 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1698 12:40:36.749580 Checking segment from ROM address 0xfff9d5b8
1699 12:40:36.756286 Checking segment from ROM address 0xfff9d5d4
1700 12:40:36.760202 Loading segment from ROM address 0xfff9d5b8
1701 12:40:36.763203 code (compression=0)
1702 12:40:36.770034 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1703 12:40:36.779770 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1704 12:40:36.782963 it's not compressed!
1705 12:40:36.908778 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1706 12:40:36.915703 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1707 12:40:36.922568 Loading segment from ROM address 0xfff9d5d4
1708 12:40:36.925825 Entry Point 0x30000000
1709 12:40:36.926276 Loaded segments
1710 12:40:36.932775 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1711 12:40:36.949042 Finalizing chipset.
1712 12:40:36.952210 Finalizing SMM.
1713 12:40:36.952765 APMC done.
1714 12:40:36.958743 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1715 12:40:36.962145 mp_park_aps done after 0 msecs.
1716 12:40:36.965358 Jumping to boot code at 0x30000000(0x76b4b000)
1717 12:40:36.975650 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1718 12:40:36.976208
1719 12:40:36.976570
1720 12:40:36.976900
1721 12:40:36.978783 Starting depthcharge on Magolor...
1722 12:40:36.979236
1723 12:40:36.980245 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1724 12:40:36.980771 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1725 12:40:36.981205 Setting prompt string to ['dedede:']
1726 12:40:36.981702 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1727 12:40:36.988778 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1728 12:40:36.989343
1729 12:40:36.995160 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1730 12:40:36.995674
1731 12:40:36.998697 fw_config match found: AUDIO_AMP=UNPROVISIONED
1732 12:40:36.999155
1733 12:40:37.001740 Wipe memory regions:
1734 12:40:37.002149
1735 12:40:37.005245 [0x00000000001000, 0x000000000a0000)
1736 12:40:37.005655
1737 12:40:37.009090 [0x00000000100000, 0x00000030000000)
1738 12:40:37.137797
1739 12:40:37.141536 [0x00000031062170, 0x00000076a15000)
1740 12:40:37.309510
1741 12:40:37.313046 [0x00000100000000, 0x00000180400000)
1742 12:40:38.375307
1743 12:40:38.375853 R8152: Initializing
1744 12:40:38.376219
1745 12:40:38.378955 Version 6 (ocp_data = 5c30)
1746 12:40:38.382561
1747 12:40:38.383165 R8152: Done initializing
1748 12:40:38.383529
1749 12:40:38.385242 Adding net device
1750 12:40:38.385790
1751 12:40:38.388809 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1752 12:40:38.392536
1753 12:40:38.393112
1754 12:40:38.393472
1755 12:40:38.394291 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1757 12:40:38.496011 dedede: tftpboot 192.168.201.1 11383478/tftp-deploy-1ffutlbg/kernel/bzImage 11383478/tftp-deploy-1ffutlbg/kernel/cmdline 11383478/tftp-deploy-1ffutlbg/ramdisk/ramdisk.cpio.gz
1758 12:40:38.496688 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1759 12:40:38.497157 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1760 12:40:38.501803 tftpboot 192.168.201.1 11383478/tftp-deploy-1ffutlbg/kernel/bzIploy-1ffutlbg/kernel/cmdline 11383478/tftp-deploy-1ffutlbg/ramdisk/ramdisk.cpio.gz
1761 12:40:38.502308
1762 12:40:38.502746 Waiting for link
1763 12:40:38.703459
1764 12:40:38.704150 done.
1765 12:40:38.704602
1766 12:40:38.705203 MAC: 00:24:32:30:7b:5a
1767 12:40:38.705562
1768 12:40:38.706505 Sending DHCP discover... done.
1769 12:40:38.707023
1770 12:40:38.710778 Waiting for reply... done.
1771 12:40:38.711539
1772 12:40:38.713870 Sending DHCP request... done.
1773 12:40:38.714326
1774 12:40:38.720451 Waiting for reply... done.
1775 12:40:38.720910
1776 12:40:38.721269 My ip is 192.168.201.19
1777 12:40:38.721606
1778 12:40:38.723467 The DHCP server ip is 192.168.201.1
1779 12:40:38.726794
1780 12:40:38.730088 TFTP server IP predefined by user: 192.168.201.1
1781 12:40:38.730708
1782 12:40:38.736669 Bootfile predefined by user: 11383478/tftp-deploy-1ffutlbg/kernel/bzImage
1783 12:40:38.737228
1784 12:40:38.739987 Sending tftp read request... done.
1785 12:40:38.740458
1786 12:40:38.749364 Waiting for the transfer...
1787 12:40:38.749930
1788 12:40:39.474301 00000000 ################################################################
1789 12:40:39.474855
1790 12:40:40.172007 00080000 ################################################################
1791 12:40:40.172516
1792 12:40:40.874346 00100000 ################################################################
1793 12:40:40.874905
1794 12:40:41.591875 00180000 ################################################################
1795 12:40:41.592471
1796 12:40:42.323791 00200000 ################################################################
1797 12:40:42.324324
1798 12:40:43.035357 00280000 ################################################################
1799 12:40:43.035958
1800 12:40:43.721408 00300000 ################################################################
1801 12:40:43.721987
1802 12:40:44.418741 00380000 ################################################################
1803 12:40:44.419256
1804 12:40:45.082034 00400000 ################################################################
1805 12:40:45.082213
1806 12:40:45.688839 00480000 ################################################################
1807 12:40:45.688977
1808 12:40:46.287696 00500000 ################################################################
1809 12:40:46.287930
1810 12:40:46.886501 00580000 ################################################################
1811 12:40:46.886658
1812 12:40:47.472498 00600000 ################################################################
1813 12:40:47.472987
1814 12:40:48.144782 00680000 ################################################################
1815 12:40:48.145281
1816 12:40:48.763383 00700000 ################################################################
1817 12:40:48.763519
1818 12:40:49.375044 00780000 ################################################################
1819 12:40:49.375545
1820 12:40:49.508718 00800000 ############# done.
1821 12:40:49.509243
1822 12:40:49.512385 The bootfile was 8490896 bytes long.
1823 12:40:49.512919
1824 12:40:49.516036 Sending tftp read request... done.
1825 12:40:49.516499
1826 12:40:49.518239 Waiting for the transfer...
1827 12:40:49.518712
1828 12:40:50.179934 00000000 ################################################################
1829 12:40:50.180103
1830 12:40:50.711233 00080000 ################################################################
1831 12:40:50.711381
1832 12:40:51.244945 00100000 ################################################################
1833 12:40:51.245088
1834 12:40:51.780042 00180000 ################################################################
1835 12:40:51.780189
1836 12:40:52.313173 00200000 ################################################################
1837 12:40:52.313312
1838 12:40:52.846333 00280000 ################################################################
1839 12:40:52.846464
1840 12:40:53.384547 00300000 ################################################################
1841 12:40:53.384684
1842 12:40:53.939372 00380000 ################################################################
1843 12:40:53.939513
1844 12:40:54.470193 00400000 ################################################################
1845 12:40:54.470361
1846 12:40:54.998607 00480000 ################################################################
1847 12:40:54.998774
1848 12:40:55.527114 00500000 ################################################################
1849 12:40:55.527261
1850 12:40:56.055152 00580000 ################################################################
1851 12:40:56.055323
1852 12:40:56.586362 00600000 ################################################################
1853 12:40:56.586510
1854 12:40:57.146433 00680000 ################################################################
1855 12:40:57.147018
1856 12:40:57.870587 00700000 ################################################################
1857 12:40:57.871219
1858 12:40:58.518525 00780000 ################################################################
1859 12:40:58.518668
1860 12:40:59.031299 00800000 ####################################################### done.
1861 12:40:59.031437
1862 12:40:59.034439 Sending tftp read request... done.
1863 12:40:59.034524
1864 12:40:59.037811 Waiting for the transfer...
1865 12:40:59.037895
1866 12:40:59.037961 00000000 # done.
1867 12:40:59.038023
1868 12:40:59.047561 Command line loaded dynamically from TFTP file: 11383478/tftp-deploy-1ffutlbg/kernel/cmdline
1869 12:40:59.047655
1870 12:40:59.064231 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1871 12:40:59.064348
1872 12:40:59.067354 ec_init: CrosEC protocol v3 supported (256, 256)
1873 12:40:59.075021
1874 12:40:59.078162 Shutting down all USB controllers.
1875 12:40:59.078312
1876 12:40:59.078432 Removing current net device
1877 12:40:59.078542
1878 12:40:59.081534 Finalizing coreboot
1879 12:40:59.081701
1880 12:40:59.088405 Exiting depthcharge with code 4 at timestamp: 28929811
1881 12:40:59.088605
1882 12:40:59.088764
1883 12:40:59.088920 Starting kernel ...
1884 12:40:59.089064
1885 12:40:59.089203
1886 12:40:59.089854 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
1887 12:40:59.090082 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
1888 12:40:59.090262 Setting prompt string to ['Linux version [0-9]']
1889 12:40:59.090426 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1890 12:40:59.090601 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1892 12:45:24.091065 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
1894 12:45:24.092156 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
1896 12:45:24.093014 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1899 12:45:24.094414 end: 2 depthcharge-action (duration 00:05:00) [common]
1901 12:45:24.095620 Cleaning after the job
1902 12:45:24.096051 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383478/tftp-deploy-1ffutlbg/ramdisk
1903 12:45:24.097314 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383478/tftp-deploy-1ffutlbg/kernel
1904 12:45:24.098607 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383478/tftp-deploy-1ffutlbg/modules
1905 12:45:24.099070 start: 5.1 power-off (timeout 00:00:30) [common]
1906 12:45:24.099231 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-6' '--port=1' '--command=off'
1907 12:45:24.187222 >> Command sent successfully.
1908 12:45:24.198790 Returned 0 in 0 seconds
1909 12:45:24.300092 end: 5.1 power-off (duration 00:00:00) [common]
1911 12:45:24.301667 start: 5.2 read-feedback (timeout 00:10:00) [common]
1912 12:45:24.303038 Listened to connection for namespace 'common' for up to 1s
1914 12:45:24.304418 Listened to connection for namespace 'common' for up to 1s
1915 12:45:25.303607 Finalising connection for namespace 'common'
1916 12:45:25.304220 Disconnecting from shell: Finalise
1917 12:45:25.304572
1918 12:45:25.405599 end: 5.2 read-feedback (duration 00:00:01) [common]
1919 12:45:25.406201 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11383478
1920 12:45:25.461886 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11383478
1921 12:45:25.462104 JobError: Your job cannot terminate cleanly.