Boot log: acer-cbv514-1h-34uz-brya
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 12:40:31.783490 lava-dispatcher, installed at version: 2023.06
2 12:40:31.783705 start: 0 validate
3 12:40:31.783843 Start time: 2023-08-30 12:40:31.783836+00:00 (UTC)
4 12:40:31.783985 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:40:31.784132 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:40:32.054737 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:40:32.055642 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:40:35.556982 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:40:35.557817 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:40:36.064200 validate duration: 4.28
12 12:40:36.064495 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:40:36.064606 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:40:36.064705 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:40:36.064843 Not decompressing ramdisk as can be used compressed.
16 12:40:36.064939 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:40:36.065020 saving as /var/lib/lava/dispatcher/tmp/11383475/tftp-deploy-4iwcdtly/ramdisk/rootfs.cpio.gz
18 12:40:36.065123 total size: 8418130 (8 MB)
19 12:40:36.066981 progress 0 % (0 MB)
20 12:40:36.069771 progress 5 % (0 MB)
21 12:40:36.072172 progress 10 % (0 MB)
22 12:40:36.074442 progress 15 % (1 MB)
23 12:40:36.076776 progress 20 % (1 MB)
24 12:40:36.079065 progress 25 % (2 MB)
25 12:40:36.081340 progress 30 % (2 MB)
26 12:40:36.083566 progress 35 % (2 MB)
27 12:40:36.085853 progress 40 % (3 MB)
28 12:40:36.088226 progress 45 % (3 MB)
29 12:40:36.090697 progress 50 % (4 MB)
30 12:40:36.092953 progress 55 % (4 MB)
31 12:40:36.095177 progress 60 % (4 MB)
32 12:40:36.097228 progress 65 % (5 MB)
33 12:40:36.099507 progress 70 % (5 MB)
34 12:40:36.101899 progress 75 % (6 MB)
35 12:40:36.104227 progress 80 % (6 MB)
36 12:40:36.106563 progress 85 % (6 MB)
37 12:40:36.108777 progress 90 % (7 MB)
38 12:40:36.111055 progress 95 % (7 MB)
39 12:40:36.113315 progress 100 % (8 MB)
40 12:40:36.113554 8 MB downloaded in 0.05 s (165.76 MB/s)
41 12:40:36.113709 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:40:36.113947 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:40:36.114033 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:40:36.114115 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:40:36.114240 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:40:36.114312 saving as /var/lib/lava/dispatcher/tmp/11383475/tftp-deploy-4iwcdtly/kernel/bzImage
48 12:40:36.114371 total size: 8490896 (8 MB)
49 12:40:36.114431 No compression specified
50 12:40:36.115883 progress 0 % (0 MB)
51 12:40:36.118373 progress 5 % (0 MB)
52 12:40:36.120652 progress 10 % (0 MB)
53 12:40:36.122992 progress 15 % (1 MB)
54 12:40:36.125263 progress 20 % (1 MB)
55 12:40:36.127630 progress 25 % (2 MB)
56 12:40:36.129891 progress 30 % (2 MB)
57 12:40:36.132269 progress 35 % (2 MB)
58 12:40:36.134588 progress 40 % (3 MB)
59 12:40:36.136861 progress 45 % (3 MB)
60 12:40:36.139148 progress 50 % (4 MB)
61 12:40:36.141362 progress 55 % (4 MB)
62 12:40:36.143616 progress 60 % (4 MB)
63 12:40:36.145828 progress 65 % (5 MB)
64 12:40:36.148081 progress 70 % (5 MB)
65 12:40:36.150291 progress 75 % (6 MB)
66 12:40:36.152555 progress 80 % (6 MB)
67 12:40:36.154842 progress 85 % (6 MB)
68 12:40:36.157064 progress 90 % (7 MB)
69 12:40:36.159328 progress 95 % (7 MB)
70 12:40:36.161548 progress 100 % (8 MB)
71 12:40:36.161672 8 MB downloaded in 0.05 s (171.21 MB/s)
72 12:40:36.161816 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:40:36.162045 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:40:36.162129 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:40:36.162213 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:40:36.162345 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:40:36.162419 saving as /var/lib/lava/dispatcher/tmp/11383475/tftp-deploy-4iwcdtly/modules/modules.tar
79 12:40:36.162479 total size: 250888 (0 MB)
80 12:40:36.162540 Using unxz to decompress xz
81 12:40:36.166915 progress 13 % (0 MB)
82 12:40:36.167325 progress 26 % (0 MB)
83 12:40:36.167571 progress 39 % (0 MB)
84 12:40:36.169138 progress 52 % (0 MB)
85 12:40:36.171016 progress 65 % (0 MB)
86 12:40:36.172876 progress 78 % (0 MB)
87 12:40:36.174772 progress 91 % (0 MB)
88 12:40:36.176512 progress 100 % (0 MB)
89 12:40:36.182087 0 MB downloaded in 0.02 s (12.21 MB/s)
90 12:40:36.182329 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:40:36.182785 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:40:36.182951 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 12:40:36.183110 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 12:40:36.183208 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:40:36.183292 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 12:40:36.183506 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8
98 12:40:36.183645 makedir: /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin
99 12:40:36.183751 makedir: /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/tests
100 12:40:36.183849 makedir: /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/results
101 12:40:36.183966 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-add-keys
102 12:40:36.184117 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-add-sources
103 12:40:36.184249 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-background-process-start
104 12:40:36.184393 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-background-process-stop
105 12:40:36.184549 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-common-functions
106 12:40:36.184698 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-echo-ipv4
107 12:40:36.184826 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-install-packages
108 12:40:36.184953 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-installed-packages
109 12:40:36.185078 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-os-build
110 12:40:36.185203 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-probe-channel
111 12:40:36.185332 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-probe-ip
112 12:40:36.185459 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-target-ip
113 12:40:36.185581 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-target-mac
114 12:40:36.185703 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-target-storage
115 12:40:36.185830 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-test-case
116 12:40:36.185955 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-test-event
117 12:40:36.186078 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-test-feedback
118 12:40:36.186202 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-test-raise
119 12:40:36.186331 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-test-reference
120 12:40:36.186461 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-test-runner
121 12:40:36.186601 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-test-set
122 12:40:36.186731 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-test-shell
123 12:40:36.186859 Updating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-install-packages (oe)
124 12:40:36.187013 Updating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/bin/lava-installed-packages (oe)
125 12:40:36.187136 Creating /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/environment
126 12:40:36.187244 LAVA metadata
127 12:40:36.187318 - LAVA_JOB_ID=11383475
128 12:40:36.187383 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:40:36.187488 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 12:40:36.187557 skipped lava-vland-overlay
131 12:40:36.187633 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:40:36.187715 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 12:40:36.187778 skipped lava-multinode-overlay
134 12:40:36.187851 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:40:36.187936 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 12:40:36.188011 Loading test definitions
137 12:40:36.188100 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 12:40:36.188178 Using /lava-11383475 at stage 0
139 12:40:36.188493 uuid=11383475_1.4.2.3.1 testdef=None
140 12:40:36.188580 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:40:36.188667 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 12:40:36.189210 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:40:36.189434 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 12:40:36.190077 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:40:36.190303 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 12:40:36.190936 runner path: /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/0/tests/0_dmesg test_uuid 11383475_1.4.2.3.1
149 12:40:36.191093 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:40:36.191316 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 12:40:36.191386 Using /lava-11383475 at stage 1
153 12:40:36.191684 uuid=11383475_1.4.2.3.5 testdef=None
154 12:40:36.191772 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 12:40:36.191854 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 12:40:36.192340 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 12:40:36.192560 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 12:40:36.193202 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 12:40:36.193426 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 12:40:36.194055 runner path: /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/1/tests/1_bootrr test_uuid 11383475_1.4.2.3.5
163 12:40:36.194207 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 12:40:36.194411 Creating lava-test-runner.conf files
166 12:40:36.194475 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/0 for stage 0
167 12:40:36.194595 - 0_dmesg
168 12:40:36.194692 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383475/lava-overlay-yv3nlfa8/lava-11383475/1 for stage 1
169 12:40:36.194782 - 1_bootrr
170 12:40:36.194877 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 12:40:36.194960 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 12:40:36.203411 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 12:40:36.203522 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 12:40:36.203611 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 12:40:36.203695 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 12:40:36.203779 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 12:40:36.456825 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 12:40:36.457204 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 12:40:36.457321 extracting modules file /var/lib/lava/dispatcher/tmp/11383475/tftp-deploy-4iwcdtly/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11383475/extract-overlay-ramdisk-7ml6ygr9/ramdisk
180 12:40:36.470817 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 12:40:36.470958 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 12:40:36.471048 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383475/compress-overlay-q65vz6fa/overlay-1.4.2.4.tar.gz to ramdisk
183 12:40:36.471122 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383475/compress-overlay-q65vz6fa/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11383475/extract-overlay-ramdisk-7ml6ygr9/ramdisk
184 12:40:36.480264 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 12:40:36.480393 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 12:40:36.480487 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 12:40:36.480574 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 12:40:36.480654 Building ramdisk /var/lib/lava/dispatcher/tmp/11383475/extract-overlay-ramdisk-7ml6ygr9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11383475/extract-overlay-ramdisk-7ml6ygr9/ramdisk
189 12:40:36.607809 >> 49788 blocks
190 12:40:37.449340 rename /var/lib/lava/dispatcher/tmp/11383475/extract-overlay-ramdisk-7ml6ygr9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11383475/tftp-deploy-4iwcdtly/ramdisk/ramdisk.cpio.gz
191 12:40:37.449775 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 12:40:37.449899 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 12:40:37.450001 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 12:40:37.450096 No mkimage arch provided, not using FIT.
195 12:40:37.450185 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 12:40:37.450267 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 12:40:37.450370 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 12:40:37.450462 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 12:40:37.450552 No LXC device requested
200 12:40:37.450669 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 12:40:37.450753 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 12:40:37.450831 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 12:40:37.450954 Checking files for TFTP limit of 4294967296 bytes.
204 12:40:37.451493 end: 1 tftp-deploy (duration 00:00:01) [common]
205 12:40:37.451599 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 12:40:37.451688 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 12:40:37.451805 substitutions:
208 12:40:37.451870 - {DTB}: None
209 12:40:37.451931 - {INITRD}: 11383475/tftp-deploy-4iwcdtly/ramdisk/ramdisk.cpio.gz
210 12:40:37.451988 - {KERNEL}: 11383475/tftp-deploy-4iwcdtly/kernel/bzImage
211 12:40:37.452044 - {LAVA_MAC}: None
212 12:40:37.452099 - {PRESEED_CONFIG}: None
213 12:40:37.452153 - {PRESEED_LOCAL}: None
214 12:40:37.452206 - {RAMDISK}: 11383475/tftp-deploy-4iwcdtly/ramdisk/ramdisk.cpio.gz
215 12:40:37.452259 - {ROOT_PART}: None
216 12:40:37.452311 - {ROOT}: None
217 12:40:37.452363 - {SERVER_IP}: 192.168.201.1
218 12:40:37.452415 - {TEE}: None
219 12:40:37.452467 Parsed boot commands:
220 12:40:37.452519 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 12:40:37.452697 Parsed boot commands: tftpboot 192.168.201.1 11383475/tftp-deploy-4iwcdtly/kernel/bzImage 11383475/tftp-deploy-4iwcdtly/kernel/cmdline 11383475/tftp-deploy-4iwcdtly/ramdisk/ramdisk.cpio.gz
222 12:40:37.452785 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 12:40:37.452869 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 12:40:37.452962 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 12:40:37.453047 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 12:40:37.453116 Not connected, no need to disconnect.
227 12:40:37.453216 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 12:40:37.453311 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 12:40:37.453377 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-8'
230 12:40:37.457632 Setting prompt string to ['lava-test: # ']
231 12:40:37.457995 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 12:40:37.458104 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 12:40:37.458206 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 12:40:37.458301 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 12:40:37.458495 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-8' '--port=1' '--command=reboot'
236 12:40:42.607858 >> Command sent successfully.
237 12:40:42.618826 Returned 0 in 5 seconds
238 12:40:42.720004 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 12:40:42.721386 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 12:40:42.721877 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 12:40:42.722307 Setting prompt string to 'Starting depthcharge on Volmar...'
243 12:40:42.722678 Changing prompt to 'Starting depthcharge on Volmar...'
244 12:40:42.723068 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
245 12:40:42.724257 [Enter `^Ec?' for help]
246 12:40:44.088402
247 12:40:44.088974
248 12:40:44.094440 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
249 12:40:44.098088 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
250 12:40:44.104801 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
251 12:40:44.111387 CPU: AES supported, TXT NOT supported, VT supported
252 12:40:44.118383 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
253 12:40:44.119006 Cache size = 10 MiB
254 12:40:44.125186 MCH: device id 4609 (rev 04) is Alderlake-P
255 12:40:44.129526 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
256 12:40:44.132690 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
257 12:40:44.136815 VBOOT: Loading verstage.
258 12:40:44.140210 FMAP: Found "FLASH" version 1.1 at 0x1804000.
259 12:40:44.146945 FMAP: base = 0x0 size = 0x2000000 #areas = 37
260 12:40:44.150397 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
261 12:40:44.160389 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
262 12:40:44.167212 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
263 12:40:44.167661
264 12:40:44.167991
265 12:40:44.177144 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
266 12:40:44.180556 Probing TPM I2C: I2C bus 1 version 0x3230302a
267 12:40:44.187904 DW I2C bus 1 at 0xfe022000 (400 KHz)
268 12:40:44.188459 done! DID_VID 0x00281ae0
269 12:40:44.191342 TPM ready after 0 ms
270 12:40:44.194885 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
271 12:40:44.207915 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
272 12:40:44.214711 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
273 12:40:44.268867 tlcl_send_startup: Startup return code is 0
274 12:40:44.269382 TPM: setup succeeded
275 12:40:44.290370 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
276 12:40:44.313612 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
277 12:40:44.317466 Chrome EC: UHEPI supported
278 12:40:44.320992 Reading cr50 boot mode
279 12:40:44.335115 Cr50 says boot_mode is VERIFIED_RW(0x00).
280 12:40:44.335626 Phase 1
281 12:40:44.342223 FMAP: area GBB found @ 1805000 (458752 bytes)
282 12:40:44.348748 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
283 12:40:44.355188 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
284 12:40:44.362025 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 12:40:44.365228 Phase 2
286 12:40:44.365694 Phase 3
287 12:40:44.368289 FMAP: area GBB found @ 1805000 (458752 bytes)
288 12:40:44.375086 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
289 12:40:44.378238 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
290 12:40:44.385182 VB2:vb2_verify_keyblock() Checking keyblock signature...
291 12:40:44.391743 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
292 12:40:44.398386 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
293 12:40:44.407924 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
294 12:40:44.419987 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
295 12:40:44.423553 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
296 12:40:44.430102 VB2:vb2_verify_fw_preamble() Verifying preamble.
297 12:40:44.436900 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
298 12:40:44.443147 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
299 12:40:44.449871 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
300 12:40:44.453968 Phase 4
301 12:40:44.457320 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
302 12:40:44.463790 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
303 12:40:44.676209 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
304 12:40:44.682874 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
305 12:40:44.686238 Saving vboot hash.
306 12:40:44.693092 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
307 12:40:44.708704 tlcl_extend: response is 0
308 12:40:44.715680 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
309 12:40:44.722106 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
310 12:40:44.736300 tlcl_extend: response is 0
311 12:40:44.743154 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
312 12:40:44.764605 tlcl_lock_nv_write: response is 0
313 12:40:44.784213 tlcl_lock_nv_write: response is 0
314 12:40:44.784779 Slot A is selected
315 12:40:44.790418 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
316 12:40:44.796929 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
317 12:40:44.803983 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
318 12:40:44.810382 BS: verstage times (exec / console): total (unknown) / 256 ms
319 12:40:44.810900
320 12:40:44.811239
321 12:40:44.817157 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
322 12:40:44.821473 Google Chrome EC: version:
323 12:40:44.825013 ro: volmar_v2.0.14126-e605144e9c
324 12:40:44.828042 rw: volmar_v0.0.55-22d1557
325 12:40:44.831494 running image: 2
326 12:40:44.834455 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
327 12:40:44.844696 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
328 12:40:44.851262 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
329 12:40:44.857829 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
330 12:40:44.867747 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
331 12:40:44.877837 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
332 12:40:44.881485 EC took 942us to calculate image hash
333 12:40:44.891475 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
334 12:40:44.894707 VB2:sync_ec() select_rw=RW(active)
335 12:40:44.905114 Waited 600us to clear limit power flag.
336 12:40:44.908685 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
337 12:40:44.912239 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
338 12:40:44.918527 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
339 12:40:44.921932 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
340 12:40:44.925428 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
341 12:40:44.928433 TCO_STS: 0000 0000
342 12:40:44.931672 GEN_PMCON: d0015038 00002200
343 12:40:44.935070 GBLRST_CAUSE: 00000000 00000000
344 12:40:44.935567 HPR_CAUSE0: 00000000
345 12:40:44.938876 prev_sleep_state 5
346 12:40:44.944852 Abort disabling TXT, as CPU is not TXT capable.
347 12:40:44.948401 cse_lite: Number of partitions = 3
348 12:40:44.951674 cse_lite: Current partition = RO
349 12:40:44.955442 cse_lite: Next partition = RO
350 12:40:44.958351 cse_lite: Flags = 0x7
351 12:40:44.964842 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
352 12:40:44.971468 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
353 12:40:44.978312 FMAP: area SI_ME found @ 1000 (5238784 bytes)
354 12:40:44.984901 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
355 12:40:44.991505 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
356 12:40:44.997907 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
357 12:40:45.001395 cse_lite: CSE CBFS RW version : 16.1.25.2049
358 12:40:45.005204 cse_lite: Set Boot Partition Info Command (RW)
359 12:40:45.012384 HECI: Global Reset(Type:1) Command
360 12:40:46.422905
361 12:40:46.423451
362 12:40:46.430584 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
363 12:40:46.433897 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
364 12:40:46.440892 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
365 12:40:46.444224 CPU: AES supported, TXT NOT supported, VT supported
366 12:40:46.453991 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
367 12:40:46.454610 Cache size = 10 MiB
368 12:40:46.457505 MCH: device id 4609 (rev 04) is Alderlake-P
369 12:40:46.464158 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
370 12:40:46.467430 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
371 12:40:46.470956 VBOOT: Loading verstage.
372 12:40:46.477885 FMAP: Found "FLASH" version 1.1 at 0x1804000.
373 12:40:46.481219 FMAP: base = 0x0 size = 0x2000000 #areas = 37
374 12:40:46.485345 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
375 12:40:46.495862 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
376 12:40:46.502495 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
377 12:40:46.503112
378 12:40:46.503484
379 12:40:46.512190 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
380 12:40:46.518850 Probing TPM I2C: I2C bus 1 version 0x3230302a
381 12:40:46.522394 DW I2C bus 1 at 0xfe022000 (400 KHz)
382 12:40:46.525783 done! DID_VID 0x00281ae0
383 12:40:46.526285 TPM ready after 0 ms
384 12:40:46.529145 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
385 12:40:46.544051 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
386 12:40:46.547341 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
387 12:40:46.605087 tlcl_send_startup: Startup return code is 0
388 12:40:46.605693 TPM: setup succeeded
389 12:40:46.626010 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
390 12:40:46.647214 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
391 12:40:46.651206 Chrome EC: UHEPI supported
392 12:40:46.654208 Reading cr50 boot mode
393 12:40:46.668681 Cr50 says boot_mode is VERIFIED_RW(0x00).
394 12:40:46.669237 Phase 1
395 12:40:46.675841 FMAP: area GBB found @ 1805000 (458752 bytes)
396 12:40:46.681835 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 12:40:46.688498 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 12:40:46.695523 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
399 12:40:46.698664 Phase 2
400 12:40:46.699136 Phase 3
401 12:40:46.702055 FMAP: area GBB found @ 1805000 (458752 bytes)
402 12:40:46.708500 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
403 12:40:46.711764 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
404 12:40:46.718781 VB2:vb2_verify_keyblock() Checking keyblock signature...
405 12:40:46.725157 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
406 12:40:46.731861 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
407 12:40:46.742087 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
408 12:40:46.754125 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
409 12:40:46.757279 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
410 12:40:46.763982 VB2:vb2_verify_fw_preamble() Verifying preamble.
411 12:40:46.770351 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
412 12:40:46.776823 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
413 12:40:46.783449 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
414 12:40:46.787805 Phase 4
415 12:40:46.790970 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
416 12:40:46.797725 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
417 12:40:47.010204 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
418 12:40:47.016646 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
419 12:40:47.020482 Saving vboot hash.
420 12:40:47.026760 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
421 12:40:47.043388 tlcl_extend: response is 0
422 12:40:47.050230 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
423 12:40:47.056474 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
424 12:40:47.071126 tlcl_extend: response is 0
425 12:40:47.077487 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
426 12:40:47.097677 tlcl_lock_nv_write: response is 0
427 12:40:47.117163 tlcl_lock_nv_write: response is 0
428 12:40:47.117729 Slot A is selected
429 12:40:47.123305 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
430 12:40:47.130451 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
431 12:40:47.137118 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
432 12:40:47.143267 BS: verstage times (exec / console): total (unknown) / 256 ms
433 12:40:47.143807
434 12:40:47.144176
435 12:40:47.149731 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
436 12:40:47.154261 Google Chrome EC: version:
437 12:40:47.157134 ro: volmar_v2.0.14126-e605144e9c
438 12:40:47.160457 rw: volmar_v0.0.55-22d1557
439 12:40:47.164329 running image: 2
440 12:40:47.167170 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
441 12:40:47.177404 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
442 12:40:47.183819 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
443 12:40:47.190298 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
444 12:40:47.200587 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
445 12:40:47.210685 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
446 12:40:47.213894 EC took 941us to calculate image hash
447 12:40:47.223865 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
448 12:40:47.230009 VB2:sync_ec() select_rw=RW(active)
449 12:40:47.240346 Waited 270us to clear limit power flag.
450 12:40:47.243907 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
451 12:40:47.247580 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
452 12:40:47.251031 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
453 12:40:47.257681 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
454 12:40:47.260952 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
455 12:40:47.261423 TCO_STS: 0000 0000
456 12:40:47.264351 GEN_PMCON: d1001038 00002200
457 12:40:47.268074 GBLRST_CAUSE: 00000040 00000000
458 12:40:47.270929 HPR_CAUSE0: 00000000
459 12:40:47.274449 prev_sleep_state 5
460 12:40:47.277495 Abort disabling TXT, as CPU is not TXT capable.
461 12:40:47.285384 cse_lite: Number of partitions = 3
462 12:40:47.288905 cse_lite: Current partition = RW
463 12:40:47.289374 cse_lite: Next partition = RW
464 12:40:47.292350 cse_lite: Flags = 0x7
465 12:40:47.298658 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
466 12:40:47.308847 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
467 12:40:47.312070 FMAP: area SI_ME found @ 1000 (5238784 bytes)
468 12:40:47.318953 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
469 12:40:47.325492 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
470 12:40:47.332075 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
471 12:40:47.335516 cse_lite: CSE CBFS RW version : 16.1.25.2049
472 12:40:47.339040 Boot Count incremented to 14287
473 12:40:47.345424 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
474 12:40:47.352327 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
475 12:40:47.364973 Probing TPM I2C: done! DID_VID 0x00281ae0
476 12:40:47.368550 Locality already claimed
477 12:40:47.371617 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
478 12:40:47.390980 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
479 12:40:47.397921 MRC: Hash idx 0x100d comparison successful.
480 12:40:47.401183 MRC cache found, size f6c8
481 12:40:47.401746 bootmode is set to: 2
482 12:40:47.404792 EC returned error result code 3
483 12:40:47.407915 FW_CONFIG value from CBI is 0x131
484 12:40:47.414501 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
485 12:40:47.418187 SPD index = 0
486 12:40:47.424556 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
487 12:40:47.425128 SPD: module type is LPDDR4X
488 12:40:47.431795 SPD: module part number is K4U6E3S4AB-MGCL
489 12:40:47.438461 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
490 12:40:47.441489 SPD: device width 16 bits, bus width 16 bits
491 12:40:47.444787 SPD: module size is 1024 MB (per channel)
492 12:40:47.514217 CBMEM:
493 12:40:47.517721 IMD: root @ 0x76fff000 254 entries.
494 12:40:47.520716 IMD: root @ 0x76ffec00 62 entries.
495 12:40:47.528816 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
496 12:40:47.531973 RO_VPD is uninitialized or empty.
497 12:40:47.535295 FMAP: area RW_VPD found @ f29000 (8192 bytes)
498 12:40:47.538535 RW_VPD is uninitialized or empty.
499 12:40:47.544926 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
500 12:40:47.548749 External stage cache:
501 12:40:47.551798 IMD: root @ 0x7bbff000 254 entries.
502 12:40:47.554859 IMD: root @ 0x7bbfec00 62 entries.
503 12:40:47.561997 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
504 12:40:47.568946 MRC: Checking cached data update for 'RW_MRC_CACHE'.
505 12:40:47.571959 MRC: 'RW_MRC_CACHE' does not need update.
506 12:40:47.572456 8 DIMMs found
507 12:40:47.575323 SMM Memory Map
508 12:40:47.578939 SMRAM : 0x7b800000 0x800000
509 12:40:47.582079 Subregion 0: 0x7b800000 0x200000
510 12:40:47.585292 Subregion 1: 0x7ba00000 0x200000
511 12:40:47.588821 Subregion 2: 0x7bc00000 0x400000
512 12:40:47.592184 top_of_ram = 0x77000000
513 12:40:47.595202 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
514 12:40:47.602356 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
515 12:40:47.608802 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
516 12:40:47.611695 MTRR Range: Start=ff000000 End=0 (Size 1000000)
517 12:40:47.612160 Normal boot
518 12:40:47.622124 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
519 12:40:47.628606 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
520 12:40:47.635022 Processing 237 relocs. Offset value of 0x74ab9000
521 12:40:47.643275 BS: romstage times (exec / console): total (unknown) / 381 ms
522 12:40:47.650777
523 12:40:47.651283
524 12:40:47.657633 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
525 12:40:47.658187 Normal boot
526 12:40:47.664061 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
527 12:40:47.670512 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
528 12:40:47.677017 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
529 12:40:47.687279 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
530 12:40:47.735127 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
531 12:40:47.742071 Processing 5931 relocs. Offset value of 0x72a2f000
532 12:40:47.745104 BS: postcar times (exec / console): total (unknown) / 51 ms
533 12:40:47.748637
534 12:40:47.749207
535 12:40:47.755231 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
536 12:40:47.758768 Reserving BERT start 76a1e000, size 10000
537 12:40:47.761605 Normal boot
538 12:40:47.765423 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
539 12:40:47.771748 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
540 12:40:47.781771 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
541 12:40:47.784862 FMAP: area RW_VPD found @ f29000 (8192 bytes)
542 12:40:47.788817 Google Chrome EC: version:
543 12:40:47.792539 ro: volmar_v2.0.14126-e605144e9c
544 12:40:47.795557 rw: volmar_v0.0.55-22d1557
545 12:40:47.799090 running image: 2
546 12:40:47.802593 ACPI _SWS is PM1 Index 8 GPE Index -1
547 12:40:47.809194 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
548 12:40:47.812377 EC returned error result code 3
549 12:40:47.816683 FW_CONFIG value from CBI is 0x131
550 12:40:47.820174 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
551 12:40:47.823140 PCI: 00:1c.2 disabled by fw_config
552 12:40:47.830209 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
553 12:40:47.836741 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
554 12:40:47.839706 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
555 12:40:47.846022 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
556 12:40:47.849785 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
557 12:40:47.856331 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
558 12:40:47.863247 microcode: sig=0x906a4 pf=0x80 revision=0x423
559 12:40:47.866474 microcode: Update skipped, already up-to-date
560 12:40:47.872669 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
561 12:40:47.905905 Detected 6 core, 8 thread CPU.
562 12:40:47.909380 Setting up SMI for CPU
563 12:40:47.912705 IED base = 0x7bc00000
564 12:40:47.913181 IED size = 0x00400000
565 12:40:47.916225 Will perform SMM setup.
566 12:40:47.919552 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
567 12:40:47.923066 LAPIC 0x0 in XAPIC mode.
568 12:40:47.932883 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
569 12:40:47.936333 Processing 18 relocs. Offset value of 0x00030000
570 12:40:47.940845 Attempting to start 7 APs
571 12:40:47.944097 Waiting for 10ms after sending INIT.
572 12:40:47.957227 Waiting for SIPI to complete...
573 12:40:47.960751 LAPIC 0x1 in XAPIC mode.
574 12:40:47.963741 LAPIC 0x10 in XAPIC mode.
575 12:40:47.967131 AP: slot 6 apic_id 1, MCU rev: 0x00000423
576 12:40:47.970916 LAPIC 0x16 in XAPIC mode.
577 12:40:47.973577 LAPIC 0x14 in XAPIC mode.
578 12:40:47.977311 LAPIC 0x9 in XAPIC mode.
579 12:40:47.977892 LAPIC 0x8 in XAPIC mode.
580 12:40:47.983546 AP: slot 5 apic_id 9, MCU rev: 0x00000423
581 12:40:47.984109 LAPIC 0x12 in XAPIC mode.
582 12:40:47.990416 AP: slot 4 apic_id 10, MCU rev: 0x00000423
583 12:40:47.993464 AP: slot 1 apic_id 12, MCU rev: 0x00000423
584 12:40:47.996743 AP: slot 3 apic_id 16, MCU rev: 0x00000423
585 12:40:48.003768 AP: slot 2 apic_id 14, MCU rev: 0x00000423
586 12:40:48.006866 AP: slot 7 apic_id 8, MCU rev: 0x00000423
587 12:40:48.007330 done.
588 12:40:48.010337 Waiting for SIPI to complete...
589 12:40:48.010928 done.
590 12:40:48.013555 smm_setup_relocation_handler: enter
591 12:40:48.017164 smm_setup_relocation_handler: exit
592 12:40:48.027078 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
593 12:40:48.030531 Processing 11 relocs. Offset value of 0x00038000
594 12:40:48.036997 smm_module_setup_stub: stack_top = 0x7b804000
595 12:40:48.040595 smm_module_setup_stub: per cpu stack_size = 0x800
596 12:40:48.046732 smm_module_setup_stub: runtime.start32_offset = 0x4c
597 12:40:48.049859 smm_module_setup_stub: runtime.smm_size = 0x10000
598 12:40:48.057138 SMM Module: stub loaded at 38000. Will call 0x76a52094
599 12:40:48.060174 Installing permanent SMM handler to 0x7b800000
600 12:40:48.067095 smm_load_module: total_smm_space_needed e468, available -> 200000
601 12:40:48.076607 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
602 12:40:48.080099 Processing 255 relocs. Offset value of 0x7b9f6000
603 12:40:48.086736 smm_load_module: smram_start: 0x7b800000
604 12:40:48.089842 smm_load_module: smram_end: 7ba00000
605 12:40:48.093126 smm_load_module: handler start 0x7b9f6d5f
606 12:40:48.096466 smm_load_module: handler_size 98d0
607 12:40:48.099685 smm_load_module: fxsave_area 0x7b9ff000
608 12:40:48.103325 smm_load_module: fxsave_size 1000
609 12:40:48.106631 smm_load_module: CONFIG_MSEG_SIZE 0x0
610 12:40:48.113274 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
611 12:40:48.119743 smm_load_module: handler_mod_params.smbase = 0x7b800000
612 12:40:48.122943 smm_load_module: per_cpu_save_state_size = 0x400
613 12:40:48.126343 smm_load_module: num_cpus = 0x8
614 12:40:48.132653 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
615 12:40:48.136781 smm_load_module: total_save_state_size = 0x2000
616 12:40:48.139628 smm_load_module: cpu0 entry: 7b9e6000
617 12:40:48.146394 smm_create_map: cpus allowed in one segment 30
618 12:40:48.149755 smm_create_map: min # of segments needed 1
619 12:40:48.150323 CPU 0x0
620 12:40:48.156190 smbase 7b9e6000 entry 7b9ee000
621 12:40:48.159778 ss_start 7b9f5c00 code_end 7b9ee208
622 12:40:48.160346 CPU 0x1
623 12:40:48.162826 smbase 7b9e5c00 entry 7b9edc00
624 12:40:48.169611 ss_start 7b9f5800 code_end 7b9ede08
625 12:40:48.170165 CPU 0x2
626 12:40:48.173244 smbase 7b9e5800 entry 7b9ed800
627 12:40:48.179396 ss_start 7b9f5400 code_end 7b9eda08
628 12:40:48.179874 CPU 0x3
629 12:40:48.182832 smbase 7b9e5400 entry 7b9ed400
630 12:40:48.186410 ss_start 7b9f5000 code_end 7b9ed608
631 12:40:48.189390 CPU 0x4
632 12:40:48.192906 smbase 7b9e5000 entry 7b9ed000
633 12:40:48.196791 ss_start 7b9f4c00 code_end 7b9ed208
634 12:40:48.197302 CPU 0x5
635 12:40:48.199484 smbase 7b9e4c00 entry 7b9ecc00
636 12:40:48.206149 ss_start 7b9f4800 code_end 7b9ece08
637 12:40:48.206794 CPU 0x6
638 12:40:48.209602 smbase 7b9e4800 entry 7b9ec800
639 12:40:48.216208 ss_start 7b9f4400 code_end 7b9eca08
640 12:40:48.216901 CPU 0x7
641 12:40:48.219405 smbase 7b9e4400 entry 7b9ec400
642 12:40:48.222730 ss_start 7b9f4000 code_end 7b9ec608
643 12:40:48.233117 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
644 12:40:48.235961 Processing 11 relocs. Offset value of 0x7b9ee000
645 12:40:48.242725 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
646 12:40:48.249604 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
647 12:40:48.255921 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
648 12:40:48.262379 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
649 12:40:48.269161 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
650 12:40:48.275788 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
651 12:40:48.282409 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
652 12:40:48.286244 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
653 12:40:48.292758 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
654 12:40:48.299105 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
655 12:40:48.305755 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
656 12:40:48.311982 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
657 12:40:48.319007 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
658 12:40:48.325278 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
659 12:40:48.332127 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
660 12:40:48.335609 smm_module_setup_stub: stack_top = 0x7b804000
661 12:40:48.342062 smm_module_setup_stub: per cpu stack_size = 0x800
662 12:40:48.345639 smm_module_setup_stub: runtime.start32_offset = 0x4c
663 12:40:48.352275 smm_module_setup_stub: runtime.smm_size = 0x200000
664 12:40:48.355463 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
665 12:40:48.360686 Clearing SMI status registers
666 12:40:48.363968 SMI_STS: PM1
667 12:40:48.364584 PM1_STS: WAK PWRBTN
668 12:40:48.374279 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
669 12:40:48.377187 In relocation handler: CPU 0
670 12:40:48.380591 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
671 12:40:48.384317 Writing SMRR. base = 0x7b800006, mask=0xff800c00
672 12:40:48.387926 Relocation complete.
673 12:40:48.394098 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
674 12:40:48.397313 In relocation handler: CPU 6
675 12:40:48.400811 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
676 12:40:48.403942 Relocation complete.
677 12:40:48.410663 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
678 12:40:48.413924 In relocation handler: CPU 1
679 12:40:48.417468 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
680 12:40:48.424222 Writing SMRR. base = 0x7b800006, mask=0xff800c00
681 12:40:48.424857 Relocation complete.
682 12:40:48.430686 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
683 12:40:48.434233 In relocation handler: CPU 3
684 12:40:48.437310 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
685 12:40:48.443924 Writing SMRR. base = 0x7b800006, mask=0xff800c00
686 12:40:48.446967 Relocation complete.
687 12:40:48.453787 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
688 12:40:48.457050 In relocation handler: CPU 2
689 12:40:48.460212 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
690 12:40:48.463576 Writing SMRR. base = 0x7b800006, mask=0xff800c00
691 12:40:48.467055 Relocation complete.
692 12:40:48.473708 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
693 12:40:48.477218 In relocation handler: CPU 4
694 12:40:48.480019 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
695 12:40:48.486591 Writing SMRR. base = 0x7b800006, mask=0xff800c00
696 12:40:48.487120 Relocation complete.
697 12:40:48.496707 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
698 12:40:48.497219 In relocation handler: CPU 5
699 12:40:48.503750 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
700 12:40:48.504308 Relocation complete.
701 12:40:48.513428 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
702 12:40:48.514010 In relocation handler: CPU 7
703 12:40:48.519817 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
704 12:40:48.523571 Writing SMRR. base = 0x7b800006, mask=0xff800c00
705 12:40:48.526663 Relocation complete.
706 12:40:48.527217 Initializing CPU #0
707 12:40:48.530408 CPU: vendor Intel device 906a4
708 12:40:48.536454 CPU: family 06, model 9a, stepping 04
709 12:40:48.536942 Clearing out pending MCEs
710 12:40:48.539934 cpu: energy policy set to 7
711 12:40:48.543142 Turbo is available but hidden
712 12:40:48.546208 Turbo is available and visible
713 12:40:48.549831 microcode: Update skipped, already up-to-date
714 12:40:48.552960 CPU #0 initialized
715 12:40:48.556517 Initializing CPU #6
716 12:40:48.557031 Initializing CPU #4
717 12:40:48.559905 Initializing CPU #2
718 12:40:48.562871 CPU: vendor Intel device 906a4
719 12:40:48.565982 CPU: family 06, model 9a, stepping 04
720 12:40:48.569548 Initializing CPU #1
721 12:40:48.570175 Clearing out pending MCEs
722 12:40:48.573084 Initializing CPU #7
723 12:40:48.576427 CPU: vendor Intel device 906a4
724 12:40:48.579263 CPU: family 06, model 9a, stepping 04
725 12:40:48.582594 CPU: vendor Intel device 906a4
726 12:40:48.586256 CPU: family 06, model 9a, stepping 04
727 12:40:48.589191 Initializing CPU #3
728 12:40:48.589613 Initializing CPU #5
729 12:40:48.592483 Clearing out pending MCEs
730 12:40:48.596010 Clearing out pending MCEs
731 12:40:48.599195 CPU: vendor Intel device 906a4
732 12:40:48.602905 CPU: family 06, model 9a, stepping 04
733 12:40:48.605857 cpu: energy policy set to 7
734 12:40:48.609158 cpu: energy policy set to 7
735 12:40:48.612258 cpu: energy policy set to 7
736 12:40:48.615937 Clearing out pending MCEs
737 12:40:48.619372 microcode: Update skipped, already up-to-date
738 12:40:48.619836 CPU #1 initialized
739 12:40:48.622585 cpu: energy policy set to 7
740 12:40:48.628895 microcode: Update skipped, already up-to-date
741 12:40:48.629383 CPU #2 initialized
742 12:40:48.636011 microcode: Update skipped, already up-to-date
743 12:40:48.636540 CPU #3 initialized
744 12:40:48.641750 microcode: Update skipped, already up-to-date
745 12:40:48.641832 CPU #4 initialized
746 12:40:48.644991 CPU: vendor Intel device 906a4
747 12:40:48.648791 CPU: family 06, model 9a, stepping 04
748 12:40:48.651755 CPU: vendor Intel device 906a4
749 12:40:48.654935 CPU: family 06, model 9a, stepping 04
750 12:40:48.658464 CPU: vendor Intel device 906a4
751 12:40:48.665228 CPU: family 06, model 9a, stepping 04
752 12:40:48.665312 Clearing out pending MCEs
753 12:40:48.668521 Clearing out pending MCEs
754 12:40:48.671915 cpu: energy policy set to 7
755 12:40:48.674885 Clearing out pending MCEs
756 12:40:48.678326 cpu: energy policy set to 7
757 12:40:48.681522 microcode: Update skipped, already up-to-date
758 12:40:48.684993 CPU #5 initialized
759 12:40:48.688370 microcode: Update skipped, already up-to-date
760 12:40:48.691452 CPU #7 initialized
761 12:40:48.691534 cpu: energy policy set to 7
762 12:40:48.698117 microcode: Update skipped, already up-to-date
763 12:40:48.698199 CPU #6 initialized
764 12:40:48.705020 bsp_do_flight_plan done after 689 msecs.
765 12:40:48.708548 CPU: frequency set to 4400 MHz
766 12:40:48.708631 Enabling SMIs.
767 12:40:48.714790 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
768 12:40:48.731012 Probing TPM I2C: done! DID_VID 0x00281ae0
769 12:40:48.734408 Locality already claimed
770 12:40:48.737586 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
771 12:40:48.748820 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
772 12:40:48.752493 Enabling GPIO PM b/c CR50 has long IRQ pulse support
773 12:40:48.758827 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
774 12:40:48.765746 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
775 12:40:48.768862 Found a VBT of 9216 bytes after decompression
776 12:40:48.772431 PCI 1.0, PIN A, using IRQ #16
777 12:40:48.775584 PCI 2.0, PIN A, using IRQ #17
778 12:40:48.778896 PCI 4.0, PIN A, using IRQ #18
779 12:40:48.782392 PCI 5.0, PIN A, using IRQ #16
780 12:40:48.785425 PCI 6.0, PIN A, using IRQ #16
781 12:40:48.788812 PCI 6.2, PIN C, using IRQ #18
782 12:40:48.792258 PCI 7.0, PIN A, using IRQ #19
783 12:40:48.795548 PCI 7.1, PIN B, using IRQ #20
784 12:40:48.799118 PCI 7.2, PIN C, using IRQ #21
785 12:40:48.802004 PCI 7.3, PIN D, using IRQ #22
786 12:40:48.805578 PCI 8.0, PIN A, using IRQ #23
787 12:40:48.809327 PCI D.0, PIN A, using IRQ #17
788 12:40:48.811895 PCI D.1, PIN B, using IRQ #19
789 12:40:48.811978 PCI 10.0, PIN A, using IRQ #24
790 12:40:48.815428 PCI 10.1, PIN B, using IRQ #25
791 12:40:48.818521 PCI 10.6, PIN C, using IRQ #20
792 12:40:48.822287 PCI 10.7, PIN D, using IRQ #21
793 12:40:48.825165 PCI 11.0, PIN A, using IRQ #26
794 12:40:48.828856 PCI 11.1, PIN B, using IRQ #27
795 12:40:48.832015 PCI 11.2, PIN C, using IRQ #28
796 12:40:48.835356 PCI 11.3, PIN D, using IRQ #29
797 12:40:48.838566 PCI 12.0, PIN A, using IRQ #30
798 12:40:48.841910 PCI 12.6, PIN B, using IRQ #31
799 12:40:48.845052 PCI 12.7, PIN C, using IRQ #22
800 12:40:48.848611 PCI 13.0, PIN A, using IRQ #32
801 12:40:48.852053 PCI 13.1, PIN B, using IRQ #33
802 12:40:48.855109 PCI 13.2, PIN C, using IRQ #34
803 12:40:48.858356 PCI 13.3, PIN D, using IRQ #35
804 12:40:48.862023 PCI 14.0, PIN B, using IRQ #23
805 12:40:48.865332 PCI 14.1, PIN A, using IRQ #36
806 12:40:48.865408 PCI 14.3, PIN C, using IRQ #17
807 12:40:48.868340 PCI 15.0, PIN A, using IRQ #37
808 12:40:48.871640 PCI 15.1, PIN B, using IRQ #38
809 12:40:48.875401 PCI 15.2, PIN C, using IRQ #39
810 12:40:48.878505 PCI 15.3, PIN D, using IRQ #40
811 12:40:48.881632 PCI 16.0, PIN A, using IRQ #18
812 12:40:48.885030 PCI 16.1, PIN B, using IRQ #19
813 12:40:48.888204 PCI 16.2, PIN C, using IRQ #20
814 12:40:48.891646 PCI 16.3, PIN D, using IRQ #21
815 12:40:48.894887 PCI 16.4, PIN A, using IRQ #18
816 12:40:48.898599 PCI 16.5, PIN B, using IRQ #19
817 12:40:48.901603 PCI 17.0, PIN A, using IRQ #22
818 12:40:48.905388 PCI 19.0, PIN A, using IRQ #41
819 12:40:48.908516 PCI 19.1, PIN B, using IRQ #42
820 12:40:48.911699 PCI 19.2, PIN C, using IRQ #43
821 12:40:48.915257 PCI 1C.0, PIN A, using IRQ #16
822 12:40:48.918504 PCI 1C.1, PIN B, using IRQ #17
823 12:40:48.918658 PCI 1C.2, PIN C, using IRQ #18
824 12:40:48.921563 PCI 1C.3, PIN D, using IRQ #19
825 12:40:48.925078 PCI 1C.4, PIN A, using IRQ #16
826 12:40:48.928197 PCI 1C.5, PIN B, using IRQ #17
827 12:40:48.931451 PCI 1C.6, PIN C, using IRQ #18
828 12:40:48.934990 PCI 1C.7, PIN D, using IRQ #19
829 12:40:48.938113 PCI 1D.0, PIN A, using IRQ #16
830 12:40:48.941877 PCI 1D.1, PIN B, using IRQ #17
831 12:40:48.944771 PCI 1D.2, PIN C, using IRQ #18
832 12:40:48.948010 PCI 1D.3, PIN D, using IRQ #19
833 12:40:48.952002 PCI 1E.0, PIN A, using IRQ #23
834 12:40:48.954909 PCI 1E.1, PIN B, using IRQ #20
835 12:40:48.958096 PCI 1E.2, PIN C, using IRQ #44
836 12:40:48.961656 PCI 1E.3, PIN D, using IRQ #45
837 12:40:48.965001 PCI 1F.3, PIN B, using IRQ #22
838 12:40:48.968391 PCI 1F.4, PIN C, using IRQ #23
839 12:40:48.971477 PCI 1F.6, PIN D, using IRQ #20
840 12:40:48.971559 PCI 1F.7, PIN A, using IRQ #21
841 12:40:48.978324 IRQ: Using dynamically assigned PCI IO-APIC IRQs
842 12:40:48.984645 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
843 12:40:49.165586 FSPS returned 0
844 12:40:49.168987 Executing Phase 1 of FspMultiPhaseSiInit
845 12:40:49.179279 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
846 12:40:49.182389 port C0 DISC req: usage 1 usb3 1 usb2 1
847 12:40:49.185399 Raw Buffer output 0 00000111
848 12:40:49.188868 Raw Buffer output 1 00000000
849 12:40:49.192483 pmc_send_ipc_cmd succeeded
850 12:40:49.199041 port C1 DISC req: usage 1 usb3 3 usb2 3
851 12:40:49.199559 Raw Buffer output 0 00000331
852 12:40:49.202472 Raw Buffer output 1 00000000
853 12:40:49.206850 pmc_send_ipc_cmd succeeded
854 12:40:49.210449 Detected 6 core, 8 thread CPU.
855 12:40:49.213756 Detected 6 core, 8 thread CPU.
856 12:40:49.219326 Detected 6 core, 8 thread CPU.
857 12:40:49.222852 Detected 6 core, 8 thread CPU.
858 12:40:49.225682 Detected 6 core, 8 thread CPU.
859 12:40:49.228895 Detected 6 core, 8 thread CPU.
860 12:40:49.232247 Detected 6 core, 8 thread CPU.
861 12:40:49.235784 Detected 6 core, 8 thread CPU.
862 12:40:49.239428 Detected 6 core, 8 thread CPU.
863 12:40:49.242400 Detected 6 core, 8 thread CPU.
864 12:40:49.245973 Detected 6 core, 8 thread CPU.
865 12:40:49.248985 Detected 6 core, 8 thread CPU.
866 12:40:49.252398 Detected 6 core, 8 thread CPU.
867 12:40:49.255805 Detected 6 core, 8 thread CPU.
868 12:40:49.258819 Detected 6 core, 8 thread CPU.
869 12:40:49.262516 Detected 6 core, 8 thread CPU.
870 12:40:49.265505 Detected 6 core, 8 thread CPU.
871 12:40:49.269133 Detected 6 core, 8 thread CPU.
872 12:40:49.272149 Detected 6 core, 8 thread CPU.
873 12:40:49.275627 Detected 6 core, 8 thread CPU.
874 12:40:49.278839 Detected 6 core, 8 thread CPU.
875 12:40:49.278924 Detected 6 core, 8 thread CPU.
876 12:40:49.561665 Detected 6 core, 8 thread CPU.
877 12:40:49.565117 Detected 6 core, 8 thread CPU.
878 12:40:49.568134 Detected 6 core, 8 thread CPU.
879 12:40:49.571555 Detected 6 core, 8 thread CPU.
880 12:40:49.574749 Detected 6 core, 8 thread CPU.
881 12:40:49.577891 Detected 6 core, 8 thread CPU.
882 12:40:49.581525 Detected 6 core, 8 thread CPU.
883 12:40:49.584566 Detected 6 core, 8 thread CPU.
884 12:40:49.588302 Detected 6 core, 8 thread CPU.
885 12:40:49.591326 Detected 6 core, 8 thread CPU.
886 12:40:49.594467 Detected 6 core, 8 thread CPU.
887 12:40:49.598238 Detected 6 core, 8 thread CPU.
888 12:40:49.601115 Detected 6 core, 8 thread CPU.
889 12:40:49.604944 Detected 6 core, 8 thread CPU.
890 12:40:49.608199 Detected 6 core, 8 thread CPU.
891 12:40:49.611601 Detected 6 core, 8 thread CPU.
892 12:40:49.614996 Detected 6 core, 8 thread CPU.
893 12:40:49.618316 Detected 6 core, 8 thread CPU.
894 12:40:49.621507 Detected 6 core, 8 thread CPU.
895 12:40:49.625142 Detected 6 core, 8 thread CPU.
896 12:40:49.628101 Display FSP Version Info HOB
897 12:40:49.631043 Reference Code - CPU = c.0.65.70
898 12:40:49.631471 uCode Version = 0.0.4.23
899 12:40:49.634959 TXT ACM version = ff.ff.ff.ffff
900 12:40:49.637910 Reference Code - ME = c.0.65.70
901 12:40:49.641458 MEBx version = 0.0.0.0
902 12:40:49.644515 ME Firmware Version = Lite SKU
903 12:40:49.647855 Reference Code - PCH = c.0.65.70
904 12:40:49.651142 PCH-CRID Status = Disabled
905 12:40:49.654586 PCH-CRID Original Value = ff.ff.ff.ffff
906 12:40:49.658321 PCH-CRID New Value = ff.ff.ff.ffff
907 12:40:49.661280 OPROM - RST - RAID = ff.ff.ff.ffff
908 12:40:49.664867 PCH Hsio Version = 4.0.0.0
909 12:40:49.667819 Reference Code - SA - System Agent = c.0.65.70
910 12:40:49.671234 Reference Code - MRC = 0.0.3.80
911 12:40:49.674445 SA - PCIe Version = c.0.65.70
912 12:40:49.677795 SA-CRID Status = Disabled
913 12:40:49.680954 SA-CRID Original Value = 0.0.0.4
914 12:40:49.684325 SA-CRID New Value = 0.0.0.4
915 12:40:49.687950 OPROM - VBIOS = ff.ff.ff.ffff
916 12:40:49.691018 IO Manageability Engine FW Version = 24.0.4.0
917 12:40:49.694666 PHY Build Version = 0.0.0.2016
918 12:40:49.697504 Thunderbolt(TM) FW Version = 0.0.0.0
919 12:40:49.704260 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
920 12:40:49.710912 BS: BS_DEV_INIT_CHIPS run times (exec / console): 481 / 507 ms
921 12:40:49.714291 Enumerating buses...
922 12:40:49.717384 Show all devs... Before device enumeration.
923 12:40:49.721029 Root Device: enabled 1
924 12:40:49.724412 CPU_CLUSTER: 0: enabled 1
925 12:40:49.724716 DOMAIN: 0000: enabled 1
926 12:40:49.727281 GPIO: 0: enabled 1
927 12:40:49.730635 PCI: 00:00.0: enabled 1
928 12:40:49.731039 PCI: 00:01.0: enabled 0
929 12:40:49.733716 PCI: 00:01.1: enabled 0
930 12:40:49.737269 PCI: 00:02.0: enabled 1
931 12:40:49.740610 PCI: 00:04.0: enabled 1
932 12:40:49.740922 PCI: 00:05.0: enabled 0
933 12:40:49.743640 PCI: 00:06.0: enabled 1
934 12:40:49.747495 PCI: 00:06.2: enabled 0
935 12:40:49.750678 PCI: 00:07.0: enabled 0
936 12:40:49.750983 PCI: 00:07.1: enabled 0
937 12:40:49.753731 PCI: 00:07.2: enabled 0
938 12:40:49.757294 PCI: 00:07.3: enabled 0
939 12:40:49.760322 PCI: 00:08.0: enabled 0
940 12:40:49.760619 PCI: 00:09.0: enabled 0
941 12:40:49.763788 PCI: 00:0a.0: enabled 1
942 12:40:49.766875 PCI: 00:0d.0: enabled 1
943 12:40:49.770236 PCI: 00:0d.1: enabled 0
944 12:40:49.770536 PCI: 00:0d.2: enabled 0
945 12:40:49.773198 PCI: 00:0d.3: enabled 0
946 12:40:49.776851 PCI: 00:0e.0: enabled 0
947 12:40:49.777150 PCI: 00:10.0: enabled 0
948 12:40:49.780175 PCI: 00:10.1: enabled 0
949 12:40:49.783352 PCI: 00:10.6: enabled 0
950 12:40:49.786880 PCI: 00:10.7: enabled 0
951 12:40:49.787179 PCI: 00:12.0: enabled 0
952 12:40:49.790212 PCI: 00:12.6: enabled 0
953 12:40:49.793151 PCI: 00:12.7: enabled 0
954 12:40:49.796700 PCI: 00:13.0: enabled 0
955 12:40:49.797128 PCI: 00:14.0: enabled 1
956 12:40:49.800371 PCI: 00:14.1: enabled 0
957 12:40:49.803120 PCI: 00:14.2: enabled 1
958 12:40:49.806499 PCI: 00:14.3: enabled 1
959 12:40:49.806930 PCI: 00:15.0: enabled 1
960 12:40:49.809814 PCI: 00:15.1: enabled 1
961 12:40:49.813478 PCI: 00:15.2: enabled 0
962 12:40:49.816412 PCI: 00:15.3: enabled 1
963 12:40:49.816715 PCI: 00:16.0: enabled 1
964 12:40:49.819975 PCI: 00:16.1: enabled 0
965 12:40:49.822957 PCI: 00:16.2: enabled 0
966 12:40:49.823256 PCI: 00:16.3: enabled 0
967 12:40:49.826671 PCI: 00:16.4: enabled 0
968 12:40:49.829759 PCI: 00:16.5: enabled 0
969 12:40:49.833436 PCI: 00:17.0: enabled 1
970 12:40:49.833800 PCI: 00:19.0: enabled 0
971 12:40:49.836231 PCI: 00:19.1: enabled 1
972 12:40:49.839564 PCI: 00:19.2: enabled 0
973 12:40:49.843034 PCI: 00:1a.0: enabled 0
974 12:40:49.843494 PCI: 00:1c.0: enabled 0
975 12:40:49.846265 PCI: 00:1c.1: enabled 0
976 12:40:49.849455 PCI: 00:1c.2: enabled 0
977 12:40:49.852817 PCI: 00:1c.3: enabled 0
978 12:40:49.853426 PCI: 00:1c.4: enabled 0
979 12:40:49.856624 PCI: 00:1c.5: enabled 0
980 12:40:49.859846 PCI: 00:1c.6: enabled 0
981 12:40:49.863064 PCI: 00:1c.7: enabled 0
982 12:40:49.863485 PCI: 00:1d.0: enabled 0
983 12:40:49.866211 PCI: 00:1d.1: enabled 0
984 12:40:49.869551 PCI: 00:1d.2: enabled 0
985 12:40:49.873144 PCI: 00:1d.3: enabled 0
986 12:40:49.873550 PCI: 00:1e.0: enabled 1
987 12:40:49.876241 PCI: 00:1e.1: enabled 0
988 12:40:49.879788 PCI: 00:1e.2: enabled 0
989 12:40:49.880256 PCI: 00:1e.3: enabled 1
990 12:40:49.882987 PCI: 00:1f.0: enabled 1
991 12:40:49.886408 PCI: 00:1f.1: enabled 0
992 12:40:49.889574 PCI: 00:1f.2: enabled 1
993 12:40:49.890078 PCI: 00:1f.3: enabled 1
994 12:40:49.892812 PCI: 00:1f.4: enabled 0
995 12:40:49.896078 PCI: 00:1f.5: enabled 1
996 12:40:49.899260 PCI: 00:1f.6: enabled 0
997 12:40:49.899822 PCI: 00:1f.7: enabled 0
998 12:40:49.903010 GENERIC: 0.0: enabled 1
999 12:40:49.905955 GENERIC: 0.0: enabled 1
1000 12:40:49.909399 GENERIC: 1.0: enabled 1
1001 12:40:49.909823 GENERIC: 0.0: enabled 1
1002 12:40:49.912795 GENERIC: 1.0: enabled 1
1003 12:40:49.916207 USB0 port 0: enabled 1
1004 12:40:49.916626 USB0 port 0: enabled 1
1005 12:40:49.919348 GENERIC: 0.0: enabled 1
1006 12:40:49.922865 I2C: 00:1a: enabled 1
1007 12:40:49.925900 I2C: 00:31: enabled 1
1008 12:40:49.926320 I2C: 00:32: enabled 1
1009 12:40:49.929409 I2C: 00:50: enabled 1
1010 12:40:49.932631 I2C: 00:10: enabled 1
1011 12:40:49.933127 I2C: 00:15: enabled 1
1012 12:40:49.936134 I2C: 00:2c: enabled 1
1013 12:40:49.939226 GENERIC: 0.0: enabled 1
1014 12:40:49.939671 SPI: 00: enabled 1
1015 12:40:49.942603 PNP: 0c09.0: enabled 1
1016 12:40:49.946006 GENERIC: 0.0: enabled 1
1017 12:40:49.946424 USB3 port 0: enabled 1
1018 12:40:49.949275 USB3 port 1: enabled 0
1019 12:40:49.952632 USB3 port 2: enabled 1
1020 12:40:49.955706 USB3 port 3: enabled 0
1021 12:40:49.956142 USB2 port 0: enabled 1
1022 12:40:49.959375 USB2 port 1: enabled 0
1023 12:40:49.962595 USB2 port 2: enabled 1
1024 12:40:49.963069 USB2 port 3: enabled 0
1025 12:40:49.965741 USB2 port 4: enabled 0
1026 12:40:49.969237 USB2 port 5: enabled 1
1027 12:40:49.969803 USB2 port 6: enabled 0
1028 12:40:49.972438 USB2 port 7: enabled 0
1029 12:40:49.975517 USB2 port 8: enabled 1
1030 12:40:49.978843 USB2 port 9: enabled 1
1031 12:40:49.979265 USB3 port 0: enabled 1
1032 12:40:49.982404 USB3 port 1: enabled 0
1033 12:40:49.986125 USB3 port 2: enabled 0
1034 12:40:49.986727 USB3 port 3: enabled 0
1035 12:40:49.989301 GENERIC: 0.0: enabled 1
1036 12:40:49.992247 GENERIC: 1.0: enabled 1
1037 12:40:49.995883 APIC: 00: enabled 1
1038 12:40:49.996473 APIC: 12: enabled 1
1039 12:40:49.999306 APIC: 14: enabled 1
1040 12:40:49.999936 APIC: 16: enabled 1
1041 12:40:50.002482 APIC: 10: enabled 1
1042 12:40:50.005581 APIC: 09: enabled 1
1043 12:40:50.006155 APIC: 01: enabled 1
1044 12:40:50.009066 APIC: 08: enabled 1
1045 12:40:50.009482 Compare with tree...
1046 12:40:50.012484 Root Device: enabled 1
1047 12:40:50.015372 CPU_CLUSTER: 0: enabled 1
1048 12:40:50.018656 APIC: 00: enabled 1
1049 12:40:50.019118 APIC: 12: enabled 1
1050 12:40:50.022109 APIC: 14: enabled 1
1051 12:40:50.025777 APIC: 16: enabled 1
1052 12:40:50.026318 APIC: 10: enabled 1
1053 12:40:50.029023 APIC: 09: enabled 1
1054 12:40:50.032036 APIC: 01: enabled 1
1055 12:40:50.032462 APIC: 08: enabled 1
1056 12:40:50.035796 DOMAIN: 0000: enabled 1
1057 12:40:50.038654 GPIO: 0: enabled 1
1058 12:40:50.042324 PCI: 00:00.0: enabled 1
1059 12:40:50.042829 PCI: 00:01.0: enabled 0
1060 12:40:50.045516 PCI: 00:01.1: enabled 0
1061 12:40:50.048666 PCI: 00:02.0: enabled 1
1062 12:40:50.052116 PCI: 00:04.0: enabled 1
1063 12:40:50.055205 GENERIC: 0.0: enabled 1
1064 12:40:50.055443 PCI: 00:05.0: enabled 0
1065 12:40:50.058594 PCI: 00:06.0: enabled 1
1066 12:40:50.061532 PCI: 00:06.2: enabled 0
1067 12:40:50.065066 PCI: 00:08.0: enabled 0
1068 12:40:50.068726 PCI: 00:09.0: enabled 0
1069 12:40:50.069012 PCI: 00:0a.0: enabled 1
1070 12:40:50.071729 PCI: 00:0d.0: enabled 1
1071 12:40:50.074758 USB0 port 0: enabled 1
1072 12:40:50.078319 USB3 port 0: enabled 1
1073 12:40:50.081602 USB3 port 1: enabled 0
1074 12:40:50.085102 USB3 port 2: enabled 1
1075 12:40:50.085309 USB3 port 3: enabled 0
1076 12:40:50.088332 PCI: 00:0d.1: enabled 0
1077 12:40:50.091698 PCI: 00:0d.2: enabled 0
1078 12:40:50.094747 PCI: 00:0d.3: enabled 0
1079 12:40:50.098538 PCI: 00:0e.0: enabled 0
1080 12:40:50.098841 PCI: 00:10.0: enabled 0
1081 12:40:50.101403 PCI: 00:10.1: enabled 0
1082 12:40:50.104980 PCI: 00:10.6: enabled 0
1083 12:40:50.108436 PCI: 00:10.7: enabled 0
1084 12:40:50.108734 PCI: 00:12.0: enabled 0
1085 12:40:50.111505 PCI: 00:12.6: enabled 0
1086 12:40:50.114803 PCI: 00:12.7: enabled 0
1087 12:40:50.118227 PCI: 00:13.0: enabled 0
1088 12:40:50.121629 PCI: 00:14.0: enabled 1
1089 12:40:50.121947 USB0 port 0: enabled 1
1090 12:40:50.124937 USB2 port 0: enabled 1
1091 12:40:50.128084 USB2 port 1: enabled 0
1092 12:40:50.131525 USB2 port 2: enabled 1
1093 12:40:50.134496 USB2 port 3: enabled 0
1094 12:40:50.138098 USB2 port 4: enabled 0
1095 12:40:50.138170 USB2 port 5: enabled 1
1096 12:40:50.141552 USB2 port 6: enabled 0
1097 12:40:50.144669 USB2 port 7: enabled 0
1098 12:40:50.148135 USB2 port 8: enabled 1
1099 12:40:50.151172 USB2 port 9: enabled 1
1100 12:40:50.154754 USB3 port 0: enabled 1
1101 12:40:50.154835 USB3 port 1: enabled 0
1102 12:40:50.157830 USB3 port 2: enabled 0
1103 12:40:50.161706 USB3 port 3: enabled 0
1104 12:40:50.164483 PCI: 00:14.1: enabled 0
1105 12:40:50.167839 PCI: 00:14.2: enabled 1
1106 12:40:50.167966 PCI: 00:14.3: enabled 1
1107 12:40:50.171576 GENERIC: 0.0: enabled 1
1108 12:40:50.174679 PCI: 00:15.0: enabled 1
1109 12:40:50.177795 I2C: 00:1a: enabled 1
1110 12:40:50.181527 I2C: 00:31: enabled 1
1111 12:40:50.181648 I2C: 00:32: enabled 1
1112 12:40:50.184532 PCI: 00:15.1: enabled 1
1113 12:40:50.188214 I2C: 00:50: enabled 1
1114 12:40:50.191360 PCI: 00:15.2: enabled 0
1115 12:40:50.191493 PCI: 00:15.3: enabled 1
1116 12:40:50.194827 I2C: 00:10: enabled 1
1117 12:40:50.197977 PCI: 00:16.0: enabled 1
1118 12:40:50.201371 PCI: 00:16.1: enabled 0
1119 12:40:50.204540 PCI: 00:16.2: enabled 0
1120 12:40:50.204770 PCI: 00:16.3: enabled 0
1121 12:40:50.207729 PCI: 00:16.4: enabled 0
1122 12:40:50.211238 PCI: 00:16.5: enabled 0
1123 12:40:50.214950 PCI: 00:17.0: enabled 1
1124 12:40:50.218051 PCI: 00:19.0: enabled 0
1125 12:40:50.218505 PCI: 00:19.1: enabled 1
1126 12:40:50.221247 I2C: 00:15: enabled 1
1127 12:40:50.224546 I2C: 00:2c: enabled 1
1128 12:40:50.228264 PCI: 00:19.2: enabled 0
1129 12:40:50.228735 PCI: 00:1a.0: enabled 0
1130 12:40:50.231857 PCI: 00:1e.0: enabled 1
1131 12:40:50.235074 PCI: 00:1e.1: enabled 0
1132 12:40:50.237899 PCI: 00:1e.2: enabled 0
1133 12:40:50.241731 PCI: 00:1e.3: enabled 1
1134 12:40:50.242113 SPI: 00: enabled 1
1135 12:40:50.244616 PCI: 00:1f.0: enabled 1
1136 12:40:50.248106 PNP: 0c09.0: enabled 1
1137 12:40:50.251153 PCI: 00:1f.1: enabled 0
1138 12:40:50.251606 PCI: 00:1f.2: enabled 1
1139 12:40:50.254685 GENERIC: 0.0: enabled 1
1140 12:40:50.258356 GENERIC: 0.0: enabled 1
1141 12:40:50.261457 GENERIC: 1.0: enabled 1
1142 12:40:50.264475 PCI: 00:1f.3: enabled 1
1143 12:40:50.267917 PCI: 00:1f.4: enabled 0
1144 12:40:50.268299 PCI: 00:1f.5: enabled 1
1145 12:40:50.271248 PCI: 00:1f.6: enabled 0
1146 12:40:50.274753 PCI: 00:1f.7: enabled 0
1147 12:40:50.277928 Root Device scanning...
1148 12:40:50.281372 scan_static_bus for Root Device
1149 12:40:50.281789 CPU_CLUSTER: 0 enabled
1150 12:40:50.284676 DOMAIN: 0000 enabled
1151 12:40:50.288026 DOMAIN: 0000 scanning...
1152 12:40:50.291366 PCI: pci_scan_bus for bus 00
1153 12:40:50.294409 PCI: 00:00.0 [8086/0000] ops
1154 12:40:50.297981 PCI: 00:00.0 [8086/4609] enabled
1155 12:40:50.300950 PCI: 00:02.0 [8086/0000] bus ops
1156 12:40:50.304497 PCI: 00:02.0 [8086/46b3] enabled
1157 12:40:50.307695 PCI: 00:04.0 [8086/0000] bus ops
1158 12:40:50.310913 PCI: 00:04.0 [8086/461d] enabled
1159 12:40:50.314668 PCI: 00:06.0 [8086/0000] bus ops
1160 12:40:50.317758 PCI: 00:06.0 [8086/464d] enabled
1161 12:40:50.321282 PCI: 00:08.0 [8086/464f] disabled
1162 12:40:50.324733 PCI: 00:0a.0 [8086/467d] enabled
1163 12:40:50.327994 PCI: 00:0d.0 [8086/0000] bus ops
1164 12:40:50.331412 PCI: 00:0d.0 [8086/461e] enabled
1165 12:40:50.334277 PCI: 00:14.0 [8086/0000] bus ops
1166 12:40:50.337932 PCI: 00:14.0 [8086/51ed] enabled
1167 12:40:50.341137 PCI: 00:14.2 [8086/51ef] enabled
1168 12:40:50.344420 PCI: 00:14.3 [8086/0000] bus ops
1169 12:40:50.348073 PCI: 00:14.3 [8086/51f0] enabled
1170 12:40:50.351755 PCI: 00:15.0 [8086/0000] bus ops
1171 12:40:50.354723 PCI: 00:15.0 [8086/51e8] enabled
1172 12:40:50.357705 PCI: 00:15.1 [8086/0000] bus ops
1173 12:40:50.361547 PCI: 00:15.1 [8086/51e9] enabled
1174 12:40:50.364600 PCI: 00:15.2 [8086/0000] bus ops
1175 12:40:50.368147 PCI: 00:15.2 [8086/51ea] disabled
1176 12:40:50.371418 PCI: 00:15.3 [8086/0000] bus ops
1177 12:40:50.374594 PCI: 00:15.3 [8086/51eb] enabled
1178 12:40:50.377789 PCI: 00:16.0 [8086/0000] ops
1179 12:40:50.381359 PCI: 00:16.0 [8086/51e0] enabled
1180 12:40:50.387827 PCI: Static device PCI: 00:17.0 not found, disabling it.
1181 12:40:50.391416 PCI: 00:19.0 [8086/0000] bus ops
1182 12:40:50.394793 PCI: 00:19.0 [8086/51c5] disabled
1183 12:40:50.397626 PCI: 00:19.1 [8086/0000] bus ops
1184 12:40:50.401181 PCI: 00:19.1 [8086/51c6] enabled
1185 12:40:50.404221 PCI: 00:1e.0 [8086/0000] ops
1186 12:40:50.407851 PCI: 00:1e.0 [8086/51a8] enabled
1187 12:40:50.410660 PCI: 00:1e.3 [8086/0000] bus ops
1188 12:40:50.414089 PCI: 00:1e.3 [8086/51ab] enabled
1189 12:40:50.417573 PCI: 00:1f.0 [8086/0000] bus ops
1190 12:40:50.421210 PCI: 00:1f.0 [8086/5182] enabled
1191 12:40:50.421739 RTC Init
1192 12:40:50.424553 Set power on after power failure.
1193 12:40:50.427717 Disabling Deep S3
1194 12:40:50.428141 Disabling Deep S3
1195 12:40:50.431144 Disabling Deep S4
1196 12:40:50.434134 Disabling Deep S4
1197 12:40:50.434680 Disabling Deep S5
1198 12:40:50.437321 Disabling Deep S5
1199 12:40:50.440701 PCI: 00:1f.2 [0000/0000] hidden
1200 12:40:50.444297 PCI: 00:1f.3 [8086/0000] bus ops
1201 12:40:50.447811 PCI: 00:1f.3 [8086/51c8] enabled
1202 12:40:50.451282 PCI: 00:1f.5 [8086/0000] bus ops
1203 12:40:50.454152 PCI: 00:1f.5 [8086/51a4] enabled
1204 12:40:50.454670 GPIO: 0 enabled
1205 12:40:50.457518 PCI: Leftover static devices:
1206 12:40:50.457791 PCI: 00:01.0
1207 12:40:50.460642 PCI: 00:01.1
1208 12:40:50.460913 PCI: 00:05.0
1209 12:40:50.463904 PCI: 00:06.2
1210 12:40:50.464179 PCI: 00:09.0
1211 12:40:50.467516 PCI: 00:0d.1
1212 12:40:50.467790 PCI: 00:0d.2
1213 12:40:50.468006 PCI: 00:0d.3
1214 12:40:50.470754 PCI: 00:0e.0
1215 12:40:50.471036 PCI: 00:10.0
1216 12:40:50.474171 PCI: 00:10.1
1217 12:40:50.474468 PCI: 00:10.6
1218 12:40:50.474728 PCI: 00:10.7
1219 12:40:50.477662 PCI: 00:12.0
1220 12:40:50.477917 PCI: 00:12.6
1221 12:40:50.481065 PCI: 00:12.7
1222 12:40:50.481378 PCI: 00:13.0
1223 12:40:50.481617 PCI: 00:14.1
1224 12:40:50.484236 PCI: 00:16.1
1225 12:40:50.484530 PCI: 00:16.2
1226 12:40:50.487769 PCI: 00:16.3
1227 12:40:50.488076 PCI: 00:16.4
1228 12:40:50.490854 PCI: 00:16.5
1229 12:40:50.491169 PCI: 00:17.0
1230 12:40:50.491389 PCI: 00:19.2
1231 12:40:50.494085 PCI: 00:1a.0
1232 12:40:50.494356 PCI: 00:1e.1
1233 12:40:50.497442 PCI: 00:1e.2
1234 12:40:50.497812 PCI: 00:1f.1
1235 12:40:50.498160 PCI: 00:1f.4
1236 12:40:50.500869 PCI: 00:1f.6
1237 12:40:50.501255 PCI: 00:1f.7
1238 12:40:50.503912 PCI: Check your devicetree.cb.
1239 12:40:50.507603 PCI: 00:02.0 scanning...
1240 12:40:50.510727 scan_generic_bus for PCI: 00:02.0
1241 12:40:50.514432 scan_generic_bus for PCI: 00:02.0 done
1242 12:40:50.520792 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1243 12:40:50.521062 PCI: 00:04.0 scanning...
1244 12:40:50.524292 scan_generic_bus for PCI: 00:04.0
1245 12:40:50.527160 GENERIC: 0.0 enabled
1246 12:40:50.534031 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1247 12:40:50.537842 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1248 12:40:50.540575 PCI: 00:06.0 scanning...
1249 12:40:50.544343 do_pci_scan_bridge for PCI: 00:06.0
1250 12:40:50.547298 PCI: pci_scan_bus for bus 01
1251 12:40:50.551007 PCI: 01:00.0 [15b7/5009] enabled
1252 12:40:50.554011 Enabling Common Clock Configuration
1253 12:40:50.557400 L1 Sub-State supported from root port 6
1254 12:40:50.560747 L1 Sub-State Support = 0x5
1255 12:40:50.564351 CommonModeRestoreTime = 0x6e
1256 12:40:50.567953 Power On Value = 0x5, Power On Scale = 0x2
1257 12:40:50.570715 ASPM: Enabled L1
1258 12:40:50.574304 PCIe: Max_Payload_Size adjusted to 256
1259 12:40:50.577440 PCI: 01:00.0: Enabled LTR
1260 12:40:50.580675 PCI: 01:00.0: Programmed LTR max latencies
1261 12:40:50.587772 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1262 12:40:50.588047 PCI: 00:0d.0 scanning...
1263 12:40:50.590667 scan_static_bus for PCI: 00:0d.0
1264 12:40:50.593716 USB0 port 0 enabled
1265 12:40:50.597398 USB0 port 0 scanning...
1266 12:40:50.600782 scan_static_bus for USB0 port 0
1267 12:40:50.601117 USB3 port 0 enabled
1268 12:40:50.603913 USB3 port 1 disabled
1269 12:40:50.607260 USB3 port 2 enabled
1270 12:40:50.607543 USB3 port 3 disabled
1271 12:40:50.610627 USB3 port 0 scanning...
1272 12:40:50.613762 scan_static_bus for USB3 port 0
1273 12:40:50.617457 scan_static_bus for USB3 port 0 done
1274 12:40:50.620762 scan_bus: bus USB3 port 0 finished in 6 msecs
1275 12:40:50.623680 USB3 port 2 scanning...
1276 12:40:50.627255 scan_static_bus for USB3 port 2
1277 12:40:50.630313 scan_static_bus for USB3 port 2 done
1278 12:40:50.637062 scan_bus: bus USB3 port 2 finished in 6 msecs
1279 12:40:50.640482 scan_static_bus for USB0 port 0 done
1280 12:40:50.643695 scan_bus: bus USB0 port 0 finished in 43 msecs
1281 12:40:50.646777 scan_static_bus for PCI: 00:0d.0 done
1282 12:40:50.653353 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1283 12:40:50.656863 PCI: 00:14.0 scanning...
1284 12:40:50.660280 scan_static_bus for PCI: 00:14.0
1285 12:40:50.660551 USB0 port 0 enabled
1286 12:40:50.663311 USB0 port 0 scanning...
1287 12:40:50.666753 scan_static_bus for USB0 port 0
1288 12:40:50.670034 USB2 port 0 enabled
1289 12:40:50.670397 USB2 port 1 disabled
1290 12:40:50.673476 USB2 port 2 enabled
1291 12:40:50.673780 USB2 port 3 disabled
1292 12:40:50.676829 USB2 port 4 disabled
1293 12:40:50.679864 USB2 port 5 enabled
1294 12:40:50.680133 USB2 port 6 disabled
1295 12:40:50.683611 USB2 port 7 disabled
1296 12:40:50.686499 USB2 port 8 enabled
1297 12:40:50.686797 USB2 port 9 enabled
1298 12:40:50.689828 USB3 port 0 enabled
1299 12:40:50.692905 USB3 port 1 disabled
1300 12:40:50.692980 USB3 port 2 disabled
1301 12:40:50.696401 USB3 port 3 disabled
1302 12:40:50.699601 USB2 port 0 scanning...
1303 12:40:50.703141 scan_static_bus for USB2 port 0
1304 12:40:50.706873 scan_static_bus for USB2 port 0 done
1305 12:40:50.709949 scan_bus: bus USB2 port 0 finished in 6 msecs
1306 12:40:50.712772 USB2 port 2 scanning...
1307 12:40:50.716235 scan_static_bus for USB2 port 2
1308 12:40:50.719908 scan_static_bus for USB2 port 2 done
1309 12:40:50.723019 scan_bus: bus USB2 port 2 finished in 6 msecs
1310 12:40:50.726259 USB2 port 5 scanning...
1311 12:40:50.729589 scan_static_bus for USB2 port 5
1312 12:40:50.732912 scan_static_bus for USB2 port 5 done
1313 12:40:50.736175 scan_bus: bus USB2 port 5 finished in 6 msecs
1314 12:40:50.739483 USB2 port 8 scanning...
1315 12:40:50.743088 scan_static_bus for USB2 port 8
1316 12:40:50.746218 scan_static_bus for USB2 port 8 done
1317 12:40:50.752893 scan_bus: bus USB2 port 8 finished in 6 msecs
1318 12:40:50.752974 USB2 port 9 scanning...
1319 12:40:50.756415 scan_static_bus for USB2 port 9
1320 12:40:50.759442 scan_static_bus for USB2 port 9 done
1321 12:40:50.766161 scan_bus: bus USB2 port 9 finished in 6 msecs
1322 12:40:50.769484 USB3 port 0 scanning...
1323 12:40:50.772539 scan_static_bus for USB3 port 0
1324 12:40:50.775970 scan_static_bus for USB3 port 0 done
1325 12:40:50.779440 scan_bus: bus USB3 port 0 finished in 6 msecs
1326 12:40:50.782682 scan_static_bus for USB0 port 0 done
1327 12:40:50.789415 scan_bus: bus USB0 port 0 finished in 120 msecs
1328 12:40:50.792844 scan_static_bus for PCI: 00:14.0 done
1329 12:40:50.795920 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1330 12:40:50.799615 PCI: 00:14.3 scanning...
1331 12:40:50.802874 scan_static_bus for PCI: 00:14.3
1332 12:40:50.805875 GENERIC: 0.0 enabled
1333 12:40:50.809018 scan_static_bus for PCI: 00:14.3 done
1334 12:40:50.812608 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1335 12:40:50.816124 PCI: 00:15.0 scanning...
1336 12:40:50.819134 scan_static_bus for PCI: 00:15.0
1337 12:40:50.822525 I2C: 00:1a enabled
1338 12:40:50.822644 I2C: 00:31 enabled
1339 12:40:50.826253 I2C: 00:32 enabled
1340 12:40:50.829405 scan_static_bus for PCI: 00:15.0 done
1341 12:40:50.832941 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1342 12:40:50.835884 PCI: 00:15.1 scanning...
1343 12:40:50.839520 scan_static_bus for PCI: 00:15.1
1344 12:40:50.842359 I2C: 00:50 enabled
1345 12:40:50.845990 scan_static_bus for PCI: 00:15.1 done
1346 12:40:50.849271 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1347 12:40:50.852782 PCI: 00:15.3 scanning...
1348 12:40:50.855611 scan_static_bus for PCI: 00:15.3
1349 12:40:50.859334 I2C: 00:10 enabled
1350 12:40:50.862287 scan_static_bus for PCI: 00:15.3 done
1351 12:40:50.865968 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1352 12:40:50.869100 PCI: 00:19.1 scanning...
1353 12:40:50.872775 scan_static_bus for PCI: 00:19.1
1354 12:40:50.872857 I2C: 00:15 enabled
1355 12:40:50.876002 I2C: 00:2c enabled
1356 12:40:50.879088 scan_static_bus for PCI: 00:19.1 done
1357 12:40:50.885836 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1358 12:40:50.885933 PCI: 00:1e.3 scanning...
1359 12:40:50.888953 scan_generic_bus for PCI: 00:1e.3
1360 12:40:50.892205 SPI: 00 enabled
1361 12:40:50.899377 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1362 12:40:50.902347 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1363 12:40:50.906045 PCI: 00:1f.0 scanning...
1364 12:40:50.909041 scan_static_bus for PCI: 00:1f.0
1365 12:40:50.912504 PNP: 0c09.0 enabled
1366 12:40:50.912587 PNP: 0c09.0 scanning...
1367 12:40:50.915588 scan_static_bus for PNP: 0c09.0
1368 12:40:50.919441 scan_static_bus for PNP: 0c09.0 done
1369 12:40:50.925834 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1370 12:40:50.928887 scan_static_bus for PCI: 00:1f.0 done
1371 12:40:50.932431 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1372 12:40:50.935474 PCI: 00:1f.2 scanning...
1373 12:40:50.939167 scan_static_bus for PCI: 00:1f.2
1374 12:40:50.942283 GENERIC: 0.0 enabled
1375 12:40:50.945465 GENERIC: 0.0 scanning...
1376 12:40:50.948945 scan_static_bus for GENERIC: 0.0
1377 12:40:50.949027 GENERIC: 0.0 enabled
1378 12:40:50.952362 GENERIC: 1.0 enabled
1379 12:40:50.955338 scan_static_bus for GENERIC: 0.0 done
1380 12:40:50.958589 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1381 12:40:50.965435 scan_static_bus for PCI: 00:1f.2 done
1382 12:40:50.968607 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1383 12:40:50.971865 PCI: 00:1f.3 scanning...
1384 12:40:50.975489 scan_static_bus for PCI: 00:1f.3
1385 12:40:50.978838 scan_static_bus for PCI: 00:1f.3 done
1386 12:40:50.981998 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1387 12:40:50.985622 PCI: 00:1f.5 scanning...
1388 12:40:50.988688 scan_generic_bus for PCI: 00:1f.5
1389 12:40:50.991888 scan_generic_bus for PCI: 00:1f.5 done
1390 12:40:50.998768 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1391 12:40:51.001829 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1392 12:40:51.005437 scan_static_bus for Root Device done
1393 12:40:51.011987 scan_bus: bus Root Device finished in 729 msecs
1394 12:40:51.012071 done
1395 12:40:51.018774 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1297 ms
1396 12:40:51.025392 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1397 12:40:51.028770 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1398 12:40:51.031742 SPI flash protection: WPSW=1 SRP0=0
1399 12:40:51.038717 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1400 12:40:51.045076 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1401 12:40:51.045185 found VGA at PCI: 00:02.0
1402 12:40:51.048639 Setting up VGA for PCI: 00:02.0
1403 12:40:51.055494 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1404 12:40:51.058523 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1405 12:40:51.061782 Allocating resources...
1406 12:40:51.064985 Reading resources...
1407 12:40:51.068671 Root Device read_resources bus 0 link: 0
1408 12:40:51.071842 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1409 12:40:51.078375 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1410 12:40:51.081894 DOMAIN: 0000 read_resources bus 0 link: 0
1411 12:40:51.088234 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1412 12:40:51.095012 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1413 12:40:51.101612 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1414 12:40:51.108282 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1415 12:40:51.111987 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1416 12:40:51.118421 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1417 12:40:51.124952 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1418 12:40:51.131703 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1419 12:40:51.138205 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1420 12:40:51.144831 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1421 12:40:51.151483 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1422 12:40:51.158167 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1423 12:40:51.164995 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1424 12:40:51.171371 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1425 12:40:51.177988 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1426 12:40:51.184798 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1427 12:40:51.187919 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1428 12:40:51.194845 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1429 12:40:51.201459 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1430 12:40:51.207821 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1431 12:40:51.214724 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1432 12:40:51.217935 PCI: 00:04.0 read_resources bus 1 link: 0
1433 12:40:51.224619 PCI: 00:04.0 read_resources bus 1 link: 0 done
1434 12:40:51.227814 PCI: 00:06.0 read_resources bus 1 link: 0
1435 12:40:51.231043 PCI: 00:06.0 read_resources bus 1 link: 0 done
1436 12:40:51.238444 PCI: 00:0d.0 read_resources bus 0 link: 0
1437 12:40:51.242292 USB0 port 0 read_resources bus 0 link: 0
1438 12:40:51.245217 USB0 port 0 read_resources bus 0 link: 0 done
1439 12:40:51.248548 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1440 12:40:51.255330 PCI: 00:14.0 read_resources bus 0 link: 0
1441 12:40:51.258493 USB0 port 0 read_resources bus 0 link: 0
1442 12:40:51.262399 USB0 port 0 read_resources bus 0 link: 0 done
1443 12:40:51.269160 PCI: 00:14.0 read_resources bus 0 link: 0 done
1444 12:40:51.271989 PCI: 00:14.3 read_resources bus 0 link: 0
1445 12:40:51.275441 PCI: 00:14.3 read_resources bus 0 link: 0 done
1446 12:40:51.282147 PCI: 00:15.0 read_resources bus 0 link: 0
1447 12:40:51.285554 PCI: 00:15.0 read_resources bus 0 link: 0 done
1448 12:40:51.288674 PCI: 00:15.1 read_resources bus 0 link: 0
1449 12:40:51.295278 PCI: 00:15.1 read_resources bus 0 link: 0 done
1450 12:40:51.298586 PCI: 00:15.3 read_resources bus 0 link: 0
1451 12:40:51.305370 PCI: 00:15.3 read_resources bus 0 link: 0 done
1452 12:40:51.309217 PCI: 00:19.1 read_resources bus 0 link: 0
1453 12:40:51.312176 PCI: 00:19.1 read_resources bus 0 link: 0 done
1454 12:40:51.318495 PCI: 00:1e.3 read_resources bus 2 link: 0
1455 12:40:51.321935 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1456 12:40:51.325051 PCI: 00:1f.0 read_resources bus 0 link: 0
1457 12:40:51.331683 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1458 12:40:51.334910 PCI: 00:1f.2 read_resources bus 0 link: 0
1459 12:40:51.338535 GENERIC: 0.0 read_resources bus 0 link: 0
1460 12:40:51.344919 GENERIC: 0.0 read_resources bus 0 link: 0 done
1461 12:40:51.348523 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1462 12:40:51.354762 DOMAIN: 0000 read_resources bus 0 link: 0 done
1463 12:40:51.358420 Root Device read_resources bus 0 link: 0 done
1464 12:40:51.361868 Done reading resources.
1465 12:40:51.368487 Show resources in subtree (Root Device)...After reading.
1466 12:40:51.371551 Root Device child on link 0 CPU_CLUSTER: 0
1467 12:40:51.375058 CPU_CLUSTER: 0 child on link 0 APIC: 00
1468 12:40:51.378447 APIC: 00
1469 12:40:51.378530 APIC: 12
1470 12:40:51.378636 APIC: 14
1471 12:40:51.381538 APIC: 16
1472 12:40:51.381620 APIC: 10
1473 12:40:51.381685 APIC: 09
1474 12:40:51.385037 APIC: 01
1475 12:40:51.385120 APIC: 08
1476 12:40:51.388161 DOMAIN: 0000 child on link 0 GPIO: 0
1477 12:40:51.398000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1478 12:40:51.408314 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1479 12:40:51.411373 GPIO: 0
1480 12:40:51.411455 PCI: 00:00.0
1481 12:40:51.421369 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1482 12:40:51.431117 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1483 12:40:51.440871 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1484 12:40:51.447655 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1485 12:40:51.457475 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1486 12:40:51.467413 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1487 12:40:51.477487 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1488 12:40:51.487856 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1489 12:40:51.497190 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1490 12:40:51.507183 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1491 12:40:51.513926 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1492 12:40:51.523911 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1493 12:40:51.533807 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1494 12:40:51.543854 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1495 12:40:51.553545 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1496 12:40:51.563544 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1497 12:40:51.569984 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1498 12:40:51.580235 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1499 12:40:51.589950 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1500 12:40:51.600000 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1501 12:40:51.610316 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1502 12:40:51.619777 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1503 12:40:51.629909 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1504 12:40:51.640082 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1505 12:40:51.650190 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1506 12:40:51.659982 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1507 12:40:51.666398 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1508 12:40:51.676715 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1509 12:40:51.679933 PCI: 00:02.0
1510 12:40:51.690118 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1511 12:40:51.699753 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1512 12:40:51.706173 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1513 12:40:51.713023 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1514 12:40:51.722944 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1515 12:40:51.723253 GENERIC: 0.0
1516 12:40:51.729684 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1517 12:40:51.736638 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1518 12:40:51.746287 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1519 12:40:51.756237 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1520 12:40:51.759717 PCI: 01:00.0
1521 12:40:51.769282 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1522 12:40:51.779311 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1523 12:40:51.779393 PCI: 00:08.0
1524 12:40:51.782352 PCI: 00:0a.0
1525 12:40:51.792257 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1526 12:40:51.795865 PCI: 00:0d.0 child on link 0 USB0 port 0
1527 12:40:51.805687 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1528 12:40:51.809360 USB0 port 0 child on link 0 USB3 port 0
1529 12:40:51.812434 USB3 port 0
1530 12:40:51.812554 USB3 port 1
1531 12:40:51.815992 USB3 port 2
1532 12:40:51.816111 USB3 port 3
1533 12:40:51.822738 PCI: 00:14.0 child on link 0 USB0 port 0
1534 12:40:51.832254 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1535 12:40:51.835635 USB0 port 0 child on link 0 USB2 port 0
1536 12:40:51.839083 USB2 port 0
1537 12:40:51.839319 USB2 port 1
1538 12:40:51.842618 USB2 port 2
1539 12:40:51.842912 USB2 port 3
1540 12:40:51.845651 USB2 port 4
1541 12:40:51.845942 USB2 port 5
1542 12:40:51.849411 USB2 port 6
1543 12:40:51.849786 USB2 port 7
1544 12:40:51.852819 USB2 port 8
1545 12:40:51.853276 USB2 port 9
1546 12:40:51.855871 USB3 port 0
1547 12:40:51.856351 USB3 port 1
1548 12:40:51.859510 USB3 port 2
1549 12:40:51.859964 USB3 port 3
1550 12:40:51.862623 PCI: 00:14.2
1551 12:40:51.872853 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1552 12:40:51.882579 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1553 12:40:51.886118 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1554 12:40:51.895978 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1555 12:40:51.899437 GENERIC: 0.0
1556 12:40:51.902701 PCI: 00:15.0 child on link 0 I2C: 00:1a
1557 12:40:51.912348 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1558 12:40:51.915856 I2C: 00:1a
1559 12:40:51.916513 I2C: 00:31
1560 12:40:51.919294 I2C: 00:32
1561 12:40:51.922310 PCI: 00:15.1 child on link 0 I2C: 00:50
1562 12:40:51.932567 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1563 12:40:51.933032 I2C: 00:50
1564 12:40:51.935721 PCI: 00:15.2
1565 12:40:51.939638 PCI: 00:15.3 child on link 0 I2C: 00:10
1566 12:40:51.948762 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1567 12:40:51.952357 I2C: 00:10
1568 12:40:51.952678 PCI: 00:16.0
1569 12:40:51.962330 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1570 12:40:51.965773 PCI: 00:19.0
1571 12:40:51.969080 PCI: 00:19.1 child on link 0 I2C: 00:15
1572 12:40:51.978915 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1573 12:40:51.979242 I2C: 00:15
1574 12:40:51.982159 I2C: 00:2c
1575 12:40:51.982482 PCI: 00:1e.0
1576 12:40:51.995451 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1577 12:40:51.998992 PCI: 00:1e.3 child on link 0 SPI: 00
1578 12:40:52.008771 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1579 12:40:52.009190 SPI: 00
1580 12:40:52.015545 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1581 12:40:52.022049 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1582 12:40:52.025641 PNP: 0c09.0
1583 12:40:52.032102 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1584 12:40:52.038775 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1585 12:40:52.048842 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1586 12:40:52.055096 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1587 12:40:52.061715 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1588 12:40:52.062040 GENERIC: 0.0
1589 12:40:52.065723 GENERIC: 1.0
1590 12:40:52.066172 PCI: 00:1f.3
1591 12:40:52.075315 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1592 12:40:52.084885 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1593 12:40:52.088039 PCI: 00:1f.5
1594 12:40:52.098079 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1595 12:40:52.104665 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1596 12:40:52.111775 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1597 12:40:52.114984 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1598 12:40:52.121632 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1599 12:40:52.128140 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1600 12:40:52.131264 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1601 12:40:52.137913 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1602 12:40:52.144484 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1603 12:40:52.154463 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1604 12:40:52.161050 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1605 12:40:52.167924 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1606 12:40:52.174683 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1607 12:40:52.181344 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1608 12:40:52.187983 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1609 12:40:52.190973 DOMAIN: 0000: Resource ranges:
1610 12:40:52.194669 * Base: 1000, Size: 800, Tag: 100
1611 12:40:52.200839 * Base: 1900, Size: e700, Tag: 100
1612 12:40:52.204298 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1613 12:40:52.210816 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1614 12:40:52.217835 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1615 12:40:52.228004 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1616 12:40:52.234758 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1617 12:40:52.240875 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1618 12:40:52.247623 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1619 12:40:52.257647 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1620 12:40:52.264664 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1621 12:40:52.271247 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1622 12:40:52.280855 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1623 12:40:52.287535 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1624 12:40:52.294497 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1625 12:40:52.304456 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1626 12:40:52.311189 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1627 12:40:52.317339 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1628 12:40:52.327642 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1629 12:40:52.334190 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1630 12:40:52.340541 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1631 12:40:52.350778 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1632 12:40:52.357294 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1633 12:40:52.364096 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1634 12:40:52.374016 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1635 12:40:52.380668 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1636 12:40:52.387282 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1637 12:40:52.397029 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1638 12:40:52.404193 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1639 12:40:52.410418 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1640 12:40:52.420260 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1641 12:40:52.426907 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1642 12:40:52.433710 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1643 12:40:52.443631 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1644 12:40:52.450658 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1645 12:40:52.453594 DOMAIN: 0000: Resource ranges:
1646 12:40:52.456694 * Base: 80400000, Size: 3fc00000, Tag: 200
1647 12:40:52.464102 * Base: d0000000, Size: 28000000, Tag: 200
1648 12:40:52.466773 * Base: fa000000, Size: 1000000, Tag: 200
1649 12:40:52.470135 * Base: fb001000, Size: 17ff000, Tag: 200
1650 12:40:52.473504 * Base: fe800000, Size: 300000, Tag: 200
1651 12:40:52.479826 * Base: feb80000, Size: 80000, Tag: 200
1652 12:40:52.483453 * Base: fed00000, Size: 40000, Tag: 200
1653 12:40:52.486410 * Base: fed70000, Size: 10000, Tag: 200
1654 12:40:52.490115 * Base: fed88000, Size: 8000, Tag: 200
1655 12:40:52.493011 * Base: fed93000, Size: d000, Tag: 200
1656 12:40:52.499937 * Base: feda2000, Size: 1e000, Tag: 200
1657 12:40:52.503042 * Base: fede0000, Size: 1220000, Tag: 200
1658 12:40:52.509792 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1659 12:40:52.516554 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1660 12:40:52.522975 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1661 12:40:52.529629 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1662 12:40:52.536200 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1663 12:40:52.543029 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1664 12:40:52.549669 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1665 12:40:52.556103 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1666 12:40:52.562709 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1667 12:40:52.569785 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1668 12:40:52.575904 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1669 12:40:52.582817 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1670 12:40:52.589146 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1671 12:40:52.595727 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1672 12:40:52.602568 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1673 12:40:52.608868 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1674 12:40:52.615583 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1675 12:40:52.622062 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1676 12:40:52.628540 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1677 12:40:52.635420 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1678 12:40:52.642267 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1679 12:40:52.648908 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1680 12:40:52.652212 PCI: 00:06.0: Resource ranges:
1681 12:40:52.658762 * Base: 80400000, Size: 100000, Tag: 200
1682 12:40:52.665217 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1683 12:40:52.672447 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1684 12:40:52.678302 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1685 12:40:52.685113 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1686 12:40:52.691546 Root Device assign_resources, bus 0 link: 0
1687 12:40:52.694938 DOMAIN: 0000 assign_resources, bus 0 link: 0
1688 12:40:52.701769 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1689 12:40:52.711456 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1690 12:40:52.717766 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1691 12:40:52.728294 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1692 12:40:52.731170 PCI: 00:04.0 assign_resources, bus 1 link: 0
1693 12:40:52.737945 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1694 12:40:52.744407 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1695 12:40:52.754920 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1696 12:40:52.765073 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1697 12:40:52.768161 PCI: 00:06.0 assign_resources, bus 1 link: 0
1698 12:40:52.777863 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1699 12:40:52.784804 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1700 12:40:52.788028 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1701 12:40:52.797749 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1702 12:40:52.804620 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1703 12:40:52.810827 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1704 12:40:52.814337 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1705 12:40:52.824185 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1706 12:40:52.827637 PCI: 00:14.0 assign_resources, bus 0 link: 0
1707 12:40:52.831168 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1708 12:40:52.840676 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1709 12:40:52.847160 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1710 12:40:52.856845 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1711 12:40:52.860299 PCI: 00:14.3 assign_resources, bus 0 link: 0
1712 12:40:52.867220 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1713 12:40:52.873619 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1714 12:40:52.877164 PCI: 00:15.0 assign_resources, bus 0 link: 0
1715 12:40:52.883660 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1716 12:40:52.890021 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1717 12:40:52.896608 PCI: 00:15.1 assign_resources, bus 0 link: 0
1718 12:40:52.900273 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1719 12:40:52.910225 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1720 12:40:52.913074 PCI: 00:15.3 assign_resources, bus 0 link: 0
1721 12:40:52.916783 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1722 12:40:52.926761 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1723 12:40:52.933599 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1724 12:40:52.940444 PCI: 00:19.1 assign_resources, bus 0 link: 0
1725 12:40:52.943469 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1726 12:40:52.953427 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1727 12:40:52.956517 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1728 12:40:52.959970 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1729 12:40:52.966734 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1730 12:40:52.970136 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1731 12:40:52.976665 LPC: Trying to open IO window from 800 size 1ff
1732 12:40:52.983085 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1733 12:40:52.993590 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1734 12:40:52.999866 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1735 12:40:53.003011 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1736 12:40:53.009979 Root Device assign_resources, bus 0 link: 0 done
1737 12:40:53.012873 Done setting resources.
1738 12:40:53.019746 Show resources in subtree (Root Device)...After assigning values.
1739 12:40:53.023487 Root Device child on link 0 CPU_CLUSTER: 0
1740 12:40:53.026218 CPU_CLUSTER: 0 child on link 0 APIC: 00
1741 12:40:53.029808 APIC: 00
1742 12:40:53.030324 APIC: 12
1743 12:40:53.030933 APIC: 14
1744 12:40:53.032578 APIC: 16
1745 12:40:53.033168 APIC: 10
1746 12:40:53.033636 APIC: 09
1747 12:40:53.036043 APIC: 01
1748 12:40:53.036672 APIC: 08
1749 12:40:53.039550 DOMAIN: 0000 child on link 0 GPIO: 0
1750 12:40:53.049686 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1751 12:40:53.059527 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1752 12:40:53.062891 GPIO: 0
1753 12:40:53.063466 PCI: 00:00.0
1754 12:40:53.072912 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1755 12:40:53.082320 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1756 12:40:53.092684 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1757 12:40:53.099086 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1758 12:40:53.108621 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1759 12:40:53.118943 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1760 12:40:53.128658 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1761 12:40:53.138503 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1762 12:40:53.148584 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1763 12:40:53.158214 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1764 12:40:53.165210 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1765 12:40:53.175028 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1766 12:40:53.184587 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1767 12:40:53.195396 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1768 12:40:53.204418 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1769 12:40:53.214299 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1770 12:40:53.220989 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1771 12:40:53.231205 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1772 12:40:53.241010 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1773 12:40:53.250824 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1774 12:40:53.260991 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1775 12:40:53.270600 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1776 12:40:53.280663 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1777 12:40:53.290835 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1778 12:40:53.300810 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1779 12:40:53.310491 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1780 12:40:53.317357 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1781 12:40:53.327409 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1782 12:40:53.330644 PCI: 00:02.0
1783 12:40:53.340708 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1784 12:40:53.350975 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1785 12:40:53.360188 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1786 12:40:53.363803 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1787 12:40:53.377258 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1788 12:40:53.377609 GENERIC: 0.0
1789 12:40:53.380472 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1790 12:40:53.390333 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1791 12:40:53.403163 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1792 12:40:53.413262 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1793 12:40:53.413356 PCI: 01:00.0
1794 12:40:53.426406 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1795 12:40:53.436695 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1796 12:40:53.436804 PCI: 00:08.0
1797 12:40:53.440394 PCI: 00:0a.0
1798 12:40:53.450086 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1799 12:40:53.453063 PCI: 00:0d.0 child on link 0 USB0 port 0
1800 12:40:53.463055 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1801 12:40:53.469784 USB0 port 0 child on link 0 USB3 port 0
1802 12:40:53.469862 USB3 port 0
1803 12:40:53.472763 USB3 port 1
1804 12:40:53.472835 USB3 port 2
1805 12:40:53.476347 USB3 port 3
1806 12:40:53.479821 PCI: 00:14.0 child on link 0 USB0 port 0
1807 12:40:53.489630 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1808 12:40:53.492688 USB0 port 0 child on link 0 USB2 port 0
1809 12:40:53.496039 USB2 port 0
1810 12:40:53.499519 USB2 port 1
1811 12:40:53.499602 USB2 port 2
1812 12:40:53.502826 USB2 port 3
1813 12:40:53.502910 USB2 port 4
1814 12:40:53.505944 USB2 port 5
1815 12:40:53.506028 USB2 port 6
1816 12:40:53.509441 USB2 port 7
1817 12:40:53.509541 USB2 port 8
1818 12:40:53.512670 USB2 port 9
1819 12:40:53.512743 USB3 port 0
1820 12:40:53.516219 USB3 port 1
1821 12:40:53.516295 USB3 port 2
1822 12:40:53.519583 USB3 port 3
1823 12:40:53.519685 PCI: 00:14.2
1824 12:40:53.532557 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1825 12:40:53.542485 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1826 12:40:53.546142 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1827 12:40:53.556031 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1828 12:40:53.559406 GENERIC: 0.0
1829 12:40:53.562479 PCI: 00:15.0 child on link 0 I2C: 00:1a
1830 12:40:53.572523 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1831 12:40:53.576229 I2C: 00:1a
1832 12:40:53.576304 I2C: 00:31
1833 12:40:53.576377 I2C: 00:32
1834 12:40:53.582733 PCI: 00:15.1 child on link 0 I2C: 00:50
1835 12:40:53.592341 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1836 12:40:53.592424 I2C: 00:50
1837 12:40:53.595760 PCI: 00:15.2
1838 12:40:53.599398 PCI: 00:15.3 child on link 0 I2C: 00:10
1839 12:40:53.609417 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1840 12:40:53.612794 I2C: 00:10
1841 12:40:53.612867 PCI: 00:16.0
1842 12:40:53.622272 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1843 12:40:53.626167 PCI: 00:19.0
1844 12:40:53.628863 PCI: 00:19.1 child on link 0 I2C: 00:15
1845 12:40:53.639306 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1846 12:40:53.642363 I2C: 00:15
1847 12:40:53.642469 I2C: 00:2c
1848 12:40:53.645754 PCI: 00:1e.0
1849 12:40:53.655746 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1850 12:40:53.658957 PCI: 00:1e.3 child on link 0 SPI: 00
1851 12:40:53.669087 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1852 12:40:53.672062 SPI: 00
1853 12:40:53.675492 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1854 12:40:53.685397 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1855 12:40:53.685480 PNP: 0c09.0
1856 12:40:53.695712 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1857 12:40:53.699330 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1858 12:40:53.709270 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1859 12:40:53.719398 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1860 12:40:53.722233 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1861 12:40:53.725711 GENERIC: 0.0
1862 12:40:53.726178 GENERIC: 1.0
1863 12:40:53.729076 PCI: 00:1f.3
1864 12:40:53.739117 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1865 12:40:53.749237 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1866 12:40:53.752662 PCI: 00:1f.5
1867 12:40:53.762228 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1868 12:40:53.766040 Done allocating resources.
1869 12:40:53.769202 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1870 12:40:53.775818 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1871 12:40:53.782272 Configure audio over I2S with MAX98373 NAU88L25B.
1872 12:40:53.785609 Enabling BT offload
1873 12:40:53.792480 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1874 12:40:53.795850 Enabling resources...
1875 12:40:53.799279 PCI: 00:00.0 subsystem <- 8086/4609
1876 12:40:53.802445 PCI: 00:00.0 cmd <- 06
1877 12:40:53.805944 PCI: 00:02.0 subsystem <- 8086/46b3
1878 12:40:53.808842 PCI: 00:02.0 cmd <- 03
1879 12:40:53.812269 PCI: 00:04.0 subsystem <- 8086/461d
1880 12:40:53.812732 PCI: 00:04.0 cmd <- 02
1881 12:40:53.815826 PCI: 00:06.0 bridge ctrl <- 0013
1882 12:40:53.818874 PCI: 00:06.0 subsystem <- 8086/464d
1883 12:40:53.822383 PCI: 00:06.0 cmd <- 106
1884 12:40:53.825732 PCI: 00:0a.0 subsystem <- 8086/467d
1885 12:40:53.828884 PCI: 00:0a.0 cmd <- 02
1886 12:40:53.832276 PCI: 00:0d.0 subsystem <- 8086/461e
1887 12:40:53.835580 PCI: 00:0d.0 cmd <- 02
1888 12:40:53.838776 PCI: 00:14.0 subsystem <- 8086/51ed
1889 12:40:53.842164 PCI: 00:14.0 cmd <- 02
1890 12:40:53.845789 PCI: 00:14.2 subsystem <- 8086/51ef
1891 12:40:53.846253 PCI: 00:14.2 cmd <- 02
1892 12:40:53.849266 PCI: 00:14.3 subsystem <- 8086/51f0
1893 12:40:53.852189 PCI: 00:14.3 cmd <- 02
1894 12:40:53.855442 PCI: 00:15.0 subsystem <- 8086/51e8
1895 12:40:53.858834 PCI: 00:15.0 cmd <- 02
1896 12:40:53.861923 PCI: 00:15.1 subsystem <- 8086/51e9
1897 12:40:53.865217 PCI: 00:15.1 cmd <- 06
1898 12:40:53.868542 PCI: 00:15.3 subsystem <- 8086/51eb
1899 12:40:53.871578 PCI: 00:15.3 cmd <- 02
1900 12:40:53.875190 PCI: 00:16.0 subsystem <- 8086/51e0
1901 12:40:53.875289 PCI: 00:16.0 cmd <- 02
1902 12:40:53.878303 PCI: 00:19.1 subsystem <- 8086/51c6
1903 12:40:53.881863 PCI: 00:19.1 cmd <- 02
1904 12:40:53.884878 PCI: 00:1e.0 subsystem <- 8086/51a8
1905 12:40:53.888290 PCI: 00:1e.0 cmd <- 06
1906 12:40:53.891485 PCI: 00:1e.3 subsystem <- 8086/51ab
1907 12:40:53.894775 PCI: 00:1e.3 cmd <- 02
1908 12:40:53.898481 PCI: 00:1f.0 subsystem <- 8086/5182
1909 12:40:53.902160 PCI: 00:1f.0 cmd <- 407
1910 12:40:53.905112 PCI: 00:1f.3 subsystem <- 8086/51c8
1911 12:40:53.905195 PCI: 00:1f.3 cmd <- 02
1912 12:40:53.908136 PCI: 00:1f.5 subsystem <- 8086/51a4
1913 12:40:53.911686 PCI: 00:1f.5 cmd <- 406
1914 12:40:53.915222 PCI: 01:00.0 cmd <- 02
1915 12:40:53.915305 done.
1916 12:40:53.921354 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1917 12:40:53.924805 ME: Version: Unavailable
1918 12:40:53.928608 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1919 12:40:53.931418 Initializing devices...
1920 12:40:53.934944 Root Device init
1921 12:40:53.935030 mainboard: EC init
1922 12:40:53.938305 Chrome EC: Set SMI mask to 0x0000000000000000
1923 12:40:53.942123 Chrome EC: UHEPI supported
1924 12:40:53.948851 Chrome EC: clear events_b mask to 0x0000000000000000
1925 12:40:53.955511 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1926 12:40:53.962134 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1927 12:40:53.968962 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1928 12:40:53.972092 Chrome EC: Set WAKE mask to 0x0000000000000000
1929 12:40:53.980483 Root Device init finished in 41 msecs
1930 12:40:53.980638 PCI: 00:00.0 init
1931 12:40:53.983944 CPU TDP = 15 Watts
1932 12:40:53.987085 CPU PL1 = 15 Watts
1933 12:40:53.987174 CPU PL2 = 55 Watts
1934 12:40:53.990527 CPU PL4 = 123 Watts
1935 12:40:53.993848 PCI: 00:00.0 init finished in 8 msecs
1936 12:40:53.997277 PCI: 00:02.0 init
1937 12:40:53.997380 GMA: Found VBT in CBFS
1938 12:40:54.000594 GMA: Found valid VBT in CBFS
1939 12:40:54.007450 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1940 12:40:54.013977 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1941 12:40:54.016968 PCI: 00:02.0 init finished in 18 msecs
1942 12:40:54.020741 PCI: 00:06.0 init
1943 12:40:54.023697 Initializing PCH PCIe bridge.
1944 12:40:54.027088 PCI: 00:06.0 init finished in 3 msecs
1945 12:40:54.030670 PCI: 00:0a.0 init
1946 12:40:54.033878 PCI: 00:0a.0 init finished in 0 msecs
1947 12:40:54.034276 PCI: 00:14.0 init
1948 12:40:54.037339 PCI: 00:14.0 init finished in 0 msecs
1949 12:40:54.040773 PCI: 00:14.2 init
1950 12:40:54.043984 PCI: 00:14.2 init finished in 0 msecs
1951 12:40:54.047181 PCI: 00:15.0 init
1952 12:40:54.050862 I2C bus 0 version 0x3230302a
1953 12:40:54.053922 DW I2C bus 0 at 0x80655000 (400 KHz)
1954 12:40:54.057502 PCI: 00:15.0 init finished in 6 msecs
1955 12:40:54.058115 PCI: 00:15.1 init
1956 12:40:54.060738 I2C bus 1 version 0x3230302a
1957 12:40:54.064148 DW I2C bus 1 at 0x80656000 (400 KHz)
1958 12:40:54.067175 PCI: 00:15.1 init finished in 6 msecs
1959 12:40:54.070972 PCI: 00:15.3 init
1960 12:40:54.074151 I2C bus 3 version 0x3230302a
1961 12:40:54.077588 DW I2C bus 3 at 0x80657000 (400 KHz)
1962 12:40:54.080875 PCI: 00:15.3 init finished in 6 msecs
1963 12:40:54.083964 PCI: 00:16.0 init
1964 12:40:54.087538 PCI: 00:16.0 init finished in 0 msecs
1965 12:40:54.088130 PCI: 00:19.1 init
1966 12:40:54.091052 I2C bus 5 version 0x3230302a
1967 12:40:54.094092 DW I2C bus 5 at 0x80659000 (400 KHz)
1968 12:40:54.101014 PCI: 00:19.1 init finished in 6 msecs
1969 12:40:54.101597 PCI: 00:1f.0 init
1970 12:40:54.107077 IOAPIC: Initializing IOAPIC at 0xfec00000
1971 12:40:54.107646 IOAPIC: ID = 0x02
1972 12:40:54.110710 IOAPIC: Dumping registers
1973 12:40:54.113747 reg 0x0000: 0x02000000
1974 12:40:54.114228 reg 0x0001: 0x00770020
1975 12:40:54.116754 reg 0x0002: 0x00000000
1976 12:40:54.120239 IOAPIC: 120 interrupts
1977 12:40:54.123611 IOAPIC: Clearing IOAPIC at 0xfec00000
1978 12:40:54.127103 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1979 12:40:54.133962 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1980 12:40:54.136779 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1981 12:40:54.143579 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1982 12:40:54.147057 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1983 12:40:54.153553 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1984 12:40:54.157073 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1985 12:40:54.163332 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1986 12:40:54.166961 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1987 12:40:54.173601 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1988 12:40:54.176620 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1989 12:40:54.180213 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1990 12:40:54.186413 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1991 12:40:54.189848 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1992 12:40:54.196535 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1993 12:40:54.200049 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1994 12:40:54.206378 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1995 12:40:54.209751 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1996 12:40:54.216468 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1997 12:40:54.219657 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1998 12:40:54.222811 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1999 12:40:54.229415 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2000 12:40:54.232793 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2001 12:40:54.239675 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2002 12:40:54.242786 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2003 12:40:54.249685 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2004 12:40:54.253059 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2005 12:40:54.259375 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2006 12:40:54.262863 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2007 12:40:54.265939 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2008 12:40:54.272668 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2009 12:40:54.275850 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2010 12:40:54.282532 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2011 12:40:54.285828 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2012 12:40:54.292825 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2013 12:40:54.295679 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2014 12:40:54.302526 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2015 12:40:54.305814 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2016 12:40:54.309211 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2017 12:40:54.316112 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2018 12:40:54.319377 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2019 12:40:54.325860 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2020 12:40:54.328992 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2021 12:40:54.335925 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2022 12:40:54.338915 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2023 12:40:54.345527 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2024 12:40:54.348957 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2025 12:40:54.352402 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2026 12:40:54.359155 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2027 12:40:54.362044 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2028 12:40:54.368967 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2029 12:40:54.372445 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2030 12:40:54.378625 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2031 12:40:54.381997 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2032 12:40:54.388916 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2033 12:40:54.392288 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2034 12:40:54.395439 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2035 12:40:54.402019 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2036 12:40:54.405504 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2037 12:40:54.411817 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2038 12:40:54.415546 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2039 12:40:54.422008 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2040 12:40:54.425466 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2041 12:40:54.431900 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2042 12:40:54.435210 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2043 12:40:54.438812 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2044 12:40:54.445258 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2045 12:40:54.448637 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2046 12:40:54.455048 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2047 12:40:54.458606 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2048 12:40:54.465387 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2049 12:40:54.468465 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2050 12:40:54.475423 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2051 12:40:54.478345 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2052 12:40:54.482011 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2053 12:40:54.488717 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2054 12:40:54.491981 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2055 12:40:54.498607 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2056 12:40:54.501949 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2057 12:40:54.508464 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2058 12:40:54.511904 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2059 12:40:54.515055 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2060 12:40:54.521748 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2061 12:40:54.525208 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2062 12:40:54.531782 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2063 12:40:54.535318 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2064 12:40:54.541546 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2065 12:40:54.544953 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2066 12:40:54.552011 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2067 12:40:54.554876 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2068 12:40:54.558183 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2069 12:40:54.565185 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2070 12:40:54.568275 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2071 12:40:54.575058 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2072 12:40:54.578541 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2073 12:40:54.584677 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2074 12:40:54.588175 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2075 12:40:54.595001 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2076 12:40:54.598524 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2077 12:40:54.601437 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2078 12:40:54.608310 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2079 12:40:54.611489 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2080 12:40:54.618180 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2081 12:40:54.621190 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2082 12:40:54.628251 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2083 12:40:54.631490 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2084 12:40:54.638013 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2085 12:40:54.641579 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2086 12:40:54.644747 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2087 12:40:54.651311 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2088 12:40:54.654484 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2089 12:40:54.661210 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2090 12:40:54.665093 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2091 12:40:54.671206 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2092 12:40:54.674517 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2093 12:40:54.678300 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2094 12:40:54.684623 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2095 12:40:54.687772 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2096 12:40:54.694768 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2097 12:40:54.698114 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2098 12:40:54.704953 IOAPIC: Bootstrap Processor Local APIC = 0x00
2099 12:40:54.708099 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2100 12:40:54.711274 PCI: 00:1f.0 init finished in 607 msecs
2101 12:40:54.714848 PCI: 00:1f.2 init
2102 12:40:54.717679 apm_control: Disabling ACPI.
2103 12:40:54.721534 APMC done.
2104 12:40:54.724456 PCI: 00:1f.2 init finished in 6 msecs
2105 12:40:54.728031 PCI: 00:1f.3 init
2106 12:40:54.731353 PCI: 00:1f.3 init finished in 0 msecs
2107 12:40:54.731843 PCI: 01:00.0 init
2108 12:40:54.734845 PCI: 01:00.0 init finished in 0 msecs
2109 12:40:54.737801 PNP: 0c09.0 init
2110 12:40:54.741442 Google Chrome EC uptime: 12.090 seconds
2111 12:40:54.747828 Google Chrome AP resets since EC boot: 1
2112 12:40:54.751015 Google Chrome most recent AP reset causes:
2113 12:40:54.754370 0.342: 32775 shutdown: entering G3
2114 12:40:54.761244 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2115 12:40:54.764597 PNP: 0c09.0 init finished in 23 msecs
2116 12:40:54.767634 GENERIC: 0.0 init
2117 12:40:54.771051 GENERIC: 0.0 init finished in 0 msecs
2118 12:40:54.771574 GENERIC: 1.0 init
2119 12:40:54.777681 GENERIC: 1.0 init finished in 0 msecs
2120 12:40:54.778131 Devices initialized
2121 12:40:54.780962 Show all devs... After init.
2122 12:40:54.784240 Root Device: enabled 1
2123 12:40:54.787627 CPU_CLUSTER: 0: enabled 1
2124 12:40:54.788082 DOMAIN: 0000: enabled 1
2125 12:40:54.791056 GPIO: 0: enabled 1
2126 12:40:54.794281 PCI: 00:00.0: enabled 1
2127 12:40:54.794778 PCI: 00:01.0: enabled 0
2128 12:40:54.797902 PCI: 00:01.1: enabled 0
2129 12:40:54.801005 PCI: 00:02.0: enabled 1
2130 12:40:54.804204 PCI: 00:04.0: enabled 1
2131 12:40:54.804757 PCI: 00:05.0: enabled 0
2132 12:40:54.807713 PCI: 00:06.0: enabled 1
2133 12:40:54.811161 PCI: 00:06.2: enabled 0
2134 12:40:54.811676 PCI: 00:07.0: enabled 0
2135 12:40:54.814587 PCI: 00:07.1: enabled 0
2136 12:40:54.818054 PCI: 00:07.2: enabled 0
2137 12:40:54.821032 PCI: 00:07.3: enabled 0
2138 12:40:54.821546 PCI: 00:08.0: enabled 0
2139 12:40:54.824476 PCI: 00:09.0: enabled 0
2140 12:40:54.827666 PCI: 00:0a.0: enabled 1
2141 12:40:54.830730 PCI: 00:0d.0: enabled 1
2142 12:40:54.831302 PCI: 00:0d.1: enabled 0
2143 12:40:54.833882 PCI: 00:0d.2: enabled 0
2144 12:40:54.837304 PCI: 00:0d.3: enabled 0
2145 12:40:54.840848 PCI: 00:0e.0: enabled 0
2146 12:40:54.841302 PCI: 00:10.0: enabled 0
2147 12:40:54.844302 PCI: 00:10.1: enabled 0
2148 12:40:54.847626 PCI: 00:10.6: enabled 0
2149 12:40:54.848081 PCI: 00:10.7: enabled 0
2150 12:40:54.850886 PCI: 00:12.0: enabled 0
2151 12:40:54.854227 PCI: 00:12.6: enabled 0
2152 12:40:54.857842 PCI: 00:12.7: enabled 0
2153 12:40:54.858304 PCI: 00:13.0: enabled 0
2154 12:40:54.860933 PCI: 00:14.0: enabled 1
2155 12:40:54.864327 PCI: 00:14.1: enabled 0
2156 12:40:54.867552 PCI: 00:14.2: enabled 1
2157 12:40:54.868013 PCI: 00:14.3: enabled 1
2158 12:40:54.871143 PCI: 00:15.0: enabled 1
2159 12:40:54.874129 PCI: 00:15.1: enabled 1
2160 12:40:54.877341 PCI: 00:15.2: enabled 0
2161 12:40:54.877799 PCI: 00:15.3: enabled 1
2162 12:40:54.880747 PCI: 00:16.0: enabled 1
2163 12:40:54.884027 PCI: 00:16.1: enabled 0
2164 12:40:54.884481 PCI: 00:16.2: enabled 0
2165 12:40:54.887209 PCI: 00:16.3: enabled 0
2166 12:40:54.890413 PCI: 00:16.4: enabled 0
2167 12:40:54.893787 PCI: 00:16.5: enabled 0
2168 12:40:54.894236 PCI: 00:17.0: enabled 0
2169 12:40:54.897707 PCI: 00:19.0: enabled 0
2170 12:40:54.900385 PCI: 00:19.1: enabled 1
2171 12:40:54.903926 PCI: 00:19.2: enabled 0
2172 12:40:54.904383 PCI: 00:1a.0: enabled 0
2173 12:40:54.907386 PCI: 00:1c.0: enabled 0
2174 12:40:54.910900 PCI: 00:1c.1: enabled 0
2175 12:40:54.914297 PCI: 00:1c.2: enabled 0
2176 12:40:54.914819 PCI: 00:1c.3: enabled 0
2177 12:40:54.917150 PCI: 00:1c.4: enabled 0
2178 12:40:54.920580 PCI: 00:1c.5: enabled 0
2179 12:40:54.923671 PCI: 00:1c.6: enabled 0
2180 12:40:54.924131 PCI: 00:1c.7: enabled 0
2181 12:40:54.927200 PCI: 00:1d.0: enabled 0
2182 12:40:54.930528 PCI: 00:1d.1: enabled 0
2183 12:40:54.933515 PCI: 00:1d.2: enabled 0
2184 12:40:54.934136 PCI: 00:1d.3: enabled 0
2185 12:40:54.937270 PCI: 00:1e.0: enabled 1
2186 12:40:54.940514 PCI: 00:1e.1: enabled 0
2187 12:40:54.940989 PCI: 00:1e.2: enabled 0
2188 12:40:54.943759 PCI: 00:1e.3: enabled 1
2189 12:40:54.947072 PCI: 00:1f.0: enabled 1
2190 12:40:54.950066 PCI: 00:1f.1: enabled 0
2191 12:40:54.950609 PCI: 00:1f.2: enabled 1
2192 12:40:54.953654 PCI: 00:1f.3: enabled 1
2193 12:40:54.956805 PCI: 00:1f.4: enabled 0
2194 12:40:54.960361 PCI: 00:1f.5: enabled 1
2195 12:40:54.960873 PCI: 00:1f.6: enabled 0
2196 12:40:54.963872 PCI: 00:1f.7: enabled 0
2197 12:40:54.966746 GENERIC: 0.0: enabled 1
2198 12:40:54.970377 GENERIC: 0.0: enabled 1
2199 12:40:54.970962 GENERIC: 1.0: enabled 1
2200 12:40:54.973359 GENERIC: 0.0: enabled 1
2201 12:40:54.976840 GENERIC: 1.0: enabled 1
2202 12:40:54.980401 USB0 port 0: enabled 1
2203 12:40:54.980955 USB0 port 0: enabled 1
2204 12:40:54.983166 GENERIC: 0.0: enabled 1
2205 12:40:54.986694 I2C: 00:1a: enabled 1
2206 12:40:54.987231 I2C: 00:31: enabled 1
2207 12:40:54.989786 I2C: 00:32: enabled 1
2208 12:40:54.993304 I2C: 00:50: enabled 1
2209 12:40:54.993768 I2C: 00:10: enabled 1
2210 12:40:54.996563 I2C: 00:15: enabled 1
2211 12:40:55.000212 I2C: 00:2c: enabled 1
2212 12:40:55.000714 GENERIC: 0.0: enabled 1
2213 12:40:55.003592 SPI: 00: enabled 1
2214 12:40:55.006503 PNP: 0c09.0: enabled 1
2215 12:40:55.007089 GENERIC: 0.0: enabled 1
2216 12:40:55.009889 USB3 port 0: enabled 1
2217 12:40:55.013140 USB3 port 1: enabled 0
2218 12:40:55.016607 USB3 port 2: enabled 1
2219 12:40:55.017230 USB3 port 3: enabled 0
2220 12:40:55.019910 USB2 port 0: enabled 1
2221 12:40:55.023064 USB2 port 1: enabled 0
2222 12:40:55.023560 USB2 port 2: enabled 1
2223 12:40:55.027063 USB2 port 3: enabled 0
2224 12:40:55.029675 USB2 port 4: enabled 0
2225 12:40:55.033460 USB2 port 5: enabled 1
2226 12:40:55.033935 USB2 port 6: enabled 0
2227 12:40:55.036793 USB2 port 7: enabled 0
2228 12:40:55.039852 USB2 port 8: enabled 1
2229 12:40:55.040337 USB2 port 9: enabled 1
2230 12:40:55.043244 USB3 port 0: enabled 1
2231 12:40:55.046509 USB3 port 1: enabled 0
2232 12:40:55.047065 USB3 port 2: enabled 0
2233 12:40:55.049997 USB3 port 3: enabled 0
2234 12:40:55.052857 GENERIC: 0.0: enabled 1
2235 12:40:55.056568 GENERIC: 1.0: enabled 1
2236 12:40:55.057106 APIC: 00: enabled 1
2237 12:40:55.060189 APIC: 12: enabled 1
2238 12:40:55.063006 APIC: 14: enabled 1
2239 12:40:55.063548 APIC: 16: enabled 1
2240 12:40:55.066361 APIC: 10: enabled 1
2241 12:40:55.066928 APIC: 09: enabled 1
2242 12:40:55.070043 APIC: 01: enabled 1
2243 12:40:55.072962 APIC: 08: enabled 1
2244 12:40:55.073426 PCI: 01:00.0: enabled 1
2245 12:40:55.079449 BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms
2246 12:40:55.086618 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2247 12:40:55.089420 ELOG: NV offset 0xf20000 size 0x4000
2248 12:40:55.095917 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2249 12:40:55.102740 ELOG: Event(17) added with size 13 at 2023-08-30 12:40:55 UTC
2250 12:40:55.109432 ELOG: Event(9E) added with size 10 at 2023-08-30 12:40:55 UTC
2251 12:40:55.115784 ELOG: Event(9F) added with size 14 at 2023-08-30 12:40:55 UTC
2252 12:40:55.122249 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2253 12:40:55.128766 ELOG: Event(A0) added with size 9 at 2023-08-30 12:40:55 UTC
2254 12:40:55.132207 elog_add_boot_reason: Logged dev mode boot
2255 12:40:55.139189 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2256 12:40:55.139650 Finalize devices...
2257 12:40:55.142658 PCI: 00:16.0 final
2258 12:40:55.145524 PCI: 00:1f.2 final
2259 12:40:55.146144 GENERIC: 0.0 final
2260 12:40:55.152010 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2261 12:40:55.155325 GENERIC: 1.0 final
2262 12:40:55.158994 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2263 12:40:55.162332 Devices finalized
2264 12:40:55.168949 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2265 12:40:55.172008 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2266 12:40:55.178639 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2267 12:40:55.182254 ME: HFSTS1 : 0x90000245
2268 12:40:55.188745 ME: HFSTS2 : 0x82100116
2269 12:40:55.191667 ME: HFSTS3 : 0x00000050
2270 12:40:55.195165 ME: HFSTS4 : 0x00004000
2271 12:40:55.201535 ME: HFSTS5 : 0x00000000
2272 12:40:55.205264 ME: HFSTS6 : 0x40600006
2273 12:40:55.208285 ME: Manufacturing Mode : NO
2274 12:40:55.211773 ME: SPI Protection Mode Enabled : YES
2275 12:40:55.218649 ME: FPFs Committed : YES
2276 12:40:55.221615 ME: Manufacturing Vars Locked : YES
2277 12:40:55.224943 ME: FW Partition Table : OK
2278 12:40:55.228232 ME: Bringup Loader Failure : NO
2279 12:40:55.231645 ME: Firmware Init Complete : YES
2280 12:40:55.234937 ME: Boot Options Present : NO
2281 12:40:55.237974 ME: Update In Progress : NO
2282 12:40:55.241476 ME: D0i3 Support : YES
2283 12:40:55.248346 ME: Low Power State Enabled : NO
2284 12:40:55.251315 ME: CPU Replaced : YES
2285 12:40:55.254491 ME: CPU Replacement Valid : YES
2286 12:40:55.257563 ME: Current Working State : 5
2287 12:40:55.260940 ME: Current Operation State : 1
2288 12:40:55.264187 ME: Current Operation Mode : 0
2289 12:40:55.267797 ME: Error Code : 0
2290 12:40:55.270816 ME: Enhanced Debug Mode : NO
2291 12:40:55.277734 ME: CPU Debug Disabled : YES
2292 12:40:55.280772 ME: TXT Support : NO
2293 12:40:55.284341 ME: WP for RO is enabled : YES
2294 12:40:55.290893 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2295 12:40:55.293888 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2296 12:40:55.300852 Ramoops buffer: 0x100000@0x76899000.
2297 12:40:55.304398 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2298 12:40:55.314031 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2299 12:40:55.317270 CBFS: 'fallback/slic' not found.
2300 12:40:55.320307 ACPI: Writing ACPI tables at 7686d000.
2301 12:40:55.320382 ACPI: * FACS
2302 12:40:55.323868 ACPI: * DSDT
2303 12:40:55.330440 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2304 12:40:55.333831 ACPI: * FADT
2305 12:40:55.333938 SCI is IRQ9
2306 12:40:55.337036 ACPI: added table 1/32, length now 40
2307 12:40:55.340468 ACPI: * SSDT
2308 12:40:55.347097 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2309 12:40:55.350285 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2310 12:40:55.357201 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2311 12:40:55.360207 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2312 12:40:55.366824 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2313 12:40:55.370185 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2314 12:40:55.376695 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2315 12:40:55.383764 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2316 12:40:55.386780 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2317 12:40:55.393364 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2318 12:40:55.396818 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2319 12:40:55.403387 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2320 12:40:55.406413 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2321 12:40:55.413480 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2322 12:40:55.419860 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2323 12:40:55.422837 PS2K: Passing 80 keymaps to kernel
2324 12:40:55.429546 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2325 12:40:55.436310 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2326 12:40:55.442844 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2327 12:40:55.449734 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2328 12:40:55.452690 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2329 12:40:55.459566 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2330 12:40:55.466093 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2331 12:40:55.472942 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2332 12:40:55.479629 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2333 12:40:55.485941 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2334 12:40:55.489626 ACPI: added table 2/32, length now 44
2335 12:40:55.492623 ACPI: * MCFG
2336 12:40:55.496060 ACPI: added table 3/32, length now 48
2337 12:40:55.496136 ACPI: * TPM2
2338 12:40:55.499127 TPM2 log created at 0x7685d000
2339 12:40:55.502748 ACPI: added table 4/32, length now 52
2340 12:40:55.506366 ACPI: * LPIT
2341 12:40:55.509338 ACPI: added table 5/32, length now 56
2342 12:40:55.509435 ACPI: * MADT
2343 12:40:55.512835 SCI is IRQ9
2344 12:40:55.515766 ACPI: added table 6/32, length now 60
2345 12:40:55.519204 cmd_reg from pmc_make_ipc_cmd 1052838
2346 12:40:55.525896 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2347 12:40:55.532294 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2348 12:40:55.538851 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2349 12:40:55.542591 PMC CrashLog size in discovery mode: 0xC00
2350 12:40:55.546056 cpu crashlog bar addr: 0x80640000
2351 12:40:55.549182 cpu discovery table offset: 0x6030
2352 12:40:55.552185 cpu_crashlog_discovery_table buffer count: 0x3
2353 12:40:55.558873 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2354 12:40:55.565433 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2355 12:40:55.571913 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2356 12:40:55.578744 PMC crashLog size in discovery mode : 0xC00
2357 12:40:55.585364 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2358 12:40:55.588625 discover mode PMC crashlog size adjusted to: 0x200
2359 12:40:55.595346 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2360 12:40:55.601883 discover mode PMC crashlog size adjusted to: 0x0
2361 12:40:55.605016 m_cpu_crashLog_size : 0x3480 bytes
2362 12:40:55.608451 CPU crashLog present.
2363 12:40:55.612018 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2364 12:40:55.618448 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2365 12:40:55.621486 current = 76876550
2366 12:40:55.624847 ACPI: * DMAR
2367 12:40:55.628398 ACPI: added table 7/32, length now 64
2368 12:40:55.631253 ACPI: added table 8/32, length now 68
2369 12:40:55.631334 ACPI: * HPET
2370 12:40:55.634815 ACPI: added table 9/32, length now 72
2371 12:40:55.638217 ACPI: done.
2372 12:40:55.641275 ACPI tables: 38528 bytes.
2373 12:40:55.645155 smbios_write_tables: 76857000
2374 12:40:55.648619 EC returned error result code 3
2375 12:40:55.651897 Couldn't obtain OEM name from CBI
2376 12:40:55.655316 Create SMBIOS type 16
2377 12:40:55.655392 Create SMBIOS type 17
2378 12:40:55.658733 Create SMBIOS type 20
2379 12:40:55.661752 GENERIC: 0.0 (WIFI Device)
2380 12:40:55.665000 SMBIOS tables: 2156 bytes.
2381 12:40:55.668552 Writing table forward entry at 0x00000500
2382 12:40:55.675284 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2383 12:40:55.678516 Writing coreboot table at 0x76891000
2384 12:40:55.685503 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2385 12:40:55.688739 1. 0000000000001000-000000000009ffff: RAM
2386 12:40:55.691869 2. 00000000000a0000-00000000000fffff: RESERVED
2387 12:40:55.698240 3. 0000000000100000-0000000076856fff: RAM
2388 12:40:55.701810 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2389 12:40:55.708433 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2390 12:40:55.714779 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2391 12:40:55.718307 7. 0000000077000000-00000000803fffff: RESERVED
2392 12:40:55.724708 8. 00000000c0000000-00000000cfffffff: RESERVED
2393 12:40:55.728161 9. 00000000f8000000-00000000f9ffffff: RESERVED
2394 12:40:55.731789 10. 00000000fb000000-00000000fb000fff: RESERVED
2395 12:40:55.738392 11. 00000000fc800000-00000000fe7fffff: RESERVED
2396 12:40:55.741403 12. 00000000feb00000-00000000feb7ffff: RESERVED
2397 12:40:55.748435 13. 00000000fec00000-00000000fecfffff: RESERVED
2398 12:40:55.751368 14. 00000000fed40000-00000000fed6ffff: RESERVED
2399 12:40:55.757903 15. 00000000fed80000-00000000fed87fff: RESERVED
2400 12:40:55.761374 16. 00000000fed90000-00000000fed92fff: RESERVED
2401 12:40:55.767964 17. 00000000feda0000-00000000feda1fff: RESERVED
2402 12:40:55.771644 18. 00000000fedc0000-00000000feddffff: RESERVED
2403 12:40:55.774570 19. 0000000100000000-000000027fbfffff: RAM
2404 12:40:55.777891 Passing 4 GPIOs to payload:
2405 12:40:55.784783 NAME | PORT | POLARITY | VALUE
2406 12:40:55.787920 lid | undefined | high | high
2407 12:40:55.794643 power | undefined | high | low
2408 12:40:55.798217 oprom | undefined | high | low
2409 12:40:55.804834 EC in RW | 0x00000151 | high | high
2410 12:40:55.804927 Board ID: 3
2411 12:40:55.808013 FW config: 0x131
2412 12:40:55.814496 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 4669
2413 12:40:55.818348 coreboot table: 1748 bytes.
2414 12:40:55.821272 IMD ROOT 0. 0x76fff000 0x00001000
2415 12:40:55.824579 IMD SMALL 1. 0x76ffe000 0x00001000
2416 12:40:55.828016 FSP MEMORY 2. 0x76afe000 0x00500000
2417 12:40:55.831257 CONSOLE 3. 0x76ade000 0x00020000
2418 12:40:55.834394 RW MCACHE 4. 0x76add000 0x0000043c
2419 12:40:55.837877 RO MCACHE 5. 0x76adc000 0x00000fd8
2420 12:40:55.844626 FMAP 6. 0x76adb000 0x0000064a
2421 12:40:55.847845 TIME STAMP 7. 0x76ada000 0x00000910
2422 12:40:55.851390 VBOOT WORK 8. 0x76ac6000 0x00014000
2423 12:40:55.854336 MEM INFO 9. 0x76ac5000 0x000003b8
2424 12:40:55.857674 ROMSTG STCK10. 0x76ac4000 0x00001000
2425 12:40:55.861432 AFTER CAR 11. 0x76ab8000 0x0000c000
2426 12:40:55.864299 RAMSTAGE 12. 0x76a2e000 0x0008a000
2427 12:40:55.867935 ACPI BERT 13. 0x76a1e000 0x00010000
2428 12:40:55.874336 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2429 12:40:55.877956 REFCODE 15. 0x769ae000 0x0006f000
2430 12:40:55.881321 SMM BACKUP 16. 0x7699e000 0x00010000
2431 12:40:55.884362 IGD OPREGION17. 0x76999000 0x00004203
2432 12:40:55.887658 RAMOOPS 18. 0x76899000 0x00100000
2433 12:40:55.891074 COREBOOT 19. 0x76891000 0x00008000
2434 12:40:55.894511 ACPI 20. 0x7686d000 0x00024000
2435 12:40:55.897902 TPM2 TCGLOG21. 0x7685d000 0x00010000
2436 12:40:55.904497 PMC CRASHLOG22. 0x7685c000 0x00000c00
2437 12:40:55.907730 CPU CRASHLOG23. 0x76858000 0x00003480
2438 12:40:55.911116 SMBIOS 24. 0x76857000 0x00001000
2439 12:40:55.911199 IMD small region:
2440 12:40:55.917817 IMD ROOT 0. 0x76ffec00 0x00000400
2441 12:40:55.921201 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2442 12:40:55.924168 POWER STATE 2. 0x76ffeb80 0x00000044
2443 12:40:55.927689 ROMSTAGE 3. 0x76ffeb60 0x00000004
2444 12:40:55.931276 ACPI GNVS 4. 0x76ffeb00 0x00000048
2445 12:40:55.937792 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2446 12:40:55.940770 BS: BS_WRITE_TABLES run times (exec / console): 6 / 624 ms
2447 12:40:55.944447 MTRR: Physical address space:
2448 12:40:55.951106 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2449 12:40:55.957318 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2450 12:40:55.964339 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2451 12:40:55.971055 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2452 12:40:55.977569 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2453 12:40:55.980604 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2454 12:40:55.987498 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2455 12:40:55.994088 MTRR: Fixed MSR 0x250 0x0606060606060606
2456 12:40:55.997452 MTRR: Fixed MSR 0x258 0x0606060606060606
2457 12:40:56.000655 MTRR: Fixed MSR 0x259 0x0000000000000000
2458 12:40:56.003869 MTRR: Fixed MSR 0x268 0x0606060606060606
2459 12:40:56.010801 MTRR: Fixed MSR 0x269 0x0606060606060606
2460 12:40:56.014064 MTRR: Fixed MSR 0x26a 0x0606060606060606
2461 12:40:56.017026 MTRR: Fixed MSR 0x26b 0x0606060606060606
2462 12:40:56.021009 MTRR: Fixed MSR 0x26c 0x0606060606060606
2463 12:40:56.027327 MTRR: Fixed MSR 0x26d 0x0606060606060606
2464 12:40:56.030822 MTRR: Fixed MSR 0x26e 0x0606060606060606
2465 12:40:56.034241 MTRR: Fixed MSR 0x26f 0x0606060606060606
2466 12:40:56.037258 call enable_fixed_mtrr()
2467 12:40:56.040422 CPU physical address size: 39 bits
2468 12:40:56.047072 MTRR: default type WB/UC MTRR counts: 6/6.
2469 12:40:56.050481 MTRR: UC selected as default type.
2470 12:40:56.053532 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2471 12:40:56.060636 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2472 12:40:56.066843 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2473 12:40:56.073823 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2474 12:40:56.080500 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2475 12:40:56.086961 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2476 12:40:56.093789 MTRR: Fixed MSR 0x250 0x0606060606060606
2477 12:40:56.096710 MTRR: Fixed MSR 0x258 0x0606060606060606
2478 12:40:56.100184 MTRR: Fixed MSR 0x259 0x0000000000000000
2479 12:40:56.103724 MTRR: Fixed MSR 0x268 0x0606060606060606
2480 12:40:56.110183 MTRR: Fixed MSR 0x269 0x0606060606060606
2481 12:40:56.113357 MTRR: Fixed MSR 0x26a 0x0606060606060606
2482 12:40:56.116849 MTRR: Fixed MSR 0x26b 0x0606060606060606
2483 12:40:56.120149 MTRR: Fixed MSR 0x26c 0x0606060606060606
2484 12:40:56.123366 MTRR: Fixed MSR 0x26d 0x0606060606060606
2485 12:40:56.130132 MTRR: Fixed MSR 0x26e 0x0606060606060606
2486 12:40:56.133323 MTRR: Fixed MSR 0x26f 0x0606060606060606
2487 12:40:56.136507 MTRR: Fixed MSR 0x250 0x0606060606060606
2488 12:40:56.139979 MTRR: Fixed MSR 0x258 0x0606060606060606
2489 12:40:56.146581 MTRR: Fixed MSR 0x259 0x0000000000000000
2490 12:40:56.150110 MTRR: Fixed MSR 0x268 0x0606060606060606
2491 12:40:56.153446 MTRR: Fixed MSR 0x269 0x0606060606060606
2492 12:40:56.156698 MTRR: Fixed MSR 0x26a 0x0606060606060606
2493 12:40:56.162883 MTRR: Fixed MSR 0x26b 0x0606060606060606
2494 12:40:56.166400 MTRR: Fixed MSR 0x26c 0x0606060606060606
2495 12:40:56.169655 MTRR: Fixed MSR 0x26d 0x0606060606060606
2496 12:40:56.173060 MTRR: Fixed MSR 0x26e 0x0606060606060606
2497 12:40:56.179791 MTRR: Fixed MSR 0x26f 0x0606060606060606
2498 12:40:56.183275 MTRR: Fixed MSR 0x250 0x0606060606060606
2499 12:40:56.186446 MTRR: Fixed MSR 0x250 0x0606060606060606
2500 12:40:56.189863 call enable_fixed_mtrr()
2501 12:40:56.192777 call enable_fixed_mtrr()
2502 12:40:56.196090 MTRR: Fixed MSR 0x258 0x0606060606060606
2503 12:40:56.199653 MTRR: Fixed MSR 0x259 0x0000000000000000
2504 12:40:56.202724 MTRR: Fixed MSR 0x268 0x0606060606060606
2505 12:40:56.206220 MTRR: Fixed MSR 0x269 0x0606060606060606
2506 12:40:56.212748 MTRR: Fixed MSR 0x26a 0x0606060606060606
2507 12:40:56.216319 MTRR: Fixed MSR 0x26b 0x0606060606060606
2508 12:40:56.219738 MTRR: Fixed MSR 0x26c 0x0606060606060606
2509 12:40:56.222677 MTRR: Fixed MSR 0x26d 0x0606060606060606
2510 12:40:56.229624 MTRR: Fixed MSR 0x26e 0x0606060606060606
2511 12:40:56.232650 MTRR: Fixed MSR 0x26f 0x0606060606060606
2512 12:40:56.235926 CPU physical address size: 39 bits
2513 12:40:56.239410 call enable_fixed_mtrr()
2514 12:40:56.242682 MTRR: Fixed MSR 0x250 0x0606060606060606
2515 12:40:56.246112 MTRR: Fixed MSR 0x250 0x0606060606060606
2516 12:40:56.249517 MTRR: Fixed MSR 0x258 0x0606060606060606
2517 12:40:56.256083 MTRR: Fixed MSR 0x258 0x0606060606060606
2518 12:40:56.259714 MTRR: Fixed MSR 0x259 0x0000000000000000
2519 12:40:56.262526 MTRR: Fixed MSR 0x268 0x0606060606060606
2520 12:40:56.265776 MTRR: Fixed MSR 0x269 0x0606060606060606
2521 12:40:56.272733 MTRR: Fixed MSR 0x26a 0x0606060606060606
2522 12:40:56.275787 MTRR: Fixed MSR 0x26b 0x0606060606060606
2523 12:40:56.279235 MTRR: Fixed MSR 0x26c 0x0606060606060606
2524 12:40:56.282515 MTRR: Fixed MSR 0x26d 0x0606060606060606
2525 12:40:56.289076 MTRR: Fixed MSR 0x26e 0x0606060606060606
2526 12:40:56.292701 MTRR: Fixed MSR 0x26f 0x0606060606060606
2527 12:40:56.295883 MTRR: Fixed MSR 0x259 0x0000000000000000
2528 12:40:56.299257 CPU physical address size: 39 bits
2529 12:40:56.302491 MTRR: Fixed MSR 0x268 0x0606060606060606
2530 12:40:56.305746 call enable_fixed_mtrr()
2531 12:40:56.308890 MTRR: Fixed MSR 0x269 0x0606060606060606
2532 12:40:56.315797 MTRR: Fixed MSR 0x258 0x0606060606060606
2533 12:40:56.319378 CPU physical address size: 39 bits
2534 12:40:56.322505 MTRR: Fixed MSR 0x26a 0x0606060606060606
2535 12:40:56.325840 MTRR: Fixed MSR 0x250 0x0606060606060606
2536 12:40:56.328785 MTRR: Fixed MSR 0x26b 0x0606060606060606
2537 12:40:56.335796 MTRR: Fixed MSR 0x26c 0x0606060606060606
2538 12:40:56.338945 MTRR: Fixed MSR 0x26d 0x0606060606060606
2539 12:40:56.342406 MTRR: Fixed MSR 0x26e 0x0606060606060606
2540 12:40:56.345728 MTRR: Fixed MSR 0x26f 0x0606060606060606
2541 12:40:56.348962 MTRR: Fixed MSR 0x258 0x0606060606060606
2542 12:40:56.355430 MTRR: Fixed MSR 0x259 0x0000000000000000
2543 12:40:56.355512 call enable_fixed_mtrr()
2544 12:40:56.362220 MTRR: Fixed MSR 0x259 0x0000000000000000
2545 12:40:56.366172 MTRR: Fixed MSR 0x268 0x0606060606060606
2546 12:40:56.368747 MTRR: Fixed MSR 0x269 0x0606060606060606
2547 12:40:56.372277 CPU physical address size: 39 bits
2548 12:40:56.375521 MTRR: Fixed MSR 0x26a 0x0606060606060606
2549 12:40:56.381904 MTRR: Fixed MSR 0x268 0x0606060606060606
2550 12:40:56.385436 MTRR: Fixed MSR 0x26b 0x0606060606060606
2551 12:40:56.388785 MTRR: Fixed MSR 0x26c 0x0606060606060606
2552 12:40:56.391931 MTRR: Fixed MSR 0x26d 0x0606060606060606
2553 12:40:56.398979 MTRR: Fixed MSR 0x26e 0x0606060606060606
2554 12:40:56.401800 MTRR: Fixed MSR 0x26f 0x0606060606060606
2555 12:40:56.405232 MTRR: Fixed MSR 0x269 0x0606060606060606
2556 12:40:56.408708 call enable_fixed_mtrr()
2557 12:40:56.411711 MTRR: Fixed MSR 0x26a 0x0606060606060606
2558 12:40:56.418803 MTRR: Fixed MSR 0x26b 0x0606060606060606
2559 12:40:56.421702 MTRR: Fixed MSR 0x26c 0x0606060606060606
2560 12:40:56.425026 MTRR: Fixed MSR 0x26d 0x0606060606060606
2561 12:40:56.428375 MTRR: Fixed MSR 0x26e 0x0606060606060606
2562 12:40:56.431824 MTRR: Fixed MSR 0x26f 0x0606060606060606
2563 12:40:56.438297 CPU physical address size: 39 bits
2564 12:40:56.441935 call enable_fixed_mtrr()
2565 12:40:56.444969 CPU physical address size: 39 bits
2566 12:40:56.448471 CPU physical address size: 39 bits
2567 12:40:56.448546
2568 12:40:56.451439 MTRR check
2569 12:40:56.451509 Fixed MTRRs : Enabled
2570 12:40:56.454938 Variable MTRRs: Enabled
2571 12:40:56.455006
2572 12:40:56.461885 BS: BS_WRITE_TABLES exit times (exec / console): 254 / 150 ms
2573 12:40:56.464816 Checking cr50 for pending updates
2574 12:40:56.476672 Reading cr50 TPM mode
2575 12:40:56.491882 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2576 12:40:56.501469 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2577 12:40:56.504984 Checking segment from ROM address 0xf96cbe6c
2578 12:40:56.508396 Checking segment from ROM address 0xf96cbe88
2579 12:40:56.514928 Loading segment from ROM address 0xf96cbe6c
2580 12:40:56.515003 code (compression=1)
2581 12:40:56.524897 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2582 12:40:56.531275 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2583 12:40:56.534538 using LZMA
2584 12:40:56.556915 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2585 12:40:56.563779 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2586 12:40:56.571768 Loading segment from ROM address 0xf96cbe88
2587 12:40:56.575158 Entry Point 0x30000000
2588 12:40:56.575233 Loaded segments
2589 12:40:56.581714 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2590 12:40:56.588246 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2591 12:40:56.591834 Finalizing chipset.
2592 12:40:56.594871 apm_control: Finalizing SMM.
2593 12:40:56.594969 APMC done.
2594 12:40:56.598415 HECI: CSE device 16.1 is disabled
2595 12:40:56.601722 HECI: CSE device 16.2 is disabled
2596 12:40:56.605037 HECI: CSE device 16.3 is disabled
2597 12:40:56.608136 HECI: CSE device 16.4 is disabled
2598 12:40:56.611683 HECI: CSE device 16.5 is disabled
2599 12:40:56.614749 HECI: Sending End-of-Post
2600 12:40:56.623177 CSE: EOP requested action: continue boot
2601 12:40:56.626315 CSE EOP successful, continuing boot
2602 12:40:56.633176 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2603 12:40:56.636515 mp_park_aps done after 0 msecs.
2604 12:40:56.639822 Jumping to boot code at 0x30000000(0x76891000)
2605 12:40:56.649816 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2606 12:40:56.653767
2607 12:40:56.653843
2608 12:40:56.653905
2609 12:40:56.657339 Starting depthcharge on Volmar...
2610 12:40:56.657411
2611 12:40:56.657772 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2612 12:40:56.657883 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2613 12:40:56.657965 Setting prompt string to ['brya:']
2614 12:40:56.658042 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2615 12:40:56.663859 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2616 12:40:56.663940
2617 12:40:56.670525 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2618 12:40:56.670617
2619 12:40:56.677082 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2620 12:40:56.677160
2621 12:40:56.680690 configure_storage: Failed to remap 1C:2
2622 12:40:56.680766
2623 12:40:56.683748 Wipe memory regions:
2624 12:40:56.683828
2625 12:40:56.687179 [0x00000000001000, 0x000000000a0000)
2626 12:40:56.687252
2627 12:40:56.690272 [0x00000000100000, 0x00000030000000)
2628 12:40:56.792884
2629 12:40:56.795869 [0x00000032668e60, 0x00000076857000)
2630 12:40:56.940265
2631 12:40:56.943243 [0x00000100000000, 0x0000027fc00000)
2632 12:40:57.753826
2633 12:40:57.756840 ec_init: CrosEC protocol v3 supported (256, 256)
2634 12:40:58.364350
2635 12:40:58.364497 R8152: Initializing
2636 12:40:58.364568
2637 12:40:58.367648 Version 9 (ocp_data = 6010)
2638 12:40:58.367726
2639 12:40:58.371080 R8152: Done initializing
2640 12:40:58.371154
2641 12:40:58.374295 Adding net device
2642 12:40:58.676159
2643 12:40:58.679473 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2644 12:40:58.679571
2645 12:40:58.679654
2646 12:40:58.679732
2647 12:40:58.680037 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2649 12:40:58.780399 brya: tftpboot 192.168.201.1 11383475/tftp-deploy-4iwcdtly/kernel/bzImage 11383475/tftp-deploy-4iwcdtly/kernel/cmdline 11383475/tftp-deploy-4iwcdtly/ramdisk/ramdisk.cpio.gz
2650 12:40:58.780540 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2651 12:40:58.780647 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2652 12:40:58.784907 tftpboot 192.168.201.1 11383475/tftp-deploy-4iwcdtly/kernel/bzIploy-4iwcdtly/kernel/cmdline 11383475/tftp-deploy-4iwcdtly/ramdisk/ramdisk.cpio.gz
2653 12:40:58.784999
2654 12:40:58.785082 Waiting for link
2655 12:40:58.986915
2656 12:40:58.987057 done.
2657 12:40:58.987151
2658 12:40:58.987235 MAC: 00:e0:4c:68:01:74
2659 12:40:58.987324
2660 12:40:58.990395 Sending DHCP discover... done.
2661 12:40:58.990512
2662 12:40:58.993899 Waiting for reply... done.
2663 12:40:58.993982
2664 12:40:58.996908 Sending DHCP request... done.
2665 12:40:58.996983
2666 12:40:59.003864 Waiting for reply... done.
2667 12:40:59.003940
2668 12:40:59.004003 My ip is 192.168.201.16
2669 12:40:59.004067
2670 12:40:59.006982 The DHCP server ip is 192.168.201.1
2671 12:40:59.007056
2672 12:40:59.013511 TFTP server IP predefined by user: 192.168.201.1
2673 12:40:59.013590
2674 12:40:59.020443 Bootfile predefined by user: 11383475/tftp-deploy-4iwcdtly/kernel/bzImage
2675 12:40:59.020520
2676 12:40:59.023349 Sending tftp read request... done.
2677 12:40:59.023427
2678 12:40:59.027044 Waiting for the transfer...
2679 12:40:59.027132
2680 12:40:59.288144 00000000 ################################################################
2681 12:40:59.288290
2682 12:40:59.536448 00080000 ################################################################
2683 12:40:59.536723
2684 12:40:59.784957 00100000 ################################################################
2685 12:40:59.785108
2686 12:41:00.031291 00180000 ################################################################
2687 12:41:00.031434
2688 12:41:00.282611 00200000 ################################################################
2689 12:41:00.282758
2690 12:41:00.524019 00280000 ################################################################
2691 12:41:00.524174
2692 12:41:00.789250 00300000 ################################################################
2693 12:41:00.789426
2694 12:41:01.044022 00380000 ################################################################
2695 12:41:01.044173
2696 12:41:01.301820 00400000 ################################################################
2697 12:41:01.301993
2698 12:41:01.558697 00480000 ################################################################
2699 12:41:01.558847
2700 12:41:01.810725 00500000 ################################################################
2701 12:41:01.810870
2702 12:41:02.058725 00580000 ################################################################
2703 12:41:02.058860
2704 12:41:02.301869 00600000 ################################################################
2705 12:41:02.302002
2706 12:41:02.546944 00680000 ################################################################
2707 12:41:02.547089
2708 12:41:02.797250 00700000 ################################################################
2709 12:41:02.797417
2710 12:41:03.056246 00780000 ################################################################
2711 12:41:03.056412
2712 12:41:03.102010 00800000 ############# done.
2713 12:41:03.102148
2714 12:41:03.105554 The bootfile was 8490896 bytes long.
2715 12:41:03.105667
2716 12:41:03.108915 Sending tftp read request... done.
2717 12:41:03.108995
2718 12:41:03.111900 Waiting for the transfer...
2719 12:41:03.111978
2720 12:41:03.361798 00000000 ################################################################
2721 12:41:03.361979
2722 12:41:03.616028 00080000 ################################################################
2723 12:41:03.616165
2724 12:41:03.864216 00100000 ################################################################
2725 12:41:03.864364
2726 12:41:04.125378 00180000 ################################################################
2727 12:41:04.125511
2728 12:41:04.386898 00200000 ################################################################
2729 12:41:04.387047
2730 12:41:04.654870 00280000 ################################################################
2731 12:41:04.655013
2732 12:41:04.907621 00300000 ################################################################
2733 12:41:04.907764
2734 12:41:05.161032 00380000 ################################################################
2735 12:41:05.161181
2736 12:41:05.415845 00400000 ################################################################
2737 12:41:05.415994
2738 12:41:05.666090 00480000 ################################################################
2739 12:41:05.666233
2740 12:41:05.925880 00500000 ################################################################
2741 12:41:05.926021
2742 12:41:06.176715 00580000 ################################################################
2743 12:41:06.176860
2744 12:41:06.431207 00600000 ################################################################
2745 12:41:06.431345
2746 12:41:06.686787 00680000 ################################################################
2747 12:41:06.686933
2748 12:41:06.946336 00700000 ################################################################
2749 12:41:06.946481
2750 12:41:07.194790 00780000 ################################################################
2751 12:41:07.194926
2752 12:41:07.406677 00800000 ####################################################### done.
2753 12:41:07.406816
2754 12:41:07.409889 Sending tftp read request... done.
2755 12:41:07.409973
2756 12:41:07.413289 Waiting for the transfer...
2757 12:41:07.413377
2758 12:41:07.416473 00000000 # done.
2759 12:41:07.416562
2760 12:41:07.423117 Command line loaded dynamically from TFTP file: 11383475/tftp-deploy-4iwcdtly/kernel/cmdline
2761 12:41:07.426473
2762 12:41:07.439744 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2763 12:41:07.445314
2764 12:41:07.448735 Shutting down all USB controllers.
2765 12:41:07.448906
2766 12:41:07.449042 Removing current net device
2767 12:41:07.449168
2768 12:41:07.452082 Finalizing coreboot
2769 12:41:07.452254
2770 12:41:07.458661 Exiting depthcharge with code 4 at timestamp: 21045910
2771 12:41:07.458915
2772 12:41:07.459103
2773 12:41:07.459279 Starting kernel ...
2774 12:41:07.459448
2775 12:41:07.459612
2776 12:41:07.460341 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2777 12:41:07.460613 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2778 12:41:07.460858 Setting prompt string to ['Linux version [0-9]']
2779 12:41:07.461144 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2780 12:41:07.461358 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2782 12:45:37.460961 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2784 12:45:37.461170 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2786 12:45:37.461337 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2789 12:45:37.461588 end: 2 depthcharge-action (duration 00:05:00) [common]
2791 12:45:37.461804 Cleaning after the job
2792 12:45:37.461896 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383475/tftp-deploy-4iwcdtly/ramdisk
2793 12:45:37.463246 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383475/tftp-deploy-4iwcdtly/kernel
2794 12:45:37.464681 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383475/tftp-deploy-4iwcdtly/modules
2795 12:45:37.465210 start: 5.1 power-off (timeout 00:00:30) [common]
2796 12:45:37.465396 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-8' '--port=1' '--command=off'
2797 12:45:37.548297 >> Command sent successfully.
2798 12:45:37.558018 Returned 0 in 0 seconds
2799 12:45:37.659602 end: 5.1 power-off (duration 00:00:00) [common]
2801 12:45:37.661146 start: 5.2 read-feedback (timeout 00:10:00) [common]
2802 12:45:37.662724 Listened to connection for namespace 'common' for up to 1s
2804 12:45:37.664688 Listened to connection for namespace 'common' for up to 1s
2805 12:45:38.662853 Finalising connection for namespace 'common'
2806 12:45:38.663513 Disconnecting from shell: Finalise
2807 12:45:38.663898
2808 12:45:38.765075 end: 5.2 read-feedback (duration 00:00:01) [common]
2809 12:45:38.765692 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11383475
2810 12:45:38.818255 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11383475
2811 12:45:38.818446 JobError: Your job cannot terminate cleanly.