Boot log: acer-chromebox-cxi4-puff

    1 12:40:31.577659  lava-dispatcher, installed at version: 2023.06
    2 12:40:31.577885  start: 0 validate
    3 12:40:31.578031  Start time: 2023-08-30 12:40:31.578023+00:00 (UTC)
    4 12:40:31.578173  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:40:31.578332  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 12:40:31.847183  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:40:31.847435  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:40:32.107627  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:40:32.108024  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 12:40:35.360521  validate duration: 3.78
   12 12:40:35.360777  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 12:40:35.360869  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 12:40:35.360950  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 12:40:35.361071  Not decompressing ramdisk as can be used compressed.
   16 12:40:35.361152  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 12:40:35.361221  saving as /var/lib/lava/dispatcher/tmp/11383473/tftp-deploy-x4ivshcn/ramdisk/rootfs.cpio.gz
   18 12:40:35.361282  total size: 8418130 (8 MB)
   19 12:40:35.887321  progress   0 % (0 MB)
   20 12:40:35.892781  progress   5 % (0 MB)
   21 12:40:35.895041  progress  10 % (0 MB)
   22 12:40:35.897255  progress  15 % (1 MB)
   23 12:40:35.899540  progress  20 % (1 MB)
   24 12:40:35.901748  progress  25 % (2 MB)
   25 12:40:35.904016  progress  30 % (2 MB)
   26 12:40:35.906064  progress  35 % (2 MB)
   27 12:40:35.908346  progress  40 % (3 MB)
   28 12:40:35.910556  progress  45 % (3 MB)
   29 12:40:35.912803  progress  50 % (4 MB)
   30 12:40:35.915044  progress  55 % (4 MB)
   31 12:40:35.917210  progress  60 % (4 MB)
   32 12:40:35.919280  progress  65 % (5 MB)
   33 12:40:35.921442  progress  70 % (5 MB)
   34 12:40:35.923665  progress  75 % (6 MB)
   35 12:40:35.925849  progress  80 % (6 MB)
   36 12:40:35.928078  progress  85 % (6 MB)
   37 12:40:35.930236  progress  90 % (7 MB)
   38 12:40:35.932535  progress  95 % (7 MB)
   39 12:40:35.934564  progress 100 % (8 MB)
   40 12:40:35.934843  8 MB downloaded in 0.57 s (14.00 MB/s)
   41 12:40:35.934998  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 12:40:35.935228  end: 1.1 download-retry (duration 00:00:01) [common]
   44 12:40:35.935310  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 12:40:35.935391  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 12:40:35.935530  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 12:40:35.935602  saving as /var/lib/lava/dispatcher/tmp/11383473/tftp-deploy-x4ivshcn/kernel/bzImage
   48 12:40:35.935660  total size: 8490896 (8 MB)
   49 12:40:35.935718  No compression specified
   50 12:40:35.937025  progress   0 % (0 MB)
   51 12:40:35.939223  progress   5 % (0 MB)
   52 12:40:35.941442  progress  10 % (0 MB)
   53 12:40:35.943714  progress  15 % (1 MB)
   54 12:40:35.945968  progress  20 % (1 MB)
   55 12:40:35.948263  progress  25 % (2 MB)
   56 12:40:35.950515  progress  30 % (2 MB)
   57 12:40:35.952854  progress  35 % (2 MB)
   58 12:40:35.955110  progress  40 % (3 MB)
   59 12:40:35.957380  progress  45 % (3 MB)
   60 12:40:35.959679  progress  50 % (4 MB)
   61 12:40:35.961871  progress  55 % (4 MB)
   62 12:40:35.964078  progress  60 % (4 MB)
   63 12:40:35.966250  progress  65 % (5 MB)
   64 12:40:35.968433  progress  70 % (5 MB)
   65 12:40:35.970674  progress  75 % (6 MB)
   66 12:40:35.972832  progress  80 % (6 MB)
   67 12:40:35.975039  progress  85 % (6 MB)
   68 12:40:35.977280  progress  90 % (7 MB)
   69 12:40:35.979507  progress  95 % (7 MB)
   70 12:40:35.981687  progress 100 % (8 MB)
   71 12:40:35.981800  8 MB downloaded in 0.05 s (175.52 MB/s)
   72 12:40:35.981936  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 12:40:35.982168  end: 1.2 download-retry (duration 00:00:00) [common]
   75 12:40:35.982309  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 12:40:35.982438  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 12:40:35.982666  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 12:40:35.982776  saving as /var/lib/lava/dispatcher/tmp/11383473/tftp-deploy-x4ivshcn/modules/modules.tar
   79 12:40:35.982869  total size: 250888 (0 MB)
   80 12:40:35.982930  Using unxz to decompress xz
   81 12:40:35.987661  progress  13 % (0 MB)
   82 12:40:35.988098  progress  26 % (0 MB)
   83 12:40:35.988341  progress  39 % (0 MB)
   84 12:40:35.989976  progress  52 % (0 MB)
   85 12:40:35.991888  progress  65 % (0 MB)
   86 12:40:35.993803  progress  78 % (0 MB)
   87 12:40:35.995785  progress  91 % (0 MB)
   88 12:40:35.997601  progress 100 % (0 MB)
   89 12:40:36.003175  0 MB downloaded in 0.02 s (11.79 MB/s)
   90 12:40:36.003409  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 12:40:36.003664  end: 1.3 download-retry (duration 00:00:00) [common]
   93 12:40:36.003754  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 12:40:36.003848  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 12:40:36.003927  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 12:40:36.004009  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 12:40:36.004228  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby
   98 12:40:36.004363  makedir: /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin
   99 12:40:36.004466  makedir: /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/tests
  100 12:40:36.004562  makedir: /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/results
  101 12:40:36.004677  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-add-keys
  102 12:40:36.004821  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-add-sources
  103 12:40:36.004949  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-background-process-start
  104 12:40:36.005077  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-background-process-stop
  105 12:40:36.005200  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-common-functions
  106 12:40:36.005322  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-echo-ipv4
  107 12:40:36.005445  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-install-packages
  108 12:40:36.005568  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-installed-packages
  109 12:40:36.005690  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-os-build
  110 12:40:36.005811  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-probe-channel
  111 12:40:36.005933  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-probe-ip
  112 12:40:36.006055  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-target-ip
  113 12:40:36.006175  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-target-mac
  114 12:40:36.006296  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-target-storage
  115 12:40:36.006420  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-test-case
  116 12:40:36.006541  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-test-event
  117 12:40:36.006718  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-test-feedback
  118 12:40:36.006841  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-test-raise
  119 12:40:36.006965  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-test-reference
  120 12:40:36.007091  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-test-runner
  121 12:40:36.007212  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-test-set
  122 12:40:36.007338  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-test-shell
  123 12:40:36.007464  Updating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-install-packages (oe)
  124 12:40:36.007616  Updating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/bin/lava-installed-packages (oe)
  125 12:40:36.007735  Creating /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/environment
  126 12:40:36.007834  LAVA metadata
  127 12:40:36.007912  - LAVA_JOB_ID=11383473
  128 12:40:36.007976  - LAVA_DISPATCHER_IP=192.168.201.1
  129 12:40:36.008077  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 12:40:36.008142  skipped lava-vland-overlay
  131 12:40:36.008216  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 12:40:36.008292  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 12:40:36.008350  skipped lava-multinode-overlay
  134 12:40:36.008420  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 12:40:36.008497  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 12:40:36.008566  Loading test definitions
  137 12:40:36.008653  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 12:40:36.008729  Using /lava-11383473 at stage 0
  139 12:40:36.009075  uuid=11383473_1.4.2.3.1 testdef=None
  140 12:40:36.009161  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 12:40:36.009246  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 12:40:36.009775  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 12:40:36.009989  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 12:40:36.010677  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 12:40:36.010901  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 12:40:36.011500  runner path: /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/0/tests/0_dmesg test_uuid 11383473_1.4.2.3.1
  149 12:40:36.011654  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 12:40:36.011874  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  152 12:40:36.011942  Using /lava-11383473 at stage 1
  153 12:40:36.012231  uuid=11383473_1.4.2.3.5 testdef=None
  154 12:40:36.012317  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 12:40:36.012397  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  156 12:40:36.012856  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 12:40:36.013067  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  159 12:40:36.013700  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 12:40:36.013921  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  162 12:40:36.014601  runner path: /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/1/tests/1_bootrr test_uuid 11383473_1.4.2.3.5
  163 12:40:36.014795  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 12:40:36.015008  Creating lava-test-runner.conf files
  166 12:40:36.015069  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/0 for stage 0
  167 12:40:36.015155  - 0_dmesg
  168 12:40:36.015236  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383473/lava-overlay-egn54wby/lava-11383473/1 for stage 1
  169 12:40:36.015325  - 1_bootrr
  170 12:40:36.015418  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 12:40:36.015500  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  172 12:40:36.023986  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 12:40:36.024092  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  174 12:40:36.024175  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 12:40:36.024257  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 12:40:36.024341  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  177 12:40:36.277009  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 12:40:36.277396  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 12:40:36.277520  extracting modules file /var/lib/lava/dispatcher/tmp/11383473/tftp-deploy-x4ivshcn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11383473/extract-overlay-ramdisk-o4iudxo3/ramdisk
  180 12:40:36.291067  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 12:40:36.291210  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 12:40:36.291302  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383473/compress-overlay-f2sq0w6q/overlay-1.4.2.4.tar.gz to ramdisk
  183 12:40:36.291375  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383473/compress-overlay-f2sq0w6q/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11383473/extract-overlay-ramdisk-o4iudxo3/ramdisk
  184 12:40:36.300467  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 12:40:36.300596  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 12:40:36.300689  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 12:40:36.300782  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 12:40:36.300859  Building ramdisk /var/lib/lava/dispatcher/tmp/11383473/extract-overlay-ramdisk-o4iudxo3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11383473/extract-overlay-ramdisk-o4iudxo3/ramdisk
  189 12:40:36.444919  >> 49788 blocks

  190 12:40:37.279670  rename /var/lib/lava/dispatcher/tmp/11383473/extract-overlay-ramdisk-o4iudxo3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11383473/tftp-deploy-x4ivshcn/ramdisk/ramdisk.cpio.gz
  191 12:40:37.280117  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 12:40:37.280245  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 12:40:37.280346  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 12:40:37.280444  No mkimage arch provided, not using FIT.
  195 12:40:37.280530  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 12:40:37.280612  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 12:40:37.280717  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 12:40:37.280806  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 12:40:37.280886  No LXC device requested
  200 12:40:37.280963  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 12:40:37.281049  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 12:40:37.281122  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 12:40:37.281193  Checking files for TFTP limit of 4294967296 bytes.
  204 12:40:37.281587  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 12:40:37.281687  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 12:40:37.281772  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 12:40:37.281893  substitutions:
  208 12:40:37.281958  - {DTB}: None
  209 12:40:37.282018  - {INITRD}: 11383473/tftp-deploy-x4ivshcn/ramdisk/ramdisk.cpio.gz
  210 12:40:37.282075  - {KERNEL}: 11383473/tftp-deploy-x4ivshcn/kernel/bzImage
  211 12:40:37.282130  - {LAVA_MAC}: None
  212 12:40:37.282184  - {PRESEED_CONFIG}: None
  213 12:40:37.282237  - {PRESEED_LOCAL}: None
  214 12:40:37.282288  - {RAMDISK}: 11383473/tftp-deploy-x4ivshcn/ramdisk/ramdisk.cpio.gz
  215 12:40:37.282341  - {ROOT_PART}: None
  216 12:40:37.282394  - {ROOT}: None
  217 12:40:37.282446  - {SERVER_IP}: 192.168.201.1
  218 12:40:37.282498  - {TEE}: None
  219 12:40:37.282576  Parsed boot commands:
  220 12:40:37.282645  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 12:40:37.282820  Parsed boot commands: tftpboot 192.168.201.1 11383473/tftp-deploy-x4ivshcn/kernel/bzImage 11383473/tftp-deploy-x4ivshcn/kernel/cmdline 11383473/tftp-deploy-x4ivshcn/ramdisk/ramdisk.cpio.gz
  222 12:40:37.282906  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 12:40:37.282990  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 12:40:37.283082  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 12:40:37.283165  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 12:40:37.283233  Not connected, no need to disconnect.
  227 12:40:37.283307  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 12:40:37.283388  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 12:40:37.283454  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi4-puff-cbg-5'
  230 12:40:37.287914  Setting prompt string to ['lava-test: # ']
  231 12:40:37.288299  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 12:40:37.288404  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 12:40:37.288495  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 12:40:37.288587  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 12:40:37.288808  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-5' '--port=1' '--command=reboot'
  236 12:40:44.002525  >> Command sent successfully.

  237 12:40:44.013183  Returned 0 in 6 seconds
  238 12:40:44.114435  end: 2.2.2.1 pdu-reboot (duration 00:00:07) [common]
  240 12:40:44.116002  end: 2.2.2 reset-device (duration 00:00:07) [common]
  241 12:40:44.116491  start: 2.2.3 depthcharge-start (timeout 00:04:53) [common]
  242 12:40:44.116931  Setting prompt string to 'Starting depthcharge on Kaisa...'
  243 12:40:44.117335  Changing prompt to 'Starting depthcharge on Kaisa...'
  244 12:40:44.117829  depthcharge-start: Wait for prompt Starting depthcharge on Kaisa... (timeout 00:05:00)
  245 12:40:44.119394  [Enter `^Ec?' for help]

  246 12:40:44.410202  
  247 12:40:44.410757  

  248 12:40:44.422055  coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 bootblock starting (log level: 8)...

  249 12:40:44.426145  CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz

  250 12:40:44.431458  CPU: ID a0660, Cometlake-U A0 (6+2), ucode: 000000c9

  251 12:40:44.436255  CPU: AES supported, TXT NOT supported, VT supported

  252 12:40:44.441176  MCH: device id 9b71 (rev 00) is CometLake-U (2+2)

  253 12:40:44.446084  PCH: device id 0285 (rev 00) is Cometlake-U Base

  254 12:40:44.451407  IGD: device id 9baa (rev 04) is CometLake ULT GT2

  255 12:40:44.455023  VBOOT: Loading verstage.

  256 12:40:44.460093  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  257 12:40:44.464692  FMAP: base = 0xff000000 size = 0x1000000 #areas = 32

  258 12:40:44.469988  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  259 12:40:44.473195  CBFS: Locating 'fallback/verstage'

  260 12:40:44.477629  CBFS: Found @ offset 10c240 size 1152c

  261 12:40:44.478528  

  262 12:40:44.479008  

  263 12:40:44.489999  coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 verstage starting (log level: 8)...

  264 12:40:44.503858  Probing TPM: . done!

  265 12:40:44.506365  TPM ready after 0 ms

  266 12:40:44.511633  Connected to device vid:did:rid of 1ae0:0028:00

  267 12:40:44.522076  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66

  268 12:40:44.525753  Initialized TPM device CR50 revision 0

  269 12:40:44.572609  tlcl_send_startup: Startup return code is 0

  270 12:40:44.574530  TPM: setup succeeded

  271 12:40:44.587989  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  272 12:40:44.599957  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  273 12:40:44.608338  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  274 12:40:44.621286  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  275 12:40:44.624160  Chrome EC: UHEPI supported

  276 12:40:44.625711  Phase 1

  277 12:40:44.630685  FMAP: area GBB found @ c05000 (12288 bytes)

  278 12:40:44.638479  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  279 12:40:44.644197  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  280 12:40:44.647574  Recovery requested (1009000e)

  281 12:40:44.652705  TPM: Extending digest for VBOOT: boot mode into PCR 0

  282 12:40:44.662605  tlcl_extend: response is 0

  283 12:40:44.667389  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  284 12:40:44.677220  tlcl_extend: response is 0

  285 12:40:44.682296  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  286 12:40:44.685299  CBFS: Locating 'fallback/romstage'

  287 12:40:44.689352  CBFS: Found @ offset 80 size 1607c

  288 12:40:44.695183  BS: verstage times (exec / console): total (unknown) / 119 ms

  289 12:40:44.697315  

  290 12:40:44.697878  

  291 12:40:44.707681  coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 romstage starting (log level: 8)...

  292 12:40:44.713716  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  293 12:40:44.719308  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  294 12:40:44.723537  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  295 12:40:44.728067  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  296 12:40:44.731834  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  297 12:40:44.736122  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  298 12:40:44.738207  TCO_STS:   0000 0000

  299 12:40:44.741724  GEN_PMCON: e0015038 00000200

  300 12:40:44.744862  GBLRST_CAUSE: 00000000 00000000

  301 12:40:44.747063  prev_sleep_state 5

  302 12:40:44.750785  Boot Count incremented to 17079

  303 12:40:44.756759  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  304 12:40:44.758274  CBFS: Locating 'fspm.bin'

  305 12:40:44.762911  CBFS: Found @ offset 66fc0 size 71000

  306 12:40:44.766023  Chrome EC: UHEPI supported

  307 12:40:44.772551  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  308 12:40:44.776782  Probing TPM:  done!

  309 12:40:44.781675  Connected to device vid:did:rid of 1ae0:0028:00

  310 12:40:44.792280  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66

  311 12:40:44.795955  Initialized TPM device CR50 revision 0

  312 12:40:44.809281  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  313 12:40:44.816010  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  314 12:40:44.819196  MRC cache found, size 1948

  315 12:40:44.820644  bootmode is set to: 2

  316 12:40:44.823967  PRMRR disabled by config.

  317 12:40:44.828842  FMAP: area RW_SPD_CACHE found @ aff000 (4096 bytes)

  318 12:40:44.832233  SPD_CACHE: cache found, size 0x1000

  319 12:40:44.835883  No memory dimm at address 50

  320 12:40:44.838819  SPD_CACHE: DIMM0 is not present

  321 12:40:44.844724  SPD_CACHE: DIMM1 is the same

  322 12:40:44.846084  SPD @ 0x52

  323 12:40:44.849077  SPD: module type is DDR4

  324 12:40:44.853585  SPD: module part number is HMA851S6CJR6N-VK    

  325 12:40:44.859246  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  326 12:40:44.864506  SPD: device width 16 bits, bus width 64 bits

  327 12:40:44.867566  SPD: module size is 4096 MB (per channel)

  328 12:40:44.871482  memory slot: 2 configuration done.

  329 12:40:44.919861  CBMEM:

  330 12:40:44.923554  IMD: root @ 0x99fff000 254 entries.

  331 12:40:44.926910  IMD: root @ 0x99ffec00 62 entries.

  332 12:40:44.931594  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  333 12:40:44.936532  WARNING: RO_VPD is uninitialized or empty.

  334 12:40:44.940696  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  335 12:40:44.944879  WARNING: RW_VPD is uninitialized or empty.

  336 12:40:44.947735  External stage cache:

  337 12:40:44.951833  IMD: root @ 0x9abff000 254 entries.

  338 12:40:44.955123  IMD: root @ 0x9abfec00 62 entries.

  339 12:40:44.969825  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  340 12:40:44.979117  tlcl_write: response is 0

  341 12:40:44.983119  MRC: TPM MRC hash updated successfully.

  342 12:40:44.985151  1 DIMMs found

  343 12:40:44.986220  SMM Memory Map

  344 12:40:44.990347  SMRAM       : 0x9a000000 0x1000000

  345 12:40:44.993774   Subregion 0: 0x9a000000 0xa00000

  346 12:40:44.997276   Subregion 1: 0x9aa00000 0x200000

  347 12:40:45.000135   Subregion 2: 0x9ac00000 0x400000

  348 12:40:45.002176  top_of_ram = 0x9a000000

  349 12:40:45.007982  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  350 12:40:45.013870  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  351 12:40:45.018930  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  352 12:40:45.023754  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  353 12:40:45.026466  CBFS: Locating 'fallback/postcar'

  354 12:40:45.030120  CBFS: Found @ offset 1076c0 size 4b28

  355 12:40:45.036560  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  356 12:40:45.048129  Loading module at 0x99c0c000 with entry 0x99c0c000. filesize: 0x4818 memsize: 0x8af8

  357 12:40:45.052648  Processing 173 relocs. Offset value of 0x97c0c000

  358 12:40:45.060052  BS: romstage times (exec / console): total (unknown) / 271 ms

  359 12:40:45.060777  

  360 12:40:45.061392  

  361 12:40:45.072047  coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 postcar starting (log level: 8)...

  362 12:40:45.076802  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  363 12:40:45.080464  CBFS: Locating 'fallback/ramstage'

  364 12:40:45.084606  CBFS: Found @ offset 44e00 size 1e0ef

  365 12:40:45.090719  Decompressing stage fallback/ramstage @ 0x99ba4fc0 (415200 bytes)

  366 12:40:45.122505  Loading module at 0x99ba5000 with entry 0x99ba5000. filesize: 0x46598 memsize: 0x655a0

  367 12:40:45.127055  Processing 4604 relocs. Offset value of 0x98da5000

  368 12:40:45.133589  BS: postcar times (exec / console): total (unknown) / 43 ms

  369 12:40:45.134063  

  370 12:40:45.134961  

  371 12:40:45.144326  coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 ramstage starting (log level: 8)...

  372 12:40:45.146045  Normal boot

  373 12:40:45.151086  cse_lite: Skip switching to RW in the recovery path

  374 12:40:45.155977  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 5 ms

  375 12:40:45.161587  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  376 12:40:45.165372  CBFS: Locating 'cpu_microcode_blob.bin'

  377 12:40:45.169620  CBFS: Found @ offset 16180 size 2ec00

  378 12:40:45.174198  microcode: sig=0xa0660 pf=0x80 revision=0xc9

  379 12:40:45.176711  Skip microcode update

  380 12:40:45.180793  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  381 12:40:45.183733  CBFS: Locating 'fsps.bin'

  382 12:40:45.187750  CBFS: Found @ offset d8fc0 size 2e69d

  383 12:40:45.223403  Detected 2 core, 2 thread CPU.

  384 12:40:45.225803  Setting up SMI for CPU

  385 12:40:45.228109  IED base = 0x9ac00000

  386 12:40:45.230390  IED size = 0x00400000

  387 12:40:45.232643  Will perform SMM setup.

  388 12:40:45.237243  CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz.

  389 12:40:45.245899  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  390 12:40:45.250097  Processing 16 relocs. Offset value of 0x00030000

  391 12:40:45.252992  Attempting to start 1 APs

  392 12:40:45.257062  Waiting for 10ms after sending INIT.

  393 12:40:45.272684  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 2.

  394 12:40:45.273718  done.

  395 12:40:45.277970  Waiting for 2nd SIPI to complete...done.

  396 12:40:45.285492  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  397 12:40:45.290507  Processing 13 relocs. Offset value of 0x00038000

  398 12:40:45.297750  SMM Module: stub loaded at 0x00038000. Will call 0x99bc2760(0x00000000)

  399 12:40:45.301147  Installing SMM handler to 0x9a000000

  400 12:40:45.310243  Loading module at 0x9a010000 with entry 0x9a010a30. filesize: 0x7bc8 memsize: 0xcc90

  401 12:40:45.314730  Processing 617 relocs. Offset value of 0x9a010000

  402 12:40:45.322963  Loading module at 0x9a008000 with entry 0x9a008000. filesize: 0x1b8 memsize: 0x1b8

  403 12:40:45.327655  Processing 13 relocs. Offset value of 0x9a008000

  404 12:40:45.333556  SMM Module: placing jmp sequence at 0x9a007c00 rel16 0x03fd

  405 12:40:45.340194  SMM Module: stub loaded at 0x9a008000. Will call 0x9a010a30(0x00000000)

  406 12:40:45.343609  Clearing SMI status registers

  407 12:40:45.345332  SMI_STS: PM1 

  408 12:40:45.347375  PM1_STS: PWRBTN 

  409 12:40:45.349460  New SMBASE 0x9a000000

  410 12:40:45.352351  In relocation handler: CPU 0

  411 12:40:45.356809  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  412 12:40:45.361274  Writing SMRR. base = 0x9a000006, mask=0xff000800

  413 12:40:45.363419  Relocation complete.

  414 12:40:45.365609  New SMBASE 0x99fffc00

  415 12:40:45.368288  In relocation handler: CPU 1

  416 12:40:45.372805  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  417 12:40:45.377359  Writing SMRR. base = 0x9a000006, mask=0xff000800

  418 12:40:45.379070  Relocation complete.

  419 12:40:45.381921  Initializing CPU #0

  420 12:40:45.385460  CPU: vendor Intel device a0660

  421 12:40:45.389105  CPU: family 06, model a6, stepping 00

  422 12:40:45.391206  Clearing out pending MCEs

  423 12:40:45.393839  Setting up local APIC...

  424 12:40:45.396382   apic_id: 0x00 done.

  425 12:40:45.399130  Turbo is available but hidden

  426 12:40:45.401462  Turbo is unavailable

  427 12:40:45.403673  VMX status: enabled

  428 12:40:45.407269  IA32_FEATURE_CONTROL status: locked

  429 12:40:45.409765  Skip microcode update

  430 12:40:45.411831  CPU #0 initialized

  431 12:40:45.414273  Initializing CPU #1

  432 12:40:45.416421  CPU: vendor Intel device a0660

  433 12:40:45.420720  CPU: family 06, model a6, stepping 00

  434 12:40:45.423246  Clearing out pending MCEs

  435 12:40:45.426126  Setting up local APIC...

  436 12:40:45.427686   apic_id: 0x02 done.

  437 12:40:45.429768  VMX status: enabled

  438 12:40:45.433715  IA32_FEATURE_CONTROL status: locked

  439 12:40:45.435637  Skip microcode update

  440 12:40:45.437852  CPU #1 initialized

  441 12:40:45.441646  bsp_do_flight_plan done after 160 msecs.

  442 12:40:45.444091  Enabling SMIs.

  443 12:40:45.444819  Locking SMM.

  444 12:40:45.451422  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 89 / 199 ms

  445 12:40:45.461710  Waiting for DisplayPort

  446 12:40:48.484213  DisplayPort not ready after 3000ms. Abort.

  447 12:40:48.490148  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  448 12:40:48.492293  CBFS: Locating 'vbt.bin'

  449 12:40:48.496598  CBFS: Found @ offset 66a80 size 49e

  450 12:40:48.501146  Found a VBT of 4608 bytes after decompression

  451 12:40:48.503451  psys_pmax = 182W

  452 12:40:48.551777  Display FSP Version Info HOB

  453 12:40:48.554720  Reference Code - CPU = 9.0.1e.30

  454 12:40:48.557201  uCode Version = 0.0.0.ca

  455 12:40:48.560240  TXT ACM version = ff.ff.ff.ffff

  456 12:40:48.563676  Reference Code - ME = 9.0.1e.30

  457 12:40:48.566220  MEBx version = 0.0.0.0

  458 12:40:48.569979  ME Firmware Version = Consumer SKU

  459 12:40:48.572831  Reference Code - CML PCH = 9.0.1e.30

  460 12:40:48.575768  PCH-CRID Status = Disabled

  461 12:40:48.580145  PCH-CRID Original Value = ff.ff.ff.ffff

  462 12:40:48.583611  PCH-CRID New Value = ff.ff.ff.ffff

  463 12:40:48.586602  OPROM - RST - RAID = ff.ff.ff.ffff

  464 12:40:48.591653  ChipsetInit Base Version = ff.ff.ff.ffff

  465 12:40:48.594824  ChipsetInit Oem Version = ff.ff.ff.ffff

  466 12:40:48.599310  Reference Code - SA - System Agent = 9.0.1e.30

  467 12:40:48.603765  Reference Code - MRC = 0.0.0.2d

  468 12:40:48.605912  SA - PCIe Version = 9.0.1e.30

  469 12:40:48.608414  SA-CRID Status = Disabled

  470 12:40:48.611462  SA-CRID Original Value = 0.0.0.0

  471 12:40:48.614378  SA-CRID New Value = 0.0.0.0

  472 12:40:48.617751  OPROM - VBIOS = ff.ff.ff.ffff

  473 12:40:48.621555  Found PCIe Root Port #7 at PCI: 00:1c.0.

  474 12:40:48.628921  Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.

  475 12:40:48.640199  pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing.

  476 12:40:48.652444  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  477 12:40:48.664283  pcie_rp_update_dev: Couldn't find PCIe Root Port #14 (originally PCI: 00:1d.5) which was enabled in devicetree, removing.

  478 12:40:48.670656  BS: BS_DEV_INIT_CHIPS run times (exec / console): 3067 / 140 ms

  479 12:40:48.672245  RTC Init

  480 12:40:48.675478  Set power on after power failure.

  481 12:40:48.677678  Disabling Deep S3

  482 12:40:48.679585  Disabling Deep S3

  483 12:40:48.681156  Disabling Deep S4

  484 12:40:48.683176  Disabling Deep S4

  485 12:40:48.685822  Disabling Deep S5

  486 12:40:48.686921  Disabling Deep S5

  487 12:40:48.693405  BS: BS_DEV_INIT_CHIPS exit times (exec / console): 1 / 15 ms

  488 12:40:48.695484  Enumerating buses...

  489 12:40:48.699936  Show all devs... Before device enumeration.

  490 12:40:48.702176  Root Device: enabled 1

  491 12:40:48.705020  CPU_CLUSTER: 0: enabled 1

  492 12:40:48.707378  DOMAIN: 0000: enabled 1

  493 12:40:48.709258  APIC: 00: enabled 1

  494 12:40:48.711855  PCI: 00:00.0: enabled 1

  495 12:40:48.714173  PCI: 00:02.0: enabled 1

  496 12:40:48.716373  PCI: 00:04.0: enabled 1

  497 12:40:48.718868  PCI: 00:05.0: enabled 0

  498 12:40:48.721347  PCI: 00:12.0: enabled 1

  499 12:40:48.724115  PCI: 00:12.5: enabled 0

  500 12:40:48.726250  PCI: 00:12.6: enabled 0

  501 12:40:48.728666  PCI: 00:14.0: enabled 1

  502 12:40:48.731031  PCI: 00:14.1: enabled 0

  503 12:40:48.733512  PCI: 00:14.3: enabled 1

  504 12:40:48.736270  PCI: 00:14.5: enabled 1

  505 12:40:48.738047  PCI: 00:15.0: enabled 0

  506 12:40:48.740956  PCI: 00:15.1: enabled 0

  507 12:40:48.743498  PCI: 00:15.2: enabled 1

  508 12:40:48.745530  PCI: 00:15.3: enabled 1

  509 12:40:48.748343  PCI: 00:16.0: enabled 1

  510 12:40:48.750454  PCI: 00:16.1: enabled 0

  511 12:40:48.753027  PCI: 00:16.2: enabled 0

  512 12:40:48.755248  PCI: 00:16.3: enabled 0

  513 12:40:48.757821  PCI: 00:16.4: enabled 0

  514 12:40:48.760126  PCI: 00:16.5: enabled 0

  515 12:40:48.762929  PCI: 00:17.0: enabled 1

  516 12:40:48.765277  PCI: 00:19.0: enabled 1

  517 12:40:48.767581  PCI: 00:19.1: enabled 0

  518 12:40:48.770194  PCI: 00:19.2: enabled 0

  519 12:40:48.772630  PCI: 00:1a.0: enabled 1

  520 12:40:48.774833  PCI: 00:1c.0: enabled 0

  521 12:40:48.777628  PCI: 00:1c.1: enabled 0

  522 12:40:48.780262  PCI: 00:1c.2: enabled 0

  523 12:40:48.782138  PCI: 00:1c.3: enabled 0

  524 12:40:48.784795  PCI: 00:1c.4: enabled 0

  525 12:40:48.787451  PCI: 00:1c.5: enabled 0

  526 12:40:48.789663  PCI: 00:1c.0: enabled 1

  527 12:40:48.792154  PCI: 00:1c.7: enabled 0

  528 12:40:48.794196  PCI: 00:1d.0: enabled 1

  529 12:40:48.796537  PCI: 00:1d.1: enabled 0

  530 12:40:48.798990  PCI: 00:1d.2: enabled 1

  531 12:40:48.801533  PCI: 00:1d.3: enabled 0

  532 12:40:48.803979  PCI: 00:1d.4: enabled 0

  533 12:40:48.806182  PCI: 00:1d.5: enabled 1

  534 12:40:48.808613  PCI: 00:1e.0: enabled 1

  535 12:40:48.811762  PCI: 00:1e.1: enabled 0

  536 12:40:48.813786  PCI: 00:1e.2: enabled 1

  537 12:40:48.815832  PCI: 00:1e.3: enabled 0

  538 12:40:48.818392  PCI: 00:1f.0: enabled 1

  539 12:40:48.820921  PCI: 00:1f.1: enabled 1

  540 12:40:48.823992  PCI: 00:1f.2: enabled 1

  541 12:40:48.825721  PCI: 00:1f.3: enabled 1

  542 12:40:48.828404  PCI: 00:1f.4: enabled 1

  543 12:40:48.830825  PCI: 00:1f.5: enabled 1

  544 12:40:48.833917  PCI: 00:1f.6: enabled 0

  545 12:40:48.835966  GENERIC: 0.0: enabled 1

  546 12:40:48.838175  USB0 port 0: enabled 1

  547 12:40:48.840824  I2C: 00:4a: enabled 1

  548 12:40:48.842689  I2C: 00:4a: enabled 1

  549 12:40:48.844840  I2C: 00:1a: enabled 1

  550 12:40:48.847108  PCI: 00:00.0: enabled 1

  551 12:40:48.849870  PCI: 00:00.0: enabled 1

  552 12:40:48.851940  SPI: 00: enabled 1

  553 12:40:48.853707  PNP: 0c09.0: enabled 1

  554 12:40:48.856015  USB2 port 0: enabled 1

  555 12:40:48.858735  USB2 port 1: enabled 1

  556 12:40:48.860976  USB2 port 2: enabled 1

  557 12:40:48.863376  USB2 port 3: enabled 1

  558 12:40:48.865190  USB2 port 5: enabled 1

  559 12:40:48.867811  USB2 port 6: enabled 0

  560 12:40:48.870207  USB2 port 9: enabled 1

  561 12:40:48.872745  USB3 port 0: enabled 1

  562 12:40:48.874785  USB3 port 1: enabled 1

  563 12:40:48.877602  USB3 port 2: enabled 1

  564 12:40:48.879256  USB3 port 3: enabled 1

  565 12:40:48.882099  USB3 port 4: enabled 1

  566 12:40:48.884426  USB2 port 4: enabled 1

  567 12:40:48.886874  USB3 port 5: enabled 1

  568 12:40:48.888547  APIC: 02: enabled 1

  569 12:40:48.890482  Compare with tree...

  570 12:40:48.893327  Root Device: enabled 1

  571 12:40:48.896190   CPU_CLUSTER: 0: enabled 1

  572 12:40:48.898474    APIC: 00: enabled 1

  573 12:40:48.900325    APIC: 02: enabled 1

  574 12:40:48.903041   DOMAIN: 0000: enabled 1

  575 12:40:48.905783    PCI: 00:00.0: enabled 1

  576 12:40:48.908429    PCI: 00:02.0: enabled 1

  577 12:40:48.910690    PCI: 00:04.0: enabled 1

  578 12:40:48.913311     GENERIC: 0.0: enabled 1

  579 12:40:48.916546    PCI: 00:05.0: enabled 0

  580 12:40:48.918471    PCI: 00:12.0: enabled 1

  581 12:40:48.921980    PCI: 00:12.5: enabled 0

  582 12:40:48.923900    PCI: 00:12.6: enabled 0

  583 12:40:48.926515    PCI: 00:14.0: enabled 1

  584 12:40:48.929186     USB0 port 0: enabled 1

  585 12:40:48.931626      USB2 port 0: enabled 1

  586 12:40:48.935150      USB2 port 1: enabled 1

  587 12:40:48.937485      USB2 port 2: enabled 1

  588 12:40:48.940215      USB2 port 3: enabled 1

  589 12:40:48.942903      USB2 port 5: enabled 1

  590 12:40:48.945360      USB2 port 6: enabled 0

  591 12:40:48.948250      USB2 port 9: enabled 1

  592 12:40:48.951751      USB3 port 0: enabled 1

  593 12:40:48.954061      USB3 port 1: enabled 1

  594 12:40:48.956165      USB3 port 2: enabled 1

  595 12:40:48.959000      USB3 port 3: enabled 1

  596 12:40:48.962161      USB3 port 4: enabled 1

  597 12:40:48.964746      USB2 port 4: enabled 1

  598 12:40:48.966787      USB3 port 5: enabled 1

  599 12:40:48.969814    PCI: 00:14.1: enabled 0

  600 12:40:48.972570    PCI: 00:14.3: enabled 1

  601 12:40:48.975373    PCI: 00:14.5: enabled 1

  602 12:40:48.977598    PCI: 00:15.0: enabled 0

  603 12:40:48.980432    PCI: 00:15.1: enabled 0

  604 12:40:48.982832    PCI: 00:15.2: enabled 1

  605 12:40:48.985663     I2C: 00:4a: enabled 1

  606 12:40:48.988196    PCI: 00:15.3: enabled 1

  607 12:40:48.990563     I2C: 00:4a: enabled 1

  608 12:40:48.993108    PCI: 00:16.0: enabled 1

  609 12:40:48.995790    PCI: 00:16.1: enabled 0

  610 12:40:48.998276    PCI: 00:16.2: enabled 0

  611 12:40:49.001509    PCI: 00:16.3: enabled 0

  612 12:40:49.003811    PCI: 00:16.4: enabled 0

  613 12:40:49.006233    PCI: 00:16.5: enabled 0

  614 12:40:49.009163    PCI: 00:17.0: enabled 1

  615 12:40:49.011982    PCI: 00:19.0: enabled 1

  616 12:40:49.013974     I2C: 00:1a: enabled 1

  617 12:40:49.016544    PCI: 00:19.1: enabled 0

  618 12:40:49.019214    PCI: 00:19.2: enabled 0

  619 12:40:49.022627    PCI: 00:1a.0: enabled 1

  620 12:40:49.024470    PCI: 00:1c.0: enabled 1

  621 12:40:49.027488     PCI: 00:00.0: enabled 1

  622 12:40:49.030488    PCI: 00:1e.0: enabled 1

  623 12:40:49.032631    PCI: 00:1e.1: enabled 0

  624 12:40:49.035238    PCI: 00:1e.2: enabled 1

  625 12:40:49.037434     SPI: 00: enabled 1

  626 12:40:49.040391    PCI: 00:1e.3: enabled 0

  627 12:40:49.042724    PCI: 00:1f.0: enabled 1

  628 12:40:49.045386     PNP: 0c09.0: enabled 1

  629 12:40:49.048269    PCI: 00:1f.1: enabled 1

  630 12:40:49.051110    PCI: 00:1f.2: enabled 1

  631 12:40:49.053486    PCI: 00:1f.3: enabled 1

  632 12:40:49.056504    PCI: 00:1f.4: enabled 1

  633 12:40:49.059210    PCI: 00:1f.5: enabled 1

  634 12:40:49.061598    PCI: 00:1f.6: enabled 0

  635 12:40:49.063663  Root Device scanning...

  636 12:40:49.066939  scan_static_bus for Root Device

  637 12:40:49.069675  CPU_CLUSTER: 0 enabled

  638 12:40:49.071704  DOMAIN: 0000 enabled

  639 12:40:49.074005  DOMAIN: 0000 scanning...

  640 12:40:49.077168  PCI: pci_scan_bus for bus 00

  641 12:40:49.080464  PCI: 00:00.0 [8086/0000] ops

  642 12:40:49.083941  PCI: 00:00.0 [8086/9b71] enabled

  643 12:40:49.087432  PCI: 00:02.0 [8086/0000] bus ops

  644 12:40:49.090562  PCI: 00:02.0 [8086/9baa] enabled

  645 12:40:49.093483  PCI: 00:04.0 [8086/0000] bus ops

  646 12:40:49.097320  PCI: 00:04.0 [8086/1903] enabled

  647 12:40:49.100570  PCI: 00:08.0 [8086/1911] enabled

  648 12:40:49.103747  PCI: 00:12.0 [8086/02f9] enabled

  649 12:40:49.106764  PCI: 00:14.0 [8086/0000] bus ops

  650 12:40:49.110306  PCI: 00:14.0 [8086/02ed] enabled

  651 12:40:49.113646  PCI: 00:14.2 [8086/02ef] enabled

  652 12:40:49.116878  PCI: 00:14.3 [8086/02f0] enabled

  653 12:40:49.120412  PCI: 00:14.5 [8086/0000] ops

  654 12:40:49.124029  PCI: 00:14.5 [8086/02f5] enabled

  655 12:40:49.126538  PCI: 00:15.0 [8086/0000] bus ops

  656 12:40:49.129764  PCI: 00:15.0 [8086/02e8] disabled

  657 12:40:49.134084  PCI: 00:15.2 [8086/0000] bus ops

  658 12:40:49.137038  PCI: 00:15.2 [8086/02ea] enabled

  659 12:40:49.140457  PCI: 00:15.3 [8086/0000] bus ops

  660 12:40:49.143712  PCI: 00:15.3 [8086/02eb] enabled

  661 12:40:49.147202  PCI: 00:16.0 [8086/0000] ops

  662 12:40:49.149441  PCI: 00:16.0 [8086/02e0] enabled

  663 12:40:49.155984  PCI: Static device PCI: 00:17.0 not found, disabling it.

  664 12:40:49.159273  PCI: 00:19.0 [8086/0000] bus ops

  665 12:40:49.162482  PCI: 00:19.0 [8086/02c5] enabled

  666 12:40:49.165429  PCI: 00:1a.0 [8086/0000] ops

  667 12:40:49.168234  PCI: 00:1a.0 [8086/02c4] enabled

  668 12:40:49.171754  PCI: 00:1c.0 [8086/0000] bus ops

  669 12:40:49.175506  PCI: 00:1c.0 [8086/02be] enabled

  670 12:40:49.178587  PCI: 00:1e.0 [8086/0000] ops

  671 12:40:49.181069  PCI: 00:1e.0 [8086/02a8] enabled

  672 12:40:49.184463  PCI: 00:1e.2 [8086/0000] bus ops

  673 12:40:49.187427  PCI: 00:1e.2 [8086/02aa] enabled

  674 12:40:49.191441  PCI: 00:1f.0 [8086/0000] bus ops

  675 12:40:49.194420  PCI: 00:1f.0 [8086/0285] enabled

  676 12:40:49.200373  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  677 12:40:49.205665  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  678 12:40:49.208830  PCI: 00:1f.3 [8086/0000] bus ops

  679 12:40:49.212676  PCI: 00:1f.3 [8086/02c8] enabled

  680 12:40:49.216157  PCI: 00:1f.4 [8086/0000] bus ops

  681 12:40:49.218909  PCI: 00:1f.4 [8086/02a3] enabled

  682 12:40:49.222533  PCI: 00:1f.5 [8086/0000] bus ops

  683 12:40:49.225202  PCI: 00:1f.5 [8086/02a4] enabled

  684 12:40:49.228556  PCI: Leftover static devices:

  685 12:40:49.229994  PCI: 00:05.0

  686 12:40:49.231275  PCI: 00:12.5

  687 12:40:49.232703  PCI: 00:12.6

  688 12:40:49.233972  PCI: 00:14.1

  689 12:40:49.235523  PCI: 00:15.1

  690 12:40:49.236722  PCI: 00:16.1

  691 12:40:49.238061  PCI: 00:16.2

  692 12:40:49.239856  PCI: 00:16.3

  693 12:40:49.240916  PCI: 00:16.4

  694 12:40:49.242256  PCI: 00:16.5

  695 12:40:49.244459  PCI: 00:17.0

  696 12:40:49.245173  PCI: 00:19.1

  697 12:40:49.246810  PCI: 00:19.2

  698 12:40:49.248179  PCI: 00:1e.1

  699 12:40:49.249272  PCI: 00:1e.3

  700 12:40:49.250226  PCI: 00:1f.1

  701 12:40:49.252162  PCI: 00:1f.2

  702 12:40:49.253058  PCI: 00:1f.6

  703 12:40:49.256779  PCI: Check your devicetree.cb.

  704 12:40:49.258658  PCI: 00:02.0 scanning...

  705 12:40:49.262346  scan_generic_bus for PCI: 00:02.0

  706 12:40:49.267000  scan_generic_bus for PCI: 00:02.0 done

  707 12:40:49.271054  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  708 12:40:49.273525  PCI: 00:04.0 scanning...

  709 12:40:49.277323  scan_generic_bus for PCI: 00:04.0

  710 12:40:49.282222  bus: PCI: 00:04.0[0]->GENERIC: 0.0 enabled

  711 12:40:49.285476  scan_generic_bus for PCI: 00:04.0 done

  712 12:40:49.290078  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  713 12:40:49.292349  PCI: 00:14.0 scanning...

  714 12:40:49.296084  scan_static_bus for PCI: 00:14.0

  715 12:40:49.298520  USB0 port 0 enabled

  716 12:40:49.300374  USB0 port 0 scanning...

  717 12:40:49.304083  scan_static_bus for USB0 port 0

  718 12:40:49.306079  USB2 port 0 enabled

  719 12:40:49.308234  USB2 port 1 enabled

  720 12:40:49.310328  USB2 port 2 enabled

  721 12:40:49.312868  USB2 port 3 enabled

  722 12:40:49.314289  USB2 port 5 enabled

  723 12:40:49.316611  USB2 port 6 disabled

  724 12:40:49.318688  USB2 port 9 enabled

  725 12:40:49.320618  USB3 port 0 enabled

  726 12:40:49.323218  USB3 port 1 enabled

  727 12:40:49.325480  USB3 port 2 enabled

  728 12:40:49.326988  USB3 port 3 enabled

  729 12:40:49.328950  USB3 port 4 enabled

  730 12:40:49.330638  USB2 port 4 enabled

  731 12:40:49.332862  USB3 port 5 enabled

  732 12:40:49.335478  USB2 port 0 scanning...

  733 12:40:49.338800  scan_static_bus for USB2 port 0

  734 12:40:49.343027  scan_static_bus for USB2 port 0 done

  735 12:40:49.347503  scan_bus: bus USB2 port 0 finished in 6 msecs

  736 12:40:49.349699  USB2 port 1 scanning...

  737 12:40:49.353495  scan_static_bus for USB2 port 1

  738 12:40:49.356682  scan_static_bus for USB2 port 1 done

  739 12:40:49.361638  scan_bus: bus USB2 port 1 finished in 6 msecs

  740 12:40:49.364176  USB2 port 2 scanning...

  741 12:40:49.367860  scan_static_bus for USB2 port 2

  742 12:40:49.371008  scan_static_bus for USB2 port 2 done

  743 12:40:49.375633  scan_bus: bus USB2 port 2 finished in 6 msecs

  744 12:40:49.378048  USB2 port 3 scanning...

  745 12:40:49.381419  scan_static_bus for USB2 port 3

  746 12:40:49.386074  scan_static_bus for USB2 port 3 done

  747 12:40:49.390362  scan_bus: bus USB2 port 3 finished in 6 msecs

  748 12:40:49.392953  USB2 port 5 scanning...

  749 12:40:49.395950  scan_static_bus for USB2 port 5

  750 12:40:49.399940  scan_static_bus for USB2 port 5 done

  751 12:40:49.404539  scan_bus: bus USB2 port 5 finished in 6 msecs

  752 12:40:49.407111  USB2 port 9 scanning...

  753 12:40:49.410313  scan_static_bus for USB2 port 9

  754 12:40:49.413500  scan_static_bus for USB2 port 9 done

  755 12:40:49.418231  scan_bus: bus USB2 port 9 finished in 6 msecs

  756 12:40:49.421711  USB3 port 0 scanning...

  757 12:40:49.425187  scan_static_bus for USB3 port 0

  758 12:40:49.428697  scan_static_bus for USB3 port 0 done

  759 12:40:49.432667  scan_bus: bus USB3 port 0 finished in 6 msecs

  760 12:40:49.435293  USB3 port 1 scanning...

  761 12:40:49.438540  scan_static_bus for USB3 port 1

  762 12:40:49.441999  scan_static_bus for USB3 port 1 done

  763 12:40:49.446630  scan_bus: bus USB3 port 1 finished in 6 msecs

  764 12:40:49.449058  USB3 port 2 scanning...

  765 12:40:49.452567  scan_static_bus for USB3 port 2

  766 12:40:49.456407  scan_static_bus for USB3 port 2 done

  767 12:40:49.461261  scan_bus: bus USB3 port 2 finished in 6 msecs

  768 12:40:49.463700  USB3 port 3 scanning...

  769 12:40:49.466858  scan_static_bus for USB3 port 3

  770 12:40:49.470792  scan_static_bus for USB3 port 3 done

  771 12:40:49.475654  scan_bus: bus USB3 port 3 finished in 6 msecs

  772 12:40:49.477822  USB3 port 4 scanning...

  773 12:40:49.481167  scan_static_bus for USB3 port 4

  774 12:40:49.485185  scan_static_bus for USB3 port 4 done

  775 12:40:49.490054  scan_bus: bus USB3 port 4 finished in 6 msecs

  776 12:40:49.491893  USB2 port 4 scanning...

  777 12:40:49.495112  scan_static_bus for USB2 port 4

  778 12:40:49.498959  scan_static_bus for USB2 port 4 done

  779 12:40:49.504054  scan_bus: bus USB2 port 4 finished in 6 msecs

  780 12:40:49.505990  USB3 port 5 scanning...

  781 12:40:49.509593  scan_static_bus for USB3 port 5

  782 12:40:49.513164  scan_static_bus for USB3 port 5 done

  783 12:40:49.517674  scan_bus: bus USB3 port 5 finished in 6 msecs

  784 12:40:49.521574  scan_static_bus for USB0 port 0 done

  785 12:40:49.526502  scan_bus: bus USB0 port 0 finished in 219 msecs

  786 12:40:49.530871  scan_static_bus for PCI: 00:14.0 done

  787 12:40:49.535751  scan_bus: bus PCI: 00:14.0 finished in 236 msecs

  788 12:40:49.537225  PCI: 00:15.2 scanning...

  789 12:40:49.541086  scan_generic_bus for PCI: 00:15.2

  790 12:40:49.545575  bus: PCI: 00:15.2[0]->I2C: 02:4a enabled

  791 12:40:49.548882  scan_generic_bus for PCI: 00:15.2 done

  792 12:40:49.553895  scan_bus: bus PCI: 00:15.2 finished in 11 msecs

  793 12:40:49.556390  PCI: 00:15.3 scanning...

  794 12:40:49.559898  scan_generic_bus for PCI: 00:15.3

  795 12:40:49.564213  bus: PCI: 00:15.3[0]->I2C: 03:4a enabled

  796 12:40:49.567926  scan_generic_bus for PCI: 00:15.3 done

  797 12:40:49.573021  scan_bus: bus PCI: 00:15.3 finished in 11 msecs

  798 12:40:49.575328  PCI: 00:19.0 scanning...

  799 12:40:49.579576  scan_generic_bus for PCI: 00:19.0

  800 12:40:49.583135  bus: PCI: 00:19.0[0]->I2C: 04:1a enabled

  801 12:40:49.587243  scan_generic_bus for PCI: 00:19.0 done

  802 12:40:49.591502  scan_bus: bus PCI: 00:19.0 finished in 11 msecs

  803 12:40:49.594235  PCI: 00:1c.0 scanning...

  804 12:40:49.598120  do_pci_scan_bridge for PCI: 00:1c.0

  805 12:40:49.601152  PCI: pci_scan_bus for bus 01

  806 12:40:49.604970  PCI: 01:00.0 [10ec/8168] ops

  807 12:40:49.608036  PCI: 01:00.0 [10ec/8168] enabled

  808 12:40:49.611972  Enabling Common Clock Configuration

  809 12:40:49.616001  L1 Sub-State supported from root port 28

  810 12:40:49.618523  L1 Sub-State Support = 0xf

  811 12:40:49.621335  CommonModeRestoreTime = 0x96

  812 12:40:49.626083  Power On Value = 0xf, Power On Scale = 0x1

  813 12:40:49.627147  ASPM: Enabled L1

  814 12:40:49.631285  PCIe: Max_Payload_Size adjusted to 128

  815 12:40:49.636258  scan_bus: bus PCI: 00:1c.0 finished in 36 msecs

  816 12:40:49.638951  PCI: 00:1e.2 scanning...

  817 12:40:49.642930  scan_generic_bus for PCI: 00:1e.2

  818 12:40:49.646238  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

  819 12:40:49.649619  scan_generic_bus for PCI: 00:1e.2 done

  820 12:40:49.654995  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

  821 12:40:49.657212  PCI: 00:1f.0 scanning...

  822 12:40:49.660730  scan_static_bus for PCI: 00:1f.0

  823 12:40:49.663438  PNP: 0c09.0 enabled

  824 12:40:49.665528  PNP: 0c09.0 scanning...

  825 12:40:49.668939  scan_static_bus for PNP: 0c09.0

  826 12:40:49.673005  scan_static_bus for PNP: 0c09.0 done

  827 12:40:49.677793  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

  828 12:40:49.681243  scan_static_bus for PCI: 00:1f.0 done

  829 12:40:49.686157  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

  830 12:40:49.688246  PCI: 00:1f.3 scanning...

  831 12:40:49.691814  scan_static_bus for PCI: 00:1f.3

  832 12:40:49.696367  scan_static_bus for PCI: 00:1f.3 done

  833 12:40:49.700137  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

  834 12:40:49.703596  PCI: 00:1f.4 scanning...

  835 12:40:49.706742  scan_generic_bus for PCI: 00:1f.4

  836 12:40:49.710734  scan_generic_bus for PCI: 00:1f.4 done

  837 12:40:49.715263  scan_bus: bus PCI: 00:1f.4 finished in 7 msecs

  838 12:40:49.718142  PCI: 00:1f.5 scanning...

  839 12:40:49.721391  scan_generic_bus for PCI: 00:1f.5

  840 12:40:49.725049  scan_generic_bus for PCI: 00:1f.5 done

  841 12:40:49.730488  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

  842 12:40:49.734656  scan_bus: bus DOMAIN: 0000 finished in 653 msecs

  843 12:40:49.738879  scan_static_bus for Root Device done

  844 12:40:49.743209  scan_bus: bus Root Device finished in 672 msecs

  845 12:40:49.744025  done

  846 12:40:49.750431  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1037 ms

  847 12:40:49.756143  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  848 12:40:49.761961  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  849 12:40:49.767937  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

  850 12:40:49.773632  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  851 12:40:49.776675  Chrome EC: UHEPI supported

  852 12:40:49.782470  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

  853 12:40:49.786197  SPI flash protection: WPSW=0 SRP0=1

  854 12:40:49.790783  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

  855 12:40:49.796882  BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 39 ms

  856 12:40:49.799782  found VGA at PCI: 00:02.0

  857 12:40:49.802920  Setting up VGA for PCI: 00:02.0

  858 12:40:49.808243  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

  859 12:40:49.813037  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

  860 12:40:49.815320  Allocating resources...

  861 12:40:49.817738  Reading resources...

  862 12:40:49.821365  Root Device read_resources bus 0 link: 0

  863 12:40:49.826055  CPU_CLUSTER: 0 read_resources bus 0 link: 0

  864 12:40:49.831444  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

  865 12:40:49.835971  DOMAIN: 0000 read_resources bus 0 link: 0

  866 12:40:49.841330  PCI: 00:04.0 read_resources bus 1 link: 0

  867 12:40:49.847035  PCI: 00:04.0 read_resources bus 1 link: 0 done

  868 12:40:49.852234  PCI: 00:14.0 read_resources bus 0 link: 0

  869 12:40:49.856390  USB0 port 0 read_resources bus 0 link: 0

  870 12:40:49.865192  USB0 port 0 read_resources bus 0 link: 0 done

  871 12:40:49.869900  PCI: 00:14.0 read_resources bus 0 link: 0 done

  872 12:40:49.875697  PCI: 00:15.2 read_resources bus 2 link: 0

  873 12:40:49.881012  PCI: 00:15.2 read_resources bus 2 link: 0 done

  874 12:40:49.885347  PCI: 00:15.3 read_resources bus 3 link: 0

  875 12:40:49.890757  PCI: 00:15.3 read_resources bus 3 link: 0 done

  876 12:40:49.895713  PCI: 00:19.0 read_resources bus 4 link: 0

  877 12:40:49.900511  PCI: 00:19.0 read_resources bus 4 link: 0 done

  878 12:40:49.905685  PCI: 00:1c.0 read_resources bus 1 link: 0

  879 12:40:49.911215  PCI: 00:1c.0 read_resources bus 1 link: 0 done

  880 12:40:49.916412  PCI: 00:1e.2 read_resources bus 5 link: 0

  881 12:40:49.921604  PCI: 00:1e.2 read_resources bus 5 link: 0 done

  882 12:40:49.925739  PCI: 00:1f.0 read_resources bus 0 link: 0

  883 12:40:49.931221  PCI: 00:1f.0 read_resources bus 0 link: 0 done

  884 12:40:49.937184  DOMAIN: 0000 read_resources bus 0 link: 0 done

  885 12:40:49.942606  Root Device read_resources bus 0 link: 0 done

  886 12:40:49.945119  Done reading resources.

  887 12:40:49.950583  Show resources in subtree (Root Device)...After reading.

  888 12:40:49.954439   Root Device child on link 0 CPU_CLUSTER: 0

  889 12:40:49.958835    CPU_CLUSTER: 0 child on link 0 APIC: 00

  890 12:40:49.960173     APIC: 00

  891 12:40:49.961148     APIC: 02

  892 12:40:49.966329    DOMAIN: 0000 child on link 0 PCI: 00:00.0

  893 12:40:49.975072    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  894 12:40:49.984908    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

  895 12:40:49.986867     PCI: 00:00.0

  896 12:40:49.996296     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

  897 12:40:50.005788     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

  898 12:40:50.015289     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

  899 12:40:50.024170     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

  900 12:40:50.033409     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

  901 12:40:50.042600     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

  902 12:40:50.052531     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

  903 12:40:50.061433     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

  904 12:40:50.071047     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

  905 12:40:50.080823     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

  906 12:40:50.089575     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

  907 12:40:50.098387     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

  908 12:40:50.107898     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

  909 12:40:50.118446     PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d

  910 12:40:50.127049     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

  911 12:40:50.136052     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

  912 12:40:50.138435     PCI: 00:02.0

  913 12:40:50.148046     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

  914 12:40:50.158358     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

  915 12:40:50.166379     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

  916 12:40:50.171025     PCI: 00:04.0 child on link 0 GENERIC: 0.0

  917 12:40:50.181606     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

  918 12:40:50.182694      GENERIC: 0.0

  919 12:40:50.184914     PCI: 00:08.0

  920 12:40:50.194632     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  921 12:40:50.196003     PCI: 00:12.0

  922 12:40:50.207114     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  923 12:40:50.210604     PCI: 00:14.0 child on link 0 USB0 port 0

  924 12:40:50.220692     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

  925 12:40:50.224915      USB0 port 0 child on link 0 USB2 port 0

  926 12:40:50.227304       USB2 port 0

  927 12:40:50.228439       USB2 port 1

  928 12:40:50.230244       USB2 port 2

  929 12:40:50.231618       USB2 port 3

  930 12:40:50.234135       USB2 port 5

  931 12:40:50.235688       USB2 port 6

  932 12:40:50.237287       USB2 port 9

  933 12:40:50.239935       USB3 port 0

  934 12:40:50.240607       USB3 port 1

  935 12:40:50.242972       USB3 port 2

  936 12:40:50.243956       USB3 port 3

  937 12:40:50.245686       USB3 port 4

  938 12:40:50.247676       USB2 port 4

  939 12:40:50.249982       USB3 port 5

  940 12:40:50.251096     PCI: 00:14.2

  941 12:40:50.261272     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

  942 12:40:50.271645     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

  943 12:40:50.272627     PCI: 00:14.3

  944 12:40:50.283016     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

  945 12:40:50.284586     PCI: 00:14.5

  946 12:40:50.294071     PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  947 12:40:50.295751     PCI: 00:15.0

  948 12:40:50.300359     PCI: 00:15.2 child on link 0 I2C: 02:4a

  949 12:40:50.309849     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  950 12:40:50.311667      I2C: 02:4a

  951 12:40:50.316476     PCI: 00:15.3 child on link 0 I2C: 03:4a

  952 12:40:50.326223     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  953 12:40:50.327348      I2C: 03:4a

  954 12:40:50.328575     PCI: 00:16.0

  955 12:40:50.338595     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  956 12:40:50.343019     PCI: 00:19.0 child on link 0 I2C: 04:1a

  957 12:40:50.352993     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  958 12:40:50.354693      I2C: 04:1a

  959 12:40:50.356166     PCI: 00:1a.0

  960 12:40:50.367025     PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  961 12:40:50.371178     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

  962 12:40:50.379192     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

  963 12:40:50.389777     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

  964 12:40:50.398035     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

  965 12:40:50.400544      PCI: 01:00.0

  966 12:40:50.408513      PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10

  967 12:40:50.419498      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

  968 12:40:50.428608      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20

  969 12:40:50.430776     PCI: 00:1e.0

  970 12:40:50.441527     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

  971 12:40:50.451670     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

  972 12:40:50.455188     PCI: 00:1e.2 child on link 0 SPI: 00

  973 12:40:50.464854     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  974 12:40:50.466487      SPI: 00

  975 12:40:50.470628     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

  976 12:40:50.479428     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

  977 12:40:50.487995     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

  978 12:40:50.489902      PNP: 0c09.0

  979 12:40:50.498963      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

  980 12:40:50.500403     PCI: 00:1f.3

  981 12:40:50.510253     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

  982 12:40:50.521073     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

  983 12:40:50.522025     PCI: 00:1f.4

  984 12:40:50.531259     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

  985 12:40:50.540987     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

  986 12:40:50.542595     PCI: 00:1f.5

  987 12:40:50.551440     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

  988 12:40:50.559250  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

  989 12:40:50.564975   PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff

  990 12:40:50.568573    PCI: 01:00.0 10 *  [0x0 - 0xff] io

  991 12:40:50.575140   PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done

  992 12:40:50.581629   PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

  993 12:40:50.585178    PCI: 01:00.0 20 *  [0x0 - 0x3fff] mem

  994 12:40:50.589132    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

  995 12:40:50.596439   PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

  996 12:40:50.603911   PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

  997 12:40:50.612124   PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

  998 12:40:50.619138  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

  999 12:40:50.624888  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1000 12:40:50.633243   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1001 12:40:50.639961   update_constraints: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1002 12:40:50.647772   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1003 12:40:50.655172   update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1004 12:40:50.658264   DOMAIN: 0000: Resource ranges:

 1005 12:40:50.661717   * Base: 1000, Size: 800, Tag: 100

 1006 12:40:50.666282   * Base: 1900, Size: d6a0, Tag: 100

 1007 12:40:50.669460   * Base: efc0, Size: 1040, Tag: 100

 1008 12:40:50.674778    PCI: 00:1c.0 1c *  [0x2000 - 0x2fff] limit: 2fff io

 1009 12:40:50.679631    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1010 12:40:50.686219  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1011 12:40:50.693320  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1012 12:40:50.701042   update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1013 12:40:50.708759   update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)

 1014 12:40:50.716129   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1015 12:40:50.723927   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1016 12:40:50.731954   update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed)

 1017 12:40:50.739026   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1018 12:40:50.746377   update_constraints: PCI: 00:00.0 06 base fe000000 limit fe00ffff mem (fixed)

 1019 12:40:50.754398   update_constraints: PCI: 00:00.0 07 base fed90000 limit fed90fff mem (fixed)

 1020 12:40:50.762246   update_constraints: PCI: 00:00.0 08 base fed91000 limit fed91fff mem (fixed)

 1021 12:40:50.770859   update_constraints: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1022 12:40:50.777454   update_constraints: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1023 12:40:50.785476   update_constraints: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1024 12:40:50.792681   update_constraints: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1025 12:40:50.801050   update_constraints: PCI: 00:00.0 0d base 100000000 limit 15e7fffff mem (fixed)

 1026 12:40:50.808343   update_constraints: PCI: 00:00.0 0e base 000a0000 limit 000bffff mem (fixed)

 1027 12:40:50.816218   update_constraints: PCI: 00:00.0 0f base 000c0000 limit 000fffff mem (fixed)

 1028 12:40:50.824054   update_constraints: PCI: 00:1e.0 10 base fe032000 limit fe032fff mem (fixed)

 1029 12:40:50.826706   DOMAIN: 0000: Resource ranges:

 1030 12:40:50.831818   * Base: 9f800000, Size: 40800000, Tag: 200

 1031 12:40:50.835427   * Base: f0000000, Size: c000000, Tag: 200

 1032 12:40:50.839960   * Base: fc001000, Size: 1fff000, Tag: 200

 1033 12:40:50.843737   * Base: fe010000, Size: 22000, Tag: 200

 1034 12:40:50.847994   * Base: fe033000, Size: cdd000, Tag: 200

 1035 12:40:50.852305   * Base: fed18000, Size: 68000, Tag: 200

 1036 12:40:50.856541   * Base: fed84000, Size: c000, Tag: 200

 1037 12:40:50.860492   * Base: fed92000, Size: e000, Tag: 200

 1038 12:40:50.864372   * Base: feda2000, Size: 125e000, Tag: 200

 1039 12:40:50.869700   * Base: 15e800000, Size: 7ea1800000, Tag: 100200

 1040 12:40:50.876329    PCI: 00:02.0 18 *  [0xa0000000 - 0xafffffff] limit: afffffff prefmem

 1041 12:40:50.882966    PCI: 00:02.0 10 *  [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem

 1042 12:40:50.889665    PCI: 00:1c.0 20 *  [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem

 1043 12:40:50.895779    PCI: 00:1f.3 20 *  [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem

 1044 12:40:50.902602    PCI: 00:14.0 10 *  [0x9fa00000 - 0x9fa0ffff] limit: 9fa0ffff mem

 1045 12:40:50.909294    PCI: 00:04.0 10 *  [0x9fa10000 - 0x9fa17fff] limit: 9fa17fff mem

 1046 12:40:50.916040    PCI: 00:14.3 10 *  [0x9fa18000 - 0x9fa1bfff] limit: 9fa1bfff mem

 1047 12:40:50.922995    PCI: 00:1f.3 10 *  [0x9fa1c000 - 0x9fa1ffff] limit: 9fa1ffff mem

 1048 12:40:50.929295    PCI: 00:14.2 10 *  [0x9fa20000 - 0x9fa21fff] limit: 9fa21fff mem

 1049 12:40:50.935763    PCI: 00:08.0 10 *  [0x9fa22000 - 0x9fa22fff] limit: 9fa22fff mem

 1050 12:40:50.942643    PCI: 00:12.0 10 *  [0x9fa23000 - 0x9fa23fff] limit: 9fa23fff mem

 1051 12:40:50.948679    PCI: 00:14.2 18 *  [0x9fa24000 - 0x9fa24fff] limit: 9fa24fff mem

 1052 12:40:50.955526    PCI: 00:14.5 10 *  [0x9fa25000 - 0x9fa25fff] limit: 9fa25fff mem

 1053 12:40:50.962599    PCI: 00:15.2 10 *  [0x9fa26000 - 0x9fa26fff] limit: 9fa26fff mem

 1054 12:40:50.968976    PCI: 00:15.3 10 *  [0x9fa27000 - 0x9fa27fff] limit: 9fa27fff mem

 1055 12:40:50.975416    PCI: 00:16.0 10 *  [0x9fa28000 - 0x9fa28fff] limit: 9fa28fff mem

 1056 12:40:50.981994    PCI: 00:19.0 10 *  [0x9fa29000 - 0x9fa29fff] limit: 9fa29fff mem

 1057 12:40:50.988790    PCI: 00:1a.0 10 *  [0x9fa2a000 - 0x9fa2afff] limit: 9fa2afff mem

 1058 12:40:50.995456    PCI: 00:1e.0 18 *  [0x9fa2b000 - 0x9fa2bfff] limit: 9fa2bfff mem

 1059 12:40:51.002054    PCI: 00:1e.2 10 *  [0x9fa2c000 - 0x9fa2cfff] limit: 9fa2cfff mem

 1060 12:40:51.008308    PCI: 00:1f.5 10 *  [0x9fa2d000 - 0x9fa2dfff] limit: 9fa2dfff mem

 1061 12:40:51.015756    PCI: 00:1f.4 10 *  [0x9fa2e000 - 0x9fa2e0ff] limit: 9fa2e0ff mem

 1062 12:40:51.022466  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1063 12:40:51.029112  PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff

 1064 12:40:51.032742   PCI: 00:1c.0: Resource ranges:

 1065 12:40:51.035946   * Base: 2000, Size: 1000, Tag: 100

 1066 12:40:51.041082    PCI: 01:00.0 10 *  [0x2000 - 0x20ff] limit: 20ff io

 1067 12:40:51.048968  PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done

 1068 12:40:51.056630  PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff

 1069 12:40:51.060319   PCI: 00:1c.0: Resource ranges:

 1070 12:40:51.063983   * Base: 9f800000, Size: 100000, Tag: 200

 1071 12:40:51.070607    PCI: 01:00.0 20 *  [0x9f800000 - 0x9f803fff] limit: 9f803fff mem

 1072 12:40:51.077502    PCI: 01:00.0 18 *  [0x9f804000 - 0x9f804fff] limit: 9f804fff mem

 1073 12:40:51.085902  PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done

 1074 12:40:51.093367  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1075 12:40:51.097504  Root Device assign_resources, bus 0 link: 0

 1076 12:40:51.101825  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1077 12:40:51.111180  PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64

 1078 12:40:51.118785  PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64

 1079 12:40:51.127152  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1080 12:40:51.134632  PCI: 00:04.0 10 <- [0x009fa10000 - 0x009fa17fff] size 0x00008000 gran 0x0f mem64

 1081 12:40:51.139750  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1082 12:40:51.144348  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1083 12:40:51.153050  PCI: 00:08.0 10 <- [0x009fa22000 - 0x009fa22fff] size 0x00001000 gran 0x0c mem64

 1084 12:40:51.161150  PCI: 00:12.0 10 <- [0x009fa23000 - 0x009fa23fff] size 0x00001000 gran 0x0c mem64

 1085 12:40:51.169045  PCI: 00:14.0 10 <- [0x009fa00000 - 0x009fa0ffff] size 0x00010000 gran 0x10 mem64

 1086 12:40:51.174054  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1087 12:40:51.178401  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1088 12:40:51.186490  PCI: 00:14.2 10 <- [0x009fa20000 - 0x009fa21fff] size 0x00002000 gran 0x0d mem64

 1089 12:40:51.194798  PCI: 00:14.2 18 <- [0x009fa24000 - 0x009fa24fff] size 0x00001000 gran 0x0c mem64

 1090 12:40:51.202972  PCI: 00:14.3 10 <- [0x009fa18000 - 0x009fa1bfff] size 0x00004000 gran 0x0e mem64

 1091 12:40:51.211412  PCI: 00:14.5 10 <- [0x009fa25000 - 0x009fa25fff] size 0x00001000 gran 0x0c mem64

 1092 12:40:51.219517  PCI: 00:15.2 10 <- [0x009fa26000 - 0x009fa26fff] size 0x00001000 gran 0x0c mem64

 1093 12:40:51.224236  PCI: 00:15.2 assign_resources, bus 2 link: 0

 1094 12:40:51.228310  PCI: 00:15.2 assign_resources, bus 2 link: 0

 1095 12:40:51.237145  PCI: 00:15.3 10 <- [0x009fa27000 - 0x009fa27fff] size 0x00001000 gran 0x0c mem64

 1096 12:40:51.241437  PCI: 00:15.3 assign_resources, bus 3 link: 0

 1097 12:40:51.246523  PCI: 00:15.3 assign_resources, bus 3 link: 0

 1098 12:40:51.255168  PCI: 00:16.0 10 <- [0x009fa28000 - 0x009fa28fff] size 0x00001000 gran 0x0c mem64

 1099 12:40:51.262986  PCI: 00:19.0 10 <- [0x009fa29000 - 0x009fa29fff] size 0x00001000 gran 0x0c mem64

 1100 12:40:51.267350  PCI: 00:19.0 assign_resources, bus 4 link: 0

 1101 12:40:51.272388  PCI: 00:19.0 assign_resources, bus 4 link: 0

 1102 12:40:51.280491  PCI: 00:1a.0 10 <- [0x009fa2a000 - 0x009fa2afff] size 0x00001000 gran 0x0c mem64

 1103 12:40:51.288722  PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io

 1104 12:40:51.298858  PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1105 12:40:51.307525  PCI: 00:1c.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 01 mem

 1106 12:40:51.312079  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1107 12:40:51.320324  PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io

 1108 12:40:51.327589  PCI: 01:00.0 18 <- [0x009f804000 - 0x009f804fff] size 0x00001000 gran 0x0c mem64

 1109 12:40:51.335886  PCI: 01:00.0 20 <- [0x009f800000 - 0x009f803fff] size 0x00004000 gran 0x0e mem64

 1110 12:40:51.340976  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1111 12:40:51.349006  PCI: 00:1e.0 18 <- [0x009fa2b000 - 0x009fa2bfff] size 0x00001000 gran 0x0c mem64

 1112 12:40:51.357443  PCI: 00:1e.2 10 <- [0x009fa2c000 - 0x009fa2cfff] size 0x00001000 gran 0x0c mem64

 1113 12:40:51.362006  PCI: 00:1e.2 assign_resources, bus 5 link: 0

 1114 12:40:51.366758  PCI: 00:1e.2 assign_resources, bus 5 link: 0

 1115 12:40:51.371071  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1116 12:40:51.376135  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1117 12:40:51.380924  LPC: Trying to open IO window from 800 size 1ff

 1118 12:40:51.389434  PCI: 00:1f.3 10 <- [0x009fa1c000 - 0x009fa1ffff] size 0x00004000 gran 0x0e mem64

 1119 12:40:51.397441  PCI: 00:1f.3 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 mem64

 1120 12:40:51.405808  PCI: 00:1f.4 10 <- [0x009fa2e000 - 0x009fa2e0ff] size 0x00000100 gran 0x08 mem64

 1121 12:40:51.413853  PCI: 00:1f.5 10 <- [0x009fa2d000 - 0x009fa2dfff] size 0x00001000 gran 0x0c mem

 1122 12:40:51.418728  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1123 12:40:51.423287  Root Device assign_resources, bus 0 link: 0

 1124 12:40:51.425437  Done setting resources.

 1125 12:40:51.432240  Show resources in subtree (Root Device)...After assigning values.

 1126 12:40:51.436570   Root Device child on link 0 CPU_CLUSTER: 0

 1127 12:40:51.440768    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1128 12:40:51.441999     APIC: 00

 1129 12:40:51.443336     APIC: 02

 1130 12:40:51.448007    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1131 12:40:51.457256    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1132 12:40:51.467190    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1133 12:40:51.468564     PCI: 00:00.0

 1134 12:40:51.478892     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1135 12:40:51.487939     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1136 12:40:51.496613     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1137 12:40:51.505678     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1138 12:40:51.515889     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1139 12:40:51.524852     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1140 12:40:51.534267     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1141 12:40:51.543393     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1142 12:40:51.553240     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1143 12:40:51.562152     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1144 12:40:51.571523     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1145 12:40:51.581007     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1146 12:40:51.590304     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1147 12:40:51.600502     PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1148 12:40:51.609505     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1149 12:40:51.618133     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1150 12:40:51.620357     PCI: 00:02.0

 1151 12:40:51.630967     PCI: 00:02.0 resource base b0000000 size 1000000 align 24 gran 24 limit b0ffffff flags 60000201 index 10

 1152 12:40:51.641485     PCI: 00:02.0 resource base a0000000 size 10000000 align 28 gran 28 limit afffffff flags 60001201 index 18

 1153 12:40:51.650506     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1154 12:40:51.654940     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1155 12:40:51.665102     PCI: 00:04.0 resource base 9fa10000 size 8000 align 15 gran 15 limit 9fa17fff flags 60000201 index 10

 1156 12:40:51.667205      GENERIC: 0.0

 1157 12:40:51.668609     PCI: 00:08.0

 1158 12:40:51.678897     PCI: 00:08.0 resource base 9fa22000 size 1000 align 12 gran 12 limit 9fa22fff flags 60000201 index 10

 1159 12:40:51.681186     PCI: 00:12.0

 1160 12:40:51.691010     PCI: 00:12.0 resource base 9fa23000 size 1000 align 12 gran 12 limit 9fa23fff flags 60000201 index 10

 1161 12:40:51.695363     PCI: 00:14.0 child on link 0 USB0 port 0

 1162 12:40:51.705606     PCI: 00:14.0 resource base 9fa00000 size 10000 align 16 gran 16 limit 9fa0ffff flags 60000201 index 10

 1163 12:40:51.710652      USB0 port 0 child on link 0 USB2 port 0

 1164 12:40:51.712435       USB2 port 0

 1165 12:40:51.713840       USB2 port 1

 1166 12:40:51.715272       USB2 port 2

 1167 12:40:51.717576       USB2 port 3

 1168 12:40:51.719474       USB2 port 5

 1169 12:40:51.720932       USB2 port 6

 1170 12:40:51.722654       USB2 port 9

 1171 12:40:51.724135       USB3 port 0

 1172 12:40:51.726017       USB3 port 1

 1173 12:40:51.728529       USB3 port 2

 1174 12:40:51.729334       USB3 port 3

 1175 12:40:51.731999       USB3 port 4

 1176 12:40:51.733095       USB2 port 4

 1177 12:40:51.734698       USB3 port 5

 1178 12:40:51.736736     PCI: 00:14.2

 1179 12:40:51.746912     PCI: 00:14.2 resource base 9fa20000 size 2000 align 13 gran 13 limit 9fa21fff flags 60000201 index 10

 1180 12:40:51.757325     PCI: 00:14.2 resource base 9fa24000 size 1000 align 12 gran 12 limit 9fa24fff flags 60000201 index 18

 1181 12:40:51.759444     PCI: 00:14.3

 1182 12:40:51.769235     PCI: 00:14.3 resource base 9fa18000 size 4000 align 14 gran 14 limit 9fa1bfff flags 60000201 index 10

 1183 12:40:51.770488     PCI: 00:14.5

 1184 12:40:51.781347     PCI: 00:14.5 resource base 9fa25000 size 1000 align 12 gran 12 limit 9fa25fff flags 60000201 index 10

 1185 12:40:51.782790     PCI: 00:15.0

 1186 12:40:51.787029     PCI: 00:15.2 child on link 0 I2C: 02:4a

 1187 12:40:51.797712     PCI: 00:15.2 resource base 9fa26000 size 1000 align 12 gran 12 limit 9fa26fff flags 60000201 index 10

 1188 12:40:51.799181      I2C: 02:4a

 1189 12:40:51.802866     PCI: 00:15.3 child on link 0 I2C: 03:4a

 1190 12:40:51.813262     PCI: 00:15.3 resource base 9fa27000 size 1000 align 12 gran 12 limit 9fa27fff flags 60000201 index 10

 1191 12:40:51.814463      I2C: 03:4a

 1192 12:40:51.816792     PCI: 00:16.0

 1193 12:40:51.826687     PCI: 00:16.0 resource base 9fa28000 size 1000 align 12 gran 12 limit 9fa28fff flags 60000201 index 10

 1194 12:40:51.831117     PCI: 00:19.0 child on link 0 I2C: 04:1a

 1195 12:40:51.841334     PCI: 00:19.0 resource base 9fa29000 size 1000 align 12 gran 12 limit 9fa29fff flags 60000201 index 10

 1196 12:40:51.843066      I2C: 04:1a

 1197 12:40:51.844650     PCI: 00:1a.0

 1198 12:40:51.855224     PCI: 00:1a.0 resource base 9fa2a000 size 1000 align 12 gran 12 limit 9fa2afff flags 60000201 index 10

 1199 12:40:51.859789     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1200 12:40:51.869338     PCI: 00:1c.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c

 1201 12:40:51.880468     PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1202 12:40:51.891969     PCI: 00:1c.0 resource base 9f800000 size 100000 align 20 gran 20 limit 9f8fffff flags 60080202 index 20

 1203 12:40:51.893010      PCI: 01:00.0

 1204 12:40:51.902442      PCI: 01:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10

 1205 12:40:51.913177      PCI: 01:00.0 resource base 9f804000 size 1000 align 12 gran 12 limit 9f804fff flags 60000201 index 18

 1206 12:40:51.922973      PCI: 01:00.0 resource base 9f800000 size 4000 align 14 gran 14 limit 9f803fff flags 60000201 index 20

 1207 12:40:51.925158     PCI: 00:1e.0

 1208 12:40:51.936023     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1209 12:40:51.945727     PCI: 00:1e.0 resource base 9fa2b000 size 1000 align 12 gran 12 limit 9fa2bfff flags 60000201 index 18

 1210 12:40:51.950864     PCI: 00:1e.2 child on link 0 SPI: 00

 1211 12:40:51.960632     PCI: 00:1e.2 resource base 9fa2c000 size 1000 align 12 gran 12 limit 9fa2cfff flags 60000201 index 10

 1212 12:40:51.961386      SPI: 00

 1213 12:40:51.965820     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1214 12:40:51.974993     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1215 12:40:51.983651     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1216 12:40:51.985510      PNP: 0c09.0

 1217 12:40:51.994590      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1218 12:40:51.996086     PCI: 00:1f.3

 1219 12:40:52.005911     PCI: 00:1f.3 resource base 9fa1c000 size 4000 align 14 gran 14 limit 9fa1ffff flags 60000201 index 10

 1220 12:40:52.016265     PCI: 00:1f.3 resource base 9f900000 size 100000 align 20 gran 20 limit 9f9fffff flags 60000201 index 20

 1221 12:40:52.017828     PCI: 00:1f.4

 1222 12:40:52.027066     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1223 12:40:52.037352     PCI: 00:1f.4 resource base 9fa2e000 size 100 align 12 gran 8 limit 9fa2e0ff flags 60000201 index 10

 1224 12:40:52.039334     PCI: 00:1f.5

 1225 12:40:52.049164     PCI: 00:1f.5 resource base 9fa2d000 size 1000 align 12 gran 12 limit 9fa2dfff flags 60000200 index 10

 1226 12:40:52.052093  Done allocating resources.

 1227 12:40:52.058450  BS: BS_DEV_RESOURCES run times (exec / console): 30 / 2220 ms

 1228 12:40:52.061136  Enabling resources...

 1229 12:40:52.064805  PCI: 00:00.0 subsystem <- 8086/9b71

 1230 12:40:52.067579  PCI: 00:00.0 cmd <- 06

 1231 12:40:52.072127  PCI: 00:02.0 subsystem <- 8086/9baa

 1232 12:40:52.073622  PCI: 00:02.0 cmd <- 03

 1233 12:40:52.077353  PCI: 00:04.0 subsystem <- 8086/1903

 1234 12:40:52.079739  PCI: 00:04.0 cmd <- 02

 1235 12:40:52.083256  PCI: 00:08.0 cmd <- 06

 1236 12:40:52.086228  PCI: 00:12.0 subsystem <- 8086/02f9

 1237 12:40:52.089018  PCI: 00:12.0 cmd <- 02

 1238 12:40:52.092707  PCI: 00:14.0 subsystem <- 8086/02ed

 1239 12:40:52.094821  PCI: 00:14.0 cmd <- 02

 1240 12:40:52.097516  PCI: 00:14.2 cmd <- 02

 1241 12:40:52.101146  PCI: 00:14.3 subsystem <- 8086/02f0

 1242 12:40:52.103638  PCI: 00:14.3 cmd <- 02

 1243 12:40:52.107445  PCI: 00:14.5 subsystem <- 8086/02f5

 1244 12:40:52.109983  PCI: 00:14.5 cmd <- 06

 1245 12:40:52.113885  PCI: 00:15.2 subsystem <- 8086/02ea

 1246 12:40:52.116277  PCI: 00:15.2 cmd <- 02

 1247 12:40:52.120188  PCI: 00:15.3 subsystem <- 8086/02eb

 1248 12:40:52.122944  PCI: 00:15.3 cmd <- 02

 1249 12:40:52.126278  PCI: 00:16.0 subsystem <- 8086/02e0

 1250 12:40:52.128618  PCI: 00:16.0 cmd <- 02

 1251 12:40:52.133107  PCI: 00:19.0 subsystem <- 8086/02c5

 1252 12:40:52.135193  PCI: 00:19.0 cmd <- 02

 1253 12:40:52.139033  PCI: 00:1a.0 subsystem <- 8086/02c4

 1254 12:40:52.141017  PCI: 00:1a.0 cmd <- 06

 1255 12:40:52.144933  PCI: 00:1c.0 bridge ctrl <- 0013

 1256 12:40:52.148782  PCI: 00:1c.0 subsystem <- 8086/02be

 1257 12:40:52.150954  PCI: 00:1c.0 cmd <- 07

 1258 12:40:52.154829  PCI: 00:1e.0 subsystem <- 8086/02a8

 1259 12:40:52.157030  PCI: 00:1e.0 cmd <- 06

 1260 12:40:52.161508  PCI: 00:1e.2 subsystem <- 8086/02aa

 1261 12:40:52.163119  PCI: 00:1e.2 cmd <- 06

 1262 12:40:52.167439  PCI: 00:1f.0 subsystem <- 8086/0285

 1263 12:40:52.169474  PCI: 00:1f.0 cmd <- 407

 1264 12:40:52.174031  PCI: 00:1f.3 subsystem <- 8086/02c8

 1265 12:40:52.176157  PCI: 00:1f.3 cmd <- 02

 1266 12:40:52.180137  PCI: 00:1f.4 subsystem <- 8086/02a3

 1267 12:40:52.182392  PCI: 00:1f.4 cmd <- 03

 1268 12:40:52.186037  PCI: 00:1f.5 subsystem <- 8086/02a4

 1269 12:40:52.188507  PCI: 00:1f.5 cmd <- 406

 1270 12:40:52.193608  PCI: 01:00.0 cmd <- 03

 1271 12:40:52.195161  done.

 1272 12:40:52.201322  BS: BS_DEV_ENABLE run times (exec / console): 11 / 126 ms

 1273 12:40:52.203379  Initializing devices...

 1274 12:40:52.205561  Root Device init

 1275 12:40:52.210080  Chrome EC: Set SMI mask to 0x0000000000000000

 1276 12:40:52.216236  Chrome EC: clear events_b mask to 0x0000000000000000

 1277 12:40:52.221762  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004

 1278 12:40:52.227781  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004

 1279 12:40:52.233902  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000000080004

 1280 12:40:52.239069  Chrome EC: Set WAKE mask to 0x0000000000000000

 1281 12:40:52.243062  Root Device init finished in 33 msecs

 1282 12:40:52.246723  PCI: 00:00.0 init

 1283 12:40:52.249485  CPU TDP = 15 Watts

 1284 12:40:52.252287  CPU PL1 = 15 Watts

 1285 12:40:52.253990  CPU PL2 = 35 Watts

 1286 12:40:52.256621  CPU PsysPL2 = 65 Watts

 1287 12:40:52.259773  PCI: 00:00.0 init finished in 9 msecs

 1288 12:40:52.262124  PCI: 00:02.0 init

 1289 12:40:52.264656  GMA: Found VBT in CBFS

 1290 12:40:52.267454  GMA: Found valid VBT in CBFS

 1291 12:40:52.271340  PCI: 00:02.0 init finished in 5 msecs

 1292 12:40:52.274002  PCI: 00:08.0 init

 1293 12:40:52.278381  PCI: 00:08.0 init finished in 0 msecs

 1294 12:40:52.280693  PCI: 00:12.0 init

 1295 12:40:52.283560  PCI: 00:12.0 init finished in 0 msecs

 1296 12:40:52.286015  PCI: 00:14.0 init

 1297 12:40:52.289778  PCI: 00:14.0 init finished in 0 msecs

 1298 12:40:52.292197  PCI: 00:14.2 init

 1299 12:40:52.295898  PCI: 00:14.2 init finished in 0 msecs

 1300 12:40:52.297819  PCI: 00:14.3 init

 1301 12:40:52.302302  PCI: 00:14.3 init finished in 0 msecs

 1302 12:40:52.305212  PCI: 00:15.2 init

 1303 12:40:52.308531  I2C bus 2 version 0x3132322a

 1304 12:40:52.312247  DW I2C bus 2 at 0x9fa26000 (400 KHz)

 1305 12:40:52.315465  PCI: 00:15.2 init finished in 6 msecs

 1306 12:40:52.317434  PCI: 00:15.3 init

 1307 12:40:52.321053  I2C bus 3 version 0x3132322a

 1308 12:40:52.324562  DW I2C bus 3 at 0x9fa27000 (400 KHz)

 1309 12:40:52.328610  PCI: 00:15.3 init finished in 6 msecs

 1310 12:40:52.331090  PCI: 00:16.0 init

 1311 12:40:52.335263  PCI: 00:16.0 init finished in 0 msecs

 1312 12:40:52.336594  PCI: 00:19.0 init

 1313 12:40:52.339926  I2C bus 4 version 0x3132322a

 1314 12:40:52.342934  DW I2C bus 4 at 0x9fa29000 (400 KHz)

 1315 12:40:52.346887  PCI: 00:19.0 init finished in 6 msecs

 1316 12:40:52.349825  PCI: 00:1a.0 init

 1317 12:40:52.353136  PCI: 00:1a.0 init finished in 0 msecs

 1318 12:40:52.356090  PCI: 00:1c.0 init

 1319 12:40:52.358475  Initializing PCH PCIe bridge.

 1320 12:40:52.362442  PCI: 00:1c.0 init finished in 3 msecs

 1321 12:40:52.365122  PCI: 00:1f.0 init

 1322 12:40:52.369783  IOAPIC: Initializing IOAPIC at 0xfec00000

 1323 12:40:52.374164  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1324 12:40:52.375716  IOAPIC: ID = 0x02

 1325 12:40:52.378594  IOAPIC: Dumping registers

 1326 12:40:52.382074    reg 0x0000: 0x02000000

 1327 12:40:52.384717    reg 0x0001: 0x00770020

 1328 12:40:52.386649    reg 0x0002: 0x00000000

 1329 12:40:52.390065  PCI: 00:1f.0 init finished in 21 msecs

 1330 12:40:52.392948  PCI: 00:1f.4 init

 1331 12:40:52.396706  PCI: 00:1f.4 init finished in 0 msecs

 1332 12:40:52.407625  PCI: 01:00.0 init

 1333 12:40:52.411625  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1334 12:40:52.418911  Error: Could not locate 'ethernet_mac0' in VPD

 1335 12:40:52.425307  r8168: mac address not found in VPD, using default 00:e0:4c:00:c0:b0

 1336 12:40:52.430010  r8168: ignore invalid MAC address in cbfs

 1337 12:40:52.432646  r8168: Resetting NIC...done

 1338 12:40:52.436233  r8168: Programming MAC Address...done

 1339 12:40:52.438950  r8168: Customized LED 0x5af

 1340 12:40:52.443466  r8168: read back LED setting as 0x5af

 1341 12:40:52.446607  PCI: 01:00.0 init finished in 35 msecs

 1342 12:40:52.449273  PNP: 0c09.0 init

 1343 12:40:52.454404  Google Chrome EC uptime: 3043059.051 seconds

 1344 12:40:52.459175  Google Chrome AP resets since EC boot: 1165

 1345 12:40:52.463746  Google Chrome most recent AP reset causes:

 1346 12:40:52.467769  	3039620.958: 32768 shutdown: power failure

 1347 12:40:52.471985  	3039620.963: 32768 shutdown: power failure

 1348 12:40:52.475482  	3039621.264: 32775 shutdown: entering G3

 1349 12:40:52.480270  	3043043.932: 32774 shutdown: by console command

 1350 12:40:52.486324  Google Chrome EC reset flags at last EC boot: reset-pin

 1351 12:40:52.489741  PNP: 0c09.0 init finished in 36 msecs

 1352 12:40:52.491997  Devices initialized

 1353 12:40:52.495297  Show all devs... After init.

 1354 12:40:52.497730  Root Device: enabled 1

 1355 12:40:52.500431  CPU_CLUSTER: 0: enabled 1

 1356 12:40:52.502259  DOMAIN: 0000: enabled 1

 1357 12:40:52.505125  APIC: 00: enabled 1

 1358 12:40:52.507028  PCI: 00:00.0: enabled 1

 1359 12:40:52.509190  PCI: 00:02.0: enabled 1

 1360 12:40:52.511736  PCI: 00:04.0: enabled 1

 1361 12:40:52.514479  PCI: 00:05.0: enabled 0

 1362 12:40:52.516893  PCI: 00:12.0: enabled 1

 1363 12:40:52.518910  PCI: 00:12.5: enabled 0

 1364 12:40:52.522085  PCI: 00:12.6: enabled 0

 1365 12:40:52.524206  PCI: 00:14.0: enabled 1

 1366 12:40:52.526473  PCI: 00:14.1: enabled 0

 1367 12:40:52.528614  PCI: 00:14.3: enabled 1

 1368 12:40:52.531622  PCI: 00:14.5: enabled 1

 1369 12:40:52.534142  PCI: 00:15.0: enabled 0

 1370 12:40:52.535999  PCI: 00:15.1: enabled 0

 1371 12:40:52.538340  PCI: 00:15.2: enabled 1

 1372 12:40:52.541351  PCI: 00:15.3: enabled 1

 1373 12:40:52.543627  PCI: 00:16.0: enabled 1

 1374 12:40:52.546398  PCI: 00:16.1: enabled 0

 1375 12:40:52.548451  PCI: 00:16.2: enabled 0

 1376 12:40:52.551133  PCI: 00:16.3: enabled 0

 1377 12:40:52.553228  PCI: 00:16.4: enabled 0

 1378 12:40:52.555525  PCI: 00:16.5: enabled 0

 1379 12:40:52.558146  PCI: 00:17.0: enabled 0

 1380 12:40:52.560612  PCI: 00:19.0: enabled 1

 1381 12:40:52.563161  PCI: 00:19.1: enabled 0

 1382 12:40:52.565670  PCI: 00:19.2: enabled 0

 1383 12:40:52.567837  PCI: 00:1a.0: enabled 1

 1384 12:40:52.570618  PCI: 00:1c.0: enabled 0

 1385 12:40:52.572733  PCI: 00:1c.1: enabled 0

 1386 12:40:52.575359  PCI: 00:1c.2: enabled 0

 1387 12:40:52.577197  PCI: 00:1c.3: enabled 0

 1388 12:40:52.579770  PCI: 00:1c.4: enabled 0

 1389 12:40:52.582265  PCI: 00:1c.5: enabled 0

 1390 12:40:52.584576  PCI: 00:1c.0: enabled 1

 1391 12:40:52.587606  PCI: 00:1c.7: enabled 0

 1392 12:40:52.590363  PCI: 00:1d.0: enabled 1

 1393 12:40:52.591845  PCI: 00:1d.1: enabled 0

 1394 12:40:52.594247  PCI: 00:1d.2: enabled 1

 1395 12:40:52.596769  PCI: 00:1d.3: enabled 0

 1396 12:40:52.600268  PCI: 00:1d.4: enabled 0

 1397 12:40:52.601939  PCI: 00:1d.5: enabled 1

 1398 12:40:52.604184  PCI: 00:1e.0: enabled 1

 1399 12:40:52.607371  PCI: 00:1e.1: enabled 0

 1400 12:40:52.609970  PCI: 00:1e.2: enabled 1

 1401 12:40:52.611747  PCI: 00:1e.3: enabled 0

 1402 12:40:52.614375  PCI: 00:1f.0: enabled 1

 1403 12:40:52.617189  PCI: 00:1f.1: enabled 0

 1404 12:40:52.619039  PCI: 00:1f.2: enabled 0

 1405 12:40:52.621225  PCI: 00:1f.3: enabled 1

 1406 12:40:52.623698  PCI: 00:1f.4: enabled 1

 1407 12:40:52.626209  PCI: 00:1f.5: enabled 1

 1408 12:40:52.628861  PCI: 00:1f.6: enabled 0

 1409 12:40:52.630725  GENERIC: 0.0: enabled 1

 1410 12:40:52.633764  USB0 port 0: enabled 1

 1411 12:40:52.635390  I2C: 02:4a: enabled 1

 1412 12:40:52.638610  I2C: 03:4a: enabled 1

 1413 12:40:52.639989  I2C: 04:1a: enabled 1

 1414 12:40:52.642508  PCI: 01:00.0: enabled 1

 1415 12:40:52.644646  PCI: 00:00.0: enabled 1

 1416 12:40:52.647298  SPI: 00: enabled 1

 1417 12:40:52.649586  PNP: 0c09.0: enabled 1

 1418 12:40:52.651929  USB2 port 0: enabled 1

 1419 12:40:52.653991  USB2 port 1: enabled 1

 1420 12:40:52.656249  USB2 port 2: enabled 1

 1421 12:40:52.658958  USB2 port 3: enabled 1

 1422 12:40:52.660896  USB2 port 5: enabled 1

 1423 12:40:52.662863  USB2 port 6: enabled 0

 1424 12:40:52.665542  USB2 port 9: enabled 1

 1425 12:40:52.668476  USB3 port 0: enabled 1

 1426 12:40:52.670341  USB3 port 1: enabled 1

 1427 12:40:52.672437  USB3 port 2: enabled 1

 1428 12:40:52.675637  USB3 port 3: enabled 1

 1429 12:40:52.677536  USB3 port 4: enabled 1

 1430 12:40:52.680166  USB2 port 4: enabled 1

 1431 12:40:52.682286  USB3 port 5: enabled 1

 1432 12:40:52.683852  APIC: 02: enabled 1

 1433 12:40:52.686856  PCI: 00:08.0: enabled 1

 1434 12:40:52.688931  PCI: 00:14.2: enabled 1

 1435 12:40:52.694266  BS: BS_DEV_INIT run times (exec / console): 26 / 460 ms

 1436 12:40:52.696582  Disabling ACPI via APMC.

 1437 12:40:52.702692  APMC done.

 1438 12:40:52.707216  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1439 12:40:52.710911  ELOG: NV offset 0xaf0000 size 0x4000

 1440 12:40:52.719332  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1441 12:40:52.725030  ELOG: Event(17) added with size 13 at 2023-08-30 12:40:52 UTC

 1442 12:40:52.731482  ELOG: Event(92) added with size 9 at 2023-08-30 12:40:52 UTC

 1443 12:40:52.737833  ELOG: Event(16) added with size 11 at 2023-08-30 12:40:52 UTC

 1444 12:40:52.741409  Erasing flash addr af0000 + 4 KiB

 1445 12:40:52.796561  ELOG: Event(93) added with size 9 at 2023-08-30 12:40:52 UTC

 1446 12:40:52.802349  ELOG: Event(9E) added with size 10 at 2023-08-30 12:40:52 UTC

 1447 12:40:52.809283  ELOG: Event(9F) added with size 14 at 2023-08-30 12:40:52 UTC

 1448 12:40:52.814728  BS: BS_DEV_INIT exit times (exec / console): 53 / 58 ms

 1449 12:40:52.820963  ELOG: Event(A1) added with size 10 at 2023-08-30 12:40:52 UTC

 1450 12:40:52.828493  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1451 12:40:52.835107  ELOG: Event(A0) added with size 9 at 2023-08-30 12:40:52 UTC

 1452 12:40:52.839009  elog_add_boot_reason: Logged dev mode boot

 1453 12:40:52.845725  BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms

 1454 12:40:52.847335  Finalize devices...

 1455 12:40:52.848716  Devices finalized

 1456 12:40:52.855146  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1457 12:40:52.859706  FMAP: area RW_NVRAM found @ afa000 (20480 bytes)

 1458 12:40:52.865493  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1459 12:40:52.869473  ME: HFSTS1                  : 0x80030045

 1460 12:40:52.873751  ME: HFSTS2                  : 0x30280136

 1461 12:40:52.877649  ME: HFSTS3                  : 0x00000050

 1462 12:40:52.882101  ME: HFSTS4                  : 0x00004800

 1463 12:40:52.886349  ME: HFSTS5                  : 0x00000000

 1464 12:40:52.889981  ME: HFSTS6                  : 0x40400006

 1465 12:40:52.893414  ME: Manufacturing Mode      : NO

 1466 12:40:52.896589  ME: FW Partition Table      : OK

 1467 12:40:52.899509  ME: Bringup Loader Failure  : NO

 1468 12:40:52.902774  ME: Firmware Init Complete  : NO

 1469 12:40:52.906670  ME: Boot Options Present    : NO

 1470 12:40:52.909591  ME: Update In Progress      : NO

 1471 12:40:52.913544  ME: D0i3 Support            : YES

 1472 12:40:52.916850  ME: Low Power State Enabled : NO

 1473 12:40:52.920068  ME: CPU Replaced            : YES

 1474 12:40:52.922919  ME: CPU Replacement Valid   : YES

 1475 12:40:52.926488  ME: Current Working State   : 5

 1476 12:40:52.929765  ME: Current Operation State : 1

 1477 12:40:52.933524  ME: Current Operation Mode  : 3

 1478 12:40:52.936852  ME: Error Code              : 0

 1479 12:40:52.940157  ME: CPU Debug Disabled      : YES

 1480 12:40:52.942867  ME: TXT Support             : NO

 1481 12:40:52.948719  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms

 1482 12:40:52.954857  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1483 12:40:52.957945  CBFS: Locating 'fallback/dsdt.aml'

 1484 12:40:52.961537  CBFS: Found @ offset 636c0 size 32e0

 1485 12:40:52.966831  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1486 12:40:52.969971  CBFS: Locating 'fallback/slic'

 1487 12:40:52.975454  CBFS: 'fallback/slic' not found.

 1488 12:40:52.979499  ACPI: Writing ACPI tables at 99b31000.

 1489 12:40:52.980468  ACPI:    * FACS

 1490 12:40:52.982515  ACPI:    * DSDT

 1491 12:40:52.986292  Ramoops buffer: 0x100000@0x99a30000.

 1492 12:40:52.991052  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1493 12:40:52.995523  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1494 12:40:52.999242  Google Chrome EC: version:

 1495 12:40:53.002689  	ro: puff_v2.0.4638-67e4d7990

 1496 12:40:53.005150  	rw: puff_v2.0.4638-67e4d7990

 1497 12:40:53.007245    running image: 1

 1498 12:40:53.013788  PCI space above 4GB MMIO is at 0x15e800000, len = 0x7ea1800000

 1499 12:40:53.016716  ACPI:    * FADT

 1500 12:40:53.017607  SCI is IRQ9

 1501 12:40:53.021402  ACPI: added table 1/32, length now 40

 1502 12:40:53.023282  ACPI:     * SSDT

 1503 12:40:53.026914  Found 1 CPU(s) with 2 core(s) each.

 1504 12:40:53.031259  \_SB.PCI0.WFA3.WFA3: Intel WiFi PCI: 00:14.3

 1505 12:40:53.035341  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1506 12:40:53.039985  \_SB.PCI0.I2C2.PS17: Parade PS175 at I2C: 02:4a

 1507 12:40:53.044649  \_SB.PCI0.I2C3.RTD2: Realtek RTD2142 at I2C: 03:4a

 1508 12:40:53.050158  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 04:1a

 1509 12:40:53.055150  \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 01:00.0

 1510 12:40:53.059580  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1511 12:40:53.063929  EC returned error result code 3

 1512 12:40:53.067654  EC returned error result code 1

 1513 12:40:53.072108  PS2K: Bad resp from EC. Vivaldi disabled!

 1514 12:40:53.078070  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-A Front Left at USB2 port 0

 1515 12:40:53.084209  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-C Port Rear at USB2 port 1

 1516 12:40:53.090887  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-A Front Right at USB2 port 2

 1517 12:40:53.096923  \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Rear Right at USB2 port 3

 1518 12:40:53.103408  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Rear Left at USB2 port 5

 1519 12:40:53.108457  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1520 12:40:53.114750  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Front Left at USB3 port 0

 1521 12:40:53.121024  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Front Right at USB3 port 1

 1522 12:40:53.127549  \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Rear Right at USB3 port 2

 1523 12:40:53.133078  \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-C Rear at USB3 port 3

 1524 12:40:53.139140  \_SB.PCI0.XHCI.RHUB.SS05: USB3 Type-A Rear Left at USB3 port 4

 1525 12:40:53.146344  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-A Rear Middle at USB2 port 4

 1526 12:40:53.153230  \_SB.PCI0.XHCI.RHUB.SS06: USB3 Type-A Rear Middle at USB3 port 5

 1527 12:40:53.156075  ACPI: added table 2/32, length now 44

 1528 12:40:53.158052  ACPI:    * MCFG

 1529 12:40:53.161236  ACPI: added table 3/32, length now 48

 1530 12:40:53.163540  ACPI:    * TPM2

 1531 12:40:53.166422  TPM2 log created at 0x99a20000

 1532 12:40:53.169786  ACPI: added table 4/32, length now 52

 1533 12:40:53.171408  ACPI:    * MADT

 1534 12:40:53.173247  SCI is IRQ9

 1535 12:40:53.176901  ACPI: added table 5/32, length now 56

 1536 12:40:53.178591  current = 99b36070

 1537 12:40:53.180759  ACPI:    * DMAR

 1538 12:40:53.184346  ACPI: added table 6/32, length now 60

 1539 12:40:53.187914  ACPI: added table 7/32, length now 64

 1540 12:40:53.189710  ACPI:    * HPET

 1541 12:40:53.193311  ACPI: added table 8/32, length now 68

 1542 12:40:53.195020  ACPI: done.

 1543 12:40:53.197543  ACPI tables: 20912 bytes.

 1544 12:40:53.200627  smbios_write_tables: 99a1f000

 1545 12:40:53.204539  EC returned error result code 3

 1546 12:40:53.207570  Couldn't obtain OEM name from CBI

 1547 12:40:53.210362  Create SMBIOS type 17

 1548 12:40:53.213503  PCI: 00:00.0 (Intel Cannonlake)

 1549 12:40:53.216339  PCI: 00:14.3 (Intel WiFi)

 1550 12:40:53.219229  SMBIOS tables: 841 bytes.

 1551 12:40:53.222747  Writing table forward entry at 0x00000500

 1552 12:40:53.229888  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1629

 1553 12:40:53.233375  Writing coreboot table at 0x99b55000

 1554 12:40:53.238517   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1555 12:40:53.243125   1. 0000000000001000-000000000009ffff: RAM

 1556 12:40:53.247689   2. 00000000000a0000-00000000000fffff: RESERVED

 1557 12:40:53.252126   3. 0000000000100000-0000000099a1efff: RAM

 1558 12:40:53.259044   4. 0000000099a1f000-0000000099ba4fff: CONFIGURATION TABLES

 1559 12:40:53.262719   5. 0000000099ba5000-0000000099c0afff: RAMSTAGE

 1560 12:40:53.268714   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1561 12:40:53.273697   7. 000000009a000000-000000009f7fffff: RESERVED

 1562 12:40:53.278675   8. 00000000e0000000-00000000efffffff: RESERVED

 1563 12:40:53.283194   9. 00000000fc000000-00000000fc000fff: RESERVED

 1564 12:40:53.288125  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1565 12:40:53.293355  11. 00000000fed10000-00000000fed17fff: RESERVED

 1566 12:40:53.297618  12. 00000000fed80000-00000000fed83fff: RESERVED

 1567 12:40:53.303169  13. 00000000fed90000-00000000fed91fff: RESERVED

 1568 12:40:53.307395  14. 00000000feda0000-00000000feda1fff: RESERVED

 1569 12:40:53.311179  15. 0000000100000000-000000015e7fffff: RAM

 1570 12:40:53.314523  Graphics hand-off block not found

 1571 12:40:53.318493  FSP did not return a valid framebuffer

 1572 12:40:53.321378  Passing 4 GPIOs to payload:

 1573 12:40:53.326677              NAME |       PORT | POLARITY |     VALUE

 1574 12:40:53.332319               lid |  undefined |     high |      high

 1575 12:40:53.337342             power |  undefined |     high |       low

 1576 12:40:53.343164             oprom |  undefined |     high |       low

 1577 12:40:53.348366          EC in RW | 0x000000cb |     high |       low

 1578 12:40:53.348964  Board ID: 4

 1579 12:40:53.354665  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1580 12:40:53.360428  Wrote coreboot table at: 0x99b55000, 0x550 bytes, checksum df1c

 1581 12:40:53.363625  coreboot table: 1384 bytes.

 1582 12:40:53.367873  IMD ROOT    0. 0x99fff000 0x00001000

 1583 12:40:53.371096  IMD SMALL   1. 0x99ffe000 0x00001000

 1584 12:40:53.374421  FSP MEMORY  2. 0x99c4e000 0x003b0000

 1585 12:40:53.378214  CONSOLE     3. 0x99c2e000 0x00020000

 1586 12:40:53.381819  FMAP        4. 0x99c2d000 0x00000578

 1587 12:40:53.385918  TIME STAMP  5. 0x99c2c000 0x00000910

 1588 12:40:53.389275  VBOOT WORK  6. 0x99c18000 0x00014000

 1589 12:40:53.392644  MRC DATA    7. 0x99c16000 0x00001958

 1590 12:40:53.396385  ROMSTG STCK 8. 0x99c15000 0x00001000

 1591 12:40:53.401013  AFTER CAR   9. 0x99c0b000 0x0000a000

 1592 12:40:53.404132  RAMSTAGE   10. 0x99ba4000 0x00067000

 1593 12:40:53.407575  REFCODE    11. 0x99b6f000 0x00035000

 1594 12:40:53.411449  SMM BACKUP 12. 0x99b5f000 0x00010000

 1595 12:40:53.415350  4f444749   13. 0x99b5d000 0x00002000

 1596 12:40:53.419561  COREBOOT   14. 0x99b55000 0x00008000

 1597 12:40:53.422754  ACPI       15. 0x99b31000 0x00024000

 1598 12:40:53.426028  ACPI GNVS  16. 0x99b30000 0x00001000

 1599 12:40:53.429752  RAMOOPS    17. 0x99a30000 0x00100000

 1600 12:40:53.433739  TPM2 TCGLOG18. 0x99a20000 0x00010000

 1601 12:40:53.437879  SMBIOS     19. 0x99a1f000 0x00000800

 1602 12:40:53.439248  IMD small region:

 1603 12:40:53.443240    IMD ROOT    0. 0x99ffec00 0x00000400

 1604 12:40:53.447415    FSP RUNTIME 1. 0x99ffebe0 0x00000004

 1605 12:40:53.451042    POWER STATE 2. 0x99ffeba0 0x00000040

 1606 12:40:53.454606    ROMSTAGE    3. 0x99ffeb80 0x00000004

 1607 12:40:53.459211    MEM INFO    4. 0x99ffe9c0 0x000001b9

 1608 12:40:53.464430  BS: BS_WRITE_TABLES run times (exec / console): 9 / 500 ms

 1609 12:40:53.467838  MTRR: Physical address space:

 1610 12:40:53.473723  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1611 12:40:53.480501  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1612 12:40:53.486483  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1613 12:40:53.492534  0x000000009b000000 - 0x00000000a0000000 size 0x05000000 type 0

 1614 12:40:53.499282  0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1

 1615 12:40:53.505393  0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0

 1616 12:40:53.511081  0x0000000100000000 - 0x000000015e800000 size 0x5e800000 type 6

 1617 12:40:53.516133  MTRR: Fixed MSR 0x250 0x0606060606060606

 1618 12:40:53.519335  MTRR: Fixed MSR 0x258 0x0606060606060606

 1619 12:40:53.523397  MTRR: Fixed MSR 0x259 0x0000000000000000

 1620 12:40:53.527926  MTRR: Fixed MSR 0x268 0x0606060606060606

 1621 12:40:53.532091  MTRR: Fixed MSR 0x269 0x0606060606060606

 1622 12:40:53.535562  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1623 12:40:53.540164  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1624 12:40:53.543597  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1625 12:40:53.547607  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1626 12:40:53.552806  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1627 12:40:53.556267  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1628 12:40:53.559013  call enable_fixed_mtrr()

 1629 12:40:53.562445  CPU physical address size: 39 bits

 1630 12:40:53.567314  MTRR: default type WB/UC MTRR counts: 5/6.

 1631 12:40:53.570556  MTRR: WB selected as default type.

 1632 12:40:53.576435  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1633 12:40:53.583370  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1634 12:40:53.589688  MTRR: 2 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1

 1635 12:40:53.595736  MTRR: 3 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0

 1636 12:40:53.601356  MTRR: 4 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0

 1637 12:40:53.606129  MTRR: Fixed MSR 0x250 0x0606060606060606

 1638 12:40:53.610308  MTRR: Fixed MSR 0x258 0x0606060606060606

 1639 12:40:53.614264  MTRR: Fixed MSR 0x259 0x0000000000000000

 1640 12:40:53.618187  MTRR: Fixed MSR 0x268 0x0606060606060606

 1641 12:40:53.622346  MTRR: Fixed MSR 0x269 0x0606060606060606

 1642 12:40:53.626848  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1643 12:40:53.630415  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1644 12:40:53.634917  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1645 12:40:53.638755  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1646 12:40:53.643120  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1647 12:40:53.647091  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1648 12:40:53.647171  

 1649 12:40:53.648527  MTRR check

 1650 12:40:53.650983  Fixed MTRRs   : Enabled

 1651 12:40:53.653289  Variable MTRRs: Enabled

 1652 12:40:53.653373  

 1653 12:40:53.656142  call enable_fixed_mtrr()

 1654 12:40:53.661680  BS: BS_WRITE_TABLES exit times (exec / console): 46 / 142 ms

 1655 12:40:53.665040  CPU physical address size: 39 bits

 1656 12:40:53.668222  Probing TPM:  done!

 1657 12:40:53.672532  Connected to device vid:did:rid of 1ae0:0028:00

 1658 12:40:53.682755  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66

 1659 12:40:53.687507  Initialized TPM device CR50 revision 0

 1660 12:40:53.690174  Checking cr50 for pending updates

 1661 12:40:53.696817  Reading cr50 TPM mode

 1662 12:40:53.706128  BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 25 ms

 1663 12:40:53.711089  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1664 12:40:53.714662  CBFS: Locating 'fallback/payload'

 1665 12:40:53.719322  CBFS: Found @ offset 3a0c00 size 48db0

 1666 12:40:53.723733  Checking segment from ROM address 0xfffa8c38

 1667 12:40:53.728626  Checking segment from ROM address 0xfffa8c54

 1668 12:40:53.732581  Loading segment from ROM address 0xfffa8c38

 1669 12:40:53.734940    code (compression=0)

 1670 12:40:53.744584    New segment dstaddr 0x30000000 memsize 0x2660100 srcaddr 0xfffa8c70 filesize 0x48d78

 1671 12:40:53.752454  Loading Segment: addr: 0x30000000 memsz: 0x0000000002660100 filesz: 0x0000000000048d78

 1672 12:40:53.754375  it's not compressed!

 1673 12:40:53.857315  [ 0x30000000, 30048d78, 0x32660100) <- fffa8c70

 1674 12:40:53.864091  Clearing Segment: addr: 0x0000000030048d78 memsz: 0x0000000002617388

 1675 12:40:53.872032  Loading segment from ROM address 0xfffa8c54

 1676 12:40:53.874395    Entry Point 0x30000000

 1677 12:40:53.875838  Loaded segments

 1678 12:40:53.881658  BS: BS_PAYLOAD_LOAD run times (exec / console): 103 / 67 ms

 1679 12:40:53.885728  Finalizing chipset.

 1680 12:40:53.886979  Finalizing SMM.

 1681 12:40:53.888049  APMC done.

 1682 12:40:53.894667  BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 5 ms

 1683 12:40:53.897071  mp_park_aps done after 0 msecs.

 1684 12:40:53.903362  Jumping to boot code at 0x30000000(0x99b55000)

 1685 12:40:53.911243  CPU0: stack: 0x99bf8000 - 0x99bf9000, lowest used address 0x99bf8a88, stack used: 1400 bytes

 1686 12:40:53.911326  

 1687 12:40:53.911573  

 1688 12:40:53.911649  

 1689 12:40:53.915185  Starting depthcharge on Kaisa...

 1690 12:40:53.915270  

 1691 12:40:53.916107  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 1692 12:40:53.916235  start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
 1693 12:40:53.916352  Setting prompt string to ['puff:']
 1694 12:40:53.916460  bootloader-commands: Wait for prompt ['puff:'] (timeout 00:04:43)
 1695 12:40:53.922409  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1696 12:40:53.922516  

 1697 12:40:53.929980  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1698 12:40:53.930061  

 1699 12:40:53.932203  BIOS MMAP details:

 1700 12:40:53.932856  

 1701 12:40:53.934507  IFD Base Offset  : 0x300000

 1702 12:40:53.935617  

 1703 12:40:53.937455  IFD End Offset   : 0x1000000

 1704 12:40:53.938362  

 1705 12:40:53.940560  MMAP Size        : 0xd00000

 1706 12:40:53.940911  

 1707 12:40:53.943925  MMAP Start       : 0xff300000

 1708 12:40:53.944247  

 1709 12:40:53.948517  Looking for NVMe Controller 0x3105c848 @ 00:1d:00

 1710 12:40:53.948789  

 1711 12:40:53.950299  Wipe memory regions:

 1712 12:40:53.951070  

 1713 12:40:53.954909  	[0x00000000001000, 0x000000000a0000)

 1714 12:40:53.954989  

 1715 12:40:53.958412  	[0x00000000100000, 0x00000030000000)

 1716 12:40:54.007284  

 1717 12:40:54.010905  	[0x00000032660100, 0x00000099a1f000)

 1718 12:40:54.114732  

 1719 12:40:54.117974  	[0x00000100000000, 0x0000015e800000)

 1720 12:40:54.518853  

 1721 12:40:54.521130  R8152: Initializing

 1722 12:40:54.521847  

 1723 12:40:54.523281  Version 9 (ocp_data = 6010)

 1724 12:40:54.524081  

 1725 12:40:54.526930  R8152: Done initializing

 1726 12:40:54.527380  

 1727 12:40:54.528611  Adding net device

 1728 12:40:54.829243  

 1729 12:40:54.834383  [firmware-puff-13324.B-collabora] Feb 14 2023 12:06:39

 1730 12:40:54.835277  

 1731 12:40:54.835667  

 1732 12:40:54.836048  

 1733 12:40:54.836910  Setting prompt string to ['puff:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1735 12:40:54.938298  puff: tftpboot 192.168.201.1 11383473/tftp-deploy-x4ivshcn/kernel/bzImage 11383473/tftp-deploy-x4ivshcn/kernel/cmdline 11383473/tftp-deploy-x4ivshcn/ramdisk/ramdisk.cpio.gz

 1736 12:40:54.939144  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1737 12:40:54.939636  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
 1738 12:40:54.982959  tftpboot 192.168.201.1 11383473/tftp-deploy-x4ivshcn/kernel/bzImage 11383473/tftp-deploy-x4ivshcn/kernel/cmdline 11383473/tftp-deploy-x4ivshcn/ramdisk/ramdisk.cpio.gz

 1739 12:40:54.983476  

 1740 12:40:54.983844  Waiting for link

 1741 12:40:55.143447  

 1742 12:40:55.144392  done.

 1743 12:40:55.144787  

 1744 12:40:55.145885  MAC: 00:e0:4c:68:02:15

 1745 12:40:55.146887  

 1746 12:40:55.149387  Sending DHCP discover... done.

 1747 12:40:55.149942  

 1748 12:40:55.152479  Waiting for reply... done.

 1749 12:40:55.153021  

 1750 12:40:55.155297  Sending DHCP request... done.

 1751 12:40:55.155808  

 1752 12:40:55.161974  Waiting for reply... done.

 1753 12:40:55.162609  

 1754 12:40:55.163706  My ip is 192.168.201.14

 1755 12:40:55.164279  

 1756 12:40:55.166862  The DHCP server ip is 192.168.201.1

 1757 12:40:55.167363  

 1758 12:40:55.171777  TFTP server IP predefined by user: 192.168.201.1

 1759 12:40:55.172240  

 1760 12:40:55.179106  Bootfile predefined by user: 11383473/tftp-deploy-x4ivshcn/kernel/bzImage

 1761 12:40:55.179639  

 1762 12:40:55.182214  Sending tftp read request... done.

 1763 12:40:55.182722  

 1764 12:40:55.188027  Waiting for the transfer... 

 1765 12:40:55.188734  

 1766 12:40:55.456875  00000000 ################################################################

 1767 12:40:55.457190  

 1768 12:40:55.699170  00080000 ################################################################

 1769 12:40:55.699552  

 1770 12:40:55.941570  00100000 ################################################################

 1771 12:40:55.942606  

 1772 12:40:56.185943  00180000 ################################################################

 1773 12:40:56.186272  

 1774 12:40:56.428286  00200000 ################################################################

 1775 12:40:56.428748  

 1776 12:40:56.673370  00280000 ################################################################

 1777 12:40:56.673960  

 1778 12:40:56.914034  00300000 ################################################################

 1779 12:40:56.914542  

 1780 12:40:57.153934  00380000 ################################################################

 1781 12:40:57.154378  

 1782 12:40:57.394841  00400000 ################################################################

 1783 12:40:57.395181  

 1784 12:40:57.644085  00480000 ################################################################

 1785 12:40:57.644437  

 1786 12:40:57.895347  00500000 ################################################################

 1787 12:40:57.895688  

 1788 12:40:58.134507  00580000 ################################################################

 1789 12:40:58.134869  

 1790 12:40:58.373135  00600000 ################################################################

 1791 12:40:58.373259  

 1792 12:40:58.612588  00680000 ################################################################

 1793 12:40:58.613412  

 1794 12:40:58.852797  00700000 ################################################################

 1795 12:40:58.853679  

 1796 12:40:59.090564  00780000 ################################################################

 1797 12:40:59.091030  

 1798 12:40:59.138056  00800000 ############# done.

 1799 12:40:59.138184  

 1800 12:40:59.141399  The bootfile was 8490896 bytes long.

 1801 12:40:59.141503  

 1802 12:40:59.144602  Sending tftp read request... done.

 1803 12:40:59.144775  

 1804 12:40:59.147412  Waiting for the transfer... 

 1805 12:40:59.148425  

 1806 12:40:59.400841  00000000 ################################################################

 1807 12:40:59.401009  

 1808 12:40:59.640676  00080000 ################################################################

 1809 12:40:59.641179  

 1810 12:40:59.882884  00100000 ################################################################

 1811 12:40:59.883251  

 1812 12:41:00.121129  00180000 ################################################################

 1813 12:41:00.121636  

 1814 12:41:00.367712  00200000 ################################################################

 1815 12:41:00.367849  

 1816 12:41:00.609041  00280000 ################################################################

 1817 12:41:00.609182  

 1818 12:41:00.845043  00300000 ################################################################

 1819 12:41:00.845405  

 1820 12:41:01.083183  00380000 ################################################################

 1821 12:41:01.083549  

 1822 12:41:01.326310  00400000 ################################################################

 1823 12:41:01.326746  

 1824 12:41:01.562644  00480000 ################################################################

 1825 12:41:01.563016  

 1826 12:41:01.806152  00500000 ################################################################

 1827 12:41:01.806597  

 1828 12:41:02.043708  00580000 ################################################################

 1829 12:41:02.043871  

 1830 12:41:02.280496  00600000 ################################################################

 1831 12:41:02.280984  

 1832 12:41:02.522106  00680000 ################################################################

 1833 12:41:02.523017  

 1834 12:41:02.761527  00700000 ################################################################

 1835 12:41:02.761915  

 1836 12:41:02.996671  00780000 ################################################################

 1837 12:41:02.997296  

 1838 12:41:03.203074  00800000 ####################################################### done.

 1839 12:41:03.203245  

 1840 12:41:03.206630  Sending tftp read request... done.

 1841 12:41:03.206751  

 1842 12:41:03.209597  Waiting for the transfer... 

 1843 12:41:03.209681  

 1844 12:41:03.210891  00000000 # done.

 1845 12:41:03.210994  

 1846 12:41:03.220328  Command line loaded dynamically from TFTP file: 11383473/tftp-deploy-x4ivshcn/kernel/cmdline

 1847 12:41:03.220814  

 1848 12:41:03.235417  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 1849 12:41:03.235505  

 1850 12:41:03.240048  ec_init: CrosEC protocol v3 supported (256, 256)

 1851 12:41:03.244504  

 1852 12:41:03.248175  Shutting down all USB controllers.

 1853 12:41:03.248257  

 1854 12:41:03.250844  Removing current net device

 1855 12:41:03.250946  

 1856 12:41:03.252911  Finalizing coreboot

 1857 12:41:03.253248  

 1858 12:41:03.258190  Exiting depthcharge with code 4 at timestamp: 18818704

 1859 12:41:03.258273  

 1860 12:41:03.258350  

 1861 12:41:03.260576  end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
 1862 12:41:03.260716  start: 2.2.5 auto-login-action (timeout 00:04:34) [common]
 1863 12:41:03.260826  Setting prompt string to ['Linux version [0-9]']
 1864 12:41:03.260927  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1865 12:41:03.261027  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 1866 12:41:03.261285  Starting kernel ...

 1867 12:41:03.261383  

 1868 12:41:03.261473  

 1870 12:45:37.261683  end: 2.2.5 auto-login-action (duration 00:04:34) [common]
 1872 12:45:37.262843  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 274 seconds'
 1874 12:45:37.263712  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 1877 12:45:37.265409  end: 2 depthcharge-action (duration 00:05:00) [common]
 1879 12:45:37.266626  Cleaning after the job
 1880 12:45:37.267292  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383473/tftp-deploy-x4ivshcn/ramdisk
 1881 12:45:37.273865  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383473/tftp-deploy-x4ivshcn/kernel
 1882 12:45:37.280971  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383473/tftp-deploy-x4ivshcn/modules
 1883 12:45:37.282836  start: 5.1 power-off (timeout 00:00:30) [common]
 1884 12:45:37.283684  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-5' '--port=1' '--command=off'
 1885 12:45:38.234192  >> Command sent successfully.

 1886 12:45:38.247674  Returned 0 in 0 seconds
 1887 12:45:38.348680  end: 5.1 power-off (duration 00:00:01) [common]
 1889 12:45:38.349118  start: 5.2 read-feedback (timeout 00:09:59) [common]
 1890 12:45:38.349484  Listened to connection for namespace 'common' for up to 1s
 1892 12:45:39.350722  Finalising connection for namespace 'common'
 1893 12:45:39.351419  Disconnecting from shell: Finalise
 1894 12:45:39.351836  
 1895 12:45:39.452826  end: 5.2 read-feedback (duration 00:00:01) [common]
 1896 12:45:39.453433  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11383473
 1897 12:45:39.473427  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11383473
 1898 12:45:39.473568  JobError: Your job cannot terminate cleanly.