Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 12:40:20.605826 lava-dispatcher, installed at version: 2023.06
2 12:40:20.606070 start: 0 validate
3 12:40:20.606206 Start time: 2023-08-30 12:40:20.606198+00:00 (UTC)
4 12:40:20.606350 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:40:20.606504 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:40:20.876616 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:40:20.877394 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:40:21.144294 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:40:21.145025 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:40:25.161046 validate duration: 4.55
12 12:40:25.162336 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:40:25.162870 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:40:25.163390 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:40:25.164043 Not decompressing ramdisk as can be used compressed.
16 12:40:25.164522 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:40:25.164885 saving as /var/lib/lava/dispatcher/tmp/11383500/tftp-deploy-hmcxfo5x/ramdisk/rootfs.cpio.gz
18 12:40:25.165244 total size: 8418130 (8 MB)
19 12:40:25.683588 progress 0 % (0 MB)
20 12:40:25.686148 progress 5 % (0 MB)
21 12:40:25.688530 progress 10 % (0 MB)
22 12:40:25.690788 progress 15 % (1 MB)
23 12:40:25.693082 progress 20 % (1 MB)
24 12:40:25.695365 progress 25 % (2 MB)
25 12:40:25.697674 progress 30 % (2 MB)
26 12:40:25.699798 progress 35 % (2 MB)
27 12:40:25.702033 progress 40 % (3 MB)
28 12:40:25.704286 progress 45 % (3 MB)
29 12:40:25.706530 progress 50 % (4 MB)
30 12:40:25.708754 progress 55 % (4 MB)
31 12:40:25.710972 progress 60 % (4 MB)
32 12:40:25.713074 progress 65 % (5 MB)
33 12:40:25.715255 progress 70 % (5 MB)
34 12:40:25.717519 progress 75 % (6 MB)
35 12:40:25.719712 progress 80 % (6 MB)
36 12:40:25.721904 progress 85 % (6 MB)
37 12:40:25.724103 progress 90 % (7 MB)
38 12:40:25.726335 progress 95 % (7 MB)
39 12:40:25.728427 progress 100 % (8 MB)
40 12:40:25.728657 8 MB downloaded in 0.56 s (14.25 MB/s)
41 12:40:25.728808 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:40:25.729047 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:40:25.729131 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:40:25.729216 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:40:25.729353 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:40:25.729425 saving as /var/lib/lava/dispatcher/tmp/11383500/tftp-deploy-hmcxfo5x/kernel/bzImage
48 12:40:25.729485 total size: 8490896 (8 MB)
49 12:40:25.729545 No compression specified
50 12:40:25.730655 progress 0 % (0 MB)
51 12:40:25.732818 progress 5 % (0 MB)
52 12:40:25.735114 progress 10 % (0 MB)
53 12:40:25.737398 progress 15 % (1 MB)
54 12:40:25.739694 progress 20 % (1 MB)
55 12:40:25.741954 progress 25 % (2 MB)
56 12:40:25.744252 progress 30 % (2 MB)
57 12:40:25.746510 progress 35 % (2 MB)
58 12:40:25.748781 progress 40 % (3 MB)
59 12:40:25.751027 progress 45 % (3 MB)
60 12:40:25.753313 progress 50 % (4 MB)
61 12:40:25.755528 progress 55 % (4 MB)
62 12:40:25.757807 progress 60 % (4 MB)
63 12:40:25.760061 progress 65 % (5 MB)
64 12:40:25.762254 progress 70 % (5 MB)
65 12:40:25.764494 progress 75 % (6 MB)
66 12:40:25.766675 progress 80 % (6 MB)
67 12:40:25.768874 progress 85 % (6 MB)
68 12:40:25.771063 progress 90 % (7 MB)
69 12:40:25.773255 progress 95 % (7 MB)
70 12:40:25.775453 progress 100 % (8 MB)
71 12:40:25.775566 8 MB downloaded in 0.05 s (175.74 MB/s)
72 12:40:25.775722 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:40:25.775952 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:40:25.776037 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:40:25.776121 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:40:25.776257 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:40:25.776330 saving as /var/lib/lava/dispatcher/tmp/11383500/tftp-deploy-hmcxfo5x/modules/modules.tar
79 12:40:25.776392 total size: 250888 (0 MB)
80 12:40:25.776453 Using unxz to decompress xz
81 12:40:25.780680 progress 13 % (0 MB)
82 12:40:25.781082 progress 26 % (0 MB)
83 12:40:25.781317 progress 39 % (0 MB)
84 12:40:25.782887 progress 52 % (0 MB)
85 12:40:25.784770 progress 65 % (0 MB)
86 12:40:25.786625 progress 78 % (0 MB)
87 12:40:25.788490 progress 91 % (0 MB)
88 12:40:25.790210 progress 100 % (0 MB)
89 12:40:25.795758 0 MB downloaded in 0.02 s (12.36 MB/s)
90 12:40:25.795993 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:40:25.796258 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:40:25.796351 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 12:40:25.796450 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 12:40:25.796529 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:40:25.796613 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 12:40:25.796835 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_
98 12:40:25.796970 makedir: /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin
99 12:40:25.797078 makedir: /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/tests
100 12:40:25.797178 makedir: /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/results
101 12:40:25.797294 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-add-keys
102 12:40:25.797446 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-add-sources
103 12:40:25.797581 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-background-process-start
104 12:40:25.797713 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-background-process-stop
105 12:40:25.797842 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-common-functions
106 12:40:25.797969 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-echo-ipv4
107 12:40:25.798095 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-install-packages
108 12:40:25.798221 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-installed-packages
109 12:40:25.798345 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-os-build
110 12:40:25.798471 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-probe-channel
111 12:40:25.798596 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-probe-ip
112 12:40:25.798742 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-target-ip
113 12:40:25.798867 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-target-mac
114 12:40:25.798992 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-target-storage
115 12:40:25.799121 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-test-case
116 12:40:25.799247 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-test-event
117 12:40:25.799370 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-test-feedback
118 12:40:25.799495 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-test-raise
119 12:40:25.799625 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-test-reference
120 12:40:25.799762 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-test-runner
121 12:40:25.799888 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-test-set
122 12:40:25.800014 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-test-shell
123 12:40:25.800143 Updating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-install-packages (oe)
124 12:40:25.800306 Updating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/bin/lava-installed-packages (oe)
125 12:40:25.800437 Creating /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/environment
126 12:40:25.800549 LAVA metadata
127 12:40:25.800624 - LAVA_JOB_ID=11383500
128 12:40:25.800688 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:40:25.800800 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 12:40:25.800871 skipped lava-vland-overlay
131 12:40:25.800948 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:40:25.801029 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 12:40:25.801091 skipped lava-multinode-overlay
134 12:40:25.801164 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:40:25.801245 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 12:40:25.801320 Loading test definitions
137 12:40:25.801410 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 12:40:25.801488 Using /lava-11383500 at stage 0
139 12:40:25.801803 uuid=11383500_1.4.2.3.1 testdef=None
140 12:40:25.801890 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:40:25.801979 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 12:40:25.802521 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:40:25.802757 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 12:40:25.803497 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:40:25.803809 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 12:40:25.804454 runner path: /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/0/tests/0_dmesg test_uuid 11383500_1.4.2.3.1
149 12:40:25.804610 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:40:25.804910 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 12:40:25.804986 Using /lava-11383500 at stage 1
153 12:40:25.805292 uuid=11383500_1.4.2.3.5 testdef=None
154 12:40:25.805379 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 12:40:25.805463 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 12:40:25.805942 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 12:40:25.806158 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 12:40:25.806857 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 12:40:25.807087 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 12:40:25.807901 runner path: /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/1/tests/1_bootrr test_uuid 11383500_1.4.2.3.5
163 12:40:25.808092 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 12:40:25.808305 Creating lava-test-runner.conf files
166 12:40:25.808368 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/0 for stage 0
167 12:40:25.808457 - 0_dmesg
168 12:40:25.808539 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383500/lava-overlay-p9tarsj_/lava-11383500/1 for stage 1
169 12:40:25.808629 - 1_bootrr
170 12:40:25.808723 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 12:40:25.808807 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 12:40:25.817219 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 12:40:25.817322 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 12:40:25.817407 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 12:40:25.817490 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 12:40:25.817576 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 12:40:26.069740 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 12:40:26.070123 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 12:40:26.070244 extracting modules file /var/lib/lava/dispatcher/tmp/11383500/tftp-deploy-hmcxfo5x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11383500/extract-overlay-ramdisk-yojmuz1c/ramdisk
180 12:40:26.083751 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 12:40:26.083893 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 12:40:26.083987 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383500/compress-overlay-2bvy1kc7/overlay-1.4.2.4.tar.gz to ramdisk
183 12:40:26.084060 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383500/compress-overlay-2bvy1kc7/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11383500/extract-overlay-ramdisk-yojmuz1c/ramdisk
184 12:40:26.093168 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 12:40:26.093295 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 12:40:26.093390 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 12:40:26.093480 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 12:40:26.093556 Building ramdisk /var/lib/lava/dispatcher/tmp/11383500/extract-overlay-ramdisk-yojmuz1c/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11383500/extract-overlay-ramdisk-yojmuz1c/ramdisk
189 12:40:26.224615 >> 49788 blocks
190 12:40:27.062593 rename /var/lib/lava/dispatcher/tmp/11383500/extract-overlay-ramdisk-yojmuz1c/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11383500/tftp-deploy-hmcxfo5x/ramdisk/ramdisk.cpio.gz
191 12:40:27.063051 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 12:40:27.063179 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 12:40:27.063285 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 12:40:27.063384 No mkimage arch provided, not using FIT.
195 12:40:27.063473 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 12:40:27.063562 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 12:40:27.063708 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 12:40:27.063802 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 12:40:27.063883 No LXC device requested
200 12:40:27.063962 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 12:40:27.064049 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 12:40:27.064128 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 12:40:27.064200 Checking files for TFTP limit of 4294967296 bytes.
204 12:40:27.064611 end: 1 tftp-deploy (duration 00:00:02) [common]
205 12:40:27.064711 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 12:40:27.064801 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 12:40:27.064919 substitutions:
208 12:40:27.064987 - {DTB}: None
209 12:40:27.065050 - {INITRD}: 11383500/tftp-deploy-hmcxfo5x/ramdisk/ramdisk.cpio.gz
210 12:40:27.065110 - {KERNEL}: 11383500/tftp-deploy-hmcxfo5x/kernel/bzImage
211 12:40:27.065167 - {LAVA_MAC}: None
212 12:40:27.065223 - {PRESEED_CONFIG}: None
213 12:40:27.065279 - {PRESEED_LOCAL}: None
214 12:40:27.065333 - {RAMDISK}: 11383500/tftp-deploy-hmcxfo5x/ramdisk/ramdisk.cpio.gz
215 12:40:27.065389 - {ROOT_PART}: None
216 12:40:27.065443 - {ROOT}: None
217 12:40:27.065497 - {SERVER_IP}: 192.168.201.1
218 12:40:27.065550 - {TEE}: None
219 12:40:27.065604 Parsed boot commands:
220 12:40:27.065658 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 12:40:27.065834 Parsed boot commands: tftpboot 192.168.201.1 11383500/tftp-deploy-hmcxfo5x/kernel/bzImage 11383500/tftp-deploy-hmcxfo5x/kernel/cmdline 11383500/tftp-deploy-hmcxfo5x/ramdisk/ramdisk.cpio.gz
222 12:40:27.065922 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 12:40:27.066009 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 12:40:27.066101 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 12:40:27.066189 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 12:40:27.066259 Not connected, no need to disconnect.
227 12:40:27.066333 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 12:40:27.066415 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 12:40:27.066484 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
230 12:40:27.070525 Setting prompt string to ['lava-test: # ']
231 12:40:27.070882 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 12:40:27.070986 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 12:40:27.071087 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 12:40:27.071179 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 12:40:27.071413 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
236 12:40:32.217907 >> Command sent successfully.
237 12:40:32.230362 Returned 0 in 5 seconds
238 12:40:32.331742 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 12:40:32.333608 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 12:40:32.334178 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 12:40:32.334765 Setting prompt string to 'Starting depthcharge on Helios...'
243 12:40:32.335254 Changing prompt to 'Starting depthcharge on Helios...'
244 12:40:32.335700 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
245 12:40:32.337239 [Enter `^Ec?' for help]
246 12:40:32.943197
247 12:40:32.943820
248 12:40:32.952495 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
249 12:40:32.955868 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
250 12:40:32.962608 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
251 12:40:32.966549 CPU: AES supported, TXT NOT supported, VT supported
252 12:40:32.973243 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
253 12:40:32.976152 PCH: device id 0284 (rev 00) is Cometlake-U Premium
254 12:40:32.982971 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
255 12:40:32.986171 VBOOT: Loading verstage.
256 12:40:32.989054 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 12:40:32.995818 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
258 12:40:32.999214 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 12:40:33.002671 CBFS @ c08000 size 3f8000
260 12:40:33.008987 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
261 12:40:33.012455 CBFS: Locating 'fallback/verstage'
262 12:40:33.016014 CBFS: Found @ offset 10fb80 size 1072c
263 12:40:33.019221
264 12:40:33.019848
265 12:40:33.029524 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
266 12:40:33.043511 Probing TPM: . done!
267 12:40:33.047114 TPM ready after 0 ms
268 12:40:33.050487 Connected to device vid:did:rid of 1ae0:0028:00
269 12:40:33.060590 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
270 12:40:33.064104 Initialized TPM device CR50 revision 0
271 12:40:33.110709 tlcl_send_startup: Startup return code is 0
272 12:40:33.111282 TPM: setup succeeded
273 12:40:33.123426 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
274 12:40:33.127261 Chrome EC: UHEPI supported
275 12:40:33.130716 Phase 1
276 12:40:33.133716 FMAP: area GBB found @ c05000 (12288 bytes)
277 12:40:33.140210 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 12:40:33.140978 Phase 2
279 12:40:33.143936 Phase 3
280 12:40:33.147075 FMAP: area GBB found @ c05000 (12288 bytes)
281 12:40:33.153956 VB2:vb2_report_dev_firmware() This is developer signed firmware
282 12:40:33.160739 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
283 12:40:33.164042 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
284 12:40:33.170238 VB2:vb2_verify_keyblock() Checking keyblock signature...
285 12:40:33.185954 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
286 12:40:33.188903 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
287 12:40:33.195715 VB2:vb2_verify_fw_preamble() Verifying preamble.
288 12:40:33.199914 Phase 4
289 12:40:33.203048 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
290 12:40:33.209864 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
291 12:40:33.389889 VB2:vb2_rsa_verify_digest() Digest check failed!
292 12:40:33.396586 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
293 12:40:33.397163 Saving nvdata
294 12:40:33.399908 Reboot requested (10020007)
295 12:40:33.403156 board_reset() called!
296 12:40:33.403807 full_reset() called!
297 12:40:37.908792
298 12:40:37.909308
299 12:40:37.918725 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 12:40:37.922062 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 12:40:37.928610 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 12:40:37.932141 CPU: AES supported, TXT NOT supported, VT supported
303 12:40:37.938425 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 12:40:37.941798 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 12:40:37.948600 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 12:40:37.952300 VBOOT: Loading verstage.
307 12:40:37.955286 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 12:40:37.961659 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 12:40:37.968220 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 12:40:37.968654 CBFS @ c08000 size 3f8000
311 12:40:37.975375 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 12:40:37.978339 CBFS: Locating 'fallback/verstage'
313 12:40:37.981763 CBFS: Found @ offset 10fb80 size 1072c
314 12:40:37.985848
315 12:40:37.986276
316 12:40:37.995843 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 12:40:38.010084 Probing TPM: . done!
318 12:40:38.013497 TPM ready after 0 ms
319 12:40:38.016718 Connected to device vid:did:rid of 1ae0:0028:00
320 12:40:38.026981 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
321 12:40:38.030143 Initialized TPM device CR50 revision 0
322 12:40:38.077670 tlcl_send_startup: Startup return code is 0
323 12:40:38.078148 TPM: setup succeeded
324 12:40:38.090468 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 12:40:38.094161 Chrome EC: UHEPI supported
326 12:40:38.097742 Phase 1
327 12:40:38.101420 FMAP: area GBB found @ c05000 (12288 bytes)
328 12:40:38.107581 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
329 12:40:38.114514 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
330 12:40:38.117579 Recovery requested (1009000e)
331 12:40:38.123246 Saving nvdata
332 12:40:38.129317 tlcl_extend: response is 0
333 12:40:38.138583 tlcl_extend: response is 0
334 12:40:38.145414 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 12:40:38.148298 CBFS @ c08000 size 3f8000
336 12:40:38.155066 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 12:40:38.158552 CBFS: Locating 'fallback/romstage'
338 12:40:38.161799 CBFS: Found @ offset 80 size 145fc
339 12:40:38.164986 Accumulated console time in verstage 99 ms
340 12:40:38.165473
341 12:40:38.165841
342 12:40:38.178721 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
343 12:40:38.184776 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
344 12:40:38.188078 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 12:40:38.191216 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 12:40:38.198258 gpe0_sts[1]: 00300000 gpe0_en[1]: 00000000
347 12:40:38.201644 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 12:40:38.204852 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
349 12:40:38.208016 TCO_STS: 0000 0000
350 12:40:38.211753 GEN_PMCON: e0015238 00000200
351 12:40:38.214725 GBLRST_CAUSE: 00000000 00000000
352 12:40:38.215149 prev_sleep_state 5
353 12:40:38.218215 Boot Count incremented to 68597
354 12:40:38.225099 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 12:40:38.228002 CBFS @ c08000 size 3f8000
356 12:40:38.234692 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 12:40:38.235120 CBFS: Locating 'fspm.bin'
358 12:40:38.237981 CBFS: Found @ offset 5ffc0 size 71000
359 12:40:38.242306 Chrome EC: UHEPI supported
360 12:40:38.249599 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
361 12:40:38.254724 Probing TPM: done!
362 12:40:38.261326 Connected to device vid:did:rid of 1ae0:0028:00
363 12:40:38.271452 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
364 12:40:38.277718 Initialized TPM device CR50 revision 0
365 12:40:38.286551 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
366 12:40:38.292861 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
367 12:40:38.296379 MRC cache found, size 1948
368 12:40:38.299738 bootmode is set to: 2
369 12:40:38.302807 PRMRR disabled by config.
370 12:40:38.303292 SPD INDEX = 1
371 12:40:38.309472 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 12:40:38.312976 CBFS @ c08000 size 3f8000
373 12:40:38.319336 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 12:40:38.319825 CBFS: Locating 'spd.bin'
375 12:40:38.322772 CBFS: Found @ offset 5fb80 size 400
376 12:40:38.326119 SPD: module type is LPDDR3
377 12:40:38.329638 SPD: module part is
378 12:40:38.335915 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
379 12:40:38.339604 SPD: device width 4 bits, bus width 8 bits
380 12:40:38.342544 SPD: module size is 4096 MB (per channel)
381 12:40:38.345928 memory slot: 0 configuration done.
382 12:40:38.349549 memory slot: 2 configuration done.
383 12:40:38.401102 CBMEM:
384 12:40:38.403988 IMD: root @ 99fff000 254 entries.
385 12:40:38.407109 IMD: root @ 99ffec00 62 entries.
386 12:40:38.410687 External stage cache:
387 12:40:38.413756 IMD: root @ 9abff000 254 entries.
388 12:40:38.417079 IMD: root @ 9abfec00 62 entries.
389 12:40:38.420415 Chrome EC: clear events_b mask to 0x0000000020004000
390 12:40:38.437129 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 12:40:38.450237 tlcl_write: response is 0
392 12:40:38.459293 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 12:40:38.465518 MRC: TPM MRC hash updated successfully.
394 12:40:38.466035 2 DIMMs found
395 12:40:38.469082 SMM Memory Map
396 12:40:38.472323 SMRAM : 0x9a000000 0x1000000
397 12:40:38.475847 Subregion 0: 0x9a000000 0xa00000
398 12:40:38.478852 Subregion 1: 0x9aa00000 0x200000
399 12:40:38.482690 Subregion 2: 0x9ac00000 0x400000
400 12:40:38.485964 top_of_ram = 0x9a000000
401 12:40:38.489026 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
402 12:40:38.495711 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
403 12:40:38.499321 MTRR Range: Start=ff000000 End=0 (Size 1000000)
404 12:40:38.505642 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 12:40:38.509004 CBFS @ c08000 size 3f8000
406 12:40:38.512444 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 12:40:38.515808 CBFS: Locating 'fallback/postcar'
408 12:40:38.519010 CBFS: Found @ offset 107000 size 4b44
409 12:40:38.525447 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 12:40:38.538158 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 12:40:38.541449 Processing 180 relocs. Offset value of 0x97c0c000
412 12:40:38.549988 Accumulated console time in romstage 286 ms
413 12:40:38.550461
414 12:40:38.550835
415 12:40:38.559810 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 12:40:38.566807 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 12:40:38.570012 CBFS @ c08000 size 3f8000
418 12:40:38.573077 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 12:40:38.576259 CBFS: Locating 'fallback/ramstage'
420 12:40:38.583510 CBFS: Found @ offset 43380 size 1b9e8
421 12:40:38.589891 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 12:40:38.621814 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 12:40:38.624922 Processing 3976 relocs. Offset value of 0x98db0000
424 12:40:38.631720 Accumulated console time in postcar 52 ms
425 12:40:38.632193
426 12:40:38.632563
427 12:40:38.641691 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
428 12:40:38.648141 FMAP: area RO_VPD found @ c00000 (16384 bytes)
429 12:40:38.651295 WARNING: RO_VPD is uninitialized or empty.
430 12:40:38.654492 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 12:40:38.661228 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 12:40:38.661763 Normal boot.
433 12:40:38.667726 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
434 12:40:38.671106 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 12:40:38.674807 CBFS @ c08000 size 3f8000
436 12:40:38.681188 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 12:40:38.684380 CBFS: Locating 'cpu_microcode_blob.bin'
438 12:40:38.687439 CBFS: Found @ offset 14700 size 2ec00
439 12:40:38.690714 microcode: sig=0x806ec pf=0x4 revision=0xc9
440 12:40:38.694313 Skip microcode update
441 12:40:38.700652 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 12:40:38.701191 CBFS @ c08000 size 3f8000
443 12:40:38.707190 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 12:40:38.710896 CBFS: Locating 'fsps.bin'
445 12:40:38.714128 CBFS: Found @ offset d1fc0 size 35000
446 12:40:38.740113 Detected 4 core, 8 thread CPU.
447 12:40:38.742622 Setting up SMI for CPU
448 12:40:38.746282 IED base = 0x9ac00000
449 12:40:38.746773 IED size = 0x00400000
450 12:40:38.749558 Will perform SMM setup.
451 12:40:38.756178 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 12:40:38.762901 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 12:40:38.765877 Processing 16 relocs. Offset value of 0x00030000
454 12:40:38.769687 Attempting to start 7 APs
455 12:40:38.773311 Waiting for 10ms after sending INIT.
456 12:40:38.789483 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
457 12:40:38.789982 done.
458 12:40:38.792660 AP: slot 4 apic_id 3.
459 12:40:38.795914 AP: slot 5 apic_id 2.
460 12:40:38.796340 AP: slot 3 apic_id 7.
461 12:40:38.799425 AP: slot 2 apic_id 6.
462 12:40:38.802826 AP: slot 6 apic_id 5.
463 12:40:38.803293 AP: slot 7 apic_id 4.
464 12:40:38.809173 Waiting for 2nd SIPI to complete...done.
465 12:40:38.816181 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 12:40:38.819108 Processing 13 relocs. Offset value of 0x00038000
467 12:40:38.825891 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 12:40:38.832400 Installing SMM handler to 0x9a000000
469 12:40:38.838835 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 12:40:38.842443 Processing 658 relocs. Offset value of 0x9a010000
471 12:40:38.852099 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 12:40:38.855567 Processing 13 relocs. Offset value of 0x9a008000
473 12:40:38.862307 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 12:40:38.868930 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 12:40:38.875425 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 12:40:38.878897 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 12:40:38.885311 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 12:40:38.891786 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 12:40:38.895293 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 12:40:38.902224 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 12:40:38.905441 Clearing SMI status registers
482 12:40:38.908931 SMI_STS: PM1
483 12:40:38.909513 PM1_STS: PWRBTN
484 12:40:38.912096 TCO_STS: SECOND_TO
485 12:40:38.915416 New SMBASE 0x9a000000
486 12:40:38.919091 In relocation handler: CPU 0
487 12:40:38.921942 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 12:40:38.925223 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 12:40:38.928817 Relocation complete.
490 12:40:38.931962 New SMBASE 0x99fffc00
491 12:40:38.932441 In relocation handler: CPU 1
492 12:40:38.938644 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
493 12:40:38.942142 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 12:40:38.945243 Relocation complete.
495 12:40:38.948685 New SMBASE 0x99fff800
496 12:40:38.949148 In relocation handler: CPU 2
497 12:40:38.955344 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
498 12:40:38.958903 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 12:40:38.961779 Relocation complete.
500 12:40:38.962256 New SMBASE 0x99fff400
501 12:40:38.965282 In relocation handler: CPU 3
502 12:40:38.971982 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
503 12:40:38.975026 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 12:40:38.978385 Relocation complete.
505 12:40:38.979080 New SMBASE 0x99ffec00
506 12:40:38.981729 In relocation handler: CPU 5
507 12:40:38.985126 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
508 12:40:38.991628 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 12:40:38.995407 Relocation complete.
510 12:40:38.996038 New SMBASE 0x99fff000
511 12:40:38.998762 In relocation handler: CPU 4
512 12:40:39.001809 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
513 12:40:39.008628 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 12:40:39.011539 Relocation complete.
515 12:40:39.012012 New SMBASE 0x99ffe800
516 12:40:39.014744 In relocation handler: CPU 6
517 12:40:39.018504 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
518 12:40:39.025304 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 12:40:39.025890 Relocation complete.
520 12:40:39.028338 New SMBASE 0x99ffe400
521 12:40:39.031768 In relocation handler: CPU 7
522 12:40:39.035099 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
523 12:40:39.041520 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 12:40:39.041949 Relocation complete.
525 12:40:39.044797 Initializing CPU #0
526 12:40:39.048309 CPU: vendor Intel device 806ec
527 12:40:39.051255 CPU: family 06, model 8e, stepping 0c
528 12:40:39.054564 Clearing out pending MCEs
529 12:40:39.058323 Setting up local APIC...
530 12:40:39.058753 apic_id: 0x00 done.
531 12:40:39.061464 Turbo is available but hidden
532 12:40:39.064665 Turbo is available and visible
533 12:40:39.068567 VMX status: enabled
534 12:40:39.071132 IA32_FEATURE_CONTROL status: locked
535 12:40:39.074752 Skip microcode update
536 12:40:39.075186 CPU #0 initialized
537 12:40:39.077916 Initializing CPU #1
538 12:40:39.078347 Initializing CPU #2
539 12:40:39.081493 Initializing CPU #3
540 12:40:39.084532 CPU: vendor Intel device 806ec
541 12:40:39.087937 CPU: family 06, model 8e, stepping 0c
542 12:40:39.091515 CPU: vendor Intel device 806ec
543 12:40:39.094561 CPU: family 06, model 8e, stepping 0c
544 12:40:39.097948 Clearing out pending MCEs
545 12:40:39.101143 CPU: vendor Intel device 806ec
546 12:40:39.104508 CPU: family 06, model 8e, stepping 0c
547 12:40:39.107952 Clearing out pending MCEs
548 12:40:39.111180 Initializing CPU #6
549 12:40:39.111607 Initializing CPU #7
550 12:40:39.114268 CPU: vendor Intel device 806ec
551 12:40:39.117964 CPU: family 06, model 8e, stepping 0c
552 12:40:39.121153 Initializing CPU #4
553 12:40:39.124398 Setting up local APIC...
554 12:40:39.124854 Initializing CPU #5
555 12:40:39.127877 CPU: vendor Intel device 806ec
556 12:40:39.130953 CPU: family 06, model 8e, stepping 0c
557 12:40:39.134468 CPU: vendor Intel device 806ec
558 12:40:39.137715 CPU: family 06, model 8e, stepping 0c
559 12:40:39.141210 Clearing out pending MCEs
560 12:40:39.144130 Clearing out pending MCEs
561 12:40:39.147941 Setting up local APIC...
562 12:40:39.148571 apic_id: 0x01 done.
563 12:40:39.151244 Clearing out pending MCEs
564 12:40:39.154288 Setting up local APIC...
565 12:40:39.157631 CPU: vendor Intel device 806ec
566 12:40:39.160987 CPU: family 06, model 8e, stepping 0c
567 12:40:39.164342 Clearing out pending MCEs
568 12:40:39.167419 Clearing out pending MCEs
569 12:40:39.168031 Setting up local APIC...
570 12:40:39.171001 Setting up local APIC...
571 12:40:39.174292 VMX status: enabled
572 12:40:39.174777 apic_id: 0x03 done.
573 12:40:39.177583 apic_id: 0x02 done.
574 12:40:39.180779 VMX status: enabled
575 12:40:39.181255 VMX status: enabled
576 12:40:39.184238 IA32_FEATURE_CONTROL status: locked
577 12:40:39.187415 IA32_FEATURE_CONTROL status: locked
578 12:40:39.190924 Skip microcode update
579 12:40:39.194523 Skip microcode update
580 12:40:39.195019 CPU #4 initialized
581 12:40:39.197805 CPU #5 initialized
582 12:40:39.200966 Setting up local APIC...
583 12:40:39.204236 Setting up local APIC...
584 12:40:39.204769 apic_id: 0x04 done.
585 12:40:39.207630 apic_id: 0x05 done.
586 12:40:39.208188 VMX status: enabled
587 12:40:39.211206 VMX status: enabled
588 12:40:39.214111 IA32_FEATURE_CONTROL status: locked
589 12:40:39.217095 IA32_FEATURE_CONTROL status: locked
590 12:40:39.220545 Skip microcode update
591 12:40:39.224454 Skip microcode update
592 12:40:39.224879 CPU #7 initialized
593 12:40:39.227358 CPU #6 initialized
594 12:40:39.230679 IA32_FEATURE_CONTROL status: locked
595 12:40:39.231178 apic_id: 0x07 done.
596 12:40:39.233904 apic_id: 0x06 done.
597 12:40:39.237031 VMX status: enabled
598 12:40:39.237463 VMX status: enabled
599 12:40:39.240463 IA32_FEATURE_CONTROL status: locked
600 12:40:39.247786 IA32_FEATURE_CONTROL status: locked
601 12:40:39.248221 Skip microcode update
602 12:40:39.250596 Skip microcode update
603 12:40:39.253587 Skip microcode update
604 12:40:39.254020 CPU #2 initialized
605 12:40:39.256950 CPU #3 initialized
606 12:40:39.257379 CPU #1 initialized
607 12:40:39.264053 bsp_do_flight_plan done after 452 msecs.
608 12:40:39.264629 CPU: frequency set to 4200 MHz
609 12:40:39.266912 Enabling SMIs.
610 12:40:39.267475 Locking SMM.
611 12:40:39.283059 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 12:40:39.286576 CBFS @ c08000 size 3f8000
613 12:40:39.293106 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 12:40:39.293699 CBFS: Locating 'vbt.bin'
615 12:40:39.296281 CBFS: Found @ offset 5f5c0 size 499
616 12:40:39.303494 Found a VBT of 4608 bytes after decompression
617 12:40:39.488459 Display FSP Version Info HOB
618 12:40:39.492006 Reference Code - CPU = 9.0.1e.30
619 12:40:39.495492 uCode Version = 0.0.0.ca
620 12:40:39.498441 TXT ACM version = ff.ff.ff.ffff
621 12:40:39.501888 Display FSP Version Info HOB
622 12:40:39.505411 Reference Code - ME = 9.0.1e.30
623 12:40:39.508655 MEBx version = 0.0.0.0
624 12:40:39.511501 ME Firmware Version = Consumer SKU
625 12:40:39.514969 Display FSP Version Info HOB
626 12:40:39.518344 Reference Code - CML PCH = 9.0.1e.30
627 12:40:39.521513 PCH-CRID Status = Disabled
628 12:40:39.525051 PCH-CRID Original Value = ff.ff.ff.ffff
629 12:40:39.528830 PCH-CRID New Value = ff.ff.ff.ffff
630 12:40:39.531736 OPROM - RST - RAID = ff.ff.ff.ffff
631 12:40:39.534998 ChipsetInit Base Version = ff.ff.ff.ffff
632 12:40:39.537976 ChipsetInit Oem Version = ff.ff.ff.ffff
633 12:40:39.541690 Display FSP Version Info HOB
634 12:40:39.548327 Reference Code - SA - System Agent = 9.0.1e.30
635 12:40:39.551396 Reference Code - MRC = 0.7.1.6c
636 12:40:39.551930 SA - PCIe Version = 9.0.1e.30
637 12:40:39.554788 SA-CRID Status = Disabled
638 12:40:39.558156 SA-CRID Original Value = 0.0.0.c
639 12:40:39.561534 SA-CRID New Value = 0.0.0.c
640 12:40:39.564692 OPROM - VBIOS = ff.ff.ff.ffff
641 12:40:39.568357 RTC Init
642 12:40:39.571579 Set power on after power failure.
643 12:40:39.572092 Disabling Deep S3
644 12:40:39.574514 Disabling Deep S3
645 12:40:39.575134 Disabling Deep S4
646 12:40:39.577921 Disabling Deep S4
647 12:40:39.578404 Disabling Deep S5
648 12:40:39.581408 Disabling Deep S5
649 12:40:39.587809 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
650 12:40:39.588289 Enumerating buses...
651 12:40:39.594596 Show all devs... Before device enumeration.
652 12:40:39.595105 Root Device: enabled 1
653 12:40:39.597943 CPU_CLUSTER: 0: enabled 1
654 12:40:39.601006 DOMAIN: 0000: enabled 1
655 12:40:39.604532 APIC: 00: enabled 1
656 12:40:39.605010 PCI: 00:00.0: enabled 1
657 12:40:39.607764 PCI: 00:02.0: enabled 1
658 12:40:39.611021 PCI: 00:04.0: enabled 0
659 12:40:39.614336 PCI: 00:05.0: enabled 0
660 12:40:39.614815 PCI: 00:12.0: enabled 1
661 12:40:39.617605 PCI: 00:12.5: enabled 0
662 12:40:39.621293 PCI: 00:12.6: enabled 0
663 12:40:39.621875 PCI: 00:14.0: enabled 1
664 12:40:39.624899 PCI: 00:14.1: enabled 0
665 12:40:39.627797 PCI: 00:14.3: enabled 1
666 12:40:39.631315 PCI: 00:14.5: enabled 0
667 12:40:39.631890 PCI: 00:15.0: enabled 1
668 12:40:39.634381 PCI: 00:15.1: enabled 1
669 12:40:39.637892 PCI: 00:15.2: enabled 0
670 12:40:39.640810 PCI: 00:15.3: enabled 0
671 12:40:39.641247 PCI: 00:16.0: enabled 1
672 12:40:39.644704 PCI: 00:16.1: enabled 0
673 12:40:39.647432 PCI: 00:16.2: enabled 0
674 12:40:39.650934 PCI: 00:16.3: enabled 0
675 12:40:39.651504 PCI: 00:16.4: enabled 0
676 12:40:39.654465 PCI: 00:16.5: enabled 0
677 12:40:39.657524 PCI: 00:17.0: enabled 1
678 12:40:39.658268 PCI: 00:19.0: enabled 1
679 12:40:39.660685 PCI: 00:19.1: enabled 0
680 12:40:39.663930 PCI: 00:19.2: enabled 0
681 12:40:39.667511 PCI: 00:1a.0: enabled 0
682 12:40:39.668076 PCI: 00:1c.0: enabled 0
683 12:40:39.670580 PCI: 00:1c.1: enabled 0
684 12:40:39.674273 PCI: 00:1c.2: enabled 0
685 12:40:39.677174 PCI: 00:1c.3: enabled 0
686 12:40:39.677646 PCI: 00:1c.4: enabled 0
687 12:40:39.680728 PCI: 00:1c.5: enabled 0
688 12:40:39.684208 PCI: 00:1c.6: enabled 0
689 12:40:39.687407 PCI: 00:1c.7: enabled 0
690 12:40:39.687997 PCI: 00:1d.0: enabled 1
691 12:40:39.690409 PCI: 00:1d.1: enabled 0
692 12:40:39.694008 PCI: 00:1d.2: enabled 0
693 12:40:39.696930 PCI: 00:1d.3: enabled 0
694 12:40:39.697356 PCI: 00:1d.4: enabled 0
695 12:40:39.700454 PCI: 00:1d.5: enabled 1
696 12:40:39.703962 PCI: 00:1e.0: enabled 1
697 12:40:39.704391 PCI: 00:1e.1: enabled 0
698 12:40:39.707103 PCI: 00:1e.2: enabled 1
699 12:40:39.710625 PCI: 00:1e.3: enabled 1
700 12:40:39.714125 PCI: 00:1f.0: enabled 1
701 12:40:39.714553 PCI: 00:1f.1: enabled 1
702 12:40:39.717405 PCI: 00:1f.2: enabled 1
703 12:40:39.720565 PCI: 00:1f.3: enabled 1
704 12:40:39.723853 PCI: 00:1f.4: enabled 1
705 12:40:39.724291 PCI: 00:1f.5: enabled 1
706 12:40:39.727363 PCI: 00:1f.6: enabled 0
707 12:40:39.730452 USB0 port 0: enabled 1
708 12:40:39.730979 I2C: 00:15: enabled 1
709 12:40:39.733792 I2C: 00:5d: enabled 1
710 12:40:39.737225 GENERIC: 0.0: enabled 1
711 12:40:39.737746 I2C: 00:1a: enabled 1
712 12:40:39.740385 I2C: 00:38: enabled 1
713 12:40:39.743814 I2C: 00:39: enabled 1
714 12:40:39.746963 I2C: 00:3a: enabled 1
715 12:40:39.747390 I2C: 00:3b: enabled 1
716 12:40:39.750187 PCI: 00:00.0: enabled 1
717 12:40:39.750616 SPI: 00: enabled 1
718 12:40:39.753820 SPI: 01: enabled 1
719 12:40:39.757227 PNP: 0c09.0: enabled 1
720 12:40:39.757760 USB2 port 0: enabled 1
721 12:40:39.760447 USB2 port 1: enabled 1
722 12:40:39.763686 USB2 port 2: enabled 0
723 12:40:39.766997 USB2 port 3: enabled 0
724 12:40:39.767475 USB2 port 5: enabled 0
725 12:40:39.770238 USB2 port 6: enabled 1
726 12:40:39.773442 USB2 port 9: enabled 1
727 12:40:39.773869 USB3 port 0: enabled 1
728 12:40:39.776990 USB3 port 1: enabled 1
729 12:40:39.780114 USB3 port 2: enabled 1
730 12:40:39.780541 USB3 port 3: enabled 1
731 12:40:39.783401 USB3 port 4: enabled 0
732 12:40:39.786830 APIC: 01: enabled 1
733 12:40:39.787256 APIC: 06: enabled 1
734 12:40:39.790189 APIC: 07: enabled 1
735 12:40:39.793772 APIC: 03: enabled 1
736 12:40:39.794198 APIC: 02: enabled 1
737 12:40:39.796942 APIC: 05: enabled 1
738 12:40:39.800204 APIC: 04: enabled 1
739 12:40:39.800689 Compare with tree...
740 12:40:39.803614 Root Device: enabled 1
741 12:40:39.807302 CPU_CLUSTER: 0: enabled 1
742 12:40:39.807890 APIC: 00: enabled 1
743 12:40:39.810893 APIC: 01: enabled 1
744 12:40:39.813942 APIC: 06: enabled 1
745 12:40:39.814452 APIC: 07: enabled 1
746 12:40:39.817111 APIC: 03: enabled 1
747 12:40:39.820298 APIC: 02: enabled 1
748 12:40:39.820782 APIC: 05: enabled 1
749 12:40:39.823266 APIC: 04: enabled 1
750 12:40:39.826700 DOMAIN: 0000: enabled 1
751 12:40:39.829861 PCI: 00:00.0: enabled 1
752 12:40:39.830338 PCI: 00:02.0: enabled 1
753 12:40:39.833371 PCI: 00:04.0: enabled 0
754 12:40:39.836760 PCI: 00:05.0: enabled 0
755 12:40:39.840178 PCI: 00:12.0: enabled 1
756 12:40:39.843056 PCI: 00:12.5: enabled 0
757 12:40:39.843559 PCI: 00:12.6: enabled 0
758 12:40:39.847100 PCI: 00:14.0: enabled 1
759 12:40:39.849826 USB0 port 0: enabled 1
760 12:40:39.853335 USB2 port 0: enabled 1
761 12:40:39.856803 USB2 port 1: enabled 1
762 12:40:39.857283 USB2 port 2: enabled 0
763 12:40:39.859769 USB2 port 3: enabled 0
764 12:40:39.863540 USB2 port 5: enabled 0
765 12:40:39.866214 USB2 port 6: enabled 1
766 12:40:39.869690 USB2 port 9: enabled 1
767 12:40:39.873152 USB3 port 0: enabled 1
768 12:40:39.873728 USB3 port 1: enabled 1
769 12:40:39.876194 USB3 port 2: enabled 1
770 12:40:39.879621 USB3 port 3: enabled 1
771 12:40:39.883251 USB3 port 4: enabled 0
772 12:40:39.886375 PCI: 00:14.1: enabled 0
773 12:40:39.886946 PCI: 00:14.3: enabled 1
774 12:40:39.889845 PCI: 00:14.5: enabled 0
775 12:40:39.892894 PCI: 00:15.0: enabled 1
776 12:40:39.896228 I2C: 00:15: enabled 1
777 12:40:39.899701 PCI: 00:15.1: enabled 1
778 12:40:39.900184 I2C: 00:5d: enabled 1
779 12:40:39.903303 GENERIC: 0.0: enabled 1
780 12:40:39.906430 PCI: 00:15.2: enabled 0
781 12:40:39.910003 PCI: 00:15.3: enabled 0
782 12:40:39.913098 PCI: 00:16.0: enabled 1
783 12:40:39.913780 PCI: 00:16.1: enabled 0
784 12:40:39.916309 PCI: 00:16.2: enabled 0
785 12:40:39.919943 PCI: 00:16.3: enabled 0
786 12:40:39.923261 PCI: 00:16.4: enabled 0
787 12:40:39.923970 PCI: 00:16.5: enabled 0
788 12:40:39.926243 PCI: 00:17.0: enabled 1
789 12:40:39.929814 PCI: 00:19.0: enabled 1
790 12:40:39.933165 I2C: 00:1a: enabled 1
791 12:40:39.936041 I2C: 00:38: enabled 1
792 12:40:39.936638 I2C: 00:39: enabled 1
793 12:40:39.939477 I2C: 00:3a: enabled 1
794 12:40:39.942862 I2C: 00:3b: enabled 1
795 12:40:39.946425 PCI: 00:19.1: enabled 0
796 12:40:39.946850 PCI: 00:19.2: enabled 0
797 12:40:39.949707 PCI: 00:1a.0: enabled 0
798 12:40:39.953061 PCI: 00:1c.0: enabled 0
799 12:40:39.956041 PCI: 00:1c.1: enabled 0
800 12:40:39.959329 PCI: 00:1c.2: enabled 0
801 12:40:39.959800 PCI: 00:1c.3: enabled 0
802 12:40:39.962630 PCI: 00:1c.4: enabled 0
803 12:40:39.966176 PCI: 00:1c.5: enabled 0
804 12:40:39.969301 PCI: 00:1c.6: enabled 0
805 12:40:39.972674 PCI: 00:1c.7: enabled 0
806 12:40:39.973097 PCI: 00:1d.0: enabled 1
807 12:40:39.976302 PCI: 00:1d.1: enabled 0
808 12:40:39.979349 PCI: 00:1d.2: enabled 0
809 12:40:39.983002 PCI: 00:1d.3: enabled 0
810 12:40:39.986231 PCI: 00:1d.4: enabled 0
811 12:40:39.986655 PCI: 00:1d.5: enabled 1
812 12:40:39.989190 PCI: 00:00.0: enabled 1
813 12:40:39.992777 PCI: 00:1e.0: enabled 1
814 12:40:39.996056 PCI: 00:1e.1: enabled 0
815 12:40:39.999056 PCI: 00:1e.2: enabled 1
816 12:40:39.999479 SPI: 00: enabled 1
817 12:40:40.002768 PCI: 00:1e.3: enabled 1
818 12:40:40.006179 SPI: 01: enabled 1
819 12:40:40.006602 PCI: 00:1f.0: enabled 1
820 12:40:40.009353 PNP: 0c09.0: enabled 1
821 12:40:40.012623 PCI: 00:1f.1: enabled 1
822 12:40:40.015715 PCI: 00:1f.2: enabled 1
823 12:40:40.019067 PCI: 00:1f.3: enabled 1
824 12:40:40.019526 PCI: 00:1f.4: enabled 1
825 12:40:40.022390 PCI: 00:1f.5: enabled 1
826 12:40:40.026185 PCI: 00:1f.6: enabled 0
827 12:40:40.028921 Root Device scanning...
828 12:40:40.032376 scan_static_bus for Root Device
829 12:40:40.035692 CPU_CLUSTER: 0 enabled
830 12:40:40.036115 DOMAIN: 0000 enabled
831 12:40:40.039144 DOMAIN: 0000 scanning...
832 12:40:40.042239 PCI: pci_scan_bus for bus 00
833 12:40:40.045530 PCI: 00:00.0 [8086/0000] ops
834 12:40:40.048999 PCI: 00:00.0 [8086/9b61] enabled
835 12:40:40.052633 PCI: 00:02.0 [8086/0000] bus ops
836 12:40:40.055755 PCI: 00:02.0 [8086/9b41] enabled
837 12:40:40.059163 PCI: 00:04.0 [8086/1903] disabled
838 12:40:40.062541 PCI: 00:08.0 [8086/1911] enabled
839 12:40:40.065767 PCI: 00:12.0 [8086/02f9] enabled
840 12:40:40.069158 PCI: 00:14.0 [8086/0000] bus ops
841 12:40:40.072292 PCI: 00:14.0 [8086/02ed] enabled
842 12:40:40.075748 PCI: 00:14.2 [8086/02ef] enabled
843 12:40:40.078748 PCI: 00:14.3 [8086/02f0] enabled
844 12:40:40.082217 PCI: 00:15.0 [8086/0000] bus ops
845 12:40:40.085744 PCI: 00:15.0 [8086/02e8] enabled
846 12:40:40.089027 PCI: 00:15.1 [8086/0000] bus ops
847 12:40:40.092008 PCI: 00:15.1 [8086/02e9] enabled
848 12:40:40.095274 PCI: 00:16.0 [8086/0000] ops
849 12:40:40.098889 PCI: 00:16.0 [8086/02e0] enabled
850 12:40:40.101997 PCI: 00:17.0 [8086/0000] ops
851 12:40:40.105722 PCI: 00:17.0 [8086/02d3] enabled
852 12:40:40.109083 PCI: 00:19.0 [8086/0000] bus ops
853 12:40:40.112369 PCI: 00:19.0 [8086/02c5] enabled
854 12:40:40.115367 PCI: 00:1d.0 [8086/0000] bus ops
855 12:40:40.118622 PCI: 00:1d.0 [8086/02b0] enabled
856 12:40:40.122372 PCI: Static device PCI: 00:1d.5 not found, disabling it.
857 12:40:40.125428 PCI: 00:1e.0 [8086/0000] ops
858 12:40:40.128444 PCI: 00:1e.0 [8086/02a8] enabled
859 12:40:40.131838 PCI: 00:1e.2 [8086/0000] bus ops
860 12:40:40.135290 PCI: 00:1e.2 [8086/02aa] enabled
861 12:40:40.138205 PCI: 00:1e.3 [8086/0000] bus ops
862 12:40:40.141655 PCI: 00:1e.3 [8086/02ab] enabled
863 12:40:40.145110 PCI: 00:1f.0 [8086/0000] bus ops
864 12:40:40.148436 PCI: 00:1f.0 [8086/0284] enabled
865 12:40:40.154842 PCI: Static device PCI: 00:1f.1 not found, disabling it.
866 12:40:40.161532 PCI: Static device PCI: 00:1f.2 not found, disabling it.
867 12:40:40.164840 PCI: 00:1f.3 [8086/0000] bus ops
868 12:40:40.168441 PCI: 00:1f.3 [8086/02c8] enabled
869 12:40:40.171490 PCI: 00:1f.4 [8086/0000] bus ops
870 12:40:40.174667 PCI: 00:1f.4 [8086/02a3] enabled
871 12:40:40.177940 PCI: 00:1f.5 [8086/0000] bus ops
872 12:40:40.181237 PCI: 00:1f.5 [8086/02a4] enabled
873 12:40:40.184720 PCI: Leftover static devices:
874 12:40:40.184806 PCI: 00:05.0
875 12:40:40.184873 PCI: 00:12.5
876 12:40:40.187865 PCI: 00:12.6
877 12:40:40.187950 PCI: 00:14.1
878 12:40:40.191588 PCI: 00:14.5
879 12:40:40.191721 PCI: 00:15.2
880 12:40:40.191789 PCI: 00:15.3
881 12:40:40.194385 PCI: 00:16.1
882 12:40:40.194468 PCI: 00:16.2
883 12:40:40.198292 PCI: 00:16.3
884 12:40:40.198376 PCI: 00:16.4
885 12:40:40.198442 PCI: 00:16.5
886 12:40:40.201334 PCI: 00:19.1
887 12:40:40.201417 PCI: 00:19.2
888 12:40:40.204640 PCI: 00:1a.0
889 12:40:40.204723 PCI: 00:1c.0
890 12:40:40.207926 PCI: 00:1c.1
891 12:40:40.208010 PCI: 00:1c.2
892 12:40:40.208076 PCI: 00:1c.3
893 12:40:40.211523 PCI: 00:1c.4
894 12:40:40.211644 PCI: 00:1c.5
895 12:40:40.215034 PCI: 00:1c.6
896 12:40:40.215130 PCI: 00:1c.7
897 12:40:40.215206 PCI: 00:1d.1
898 12:40:40.218276 PCI: 00:1d.2
899 12:40:40.218371 PCI: 00:1d.3
900 12:40:40.221549 PCI: 00:1d.4
901 12:40:40.221720 PCI: 00:1d.5
902 12:40:40.221850 PCI: 00:1e.1
903 12:40:40.224907 PCI: 00:1f.1
904 12:40:40.224990 PCI: 00:1f.2
905 12:40:40.228396 PCI: 00:1f.6
906 12:40:40.231445 PCI: Check your devicetree.cb.
907 12:40:40.231527 PCI: 00:02.0 scanning...
908 12:40:40.238080 scan_generic_bus for PCI: 00:02.0
909 12:40:40.241809 scan_generic_bus for PCI: 00:02.0 done
910 12:40:40.244491 scan_bus: scanning of bus PCI: 00:02.0 took 10185 usecs
911 12:40:40.247864 PCI: 00:14.0 scanning...
912 12:40:40.251465 scan_static_bus for PCI: 00:14.0
913 12:40:40.254289 USB0 port 0 enabled
914 12:40:40.258284 USB0 port 0 scanning...
915 12:40:40.261317 scan_static_bus for USB0 port 0
916 12:40:40.261499 USB2 port 0 enabled
917 12:40:40.264658 USB2 port 1 enabled
918 12:40:40.268025 USB2 port 2 disabled
919 12:40:40.268215 USB2 port 3 disabled
920 12:40:40.271669 USB2 port 5 disabled
921 12:40:40.271870 USB2 port 6 enabled
922 12:40:40.274671 USB2 port 9 enabled
923 12:40:40.278187 USB3 port 0 enabled
924 12:40:40.278775 USB3 port 1 enabled
925 12:40:40.281457 USB3 port 2 enabled
926 12:40:40.284625 USB3 port 3 enabled
927 12:40:40.285195 USB3 port 4 disabled
928 12:40:40.288226 USB2 port 0 scanning...
929 12:40:40.291717 scan_static_bus for USB2 port 0
930 12:40:40.294850 scan_static_bus for USB2 port 0 done
931 12:40:40.301253 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
932 12:40:40.301812 USB2 port 1 scanning...
933 12:40:40.304714 scan_static_bus for USB2 port 1
934 12:40:40.311263 scan_static_bus for USB2 port 1 done
935 12:40:40.314398 scan_bus: scanning of bus USB2 port 1 took 9702 usecs
936 12:40:40.318071 USB2 port 6 scanning...
937 12:40:40.321019 scan_static_bus for USB2 port 6
938 12:40:40.324760 scan_static_bus for USB2 port 6 done
939 12:40:40.331221 scan_bus: scanning of bus USB2 port 6 took 9706 usecs
940 12:40:40.331741 USB2 port 9 scanning...
941 12:40:40.334467 scan_static_bus for USB2 port 9
942 12:40:40.341170 scan_static_bus for USB2 port 9 done
943 12:40:40.344689 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
944 12:40:40.347946 USB3 port 0 scanning...
945 12:40:40.351069 scan_static_bus for USB3 port 0
946 12:40:40.354766 scan_static_bus for USB3 port 0 done
947 12:40:40.361368 scan_bus: scanning of bus USB3 port 0 took 9698 usecs
948 12:40:40.362005 USB3 port 1 scanning...
949 12:40:40.364530 scan_static_bus for USB3 port 1
950 12:40:40.371109 scan_static_bus for USB3 port 1 done
951 12:40:40.374624 scan_bus: scanning of bus USB3 port 1 took 9693 usecs
952 12:40:40.377766 USB3 port 2 scanning...
953 12:40:40.381026 scan_static_bus for USB3 port 2
954 12:40:40.384253 scan_static_bus for USB3 port 2 done
955 12:40:40.391359 scan_bus: scanning of bus USB3 port 2 took 9709 usecs
956 12:40:40.391915 USB3 port 3 scanning...
957 12:40:40.394609 scan_static_bus for USB3 port 3
958 12:40:40.401149 scan_static_bus for USB3 port 3 done
959 12:40:40.404668 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
960 12:40:40.407450 scan_static_bus for USB0 port 0 done
961 12:40:40.414136 scan_bus: scanning of bus USB0 port 0 took 155376 usecs
962 12:40:40.417436 scan_static_bus for PCI: 00:14.0 done
963 12:40:40.424409 scan_bus: scanning of bus PCI: 00:14.0 took 172998 usecs
964 12:40:40.427331 PCI: 00:15.0 scanning...
965 12:40:40.430708 scan_generic_bus for PCI: 00:15.0
966 12:40:40.434343 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
967 12:40:40.437213 scan_generic_bus for PCI: 00:15.0 done
968 12:40:40.443892 scan_bus: scanning of bus PCI: 00:15.0 took 14294 usecs
969 12:40:40.447621 PCI: 00:15.1 scanning...
970 12:40:40.450788 scan_generic_bus for PCI: 00:15.1
971 12:40:40.454156 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
972 12:40:40.457608 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
973 12:40:40.460907 scan_generic_bus for PCI: 00:15.1 done
974 12:40:40.467225 scan_bus: scanning of bus PCI: 00:15.1 took 18601 usecs
975 12:40:40.470850 PCI: 00:19.0 scanning...
976 12:40:40.473989 scan_generic_bus for PCI: 00:19.0
977 12:40:40.477246 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
978 12:40:40.480381 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
979 12:40:40.487239 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
980 12:40:40.490481 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
981 12:40:40.493725 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
982 12:40:40.497253 scan_generic_bus for PCI: 00:19.0 done
983 12:40:40.503526 scan_bus: scanning of bus PCI: 00:19.0 took 30748 usecs
984 12:40:40.506890 PCI: 00:1d.0 scanning...
985 12:40:40.510389 do_pci_scan_bridge for PCI: 00:1d.0
986 12:40:40.513726 PCI: pci_scan_bus for bus 01
987 12:40:40.517034 PCI: 01:00.0 [1c5c/1327] enabled
988 12:40:40.520110 Enabling Common Clock Configuration
989 12:40:40.523378 L1 Sub-State supported from root port 29
990 12:40:40.526976 L1 Sub-State Support = 0xf
991 12:40:40.530263 CommonModeRestoreTime = 0x28
992 12:40:40.533822 Power On Value = 0x16, Power On Scale = 0x0
993 12:40:40.537254 ASPM: Enabled L1
994 12:40:40.540273 scan_bus: scanning of bus PCI: 00:1d.0 took 32796 usecs
995 12:40:40.543513 PCI: 00:1e.2 scanning...
996 12:40:40.547002 scan_generic_bus for PCI: 00:1e.2
997 12:40:40.549999 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
998 12:40:40.556740 scan_generic_bus for PCI: 00:1e.2 done
999 12:40:40.560336 scan_bus: scanning of bus PCI: 00:1e.2 took 14013 usecs
1000 12:40:40.563556 PCI: 00:1e.3 scanning...
1001 12:40:40.566658 scan_generic_bus for PCI: 00:1e.3
1002 12:40:40.570332 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1003 12:40:40.573448 scan_generic_bus for PCI: 00:1e.3 done
1004 12:40:40.580022 scan_bus: scanning of bus PCI: 00:1e.3 took 14016 usecs
1005 12:40:40.583257 PCI: 00:1f.0 scanning...
1006 12:40:40.586590 scan_static_bus for PCI: 00:1f.0
1007 12:40:40.589967 PNP: 0c09.0 enabled
1008 12:40:40.593306 scan_static_bus for PCI: 00:1f.0 done
1009 12:40:40.596737 scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs
1010 12:40:40.600226 PCI: 00:1f.3 scanning...
1011 12:40:40.606560 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1012 12:40:40.610090 PCI: 00:1f.4 scanning...
1013 12:40:40.613400 scan_generic_bus for PCI: 00:1f.4
1014 12:40:40.616289 scan_generic_bus for PCI: 00:1f.4 done
1015 12:40:40.623390 scan_bus: scanning of bus PCI: 00:1f.4 took 10178 usecs
1016 12:40:40.623474 PCI: 00:1f.5 scanning...
1017 12:40:40.629964 scan_generic_bus for PCI: 00:1f.5
1018 12:40:40.633242 scan_generic_bus for PCI: 00:1f.5 done
1019 12:40:40.636303 scan_bus: scanning of bus PCI: 00:1f.5 took 10189 usecs
1020 12:40:40.643132 scan_bus: scanning of bus DOMAIN: 0000 took 605071 usecs
1021 12:40:40.646547 scan_static_bus for Root Device done
1022 12:40:40.652724 scan_bus: scanning of bus Root Device took 624945 usecs
1023 12:40:40.652809 done
1024 12:40:40.656290 Chrome EC: UHEPI supported
1025 12:40:40.663251 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1026 12:40:40.669593 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1027 12:40:40.672955 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1028 12:40:40.681421 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1029 12:40:40.684449 SPI flash protection: WPSW=1 SRP0=0
1030 12:40:40.690738 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1031 12:40:40.694396 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1032 12:40:40.697594 found VGA at PCI: 00:02.0
1033 12:40:40.700721 Setting up VGA for PCI: 00:02.0
1034 12:40:40.707717 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1035 12:40:40.710722 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1036 12:40:40.714250 Allocating resources...
1037 12:40:40.717218 Reading resources...
1038 12:40:40.720741 Root Device read_resources bus 0 link: 0
1039 12:40:40.724236 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1040 12:40:40.730616 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1041 12:40:40.734204 DOMAIN: 0000 read_resources bus 0 link: 0
1042 12:40:40.741395 PCI: 00:14.0 read_resources bus 0 link: 0
1043 12:40:40.744785 USB0 port 0 read_resources bus 0 link: 0
1044 12:40:40.753102 USB0 port 0 read_resources bus 0 link: 0 done
1045 12:40:40.755934 PCI: 00:14.0 read_resources bus 0 link: 0 done
1046 12:40:40.763481 PCI: 00:15.0 read_resources bus 1 link: 0
1047 12:40:40.766820 PCI: 00:15.0 read_resources bus 1 link: 0 done
1048 12:40:40.773557 PCI: 00:15.1 read_resources bus 2 link: 0
1049 12:40:40.776614 PCI: 00:15.1 read_resources bus 2 link: 0 done
1050 12:40:40.784492 PCI: 00:19.0 read_resources bus 3 link: 0
1051 12:40:40.790665 PCI: 00:19.0 read_resources bus 3 link: 0 done
1052 12:40:40.794108 PCI: 00:1d.0 read_resources bus 1 link: 0
1053 12:40:40.800837 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1054 12:40:40.803965 PCI: 00:1e.2 read_resources bus 4 link: 0
1055 12:40:40.810889 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1056 12:40:40.814001 PCI: 00:1e.3 read_resources bus 5 link: 0
1057 12:40:40.820359 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1058 12:40:40.823866 PCI: 00:1f.0 read_resources bus 0 link: 0
1059 12:40:40.830837 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1060 12:40:40.836854 DOMAIN: 0000 read_resources bus 0 link: 0 done
1061 12:40:40.840203 Root Device read_resources bus 0 link: 0 done
1062 12:40:40.843693 Done reading resources.
1063 12:40:40.847139 Show resources in subtree (Root Device)...After reading.
1064 12:40:40.853743 Root Device child on link 0 CPU_CLUSTER: 0
1065 12:40:40.856848 CPU_CLUSTER: 0 child on link 0 APIC: 00
1066 12:40:40.856931 APIC: 00
1067 12:40:40.860445 APIC: 01
1068 12:40:40.860527 APIC: 06
1069 12:40:40.863813 APIC: 07
1070 12:40:40.863903 APIC: 03
1071 12:40:40.863970 APIC: 02
1072 12:40:40.866720 APIC: 05
1073 12:40:40.866818 APIC: 04
1074 12:40:40.870289 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1075 12:40:40.880083 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1076 12:40:40.930086 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1077 12:40:40.930213 PCI: 00:00.0
1078 12:40:40.930826 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1079 12:40:40.931079 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1080 12:40:40.931336 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1081 12:40:40.931412 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1082 12:40:40.979683 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1083 12:40:40.979968 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1084 12:40:40.980233 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1085 12:40:40.980322 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1086 12:40:40.981134 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1087 12:40:41.029143 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1088 12:40:41.029461 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1089 12:40:41.029904 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1090 12:40:41.030645 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1091 12:40:41.030948 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1092 12:40:41.034402 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1093 12:40:41.040780 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1094 12:40:41.044277 PCI: 00:02.0
1095 12:40:41.054056 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1096 12:40:41.063923 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1097 12:40:41.074204 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1098 12:40:41.074282 PCI: 00:04.0
1099 12:40:41.077114 PCI: 00:08.0
1100 12:40:41.087030 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1101 12:40:41.087141 PCI: 00:12.0
1102 12:40:41.097408 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 12:40:41.104092 PCI: 00:14.0 child on link 0 USB0 port 0
1104 12:40:41.113695 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1105 12:40:41.116926 USB0 port 0 child on link 0 USB2 port 0
1106 12:40:41.117001 USB2 port 0
1107 12:40:41.120417 USB2 port 1
1108 12:40:41.120497 USB2 port 2
1109 12:40:41.123583 USB2 port 3
1110 12:40:41.127068 USB2 port 5
1111 12:40:41.127166 USB2 port 6
1112 12:40:41.130519 USB2 port 9
1113 12:40:41.130591 USB3 port 0
1114 12:40:41.133539 USB3 port 1
1115 12:40:41.133613 USB3 port 2
1116 12:40:41.136762 USB3 port 3
1117 12:40:41.136835 USB3 port 4
1118 12:40:41.140486 PCI: 00:14.2
1119 12:40:41.149983 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1120 12:40:41.160525 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1121 12:40:41.160607 PCI: 00:14.3
1122 12:40:41.169801 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1123 12:40:41.176493 PCI: 00:15.0 child on link 0 I2C: 01:15
1124 12:40:41.186858 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 12:40:41.186961 I2C: 01:15
1126 12:40:41.190164 PCI: 00:15.1 child on link 0 I2C: 02:5d
1127 12:40:41.199818 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1128 12:40:41.202853 I2C: 02:5d
1129 12:40:41.202926 GENERIC: 0.0
1130 12:40:41.206369 PCI: 00:16.0
1131 12:40:41.216074 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 12:40:41.216152 PCI: 00:17.0
1133 12:40:41.226464 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1134 12:40:41.236158 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1135 12:40:41.242664 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1136 12:40:41.252504 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1137 12:40:41.259230 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1138 12:40:41.269476 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1139 12:40:41.272527 PCI: 00:19.0 child on link 0 I2C: 03:1a
1140 12:40:41.282761 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 12:40:41.285795 I2C: 03:1a
1142 12:40:41.285894 I2C: 03:38
1143 12:40:41.289185 I2C: 03:39
1144 12:40:41.289283 I2C: 03:3a
1145 12:40:41.292568 I2C: 03:3b
1146 12:40:41.295536 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1147 12:40:41.305816 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1148 12:40:41.315508 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1149 12:40:41.322150 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1150 12:40:41.325289 PCI: 01:00.0
1151 12:40:41.335477 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 12:40:41.335587 PCI: 00:1e.0
1153 12:40:41.348530 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1154 12:40:41.358707 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1155 12:40:41.361817 PCI: 00:1e.2 child on link 0 SPI: 00
1156 12:40:41.372208 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 12:40:41.372354 SPI: 00
1158 12:40:41.375155 PCI: 00:1e.3 child on link 0 SPI: 01
1159 12:40:41.385523 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 12:40:41.388299 SPI: 01
1161 12:40:41.391553 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1162 12:40:41.401966 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1163 12:40:41.408663 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1164 12:40:41.411471 PNP: 0c09.0
1165 12:40:41.421824 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1166 12:40:41.421928 PCI: 00:1f.3
1167 12:40:41.431829 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 12:40:41.441686 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1169 12:40:41.445073 PCI: 00:1f.4
1170 12:40:41.451581 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1171 12:40:41.461480 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1172 12:40:41.464731 PCI: 00:1f.5
1173 12:40:41.475047 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1174 12:40:41.478292 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1175 12:40:41.484705 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1176 12:40:41.491146 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1177 12:40:41.498151 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1178 12:40:41.501309 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1179 12:40:41.504864 PCI: 00:17.0 18 * [0x60 - 0x67] io
1180 12:40:41.508219 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1181 12:40:41.514502 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1182 12:40:41.521074 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1183 12:40:41.528099 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1184 12:40:41.538194 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1185 12:40:41.544404 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1186 12:40:41.547840 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1187 12:40:41.554308 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1188 12:40:41.560980 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1189 12:40:41.564437 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1190 12:40:41.571126 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1191 12:40:41.574581 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1192 12:40:41.580825 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1193 12:40:41.584141 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1194 12:40:41.590964 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1195 12:40:41.594352 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1196 12:40:41.597453 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1197 12:40:41.604333 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1198 12:40:41.607361 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1199 12:40:41.613989 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1200 12:40:41.617084 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1201 12:40:41.623718 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1202 12:40:41.627108 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1203 12:40:41.634017 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1204 12:40:41.637238 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1205 12:40:41.643611 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1206 12:40:41.647019 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1207 12:40:41.654094 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1208 12:40:41.656740 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1209 12:40:41.663564 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1210 12:40:41.666952 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1211 12:40:41.677065 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1212 12:40:41.680256 avoid_fixed_resources: DOMAIN: 0000
1213 12:40:41.683646 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 12:40:41.689916 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 12:40:41.700225 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 12:40:41.706975 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1217 12:40:41.713219 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1218 12:40:41.723437 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1219 12:40:41.730218 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1220 12:40:41.736602 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 12:40:41.742918 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 12:40:41.752831 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 12:40:41.760059 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 12:40:41.766435 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 12:40:41.769692 Setting resources...
1226 12:40:41.776317 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 12:40:41.779753 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 12:40:41.782854 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 12:40:41.786207 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 12:40:41.792859 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 12:40:41.796255 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 12:40:41.802737 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 12:40:41.809226 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 12:40:41.819297 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1235 12:40:41.822454 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 12:40:41.829105 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 12:40:41.832595 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 12:40:41.835605 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1239 12:40:41.842262 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1240 12:40:41.845795 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1241 12:40:41.852234 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1242 12:40:41.855686 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1243 12:40:41.862477 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1244 12:40:41.865799 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1245 12:40:41.872335 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1246 12:40:41.875417 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1247 12:40:41.882135 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1248 12:40:41.885359 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1249 12:40:41.892054 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1250 12:40:41.895469 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1251 12:40:41.901938 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1252 12:40:41.905555 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1253 12:40:41.908821 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1254 12:40:41.915173 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1255 12:40:41.918377 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1256 12:40:41.925097 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1257 12:40:41.928470 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1258 12:40:41.938185 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1259 12:40:41.944991 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1260 12:40:41.951610 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1261 12:40:41.958305 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1262 12:40:41.964731 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1263 12:40:41.971760 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1264 12:40:41.975052 Root Device assign_resources, bus 0 link: 0
1265 12:40:41.981491 DOMAIN: 0000 assign_resources, bus 0 link: 0
1266 12:40:41.987776 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1267 12:40:41.997842 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1268 12:40:42.004468 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1269 12:40:42.014516 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1270 12:40:42.021000 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1271 12:40:42.031022 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1272 12:40:42.034599 PCI: 00:14.0 assign_resources, bus 0 link: 0
1273 12:40:42.040972 PCI: 00:14.0 assign_resources, bus 0 link: 0
1274 12:40:42.047430 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1275 12:40:42.057495 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1276 12:40:42.063857 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1277 12:40:42.073642 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1278 12:40:42.077041 PCI: 00:15.0 assign_resources, bus 1 link: 0
1279 12:40:42.080915 PCI: 00:15.0 assign_resources, bus 1 link: 0
1280 12:40:42.090639 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1281 12:40:42.094255 PCI: 00:15.1 assign_resources, bus 2 link: 0
1282 12:40:42.100632 PCI: 00:15.1 assign_resources, bus 2 link: 0
1283 12:40:42.107407 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1284 12:40:42.117127 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1285 12:40:42.123866 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1286 12:40:42.130219 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1287 12:40:42.136865 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1288 12:40:42.147110 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1289 12:40:42.153556 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1290 12:40:42.163710 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1291 12:40:42.166828 PCI: 00:19.0 assign_resources, bus 3 link: 0
1292 12:40:42.170158 PCI: 00:19.0 assign_resources, bus 3 link: 0
1293 12:40:42.180254 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1294 12:40:42.190345 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1295 12:40:42.196950 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1296 12:40:42.203347 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1297 12:40:42.210013 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1298 12:40:42.216886 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1299 12:40:42.223300 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1300 12:40:42.233435 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1301 12:40:42.236505 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1302 12:40:42.239848 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1303 12:40:42.249695 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1304 12:40:42.253129 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1305 12:40:42.259462 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1306 12:40:42.262741 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1307 12:40:42.269349 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1308 12:40:42.272773 LPC: Trying to open IO window from 800 size 1ff
1309 12:40:42.282410 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1310 12:40:42.289141 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1311 12:40:42.298931 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1312 12:40:42.305992 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1313 12:40:42.308967 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 12:40:42.316020 Root Device assign_resources, bus 0 link: 0
1315 12:40:42.319761 Done setting resources.
1316 12:40:42.325691 Show resources in subtree (Root Device)...After assigning values.
1317 12:40:42.329175 Root Device child on link 0 CPU_CLUSTER: 0
1318 12:40:42.332648 CPU_CLUSTER: 0 child on link 0 APIC: 00
1319 12:40:42.332761 APIC: 00
1320 12:40:42.335856 APIC: 01
1321 12:40:42.335930 APIC: 06
1322 12:40:42.339185 APIC: 07
1323 12:40:42.339263 APIC: 03
1324 12:40:42.339328 APIC: 02
1325 12:40:42.342877 APIC: 05
1326 12:40:42.342958 APIC: 04
1327 12:40:42.345994 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1328 12:40:42.355749 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1329 12:40:42.369203 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1330 12:40:42.369286 PCI: 00:00.0
1331 12:40:42.378805 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1332 12:40:42.388749 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1333 12:40:42.398944 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1334 12:40:42.408414 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1335 12:40:42.415597 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1336 12:40:42.425204 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1337 12:40:42.434880 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1338 12:40:42.444889 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1339 12:40:42.455068 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1340 12:40:42.461264 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1341 12:40:42.471565 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1342 12:40:42.481636 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1343 12:40:42.491308 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1344 12:40:42.500856 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1345 12:40:42.510716 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1346 12:40:42.520818 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1347 12:40:42.520896 PCI: 00:02.0
1348 12:40:42.530915 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1349 12:40:42.544073 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1350 12:40:42.550749 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1351 12:40:42.553835 PCI: 00:04.0
1352 12:40:42.553920 PCI: 00:08.0
1353 12:40:42.566924 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1354 12:40:42.567005 PCI: 00:12.0
1355 12:40:42.576895 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1356 12:40:42.580405 PCI: 00:14.0 child on link 0 USB0 port 0
1357 12:40:42.593796 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1358 12:40:42.596991 USB0 port 0 child on link 0 USB2 port 0
1359 12:40:42.597071 USB2 port 0
1360 12:40:42.600018 USB2 port 1
1361 12:40:42.603220 USB2 port 2
1362 12:40:42.603296 USB2 port 3
1363 12:40:42.606718 USB2 port 5
1364 12:40:42.606802 USB2 port 6
1365 12:40:42.609911 USB2 port 9
1366 12:40:42.610004 USB3 port 0
1367 12:40:42.613455 USB3 port 1
1368 12:40:42.613537 USB3 port 2
1369 12:40:42.616715 USB3 port 3
1370 12:40:42.616799 USB3 port 4
1371 12:40:42.619806 PCI: 00:14.2
1372 12:40:42.629996 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1373 12:40:42.639874 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1374 12:40:42.642868 PCI: 00:14.3
1375 12:40:42.653168 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1376 12:40:42.656555 PCI: 00:15.0 child on link 0 I2C: 01:15
1377 12:40:42.666153 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1378 12:40:42.669483 I2C: 01:15
1379 12:40:42.672794 PCI: 00:15.1 child on link 0 I2C: 02:5d
1380 12:40:42.682884 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1381 12:40:42.682969 I2C: 02:5d
1382 12:40:42.685876 GENERIC: 0.0
1383 12:40:42.685953 PCI: 00:16.0
1384 12:40:42.698975 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1385 12:40:42.699056 PCI: 00:17.0
1386 12:40:42.708890 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1387 12:40:42.718926 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1388 12:40:42.728846 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1389 12:40:42.738772 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1390 12:40:42.748964 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1391 12:40:42.758543 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1392 12:40:42.762001 PCI: 00:19.0 child on link 0 I2C: 03:1a
1393 12:40:42.771616 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1394 12:40:42.771706 I2C: 03:1a
1395 12:40:42.774934 I2C: 03:38
1396 12:40:42.775010 I2C: 03:39
1397 12:40:42.778270 I2C: 03:3a
1398 12:40:42.778347 I2C: 03:3b
1399 12:40:42.784930 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1400 12:40:42.795214 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1401 12:40:42.805082 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1402 12:40:42.814891 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1403 12:40:42.814973 PCI: 01:00.0
1404 12:40:42.824707 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1405 12:40:42.828081 PCI: 00:1e.0
1406 12:40:42.837885 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1407 12:40:42.847957 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1408 12:40:42.854298 PCI: 00:1e.2 child on link 0 SPI: 00
1409 12:40:42.864260 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1410 12:40:42.864342 SPI: 00
1411 12:40:42.867725 PCI: 00:1e.3 child on link 0 SPI: 01
1412 12:40:42.877749 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1413 12:40:42.881119 SPI: 01
1414 12:40:42.884295 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 12:40:42.894233 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 12:40:42.900645 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1417 12:40:42.904069 PNP: 0c09.0
1418 12:40:42.913618 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 12:40:42.913723 PCI: 00:1f.3
1420 12:40:42.923553 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1421 12:40:42.933811 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1422 12:40:42.936677 PCI: 00:1f.4
1423 12:40:42.946832 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1424 12:40:42.956716 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1425 12:40:42.956805 PCI: 00:1f.5
1426 12:40:42.966775 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1427 12:40:42.969809 Done allocating resources.
1428 12:40:42.976853 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1429 12:40:42.979790 Enabling resources...
1430 12:40:42.983224 PCI: 00:00.0 subsystem <- 8086/9b61
1431 12:40:42.986726 PCI: 00:00.0 cmd <- 06
1432 12:40:42.989924 PCI: 00:02.0 subsystem <- 8086/9b41
1433 12:40:42.993354 PCI: 00:02.0 cmd <- 03
1434 12:40:42.993436 PCI: 00:08.0 cmd <- 06
1435 12:40:43.000140 PCI: 00:12.0 subsystem <- 8086/02f9
1436 12:40:43.000222 PCI: 00:12.0 cmd <- 02
1437 12:40:43.003156 PCI: 00:14.0 subsystem <- 8086/02ed
1438 12:40:43.006500 PCI: 00:14.0 cmd <- 02
1439 12:40:43.009860 PCI: 00:14.2 cmd <- 02
1440 12:40:43.013346 PCI: 00:14.3 subsystem <- 8086/02f0
1441 12:40:43.016202 PCI: 00:14.3 cmd <- 02
1442 12:40:43.019749 PCI: 00:15.0 subsystem <- 8086/02e8
1443 12:40:43.022876 PCI: 00:15.0 cmd <- 02
1444 12:40:43.026460 PCI: 00:15.1 subsystem <- 8086/02e9
1445 12:40:43.029657 PCI: 00:15.1 cmd <- 02
1446 12:40:43.032834 PCI: 00:16.0 subsystem <- 8086/02e0
1447 12:40:43.036213 PCI: 00:16.0 cmd <- 02
1448 12:40:43.039550 PCI: 00:17.0 subsystem <- 8086/02d3
1449 12:40:43.039641 PCI: 00:17.0 cmd <- 03
1450 12:40:43.046222 PCI: 00:19.0 subsystem <- 8086/02c5
1451 12:40:43.046305 PCI: 00:19.0 cmd <- 02
1452 12:40:43.049687 PCI: 00:1d.0 bridge ctrl <- 0013
1453 12:40:43.052742 PCI: 00:1d.0 subsystem <- 8086/02b0
1454 12:40:43.056043 PCI: 00:1d.0 cmd <- 06
1455 12:40:43.059445 PCI: 00:1e.0 subsystem <- 8086/02a8
1456 12:40:43.062969 PCI: 00:1e.0 cmd <- 06
1457 12:40:43.066451 PCI: 00:1e.2 subsystem <- 8086/02aa
1458 12:40:43.069430 PCI: 00:1e.2 cmd <- 06
1459 12:40:43.073058 PCI: 00:1e.3 subsystem <- 8086/02ab
1460 12:40:43.076362 PCI: 00:1e.3 cmd <- 02
1461 12:40:43.079417 PCI: 00:1f.0 subsystem <- 8086/0284
1462 12:40:43.082951 PCI: 00:1f.0 cmd <- 407
1463 12:40:43.085932 PCI: 00:1f.3 subsystem <- 8086/02c8
1464 12:40:43.089541 PCI: 00:1f.3 cmd <- 02
1465 12:40:43.092565 PCI: 00:1f.4 subsystem <- 8086/02a3
1466 12:40:43.095605 PCI: 00:1f.4 cmd <- 03
1467 12:40:43.099136 PCI: 00:1f.5 subsystem <- 8086/02a4
1468 12:40:43.102153 PCI: 00:1f.5 cmd <- 406
1469 12:40:43.110016 PCI: 01:00.0 cmd <- 02
1470 12:40:43.115093 done.
1471 12:40:43.128135 ME: Version: 14.0.39.1367
1472 12:40:43.134685 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1473 12:40:43.137585 Initializing devices...
1474 12:40:43.137666 Root Device init ...
1475 12:40:43.144407 Chrome EC: Set SMI mask to 0x0000000000000000
1476 12:40:43.147512 Chrome EC: clear events_b mask to 0x0000000000000000
1477 12:40:43.154280 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1478 12:40:43.161260 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1479 12:40:43.167690 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1480 12:40:43.170821 Chrome EC: Set WAKE mask to 0x0000000000000000
1481 12:40:43.174422 Root Device init finished in 35154 usecs
1482 12:40:43.177719 CPU_CLUSTER: 0 init ...
1483 12:40:43.184169 CPU_CLUSTER: 0 init finished in 2447 usecs
1484 12:40:43.188487 PCI: 00:00.0 init ...
1485 12:40:43.191901 CPU TDP: 15 Watts
1486 12:40:43.195287 CPU PL2 = 64 Watts
1487 12:40:43.198543 PCI: 00:00.0 init finished in 7079 usecs
1488 12:40:43.202102 PCI: 00:02.0 init ...
1489 12:40:43.205172 PCI: 00:02.0 init finished in 2252 usecs
1490 12:40:43.208429 PCI: 00:08.0 init ...
1491 12:40:43.211872 PCI: 00:08.0 init finished in 2253 usecs
1492 12:40:43.215338 PCI: 00:12.0 init ...
1493 12:40:43.218625 PCI: 00:12.0 init finished in 2252 usecs
1494 12:40:43.221884 PCI: 00:14.0 init ...
1495 12:40:43.225250 PCI: 00:14.0 init finished in 2251 usecs
1496 12:40:43.228219 PCI: 00:14.2 init ...
1497 12:40:43.231622 PCI: 00:14.2 init finished in 2251 usecs
1498 12:40:43.234952 PCI: 00:14.3 init ...
1499 12:40:43.238160 PCI: 00:14.3 init finished in 2268 usecs
1500 12:40:43.242018 PCI: 00:15.0 init ...
1501 12:40:43.245111 DW I2C bus 0 at 0xd121f000 (400 KHz)
1502 12:40:43.248255 PCI: 00:15.0 init finished in 5975 usecs
1503 12:40:43.251497 PCI: 00:15.1 init ...
1504 12:40:43.254797 DW I2C bus 1 at 0xd1220000 (400 KHz)
1505 12:40:43.261481 PCI: 00:15.1 init finished in 5959 usecs
1506 12:40:43.261565 PCI: 00:16.0 init ...
1507 12:40:43.268020 PCI: 00:16.0 init finished in 2252 usecs
1508 12:40:43.268103 PCI: 00:19.0 init ...
1509 12:40:43.274469 DW I2C bus 4 at 0xd1222000 (400 KHz)
1510 12:40:43.278169 PCI: 00:19.0 init finished in 5976 usecs
1511 12:40:43.281547 PCI: 00:1d.0 init ...
1512 12:40:43.284682 Initializing PCH PCIe bridge.
1513 12:40:43.287906 PCI: 00:1d.0 init finished in 5284 usecs
1514 12:40:43.291131 PCI: 00:1f.0 init ...
1515 12:40:43.294366 IOAPIC: Initializing IOAPIC at 0xfec00000
1516 12:40:43.301330 IOAPIC: Bootstrap Processor Local APIC = 0x00
1517 12:40:43.301458 IOAPIC: ID = 0x02
1518 12:40:43.304373 IOAPIC: Dumping registers
1519 12:40:43.307509 reg 0x0000: 0x02000000
1520 12:40:43.311234 reg 0x0001: 0x00770020
1521 12:40:43.311317 reg 0x0002: 0x00000000
1522 12:40:43.317550 PCI: 00:1f.0 init finished in 23539 usecs
1523 12:40:43.321069 PCI: 00:1f.4 init ...
1524 12:40:43.324462 PCI: 00:1f.4 init finished in 2263 usecs
1525 12:40:43.334496 PCI: 01:00.0 init ...
1526 12:40:43.338018 PCI: 01:00.0 init finished in 2243 usecs
1527 12:40:43.342226 PNP: 0c09.0 init ...
1528 12:40:43.345407 Google Chrome EC uptime: 11.099 seconds
1529 12:40:43.352046 Google Chrome AP resets since EC boot: 0
1530 12:40:43.355564 Google Chrome most recent AP reset causes:
1531 12:40:43.362138 Google Chrome EC reset flags at last EC boot: reset-pin
1532 12:40:43.365301 PNP: 0c09.0 init finished in 20560 usecs
1533 12:40:43.368809 Devices initialized
1534 12:40:43.371848 Show all devs... After init.
1535 12:40:43.371931 Root Device: enabled 1
1536 12:40:43.375262 CPU_CLUSTER: 0: enabled 1
1537 12:40:43.378502 DOMAIN: 0000: enabled 1
1538 12:40:43.378599 APIC: 00: enabled 1
1539 12:40:43.381592 PCI: 00:00.0: enabled 1
1540 12:40:43.384902 PCI: 00:02.0: enabled 1
1541 12:40:43.388315 PCI: 00:04.0: enabled 0
1542 12:40:43.388396 PCI: 00:05.0: enabled 0
1543 12:40:43.391444 PCI: 00:12.0: enabled 1
1544 12:40:43.394919 PCI: 00:12.5: enabled 0
1545 12:40:43.398414 PCI: 00:12.6: enabled 0
1546 12:40:43.398496 PCI: 00:14.0: enabled 1
1547 12:40:43.401726 PCI: 00:14.1: enabled 0
1548 12:40:43.404731 PCI: 00:14.3: enabled 1
1549 12:40:43.408032 PCI: 00:14.5: enabled 0
1550 12:40:43.408114 PCI: 00:15.0: enabled 1
1551 12:40:43.411424 PCI: 00:15.1: enabled 1
1552 12:40:43.414673 PCI: 00:15.2: enabled 0
1553 12:40:43.414756 PCI: 00:15.3: enabled 0
1554 12:40:43.418067 PCI: 00:16.0: enabled 1
1555 12:40:43.421663 PCI: 00:16.1: enabled 0
1556 12:40:43.424611 PCI: 00:16.2: enabled 0
1557 12:40:43.424694 PCI: 00:16.3: enabled 0
1558 12:40:43.428073 PCI: 00:16.4: enabled 0
1559 12:40:43.431464 PCI: 00:16.5: enabled 0
1560 12:40:43.434515 PCI: 00:17.0: enabled 1
1561 12:40:43.434598 PCI: 00:19.0: enabled 1
1562 12:40:43.437823 PCI: 00:19.1: enabled 0
1563 12:40:43.441332 PCI: 00:19.2: enabled 0
1564 12:40:43.444745 PCI: 00:1a.0: enabled 0
1565 12:40:43.444829 PCI: 00:1c.0: enabled 0
1566 12:40:43.447818 PCI: 00:1c.1: enabled 0
1567 12:40:43.451213 PCI: 00:1c.2: enabled 0
1568 12:40:43.451313 PCI: 00:1c.3: enabled 0
1569 12:40:43.454569 PCI: 00:1c.4: enabled 0
1570 12:40:43.457938 PCI: 00:1c.5: enabled 0
1571 12:40:43.460996 PCI: 00:1c.6: enabled 0
1572 12:40:43.461084 PCI: 00:1c.7: enabled 0
1573 12:40:43.464420 PCI: 00:1d.0: enabled 1
1574 12:40:43.467735 PCI: 00:1d.1: enabled 0
1575 12:40:43.471132 PCI: 00:1d.2: enabled 0
1576 12:40:43.471247 PCI: 00:1d.3: enabled 0
1577 12:40:43.474248 PCI: 00:1d.4: enabled 0
1578 12:40:43.477775 PCI: 00:1d.5: enabled 0
1579 12:40:43.481123 PCI: 00:1e.0: enabled 1
1580 12:40:43.481209 PCI: 00:1e.1: enabled 0
1581 12:40:43.484365 PCI: 00:1e.2: enabled 1
1582 12:40:43.487518 PCI: 00:1e.3: enabled 1
1583 12:40:43.490939 PCI: 00:1f.0: enabled 1
1584 12:40:43.491010 PCI: 00:1f.1: enabled 0
1585 12:40:43.493910 PCI: 00:1f.2: enabled 0
1586 12:40:43.497342 PCI: 00:1f.3: enabled 1
1587 12:40:43.497423 PCI: 00:1f.4: enabled 1
1588 12:40:43.500583 PCI: 00:1f.5: enabled 1
1589 12:40:43.503987 PCI: 00:1f.6: enabled 0
1590 12:40:43.507335 USB0 port 0: enabled 1
1591 12:40:43.507408 I2C: 01:15: enabled 1
1592 12:40:43.510614 I2C: 02:5d: enabled 1
1593 12:40:43.514034 GENERIC: 0.0: enabled 1
1594 12:40:43.514113 I2C: 03:1a: enabled 1
1595 12:40:43.517200 I2C: 03:38: enabled 1
1596 12:40:43.520458 I2C: 03:39: enabled 1
1597 12:40:43.520533 I2C: 03:3a: enabled 1
1598 12:40:43.523962 I2C: 03:3b: enabled 1
1599 12:40:43.527043 PCI: 00:00.0: enabled 1
1600 12:40:43.527120 SPI: 00: enabled 1
1601 12:40:43.530335 SPI: 01: enabled 1
1602 12:40:43.533920 PNP: 0c09.0: enabled 1
1603 12:40:43.533996 USB2 port 0: enabled 1
1604 12:40:43.537284 USB2 port 1: enabled 1
1605 12:40:43.540214 USB2 port 2: enabled 0
1606 12:40:43.543726 USB2 port 3: enabled 0
1607 12:40:43.543801 USB2 port 5: enabled 0
1608 12:40:43.547151 USB2 port 6: enabled 1
1609 12:40:43.550125 USB2 port 9: enabled 1
1610 12:40:43.550215 USB3 port 0: enabled 1
1611 12:40:43.553356 USB3 port 1: enabled 1
1612 12:40:43.556801 USB3 port 2: enabled 1
1613 12:40:43.560434 USB3 port 3: enabled 1
1614 12:40:43.560509 USB3 port 4: enabled 0
1615 12:40:43.563164 APIC: 01: enabled 1
1616 12:40:43.563237 APIC: 06: enabled 1
1617 12:40:43.566463 APIC: 07: enabled 1
1618 12:40:43.569816 APIC: 03: enabled 1
1619 12:40:43.569927 APIC: 02: enabled 1
1620 12:40:43.573454 APIC: 05: enabled 1
1621 12:40:43.576470 APIC: 04: enabled 1
1622 12:40:43.576550 PCI: 00:08.0: enabled 1
1623 12:40:43.580179 PCI: 00:14.2: enabled 1
1624 12:40:43.583115 PCI: 01:00.0: enabled 1
1625 12:40:43.586462 Disabling ACPI via APMC:
1626 12:40:43.589642 done.
1627 12:40:43.593341 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1628 12:40:43.596451 ELOG: NV offset 0xaf0000 size 0x4000
1629 12:40:43.603915 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1630 12:40:43.610248 ELOG: Event(17) added with size 13 at 2023-08-30 12:40:42 UTC
1631 12:40:43.617213 ELOG: Event(92) added with size 9 at 2023-08-30 12:40:42 UTC
1632 12:40:43.623950 ELOG: Event(93) added with size 9 at 2023-08-30 12:40:43 UTC
1633 12:40:43.630882 ELOG: Event(9A) added with size 9 at 2023-08-30 12:40:43 UTC
1634 12:40:43.637610 ELOG: Event(9E) added with size 10 at 2023-08-30 12:40:43 UTC
1635 12:40:43.644163 ELOG: Event(9F) added with size 14 at 2023-08-30 12:40:43 UTC
1636 12:40:43.650559 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 7
1637 12:40:43.657279 ELOG: Event(A1) added with size 10 at 2023-08-30 12:40:43 UTC
1638 12:40:43.663864 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1639 12:40:43.670142 ELOG: Event(A0) added with size 9 at 2023-08-30 12:40:43 UTC
1640 12:40:43.673401 elog_add_boot_reason: Logged dev mode boot
1641 12:40:43.676901 Finalize devices...
1642 12:40:43.680051 PCI: 00:17.0 final
1643 12:40:43.680151 Devices finalized
1644 12:40:43.686975 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1645 12:40:43.689986 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1646 12:40:43.696671 ME: HFSTS1 : 0x90000245
1647 12:40:43.699930 ME: HFSTS2 : 0x3B850126
1648 12:40:43.703473 ME: HFSTS3 : 0x00000020
1649 12:40:43.706884 ME: HFSTS4 : 0x00004800
1650 12:40:43.710068 ME: HFSTS5 : 0x00000000
1651 12:40:43.716418 ME: HFSTS6 : 0x40400006
1652 12:40:43.719992 ME: Manufacturing Mode : NO
1653 12:40:43.723205 ME: FW Partition Table : OK
1654 12:40:43.726655 ME: Bringup Loader Failure : NO
1655 12:40:43.729984 ME: Firmware Init Complete : YES
1656 12:40:43.732997 ME: Boot Options Present : NO
1657 12:40:43.736265 ME: Update In Progress : NO
1658 12:40:43.739530 ME: D0i3 Support : YES
1659 12:40:43.742970 ME: Low Power State Enabled : NO
1660 12:40:43.746334 ME: CPU Replaced : NO
1661 12:40:43.749610 ME: CPU Replacement Valid : YES
1662 12:40:43.753028 ME: Current Working State : 5
1663 12:40:43.756042 ME: Current Operation State : 1
1664 12:40:43.759520 ME: Current Operation Mode : 0
1665 12:40:43.762840 ME: Error Code : 0
1666 12:40:43.766018 ME: CPU Debug Disabled : YES
1667 12:40:43.769378 ME: TXT Support : NO
1668 12:40:43.772645 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1669 12:40:43.779518 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1670 12:40:43.782680 CBFS @ c08000 size 3f8000
1671 12:40:43.785795 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1672 12:40:43.792582 CBFS: Locating 'fallback/dsdt.aml'
1673 12:40:43.795908 CBFS: Found @ offset 10bb80 size 3fa5
1674 12:40:43.799224 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1675 12:40:43.802529 CBFS @ c08000 size 3f8000
1676 12:40:43.809147 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1677 12:40:43.812580 CBFS: Locating 'fallback/slic'
1678 12:40:43.815957 CBFS: 'fallback/slic' not found.
1679 12:40:43.822189 ACPI: Writing ACPI tables at 99b3e000.
1680 12:40:43.822268 ACPI: * FACS
1681 12:40:43.826005 ACPI: * DSDT
1682 12:40:43.828960 Ramoops buffer: 0x100000@0x99a3d000.
1683 12:40:43.832178 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1684 12:40:43.838777 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1685 12:40:43.842062 Google Chrome EC: version:
1686 12:40:43.845252 ro: helios_v2.0.2659-56403530b
1687 12:40:43.848788 rw: helios_v2.0.2849-c41de27e7d
1688 12:40:43.848869 running image: 1
1689 12:40:43.852739 ACPI: * FADT
1690 12:40:43.852821 SCI is IRQ9
1691 12:40:43.859438 ACPI: added table 1/32, length now 40
1692 12:40:43.859541 ACPI: * SSDT
1693 12:40:43.862951 Found 1 CPU(s) with 8 core(s) each.
1694 12:40:43.866428 Error: Could not locate 'wifi_sar' in VPD.
1695 12:40:43.872783 Checking CBFS for default SAR values
1696 12:40:43.875992 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1697 12:40:43.879520 CBFS @ c08000 size 3f8000
1698 12:40:43.885775 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1699 12:40:43.889183 CBFS: Locating 'wifi_sar_defaults.hex'
1700 12:40:43.892211 CBFS: Found @ offset 5fac0 size 77
1701 12:40:43.895795 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1702 12:40:43.902282 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1703 12:40:43.905609 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1704 12:40:43.912240 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1705 12:40:43.915573 failed to find key in VPD: dsm_calib_r0_0
1706 12:40:43.925337 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1707 12:40:43.928902 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1708 12:40:43.935210 failed to find key in VPD: dsm_calib_r0_1
1709 12:40:43.941736 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1710 12:40:43.948312 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1711 12:40:43.951720 failed to find key in VPD: dsm_calib_r0_2
1712 12:40:43.961724 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1713 12:40:43.965119 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1714 12:40:43.971854 failed to find key in VPD: dsm_calib_r0_3
1715 12:40:43.978237 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1716 12:40:43.985073 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1717 12:40:43.988049 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1718 12:40:43.995159 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1719 12:40:43.998635 EC returned error result code 1
1720 12:40:44.001911 EC returned error result code 1
1721 12:40:44.005294 EC returned error result code 1
1722 12:40:44.008617 PS2K: Bad resp from EC. Vivaldi disabled!
1723 12:40:44.015215 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1724 12:40:44.021605 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1725 12:40:44.025087 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1726 12:40:44.031763 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1727 12:40:44.034745 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1728 12:40:44.041397 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1729 12:40:44.048062 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1730 12:40:44.054567 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1731 12:40:44.058042 ACPI: added table 2/32, length now 44
1732 12:40:44.061255 ACPI: * MCFG
1733 12:40:44.064530 ACPI: added table 3/32, length now 48
1734 12:40:44.064640 ACPI: * TPM2
1735 12:40:44.067720 TPM2 log created at 99a2d000
1736 12:40:44.071222 ACPI: added table 4/32, length now 52
1737 12:40:44.074481 ACPI: * MADT
1738 12:40:44.074559 SCI is IRQ9
1739 12:40:44.077838 ACPI: added table 5/32, length now 56
1740 12:40:44.081297 current = 99b43ac0
1741 12:40:44.081408 ACPI: * DMAR
1742 12:40:44.084487 ACPI: added table 6/32, length now 60
1743 12:40:44.087464 ACPI: * IGD OpRegion
1744 12:40:44.090731 GMA: Found VBT in CBFS
1745 12:40:44.094240 GMA: Found valid VBT in CBFS
1746 12:40:44.097701 ACPI: added table 7/32, length now 64
1747 12:40:44.097811 ACPI: * HPET
1748 12:40:44.104396 ACPI: added table 8/32, length now 68
1749 12:40:44.104474 ACPI: done.
1750 12:40:44.107814 ACPI tables: 31744 bytes.
1751 12:40:44.110768 smbios_write_tables: 99a2c000
1752 12:40:44.114324 EC returned error result code 3
1753 12:40:44.117567 Couldn't obtain OEM name from CBI
1754 12:40:44.120766 Create SMBIOS type 17
1755 12:40:44.123998 PCI: 00:00.0 (Intel Cannonlake)
1756 12:40:44.124079 PCI: 00:14.3 (Intel WiFi)
1757 12:40:44.127468 SMBIOS tables: 939 bytes.
1758 12:40:44.130876 Writing table forward entry at 0x00000500
1759 12:40:44.137417 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1760 12:40:44.140971 Writing coreboot table at 0x99b62000
1761 12:40:44.147553 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1762 12:40:44.154097 1. 0000000000001000-000000000009ffff: RAM
1763 12:40:44.157229 2. 00000000000a0000-00000000000fffff: RESERVED
1764 12:40:44.160491 3. 0000000000100000-0000000099a2bfff: RAM
1765 12:40:44.166880 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1766 12:40:44.173503 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1767 12:40:44.176935 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1768 12:40:44.183449 7. 000000009a000000-000000009f7fffff: RESERVED
1769 12:40:44.186693 8. 00000000e0000000-00000000efffffff: RESERVED
1770 12:40:44.193406 9. 00000000fc000000-00000000fc000fff: RESERVED
1771 12:40:44.196815 10. 00000000fe000000-00000000fe00ffff: RESERVED
1772 12:40:44.203197 11. 00000000fed10000-00000000fed17fff: RESERVED
1773 12:40:44.206480 12. 00000000fed80000-00000000fed83fff: RESERVED
1774 12:40:44.209810 13. 00000000fed90000-00000000fed91fff: RESERVED
1775 12:40:44.216724 14. 00000000feda0000-00000000feda1fff: RESERVED
1776 12:40:44.219860 15. 0000000100000000-000000045e7fffff: RAM
1777 12:40:44.223148 Graphics framebuffer located at 0xc0000000
1778 12:40:44.226675 Passing 5 GPIOs to payload:
1779 12:40:44.233306 NAME | PORT | POLARITY | VALUE
1780 12:40:44.236881 write protect | undefined | high | high
1781 12:40:44.243013 lid | undefined | high | high
1782 12:40:44.249835 power | undefined | high | low
1783 12:40:44.252957 oprom | undefined | high | low
1784 12:40:44.259462 EC in RW | 0x000000cb | high | low
1785 12:40:44.259547 Board ID: 4
1786 12:40:44.266310 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1787 12:40:44.269291 CBFS @ c08000 size 3f8000
1788 12:40:44.272803 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1789 12:40:44.279247 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6ba9
1790 12:40:44.283206 coreboot table: 1492 bytes.
1791 12:40:44.286055 IMD ROOT 0. 99fff000 00001000
1792 12:40:44.289674 IMD SMALL 1. 99ffe000 00001000
1793 12:40:44.293072 FSP MEMORY 2. 99c4e000 003b0000
1794 12:40:44.296197 CONSOLE 3. 99c2e000 00020000
1795 12:40:44.299288 FMAP 4. 99c2d000 0000054e
1796 12:40:44.302939 TIME STAMP 5. 99c2c000 00000910
1797 12:40:44.306262 VBOOT WORK 6. 99c18000 00014000
1798 12:40:44.309026 MRC DATA 7. 99c16000 00001958
1799 12:40:44.312458 ROMSTG STCK 8. 99c15000 00001000
1800 12:40:44.315860 AFTER CAR 9. 99c0b000 0000a000
1801 12:40:44.319554 RAMSTAGE 10. 99baf000 0005c000
1802 12:40:44.322315 REFCODE 11. 99b7a000 00035000
1803 12:40:44.326210 SMM BACKUP 12. 99b6a000 00010000
1804 12:40:44.329104 COREBOOT 13. 99b62000 00008000
1805 12:40:44.332389 ACPI 14. 99b3e000 00024000
1806 12:40:44.335984 ACPI GNVS 15. 99b3d000 00001000
1807 12:40:44.339093 RAMOOPS 16. 99a3d000 00100000
1808 12:40:44.342691 TPM2 TCGLOG17. 99a2d000 00010000
1809 12:40:44.345739 SMBIOS 18. 99a2c000 00000800
1810 12:40:44.349281 IMD small region:
1811 12:40:44.352498 IMD ROOT 0. 99ffec00 00000400
1812 12:40:44.355831 FSP RUNTIME 1. 99ffebe0 00000004
1813 12:40:44.359103 EC HOSTEVENT 2. 99ffebc0 00000008
1814 12:40:44.362343 POWER STATE 3. 99ffeb80 00000040
1815 12:40:44.365968 ROMSTAGE 4. 99ffeb60 00000004
1816 12:40:44.369223 MEM INFO 5. 99ffe9a0 000001b9
1817 12:40:44.372535 VPD 6. 99ffe920 0000006c
1818 12:40:44.376012 MTRR: Physical address space:
1819 12:40:44.382418 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1820 12:40:44.388860 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1821 12:40:44.395996 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1822 12:40:44.402151 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1823 12:40:44.405425 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1824 12:40:44.411946 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1825 12:40:44.418514 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1826 12:40:44.421848 MTRR: Fixed MSR 0x250 0x0606060606060606
1827 12:40:44.428559 MTRR: Fixed MSR 0x258 0x0606060606060606
1828 12:40:44.431841 MTRR: Fixed MSR 0x259 0x0000000000000000
1829 12:40:44.435267 MTRR: Fixed MSR 0x268 0x0606060606060606
1830 12:40:44.438485 MTRR: Fixed MSR 0x269 0x0606060606060606
1831 12:40:44.445039 MTRR: Fixed MSR 0x26a 0x0606060606060606
1832 12:40:44.448377 MTRR: Fixed MSR 0x26b 0x0606060606060606
1833 12:40:44.451682 MTRR: Fixed MSR 0x26c 0x0606060606060606
1834 12:40:44.454803 MTRR: Fixed MSR 0x26d 0x0606060606060606
1835 12:40:44.461291 MTRR: Fixed MSR 0x26e 0x0606060606060606
1836 12:40:44.465147 MTRR: Fixed MSR 0x26f 0x0606060606060606
1837 12:40:44.468345 call enable_fixed_mtrr()
1838 12:40:44.471610 CPU physical address size: 39 bits
1839 12:40:44.474838 MTRR: default type WB/UC MTRR counts: 6/8.
1840 12:40:44.478350 MTRR: WB selected as default type.
1841 12:40:44.484571 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1842 12:40:44.491352 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1843 12:40:44.497922 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1844 12:40:44.504922 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1845 12:40:44.511176 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1846 12:40:44.517916 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1847 12:40:44.521265 MTRR: Fixed MSR 0x250 0x0606060606060606
1848 12:40:44.524350 MTRR: Fixed MSR 0x258 0x0606060606060606
1849 12:40:44.530916 MTRR: Fixed MSR 0x259 0x0000000000000000
1850 12:40:44.534459 MTRR: Fixed MSR 0x268 0x0606060606060606
1851 12:40:44.537716 MTRR: Fixed MSR 0x269 0x0606060606060606
1852 12:40:44.540794 MTRR: Fixed MSR 0x26a 0x0606060606060606
1853 12:40:44.544191 MTRR: Fixed MSR 0x26b 0x0606060606060606
1854 12:40:44.550841 MTRR: Fixed MSR 0x26c 0x0606060606060606
1855 12:40:44.554390 MTRR: Fixed MSR 0x26d 0x0606060606060606
1856 12:40:44.557747 MTRR: Fixed MSR 0x26e 0x0606060606060606
1857 12:40:44.561294 MTRR: Fixed MSR 0x26f 0x0606060606060606
1858 12:40:44.561718
1859 12:40:44.564490 MTRR check
1860 12:40:44.567774 Fixed MTRRs : Enabled
1861 12:40:44.568204 Variable MTRRs: Enabled
1862 12:40:44.571145
1863 12:40:44.571567 call enable_fixed_mtrr()
1864 12:40:44.577439 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1865 12:40:44.580918 CPU physical address size: 39 bits
1866 12:40:44.587407 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1867 12:40:44.587892 CBFS @ c08000 size 3f8000
1868 12:40:44.594194 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1869 12:40:44.597768 MTRR: Fixed MSR 0x250 0x0606060606060606
1870 12:40:44.603989 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 12:40:44.607393 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 12:40:44.610882 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 12:40:44.614239 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 12:40:44.620513 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 12:40:44.623829 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 12:40:44.627289 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 12:40:44.630548 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 12:40:44.633796 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 12:40:44.640652 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 12:40:44.644035 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 12:40:44.647335 MTRR: Fixed MSR 0x258 0x0606060606060606
1882 12:40:44.650490 call enable_fixed_mtrr()
1883 12:40:44.653749 MTRR: Fixed MSR 0x259 0x0000000000000000
1884 12:40:44.657171 MTRR: Fixed MSR 0x268 0x0606060606060606
1885 12:40:44.663818 MTRR: Fixed MSR 0x269 0x0606060606060606
1886 12:40:44.667088 MTRR: Fixed MSR 0x26a 0x0606060606060606
1887 12:40:44.670238 MTRR: Fixed MSR 0x26b 0x0606060606060606
1888 12:40:44.673592 MTRR: Fixed MSR 0x26c 0x0606060606060606
1889 12:40:44.680324 MTRR: Fixed MSR 0x26d 0x0606060606060606
1890 12:40:44.683405 MTRR: Fixed MSR 0x26e 0x0606060606060606
1891 12:40:44.687269 MTRR: Fixed MSR 0x26f 0x0606060606060606
1892 12:40:44.690105 CPU physical address size: 39 bits
1893 12:40:44.693464 call enable_fixed_mtrr()
1894 12:40:44.697073 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 12:40:44.703431 MTRR: Fixed MSR 0x250 0x0606060606060606
1896 12:40:44.707040 MTRR: Fixed MSR 0x258 0x0606060606060606
1897 12:40:44.710266 MTRR: Fixed MSR 0x259 0x0000000000000000
1898 12:40:44.713261 MTRR: Fixed MSR 0x268 0x0606060606060606
1899 12:40:44.716801 MTRR: Fixed MSR 0x269 0x0606060606060606
1900 12:40:44.723262 MTRR: Fixed MSR 0x26a 0x0606060606060606
1901 12:40:44.726804 MTRR: Fixed MSR 0x26b 0x0606060606060606
1902 12:40:44.730187 MTRR: Fixed MSR 0x26c 0x0606060606060606
1903 12:40:44.733458 MTRR: Fixed MSR 0x26d 0x0606060606060606
1904 12:40:44.740053 MTRR: Fixed MSR 0x26e 0x0606060606060606
1905 12:40:44.743160 MTRR: Fixed MSR 0x26f 0x0606060606060606
1906 12:40:44.746777 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 12:40:44.749987 call enable_fixed_mtrr()
1908 12:40:44.753249 MTRR: Fixed MSR 0x259 0x0000000000000000
1909 12:40:44.756343 MTRR: Fixed MSR 0x268 0x0606060606060606
1910 12:40:44.763231 MTRR: Fixed MSR 0x269 0x0606060606060606
1911 12:40:44.766467 MTRR: Fixed MSR 0x26a 0x0606060606060606
1912 12:40:44.769720 MTRR: Fixed MSR 0x26b 0x0606060606060606
1913 12:40:44.772939 MTRR: Fixed MSR 0x26c 0x0606060606060606
1914 12:40:44.779609 MTRR: Fixed MSR 0x26d 0x0606060606060606
1915 12:40:44.782713 MTRR: Fixed MSR 0x26e 0x0606060606060606
1916 12:40:44.786134 MTRR: Fixed MSR 0x26f 0x0606060606060606
1917 12:40:44.789419 CPU physical address size: 39 bits
1918 12:40:44.792843 call enable_fixed_mtrr()
1919 12:40:44.795796 CBFS: Locating 'fallback/payload'
1920 12:40:44.799249 CPU physical address size: 39 bits
1921 12:40:44.802269 CPU physical address size: 39 bits
1922 12:40:44.809341 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 12:40:44.813361 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 12:40:44.816125 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 12:40:44.818978 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 12:40:44.825415 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 12:40:44.828465 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 12:40:44.831910 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 12:40:44.835343 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 12:40:44.841633 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 12:40:44.845227 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 12:40:44.848491 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 12:40:44.851983 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 12:40:44.858436 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 12:40:44.861810 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 12:40:44.865019 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 12:40:44.868504 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 12:40:44.871533 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 12:40:44.878220 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 12:40:44.881670 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 12:40:44.884744 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 12:40:44.888516 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 12:40:44.894807 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 12:40:44.898578 call enable_fixed_mtrr()
1945 12:40:44.898679 call enable_fixed_mtrr()
1946 12:40:44.901424 CPU physical address size: 39 bits
1947 12:40:44.908020 CPU physical address size: 39 bits
1948 12:40:44.911286 CBFS: Found @ offset 1c96c0 size 3f798
1949 12:40:44.914304 Checking segment from ROM address 0xffdd16f8
1950 12:40:44.918213 Checking segment from ROM address 0xffdd1714
1951 12:40:44.924371 Loading segment from ROM address 0xffdd16f8
1952 12:40:44.924453 code (compression=0)
1953 12:40:44.934260 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1954 12:40:44.944150 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1955 12:40:44.944232 it's not compressed!
1956 12:40:45.037348 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1957 12:40:45.044350 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1958 12:40:45.047541 Loading segment from ROM address 0xffdd1714
1959 12:40:45.050382 Entry Point 0x30000000
1960 12:40:45.053693 Loaded segments
1961 12:40:45.059459 Finalizing chipset.
1962 12:40:45.062772 Finalizing SMM.
1963 12:40:45.066044 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1964 12:40:45.069402 mp_park_aps done after 0 msecs.
1965 12:40:45.076306 Jumping to boot code at 30000000(99b62000)
1966 12:40:45.082677 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1967 12:40:45.082780
1968 12:40:45.082871
1969 12:40:45.082958
1970 12:40:45.085759 Starting depthcharge on Helios...
1971 12:40:45.085835
1972 12:40:45.086215 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1973 12:40:45.086338 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1974 12:40:45.086481 Setting prompt string to ['hatch:']
1975 12:40:45.086593 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1976 12:40:45.095908 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1977 12:40:45.095993
1978 12:40:45.102617 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1979 12:40:45.102698
1980 12:40:45.109199 board_setup: Info: eMMC controller not present; skipping
1981 12:40:45.109282
1982 12:40:45.112531 New NVMe Controller 0x30053aa8 @ 00:1d:00
1983 12:40:45.112615
1984 12:40:45.119179 board_setup: Info: SDHCI controller not present; skipping
1985 12:40:45.119287
1986 12:40:45.125795 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1987 12:40:45.125881
1988 12:40:45.125946 Wipe memory regions:
1989 12:40:45.126009
1990 12:40:45.128954 [0x00000000001000, 0x000000000a0000)
1991 12:40:45.129036
1992 12:40:45.132345 [0x00000000100000, 0x00000030000000)
1993 12:40:45.198489
1994 12:40:45.201698 [0x00000030657430, 0x00000099a2c000)
1995 12:40:45.338830
1996 12:40:45.341999 [0x00000100000000, 0x0000045e800000)
1997 12:40:46.725346
1998 12:40:46.725485 R8152: Initializing
1999 12:40:46.725556
2000 12:40:46.728541 Version 9 (ocp_data = 6010)
2001 12:40:46.733011
2002 12:40:46.733094 R8152: Done initializing
2003 12:40:46.733161
2004 12:40:46.735854 Adding net device
2005 12:40:47.345625
2006 12:40:47.345780 R8152: Initializing
2007 12:40:47.345852
2008 12:40:47.348650 Version 6 (ocp_data = 5c30)
2009 12:40:47.348732
2010 12:40:47.352085 R8152: Done initializing
2011 12:40:47.352168
2012 12:40:47.355301 net_add_device: Attemp to include the same device
2013 12:40:47.359033
2014 12:40:47.365976 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2015 12:40:47.366074
2016 12:40:47.366140
2017 12:40:47.366201
2018 12:40:47.366474 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2020 12:40:47.466793 hatch: tftpboot 192.168.201.1 11383500/tftp-deploy-hmcxfo5x/kernel/bzImage 11383500/tftp-deploy-hmcxfo5x/kernel/cmdline 11383500/tftp-deploy-hmcxfo5x/ramdisk/ramdisk.cpio.gz
2021 12:40:47.466931 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2022 12:40:47.467016 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2023 12:40:47.471194 tftpboot 192.168.201.1 11383500/tftp-deploy-hmcxfo5x/kernel/bzIploy-hmcxfo5x/kernel/cmdline 11383500/tftp-deploy-hmcxfo5x/ramdisk/ramdisk.cpio.gz
2024 12:40:47.471278
2025 12:40:47.471343 Waiting for link
2026 12:40:47.672065
2027 12:40:47.672207 done.
2028 12:40:47.672277
2029 12:40:47.672338 MAC: 00:24:32:50:1a:5f
2030 12:40:47.672397
2031 12:40:47.675066 Sending DHCP discover... done.
2032 12:40:47.675150
2033 12:40:47.678400 Waiting for reply... done.
2034 12:40:47.678482
2035 12:40:47.681939 Sending DHCP request... done.
2036 12:40:47.682060
2037 12:40:47.685250 Waiting for reply... done.
2038 12:40:47.685337
2039 12:40:47.688554 My ip is 192.168.201.21
2040 12:40:47.688643
2041 12:40:47.691834 The DHCP server ip is 192.168.201.1
2042 12:40:47.691913
2043 12:40:47.698542 TFTP server IP predefined by user: 192.168.201.1
2044 12:40:47.698620
2045 12:40:47.704888 Bootfile predefined by user: 11383500/tftp-deploy-hmcxfo5x/kernel/bzImage
2046 12:40:47.704968
2047 12:40:47.708317 Sending tftp read request... done.
2048 12:40:47.708397
2049 12:40:47.711766 Waiting for the transfer...
2050 12:40:47.711855
2051 12:40:48.267940 00000000 ################################################################
2052 12:40:48.268087
2053 12:40:48.812851 00080000 ################################################################
2054 12:40:48.812990
2055 12:40:49.372917 00100000 ################################################################
2056 12:40:49.373754
2057 12:40:50.064505 00180000 ################################################################
2058 12:40:50.065046
2059 12:40:50.734251 00200000 ################################################################
2060 12:40:50.734889
2061 12:40:51.368390 00280000 ################################################################
2062 12:40:51.369295
2063 12:40:52.017255 00300000 ################################################################
2064 12:40:52.017756
2065 12:40:52.668230 00380000 ################################################################
2066 12:40:52.668385
2067 12:40:53.310985 00400000 ################################################################
2068 12:40:53.311559
2069 12:40:53.988604 00480000 ################################################################
2070 12:40:53.989203
2071 12:40:54.632793 00500000 ################################################################
2072 12:40:54.633352
2073 12:40:55.329964 00580000 ################################################################
2074 12:40:55.330499
2075 12:40:55.983769 00600000 ################################################################
2076 12:40:55.984551
2077 12:40:56.638374 00680000 ################################################################
2078 12:40:56.638984
2079 12:40:57.312978 00700000 ################################################################
2080 12:40:57.313539
2081 12:40:57.990348 00780000 ################################################################
2082 12:40:57.990912
2083 12:40:58.127699 00800000 ############# done.
2084 12:40:58.128211
2085 12:40:58.130902 The bootfile was 8490896 bytes long.
2086 12:40:58.131321
2087 12:40:58.134322 Sending tftp read request... done.
2088 12:40:58.134737
2089 12:40:58.137897 Waiting for the transfer...
2090 12:40:58.138313
2091 12:40:58.790818 00000000 ################################################################
2092 12:40:58.791337
2093 12:40:59.353529 00080000 ################################################################
2094 12:40:59.353663
2095 12:40:59.967853 00100000 ################################################################
2096 12:40:59.968000
2097 12:41:00.603020 00180000 ################################################################
2098 12:41:00.603524
2099 12:41:01.268883 00200000 ################################################################
2100 12:41:01.269027
2101 12:41:01.903474 00280000 ################################################################
2102 12:41:01.903641
2103 12:41:02.524923 00300000 ################################################################
2104 12:41:02.525070
2105 12:41:03.135333 00380000 ################################################################
2106 12:41:03.135483
2107 12:41:03.754357 00400000 ################################################################
2108 12:41:03.754514
2109 12:41:04.370041 00480000 ################################################################
2110 12:41:04.370189
2111 12:41:04.976264 00500000 ################################################################
2112 12:41:04.976415
2113 12:41:05.593654 00580000 ################################################################
2114 12:41:05.593804
2115 12:41:06.208014 00600000 ################################################################
2116 12:41:06.208158
2117 12:41:06.845533 00680000 ################################################################
2118 12:41:06.845684
2119 12:41:07.467853 00700000 ################################################################
2120 12:41:07.468002
2121 12:41:08.074952 00780000 ################################################################
2122 12:41:08.075087
2123 12:41:08.545137 00800000 #################################################### done.
2124 12:41:08.545280
2125 12:41:08.548450 Sending tftp read request... done.
2126 12:41:08.548535
2127 12:41:08.551856 Waiting for the transfer...
2128 12:41:08.551940
2129 12:41:08.552006 00000000 # done.
2130 12:41:08.552068
2131 12:41:08.561480 Command line loaded dynamically from TFTP file: 11383500/tftp-deploy-hmcxfo5x/kernel/cmdline
2132 12:41:08.561564
2133 12:41:08.581305 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2134 12:41:08.581399
2135 12:41:08.584571 ec_init(0): CrosEC protocol v3 supported (256, 256)
2136 12:41:08.591491
2137 12:41:08.594954 Shutting down all USB controllers.
2138 12:41:08.595037
2139 12:41:08.595102 Removing current net device
2140 12:41:08.602916
2141 12:41:08.603000 Finalizing coreboot
2142 12:41:08.603067
2143 12:41:08.609135 Exiting depthcharge with code 4 at timestamp: 30889373
2144 12:41:08.609219
2145 12:41:08.609284
2146 12:41:08.609346 Starting kernel ...
2147 12:41:08.609405
2148 12:41:08.609774 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2149 12:41:08.609874 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2150 12:41:08.609954 Setting prompt string to ['Linux version [0-9]']
2151 12:41:08.610051 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2152 12:41:08.610124 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2153 12:41:08.612617
2155 12:45:26.611132 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2157 12:45:26.612589 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2159 12:45:26.613474 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2162 12:45:26.614944 end: 2 depthcharge-action (duration 00:05:00) [common]
2164 12:45:26.615764 Cleaning after the job
2165 12:45:26.615856 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383500/tftp-deploy-hmcxfo5x/ramdisk
2166 12:45:26.617323 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383500/tftp-deploy-hmcxfo5x/kernel
2167 12:45:26.618669 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383500/tftp-deploy-hmcxfo5x/modules
2168 12:45:26.619009 start: 5.1 power-off (timeout 00:00:30) [common]
2169 12:45:26.619167 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2170 12:45:26.697247 >> Command sent successfully.
2171 12:45:26.703711 Returned 0 in 0 seconds
2172 12:45:26.804781 end: 5.1 power-off (duration 00:00:00) [common]
2174 12:45:26.806362 start: 5.2 read-feedback (timeout 00:10:00) [common]
2175 12:45:26.807746 Listened to connection for namespace 'common' for up to 1s
2177 12:45:26.809138 Listened to connection for namespace 'common' for up to 1s
2178 12:45:27.807944 Finalising connection for namespace 'common'
2179 12:45:27.808634 Disconnecting from shell: Finalise
2180 12:45:27.809025
2181 12:45:27.910078 end: 5.2 read-feedback (duration 00:00:01) [common]
2182 12:45:27.910627 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11383500
2183 12:45:27.963618 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11383500
2184 12:45:27.964033 JobError: Your job cannot terminate cleanly.