Boot log: dell-latitude-5400-4305U-sarien
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 12:40:34.828442 lava-dispatcher, installed at version: 2023.06
2 12:40:34.828700 start: 0 validate
3 12:40:34.828852 Start time: 2023-08-30 12:40:34.828844+00:00 (UTC)
4 12:40:34.829018 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:40:34.829185 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:40:35.104532 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:40:35.104734 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:40:35.372180 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:40:35.372918 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:40:43.927757 validate duration: 9.10
12 12:40:43.928033 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:40:43.928138 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:40:43.928229 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:40:43.928359 Not decompressing ramdisk as can be used compressed.
16 12:40:43.928451 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:40:43.928523 saving as /var/lib/lava/dispatcher/tmp/11383510/tftp-deploy-d4g4lz0b/ramdisk/rootfs.cpio.gz
18 12:40:43.928593 total size: 8418130 (8 MB)
19 12:40:44.452160 progress 0 % (0 MB)
20 12:40:44.465180 progress 5 % (0 MB)
21 12:40:44.477052 progress 10 % (0 MB)
22 12:40:44.487100 progress 15 % (1 MB)
23 12:40:44.493531 progress 20 % (1 MB)
24 12:40:44.498393 progress 25 % (2 MB)
25 12:40:44.502584 progress 30 % (2 MB)
26 12:40:44.505929 progress 35 % (2 MB)
27 12:40:44.509315 progress 40 % (3 MB)
28 12:40:44.512484 progress 45 % (3 MB)
29 12:40:44.515344 progress 50 % (4 MB)
30 12:40:44.518113 progress 55 % (4 MB)
31 12:40:44.520594 progress 60 % (4 MB)
32 12:40:44.522881 progress 65 % (5 MB)
33 12:40:44.525310 progress 70 % (5 MB)
34 12:40:44.527782 progress 75 % (6 MB)
35 12:40:44.530199 progress 80 % (6 MB)
36 12:40:44.532678 progress 85 % (6 MB)
37 12:40:44.535200 progress 90 % (7 MB)
38 12:40:44.537649 progress 95 % (7 MB)
39 12:40:44.540052 progress 100 % (8 MB)
40 12:40:44.540310 8 MB downloaded in 0.61 s (13.12 MB/s)
41 12:40:44.540487 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:40:44.540743 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:40:44.540836 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:40:44.540931 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:40:44.541079 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:40:44.541157 saving as /var/lib/lava/dispatcher/tmp/11383510/tftp-deploy-d4g4lz0b/kernel/bzImage
48 12:40:44.541223 total size: 8490896 (8 MB)
49 12:40:44.541290 No compression specified
50 12:40:44.542494 progress 0 % (0 MB)
51 12:40:44.545176 progress 5 % (0 MB)
52 12:40:44.547697 progress 10 % (0 MB)
53 12:40:44.550167 progress 15 % (1 MB)
54 12:40:44.552680 progress 20 % (1 MB)
55 12:40:44.555134 progress 25 % (2 MB)
56 12:40:44.557675 progress 30 % (2 MB)
57 12:40:44.560202 progress 35 % (2 MB)
58 12:40:44.562663 progress 40 % (3 MB)
59 12:40:44.565197 progress 45 % (3 MB)
60 12:40:44.567714 progress 50 % (4 MB)
61 12:40:44.570188 progress 55 % (4 MB)
62 12:40:44.572696 progress 60 % (4 MB)
63 12:40:44.575160 progress 65 % (5 MB)
64 12:40:44.577656 progress 70 % (5 MB)
65 12:40:44.580240 progress 75 % (6 MB)
66 12:40:44.582652 progress 80 % (6 MB)
67 12:40:44.585148 progress 85 % (6 MB)
68 12:40:44.587611 progress 90 % (7 MB)
69 12:40:44.590073 progress 95 % (7 MB)
70 12:40:44.592533 progress 100 % (8 MB)
71 12:40:44.592661 8 MB downloaded in 0.05 s (157.44 MB/s)
72 12:40:44.592814 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:40:44.593059 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:40:44.593152 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:40:44.593248 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:40:44.593395 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:40:44.593474 saving as /var/lib/lava/dispatcher/tmp/11383510/tftp-deploy-d4g4lz0b/modules/modules.tar
79 12:40:44.593541 total size: 250888 (0 MB)
80 12:40:44.593608 Using unxz to decompress xz
81 12:40:44.598326 progress 13 % (0 MB)
82 12:40:44.598760 progress 26 % (0 MB)
83 12:40:44.599026 progress 39 % (0 MB)
84 12:40:44.600760 progress 52 % (0 MB)
85 12:40:44.602764 progress 65 % (0 MB)
86 12:40:44.604826 progress 78 % (0 MB)
87 12:40:44.606844 progress 91 % (0 MB)
88 12:40:44.608802 progress 100 % (0 MB)
89 12:40:44.614899 0 MB downloaded in 0.02 s (11.21 MB/s)
90 12:40:44.615156 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:40:44.615500 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:40:44.615602 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 12:40:44.615704 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 12:40:44.615793 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:40:44.615882 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 12:40:44.616114 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp
98 12:40:44.616262 makedir: /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin
99 12:40:44.616379 makedir: /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/tests
100 12:40:44.616486 makedir: /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/results
101 12:40:44.616610 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-add-keys
102 12:40:44.616773 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-add-sources
103 12:40:44.616920 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-background-process-start
104 12:40:44.617063 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-background-process-stop
105 12:40:44.617202 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-common-functions
106 12:40:44.617340 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-echo-ipv4
107 12:40:44.617479 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-install-packages
108 12:40:44.617616 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-installed-packages
109 12:40:44.617753 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-os-build
110 12:40:44.617891 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-probe-channel
111 12:40:44.618028 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-probe-ip
112 12:40:44.618165 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-target-ip
113 12:40:44.618302 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-target-mac
114 12:40:44.618437 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-target-storage
115 12:40:44.618583 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-test-case
116 12:40:44.618749 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-test-event
117 12:40:44.618893 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-test-feedback
118 12:40:44.619031 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-test-raise
119 12:40:44.619172 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-test-reference
120 12:40:44.619359 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-test-runner
121 12:40:44.619500 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-test-set
122 12:40:44.619641 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-test-shell
123 12:40:44.619782 Updating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-install-packages (oe)
124 12:40:44.619950 Updating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/bin/lava-installed-packages (oe)
125 12:40:44.620090 Creating /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/environment
126 12:40:44.620199 LAVA metadata
127 12:40:44.620282 - LAVA_JOB_ID=11383510
128 12:40:44.620353 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:40:44.620464 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 12:40:44.620536 skipped lava-vland-overlay
131 12:40:44.620618 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:40:44.620705 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 12:40:44.620771 skipped lava-multinode-overlay
134 12:40:44.620858 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:40:44.620947 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 12:40:44.621025 Loading test definitions
137 12:40:44.621126 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 12:40:44.621208 Using /lava-11383510 at stage 0
139 12:40:44.621549 uuid=11383510_1.4.2.3.1 testdef=None
140 12:40:44.621646 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:40:44.621740 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 12:40:44.622321 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:40:44.622561 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 12:40:44.623301 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:40:44.623550 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 12:40:44.624225 runner path: /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/0/tests/0_dmesg test_uuid 11383510_1.4.2.3.1
149 12:40:44.624398 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:40:44.624645 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 12:40:44.624722 Using /lava-11383510 at stage 1
153 12:40:44.625048 uuid=11383510_1.4.2.3.5 testdef=None
154 12:40:44.625144 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 12:40:44.625235 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 12:40:44.625750 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 12:40:44.625986 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 12:40:44.626685 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 12:40:44.626931 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 12:40:44.627654 runner path: /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/1/tests/1_bootrr test_uuid 11383510_1.4.2.3.5
163 12:40:44.627819 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 12:40:44.628042 Creating lava-test-runner.conf files
166 12:40:44.628110 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/0 for stage 0
167 12:40:44.628206 - 0_dmesg
168 12:40:44.628293 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383510/lava-overlay-oob07oqp/lava-11383510/1 for stage 1
169 12:40:44.628392 - 1_bootrr
170 12:40:44.628494 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 12:40:44.628586 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 12:40:44.637811 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 12:40:44.637925 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 12:40:44.638017 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 12:40:44.638110 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 12:40:44.638200 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 12:40:44.923665 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 12:40:44.924187 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 12:40:44.924374 extracting modules file /var/lib/lava/dispatcher/tmp/11383510/tftp-deploy-d4g4lz0b/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11383510/extract-overlay-ramdisk-yz1gk6zt/ramdisk
180 12:40:44.947081 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 12:40:44.947310 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 12:40:44.947485 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383510/compress-overlay-32g08szz/overlay-1.4.2.4.tar.gz to ramdisk
183 12:40:44.947603 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383510/compress-overlay-32g08szz/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11383510/extract-overlay-ramdisk-yz1gk6zt/ramdisk
184 12:40:44.963508 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 12:40:44.963694 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 12:40:44.963828 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 12:40:44.963944 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 12:40:44.964050 Building ramdisk /var/lib/lava/dispatcher/tmp/11383510/extract-overlay-ramdisk-yz1gk6zt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11383510/extract-overlay-ramdisk-yz1gk6zt/ramdisk
189 12:40:45.109899 >> 49788 blocks
190 12:40:46.045455 rename /var/lib/lava/dispatcher/tmp/11383510/extract-overlay-ramdisk-yz1gk6zt/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11383510/tftp-deploy-d4g4lz0b/ramdisk/ramdisk.cpio.gz
191 12:40:46.045982 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 12:40:46.046186 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 12:40:46.046350 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 12:40:46.046502 No mkimage arch provided, not using FIT.
195 12:40:46.046650 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 12:40:46.046783 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 12:40:46.046948 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 12:40:46.047088 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 12:40:46.047231 No LXC device requested
200 12:40:46.047367 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 12:40:46.047502 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 12:40:46.047628 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 12:40:46.047744 Checking files for TFTP limit of 4294967296 bytes.
204 12:40:46.048336 end: 1 tftp-deploy (duration 00:00:02) [common]
205 12:40:46.048488 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 12:40:46.048635 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 12:40:46.048831 substitutions:
208 12:40:46.048949 - {DTB}: None
209 12:40:46.049064 - {INITRD}: 11383510/tftp-deploy-d4g4lz0b/ramdisk/ramdisk.cpio.gz
210 12:40:46.049173 - {KERNEL}: 11383510/tftp-deploy-d4g4lz0b/kernel/bzImage
211 12:40:46.049313 - {LAVA_MAC}: None
212 12:40:46.049387 - {PRESEED_CONFIG}: None
213 12:40:46.049453 - {PRESEED_LOCAL}: None
214 12:40:46.049515 - {RAMDISK}: 11383510/tftp-deploy-d4g4lz0b/ramdisk/ramdisk.cpio.gz
215 12:40:46.049577 - {ROOT_PART}: None
216 12:40:46.049637 - {ROOT}: None
217 12:40:46.049697 - {SERVER_IP}: 192.168.201.1
218 12:40:46.049756 - {TEE}: None
219 12:40:46.049815 Parsed boot commands:
220 12:40:46.049877 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 12:40:46.050066 Parsed boot commands: tftpboot 192.168.201.1 11383510/tftp-deploy-d4g4lz0b/kernel/bzImage 11383510/tftp-deploy-d4g4lz0b/kernel/cmdline 11383510/tftp-deploy-d4g4lz0b/ramdisk/ramdisk.cpio.gz
222 12:40:46.050164 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 12:40:46.050256 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 12:40:46.050357 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 12:40:46.050452 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 12:40:46.050525 Not connected, no need to disconnect.
227 12:40:46.050607 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 12:40:46.050696 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 12:40:46.050769 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-4305U-sarien-cbg-1'
230 12:40:46.055266 Setting prompt string to ['lava-test: # ']
231 12:40:46.055668 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 12:40:46.055785 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 12:40:46.055893 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 12:40:46.055999 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 12:40:46.056221 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=reboot'
236 12:41:02.947926 >> Command sent successfully.
237 12:41:02.950659 Returned 0 in 16 seconds
238 12:41:03.051067 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 12:41:03.051428 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 12:41:03.051541 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 12:41:03.051637 Setting prompt string to 'Starting depthcharge on sarien...'
243 12:41:03.051715 Changing prompt to 'Starting depthcharge on sarien...'
244 12:41:03.051788 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 12:41:03.052095 [Enter `^Ec?' for help]
246 12:41:03.052182
247 12:41:03.052253
248 12:41:03.052319 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 12:41:03.052383 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
250 12:41:03.052444 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 12:41:03.052511 CPU: AES supported, TXT NOT supported, VT supported
252 12:41:03.052575 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
253 12:41:03.052636 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 12:41:03.052696 IGD: device id 3ea1 (rev 02) is Unknown
255 12:41:03.052755 VBOOT: Loading verstage.
256 12:41:03.052818 CBFS @ 1d00000 size 300000
257 12:41:03.052877 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 12:41:03.052936 CBFS: Locating 'fallback/verstage'
259 12:41:03.053001 CBFS: Found @ offset 10f6c0 size 1435c
260 12:41:03.053061
261 12:41:03.053121
262 12:41:03.053180 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 12:41:03.053240 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 12:41:03.053299 done! DID_VID 0x00281ae0
265 12:41:03.053357 TPM ready after 0 ms
266 12:41:03.053417 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 12:41:03.053479 tlcl_send_startup: Startup return code is 0
268 12:41:03.053543 TPM: setup succeeded
269 12:41:03.053603 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 12:41:03.053663 Checking cr50 for recovery request
271 12:41:03.053722 Phase 1
272 12:41:03.053780 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 12:41:03.053840 FMAP: base = fe000000 size = 2000000 #areas = 37
274 12:41:03.053903 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 12:41:03.053962 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 12:41:03.054027 Phase 2
277 12:41:03.054087 Phase 3
278 12:41:03.054145 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 12:41:03.054205 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 12:41:03.054263 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
281 12:41:03.054323 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
282 12:41:03.054382 VB2:vb2_verify_keyblock() Checking key block signature...
283 12:41:03.054440 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
284 12:41:03.054503 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
285 12:41:03.054566 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 12:41:03.054626 Phase 4
287 12:41:03.054684 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
288 12:41:03.054744 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 12:41:03.054803 VB2:vb2_rsa_verify_digest() Digest check failed!
290 12:41:03.054862 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 12:41:03.054920 Saving nvdata
292 12:41:03.054979 Reboot requested (10020007)
293 12:41:03.055044 board_reset() called!
294 12:41:03.055103 full_reset() called!
295 12:41:07.310165
296 12:41:07.310787
297 12:41:07.318578 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 12:41:07.323389 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
299 12:41:07.327832 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 12:41:07.332905 CPU: AES supported, TXT NOT supported, VT supported
301 12:41:07.338600 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
302 12:41:07.343456 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 12:41:07.347849 IGD: device id 3ea1 (rev 02) is Unknown
304 12:41:07.350789 VBOOT: Loading verstage.
305 12:41:07.353748 CBFS @ 1d00000 size 300000
306 12:41:07.359687 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 12:41:07.363129 CBFS: Locating 'fallback/verstage'
308 12:41:07.367688 CBFS: Found @ offset 10f6c0 size 1435c
309 12:41:07.382144
310 12:41:07.382817
311 12:41:07.389733 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 12:41:07.397360 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 12:41:07.399633 done! DID_VID 0x00281ae0
314 12:41:07.401824 TPM ready after 0 ms
315 12:41:07.406095 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 12:41:07.490740 tlcl_send_startup: Startup return code is 0
317 12:41:07.493034 TPM: setup succeeded
318 12:41:07.511383 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 12:41:07.515506 Checking cr50 for recovery request
320 12:41:07.524918 Phase 1
321 12:41:07.529355 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 12:41:07.534549 FMAP: base = fe000000 size = 2000000 #areas = 37
323 12:41:07.538430 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 12:41:07.546197 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 12:41:07.552497 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 12:41:07.555255 Recovery requested (1009000e)
327 12:41:07.557079 Saving nvdata
328 12:41:07.573113 tlcl_extend: response is 0
329 12:41:07.588827 tlcl_extend: response is 0
330 12:41:07.592473 CBFS @ 1d00000 size 300000
331 12:41:07.598751 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 12:41:07.601911 CBFS: Locating 'fallback/romstage'
333 12:41:07.605456 CBFS: Found @ offset 80 size 15b2c
334 12:41:07.607082
335 12:41:07.607500
336 12:41:07.616016 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 12:41:07.620860 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 12:41:07.625272 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 12:41:07.629462 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 12:41:07.633645 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 12:41:07.637985 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 12:41:07.639988 TCO_STS: 0000 0004
343 12:41:07.643011 GEN_PMCON: d0015209 00002200
344 12:41:07.646201 GBLRST_CAUSE: 00000000 00000000
345 12:41:07.648496 prev_sleep_state 5
346 12:41:07.651818 Boot Count incremented to 26793
347 12:41:07.655159 CBFS @ 1d00000 size 300000
348 12:41:07.661522 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 12:41:07.663795 CBFS: Locating 'fspm.bin'
350 12:41:07.667900 CBFS: Found @ offset 60fc0 size 70000
351 12:41:07.673371 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 12:41:07.678260 FMAP: base = fe000000 size = 2000000 #areas = 37
353 12:41:07.684160 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 12:41:07.690245 Probing TPM I2C: done! DID_VID 0x00281ae0
355 12:41:07.692637 Locality already claimed
356 12:41:07.696350 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 12:41:07.715670 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 12:41:07.722105 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 12:41:07.724896 MRC cache found, size 18e0
360 12:41:07.727449 bootmode is set to :2
361 12:41:07.815643 CBMEM:
362 12:41:07.819427 IMD: root @ 89fff000 254 entries.
363 12:41:07.822293 IMD: root @ 89ffec00 62 entries.
364 12:41:07.824930 External stage cache:
365 12:41:07.828666 IMD: root @ 8abff000 254 entries.
366 12:41:07.831801 IMD: root @ 8abfec00 62 entries.
367 12:41:07.837743 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 12:41:07.841290 creating vboot_handoff structure
369 12:41:07.862359 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 12:41:07.877765 tlcl_write: response is 0
371 12:41:07.896857 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 12:41:07.900894 MRC: TPM MRC hash updated successfully.
373 12:41:07.902828 1 DIMMs found
374 12:41:07.905308 top_of_ram = 0x8a000000
375 12:41:07.910193 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 12:41:07.915270 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 12:41:07.918239 CBFS @ 1d00000 size 300000
378 12:41:07.924528 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 12:41:07.927550 CBFS: Locating 'fallback/postcar'
380 12:41:07.931522 CBFS: Found @ offset 107000 size 41a4
381 12:41:07.938146 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 12:41:07.948098 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 12:41:07.953119 Processing 126 relocs. Offset value of 0x87cdd000
384 12:41:07.955338
385 12:41:07.955602
386 12:41:07.963923 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 12:41:07.966738 CBFS @ 1d00000 size 300000
388 12:41:07.973282 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 12:41:07.976533 CBFS: Locating 'fallback/ramstage'
390 12:41:07.980568 CBFS: Found @ offset 458c0 size 1a8a8
391 12:41:07.986908 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 12:41:08.013877 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 12:41:08.018775 Processing 3754 relocs. Offset value of 0x88e81000
394 12:41:08.024346
395 12:41:08.024624
396 12:41:08.032675 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 12:41:08.037497 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 12:41:08.042089 FMAP: base = fe000000 size = 2000000 #areas = 37
399 12:41:08.047681 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 12:41:08.051966 WARNING: RO_VPD is uninitialized or empty.
401 12:41:08.056324 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 12:41:08.060985 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 12:41:08.062033 Normal boot.
404 12:41:08.068788 BS: BS_PRE_DEVICE times (us): entry 0 run 58 exit 1162
405 12:41:08.071827 CBFS @ 1d00000 size 300000
406 12:41:08.078356 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 12:41:08.081951 CBFS: Locating 'cpu_microcode_blob.bin'
408 12:41:08.085571 CBFS: Found @ offset 15c40 size 2fc00
409 12:41:08.089965 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 12:41:08.092197 Skip microcode update
411 12:41:08.094918 CBFS @ 1d00000 size 300000
412 12:41:08.101099 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 12:41:08.104009 CBFS: Locating 'fsps.bin'
414 12:41:08.108193 CBFS: Found @ offset d1fc0 size 35000
415 12:41:08.142695 Detected 2 core, 2 thread CPU.
416 12:41:08.144927 Setting up SMI for CPU
417 12:41:08.147343 IED base = 0x8ac00000
418 12:41:08.148907 IED size = 0x00400000
419 12:41:08.151795 Will perform SMM setup.
420 12:41:08.157205 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.
421 12:41:08.164558 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 12:41:08.169802 Processing 16 relocs. Offset value of 0x00030000
423 12:41:08.172053 Attempting to start 1 APs
424 12:41:08.176191 Waiting for 10ms after sending INIT.
425 12:41:08.189701 Waiting for 1st SIPI to complete...done.
426 12:41:08.192239 AP: slot 1 apic_id 2.
427 12:41:08.196186 Waiting for 2nd SIPI to complete...done.
428 12:41:08.204151 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
429 12:41:08.208871 Processing 13 relocs. Offset value of 0x00038000
430 12:41:08.215221 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
431 12:41:08.218725 Installing SMM handler to 0x8a000000
432 12:41:08.226632 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
433 12:41:08.232249 Processing 867 relocs. Offset value of 0x8a010000
434 12:41:08.240643 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
435 12:41:08.245205 Processing 13 relocs. Offset value of 0x8a008000
436 12:41:08.250962 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
437 12:41:08.257390 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
438 12:41:08.260761 Clearing SMI status registers
439 12:41:08.262183 SMI_STS: PM1
440 12:41:08.264544 PM1_STS: WAK PWRBTN
441 12:41:08.266975 TCO_STS: BOOT SECOND_TO
442 12:41:08.268793 GPE0 STD STS: eSPI
443 12:41:08.271205 New SMBASE 0x8a000000
444 12:41:08.274202 In relocation handler: CPU 0
445 12:41:08.278349 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
446 12:41:08.282833 Writing SMRR. base = 0x8a000006, mask=0xff000800
447 12:41:08.285202 Relocation complete.
448 12:41:08.287705 New SMBASE 0x89fffc00
449 12:41:08.290248 In relocation handler: CPU 1
450 12:41:08.294160 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
451 12:41:08.299104 Writing SMRR. base = 0x8a000006, mask=0xff000800
452 12:41:08.301449 Relocation complete.
453 12:41:08.303089 Initializing CPU #0
454 12:41:08.306934 CPU: vendor Intel device 806ec
455 12:41:08.310313 CPU: family 06, model 8e, stepping 0c
456 12:41:08.312841 Clearing out pending MCEs
457 12:41:08.317898 Setting up local APIC... apic_id: 0x00 done.
458 12:41:08.320508 Turbo is available but hidden
459 12:41:08.322940 Turbo has been enabled
460 12:41:08.324937 VMX status: enabled
461 12:41:08.329025 IA32_FEATURE_CONTROL status: locked
462 12:41:08.331219 Skip microcode update
463 12:41:08.333167 CPU #0 initialized
464 12:41:08.335571 Initializing CPU #1
465 12:41:08.338509 CPU: vendor Intel device 806ec
466 12:41:08.342261 CPU: family 06, model 8e, stepping 0c
467 12:41:08.344533 Clearing out pending MCEs
468 12:41:08.349411 Setting up local APIC... apic_id: 0x02 done.
469 12:41:08.351131 VMX status: enabled
470 12:41:08.355017 IA32_FEATURE_CONTROL status: locked
471 12:41:08.357436 Skip microcode update
472 12:41:08.359184 CPU #1 initialized
473 12:41:08.363543 bsp_do_flight_plan done after 163 msecs.
474 12:41:08.366756 CPU: frequency set to 2200 MHz
475 12:41:08.367841 Enabling SMIs.
476 12:41:08.369433 Locking SMM.
477 12:41:08.372634 CBFS @ 1d00000 size 300000
478 12:41:08.378869 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
479 12:41:08.381707 CBFS: Locating 'vbt.bin'
480 12:41:08.385658 CBFS: Found @ offset 60a40 size 4a0
481 12:41:08.389648 Found a VBT of 4608 bytes after decompression
482 12:41:08.403754 FMAP: area GBB found @ 1c11000 (978944 bytes)
483 12:41:08.520863 Detected 2 core, 2 thread CPU.
484 12:41:08.523814 Detected 2 core, 2 thread CPU.
485 12:41:08.751078 Display FSP Version Info HOB
486 12:41:08.754148 Reference Code - CPU = 7.0.5e.40
487 12:41:08.756938 uCode Version = 0.0.0.b8
488 12:41:08.759717 Display FSP Version Info HOB
489 12:41:08.763640 Reference Code - ME = 7.0.5e.40
490 12:41:08.765663 MEBx version = 0.0.0.0
491 12:41:08.768963 ME Firmware Version = Consumer SKU
492 12:41:08.771938 Display FSP Version Info HOB
493 12:41:08.775509 Reference Code - CNL PCH = 7.0.5e.40
494 12:41:08.778383 PCH-CRID Status = Disabled
495 12:41:08.781820 CNL PCH H A0 Hsio Version = 2.0.0.0
496 12:41:08.785491 CNL PCH H Ax Hsio Version = 9.0.0.0
497 12:41:08.788974 CNL PCH H Bx Hsio Version = a.0.0.0
498 12:41:08.792441 CNL PCH LP B0 Hsio Version = 7.0.0.0
499 12:41:08.796163 CNL PCH LP Bx Hsio Version = 6.0.0.0
500 12:41:08.799711 CNL PCH LP Dx Hsio Version = 7.0.0.0
501 12:41:08.802924 Display FSP Version Info HOB
502 12:41:08.807657 Reference Code - SA - System Agent = 7.0.5e.40
503 12:41:08.810795 Reference Code - MRC = 0.7.1.68
504 12:41:08.813860 SA - PCIe Version = 7.0.5e.40
505 12:41:08.816752 SA-CRID Status = Disabled
506 12:41:08.819794 SA-CRID Original Value = 0.0.0.c
507 12:41:08.822824 SA-CRID New Value = 0.0.0.c
508 12:41:08.841376 RTC Init
509 12:41:08.845159 Set power off after power failure.
510 12:41:08.847095 Disabling Deep S3
511 12:41:08.848328 Disabling Deep S3
512 12:41:08.850150 Disabling Deep S4
513 12:41:08.852703 Disabling Deep S4
514 12:41:08.853949 Disabling Deep S5
515 12:41:08.855826 Disabling Deep S5
516 12:41:08.862449 BS: BS_DEV_INIT_CHIPS times (us): entry 300463 run 470296 exit 16231
517 12:41:08.864906 Enumerating buses...
518 12:41:08.869779 Show all devs... Before device enumeration.
519 12:41:08.871810 Root Device: enabled 1
520 12:41:08.873957 CPU_CLUSTER: 0: enabled 1
521 12:41:08.876672 DOMAIN: 0000: enabled 1
522 12:41:08.878502 APIC: 00: enabled 1
523 12:41:08.881355 PCI: 00:00.0: enabled 1
524 12:41:08.884151 PCI: 00:02.0: enabled 1
525 12:41:08.886372 PCI: 00:04.0: enabled 1
526 12:41:08.888200 PCI: 00:12.0: enabled 1
527 12:41:08.891024 PCI: 00:12.5: enabled 0
528 12:41:08.893674 PCI: 00:12.6: enabled 0
529 12:41:08.896059 PCI: 00:13.0: enabled 0
530 12:41:08.898180 PCI: 00:14.0: enabled 1
531 12:41:08.900644 PCI: 00:14.1: enabled 0
532 12:41:08.903037 PCI: 00:14.3: enabled 1
533 12:41:08.905831 PCI: 00:14.5: enabled 0
534 12:41:08.908289 PCI: 00:15.0: enabled 1
535 12:41:08.910483 PCI: 00:15.1: enabled 1
536 12:41:08.913295 PCI: 00:15.2: enabled 0
537 12:41:08.915481 PCI: 00:15.3: enabled 0
538 12:41:08.917840 PCI: 00:16.0: enabled 1
539 12:41:08.919993 PCI: 00:16.1: enabled 0
540 12:41:08.922892 PCI: 00:16.2: enabled 0
541 12:41:08.925331 PCI: 00:16.3: enabled 0
542 12:41:08.927761 PCI: 00:16.4: enabled 0
543 12:41:08.929856 PCI: 00:16.5: enabled 0
544 12:41:08.932643 PCI: 00:17.0: enabled 1
545 12:41:08.934888 PCI: 00:19.0: enabled 1
546 12:41:08.937339 PCI: 00:19.1: enabled 0
547 12:41:08.939792 PCI: 00:19.2: enabled 1
548 12:41:08.941870 PCI: 00:1a.0: enabled 0
549 12:41:08.944550 PCI: 00:1c.0: enabled 1
550 12:41:08.947402 PCI: 00:1c.1: enabled 0
551 12:41:08.949065 PCI: 00:1c.2: enabled 0
552 12:41:08.951925 PCI: 00:1c.3: enabled 0
553 12:41:08.954324 PCI: 00:1c.4: enabled 0
554 12:41:08.956518 PCI: 00:1c.5: enabled 0
555 12:41:08.958923 PCI: 00:1c.6: enabled 0
556 12:41:08.961580 PCI: 00:1c.7: enabled 1
557 12:41:08.963999 PCI: 00:1d.0: enabled 1
558 12:41:08.966390 PCI: 00:1d.1: enabled 1
559 12:41:08.968560 PCI: 00:1d.2: enabled 0
560 12:41:08.971079 PCI: 00:1d.3: enabled 0
561 12:41:08.973473 PCI: 00:1d.4: enabled 1
562 12:41:08.976038 PCI: 00:1e.0: enabled 0
563 12:41:08.978848 PCI: 00:1e.1: enabled 0
564 12:41:08.980681 PCI: 00:1e.2: enabled 0
565 12:41:08.983805 PCI: 00:1e.3: enabled 0
566 12:41:08.985936 PCI: 00:1f.0: enabled 1
567 12:41:08.988297 PCI: 00:1f.1: enabled 1
568 12:41:08.990963 PCI: 00:1f.2: enabled 1
569 12:41:08.993059 PCI: 00:1f.3: enabled 1
570 12:41:08.995438 PCI: 00:1f.4: enabled 1
571 12:41:08.998008 PCI: 00:1f.5: enabled 1
572 12:41:09.000710 PCI: 00:1f.6: enabled 1
573 12:41:09.002562 USB0 port 0: enabled 1
574 12:41:09.004955 I2C: 00:10: enabled 1
575 12:41:09.007496 I2C: 00:10: enabled 1
576 12:41:09.009292 I2C: 00:34: enabled 1
577 12:41:09.011720 I2C: 00:2c: enabled 1
578 12:41:09.013593 I2C: 00:50: enabled 1
579 12:41:09.015988 PNP: 0c09.0: enabled 1
580 12:41:09.018298 USB2 port 0: enabled 1
581 12:41:09.020791 USB2 port 1: enabled 1
582 12:41:09.023012 USB2 port 2: enabled 1
583 12:41:09.025643 USB2 port 4: enabled 1
584 12:41:09.027620 USB2 port 5: enabled 1
585 12:41:09.030380 USB2 port 6: enabled 1
586 12:41:09.032678 USB2 port 7: enabled 1
587 12:41:09.035177 USB2 port 8: enabled 1
588 12:41:09.037238 USB2 port 9: enabled 1
589 12:41:09.039327 USB3 port 0: enabled 1
590 12:41:09.042231 USB3 port 1: enabled 1
591 12:41:09.044298 USB3 port 2: enabled 1
592 12:41:09.046580 USB3 port 3: enabled 1
593 12:41:09.048671 USB3 port 4: enabled 1
594 12:41:09.051321 APIC: 02: enabled 1
595 12:41:09.053313 Compare with tree...
596 12:41:09.055745 Root Device: enabled 1
597 12:41:09.058550 CPU_CLUSTER: 0: enabled 1
598 12:41:09.060104 APIC: 00: enabled 1
599 12:41:09.062954 APIC: 02: enabled 1
600 12:41:09.065333 DOMAIN: 0000: enabled 1
601 12:41:09.068177 PCI: 00:00.0: enabled 1
602 12:41:09.070168 PCI: 00:02.0: enabled 1
603 12:41:09.073254 PCI: 00:04.0: enabled 1
604 12:41:09.075753 PCI: 00:12.0: enabled 1
605 12:41:09.078190 PCI: 00:12.5: enabled 0
606 12:41:09.080714 PCI: 00:12.6: enabled 0
607 12:41:09.083209 PCI: 00:13.0: enabled 0
608 12:41:09.086352 PCI: 00:14.0: enabled 1
609 12:41:09.088494 USB0 port 0: enabled 1
610 12:41:09.091655 USB2 port 0: enabled 1
611 12:41:09.094484 USB2 port 1: enabled 1
612 12:41:09.097306 USB2 port 2: enabled 1
613 12:41:09.099683 USB2 port 4: enabled 1
614 12:41:09.102690 USB2 port 5: enabled 1
615 12:41:09.104684 USB2 port 6: enabled 1
616 12:41:09.108172 USB2 port 7: enabled 1
617 12:41:09.110603 USB2 port 8: enabled 1
618 12:41:09.113324 USB2 port 9: enabled 1
619 12:41:09.115818 USB3 port 0: enabled 1
620 12:41:09.118633 USB3 port 1: enabled 1
621 12:41:09.121697 USB3 port 2: enabled 1
622 12:41:09.124415 USB3 port 3: enabled 1
623 12:41:09.126964 USB3 port 4: enabled 1
624 12:41:09.129721 PCI: 00:14.1: enabled 0
625 12:41:09.131921 PCI: 00:14.3: enabled 1
626 12:41:09.134553 PCI: 00:14.5: enabled 0
627 12:41:09.137245 PCI: 00:15.0: enabled 1
628 12:41:09.140124 I2C: 00:10: enabled 1
629 12:41:09.142727 I2C: 00:10: enabled 1
630 12:41:09.145065 I2C: 00:34: enabled 1
631 12:41:09.147639 PCI: 00:15.1: enabled 1
632 12:41:09.150339 I2C: 00:2c: enabled 1
633 12:41:09.152845 PCI: 00:15.2: enabled 0
634 12:41:09.155337 PCI: 00:15.3: enabled 0
635 12:41:09.158171 PCI: 00:16.0: enabled 1
636 12:41:09.160599 PCI: 00:16.1: enabled 0
637 12:41:09.163241 PCI: 00:16.2: enabled 0
638 12:41:09.165598 PCI: 00:16.3: enabled 0
639 12:41:09.168375 PCI: 00:16.4: enabled 0
640 12:41:09.171232 PCI: 00:16.5: enabled 0
641 12:41:09.174203 PCI: 00:17.0: enabled 1
642 12:41:09.176339 PCI: 00:19.0: enabled 1
643 12:41:09.178979 I2C: 00:50: enabled 1
644 12:41:09.181380 PCI: 00:19.1: enabled 0
645 12:41:09.183865 PCI: 00:19.2: enabled 1
646 12:41:09.186572 PCI: 00:1a.0: enabled 0
647 12:41:09.189278 PCI: 00:1c.0: enabled 1
648 12:41:09.191943 PCI: 00:1c.1: enabled 0
649 12:41:09.194434 PCI: 00:1c.2: enabled 0
650 12:41:09.196948 PCI: 00:1c.3: enabled 0
651 12:41:09.199573 PCI: 00:1c.4: enabled 0
652 12:41:09.202436 PCI: 00:1c.5: enabled 0
653 12:41:09.205105 PCI: 00:1c.6: enabled 0
654 12:41:09.207640 PCI: 00:1c.7: enabled 1
655 12:41:09.210196 PCI: 00:1d.0: enabled 1
656 12:41:09.212934 PCI: 00:1d.1: enabled 1
657 12:41:09.215792 PCI: 00:1d.2: enabled 0
658 12:41:09.218177 PCI: 00:1d.3: enabled 0
659 12:41:09.221085 PCI: 00:1d.4: enabled 1
660 12:41:09.223258 PCI: 00:1e.0: enabled 0
661 12:41:09.225853 PCI: 00:1e.1: enabled 0
662 12:41:09.229337 PCI: 00:1e.2: enabled 0
663 12:41:09.231331 PCI: 00:1e.3: enabled 0
664 12:41:09.233926 PCI: 00:1f.0: enabled 1
665 12:41:09.236564 PNP: 0c09.0: enabled 1
666 12:41:09.239197 PCI: 00:1f.1: enabled 1
667 12:41:09.241964 PCI: 00:1f.2: enabled 1
668 12:41:09.244343 PCI: 00:1f.3: enabled 1
669 12:41:09.247251 PCI: 00:1f.4: enabled 1
670 12:41:09.249608 PCI: 00:1f.5: enabled 1
671 12:41:09.252612 PCI: 00:1f.6: enabled 1
672 12:41:09.255029 Root Device scanning...
673 12:41:09.258836 root_dev_scan_bus for Root Device
674 12:41:09.261082 CPU_CLUSTER: 0 enabled
675 12:41:09.263081 DOMAIN: 0000 enabled
676 12:41:09.265717 DOMAIN: 0000 scanning...
677 12:41:09.268969 PCI: pci_scan_bus for bus 00
678 12:41:09.271854 PCI: 00:00.0 [8086/0000] ops
679 12:41:09.275309 PCI: 00:00.0 [8086/3e35] enabled
680 12:41:09.277952 PCI: 00:02.0 [8086/0000] ops
681 12:41:09.281607 PCI: 00:02.0 [8086/3ea1] enabled
682 12:41:09.284910 PCI: 00:04.0 [8086/1903] enabled
683 12:41:09.288241 PCI: 00:08.0 [8086/1911] enabled
684 12:41:09.290971 PCI: 00:12.0 [8086/9df9] enabled
685 12:41:09.294610 PCI: 00:14.0 [8086/0000] bus ops
686 12:41:09.298260 PCI: 00:14.0 [8086/9ded] enabled
687 12:41:09.301141 PCI: 00:14.2 [8086/9def] enabled
688 12:41:09.304885 PCI: 00:14.3 [8086/9df0] enabled
689 12:41:09.307793 PCI: 00:15.0 [8086/0000] bus ops
690 12:41:09.310866 PCI: 00:15.0 [8086/9de8] enabled
691 12:41:09.314616 PCI: 00:15.1 [8086/0000] bus ops
692 12:41:09.318038 PCI: 00:15.1 [8086/9de9] enabled
693 12:41:09.320951 PCI: 00:16.0 [8086/0000] ops
694 12:41:09.324281 PCI: 00:16.0 [8086/9de0] enabled
695 12:41:09.327098 PCI: 00:17.0 [8086/0000] ops
696 12:41:09.330493 PCI: 00:17.0 [8086/9dd3] enabled
697 12:41:09.333591 PCI: 00:19.0 [8086/0000] bus ops
698 12:41:09.337353 PCI: 00:19.0 [8086/9dc5] enabled
699 12:41:09.340136 PCI: 00:19.2 [8086/0000] ops
700 12:41:09.343597 PCI: 00:19.2 [8086/9dc7] enabled
701 12:41:09.346541 PCI: 00:1c.0 [8086/0000] bus ops
702 12:41:09.349579 PCI: 00:1c.0 [8086/9dbf] enabled
703 12:41:09.355701 PCI: Static device PCI: 00:1c.7 not found, disabling it.
704 12:41:09.358497 PCI: 00:1d.0 [8086/0000] bus ops
705 12:41:09.362558 PCI: 00:1d.0 [8086/9db4] enabled
706 12:41:09.368054 PCI: Static device PCI: 00:1d.1 not found, disabling it.
707 12:41:09.373064 PCI: Static device PCI: 00:1d.4 not found, disabling it.
708 12:41:09.377298 PCI: 00:1f.0 [8086/0000] bus ops
709 12:41:09.380220 PCI: 00:1f.0 [8086/9d84] enabled
710 12:41:09.385748 PCI: Static device PCI: 00:1f.1 not found, disabling it.
711 12:41:09.391491 PCI: Static device PCI: 00:1f.2 not found, disabling it.
712 12:41:09.394803 PCI: 00:1f.3 [8086/0000] bus ops
713 12:41:09.398105 PCI: 00:1f.3 [8086/9dc8] enabled
714 12:41:09.401290 PCI: 00:1f.4 [8086/0000] bus ops
715 12:41:09.404735 PCI: 00:1f.4 [8086/9da3] enabled
716 12:41:09.408092 PCI: 00:1f.5 [8086/0000] bus ops
717 12:41:09.411462 PCI: 00:1f.5 [8086/9da4] enabled
718 12:41:09.414899 PCI: 00:1f.6 [8086/15be] enabled
719 12:41:09.417962 PCI: Leftover static devices:
720 12:41:09.419258 PCI: 00:12.5
721 12:41:09.420084 PCI: 00:12.6
722 12:41:09.422036 PCI: 00:13.0
723 12:41:09.422852 PCI: 00:14.1
724 12:41:09.424340 PCI: 00:14.5
725 12:41:09.425733 PCI: 00:15.2
726 12:41:09.427138 PCI: 00:15.3
727 12:41:09.428386 PCI: 00:16.1
728 12:41:09.429915 PCI: 00:16.2
729 12:41:09.431040 PCI: 00:16.3
730 12:41:09.432585 PCI: 00:16.4
731 12:41:09.434036 PCI: 00:16.5
732 12:41:09.435431 PCI: 00:19.1
733 12:41:09.436805 PCI: 00:1a.0
734 12:41:09.438141 PCI: 00:1c.1
735 12:41:09.439589 PCI: 00:1c.2
736 12:41:09.440816 PCI: 00:1c.3
737 12:41:09.442808 PCI: 00:1c.4
738 12:41:09.443809 PCI: 00:1c.5
739 12:41:09.445226 PCI: 00:1c.6
740 12:41:09.446686 PCI: 00:1c.7
741 12:41:09.448182 PCI: 00:1d.1
742 12:41:09.449202 PCI: 00:1d.2
743 12:41:09.450391 PCI: 00:1d.3
744 12:41:09.451751 PCI: 00:1d.4
745 12:41:09.452883 PCI: 00:1e.0
746 12:41:09.454856 PCI: 00:1e.1
747 12:41:09.455474 PCI: 00:1e.2
748 12:41:09.457617 PCI: 00:1e.3
749 12:41:09.458461 PCI: 00:1f.1
750 12:41:09.460251 PCI: 00:1f.2
751 12:41:09.463271 PCI: Check your devicetree.cb.
752 12:41:09.465575 PCI: 00:14.0 scanning...
753 12:41:09.468636 scan_usb_bus for PCI: 00:14.0
754 12:41:09.471092 USB0 port 0 enabled
755 12:41:09.473178 USB0 port 0 scanning...
756 12:41:09.476765 scan_usb_bus for USB0 port 0
757 12:41:09.479141 USB2 port 0 enabled
758 12:41:09.480724 USB2 port 1 enabled
759 12:41:09.482800 USB2 port 2 enabled
760 12:41:09.484913 USB2 port 4 enabled
761 12:41:09.486823 USB2 port 5 enabled
762 12:41:09.489202 USB2 port 6 enabled
763 12:41:09.491322 USB2 port 7 enabled
764 12:41:09.492931 USB2 port 8 enabled
765 12:41:09.495292 USB2 port 9 enabled
766 12:41:09.497298 USB3 port 0 enabled
767 12:41:09.499375 USB3 port 1 enabled
768 12:41:09.500986 USB3 port 2 enabled
769 12:41:09.503572 USB3 port 3 enabled
770 12:41:09.505232 USB3 port 4 enabled
771 12:41:09.507750 USB2 port 0 scanning...
772 12:41:09.510587 scan_usb_bus for USB2 port 0
773 12:41:09.514540 scan_usb_bus for USB2 port 0 done
774 12:41:09.519866 scan_bus: scanning of bus USB2 port 0 took 9064 usecs
775 12:41:09.522211 USB2 port 1 scanning...
776 12:41:09.525447 scan_usb_bus for USB2 port 1
777 12:41:09.528961 scan_usb_bus for USB2 port 1 done
778 12:41:09.534053 scan_bus: scanning of bus USB2 port 1 took 9065 usecs
779 12:41:09.536385 USB2 port 2 scanning...
780 12:41:09.539730 scan_usb_bus for USB2 port 2
781 12:41:09.543219 scan_usb_bus for USB2 port 2 done
782 12:41:09.548477 scan_bus: scanning of bus USB2 port 2 took 9062 usecs
783 12:41:09.550977 USB2 port 4 scanning...
784 12:41:09.554148 scan_usb_bus for USB2 port 4
785 12:41:09.557620 scan_usb_bus for USB2 port 4 done
786 12:41:09.563045 scan_bus: scanning of bus USB2 port 4 took 9061 usecs
787 12:41:09.565286 USB2 port 5 scanning...
788 12:41:09.568410 scan_usb_bus for USB2 port 5
789 12:41:09.571811 scan_usb_bus for USB2 port 5 done
790 12:41:09.576777 scan_bus: scanning of bus USB2 port 5 took 9061 usecs
791 12:41:09.579846 USB2 port 6 scanning...
792 12:41:09.582990 scan_usb_bus for USB2 port 6
793 12:41:09.586287 scan_usb_bus for USB2 port 6 done
794 12:41:09.591913 scan_bus: scanning of bus USB2 port 6 took 9061 usecs
795 12:41:09.594342 USB2 port 7 scanning...
796 12:41:09.597340 scan_usb_bus for USB2 port 7
797 12:41:09.600526 scan_usb_bus for USB2 port 7 done
798 12:41:09.605842 scan_bus: scanning of bus USB2 port 7 took 9061 usecs
799 12:41:09.608322 USB2 port 8 scanning...
800 12:41:09.612069 scan_usb_bus for USB2 port 8
801 12:41:09.614910 scan_usb_bus for USB2 port 8 done
802 12:41:09.620599 scan_bus: scanning of bus USB2 port 8 took 9061 usecs
803 12:41:09.622447 USB2 port 9 scanning...
804 12:41:09.626403 scan_usb_bus for USB2 port 9
805 12:41:09.629752 scan_usb_bus for USB2 port 9 done
806 12:41:09.634777 scan_bus: scanning of bus USB2 port 9 took 9062 usecs
807 12:41:09.637287 USB3 port 0 scanning...
808 12:41:09.640456 scan_usb_bus for USB3 port 0
809 12:41:09.643921 scan_usb_bus for USB3 port 0 done
810 12:41:09.649446 scan_bus: scanning of bus USB3 port 0 took 9061 usecs
811 12:41:09.651495 USB3 port 1 scanning...
812 12:41:09.655442 scan_usb_bus for USB3 port 1
813 12:41:09.658251 scan_usb_bus for USB3 port 1 done
814 12:41:09.663784 scan_bus: scanning of bus USB3 port 1 took 9062 usecs
815 12:41:09.666018 USB3 port 2 scanning...
816 12:41:09.669445 scan_usb_bus for USB3 port 2
817 12:41:09.673009 scan_usb_bus for USB3 port 2 done
818 12:41:09.677947 scan_bus: scanning of bus USB3 port 2 took 9060 usecs
819 12:41:09.680505 USB3 port 3 scanning...
820 12:41:09.683509 scan_usb_bus for USB3 port 3
821 12:41:09.687011 scan_usb_bus for USB3 port 3 done
822 12:41:09.692844 scan_bus: scanning of bus USB3 port 3 took 9059 usecs
823 12:41:09.694945 USB3 port 4 scanning...
824 12:41:09.698577 scan_usb_bus for USB3 port 4
825 12:41:09.701903 scan_usb_bus for USB3 port 4 done
826 12:41:09.706788 scan_bus: scanning of bus USB3 port 4 took 9062 usecs
827 12:41:09.710025 scan_usb_bus for USB0 port 0 done
828 12:41:09.716087 scan_bus: scanning of bus USB0 port 0 took 239330 usecs
829 12:41:09.719572 scan_usb_bus for PCI: 00:14.0 done
830 12:41:09.725141 scan_bus: scanning of bus PCI: 00:14.0 took 256263 usecs
831 12:41:09.727439 PCI: 00:15.0 scanning...
832 12:41:09.731424 scan_generic_bus for PCI: 00:15.0
833 12:41:09.735315 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
834 12:41:09.739467 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
835 12:41:09.743759 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
836 12:41:09.747611 scan_generic_bus for PCI: 00:15.0 done
837 12:41:09.753217 scan_bus: scanning of bus PCI: 00:15.0 took 22380 usecs
838 12:41:09.755645 PCI: 00:15.1 scanning...
839 12:41:09.759236 scan_generic_bus for PCI: 00:15.1
840 12:41:09.763509 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
841 12:41:09.767424 scan_generic_bus for PCI: 00:15.1 done
842 12:41:09.772607 scan_bus: scanning of bus PCI: 00:15.1 took 14212 usecs
843 12:41:09.775402 PCI: 00:19.0 scanning...
844 12:41:09.778649 scan_generic_bus for PCI: 00:19.0
845 12:41:09.782914 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
846 12:41:09.787068 scan_generic_bus for PCI: 00:19.0 done
847 12:41:09.792501 scan_bus: scanning of bus PCI: 00:19.0 took 14214 usecs
848 12:41:09.795069 PCI: 00:1c.0 scanning...
849 12:41:09.798640 do_pci_scan_bridge for PCI: 00:1c.0
850 12:41:09.801609 PCI: pci_scan_bus for bus 01
851 12:41:09.805164 PCI: 01:00.0 [10ec/525a] enabled
852 12:41:09.808435 Capability: type 0x01 @ 0x80
853 12:41:09.811110 Capability: type 0x05 @ 0x90
854 12:41:09.814164 Capability: type 0x10 @ 0xb0
855 12:41:09.817148 Capability: type 0x10 @ 0x40
856 12:41:09.820656 Enabling Common Clock Configuration
857 12:41:09.825324 L1 Sub-State supported from root port 28
858 12:41:09.827720 L1 Sub-State Support = 0xf
859 12:41:09.830477 CommonModeRestoreTime = 0x3c
860 12:41:09.835127 Power On Value = 0x6, Power On Scale = 0x1
861 12:41:09.837286 ASPM: Enabled L0s and L1
862 12:41:09.840038 Capability: type 0x01 @ 0x80
863 12:41:09.843141 Capability: type 0x05 @ 0x90
864 12:41:09.846144 Capability: type 0x10 @ 0xb0
865 12:41:09.851896 scan_bus: scanning of bus PCI: 00:1c.0 took 53676 usecs
866 12:41:09.854200 PCI: 00:1d.0 scanning...
867 12:41:09.857749 do_pci_scan_bridge for PCI: 00:1d.0
868 12:41:09.860835 PCI: pci_scan_bus for bus 02
869 12:41:09.864580 PCI: 02:00.0 [1e95/9100] enabled
870 12:41:09.867340 Capability: type 0x01 @ 0x40
871 12:41:09.870410 Capability: type 0x05 @ 0x50
872 12:41:09.873331 Capability: type 0x10 @ 0x70
873 12:41:09.876497 Capability: type 0x10 @ 0x40
874 12:41:09.879920 Enabling Common Clock Configuration
875 12:41:09.884665 L1 Sub-State supported from root port 29
876 12:41:09.886584 L1 Sub-State Support = 0xf
877 12:41:09.889805 CommonModeRestoreTime = 0x28
878 12:41:09.893909 Power On Value = 0x16, Power On Scale = 0x0
879 12:41:09.896023 ASPM: Enabled L1
880 12:41:09.898589 Capability: type 0x01 @ 0x40
881 12:41:09.901485 Capability: type 0x05 @ 0x50
882 12:41:09.904284 Capability: type 0x10 @ 0x70
883 12:41:09.910262 scan_bus: scanning of bus PCI: 00:1d.0 took 52970 usecs
884 12:41:09.912580 PCI: 00:1f.0 scanning...
885 12:41:09.916363 scan_lpc_bus for PCI: 00:1f.0
886 12:41:09.918360 PNP: 0c09.0 enabled
887 12:41:09.921699 scan_lpc_bus for PCI: 00:1f.0 done
888 12:41:09.926953 scan_bus: scanning of bus PCI: 00:1f.0 took 11394 usecs
889 12:41:09.930201 PCI: 00:1f.3 scanning...
890 12:41:09.935361 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
891 12:41:09.938073 PCI: 00:1f.4 scanning...
892 12:41:09.941481 scan_generic_bus for PCI: 00:1f.4
893 12:41:09.945486 scan_generic_bus for PCI: 00:1f.4 done
894 12:41:09.951055 scan_bus: scanning of bus PCI: 00:1f.4 took 10130 usecs
895 12:41:09.953728 PCI: 00:1f.5 scanning...
896 12:41:09.957209 scan_generic_bus for PCI: 00:1f.5
897 12:41:09.960844 scan_generic_bus for PCI: 00:1f.5 done
898 12:41:09.966424 scan_bus: scanning of bus PCI: 00:1f.5 took 10131 usecs
899 12:41:09.972674 scan_bus: scanning of bus DOMAIN: 0000 took 703727 usecs
900 12:41:09.976483 root_dev_scan_bus for Root Device done
901 12:41:09.981695 scan_bus: scanning of bus Root Device took 723864 usecs
902 12:41:09.982397 done
903 12:41:09.988952 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
904 12:41:09.994505 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
905 12:41:10.002820 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
906 12:41:10.009108 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
907 12:41:10.012922 SPI flash protection: WPSW=1 SRP0=1
908 12:41:10.019887 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
909 12:41:10.025569 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
910 12:41:10.032021 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1119943 exit 42595
911 12:41:10.034909 found VGA at PCI: 00:02.0
912 12:41:10.037257 Setting up VGA for PCI: 00:02.0
913 12:41:10.042727 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
914 12:41:10.047994 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
915 12:41:10.049944 Allocating resources...
916 12:41:10.051978 Reading resources...
917 12:41:10.056557 Root Device read_resources bus 0 link: 0
918 12:41:10.061006 CPU_CLUSTER: 0 read_resources bus 0 link: 0
919 12:41:10.065829 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
920 12:41:10.070632 DOMAIN: 0000 read_resources bus 0 link: 0
921 12:41:10.076602 PCI: 00:14.0 read_resources bus 0 link: 0
922 12:41:10.081519 USB0 port 0 read_resources bus 0 link: 0
923 12:41:10.090321 USB0 port 0 read_resources bus 0 link: 0 done
924 12:41:10.095391 PCI: 00:14.0 read_resources bus 0 link: 0 done
925 12:41:10.101238 PCI: 00:15.0 read_resources bus 1 link: 0
926 12:41:10.106674 PCI: 00:15.0 read_resources bus 1 link: 0 done
927 12:41:10.111050 PCI: 00:15.1 read_resources bus 2 link: 0
928 12:41:10.116289 PCI: 00:15.1 read_resources bus 2 link: 0 done
929 12:41:10.121509 PCI: 00:19.0 read_resources bus 3 link: 0
930 12:41:10.127083 PCI: 00:19.0 read_resources bus 3 link: 0 done
931 12:41:10.131728 PCI: 00:1c.0 read_resources bus 1 link: 0
932 12:41:10.137175 PCI: 00:1c.0 read_resources bus 1 link: 0 done
933 12:41:10.141615 PCI: 00:1d.0 read_resources bus 2 link: 0
934 12:41:10.147109 PCI: 00:1d.0 read_resources bus 2 link: 0 done
935 12:41:10.151689 PCI: 00:1f.0 read_resources bus 0 link: 0
936 12:41:10.157091 PCI: 00:1f.0 read_resources bus 0 link: 0 done
937 12:41:10.163081 DOMAIN: 0000 read_resources bus 0 link: 0 done
938 12:41:10.168343 Root Device read_resources bus 0 link: 0 done
939 12:41:10.170759 Done reading resources.
940 12:41:10.176920 Show resources in subtree (Root Device)...After reading.
941 12:41:10.180925 Root Device child on link 0 CPU_CLUSTER: 0
942 12:41:10.184834 CPU_CLUSTER: 0 child on link 0 APIC: 00
943 12:41:10.186240 APIC: 00
944 12:41:10.187608 APIC: 02
945 12:41:10.191817 DOMAIN: 0000 child on link 0 PCI: 00:00.0
946 12:41:10.200843 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
947 12:41:10.210493 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
948 12:41:10.212475 PCI: 00:00.0
949 12:41:10.222027 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
950 12:41:10.231125 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
951 12:41:10.240868 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
952 12:41:10.249998 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
953 12:41:10.259208 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
954 12:41:10.268874 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
955 12:41:10.278183 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
956 12:41:10.286687 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
957 12:41:10.296287 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
958 12:41:10.305814 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
959 12:41:10.315761 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
960 12:41:10.325020 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
961 12:41:10.334282 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
962 12:41:10.343497 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
963 12:41:10.345579 PCI: 00:02.0
964 12:41:10.355238 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
965 12:41:10.365655 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
966 12:41:10.373859 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
967 12:41:10.376116 PCI: 00:04.0
968 12:41:10.385734 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
969 12:41:10.387022 PCI: 00:08.0
970 12:41:10.397081 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
971 12:41:10.398912 PCI: 00:12.0
972 12:41:10.409057 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
973 12:41:10.413219 PCI: 00:14.0 child on link 0 USB0 port 0
974 12:41:10.423467 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
975 12:41:10.427532 USB0 port 0 child on link 0 USB2 port 0
976 12:41:10.429347 USB2 port 0
977 12:41:10.431282 USB2 port 1
978 12:41:10.433050 USB2 port 2
979 12:41:10.434701 USB2 port 4
980 12:41:10.436504 USB2 port 5
981 12:41:10.438314 USB2 port 6
982 12:41:10.439719 USB2 port 7
983 12:41:10.441644 USB2 port 8
984 12:41:10.442966 USB2 port 9
985 12:41:10.444711 USB3 port 0
986 12:41:10.446702 USB3 port 1
987 12:41:10.448322 USB3 port 2
988 12:41:10.450423 USB3 port 3
989 12:41:10.452451 USB3 port 4
990 12:41:10.453816 PCI: 00:14.2
991 12:41:10.463474 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
992 12:41:10.473828 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
993 12:41:10.475315 PCI: 00:14.3
994 12:41:10.485276 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
995 12:41:10.489867 PCI: 00:15.0 child on link 0 I2C: 01:10
996 12:41:10.499562 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
997 12:41:10.501254 I2C: 01:10
998 12:41:10.502659 I2C: 01:10
999 12:41:10.503795 I2C: 01:34
1000 12:41:10.508569 PCI: 00:15.1 child on link 0 I2C: 02:2c
1001 12:41:10.518009 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1002 12:41:10.519650 I2C: 02:2c
1003 12:41:10.521040 PCI: 00:16.0
1004 12:41:10.531832 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 12:41:10.533309 PCI: 00:17.0
1006 12:41:10.542373 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1007 12:41:10.550995 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1008 12:41:10.559128 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1009 12:41:10.567947 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1010 12:41:10.575865 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1011 12:41:10.585324 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1012 12:41:10.589228 PCI: 00:19.0 child on link 0 I2C: 03:50
1013 12:41:10.599318 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1014 12:41:10.609323 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1015 12:41:10.610551 I2C: 03:50
1016 12:41:10.612551 PCI: 00:19.2
1017 12:41:10.623401 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1018 12:41:10.633295 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1019 12:41:10.637760 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1020 12:41:10.646764 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1021 12:41:10.656651 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1022 12:41:10.665311 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1023 12:41:10.666824 PCI: 01:00.0
1024 12:41:10.675994 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1025 12:41:10.680873 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1026 12:41:10.689463 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1027 12:41:10.699217 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1028 12:41:10.708323 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1029 12:41:10.709775 PCI: 02:00.0
1030 12:41:10.719650 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1031 12:41:10.724346 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1032 12:41:10.732951 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1033 12:41:10.742032 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1034 12:41:10.743860 PNP: 0c09.0
1035 12:41:10.752112 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1036 12:41:10.760905 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1037 12:41:10.769295 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1038 12:41:10.770842 PCI: 00:1f.3
1039 12:41:10.781001 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1040 12:41:10.791754 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1041 12:41:10.792807 PCI: 00:1f.4
1042 12:41:10.801898 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1043 12:41:10.811700 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1044 12:41:10.813185 PCI: 00:1f.5
1045 12:41:10.822338 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1046 12:41:10.823839 PCI: 00:1f.6
1047 12:41:10.833043 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1048 12:41:10.839816 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1049 12:41:10.845794 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1050 12:41:10.852891 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1051 12:41:10.858990 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1052 12:41:10.866114 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1053 12:41:10.869045 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1054 12:41:10.873047 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1055 12:41:10.876673 PCI: 00:17.0 18 * [0x60 - 0x67] io
1056 12:41:10.880333 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1057 12:41:10.887044 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1058 12:41:10.893693 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1059 12:41:10.901473 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1060 12:41:10.909780 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1061 12:41:10.916799 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1062 12:41:10.920410 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1063 12:41:10.928203 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1064 12:41:10.936350 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1065 12:41:10.945060 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1066 12:41:10.951724 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1067 12:41:10.955863 PCI: 02:00.0 10 * [0x0 - 0x3fff] mem
1068 12:41:10.963329 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1069 12:41:10.968085 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1070 12:41:10.973667 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1071 12:41:10.977953 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1072 12:41:10.982558 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1073 12:41:10.987223 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1074 12:41:10.992257 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1075 12:41:10.997066 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1076 12:41:11.002072 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1077 12:41:11.007119 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1078 12:41:11.011767 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1079 12:41:11.016608 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1080 12:41:11.021251 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1081 12:41:11.026677 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1082 12:41:11.031591 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1083 12:41:11.036436 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1084 12:41:11.040716 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1085 12:41:11.046109 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1086 12:41:11.050749 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1087 12:41:11.055643 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1088 12:41:11.060261 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1089 12:41:11.065336 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1090 12:41:11.070077 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1091 12:41:11.075349 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1092 12:41:11.080176 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1093 12:41:11.084729 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1094 12:41:11.093498 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1095 12:41:11.096988 avoid_fixed_resources: DOMAIN: 0000
1096 12:41:11.102495 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1097 12:41:11.108835 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1098 12:41:11.116580 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1099 12:41:11.124080 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1100 12:41:11.131958 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1101 12:41:11.139385 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1102 12:41:11.147018 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1103 12:41:11.154711 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1104 12:41:11.162227 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1105 12:41:11.169839 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1106 12:41:11.176916 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1107 12:41:11.184588 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1108 12:41:11.186418 Setting resources...
1109 12:41:11.192900 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1110 12:41:11.197317 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1111 12:41:11.201158 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1112 12:41:11.204928 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1113 12:41:11.208892 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1114 12:41:11.214893 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1115 12:41:11.221333 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1116 12:41:11.227439 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1117 12:41:11.233975 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1118 12:41:11.240352 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1119 12:41:11.247803 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1120 12:41:11.253132 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1121 12:41:11.258028 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1122 12:41:11.262891 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1123 12:41:11.267658 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1124 12:41:11.272882 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1125 12:41:11.277750 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1126 12:41:11.282671 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1127 12:41:11.287552 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1128 12:41:11.292203 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1129 12:41:11.296492 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1130 12:41:11.301270 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1131 12:41:11.306432 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1132 12:41:11.311271 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1133 12:41:11.316632 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1134 12:41:11.321124 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1135 12:41:11.325645 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1136 12:41:11.330528 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1137 12:41:11.335563 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1138 12:41:11.340415 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1139 12:41:11.345745 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1140 12:41:11.350437 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1141 12:41:11.354955 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1142 12:41:11.359887 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1143 12:41:11.364939 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1144 12:41:11.369642 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1145 12:41:11.377268 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1146 12:41:11.384658 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1147 12:41:11.392015 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1148 12:41:11.399433 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1149 12:41:11.404260 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1150 12:41:11.411263 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1151 12:41:11.419363 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1152 12:41:11.426676 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1153 12:41:11.434060 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1154 12:41:11.438780 PCI: 02:00.0 10 * [0xd1100000 - 0xd1103fff] mem
1155 12:41:11.445991 PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done
1156 12:41:11.450308 Root Device assign_resources, bus 0 link: 0
1157 12:41:11.455376 DOMAIN: 0000 assign_resources, bus 0 link: 0
1158 12:41:11.464097 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1159 12:41:11.472268 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1160 12:41:11.480086 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1161 12:41:11.488129 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1162 12:41:11.496517 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1163 12:41:11.505007 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1164 12:41:11.512705 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1165 12:41:11.517211 PCI: 00:14.0 assign_resources, bus 0 link: 0
1166 12:41:11.522061 PCI: 00:14.0 assign_resources, bus 0 link: 0
1167 12:41:11.530862 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1168 12:41:11.538374 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1169 12:41:11.546331 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1170 12:41:11.555007 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1171 12:41:11.559314 PCI: 00:15.0 assign_resources, bus 1 link: 0
1172 12:41:11.564195 PCI: 00:15.0 assign_resources, bus 1 link: 0
1173 12:41:11.572157 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1174 12:41:11.576735 PCI: 00:15.1 assign_resources, bus 2 link: 0
1175 12:41:11.581428 PCI: 00:15.1 assign_resources, bus 2 link: 0
1176 12:41:11.589929 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1177 12:41:11.598090 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1178 12:41:11.605999 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1179 12:41:11.613905 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1180 12:41:11.621703 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1181 12:41:11.628951 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1182 12:41:11.636511 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1183 12:41:11.645090 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1184 12:41:11.652697 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1185 12:41:11.657473 PCI: 00:19.0 assign_resources, bus 3 link: 0
1186 12:41:11.661879 PCI: 00:19.0 assign_resources, bus 3 link: 0
1187 12:41:11.670353 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1188 12:41:11.679047 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1189 12:41:11.688068 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1190 12:41:11.696915 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1191 12:41:11.700806 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1192 12:41:11.708763 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1193 12:41:11.713906 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1194 12:41:11.722456 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1195 12:41:11.731661 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1196 12:41:11.739500 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1197 12:41:11.744624 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1198 12:41:11.752935 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64
1199 12:41:11.757253 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1200 12:41:11.761818 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1201 12:41:11.767412 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1202 12:41:11.771908 LPC: Trying to open IO window from 930 size 8
1203 12:41:11.776607 LPC: Trying to open IO window from 940 size 8
1204 12:41:11.781206 LPC: Trying to open IO window from 950 size 10
1205 12:41:11.789024 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1206 12:41:11.796972 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1207 12:41:11.805802 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1208 12:41:11.813465 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1209 12:41:11.821872 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1210 12:41:11.826891 DOMAIN: 0000 assign_resources, bus 0 link: 0
1211 12:41:11.831308 Root Device assign_resources, bus 0 link: 0
1212 12:41:11.833719 Done setting resources.
1213 12:41:11.840043 Show resources in subtree (Root Device)...After assigning values.
1214 12:41:11.844512 Root Device child on link 0 CPU_CLUSTER: 0
1215 12:41:11.848589 CPU_CLUSTER: 0 child on link 0 APIC: 00
1216 12:41:11.850253 APIC: 00
1217 12:41:11.851538 APIC: 02
1218 12:41:11.855862 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1219 12:41:11.865431 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1220 12:41:11.876449 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1221 12:41:11.878169 PCI: 00:00.0
1222 12:41:11.887414 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1223 12:41:11.897508 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1224 12:41:11.906133 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1225 12:41:11.916068 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1226 12:41:11.925419 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1227 12:41:11.934376 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1228 12:41:11.943714 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1229 12:41:11.952388 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1230 12:41:11.962004 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1231 12:41:11.971525 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1232 12:41:11.981612 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1233 12:41:11.990910 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
1234 12:41:11.999843 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1235 12:41:12.009656 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1236 12:41:12.010965 PCI: 00:02.0
1237 12:41:12.021570 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1238 12:41:12.032446 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1239 12:41:12.041562 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1240 12:41:12.043024 PCI: 00:04.0
1241 12:41:12.053495 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1242 12:41:12.054606 PCI: 00:08.0
1243 12:41:12.065421 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1244 12:41:12.067095 PCI: 00:12.0
1245 12:41:12.077133 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1246 12:41:12.081550 PCI: 00:14.0 child on link 0 USB0 port 0
1247 12:41:12.092371 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1248 12:41:12.096614 USB0 port 0 child on link 0 USB2 port 0
1249 12:41:12.097664 USB2 port 0
1250 12:41:12.099814 USB2 port 1
1251 12:41:12.101391 USB2 port 2
1252 12:41:12.103232 USB2 port 4
1253 12:41:12.105125 USB2 port 5
1254 12:41:12.106835 USB2 port 6
1255 12:41:12.108202 USB2 port 7
1256 12:41:12.110467 USB2 port 8
1257 12:41:12.112229 USB2 port 9
1258 12:41:12.113714 USB3 port 0
1259 12:41:12.116062 USB3 port 1
1260 12:41:12.117189 USB3 port 2
1261 12:41:12.118999 USB3 port 3
1262 12:41:12.120645 USB3 port 4
1263 12:41:12.122166 PCI: 00:14.2
1264 12:41:12.132549 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1265 12:41:12.142890 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1266 12:41:12.144988 PCI: 00:14.3
1267 12:41:12.155142 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1268 12:41:12.159162 PCI: 00:15.0 child on link 0 I2C: 01:10
1269 12:41:12.170014 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1270 12:41:12.171597 I2C: 01:10
1271 12:41:12.173182 I2C: 01:10
1272 12:41:12.174083 I2C: 01:34
1273 12:41:12.178732 PCI: 00:15.1 child on link 0 I2C: 02:2c
1274 12:41:12.188749 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1275 12:41:12.190489 I2C: 02:2c
1276 12:41:12.191896 PCI: 00:16.0
1277 12:41:12.202130 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1278 12:41:12.203985 PCI: 00:17.0
1279 12:41:12.214347 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1280 12:41:12.224378 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1281 12:41:12.233620 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1282 12:41:12.243033 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1283 12:41:12.251253 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1284 12:41:12.262165 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1285 12:41:12.265772 PCI: 00:19.0 child on link 0 I2C: 03:50
1286 12:41:12.276144 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1287 12:41:12.286803 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1288 12:41:12.288585 I2C: 03:50
1289 12:41:12.289834 PCI: 00:19.2
1290 12:41:12.301324 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1291 12:41:12.311065 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1292 12:41:12.315888 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1293 12:41:12.325041 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1294 12:41:12.335021 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1295 12:41:12.345369 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1296 12:41:12.347301 PCI: 01:00.0
1297 12:41:12.358519 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1298 12:41:12.361967 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1299 12:41:12.371459 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1300 12:41:12.381273 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1301 12:41:12.391680 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1302 12:41:12.393835 PCI: 02:00.0
1303 12:41:12.404316 PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10
1304 12:41:12.408335 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1305 12:41:12.417085 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1306 12:41:12.426073 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1307 12:41:12.427158 PNP: 0c09.0
1308 12:41:12.435889 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1309 12:41:12.445369 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1310 12:41:12.453001 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1311 12:41:12.455201 PCI: 00:1f.3
1312 12:41:12.465514 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1313 12:41:12.476083 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1314 12:41:12.477452 PCI: 00:1f.4
1315 12:41:12.486734 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1316 12:41:12.496483 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1317 12:41:12.498298 PCI: 00:1f.5
1318 12:41:12.508744 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1319 12:41:12.510190 PCI: 00:1f.6
1320 12:41:12.520924 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1321 12:41:12.523414 Done allocating resources.
1322 12:41:12.530007 BS: BS_DEV_RESOURCES times (us): entry 0 run 2491707 exit 13
1323 12:41:12.532112 Enabling resources...
1324 12:41:12.536871 PCI: 00:00.0 subsystem <- 1028/3e35
1325 12:41:12.539289 PCI: 00:00.0 cmd <- 06
1326 12:41:12.543081 PCI: 00:02.0 subsystem <- 1028/3ea1
1327 12:41:12.545229 PCI: 00:02.0 cmd <- 03
1328 12:41:12.549254 PCI: 00:04.0 subsystem <- 1028/1903
1329 12:41:12.551374 PCI: 00:04.0 cmd <- 02
1330 12:41:12.554259 PCI: 00:08.0 cmd <- 06
1331 12:41:12.558111 PCI: 00:12.0 subsystem <- 1028/9df9
1332 12:41:12.560079 PCI: 00:12.0 cmd <- 02
1333 12:41:12.564321 PCI: 00:14.0 subsystem <- 1028/9ded
1334 12:41:12.566977 PCI: 00:14.0 cmd <- 02
1335 12:41:12.569144 PCI: 00:14.2 cmd <- 02
1336 12:41:12.572966 PCI: 00:14.3 subsystem <- 1028/9df0
1337 12:41:12.575634 PCI: 00:14.3 cmd <- 02
1338 12:41:12.579593 PCI: 00:15.0 subsystem <- 1028/9de8
1339 12:41:12.581730 PCI: 00:15.0 cmd <- 02
1340 12:41:12.585895 PCI: 00:15.1 subsystem <- 1028/9de9
1341 12:41:12.587895 PCI: 00:15.1 cmd <- 02
1342 12:41:12.592120 PCI: 00:16.0 subsystem <- 1028/9de0
1343 12:41:12.594493 PCI: 00:16.0 cmd <- 02
1344 12:41:12.598423 PCI: 00:17.0 subsystem <- 1028/9dd3
1345 12:41:12.600361 PCI: 00:17.0 cmd <- 03
1346 12:41:12.604726 PCI: 00:19.0 subsystem <- 1028/9dc5
1347 12:41:12.606710 PCI: 00:19.0 cmd <- 06
1348 12:41:12.610669 PCI: 00:19.2 subsystem <- 1028/9dc7
1349 12:41:12.613003 PCI: 00:19.2 cmd <- 06
1350 12:41:12.616871 PCI: 00:1c.0 bridge ctrl <- 0003
1351 12:41:12.620309 PCI: 00:1c.0 subsystem <- 1028/9dbf
1352 12:41:12.622859 Capability: type 0x10 @ 0x40
1353 12:41:12.626183 Capability: type 0x05 @ 0x80
1354 12:41:12.629122 Capability: type 0x0d @ 0x90
1355 12:41:12.631067 PCI: 00:1c.0 cmd <- 06
1356 12:41:12.635323 PCI: 00:1d.0 bridge ctrl <- 0003
1357 12:41:12.638786 PCI: 00:1d.0 subsystem <- 1028/9db4
1358 12:41:12.641661 Capability: type 0x10 @ 0x40
1359 12:41:12.644570 Capability: type 0x05 @ 0x80
1360 12:41:12.646862 Capability: type 0x0d @ 0x90
1361 12:41:12.649661 PCI: 00:1d.0 cmd <- 06
1362 12:41:12.653873 PCI: 00:1f.0 subsystem <- 1028/9d84
1363 12:41:12.655821 PCI: 00:1f.0 cmd <- 407
1364 12:41:12.660284 PCI: 00:1f.3 subsystem <- 1028/9dc8
1365 12:41:12.662234 PCI: 00:1f.3 cmd <- 02
1366 12:41:12.666121 PCI: 00:1f.4 subsystem <- 1028/9da3
1367 12:41:12.668521 PCI: 00:1f.4 cmd <- 03
1368 12:41:12.672731 PCI: 00:1f.5 subsystem <- 1028/9da4
1369 12:41:12.674956 PCI: 00:1f.5 cmd <- 406
1370 12:41:12.679092 PCI: 00:1f.6 subsystem <- 1028/15be
1371 12:41:12.680861 PCI: 00:1f.6 cmd <- 02
1372 12:41:12.692063 PCI: 01:00.0 cmd <- 02
1373 12:41:12.694511 PCI: 02:00.0 cmd <- 02
1374 12:41:12.696763 done.
1375 12:41:12.702835 BS: BS_DEV_ENABLE times (us): entry 389 run 167120 exit 0
1376 12:41:12.705235 Initializing devices...
1377 12:41:12.707888 Root Device init ...
1378 12:41:12.711264 Root Device init finished in 2139 usecs
1379 12:41:12.714197 CPU_CLUSTER: 0 init ...
1380 12:41:12.718582 CPU_CLUSTER: 0 init finished in 2431 usecs
1381 12:41:12.722308 PCI: 00:00.0 init ...
1382 12:41:12.725076 CPU TDP: 15 Watts
1383 12:41:12.727299 CPU PL2 = 51 Watts
1384 12:41:12.731108 PCI: 00:00.0 init finished in 7037 usecs
1385 12:41:12.733462 PCI: 00:02.0 init ...
1386 12:41:12.737910 PCI: 00:02.0 init finished in 2237 usecs
1387 12:41:12.740609 PCI: 00:04.0 init ...
1388 12:41:12.744767 PCI: 00:04.0 init finished in 2237 usecs
1389 12:41:12.747084 PCI: 00:08.0 init ...
1390 12:41:12.751295 PCI: 00:08.0 init finished in 2237 usecs
1391 12:41:12.753765 PCI: 00:12.0 init ...
1392 12:41:12.758098 PCI: 00:12.0 init finished in 2236 usecs
1393 12:41:12.761032 PCI: 00:14.0 init ...
1394 12:41:12.765144 PCI: 00:14.0 init finished in 2237 usecs
1395 12:41:12.767137 PCI: 00:14.2 init ...
1396 12:41:12.771254 PCI: 00:14.2 init finished in 2236 usecs
1397 12:41:12.774354 PCI: 00:14.3 init ...
1398 12:41:12.778828 PCI: 00:14.3 init finished in 2241 usecs
1399 12:41:12.780725 PCI: 00:15.0 init ...
1400 12:41:12.784527 DW I2C bus 0 at 0xd1347000 (400 KHz)
1401 12:41:12.788768 PCI: 00:15.0 init finished in 5926 usecs
1402 12:41:12.791152 PCI: 00:15.1 init ...
1403 12:41:12.795055 DW I2C bus 1 at 0xd1348000 (400 KHz)
1404 12:41:12.799017 PCI: 00:15.1 init finished in 5927 usecs
1405 12:41:12.801751 PCI: 00:16.0 init ...
1406 12:41:12.805804 PCI: 00:16.0 init finished in 2237 usecs
1407 12:41:12.808980 PCI: 00:19.0 init ...
1408 12:41:12.812842 DW I2C bus 4 at 0xd134a000 (400 KHz)
1409 12:41:12.817044 PCI: 00:19.0 init finished in 5935 usecs
1410 12:41:12.819895 PCI: 00:1c.0 init ...
1411 12:41:12.822800 Initializing PCH PCIe bridge.
1412 12:41:12.827524 PCI: 00:1c.0 init finished in 5250 usecs
1413 12:41:12.829494 PCI: 00:1d.0 init ...
1414 12:41:12.832445 Initializing PCH PCIe bridge.
1415 12:41:12.836927 PCI: 00:1d.0 init finished in 5249 usecs
1416 12:41:12.839310 PCI: 00:1f.0 init ...
1417 12:41:12.843818 IOAPIC: Initializing IOAPIC at 0xfec00000
1418 12:41:12.848085 IOAPIC: Bootstrap Processor Local APIC = 0x00
1419 12:41:12.849975 IOAPIC: ID = 0x02
1420 12:41:12.852343 IOAPIC: Dumping registers
1421 12:41:12.854862 reg 0x0000: 0x02000000
1422 12:41:12.857608 reg 0x0001: 0x00770020
1423 12:41:12.860174 reg 0x0002: 0x00000000
1424 12:41:12.864607 PCI: 00:1f.0 init finished in 23311 usecs
1425 12:41:12.867378 PCI: 00:1f.3 init ...
1426 12:41:12.872467 HDA: codec_mask = 05
1427 12:41:12.875370 HDA: Initializing codec #2
1428 12:41:12.878319 HDA: codec viddid: 8086280b
1429 12:41:12.881030 HDA: No verb table entry found
1430 12:41:12.883480 HDA: Initializing codec #0
1431 12:41:12.886587 HDA: codec viddid: 10ec0236
1432 12:41:12.893258 HDA: verb loaded.
1433 12:41:12.897673 PCI: 00:1f.3 init finished in 28833 usecs
1434 12:41:12.901016 PCI: 00:1f.4 init ...
1435 12:41:12.904275 PCI: 00:1f.4 init finished in 2236 usecs
1436 12:41:12.908047 PCI: 00:1f.6 init ...
1437 12:41:12.911943 PCI: 00:1f.6 init finished in 2237 usecs
1438 12:41:12.922859 PCI: 01:00.0 init ...
1439 12:41:12.926849 PCI: 01:00.0 init finished in 2236 usecs
1440 12:41:12.929627 PCI: 02:00.0 init ...
1441 12:41:12.933385 PCI: 02:00.0 init finished in 2235 usecs
1442 12:41:12.935964 PNP: 0c09.0 init ...
1443 12:41:12.940142 EC Label : 00.00.20
1444 12:41:12.943868 EC Revision : 9ca674bba
1445 12:41:12.946970 EC Model Num : 08B9
1446 12:41:12.951067 EC Build Date : 05/10/19
1447 12:41:12.960196 PNP: 0c09.0 init finished in 21732 usecs
1448 12:41:12.961723 Devices initialized
1449 12:41:12.965005 Show all devs... After init.
1450 12:41:12.967215 Root Device: enabled 1
1451 12:41:12.970390 CPU_CLUSTER: 0: enabled 1
1452 12:41:12.972127 DOMAIN: 0000: enabled 1
1453 12:41:12.974392 APIC: 00: enabled 1
1454 12:41:12.976725 PCI: 00:00.0: enabled 1
1455 12:41:12.979716 PCI: 00:02.0: enabled 1
1456 12:41:12.981741 PCI: 00:04.0: enabled 1
1457 12:41:12.984700 PCI: 00:12.0: enabled 1
1458 12:41:12.986727 PCI: 00:12.5: enabled 0
1459 12:41:12.989576 PCI: 00:12.6: enabled 0
1460 12:41:12.991913 PCI: 00:13.0: enabled 0
1461 12:41:12.994213 PCI: 00:14.0: enabled 1
1462 12:41:12.996500 PCI: 00:14.1: enabled 0
1463 12:41:12.998786 PCI: 00:14.3: enabled 1
1464 12:41:13.001755 PCI: 00:14.5: enabled 0
1465 12:41:13.003710 PCI: 00:15.0: enabled 1
1466 12:41:13.006130 PCI: 00:15.1: enabled 1
1467 12:41:13.008696 PCI: 00:15.2: enabled 0
1468 12:41:13.010748 PCI: 00:15.3: enabled 0
1469 12:41:13.013672 PCI: 00:16.0: enabled 1
1470 12:41:13.015651 PCI: 00:16.1: enabled 0
1471 12:41:13.018395 PCI: 00:16.2: enabled 0
1472 12:41:13.020807 PCI: 00:16.3: enabled 0
1473 12:41:13.023184 PCI: 00:16.4: enabled 0
1474 12:41:13.025605 PCI: 00:16.5: enabled 0
1475 12:41:13.027928 PCI: 00:17.0: enabled 1
1476 12:41:13.030513 PCI: 00:19.0: enabled 1
1477 12:41:13.032928 PCI: 00:19.1: enabled 0
1478 12:41:13.035256 PCI: 00:19.2: enabled 1
1479 12:41:13.037373 PCI: 00:1a.0: enabled 0
1480 12:41:13.039953 PCI: 00:1c.0: enabled 1
1481 12:41:13.042253 PCI: 00:1c.1: enabled 0
1482 12:41:13.044507 PCI: 00:1c.2: enabled 0
1483 12:41:13.047205 PCI: 00:1c.3: enabled 0
1484 12:41:13.050009 PCI: 00:1c.4: enabled 0
1485 12:41:13.051864 PCI: 00:1c.5: enabled 0
1486 12:41:13.054459 PCI: 00:1c.6: enabled 0
1487 12:41:13.056632 PCI: 00:1c.7: enabled 0
1488 12:41:13.059206 PCI: 00:1d.0: enabled 1
1489 12:41:13.061990 PCI: 00:1d.1: enabled 0
1490 12:41:13.064014 PCI: 00:1d.2: enabled 0
1491 12:41:13.066970 PCI: 00:1d.3: enabled 0
1492 12:41:13.069351 PCI: 00:1d.4: enabled 0
1493 12:41:13.071494 PCI: 00:1e.0: enabled 0
1494 12:41:13.074046 PCI: 00:1e.1: enabled 0
1495 12:41:13.076926 PCI: 00:1e.2: enabled 0
1496 12:41:13.078754 PCI: 00:1e.3: enabled 0
1497 12:41:13.081304 PCI: 00:1f.0: enabled 1
1498 12:41:13.084162 PCI: 00:1f.1: enabled 0
1499 12:41:13.086216 PCI: 00:1f.2: enabled 0
1500 12:41:13.088905 PCI: 00:1f.3: enabled 1
1501 12:41:13.090906 PCI: 00:1f.4: enabled 1
1502 12:41:13.093483 PCI: 00:1f.5: enabled 1
1503 12:41:13.096274 PCI: 00:1f.6: enabled 1
1504 12:41:13.098388 USB0 port 0: enabled 1
1505 12:41:13.100635 I2C: 01:10: enabled 1
1506 12:41:13.102857 I2C: 01:10: enabled 1
1507 12:41:13.105098 I2C: 01:34: enabled 1
1508 12:41:13.107498 I2C: 02:2c: enabled 1
1509 12:41:13.109435 I2C: 03:50: enabled 1
1510 12:41:13.111487 PNP: 0c09.0: enabled 1
1511 12:41:13.114288 USB2 port 0: enabled 1
1512 12:41:13.116180 USB2 port 1: enabled 1
1513 12:41:13.118977 USB2 port 2: enabled 1
1514 12:41:13.121408 USB2 port 4: enabled 1
1515 12:41:13.123254 USB2 port 5: enabled 1
1516 12:41:13.125705 USB2 port 6: enabled 1
1517 12:41:13.128578 USB2 port 7: enabled 1
1518 12:41:13.130113 USB2 port 8: enabled 1
1519 12:41:13.133336 USB2 port 9: enabled 1
1520 12:41:13.135212 USB3 port 0: enabled 1
1521 12:41:13.137298 USB3 port 1: enabled 1
1522 12:41:13.140140 USB3 port 2: enabled 1
1523 12:41:13.142416 USB3 port 3: enabled 1
1524 12:41:13.144690 USB3 port 4: enabled 1
1525 12:41:13.146236 APIC: 02: enabled 1
1526 12:41:13.149315 PCI: 00:08.0: enabled 1
1527 12:41:13.151650 PCI: 00:14.2: enabled 1
1528 12:41:13.153596 PCI: 01:00.0: enabled 1
1529 12:41:13.156306 PCI: 02:00.0: enabled 1
1530 12:41:13.161618 Disabling ACPI via APMC:
1531 12:41:13.163601 done.
1532 12:41:13.168541 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1533 12:41:13.171736 ELOG: NV offset 0x1bf0000 size 0x4000
1534 12:41:13.179955 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1535 12:41:13.186276 ELOG: Event(17) added with size 13 at 2023-08-30 12:40:57 UTC
1536 12:41:13.192682 ELOG: Event(92) added with size 9 at 2023-08-30 12:40:58 UTC
1537 12:41:13.198982 ELOG: Event(93) added with size 9 at 2023-08-30 12:40:58 UTC
1538 12:41:13.205303 ELOG: Event(9A) added with size 9 at 2023-08-30 12:40:58 UTC
1539 12:41:13.211048 ELOG: Event(9E) added with size 10 at 2023-08-30 12:40:58 UTC
1540 12:41:13.217705 ELOG: Event(9F) added with size 14 at 2023-08-30 12:40:58 UTC
1541 12:41:13.223253 BS: BS_DEV_INIT times (us): entry 0 run 453547 exit 61284
1542 12:41:13.230094 ELOG: Event(A1) added with size 10 at 2023-08-30 12:40:58 UTC
1543 12:41:13.237977 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1544 12:41:13.244074 ELOG: Event(A0) added with size 9 at 2023-08-30 12:40:58 UTC
1545 12:41:13.248123 elog_add_boot_reason: Logged dev mode boot
1546 12:41:13.250558 Finalize devices...
1547 12:41:13.251952 PCI: 00:17.0 final
1548 12:41:13.254019 Devices finalized
1549 12:41:13.259642 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1550 12:41:13.266134 BS: BS_POST_DEVICE times (us): entry 24781 run 5926 exit 5362
1551 12:41:13.271915 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1552 12:41:13.279733 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1553 12:41:13.284516 disable_unused_touchscreen: Disable ACPI0C50
1554 12:41:13.288938 disable_unused_touchscreen: Enable ELAN900C
1555 12:41:13.291513 CBFS @ 1d00000 size 300000
1556 12:41:13.298114 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1557 12:41:13.301598 CBFS: Locating 'fallback/dsdt.aml'
1558 12:41:13.305914 CBFS: Found @ offset 10b200 size 4448
1559 12:41:13.308293 CBFS @ 1d00000 size 300000
1560 12:41:13.314515 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1561 12:41:13.317638 CBFS: Locating 'fallback/slic'
1562 12:41:13.322705 CBFS: 'fallback/slic' not found.
1563 12:41:13.326621 ACPI: Writing ACPI tables at 89c0f000.
1564 12:41:13.328352 ACPI: * FACS
1565 12:41:13.330527 ACPI: * DSDT
1566 12:41:13.333866 Ramoops buffer: 0x100000@0x89b0e000.
1567 12:41:13.338690 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1568 12:41:13.343471 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1569 12:41:13.347149 ACPI: * FADT
1570 12:41:13.348289 SCI is IRQ9
1571 12:41:13.351968 ACPI: added table 1/32, length now 40
1572 12:41:13.353564 ACPI: * SSDT
1573 12:41:13.357349 Found 1 CPU(s) with 2 core(s) each.
1574 12:41:13.361351 Error: Could not locate 'wifi_sar' in VPD.
1575 12:41:13.365923 Error: failed from getting SAR limits!
1576 12:41:13.369562 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1577 12:41:13.373810 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1578 12:41:13.377446 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1579 12:41:13.381904 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1580 12:41:13.387213 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1581 12:41:13.392612 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1582 12:41:13.396971 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1583 12:41:13.401313 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1584 12:41:13.407559 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1585 12:41:13.413391 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1586 12:41:13.418722 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1587 12:41:13.425487 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1588 12:41:13.429325 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1589 12:41:13.433862 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1590 12:41:13.438735 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1591 12:41:13.443744 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1592 12:41:13.448840 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1593 12:41:13.454848 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1594 12:41:13.460901 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1595 12:41:13.466883 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1596 12:41:13.472717 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1597 12:41:13.477312 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1598 12:41:13.481299 ACPI: added table 2/32, length now 44
1599 12:41:13.482733 ACPI: * MCFG
1600 12:41:13.486489 ACPI: added table 3/32, length now 48
1601 12:41:13.488288 ACPI: * TPM2
1602 12:41:13.491420 TPM2 log created at 89afe000
1603 12:41:13.494928 ACPI: added table 4/32, length now 52
1604 12:41:13.496779 ACPI: * MADT
1605 12:41:13.497754 SCI is IRQ9
1606 12:41:13.501218 ACPI: added table 5/32, length now 56
1607 12:41:13.503522 current = 89c14720
1608 12:41:13.505569 ACPI: * IGD OpRegion
1609 12:41:13.507835 GMA: Found VBT in CBFS
1610 12:41:13.511085 GMA: Found valid VBT in CBFS
1611 12:41:13.514910 ACPI: added table 6/32, length now 60
1612 12:41:13.516882 ACPI: * HPET
1613 12:41:13.520084 ACPI: added table 7/32, length now 64
1614 12:41:13.521426 ACPI: done.
1615 12:41:13.524091 ACPI tables: 30672 bytes.
1616 12:41:13.526905 smbios_write_tables: 89afd000
1617 12:41:13.529564 recv_ec_data: 0x01
1618 12:41:13.532004 Create SMBIOS type 17
1619 12:41:13.534221 PCI: 00:14.3 (Intel WiFi)
1620 12:41:13.537099 SMBIOS tables: 707 bytes.
1621 12:41:13.541160 Writing table forward entry at 0x00000500
1622 12:41:13.547013 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1623 12:41:13.550973 Writing coreboot table at 0x89c33000
1624 12:41:13.557132 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1625 12:41:13.561367 1. 0000000000001000-000000000009ffff: RAM
1626 12:41:13.565893 2. 00000000000a0000-00000000000fffff: RESERVED
1627 12:41:13.570375 3. 0000000000100000-0000000089afcfff: RAM
1628 12:41:13.576276 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1629 12:41:13.580873 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1630 12:41:13.586519 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1631 12:41:13.591660 7. 000000008a000000-000000008f7fffff: RESERVED
1632 12:41:13.596588 8. 00000000e0000000-00000000efffffff: RESERVED
1633 12:41:13.601251 9. 00000000fc000000-00000000fc000fff: RESERVED
1634 12:41:13.605852 10. 00000000fe000000-00000000fe00ffff: RESERVED
1635 12:41:13.610581 11. 00000000fed10000-00000000fed17fff: RESERVED
1636 12:41:13.615539 12. 00000000fed80000-00000000fed83fff: RESERVED
1637 12:41:13.619914 13. 00000000feda0000-00000000feda1fff: RESERVED
1638 12:41:13.624825 14. 0000000100000000-000000016e7fffff: RAM
1639 12:41:13.628916 Graphics framebuffer located at 0xc0000000
1640 12:41:13.631530 Passing 6 GPIOs to payload:
1641 12:41:13.636458 NAME | PORT | POLARITY | VALUE
1642 12:41:13.641867 write protect | 0x000000dc | high | high
1643 12:41:13.646999 recovery | 0x000000d5 | low | high
1644 12:41:13.653040 lid | undefined | high | high
1645 12:41:13.658330 power | undefined | high | low
1646 12:41:13.663176 oprom | undefined | high | low
1647 12:41:13.668282 EC in RW | undefined | high | low
1648 12:41:13.670334 recv_ec_data: 0x01
1649 12:41:13.671354 SKU ID: 3
1650 12:41:13.674389 CBFS @ 1d00000 size 300000
1651 12:41:13.680821 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1652 12:41:13.687221 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum d668
1653 12:41:13.690034 coreboot table: 1484 bytes.
1654 12:41:13.693306 IMD ROOT 0. 89fff000 00001000
1655 12:41:13.696015 IMD SMALL 1. 89ffe000 00001000
1656 12:41:13.699219 FSP MEMORY 2. 89d0e000 002f0000
1657 12:41:13.703017 CONSOLE 3. 89cee000 00020000
1658 12:41:13.706055 TIME STAMP 4. 89ced000 00000910
1659 12:41:13.709497 VBOOT WORK 5. 89cea000 00003000
1660 12:41:13.712927 VBOOT 6. 89ce9000 00000c0c
1661 12:41:13.716029 MRC DATA 7. 89ce7000 000018f0
1662 12:41:13.719279 ROMSTG STCK 8. 89ce6000 00000400
1663 12:41:13.723172 AFTER CAR 9. 89cdc000 0000a000
1664 12:41:13.726076 RAMSTAGE 10. 89c80000 0005c000
1665 12:41:13.729450 REFCODE 11. 89c4b000 00035000
1666 12:41:13.733149 SMM BACKUP 12. 89c3b000 00010000
1667 12:41:13.736328 COREBOOT 13. 89c33000 00008000
1668 12:41:13.739429 ACPI 14. 89c0f000 00024000
1669 12:41:13.742973 ACPI GNVS 15. 89c0e000 00001000
1670 12:41:13.746137 RAMOOPS 16. 89b0e000 00100000
1671 12:41:13.749262 TPM2 TCGLOG17. 89afe000 00010000
1672 12:41:13.752616 SMBIOS 18. 89afd000 00000800
1673 12:41:13.754432 IMD small region:
1674 12:41:13.757946 IMD ROOT 0. 89ffec00 00000400
1675 12:41:13.761492 FSP RUNTIME 1. 89ffebe0 00000004
1676 12:41:13.764883 POWER STATE 2. 89ffeba0 00000040
1677 12:41:13.768284 ROMSTAGE 3. 89ffeb80 00000004
1678 12:41:13.771899 MEM INFO 4. 89ffe9c0 000001a9
1679 12:41:13.775703 VPD 5. 89ffe960 00000047
1680 12:41:13.779118 COREBOOTFWD 6. 89ffe920 00000028
1681 12:41:13.782086 MTRR: Physical address space:
1682 12:41:13.788488 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1683 12:41:13.794340 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1684 12:41:13.800847 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1685 12:41:13.806579 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1686 12:41:13.813291 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1687 12:41:13.819450 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1688 12:41:13.825455 0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6
1689 12:41:13.829685 MTRR: Fixed MSR 0x250 0x0606060606060606
1690 12:41:13.833845 MTRR: Fixed MSR 0x258 0x0606060606060606
1691 12:41:13.837541 MTRR: Fixed MSR 0x259 0x0000000000000000
1692 12:41:13.842141 MTRR: Fixed MSR 0x268 0x0606060606060606
1693 12:41:13.845980 MTRR: Fixed MSR 0x269 0x0606060606060606
1694 12:41:13.850290 MTRR: Fixed MSR 0x26a 0x0606060606060606
1695 12:41:13.854240 MTRR: Fixed MSR 0x26b 0x0606060606060606
1696 12:41:13.857923 MTRR: Fixed MSR 0x26c 0x0606060606060606
1697 12:41:13.862272 MTRR: Fixed MSR 0x26d 0x0606060606060606
1698 12:41:13.866294 MTRR: Fixed MSR 0x26e 0x0606060606060606
1699 12:41:13.870274 MTRR: Fixed MSR 0x26f 0x0606060606060606
1700 12:41:13.873219 call enable_fixed_mtrr()
1701 12:41:13.876853 CPU physical address size: 39 bits
1702 12:41:13.881418 MTRR: default type WB/UC MTRR counts: 7/6.
1703 12:41:13.885045 MTRR: UC selected as default type.
1704 12:41:13.891148 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1705 12:41:13.897629 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1706 12:41:13.903747 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1707 12:41:13.909689 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1708 12:41:13.915833 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1709 12:41:13.922177 MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6
1710 12:41:13.923177
1711 12:41:13.924147 MTRR check
1712 12:41:13.926478 Fixed MTRRs : Enabled
1713 12:41:13.928846 Variable MTRRs: Enabled
1714 12:41:13.929185
1715 12:41:13.933497 MTRR: Fixed MSR 0x250 0x0606060606060606
1716 12:41:13.936913 MTRR: Fixed MSR 0x258 0x0606060606060606
1717 12:41:13.941140 MTRR: Fixed MSR 0x259 0x0000000000000000
1718 12:41:13.945170 MTRR: Fixed MSR 0x268 0x0606060606060606
1719 12:41:13.949471 MTRR: Fixed MSR 0x269 0x0606060606060606
1720 12:41:13.953705 MTRR: Fixed MSR 0x26a 0x0606060606060606
1721 12:41:13.957588 MTRR: Fixed MSR 0x26b 0x0606060606060606
1722 12:41:13.961762 MTRR: Fixed MSR 0x26c 0x0606060606060606
1723 12:41:13.966087 MTRR: Fixed MSR 0x26d 0x0606060606060606
1724 12:41:13.970063 MTRR: Fixed MSR 0x26e 0x0606060606060606
1725 12:41:13.973807 MTRR: Fixed MSR 0x26f 0x0606060606060606
1726 12:41:13.980632 BS: BS_WRITE_TABLES times (us): entry 17201 run 490351 exit 150068
1727 12:41:13.982900 call enable_fixed_mtrr()
1728 12:41:13.985494 CBFS @ 1d00000 size 300000
1729 12:41:13.991954 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1730 12:41:13.996174 CBFS: Locating 'fallback/payload'
1731 12:41:13.999147 CPU physical address size: 39 bits
1732 12:41:14.002970 CBFS: Found @ offset 1cf4c0 size 3a954
1733 12:41:14.007258 Checking segment from ROM address 0xffecf4f8
1734 12:41:14.012088 Checking segment from ROM address 0xffecf514
1735 12:41:14.016429 Loading segment from ROM address 0xffecf4f8
1736 12:41:14.018975 code (compression=0)
1737 12:41:14.027191 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1738 12:41:14.035570 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1739 12:41:14.037873 it's not compressed!
1740 12:41:14.119499 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1741 12:41:14.126666 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1742 12:41:14.135511 Loading segment from ROM address 0xffecf514
1743 12:41:14.137892 Entry Point 0x30100018
1744 12:41:14.139204 Loaded segments
1745 12:41:14.149113 Finalizing chipset.
1746 12:41:14.150402 Finalizing SMM.
1747 12:41:14.157120 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 158379 exit 11516
1748 12:41:14.160584 mp_park_aps done after 0 msecs.
1749 12:41:14.164272 Jumping to boot code at 30100018(89c33000)
1750 12:41:14.172981 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1751 12:41:14.173447
1752 12:41:14.173838
1753 12:41:14.174483
1754 12:41:14.176597 Starting depthcharge on sarien...
1755 12:41:14.179108 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1756 12:41:14.179668 start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
1757 12:41:14.180097 Setting prompt string to ['sarien:']
1758 12:41:14.180504 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:32)
1759 12:41:14.181168
1760 12:41:14.184450 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1761 12:41:14.185052
1762 12:41:14.192329 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1763 12:41:14.193018
1764 12:41:14.199881 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1765 12:41:14.200362
1766 12:41:14.202261 BIOS MMAP details:
1767 12:41:14.202670
1768 12:41:14.205247 IFD Base Offset : 0x1000000
1769 12:41:14.205660
1770 12:41:14.208041 IFD End Offset : 0x2000000
1771 12:41:14.208736
1772 12:41:14.210668 MMAP Size : 0x1000000
1773 12:41:14.211308
1774 12:41:14.213316 MMAP Start : 0xff000000
1775 12:41:14.214040
1776 12:41:14.219771 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1777 12:41:14.223002
1778 12:41:14.227578 Failed to find BH720 with VID/DID 1217:8620
1779 12:41:14.228121
1780 12:41:14.231111 New NVMe Controller 0x3214e050 @ 00:1d:04
1781 12:41:14.232170
1782 12:41:14.236089 New NVMe Controller 0x3214e118 @ 00:1d:00
1783 12:41:14.236792
1784 12:41:14.241645 The GBB signature is at 0x30000014 and is: 24 47 42 42
1785 12:41:14.245660
1786 12:41:14.248436 Wipe memory regions:
1787 12:41:14.248875
1788 12:41:14.251832 [0x00000000001000, 0x000000000a0000)
1789 12:41:14.252246
1790 12:41:14.255517 [0x00000000100000, 0x00000030000000)
1791 12:41:14.337913
1792 12:41:14.341071 [0x00000032751910, 0x00000089afd000)
1793 12:41:14.491994
1794 12:41:14.495685 [0x00000100000000, 0x0000016e800000)
1795 12:41:15.265985
1796 12:41:15.268362 R8152: Initializing
1797 12:41:15.268836
1798 12:41:15.271279 Version 6 (ocp_data = 5c30)
1799 12:41:15.272022
1800 12:41:15.274316 R8152: Done initializing
1801 12:41:15.274728
1802 12:41:15.275911 Adding net device
1803 12:41:15.276634
1804 12:41:15.281568 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
1805 12:41:15.282736
1806 12:41:15.283145
1807 12:41:15.283513
1808 12:41:15.284291 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1810 12:41:15.385506 sarien:tftpboot 192.168.201.1 11383510/tftp-deploy-d4g4lz0b/kernel/bzImage 11383510/tftp-deploy-d4g4lz0b/kernel/cmdline 11383510/tftp-deploy-d4g4lz0b/ramdisk/ramdisk.cpio.gz
1811 12:41:15.386149 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1812 12:41:15.386594 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
1813 12:41:15.435610 tftpboot 192.168.201.1 11383510/tftp-deploy-d4g4lz0b/kernel/bzImage 11383510/tftp-deploy-d4g4lz0b/kernel/cmdline 11383510/tftp-deploy-d4g4lz0b/ramdisk/ramdisk.cpio.gz
1814 12:41:15.436107
1815 12:41:15.436429 Waiting for link
1816 12:41:15.590074
1817 12:41:15.590885 done.
1818 12:41:15.591284
1819 12:41:15.592519 MAC: 00:24:32:30:77:df
1820 12:41:15.592959
1821 12:41:15.595877 Sending DHCP discover... done.
1822 12:41:15.596387
1823 12:41:15.598845 Waiting for reply... done.
1824 12:41:15.599840
1825 12:41:15.602761 Sending DHCP request... done.
1826 12:41:15.603175
1827 12:41:15.606160 Waiting for reply... done.
1828 12:41:15.606572
1829 12:41:15.608138 My ip is 192.168.201.221
1830 12:41:15.608559
1831 12:41:15.611997 The DHCP server ip is 192.168.201.1
1832 12:41:15.612417
1833 12:41:15.617020 TFTP server IP predefined by user: 192.168.201.1
1834 12:41:15.617440
1835 12:41:15.624480 Bootfile predefined by user: 11383510/tftp-deploy-d4g4lz0b/kernel/bzImage
1836 12:41:15.625024
1837 12:41:15.627381 Sending tftp read request... done.
1838 12:41:15.627847
1839 12:41:15.634169 Waiting for the transfer...
1840 12:41:15.634665
1841 12:41:16.173784 00000000 ################################################################
1842 12:41:16.174136
1843 12:41:16.679493 00080000 ################################################################
1844 12:41:16.679976
1845 12:41:17.184660 00100000 ################################################################
1846 12:41:17.185095
1847 12:41:17.685322 00180000 ################################################################
1848 12:41:17.685471
1849 12:41:18.193398 00200000 ################################################################
1850 12:41:18.193809
1851 12:41:18.690147 00280000 ################################################################
1852 12:41:18.690507
1853 12:41:19.192795 00300000 ################################################################
1854 12:41:19.193235
1855 12:41:19.710071 00380000 ################################################################
1856 12:41:19.710420
1857 12:41:20.225590 00400000 ################################################################
1858 12:41:20.226253
1859 12:41:20.748411 00480000 ################################################################
1860 12:41:20.748563
1861 12:41:21.259960 00500000 ################################################################
1862 12:41:21.260402
1863 12:41:21.776105 00580000 ################################################################
1864 12:41:21.776244
1865 12:41:22.414627 00600000 ################################################################
1866 12:41:22.415510
1867 12:41:23.072480 00680000 ################################################################
1868 12:41:23.072993
1869 12:41:23.716518 00700000 ################################################################
1870 12:41:23.716883
1871 12:41:24.228876 00780000 ################################################################
1872 12:41:24.229461
1873 12:41:24.326513 00800000 ############# done.
1874 12:41:24.326639
1875 12:41:24.329780 The bootfile was 8490896 bytes long.
1876 12:41:24.330956
1877 12:41:24.333480 Sending tftp read request... done.
1878 12:41:24.333580
1879 12:41:24.336481 Waiting for the transfer...
1880 12:41:24.337031
1881 12:41:24.859808 00000000 ################################################################
1882 12:41:24.859954
1883 12:41:25.387222 00080000 ################################################################
1884 12:41:25.387648
1885 12:41:25.896585 00100000 ################################################################
1886 12:41:25.896981
1887 12:41:26.418724 00180000 ################################################################
1888 12:41:26.419112
1889 12:41:26.970020 00200000 ################################################################
1890 12:41:26.971344
1891 12:41:27.505758 00280000 ################################################################
1892 12:41:27.506303
1893 12:41:28.040288 00300000 ################################################################
1894 12:41:28.041184
1895 12:41:28.573865 00380000 ################################################################
1896 12:41:28.574289
1897 12:41:29.090445 00400000 ################################################################
1898 12:41:29.090830
1899 12:41:29.575117 00480000 ################################################################
1900 12:41:29.575532
1901 12:41:30.065631 00500000 ################################################################
1902 12:41:30.066149
1903 12:41:30.554978 00580000 ################################################################
1904 12:41:30.555433
1905 12:41:31.051122 00600000 ################################################################
1906 12:41:31.051667
1907 12:41:31.561369 00680000 ################################################################
1908 12:41:31.561785
1909 12:41:32.088172 00700000 ################################################################
1910 12:41:32.088588
1911 12:41:32.614718 00780000 ################################################################
1912 12:41:32.615200
1913 12:41:33.059019 00800000 ##################################################### done.
1914 12:41:33.059174
1915 12:41:33.062275 Sending tftp read request... done.
1916 12:41:33.062373
1917 12:41:33.065558 Waiting for the transfer...
1918 12:41:33.065649
1919 12:41:33.066662 00000000 # done.
1920 12:41:33.067365
1921 12:41:33.076083 Command line loaded dynamically from TFTP file: 11383510/tftp-deploy-d4g4lz0b/kernel/cmdline
1922 12:41:33.076592
1923 12:41:33.095765 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1924 12:41:33.099941
1925 12:41:33.103803 Shutting down all USB controllers.
1926 12:41:33.103893
1927 12:41:33.105903 Removing current net device
1928 12:41:33.107970
1929 12:41:33.109924 EC: exit firmware mode
1930 12:41:33.111069
1931 12:41:33.113383 Finalizing coreboot
1932 12:41:33.113911
1933 12:41:33.119026 Exiting depthcharge with code 4 at timestamp: 25829112
1934 12:41:33.119127
1935 12:41:33.119515
1936 12:41:33.120851 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
1937 12:41:33.120986 start: 2.2.5 auto-login-action (timeout 00:04:13) [common]
1938 12:41:33.121082 Setting prompt string to ['Linux version [0-9]']
1939 12:41:33.121176 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1940 12:41:33.121269 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1941 12:41:33.121521 Starting kernel ...
1942 12:41:33.121604
1943 12:41:33.121694
1945 12:45:46.122087 end: 2.2.5 auto-login-action (duration 00:04:13) [common]
1947 12:45:46.123937 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 253 seconds'
1949 12:45:46.125350 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1952 12:45:46.127531 end: 2 depthcharge-action (duration 00:05:00) [common]
1954 12:45:46.128779 Cleaning after the job
1955 12:45:46.129259 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383510/tftp-deploy-d4g4lz0b/ramdisk
1956 12:45:46.136532 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383510/tftp-deploy-d4g4lz0b/kernel
1957 12:45:46.142892 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383510/tftp-deploy-d4g4lz0b/modules
1958 12:45:46.145279 start: 5.1 power-off (timeout 00:00:30) [common]
1959 12:45:46.146578 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=off'
1960 12:45:51.303855 >> Command sent successfully.
1961 12:45:51.309995 Returned 0 in 5 seconds
1962 12:45:51.410947 end: 5.1 power-off (duration 00:00:05) [common]
1964 12:45:51.412546 start: 5.2 read-feedback (timeout 00:09:55) [common]
1965 12:45:51.413858 Listened to connection for namespace 'common' for up to 1s
1966 12:45:52.414555 Finalising connection for namespace 'common'
1967 12:45:52.415271 Disconnecting from shell: Finalise
1968 12:45:52.415731
1969 12:45:52.516970 end: 5.2 read-feedback (duration 00:00:01) [common]
1970 12:45:52.517690 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11383510
1971 12:45:52.538430 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11383510
1972 12:45:52.538575 JobError: Your job cannot terminate cleanly.