Boot log: dell-latitude-5400-8665U-sarien
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 12:40:19.509466 lava-dispatcher, installed at version: 2023.06
2 12:40:19.509708 start: 0 validate
3 12:40:19.509904 Start time: 2023-08-30 12:40:19.509896+00:00 (UTC)
4 12:40:19.510051 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:40:19.510205 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:40:19.778319 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:40:19.778505 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:40:24.778785 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:40:24.778990 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:40:25.784133 validate duration: 6.27
12 12:40:25.784577 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:40:25.784738 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:40:25.784884 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:40:25.785084 Not decompressing ramdisk as can be used compressed.
16 12:40:25.785226 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:40:25.785343 saving as /var/lib/lava/dispatcher/tmp/11383474/tftp-deploy-oez50qux/ramdisk/rootfs.cpio.gz
18 12:40:25.785464 total size: 8418130 (8 MB)
19 12:40:25.787239 progress 0 % (0 MB)
20 12:40:25.790623 progress 5 % (0 MB)
21 12:40:25.793905 progress 10 % (0 MB)
22 12:40:25.797140 progress 15 % (1 MB)
23 12:40:25.800465 progress 20 % (1 MB)
24 12:40:25.803729 progress 25 % (2 MB)
25 12:40:25.807070 progress 30 % (2 MB)
26 12:40:25.810198 progress 35 % (2 MB)
27 12:40:25.813454 progress 40 % (3 MB)
28 12:40:25.816780 progress 45 % (3 MB)
29 12:40:25.820147 progress 50 % (4 MB)
30 12:40:25.823548 progress 55 % (4 MB)
31 12:40:25.827003 progress 60 % (4 MB)
32 12:40:25.830210 progress 65 % (5 MB)
33 12:40:25.833590 progress 70 % (5 MB)
34 12:40:25.836990 progress 75 % (6 MB)
35 12:40:25.840177 progress 80 % (6 MB)
36 12:40:25.842812 progress 85 % (6 MB)
37 12:40:25.845171 progress 90 % (7 MB)
38 12:40:25.847596 progress 95 % (7 MB)
39 12:40:25.849807 progress 100 % (8 MB)
40 12:40:25.850104 8 MB downloaded in 0.06 s (124.20 MB/s)
41 12:40:25.850277 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:40:25.850518 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:40:25.850604 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:40:25.850691 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:40:25.850833 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:40:25.850972 saving as /var/lib/lava/dispatcher/tmp/11383474/tftp-deploy-oez50qux/kernel/bzImage
48 12:40:25.851052 total size: 8490896 (8 MB)
49 12:40:25.851115 No compression specified
50 12:40:25.852244 progress 0 % (0 MB)
51 12:40:25.854718 progress 5 % (0 MB)
52 12:40:25.857189 progress 10 % (0 MB)
53 12:40:25.859560 progress 15 % (1 MB)
54 12:40:25.862594 progress 20 % (1 MB)
55 12:40:25.865884 progress 25 % (2 MB)
56 12:40:25.869222 progress 30 % (2 MB)
57 12:40:25.872506 progress 35 % (2 MB)
58 12:40:25.875752 progress 40 % (3 MB)
59 12:40:25.879096 progress 45 % (3 MB)
60 12:40:25.882513 progress 50 % (4 MB)
61 12:40:25.885711 progress 55 % (4 MB)
62 12:40:25.889233 progress 60 % (4 MB)
63 12:40:25.893028 progress 65 % (5 MB)
64 12:40:25.896983 progress 70 % (5 MB)
65 12:40:25.900622 progress 75 % (6 MB)
66 12:40:25.904283 progress 80 % (6 MB)
67 12:40:25.907978 progress 85 % (6 MB)
68 12:40:25.911681 progress 90 % (7 MB)
69 12:40:25.914812 progress 95 % (7 MB)
70 12:40:25.917213 progress 100 % (8 MB)
71 12:40:25.917384 8 MB downloaded in 0.07 s (122.09 MB/s)
72 12:40:25.917594 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:40:25.917920 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:40:25.918026 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:40:25.918161 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:40:25.918319 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:40:25.918402 saving as /var/lib/lava/dispatcher/tmp/11383474/tftp-deploy-oez50qux/modules/modules.tar
79 12:40:25.918505 total size: 250888 (0 MB)
80 12:40:25.918610 Using unxz to decompress xz
81 12:40:25.923207 progress 13 % (0 MB)
82 12:40:25.923666 progress 26 % (0 MB)
83 12:40:25.923930 progress 39 % (0 MB)
84 12:40:25.925547 progress 52 % (0 MB)
85 12:40:25.927664 progress 65 % (0 MB)
86 12:40:25.929724 progress 78 % (0 MB)
87 12:40:25.931811 progress 91 % (0 MB)
88 12:40:25.933716 progress 100 % (0 MB)
89 12:40:25.939855 0 MB downloaded in 0.02 s (11.21 MB/s)
90 12:40:25.940203 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:40:25.940634 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:40:25.940772 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 12:40:25.940904 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 12:40:25.941042 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:40:25.941166 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 12:40:25.941456 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3
98 12:40:25.941664 makedir: /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin
99 12:40:25.941833 makedir: /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/tests
100 12:40:25.941978 makedir: /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/results
101 12:40:25.942148 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-add-keys
102 12:40:25.942357 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-add-sources
103 12:40:25.942545 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-background-process-start
104 12:40:25.942743 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-background-process-stop
105 12:40:25.942928 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-common-functions
106 12:40:25.943106 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-echo-ipv4
107 12:40:25.943299 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-install-packages
108 12:40:25.943482 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-installed-packages
109 12:40:25.943659 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-os-build
110 12:40:25.943854 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-probe-channel
111 12:40:25.944039 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-probe-ip
112 12:40:25.944216 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-target-ip
113 12:40:25.944419 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-target-mac
114 12:40:25.944599 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-target-storage
115 12:40:25.944798 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-test-case
116 12:40:25.944983 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-test-event
117 12:40:25.945159 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-test-feedback
118 12:40:25.945354 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-test-raise
119 12:40:25.945540 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-test-reference
120 12:40:25.945719 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-test-runner
121 12:40:25.945915 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-test-set
122 12:40:25.946106 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-test-shell
123 12:40:25.946293 Updating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-install-packages (oe)
124 12:40:25.946570 Updating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/bin/lava-installed-packages (oe)
125 12:40:25.946756 Creating /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/environment
126 12:40:25.946921 LAVA metadata
127 12:40:25.947032 - LAVA_JOB_ID=11383474
128 12:40:25.947139 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:40:25.947302 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 12:40:25.947411 skipped lava-vland-overlay
131 12:40:25.947532 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:40:25.947650 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 12:40:25.947754 skipped lava-multinode-overlay
134 12:40:25.947875 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:40:25.948014 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 12:40:25.948133 Loading test definitions
137 12:40:25.948272 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 12:40:25.948402 Using /lava-11383474 at stage 0
139 12:40:25.948881 uuid=11383474_1.4.2.3.1 testdef=None
140 12:40:25.949012 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:40:25.949137 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 12:40:25.949984 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:40:25.950347 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 12:40:25.951354 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:40:25.951730 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 12:40:25.952687 runner path: /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/0/tests/0_dmesg test_uuid 11383474_1.4.2.3.1
149 12:40:25.952903 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:40:25.953269 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 12:40:25.953372 Using /lava-11383474 at stage 1
153 12:40:25.953855 uuid=11383474_1.4.2.3.5 testdef=None
154 12:40:25.953988 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 12:40:25.954112 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 12:40:25.954867 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 12:40:25.955221 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 12:40:25.956218 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 12:40:25.956578 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 12:40:25.957571 runner path: /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/1/tests/1_bootrr test_uuid 11383474_1.4.2.3.5
163 12:40:25.957795 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 12:40:25.958139 Creating lava-test-runner.conf files
166 12:40:25.958233 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/0 for stage 0
167 12:40:25.958383 - 0_dmesg
168 12:40:25.958495 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383474/lava-overlay-1rkk_yw3/lava-11383474/1 for stage 1
169 12:40:25.958645 - 1_bootrr
170 12:40:25.958779 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 12:40:25.958916 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 12:40:25.971482 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 12:40:25.971674 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 12:40:25.971812 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 12:40:25.971954 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 12:40:25.972080 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 12:40:26.255505 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 12:40:26.256011 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 12:40:26.256183 extracting modules file /var/lib/lava/dispatcher/tmp/11383474/tftp-deploy-oez50qux/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11383474/extract-overlay-ramdisk-a6ea58bk/ramdisk
180 12:40:26.278164 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 12:40:26.278393 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 12:40:26.278534 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383474/compress-overlay-7ghzrer8/overlay-1.4.2.4.tar.gz to ramdisk
183 12:40:26.278650 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383474/compress-overlay-7ghzrer8/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11383474/extract-overlay-ramdisk-a6ea58bk/ramdisk
184 12:40:26.293513 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 12:40:26.293738 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 12:40:26.293887 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 12:40:26.294023 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 12:40:26.294148 Building ramdisk /var/lib/lava/dispatcher/tmp/11383474/extract-overlay-ramdisk-a6ea58bk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11383474/extract-overlay-ramdisk-a6ea58bk/ramdisk
189 12:40:26.442646 >> 49788 blocks
190 12:40:27.342618 rename /var/lib/lava/dispatcher/tmp/11383474/extract-overlay-ramdisk-a6ea58bk/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11383474/tftp-deploy-oez50qux/ramdisk/ramdisk.cpio.gz
191 12:40:27.343085 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 12:40:27.343210 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 12:40:27.343316 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 12:40:27.343423 No mkimage arch provided, not using FIT.
195 12:40:27.343518 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 12:40:27.343603 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 12:40:27.343715 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 12:40:27.343815 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 12:40:27.343898 No LXC device requested
200 12:40:27.343981 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 12:40:27.344077 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 12:40:27.344162 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 12:40:27.344238 Checking files for TFTP limit of 4294967296 bytes.
204 12:40:27.344664 end: 1 tftp-deploy (duration 00:00:02) [common]
205 12:40:27.344771 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 12:40:27.344884 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 12:40:27.345058 substitutions:
208 12:40:27.345171 - {DTB}: None
209 12:40:27.345265 - {INITRD}: 11383474/tftp-deploy-oez50qux/ramdisk/ramdisk.cpio.gz
210 12:40:27.345355 - {KERNEL}: 11383474/tftp-deploy-oez50qux/kernel/bzImage
211 12:40:27.345454 - {LAVA_MAC}: None
212 12:40:27.345541 - {PRESEED_CONFIG}: None
213 12:40:27.345630 - {PRESEED_LOCAL}: None
214 12:40:27.345721 - {RAMDISK}: 11383474/tftp-deploy-oez50qux/ramdisk/ramdisk.cpio.gz
215 12:40:27.345821 - {ROOT_PART}: None
216 12:40:27.345902 - {ROOT}: None
217 12:40:27.345970 - {SERVER_IP}: 192.168.201.1
218 12:40:27.346064 - {TEE}: None
219 12:40:27.346147 Parsed boot commands:
220 12:40:27.346225 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 12:40:27.346412 Parsed boot commands: tftpboot 192.168.201.1 11383474/tftp-deploy-oez50qux/kernel/bzImage 11383474/tftp-deploy-oez50qux/kernel/cmdline 11383474/tftp-deploy-oez50qux/ramdisk/ramdisk.cpio.gz
222 12:40:27.346511 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 12:40:27.346630 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 12:40:27.346743 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 12:40:27.346834 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 12:40:27.346910 Not connected, no need to disconnect.
227 12:40:27.346989 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 12:40:27.347083 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 12:40:27.347153 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-2'
230 12:40:27.351842 Setting prompt string to ['lava-test: # ']
231 12:40:27.352376 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 12:40:27.352566 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 12:40:27.352738 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 12:40:27.352903 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 12:40:27.353275 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-2' '--port=1' '--command=reboot'
236 12:40:44.235044 >> Command sent successfully.
237 12:40:44.237982 Returned 0 in 16 seconds
238 12:40:44.338419 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 12:40:44.338904 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 12:40:44.339033 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 12:40:44.339154 Setting prompt string to 'Starting depthcharge on sarien...'
243 12:40:44.339250 Changing prompt to 'Starting depthcharge on sarien...'
244 12:40:44.339349 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 12:40:44.339853 [Enter `^Ec?' for help]
246 12:40:44.339987
247 12:40:44.340110
248 12:40:44.340230 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 12:40:44.340349 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
250 12:40:44.340438 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 12:40:44.340527 CPU: AES supported, TXT supported, VT supported
252 12:40:44.340617 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
253 12:40:44.340678 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 12:40:44.340736 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
255 12:40:44.340793 VBOOT: Loading verstage.
256 12:40:44.340849 CBFS @ 1d00000 size 300000
257 12:40:44.340905 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 12:40:44.340961 CBFS: Locating 'fallback/verstage'
259 12:40:44.341016 CBFS: Found @ offset 10f6c0 size 1435c
260 12:40:44.341071
261 12:40:44.341125
262 12:40:44.341180 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 12:40:44.341235 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 12:40:44.341291 done! DID_VID 0x00281ae0
265 12:40:44.341345 TPM ready after 0 ms
266 12:40:44.341400 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 12:40:44.341455 tlcl_send_startup: Startup return code is 0
268 12:40:44.341510 TPM: setup succeeded
269 12:40:44.341565 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 12:40:44.341620 Checking cr50 for recovery request
271 12:40:44.341675 Phase 1
272 12:40:44.341729 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 12:40:44.341795 FMAP: base = fe000000 size = 2000000 #areas = 37
274 12:40:44.341851 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 12:40:44.341919 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 12:40:44.341990 Phase 2
277 12:40:44.342058 Phase 3
278 12:40:44.342111 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 12:40:44.342164 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 12:40:44.342218 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
281 12:40:44.342271 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
282 12:40:44.342340 VB2:vb2_verify_keyblock() Checking key block signature...
283 12:40:44.342423 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
284 12:40:44.342490 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
285 12:40:44.342544 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 12:40:44.342597 Phase 4
287 12:40:44.342650 FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)
288 12:40:44.342703 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 12:40:44.342757 VB2:vb2_rsa_verify_digest() Digest check failed!
290 12:40:44.342811 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 12:40:44.342863 Saving nvdata
292 12:40:44.342917 Reboot requested (10020007)
293 12:40:44.342970 board_reset() called!
294 12:40:44.343023 full_reset() called!
295 12:40:48.552904
296 12:40:48.553229
297 12:40:48.561199 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 12:40:48.566427 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
299 12:40:48.570695 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 12:40:48.575306 CPU: AES supported, TXT supported, VT supported
301 12:40:48.580152 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
302 12:40:48.585665 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 12:40:48.591410 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
304 12:40:48.594893 VBOOT: Loading verstage.
305 12:40:48.597464 CBFS @ 1d00000 size 300000
306 12:40:48.603540 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 12:40:48.607353 CBFS: Locating 'fallback/verstage'
308 12:40:48.610961 CBFS: Found @ offset 10f6c0 size 1435c
309 12:40:48.625649
310 12:40:48.625779
311 12:40:48.635040 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 12:40:48.640850 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 12:40:48.643657 done! DID_VID 0x00281ae0
314 12:40:48.645924 TPM ready after 0 ms
315 12:40:48.650143 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 12:40:48.726172 tlcl_send_startup: Startup return code is 0
317 12:40:48.728133 TPM: setup succeeded
318 12:40:48.746967 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 12:40:48.750703 Checking cr50 for recovery request
320 12:40:48.759777 Phase 1
321 12:40:48.764900 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 12:40:48.769387 FMAP: base = fe000000 size = 2000000 #areas = 37
323 12:40:48.774409 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 12:40:48.782092 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 12:40:48.787783 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 12:40:48.791449 Recovery requested (1009000e)
327 12:40:48.792355 Saving nvdata
328 12:40:48.808609 tlcl_extend: response is 0
329 12:40:48.824420 tlcl_extend: response is 0
330 12:40:48.828048 CBFS @ 1d00000 size 300000
331 12:40:48.834024 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 12:40:48.837753 CBFS: Locating 'fallback/romstage'
333 12:40:48.841669 CBFS: Found @ offset 80 size 15b2c
334 12:40:48.842917
335 12:40:48.843022
336 12:40:48.851229 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 12:40:48.856278 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 12:40:48.860128 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 12:40:48.864811 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 12:40:48.868700 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 12:40:48.873558 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 12:40:48.875263 TCO_STS: 0000 0004
343 12:40:48.878327 GEN_PMCON: d0015209 00002200
344 12:40:48.881626 GBLRST_CAUSE: 00000000 00000000
345 12:40:48.883579 prev_sleep_state 5
346 12:40:48.887120 Boot Count incremented to 29654
347 12:40:48.890112 CBFS @ 1d00000 size 300000
348 12:40:48.896234 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 12:40:48.899255 CBFS: Locating 'fspm.bin'
350 12:40:48.903041 CBFS: Found @ offset 60fc0 size 70000
351 12:40:48.908329 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 12:40:48.912980 FMAP: base = fe000000 size = 2000000 #areas = 37
353 12:40:48.919253 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 12:40:48.925189 Probing TPM I2C: done! DID_VID 0x00281ae0
355 12:40:48.927602 Locality already claimed
356 12:40:48.931406 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 12:40:48.949477 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 12:40:48.956349 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 12:40:48.959260 MRC cache found, size 18e0
360 12:40:48.961320 bootmode is set to :2
361 12:40:49.055159 CBMEM:
362 12:40:49.058463 IMD: root @ 89fff000 254 entries.
363 12:40:49.062094 IMD: root @ 89ffec00 62 entries.
364 12:40:49.064417 External stage cache:
365 12:40:49.068119 IMD: root @ 8abff000 254 entries.
366 12:40:49.071534 IMD: root @ 8abfec00 62 entries.
367 12:40:49.077177 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 12:40:49.080761 creating vboot_handoff structure
369 12:40:49.101520 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 12:40:49.117781 tlcl_write: response is 0
371 12:40:49.136334 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 12:40:49.139999 MRC: TPM MRC hash updated successfully.
373 12:40:49.141489 1 DIMMs found
374 12:40:49.144024 top_of_ram = 0x8a000000
375 12:40:49.149520 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 12:40:49.154071 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 12:40:49.157135 CBFS @ 1d00000 size 300000
378 12:40:49.163257 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 12:40:49.167372 CBFS: Locating 'fallback/postcar'
380 12:40:49.171005 CBFS: Found @ offset 107000 size 41a4
381 12:40:49.176738 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 12:40:49.187062 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 12:40:49.192496 Processing 126 relocs. Offset value of 0x87cdd000
384 12:40:49.195173
385 12:40:49.195288
386 12:40:49.203388 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 12:40:49.206334 CBFS @ 1d00000 size 300000
388 12:40:49.212332 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 12:40:49.216668 CBFS: Locating 'fallback/ramstage'
390 12:40:49.220293 CBFS: Found @ offset 458c0 size 1a8a8
391 12:40:49.226745 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 12:40:49.255484 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 12:40:49.260891 Processing 3754 relocs. Offset value of 0x88e81000
394 12:40:49.266752
395 12:40:49.267089
396 12:40:49.275617 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 12:40:49.279648 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 12:40:49.285645 FMAP: base = fe000000 size = 2000000 #areas = 37
399 12:40:49.289640 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 12:40:49.294409 WARNING: RO_VPD is uninitialized or empty.
401 12:40:49.298943 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 12:40:49.303532 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 12:40:49.304855 Normal boot.
404 12:40:49.312111 BS: BS_PRE_DEVICE times (us): entry 0 run 58 exit 1160
405 12:40:49.314862 CBFS @ 1d00000 size 300000
406 12:40:49.321079 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 12:40:49.324741 CBFS: Locating 'cpu_microcode_blob.bin'
408 12:40:49.328306 CBFS: Found @ offset 15c40 size 2fc00
409 12:40:49.333143 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 12:40:49.335876 Skip microcode update
411 12:40:49.337716 CBFS @ 1d00000 size 300000
412 12:40:49.344237 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 12:40:49.346951 CBFS: Locating 'fsps.bin'
414 12:40:49.350706 CBFS: Found @ offset d1fc0 size 35000
415 12:40:49.385295 Detected 4 core, 8 thread CPU.
416 12:40:49.388352 Setting up SMI for CPU
417 12:40:49.390063 IED base = 0x8ac00000
418 12:40:49.391906 IED size = 0x00400000
419 12:40:49.395134 Will perform SMM setup.
420 12:40:49.399727 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
421 12:40:49.407642 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 12:40:49.412436 Processing 16 relocs. Offset value of 0x00030000
423 12:40:49.415681 Attempting to start 7 APs
424 12:40:49.419648 Waiting for 10ms after sending INIT.
425 12:40:49.433666 Waiting for 1st SIPI to complete...done.
426 12:40:49.435496 AP: slot 2 apic_id 1.
427 12:40:49.439357 Waiting for 2nd SIPI to complete...done.
428 12:40:49.442081 AP: slot 3 apic_id 3.
429 12:40:49.444834 AP: slot 1 apic_id 2.
430 12:40:49.446786 AP: slot 6 apic_id 5.
431 12:40:49.449032 AP: slot 7 apic_id 4.
432 12:40:49.450729 AP: slot 5 apic_id 7.
433 12:40:49.453259 AP: slot 4 apic_id 6.
434 12:40:49.460884 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
435 12:40:49.465730 Processing 13 relocs. Offset value of 0x00038000
436 12:40:49.472109 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
437 12:40:49.476456 Installing SMM handler to 0x8a000000
438 12:40:49.483706 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
439 12:40:49.490403 Processing 867 relocs. Offset value of 0x8a010000
440 12:40:49.497723 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
441 12:40:49.502206 Processing 13 relocs. Offset value of 0x8a008000
442 12:40:49.508384 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
443 12:40:49.514006 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
444 12:40:49.519396 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
445 12:40:49.525633 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
446 12:40:49.531266 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
447 12:40:49.537038 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
448 12:40:49.542571 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
449 12:40:49.549325 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
450 12:40:49.552414 Clearing SMI status registers
451 12:40:49.554160 SMI_STS: PM1
452 12:40:49.556244 PM1_STS: WAK PWRBTN
453 12:40:49.559402 TCO_STS: BOOT SECOND_TO
454 12:40:49.561164 GPE0 STD STS: eSPI
455 12:40:49.563357 New SMBASE 0x8a000000
456 12:40:49.566240 In relocation handler: CPU 0
457 12:40:49.570035 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
458 12:40:49.575340 Writing SMRR. base = 0x8a000006, mask=0xff000800
459 12:40:49.577315 Relocation complete.
460 12:40:49.579333 New SMBASE 0x89fff800
461 12:40:49.582225 In relocation handler: CPU 2
462 12:40:49.586208 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
463 12:40:49.591584 Writing SMRR. base = 0x8a000006, mask=0xff000800
464 12:40:49.593721 Relocation complete.
465 12:40:49.595583 New SMBASE 0x89fff000
466 12:40:49.599071 In relocation handler: CPU 4
467 12:40:49.603257 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
468 12:40:49.607566 Writing SMRR. base = 0x8a000006, mask=0xff000800
469 12:40:49.609682 Relocation complete.
470 12:40:49.612202 New SMBASE 0x89ffec00
471 12:40:49.615242 In relocation handler: CPU 5
472 12:40:49.619493 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
473 12:40:49.624134 Writing SMRR. base = 0x8a000006, mask=0xff000800
474 12:40:49.626364 Relocation complete.
475 12:40:49.628704 New SMBASE 0x89ffe400
476 12:40:49.631106 In relocation handler: CPU 7
477 12:40:49.635250 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
478 12:40:49.639972 Writing SMRR. base = 0x8a000006, mask=0xff000800
479 12:40:49.642571 Relocation complete.
480 12:40:49.644716 New SMBASE 0x89ffe800
481 12:40:49.647650 In relocation handler: CPU 6
482 12:40:49.651919 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
483 12:40:49.656729 Writing SMRR. base = 0x8a000006, mask=0xff000800
484 12:40:49.658892 Relocation complete.
485 12:40:49.661002 New SMBASE 0x89fffc00
486 12:40:49.664003 In relocation handler: CPU 1
487 12:40:49.667742 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
488 12:40:49.673441 Writing SMRR. base = 0x8a000006, mask=0xff000800
489 12:40:49.675139 Relocation complete.
490 12:40:49.677259 New SMBASE 0x89fff400
491 12:40:49.681016 In relocation handler: CPU 3
492 12:40:49.684037 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
493 12:40:49.689190 Writing SMRR. base = 0x8a000006, mask=0xff000800
494 12:40:49.691476 Relocation complete.
495 12:40:49.693663 Initializing CPU #0
496 12:40:49.696901 CPU: vendor Intel device 806ec
497 12:40:49.700346 CPU: family 06, model 8e, stepping 0c
498 12:40:49.703031 Clearing out pending MCEs
499 12:40:49.707356 Setting up local APIC... apic_id: 0x00 done.
500 12:40:49.710749 Turbo is available but hidden
501 12:40:49.713668 Turbo has been enabled
502 12:40:49.715040 VMX status: enabled
503 12:40:49.719379 IA32_FEATURE_CONTROL status: locked
504 12:40:49.720648 Skip microcode update
505 12:40:49.722848 CPU #0 initialized
506 12:40:49.725319 Initializing CPU #2
507 12:40:49.727239 Initializing CPU #4
508 12:40:49.729578 Initializing CPU #5
509 12:40:49.732650 CPU: vendor Intel device 806ec
510 12:40:49.735797 CPU: family 06, model 8e, stepping 0c
511 12:40:49.739054 CPU: vendor Intel device 806ec
512 12:40:49.742941 CPU: family 06, model 8e, stepping 0c
513 12:40:49.746479 Clearing out pending MCEs
514 12:40:49.748150 Clearing out pending MCEs
515 12:40:49.754080 Setting up local APIC...CPU: vendor Intel device 806ec
516 12:40:49.757713 CPU: family 06, model 8e, stepping 0c
517 12:40:49.759783 Clearing out pending MCEs
518 12:40:49.764399 Setting up local APIC...Initializing CPU #7
519 12:40:49.766137 Initializing CPU #6
520 12:40:49.769399 CPU: vendor Intel device 806ec
521 12:40:49.773181 CPU: family 06, model 8e, stepping 0c
522 12:40:49.776642 CPU: vendor Intel device 806ec
523 12:40:49.780588 CPU: family 06, model 8e, stepping 0c
524 12:40:49.783332 Clearing out pending MCEs
525 12:40:49.785898 Clearing out pending MCEs
526 12:40:49.789961 Setting up local APIC... apic_id: 0x06 done.
527 12:40:49.792021 apic_id: 0x07 done.
528 12:40:49.794443 VMX status: enabled
529 12:40:49.796651 VMX status: enabled
530 12:40:49.800192 IA32_FEATURE_CONTROL status: locked
531 12:40:49.803238 IA32_FEATURE_CONTROL status: locked
532 12:40:49.805362 Skip microcode update
533 12:40:49.808159 Skip microcode update
534 12:40:49.809889 CPU #4 initialized
535 12:40:49.811568 CPU #5 initialized
536 12:40:49.818877 Setting up local APIC...Setting up local APIC...Initializing CPU #1
537 12:40:49.821037 Initializing CPU #3
538 12:40:49.823918 CPU: vendor Intel device 806ec
539 12:40:49.827302 CPU: family 06, model 8e, stepping 0c
540 12:40:49.830697 CPU: vendor Intel device 806ec
541 12:40:49.834576 CPU: family 06, model 8e, stepping 0c
542 12:40:49.836863 Clearing out pending MCEs
543 12:40:49.840085 Clearing out pending MCEs
544 12:40:49.844446 Setting up local APIC... apic_id: 0x01 done.
545 12:40:49.845965 apic_id: 0x02 done.
546 12:40:49.850525 Setting up local APIC... apic_id: 0x05 done.
547 12:40:49.853104 apic_id: 0x04 done.
548 12:40:49.854923 VMX status: enabled
549 12:40:49.857170 VMX status: enabled
550 12:40:49.860698 IA32_FEATURE_CONTROL status: locked
551 12:40:49.864299 IA32_FEATURE_CONTROL status: locked
552 12:40:49.866611 Skip microcode update
553 12:40:49.868409 Skip microcode update
554 12:40:49.871064 CPU #6 initialized
555 12:40:49.872656 CPU #7 initialized
556 12:40:49.874767 VMX status: enabled
557 12:40:49.876595 apic_id: 0x03 done.
558 12:40:49.880321 IA32_FEATURE_CONTROL status: locked
559 12:40:49.882212 VMX status: enabled
560 12:40:49.884434 Skip microcode update
561 12:40:49.887974 IA32_FEATURE_CONTROL status: locked
562 12:40:49.889941 CPU #1 initialized
563 12:40:49.891965 Skip microcode update
564 12:40:49.894630 VMX status: enabled
565 12:40:49.896775 CPU #3 initialized
566 12:40:49.899657 IA32_FEATURE_CONTROL status: locked
567 12:40:49.901954 Skip microcode update
568 12:40:49.903991 CPU #2 initialized
569 12:40:49.908393 bsp_do_flight_plan done after 464 msecs.
570 12:40:49.911825 CPU: frequency set to 4800 MHz
571 12:40:49.912718 Enabling SMIs.
572 12:40:49.914527 Locking SMM.
573 12:40:49.917628 CBFS @ 1d00000 size 300000
574 12:40:49.923708 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
575 12:40:49.926566 CBFS: Locating 'vbt.bin'
576 12:40:49.930264 CBFS: Found @ offset 60a40 size 4a0
577 12:40:49.935235 Found a VBT of 4608 bytes after decompression
578 12:40:49.948235 FMAP: area GBB found @ 1c11000 (978944 bytes)
579 12:40:50.008715 Detected 4 core, 8 thread CPU.
580 12:40:50.012309 Detected 4 core, 8 thread CPU.
581 12:40:50.238864 Display FSP Version Info HOB
582 12:40:50.241982 Reference Code - CPU = 7.0.5e.40
583 12:40:50.244687 uCode Version = 0.0.0.b8
584 12:40:50.247960 Display FSP Version Info HOB
585 12:40:50.251073 Reference Code - ME = 7.0.5e.40
586 12:40:50.252999 MEBx version = 0.0.0.0
587 12:40:50.256267 ME Firmware Version = Consumer SKU
588 12:40:50.259418 Display FSP Version Info HOB
589 12:40:50.263158 Reference Code - CNL PCH = 7.0.5e.40
590 12:40:50.266127 PCH-CRID Status = Disabled
591 12:40:50.269444 CNL PCH H A0 Hsio Version = 2.0.0.0
592 12:40:50.272897 CNL PCH H Ax Hsio Version = 9.0.0.0
593 12:40:50.276985 CNL PCH H Bx Hsio Version = a.0.0.0
594 12:40:50.280396 CNL PCH LP B0 Hsio Version = 7.0.0.0
595 12:40:50.284308 CNL PCH LP Bx Hsio Version = 6.0.0.0
596 12:40:50.287642 CNL PCH LP Dx Hsio Version = 7.0.0.0
597 12:40:50.291319 Display FSP Version Info HOB
598 12:40:50.295346 Reference Code - SA - System Agent = 7.0.5e.40
599 12:40:50.298753 Reference Code - MRC = 0.7.1.68
600 12:40:50.301691 SA - PCIe Version = 7.0.5e.40
601 12:40:50.304549 SA-CRID Status = Disabled
602 12:40:50.308131 SA-CRID Original Value = 0.0.0.c
603 12:40:50.310117 SA-CRID New Value = 0.0.0.c
604 12:40:50.328961 RTC Init
605 12:40:50.332447 Set power off after power failure.
606 12:40:50.334447 Disabling Deep S3
607 12:40:50.336212 Disabling Deep S3
608 12:40:50.338141 Disabling Deep S4
609 12:40:50.340417 Disabling Deep S4
610 12:40:50.341911 Disabling Deep S5
611 12:40:50.343992 Disabling Deep S5
612 12:40:50.350996 BS: BS_DEV_INIT_CHIPS times (us): entry 602826 run 413246 exit 16222
613 12:40:50.353097 Enumerating buses...
614 12:40:50.356913 Show all devs... Before device enumeration.
615 12:40:50.359722 Root Device: enabled 1
616 12:40:50.362165 CPU_CLUSTER: 0: enabled 1
617 12:40:50.364673 DOMAIN: 0000: enabled 1
618 12:40:50.366931 APIC: 00: enabled 1
619 12:40:50.369876 PCI: 00:00.0: enabled 1
620 12:40:50.371531 PCI: 00:02.0: enabled 1
621 12:40:50.374301 PCI: 00:04.0: enabled 1
622 12:40:50.376369 PCI: 00:12.0: enabled 1
623 12:40:50.378926 PCI: 00:12.5: enabled 0
624 12:40:50.380849 PCI: 00:12.6: enabled 0
625 12:40:50.383605 PCI: 00:13.0: enabled 0
626 12:40:50.386118 PCI: 00:14.0: enabled 1
627 12:40:50.388569 PCI: 00:14.1: enabled 0
628 12:40:50.391291 PCI: 00:14.3: enabled 1
629 12:40:50.393633 PCI: 00:14.5: enabled 0
630 12:40:50.396151 PCI: 00:15.0: enabled 1
631 12:40:50.398119 PCI: 00:15.1: enabled 1
632 12:40:50.400989 PCI: 00:15.2: enabled 0
633 12:40:50.403410 PCI: 00:15.3: enabled 0
634 12:40:50.405245 PCI: 00:16.0: enabled 1
635 12:40:50.408448 PCI: 00:16.1: enabled 0
636 12:40:50.410365 PCI: 00:16.2: enabled 0
637 12:40:50.413364 PCI: 00:16.3: enabled 0
638 12:40:50.415364 PCI: 00:16.4: enabled 0
639 12:40:50.418147 PCI: 00:16.5: enabled 0
640 12:40:50.420003 PCI: 00:17.0: enabled 1
641 12:40:50.422314 PCI: 00:19.0: enabled 1
642 12:40:50.425098 PCI: 00:19.1: enabled 0
643 12:40:50.427016 PCI: 00:19.2: enabled 1
644 12:40:50.430125 PCI: 00:1a.0: enabled 0
645 12:40:50.432064 PCI: 00:1c.0: enabled 1
646 12:40:50.434864 PCI: 00:1c.1: enabled 0
647 12:40:50.437069 PCI: 00:1c.2: enabled 0
648 12:40:50.439394 PCI: 00:1c.3: enabled 0
649 12:40:50.442286 PCI: 00:1c.4: enabled 0
650 12:40:50.444382 PCI: 00:1c.5: enabled 0
651 12:40:50.447303 PCI: 00:1c.6: enabled 0
652 12:40:50.448910 PCI: 00:1c.7: enabled 1
653 12:40:50.451714 PCI: 00:1d.0: enabled 1
654 12:40:50.454158 PCI: 00:1d.1: enabled 1
655 12:40:50.456934 PCI: 00:1d.2: enabled 0
656 12:40:50.459220 PCI: 00:1d.3: enabled 0
657 12:40:50.461434 PCI: 00:1d.4: enabled 1
658 12:40:50.463834 PCI: 00:1e.0: enabled 0
659 12:40:50.466353 PCI: 00:1e.1: enabled 0
660 12:40:50.469037 PCI: 00:1e.2: enabled 0
661 12:40:50.471223 PCI: 00:1e.3: enabled 0
662 12:40:50.473873 PCI: 00:1f.0: enabled 1
663 12:40:50.476024 PCI: 00:1f.1: enabled 1
664 12:40:50.478356 PCI: 00:1f.2: enabled 1
665 12:40:50.481597 PCI: 00:1f.3: enabled 1
666 12:40:50.483517 PCI: 00:1f.4: enabled 1
667 12:40:50.485646 PCI: 00:1f.5: enabled 1
668 12:40:50.488309 PCI: 00:1f.6: enabled 1
669 12:40:50.490839 USB0 port 0: enabled 1
670 12:40:50.492836 I2C: 00:10: enabled 1
671 12:40:50.494844 I2C: 00:10: enabled 1
672 12:40:50.497508 I2C: 00:34: enabled 1
673 12:40:50.499408 I2C: 00:2c: enabled 1
674 12:40:50.502030 I2C: 00:50: enabled 1
675 12:40:50.504541 PNP: 0c09.0: enabled 1
676 12:40:50.506057 USB2 port 0: enabled 1
677 12:40:50.508551 USB2 port 1: enabled 1
678 12:40:50.510924 USB2 port 2: enabled 1
679 12:40:50.513598 USB2 port 4: enabled 1
680 12:40:50.515758 USB2 port 5: enabled 1
681 12:40:50.518074 USB2 port 6: enabled 1
682 12:40:50.521056 USB2 port 7: enabled 1
683 12:40:50.522479 USB2 port 8: enabled 1
684 12:40:50.525069 USB2 port 9: enabled 1
685 12:40:50.527278 USB3 port 0: enabled 1
686 12:40:50.529784 USB3 port 1: enabled 1
687 12:40:50.531784 USB3 port 2: enabled 1
688 12:40:50.534430 USB3 port 3: enabled 1
689 12:40:50.536769 USB3 port 4: enabled 1
690 12:40:50.538751 APIC: 02: enabled 1
691 12:40:50.540633 APIC: 01: enabled 1
692 12:40:50.542503 APIC: 03: enabled 1
693 12:40:50.544569 APIC: 06: enabled 1
694 12:40:50.547084 APIC: 07: enabled 1
695 12:40:50.548572 APIC: 05: enabled 1
696 12:40:50.551377 APIC: 04: enabled 1
697 12:40:50.553053 Compare with tree...
698 12:40:50.555589 Root Device: enabled 1
699 12:40:50.557794 CPU_CLUSTER: 0: enabled 1
700 12:40:50.560274 APIC: 00: enabled 1
701 12:40:50.563124 APIC: 02: enabled 1
702 12:40:50.564813 APIC: 01: enabled 1
703 12:40:50.566928 APIC: 03: enabled 1
704 12:40:50.569289 APIC: 06: enabled 1
705 12:40:50.571535 APIC: 07: enabled 1
706 12:40:50.573936 APIC: 05: enabled 1
707 12:40:50.576261 APIC: 04: enabled 1
708 12:40:50.578563 DOMAIN: 0000: enabled 1
709 12:40:50.581117 PCI: 00:00.0: enabled 1
710 12:40:50.583817 PCI: 00:02.0: enabled 1
711 12:40:50.586258 PCI: 00:04.0: enabled 1
712 12:40:50.588760 PCI: 00:12.0: enabled 1
713 12:40:50.592224 PCI: 00:12.5: enabled 0
714 12:40:50.594038 PCI: 00:12.6: enabled 0
715 12:40:50.597111 PCI: 00:13.0: enabled 0
716 12:40:50.599792 PCI: 00:14.0: enabled 1
717 12:40:50.602090 USB0 port 0: enabled 1
718 12:40:50.604979 USB2 port 0: enabled 1
719 12:40:50.607774 USB2 port 1: enabled 1
720 12:40:50.610872 USB2 port 2: enabled 1
721 12:40:50.613078 USB2 port 4: enabled 1
722 12:40:50.615362 USB2 port 5: enabled 1
723 12:40:50.618282 USB2 port 6: enabled 1
724 12:40:50.621607 USB2 port 7: enabled 1
725 12:40:50.624018 USB2 port 8: enabled 1
726 12:40:50.627017 USB2 port 9: enabled 1
727 12:40:50.629304 USB3 port 0: enabled 1
728 12:40:50.632429 USB3 port 1: enabled 1
729 12:40:50.634937 USB3 port 2: enabled 1
730 12:40:50.637242 USB3 port 3: enabled 1
731 12:40:50.640786 USB3 port 4: enabled 1
732 12:40:50.642988 PCI: 00:14.1: enabled 0
733 12:40:50.645634 PCI: 00:14.3: enabled 1
734 12:40:50.648010 PCI: 00:14.5: enabled 0
735 12:40:50.650441 PCI: 00:15.0: enabled 1
736 12:40:50.653304 I2C: 00:10: enabled 1
737 12:40:50.656024 I2C: 00:10: enabled 1
738 12:40:50.657936 I2C: 00:34: enabled 1
739 12:40:50.661188 PCI: 00:15.1: enabled 1
740 12:40:50.663712 I2C: 00:2c: enabled 1
741 12:40:50.666261 PCI: 00:15.2: enabled 0
742 12:40:50.668686 PCI: 00:15.3: enabled 0
743 12:40:50.671464 PCI: 00:16.0: enabled 1
744 12:40:50.673701 PCI: 00:16.1: enabled 0
745 12:40:50.676642 PCI: 00:16.2: enabled 0
746 12:40:50.679448 PCI: 00:16.3: enabled 0
747 12:40:50.681965 PCI: 00:16.4: enabled 0
748 12:40:50.684590 PCI: 00:16.5: enabled 0
749 12:40:50.687182 PCI: 00:17.0: enabled 1
750 12:40:50.689934 PCI: 00:19.0: enabled 1
751 12:40:50.692054 I2C: 00:50: enabled 1
752 12:40:50.694669 PCI: 00:19.1: enabled 0
753 12:40:50.698031 PCI: 00:19.2: enabled 1
754 12:40:50.699818 PCI: 00:1a.0: enabled 0
755 12:40:50.702389 PCI: 00:1c.0: enabled 1
756 12:40:50.705377 PCI: 00:1c.1: enabled 0
757 12:40:50.707966 PCI: 00:1c.2: enabled 0
758 12:40:50.710656 PCI: 00:1c.3: enabled 0
759 12:40:50.713595 PCI: 00:1c.4: enabled 0
760 12:40:50.715661 PCI: 00:1c.5: enabled 0
761 12:40:50.718269 PCI: 00:1c.6: enabled 0
762 12:40:50.720838 PCI: 00:1c.7: enabled 1
763 12:40:50.724019 PCI: 00:1d.0: enabled 1
764 12:40:50.726771 PCI: 00:1d.1: enabled 1
765 12:40:50.729292 PCI: 00:1d.2: enabled 0
766 12:40:50.731304 PCI: 00:1d.3: enabled 0
767 12:40:50.734257 PCI: 00:1d.4: enabled 1
768 12:40:50.736884 PCI: 00:1e.0: enabled 0
769 12:40:50.739765 PCI: 00:1e.1: enabled 0
770 12:40:50.742125 PCI: 00:1e.2: enabled 0
771 12:40:50.744584 PCI: 00:1e.3: enabled 0
772 12:40:50.747486 PCI: 00:1f.0: enabled 1
773 12:40:50.750219 PNP: 0c09.0: enabled 1
774 12:40:50.752834 PCI: 00:1f.1: enabled 1
775 12:40:50.755363 PCI: 00:1f.2: enabled 1
776 12:40:50.758103 PCI: 00:1f.3: enabled 1
777 12:40:50.760549 PCI: 00:1f.4: enabled 1
778 12:40:50.763044 PCI: 00:1f.5: enabled 1
779 12:40:50.765629 PCI: 00:1f.6: enabled 1
780 12:40:50.768003 Root Device scanning...
781 12:40:50.771933 root_dev_scan_bus for Root Device
782 12:40:50.773962 CPU_CLUSTER: 0 enabled
783 12:40:50.776147 DOMAIN: 0000 enabled
784 12:40:50.778592 DOMAIN: 0000 scanning...
785 12:40:50.782467 PCI: pci_scan_bus for bus 00
786 12:40:50.785025 PCI: 00:00.0 [8086/0000] ops
787 12:40:50.788307 PCI: 00:00.0 [8086/3e34] enabled
788 12:40:50.790886 PCI: 00:02.0 [8086/0000] ops
789 12:40:50.794321 PCI: 00:02.0 [8086/3ea0] enabled
790 12:40:50.798111 PCI: 00:04.0 [8086/1903] enabled
791 12:40:50.801260 PCI: 00:08.0 [8086/1911] enabled
792 12:40:50.804384 PCI: 00:12.0 [8086/9df9] enabled
793 12:40:50.807914 PCI: 00:14.0 [8086/0000] bus ops
794 12:40:50.811167 PCI: 00:14.0 [8086/9ded] enabled
795 12:40:50.814575 PCI: 00:14.2 [8086/9def] enabled
796 12:40:50.817509 PCI: 00:14.3 [8086/9df0] enabled
797 12:40:50.821348 PCI: 00:15.0 [8086/0000] bus ops
798 12:40:50.824507 PCI: 00:15.0 [8086/9de8] enabled
799 12:40:50.827520 PCI: 00:15.1 [8086/0000] bus ops
800 12:40:50.830871 PCI: 00:15.1 [8086/9de9] enabled
801 12:40:50.834121 PCI: 00:16.0 [8086/0000] ops
802 12:40:50.836957 PCI: 00:16.0 [8086/9de0] enabled
803 12:40:50.840262 PCI: 00:17.0 [8086/0000] ops
804 12:40:50.843408 PCI: 00:17.0 [8086/9dd3] enabled
805 12:40:50.847164 PCI: 00:19.0 [8086/0000] bus ops
806 12:40:50.849918 PCI: 00:19.0 [8086/9dc5] enabled
807 12:40:50.853064 PCI: 00:19.2 [8086/0000] ops
808 12:40:50.856240 PCI: 00:19.2 [8086/9dc7] enabled
809 12:40:50.859961 PCI: 00:1c.0 [8086/0000] bus ops
810 12:40:50.863217 PCI: 00:1c.0 [8086/9dbf] enabled
811 12:40:50.868987 PCI: Static device PCI: 00:1c.7 not found, disabling it.
812 12:40:50.872331 PCI: 00:1d.0 [8086/0000] bus ops
813 12:40:50.875637 PCI: 00:1d.0 [8086/9db4] enabled
814 12:40:50.881139 PCI: Static device PCI: 00:1d.1 not found, disabling it.
815 12:40:50.886581 PCI: Static device PCI: 00:1d.4 not found, disabling it.
816 12:40:50.890544 PCI: 00:1f.0 [8086/0000] bus ops
817 12:40:50.893258 PCI: 00:1f.0 [8086/9d84] enabled
818 12:40:50.899164 PCI: Static device PCI: 00:1f.1 not found, disabling it.
819 12:40:50.904423 PCI: Static device PCI: 00:1f.2 not found, disabling it.
820 12:40:50.907849 PCI: 00:1f.3 [8086/0000] bus ops
821 12:40:50.911294 PCI: 00:1f.3 [8086/9dc8] enabled
822 12:40:50.914441 PCI: 00:1f.4 [8086/0000] bus ops
823 12:40:50.918212 PCI: 00:1f.4 [8086/9da3] enabled
824 12:40:50.921379 PCI: 00:1f.5 [8086/0000] bus ops
825 12:40:50.924980 PCI: 00:1f.5 [8086/9da4] enabled
826 12:40:50.928072 PCI: 00:1f.6 [8086/15be] enabled
827 12:40:50.930729 PCI: Leftover static devices:
828 12:40:50.932226 PCI: 00:12.5
829 12:40:50.933365 PCI: 00:12.6
830 12:40:50.935070 PCI: 00:13.0
831 12:40:50.936514 PCI: 00:14.1
832 12:40:50.937458 PCI: 00:14.5
833 12:40:50.939088 PCI: 00:15.2
834 12:40:50.940962 PCI: 00:15.3
835 12:40:50.941470 PCI: 00:16.1
836 12:40:50.943266 PCI: 00:16.2
837 12:40:50.944308 PCI: 00:16.3
838 12:40:50.945851 PCI: 00:16.4
839 12:40:50.947393 PCI: 00:16.5
840 12:40:50.949033 PCI: 00:19.1
841 12:40:50.949804 PCI: 00:1a.0
842 12:40:50.951334 PCI: 00:1c.1
843 12:40:50.952428 PCI: 00:1c.2
844 12:40:50.954406 PCI: 00:1c.3
845 12:40:50.955170 PCI: 00:1c.4
846 12:40:50.956882 PCI: 00:1c.5
847 12:40:50.957845 PCI: 00:1c.6
848 12:40:50.960072 PCI: 00:1c.7
849 12:40:50.960810 PCI: 00:1d.1
850 12:40:50.961979 PCI: 00:1d.2
851 12:40:50.963796 PCI: 00:1d.3
852 12:40:50.964700 PCI: 00:1d.4
853 12:40:50.966149 PCI: 00:1e.0
854 12:40:50.967835 PCI: 00:1e.1
855 12:40:50.969124 PCI: 00:1e.2
856 12:40:50.970455 PCI: 00:1e.3
857 12:40:50.971784 PCI: 00:1f.1
858 12:40:50.973535 PCI: 00:1f.2
859 12:40:50.976485 PCI: Check your devicetree.cb.
860 12:40:50.978629 PCI: 00:14.0 scanning...
861 12:40:50.982062 scan_usb_bus for PCI: 00:14.0
862 12:40:50.984313 USB0 port 0 enabled
863 12:40:50.986534 USB0 port 0 scanning...
864 12:40:50.989859 scan_usb_bus for USB0 port 0
865 12:40:50.991742 USB2 port 0 enabled
866 12:40:50.993742 USB2 port 1 enabled
867 12:40:50.995751 USB2 port 2 enabled
868 12:40:50.997835 USB2 port 4 enabled
869 12:40:51.000014 USB2 port 5 enabled
870 12:40:51.001777 USB2 port 6 enabled
871 12:40:51.004117 USB2 port 7 enabled
872 12:40:51.006030 USB2 port 8 enabled
873 12:40:51.008050 USB2 port 9 enabled
874 12:40:51.009890 USB3 port 0 enabled
875 12:40:51.012097 USB3 port 1 enabled
876 12:40:51.014360 USB3 port 2 enabled
877 12:40:51.016176 USB3 port 3 enabled
878 12:40:51.018495 USB3 port 4 enabled
879 12:40:51.020955 USB2 port 0 scanning...
880 12:40:51.024135 scan_usb_bus for USB2 port 0
881 12:40:51.027443 scan_usb_bus for USB2 port 0 done
882 12:40:51.032598 scan_bus: scanning of bus USB2 port 0 took 9057 usecs
883 12:40:51.035416 USB2 port 1 scanning...
884 12:40:51.038184 scan_usb_bus for USB2 port 1
885 12:40:51.041764 scan_usb_bus for USB2 port 1 done
886 12:40:51.047476 scan_bus: scanning of bus USB2 port 1 took 9056 usecs
887 12:40:51.049512 USB2 port 2 scanning...
888 12:40:51.052572 scan_usb_bus for USB2 port 2
889 12:40:51.056261 scan_usb_bus for USB2 port 2 done
890 12:40:51.061393 scan_bus: scanning of bus USB2 port 2 took 9056 usecs
891 12:40:51.064177 USB2 port 4 scanning...
892 12:40:51.067370 scan_usb_bus for USB2 port 4
893 12:40:51.070784 scan_usb_bus for USB2 port 4 done
894 12:40:51.076150 scan_bus: scanning of bus USB2 port 4 took 9056 usecs
895 12:40:51.078231 USB2 port 5 scanning...
896 12:40:51.082509 scan_usb_bus for USB2 port 5
897 12:40:51.085123 scan_usb_bus for USB2 port 5 done
898 12:40:51.090451 scan_bus: scanning of bus USB2 port 5 took 9057 usecs
899 12:40:51.093041 USB2 port 6 scanning...
900 12:40:51.096609 scan_usb_bus for USB2 port 6
901 12:40:51.099737 scan_usb_bus for USB2 port 6 done
902 12:40:51.105064 scan_bus: scanning of bus USB2 port 6 took 9056 usecs
903 12:40:51.106967 USB2 port 7 scanning...
904 12:40:51.109941 scan_usb_bus for USB2 port 7
905 12:40:51.113410 scan_usb_bus for USB2 port 7 done
906 12:40:51.118886 scan_bus: scanning of bus USB2 port 7 took 9057 usecs
907 12:40:51.121867 USB2 port 8 scanning...
908 12:40:51.124687 scan_usb_bus for USB2 port 8
909 12:40:51.128260 scan_usb_bus for USB2 port 8 done
910 12:40:51.133770 scan_bus: scanning of bus USB2 port 8 took 9056 usecs
911 12:40:51.135997 USB2 port 9 scanning...
912 12:40:51.139341 scan_usb_bus for USB2 port 9
913 12:40:51.142211 scan_usb_bus for USB2 port 9 done
914 12:40:51.148210 scan_bus: scanning of bus USB2 port 9 took 9059 usecs
915 12:40:51.151033 USB3 port 0 scanning...
916 12:40:51.153732 scan_usb_bus for USB3 port 0
917 12:40:51.157251 scan_usb_bus for USB3 port 0 done
918 12:40:51.162385 scan_bus: scanning of bus USB3 port 0 took 9055 usecs
919 12:40:51.164845 USB3 port 1 scanning...
920 12:40:51.168321 scan_usb_bus for USB3 port 1
921 12:40:51.171596 scan_usb_bus for USB3 port 1 done
922 12:40:51.176706 scan_bus: scanning of bus USB3 port 1 took 9057 usecs
923 12:40:51.179303 USB3 port 2 scanning...
924 12:40:51.182722 scan_usb_bus for USB3 port 2
925 12:40:51.185971 scan_usb_bus for USB3 port 2 done
926 12:40:51.190956 scan_bus: scanning of bus USB3 port 2 took 9055 usecs
927 12:40:51.193510 USB3 port 3 scanning...
928 12:40:51.196666 scan_usb_bus for USB3 port 3
929 12:40:51.200103 scan_usb_bus for USB3 port 3 done
930 12:40:51.205122 scan_bus: scanning of bus USB3 port 3 took 9056 usecs
931 12:40:51.208075 USB3 port 4 scanning...
932 12:40:51.211398 scan_usb_bus for USB3 port 4
933 12:40:51.214813 scan_usb_bus for USB3 port 4 done
934 12:40:51.219801 scan_bus: scanning of bus USB3 port 4 took 9056 usecs
935 12:40:51.223371 scan_usb_bus for USB0 port 0 done
936 12:40:51.228830 scan_bus: scanning of bus USB0 port 0 took 239187 usecs
937 12:40:51.232573 scan_usb_bus for PCI: 00:14.0 done
938 12:40:51.238154 scan_bus: scanning of bus PCI: 00:14.0 took 256110 usecs
939 12:40:51.240914 PCI: 00:15.0 scanning...
940 12:40:51.244285 scan_generic_bus for PCI: 00:15.0
941 12:40:51.248105 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
942 12:40:51.252528 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
943 12:40:51.256501 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
944 12:40:51.260333 scan_generic_bus for PCI: 00:15.0 done
945 12:40:51.265793 scan_bus: scanning of bus PCI: 00:15.0 took 22371 usecs
946 12:40:51.268654 PCI: 00:15.1 scanning...
947 12:40:51.272192 scan_generic_bus for PCI: 00:15.1
948 12:40:51.276920 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
949 12:40:51.280665 scan_generic_bus for PCI: 00:15.1 done
950 12:40:51.286041 scan_bus: scanning of bus PCI: 00:15.1 took 14204 usecs
951 12:40:51.287872 PCI: 00:19.0 scanning...
952 12:40:51.291489 scan_generic_bus for PCI: 00:19.0
953 12:40:51.296546 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
954 12:40:51.300340 scan_generic_bus for PCI: 00:19.0 done
955 12:40:51.305197 scan_bus: scanning of bus PCI: 00:19.0 took 14205 usecs
956 12:40:51.307761 PCI: 00:1c.0 scanning...
957 12:40:51.311559 do_pci_scan_bridge for PCI: 00:1c.0
958 12:40:51.314441 PCI: pci_scan_bus for bus 01
959 12:40:51.318215 PCI: 01:00.0 [10ec/525a] enabled
960 12:40:51.321707 Capability: type 0x01 @ 0x80
961 12:40:51.324107 Capability: type 0x05 @ 0x90
962 12:40:51.327320 Capability: type 0x10 @ 0xb0
963 12:40:51.330069 Capability: type 0x10 @ 0x40
964 12:40:51.333486 Enabling Common Clock Configuration
965 12:40:51.337670 L1 Sub-State supported from root port 28
966 12:40:51.340415 L1 Sub-State Support = 0xf
967 12:40:51.343415 CommonModeRestoreTime = 0x3c
968 12:40:51.347914 Power On Value = 0x6, Power On Scale = 0x1
969 12:40:51.350465 ASPM: Enabled L0s and L1
970 12:40:51.353660 Capability: type 0x01 @ 0x80
971 12:40:51.356276 Capability: type 0x05 @ 0x90
972 12:40:51.358724 Capability: type 0x10 @ 0xb0
973 12:40:51.364701 scan_bus: scanning of bus PCI: 00:1c.0 took 53631 usecs
974 12:40:51.367221 PCI: 00:1d.0 scanning...
975 12:40:51.371129 do_pci_scan_bridge for PCI: 00:1d.0
976 12:40:51.373738 PCI: pci_scan_bus for bus 02
977 12:40:51.377024 PCI: 02:00.0 [1217/8620] enabled
978 12:40:51.380758 Capability: type 0x01 @ 0x6c
979 12:40:51.383129 Capability: type 0x05 @ 0x48
980 12:40:51.386341 Capability: type 0x10 @ 0x80
981 12:40:51.389587 Capability: type 0x10 @ 0x40
982 12:40:51.393143 L1 Sub-State supported from root port 29
983 12:40:51.396076 L1 Sub-State Support = 0xf
984 12:40:51.399207 CommonModeRestoreTime = 0x78
985 12:40:51.403163 Power On Value = 0x16, Power On Scale = 0x0
986 12:40:51.405217 ASPM: Enabled L1
987 12:40:51.409473 Capability: type 0x01 @ 0x6c
988 12:40:51.414400 Capability: type 0x05 @ 0x48
989 12:40:51.419159 Capability: type 0x10 @ 0x80
990 12:40:51.426276 scan_bus: scanning of bus PCI: 00:1d.0 took 56001 usecs
991 12:40:51.428423 PCI: 00:1f.0 scanning...
992 12:40:51.432405 scan_lpc_bus for PCI: 00:1f.0
993 12:40:51.434480 PNP: 0c09.0 enabled
994 12:40:51.437847 scan_lpc_bus for PCI: 00:1f.0 done
995 12:40:51.443313 scan_bus: scanning of bus PCI: 00:1f.0 took 11390 usecs
996 12:40:51.445370 PCI: 00:1f.3 scanning...
997 12:40:51.451271 scan_bus: scanning of bus PCI: 00:1f.3 took 2839 usecs
998 12:40:51.453579 PCI: 00:1f.4 scanning...
999 12:40:51.458036 scan_generic_bus for PCI: 00:1f.4
1000 12:40:51.461543 scan_generic_bus for PCI: 00:1f.4 done
1001 12:40:51.467300 scan_bus: scanning of bus PCI: 00:1f.4 took 10125 usecs
1002 12:40:52.003283 PCI: 00:1f.5 scanning...
1003 12:40:52.003450 scan_generic_bus for PCI: 00:1f.5
1004 12:40:52.003575 scan_generic_bus for PCI: 00:1f.5 done
1005 12:40:52.003678 scan_bus: scanning of bus PCI: 00:1f.5 took 10127 usecs
1006 12:40:52.003778 scan_bus: scanning of bus DOMAIN: 0000 took 706400 usecs
1007 12:40:52.003879 root_dev_scan_bus for Root Device done
1008 12:40:52.003981 scan_bus: scanning of bus Root Device took 726533 usecs
1009 12:40:52.004082 done
1010 12:40:52.004184 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1011 12:40:52.004287 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1012 12:40:52.004389 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1013 12:40:52.004488 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1014 12:40:52.004585 SPI flash protection: WPSW=1 SRP0=1
1015 12:40:52.004680 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
1016 12:40:52.004777 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
1017 12:40:52.004875 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1147966 exit 42583
1018 12:40:52.004974 found VGA at PCI: 00:02.0
1019 12:40:52.005075 Setting up VGA for PCI: 00:02.0
1020 12:40:52.005171 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1021 12:40:52.005274 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1022 12:40:52.005368 Allocating resources...
1023 12:40:52.005464 Reading resources...
1024 12:40:52.005567 Root Device read_resources bus 0 link: 0
1025 12:40:52.005665 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1026 12:40:52.005756 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1027 12:40:52.005855 DOMAIN: 0000 read_resources bus 0 link: 0
1028 12:40:52.005942 PCI: 00:14.0 read_resources bus 0 link: 0
1029 12:40:52.006029 USB0 port 0 read_resources bus 0 link: 0
1030 12:40:52.006125 USB0 port 0 read_resources bus 0 link: 0 done
1031 12:40:52.006212 PCI: 00:14.0 read_resources bus 0 link: 0 done
1032 12:40:52.006297 PCI: 00:15.0 read_resources bus 1 link: 0
1033 12:40:52.006382 PCI: 00:15.0 read_resources bus 1 link: 0 done
1034 12:40:52.006471 PCI: 00:15.1 read_resources bus 2 link: 0
1035 12:40:52.006533 PCI: 00:15.1 read_resources bus 2 link: 0 done
1036 12:40:52.006589 PCI: 00:19.0 read_resources bus 3 link: 0
1037 12:40:52.006645 PCI: 00:19.0 read_resources bus 3 link: 0 done
1038 12:40:52.006700 PCI: 00:1c.0 read_resources bus 1 link: 0
1039 12:40:52.006755 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1040 12:40:52.006810 PCI: 00:1d.0 read_resources bus 2 link: 0
1041 12:40:52.006865 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1042 12:40:52.006919 PCI: 00:1f.0 read_resources bus 0 link: 0
1043 12:40:52.006973 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1044 12:40:52.007041 DOMAIN: 0000 read_resources bus 0 link: 0 done
1045 12:40:52.007098 Root Device read_resources bus 0 link: 0 done
1046 12:40:52.007171 Done reading resources.
1047 12:40:52.007228 Show resources in subtree (Root Device)...After reading.
1048 12:40:52.007295 Root Device child on link 0 CPU_CLUSTER: 0
1049 12:40:52.007353 CPU_CLUSTER: 0 child on link 0 APIC: 00
1050 12:40:52.007408 APIC: 00
1051 12:40:52.007463 APIC: 02
1052 12:40:52.007517 APIC: 01
1053 12:40:52.007572 APIC: 03
1054 12:40:52.007640 APIC: 06
1055 12:40:52.007729 APIC: 07
1056 12:40:52.007813 APIC: 05
1057 12:40:52.007896 APIC: 04
1058 12:40:52.007987 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1059 12:40:52.008074 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1060 12:40:52.008164 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1061 12:40:52.008248 PCI: 00:00.0
1062 12:40:52.008334 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1063 12:40:52.008420 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1064 12:40:52.008506 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1065 12:40:52.008598 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1066 12:40:52.008685 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1067 12:40:52.008777 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1068 12:40:52.008865 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1069 12:40:52.008951 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1070 12:40:52.009037 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1071 12:40:52.009123 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1072 12:40:52.009215 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1073 12:40:52.009318 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1074 12:40:52.009407 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1075 12:40:52.009493 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1076 12:40:52.009578 PCI: 00:02.0
1077 12:40:52.009664 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1078 12:40:52.009934 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1079 12:40:52.010041 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1080 12:40:52.010135 PCI: 00:04.0
1081 12:40:52.010223 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1082 12:40:52.010308 PCI: 00:08.0
1083 12:40:52.010391 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1084 12:40:52.010467 PCI: 00:12.0
1085 12:40:52.010524 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1086 12:40:52.010581 PCI: 00:14.0 child on link 0 USB0 port 0
1087 12:40:52.010636 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1088 12:40:52.010692 USB0 port 0 child on link 0 USB2 port 0
1089 12:40:52.010747 USB2 port 0
1090 12:40:52.010802 USB2 port 1
1091 12:40:52.010856 USB2 port 2
1092 12:40:52.010910 USB2 port 4
1093 12:40:52.010983 USB2 port 5
1094 12:40:52.011038 USB2 port 6
1095 12:40:52.011092 USB2 port 7
1096 12:40:52.011146 USB2 port 8
1097 12:40:52.011201 USB2 port 9
1098 12:40:52.011255 USB3 port 0
1099 12:40:52.011308 USB3 port 1
1100 12:40:52.011362 USB3 port 2
1101 12:40:52.011416 USB3 port 3
1102 12:40:52.011469 USB3 port 4
1103 12:40:52.011525 PCI: 00:14.2
1104 12:40:52.011605 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1105 12:40:52.011663 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1106 12:40:52.011719 PCI: 00:14.3
1107 12:40:52.011787 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1108 12:40:52.014549 PCI: 00:15.0 child on link 0 I2C: 01:10
1109 12:40:52.025072 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 12:40:52.026633 I2C: 01:10
1111 12:40:52.027919 I2C: 01:10
1112 12:40:52.029180 I2C: 01:34
1113 12:40:52.033740 PCI: 00:15.1 child on link 0 I2C: 02:2c
1114 12:40:52.043906 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1115 12:40:52.044996 I2C: 02:2c
1116 12:40:52.046764 PCI: 00:16.0
1117 12:40:52.057343 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1118 12:40:52.058338 PCI: 00:17.0
1119 12:40:52.067474 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1120 12:40:52.076409 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1121 12:40:52.085228 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1122 12:40:52.092834 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1123 12:40:52.100936 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1124 12:40:52.110403 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1125 12:40:52.114916 PCI: 00:19.0 child on link 0 I2C: 03:50
1126 12:40:52.124767 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 12:40:52.134478 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 12:40:52.135979 I2C: 03:50
1129 12:40:52.137818 PCI: 00:19.2
1130 12:40:52.149214 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1131 12:40:52.158832 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1132 12:40:52.162753 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1133 12:40:52.172107 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1134 12:40:52.181626 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1135 12:40:52.190324 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1136 12:40:52.192619 PCI: 01:00.0
1137 12:40:52.201446 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1138 12:40:52.205918 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1139 12:40:52.214735 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1140 12:40:52.224421 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1141 12:40:52.233376 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1142 12:40:52.235297 PCI: 02:00.0
1143 12:40:52.244748 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1144 12:40:52.253801 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1145 12:40:52.257856 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1146 12:40:52.266947 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1147 12:40:52.275294 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1148 12:40:52.277683 PNP: 0c09.0
1149 12:40:52.286448 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1150 12:40:52.294572 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1151 12:40:52.302700 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1152 12:40:52.305120 PCI: 00:1f.3
1153 12:40:52.314462 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1154 12:40:52.325030 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1155 12:40:52.326554 PCI: 00:1f.4
1156 12:40:52.335622 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1157 12:40:52.345384 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1158 12:40:52.346452 PCI: 00:1f.5
1159 12:40:52.355588 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1160 12:40:52.357184 PCI: 00:1f.6
1161 12:40:52.366863 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1162 12:40:52.373790 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1163 12:40:52.379878 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1164 12:40:52.386238 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1165 12:40:52.392862 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1166 12:40:52.399312 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1167 12:40:52.403261 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1168 12:40:52.406625 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1169 12:40:52.410078 PCI: 00:17.0 18 * [0x60 - 0x67] io
1170 12:40:52.413669 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1171 12:40:52.420546 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1172 12:40:52.426887 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1173 12:40:52.435431 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1174 12:40:52.443531 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1175 12:40:52.450526 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1176 12:40:52.454188 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1177 12:40:52.462043 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1178 12:40:52.469740 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1179 12:40:52.478068 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1180 12:40:52.484911 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1181 12:40:52.488627 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1182 12:40:52.492875 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1183 12:40:52.500863 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1184 12:40:52.505581 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1185 12:40:52.510620 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1186 12:40:52.515564 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1187 12:40:52.520233 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1188 12:40:52.525633 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1189 12:40:52.529970 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1190 12:40:52.534493 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1191 12:40:52.539666 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1192 12:40:52.545021 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1193 12:40:52.549020 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1194 12:40:52.554032 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1195 12:40:52.559059 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1196 12:40:52.564798 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1197 12:40:52.569282 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1198 12:40:52.573394 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1199 12:40:52.578719 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1200 12:40:52.583402 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1201 12:40:52.587813 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1202 12:40:52.593032 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1203 12:40:52.597601 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1204 12:40:52.602992 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1205 12:40:52.607439 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1206 12:40:52.612537 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1207 12:40:52.617018 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1208 12:40:52.622436 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1209 12:40:52.630437 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1210 12:40:52.634057 avoid_fixed_resources: DOMAIN: 0000
1211 12:40:52.640463 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1212 12:40:52.645981 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1213 12:40:52.654008 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1214 12:40:52.661724 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1215 12:40:52.669162 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1216 12:40:52.677040 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1217 12:40:52.684886 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1218 12:40:52.692027 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1219 12:40:52.699925 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1220 12:40:52.706967 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1221 12:40:52.714343 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1222 12:40:52.721472 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1223 12:40:52.724149 Setting resources...
1224 12:40:52.730266 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1225 12:40:52.734336 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1226 12:40:52.737984 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1227 12:40:52.742296 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1228 12:40:52.746238 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1229 12:40:52.752393 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1230 12:40:52.759092 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1231 12:40:52.765074 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1232 12:40:52.770967 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 12:40:52.777727 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 12:40:52.785101 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1235 12:40:52.790479 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 12:40:52.795336 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 12:40:52.800195 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 12:40:52.805112 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1239 12:40:52.809720 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1240 12:40:52.814559 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1241 12:40:52.819479 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1242 12:40:52.824014 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1243 12:40:52.829472 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1244 12:40:52.833957 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1245 12:40:52.839293 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1246 12:40:52.843519 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1247 12:40:52.848458 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1248 12:40:52.853740 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1249 12:40:52.858809 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1250 12:40:52.863013 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1251 12:40:52.868816 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1252 12:40:52.873014 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1253 12:40:52.878018 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1254 12:40:52.882541 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1255 12:40:52.887606 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1256 12:40:52.892670 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1257 12:40:52.897336 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1258 12:40:52.902275 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1259 12:40:52.906652 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1260 12:40:52.914704 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1261 12:40:52.921966 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1262 12:40:52.929309 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1263 12:40:52.936739 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1264 12:40:52.941991 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1265 12:40:52.949079 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1266 12:40:52.956273 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 12:40:52.963774 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 12:40:52.971374 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1269 12:40:52.975738 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1270 12:40:52.980656 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1271 12:40:52.988125 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1272 12:40:52.992534 Root Device assign_resources, bus 0 link: 0
1273 12:40:52.997124 DOMAIN: 0000 assign_resources, bus 0 link: 0
1274 12:40:53.006361 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1275 12:40:53.014090 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1276 12:40:53.022138 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1277 12:40:53.030167 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1278 12:40:53.038396 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1279 12:40:53.046690 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1280 12:40:53.055114 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1281 12:40:53.059610 PCI: 00:14.0 assign_resources, bus 0 link: 0
1282 12:40:53.064080 PCI: 00:14.0 assign_resources, bus 0 link: 0
1283 12:40:53.072350 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1284 12:40:53.080221 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1285 12:40:53.088961 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1286 12:40:53.097468 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1287 12:40:53.101303 PCI: 00:15.0 assign_resources, bus 1 link: 0
1288 12:40:53.105999 PCI: 00:15.0 assign_resources, bus 1 link: 0
1289 12:40:53.115032 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1290 12:40:53.119097 PCI: 00:15.1 assign_resources, bus 2 link: 0
1291 12:40:53.123767 PCI: 00:15.1 assign_resources, bus 2 link: 0
1292 12:40:53.131669 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1293 12:40:53.140806 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1294 12:40:53.147958 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1295 12:40:53.155635 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1296 12:40:53.163014 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1297 12:40:53.171393 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1298 12:40:53.179422 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1299 12:40:53.186628 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1300 12:40:53.195260 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1301 12:40:53.199322 PCI: 00:19.0 assign_resources, bus 3 link: 0
1302 12:40:53.204774 PCI: 00:19.0 assign_resources, bus 3 link: 0
1303 12:40:53.212898 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1304 12:40:53.220874 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1305 12:40:53.230064 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1306 12:40:53.239138 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1307 12:40:53.242657 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1308 12:40:53.250673 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1309 12:40:53.255392 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1310 12:40:53.264228 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1311 12:40:53.273593 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1312 12:40:53.281992 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1313 12:40:53.286044 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1314 12:40:53.296112 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1315 12:40:53.305385 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1316 12:40:53.312106 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1317 12:40:53.317172 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1318 12:40:53.321981 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1319 12:40:53.326439 LPC: Trying to open IO window from 930 size 8
1320 12:40:53.330883 LPC: Trying to open IO window from 940 size 8
1321 12:40:53.336154 LPC: Trying to open IO window from 950 size 10
1322 12:40:53.343943 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1323 12:40:53.351734 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1324 12:40:53.360365 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1325 12:40:53.368264 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1326 12:40:53.376243 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1327 12:40:53.380917 DOMAIN: 0000 assign_resources, bus 0 link: 0
1328 12:40:53.386492 Root Device assign_resources, bus 0 link: 0
1329 12:40:53.388506 Done setting resources.
1330 12:40:53.394656 Show resources in subtree (Root Device)...After assigning values.
1331 12:40:53.399248 Root Device child on link 0 CPU_CLUSTER: 0
1332 12:40:53.403014 CPU_CLUSTER: 0 child on link 0 APIC: 00
1333 12:40:53.404933 APIC: 00
1334 12:40:53.406144 APIC: 02
1335 12:40:53.407302 APIC: 01
1336 12:40:53.408757 APIC: 03
1337 12:40:53.409460 APIC: 06
1338 12:40:53.411181 APIC: 07
1339 12:40:53.412399 APIC: 05
1340 12:40:53.413675 APIC: 04
1341 12:40:53.417848 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1342 12:40:53.427437 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1343 12:40:53.438506 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1344 12:40:53.440303 PCI: 00:00.0
1345 12:40:53.450062 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1346 12:40:53.459377 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1347 12:40:53.468466 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1348 12:40:53.477568 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1349 12:40:53.486935 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1350 12:40:53.496956 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1351 12:40:53.506078 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1352 12:40:53.514516 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1353 12:40:53.524039 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1354 12:40:53.533205 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1355 12:40:53.543482 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1356 12:40:53.553106 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1357 12:40:53.562170 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1358 12:40:53.571286 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1359 12:40:53.572742 PCI: 00:02.0
1360 12:40:53.584014 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1361 12:40:53.594379 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1362 12:40:53.603356 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1363 12:40:53.604947 PCI: 00:04.0
1364 12:40:53.615374 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1365 12:40:53.617124 PCI: 00:08.0
1366 12:40:53.627612 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1367 12:40:53.628973 PCI: 00:12.0
1368 12:40:53.639656 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1369 12:40:53.643734 PCI: 00:14.0 child on link 0 USB0 port 0
1370 12:40:53.653780 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1371 12:40:53.658157 USB0 port 0 child on link 0 USB2 port 0
1372 12:40:53.660017 USB2 port 0
1373 12:40:53.661671 USB2 port 1
1374 12:40:53.663593 USB2 port 2
1375 12:40:53.665191 USB2 port 4
1376 12:40:53.667433 USB2 port 5
1377 12:40:53.668801 USB2 port 6
1378 12:40:53.670803 USB2 port 7
1379 12:40:53.672730 USB2 port 8
1380 12:40:53.674619 USB2 port 9
1381 12:40:53.675928 USB3 port 0
1382 12:40:53.677973 USB3 port 1
1383 12:40:53.679254 USB3 port 2
1384 12:40:53.681264 USB3 port 3
1385 12:40:53.683431 USB3 port 4
1386 12:40:53.684945 PCI: 00:14.2
1387 12:40:53.695206 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1388 12:40:53.705113 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1389 12:40:53.707403 PCI: 00:14.3
1390 12:40:53.717330 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1391 12:40:53.721286 PCI: 00:15.0 child on link 0 I2C: 01:10
1392 12:40:53.731492 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1393 12:40:53.733153 I2C: 01:10
1394 12:40:53.735065 I2C: 01:10
1395 12:40:53.736291 I2C: 01:34
1396 12:40:53.740768 PCI: 00:15.1 child on link 0 I2C: 02:2c
1397 12:40:53.751408 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1398 12:40:53.752312 I2C: 02:2c
1399 12:40:53.754113 PCI: 00:16.0
1400 12:40:53.764360 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1401 12:40:53.765869 PCI: 00:17.0
1402 12:40:53.776673 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1403 12:40:53.786854 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1404 12:40:53.795179 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1405 12:40:53.804630 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1406 12:40:53.813674 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1407 12:40:53.823766 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1408 12:40:53.828660 PCI: 00:19.0 child on link 0 I2C: 03:50
1409 12:40:53.838480 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1410 12:40:53.848849 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1411 12:40:53.850074 I2C: 03:50
1412 12:40:53.851675 PCI: 00:19.2
1413 12:40:53.862877 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 12:40:53.873539 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1415 12:40:53.877512 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1416 12:40:53.887190 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1417 12:40:53.897059 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1418 12:40:53.907457 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1419 12:40:53.909298 PCI: 01:00.0
1420 12:40:53.919692 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1421 12:40:53.924613 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1422 12:40:53.933084 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1423 12:40:53.943451 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1424 12:40:53.953777 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1425 12:40:53.955409 PCI: 02:00.0
1426 12:40:53.966432 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1427 12:40:53.976041 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1428 12:40:53.981055 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1429 12:40:53.989393 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1430 12:40:53.998976 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1431 12:40:53.999985 PNP: 0c09.0
1432 12:40:54.008196 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1433 12:40:54.017456 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1434 12:40:54.025670 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1435 12:40:54.027236 PCI: 00:1f.3
1436 12:40:54.037750 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1437 12:40:54.047805 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1438 12:40:54.049532 PCI: 00:1f.4
1439 12:40:54.058997 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1440 12:40:54.068891 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1441 12:40:54.071022 PCI: 00:1f.5
1442 12:40:54.080848 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1443 12:40:54.082297 PCI: 00:1f.6
1444 12:40:54.093253 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1445 12:40:54.095487 Done allocating resources.
1446 12:40:54.101786 BS: BS_DEV_RESOURCES times (us): entry 0 run 2548142 exit 21
1447 12:40:54.104798 Enabling resources...
1448 12:40:54.109208 PCI: 00:00.0 subsystem <- 1028/3e34
1449 12:40:54.111678 PCI: 00:00.0 cmd <- 06
1450 12:40:54.115445 PCI: 00:02.0 subsystem <- 1028/3ea0
1451 12:40:54.118057 PCI: 00:02.0 cmd <- 03
1452 12:40:54.121130 PCI: 00:04.0 subsystem <- 1028/1903
1453 12:40:54.123931 PCI: 00:04.0 cmd <- 02
1454 12:40:54.126570 PCI: 00:08.0 cmd <- 06
1455 12:40:54.130503 PCI: 00:12.0 subsystem <- 1028/9df9
1456 12:40:54.132892 PCI: 00:12.0 cmd <- 02
1457 12:40:54.136889 PCI: 00:14.0 subsystem <- 1028/9ded
1458 12:40:54.139524 PCI: 00:14.0 cmd <- 02
1459 12:40:54.141735 PCI: 00:14.2 cmd <- 02
1460 12:40:54.145128 PCI: 00:14.3 subsystem <- 1028/9df0
1461 12:40:54.147960 PCI: 00:14.3 cmd <- 02
1462 12:40:54.152175 PCI: 00:15.0 subsystem <- 1028/9de8
1463 12:40:54.154312 PCI: 00:15.0 cmd <- 02
1464 12:40:54.157635 PCI: 00:15.1 subsystem <- 1028/9de9
1465 12:40:54.160707 PCI: 00:15.1 cmd <- 02
1466 12:40:54.164493 PCI: 00:16.0 subsystem <- 1028/9de0
1467 12:40:54.166626 PCI: 00:16.0 cmd <- 02
1468 12:40:54.170269 PCI: 00:17.0 subsystem <- 1028/9dd3
1469 12:40:54.172669 PCI: 00:17.0 cmd <- 03
1470 12:40:54.177006 PCI: 00:19.0 subsystem <- 1028/9dc5
1471 12:40:54.179328 PCI: 00:19.0 cmd <- 06
1472 12:40:54.182792 PCI: 00:19.2 subsystem <- 1028/9dc7
1473 12:40:54.185203 PCI: 00:19.2 cmd <- 06
1474 12:40:54.188868 PCI: 00:1c.0 bridge ctrl <- 0003
1475 12:40:54.192796 PCI: 00:1c.0 subsystem <- 1028/9dbf
1476 12:40:54.195438 Capability: type 0x10 @ 0x40
1477 12:40:54.198748 Capability: type 0x05 @ 0x80
1478 12:40:54.201213 Capability: type 0x0d @ 0x90
1479 12:40:54.203448 PCI: 00:1c.0 cmd <- 06
1480 12:40:54.207790 PCI: 00:1d.0 bridge ctrl <- 0003
1481 12:40:54.210877 PCI: 00:1d.0 subsystem <- 1028/9db4
1482 12:40:54.214338 Capability: type 0x10 @ 0x40
1483 12:40:54.217544 Capability: type 0x05 @ 0x80
1484 12:40:54.219326 Capability: type 0x0d @ 0x90
1485 12:40:54.222015 PCI: 00:1d.0 cmd <- 06
1486 12:40:54.225790 PCI: 00:1f.0 subsystem <- 1028/9d84
1487 12:40:54.228425 PCI: 00:1f.0 cmd <- 407
1488 12:40:54.232157 PCI: 00:1f.3 subsystem <- 1028/9dc8
1489 12:40:54.235055 PCI: 00:1f.3 cmd <- 02
1490 12:40:54.238814 PCI: 00:1f.4 subsystem <- 1028/9da3
1491 12:40:54.240927 PCI: 00:1f.4 cmd <- 03
1492 12:40:54.244448 PCI: 00:1f.5 subsystem <- 1028/9da4
1493 12:40:54.247479 PCI: 00:1f.5 cmd <- 406
1494 12:40:54.250965 PCI: 00:1f.6 subsystem <- 1028/15be
1495 12:40:54.253844 PCI: 00:1f.6 cmd <- 02
1496 12:40:54.264330 PCI: 01:00.0 cmd <- 02
1497 12:40:54.268898 PCI: 02:00.0 cmd <- 06
1498 12:40:54.272914 done.
1499 12:40:54.278780 BS: BS_DEV_ENABLE times (us): entry 405 run 170514 exit 0
1500 12:40:54.280791 Initializing devices...
1501 12:40:54.283083 Root Device init ...
1502 12:40:54.287224 Root Device init finished in 2138 usecs
1503 12:40:54.290233 CPU_CLUSTER: 0 init ...
1504 12:40:54.293936 CPU_CLUSTER: 0 init finished in 2431 usecs
1505 12:40:54.300564 PCI: 00:00.0 init ...
1506 12:40:54.304130 CPU TDP: 15 Watts
1507 12:40:54.305106 CPU PL2 = 51 Watts
1508 12:40:54.309786 PCI: 00:00.0 init finished in 7037 usecs
1509 12:40:54.312768 PCI: 00:02.0 init ...
1510 12:40:54.316624 PCI: 00:02.0 init finished in 2235 usecs
1511 12:40:54.318721 PCI: 00:04.0 init ...
1512 12:40:54.322561 PCI: 00:04.0 init finished in 2236 usecs
1513 12:40:54.325519 PCI: 00:08.0 init ...
1514 12:40:54.329629 PCI: 00:08.0 init finished in 2236 usecs
1515 12:40:54.332714 PCI: 00:12.0 init ...
1516 12:40:54.336457 PCI: 00:12.0 init finished in 2235 usecs
1517 12:40:54.338634 PCI: 00:14.0 init ...
1518 12:40:54.342800 PCI: 00:14.0 init finished in 2235 usecs
1519 12:40:54.346180 PCI: 00:14.2 init ...
1520 12:40:54.349907 PCI: 00:14.2 init finished in 2237 usecs
1521 12:40:54.351936 PCI: 00:14.3 init ...
1522 12:40:54.356745 PCI: 00:14.3 init finished in 2241 usecs
1523 12:40:54.359471 PCI: 00:15.0 init ...
1524 12:40:54.363287 DW I2C bus 0 at 0xd1347000 (400 KHz)
1525 12:40:54.366555 PCI: 00:15.0 init finished in 5935 usecs
1526 12:40:54.369798 PCI: 00:15.1 init ...
1527 12:40:54.373459 DW I2C bus 1 at 0xd1348000 (400 KHz)
1528 12:40:54.377059 PCI: 00:15.1 init finished in 5924 usecs
1529 12:40:54.380132 PCI: 00:16.0 init ...
1530 12:40:54.383604 PCI: 00:16.0 init finished in 2235 usecs
1531 12:40:54.387190 PCI: 00:19.0 init ...
1532 12:40:54.390501 DW I2C bus 4 at 0xd134a000 (400 KHz)
1533 12:40:54.394974 PCI: 00:19.0 init finished in 5933 usecs
1534 12:40:54.397797 PCI: 00:1c.0 init ...
1535 12:40:54.401096 Initializing PCH PCIe bridge.
1536 12:40:54.405070 PCI: 00:1c.0 init finished in 5249 usecs
1537 12:40:54.407816 PCI: 00:1d.0 init ...
1538 12:40:54.410309 Initializing PCH PCIe bridge.
1539 12:40:54.414985 PCI: 00:1d.0 init finished in 5248 usecs
1540 12:40:54.417296 PCI: 00:1f.0 init ...
1541 12:40:54.421388 IOAPIC: Initializing IOAPIC at 0xfec00000
1542 12:40:54.426245 IOAPIC: Bootstrap Processor Local APIC = 0x00
1543 12:40:54.427783 IOAPIC: ID = 0x02
1544 12:40:54.430383 IOAPIC: Dumping registers
1545 12:40:54.433245 reg 0x0000: 0x02000000
1546 12:40:54.435916 reg 0x0001: 0x00770020
1547 12:40:54.438101 reg 0x0002: 0x00000000
1548 12:40:54.443961 PCI: 00:1f.0 init finished in 25018 usecs
1549 12:40:54.447305 PCI: 00:1f.3 init ...
1550 12:40:54.452108 HDA: codec_mask = 05
1551 12:40:54.454999 HDA: Initializing codec #2
1552 12:40:54.457663 HDA: codec viddid: 8086280b
1553 12:40:54.461106 HDA: No verb table entry found
1554 12:40:54.463651 HDA: Initializing codec #0
1555 12:40:54.466716 HDA: codec viddid: 10ec0236
1556 12:40:54.472798 HDA: verb loaded.
1557 12:40:54.477727 PCI: 00:1f.3 init finished in 28834 usecs
1558 12:40:54.480217 PCI: 00:1f.4 init ...
1559 12:40:54.484638 PCI: 00:1f.4 init finished in 2246 usecs
1560 12:40:54.487632 PCI: 00:1f.6 init ...
1561 12:40:54.491606 PCI: 00:1f.6 init finished in 2236 usecs
1562 12:40:54.502362 PCI: 01:00.0 init ...
1563 12:40:54.506811 PCI: 01:00.0 init finished in 2236 usecs
1564 12:40:54.509588 PCI: 02:00.0 init ...
1565 12:40:54.513358 PCI: 02:00.0 init finished in 2236 usecs
1566 12:40:54.516019 PNP: 0c09.0 init ...
1567 12:40:54.519567 EC Label : 00.00.20
1568 12:40:54.523374 EC Revision : 9ca674bba
1569 12:40:54.527104 EC Model Num : 08B9
1570 12:40:54.530386 EC Build Date : 05/10/19
1571 12:40:54.539524 PNP: 0c09.0 init finished in 21724 usecs
1572 12:40:54.541911 Devices initialized
1573 12:40:54.544926 Show all devs... After init.
1574 12:40:54.546891 Root Device: enabled 1
1575 12:40:54.549896 CPU_CLUSTER: 0: enabled 1
1576 12:40:54.551857 DOMAIN: 0000: enabled 1
1577 12:40:54.554143 APIC: 00: enabled 1
1578 12:40:54.556676 PCI: 00:00.0: enabled 1
1579 12:40:54.559065 PCI: 00:02.0: enabled 1
1580 12:40:54.562406 PCI: 00:04.0: enabled 1
1581 12:40:54.563946 PCI: 00:12.0: enabled 1
1582 12:40:54.566563 PCI: 00:12.5: enabled 0
1583 12:40:54.569279 PCI: 00:12.6: enabled 0
1584 12:40:54.571333 PCI: 00:13.0: enabled 0
1585 12:40:54.573508 PCI: 00:14.0: enabled 1
1586 12:40:54.575756 PCI: 00:14.1: enabled 0
1587 12:40:54.578430 PCI: 00:14.3: enabled 1
1588 12:40:54.580869 PCI: 00:14.5: enabled 0
1589 12:40:54.583329 PCI: 00:15.0: enabled 1
1590 12:40:54.585800 PCI: 00:15.1: enabled 1
1591 12:40:54.587792 PCI: 00:15.2: enabled 0
1592 12:40:54.591065 PCI: 00:15.3: enabled 0
1593 12:40:54.601977 PCI: 00:16.0: enabled 1
1594 12:40:54.602208 PCI: 00:16.1: enabled 0
1595 12:40:54.602331 PCI: 00:16.2: enabled 0
1596 12:40:54.602459 PCI: 00:16.3: enabled 0
1597 12:40:54.604885 PCI: 00:16.4: enabled 0
1598 12:40:54.605337 PCI: 00:16.5: enabled 0
1599 12:40:54.608291 PCI: 00:17.0: enabled 1
1600 12:40:54.610408 PCI: 00:19.0: enabled 1
1601 12:40:54.612760 PCI: 00:19.1: enabled 0
1602 12:40:54.615047 PCI: 00:19.2: enabled 1
1603 12:40:54.617118 PCI: 00:1a.0: enabled 0
1604 12:40:54.619514 PCI: 00:1c.0: enabled 1
1605 12:40:54.622357 PCI: 00:1c.1: enabled 0
1606 12:40:54.624293 PCI: 00:1c.2: enabled 0
1607 12:40:54.627113 PCI: 00:1c.3: enabled 0
1608 12:40:54.629236 PCI: 00:1c.4: enabled 0
1609 12:40:54.632028 PCI: 00:1c.5: enabled 0
1610 12:40:54.634070 PCI: 00:1c.6: enabled 0
1611 12:40:54.637371 PCI: 00:1c.7: enabled 0
1612 12:40:54.639162 PCI: 00:1d.0: enabled 1
1613 12:40:54.642060 PCI: 00:1d.1: enabled 0
1614 12:40:54.644239 PCI: 00:1d.2: enabled 0
1615 12:40:54.646786 PCI: 00:1d.3: enabled 0
1616 12:40:54.649279 PCI: 00:1d.4: enabled 0
1617 12:40:54.651306 PCI: 00:1e.0: enabled 0
1618 12:40:54.653824 PCI: 00:1e.1: enabled 0
1619 12:40:54.656464 PCI: 00:1e.2: enabled 0
1620 12:40:54.659647 PCI: 00:1e.3: enabled 0
1621 12:40:54.661405 PCI: 00:1f.0: enabled 1
1622 12:40:54.663499 PCI: 00:1f.1: enabled 0
1623 12:40:54.666029 PCI: 00:1f.2: enabled 0
1624 12:40:54.668816 PCI: 00:1f.3: enabled 1
1625 12:40:54.670803 PCI: 00:1f.4: enabled 1
1626 12:40:54.673189 PCI: 00:1f.5: enabled 1
1627 12:40:54.675274 PCI: 00:1f.6: enabled 1
1628 12:40:54.678391 USB0 port 0: enabled 1
1629 12:40:54.680100 I2C: 01:10: enabled 1
1630 12:40:54.683141 I2C: 01:10: enabled 1
1631 12:40:54.685083 I2C: 01:34: enabled 1
1632 12:40:54.686798 I2C: 02:2c: enabled 1
1633 12:40:54.689013 I2C: 03:50: enabled 1
1634 12:40:54.691774 PNP: 0c09.0: enabled 1
1635 12:40:54.694053 USB2 port 0: enabled 1
1636 12:40:54.695849 USB2 port 1: enabled 1
1637 12:40:54.698643 USB2 port 2: enabled 1
1638 12:40:54.700917 USB2 port 4: enabled 1
1639 12:40:54.703262 USB2 port 5: enabled 1
1640 12:40:54.705882 USB2 port 6: enabled 1
1641 12:40:54.707759 USB2 port 7: enabled 1
1642 12:40:54.710341 USB2 port 8: enabled 1
1643 12:40:54.712526 USB2 port 9: enabled 1
1644 12:40:54.715354 USB3 port 0: enabled 1
1645 12:40:54.717667 USB3 port 1: enabled 1
1646 12:40:54.719302 USB3 port 2: enabled 1
1647 12:40:54.721552 USB3 port 3: enabled 1
1648 12:40:54.724048 USB3 port 4: enabled 1
1649 12:40:54.726339 APIC: 02: enabled 1
1650 12:40:54.728581 APIC: 01: enabled 1
1651 12:40:54.730094 APIC: 03: enabled 1
1652 12:40:54.731966 APIC: 06: enabled 1
1653 12:40:54.734890 APIC: 07: enabled 1
1654 12:40:54.736695 APIC: 05: enabled 1
1655 12:40:54.739670 APIC: 04: enabled 1
1656 12:40:54.741588 PCI: 00:08.0: enabled 1
1657 12:40:54.743460 PCI: 00:14.2: enabled 1
1658 12:40:54.746696 PCI: 01:00.0: enabled 1
1659 12:40:54.748673 PCI: 02:00.0: enabled 1
1660 12:40:54.753806 Disabling ACPI via APMC:
1661 12:40:54.756845 done.
1662 12:40:54.761236 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1663 12:40:54.765109 ELOG: NV offset 0x1bf0000 size 0x4000
1664 12:40:54.772571 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1665 12:40:54.779442 ELOG: Event(17) added with size 13 at 2023-08-30 12:40:55 UTC
1666 12:40:54.784971 POST: Unexpected post code in previous boot: 0x73
1667 12:40:54.791127 ELOG: Event(A3) added with size 11 at 2023-08-30 12:40:55 UTC
1668 12:40:54.796851 ELOG: Event(92) added with size 9 at 2023-08-30 12:40:55 UTC
1669 12:40:54.803028 ELOG: Event(93) added with size 9 at 2023-08-30 12:40:55 UTC
1670 12:40:54.809234 ELOG: Event(9A) added with size 9 at 2023-08-30 12:40:55 UTC
1671 12:40:54.815354 ELOG: Event(9E) added with size 10 at 2023-08-30 12:40:55 UTC
1672 12:40:54.822061 ELOG: Event(9F) added with size 14 at 2023-08-30 12:40:55 UTC
1673 12:40:54.828106 BS: BS_DEV_INIT times (us): entry 0 run 469698 exit 73558
1674 12:40:54.834521 ELOG: Event(A1) added with size 10 at 2023-08-30 12:40:55 UTC
1675 12:40:54.842430 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 12:40:54.848163 ELOG: Event(A0) added with size 9 at 2023-08-30 12:40:55 UTC
1677 12:40:54.852454 elog_add_boot_reason: Logged dev mode boot
1678 12:40:54.854958 Finalize devices...
1679 12:40:54.856659 PCI: 00:17.0 final
1680 12:40:54.858489 Devices finalized
1681 12:40:54.863957 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1682 12:40:54.870195 BS: BS_POST_DEVICE times (us): entry 24776 run 5937 exit 5367
1683 12:40:54.875851 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1684 12:40:54.883999 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1685 12:40:54.888991 disable_unused_touchscreen: Disable ACPI0C50
1686 12:40:54.892591 disable_unused_touchscreen: Enable ELAN900C
1687 12:40:54.896190 CBFS @ 1d00000 size 300000
1688 12:40:54.902395 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1689 12:40:54.905410 CBFS: Locating 'fallback/dsdt.aml'
1690 12:40:54.909419 CBFS: Found @ offset 10b200 size 4448
1691 12:40:54.912673 CBFS @ 1d00000 size 300000
1692 12:40:54.919129 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1693 12:40:54.921807 CBFS: Locating 'fallback/slic'
1694 12:40:54.927076 CBFS: 'fallback/slic' not found.
1695 12:40:54.930954 ACPI: Writing ACPI tables at 89c0f000.
1696 12:40:54.932928 ACPI: * FACS
1697 12:40:54.934218 ACPI: * DSDT
1698 12:40:54.938376 Ramoops buffer: 0x100000@0x89b0e000.
1699 12:40:54.942843 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1700 12:40:54.947554 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1701 12:40:54.951272 ACPI: * FADT
1702 12:40:54.952997 SCI is IRQ9
1703 12:40:54.956493 ACPI: added table 1/32, length now 40
1704 12:40:54.958033 ACPI: * SSDT
1705 12:40:54.961464 Found 1 CPU(s) with 8 core(s) each.
1706 12:40:54.965888 Error: Could not locate 'wifi_sar' in VPD.
1707 12:40:54.970162 Error: failed from getting SAR limits!
1708 12:40:54.973774 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1709 12:40:54.977737 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1710 12:40:54.981690 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1711 12:40:54.986273 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1712 12:40:54.991325 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1713 12:40:54.996860 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1714 12:40:55.001215 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1715 12:40:55.005551 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1716 12:40:55.011174 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1717 12:40:55.017494 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1718 12:40:55.022944 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1719 12:40:55.029407 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1720 12:40:55.034340 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1721 12:40:55.038319 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1722 12:40:55.042910 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1723 12:40:55.048685 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1724 12:40:55.053370 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1725 12:40:55.058832 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1726 12:40:55.064798 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1727 12:40:55.071065 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1728 12:40:55.077004 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1729 12:40:55.081729 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1730 12:40:55.085104 ACPI: added table 2/32, length now 44
1731 12:40:55.087089 ACPI: * MCFG
1732 12:40:55.090568 ACPI: added table 3/32, length now 48
1733 12:40:55.092140 ACPI: * TPM2
1734 12:40:55.094901 TPM2 log created at 89afe000
1735 12:40:55.099506 ACPI: added table 4/32, length now 52
1736 12:40:55.101037 ACPI: * MADT
1737 12:40:55.101907 SCI is IRQ9
1738 12:40:55.105957 ACPI: added table 5/32, length now 56
1739 12:40:55.107643 current = 89c14bd0
1740 12:40:55.109940 ACPI: * IGD OpRegion
1741 12:40:55.112233 GMA: Found VBT in CBFS
1742 12:40:55.115675 GMA: Found valid VBT in CBFS
1743 12:40:55.119596 ACPI: added table 6/32, length now 60
1744 12:40:55.120717 ACPI: * HPET
1745 12:40:55.124623 ACPI: added table 7/32, length now 64
1746 12:40:55.125860 ACPI: done.
1747 12:40:55.128303 ACPI tables: 31872 bytes.
1748 12:40:55.131468 smbios_write_tables: 89afd000
1749 12:40:55.133982 recv_ec_data: 0x01
1750 12:40:55.135877 Create SMBIOS type 17
1751 12:40:55.139241 PCI: 00:14.3 (Intel WiFi)
1752 12:40:55.141556 SMBIOS tables: 708 bytes.
1753 12:40:55.145199 Writing table forward entry at 0x00000500
1754 12:40:55.151382 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1755 12:40:55.155532 Writing coreboot table at 0x89c33000
1756 12:40:55.161508 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1757 12:40:55.165380 1. 0000000000001000-000000000009ffff: RAM
1758 12:40:55.170187 2. 00000000000a0000-00000000000fffff: RESERVED
1759 12:40:55.174307 3. 0000000000100000-0000000089afcfff: RAM
1760 12:40:55.180499 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1761 12:40:55.185179 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1762 12:40:55.191208 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1763 12:40:55.196182 7. 000000008a000000-000000008f7fffff: RESERVED
1764 12:40:55.200530 8. 00000000e0000000-00000000efffffff: RESERVED
1765 12:40:55.204957 9. 00000000fc000000-00000000fc000fff: RESERVED
1766 12:40:55.209898 10. 00000000fe000000-00000000fe00ffff: RESERVED
1767 12:40:55.215040 11. 00000000fed10000-00000000fed17fff: RESERVED
1768 12:40:55.219349 12. 00000000fed80000-00000000fed83fff: RESERVED
1769 12:40:55.224175 13. 00000000feda0000-00000000feda1fff: RESERVED
1770 12:40:55.228400 14. 0000000100000000-000000026e7fffff: RAM
1771 12:40:55.232734 Graphics framebuffer located at 0xc0000000
1772 12:40:55.235567 Passing 6 GPIOs to payload:
1773 12:40:55.240868 NAME | PORT | POLARITY | VALUE
1774 12:40:55.246032 write protect | 0x000000dc | high | high
1775 12:40:55.251207 recovery | 0x000000d5 | low | high
1776 12:40:55.256782 lid | undefined | high | high
1777 12:40:55.262318 power | undefined | high | low
1778 12:40:55.267040 oprom | undefined | high | low
1779 12:40:55.272850 EC in RW | undefined | high | low
1780 12:40:55.275312 recv_ec_data: 0x01
1781 12:40:55.275840 SKU ID: 3
1782 12:40:55.278682 CBFS @ 1d00000 size 300000
1783 12:40:55.285096 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1784 12:40:55.290761 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum bca
1785 12:40:55.294012 coreboot table: 1484 bytes.
1786 12:40:55.297092 IMD ROOT 0. 89fff000 00001000
1787 12:40:55.300331 IMD SMALL 1. 89ffe000 00001000
1788 12:40:55.303752 FSP MEMORY 2. 89d0e000 002f0000
1789 12:40:55.306943 CONSOLE 3. 89cee000 00020000
1790 12:40:55.310029 TIME STAMP 4. 89ced000 00000910
1791 12:40:55.313683 VBOOT WORK 5. 89cea000 00003000
1792 12:40:55.317198 VBOOT 6. 89ce9000 00000c0c
1793 12:40:55.320449 MRC DATA 7. 89ce7000 000018f0
1794 12:40:55.323239 ROMSTG STCK 8. 89ce6000 00000400
1795 12:40:55.327364 AFTER CAR 9. 89cdc000 0000a000
1796 12:40:55.330141 RAMSTAGE 10. 89c80000 0005c000
1797 12:40:55.333955 REFCODE 11. 89c4b000 00035000
1798 12:40:55.336789 SMM BACKUP 12. 89c3b000 00010000
1799 12:40:55.340728 COREBOOT 13. 89c33000 00008000
1800 12:40:55.343874 ACPI 14. 89c0f000 00024000
1801 12:40:55.347102 ACPI GNVS 15. 89c0e000 00001000
1802 12:40:55.349685 RAMOOPS 16. 89b0e000 00100000
1803 12:40:55.353389 TPM2 TCGLOG17. 89afe000 00010000
1804 12:40:55.356309 SMBIOS 18. 89afd000 00000800
1805 12:40:55.358666 IMD small region:
1806 12:40:55.362364 IMD ROOT 0. 89ffec00 00000400
1807 12:40:55.365585 FSP RUNTIME 1. 89ffebe0 00000004
1808 12:40:55.368716 POWER STATE 2. 89ffeba0 00000040
1809 12:40:55.372754 ROMSTAGE 3. 89ffeb80 00000004
1810 12:40:55.375711 MEM INFO 4. 89ffe9c0 000001a9
1811 12:40:55.379243 VPD 5. 89ffe960 00000047
1812 12:40:55.383265 COREBOOTFWD 6. 89ffe920 00000028
1813 12:40:55.386373 MTRR: Physical address space:
1814 12:40:55.392663 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1815 12:40:55.398479 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1816 12:40:55.404975 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1817 12:40:55.411488 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1818 12:40:55.417400 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1819 12:40:55.423217 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1820 12:40:55.429881 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1821 12:40:55.433963 MTRR: Fixed MSR 0x250 0x0606060606060606
1822 12:40:55.438185 MTRR: Fixed MSR 0x258 0x0606060606060606
1823 12:40:55.442254 MTRR: Fixed MSR 0x259 0x0000000000000000
1824 12:40:55.446084 MTRR: Fixed MSR 0x268 0x0606060606060606
1825 12:40:55.450215 MTRR: Fixed MSR 0x269 0x0606060606060606
1826 12:40:55.453961 MTRR: Fixed MSR 0x26a 0x0606060606060606
1827 12:40:55.458111 MTRR: Fixed MSR 0x26b 0x0606060606060606
1828 12:40:55.462716 MTRR: Fixed MSR 0x26c 0x0606060606060606
1829 12:40:55.466316 MTRR: Fixed MSR 0x26d 0x0606060606060606
1830 12:40:55.470175 MTRR: Fixed MSR 0x26e 0x0606060606060606
1831 12:40:55.474988 MTRR: Fixed MSR 0x26f 0x0606060606060606
1832 12:40:55.477925 call enable_fixed_mtrr()
1833 12:40:55.481495 CPU physical address size: 39 bits
1834 12:40:55.485940 MTRR: default type WB/UC MTRR counts: 7/7.
1835 12:40:55.488957 MTRR: UC selected as default type.
1836 12:40:55.495845 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1837 12:40:55.501957 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1838 12:40:55.507909 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1839 12:40:55.514502 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1840 12:40:55.520071 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1841 12:40:55.526556 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1842 12:40:55.532724 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1843 12:40:55.533801
1844 12:40:55.535255 MTRR check
1845 12:40:55.537540 Fixed MTRRs : Enabled
1846 12:40:55.539976 Variable MTRRs: Enabled
1847 12:40:55.540496
1848 12:40:55.543866 MTRR: Fixed MSR 0x250 0x0606060606060606
1849 12:40:55.548229 MTRR: Fixed MSR 0x258 0x0606060606060606
1850 12:40:55.551968 MTRR: Fixed MSR 0x259 0x0000000000000000
1851 12:40:55.556792 MTRR: Fixed MSR 0x268 0x0606060606060606
1852 12:40:55.560835 MTRR: Fixed MSR 0x269 0x0606060606060606
1853 12:40:55.564196 MTRR: Fixed MSR 0x26a 0x0606060606060606
1854 12:40:55.568444 MTRR: Fixed MSR 0x26b 0x0606060606060606
1855 12:40:55.573286 MTRR: Fixed MSR 0x26c 0x0606060606060606
1856 12:40:55.577193 MTRR: Fixed MSR 0x26d 0x0606060606060606
1857 12:40:55.580800 MTRR: Fixed MSR 0x26e 0x0606060606060606
1858 12:40:55.584823 MTRR: Fixed MSR 0x26f 0x0606060606060606
1859 12:40:55.591511 BS: BS_WRITE_TABLES times (us): entry 17194 run 490130 exit 157166
1860 12:40:55.594469 call enable_fixed_mtrr()
1861 12:40:55.597210 CBFS @ 1d00000 size 300000
1862 12:40:55.600875 CPU physical address size: 39 bits
1863 12:40:55.607854 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1864 12:40:55.611760 MTRR: Fixed MSR 0x250 0x0606060606060606
1865 12:40:55.615757 MTRR: Fixed MSR 0x250 0x0606060606060606
1866 12:40:55.619671 MTRR: Fixed MSR 0x258 0x0606060606060606
1867 12:40:55.623442 MTRR: Fixed MSR 0x259 0x0000000000000000
1868 12:40:55.627548 MTRR: Fixed MSR 0x268 0x0606060606060606
1869 12:40:55.631825 MTRR: Fixed MSR 0x269 0x0606060606060606
1870 12:40:55.635982 MTRR: Fixed MSR 0x26a 0x0606060606060606
1871 12:40:55.639744 MTRR: Fixed MSR 0x26b 0x0606060606060606
1872 12:40:55.644522 MTRR: Fixed MSR 0x26c 0x0606060606060606
1873 12:40:55.647749 MTRR: Fixed MSR 0x26d 0x0606060606060606
1874 12:40:55.652256 MTRR: Fixed MSR 0x26e 0x0606060606060606
1875 12:40:55.656591 MTRR: Fixed MSR 0x26f 0x0606060606060606
1876 12:40:55.660772 MTRR: Fixed MSR 0x258 0x0606060606060606
1877 12:40:55.663074 call enable_fixed_mtrr()
1878 12:40:55.667393 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 12:40:55.671674 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 12:40:55.675387 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 12:40:55.679615 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 12:40:55.683743 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 12:40:55.687574 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 12:40:55.691529 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 12:40:55.696218 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 12:40:55.699818 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 12:40:55.703978 CPU physical address size: 39 bits
1888 12:40:55.707039 call enable_fixed_mtrr()
1889 12:40:55.711213 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 12:40:55.714458 MTRR: Fixed MSR 0x250 0x0606060606060606
1891 12:40:55.718973 MTRR: Fixed MSR 0x258 0x0606060606060606
1892 12:40:55.722760 MTRR: Fixed MSR 0x259 0x0000000000000000
1893 12:40:55.727016 MTRR: Fixed MSR 0x268 0x0606060606060606
1894 12:40:55.731782 MTRR: Fixed MSR 0x269 0x0606060606060606
1895 12:40:55.735163 MTRR: Fixed MSR 0x26a 0x0606060606060606
1896 12:40:55.739501 MTRR: Fixed MSR 0x26b 0x0606060606060606
1897 12:40:55.743317 MTRR: Fixed MSR 0x26c 0x0606060606060606
1898 12:40:55.747669 MTRR: Fixed MSR 0x26d 0x0606060606060606
1899 12:40:55.751409 MTRR: Fixed MSR 0x26e 0x0606060606060606
1900 12:40:55.755501 MTRR: Fixed MSR 0x26f 0x0606060606060606
1901 12:40:55.760614 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 12:40:55.762346 call enable_fixed_mtrr()
1903 12:40:55.767182 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 12:40:55.771100 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 12:40:55.774681 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 12:40:55.779262 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 12:40:55.782688 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 12:40:55.787209 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 12:40:55.791405 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 12:40:55.795240 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 12:40:55.799567 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 12:40:55.803491 CPU physical address size: 39 bits
1913 12:40:55.805932 call enable_fixed_mtrr()
1914 12:40:55.809977 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 12:40:55.814486 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 12:40:55.818247 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 12:40:55.822275 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 12:40:55.826599 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 12:40:55.830782 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 12:40:55.834625 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 12:40:55.838700 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 12:40:55.842901 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 12:40:55.846570 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 12:40:55.850831 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 12:40:55.855654 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 12:40:55.859210 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 12:40:55.861980 call enable_fixed_mtrr()
1928 12:40:55.866076 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 12:40:55.870239 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 12:40:55.874257 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 12:40:55.878429 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 12:40:55.882316 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 12:40:55.886272 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 12:40:55.890502 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 12:40:55.894581 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 12:40:55.899160 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 12:40:55.902319 CPU physical address size: 39 bits
1938 12:40:55.905576 call enable_fixed_mtrr()
1939 12:40:55.909355 CBFS: Locating 'fallback/payload'
1940 12:40:55.912547 CPU physical address size: 39 bits
1941 12:40:55.915530 CPU physical address size: 39 bits
1942 12:40:55.919733 CPU physical address size: 39 bits
1943 12:40:55.923514 CBFS: Found @ offset 1cf4c0 size 3a954
1944 12:40:55.928006 Checking segment from ROM address 0xffecf4f8
1945 12:40:55.932083 Checking segment from ROM address 0xffecf514
1946 12:40:55.936590 Loading segment from ROM address 0xffecf4f8
1947 12:40:55.938640 code (compression=0)
1948 12:40:55.947998 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1949 12:40:55.956363 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1950 12:40:55.958692 it's not compressed!
1951 12:40:56.040111 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1952 12:40:56.046565 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1953 12:40:56.054671 Loading segment from ROM address 0xffecf514
1954 12:40:56.057264 Entry Point 0x30100018
1955 12:40:56.058929 Loaded segments
1956 12:40:56.068549 Finalizing chipset.
1957 12:40:56.070275 Finalizing SMM.
1958 12:40:56.076505 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466910 exit 11541
1959 12:40:56.079777 mp_park_aps done after 0 msecs.
1960 12:40:56.083765 Jumping to boot code at 30100018(89c33000)
1961 12:40:56.093312 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1962 12:40:56.093445
1963 12:40:56.093560
1964 12:40:56.093666
1965 12:40:56.096298 Starting depthcharge on sarien...
1966 12:40:56.097244 end: 2.2.3 depthcharge-start (duration 00:00:12) [common]
1967 12:40:56.097415 start: 2.2.4 bootloader-commands (timeout 00:04:31) [common]
1968 12:40:56.097558 Setting prompt string to ['sarien:']
1969 12:40:56.097699 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:31)
1970 12:40:56.097952
1971 12:40:56.104474 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1972 12:40:56.104561
1973 12:40:56.111583 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1974 12:40:56.112062
1975 12:40:56.119576 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1976 12:40:56.119702
1977 12:40:56.121267 BIOS MMAP details:
1978 12:40:56.121856
1979 12:40:56.124519 IFD Base Offset : 0x1000000
1980 12:40:56.125305
1981 12:40:56.126984 IFD End Offset : 0x2000000
1982 12:40:56.127923
1983 12:40:56.130560 MMAP Size : 0x1000000
1984 12:40:56.130638
1985 12:40:56.133350 MMAP Start : 0xff000000
1986 12:40:56.135566
1987 12:40:56.142255 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1988 12:40:56.146111
1989 12:40:56.150386 New NVMe Controller 0x3214e110 @ 00:1d:04
1990 12:40:56.150672
1991 12:40:56.154859 New NVMe Controller 0x3214e1d8 @ 00:1d:00
1992 12:40:56.155490
1993 12:40:56.160775 The GBB signature is at 0x30000014 and is: 24 47 42 42
1994 12:40:56.164790
1995 12:40:56.166250 Wipe memory regions:
1996 12:40:56.167459
1997 12:40:56.170523 [0x00000000001000, 0x000000000a0000)
1998 12:40:56.170634
1999 12:40:56.174332 [0x00000000100000, 0x00000030000000)
2000 12:40:56.256620
2001 12:40:56.260364 [0x00000032751910, 0x00000089afd000)
2002 12:40:56.410002
2003 12:40:56.413705 [0x00000100000000, 0x0000026e800000)
2004 12:40:57.423535
2005 12:40:57.426413 R8152: Initializing
2006 12:40:57.426512
2007 12:40:57.429303 Version 6 (ocp_data = 5c30)
2008 12:40:57.429628
2009 12:40:57.432216 R8152: Done initializing
2010 12:40:57.432323
2011 12:40:57.434067 Adding net device
2012 12:40:57.434624
2013 12:40:57.440003 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2014 12:40:57.440436
2015 12:40:57.440534
2016 12:40:57.440624
2017 12:40:57.441921 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2019 12:40:57.542259 sarien: tftpboot 192.168.201.1 11383474/tftp-deploy-oez50qux/kernel/bzImage 11383474/tftp-deploy-oez50qux/kernel/cmdline 11383474/tftp-deploy-oez50qux/ramdisk/ramdisk.cpio.gz
2020 12:40:57.542487 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2021 12:40:57.542635 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:30)
2022 12:40:57.585836 tftpboot 192.168.201.1 11383474/tftp-deploy-oez50qux/kernel/bzImage 11383474/tftp-deploy-oez50qux/kernel/cmdline 11383474/tftp-deploy-oez50qux/ramdisk/ramdisk.cpio.gz
2023 12:40:57.586008
2024 12:40:57.586329 Waiting for link
2025 12:40:57.745498
2026 12:40:57.745892 done.
2027 12:40:57.746020
2028 12:40:57.748260 MAC: 00:24:32:30:7c:12
2029 12:40:57.748576
2030 12:40:57.751538 Sending DHCP discover... done.
2031 12:40:57.751664
2032 12:40:57.754239 Waiting for reply... done.
2033 12:40:57.754365
2034 12:40:57.757100 Sending DHCP request... done.
2035 12:40:57.757704
2036 12:40:57.761981 Waiting for reply... done.
2037 12:40:57.762608
2038 12:40:57.764725 My ip is 192.168.201.190
2039 12:40:57.764846
2040 12:40:57.768259 The DHCP server ip is 192.168.201.1
2041 12:40:57.768388
2042 12:40:57.772879 TFTP server IP predefined by user: 192.168.201.1
2043 12:40:57.773171
2044 12:40:57.780533 Bootfile predefined by user: 11383474/tftp-deploy-oez50qux/kernel/bzImage
2045 12:40:57.780660
2046 12:40:57.784117 Sending tftp read request... done.
2047 12:40:57.784243
2048 12:40:57.787665 Waiting for the transfer...
2049 12:40:57.788347
2050 12:40:58.304465 00000000 ################################################################
2051 12:40:58.304987
2052 12:40:58.819827 00080000 ################################################################
2053 12:40:58.820217
2054 12:40:59.344025 00100000 ################################################################
2055 12:40:59.344157
2056 12:40:59.905661 00180000 ################################################################
2057 12:40:59.905906
2058 12:41:00.451694 00200000 ################################################################
2059 12:41:00.452863
2060 12:41:00.979999 00280000 ################################################################
2061 12:41:00.980593
2062 12:41:01.531064 00300000 ################################################################
2063 12:41:01.531202
2064 12:41:02.096950 00380000 ################################################################
2065 12:41:02.097474
2066 12:41:02.647503 00400000 ################################################################
2067 12:41:02.647910
2068 12:41:03.213360 00480000 ################################################################
2069 12:41:03.213838
2070 12:41:03.770444 00500000 ################################################################
2071 12:41:03.770820
2072 12:41:04.337337 00580000 ################################################################
2073 12:41:04.338020
2074 12:41:04.893354 00600000 ################################################################
2075 12:41:04.893514
2076 12:41:05.446748 00680000 ################################################################
2077 12:41:05.447244
2078 12:41:05.999844 00700000 ################################################################
2079 12:41:06.000196
2080 12:41:06.555466 00780000 ################################################################
2081 12:41:06.555909
2082 12:41:06.664363 00800000 ############# done.
2083 12:41:06.665060
2084 12:41:06.668982 The bootfile was 8490896 bytes long.
2085 12:41:06.669092
2086 12:41:06.671933 Sending tftp read request... done.
2087 12:41:06.672017
2088 12:41:06.674949 Waiting for the transfer...
2089 12:41:06.675064
2090 12:41:07.231050 00000000 ################################################################
2091 12:41:07.231528
2092 12:41:07.780254 00080000 ################################################################
2093 12:41:07.780614
2094 12:41:08.344451 00100000 ################################################################
2095 12:41:08.345395
2096 12:41:08.915799 00180000 ################################################################
2097 12:41:08.915959
2098 12:41:09.466385 00200000 ################################################################
2099 12:41:09.466855
2100 12:41:10.023031 00280000 ################################################################
2101 12:41:10.023877
2102 12:41:10.563898 00300000 ################################################################
2103 12:41:10.564400
2104 12:41:11.106541 00380000 ################################################################
2105 12:41:11.107325
2106 12:41:11.650721 00400000 ################################################################
2107 12:41:11.651095
2108 12:41:12.204858 00480000 ################################################################
2109 12:41:12.205264
2110 12:41:12.753348 00500000 ################################################################
2111 12:41:12.754106
2112 12:41:13.312093 00580000 ################################################################
2113 12:41:13.312237
2114 12:41:13.868782 00600000 ################################################################
2115 12:41:13.869413
2116 12:41:14.440418 00680000 ################################################################
2117 12:41:14.440954
2118 12:41:14.980846 00700000 ################################################################
2119 12:41:14.981392
2120 12:41:15.556859 00780000 ################################################################
2121 12:41:15.557255
2122 12:41:16.010618 00800000 ##################################################### done.
2123 12:41:16.010766
2124 12:41:16.013952 Sending tftp read request... done.
2125 12:41:16.014055
2126 12:41:16.016842 Waiting for the transfer...
2127 12:41:16.017175
2128 12:41:16.018934 00000000 # done.
2129 12:41:16.019034
2130 12:41:16.027912 Command line loaded dynamically from TFTP file: 11383474/tftp-deploy-oez50qux/kernel/cmdline
2131 12:41:16.028024
2132 12:41:16.047355 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2133 12:41:16.051331
2134 12:41:16.054961 Shutting down all USB controllers.
2135 12:41:16.055792
2136 12:41:16.057889 Removing current net device
2137 12:41:16.058941
2138 12:41:16.062042 EC: exit firmware mode
2139 12:41:16.062795
2140 12:41:16.064512 Finalizing coreboot
2141 12:41:16.065606
2142 12:41:16.071351 Exiting depthcharge with code 4 at timestamp: 27538568
2143 12:41:16.072044
2144 12:41:16.072151
2145 12:41:16.073508 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2146 12:41:16.073633 start: 2.2.5 auto-login-action (timeout 00:04:11) [common]
2147 12:41:16.073736 Setting prompt string to ['Linux version [0-9]']
2148 12:41:16.073854 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2149 12:41:16.073924 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2150 12:41:16.074336 Starting kernel ...
2151 12:41:16.074424
2152 12:41:16.074489
2154 12:45:27.073889 end: 2.2.5 auto-login-action (duration 00:04:11) [common]
2156 12:45:27.074099 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 251 seconds'
2158 12:45:27.074259 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2161 12:45:27.074511 end: 2 depthcharge-action (duration 00:05:00) [common]
2163 12:45:27.074733 Cleaning after the job
2164 12:45:27.074826 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383474/tftp-deploy-oez50qux/ramdisk
2165 12:45:27.076155 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383474/tftp-deploy-oez50qux/kernel
2166 12:45:27.077482 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383474/tftp-deploy-oez50qux/modules
2167 12:45:27.077868 start: 5.1 power-off (timeout 00:00:30) [common]
2168 12:45:27.078036 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-2' '--port=1' '--command=off'
2169 12:45:32.216645 >> Command sent successfully.
2170 12:45:32.219073 Returned 0 in 5 seconds
2171 12:45:32.319465 end: 5.1 power-off (duration 00:00:05) [common]
2173 12:45:32.319784 start: 5.2 read-feedback (timeout 00:09:55) [common]
2174 12:45:32.320047 Listened to connection for namespace 'common' for up to 1s
2175 12:45:33.321003 Finalising connection for namespace 'common'
2176 12:45:33.321188 Disconnecting from shell: Finalise
2177 12:45:33.321271
2178 12:45:33.421598 end: 5.2 read-feedback (duration 00:00:01) [common]
2179 12:45:33.421736 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11383474
2180 12:45:33.438420 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11383474
2181 12:45:33.438573 JobError: Your job cannot terminate cleanly.