Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 12:41:29.520708 lava-dispatcher, installed at version: 2023.06
2 12:41:29.520939 start: 0 validate
3 12:41:29.521080 Start time: 2023-08-30 12:41:29.521071+00:00 (UTC)
4 12:41:29.521223 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:41:29.521381 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:41:29.791168 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:41:29.792020 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:41:34.802548 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:41:34.803266 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:41:35.072311 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:41:35.073001 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:41:35.577935 validate duration: 6.06
14 12:41:35.578207 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:41:35.578304 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:41:35.578390 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:41:35.578516 Not decompressing ramdisk as can be used compressed.
18 12:41:35.578601 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 12:41:35.578664 saving as /var/lib/lava/dispatcher/tmp/11383487/tftp-deploy-ppacpx61/ramdisk/initrd.cpio.gz
20 12:41:35.578728 total size: 5432690 (5 MB)
21 12:41:35.579791 progress 0 % (0 MB)
22 12:41:35.581451 progress 5 % (0 MB)
23 12:41:35.582947 progress 10 % (0 MB)
24 12:41:35.584422 progress 15 % (0 MB)
25 12:41:35.586116 progress 20 % (1 MB)
26 12:41:35.587528 progress 25 % (1 MB)
27 12:41:35.588966 progress 30 % (1 MB)
28 12:41:35.590530 progress 35 % (1 MB)
29 12:41:35.591968 progress 40 % (2 MB)
30 12:41:35.593367 progress 45 % (2 MB)
31 12:41:35.594771 progress 50 % (2 MB)
32 12:41:35.596382 progress 55 % (2 MB)
33 12:41:35.597784 progress 60 % (3 MB)
34 12:41:35.599179 progress 65 % (3 MB)
35 12:41:35.600780 progress 70 % (3 MB)
36 12:41:35.602174 progress 75 % (3 MB)
37 12:41:35.603565 progress 80 % (4 MB)
38 12:41:35.605004 progress 85 % (4 MB)
39 12:41:35.606560 progress 90 % (4 MB)
40 12:41:35.608058 progress 95 % (4 MB)
41 12:41:35.609536 progress 100 % (5 MB)
42 12:41:35.609756 5 MB downloaded in 0.03 s (166.98 MB/s)
43 12:41:35.609919 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:41:35.610159 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:41:35.610246 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:41:35.610329 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:41:35.610463 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:41:35.610537 saving as /var/lib/lava/dispatcher/tmp/11383487/tftp-deploy-ppacpx61/kernel/bzImage
50 12:41:35.610597 total size: 8490896 (8 MB)
51 12:41:35.610690 No compression specified
52 12:41:35.611822 progress 0 % (0 MB)
53 12:41:35.614054 progress 5 % (0 MB)
54 12:41:35.616509 progress 10 % (0 MB)
55 12:41:35.618892 progress 15 % (1 MB)
56 12:41:35.621212 progress 20 % (1 MB)
57 12:41:35.623524 progress 25 % (2 MB)
58 12:41:35.625905 progress 30 % (2 MB)
59 12:41:35.628214 progress 35 % (2 MB)
60 12:41:35.630499 progress 40 % (3 MB)
61 12:41:35.632809 progress 45 % (3 MB)
62 12:41:35.635056 progress 50 % (4 MB)
63 12:41:35.637344 progress 55 % (4 MB)
64 12:41:35.639625 progress 60 % (4 MB)
65 12:41:35.641890 progress 65 % (5 MB)
66 12:41:35.644205 progress 70 % (5 MB)
67 12:41:35.646472 progress 75 % (6 MB)
68 12:41:35.648776 progress 80 % (6 MB)
69 12:41:35.651028 progress 85 % (6 MB)
70 12:41:35.653347 progress 90 % (7 MB)
71 12:41:35.655784 progress 95 % (7 MB)
72 12:41:35.658055 progress 100 % (8 MB)
73 12:41:35.658186 8 MB downloaded in 0.05 s (170.17 MB/s)
74 12:41:35.658336 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:41:35.658605 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:41:35.658691 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:41:35.658778 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:41:35.658943 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 12:41:35.659025 saving as /var/lib/lava/dispatcher/tmp/11383487/tftp-deploy-ppacpx61/nfsrootfs/full.rootfs.tar
81 12:41:35.659087 total size: 133380384 (127 MB)
82 12:41:35.659150 Using unxz to decompress xz
83 12:41:35.663725 progress 0 % (0 MB)
84 12:41:36.005946 progress 5 % (6 MB)
85 12:41:36.358618 progress 10 % (12 MB)
86 12:41:36.653408 progress 15 % (19 MB)
87 12:41:36.847208 progress 20 % (25 MB)
88 12:41:37.099170 progress 25 % (31 MB)
89 12:41:37.445474 progress 30 % (38 MB)
90 12:41:37.786614 progress 35 % (44 MB)
91 12:41:38.186499 progress 40 % (50 MB)
92 12:41:38.570601 progress 45 % (57 MB)
93 12:41:38.929236 progress 50 % (63 MB)
94 12:41:39.302007 progress 55 % (69 MB)
95 12:41:39.661768 progress 60 % (76 MB)
96 12:41:40.023757 progress 65 % (82 MB)
97 12:41:40.387532 progress 70 % (89 MB)
98 12:41:40.752349 progress 75 % (95 MB)
99 12:41:41.189202 progress 80 % (101 MB)
100 12:41:41.617624 progress 85 % (108 MB)
101 12:41:41.888627 progress 90 % (114 MB)
102 12:41:42.237694 progress 95 % (120 MB)
103 12:41:42.631405 progress 100 % (127 MB)
104 12:41:42.636792 127 MB downloaded in 6.98 s (18.23 MB/s)
105 12:41:42.637047 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:41:42.637310 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:41:42.637399 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:41:42.637484 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:41:42.637636 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:41:42.637708 saving as /var/lib/lava/dispatcher/tmp/11383487/tftp-deploy-ppacpx61/modules/modules.tar
112 12:41:42.637768 total size: 250888 (0 MB)
113 12:41:42.637830 Using unxz to decompress xz
114 12:41:42.641884 progress 13 % (0 MB)
115 12:41:42.642295 progress 26 % (0 MB)
116 12:41:42.642527 progress 39 % (0 MB)
117 12:41:42.644131 progress 52 % (0 MB)
118 12:41:42.645976 progress 65 % (0 MB)
119 12:41:42.647951 progress 78 % (0 MB)
120 12:41:42.649797 progress 91 % (0 MB)
121 12:41:42.651512 progress 100 % (0 MB)
122 12:41:42.657067 0 MB downloaded in 0.02 s (12.40 MB/s)
123 12:41:42.657305 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:41:42.657566 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:41:42.657658 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 12:41:42.657754 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 12:41:44.854863 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11383487/extract-nfsrootfs-6lxd_6l0
129 12:41:44.855058 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 12:41:44.855154 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 12:41:44.855313 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb
132 12:41:44.855443 makedir: /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin
133 12:41:44.855545 makedir: /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/tests
134 12:41:44.855794 makedir: /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/results
135 12:41:44.855897 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-add-keys
136 12:41:44.856040 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-add-sources
137 12:41:44.856170 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-background-process-start
138 12:41:44.856298 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-background-process-stop
139 12:41:44.856425 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-common-functions
140 12:41:44.856550 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-echo-ipv4
141 12:41:44.856675 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-install-packages
142 12:41:44.856799 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-installed-packages
143 12:41:44.856923 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-os-build
144 12:41:44.857048 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-probe-channel
145 12:41:44.857171 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-probe-ip
146 12:41:44.857295 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-target-ip
147 12:41:44.857419 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-target-mac
148 12:41:44.857543 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-target-storage
149 12:41:44.857669 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-test-case
150 12:41:44.857796 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-test-event
151 12:41:44.857919 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-test-feedback
152 12:41:44.858044 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-test-raise
153 12:41:44.858167 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-test-reference
154 12:41:44.858292 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-test-runner
155 12:41:44.858414 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-test-set
156 12:41:44.858536 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-test-shell
157 12:41:44.858661 Updating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-install-packages (oe)
158 12:41:44.858813 Updating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/bin/lava-installed-packages (oe)
159 12:41:44.858934 Creating /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/environment
160 12:41:44.859027 LAVA metadata
161 12:41:44.859095 - LAVA_JOB_ID=11383487
162 12:41:44.859157 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:41:44.859254 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 12:41:44.859318 skipped lava-vland-overlay
165 12:41:44.859390 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:41:44.859469 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 12:41:44.859529 skipped lava-multinode-overlay
168 12:41:44.859603 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:41:44.859738 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 12:41:44.859810 Loading test definitions
171 12:41:44.859897 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 12:41:44.859964 Using /lava-11383487 at stage 0
173 12:41:44.860269 uuid=11383487_1.5.2.3.1 testdef=None
174 12:41:44.860357 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 12:41:44.860440 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 12:41:44.860937 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 12:41:44.861149 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 12:41:44.861783 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 12:41:44.862007 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 12:41:44.862614 runner path: /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/0/tests/0_dmesg test_uuid 11383487_1.5.2.3.1
183 12:41:44.862767 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 12:41:44.862985 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 12:41:44.863054 Using /lava-11383487 at stage 1
187 12:41:44.863374 uuid=11383487_1.5.2.3.5 testdef=None
188 12:41:44.863460 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 12:41:44.863543 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 12:41:44.864075 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 12:41:44.864287 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 12:41:44.864913 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 12:41:44.865136 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 12:41:44.865750 runner path: /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/1/tests/1_bootrr test_uuid 11383487_1.5.2.3.5
197 12:41:44.865901 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 12:41:44.866100 Creating lava-test-runner.conf files
200 12:41:44.866162 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/0 for stage 0
201 12:41:44.866250 - 0_dmesg
202 12:41:44.866327 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383487/lava-overlay-n9a128jb/lava-11383487/1 for stage 1
203 12:41:44.866417 - 1_bootrr
204 12:41:44.866511 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 12:41:44.866594 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 12:41:44.873858 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 12:41:44.873956 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 12:41:44.874039 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 12:41:44.874120 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 12:41:44.874202 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 12:41:45.010459 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 12:41:45.010846 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
213 12:41:45.010965 extracting modules file /var/lib/lava/dispatcher/tmp/11383487/tftp-deploy-ppacpx61/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11383487/extract-nfsrootfs-6lxd_6l0
214 12:41:45.024521 extracting modules file /var/lib/lava/dispatcher/tmp/11383487/tftp-deploy-ppacpx61/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11383487/extract-overlay-ramdisk-0qszin2v/ramdisk
215 12:41:45.038014 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 12:41:45.038138 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
217 12:41:45.038226 [common] Applying overlay to NFS
218 12:41:45.038298 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383487/compress-overlay-q6i8u_yt/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11383487/extract-nfsrootfs-6lxd_6l0
219 12:41:45.046389 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 12:41:45.046501 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
221 12:41:45.046594 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 12:41:45.046682 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
223 12:41:45.046757 Building ramdisk /var/lib/lava/dispatcher/tmp/11383487/extract-overlay-ramdisk-0qszin2v/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11383487/extract-overlay-ramdisk-0qszin2v/ramdisk
224 12:41:45.116166 >> 26159 blocks
225 12:41:45.644682 rename /var/lib/lava/dispatcher/tmp/11383487/extract-overlay-ramdisk-0qszin2v/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11383487/tftp-deploy-ppacpx61/ramdisk/ramdisk.cpio.gz
226 12:41:45.645137 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 12:41:45.645264 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 12:41:45.645363 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 12:41:45.645462 No mkimage arch provided, not using FIT.
230 12:41:45.645552 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 12:41:45.645638 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 12:41:45.645740 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 12:41:45.645829 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 12:41:45.645911 No LXC device requested
235 12:41:45.645989 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 12:41:45.646069 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 12:41:45.646147 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 12:41:45.646217 Checking files for TFTP limit of 4294967296 bytes.
239 12:41:45.646619 end: 1 tftp-deploy (duration 00:00:10) [common]
240 12:41:45.646723 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 12:41:45.646812 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 12:41:45.646937 substitutions:
243 12:41:45.647002 - {DTB}: None
244 12:41:45.647063 - {INITRD}: 11383487/tftp-deploy-ppacpx61/ramdisk/ramdisk.cpio.gz
245 12:41:45.647121 - {KERNEL}: 11383487/tftp-deploy-ppacpx61/kernel/bzImage
246 12:41:45.647176 - {LAVA_MAC}: None
247 12:41:45.647231 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11383487/extract-nfsrootfs-6lxd_6l0
248 12:41:45.647289 - {NFS_SERVER_IP}: 192.168.201.1
249 12:41:45.647342 - {PRESEED_CONFIG}: None
250 12:41:45.647395 - {PRESEED_LOCAL}: None
251 12:41:45.647447 - {RAMDISK}: 11383487/tftp-deploy-ppacpx61/ramdisk/ramdisk.cpio.gz
252 12:41:45.647500 - {ROOT_PART}: None
253 12:41:45.647552 - {ROOT}: None
254 12:41:45.647613 - {SERVER_IP}: 192.168.201.1
255 12:41:45.647704 - {TEE}: None
256 12:41:45.647758 Parsed boot commands:
257 12:41:45.647810 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 12:41:45.647988 Parsed boot commands: tftpboot 192.168.201.1 11383487/tftp-deploy-ppacpx61/kernel/bzImage 11383487/tftp-deploy-ppacpx61/kernel/cmdline 11383487/tftp-deploy-ppacpx61/ramdisk/ramdisk.cpio.gz
259 12:41:45.648080 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 12:41:45.648166 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 12:41:45.648260 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 12:41:45.648348 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 12:41:45.648416 Not connected, no need to disconnect.
264 12:41:45.648490 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 12:41:45.648571 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 12:41:45.648636 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
267 12:41:45.652614 Setting prompt string to ['lava-test: # ']
268 12:41:45.652967 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 12:41:45.653076 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 12:41:45.653174 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 12:41:45.653265 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 12:41:45.653457 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
273 12:41:50.799885 >> Command sent successfully.
274 12:41:50.811377 Returned 0 in 5 seconds
275 12:41:50.912703 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 12:41:50.914144 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 12:41:50.914687 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 12:41:50.915145 Setting prompt string to 'Starting depthcharge on Helios...'
280 12:41:50.915502 Changing prompt to 'Starting depthcharge on Helios...'
281 12:41:50.915946 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 12:41:50.917610 [Enter `^Ec?' for help]
283 12:41:51.524111
284 12:41:51.524652
285 12:41:51.534733 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 12:41:51.537955 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 12:41:51.544369 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 12:41:51.547822 CPU: AES supported, TXT NOT supported, VT supported
289 12:41:51.555020 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 12:41:51.557904 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 12:41:51.564905 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 12:41:51.568000 VBOOT: Loading verstage.
293 12:41:51.571353 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 12:41:51.578119 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 12:41:51.581503 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 12:41:51.584701 CBFS @ c08000 size 3f8000
297 12:41:51.591072 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 12:41:51.594214 CBFS: Locating 'fallback/verstage'
299 12:41:51.597591 CBFS: Found @ offset 10fb80 size 1072c
300 12:41:51.598129
301 12:41:51.601389
302 12:41:51.610890 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 12:41:51.625259 Probing TPM: . done!
304 12:41:51.628271 TPM ready after 0 ms
305 12:41:51.631516 Connected to device vid:did:rid of 1ae0:0028:00
306 12:41:51.642089 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 12:41:51.645530 Initialized TPM device CR50 revision 0
308 12:41:51.690448 tlcl_send_startup: Startup return code is 0
309 12:41:51.691002 TPM: setup succeeded
310 12:41:51.702908 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 12:41:51.706418 Chrome EC: UHEPI supported
312 12:41:51.709739 Phase 1
313 12:41:51.713229 FMAP: area GBB found @ c05000 (12288 bytes)
314 12:41:51.719653 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 12:41:51.720194 Phase 2
316 12:41:51.723141 Phase 3
317 12:41:51.726675 FMAP: area GBB found @ c05000 (12288 bytes)
318 12:41:51.733279 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 12:41:51.739696 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 12:41:51.742818 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
321 12:41:51.749781 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 12:41:51.765475 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 12:41:51.768464 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
324 12:41:51.775103 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 12:41:51.779065 Phase 4
326 12:41:51.782346 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
327 12:41:51.789131 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 12:41:51.969084 VB2:vb2_rsa_verify_digest() Digest check failed!
329 12:41:51.975654 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 12:41:51.976159 Saving nvdata
331 12:41:51.979169 Reboot requested (10020007)
332 12:41:51.981889 board_reset() called!
333 12:41:51.982313 full_reset() called!
334 12:41:56.491856
335 12:41:56.492444
336 12:41:56.501140 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 12:41:56.504913 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 12:41:56.511282 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 12:41:56.515065 CPU: AES supported, TXT NOT supported, VT supported
340 12:41:56.521409 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 12:41:56.525018 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 12:41:56.531076 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 12:41:56.535222 VBOOT: Loading verstage.
344 12:41:56.537992 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 12:41:56.544544 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 12:41:56.547898 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 12:41:56.551178 CBFS @ c08000 size 3f8000
348 12:41:56.557660 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 12:41:56.561272 CBFS: Locating 'fallback/verstage'
350 12:41:56.564555 CBFS: Found @ offset 10fb80 size 1072c
351 12:41:56.567773
352 12:41:56.568203
353 12:41:56.578252 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 12:41:56.592433 Probing TPM: . done!
355 12:41:56.595686 TPM ready after 0 ms
356 12:41:56.598692 Connected to device vid:did:rid of 1ae0:0028:00
357 12:41:56.609091 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 12:41:56.612615 Initialized TPM device CR50 revision 0
359 12:41:56.657114 tlcl_send_startup: Startup return code is 0
360 12:41:56.657830 TPM: setup succeeded
361 12:41:56.670351 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 12:41:56.673480 Chrome EC: UHEPI supported
363 12:41:56.676741 Phase 1
364 12:41:56.679971 FMAP: area GBB found @ c05000 (12288 bytes)
365 12:41:56.686623 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 12:41:56.693748 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 12:41:56.696590 Recovery requested (1009000e)
368 12:41:56.702424 Saving nvdata
369 12:41:56.708371 tlcl_extend: response is 0
370 12:41:56.717652 tlcl_extend: response is 0
371 12:41:56.724408 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 12:41:56.727912 CBFS @ c08000 size 3f8000
373 12:41:56.734181 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 12:41:56.737690 CBFS: Locating 'fallback/romstage'
375 12:41:56.740993 CBFS: Found @ offset 80 size 145fc
376 12:41:56.744251 Accumulated console time in verstage 98 ms
377 12:41:56.744677
378 12:41:56.745011
379 12:41:56.757395 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 12:41:56.764002 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 12:41:56.767148 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 12:41:56.770587 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 12:41:56.777497 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 12:41:56.780278 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 12:41:56.783702 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 12:41:56.786855 TCO_STS: 0000 0000
387 12:41:56.790658 GEN_PMCON: e0015238 00000200
388 12:41:56.793709 GBLRST_CAUSE: 00000000 00000000
389 12:41:56.793791 prev_sleep_state 5
390 12:41:56.796958 Boot Count incremented to 63109
391 12:41:56.803712 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 12:41:56.806687 CBFS @ c08000 size 3f8000
393 12:41:56.813468 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 12:41:56.813552 CBFS: Locating 'fspm.bin'
395 12:41:56.819954 CBFS: Found @ offset 5ffc0 size 71000
396 12:41:56.823577 Chrome EC: UHEPI supported
397 12:41:56.829842 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 12:41:56.833230 Probing TPM: done!
399 12:41:56.840062 Connected to device vid:did:rid of 1ae0:0028:00
400 12:41:56.849912 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 12:41:56.855908 Initialized TPM device CR50 revision 0
402 12:41:56.864854 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 12:41:56.871382 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 12:41:56.874637 MRC cache found, size 1948
405 12:41:56.878388 bootmode is set to: 2
406 12:41:56.881466 PRMRR disabled by config.
407 12:41:56.881549 SPD INDEX = 1
408 12:41:56.888339 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 12:41:56.891629 CBFS @ c08000 size 3f8000
410 12:41:56.898023 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 12:41:56.898107 CBFS: Locating 'spd.bin'
412 12:41:56.901588 CBFS: Found @ offset 5fb80 size 400
413 12:41:56.905076 SPD: module type is LPDDR3
414 12:41:56.907884 SPD: module part is
415 12:41:56.914445 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 12:41:56.917742 SPD: device width 4 bits, bus width 8 bits
417 12:41:56.921121 SPD: module size is 4096 MB (per channel)
418 12:41:56.924378 memory slot: 0 configuration done.
419 12:41:56.927816 memory slot: 2 configuration done.
420 12:41:56.978717 CBMEM:
421 12:41:56.982128 IMD: root @ 99fff000 254 entries.
422 12:41:56.985366 IMD: root @ 99ffec00 62 entries.
423 12:41:56.988761 External stage cache:
424 12:41:56.992510 IMD: root @ 9abff000 254 entries.
425 12:41:56.995620 IMD: root @ 9abfec00 62 entries.
426 12:41:56.998584 Chrome EC: clear events_b mask to 0x0000000020004000
427 12:41:57.015022 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 12:41:57.027480 tlcl_write: response is 0
429 12:41:57.036901 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 12:41:57.043674 MRC: TPM MRC hash updated successfully.
431 12:41:57.043759 2 DIMMs found
432 12:41:57.046568 SMM Memory Map
433 12:41:57.050060 SMRAM : 0x9a000000 0x1000000
434 12:41:57.053458 Subregion 0: 0x9a000000 0xa00000
435 12:41:57.056798 Subregion 1: 0x9aa00000 0x200000
436 12:41:57.060245 Subregion 2: 0x9ac00000 0x400000
437 12:41:57.063770 top_of_ram = 0x9a000000
438 12:41:57.066530 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 12:41:57.073127 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 12:41:57.076796 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 12:41:57.083243 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 12:41:57.086764 CBFS @ c08000 size 3f8000
443 12:41:57.089930 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 12:41:57.093222 CBFS: Locating 'fallback/postcar'
445 12:41:57.096867 CBFS: Found @ offset 107000 size 4b44
446 12:41:57.103052 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 12:41:57.115875 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 12:41:57.119426 Processing 180 relocs. Offset value of 0x97c0c000
449 12:41:57.127379 Accumulated console time in romstage 285 ms
450 12:41:57.127480
451 12:41:57.127578
452 12:41:57.137875 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 12:41:57.144100 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 12:41:57.147155 CBFS @ c08000 size 3f8000
455 12:41:57.150859 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 12:41:57.157398 CBFS: Locating 'fallback/ramstage'
457 12:41:57.160575 CBFS: Found @ offset 43380 size 1b9e8
458 12:41:57.167215 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 12:41:57.199136 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 12:41:57.202282 Processing 3976 relocs. Offset value of 0x98db0000
461 12:41:57.209164 Accumulated console time in postcar 52 ms
462 12:41:57.209284
463 12:41:57.209380
464 12:41:57.219381 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 12:41:57.225652 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 12:41:57.229428 WARNING: RO_VPD is uninitialized or empty.
467 12:41:57.232204 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 12:41:57.239160 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 12:41:57.239244 Normal boot.
470 12:41:57.245413 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 12:41:57.248715 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 12:41:57.252571 CBFS @ c08000 size 3f8000
473 12:41:57.258863 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 12:41:57.262373 CBFS: Locating 'cpu_microcode_blob.bin'
475 12:41:57.265410 CBFS: Found @ offset 14700 size 2ec00
476 12:41:57.269018 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 12:41:57.272735 Skip microcode update
478 12:41:57.278868 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 12:41:57.278952 CBFS @ c08000 size 3f8000
480 12:41:57.285170 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 12:41:57.288605 CBFS: Locating 'fsps.bin'
482 12:41:57.291652 CBFS: Found @ offset d1fc0 size 35000
483 12:41:57.317357 Detected 4 core, 8 thread CPU.
484 12:41:57.320612 Setting up SMI for CPU
485 12:41:57.323639 IED base = 0x9ac00000
486 12:41:57.323723 IED size = 0x00400000
487 12:41:57.327230 Will perform SMM setup.
488 12:41:57.333717 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 12:41:57.340397 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 12:41:57.343823 Processing 16 relocs. Offset value of 0x00030000
491 12:41:57.347318 Attempting to start 7 APs
492 12:41:57.350827 Waiting for 10ms after sending INIT.
493 12:41:57.366783 Waiting for 1st SIPI to complete...done.
494 12:41:57.366891 AP: slot 3 apic_id 1.
495 12:41:57.373679 Waiting for 2nd SIPI to complete...done.
496 12:41:57.373763 AP: slot 1 apic_id 2.
497 12:41:57.377209 AP: slot 4 apic_id 3.
498 12:41:57.380419 AP: slot 7 apic_id 4.
499 12:41:57.380502 AP: slot 5 apic_id 7.
500 12:41:57.383654 AP: slot 2 apic_id 6.
501 12:41:57.387070 AP: slot 6 apic_id 5.
502 12:41:57.394093 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 12:41:57.397203 Processing 13 relocs. Offset value of 0x00038000
504 12:41:57.403917 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 12:41:57.410427 Installing SMM handler to 0x9a000000
506 12:41:57.416960 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 12:41:57.420132 Processing 658 relocs. Offset value of 0x9a010000
508 12:41:57.430245 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 12:41:57.433844 Processing 13 relocs. Offset value of 0x9a008000
510 12:41:57.440366 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 12:41:57.447083 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 12:41:57.450149 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 12:41:57.456847 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 12:41:57.463766 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 12:41:57.470018 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 12:41:57.473452 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 12:41:57.480465 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 12:41:57.483877 Clearing SMI status registers
519 12:41:57.486823 SMI_STS: PM1
520 12:41:57.486938 PM1_STS: PWRBTN
521 12:41:57.489805 TCO_STS: SECOND_TO
522 12:41:57.493504 New SMBASE 0x9a000000
523 12:41:57.493609 In relocation handler: CPU 0
524 12:41:57.500078 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 12:41:57.503468 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 12:41:57.506764 Relocation complete.
527 12:41:57.510013 New SMBASE 0x99fff400
528 12:41:57.510097 In relocation handler: CPU 3
529 12:41:57.516312 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
530 12:41:57.519850 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 12:41:57.523151 Relocation complete.
532 12:41:57.523234 New SMBASE 0x99fff000
533 12:41:57.526501 In relocation handler: CPU 4
534 12:41:57.533218 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
535 12:41:57.536818 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 12:41:57.539833 Relocation complete.
537 12:41:57.539916 New SMBASE 0x99fffc00
538 12:41:57.543088 In relocation handler: CPU 1
539 12:41:57.549583 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
540 12:41:57.553083 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 12:41:57.556412 Relocation complete.
542 12:41:57.556496 New SMBASE 0x99ffec00
543 12:41:57.559408 In relocation handler: CPU 5
544 12:41:57.563008 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
545 12:41:57.569312 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 12:41:57.572815 Relocation complete.
547 12:41:57.572899 New SMBASE 0x99fff800
548 12:41:57.575880 In relocation handler: CPU 2
549 12:41:57.579317 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
550 12:41:57.586263 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 12:41:57.589436 Relocation complete.
552 12:41:57.589519 New SMBASE 0x99ffe800
553 12:41:57.592352 In relocation handler: CPU 6
554 12:41:57.596094 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
555 12:41:57.602524 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 12:41:57.602608 Relocation complete.
557 12:41:57.606181 New SMBASE 0x99ffe400
558 12:41:57.609154 In relocation handler: CPU 7
559 12:41:57.612768 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
560 12:41:57.619207 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 12:41:57.619294 Relocation complete.
562 12:41:57.622435 Initializing CPU #0
563 12:41:57.625824 CPU: vendor Intel device 806ec
564 12:41:57.629260 CPU: family 06, model 8e, stepping 0c
565 12:41:57.632746 Clearing out pending MCEs
566 12:41:57.635606 Setting up local APIC...
567 12:41:57.635704 apic_id: 0x00 done.
568 12:41:57.639273 Turbo is available but hidden
569 12:41:57.642189 Turbo is available and visible
570 12:41:57.645942 VMX status: enabled
571 12:41:57.649111 IA32_FEATURE_CONTROL status: locked
572 12:41:57.652249 Skip microcode update
573 12:41:57.652368 CPU #0 initialized
574 12:41:57.655433 Initializing CPU #3
575 12:41:57.655521 Initializing CPU #1
576 12:41:57.658948 Initializing CPU #4
577 12:41:57.662143 Initializing CPU #2
578 12:41:57.662258 Initializing CPU #5
579 12:41:57.665453 Initializing CPU #6
580 12:41:57.668935 Initializing CPU #7
581 12:41:57.672333 CPU: vendor Intel device 806ec
582 12:41:57.675317 CPU: family 06, model 8e, stepping 0c
583 12:41:57.675395 Clearing out pending MCEs
584 12:41:57.678600 CPU: vendor Intel device 806ec
585 12:41:57.685338 CPU: family 06, model 8e, stepping 0c
586 12:41:57.685439 CPU: vendor Intel device 806ec
587 12:41:57.691969 CPU: family 06, model 8e, stepping 0c
588 12:41:57.692069 Clearing out pending MCEs
589 12:41:57.695600 CPU: vendor Intel device 806ec
590 12:41:57.701955 CPU: family 06, model 8e, stepping 0c
591 12:41:57.702056 CPU: vendor Intel device 806ec
592 12:41:57.708715 CPU: family 06, model 8e, stepping 0c
593 12:41:57.708799 Clearing out pending MCEs
594 12:41:57.712010 Clearing out pending MCEs
595 12:41:57.715135 Setting up local APIC...
596 12:41:57.718654 CPU: vendor Intel device 806ec
597 12:41:57.721803 CPU: family 06, model 8e, stepping 0c
598 12:41:57.724832 CPU: vendor Intel device 806ec
599 12:41:57.728315 CPU: family 06, model 8e, stepping 0c
600 12:41:57.731779 Clearing out pending MCEs
601 12:41:57.735115 Clearing out pending MCEs
602 12:41:57.735198 Setting up local APIC...
603 12:41:57.738749 Setting up local APIC...
604 12:41:57.741785 Setting up local APIC...
605 12:41:57.745139 Setting up local APIC...
606 12:41:57.745239 apic_id: 0x05 done.
607 12:41:57.748585 Clearing out pending MCEs
608 12:41:57.751286 VMX status: enabled
609 12:41:57.754928 Setting up local APIC...
610 12:41:57.755011 apic_id: 0x07 done.
611 12:41:57.758137 apic_id: 0x01 done.
612 12:41:57.761325 Setting up local APIC...
613 12:41:57.761408 VMX status: enabled
614 12:41:57.764661 apic_id: 0x06 done.
615 12:41:57.768007 IA32_FEATURE_CONTROL status: locked
616 12:41:57.771226 VMX status: enabled
617 12:41:57.771309 Skip microcode update
618 12:41:57.774892 IA32_FEATURE_CONTROL status: locked
619 12:41:57.777952 CPU #5 initialized
620 12:41:57.781371 Skip microcode update
621 12:41:57.781454 VMX status: enabled
622 12:41:57.785028 apic_id: 0x03 done.
623 12:41:57.787686 apic_id: 0x02 done.
624 12:41:57.787786 VMX status: enabled
625 12:41:57.791028 VMX status: enabled
626 12:41:57.794561 IA32_FEATURE_CONTROL status: locked
627 12:41:57.797952 IA32_FEATURE_CONTROL status: locked
628 12:41:57.801305 Skip microcode update
629 12:41:57.801388 Skip microcode update
630 12:41:57.804765 CPU #4 initialized
631 12:41:57.808101 CPU #1 initialized
632 12:41:57.810938 IA32_FEATURE_CONTROL status: locked
633 12:41:57.811023 apic_id: 0x04 done.
634 12:41:57.814752 IA32_FEATURE_CONTROL status: locked
635 12:41:57.817470 VMX status: enabled
636 12:41:57.820917 Skip microcode update
637 12:41:57.824460 IA32_FEATURE_CONTROL status: locked
638 12:41:57.824543 CPU #6 initialized
639 12:41:57.827697 Skip microcode update
640 12:41:57.830996 CPU #2 initialized
641 12:41:57.831079 Skip microcode update
642 12:41:57.834114 CPU #7 initialized
643 12:41:57.834197 CPU #3 initialized
644 12:41:57.840698 bsp_do_flight_plan done after 465 msecs.
645 12:41:57.844032 CPU: frequency set to 4200 MHz
646 12:41:57.844116 Enabling SMIs.
647 12:41:57.844182 Locking SMM.
648 12:41:57.860726 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 12:41:57.864081 CBFS @ c08000 size 3f8000
650 12:41:57.870690 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 12:41:57.870791 CBFS: Locating 'vbt.bin'
652 12:41:57.873995 CBFS: Found @ offset 5f5c0 size 499
653 12:41:57.881176 Found a VBT of 4608 bytes after decompression
654 12:41:58.060590 Display FSP Version Info HOB
655 12:41:58.064155 Reference Code - CPU = 9.0.1e.30
656 12:41:58.067880 uCode Version = 0.0.0.ca
657 12:41:58.071113 TXT ACM version = ff.ff.ff.ffff
658 12:41:58.073785 Display FSP Version Info HOB
659 12:41:58.077548 Reference Code - ME = 9.0.1e.30
660 12:41:58.080841 MEBx version = 0.0.0.0
661 12:41:58.083869 ME Firmware Version = Consumer SKU
662 12:41:58.087197 Display FSP Version Info HOB
663 12:41:58.090386 Reference Code - CML PCH = 9.0.1e.30
664 12:41:58.093823 PCH-CRID Status = Disabled
665 12:41:58.097112 PCH-CRID Original Value = ff.ff.ff.ffff
666 12:41:58.100788 PCH-CRID New Value = ff.ff.ff.ffff
667 12:41:58.103723 OPROM - RST - RAID = ff.ff.ff.ffff
668 12:41:58.107288 ChipsetInit Base Version = ff.ff.ff.ffff
669 12:41:58.110627 ChipsetInit Oem Version = ff.ff.ff.ffff
670 12:41:58.113704 Display FSP Version Info HOB
671 12:41:58.120301 Reference Code - SA - System Agent = 9.0.1e.30
672 12:41:58.124096 Reference Code - MRC = 0.7.1.6c
673 12:41:58.126973 SA - PCIe Version = 9.0.1e.30
674 12:41:58.127057 SA-CRID Status = Disabled
675 12:41:58.130382 SA-CRID Original Value = 0.0.0.c
676 12:41:58.133619 SA-CRID New Value = 0.0.0.c
677 12:41:58.137091 OPROM - VBIOS = ff.ff.ff.ffff
678 12:41:58.140456 RTC Init
679 12:41:58.143425 Set power on after power failure.
680 12:41:58.143509 Disabling Deep S3
681 12:41:58.146920 Disabling Deep S3
682 12:41:58.147021 Disabling Deep S4
683 12:41:58.150203 Disabling Deep S4
684 12:41:58.153764 Disabling Deep S5
685 12:41:58.153863 Disabling Deep S5
686 12:41:58.159945 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
687 12:41:58.160046 Enumerating buses...
688 12:41:58.166603 Show all devs... Before device enumeration.
689 12:41:58.170092 Root Device: enabled 1
690 12:41:58.170192 CPU_CLUSTER: 0: enabled 1
691 12:41:58.173588 DOMAIN: 0000: enabled 1
692 12:41:58.176296 APIC: 00: enabled 1
693 12:41:58.176397 PCI: 00:00.0: enabled 1
694 12:41:58.179803 PCI: 00:02.0: enabled 1
695 12:41:58.182959 PCI: 00:04.0: enabled 0
696 12:41:58.186849 PCI: 00:05.0: enabled 0
697 12:41:58.186949 PCI: 00:12.0: enabled 1
698 12:41:58.189926 PCI: 00:12.5: enabled 0
699 12:41:58.193115 PCI: 00:12.6: enabled 0
700 12:41:58.196436 PCI: 00:14.0: enabled 1
701 12:41:58.196519 PCI: 00:14.1: enabled 0
702 12:41:58.199853 PCI: 00:14.3: enabled 1
703 12:41:58.203248 PCI: 00:14.5: enabled 0
704 12:41:58.203331 PCI: 00:15.0: enabled 1
705 12:41:58.206646 PCI: 00:15.1: enabled 1
706 12:41:58.209707 PCI: 00:15.2: enabled 0
707 12:41:58.212977 PCI: 00:15.3: enabled 0
708 12:41:58.213060 PCI: 00:16.0: enabled 1
709 12:41:58.216760 PCI: 00:16.1: enabled 0
710 12:41:58.219891 PCI: 00:16.2: enabled 0
711 12:41:58.222788 PCI: 00:16.3: enabled 0
712 12:41:58.222874 PCI: 00:16.4: enabled 0
713 12:41:58.226289 PCI: 00:16.5: enabled 0
714 12:41:58.229792 PCI: 00:17.0: enabled 1
715 12:41:58.232826 PCI: 00:19.0: enabled 1
716 12:41:58.232909 PCI: 00:19.1: enabled 0
717 12:41:58.235867 PCI: 00:19.2: enabled 0
718 12:41:58.239190 PCI: 00:1a.0: enabled 0
719 12:41:58.242869 PCI: 00:1c.0: enabled 0
720 12:41:58.242952 PCI: 00:1c.1: enabled 0
721 12:41:58.246407 PCI: 00:1c.2: enabled 0
722 12:41:58.249659 PCI: 00:1c.3: enabled 0
723 12:41:58.249742 PCI: 00:1c.4: enabled 0
724 12:41:58.252447 PCI: 00:1c.5: enabled 0
725 12:41:58.255805 PCI: 00:1c.6: enabled 0
726 12:41:58.259420 PCI: 00:1c.7: enabled 0
727 12:41:58.259530 PCI: 00:1d.0: enabled 1
728 12:41:58.262979 PCI: 00:1d.1: enabled 0
729 12:41:58.266268 PCI: 00:1d.2: enabled 0
730 12:41:58.269064 PCI: 00:1d.3: enabled 0
731 12:41:58.269148 PCI: 00:1d.4: enabled 0
732 12:41:58.272574 PCI: 00:1d.5: enabled 1
733 12:41:58.275850 PCI: 00:1e.0: enabled 1
734 12:41:58.278871 PCI: 00:1e.1: enabled 0
735 12:41:58.278953 PCI: 00:1e.2: enabled 1
736 12:41:58.282588 PCI: 00:1e.3: enabled 1
737 12:41:58.286105 PCI: 00:1f.0: enabled 1
738 12:41:58.288987 PCI: 00:1f.1: enabled 1
739 12:41:58.289060 PCI: 00:1f.2: enabled 1
740 12:41:58.292004 PCI: 00:1f.3: enabled 1
741 12:41:58.295427 PCI: 00:1f.4: enabled 1
742 12:41:58.295503 PCI: 00:1f.5: enabled 1
743 12:41:58.298643 PCI: 00:1f.6: enabled 0
744 12:41:58.302231 USB0 port 0: enabled 1
745 12:41:58.305526 I2C: 00:15: enabled 1
746 12:41:58.305599 I2C: 00:5d: enabled 1
747 12:41:58.308619 GENERIC: 0.0: enabled 1
748 12:41:58.312590 I2C: 00:1a: enabled 1
749 12:41:58.312667 I2C: 00:38: enabled 1
750 12:41:58.315411 I2C: 00:39: enabled 1
751 12:41:58.318742 I2C: 00:3a: enabled 1
752 12:41:58.318816 I2C: 00:3b: enabled 1
753 12:41:58.322229 PCI: 00:00.0: enabled 1
754 12:41:58.325699 SPI: 00: enabled 1
755 12:41:58.325771 SPI: 01: enabled 1
756 12:41:58.328723 PNP: 0c09.0: enabled 1
757 12:41:58.332312 USB2 port 0: enabled 1
758 12:41:58.332387 USB2 port 1: enabled 1
759 12:41:58.335079 USB2 port 2: enabled 0
760 12:41:58.338309 USB2 port 3: enabled 0
761 12:41:58.341853 USB2 port 5: enabled 0
762 12:41:58.341932 USB2 port 6: enabled 1
763 12:41:58.345239 USB2 port 9: enabled 1
764 12:41:58.348597 USB3 port 0: enabled 1
765 12:41:58.348668 USB3 port 1: enabled 1
766 12:41:58.351689 USB3 port 2: enabled 1
767 12:41:58.355298 USB3 port 3: enabled 1
768 12:41:58.355405 USB3 port 4: enabled 0
769 12:41:58.358062 APIC: 02: enabled 1
770 12:41:58.361668 APIC: 06: enabled 1
771 12:41:58.361750 APIC: 01: enabled 1
772 12:41:58.364853 APIC: 03: enabled 1
773 12:41:58.368339 APIC: 07: enabled 1
774 12:41:58.368413 APIC: 05: enabled 1
775 12:41:58.371505 APIC: 04: enabled 1
776 12:41:58.371581 Compare with tree...
777 12:41:58.374999 Root Device: enabled 1
778 12:41:58.378186 CPU_CLUSTER: 0: enabled 1
779 12:41:58.381480 APIC: 00: enabled 1
780 12:41:58.381555 APIC: 02: enabled 1
781 12:41:58.384824 APIC: 06: enabled 1
782 12:41:58.388026 APIC: 01: enabled 1
783 12:41:58.388096 APIC: 03: enabled 1
784 12:41:58.391715 APIC: 07: enabled 1
785 12:41:58.394801 APIC: 05: enabled 1
786 12:41:58.394869 APIC: 04: enabled 1
787 12:41:58.398309 DOMAIN: 0000: enabled 1
788 12:41:58.401584 PCI: 00:00.0: enabled 1
789 12:41:58.404578 PCI: 00:02.0: enabled 1
790 12:41:58.407877 PCI: 00:04.0: enabled 0
791 12:41:58.407953 PCI: 00:05.0: enabled 0
792 12:41:58.411408 PCI: 00:12.0: enabled 1
793 12:41:58.414401 PCI: 00:12.5: enabled 0
794 12:41:58.417767 PCI: 00:12.6: enabled 0
795 12:41:58.421208 PCI: 00:14.0: enabled 1
796 12:41:58.421278 USB0 port 0: enabled 1
797 12:41:58.424639 USB2 port 0: enabled 1
798 12:41:58.427954 USB2 port 1: enabled 1
799 12:41:58.431699 USB2 port 2: enabled 0
800 12:41:58.434288 USB2 port 3: enabled 0
801 12:41:58.434358 USB2 port 5: enabled 0
802 12:41:58.437709 USB2 port 6: enabled 1
803 12:41:58.440826 USB2 port 9: enabled 1
804 12:41:58.444303 USB3 port 0: enabled 1
805 12:41:58.447598 USB3 port 1: enabled 1
806 12:41:58.450739 USB3 port 2: enabled 1
807 12:41:58.450823 USB3 port 3: enabled 1
808 12:41:58.454372 USB3 port 4: enabled 0
809 12:41:58.457843 PCI: 00:14.1: enabled 0
810 12:41:58.460999 PCI: 00:14.3: enabled 1
811 12:41:58.464219 PCI: 00:14.5: enabled 0
812 12:41:58.464332 PCI: 00:15.0: enabled 1
813 12:41:58.467314 I2C: 00:15: enabled 1
814 12:41:58.470992 PCI: 00:15.1: enabled 1
815 12:41:58.474516 I2C: 00:5d: enabled 1
816 12:41:58.477351 GENERIC: 0.0: enabled 1
817 12:41:58.477434 PCI: 00:15.2: enabled 0
818 12:41:58.480535 PCI: 00:15.3: enabled 0
819 12:41:58.483771 PCI: 00:16.0: enabled 1
820 12:41:58.487369 PCI: 00:16.1: enabled 0
821 12:41:58.490547 PCI: 00:16.2: enabled 0
822 12:41:58.490630 PCI: 00:16.3: enabled 0
823 12:41:58.493841 PCI: 00:16.4: enabled 0
824 12:41:58.497340 PCI: 00:16.5: enabled 0
825 12:41:58.500787 PCI: 00:17.0: enabled 1
826 12:41:58.500871 PCI: 00:19.0: enabled 1
827 12:41:58.504224 I2C: 00:1a: enabled 1
828 12:41:58.507564 I2C: 00:38: enabled 1
829 12:41:58.510855 I2C: 00:39: enabled 1
830 12:41:58.510939 I2C: 00:3a: enabled 1
831 12:41:58.514266 I2C: 00:3b: enabled 1
832 12:41:58.517386 PCI: 00:19.1: enabled 0
833 12:41:58.520572 PCI: 00:19.2: enabled 0
834 12:41:58.523917 PCI: 00:1a.0: enabled 0
835 12:41:58.524000 PCI: 00:1c.0: enabled 0
836 12:41:58.527381 PCI: 00:1c.1: enabled 0
837 12:41:58.530320 PCI: 00:1c.2: enabled 0
838 12:41:58.533933 PCI: 00:1c.3: enabled 0
839 12:41:58.537041 PCI: 00:1c.4: enabled 0
840 12:41:58.537124 PCI: 00:1c.5: enabled 0
841 12:41:58.540457 PCI: 00:1c.6: enabled 0
842 12:41:58.543864 PCI: 00:1c.7: enabled 0
843 12:41:58.547271 PCI: 00:1d.0: enabled 1
844 12:41:58.550795 PCI: 00:1d.1: enabled 0
845 12:41:58.550879 PCI: 00:1d.2: enabled 0
846 12:41:58.553636 PCI: 00:1d.3: enabled 0
847 12:41:58.557343 PCI: 00:1d.4: enabled 0
848 12:41:58.560708 PCI: 00:1d.5: enabled 1
849 12:41:58.563639 PCI: 00:00.0: enabled 1
850 12:41:58.563723 PCI: 00:1e.0: enabled 1
851 12:41:58.566851 PCI: 00:1e.1: enabled 0
852 12:41:58.570350 PCI: 00:1e.2: enabled 1
853 12:41:58.574214 SPI: 00: enabled 1
854 12:41:58.574297 PCI: 00:1e.3: enabled 1
855 12:41:58.576882 SPI: 01: enabled 1
856 12:41:58.580306 PCI: 00:1f.0: enabled 1
857 12:41:58.583404 PNP: 0c09.0: enabled 1
858 12:41:58.583503 PCI: 00:1f.1: enabled 1
859 12:41:58.586682 PCI: 00:1f.2: enabled 1
860 12:41:58.590192 PCI: 00:1f.3: enabled 1
861 12:41:58.593819 PCI: 00:1f.4: enabled 1
862 12:41:58.596891 PCI: 00:1f.5: enabled 1
863 12:41:58.596966 PCI: 00:1f.6: enabled 0
864 12:41:58.599941 Root Device scanning...
865 12:41:58.603436 scan_static_bus for Root Device
866 12:41:58.606874 CPU_CLUSTER: 0 enabled
867 12:41:58.609991 DOMAIN: 0000 enabled
868 12:41:58.610079 DOMAIN: 0000 scanning...
869 12:41:58.613635 PCI: pci_scan_bus for bus 00
870 12:41:58.616999 PCI: 00:00.0 [8086/0000] ops
871 12:41:58.619801 PCI: 00:00.0 [8086/9b61] enabled
872 12:41:58.623112 PCI: 00:02.0 [8086/0000] bus ops
873 12:41:58.626645 PCI: 00:02.0 [8086/9b41] enabled
874 12:41:58.630103 PCI: 00:04.0 [8086/1903] disabled
875 12:41:58.633405 PCI: 00:08.0 [8086/1911] enabled
876 12:41:58.636463 PCI: 00:12.0 [8086/02f9] enabled
877 12:41:58.639913 PCI: 00:14.0 [8086/0000] bus ops
878 12:41:58.643354 PCI: 00:14.0 [8086/02ed] enabled
879 12:41:58.646658 PCI: 00:14.2 [8086/02ef] enabled
880 12:41:58.650306 PCI: 00:14.3 [8086/02f0] enabled
881 12:41:58.653141 PCI: 00:15.0 [8086/0000] bus ops
882 12:41:58.656587 PCI: 00:15.0 [8086/02e8] enabled
883 12:41:58.659963 PCI: 00:15.1 [8086/0000] bus ops
884 12:41:58.663251 PCI: 00:15.1 [8086/02e9] enabled
885 12:41:58.666722 PCI: 00:16.0 [8086/0000] ops
886 12:41:58.669648 PCI: 00:16.0 [8086/02e0] enabled
887 12:41:58.673155 PCI: 00:17.0 [8086/0000] ops
888 12:41:58.676724 PCI: 00:17.0 [8086/02d3] enabled
889 12:41:58.679555 PCI: 00:19.0 [8086/0000] bus ops
890 12:41:58.683069 PCI: 00:19.0 [8086/02c5] enabled
891 12:41:58.686613 PCI: 00:1d.0 [8086/0000] bus ops
892 12:41:58.689641 PCI: 00:1d.0 [8086/02b0] enabled
893 12:41:58.696212 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 12:41:58.699905 PCI: 00:1e.0 [8086/0000] ops
895 12:41:58.703398 PCI: 00:1e.0 [8086/02a8] enabled
896 12:41:58.706281 PCI: 00:1e.2 [8086/0000] bus ops
897 12:41:58.709587 PCI: 00:1e.2 [8086/02aa] enabled
898 12:41:58.712908 PCI: 00:1e.3 [8086/0000] bus ops
899 12:41:58.716752 PCI: 00:1e.3 [8086/02ab] enabled
900 12:41:58.719427 PCI: 00:1f.0 [8086/0000] bus ops
901 12:41:58.723113 PCI: 00:1f.0 [8086/0284] enabled
902 12:41:58.726462 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 12:41:58.732709 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 12:41:58.736385 PCI: 00:1f.3 [8086/0000] bus ops
905 12:41:58.739737 PCI: 00:1f.3 [8086/02c8] enabled
906 12:41:58.743084 PCI: 00:1f.4 [8086/0000] bus ops
907 12:41:58.746369 PCI: 00:1f.4 [8086/02a3] enabled
908 12:41:58.749230 PCI: 00:1f.5 [8086/0000] bus ops
909 12:41:58.752676 PCI: 00:1f.5 [8086/02a4] enabled
910 12:41:58.756118 PCI: Leftover static devices:
911 12:41:58.756193 PCI: 00:05.0
912 12:41:58.759777 PCI: 00:12.5
913 12:41:58.759860 PCI: 00:12.6
914 12:41:58.762713 PCI: 00:14.1
915 12:41:58.762785 PCI: 00:14.5
916 12:41:58.762848 PCI: 00:15.2
917 12:41:58.765921 PCI: 00:15.3
918 12:41:58.765988 PCI: 00:16.1
919 12:41:58.769134 PCI: 00:16.2
920 12:41:58.769216 PCI: 00:16.3
921 12:41:58.769281 PCI: 00:16.4
922 12:41:58.772510 PCI: 00:16.5
923 12:41:58.772591 PCI: 00:19.1
924 12:41:58.776475 PCI: 00:19.2
925 12:41:58.776556 PCI: 00:1a.0
926 12:41:58.779233 PCI: 00:1c.0
927 12:41:58.779315 PCI: 00:1c.1
928 12:41:58.779380 PCI: 00:1c.2
929 12:41:58.782484 PCI: 00:1c.3
930 12:41:58.782566 PCI: 00:1c.4
931 12:41:58.785728 PCI: 00:1c.5
932 12:41:58.785836 PCI: 00:1c.6
933 12:41:58.785938 PCI: 00:1c.7
934 12:41:58.789283 PCI: 00:1d.1
935 12:41:58.789371 PCI: 00:1d.2
936 12:41:58.792569 PCI: 00:1d.3
937 12:41:58.792662 PCI: 00:1d.4
938 12:41:58.792745 PCI: 00:1d.5
939 12:41:58.795752 PCI: 00:1e.1
940 12:41:58.795826 PCI: 00:1f.1
941 12:41:58.799147 PCI: 00:1f.2
942 12:41:58.799259 PCI: 00:1f.6
943 12:41:58.802857 PCI: Check your devicetree.cb.
944 12:41:58.806184 PCI: 00:02.0 scanning...
945 12:41:58.809153 scan_generic_bus for PCI: 00:02.0
946 12:41:58.812591 scan_generic_bus for PCI: 00:02.0 done
947 12:41:58.819504 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
948 12:41:58.822435 PCI: 00:14.0 scanning...
949 12:41:58.825693 scan_static_bus for PCI: 00:14.0
950 12:41:58.825775 USB0 port 0 enabled
951 12:41:58.829225 USB0 port 0 scanning...
952 12:41:58.832789 scan_static_bus for USB0 port 0
953 12:41:58.835833 USB2 port 0 enabled
954 12:41:58.835914 USB2 port 1 enabled
955 12:41:58.838959 USB2 port 2 disabled
956 12:41:58.842667 USB2 port 3 disabled
957 12:41:58.842763 USB2 port 5 disabled
958 12:41:58.845881 USB2 port 6 enabled
959 12:41:58.845963 USB2 port 9 enabled
960 12:41:58.849155 USB3 port 0 enabled
961 12:41:58.852556 USB3 port 1 enabled
962 12:41:58.852631 USB3 port 2 enabled
963 12:41:58.855467 USB3 port 3 enabled
964 12:41:58.859015 USB3 port 4 disabled
965 12:41:58.859124 USB2 port 0 scanning...
966 12:41:58.862505 scan_static_bus for USB2 port 0
967 12:41:58.865969 scan_static_bus for USB2 port 0 done
968 12:41:58.872375 scan_bus: scanning of bus USB2 port 0 took 9691 usecs
969 12:41:58.875903 USB2 port 1 scanning...
970 12:41:58.879287 scan_static_bus for USB2 port 1
971 12:41:58.882045 scan_static_bus for USB2 port 1 done
972 12:41:58.889281 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
973 12:41:58.889357 USB2 port 6 scanning...
974 12:41:58.892871 scan_static_bus for USB2 port 6
975 12:41:58.895456 scan_static_bus for USB2 port 6 done
976 12:41:58.902529 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
977 12:41:58.905957 USB2 port 9 scanning...
978 12:41:58.908864 scan_static_bus for USB2 port 9
979 12:41:58.912411 scan_static_bus for USB2 port 9 done
980 12:41:58.919362 scan_bus: scanning of bus USB2 port 9 took 9697 usecs
981 12:41:58.919444 USB3 port 0 scanning...
982 12:41:58.922075 scan_static_bus for USB3 port 0
983 12:41:58.925501 scan_static_bus for USB3 port 0 done
984 12:41:58.932123 scan_bus: scanning of bus USB3 port 0 took 9709 usecs
985 12:41:58.935651 USB3 port 1 scanning...
986 12:41:58.938860 scan_static_bus for USB3 port 1
987 12:41:58.942233 scan_static_bus for USB3 port 1 done
988 12:41:58.948595 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
989 12:41:58.948677 USB3 port 2 scanning...
990 12:41:58.952051 scan_static_bus for USB3 port 2
991 12:41:58.958761 scan_static_bus for USB3 port 2 done
992 12:41:58.961730 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
993 12:41:58.965290 USB3 port 3 scanning...
994 12:41:58.968977 scan_static_bus for USB3 port 3
995 12:41:58.971857 scan_static_bus for USB3 port 3 done
996 12:41:58.978676 scan_bus: scanning of bus USB3 port 3 took 9689 usecs
997 12:41:58.982373 scan_static_bus for USB0 port 0 done
998 12:41:58.985235 scan_bus: scanning of bus USB0 port 0 took 155360 usecs
999 12:41:58.991994 scan_static_bus for PCI: 00:14.0 done
1000 12:41:58.995540 scan_bus: scanning of bus PCI: 00:14.0 took 172987 usecs
1001 12:41:58.998826 PCI: 00:15.0 scanning...
1002 12:41:59.001886 scan_generic_bus for PCI: 00:15.0
1003 12:41:59.005263 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 12:41:59.012061 scan_generic_bus for PCI: 00:15.0 done
1005 12:41:59.015145 scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs
1006 12:41:59.018634 PCI: 00:15.1 scanning...
1007 12:41:59.021854 scan_generic_bus for PCI: 00:15.1
1008 12:41:59.024756 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 12:41:59.031718 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 12:41:59.034923 scan_generic_bus for PCI: 00:15.1 done
1011 12:41:59.038335 scan_bus: scanning of bus PCI: 00:15.1 took 18587 usecs
1012 12:41:59.041595 PCI: 00:19.0 scanning...
1013 12:41:59.045062 scan_generic_bus for PCI: 00:19.0
1014 12:41:59.051946 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 12:41:59.054654 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 12:41:59.058082 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 12:41:59.061529 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 12:41:59.067949 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 12:41:59.071422 scan_generic_bus for PCI: 00:19.0 done
1020 12:41:59.074408 scan_bus: scanning of bus PCI: 00:19.0 took 30736 usecs
1021 12:41:59.078195 PCI: 00:1d.0 scanning...
1022 12:41:59.081249 do_pci_scan_bridge for PCI: 00:1d.0
1023 12:41:59.084521 PCI: pci_scan_bus for bus 01
1024 12:41:59.087980 PCI: 01:00.0 [1c5c/1327] enabled
1025 12:41:59.090859 Enabling Common Clock Configuration
1026 12:41:59.097938 L1 Sub-State supported from root port 29
1027 12:41:59.101369 L1 Sub-State Support = 0xf
1028 12:41:59.101445 CommonModeRestoreTime = 0x28
1029 12:41:59.107916 Power On Value = 0x16, Power On Scale = 0x0
1030 12:41:59.108000 ASPM: Enabled L1
1031 12:41:59.114558 scan_bus: scanning of bus PCI: 00:1d.0 took 32791 usecs
1032 12:41:59.117807 PCI: 00:1e.2 scanning...
1033 12:41:59.121185 scan_generic_bus for PCI: 00:1e.2
1034 12:41:59.124065 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 12:41:59.127354 scan_generic_bus for PCI: 00:1e.2 done
1036 12:41:59.133794 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
1037 12:41:59.137615 PCI: 00:1e.3 scanning...
1038 12:41:59.140956 scan_generic_bus for PCI: 00:1e.3
1039 12:41:59.144148 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 12:41:59.147780 scan_generic_bus for PCI: 00:1e.3 done
1041 12:41:59.153995 scan_bus: scanning of bus PCI: 00:1e.3 took 13987 usecs
1042 12:41:59.157260 PCI: 00:1f.0 scanning...
1043 12:41:59.160725 scan_static_bus for PCI: 00:1f.0
1044 12:41:59.160798 PNP: 0c09.0 enabled
1045 12:41:59.163586 scan_static_bus for PCI: 00:1f.0 done
1046 12:41:59.170326 scan_bus: scanning of bus PCI: 00:1f.0 took 12059 usecs
1047 12:41:59.173935 PCI: 00:1f.3 scanning...
1048 12:41:59.180255 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1049 12:41:59.180330 PCI: 00:1f.4 scanning...
1050 12:41:59.183646 scan_generic_bus for PCI: 00:1f.4
1051 12:41:59.190088 scan_generic_bus for PCI: 00:1f.4 done
1052 12:41:59.193714 scan_bus: scanning of bus PCI: 00:1f.4 took 10187 usecs
1053 12:41:59.196893 PCI: 00:1f.5 scanning...
1054 12:41:59.200099 scan_generic_bus for PCI: 00:1f.5
1055 12:41:59.203862 scan_generic_bus for PCI: 00:1f.5 done
1056 12:41:59.210104 scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs
1057 12:41:59.217088 scan_bus: scanning of bus DOMAIN: 0000 took 604949 usecs
1058 12:41:59.220480 scan_static_bus for Root Device done
1059 12:41:59.226682 scan_bus: scanning of bus Root Device took 624820 usecs
1060 12:41:59.226781 done
1061 12:41:59.229960 Chrome EC: UHEPI supported
1062 12:41:59.236816 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 12:41:59.240087 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 12:41:59.246684 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 12:41:59.253904 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 12:41:59.257295 SPI flash protection: WPSW=0 SRP0=0
1067 12:41:59.263582 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 12:41:59.267010 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 12:41:59.270327 found VGA at PCI: 00:02.0
1070 12:41:59.273724 Setting up VGA for PCI: 00:02.0
1071 12:41:59.280432 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 12:41:59.283707 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 12:41:59.287061 Allocating resources...
1074 12:41:59.290292 Reading resources...
1075 12:41:59.293805 Root Device read_resources bus 0 link: 0
1076 12:41:59.296586 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 12:41:59.303583 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 12:41:59.306592 DOMAIN: 0000 read_resources bus 0 link: 0
1079 12:41:59.313994 PCI: 00:14.0 read_resources bus 0 link: 0
1080 12:41:59.317463 USB0 port 0 read_resources bus 0 link: 0
1081 12:41:59.325755 USB0 port 0 read_resources bus 0 link: 0 done
1082 12:41:59.329375 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 12:41:59.336153 PCI: 00:15.0 read_resources bus 1 link: 0
1084 12:41:59.339383 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 12:41:59.345934 PCI: 00:15.1 read_resources bus 2 link: 0
1086 12:41:59.349059 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 12:41:59.356888 PCI: 00:19.0 read_resources bus 3 link: 0
1088 12:41:59.363288 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 12:41:59.366800 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 12:41:59.373290 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 12:41:59.376657 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 12:41:59.383036 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 12:41:59.386529 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 12:41:59.393370 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 12:41:59.396788 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 12:41:59.402989 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 12:41:59.409754 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 12:41:59.413147 Root Device read_resources bus 0 link: 0 done
1099 12:41:59.416756 Done reading resources.
1100 12:41:59.422799 Show resources in subtree (Root Device)...After reading.
1101 12:41:59.426152 Root Device child on link 0 CPU_CLUSTER: 0
1102 12:41:59.429692 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 12:41:59.429770 APIC: 00
1104 12:41:59.433060 APIC: 02
1105 12:41:59.433129 APIC: 06
1106 12:41:59.436640 APIC: 01
1107 12:41:59.436741 APIC: 03
1108 12:41:59.436832 APIC: 07
1109 12:41:59.439366 APIC: 05
1110 12:41:59.439459 APIC: 04
1111 12:41:59.443143 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 12:41:59.452784 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 12:41:59.506056 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 12:41:59.506431 PCI: 00:00.0
1115 12:41:59.507049 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 12:41:59.507953 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 12:41:59.508409 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 12:41:59.509102 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 12:41:59.539811 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 12:41:59.540637 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 12:41:59.540891 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 12:41:59.544278 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 12:41:59.550989 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 12:41:59.557307 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 12:41:59.567112 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 12:41:59.577302 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 12:41:59.587008 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 12:41:59.596903 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 12:41:59.607102 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 12:41:59.613747 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 12:41:59.616929 PCI: 00:02.0
1132 12:41:59.626923 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 12:41:59.637053 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 12:41:59.647138 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 12:41:59.647255 PCI: 00:04.0
1136 12:41:59.649874 PCI: 00:08.0
1137 12:41:59.660199 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 12:41:59.660302 PCI: 00:12.0
1139 12:41:59.670039 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 12:41:59.673366 PCI: 00:14.0 child on link 0 USB0 port 0
1141 12:41:59.683702 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 12:41:59.689940 USB0 port 0 child on link 0 USB2 port 0
1143 12:41:59.690017 USB2 port 0
1144 12:41:59.693351 USB2 port 1
1145 12:41:59.693443 USB2 port 2
1146 12:41:59.696567 USB2 port 3
1147 12:41:59.696643 USB2 port 5
1148 12:41:59.699737 USB2 port 6
1149 12:41:59.703012 USB2 port 9
1150 12:41:59.703109 USB3 port 0
1151 12:41:59.706217 USB3 port 1
1152 12:41:59.706312 USB3 port 2
1153 12:41:59.710105 USB3 port 3
1154 12:41:59.710207 USB3 port 4
1155 12:41:59.713056 PCI: 00:14.2
1156 12:41:59.722865 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 12:41:59.732774 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 12:41:59.732857 PCI: 00:14.3
1159 12:41:59.742903 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 12:41:59.746035 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 12:41:59.756199 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 12:41:59.759606 I2C: 01:15
1163 12:41:59.762943 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 12:41:59.773153 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 12:41:59.776489 I2C: 02:5d
1166 12:41:59.776566 GENERIC: 0.0
1167 12:41:59.779229 PCI: 00:16.0
1168 12:41:59.789645 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 12:41:59.789726 PCI: 00:17.0
1170 12:41:59.799423 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 12:41:59.809175 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 12:41:59.815743 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 12:41:59.825618 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 12:41:59.832218 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 12:41:59.842464 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 12:41:59.845463 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 12:41:59.855754 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 12:41:59.859083 I2C: 03:1a
1179 12:41:59.859164 I2C: 03:38
1180 12:41:59.861976 I2C: 03:39
1181 12:41:59.862057 I2C: 03:3a
1182 12:41:59.862120 I2C: 03:3b
1183 12:41:59.868869 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 12:41:59.875478 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 12:41:59.885340 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 12:41:59.895236 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 12:41:59.898683 PCI: 01:00.0
1188 12:41:59.908672 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 12:41:59.908753 PCI: 00:1e.0
1190 12:41:59.921851 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 12:41:59.931530 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 12:41:59.934853 PCI: 00:1e.2 child on link 0 SPI: 00
1193 12:41:59.944772 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:41:59.944879 SPI: 00
1195 12:41:59.947966 PCI: 00:1e.3 child on link 0 SPI: 01
1196 12:41:59.957863 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:41:59.960993 SPI: 01
1198 12:41:59.964614 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 12:41:59.974325 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 12:41:59.981282 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 12:41:59.984760 PNP: 0c09.0
1202 12:41:59.994535 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 12:41:59.994619 PCI: 00:1f.3
1204 12:42:00.004224 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 12:42:00.014586 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 12:42:00.017536 PCI: 00:1f.4
1207 12:42:00.024444 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 12:42:00.034128 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 12:42:00.038034 PCI: 00:1f.5
1210 12:42:00.044024 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 12:42:00.051311 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 12:42:00.057644 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 12:42:00.064326 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 12:42:00.067779 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 12:42:00.071033 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 12:42:00.077304 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 12:42:00.080769 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 12:42:00.087568 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 12:42:00.093962 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 12:42:00.100695 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 12:42:00.110645 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 12:42:00.117400 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 12:42:00.120548 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 12:42:00.127449 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 12:42:00.133893 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 12:42:00.137189 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 12:42:00.143822 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 12:42:00.147219 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 12:42:00.150664 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 12:42:00.157023 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 12:42:00.160387 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 12:42:00.166835 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 12:42:00.170181 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 12:42:00.176820 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 12:42:00.180156 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 12:42:00.186889 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 12:42:00.190137 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 12:42:00.196960 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 12:42:00.199810 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 12:42:00.206769 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 12:42:00.209967 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 12:42:00.216811 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 12:42:00.220156 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 12:42:00.223222 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 12:42:00.230017 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 12:42:00.233187 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 12:42:00.240106 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 12:42:00.246258 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 12:42:00.253146 avoid_fixed_resources: DOMAIN: 0000
1250 12:42:00.256512 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 12:42:00.262991 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 12:42:00.269591 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 12:42:00.279659 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 12:42:00.285949 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 12:42:00.293164 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 12:42:00.302720 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 12:42:00.309384 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 12:42:00.315847 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 12:42:00.325705 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 12:42:00.332319 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 12:42:00.338733 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 12:42:00.342851 Setting resources...
1263 12:42:00.348968 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 12:42:00.352192 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 12:42:00.355302 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 12:42:00.359013 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 12:42:00.362550 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 12:42:00.368796 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 12:42:00.375180 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 12:42:00.382153 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 12:42:00.388405 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 12:42:00.395379 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 12:42:00.399008 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 12:42:00.405027 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 12:42:00.408218 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 12:42:00.415286 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 12:42:00.418299 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 12:42:00.424837 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 12:42:00.428073 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 12:42:00.435237 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 12:42:00.438001 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 12:42:00.444680 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 12:42:00.447860 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 12:42:00.455048 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 12:42:00.458424 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 12:42:00.464817 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 12:42:00.468237 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 12:42:00.474813 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 12:42:00.477771 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 12:42:00.481196 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 12:42:00.488044 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 12:42:00.491547 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 12:42:00.497653 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 12:42:00.501549 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 12:42:00.511152 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 12:42:00.517567 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 12:42:00.524348 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 12:42:00.530637 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 12:42:00.537695 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 12:42:00.544456 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 12:42:00.547719 Root Device assign_resources, bus 0 link: 0
1302 12:42:00.554007 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 12:42:00.560671 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 12:42:00.570922 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 12:42:00.577284 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 12:42:00.587013 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 12:42:00.593964 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 12:42:00.603980 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 12:42:00.607230 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 12:42:00.610554 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 12:42:00.620578 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 12:42:00.627115 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 12:42:00.637149 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 12:42:00.643530 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 12:42:00.650413 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 12:42:00.653500 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 12:42:00.663662 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 12:42:00.666924 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 12:42:00.670052 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 12:42:00.680276 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 12:42:00.686903 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 12:42:00.696542 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 12:42:00.703490 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 12:42:00.710929 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 12:42:00.718150 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 12:42:00.727926 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 12:42:00.734600 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 12:42:00.737523 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 12:42:00.744369 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 12:42:00.751125 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 12:42:00.760872 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 12:42:00.771212 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 12:42:00.774143 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 12:42:00.784165 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 12:42:00.787555 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 12:42:00.797455 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 12:42:00.804247 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 12:42:00.807584 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 12:42:00.814287 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 12:42:00.820662 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 12:42:00.827398 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 12:42:00.830255 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 12:42:00.836785 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 12:42:00.840128 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 12:42:00.846968 LPC: Trying to open IO window from 800 size 1ff
1346 12:42:00.853324 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 12:42:00.863181 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 12:42:00.870346 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 12:42:00.876751 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 12:42:00.884102 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 12:42:00.886678 Root Device assign_resources, bus 0 link: 0
1352 12:42:00.890300 Done setting resources.
1353 12:42:00.896574 Show resources in subtree (Root Device)...After assigning values.
1354 12:42:00.900001 Root Device child on link 0 CPU_CLUSTER: 0
1355 12:42:00.906553 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 12:42:00.906689 APIC: 00
1357 12:42:00.906757 APIC: 02
1358 12:42:00.909807 APIC: 06
1359 12:42:00.909899 APIC: 01
1360 12:42:00.909967 APIC: 03
1361 12:42:00.913701 APIC: 07
1362 12:42:00.913793 APIC: 05
1363 12:42:00.916404 APIC: 04
1364 12:42:00.920351 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 12:42:00.929642 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 12:42:00.939980 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 12:42:00.942953 PCI: 00:00.0
1368 12:42:00.953253 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 12:42:00.959820 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 12:42:00.969291 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 12:42:00.979775 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 12:42:00.989629 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 12:42:00.999410 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 12:42:01.008944 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 12:42:01.016054 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 12:42:01.025593 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 12:42:01.035628 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 12:42:01.045629 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 12:42:01.055323 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 12:42:01.065268 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 12:42:01.074953 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 12:42:01.081775 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 12:42:01.091416 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 12:42:01.094901 PCI: 00:02.0
1385 12:42:01.104870 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 12:42:01.115060 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 12:42:01.124883 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 12:42:01.124968 PCI: 00:04.0
1389 12:42:01.128021 PCI: 00:08.0
1390 12:42:01.137911 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 12:42:01.137992 PCI: 00:12.0
1392 12:42:01.150991 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 12:42:01.154569 PCI: 00:14.0 child on link 0 USB0 port 0
1394 12:42:01.164137 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 12:42:01.167476 USB0 port 0 child on link 0 USB2 port 0
1396 12:42:01.170986 USB2 port 0
1397 12:42:01.171089 USB2 port 1
1398 12:42:01.174541 USB2 port 2
1399 12:42:01.174644 USB2 port 3
1400 12:42:01.177838 USB2 port 5
1401 12:42:01.180709 USB2 port 6
1402 12:42:01.180817 USB2 port 9
1403 12:42:01.184177 USB3 port 0
1404 12:42:01.184286 USB3 port 1
1405 12:42:01.187771 USB3 port 2
1406 12:42:01.187857 USB3 port 3
1407 12:42:01.191177 USB3 port 4
1408 12:42:01.191282 PCI: 00:14.2
1409 12:42:01.200561 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 12:42:01.211058 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 12:42:01.214367 PCI: 00:14.3
1412 12:42:01.223968 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 12:42:01.227389 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 12:42:01.237110 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 12:42:01.240317 I2C: 01:15
1416 12:42:01.243512 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 12:42:01.254083 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 12:42:01.257498 I2C: 02:5d
1419 12:42:01.257599 GENERIC: 0.0
1420 12:42:01.260204 PCI: 00:16.0
1421 12:42:01.270391 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 12:42:01.270517 PCI: 00:17.0
1423 12:42:01.283489 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 12:42:01.293166 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 12:42:01.299794 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 12:42:01.309856 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 12:42:01.319587 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 12:42:01.329557 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 12:42:01.333025 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 12:42:01.342929 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 12:42:01.346099 I2C: 03:1a
1432 12:42:01.346211 I2C: 03:38
1433 12:42:01.349291 I2C: 03:39
1434 12:42:01.349408 I2C: 03:3a
1435 12:42:01.352977 I2C: 03:3b
1436 12:42:01.356127 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 12:42:01.366120 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 12:42:01.376163 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 12:42:01.386186 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 12:42:01.389378 PCI: 01:00.0
1441 12:42:01.399006 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 12:42:01.399088 PCI: 00:1e.0
1443 12:42:01.412488 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 12:42:01.422055 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 12:42:01.425382 PCI: 00:1e.2 child on link 0 SPI: 00
1446 12:42:01.435908 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 12:42:01.435990 SPI: 00
1448 12:42:01.442255 PCI: 00:1e.3 child on link 0 SPI: 01
1449 12:42:01.452528 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 12:42:01.452611 SPI: 01
1451 12:42:01.455414 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 12:42:01.465240 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 12:42:01.474958 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 12:42:01.475040 PNP: 0c09.0
1455 12:42:01.485152 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 12:42:01.485235 PCI: 00:1f.3
1457 12:42:01.498277 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 12:42:01.508251 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 12:42:01.508334 PCI: 00:1f.4
1460 12:42:01.518305 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 12:42:01.527754 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 12:42:01.531245 PCI: 00:1f.5
1463 12:42:01.540965 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 12:42:01.544547 Done allocating resources.
1465 12:42:01.547806 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 12:42:01.551136 Enabling resources...
1467 12:42:01.554563 PCI: 00:00.0 subsystem <- 8086/9b61
1468 12:42:01.558057 PCI: 00:00.0 cmd <- 06
1469 12:42:01.561428 PCI: 00:02.0 subsystem <- 8086/9b41
1470 12:42:01.564097 PCI: 00:02.0 cmd <- 03
1471 12:42:01.567549 PCI: 00:08.0 cmd <- 06
1472 12:42:01.571087 PCI: 00:12.0 subsystem <- 8086/02f9
1473 12:42:01.574576 PCI: 00:12.0 cmd <- 02
1474 12:42:01.577702 PCI: 00:14.0 subsystem <- 8086/02ed
1475 12:42:01.580979 PCI: 00:14.0 cmd <- 02
1476 12:42:01.581060 PCI: 00:14.2 cmd <- 02
1477 12:42:01.587538 PCI: 00:14.3 subsystem <- 8086/02f0
1478 12:42:01.587666 PCI: 00:14.3 cmd <- 02
1479 12:42:01.590914 PCI: 00:15.0 subsystem <- 8086/02e8
1480 12:42:01.594110 PCI: 00:15.0 cmd <- 02
1481 12:42:01.597362 PCI: 00:15.1 subsystem <- 8086/02e9
1482 12:42:01.600823 PCI: 00:15.1 cmd <- 02
1483 12:42:01.604296 PCI: 00:16.0 subsystem <- 8086/02e0
1484 12:42:01.607540 PCI: 00:16.0 cmd <- 02
1485 12:42:01.611027 PCI: 00:17.0 subsystem <- 8086/02d3
1486 12:42:01.614244 PCI: 00:17.0 cmd <- 03
1487 12:42:01.617668 PCI: 00:19.0 subsystem <- 8086/02c5
1488 12:42:01.621097 PCI: 00:19.0 cmd <- 02
1489 12:42:01.623919 PCI: 00:1d.0 bridge ctrl <- 0013
1490 12:42:01.627237 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 12:42:01.630290 PCI: 00:1d.0 cmd <- 06
1492 12:42:01.633746 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 12:42:01.633827 PCI: 00:1e.0 cmd <- 06
1494 12:42:01.640787 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 12:42:01.640863 PCI: 00:1e.2 cmd <- 06
1496 12:42:01.644188 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 12:42:01.647579 PCI: 00:1e.3 cmd <- 02
1498 12:42:01.650478 PCI: 00:1f.0 subsystem <- 8086/0284
1499 12:42:01.654224 PCI: 00:1f.0 cmd <- 407
1500 12:42:01.657431 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 12:42:01.660832 PCI: 00:1f.3 cmd <- 02
1502 12:42:01.663890 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 12:42:01.667037 PCI: 00:1f.4 cmd <- 03
1504 12:42:01.670438 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 12:42:01.673863 PCI: 00:1f.5 cmd <- 406
1506 12:42:01.682095 PCI: 01:00.0 cmd <- 02
1507 12:42:01.687416 done.
1508 12:42:01.696401 ME: Version: 14.0.39.1367
1509 12:42:01.702623 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1510 12:42:01.706032 Initializing devices...
1511 12:42:01.706136 Root Device init ...
1512 12:42:01.712720 Chrome EC: Set SMI mask to 0x0000000000000000
1513 12:42:01.715785 Chrome EC: clear events_b mask to 0x0000000000000000
1514 12:42:01.722292 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 12:42:01.729411 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 12:42:01.735890 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 12:42:01.739127 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 12:42:01.742344 Root Device init finished in 35166 usecs
1519 12:42:01.746301 CPU_CLUSTER: 0 init ...
1520 12:42:01.752573 CPU_CLUSTER: 0 init finished in 2439 usecs
1521 12:42:01.757086 PCI: 00:00.0 init ...
1522 12:42:01.759895 CPU TDP: 15 Watts
1523 12:42:01.763249 CPU PL2 = 64 Watts
1524 12:42:01.766659 PCI: 00:00.0 init finished in 7078 usecs
1525 12:42:01.770206 PCI: 00:02.0 init ...
1526 12:42:01.773174 PCI: 00:02.0 init finished in 2254 usecs
1527 12:42:01.776468 PCI: 00:08.0 init ...
1528 12:42:01.779935 PCI: 00:08.0 init finished in 2252 usecs
1529 12:42:01.783280 PCI: 00:12.0 init ...
1530 12:42:01.786652 PCI: 00:12.0 init finished in 2253 usecs
1531 12:42:01.790033 PCI: 00:14.0 init ...
1532 12:42:01.793354 PCI: 00:14.0 init finished in 2253 usecs
1533 12:42:01.796582 PCI: 00:14.2 init ...
1534 12:42:01.799901 PCI: 00:14.2 init finished in 2252 usecs
1535 12:42:01.803337 PCI: 00:14.3 init ...
1536 12:42:01.806707 PCI: 00:14.3 init finished in 2270 usecs
1537 12:42:01.810149 PCI: 00:15.0 init ...
1538 12:42:01.812919 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 12:42:01.816550 PCI: 00:15.0 init finished in 5970 usecs
1540 12:42:01.819838 PCI: 00:15.1 init ...
1541 12:42:01.823224 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 12:42:01.826732 PCI: 00:15.1 init finished in 5979 usecs
1543 12:42:01.830350 PCI: 00:16.0 init ...
1544 12:42:01.833176 PCI: 00:16.0 init finished in 2252 usecs
1545 12:42:01.837095 PCI: 00:19.0 init ...
1546 12:42:01.840451 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 12:42:01.847154 PCI: 00:19.0 init finished in 5979 usecs
1548 12:42:01.847230 PCI: 00:1d.0 init ...
1549 12:42:01.850469 Initializing PCH PCIe bridge.
1550 12:42:01.853791 PCI: 00:1d.0 init finished in 5287 usecs
1551 12:42:01.859222 PCI: 00:1f.0 init ...
1552 12:42:01.861892 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 12:42:01.868278 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 12:42:01.868355 IOAPIC: ID = 0x02
1555 12:42:01.872007 IOAPIC: Dumping registers
1556 12:42:01.875080 reg 0x0000: 0x02000000
1557 12:42:01.878553 reg 0x0001: 0x00770020
1558 12:42:01.878640 reg 0x0002: 0x00000000
1559 12:42:01.885457 PCI: 00:1f.0 init finished in 23541 usecs
1560 12:42:01.888681 PCI: 00:1f.4 init ...
1561 12:42:01.892082 PCI: 00:1f.4 init finished in 2263 usecs
1562 12:42:01.903006 PCI: 01:00.0 init ...
1563 12:42:01.906134 PCI: 01:00.0 init finished in 2255 usecs
1564 12:42:01.910266 PNP: 0c09.0 init ...
1565 12:42:01.913737 Google Chrome EC uptime: 11.090 seconds
1566 12:42:01.920259 Google Chrome AP resets since EC boot: 0
1567 12:42:01.923544 Google Chrome most recent AP reset causes:
1568 12:42:01.930265 Google Chrome EC reset flags at last EC boot: reset-pin
1569 12:42:01.933861 PNP: 0c09.0 init finished in 20619 usecs
1570 12:42:01.937059 Devices initialized
1571 12:42:01.940690 Show all devs... After init.
1572 12:42:01.940773 Root Device: enabled 1
1573 12:42:01.943513 CPU_CLUSTER: 0: enabled 1
1574 12:42:01.946606 DOMAIN: 0000: enabled 1
1575 12:42:01.946704 APIC: 00: enabled 1
1576 12:42:01.950016 PCI: 00:00.0: enabled 1
1577 12:42:01.953524 PCI: 00:02.0: enabled 1
1578 12:42:01.956798 PCI: 00:04.0: enabled 0
1579 12:42:01.956899 PCI: 00:05.0: enabled 0
1580 12:42:01.959958 PCI: 00:12.0: enabled 1
1581 12:42:01.963660 PCI: 00:12.5: enabled 0
1582 12:42:01.966910 PCI: 00:12.6: enabled 0
1583 12:42:01.967031 PCI: 00:14.0: enabled 1
1584 12:42:01.969890 PCI: 00:14.1: enabled 0
1585 12:42:01.973290 PCI: 00:14.3: enabled 1
1586 12:42:01.973372 PCI: 00:14.5: enabled 0
1587 12:42:01.976715 PCI: 00:15.0: enabled 1
1588 12:42:01.979890 PCI: 00:15.1: enabled 1
1589 12:42:01.983533 PCI: 00:15.2: enabled 0
1590 12:42:01.983675 PCI: 00:15.3: enabled 0
1591 12:42:01.986342 PCI: 00:16.0: enabled 1
1592 12:42:01.989842 PCI: 00:16.1: enabled 0
1593 12:42:01.993086 PCI: 00:16.2: enabled 0
1594 12:42:01.993163 PCI: 00:16.3: enabled 0
1595 12:42:01.996252 PCI: 00:16.4: enabled 0
1596 12:42:01.999610 PCI: 00:16.5: enabled 0
1597 12:42:02.003162 PCI: 00:17.0: enabled 1
1598 12:42:02.003242 PCI: 00:19.0: enabled 1
1599 12:42:02.006439 PCI: 00:19.1: enabled 0
1600 12:42:02.009719 PCI: 00:19.2: enabled 0
1601 12:42:02.009799 PCI: 00:1a.0: enabled 0
1602 12:42:02.013173 PCI: 00:1c.0: enabled 0
1603 12:42:02.016107 PCI: 00:1c.1: enabled 0
1604 12:42:02.019696 PCI: 00:1c.2: enabled 0
1605 12:42:02.019778 PCI: 00:1c.3: enabled 0
1606 12:42:02.023782 PCI: 00:1c.4: enabled 0
1607 12:42:02.026286 PCI: 00:1c.5: enabled 0
1608 12:42:02.030015 PCI: 00:1c.6: enabled 0
1609 12:42:02.030097 PCI: 00:1c.7: enabled 0
1610 12:42:02.032905 PCI: 00:1d.0: enabled 1
1611 12:42:02.036284 PCI: 00:1d.1: enabled 0
1612 12:42:02.039972 PCI: 00:1d.2: enabled 0
1613 12:42:02.040052 PCI: 00:1d.3: enabled 0
1614 12:42:02.042753 PCI: 00:1d.4: enabled 0
1615 12:42:02.045923 PCI: 00:1d.5: enabled 0
1616 12:42:02.049330 PCI: 00:1e.0: enabled 1
1617 12:42:02.049412 PCI: 00:1e.1: enabled 0
1618 12:42:02.052822 PCI: 00:1e.2: enabled 1
1619 12:42:02.056193 PCI: 00:1e.3: enabled 1
1620 12:42:02.056274 PCI: 00:1f.0: enabled 1
1621 12:42:02.059767 PCI: 00:1f.1: enabled 0
1622 12:42:02.062364 PCI: 00:1f.2: enabled 0
1623 12:42:02.065691 PCI: 00:1f.3: enabled 1
1624 12:42:02.065796 PCI: 00:1f.4: enabled 1
1625 12:42:02.069360 PCI: 00:1f.5: enabled 1
1626 12:42:02.072564 PCI: 00:1f.6: enabled 0
1627 12:42:02.075815 USB0 port 0: enabled 1
1628 12:42:02.075897 I2C: 01:15: enabled 1
1629 12:42:02.079236 I2C: 02:5d: enabled 1
1630 12:42:02.082650 GENERIC: 0.0: enabled 1
1631 12:42:02.082731 I2C: 03:1a: enabled 1
1632 12:42:02.085923 I2C: 03:38: enabled 1
1633 12:42:02.089093 I2C: 03:39: enabled 1
1634 12:42:02.089175 I2C: 03:3a: enabled 1
1635 12:42:02.092400 I2C: 03:3b: enabled 1
1636 12:42:02.095639 PCI: 00:00.0: enabled 1
1637 12:42:02.095735 SPI: 00: enabled 1
1638 12:42:02.099203 SPI: 01: enabled 1
1639 12:42:02.102162 PNP: 0c09.0: enabled 1
1640 12:42:02.102243 USB2 port 0: enabled 1
1641 12:42:02.105805 USB2 port 1: enabled 1
1642 12:42:02.108822 USB2 port 2: enabled 0
1643 12:42:02.108920 USB2 port 3: enabled 0
1644 12:42:02.112166 USB2 port 5: enabled 0
1645 12:42:02.115729 USB2 port 6: enabled 1
1646 12:42:02.119006 USB2 port 9: enabled 1
1647 12:42:02.119087 USB3 port 0: enabled 1
1648 12:42:02.122191 USB3 port 1: enabled 1
1649 12:42:02.125641 USB3 port 2: enabled 1
1650 12:42:02.125722 USB3 port 3: enabled 1
1651 12:42:02.128808 USB3 port 4: enabled 0
1652 12:42:02.132020 APIC: 02: enabled 1
1653 12:42:02.132115 APIC: 06: enabled 1
1654 12:42:02.135531 APIC: 01: enabled 1
1655 12:42:02.138720 APIC: 03: enabled 1
1656 12:42:02.138801 APIC: 07: enabled 1
1657 12:42:02.142098 APIC: 05: enabled 1
1658 12:42:02.142179 APIC: 04: enabled 1
1659 12:42:02.145619 PCI: 00:08.0: enabled 1
1660 12:42:02.148890 PCI: 00:14.2: enabled 1
1661 12:42:02.152195 PCI: 01:00.0: enabled 1
1662 12:42:02.155675 Disabling ACPI via APMC:
1663 12:42:02.155756 done.
1664 12:42:02.161964 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 12:42:02.165283 ELOG: NV offset 0xaf0000 size 0x4000
1666 12:42:02.172101 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 12:42:02.178845 ELOG: Event(17) added with size 13 at 2023-08-30 12:40:55 UTC
1668 12:42:02.185289 POST: Unexpected post code in previous boot: 0x73
1669 12:42:02.191908 ELOG: Event(A3) added with size 11 at 2023-08-30 12:40:55 UTC
1670 12:42:02.198376 ELOG: Event(A6) added with size 13 at 2023-08-30 12:40:55 UTC
1671 12:42:02.205170 ELOG: Event(92) added with size 9 at 2023-08-30 12:40:55 UTC
1672 12:42:02.208634 ELOG: Event(93) added with size 9 at 2023-08-30 12:40:55 UTC
1673 12:42:02.215221 ELOG: Event(9A) added with size 9 at 2023-08-30 12:40:55 UTC
1674 12:42:02.222021 ELOG: Event(9E) added with size 10 at 2023-08-30 12:40:55 UTC
1675 12:42:02.229001 ELOG: Event(9F) added with size 14 at 2023-08-30 12:40:55 UTC
1676 12:42:02.235030 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1677 12:42:02.241837 ELOG: Event(A1) added with size 10 at 2023-08-30 12:40:55 UTC
1678 12:42:02.248170 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1679 12:42:02.255405 ELOG: Event(A0) added with size 9 at 2023-08-30 12:40:55 UTC
1680 12:42:02.258345 elog_add_boot_reason: Logged dev mode boot
1681 12:42:02.261696 Finalize devices...
1682 12:42:02.265014 PCI: 00:17.0 final
1683 12:42:02.265095 Devices finalized
1684 12:42:02.271820 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1685 12:42:02.274735 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1686 12:42:02.281603 ME: HFSTS1 : 0x90000245
1687 12:42:02.284984 ME: HFSTS2 : 0x3B850126
1688 12:42:02.288017 ME: HFSTS3 : 0x00000020
1689 12:42:02.291261 ME: HFSTS4 : 0x00004800
1690 12:42:02.297957 ME: HFSTS5 : 0x00000000
1691 12:42:02.301239 ME: HFSTS6 : 0x40400006
1692 12:42:02.304709 ME: Manufacturing Mode : NO
1693 12:42:02.308052 ME: FW Partition Table : OK
1694 12:42:02.311339 ME: Bringup Loader Failure : NO
1695 12:42:02.314783 ME: Firmware Init Complete : YES
1696 12:42:02.317657 ME: Boot Options Present : NO
1697 12:42:02.321213 ME: Update In Progress : NO
1698 12:42:02.324475 ME: D0i3 Support : YES
1699 12:42:02.327946 ME: Low Power State Enabled : NO
1700 12:42:02.331364 ME: CPU Replaced : NO
1701 12:42:02.334573 ME: CPU Replacement Valid : YES
1702 12:42:02.338329 ME: Current Working State : 5
1703 12:42:02.341143 ME: Current Operation State : 1
1704 12:42:02.344241 ME: Current Operation Mode : 0
1705 12:42:02.347496 ME: Error Code : 0
1706 12:42:02.350858 ME: CPU Debug Disabled : YES
1707 12:42:02.354607 ME: TXT Support : NO
1708 12:42:02.357766 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1709 12:42:02.364373 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1710 12:42:02.367584 CBFS @ c08000 size 3f8000
1711 12:42:02.374038 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1712 12:42:02.377288 CBFS: Locating 'fallback/dsdt.aml'
1713 12:42:02.380763 CBFS: Found @ offset 10bb80 size 3fa5
1714 12:42:02.383973 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1715 12:42:02.387650 CBFS @ c08000 size 3f8000
1716 12:42:02.394118 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1717 12:42:02.397194 CBFS: Locating 'fallback/slic'
1718 12:42:02.400755 CBFS: 'fallback/slic' not found.
1719 12:42:02.407265 ACPI: Writing ACPI tables at 99b3e000.
1720 12:42:02.407347 ACPI: * FACS
1721 12:42:02.410647 ACPI: * DSDT
1722 12:42:02.414011 Ramoops buffer: 0x100000@0x99a3d000.
1723 12:42:02.417069 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1724 12:42:02.424015 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1725 12:42:02.427038 Google Chrome EC: version:
1726 12:42:02.430631 ro: helios_v2.0.2659-56403530b
1727 12:42:02.434040 rw: helios_v2.0.2849-c41de27e7d
1728 12:42:02.434138 running image: 1
1729 12:42:02.438220 ACPI: * FADT
1730 12:42:02.438331 SCI is IRQ9
1731 12:42:02.444421 ACPI: added table 1/32, length now 40
1732 12:42:02.444530 ACPI: * SSDT
1733 12:42:02.447725 Found 1 CPU(s) with 8 core(s) each.
1734 12:42:02.450972 Error: Could not locate 'wifi_sar' in VPD.
1735 12:42:02.457722 Checking CBFS for default SAR values
1736 12:42:02.460911 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1737 12:42:02.464793 CBFS @ c08000 size 3f8000
1738 12:42:02.470924 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1739 12:42:02.474086 CBFS: Locating 'wifi_sar_defaults.hex'
1740 12:42:02.477687 CBFS: Found @ offset 5fac0 size 77
1741 12:42:02.481093 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1742 12:42:02.487881 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1743 12:42:02.490771 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1744 12:42:02.497610 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1745 12:42:02.500728 failed to find key in VPD: dsm_calib_r0_0
1746 12:42:02.510932 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1747 12:42:02.514320 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1748 12:42:02.517498 failed to find key in VPD: dsm_calib_r0_1
1749 12:42:02.527423 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1750 12:42:02.533773 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1751 12:42:02.536960 failed to find key in VPD: dsm_calib_r0_2
1752 12:42:02.547262 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1753 12:42:02.550422 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1754 12:42:02.557181 failed to find key in VPD: dsm_calib_r0_3
1755 12:42:02.563480 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1756 12:42:02.570373 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1757 12:42:02.573758 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1758 12:42:02.576737 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1759 12:42:02.580615 EC returned error result code 1
1760 12:42:02.584579 EC returned error result code 1
1761 12:42:02.588402 EC returned error result code 1
1762 12:42:02.594897 PS2K: Bad resp from EC. Vivaldi disabled!
1763 12:42:02.598137 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1764 12:42:02.604899 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1765 12:42:02.611335 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1766 12:42:02.614810 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1767 12:42:02.621684 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1768 12:42:02.628146 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1769 12:42:02.634417 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1770 12:42:02.637759 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1771 12:42:02.644388 ACPI: added table 2/32, length now 44
1772 12:42:02.644470 ACPI: * MCFG
1773 12:42:02.648114 ACPI: added table 3/32, length now 48
1774 12:42:02.651493 ACPI: * TPM2
1775 12:42:02.654826 TPM2 log created at 99a2d000
1776 12:42:02.658018 ACPI: added table 4/32, length now 52
1777 12:42:02.658138 ACPI: * MADT
1778 12:42:02.660905 SCI is IRQ9
1779 12:42:02.664525 ACPI: added table 5/32, length now 56
1780 12:42:02.664631 current = 99b43ac0
1781 12:42:02.667753 ACPI: * DMAR
1782 12:42:02.671266 ACPI: added table 6/32, length now 60
1783 12:42:02.674689 ACPI: * IGD OpRegion
1784 12:42:02.674769 GMA: Found VBT in CBFS
1785 12:42:02.678016 GMA: Found valid VBT in CBFS
1786 12:42:02.680875 ACPI: added table 7/32, length now 64
1787 12:42:02.684269 ACPI: * HPET
1788 12:42:02.687799 ACPI: added table 8/32, length now 68
1789 12:42:02.687963 ACPI: done.
1790 12:42:02.691242 ACPI tables: 31744 bytes.
1791 12:42:02.694541 smbios_write_tables: 99a2c000
1792 12:42:02.697815 EC returned error result code 3
1793 12:42:02.701450 Couldn't obtain OEM name from CBI
1794 12:42:02.704540 Create SMBIOS type 17
1795 12:42:02.707771 PCI: 00:00.0 (Intel Cannonlake)
1796 12:42:02.711209 PCI: 00:14.3 (Intel WiFi)
1797 12:42:02.714354 SMBIOS tables: 939 bytes.
1798 12:42:02.717708 Writing table forward entry at 0x00000500
1799 12:42:02.724515 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1800 12:42:02.727756 Writing coreboot table at 0x99b62000
1801 12:42:02.734047 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1802 12:42:02.737513 1. 0000000000001000-000000000009ffff: RAM
1803 12:42:02.740734 2. 00000000000a0000-00000000000fffff: RESERVED
1804 12:42:02.747690 3. 0000000000100000-0000000099a2bfff: RAM
1805 12:42:02.750694 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1806 12:42:02.757357 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1807 12:42:02.764232 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1808 12:42:02.767206 7. 000000009a000000-000000009f7fffff: RESERVED
1809 12:42:02.773889 8. 00000000e0000000-00000000efffffff: RESERVED
1810 12:42:02.777163 9. 00000000fc000000-00000000fc000fff: RESERVED
1811 12:42:02.783810 10. 00000000fe000000-00000000fe00ffff: RESERVED
1812 12:42:02.787024 11. 00000000fed10000-00000000fed17fff: RESERVED
1813 12:42:02.790322 12. 00000000fed80000-00000000fed83fff: RESERVED
1814 12:42:02.797056 13. 00000000fed90000-00000000fed91fff: RESERVED
1815 12:42:02.800418 14. 00000000feda0000-00000000feda1fff: RESERVED
1816 12:42:02.807313 15. 0000000100000000-000000045e7fffff: RAM
1817 12:42:02.810181 Graphics framebuffer located at 0xc0000000
1818 12:42:02.813231 Passing 5 GPIOs to payload:
1819 12:42:02.816571 NAME | PORT | POLARITY | VALUE
1820 12:42:02.823481 write protect | undefined | high | low
1821 12:42:02.830442 lid | undefined | high | high
1822 12:42:02.833301 power | undefined | high | low
1823 12:42:02.840208 oprom | undefined | high | low
1824 12:42:02.843206 EC in RW | 0x000000cb | high | low
1825 12:42:02.846586 Board ID: 4
1826 12:42:02.849741 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1827 12:42:02.853400 CBFS @ c08000 size 3f8000
1828 12:42:02.859946 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1829 12:42:02.866455 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1830 12:42:02.866537 coreboot table: 1492 bytes.
1831 12:42:02.869887 IMD ROOT 0. 99fff000 00001000
1832 12:42:02.873219 IMD SMALL 1. 99ffe000 00001000
1833 12:42:02.876493 FSP MEMORY 2. 99c4e000 003b0000
1834 12:42:02.879912 CONSOLE 3. 99c2e000 00020000
1835 12:42:02.883206 FMAP 4. 99c2d000 0000054e
1836 12:42:02.886845 TIME STAMP 5. 99c2c000 00000910
1837 12:42:02.889501 VBOOT WORK 6. 99c18000 00014000
1838 12:42:02.892866 MRC DATA 7. 99c16000 00001958
1839 12:42:02.896295 ROMSTG STCK 8. 99c15000 00001000
1840 12:42:02.899725 AFTER CAR 9. 99c0b000 0000a000
1841 12:42:02.903020 RAMSTAGE 10. 99baf000 0005c000
1842 12:42:02.906699 REFCODE 11. 99b7a000 00035000
1843 12:42:02.909802 SMM BACKUP 12. 99b6a000 00010000
1844 12:42:02.913297 COREBOOT 13. 99b62000 00008000
1845 12:42:02.916322 ACPI 14. 99b3e000 00024000
1846 12:42:02.919857 ACPI GNVS 15. 99b3d000 00001000
1847 12:42:02.923151 RAMOOPS 16. 99a3d000 00100000
1848 12:42:02.926284 TPM2 TCGLOG17. 99a2d000 00010000
1849 12:42:02.929385 SMBIOS 18. 99a2c000 00000800
1850 12:42:02.932877 IMD small region:
1851 12:42:02.936174 IMD ROOT 0. 99ffec00 00000400
1852 12:42:02.939468 FSP RUNTIME 1. 99ffebe0 00000004
1853 12:42:02.943400 EC HOSTEVENT 2. 99ffebc0 00000008
1854 12:42:02.945973 POWER STATE 3. 99ffeb80 00000040
1855 12:42:02.949670 ROMSTAGE 4. 99ffeb60 00000004
1856 12:42:02.952847 MEM INFO 5. 99ffe9a0 000001b9
1857 12:42:02.956259 VPD 6. 99ffe920 0000006c
1858 12:42:02.959473 MTRR: Physical address space:
1859 12:42:02.965890 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1860 12:42:02.972916 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1861 12:42:02.979563 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1862 12:42:02.985709 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1863 12:42:02.992305 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1864 12:42:02.999013 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1865 12:42:03.005673 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1866 12:42:03.009039 MTRR: Fixed MSR 0x250 0x0606060606060606
1867 12:42:03.012766 MTRR: Fixed MSR 0x258 0x0606060606060606
1868 12:42:03.015786 MTRR: Fixed MSR 0x259 0x0000000000000000
1869 12:42:03.022005 MTRR: Fixed MSR 0x268 0x0606060606060606
1870 12:42:03.025394 MTRR: Fixed MSR 0x269 0x0606060606060606
1871 12:42:03.028853 MTRR: Fixed MSR 0x26a 0x0606060606060606
1872 12:42:03.032219 MTRR: Fixed MSR 0x26b 0x0606060606060606
1873 12:42:03.035695 MTRR: Fixed MSR 0x26c 0x0606060606060606
1874 12:42:03.042144 MTRR: Fixed MSR 0x26d 0x0606060606060606
1875 12:42:03.045161 MTRR: Fixed MSR 0x26e 0x0606060606060606
1876 12:42:03.048693 MTRR: Fixed MSR 0x26f 0x0606060606060606
1877 12:42:03.052171 call enable_fixed_mtrr()
1878 12:42:03.055211 CPU physical address size: 39 bits
1879 12:42:03.061620 MTRR: default type WB/UC MTRR counts: 6/8.
1880 12:42:03.065043 MTRR: WB selected as default type.
1881 12:42:03.071596 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1882 12:42:03.075260 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1883 12:42:03.081923 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1884 12:42:03.088100 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1885 12:42:03.094799 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1886 12:42:03.101650 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1887 12:42:03.108177 MTRR: Fixed MSR 0x250 0x0606060606060606
1888 12:42:03.111147 MTRR: Fixed MSR 0x258 0x0606060606060606
1889 12:42:03.114337 MTRR: Fixed MSR 0x259 0x0000000000000000
1890 12:42:03.117830 MTRR: Fixed MSR 0x268 0x0606060606060606
1891 12:42:03.121389 MTRR: Fixed MSR 0x269 0x0606060606060606
1892 12:42:03.127847 MTRR: Fixed MSR 0x26a 0x0606060606060606
1893 12:42:03.131267 MTRR: Fixed MSR 0x26b 0x0606060606060606
1894 12:42:03.134700 MTRR: Fixed MSR 0x26c 0x0606060606060606
1895 12:42:03.137546 MTRR: Fixed MSR 0x26d 0x0606060606060606
1896 12:42:03.144479 MTRR: Fixed MSR 0x26e 0x0606060606060606
1897 12:42:03.147463 MTRR: Fixed MSR 0x26f 0x0606060606060606
1898 12:42:03.147539
1899 12:42:03.147625 MTRR check
1900 12:42:03.150827 Fixed MTRRs : Enabled
1901 12:42:03.154214 Variable MTRRs: Enabled
1902 12:42:03.154295
1903 12:42:03.157798 call enable_fixed_mtrr()
1904 12:42:03.161605 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1905 12:42:03.164237 CPU physical address size: 39 bits
1906 12:42:03.171214 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1907 12:42:03.175429 MTRR: Fixed MSR 0x250 0x0606060606060606
1908 12:42:03.177974 MTRR: Fixed MSR 0x250 0x0606060606060606
1909 12:42:03.184446 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 12:42:03.187733 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 12:42:03.191351 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 12:42:03.194685 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 12:42:03.201053 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 12:42:03.204579 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 12:42:03.207842 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 12:42:03.210852 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 12:42:03.214597 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 12:42:03.220878 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 12:42:03.224291 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 12:42:03.227681 call enable_fixed_mtrr()
1921 12:42:03.231229 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 12:42:03.234511 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 12:42:03.240685 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 12:42:03.244367 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 12:42:03.247514 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 12:42:03.250607 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 12:42:03.253972 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 12:42:03.260441 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 12:42:03.263990 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 12:42:03.267105 CPU physical address size: 39 bits
1931 12:42:03.270241 call enable_fixed_mtrr()
1932 12:42:03.273583 MTRR: Fixed MSR 0x250 0x0606060606060606
1933 12:42:03.277082 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 12:42:03.283882 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 12:42:03.286674 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 12:42:03.290337 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 12:42:03.293821 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 12:42:03.300709 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 12:42:03.303382 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 12:42:03.307439 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 12:42:03.310270 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 12:42:03.316791 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 12:42:03.320254 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 12:42:03.323612 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 12:42:03.326965 call enable_fixed_mtrr()
1946 12:42:03.329759 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 12:42:03.333527 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 12:42:03.340022 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 12:42:03.343322 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 12:42:03.346834 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 12:42:03.349695 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 12:42:03.356721 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 12:42:03.359754 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 12:42:03.363128 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 12:42:03.366553 CPU physical address size: 39 bits
1956 12:42:03.369930 call enable_fixed_mtrr()
1957 12:42:03.373256 CPU physical address size: 39 bits
1958 12:42:03.376816 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 12:42:03.382724 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 12:42:03.386570 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 12:42:03.389395 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 12:42:03.392853 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 12:42:03.396253 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 12:42:03.402693 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 12:42:03.406032 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 12:42:03.409502 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 12:42:03.412505 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 12:42:03.419561 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 12:42:03.422768 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 12:42:03.426186 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 12:42:03.429405 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 12:42:03.435900 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 12:42:03.439480 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 12:42:03.442667 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 12:42:03.445670 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 12:42:03.452647 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 12:42:03.455574 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 12:42:03.459119 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 12:42:03.462375 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 12:42:03.465836 call enable_fixed_mtrr()
1981 12:42:03.469155 call enable_fixed_mtrr()
1982 12:42:03.472280 CPU physical address size: 39 bits
1983 12:42:03.475866 CPU physical address size: 39 bits
1984 12:42:03.478832 CPU physical address size: 39 bits
1985 12:42:03.482282 CBFS @ c08000 size 3f8000
1986 12:42:03.488921 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1987 12:42:03.492394 CBFS: Locating 'fallback/payload'
1988 12:42:03.495211 CBFS: Found @ offset 1c96c0 size 3f798
1989 12:42:03.502198 Checking segment from ROM address 0xffdd16f8
1990 12:42:03.505696 Checking segment from ROM address 0xffdd1714
1991 12:42:03.508473 Loading segment from ROM address 0xffdd16f8
1992 12:42:03.511973 code (compression=0)
1993 12:42:03.521784 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1994 12:42:03.528362 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1995 12:42:03.531943 it's not compressed!
1996 12:42:03.623567 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1997 12:42:03.629937 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1998 12:42:03.633437 Loading segment from ROM address 0xffdd1714
1999 12:42:03.636911 Entry Point 0x30000000
2000 12:42:03.639928 Loaded segments
2001 12:42:03.645601 Finalizing chipset.
2002 12:42:03.649116 Finalizing SMM.
2003 12:42:03.652263 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2004 12:42:03.656014 mp_park_aps done after 0 msecs.
2005 12:42:03.662300 Jumping to boot code at 30000000(99b62000)
2006 12:42:03.669120 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2007 12:42:03.669205
2008 12:42:03.669294
2009 12:42:03.669373
2010 12:42:03.672164 Starting depthcharge on Helios...
2011 12:42:03.672248
2012 12:42:03.672603 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2013 12:42:03.672714 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2014 12:42:03.672806 Setting prompt string to ['hatch:']
2015 12:42:03.672904 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2016 12:42:03.681917 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2017 12:42:03.682003
2018 12:42:03.688480 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2019 12:42:03.688562
2020 12:42:03.695610 board_setup: Info: eMMC controller not present; skipping
2021 12:42:03.695705
2022 12:42:03.698469 New NVMe Controller 0x30053ac0 @ 00:1d:00
2023 12:42:03.698551
2024 12:42:03.704945 board_setup: Info: SDHCI controller not present; skipping
2025 12:42:03.705026
2026 12:42:03.711556 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2027 12:42:03.711685
2028 12:42:03.711751 Wipe memory regions:
2029 12:42:03.711811
2030 12:42:03.714949 [0x00000000001000, 0x000000000a0000)
2031 12:42:03.715047
2032 12:42:03.718525 [0x00000000100000, 0x00000030000000)
2033 12:42:03.784558
2034 12:42:03.788135 [0x00000030657430, 0x00000099a2c000)
2035 12:42:03.925363
2036 12:42:03.928545 [0x00000100000000, 0x0000045e800000)
2037 12:42:05.311604
2038 12:42:05.311782 R8152: Initializing
2039 12:42:05.311850
2040 12:42:05.314822 Version 9 (ocp_data = 6010)
2041 12:42:05.318967
2042 12:42:05.319048 R8152: Done initializing
2043 12:42:05.319113
2044 12:42:05.322599 Adding net device
2045 12:42:05.805992
2046 12:42:05.806593 R8152: Initializing
2047 12:42:05.807177
2048 12:42:05.808685 Version 6 (ocp_data = 5c30)
2049 12:42:05.809270
2050 12:42:05.811708 R8152: Done initializing
2051 12:42:05.811805
2052 12:42:05.815178 net_add_device: Attemp to include the same device
2053 12:42:05.821334
2054 12:42:05.824806 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2055 12:42:05.824966
2056 12:42:05.825038
2057 12:42:05.825104
2058 12:42:05.825424 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2060 12:42:05.926071 hatch: tftpboot 192.168.201.1 11383487/tftp-deploy-ppacpx61/kernel/bzImage 11383487/tftp-deploy-ppacpx61/kernel/cmdline 11383487/tftp-deploy-ppacpx61/ramdisk/ramdisk.cpio.gz
2061 12:42:05.926760 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2062 12:42:05.927314 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2063 12:42:05.932124 tftpboot 192.168.201.1 11383487/tftp-deploy-ppacpx61/kernel/bzIploy-ppacpx61/kernel/cmdline 11383487/tftp-deploy-ppacpx61/ramdisk/ramdisk.cpio.gz
2064 12:42:05.932610
2065 12:42:05.932969 Waiting for link
2066 12:42:06.132756
2067 12:42:06.133289 done.
2068 12:42:06.133649
2069 12:42:06.133987 MAC: 00:24:32:50:19:be
2070 12:42:06.134411
2071 12:42:06.135817 Sending DHCP discover... done.
2072 12:42:06.136278
2073 12:42:06.139366 Waiting for reply... done.
2074 12:42:06.139926
2075 12:42:06.142588 Sending DHCP request... done.
2076 12:42:06.143044
2077 12:42:06.149240 Waiting for reply... done.
2078 12:42:06.149777
2079 12:42:06.150234 My ip is 192.168.201.15
2080 12:42:06.150578
2081 12:42:06.152624 The DHCP server ip is 192.168.201.1
2082 12:42:06.153039
2083 12:42:06.158728 TFTP server IP predefined by user: 192.168.201.1
2084 12:42:06.159147
2085 12:42:06.165593 Bootfile predefined by user: 11383487/tftp-deploy-ppacpx61/kernel/bzImage
2086 12:42:06.166084
2087 12:42:06.169512 Sending tftp read request... done.
2088 12:42:06.170047
2089 12:42:06.178035 Waiting for the transfer...
2090 12:42:06.178454
2091 12:42:06.888607 00000000 ################################################################
2092 12:42:06.889109
2093 12:42:07.586182 00080000 ################################################################
2094 12:42:07.586799
2095 12:42:08.291404 00100000 ################################################################
2096 12:42:08.292009
2097 12:42:08.992825 00180000 ################################################################
2098 12:42:08.993367
2099 12:42:09.663455 00200000 ################################################################
2100 12:42:09.664006
2101 12:42:10.354865 00280000 ################################################################
2102 12:42:10.355003
2103 12:42:10.917605 00300000 ################################################################
2104 12:42:10.917762
2105 12:42:11.482645 00380000 ################################################################
2106 12:42:11.482822
2107 12:42:12.070181 00400000 ################################################################
2108 12:42:12.070331
2109 12:42:12.661695 00480000 ################################################################
2110 12:42:12.661845
2111 12:42:13.260253 00500000 ################################################################
2112 12:42:13.260397
2113 12:42:13.862890 00580000 ################################################################
2114 12:42:13.863040
2115 12:42:14.457967 00600000 ################################################################
2116 12:42:14.458119
2117 12:42:15.056732 00680000 ################################################################
2118 12:42:15.056882
2119 12:42:15.649225 00700000 ################################################################
2120 12:42:15.649369
2121 12:42:16.311797 00780000 ################################################################
2122 12:42:16.311961
2123 12:42:16.428907 00800000 ############# done.
2124 12:42:16.429355
2125 12:42:16.432221 The bootfile was 8490896 bytes long.
2126 12:42:16.432610
2127 12:42:16.435515 Sending tftp read request... done.
2128 12:42:16.435894
2129 12:42:16.438777 Waiting for the transfer...
2130 12:42:16.439157
2131 12:42:17.104393 00000000 ################################################################
2132 12:42:17.104946
2133 12:42:17.812064 00080000 ################################################################
2134 12:42:17.812576
2135 12:42:18.529048 00100000 ################################################################
2136 12:42:18.529577
2137 12:42:19.262431 00180000 ################################################################
2138 12:42:19.263013
2139 12:42:19.985337 00200000 ################################################################
2140 12:42:19.985883
2141 12:42:20.713349 00280000 ################################################################
2142 12:42:20.713861
2143 12:42:21.434646 00300000 ################################################################
2144 12:42:21.435138
2145 12:42:22.161253 00380000 ################################################################
2146 12:42:22.161821
2147 12:42:22.886399 00400000 ################################################################
2148 12:42:22.887088
2149 12:42:23.579005 00480000 ################################################################
2150 12:42:23.579528
2151 12:42:24.262679 00500000 ############################################################### done.
2152 12:42:24.263173
2153 12:42:24.266309 Sending tftp read request... done.
2154 12:42:24.266723
2155 12:42:24.269429 Waiting for the transfer...
2156 12:42:24.269842
2157 12:42:24.270170 00000000 # done.
2158 12:42:24.270480
2159 12:42:24.279168 Command line loaded dynamically from TFTP file: 11383487/tftp-deploy-ppacpx61/kernel/cmdline
2160 12:42:24.279713
2161 12:42:24.309317 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11383487/extract-nfsrootfs-6lxd_6l0,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2162 12:42:24.309762
2163 12:42:24.315743 ec_init(0): CrosEC protocol v3 supported (256, 256)
2164 12:42:24.318865
2165 12:42:24.322548 Shutting down all USB controllers.
2166 12:42:24.322958
2167 12:42:24.323283 Removing current net device
2168 12:42:24.326309
2169 12:42:24.326724 Finalizing coreboot
2170 12:42:24.327054
2171 12:42:24.332401 Exiting depthcharge with code 4 at timestamp: 28014399
2172 12:42:24.332692
2173 12:42:24.332922
2174 12:42:24.333136 Starting kernel ...
2175 12:42:24.333344
2176 12:42:24.333545
2177 12:42:24.334381 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2178 12:42:24.334724 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2179 12:42:24.334985 Setting prompt string to ['Linux version [0-9]']
2180 12:42:24.335231 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2181 12:42:24.335508 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2183 12:46:45.335782 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2185 12:46:45.336859 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2187 12:46:45.337690 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2190 12:46:45.339258 end: 2 depthcharge-action (duration 00:05:00) [common]
2192 12:46:45.340172 Cleaning after the job
2193 12:46:45.340261 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383487/tftp-deploy-ppacpx61/ramdisk
2194 12:46:45.341152 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383487/tftp-deploy-ppacpx61/kernel
2195 12:46:45.342552 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383487/tftp-deploy-ppacpx61/nfsrootfs
2196 12:46:45.418952 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383487/tftp-deploy-ppacpx61/modules
2197 12:46:45.423515 start: 5.1 power-off (timeout 00:00:30) [common]
2198 12:46:45.423742 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2199 12:46:45.502692 >> Command sent successfully.
2200 12:46:45.508687 Returned 0 in 0 seconds
2201 12:46:45.609819 end: 5.1 power-off (duration 00:00:00) [common]
2203 12:46:45.611709 start: 5.2 read-feedback (timeout 00:10:00) [common]
2204 12:46:45.613063 Listened to connection for namespace 'common' for up to 1s
2206 12:46:45.614366 Listened to connection for namespace 'common' for up to 1s
2207 12:46:46.613759 Finalising connection for namespace 'common'
2208 12:46:46.614451 Disconnecting from shell: Finalise
2209 12:46:46.614847
2210 12:46:46.716061 end: 5.2 read-feedback (duration 00:00:01) [common]
2211 12:46:46.716675 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11383487
2212 12:46:47.024049 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11383487
2213 12:46:47.024237 JobError: Your job cannot terminate cleanly.