Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 12:40:21.456112 lava-dispatcher, installed at version: 2023.06
2 12:40:21.456327 start: 0 validate
3 12:40:21.456501 Start time: 2023-08-30 12:40:21.456490+00:00 (UTC)
4 12:40:21.456649 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:40:21.456848 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:40:21.728410 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:40:21.729249 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:40:24.739051 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:40:24.739786 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:40:25.010236 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:40:25.010935 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1637-g085b4ca13c9a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:40:25.549157 validate duration: 4.09
14 12:40:25.549616 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:40:25.549802 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:40:25.549967 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:40:25.550197 Not decompressing ramdisk as can be used compressed.
18 12:40:25.550365 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 12:40:25.550490 saving as /var/lib/lava/dispatcher/tmp/11383507/tftp-deploy-4i3yzla1/ramdisk/initrd.cpio.gz
20 12:40:25.550616 total size: 5432690 (5 MB)
21 12:40:25.552316 progress 0 % (0 MB)
22 12:40:25.555019 progress 5 % (0 MB)
23 12:40:25.557221 progress 10 % (0 MB)
24 12:40:25.559274 progress 15 % (0 MB)
25 12:40:25.561565 progress 20 % (1 MB)
26 12:40:25.563415 progress 25 % (1 MB)
27 12:40:25.565230 progress 30 % (1 MB)
28 12:40:25.567115 progress 35 % (1 MB)
29 12:40:25.568730 progress 40 % (2 MB)
30 12:40:25.570336 progress 45 % (2 MB)
31 12:40:25.571925 progress 50 % (2 MB)
32 12:40:25.573573 progress 55 % (2 MB)
33 12:40:25.575034 progress 60 % (3 MB)
34 12:40:25.576493 progress 65 % (3 MB)
35 12:40:25.578102 progress 70 % (3 MB)
36 12:40:25.579498 progress 75 % (3 MB)
37 12:40:25.580936 progress 80 % (4 MB)
38 12:40:25.582326 progress 85 % (4 MB)
39 12:40:25.583974 progress 90 % (4 MB)
40 12:40:25.585647 progress 95 % (4 MB)
41 12:40:25.587290 progress 100 % (5 MB)
42 12:40:25.587541 5 MB downloaded in 0.04 s (140.30 MB/s)
43 12:40:25.587709 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:40:25.587983 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:40:25.588071 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:40:25.588155 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:40:25.588291 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:40:25.588367 saving as /var/lib/lava/dispatcher/tmp/11383507/tftp-deploy-4i3yzla1/kernel/bzImage
50 12:40:25.588429 total size: 8490896 (8 MB)
51 12:40:25.588506 No compression specified
52 12:40:25.591241 progress 0 % (0 MB)
53 12:40:25.593497 progress 5 % (0 MB)
54 12:40:25.595846 progress 10 % (0 MB)
55 12:40:25.598160 progress 15 % (1 MB)
56 12:40:25.600469 progress 20 % (1 MB)
57 12:40:25.602790 progress 25 % (2 MB)
58 12:40:25.605110 progress 30 % (2 MB)
59 12:40:25.607380 progress 35 % (2 MB)
60 12:40:25.609705 progress 40 % (3 MB)
61 12:40:25.611972 progress 45 % (3 MB)
62 12:40:25.614293 progress 50 % (4 MB)
63 12:40:25.616591 progress 55 % (4 MB)
64 12:40:25.618867 progress 60 % (4 MB)
65 12:40:25.621153 progress 65 % (5 MB)
66 12:40:25.623372 progress 70 % (5 MB)
67 12:40:25.625640 progress 75 % (6 MB)
68 12:40:25.627852 progress 80 % (6 MB)
69 12:40:25.630131 progress 85 % (6 MB)
70 12:40:25.632385 progress 90 % (7 MB)
71 12:40:25.634661 progress 95 % (7 MB)
72 12:40:25.636984 progress 100 % (8 MB)
73 12:40:25.637103 8 MB downloaded in 0.05 s (166.38 MB/s)
74 12:40:25.637249 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:40:25.637552 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:40:25.637701 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:40:25.637794 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:40:25.637934 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 12:40:25.638002 saving as /var/lib/lava/dispatcher/tmp/11383507/tftp-deploy-4i3yzla1/nfsrootfs/full.rootfs.tar
81 12:40:25.638063 total size: 133380384 (127 MB)
82 12:40:25.638125 Using unxz to decompress xz
83 12:40:25.642421 progress 0 % (0 MB)
84 12:40:25.992611 progress 5 % (6 MB)
85 12:40:26.349652 progress 10 % (12 MB)
86 12:40:26.640862 progress 15 % (19 MB)
87 12:40:26.828831 progress 20 % (25 MB)
88 12:40:27.087325 progress 25 % (31 MB)
89 12:40:27.437197 progress 30 % (38 MB)
90 12:40:27.783156 progress 35 % (44 MB)
91 12:40:28.187032 progress 40 % (50 MB)
92 12:40:28.574196 progress 45 % (57 MB)
93 12:40:28.936009 progress 50 % (63 MB)
94 12:40:29.313418 progress 55 % (69 MB)
95 12:40:29.677936 progress 60 % (76 MB)
96 12:40:30.043596 progress 65 % (82 MB)
97 12:40:30.408557 progress 70 % (89 MB)
98 12:40:30.775201 progress 75 % (95 MB)
99 12:40:31.212254 progress 80 % (101 MB)
100 12:40:31.672124 progress 85 % (108 MB)
101 12:40:31.938410 progress 90 % (114 MB)
102 12:40:32.282868 progress 95 % (120 MB)
103 12:40:32.673771 progress 100 % (127 MB)
104 12:40:32.679120 127 MB downloaded in 7.04 s (18.07 MB/s)
105 12:40:32.679365 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:40:32.679708 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:40:32.679799 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:40:32.679887 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:40:32.680043 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1637-g085b4ca13c9a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:40:32.680118 saving as /var/lib/lava/dispatcher/tmp/11383507/tftp-deploy-4i3yzla1/modules/modules.tar
112 12:40:32.680180 total size: 250888 (0 MB)
113 12:40:32.680245 Using unxz to decompress xz
114 12:40:32.684361 progress 13 % (0 MB)
115 12:40:32.684813 progress 26 % (0 MB)
116 12:40:32.685051 progress 39 % (0 MB)
117 12:40:32.686624 progress 52 % (0 MB)
118 12:40:32.688450 progress 65 % (0 MB)
119 12:40:32.690310 progress 78 % (0 MB)
120 12:40:32.692170 progress 91 % (0 MB)
121 12:40:32.693891 progress 100 % (0 MB)
122 12:40:32.699362 0 MB downloaded in 0.02 s (12.48 MB/s)
123 12:40:32.699603 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:40:32.699865 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:40:32.699955 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 12:40:32.700053 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 12:40:34.859872 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11383507/extract-nfsrootfs-1wejg6w2
129 12:40:34.860065 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 12:40:34.860167 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 12:40:34.860331 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6
132 12:40:34.860461 makedir: /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin
133 12:40:34.860561 makedir: /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/tests
134 12:40:34.860658 makedir: /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/results
135 12:40:34.860800 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-add-keys
136 12:40:34.860942 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-add-sources
137 12:40:34.861069 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-background-process-start
138 12:40:34.861195 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-background-process-stop
139 12:40:34.861322 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-common-functions
140 12:40:34.861446 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-echo-ipv4
141 12:40:34.861569 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-install-packages
142 12:40:34.861693 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-installed-packages
143 12:40:34.861815 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-os-build
144 12:40:34.861938 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-probe-channel
145 12:40:34.862061 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-probe-ip
146 12:40:34.862184 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-target-ip
147 12:40:34.862306 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-target-mac
148 12:40:34.862430 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-target-storage
149 12:40:34.862555 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-test-case
150 12:40:34.862681 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-test-event
151 12:40:34.862804 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-test-feedback
152 12:40:34.862927 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-test-raise
153 12:40:34.863050 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-test-reference
154 12:40:34.863174 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-test-runner
155 12:40:34.863300 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-test-set
156 12:40:34.863423 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-test-shell
157 12:40:34.863548 Updating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-install-packages (oe)
158 12:40:34.863700 Updating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/bin/lava-installed-packages (oe)
159 12:40:34.863823 Creating /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/environment
160 12:40:34.863917 LAVA metadata
161 12:40:34.863987 - LAVA_JOB_ID=11383507
162 12:40:34.864049 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:40:34.864147 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 12:40:34.864212 skipped lava-vland-overlay
165 12:40:34.864285 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:40:34.864361 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 12:40:34.864421 skipped lava-multinode-overlay
168 12:40:34.864491 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:40:34.864572 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 12:40:34.864643 Loading test definitions
171 12:40:34.864771 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 12:40:34.864839 Using /lava-11383507 at stage 0
173 12:40:34.865184 uuid=11383507_1.5.2.3.1 testdef=None
174 12:40:34.865270 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 12:40:34.865353 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 12:40:34.865850 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 12:40:34.866065 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 12:40:34.866685 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 12:40:34.866907 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 12:40:34.867515 runner path: /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/0/tests/0_dmesg test_uuid 11383507_1.5.2.3.1
183 12:40:34.867667 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 12:40:34.867883 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 12:40:34.867952 Using /lava-11383507 at stage 1
187 12:40:34.868245 uuid=11383507_1.5.2.3.5 testdef=None
188 12:40:34.868330 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 12:40:34.868412 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 12:40:34.868998 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 12:40:34.869207 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 12:40:34.869833 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 12:40:34.870057 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 12:40:34.870669 runner path: /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/1/tests/1_bootrr test_uuid 11383507_1.5.2.3.5
197 12:40:34.870818 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 12:40:34.871047 Creating lava-test-runner.conf files
200 12:40:34.871152 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/0 for stage 0
201 12:40:34.871252 - 0_dmesg
202 12:40:34.871329 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11383507/lava-overlay-zgpil9l6/lava-11383507/1 for stage 1
203 12:40:34.871420 - 1_bootrr
204 12:40:34.871512 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 12:40:34.871596 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 12:40:34.878890 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 12:40:34.878990 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 12:40:34.879074 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 12:40:34.879158 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 12:40:34.879241 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 12:40:35.015946 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 12:40:35.016337 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
213 12:40:35.016457 extracting modules file /var/lib/lava/dispatcher/tmp/11383507/tftp-deploy-4i3yzla1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11383507/extract-nfsrootfs-1wejg6w2
214 12:40:35.029776 extracting modules file /var/lib/lava/dispatcher/tmp/11383507/tftp-deploy-4i3yzla1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11383507/extract-overlay-ramdisk-lr4bxl1n/ramdisk
215 12:40:35.043034 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 12:40:35.043176 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
217 12:40:35.043266 [common] Applying overlay to NFS
218 12:40:35.043337 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11383507/compress-overlay-zqrtavz7/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11383507/extract-nfsrootfs-1wejg6w2
219 12:40:35.051565 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 12:40:35.051677 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 12:40:35.051764 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 12:40:35.051851 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 12:40:35.051926 Building ramdisk /var/lib/lava/dispatcher/tmp/11383507/extract-overlay-ramdisk-lr4bxl1n/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11383507/extract-overlay-ramdisk-lr4bxl1n/ramdisk
224 12:40:35.121786 >> 26159 blocks
225 12:40:35.649429 rename /var/lib/lava/dispatcher/tmp/11383507/extract-overlay-ramdisk-lr4bxl1n/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11383507/tftp-deploy-4i3yzla1/ramdisk/ramdisk.cpio.gz
226 12:40:35.649866 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 12:40:35.649993 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 12:40:35.650091 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 12:40:35.650189 No mkimage arch provided, not using FIT.
230 12:40:35.650280 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 12:40:35.650364 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 12:40:35.650468 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 12:40:35.650560 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 12:40:35.650640 No LXC device requested
235 12:40:35.650716 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 12:40:35.650797 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 12:40:35.650878 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 12:40:35.650947 Checking files for TFTP limit of 4294967296 bytes.
239 12:40:35.651349 end: 1 tftp-deploy (duration 00:00:10) [common]
240 12:40:35.651455 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 12:40:35.651542 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 12:40:35.651661 substitutions:
243 12:40:35.651726 - {DTB}: None
244 12:40:35.651785 - {INITRD}: 11383507/tftp-deploy-4i3yzla1/ramdisk/ramdisk.cpio.gz
245 12:40:35.651842 - {KERNEL}: 11383507/tftp-deploy-4i3yzla1/kernel/bzImage
246 12:40:35.651897 - {LAVA_MAC}: None
247 12:40:35.651951 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11383507/extract-nfsrootfs-1wejg6w2
248 12:40:35.652006 - {NFS_SERVER_IP}: 192.168.201.1
249 12:40:35.652059 - {PRESEED_CONFIG}: None
250 12:40:35.652113 - {PRESEED_LOCAL}: None
251 12:40:35.652166 - {RAMDISK}: 11383507/tftp-deploy-4i3yzla1/ramdisk/ramdisk.cpio.gz
252 12:40:35.652218 - {ROOT_PART}: None
253 12:40:35.652271 - {ROOT}: None
254 12:40:35.652323 - {SERVER_IP}: 192.168.201.1
255 12:40:35.652375 - {TEE}: None
256 12:40:35.652427 Parsed boot commands:
257 12:40:35.652493 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 12:40:35.652696 Parsed boot commands: tftpboot 192.168.201.1 11383507/tftp-deploy-4i3yzla1/kernel/bzImage 11383507/tftp-deploy-4i3yzla1/kernel/cmdline 11383507/tftp-deploy-4i3yzla1/ramdisk/ramdisk.cpio.gz
259 12:40:35.652811 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 12:40:35.652893 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 12:40:35.652983 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 12:40:35.653068 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 12:40:35.653136 Not connected, no need to disconnect.
264 12:40:35.653208 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 12:40:35.653287 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 12:40:35.653351 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-0'
267 12:40:35.657441 Setting prompt string to ['lava-test: # ']
268 12:40:35.657785 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 12:40:35.657892 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 12:40:35.657987 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 12:40:35.658118 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 12:40:35.658349 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
273 12:40:40.812040 >> Command sent successfully.
274 12:40:40.818051 Returned 0 in 5 seconds
275 12:40:40.918831 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 12:40:40.920416 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 12:40:40.921039 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 12:40:40.921532 Setting prompt string to 'Starting depthcharge on Voema...'
280 12:40:40.921902 Changing prompt to 'Starting depthcharge on Voema...'
281 12:40:40.922363 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 12:40:40.923663 [Enter `^Ec?' for help]
283 12:40:42.528419
284 12:40:42.529018
285 12:40:42.538470 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 12:40:42.542107 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 12:40:42.549334 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 12:40:42.551991 CPU: AES supported, TXT NOT supported, VT supported
289 12:40:42.558216 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 12:40:42.564701 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 12:40:42.568164 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 12:40:42.571499 VBOOT: Loading verstage.
293 12:40:42.575180 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 12:40:42.581634 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 12:40:42.584811 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 12:40:42.595406 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 12:40:42.602331 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 12:40:42.602914
299 12:40:42.603292
300 12:40:42.614952 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 12:40:42.629099 Probing TPM: . done!
302 12:40:42.632846 TPM ready after 0 ms
303 12:40:42.635966 Connected to device vid:did:rid of 1ae0:0028:00
304 12:40:42.647414 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
305 12:40:42.653937 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 12:40:42.656913 Initialized TPM device CR50 revision 0
307 12:40:42.706859 tlcl_send_startup: Startup return code is 0
308 12:40:42.707427 TPM: setup succeeded
309 12:40:42.721355 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 12:40:42.736226 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 12:40:42.748128 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 12:40:42.758278 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 12:40:42.761858 Chrome EC: UHEPI supported
314 12:40:42.765353 Phase 1
315 12:40:42.768948 FMAP: area GBB found @ 1805000 (458752 bytes)
316 12:40:42.778953 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 12:40:42.785419 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 12:40:42.791670 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 12:40:42.798606 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 12:40:42.801476 Recovery requested (1009000e)
321 12:40:42.805095 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 12:40:42.816520 tlcl_extend: response is 0
323 12:40:42.823830 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 12:40:42.833542 tlcl_extend: response is 0
325 12:40:42.839865 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 12:40:42.846332 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 12:40:42.853285 BS: verstage times (exec / console): total (unknown) / 142 ms
328 12:40:42.853715
329 12:40:42.854052
330 12:40:42.866804 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 12:40:42.873026 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 12:40:42.876389 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 12:40:42.879977 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 12:40:42.887150 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 12:40:42.890192 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 12:40:42.893389 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 12:40:42.896199 TCO_STS: 0000 0000
338 12:40:42.900186 GEN_PMCON: d0015038 00002200
339 12:40:42.904213 GBLRST_CAUSE: 00000000 00000000
340 12:40:42.904645 HPR_CAUSE0: 00000000
341 12:40:42.906352 prev_sleep_state 5
342 12:40:42.909528 Boot Count incremented to 23175
343 12:40:42.915964 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 12:40:42.923115 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 12:40:42.929114 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 12:40:42.936090 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 12:40:42.940765 Chrome EC: UHEPI supported
348 12:40:42.947621 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 12:40:42.960071 Probing TPM: done!
350 12:40:42.966795 Connected to device vid:did:rid of 1ae0:0028:00
351 12:40:42.978186 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
352 12:40:42.984400 Initialized TPM device CR50 revision 0
353 12:40:42.994503 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 12:40:43.001216 MRC: Hash idx 0x100b comparison successful.
355 12:40:43.004328 MRC cache found, size faa8
356 12:40:43.004864 bootmode is set to: 2
357 12:40:43.007349 SPD index = 0
358 12:40:43.014494 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 12:40:43.017235 SPD: module type is LPDDR4X
360 12:40:43.021111 SPD: module part number is MT53E512M64D4NW-046
361 12:40:43.027201 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 12:40:43.030947 SPD: device width 16 bits, bus width 16 bits
363 12:40:43.036954 SPD: module size is 1024 MB (per channel)
364 12:40:43.470509 CBMEM:
365 12:40:43.473855 IMD: root @ 0x76fff000 254 entries.
366 12:40:43.476830 IMD: root @ 0x76ffec00 62 entries.
367 12:40:43.480350 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 12:40:43.486705 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 12:40:43.490063 External stage cache:
370 12:40:43.493461 IMD: root @ 0x7b3ff000 254 entries.
371 12:40:43.496612 IMD: root @ 0x7b3fec00 62 entries.
372 12:40:43.511979 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 12:40:43.518275 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 12:40:43.525149 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 12:40:43.539432 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 12:40:43.545832 cse_lite: Skip switching to RW in the recovery path
377 12:40:43.546260 8 DIMMs found
378 12:40:43.546718 SMM Memory Map
379 12:40:43.549100 SMRAM : 0x7b000000 0x800000
380 12:40:43.553336 Subregion 0: 0x7b000000 0x200000
381 12:40:43.557210 Subregion 1: 0x7b200000 0x200000
382 12:40:43.560879 Subregion 2: 0x7b400000 0x400000
383 12:40:43.564011 top_of_ram = 0x77000000
384 12:40:43.570047 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 12:40:43.573801 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 12:40:43.580190 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 12:40:43.583985 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 12:40:43.590192 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 12:40:43.597159 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 12:40:43.608812 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 12:40:43.615399 Processing 211 relocs. Offset value of 0x74c0b000
392 12:40:43.621922 BS: romstage times (exec / console): total (unknown) / 277 ms
393 12:40:43.627884
394 12:40:43.628359
395 12:40:43.638696 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 12:40:43.641635 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 12:40:43.651618 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 12:40:43.657829 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 12:40:43.664320 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 12:40:43.670961 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 12:40:43.718335 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 12:40:43.725149 Processing 5008 relocs. Offset value of 0x75d98000
403 12:40:43.728103 BS: postcar times (exec / console): total (unknown) / 59 ms
404 12:40:43.731685
405 12:40:43.732246
406 12:40:43.741446 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 12:40:43.742036 Normal boot
408 12:40:43.744897 FW_CONFIG value is 0x804c02
409 12:40:43.748756 PCI: 00:07.0 disabled by fw_config
410 12:40:43.752177 PCI: 00:07.1 disabled by fw_config
411 12:40:43.755484 PCI: 00:0d.2 disabled by fw_config
412 12:40:43.759160 PCI: 00:1c.7 disabled by fw_config
413 12:40:43.765220 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 12:40:43.771822 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 12:40:43.776731 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 12:40:43.778740 GENERIC: 0.0 disabled by fw_config
417 12:40:43.781940 GENERIC: 1.0 disabled by fw_config
418 12:40:43.788877 fw_config match found: DB_USB=USB3_ACTIVE
419 12:40:43.792200 fw_config match found: DB_USB=USB3_ACTIVE
420 12:40:43.795304 fw_config match found: DB_USB=USB3_ACTIVE
421 12:40:43.801926 fw_config match found: DB_USB=USB3_ACTIVE
422 12:40:43.805026 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 12:40:43.811634 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 12:40:43.822015 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 12:40:43.828723 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 12:40:43.831835 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 12:40:43.838440 microcode: Update skipped, already up-to-date
428 12:40:43.845265 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 12:40:43.871993 Detected 4 core, 8 thread CPU.
430 12:40:43.875472 Setting up SMI for CPU
431 12:40:43.878836 IED base = 0x7b400000
432 12:40:43.879267 IED size = 0x00400000
433 12:40:43.882016 Will perform SMM setup.
434 12:40:43.888970 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 12:40:43.895024 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 12:40:43.901889 Processing 16 relocs. Offset value of 0x00030000
437 12:40:43.905124 Attempting to start 7 APs
438 12:40:43.908449 Waiting for 10ms after sending INIT.
439 12:40:43.924599 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 12:40:43.925162 done.
441 12:40:43.927524 AP: slot 3 apic_id 7.
442 12:40:43.930688 AP: slot 7 apic_id 6.
443 12:40:43.931122 AP: slot 2 apic_id 2.
444 12:40:43.934052 AP: slot 6 apic_id 3.
445 12:40:43.937339 Waiting for 2nd SIPI to complete...done.
446 12:40:43.940770 AP: slot 5 apic_id 4.
447 12:40:43.944193 AP: slot 4 apic_id 5.
448 12:40:43.950427 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 12:40:43.957405 Processing 13 relocs. Offset value of 0x00038000
450 12:40:43.957904 Unable to locate Global NVS
451 12:40:43.967266 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 12:40:43.970553 Installing permanent SMM handler to 0x7b000000
453 12:40:43.980762 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 12:40:43.984353 Processing 794 relocs. Offset value of 0x7b010000
455 12:40:43.993862 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 12:40:43.996849 Processing 13 relocs. Offset value of 0x7b008000
457 12:40:44.003759 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 12:40:44.010817 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 12:40:44.013797 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 12:40:44.020174 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 12:40:44.027040 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 12:40:44.033823 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 12:40:44.040109 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 12:40:44.040547 Unable to locate Global NVS
465 12:40:44.049992 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 12:40:44.053192 Clearing SMI status registers
467 12:40:44.053621 SMI_STS: PM1
468 12:40:44.057393 PM1_STS: PWRBTN
469 12:40:44.063478 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 12:40:44.067315 In relocation handler: CPU 0
471 12:40:44.070671 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 12:40:44.077128 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 12:40:44.077561 Relocation complete.
474 12:40:44.086724 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 12:40:44.087222 In relocation handler: CPU 1
476 12:40:44.093536 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 12:40:44.093970 Relocation complete.
478 12:40:44.103242 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
479 12:40:44.103677 In relocation handler: CPU 2
480 12:40:44.110318 New SMBASE=0x7afff800 IEDBASE=0x7b400000
481 12:40:44.113556 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 12:40:44.117612 Relocation complete.
483 12:40:44.123885 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
484 12:40:44.126710 In relocation handler: CPU 6
485 12:40:44.129700 New SMBASE=0x7affe800 IEDBASE=0x7b400000
486 12:40:44.133728 Relocation complete.
487 12:40:44.140100 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
488 12:40:44.143369 In relocation handler: CPU 7
489 12:40:44.146846 New SMBASE=0x7affe400 IEDBASE=0x7b400000
490 12:40:44.153161 Writing SMRR. base = 0x7b000006, mask=0xff800c00
491 12:40:44.153780 Relocation complete.
492 12:40:44.160619 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
493 12:40:44.163133 In relocation handler: CPU 3
494 12:40:44.166433 New SMBASE=0x7afff400 IEDBASE=0x7b400000
495 12:40:44.169658 Relocation complete.
496 12:40:44.176366 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
497 12:40:44.180910 In relocation handler: CPU 5
498 12:40:44.183305 New SMBASE=0x7affec00 IEDBASE=0x7b400000
499 12:40:44.190105 Writing SMRR. base = 0x7b000006, mask=0xff800c00
500 12:40:44.192951 Relocation complete.
501 12:40:44.199404 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
502 12:40:44.203174 In relocation handler: CPU 4
503 12:40:44.206908 New SMBASE=0x7afff000 IEDBASE=0x7b400000
504 12:40:44.207339 Relocation complete.
505 12:40:44.209497 Initializing CPU #0
506 12:40:44.212973 CPU: vendor Intel device 806c1
507 12:40:44.217289 CPU: family 06, model 8c, stepping 01
508 12:40:44.221207 Clearing out pending MCEs
509 12:40:44.224393 Setting up local APIC...
510 12:40:44.224852 apic_id: 0x00 done.
511 12:40:44.227689 Turbo is available but hidden
512 12:40:44.231708 Turbo is available and visible
513 12:40:44.234328 microcode: Update skipped, already up-to-date
514 12:40:44.237832 CPU #0 initialized
515 12:40:44.240524 Initializing CPU #4
516 12:40:44.241023 Initializing CPU #5
517 12:40:44.243999 CPU: vendor Intel device 806c1
518 12:40:44.248088 CPU: family 06, model 8c, stepping 01
519 12:40:44.251020 CPU: vendor Intel device 806c1
520 12:40:44.253847 CPU: family 06, model 8c, stepping 01
521 12:40:44.257304 Clearing out pending MCEs
522 12:40:44.260914 Clearing out pending MCEs
523 12:40:44.264130 Setting up local APIC...
524 12:40:44.264554 Initializing CPU #1
525 12:40:44.267387 Initializing CPU #3
526 12:40:44.270635 Initializing CPU #7
527 12:40:44.273885 CPU: vendor Intel device 806c1
528 12:40:44.277467 CPU: family 06, model 8c, stepping 01
529 12:40:44.280854 CPU: vendor Intel device 806c1
530 12:40:44.284050 CPU: family 06, model 8c, stepping 01
531 12:40:44.287089 Clearing out pending MCEs
532 12:40:44.287510 Initializing CPU #6
533 12:40:44.290297 Initializing CPU #2
534 12:40:44.294343 CPU: vendor Intel device 806c1
535 12:40:44.296902 CPU: family 06, model 8c, stepping 01
536 12:40:44.300623 CPU: vendor Intel device 806c1
537 12:40:44.304041 CPU: family 06, model 8c, stepping 01
538 12:40:44.307069 Clearing out pending MCEs
539 12:40:44.310781 apic_id: 0x05 done.
540 12:40:44.311267 Setting up local APIC...
541 12:40:44.314278 CPU: vendor Intel device 806c1
542 12:40:44.317526 CPU: family 06, model 8c, stepping 01
543 12:40:44.323525 microcode: Update skipped, already up-to-date
544 12:40:44.324088 apic_id: 0x04 done.
545 12:40:44.327457 CPU #4 initialized
546 12:40:44.330448 microcode: Update skipped, already up-to-date
547 12:40:44.334391 Clearing out pending MCEs
548 12:40:44.336917 Setting up local APIC...
549 12:40:44.340186 Clearing out pending MCEs
550 12:40:44.344016 Clearing out pending MCEs
551 12:40:44.344439 CPU #5 initialized
552 12:40:44.346650 Setting up local APIC...
553 12:40:44.350352 Setting up local APIC...
554 12:40:44.350777 Setting up local APIC...
555 12:40:44.353715 apic_id: 0x06 done.
556 12:40:44.357029 apic_id: 0x07 done.
557 12:40:44.360637 microcode: Update skipped, already up-to-date
558 12:40:44.363813 microcode: Update skipped, already up-to-date
559 12:40:44.367379 CPU #7 initialized
560 12:40:44.369941 CPU #3 initialized
561 12:40:44.370363 apic_id: 0x01 done.
562 12:40:44.373760 apic_id: 0x02 done.
563 12:40:44.376892 Setting up local APIC...
564 12:40:44.380372 microcode: Update skipped, already up-to-date
565 12:40:44.384061 microcode: Update skipped, already up-to-date
566 12:40:44.387123 apic_id: 0x03 done.
567 12:40:44.390628 CPU #1 initialized
568 12:40:44.393361 microcode: Update skipped, already up-to-date
569 12:40:44.397506 CPU #2 initialized
570 12:40:44.397935 CPU #6 initialized
571 12:40:44.400290 bsp_do_flight_plan done after 459 msecs.
572 12:40:44.403403 CPU: frequency set to 4000 MHz
573 12:40:44.406741 Enabling SMIs.
574 12:40:44.413272 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 12:40:44.428737 SATAXPCIE1 indicates PCIe NVMe is present
576 12:40:44.432325 Probing TPM: done!
577 12:40:44.435712 Connected to device vid:did:rid of 1ae0:0028:00
578 12:40:44.446100 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
579 12:40:44.449773 Initialized TPM device CR50 revision 0
580 12:40:44.452967 Enabling S0i3.4
581 12:40:44.459269 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 12:40:44.462798 Found a VBT of 8704 bytes after decompression
583 12:40:44.469451 cse_lite: CSE RO boot. HybridStorageMode disabled
584 12:40:44.476084 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 12:40:44.551666 FSPS returned 0
586 12:40:44.554700 Executing Phase 1 of FspMultiPhaseSiInit
587 12:40:44.564699 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 12:40:44.567990 port C0 DISC req: usage 1 usb3 1 usb2 5
589 12:40:44.571999 Raw Buffer output 0 00000511
590 12:40:44.575348 Raw Buffer output 1 00000000
591 12:40:44.578377 pmc_send_ipc_cmd succeeded
592 12:40:44.585149 port C1 DISC req: usage 1 usb3 2 usb2 3
593 12:40:44.585614 Raw Buffer output 0 00000321
594 12:40:44.588345 Raw Buffer output 1 00000000
595 12:40:44.592439 pmc_send_ipc_cmd succeeded
596 12:40:44.597925 Detected 4 core, 8 thread CPU.
597 12:40:44.601963 Detected 4 core, 8 thread CPU.
598 12:40:44.834694 Display FSP Version Info HOB
599 12:40:44.838219 Reference Code - CPU = a.0.4c.31
600 12:40:44.842021 uCode Version = 0.0.0.86
601 12:40:44.844556 TXT ACM version = ff.ff.ff.ffff
602 12:40:44.847979 Reference Code - ME = a.0.4c.31
603 12:40:44.851431 MEBx version = 0.0.0.0
604 12:40:44.854624 ME Firmware Version = Consumer SKU
605 12:40:44.857971 Reference Code - PCH = a.0.4c.31
606 12:40:44.861440 PCH-CRID Status = Disabled
607 12:40:44.864544 PCH-CRID Original Value = ff.ff.ff.ffff
608 12:40:44.867936 PCH-CRID New Value = ff.ff.ff.ffff
609 12:40:44.871558 OPROM - RST - RAID = ff.ff.ff.ffff
610 12:40:44.874670 PCH Hsio Version = 4.0.0.0
611 12:40:44.878791 Reference Code - SA - System Agent = a.0.4c.31
612 12:40:44.881449 Reference Code - MRC = 2.0.0.1
613 12:40:44.884491 SA - PCIe Version = a.0.4c.31
614 12:40:44.887921 SA-CRID Status = Disabled
615 12:40:44.892141 SA-CRID Original Value = 0.0.0.1
616 12:40:44.894621 SA-CRID New Value = 0.0.0.1
617 12:40:44.898568 OPROM - VBIOS = ff.ff.ff.ffff
618 12:40:44.901247 IO Manageability Engine FW Version = 11.1.4.0
619 12:40:44.905014 PHY Build Version = 0.0.0.e0
620 12:40:44.908371 Thunderbolt(TM) FW Version = 0.0.0.0
621 12:40:44.914690 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 12:40:44.917790 ITSS IRQ Polarities Before:
623 12:40:44.918222 IPC0: 0xffffffff
624 12:40:44.921677 IPC1: 0xffffffff
625 12:40:44.922102 IPC2: 0xffffffff
626 12:40:44.924916 IPC3: 0xffffffff
627 12:40:44.928020 ITSS IRQ Polarities After:
628 12:40:44.928447 IPC0: 0xffffffff
629 12:40:44.931634 IPC1: 0xffffffff
630 12:40:44.932057 IPC2: 0xffffffff
631 12:40:44.934637 IPC3: 0xffffffff
632 12:40:44.938120 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 12:40:44.951244 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 12:40:44.961359 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 12:40:44.974531 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 12:40:44.981082 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
637 12:40:44.981521 Enumerating buses...
638 12:40:44.987809 Show all devs... Before device enumeration.
639 12:40:44.988254 Root Device: enabled 1
640 12:40:44.991815 DOMAIN: 0000: enabled 1
641 12:40:44.994453 CPU_CLUSTER: 0: enabled 1
642 12:40:44.997882 PCI: 00:00.0: enabled 1
643 12:40:44.998344 PCI: 00:02.0: enabled 1
644 12:40:45.000972 PCI: 00:04.0: enabled 1
645 12:40:45.004158 PCI: 00:05.0: enabled 1
646 12:40:45.007957 PCI: 00:06.0: enabled 0
647 12:40:45.008401 PCI: 00:07.0: enabled 0
648 12:40:45.010743 PCI: 00:07.1: enabled 0
649 12:40:45.014091 PCI: 00:07.2: enabled 0
650 12:40:45.018154 PCI: 00:07.3: enabled 0
651 12:40:45.018626 PCI: 00:08.0: enabled 1
652 12:40:45.021087 PCI: 00:09.0: enabled 0
653 12:40:45.025083 PCI: 00:0a.0: enabled 0
654 12:40:45.028093 PCI: 00:0d.0: enabled 1
655 12:40:45.028518 PCI: 00:0d.1: enabled 0
656 12:40:45.031968 PCI: 00:0d.2: enabled 0
657 12:40:45.034144 PCI: 00:0d.3: enabled 0
658 12:40:45.037287 PCI: 00:0e.0: enabled 0
659 12:40:45.037715 PCI: 00:10.2: enabled 1
660 12:40:45.040497 PCI: 00:10.6: enabled 0
661 12:40:45.044126 PCI: 00:10.7: enabled 0
662 12:40:45.047366 PCI: 00:12.0: enabled 0
663 12:40:45.047796 PCI: 00:12.6: enabled 0
664 12:40:45.050748 PCI: 00:13.0: enabled 0
665 12:40:45.054395 PCI: 00:14.0: enabled 1
666 12:40:45.054823 PCI: 00:14.1: enabled 0
667 12:40:45.057212 PCI: 00:14.2: enabled 1
668 12:40:45.060700 PCI: 00:14.3: enabled 1
669 12:40:45.065481 PCI: 00:15.0: enabled 1
670 12:40:45.065911 PCI: 00:15.1: enabled 1
671 12:40:45.067068 PCI: 00:15.2: enabled 1
672 12:40:45.070842 PCI: 00:15.3: enabled 1
673 12:40:45.073985 PCI: 00:16.0: enabled 1
674 12:40:45.074414 PCI: 00:16.1: enabled 0
675 12:40:45.077444 PCI: 00:16.2: enabled 0
676 12:40:45.080920 PCI: 00:16.3: enabled 0
677 12:40:45.083941 PCI: 00:16.4: enabled 0
678 12:40:45.084371 PCI: 00:16.5: enabled 0
679 12:40:45.087661 PCI: 00:17.0: enabled 1
680 12:40:45.091075 PCI: 00:19.0: enabled 0
681 12:40:45.091503 PCI: 00:19.1: enabled 1
682 12:40:45.093843 PCI: 00:19.2: enabled 0
683 12:40:45.097670 PCI: 00:1c.0: enabled 1
684 12:40:45.100627 PCI: 00:1c.1: enabled 0
685 12:40:45.101096 PCI: 00:1c.2: enabled 0
686 12:40:45.104296 PCI: 00:1c.3: enabled 0
687 12:40:45.107286 PCI: 00:1c.4: enabled 0
688 12:40:45.111089 PCI: 00:1c.5: enabled 0
689 12:40:45.111519 PCI: 00:1c.6: enabled 1
690 12:40:45.114373 PCI: 00:1c.7: enabled 0
691 12:40:45.117039 PCI: 00:1d.0: enabled 1
692 12:40:45.120659 PCI: 00:1d.1: enabled 0
693 12:40:45.121174 PCI: 00:1d.2: enabled 1
694 12:40:45.123789 PCI: 00:1d.3: enabled 0
695 12:40:45.127711 PCI: 00:1e.0: enabled 1
696 12:40:45.128141 PCI: 00:1e.1: enabled 0
697 12:40:45.131185 PCI: 00:1e.2: enabled 1
698 12:40:45.133615 PCI: 00:1e.3: enabled 1
699 12:40:45.137140 PCI: 00:1f.0: enabled 1
700 12:40:45.137565 PCI: 00:1f.1: enabled 0
701 12:40:45.140774 PCI: 00:1f.2: enabled 1
702 12:40:45.143944 PCI: 00:1f.3: enabled 1
703 12:40:45.147290 PCI: 00:1f.4: enabled 0
704 12:40:45.147720 PCI: 00:1f.5: enabled 1
705 12:40:45.150248 PCI: 00:1f.6: enabled 0
706 12:40:45.153687 PCI: 00:1f.7: enabled 0
707 12:40:45.154121 APIC: 00: enabled 1
708 12:40:45.157266 GENERIC: 0.0: enabled 1
709 12:40:45.160443 GENERIC: 0.0: enabled 1
710 12:40:45.163519 GENERIC: 1.0: enabled 1
711 12:40:45.163950 GENERIC: 0.0: enabled 1
712 12:40:45.166992 GENERIC: 1.0: enabled 1
713 12:40:45.170108 USB0 port 0: enabled 1
714 12:40:45.173530 GENERIC: 0.0: enabled 1
715 12:40:45.173957 USB0 port 0: enabled 1
716 12:40:45.177115 GENERIC: 0.0: enabled 1
717 12:40:45.180266 I2C: 00:1a: enabled 1
718 12:40:45.180736 I2C: 00:31: enabled 1
719 12:40:45.183420 I2C: 00:32: enabled 1
720 12:40:45.186838 I2C: 00:10: enabled 1
721 12:40:45.187269 I2C: 00:15: enabled 1
722 12:40:45.190318 GENERIC: 0.0: enabled 0
723 12:40:45.193413 GENERIC: 1.0: enabled 0
724 12:40:45.197281 GENERIC: 0.0: enabled 1
725 12:40:45.197712 SPI: 00: enabled 1
726 12:40:45.200465 SPI: 00: enabled 1
727 12:40:45.200993 PNP: 0c09.0: enabled 1
728 12:40:45.203735 GENERIC: 0.0: enabled 1
729 12:40:45.207175 USB3 port 0: enabled 1
730 12:40:45.210744 USB3 port 1: enabled 1
731 12:40:45.211323 USB3 port 2: enabled 0
732 12:40:45.214319 USB3 port 3: enabled 0
733 12:40:45.216962 USB2 port 0: enabled 0
734 12:40:45.217391 USB2 port 1: enabled 1
735 12:40:45.220430 USB2 port 2: enabled 1
736 12:40:45.223803 USB2 port 3: enabled 0
737 12:40:45.226971 USB2 port 4: enabled 1
738 12:40:45.227401 USB2 port 5: enabled 0
739 12:40:45.230471 USB2 port 6: enabled 0
740 12:40:45.233697 USB2 port 7: enabled 0
741 12:40:45.234249 USB2 port 8: enabled 0
742 12:40:45.237361 USB2 port 9: enabled 0
743 12:40:45.240048 USB3 port 0: enabled 0
744 12:40:45.240477 USB3 port 1: enabled 1
745 12:40:45.244831 USB3 port 2: enabled 0
746 12:40:45.246989 USB3 port 3: enabled 0
747 12:40:45.250270 GENERIC: 0.0: enabled 1
748 12:40:45.250700 GENERIC: 1.0: enabled 1
749 12:40:45.253516 APIC: 01: enabled 1
750 12:40:45.257077 APIC: 02: enabled 1
751 12:40:45.257507 APIC: 07: enabled 1
752 12:40:45.260219 APIC: 05: enabled 1
753 12:40:45.260647 APIC: 04: enabled 1
754 12:40:45.263458 APIC: 03: enabled 1
755 12:40:45.266804 APIC: 06: enabled 1
756 12:40:45.267234 Compare with tree...
757 12:40:45.270697 Root Device: enabled 1
758 12:40:45.273609 DOMAIN: 0000: enabled 1
759 12:40:45.276939 PCI: 00:00.0: enabled 1
760 12:40:45.277368 PCI: 00:02.0: enabled 1
761 12:40:45.280412 PCI: 00:04.0: enabled 1
762 12:40:45.284137 GENERIC: 0.0: enabled 1
763 12:40:45.287110 PCI: 00:05.0: enabled 1
764 12:40:45.289916 PCI: 00:06.0: enabled 0
765 12:40:45.290344 PCI: 00:07.0: enabled 0
766 12:40:45.293990 GENERIC: 0.0: enabled 1
767 12:40:45.297125 PCI: 00:07.1: enabled 0
768 12:40:45.300178 GENERIC: 1.0: enabled 1
769 12:40:45.303379 PCI: 00:07.2: enabled 0
770 12:40:45.303930 GENERIC: 0.0: enabled 1
771 12:40:45.307116 PCI: 00:07.3: enabled 0
772 12:40:45.310209 GENERIC: 1.0: enabled 1
773 12:40:45.313388 PCI: 00:08.0: enabled 1
774 12:40:45.316953 PCI: 00:09.0: enabled 0
775 12:40:45.317380 PCI: 00:0a.0: enabled 0
776 12:40:45.320179 PCI: 00:0d.0: enabled 1
777 12:40:45.323439 USB0 port 0: enabled 1
778 12:40:45.326892 USB3 port 0: enabled 1
779 12:40:45.329921 USB3 port 1: enabled 1
780 12:40:45.330360 USB3 port 2: enabled 0
781 12:40:45.333545 USB3 port 3: enabled 0
782 12:40:45.336803 PCI: 00:0d.1: enabled 0
783 12:40:45.340012 PCI: 00:0d.2: enabled 0
784 12:40:45.343084 GENERIC: 0.0: enabled 1
785 12:40:45.343511 PCI: 00:0d.3: enabled 0
786 12:40:45.346790 PCI: 00:0e.0: enabled 0
787 12:40:45.350033 PCI: 00:10.2: enabled 1
788 12:40:45.353436 PCI: 00:10.6: enabled 0
789 12:40:45.357068 PCI: 00:10.7: enabled 0
790 12:40:45.357499 PCI: 00:12.0: enabled 0
791 12:40:45.360396 PCI: 00:12.6: enabled 0
792 12:40:45.363587 PCI: 00:13.0: enabled 0
793 12:40:45.366539 PCI: 00:14.0: enabled 1
794 12:40:45.370217 USB0 port 0: enabled 1
795 12:40:45.370646 USB2 port 0: enabled 0
796 12:40:45.373291 USB2 port 1: enabled 1
797 12:40:45.376929 USB2 port 2: enabled 1
798 12:40:45.379980 USB2 port 3: enabled 0
799 12:40:45.383170 USB2 port 4: enabled 1
800 12:40:45.386513 USB2 port 5: enabled 0
801 12:40:45.386944 USB2 port 6: enabled 0
802 12:40:45.390423 USB2 port 7: enabled 0
803 12:40:45.394264 USB2 port 8: enabled 0
804 12:40:45.396722 USB2 port 9: enabled 0
805 12:40:45.399581 USB3 port 0: enabled 0
806 12:40:45.403354 USB3 port 1: enabled 1
807 12:40:45.403972 USB3 port 2: enabled 0
808 12:40:45.406832 USB3 port 3: enabled 0
809 12:40:45.410392 PCI: 00:14.1: enabled 0
810 12:40:45.413398 PCI: 00:14.2: enabled 1
811 12:40:45.416369 PCI: 00:14.3: enabled 1
812 12:40:45.417000 GENERIC: 0.0: enabled 1
813 12:40:45.419834 PCI: 00:15.0: enabled 1
814 12:40:45.423666 I2C: 00:1a: enabled 1
815 12:40:45.426423 I2C: 00:31: enabled 1
816 12:40:45.426853 I2C: 00:32: enabled 1
817 12:40:45.430218 PCI: 00:15.1: enabled 1
818 12:40:45.433070 I2C: 00:10: enabled 1
819 12:40:45.436873 PCI: 00:15.2: enabled 1
820 12:40:45.440167 PCI: 00:15.3: enabled 1
821 12:40:45.440597 PCI: 00:16.0: enabled 1
822 12:40:45.443418 PCI: 00:16.1: enabled 0
823 12:40:45.446299 PCI: 00:16.2: enabled 0
824 12:40:45.449808 PCI: 00:16.3: enabled 0
825 12:40:45.452857 PCI: 00:16.4: enabled 0
826 12:40:45.453288 PCI: 00:16.5: enabled 0
827 12:40:45.456951 PCI: 00:17.0: enabled 1
828 12:40:45.459580 PCI: 00:19.0: enabled 0
829 12:40:45.463699 PCI: 00:19.1: enabled 1
830 12:40:45.464230 I2C: 00:15: enabled 1
831 12:40:45.467625 PCI: 00:19.2: enabled 0
832 12:40:45.470573 PCI: 00:1d.0: enabled 1
833 12:40:45.473917 GENERIC: 0.0: enabled 1
834 12:40:45.474429 PCI: 00:1e.0: enabled 1
835 12:40:45.477980 PCI: 00:1e.1: enabled 0
836 12:40:45.527249 PCI: 00:1e.2: enabled 1
837 12:40:45.527722 SPI: 00: enabled 1
838 12:40:45.528507 PCI: 00:1e.3: enabled 1
839 12:40:45.528988 SPI: 00: enabled 1
840 12:40:45.529425 PCI: 00:1f.0: enabled 1
841 12:40:45.529842 PNP: 0c09.0: enabled 1
842 12:40:45.530256 PCI: 00:1f.1: enabled 0
843 12:40:45.530751 PCI: 00:1f.2: enabled 1
844 12:40:45.531248 GENERIC: 0.0: enabled 1
845 12:40:45.531757 GENERIC: 0.0: enabled 1
846 12:40:45.532169 GENERIC: 1.0: enabled 1
847 12:40:45.532704 PCI: 00:1f.3: enabled 1
848 12:40:45.533126 PCI: 00:1f.4: enabled 0
849 12:40:45.533532 PCI: 00:1f.5: enabled 1
850 12:40:45.533939 PCI: 00:1f.6: enabled 0
851 12:40:45.534336 PCI: 00:1f.7: enabled 0
852 12:40:45.534731 CPU_CLUSTER: 0: enabled 1
853 12:40:45.535222 APIC: 00: enabled 1
854 12:40:45.535716 APIC: 01: enabled 1
855 12:40:45.564041 APIC: 02: enabled 1
856 12:40:45.564515 APIC: 07: enabled 1
857 12:40:45.565013 APIC: 05: enabled 1
858 12:40:45.565450 APIC: 04: enabled 1
859 12:40:45.565883 APIC: 03: enabled 1
860 12:40:45.566296 APIC: 06: enabled 1
861 12:40:45.567029 Root Device scanning...
862 12:40:45.567405 scan_static_bus for Root Device
863 12:40:45.567820 DOMAIN: 0000 enabled
864 12:40:45.568345 CPU_CLUSTER: 0 enabled
865 12:40:45.568887 DOMAIN: 0000 scanning...
866 12:40:45.569299 PCI: pci_scan_bus for bus 00
867 12:40:45.569702 PCI: 00:00.0 [8086/0000] ops
868 12:40:45.570182 PCI: 00:00.0 [8086/9a12] enabled
869 12:40:45.570679 PCI: 00:02.0 [8086/0000] bus ops
870 12:40:45.572030 PCI: 00:02.0 [8086/9a40] enabled
871 12:40:45.574921 PCI: 00:04.0 [8086/0000] bus ops
872 12:40:45.577980 PCI: 00:04.0 [8086/9a03] enabled
873 12:40:45.581538 PCI: 00:05.0 [8086/9a19] enabled
874 12:40:45.585359 PCI: 00:07.0 [0000/0000] hidden
875 12:40:45.588450 PCI: 00:08.0 [8086/9a11] enabled
876 12:40:45.591474 PCI: 00:0a.0 [8086/9a0d] disabled
877 12:40:45.595173 PCI: 00:0d.0 [8086/0000] bus ops
878 12:40:45.598806 PCI: 00:0d.0 [8086/9a13] enabled
879 12:40:45.601603 PCI: 00:14.0 [8086/0000] bus ops
880 12:40:45.605192 PCI: 00:14.0 [8086/a0ed] enabled
881 12:40:45.608285 PCI: 00:14.2 [8086/a0ef] enabled
882 12:40:45.611518 PCI: 00:14.3 [8086/0000] bus ops
883 12:40:45.615442 PCI: 00:14.3 [8086/a0f0] enabled
884 12:40:45.618413 PCI: 00:15.0 [8086/0000] bus ops
885 12:40:45.621870 PCI: 00:15.0 [8086/a0e8] enabled
886 12:40:45.625546 PCI: 00:15.1 [8086/0000] bus ops
887 12:40:45.628401 PCI: 00:15.1 [8086/a0e9] enabled
888 12:40:45.631694 PCI: 00:15.2 [8086/0000] bus ops
889 12:40:45.634950 PCI: 00:15.2 [8086/a0ea] enabled
890 12:40:45.638867 PCI: 00:15.3 [8086/0000] bus ops
891 12:40:45.641767 PCI: 00:15.3 [8086/a0eb] enabled
892 12:40:45.644884 PCI: 00:16.0 [8086/0000] ops
893 12:40:45.648437 PCI: 00:16.0 [8086/a0e0] enabled
894 12:40:45.654756 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 12:40:45.658087 PCI: 00:19.0 [8086/0000] bus ops
896 12:40:45.661249 PCI: 00:19.0 [8086/a0c5] disabled
897 12:40:45.664651 PCI: 00:19.1 [8086/0000] bus ops
898 12:40:45.667673 PCI: 00:19.1 [8086/a0c6] enabled
899 12:40:45.671344 PCI: 00:1d.0 [8086/0000] bus ops
900 12:40:45.674257 PCI: 00:1d.0 [8086/a0b0] enabled
901 12:40:45.674730 PCI: 00:1e.0 [8086/0000] ops
902 12:40:45.677968 PCI: 00:1e.0 [8086/a0a8] enabled
903 12:40:45.681128 PCI: 00:1e.2 [8086/0000] bus ops
904 12:40:45.684463 PCI: 00:1e.2 [8086/a0aa] enabled
905 12:40:45.691610 PCI: 00:1e.3 [8086/0000] bus ops
906 12:40:45.694777 PCI: 00:1e.3 [8086/a0ab] enabled
907 12:40:45.695208 PCI: 00:1f.0 [8086/0000] bus ops
908 12:40:45.698122 PCI: 00:1f.0 [8086/a087] enabled
909 12:40:45.701040 RTC Init
910 12:40:45.704452 Set power on after power failure.
911 12:40:45.704985 Disabling Deep S3
912 12:40:45.707851 Disabling Deep S3
913 12:40:45.711208 Disabling Deep S4
914 12:40:45.711634 Disabling Deep S4
915 12:40:45.714649 Disabling Deep S5
916 12:40:45.715076 Disabling Deep S5
917 12:40:45.718151 PCI: 00:1f.2 [0000/0000] hidden
918 12:40:45.721777 PCI: 00:1f.3 [8086/0000] bus ops
919 12:40:45.724513 PCI: 00:1f.3 [8086/a0c8] enabled
920 12:40:45.727591 PCI: 00:1f.5 [8086/0000] bus ops
921 12:40:45.731440 PCI: 00:1f.5 [8086/a0a4] enabled
922 12:40:45.734809 PCI: Leftover static devices:
923 12:40:45.737821 PCI: 00:10.2
924 12:40:45.738291 PCI: 00:10.6
925 12:40:45.738647 PCI: 00:10.7
926 12:40:45.741178 PCI: 00:06.0
927 12:40:45.741733 PCI: 00:07.1
928 12:40:45.744372 PCI: 00:07.2
929 12:40:45.744837 PCI: 00:07.3
930 12:40:45.747446 PCI: 00:09.0
931 12:40:45.747868 PCI: 00:0d.1
932 12:40:45.748203 PCI: 00:0d.2
933 12:40:45.751407 PCI: 00:0d.3
934 12:40:45.751828 PCI: 00:0e.0
935 12:40:45.754560 PCI: 00:12.0
936 12:40:45.755005 PCI: 00:12.6
937 12:40:45.755403 PCI: 00:13.0
938 12:40:45.757842 PCI: 00:14.1
939 12:40:45.758264 PCI: 00:16.1
940 12:40:45.762471 PCI: 00:16.2
941 12:40:45.762897 PCI: 00:16.3
942 12:40:45.763244 PCI: 00:16.4
943 12:40:45.764289 PCI: 00:16.5
944 12:40:45.764737 PCI: 00:17.0
945 12:40:45.767491 PCI: 00:19.2
946 12:40:45.767928 PCI: 00:1e.1
947 12:40:45.771130 PCI: 00:1f.1
948 12:40:45.771554 PCI: 00:1f.4
949 12:40:45.771890 PCI: 00:1f.6
950 12:40:45.774195 PCI: 00:1f.7
951 12:40:45.777575 PCI: Check your devicetree.cb.
952 12:40:45.778028 PCI: 00:02.0 scanning...
953 12:40:45.784517 scan_generic_bus for PCI: 00:02.0
954 12:40:45.787663 scan_generic_bus for PCI: 00:02.0 done
955 12:40:45.791292 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 12:40:45.794577 PCI: 00:04.0 scanning...
957 12:40:45.798377 scan_generic_bus for PCI: 00:04.0
958 12:40:45.800989 GENERIC: 0.0 enabled
959 12:40:45.804523 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 12:40:45.811233 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 12:40:45.814438 PCI: 00:0d.0 scanning...
962 12:40:45.817873 scan_static_bus for PCI: 00:0d.0
963 12:40:45.818301 USB0 port 0 enabled
964 12:40:45.821496 USB0 port 0 scanning...
965 12:40:45.824509 scan_static_bus for USB0 port 0
966 12:40:45.827702 USB3 port 0 enabled
967 12:40:45.828128 USB3 port 1 enabled
968 12:40:45.831038 USB3 port 2 disabled
969 12:40:45.834203 USB3 port 3 disabled
970 12:40:45.834631 USB3 port 0 scanning...
971 12:40:45.837814 scan_static_bus for USB3 port 0
972 12:40:45.844481 scan_static_bus for USB3 port 0 done
973 12:40:45.847745 scan_bus: bus USB3 port 0 finished in 6 msecs
974 12:40:45.850788 USB3 port 1 scanning...
975 12:40:45.854120 scan_static_bus for USB3 port 1
976 12:40:45.857489 scan_static_bus for USB3 port 1 done
977 12:40:45.860831 scan_bus: bus USB3 port 1 finished in 6 msecs
978 12:40:45.864130 scan_static_bus for USB0 port 0 done
979 12:40:45.871075 scan_bus: bus USB0 port 0 finished in 43 msecs
980 12:40:45.874786 scan_static_bus for PCI: 00:0d.0 done
981 12:40:45.878200 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 12:40:45.881154 PCI: 00:14.0 scanning...
983 12:40:45.885048 scan_static_bus for PCI: 00:14.0
984 12:40:45.887309 USB0 port 0 enabled
985 12:40:45.890676 USB0 port 0 scanning...
986 12:40:45.894143 scan_static_bus for USB0 port 0
987 12:40:45.894572 USB2 port 0 disabled
988 12:40:45.897260 USB2 port 1 enabled
989 12:40:45.897706 USB2 port 2 enabled
990 12:40:45.900769 USB2 port 3 disabled
991 12:40:45.904051 USB2 port 4 enabled
992 12:40:45.904476 USB2 port 5 disabled
993 12:40:45.907072 USB2 port 6 disabled
994 12:40:45.910914 USB2 port 7 disabled
995 12:40:45.911339 USB2 port 8 disabled
996 12:40:45.914082 USB2 port 9 disabled
997 12:40:45.917232 USB3 port 0 disabled
998 12:40:45.917659 USB3 port 1 enabled
999 12:40:45.920230 USB3 port 2 disabled
1000 12:40:45.924261 USB3 port 3 disabled
1001 12:40:45.924784 USB2 port 1 scanning...
1002 12:40:45.926920 scan_static_bus for USB2 port 1
1003 12:40:45.930796 scan_static_bus for USB2 port 1 done
1004 12:40:45.937016 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 12:40:45.941077 USB2 port 2 scanning...
1006 12:40:45.944097 scan_static_bus for USB2 port 2
1007 12:40:45.947043 scan_static_bus for USB2 port 2 done
1008 12:40:45.950267 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 12:40:45.953330 USB2 port 4 scanning...
1010 12:40:45.956905 scan_static_bus for USB2 port 4
1011 12:40:45.960272 scan_static_bus for USB2 port 4 done
1012 12:40:45.963486 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 12:40:45.966856 USB3 port 1 scanning...
1014 12:40:45.969930 scan_static_bus for USB3 port 1
1015 12:40:45.973341 scan_static_bus for USB3 port 1 done
1016 12:40:45.980081 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 12:40:45.983320 scan_static_bus for USB0 port 0 done
1018 12:40:45.987054 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 12:40:45.989955 scan_static_bus for PCI: 00:14.0 done
1020 12:40:45.997035 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1021 12:40:46.000221 PCI: 00:14.3 scanning...
1022 12:40:46.003243 scan_static_bus for PCI: 00:14.3
1023 12:40:46.003672 GENERIC: 0.0 enabled
1024 12:40:46.006631 scan_static_bus for PCI: 00:14.3 done
1025 12:40:46.013253 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 12:40:46.017062 PCI: 00:15.0 scanning...
1027 12:40:46.019800 scan_static_bus for PCI: 00:15.0
1028 12:40:46.020266 I2C: 00:1a enabled
1029 12:40:46.023478 I2C: 00:31 enabled
1030 12:40:46.023899 I2C: 00:32 enabled
1031 12:40:46.029996 scan_static_bus for PCI: 00:15.0 done
1032 12:40:46.033235 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1033 12:40:46.036468 PCI: 00:15.1 scanning...
1034 12:40:46.040876 scan_static_bus for PCI: 00:15.1
1035 12:40:46.041299 I2C: 00:10 enabled
1036 12:40:46.044367 scan_static_bus for PCI: 00:15.1 done
1037 12:40:46.050951 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 12:40:46.054459 PCI: 00:15.2 scanning...
1039 12:40:46.057514 scan_static_bus for PCI: 00:15.2
1040 12:40:46.061174 scan_static_bus for PCI: 00:15.2 done
1041 12:40:46.064047 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 12:40:46.067552 PCI: 00:15.3 scanning...
1043 12:40:46.070669 scan_static_bus for PCI: 00:15.3
1044 12:40:46.074549 scan_static_bus for PCI: 00:15.3 done
1045 12:40:46.081021 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 12:40:46.081443 PCI: 00:19.1 scanning...
1047 12:40:46.084251 scan_static_bus for PCI: 00:19.1
1048 12:40:46.087696 I2C: 00:15 enabled
1049 12:40:46.091152 scan_static_bus for PCI: 00:19.1 done
1050 12:40:46.098021 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 12:40:46.098442 PCI: 00:1d.0 scanning...
1052 12:40:46.101101 do_pci_scan_bridge for PCI: 00:1d.0
1053 12:40:46.103933 PCI: pci_scan_bus for bus 01
1054 12:40:46.107722 PCI: 01:00.0 [1c5c/174a] enabled
1055 12:40:46.110781 GENERIC: 0.0 enabled
1056 12:40:46.113898 Enabling Common Clock Configuration
1057 12:40:46.117373 L1 Sub-State supported from root port 29
1058 12:40:46.120653 L1 Sub-State Support = 0xf
1059 12:40:46.124232 CommonModeRestoreTime = 0x28
1060 12:40:46.127252 Power On Value = 0x16, Power On Scale = 0x0
1061 12:40:46.131017 ASPM: Enabled L1
1062 12:40:46.133983 PCIe: Max_Payload_Size adjusted to 128
1063 12:40:46.140594 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 12:40:46.141077 PCI: 00:1e.2 scanning...
1065 12:40:46.147337 scan_generic_bus for PCI: 00:1e.2
1066 12:40:46.147761 SPI: 00 enabled
1067 12:40:46.153898 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 12:40:46.157744 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 12:40:46.160410 PCI: 00:1e.3 scanning...
1070 12:40:46.163740 scan_generic_bus for PCI: 00:1e.3
1071 12:40:46.167154 SPI: 00 enabled
1072 12:40:46.170431 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 12:40:46.177190 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 12:40:46.181060 PCI: 00:1f.0 scanning...
1075 12:40:46.183962 scan_static_bus for PCI: 00:1f.0
1076 12:40:46.184425 PNP: 0c09.0 enabled
1077 12:40:46.187051 PNP: 0c09.0 scanning...
1078 12:40:46.190433 scan_static_bus for PNP: 0c09.0
1079 12:40:46.193828 scan_static_bus for PNP: 0c09.0 done
1080 12:40:46.200420 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 12:40:46.203372 scan_static_bus for PCI: 00:1f.0 done
1082 12:40:46.207031 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 12:40:46.210409 PCI: 00:1f.2 scanning...
1084 12:40:46.213707 scan_static_bus for PCI: 00:1f.2
1085 12:40:46.216809 GENERIC: 0.0 enabled
1086 12:40:46.217400 GENERIC: 0.0 scanning...
1087 12:40:46.220430 scan_static_bus for GENERIC: 0.0
1088 12:40:46.223680 GENERIC: 0.0 enabled
1089 12:40:46.227173 GENERIC: 1.0 enabled
1090 12:40:46.230582 scan_static_bus for GENERIC: 0.0 done
1091 12:40:46.233869 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 12:40:46.240075 scan_static_bus for PCI: 00:1f.2 done
1093 12:40:46.243610 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 12:40:46.246604 PCI: 00:1f.3 scanning...
1095 12:40:46.250270 scan_static_bus for PCI: 00:1f.3
1096 12:40:46.253541 scan_static_bus for PCI: 00:1f.3 done
1097 12:40:46.257040 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 12:40:46.260195 PCI: 00:1f.5 scanning...
1099 12:40:46.263510 scan_generic_bus for PCI: 00:1f.5
1100 12:40:46.267066 scan_generic_bus for PCI: 00:1f.5 done
1101 12:40:46.273626 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 12:40:46.276732 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1103 12:40:46.280703 scan_static_bus for Root Device done
1104 12:40:46.286684 scan_bus: bus Root Device finished in 737 msecs
1105 12:40:46.287221 done
1106 12:40:46.293169 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 12:40:46.296639 Chrome EC: UHEPI supported
1108 12:40:46.303354 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 12:40:46.310459 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 12:40:46.313329 SPI flash protection: WPSW=0 SRP0=0
1111 12:40:46.317219 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 12:40:46.322771 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1113 12:40:46.326255 found VGA at PCI: 00:02.0
1114 12:40:46.329971 Setting up VGA for PCI: 00:02.0
1115 12:40:46.336364 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 12:40:46.339433 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 12:40:46.343106 Allocating resources...
1118 12:40:46.343526 Reading resources...
1119 12:40:46.349523 Root Device read_resources bus 0 link: 0
1120 12:40:46.352538 DOMAIN: 0000 read_resources bus 0 link: 0
1121 12:40:46.358977 PCI: 00:04.0 read_resources bus 1 link: 0
1122 12:40:46.362521 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 12:40:46.369684 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 12:40:46.372316 USB0 port 0 read_resources bus 0 link: 0
1125 12:40:46.379160 USB0 port 0 read_resources bus 0 link: 0 done
1126 12:40:46.382327 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 12:40:46.385728 PCI: 00:14.0 read_resources bus 0 link: 0
1128 12:40:46.392598 USB0 port 0 read_resources bus 0 link: 0
1129 12:40:46.396306 USB0 port 0 read_resources bus 0 link: 0 done
1130 12:40:46.402620 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 12:40:46.406037 PCI: 00:14.3 read_resources bus 0 link: 0
1132 12:40:46.412522 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 12:40:46.416773 PCI: 00:15.0 read_resources bus 0 link: 0
1134 12:40:46.423384 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 12:40:46.425931 PCI: 00:15.1 read_resources bus 0 link: 0
1136 12:40:46.432592 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 12:40:46.436042 PCI: 00:19.1 read_resources bus 0 link: 0
1138 12:40:46.443296 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 12:40:46.446249 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 12:40:46.452935 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 12:40:46.456334 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 12:40:46.463118 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 12:40:46.466142 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 12:40:46.472991 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 12:40:46.476116 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 12:40:46.483385 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 12:40:46.486345 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 12:40:46.489699 GENERIC: 0.0 read_resources bus 0 link: 0
1149 12:40:46.496471 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 12:40:46.500193 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 12:40:46.507532 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 12:40:46.510710 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 12:40:46.516967 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 12:40:46.520216 Root Device read_resources bus 0 link: 0 done
1155 12:40:46.524143 Done reading resources.
1156 12:40:46.530724 Show resources in subtree (Root Device)...After reading.
1157 12:40:46.533619 Root Device child on link 0 DOMAIN: 0000
1158 12:40:46.536759 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 12:40:46.547371 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 12:40:46.557045 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 12:40:46.560321 PCI: 00:00.0
1162 12:40:46.570158 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 12:40:46.576598 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 12:40:46.586863 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 12:40:46.597118 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 12:40:46.606669 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 12:40:46.616980 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 12:40:46.627359 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 12:40:46.633351 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 12:40:46.643125 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 12:40:46.653046 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 12:40:46.662897 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 12:40:46.672874 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 12:40:46.679382 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 12:40:46.690190 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 12:40:46.699755 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 12:40:46.710318 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 12:40:46.719853 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 12:40:46.729870 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 12:40:46.735809 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 12:40:46.745870 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 12:40:46.749578 PCI: 00:02.0
1183 12:40:46.759156 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 12:40:46.769203 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 12:40:46.781067 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 12:40:46.782447 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 12:40:46.792378 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 12:40:46.796718 GENERIC: 0.0
1189 12:40:46.797152 PCI: 00:05.0
1190 12:40:46.805532 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 12:40:46.812319 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 12:40:46.812775 GENERIC: 0.0
1193 12:40:46.815515 PCI: 00:08.0
1194 12:40:46.825850 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 12:40:46.826347 PCI: 00:0a.0
1196 12:40:46.828855 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 12:40:46.839096 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 12:40:46.845449 USB0 port 0 child on link 0 USB3 port 0
1199 12:40:46.845919 USB3 port 0
1200 12:40:46.849310 USB3 port 1
1201 12:40:46.849809 USB3 port 2
1202 12:40:46.852496 USB3 port 3
1203 12:40:46.855929 PCI: 00:14.0 child on link 0 USB0 port 0
1204 12:40:46.866095 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 12:40:46.868937 USB0 port 0 child on link 0 USB2 port 0
1206 12:40:46.872493 USB2 port 0
1207 12:40:46.875473 USB2 port 1
1208 12:40:46.875888 USB2 port 2
1209 12:40:46.879267 USB2 port 3
1210 12:40:46.879703 USB2 port 4
1211 12:40:46.882124 USB2 port 5
1212 12:40:46.882582 USB2 port 6
1213 12:40:46.885539 USB2 port 7
1214 12:40:46.885957 USB2 port 8
1215 12:40:46.889330 USB2 port 9
1216 12:40:46.889745 USB3 port 0
1217 12:40:46.892309 USB3 port 1
1218 12:40:46.892766 USB3 port 2
1219 12:40:46.895727 USB3 port 3
1220 12:40:46.896136 PCI: 00:14.2
1221 12:40:46.905726 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 12:40:46.915404 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 12:40:46.922164 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 12:40:46.932857 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 12:40:46.933324 GENERIC: 0.0
1226 12:40:46.938683 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 12:40:46.949113 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 12:40:46.949612 I2C: 00:1a
1229 12:40:46.952158 I2C: 00:31
1230 12:40:46.952706 I2C: 00:32
1231 12:40:46.955649 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 12:40:46.965758 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 12:40:46.968426 I2C: 00:10
1234 12:40:46.968986 PCI: 00:15.2
1235 12:40:46.978564 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 12:40:46.981629 PCI: 00:15.3
1237 12:40:46.991778 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 12:40:46.992203 PCI: 00:16.0
1239 12:40:47.002626 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 12:40:47.005021 PCI: 00:19.0
1241 12:40:47.008361 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 12:40:47.018254 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:40:47.021768 I2C: 00:15
1244 12:40:47.025391 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 12:40:47.034982 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 12:40:47.041612 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 12:40:47.051587 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 12:40:47.055205 GENERIC: 0.0
1249 12:40:47.055617 PCI: 01:00.0
1250 12:40:47.064712 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 12:40:47.075274 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 12:40:47.084480 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 12:40:47.084969 PCI: 00:1e.0
1254 12:40:47.097945 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 12:40:47.102217 PCI: 00:1e.2 child on link 0 SPI: 00
1256 12:40:47.111289 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 12:40:47.111720 SPI: 00
1258 12:40:47.117956 PCI: 00:1e.3 child on link 0 SPI: 00
1259 12:40:47.127769 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 12:40:47.128195 SPI: 00
1261 12:40:47.131330 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 12:40:47.141919 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 12:40:47.142395 PNP: 0c09.0
1264 12:40:47.151202 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 12:40:47.154772 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 12:40:47.164574 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 12:40:47.174204 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 12:40:47.177325 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 12:40:47.181380 GENERIC: 0.0
1270 12:40:47.181803 GENERIC: 1.0
1271 12:40:47.184328 PCI: 00:1f.3
1272 12:40:47.194532 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 12:40:47.204066 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 12:40:47.208465 PCI: 00:1f.5
1275 12:40:47.214105 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 12:40:47.220697 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 12:40:47.221192 APIC: 00
1278 12:40:47.221528 APIC: 01
1279 12:40:47.223963 APIC: 02
1280 12:40:47.224410 APIC: 07
1281 12:40:47.224809 APIC: 05
1282 12:40:47.227480 APIC: 04
1283 12:40:47.228038 APIC: 03
1284 12:40:47.230635 APIC: 06
1285 12:40:47.237804 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 12:40:47.244396 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 12:40:47.250670 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 12:40:47.253775 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 12:40:47.260999 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 12:40:47.263900 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 12:40:47.267123 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 12:40:47.274048 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 12:40:47.283875 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 12:40:47.290306 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 12:40:47.296982 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 12:40:47.303756 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 12:40:47.311148 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 12:40:47.320281 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 12:40:47.327132 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 12:40:47.330716 DOMAIN: 0000: Resource ranges:
1301 12:40:47.333367 * Base: 1000, Size: 800, Tag: 100
1302 12:40:47.337139 * Base: 1900, Size: e700, Tag: 100
1303 12:40:47.343542 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 12:40:47.350137 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 12:40:47.357314 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 12:40:47.363044 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 12:40:47.370281 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 12:40:47.379833 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 12:40:47.386445 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 12:40:47.392918 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 12:40:47.403239 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 12:40:47.410409 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 12:40:47.416221 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 12:40:47.426739 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 12:40:47.433187 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 12:40:47.440333 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 12:40:47.449728 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 12:40:47.455850 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 12:40:47.462534 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 12:40:47.469289 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 12:40:47.479433 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 12:40:47.488169 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 12:40:47.495769 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 12:40:47.503342 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 12:40:47.509290 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 12:40:47.515744 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 12:40:47.525977 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 12:40:47.529390 DOMAIN: 0000: Resource ranges:
1329 12:40:47.532297 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 12:40:47.535665 * Base: d0000000, Size: 28000000, Tag: 200
1331 12:40:47.542097 * Base: fa000000, Size: 1000000, Tag: 200
1332 12:40:47.545836 * Base: fb001000, Size: 2fff000, Tag: 200
1333 12:40:47.549847 * Base: fe010000, Size: 2e000, Tag: 200
1334 12:40:47.555934 * Base: fe03f000, Size: d41000, Tag: 200
1335 12:40:47.559491 * Base: fed88000, Size: 8000, Tag: 200
1336 12:40:47.562398 * Base: fed93000, Size: d000, Tag: 200
1337 12:40:47.565408 * Base: feda2000, Size: 1e000, Tag: 200
1338 12:40:47.568530 * Base: fede0000, Size: 1220000, Tag: 200
1339 12:40:47.575499 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 12:40:47.581949 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 12:40:47.589752 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 12:40:47.595736 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 12:40:47.602269 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 12:40:47.609060 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 12:40:47.615838 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 12:40:47.621876 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 12:40:47.628609 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 12:40:47.634970 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 12:40:47.642593 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 12:40:47.649057 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 12:40:47.655080 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 12:40:47.662079 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 12:40:47.668297 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 12:40:47.675340 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 12:40:47.682227 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 12:40:47.688292 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 12:40:47.695163 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 12:40:47.702323 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 12:40:47.708126 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 12:40:47.714579 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 12:40:47.722038 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 12:40:47.727669 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 12:40:47.737726 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 12:40:47.741335 PCI: 00:1d.0: Resource ranges:
1365 12:40:47.744200 * Base: 7fc00000, Size: 100000, Tag: 200
1366 12:40:47.751190 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 12:40:47.757802 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 12:40:47.764778 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 12:40:47.770980 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 12:40:47.781442 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 12:40:47.784405 Root Device assign_resources, bus 0 link: 0
1372 12:40:47.788336 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 12:40:47.797975 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 12:40:47.804841 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 12:40:47.814905 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 12:40:47.820919 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 12:40:47.827973 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 12:40:47.831752 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 12:40:47.841493 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 12:40:47.848047 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 12:40:47.857313 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 12:40:47.860580 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 12:40:47.864516 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 12:40:47.874261 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 12:40:47.877140 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 12:40:47.884174 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 12:40:47.890364 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 12:40:47.897100 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 12:40:47.907356 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 12:40:47.910956 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 12:40:47.917140 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 12:40:47.924526 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 12:40:47.928039 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 12:40:47.934684 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 12:40:47.941066 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 12:40:47.947879 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 12:40:47.950937 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 12:40:47.960558 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 12:40:47.967464 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 12:40:47.977551 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 12:40:47.984454 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 12:40:47.987024 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 12:40:47.994782 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 12:40:48.000126 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 12:40:48.014065 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 12:40:48.020294 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 12:40:48.023479 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 12:40:48.033489 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 12:40:48.040643 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 12:40:48.051014 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 12:40:48.053585 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 12:40:48.063412 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 12:40:48.066472 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 12:40:48.069635 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 12:40:48.079966 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 12:40:48.083230 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 12:40:48.089651 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 12:40:48.093128 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 12:40:48.100116 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 12:40:48.103039 LPC: Trying to open IO window from 800 size 1ff
1421 12:40:48.112857 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 12:40:48.119481 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 12:40:48.126794 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 12:40:48.133554 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 12:40:48.136715 Root Device assign_resources, bus 0 link: 0
1426 12:40:48.140715 Done setting resources.
1427 12:40:48.146346 Show resources in subtree (Root Device)...After assigning values.
1428 12:40:48.149426 Root Device child on link 0 DOMAIN: 0000
1429 12:40:48.156385 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 12:40:48.163601 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 12:40:48.172655 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 12:40:48.176340 PCI: 00:00.0
1433 12:40:48.185801 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 12:40:48.196335 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 12:40:48.202485 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 12:40:48.213299 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 12:40:48.222797 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 12:40:48.232863 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 12:40:48.242989 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 12:40:48.253075 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 12:40:48.259191 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 12:40:48.269153 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 12:40:48.279043 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 12:40:48.288957 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 12:40:48.299153 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 12:40:48.305971 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 12:40:48.315739 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 12:40:48.325368 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 12:40:48.335706 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 12:40:48.345722 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 12:40:48.355236 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 12:40:48.365455 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 12:40:48.365984 PCI: 00:02.0
1454 12:40:48.375676 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 12:40:48.388699 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 12:40:48.395455 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 12:40:48.402737 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 12:40:48.412579 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 12:40:48.413006 GENERIC: 0.0
1460 12:40:48.415534 PCI: 00:05.0
1461 12:40:48.425107 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 12:40:48.428648 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 12:40:48.432403 GENERIC: 0.0
1464 12:40:48.433072 PCI: 00:08.0
1465 12:40:48.445041 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 12:40:48.445468 PCI: 00:0a.0
1467 12:40:48.448429 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 12:40:48.461818 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 12:40:48.464966 USB0 port 0 child on link 0 USB3 port 0
1470 12:40:48.465416 USB3 port 0
1471 12:40:48.468275 USB3 port 1
1472 12:40:48.468790 USB3 port 2
1473 12:40:48.471764 USB3 port 3
1474 12:40:48.474884 PCI: 00:14.0 child on link 0 USB0 port 0
1475 12:40:48.484780 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 12:40:48.491535 USB0 port 0 child on link 0 USB2 port 0
1477 12:40:48.491960 USB2 port 0
1478 12:40:48.495212 USB2 port 1
1479 12:40:48.495627 USB2 port 2
1480 12:40:48.497883 USB2 port 3
1481 12:40:48.498309 USB2 port 4
1482 12:40:48.501494 USB2 port 5
1483 12:40:48.502030 USB2 port 6
1484 12:40:48.504565 USB2 port 7
1485 12:40:48.507834 USB2 port 8
1486 12:40:48.508375 USB2 port 9
1487 12:40:48.511353 USB3 port 0
1488 12:40:48.511949 USB3 port 1
1489 12:40:48.514989 USB3 port 2
1490 12:40:48.515405 USB3 port 3
1491 12:40:48.518340 PCI: 00:14.2
1492 12:40:48.528316 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 12:40:48.537678 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 12:40:48.541184 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 12:40:48.551330 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 12:40:48.554540 GENERIC: 0.0
1497 12:40:48.557940 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 12:40:48.568397 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 12:40:48.571397 I2C: 00:1a
1500 12:40:48.571973 I2C: 00:31
1501 12:40:48.575041 I2C: 00:32
1502 12:40:48.577697 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 12:40:48.588039 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 12:40:48.590817 I2C: 00:10
1505 12:40:48.591252 PCI: 00:15.2
1506 12:40:48.601019 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 12:40:48.604218 PCI: 00:15.3
1508 12:40:48.614153 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 12:40:48.614695 PCI: 00:16.0
1510 12:40:48.624309 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 12:40:48.627755 PCI: 00:19.0
1512 12:40:48.632658 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 12:40:48.641476 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 12:40:48.644095 I2C: 00:15
1515 12:40:48.647881 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 12:40:48.657883 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 12:40:48.667136 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 12:40:48.680556 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 12:40:48.681186 GENERIC: 0.0
1520 12:40:48.683685 PCI: 01:00.0
1521 12:40:48.694256 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 12:40:48.703971 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 12:40:48.714313 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 12:40:48.717066 PCI: 00:1e.0
1525 12:40:48.727272 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 12:40:48.730501 PCI: 00:1e.2 child on link 0 SPI: 00
1527 12:40:48.740647 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 12:40:48.743529 SPI: 00
1529 12:40:48.747453 PCI: 00:1e.3 child on link 0 SPI: 00
1530 12:40:48.757175 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 12:40:48.757642 SPI: 00
1532 12:40:48.763678 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 12:40:48.770084 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 12:40:48.774497 PNP: 0c09.0
1535 12:40:48.783677 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 12:40:48.787163 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 12:40:48.797029 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 12:40:48.807293 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 12:40:48.809973 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 12:40:48.810474 GENERIC: 0.0
1541 12:40:48.813435 GENERIC: 1.0
1542 12:40:48.817378 PCI: 00:1f.3
1543 12:40:48.826655 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 12:40:48.836791 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 12:40:48.837367 PCI: 00:1f.5
1546 12:40:48.846708 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 12:40:48.853556 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 12:40:48.854054 APIC: 00
1549 12:40:48.854394 APIC: 01
1550 12:40:48.856423 APIC: 02
1551 12:40:48.856958 APIC: 07
1552 12:40:48.859967 APIC: 05
1553 12:40:48.860528 APIC: 04
1554 12:40:48.860992 APIC: 03
1555 12:40:48.863311 APIC: 06
1556 12:40:48.866967 Done allocating resources.
1557 12:40:48.869988 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 12:40:48.876832 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 12:40:48.880126 Configure GPIOs for I2S audio on UP4.
1560 12:40:48.887594 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 12:40:48.891150 Enabling resources...
1562 12:40:48.894015 PCI: 00:00.0 subsystem <- 8086/9a12
1563 12:40:48.897564 PCI: 00:00.0 cmd <- 06
1564 12:40:48.901299 PCI: 00:02.0 subsystem <- 8086/9a40
1565 12:40:48.904302 PCI: 00:02.0 cmd <- 03
1566 12:40:48.907173 PCI: 00:04.0 subsystem <- 8086/9a03
1567 12:40:48.910639 PCI: 00:04.0 cmd <- 02
1568 12:40:48.913710 PCI: 00:05.0 subsystem <- 8086/9a19
1569 12:40:48.914131 PCI: 00:05.0 cmd <- 02
1570 12:40:48.920452 PCI: 00:08.0 subsystem <- 8086/9a11
1571 12:40:48.920919 PCI: 00:08.0 cmd <- 06
1572 12:40:48.924138 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 12:40:48.927008 PCI: 00:0d.0 cmd <- 02
1574 12:40:48.930415 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 12:40:48.933823 PCI: 00:14.0 cmd <- 02
1576 12:40:48.937271 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 12:40:48.940898 PCI: 00:14.2 cmd <- 02
1578 12:40:48.943836 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 12:40:48.947264 PCI: 00:14.3 cmd <- 02
1580 12:40:48.950186 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 12:40:48.953545 PCI: 00:15.0 cmd <- 02
1582 12:40:48.956728 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 12:40:48.960786 PCI: 00:15.1 cmd <- 02
1584 12:40:48.963440 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 12:40:48.963834 PCI: 00:15.2 cmd <- 02
1586 12:40:48.970210 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 12:40:48.970634 PCI: 00:15.3 cmd <- 02
1588 12:40:48.973572 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 12:40:48.976648 PCI: 00:16.0 cmd <- 02
1590 12:40:48.980328 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 12:40:48.983852 PCI: 00:19.1 cmd <- 02
1592 12:40:48.987078 PCI: 00:1d.0 bridge ctrl <- 0013
1593 12:40:48.989905 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 12:40:48.993467 PCI: 00:1d.0 cmd <- 06
1595 12:40:48.997162 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 12:40:48.999780 PCI: 00:1e.0 cmd <- 06
1597 12:40:49.003365 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 12:40:49.006691 PCI: 00:1e.2 cmd <- 06
1599 12:40:49.009861 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 12:40:49.013565 PCI: 00:1e.3 cmd <- 02
1601 12:40:49.016382 PCI: 00:1f.0 subsystem <- 8086/a087
1602 12:40:49.019784 PCI: 00:1f.0 cmd <- 407
1603 12:40:49.023098 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 12:40:49.023684 PCI: 00:1f.3 cmd <- 02
1605 12:40:49.030068 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 12:40:49.030487 PCI: 00:1f.5 cmd <- 406
1607 12:40:49.034710 PCI: 01:00.0 cmd <- 02
1608 12:40:49.039423 done.
1609 12:40:49.043177 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 12:40:49.046272 Initializing devices...
1611 12:40:49.049621 Root Device init
1612 12:40:49.053243 Chrome EC: Set SMI mask to 0x0000000000000000
1613 12:40:49.059768 Chrome EC: clear events_b mask to 0x0000000000000000
1614 12:40:49.065997 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 12:40:49.069463 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 12:40:49.076028 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 12:40:49.084335 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 12:40:49.086176 fw_config match found: DB_USB=USB3_ACTIVE
1619 12:40:49.092626 Configure Right Type-C port orientation for retimer
1620 12:40:49.096105 Root Device init finished in 43 msecs
1621 12:40:49.099309 PCI: 00:00.0 init
1622 12:40:49.102596 CPU TDP = 9 Watts
1623 12:40:49.103180 CPU PL1 = 9 Watts
1624 12:40:49.106077 CPU PL2 = 40 Watts
1625 12:40:49.106515 CPU PL4 = 83 Watts
1626 12:40:49.112321 PCI: 00:00.0 init finished in 8 msecs
1627 12:40:49.112827 PCI: 00:02.0 init
1628 12:40:49.115618 GMA: Found VBT in CBFS
1629 12:40:49.119010 GMA: Found valid VBT in CBFS
1630 12:40:49.126400 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 12:40:49.132626 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 12:40:49.135854 PCI: 00:02.0 init finished in 18 msecs
1633 12:40:49.139262 PCI: 00:05.0 init
1634 12:40:49.142389 PCI: 00:05.0 init finished in 0 msecs
1635 12:40:49.145734 PCI: 00:08.0 init
1636 12:40:49.149458 PCI: 00:08.0 init finished in 0 msecs
1637 12:40:49.152306 PCI: 00:14.0 init
1638 12:40:49.156036 PCI: 00:14.0 init finished in 0 msecs
1639 12:40:49.159632 PCI: 00:14.2 init
1640 12:40:49.162232 PCI: 00:14.2 init finished in 0 msecs
1641 12:40:49.162801 PCI: 00:15.0 init
1642 12:40:49.165654 I2C bus 0 version 0x3230302a
1643 12:40:49.169250 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 12:40:49.175587 PCI: 00:15.0 init finished in 6 msecs
1645 12:40:49.176010 PCI: 00:15.1 init
1646 12:40:49.178979 I2C bus 1 version 0x3230302a
1647 12:40:49.182329 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 12:40:49.186109 PCI: 00:15.1 init finished in 6 msecs
1649 12:40:49.188751 PCI: 00:15.2 init
1650 12:40:49.192147 I2C bus 2 version 0x3230302a
1651 12:40:49.195558 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 12:40:49.198923 PCI: 00:15.2 init finished in 6 msecs
1653 12:40:49.202333 PCI: 00:15.3 init
1654 12:40:49.205332 I2C bus 3 version 0x3230302a
1655 12:40:49.208631 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 12:40:49.211869 PCI: 00:15.3 init finished in 6 msecs
1657 12:40:49.215696 PCI: 00:16.0 init
1658 12:40:49.218986 PCI: 00:16.0 init finished in 0 msecs
1659 12:40:49.221873 PCI: 00:19.1 init
1660 12:40:49.222290 I2C bus 5 version 0x3230302a
1661 12:40:49.229104 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 12:40:49.232848 PCI: 00:19.1 init finished in 6 msecs
1663 12:40:49.233289 PCI: 00:1d.0 init
1664 12:40:49.235754 Initializing PCH PCIe bridge.
1665 12:40:49.238427 PCI: 00:1d.0 init finished in 3 msecs
1666 12:40:49.242751 PCI: 00:1f.0 init
1667 12:40:49.247074 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 12:40:49.253036 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 12:40:49.253515 IOAPIC: ID = 0x02
1670 12:40:49.256054 IOAPIC: Dumping registers
1671 12:40:49.259627 reg 0x0000: 0x02000000
1672 12:40:49.262974 reg 0x0001: 0x00770020
1673 12:40:49.263420 reg 0x0002: 0x00000000
1674 12:40:49.269577 PCI: 00:1f.0 init finished in 21 msecs
1675 12:40:49.270079 PCI: 00:1f.2 init
1676 12:40:49.273409 Disabling ACPI via APMC.
1677 12:40:49.276039 APMC done.
1678 12:40:49.279475 PCI: 00:1f.2 init finished in 5 msecs
1679 12:40:49.291331 PCI: 01:00.0 init
1680 12:40:49.294547 PCI: 01:00.0 init finished in 0 msecs
1681 12:40:49.297701 PNP: 0c09.0 init
1682 12:40:49.301647 Google Chrome EC uptime: 8.394 seconds
1683 12:40:49.308033 Google Chrome AP resets since EC boot: 1
1684 12:40:49.311206 Google Chrome most recent AP reset causes:
1685 12:40:49.314573 0.347: 32775 shutdown: entering G3
1686 12:40:49.321112 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1687 12:40:49.324384 PNP: 0c09.0 init finished in 22 msecs
1688 12:40:49.330496 Devices initialized
1689 12:40:49.333278 Show all devs... After init.
1690 12:40:49.336937 Root Device: enabled 1
1691 12:40:49.337168 DOMAIN: 0000: enabled 1
1692 12:40:49.339885 CPU_CLUSTER: 0: enabled 1
1693 12:40:49.343653 PCI: 00:00.0: enabled 1
1694 12:40:49.346405 PCI: 00:02.0: enabled 1
1695 12:40:49.346636 PCI: 00:04.0: enabled 1
1696 12:40:49.349827 PCI: 00:05.0: enabled 1
1697 12:40:49.353188 PCI: 00:06.0: enabled 0
1698 12:40:49.356886 PCI: 00:07.0: enabled 0
1699 12:40:49.357116 PCI: 00:07.1: enabled 0
1700 12:40:49.359758 PCI: 00:07.2: enabled 0
1701 12:40:49.363062 PCI: 00:07.3: enabled 0
1702 12:40:49.366228 PCI: 00:08.0: enabled 1
1703 12:40:49.366458 PCI: 00:09.0: enabled 0
1704 12:40:49.369748 PCI: 00:0a.0: enabled 0
1705 12:40:49.373707 PCI: 00:0d.0: enabled 1
1706 12:40:49.376528 PCI: 00:0d.1: enabled 0
1707 12:40:49.376781 PCI: 00:0d.2: enabled 0
1708 12:40:49.379965 PCI: 00:0d.3: enabled 0
1709 12:40:49.383300 PCI: 00:0e.0: enabled 0
1710 12:40:49.383532 PCI: 00:10.2: enabled 1
1711 12:40:49.386813 PCI: 00:10.6: enabled 0
1712 12:40:49.389828 PCI: 00:10.7: enabled 0
1713 12:40:49.392693 PCI: 00:12.0: enabled 0
1714 12:40:49.392918 PCI: 00:12.6: enabled 0
1715 12:40:49.396044 PCI: 00:13.0: enabled 0
1716 12:40:49.399552 PCI: 00:14.0: enabled 1
1717 12:40:49.402884 PCI: 00:14.1: enabled 0
1718 12:40:49.403150 PCI: 00:14.2: enabled 1
1719 12:40:49.406928 PCI: 00:14.3: enabled 1
1720 12:40:49.409739 PCI: 00:15.0: enabled 1
1721 12:40:49.412656 PCI: 00:15.1: enabled 1
1722 12:40:49.412901 PCI: 00:15.2: enabled 1
1723 12:40:49.416567 PCI: 00:15.3: enabled 1
1724 12:40:49.420307 PCI: 00:16.0: enabled 1
1725 12:40:49.420526 PCI: 00:16.1: enabled 0
1726 12:40:49.423351 PCI: 00:16.2: enabled 0
1727 12:40:49.426425 PCI: 00:16.3: enabled 0
1728 12:40:49.430060 PCI: 00:16.4: enabled 0
1729 12:40:49.430283 PCI: 00:16.5: enabled 0
1730 12:40:49.432727 PCI: 00:17.0: enabled 0
1731 12:40:49.436436 PCI: 00:19.0: enabled 0
1732 12:40:49.439635 PCI: 00:19.1: enabled 1
1733 12:40:49.439859 PCI: 00:19.2: enabled 0
1734 12:40:49.442796 PCI: 00:1c.0: enabled 1
1735 12:40:49.446557 PCI: 00:1c.1: enabled 0
1736 12:40:49.449316 PCI: 00:1c.2: enabled 0
1737 12:40:49.449551 PCI: 00:1c.3: enabled 0
1738 12:40:49.452606 PCI: 00:1c.4: enabled 0
1739 12:40:49.455896 PCI: 00:1c.5: enabled 0
1740 12:40:49.459392 PCI: 00:1c.6: enabled 1
1741 12:40:49.459617 PCI: 00:1c.7: enabled 0
1742 12:40:49.463536 PCI: 00:1d.0: enabled 1
1743 12:40:49.465891 PCI: 00:1d.1: enabled 0
1744 12:40:49.466127 PCI: 00:1d.2: enabled 1
1745 12:40:49.469561 PCI: 00:1d.3: enabled 0
1746 12:40:49.472717 PCI: 00:1e.0: enabled 1
1747 12:40:49.475991 PCI: 00:1e.1: enabled 0
1748 12:40:49.476215 PCI: 00:1e.2: enabled 1
1749 12:40:49.479637 PCI: 00:1e.3: enabled 1
1750 12:40:49.482916 PCI: 00:1f.0: enabled 1
1751 12:40:49.485879 PCI: 00:1f.1: enabled 0
1752 12:40:49.486161 PCI: 00:1f.2: enabled 1
1753 12:40:49.489034 PCI: 00:1f.3: enabled 1
1754 12:40:49.492711 PCI: 00:1f.4: enabled 0
1755 12:40:49.496206 PCI: 00:1f.5: enabled 1
1756 12:40:49.496432 PCI: 00:1f.6: enabled 0
1757 12:40:49.499513 PCI: 00:1f.7: enabled 0
1758 12:40:49.502813 APIC: 00: enabled 1
1759 12:40:49.503038 GENERIC: 0.0: enabled 1
1760 12:40:49.506194 GENERIC: 0.0: enabled 1
1761 12:40:49.509200 GENERIC: 1.0: enabled 1
1762 12:40:49.512616 GENERIC: 0.0: enabled 1
1763 12:40:49.512855 GENERIC: 1.0: enabled 1
1764 12:40:49.515750 USB0 port 0: enabled 1
1765 12:40:49.519283 GENERIC: 0.0: enabled 1
1766 12:40:49.519551 USB0 port 0: enabled 1
1767 12:40:49.522866 GENERIC: 0.0: enabled 1
1768 12:40:49.526652 I2C: 00:1a: enabled 1
1769 12:40:49.529374 I2C: 00:31: enabled 1
1770 12:40:49.529733 I2C: 00:32: enabled 1
1771 12:40:49.533291 I2C: 00:10: enabled 1
1772 12:40:49.536017 I2C: 00:15: enabled 1
1773 12:40:49.536376 GENERIC: 0.0: enabled 0
1774 12:40:49.539291 GENERIC: 1.0: enabled 0
1775 12:40:49.542159 GENERIC: 0.0: enabled 1
1776 12:40:49.542520 SPI: 00: enabled 1
1777 12:40:49.545596 SPI: 00: enabled 1
1778 12:40:49.549467 PNP: 0c09.0: enabled 1
1779 12:40:49.549826 GENERIC: 0.0: enabled 1
1780 12:40:49.552434 USB3 port 0: enabled 1
1781 12:40:49.555873 USB3 port 1: enabled 1
1782 12:40:49.558974 USB3 port 2: enabled 0
1783 12:40:49.559326 USB3 port 3: enabled 0
1784 12:40:49.562145 USB2 port 0: enabled 0
1785 12:40:49.565562 USB2 port 1: enabled 1
1786 12:40:49.565912 USB2 port 2: enabled 1
1787 12:40:49.569625 USB2 port 3: enabled 0
1788 12:40:49.572768 USB2 port 4: enabled 1
1789 12:40:49.573287 USB2 port 5: enabled 0
1790 12:40:49.575754 USB2 port 6: enabled 0
1791 12:40:49.579102 USB2 port 7: enabled 0
1792 12:40:49.582043 USB2 port 8: enabled 0
1793 12:40:49.582468 USB2 port 9: enabled 0
1794 12:40:49.585663 USB3 port 0: enabled 0
1795 12:40:49.589183 USB3 port 1: enabled 1
1796 12:40:49.589613 USB3 port 2: enabled 0
1797 12:40:49.592711 USB3 port 3: enabled 0
1798 12:40:49.595581 GENERIC: 0.0: enabled 1
1799 12:40:49.599229 GENERIC: 1.0: enabled 1
1800 12:40:49.599808 APIC: 01: enabled 1
1801 12:40:49.602350 APIC: 02: enabled 1
1802 12:40:49.602771 APIC: 07: enabled 1
1803 12:40:49.605619 APIC: 05: enabled 1
1804 12:40:49.608652 APIC: 04: enabled 1
1805 12:40:49.609127 APIC: 03: enabled 1
1806 12:40:49.612649 APIC: 06: enabled 1
1807 12:40:49.615568 PCI: 01:00.0: enabled 1
1808 12:40:49.618937 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1809 12:40:49.625727 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1810 12:40:49.628728 ELOG: NV offset 0xf30000 size 0x1000
1811 12:40:49.635123 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1812 12:40:49.641898 ELOG: Event(17) added with size 13 at 2023-08-30 12:40:46 UTC
1813 12:40:49.648298 ELOG: Event(92) added with size 9 at 2023-08-30 12:40:46 UTC
1814 12:40:49.655532 ELOG: Event(93) added with size 9 at 2023-08-30 12:40:46 UTC
1815 12:40:49.662293 ELOG: Event(9E) added with size 10 at 2023-08-30 12:40:46 UTC
1816 12:40:49.668299 ELOG: Event(9F) added with size 14 at 2023-08-30 12:40:46 UTC
1817 12:40:49.675162 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1818 12:40:49.678184 ELOG: Event(A1) added with size 10 at 2023-08-30 12:40:46 UTC
1819 12:40:49.685295 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1820 12:40:49.692184 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1821 12:40:49.695206 Finalize devices...
1822 12:40:49.695628 Devices finalized
1823 12:40:49.701492 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1824 12:40:49.708571 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1825 12:40:49.711866 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1826 12:40:49.718143 ME: HFSTS1 : 0x80030055
1827 12:40:49.721515 ME: HFSTS2 : 0x30280116
1828 12:40:49.725313 ME: HFSTS3 : 0x00000050
1829 12:40:49.732007 ME: HFSTS4 : 0x00004000
1830 12:40:49.734916 ME: HFSTS5 : 0x00000000
1831 12:40:49.738389 ME: HFSTS6 : 0x00400006
1832 12:40:49.744942 ME: Manufacturing Mode : YES
1833 12:40:49.748093 ME: SPI Protection Mode Enabled : NO
1834 12:40:49.751201 ME: FW Partition Table : OK
1835 12:40:49.755103 ME: Bringup Loader Failure : NO
1836 12:40:49.758317 ME: Firmware Init Complete : NO
1837 12:40:49.761935 ME: Boot Options Present : NO
1838 12:40:49.765687 ME: Update In Progress : NO
1839 12:40:49.768531 ME: D0i3 Support : YES
1840 12:40:49.775015 ME: Low Power State Enabled : NO
1841 12:40:49.778168 ME: CPU Replaced : YES
1842 12:40:49.781759 ME: CPU Replacement Valid : YES
1843 12:40:49.785215 ME: Current Working State : 5
1844 12:40:49.788476 ME: Current Operation State : 1
1845 12:40:49.791348 ME: Current Operation Mode : 3
1846 12:40:49.795057 ME: Error Code : 0
1847 12:40:49.797869 ME: Enhanced Debug Mode : NO
1848 12:40:49.801137 ME: CPU Debug Disabled : YES
1849 12:40:49.807993 ME: TXT Support : NO
1850 12:40:49.811149 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1851 12:40:49.821646 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1852 12:40:49.824432 CBFS: 'fallback/slic' not found.
1853 12:40:49.828074 ACPI: Writing ACPI tables at 76b01000.
1854 12:40:49.828885 ACPI: * FACS
1855 12:40:49.831101 ACPI: * DSDT
1856 12:40:49.834741 Ramoops buffer: 0x100000@0x76a00000.
1857 12:40:49.837703 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1858 12:40:49.844462 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1859 12:40:49.847459 Google Chrome EC: version:
1860 12:40:49.850853 ro: voema_v2.0.7540-147f8d37d1
1861 12:40:49.854753 rw: voema_v2.0.7540-147f8d37d1
1862 12:40:49.857409 running image: 2
1863 12:40:49.864458 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1864 12:40:49.867712 ACPI: * FADT
1865 12:40:49.868266 SCI is IRQ9
1866 12:40:49.871126 ACPI: added table 1/32, length now 40
1867 12:40:49.874276 ACPI: * SSDT
1868 12:40:49.878106 Found 1 CPU(s) with 8 core(s) each.
1869 12:40:49.881486 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1870 12:40:49.884281 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1871 12:40:49.890757 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1872 12:40:49.894500 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1873 12:40:49.901048 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1874 12:40:49.904422 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1875 12:40:49.911223 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1876 12:40:49.917467 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1877 12:40:49.924056 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1878 12:40:49.927728 \_SB.PCI0.RP09: Added StorageD3Enable property
1879 12:40:49.931267 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1880 12:40:49.937295 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1881 12:40:49.940640 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1882 12:40:49.944510 PS2K: Passing 80 keymaps to kernel
1883 12:40:49.951015 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1884 12:40:49.957731 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1885 12:40:49.963665 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1886 12:40:49.970619 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1887 12:40:49.976888 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1888 12:40:49.983861 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1889 12:40:49.990635 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1890 12:40:49.997054 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1891 12:40:50.000489 ACPI: added table 2/32, length now 44
1892 12:40:50.004267 ACPI: * MCFG
1893 12:40:50.007136 ACPI: added table 3/32, length now 48
1894 12:40:50.010184 ACPI: * TPM2
1895 12:40:50.014197 TPM2 log created at 0x769f0000
1896 12:40:50.017258 ACPI: added table 4/32, length now 52
1897 12:40:50.017718 ACPI: * MADT
1898 12:40:50.019955 SCI is IRQ9
1899 12:40:50.023663 ACPI: added table 5/32, length now 56
1900 12:40:50.024113 current = 76b09850
1901 12:40:50.027724 ACPI: * DMAR
1902 12:40:50.030222 ACPI: added table 6/32, length now 60
1903 12:40:50.033200 ACPI: added table 7/32, length now 64
1904 12:40:50.036428 ACPI: * HPET
1905 12:40:50.040316 ACPI: added table 8/32, length now 68
1906 12:40:50.040808 ACPI: done.
1907 12:40:50.043362 ACPI tables: 35216 bytes.
1908 12:40:50.046747 smbios_write_tables: 769ef000
1909 12:40:50.050225 EC returned error result code 3
1910 12:40:50.053154 Couldn't obtain OEM name from CBI
1911 12:40:50.056896 Create SMBIOS type 16
1912 12:40:50.057317 Create SMBIOS type 17
1913 12:40:50.060599 GENERIC: 0.0 (WIFI Device)
1914 12:40:50.063298 SMBIOS tables: 1750 bytes.
1915 12:40:50.066861 Writing table forward entry at 0x00000500
1916 12:40:50.073821 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1917 12:40:50.076566 Writing coreboot table at 0x76b25000
1918 12:40:50.083518 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1919 12:40:50.087348 1. 0000000000001000-000000000009ffff: RAM
1920 12:40:50.093379 2. 00000000000a0000-00000000000fffff: RESERVED
1921 12:40:50.096615 3. 0000000000100000-00000000769eefff: RAM
1922 12:40:50.103127 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1923 12:40:50.106983 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1924 12:40:50.113329 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1925 12:40:50.120440 7. 0000000077000000-000000007fbfffff: RESERVED
1926 12:40:50.123928 8. 00000000c0000000-00000000cfffffff: RESERVED
1927 12:40:50.129926 9. 00000000f8000000-00000000f9ffffff: RESERVED
1928 12:40:50.133262 10. 00000000fb000000-00000000fb000fff: RESERVED
1929 12:40:50.136523 11. 00000000fe000000-00000000fe00ffff: RESERVED
1930 12:40:50.143623 12. 00000000fed80000-00000000fed87fff: RESERVED
1931 12:40:50.148018 13. 00000000fed90000-00000000fed92fff: RESERVED
1932 12:40:50.152942 14. 00000000feda0000-00000000feda1fff: RESERVED
1933 12:40:50.156446 15. 00000000fedc0000-00000000feddffff: RESERVED
1934 12:40:50.159474 16. 0000000100000000-00000002803fffff: RAM
1935 12:40:50.162936 Passing 4 GPIOs to payload:
1936 12:40:50.169858 NAME | PORT | POLARITY | VALUE
1937 12:40:50.176210 lid | undefined | high | high
1938 12:40:50.179272 power | undefined | high | low
1939 12:40:50.186204 oprom | undefined | high | low
1940 12:40:50.189415 EC in RW | 0x000000e5 | high | high
1941 12:40:50.196562 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 2000
1942 12:40:50.199105 coreboot table: 1576 bytes.
1943 12:40:50.202651 IMD ROOT 0. 0x76fff000 0x00001000
1944 12:40:50.206294 IMD SMALL 1. 0x76ffe000 0x00001000
1945 12:40:50.209530 FSP MEMORY 2. 0x76c4e000 0x003b0000
1946 12:40:50.216133 VPD 3. 0x76c4d000 0x00000367
1947 12:40:50.219488 RO MCACHE 4. 0x76c4c000 0x00000fdc
1948 12:40:50.222815 CONSOLE 5. 0x76c2c000 0x00020000
1949 12:40:50.225962 FMAP 6. 0x76c2b000 0x00000578
1950 12:40:50.229301 TIME STAMP 7. 0x76c2a000 0x00000910
1951 12:40:50.233283 VBOOT WORK 8. 0x76c16000 0x00014000
1952 12:40:50.236447 ROMSTG STCK 9. 0x76c15000 0x00001000
1953 12:40:50.239749 AFTER CAR 10. 0x76c0a000 0x0000b000
1954 12:40:50.242779 RAMSTAGE 11. 0x76b97000 0x00073000
1955 12:40:50.249492 REFCODE 12. 0x76b42000 0x00055000
1956 12:40:50.253070 SMM BACKUP 13. 0x76b32000 0x00010000
1957 12:40:50.256247 4f444749 14. 0x76b30000 0x00002000
1958 12:40:50.259472 EXT VBT15. 0x76b2d000 0x0000219f
1959 12:40:50.262872 COREBOOT 16. 0x76b25000 0x00008000
1960 12:40:50.266389 ACPI 17. 0x76b01000 0x00024000
1961 12:40:50.269329 ACPI GNVS 18. 0x76b00000 0x00001000
1962 12:40:50.272893 RAMOOPS 19. 0x76a00000 0x00100000
1963 12:40:50.275855 TPM2 TCGLOG20. 0x769f0000 0x00010000
1964 12:40:50.282499 SMBIOS 21. 0x769ef000 0x00000800
1965 12:40:50.283072 IMD small region:
1966 12:40:50.285696 IMD ROOT 0. 0x76ffec00 0x00000400
1967 12:40:50.289933 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1968 12:40:50.296084 POWER STATE 2. 0x76ffeb80 0x00000044
1969 12:40:50.299095 ROMSTAGE 3. 0x76ffeb60 0x00000004
1970 12:40:50.302452 MEM INFO 4. 0x76ffe980 0x000001e0
1971 12:40:50.309266 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1972 12:40:50.312972 MTRR: Physical address space:
1973 12:40:50.318947 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1974 12:40:50.322610 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1975 12:40:50.328971 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1976 12:40:50.335810 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1977 12:40:50.342577 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1978 12:40:50.348918 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1979 12:40:50.355534 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1980 12:40:50.358589 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 12:40:50.362063 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 12:40:50.369251 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 12:40:50.372365 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 12:40:50.375275 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 12:40:50.379536 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 12:40:50.385643 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 12:40:50.389293 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 12:40:50.392424 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 12:40:50.395963 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 12:40:50.398753 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 12:40:50.403187 call enable_fixed_mtrr()
1992 12:40:50.406395 CPU physical address size: 39 bits
1993 12:40:50.413285 MTRR: default type WB/UC MTRR counts: 6/6.
1994 12:40:50.416337 MTRR: UC selected as default type.
1995 12:40:50.423408 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1996 12:40:50.426633 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1997 12:40:50.433081 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1998 12:40:50.440017 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1999 12:40:50.446851 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2000 12:40:50.453184 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2001 12:40:50.459652 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 12:40:50.463178 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 12:40:50.466385 MTRR: Fixed MSR 0x259 0x0000000000000000
2004 12:40:50.469551 MTRR: Fixed MSR 0x268 0x0606060606060606
2005 12:40:50.475885 MTRR: Fixed MSR 0x269 0x0606060606060606
2006 12:40:50.480007 MTRR: Fixed MSR 0x26a 0x0606060606060606
2007 12:40:50.483248 MTRR: Fixed MSR 0x26b 0x0606060606060606
2008 12:40:50.485811 MTRR: Fixed MSR 0x26c 0x0606060606060606
2009 12:40:50.492646 MTRR: Fixed MSR 0x26d 0x0606060606060606
2010 12:40:50.496237 MTRR: Fixed MSR 0x26e 0x0606060606060606
2011 12:40:50.499532 MTRR: Fixed MSR 0x26f 0x0606060606060606
2012 12:40:50.500000
2013 12:40:50.502594 MTRR check
2014 12:40:50.505934 Fixed MTRRs : Enabled
2015 12:40:50.506409 Variable MTRRs: Enabled
2016 12:40:50.507010
2017 12:40:50.509220 call enable_fixed_mtrr()
2018 12:40:50.515624 BS: BS_WRITE_TABLES exit times (exec / console): 48 / 151 ms
2019 12:40:50.519279 CPU physical address size: 39 bits
2020 12:40:50.523229 Checking cr50 for pending updates
2021 12:40:50.526795 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 12:40:50.530092 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 12:40:50.537316 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 12:40:50.540107 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 12:40:50.544029 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 12:40:50.547330 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 12:40:50.553643 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 12:40:50.556945 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 12:40:50.560143 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 12:40:50.563495 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 12:40:50.570639 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 12:40:50.573825 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 12:40:50.576598 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 12:40:50.579806 call enable_fixed_mtrr()
2035 12:40:50.583196 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 12:40:50.590294 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 12:40:50.593228 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 12:40:50.596448 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 12:40:50.600262 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 12:40:50.607402 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 12:40:50.610085 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 12:40:50.613147 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 12:40:50.616192 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 12:40:50.620849 CPU physical address size: 39 bits
2045 12:40:50.626751 call enable_fixed_mtrr()
2046 12:40:50.630073 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 12:40:50.633876 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 12:40:50.636760 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 12:40:50.643419 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 12:40:50.646771 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 12:40:50.650525 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 12:40:50.653702 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 12:40:50.656874 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 12:40:50.663502 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 12:40:50.667329 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 12:40:50.670412 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 12:40:50.673818 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 12:40:50.680632 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 12:40:50.683909 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 12:40:50.687606 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 12:40:50.691177 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 12:40:50.697707 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 12:40:50.701698 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 12:40:50.704154 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 12:40:50.707374 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 12:40:50.713853 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 12:40:50.717464 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 12:40:50.721415 call enable_fixed_mtrr()
2069 12:40:50.724349 call enable_fixed_mtrr()
2070 12:40:50.727257 CPU physical address size: 39 bits
2071 12:40:50.730737 CPU physical address size: 39 bits
2072 12:40:50.734373 CPU physical address size: 39 bits
2073 12:40:50.737135 MTRR: Fixed MSR 0x250 0x0606060606060606
2074 12:40:50.743868 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 12:40:50.747079 MTRR: Fixed MSR 0x258 0x0606060606060606
2076 12:40:50.751176 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 12:40:50.753500 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 12:40:50.760703 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 12:40:50.764349 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 12:40:50.767151 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 12:40:50.770504 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 12:40:50.773894 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 12:40:50.780211 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 12:40:50.783553 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 12:40:50.790273 MTRR: Fixed MSR 0x258 0x0606060606060606
2086 12:40:50.790848 call enable_fixed_mtrr()
2087 12:40:50.797391 MTRR: Fixed MSR 0x259 0x0000000000000000
2088 12:40:50.800019 MTRR: Fixed MSR 0x268 0x0606060606060606
2089 12:40:50.803941 MTRR: Fixed MSR 0x269 0x0606060606060606
2090 12:40:50.807437 MTRR: Fixed MSR 0x26a 0x0606060606060606
2091 12:40:50.810369 MTRR: Fixed MSR 0x26b 0x0606060606060606
2092 12:40:50.816810 MTRR: Fixed MSR 0x26c 0x0606060606060606
2093 12:40:50.819922 MTRR: Fixed MSR 0x26d 0x0606060606060606
2094 12:40:50.823633 MTRR: Fixed MSR 0x26e 0x0606060606060606
2095 12:40:50.826770 MTRR: Fixed MSR 0x26f 0x0606060606060606
2096 12:40:50.830836 CPU physical address size: 39 bits
2097 12:40:50.838635 call enable_fixed_mtrr()
2098 12:40:50.839184 Reading cr50 TPM mode
2099 12:40:50.841792 CPU physical address size: 39 bits
2100 12:40:50.848520 BS: BS_PAYLOAD_LOAD entry times (exec / console): 321 / 7 ms
2101 12:40:50.858876 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 12:40:50.862092 Checking segment from ROM address 0xffc02b38
2103 12:40:50.865333 Checking segment from ROM address 0xffc02b54
2104 12:40:50.872370 Loading segment from ROM address 0xffc02b38
2105 12:40:50.873002 code (compression=0)
2106 12:40:50.882260 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 12:40:50.888701 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 12:40:50.892284 it's not compressed!
2109 12:40:51.031473 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 12:40:51.037304 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 12:40:51.044178 Loading segment from ROM address 0xffc02b54
2112 12:40:51.044261 Entry Point 0x30000000
2113 12:40:51.047490 Loaded segments
2114 12:40:51.053930 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2115 12:40:51.096952 Finalizing chipset.
2116 12:40:51.100005 Finalizing SMM.
2117 12:40:51.100086 APMC done.
2118 12:40:51.106682 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2119 12:40:51.109811 mp_park_aps done after 0 msecs.
2120 12:40:51.113220 Jumping to boot code at 0x30000000(0x76b25000)
2121 12:40:51.123365 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 12:40:51.123474
2123 12:40:51.123566
2124 12:40:51.126767
2125 12:40:51.126847 Starting depthcharge on Voema...
2126 12:40:51.127204 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2127 12:40:51.127300 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2128 12:40:51.127406 Setting prompt string to ['volteer:']
2129 12:40:51.127485 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2130 12:40:51.129900
2131 12:40:51.136296 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 12:40:51.136376
2133 12:40:51.142957 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 12:40:51.143037
2135 12:40:51.149462 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2136 12:40:51.149542
2137 12:40:51.153413 Failed to find eMMC card reader
2138 12:40:51.153493
2139 12:40:51.153587 Wipe memory regions:
2140 12:40:51.156420
2141 12:40:51.159465 [0x00000000001000, 0x000000000a0000)
2142 12:40:51.159545
2143 12:40:51.163979 [0x00000000100000, 0x00000030000000)
2144 12:40:51.188159
2145 12:40:51.191274 [0x00000032662db0, 0x000000769ef000)
2146 12:40:51.227799
2147 12:40:51.231100 [0x00000100000000, 0x00000280400000)
2148 12:40:51.432813
2149 12:40:51.436047 ec_init: CrosEC protocol v3 supported (256, 256)
2150 12:40:51.436132
2151 12:40:51.442513 update_port_state: port C0 state: usb enable 1 mux conn 0
2152 12:40:51.442595
2153 12:40:51.452231 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2154 12:40:51.452314
2155 12:40:51.459088 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2156 12:40:51.459170
2157 12:40:51.462415 send_conn_disc_msg: pmc_send_cmd succeeded
2158 12:40:51.892951
2159 12:40:51.893093 R8152: Initializing
2160 12:40:51.893160
2161 12:40:51.896576 Version 6 (ocp_data = 5c30)
2162 12:40:51.896657
2163 12:40:51.899312 R8152: Done initializing
2164 12:40:51.899392
2165 12:40:51.903369 Adding net device
2166 12:40:52.204560
2167 12:40:52.207156 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 12:40:52.207254
2169 12:40:52.207347
2170 12:40:52.207420
2171 12:40:52.210674 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 12:40:52.311073 volteer: tftpboot 192.168.201.1 11383507/tftp-deploy-4i3yzla1/kernel/bzImage 11383507/tftp-deploy-4i3yzla1/kernel/cmdline 11383507/tftp-deploy-4i3yzla1/ramdisk/ramdisk.cpio.gz
2174 12:40:52.311223 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 12:40:52.311302 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2176 12:40:52.315661 tftpboot 192.168.201.1 11383507/tftp-deploy-4i3yzla1/kernel/bzIloy-4i3yzla1/kernel/cmdline 11383507/tftp-deploy-4i3yzla1/ramdisk/ramdisk.cpio.gz
2177 12:40:52.315747
2178 12:40:52.315811 Waiting for link
2179 12:40:52.519647
2180 12:40:52.519791 done.
2181 12:40:52.519857
2182 12:40:52.519918 MAC: 00:24:32:30:7b:ec
2183 12:40:52.519978
2184 12:40:52.523178 Sending DHCP discover... done.
2185 12:40:52.523261
2186 12:40:52.525976 Waiting for reply... done.
2187 12:40:52.526058
2188 12:40:52.529714 Sending DHCP request... done.
2189 12:40:52.529797
2190 12:40:52.532241 Waiting for reply... done.
2191 12:40:52.532321
2192 12:40:52.535706 My ip is 192.168.201.11
2193 12:40:52.535787
2194 12:40:52.538831 The DHCP server ip is 192.168.201.1
2195 12:40:52.538918
2196 12:40:52.542564 TFTP server IP predefined by user: 192.168.201.1
2197 12:40:52.542646
2198 12:40:52.548647 Bootfile predefined by user: 11383507/tftp-deploy-4i3yzla1/kernel/bzImage
2199 12:40:52.548770
2200 12:40:52.551998 Sending tftp read request... done.
2201 12:40:52.552078
2202 12:40:52.559127 Waiting for the transfer...
2203 12:40:52.559210
2204 12:40:53.094681 00000000 ################################################################
2205 12:40:53.094821
2206 12:40:53.630048 00080000 ################################################################
2207 12:40:53.630187
2208 12:40:54.190674 00100000 ################################################################
2209 12:40:54.190813
2210 12:40:54.732988 00180000 ################################################################
2211 12:40:54.733122
2212 12:40:55.267757 00200000 ################################################################
2213 12:40:55.267893
2214 12:40:55.802987 00280000 ################################################################
2215 12:40:55.803126
2216 12:40:56.354834 00300000 ################################################################
2217 12:40:56.354979
2218 12:40:56.897367 00380000 ################################################################
2219 12:40:56.897507
2220 12:40:57.450002 00400000 ################################################################
2221 12:40:57.450145
2222 12:40:58.008430 00480000 ################################################################
2223 12:40:58.008577
2224 12:40:58.573107 00500000 ################################################################
2225 12:40:58.573245
2226 12:40:59.106946 00580000 ################################################################
2227 12:40:59.107086
2228 12:40:59.625590 00600000 ################################################################
2229 12:40:59.625730
2230 12:41:00.169999 00680000 ################################################################
2231 12:41:00.170143
2232 12:41:00.708359 00700000 ################################################################
2233 12:41:00.708527
2234 12:41:01.232544 00780000 ################################################################
2235 12:41:01.232727
2236 12:41:01.338509 00800000 ############# done.
2237 12:41:01.338634
2238 12:41:01.341471 The bootfile was 8490896 bytes long.
2239 12:41:01.341554
2240 12:41:01.345456 Sending tftp read request... done.
2241 12:41:01.345538
2242 12:41:01.348187 Waiting for the transfer...
2243 12:41:01.348267
2244 12:41:01.891849 00000000 ################################################################
2245 12:41:01.891986
2246 12:41:02.421415 00080000 ################################################################
2247 12:41:02.421582
2248 12:41:02.967133 00100000 ################################################################
2249 12:41:02.967273
2250 12:41:03.497986 00180000 ################################################################
2251 12:41:03.498123
2252 12:41:04.023799 00200000 ################################################################
2253 12:41:04.023938
2254 12:41:04.544576 00280000 ################################################################
2255 12:41:04.544733
2256 12:41:05.087256 00300000 ################################################################
2257 12:41:05.087399
2258 12:41:05.608426 00380000 ################################################################
2259 12:41:05.608593
2260 12:41:06.141621 00400000 ################################################################
2261 12:41:06.141764
2262 12:41:06.681885 00480000 ################################################################
2263 12:41:06.682031
2264 12:41:07.209660 00500000 ################################################################ done.
2265 12:41:07.209805
2266 12:41:07.213487 Sending tftp read request... done.
2267 12:41:07.213570
2268 12:41:07.215991 Waiting for the transfer...
2269 12:41:07.216072
2270 12:41:07.216136 00000000 # done.
2271 12:41:07.216198
2272 12:41:07.226256 Command line loaded dynamically from TFTP file: 11383507/tftp-deploy-4i3yzla1/kernel/cmdline
2273 12:41:07.226340
2274 12:41:07.252418 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11383507/extract-nfsrootfs-1wejg6w2,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2275 12:41:07.255611
2276 12:41:07.259160 Shutting down all USB controllers.
2277 12:41:07.259242
2278 12:41:07.259307 Removing current net device
2279 12:41:07.259367
2280 12:41:07.262373 Finalizing coreboot
2281 12:41:07.262455
2282 12:41:07.269098 Exiting depthcharge with code 4 at timestamp: 24778924
2283 12:41:07.269180
2284 12:41:07.269244
2285 12:41:07.269303 Starting kernel ...
2286 12:41:07.269360
2287 12:41:07.269415
2288 12:41:07.269767 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2289 12:41:07.269864 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2290 12:41:07.269940 Setting prompt string to ['Linux version [0-9]']
2291 12:41:07.270008 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2292 12:41:07.270074 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2294 12:45:35.270808 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2296 12:45:35.271878 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2298 12:45:35.272765 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2301 12:45:35.274183 end: 2 depthcharge-action (duration 00:05:00) [common]
2303 12:45:35.275174 Cleaning after the job
2304 12:45:35.275264 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383507/tftp-deploy-4i3yzla1/ramdisk
2305 12:45:35.276196 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383507/tftp-deploy-4i3yzla1/kernel
2306 12:45:35.277497 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383507/tftp-deploy-4i3yzla1/nfsrootfs
2307 12:45:35.354348 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11383507/tftp-deploy-4i3yzla1/modules
2308 12:45:35.354820 start: 5.1 power-off (timeout 00:00:30) [common]
2309 12:45:35.354992 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2310 12:45:35.438710 >> Command sent successfully.
2311 12:45:35.449511 Returned 0 in 0 seconds
2312 12:45:35.550971 end: 5.1 power-off (duration 00:00:00) [common]
2314 12:45:35.552544 start: 5.2 read-feedback (timeout 00:10:00) [common]
2315 12:45:35.553936 Listened to connection for namespace 'common' for up to 1s
2316 12:45:36.554710 Finalising connection for namespace 'common'
2317 12:45:36.555410 Disconnecting from shell: Finalise
2318 12:45:36.555844
2319 12:45:36.656881 end: 5.2 read-feedback (duration 00:00:01) [common]
2320 12:45:36.657480 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11383507
2321 12:45:37.007270 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11383507
2322 12:45:37.007464 JobError: Your job cannot terminate cleanly.