Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:55:25.511875 lava-dispatcher, installed at version: 2023.08
2 17:55:25.512100 start: 0 validate
3 17:55:25.512248 Start time: 2023-10-09 17:55:25.512239+00:00 (UTC)
4 17:55:25.512379 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:55:25.512529 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:55:25.780370 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:55:25.780570 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:55:26.046058 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:55:26.046260 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:55:26.305793 validate duration: 0.79
12 17:55:26.306123 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:55:26.306259 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:55:26.306368 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:55:26.306510 Not decompressing ramdisk as can be used compressed.
16 17:55:26.306605 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:55:26.306677 saving as /var/lib/lava/dispatcher/tmp/11712681/tftp-deploy-v3xvvq2a/ramdisk/rootfs.cpio.gz
18 17:55:26.306763 total size: 8418130 (8 MB)
19 17:55:26.307991 progress 0 % (0 MB)
20 17:55:26.310640 progress 5 % (0 MB)
21 17:55:26.313262 progress 10 % (0 MB)
22 17:55:26.315865 progress 15 % (1 MB)
23 17:55:26.318465 progress 20 % (1 MB)
24 17:55:26.321077 progress 25 % (2 MB)
25 17:55:26.323677 progress 30 % (2 MB)
26 17:55:26.326107 progress 35 % (2 MB)
27 17:55:26.328715 progress 40 % (3 MB)
28 17:55:26.331329 progress 45 % (3 MB)
29 17:55:26.333954 progress 50 % (4 MB)
30 17:55:26.336543 progress 55 % (4 MB)
31 17:55:26.339138 progress 60 % (4 MB)
32 17:55:26.341522 progress 65 % (5 MB)
33 17:55:26.344058 progress 70 % (5 MB)
34 17:55:26.346631 progress 75 % (6 MB)
35 17:55:26.349189 progress 80 % (6 MB)
36 17:55:26.351692 progress 85 % (6 MB)
37 17:55:26.354259 progress 90 % (7 MB)
38 17:55:26.356858 progress 95 % (7 MB)
39 17:55:26.359205 progress 100 % (8 MB)
40 17:55:26.359479 8 MB downloaded in 0.05 s (152.29 MB/s)
41 17:55:26.359666 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:55:26.359937 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:55:26.360035 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:55:26.360135 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:55:26.360290 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:55:26.360377 saving as /var/lib/lava/dispatcher/tmp/11712681/tftp-deploy-v3xvvq2a/kernel/bzImage
48 17:55:26.360446 total size: 8490896 (8 MB)
49 17:55:26.360514 No compression specified
50 17:55:26.361756 progress 0 % (0 MB)
51 17:55:26.364234 progress 5 % (0 MB)
52 17:55:26.366847 progress 10 % (0 MB)
53 17:55:26.369474 progress 15 % (1 MB)
54 17:55:26.372097 progress 20 % (1 MB)
55 17:55:26.374687 progress 25 % (2 MB)
56 17:55:26.377313 progress 30 % (2 MB)
57 17:55:26.379898 progress 35 % (2 MB)
58 17:55:26.382500 progress 40 % (3 MB)
59 17:55:26.385133 progress 45 % (3 MB)
60 17:55:26.387738 progress 50 % (4 MB)
61 17:55:26.390319 progress 55 % (4 MB)
62 17:55:26.392865 progress 60 % (4 MB)
63 17:55:26.395399 progress 65 % (5 MB)
64 17:55:26.397968 progress 70 % (5 MB)
65 17:55:26.400538 progress 75 % (6 MB)
66 17:55:26.403116 progress 80 % (6 MB)
67 17:55:26.405665 progress 85 % (6 MB)
68 17:55:26.408236 progress 90 % (7 MB)
69 17:55:26.410899 progress 95 % (7 MB)
70 17:55:26.413470 progress 100 % (8 MB)
71 17:55:26.413626 8 MB downloaded in 0.05 s (152.28 MB/s)
72 17:55:26.413794 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:55:26.414060 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:55:26.414160 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:55:26.414256 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:55:26.414412 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:55:26.414498 saving as /var/lib/lava/dispatcher/tmp/11712681/tftp-deploy-v3xvvq2a/modules/modules.tar
79 17:55:26.414567 total size: 250868 (0 MB)
80 17:55:26.414638 Using unxz to decompress xz
81 17:55:26.419269 progress 13 % (0 MB)
82 17:55:26.419753 progress 26 % (0 MB)
83 17:55:26.420039 progress 39 % (0 MB)
84 17:55:26.421835 progress 52 % (0 MB)
85 17:55:26.423881 progress 65 % (0 MB)
86 17:55:26.426076 progress 78 % (0 MB)
87 17:55:26.428210 progress 91 % (0 MB)
88 17:55:26.430209 progress 100 % (0 MB)
89 17:55:26.436525 0 MB downloaded in 0.02 s (10.90 MB/s)
90 17:55:26.436915 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:55:26.437243 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:55:26.437355 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:55:26.437468 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:55:26.437564 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:55:26.437670 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:55:26.437932 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u
98 17:55:26.438089 makedir: /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin
99 17:55:26.438209 makedir: /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/tests
100 17:55:26.438323 makedir: /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/results
101 17:55:26.438455 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-add-keys
102 17:55:26.438623 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-add-sources
103 17:55:26.438790 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-background-process-start
104 17:55:26.438939 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-background-process-stop
105 17:55:26.439102 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-common-functions
106 17:55:26.439249 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-echo-ipv4
107 17:55:26.439411 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-install-packages
108 17:55:26.439594 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-installed-packages
109 17:55:26.439773 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-os-build
110 17:55:26.439953 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-probe-channel
111 17:55:26.440112 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-probe-ip
112 17:55:26.440291 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-target-ip
113 17:55:26.440436 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-target-mac
114 17:55:26.440578 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-target-storage
115 17:55:26.440764 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-test-case
116 17:55:26.440959 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-test-event
117 17:55:26.441104 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-test-feedback
118 17:55:26.441254 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-test-raise
119 17:55:26.441404 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-test-reference
120 17:55:26.441551 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-test-runner
121 17:55:26.441694 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-test-set
122 17:55:26.441844 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-test-shell
123 17:55:26.441994 Updating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-install-packages (oe)
124 17:55:26.442170 Updating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/bin/lava-installed-packages (oe)
125 17:55:26.442323 Creating /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/environment
126 17:55:26.442443 LAVA metadata
127 17:55:26.442528 - LAVA_JOB_ID=11712681
128 17:55:26.442602 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:55:26.442726 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:55:26.442805 skipped lava-vland-overlay
131 17:55:26.442899 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:55:26.442996 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:55:26.443067 skipped lava-multinode-overlay
134 17:55:26.443171 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:55:26.443274 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:55:26.443397 Loading test definitions
137 17:55:26.443539 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:55:26.443673 Using /lava-11712681 at stage 0
139 17:55:26.444099 uuid=11712681_1.4.2.3.1 testdef=None
140 17:55:26.444203 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:55:26.444303 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:55:26.445012 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:55:26.445302 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:55:26.446259 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:55:26.446578 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:55:26.447628 runner path: /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/0/tests/0_dmesg test_uuid 11712681_1.4.2.3.1
149 17:55:26.447855 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:55:26.448113 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 17:55:26.448196 Using /lava-11712681 at stage 1
153 17:55:26.448559 uuid=11712681_1.4.2.3.5 testdef=None
154 17:55:26.448694 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:55:26.448828 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 17:55:26.449389 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:55:26.449632 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 17:55:26.450391 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:55:26.450668 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 17:55:26.451555 runner path: /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/1/tests/1_bootrr test_uuid 11712681_1.4.2.3.5
163 17:55:26.451772 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:55:26.452040 Creating lava-test-runner.conf files
166 17:55:26.452111 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/0 for stage 0
167 17:55:26.452213 - 0_dmesg
168 17:55:26.452339 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712681/lava-overlay-w_3nii7u/lava-11712681/1 for stage 1
169 17:55:26.452478 - 1_bootrr
170 17:55:26.452627 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:55:26.452757 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 17:55:26.463302 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:55:26.463502 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 17:55:26.463652 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:55:26.463788 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:55:26.463918 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 17:55:26.751313 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:55:26.751762 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 17:55:26.751896 extracting modules file /var/lib/lava/dispatcher/tmp/11712681/tftp-deploy-v3xvvq2a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712681/extract-overlay-ramdisk-n4o33gjh/ramdisk
180 17:55:26.767854 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:55:26.768082 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 17:55:26.768190 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712681/compress-overlay-8d5hlwjp/overlay-1.4.2.4.tar.gz to ramdisk
183 17:55:26.768271 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712681/compress-overlay-8d5hlwjp/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712681/extract-overlay-ramdisk-n4o33gjh/ramdisk
184 17:55:26.779594 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:55:26.779763 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 17:55:26.779876 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:55:26.779983 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 17:55:26.780072 Building ramdisk /var/lib/lava/dispatcher/tmp/11712681/extract-overlay-ramdisk-n4o33gjh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712681/extract-overlay-ramdisk-n4o33gjh/ramdisk
189 17:55:26.937449 >> 49788 blocks
190 17:55:27.915280 rename /var/lib/lava/dispatcher/tmp/11712681/extract-overlay-ramdisk-n4o33gjh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712681/tftp-deploy-v3xvvq2a/ramdisk/ramdisk.cpio.gz
191 17:55:27.915765 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:55:27.915911 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 17:55:27.916034 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 17:55:27.916143 No mkimage arch provided, not using FIT.
195 17:55:27.916247 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:55:27.916340 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:55:27.916466 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:55:27.916569 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 17:55:27.916659 No LXC device requested
200 17:55:27.916745 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:55:27.916858 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 17:55:27.916955 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:55:27.917041 Checking files for TFTP limit of 4294967296 bytes.
204 17:55:27.917511 end: 1 tftp-deploy (duration 00:00:02) [common]
205 17:55:27.917629 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:55:27.917730 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:55:27.917864 substitutions:
208 17:55:27.917945 - {DTB}: None
209 17:55:27.918017 - {INITRD}: 11712681/tftp-deploy-v3xvvq2a/ramdisk/ramdisk.cpio.gz
210 17:55:27.918083 - {KERNEL}: 11712681/tftp-deploy-v3xvvq2a/kernel/bzImage
211 17:55:27.918146 - {LAVA_MAC}: None
212 17:55:27.918209 - {PRESEED_CONFIG}: None
213 17:55:27.918271 - {PRESEED_LOCAL}: None
214 17:55:27.918332 - {RAMDISK}: 11712681/tftp-deploy-v3xvvq2a/ramdisk/ramdisk.cpio.gz
215 17:55:27.918392 - {ROOT_PART}: None
216 17:55:27.918452 - {ROOT}: None
217 17:55:27.918512 - {SERVER_IP}: 192.168.201.1
218 17:55:27.918571 - {TEE}: None
219 17:55:27.918631 Parsed boot commands:
220 17:55:27.918692 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:55:27.918891 Parsed boot commands: tftpboot 192.168.201.1 11712681/tftp-deploy-v3xvvq2a/kernel/bzImage 11712681/tftp-deploy-v3xvvq2a/kernel/cmdline 11712681/tftp-deploy-v3xvvq2a/ramdisk/ramdisk.cpio.gz
222 17:55:27.918986 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:55:27.919089 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:55:27.919193 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:55:27.919289 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:55:27.919365 Not connected, no need to disconnect.
227 17:55:27.919447 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:55:27.919542 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:55:27.919617 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-4'
230 17:55:27.924310 Setting prompt string to ['lava-test: # ']
231 17:55:27.924819 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:55:27.924972 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:55:27.925123 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:55:27.925267 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:55:27.925630 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-4' '--port=1' '--command=reboot'
236 17:55:33.058925 >> Command sent successfully.
237 17:55:33.061629 Returned 0 in 5 seconds
238 17:55:33.162125 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 17:55:33.162685 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 17:55:33.162863 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 17:55:33.163035 Setting prompt string to 'Starting depthcharge on Magolor...'
243 17:55:33.163166 Changing prompt to 'Starting depthcharge on Magolor...'
244 17:55:33.163299 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 17:55:33.163753 [Enter `^Ec?' for help]
246 17:55:34.303999
247 17:55:34.304157
248 17:55:34.311352 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 17:55:34.318677 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 17:55:34.322541 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 17:55:34.326901 CPU: AES supported, TXT NOT supported, VT supported
252 17:55:34.330612 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 17:55:34.338151 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 17:55:34.341784 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 17:55:34.344902 VBOOT: Loading verstage.
256 17:55:34.348445 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 17:55:34.356148 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 17:55:34.359928 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 17:55:34.365995 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 17:55:34.366089
261 17:55:34.366162
262 17:55:34.376759 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 17:55:34.392055 Probing TPM: . done!
264 17:55:34.395271 TPM ready after 0 ms
265 17:55:34.399065 Connected to device vid:did:rid of 1ae0:0028:00
266 17:55:34.409604 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
267 17:55:34.416142 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 17:55:34.419222 Initialized TPM device CR50 revision 0
269 17:55:34.512956 tlcl_send_startup: Startup return code is 0
270 17:55:34.513109 TPM: setup succeeded
271 17:55:34.532504 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 17:55:34.542223 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 17:55:34.554610 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 17:55:34.564371 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 17:55:34.568019 Chrome EC: UHEPI supported
276 17:55:34.571016 Phase 1
277 17:55:34.574510 FMAP: area GBB found @ c05000 (12288 bytes)
278 17:55:34.581962 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 17:55:34.588755 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 17:55:34.592713 Recovery requested (1009000e)
281 17:55:34.605034 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 17:55:34.610051 tlcl_extend: response is 0
283 17:55:34.623270 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 17:55:34.628634 tlcl_extend: response is 0
285 17:55:34.635095 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 17:55:34.638766 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 17:55:34.645142 BS: verstage times (exec / console): total (unknown) / 124 ms
288 17:55:34.648620
289 17:55:34.648735
290 17:55:34.658432 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 17:55:34.665116 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 17:55:34.668092 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 17:55:34.671815 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 17:55:34.678584 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 17:55:34.681373 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 17:55:34.684776 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
297 17:55:34.688157 TCO_STS: 0000 0001
298 17:55:34.691726 GEN_PMCON: d0015038 00002200
299 17:55:34.694638 GBLRST_CAUSE: 00000000 00000000
300 17:55:34.694738 prev_sleep_state 5
301 17:55:34.698855 Boot Count incremented to 14524
302 17:55:34.705652 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 17:55:34.708727 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 17:55:34.712686 Chrome EC: UHEPI supported
305 17:55:34.720014 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 17:55:34.725935 Probing TPM: done!
307 17:55:34.732593 Connected to device vid:did:rid of 1ae0:0028:00
308 17:55:34.742246 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
309 17:55:34.745939 Initialized TPM device CR50 revision 0
310 17:55:34.760621 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 17:55:34.767570 MRC: Hash idx 0x100b comparison successful.
312 17:55:34.770469 MRC cache found, size 5458
313 17:55:34.770553 bootmode is set to: 2
314 17:55:34.773624 SPD INDEX = 0
315 17:55:34.778068 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 17:55:34.781222 SPD: module type is LPDDR4X
317 17:55:34.784911 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 17:55:34.791490 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 17:55:34.797846 SPD: device width 16 bits, bus width 32 bits
320 17:55:34.801559 SPD: module size is 4096 MB (per channel)
321 17:55:34.804599 meminit_channels: DRAM half-populated
322 17:55:34.887158 CBMEM:
323 17:55:34.890606 IMD: root @ 0x76fff000 254 entries.
324 17:55:34.893699 IMD: root @ 0x76ffec00 62 entries.
325 17:55:34.897314 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 17:55:34.903893 WARNING: RO_VPD is uninitialized or empty.
327 17:55:34.906858 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 17:55:34.910735 External stage cache:
329 17:55:34.914107 IMD: root @ 0x7b3ff000 254 entries.
330 17:55:34.917470 IMD: root @ 0x7b3fec00 62 entries.
331 17:55:34.927497 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 17:55:34.934015 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 17:55:34.940653 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 17:55:34.949604 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 17:55:34.955545 cse_lite: Skip switching to RW in the recovery path
336 17:55:34.955640 1 DIMMs found
337 17:55:34.955715 SMM Memory Map
338 17:55:34.958966 SMRAM : 0x7b000000 0x800000
339 17:55:34.961951 Subregion 0: 0x7b000000 0x200000
340 17:55:34.968702 Subregion 1: 0x7b200000 0x200000
341 17:55:34.971821 Subregion 2: 0x7b400000 0x400000
342 17:55:34.971905 top_of_ram = 0x77000000
343 17:55:34.978702 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 17:55:34.985300 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 17:55:34.988414 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 17:55:34.995202 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 17:55:34.998317 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 17:55:35.010909 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 17:55:35.017495 Processing 188 relocs. Offset value of 0x74c0e000
350 17:55:35.024287 BS: romstage times (exec / console): total (unknown) / 256 ms
351 17:55:35.029160
352 17:55:35.029250
353 17:55:35.039119 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 17:55:35.045368 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 17:55:35.048799 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 17:55:35.054935 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 17:55:35.111657 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 17:55:35.118403 Processing 4805 relocs. Offset value of 0x75da8000
359 17:55:35.121438 BS: postcar times (exec / console): total (unknown) / 42 ms
360 17:55:35.124510
361 17:55:35.124610
362 17:55:35.134484 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 17:55:35.134579 Normal boot
364 17:55:35.138134 EC returned error result code 3
365 17:55:35.141852 FW_CONFIG value is 0x204
366 17:55:35.145484 GENERIC: 0.0 disabled by fw_config
367 17:55:35.153098 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 17:55:35.153226 I2C: 00:10 disabled by fw_config
369 17:55:35.156311 I2C: 00:10 disabled by fw_config
370 17:55:35.162963 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 17:55:35.165849 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 17:55:35.172530 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 17:55:35.175947 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 17:55:35.182909 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 17:55:35.186026 I2C: 00:10 disabled by fw_config
376 17:55:35.192796 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 17:55:35.199663 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 17:55:35.202689 I2C: 00:1a disabled by fw_config
379 17:55:35.205847 I2C: 00:1a disabled by fw_config
380 17:55:35.209539 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 17:55:35.216103 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 17:55:35.219189 GENERIC: 0.0 disabled by fw_config
383 17:55:35.222832 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 17:55:35.229689 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 17:55:35.232726 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 17:55:35.239526 microcode: Update skipped, already up-to-date
387 17:55:35.242736 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 17:55:35.270800 Detected 2 core, 2 thread CPU.
389 17:55:35.274075 Setting up SMI for CPU
390 17:55:35.277646 IED base = 0x7b400000
391 17:55:35.277740 IED size = 0x00400000
392 17:55:35.280754 Will perform SMM setup.
393 17:55:35.283780 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 17:55:35.294124 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 17:55:35.297154 Processing 16 relocs. Offset value of 0x00030000
396 17:55:35.300863 Attempting to start 1 APs
397 17:55:35.304467 Waiting for 10ms after sending INIT.
398 17:55:35.320542 Waiting for 1st SIPI to complete...done.
399 17:55:35.324265 Waiting for 2nd SIPI to complete...done.
400 17:55:35.327291 AP: slot 1 apic_id 2.
401 17:55:35.334061 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 17:55:35.340870 Processing 13 relocs. Offset value of 0x00038000
403 17:55:35.340974 Unable to locate Global NVS
404 17:55:35.350794 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 17:55:35.354290 Installing permanent SMM handler to 0x7b000000
406 17:55:35.361096 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 17:55:35.367588 Processing 704 relocs. Offset value of 0x7b010000
408 17:55:35.373810 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 17:55:35.380587 Processing 13 relocs. Offset value of 0x7b008000
410 17:55:35.387439 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 17:55:35.390401 Unable to locate Global NVS
412 17:55:35.397187 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 17:55:35.400686 Clearing SMI status registers
414 17:55:35.400796 SMI_STS: PM1
415 17:55:35.403631 PM1_STS: PWRBTN
416 17:55:35.403723 TCO_STS: INTRD_DET
417 17:55:35.407356 GPE0 STD STS:
418 17:55:35.414353 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
419 17:55:35.417239 In relocation handler: CPU 0
420 17:55:35.420697 New SMBASE=0x7b000000 IEDBASE=0x7b400000
421 17:55:35.427362 Writing SMRR. base = 0x7b000006, mask=0xff800800
422 17:55:35.427489 Relocation complete.
423 17:55:35.434109 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
424 17:55:35.437223 In relocation handler: CPU 1
425 17:55:35.440884 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
426 17:55:35.446988 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 17:55:35.450178 Relocation complete.
428 17:55:35.450278 Initializing CPU #0
429 17:55:35.453850 CPU: vendor Intel device 906c0
430 17:55:35.457289 CPU: family 06, model 9c, stepping 00
431 17:55:35.460764 Clearing out pending MCEs
432 17:55:35.464026 Setting up local APIC...
433 17:55:35.467151 apic_id: 0x00 done.
434 17:55:35.470288 Turbo is available but hidden
435 17:55:35.470375 Turbo is available and visible
436 17:55:35.476998 microcode: Update skipped, already up-to-date
437 17:55:35.477108 CPU #0 initialized
438 17:55:35.480643 Initializing CPU #1
439 17:55:35.483708 CPU: vendor Intel device 906c0
440 17:55:35.487204 CPU: family 06, model 9c, stepping 00
441 17:55:35.490083 Clearing out pending MCEs
442 17:55:35.493684 Setting up local APIC...
443 17:55:35.493782 apic_id: 0x02 done.
444 17:55:35.500497 microcode: Update skipped, already up-to-date
445 17:55:35.500605 CPU #1 initialized
446 17:55:35.507076 bsp_do_flight_plan done after 178 msecs.
447 17:55:35.509936 CPU: frequency set to 2800 MHz
448 17:55:35.510030 Enabling SMIs.
449 17:55:35.516539 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
450 17:55:35.527436 Probing TPM: done!
451 17:55:35.533803 Connected to device vid:did:rid of 1ae0:0028:00
452 17:55:35.544084 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
453 17:55:35.547054 Initialized TPM device CR50 revision 0
454 17:55:35.550730 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
455 17:55:35.557659 Found a VBT of 7680 bytes after decompression
456 17:55:35.564189 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 17:55:35.599388 Detected 2 core, 2 thread CPU.
458 17:55:35.602965 Detected 2 core, 2 thread CPU.
459 17:55:35.964908 Display FSP Version Info HOB
460 17:55:35.967576 Reference Code - CPU = 8.7.22.30
461 17:55:35.970736 uCode Version = 24.0.0.1f
462 17:55:35.974484 TXT ACM version = ff.ff.ff.ffff
463 17:55:35.977609 Reference Code - ME = 8.7.22.30
464 17:55:35.981187 MEBx version = 0.0.0.0
465 17:55:35.984637 ME Firmware Version = Consumer SKU
466 17:55:35.987752 Reference Code - PCH = 8.7.22.30
467 17:55:35.990984 PCH-CRID Status = Disabled
468 17:55:35.994033 PCH-CRID Original Value = ff.ff.ff.ffff
469 17:55:35.997515 PCH-CRID New Value = ff.ff.ff.ffff
470 17:55:36.000984 OPROM - RST - RAID = ff.ff.ff.ffff
471 17:55:36.004330 PCH Hsio Version = 4.0.0.0
472 17:55:36.007210 Reference Code - SA - System Agent = 8.7.22.30
473 17:55:36.010880 Reference Code - MRC = 0.0.4.68
474 17:55:36.013914 SA - PCIe Version = 8.7.22.30
475 17:55:36.017603 SA-CRID Status = Disabled
476 17:55:36.021052 SA-CRID Original Value = 0.0.0.0
477 17:55:36.024067 SA-CRID New Value = 0.0.0.0
478 17:55:36.027384 OPROM - VBIOS = ff.ff.ff.ffff
479 17:55:36.030407 IO Manageability Engine FW Version = ff.ff.ff.ffff
480 17:55:36.034057 PHY Build Version = ff.ff.ff.ffff
481 17:55:36.040263 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
482 17:55:36.043932 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
483 17:55:36.046873 ITSS IRQ Polarities Before:
484 17:55:36.050580 IPC0: 0xffffffff
485 17:55:36.050675 IPC1: 0xffffffff
486 17:55:36.053659 IPC2: 0xffffffff
487 17:55:36.053753 IPC3: 0xffffffff
488 17:55:36.057376 ITSS IRQ Polarities After:
489 17:55:36.060374 IPC0: 0xffffffff
490 17:55:36.060469 IPC1: 0xffffffff
491 17:55:36.063893 IPC2: 0xffffffff
492 17:55:36.063988 IPC3: 0xffffffff
493 17:55:36.077138 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
494 17:55:36.083871 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
495 17:55:36.083973 Enumerating buses...
496 17:55:36.090624 Show all devs... Before device enumeration.
497 17:55:36.090723 Root Device: enabled 1
498 17:55:36.093579 CPU_CLUSTER: 0: enabled 1
499 17:55:36.097134 DOMAIN: 0000: enabled 1
500 17:55:36.099970 PCI: 00:00.0: enabled 1
501 17:55:36.100067 PCI: 00:02.0: enabled 1
502 17:55:36.103657 PCI: 00:04.0: enabled 1
503 17:55:36.107099 PCI: 00:05.0: enabled 1
504 17:55:36.109978 PCI: 00:09.0: enabled 0
505 17:55:36.110074 PCI: 00:12.6: enabled 0
506 17:55:36.113831 PCI: 00:14.0: enabled 1
507 17:55:36.116743 PCI: 00:14.1: enabled 0
508 17:55:36.120285 PCI: 00:14.2: enabled 0
509 17:55:36.120380 PCI: 00:14.3: enabled 1
510 17:55:36.123415 PCI: 00:14.5: enabled 1
511 17:55:36.126992 PCI: 00:15.0: enabled 1
512 17:55:36.130523 PCI: 00:15.1: enabled 1
513 17:55:36.130633 PCI: 00:15.2: enabled 1
514 17:55:36.133547 PCI: 00:15.3: enabled 1
515 17:55:36.137269 PCI: 00:16.0: enabled 1
516 17:55:36.137365 PCI: 00:16.1: enabled 0
517 17:55:36.140367 PCI: 00:16.4: enabled 0
518 17:55:36.143290 PCI: 00:16.5: enabled 0
519 17:55:36.146999 PCI: 00:17.0: enabled 0
520 17:55:36.147099 PCI: 00:19.0: enabled 1
521 17:55:36.150041 PCI: 00:19.1: enabled 0
522 17:55:36.153142 PCI: 00:19.2: enabled 1
523 17:55:36.156918 PCI: 00:1a.0: enabled 1
524 17:55:36.157024 PCI: 00:1c.0: enabled 0
525 17:55:36.160014 PCI: 00:1c.1: enabled 0
526 17:55:36.163179 PCI: 00:1c.2: enabled 0
527 17:55:36.166859 PCI: 00:1c.3: enabled 0
528 17:55:36.166961 PCI: 00:1c.4: enabled 0
529 17:55:36.169974 PCI: 00:1c.5: enabled 0
530 17:55:36.173479 PCI: 00:1c.6: enabled 0
531 17:55:36.173566 PCI: 00:1c.7: enabled 1
532 17:55:36.176712 PCI: 00:1e.0: enabled 0
533 17:55:36.180194 PCI: 00:1e.1: enabled 0
534 17:55:36.182951 PCI: 00:1e.2: enabled 1
535 17:55:36.183044 PCI: 00:1e.3: enabled 0
536 17:55:36.186388 PCI: 00:1f.0: enabled 1
537 17:55:36.189977 PCI: 00:1f.1: enabled 1
538 17:55:36.193077 PCI: 00:1f.2: enabled 1
539 17:55:36.193173 PCI: 00:1f.3: enabled 1
540 17:55:36.196085 PCI: 00:1f.4: enabled 0
541 17:55:36.199759 PCI: 00:1f.5: enabled 1
542 17:55:36.202704 PCI: 00:1f.7: enabled 0
543 17:55:36.202803 GENERIC: 0.0: enabled 1
544 17:55:36.206101 GENERIC: 0.0: enabled 1
545 17:55:36.209846 USB0 port 0: enabled 1
546 17:55:36.212951 GENERIC: 0.0: enabled 1
547 17:55:36.213048 I2C: 00:2c: enabled 1
548 17:55:36.215885 I2C: 00:15: enabled 1
549 17:55:36.219271 GENERIC: 0.0: enabled 0
550 17:55:36.219378 I2C: 00:15: enabled 1
551 17:55:36.222560 I2C: 00:10: enabled 0
552 17:55:36.225907 I2C: 00:10: enabled 0
553 17:55:36.226013 I2C: 00:2c: enabled 1
554 17:55:36.229451 I2C: 00:40: enabled 1
555 17:55:36.232870 I2C: 00:10: enabled 1
556 17:55:36.233005 I2C: 00:39: enabled 1
557 17:55:36.235857 I2C: 00:36: enabled 1
558 17:55:36.239458 I2C: 00:10: enabled 0
559 17:55:36.239552 I2C: 00:0c: enabled 1
560 17:55:36.242600 I2C: 00:50: enabled 1
561 17:55:36.246231 I2C: 00:1a: enabled 1
562 17:55:36.246326 I2C: 00:1a: enabled 0
563 17:55:36.249370 I2C: 00:1a: enabled 0
564 17:55:36.252973 I2C: 00:28: enabled 1
565 17:55:36.253118 I2C: 00:29: enabled 1
566 17:55:36.256039 PCI: 00:00.0: enabled 1
567 17:55:36.259112 SPI: 00: enabled 1
568 17:55:36.259200 PNP: 0c09.0: enabled 1
569 17:55:36.262749 GENERIC: 0.0: enabled 0
570 17:55:36.265870 USB2 port 0: enabled 1
571 17:55:36.269573 USB2 port 1: enabled 1
572 17:55:36.269691 USB2 port 2: enabled 1
573 17:55:36.272568 USB2 port 3: enabled 1
574 17:55:36.275709 USB2 port 4: enabled 0
575 17:55:36.275804 USB2 port 5: enabled 1
576 17:55:36.279479 USB2 port 6: enabled 0
577 17:55:36.282435 USB2 port 7: enabled 1
578 17:55:36.285929 USB3 port 0: enabled 1
579 17:55:36.286025 USB3 port 1: enabled 1
580 17:55:36.289455 USB3 port 2: enabled 1
581 17:55:36.292280 USB3 port 3: enabled 1
582 17:55:36.292368 APIC: 00: enabled 1
583 17:55:36.295586 APIC: 02: enabled 1
584 17:55:36.299093 Compare with tree...
585 17:55:36.299190 Root Device: enabled 1
586 17:55:36.302239 CPU_CLUSTER: 0: enabled 1
587 17:55:36.305887 APIC: 00: enabled 1
588 17:55:36.305992 APIC: 02: enabled 1
589 17:55:36.308893 DOMAIN: 0000: enabled 1
590 17:55:36.312632 PCI: 00:00.0: enabled 1
591 17:55:36.315384 PCI: 00:02.0: enabled 1
592 17:55:36.318973 PCI: 00:04.0: enabled 1
593 17:55:36.319070 GENERIC: 0.0: enabled 1
594 17:55:36.322144 PCI: 00:05.0: enabled 1
595 17:55:36.325913 GENERIC: 0.0: enabled 1
596 17:55:36.328646 PCI: 00:09.0: enabled 0
597 17:55:36.332275 PCI: 00:12.6: enabled 0
598 17:55:36.332417 PCI: 00:14.0: enabled 1
599 17:55:36.335628 USB0 port 0: enabled 1
600 17:55:36.338941 USB2 port 0: enabled 1
601 17:55:36.342291 USB2 port 1: enabled 1
602 17:55:36.345360 USB2 port 2: enabled 1
603 17:55:36.345457 USB2 port 3: enabled 1
604 17:55:36.349048 USB2 port 4: enabled 0
605 17:55:36.352096 USB2 port 5: enabled 1
606 17:55:36.355237 USB2 port 6: enabled 0
607 17:55:36.358895 USB2 port 7: enabled 1
608 17:55:36.361980 USB3 port 0: enabled 1
609 17:55:36.362074 USB3 port 1: enabled 1
610 17:55:36.365080 USB3 port 2: enabled 1
611 17:55:36.368772 USB3 port 3: enabled 1
612 17:55:36.371869 PCI: 00:14.1: enabled 0
613 17:55:36.375495 PCI: 00:14.2: enabled 0
614 17:55:36.375590 PCI: 00:14.3: enabled 1
615 17:55:36.378561 GENERIC: 0.0: enabled 1
616 17:55:36.382221 PCI: 00:14.5: enabled 1
617 17:55:36.385313 PCI: 00:15.0: enabled 1
618 17:55:36.388349 I2C: 00:2c: enabled 1
619 17:55:36.388444 I2C: 00:15: enabled 1
620 17:55:36.392027 PCI: 00:15.1: enabled 1
621 17:55:36.395052 PCI: 00:15.2: enabled 1
622 17:55:36.398512 GENERIC: 0.0: enabled 0
623 17:55:36.398606 I2C: 00:15: enabled 1
624 17:55:36.402093 I2C: 00:10: enabled 0
625 17:55:36.405107 I2C: 00:10: enabled 0
626 17:55:36.408321 I2C: 00:2c: enabled 1
627 17:55:36.412543 I2C: 00:40: enabled 1
628 17:55:36.412638 I2C: 00:10: enabled 1
629 17:55:36.415519 I2C: 00:39: enabled 1
630 17:55:36.419150 PCI: 00:15.3: enabled 1
631 17:55:36.419246 I2C: 00:36: enabled 1
632 17:55:36.422457 I2C: 00:10: enabled 0
633 17:55:36.425546 I2C: 00:0c: enabled 1
634 17:55:36.429435 I2C: 00:50: enabled 1
635 17:55:36.429532 PCI: 00:16.0: enabled 1
636 17:55:36.432473 PCI: 00:16.1: enabled 0
637 17:55:36.435550 PCI: 00:16.4: enabled 0
638 17:55:36.439277 PCI: 00:16.5: enabled 0
639 17:55:36.442353 PCI: 00:17.0: enabled 0
640 17:55:36.442447 PCI: 00:19.0: enabled 1
641 17:55:36.445618 I2C: 00:1a: enabled 1
642 17:55:36.448928 I2C: 00:1a: enabled 0
643 17:55:36.452250 I2C: 00:1a: enabled 0
644 17:55:36.455325 I2C: 00:28: enabled 1
645 17:55:36.455435 I2C: 00:29: enabled 1
646 17:55:36.459282 PCI: 00:19.1: enabled 0
647 17:55:36.462075 PCI: 00:19.2: enabled 1
648 17:55:36.465213 PCI: 00:1a.0: enabled 1
649 17:55:36.465304 PCI: 00:1e.0: enabled 0
650 17:55:36.468902 PCI: 00:1e.1: enabled 0
651 17:55:36.472044 PCI: 00:1e.2: enabled 1
652 17:55:36.475141 SPI: 00: enabled 1
653 17:55:36.479017 PCI: 00:1e.3: enabled 0
654 17:55:36.479112 PCI: 00:1f.0: enabled 1
655 17:55:36.482084 PNP: 0c09.0: enabled 1
656 17:55:36.485757 PCI: 00:1f.1: enabled 1
657 17:55:36.489058 PCI: 00:1f.2: enabled 1
658 17:55:36.489151 PCI: 00:1f.3: enabled 1
659 17:55:36.492241 GENERIC: 0.0: enabled 0
660 17:55:36.495430 PCI: 00:1f.4: enabled 0
661 17:55:36.498909 PCI: 00:1f.5: enabled 1
662 17:55:36.501926 PCI: 00:1f.7: enabled 0
663 17:55:36.502018 Root Device scanning...
664 17:55:36.505503 scan_static_bus for Root Device
665 17:55:36.508606 CPU_CLUSTER: 0 enabled
666 17:55:36.512077 DOMAIN: 0000 enabled
667 17:55:36.514951 DOMAIN: 0000 scanning...
668 17:55:36.518666 PCI: pci_scan_bus for bus 00
669 17:55:36.518759 PCI: 00:00.0 [8086/0000] ops
670 17:55:36.521711 PCI: 00:00.0 [8086/4e22] enabled
671 17:55:36.525441 PCI: 00:02.0 [8086/0000] bus ops
672 17:55:36.528700 PCI: 00:02.0 [8086/4e55] enabled
673 17:55:36.532061 PCI: 00:04.0 [8086/0000] bus ops
674 17:55:36.535405 PCI: 00:04.0 [8086/4e03] enabled
675 17:55:36.538397 PCI: 00:05.0 [8086/0000] bus ops
676 17:55:36.541579 PCI: 00:05.0 [8086/4e19] enabled
677 17:55:36.545327 PCI: 00:08.0 [8086/4e11] enabled
678 17:55:36.548286 PCI: 00:14.0 [8086/0000] bus ops
679 17:55:36.551987 PCI: 00:14.0 [8086/4ded] enabled
680 17:55:36.554878 PCI: 00:14.2 [8086/4def] disabled
681 17:55:36.558404 PCI: 00:14.3 [8086/0000] bus ops
682 17:55:36.561860 PCI: 00:14.3 [8086/4df0] enabled
683 17:55:36.565320 PCI: 00:14.5 [8086/0000] ops
684 17:55:36.568499 PCI: 00:14.5 [8086/4df8] enabled
685 17:55:36.571569 PCI: 00:15.0 [8086/0000] bus ops
686 17:55:36.575191 PCI: 00:15.0 [8086/4de8] enabled
687 17:55:36.578225 PCI: 00:15.1 [8086/0000] bus ops
688 17:55:36.581995 PCI: 00:15.1 [8086/4de9] enabled
689 17:55:36.585173 PCI: 00:15.2 [8086/0000] bus ops
690 17:55:36.588206 PCI: 00:15.2 [8086/4dea] enabled
691 17:55:36.591919 PCI: 00:15.3 [8086/0000] bus ops
692 17:55:36.594898 PCI: 00:15.3 [8086/4deb] enabled
693 17:55:36.598363 PCI: 00:16.0 [8086/0000] ops
694 17:55:36.601429 PCI: 00:16.0 [8086/4de0] enabled
695 17:55:36.604953 PCI: 00:19.0 [8086/0000] bus ops
696 17:55:36.608450 PCI: 00:19.0 [8086/4dc5] enabled
697 17:55:36.611790 PCI: 00:19.2 [8086/0000] ops
698 17:55:36.614624 PCI: 00:19.2 [8086/4dc7] enabled
699 17:55:36.618174 PCI: 00:1a.0 [8086/0000] ops
700 17:55:36.621606 PCI: 00:1a.0 [8086/4dc4] enabled
701 17:55:36.624651 PCI: 00:1e.0 [8086/0000] ops
702 17:55:36.628304 PCI: 00:1e.0 [8086/4da8] disabled
703 17:55:36.631417 PCI: 00:1e.2 [8086/0000] bus ops
704 17:55:36.635070 PCI: 00:1e.2 [8086/4daa] enabled
705 17:55:36.637885 PCI: 00:1f.0 [8086/0000] bus ops
706 17:55:36.641111 PCI: 00:1f.0 [8086/4d87] enabled
707 17:55:36.647913 PCI: Static device PCI: 00:1f.1 not found, disabling it.
708 17:55:36.648052 RTC Init
709 17:55:36.650966 Set power on after power failure.
710 17:55:36.654505 Disabling Deep S3
711 17:55:36.654590 Disabling Deep S3
712 17:55:36.657598 Disabling Deep S4
713 17:55:36.657690 Disabling Deep S4
714 17:55:36.661147 Disabling Deep S5
715 17:55:36.661268 Disabling Deep S5
716 17:55:36.664239 PCI: 00:1f.2 [0000/0000] hidden
717 17:55:36.667946 PCI: 00:1f.3 [8086/0000] bus ops
718 17:55:36.671026 PCI: 00:1f.3 [8086/4dc8] enabled
719 17:55:36.674413 PCI: 00:1f.5 [8086/0000] bus ops
720 17:55:36.677622 PCI: 00:1f.5 [8086/4da4] enabled
721 17:55:36.681282 PCI: Leftover static devices:
722 17:55:36.684569 PCI: 00:12.6
723 17:55:36.684662 PCI: 00:09.0
724 17:55:36.687755 PCI: 00:14.1
725 17:55:36.687855 PCI: 00:16.1
726 17:55:36.687929 PCI: 00:16.4
727 17:55:36.690818 PCI: 00:16.5
728 17:55:36.690918 PCI: 00:17.0
729 17:55:36.694437 PCI: 00:19.1
730 17:55:36.694521 PCI: 00:1e.1
731 17:55:36.694592 PCI: 00:1e.3
732 17:55:36.697571 PCI: 00:1f.1
733 17:55:36.697649 PCI: 00:1f.4
734 17:55:36.700929 PCI: 00:1f.7
735 17:55:36.704082 PCI: Check your devicetree.cb.
736 17:55:36.704165 PCI: 00:02.0 scanning...
737 17:55:36.707649 scan_generic_bus for PCI: 00:02.0
738 17:55:36.714213 scan_generic_bus for PCI: 00:02.0 done
739 17:55:36.717281 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
740 17:55:36.720976 PCI: 00:04.0 scanning...
741 17:55:36.723969 scan_generic_bus for PCI: 00:04.0
742 17:55:36.727532 GENERIC: 0.0 enabled
743 17:55:36.730763 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
744 17:55:36.737618 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
745 17:55:36.740868 PCI: 00:05.0 scanning...
746 17:55:36.743778 scan_generic_bus for PCI: 00:05.0
747 17:55:36.743863 GENERIC: 0.0 enabled
748 17:55:36.750479 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
749 17:55:36.757256 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
750 17:55:36.757382 PCI: 00:14.0 scanning...
751 17:55:36.760289 scan_static_bus for PCI: 00:14.0
752 17:55:36.763799 USB0 port 0 enabled
753 17:55:36.767386 USB0 port 0 scanning...
754 17:55:36.770462 scan_static_bus for USB0 port 0
755 17:55:36.770547 USB2 port 0 enabled
756 17:55:36.773566 USB2 port 1 enabled
757 17:55:36.777251 USB2 port 2 enabled
758 17:55:36.777333 USB2 port 3 enabled
759 17:55:36.780328 USB2 port 4 disabled
760 17:55:36.780410 USB2 port 5 enabled
761 17:55:36.783821 USB2 port 6 disabled
762 17:55:36.787119 USB2 port 7 enabled
763 17:55:36.787217 USB3 port 0 enabled
764 17:55:36.790544 USB3 port 1 enabled
765 17:55:36.793445 USB3 port 2 enabled
766 17:55:36.793548 USB3 port 3 enabled
767 17:55:36.797201 USB2 port 0 scanning...
768 17:55:36.800221 scan_static_bus for USB2 port 0
769 17:55:36.803401 scan_static_bus for USB2 port 0 done
770 17:55:36.806908 scan_bus: bus USB2 port 0 finished in 6 msecs
771 17:55:36.810028 USB2 port 1 scanning...
772 17:55:36.813720 scan_static_bus for USB2 port 1
773 17:55:36.816669 scan_static_bus for USB2 port 1 done
774 17:55:36.823180 scan_bus: bus USB2 port 1 finished in 6 msecs
775 17:55:36.823277 USB2 port 2 scanning...
776 17:55:36.826857 scan_static_bus for USB2 port 2
777 17:55:36.833383 scan_static_bus for USB2 port 2 done
778 17:55:36.837256 scan_bus: bus USB2 port 2 finished in 6 msecs
779 17:55:36.839999 USB2 port 3 scanning...
780 17:55:36.843743 scan_static_bus for USB2 port 3
781 17:55:36.846840 scan_static_bus for USB2 port 3 done
782 17:55:36.849902 scan_bus: bus USB2 port 3 finished in 6 msecs
783 17:55:36.853560 USB2 port 5 scanning...
784 17:55:36.856514 scan_static_bus for USB2 port 5
785 17:55:36.859926 scan_static_bus for USB2 port 5 done
786 17:55:36.863454 scan_bus: bus USB2 port 5 finished in 6 msecs
787 17:55:36.866594 USB2 port 7 scanning...
788 17:55:36.870040 scan_static_bus for USB2 port 7
789 17:55:36.873089 scan_static_bus for USB2 port 7 done
790 17:55:36.879847 scan_bus: bus USB2 port 7 finished in 6 msecs
791 17:55:36.879973 USB3 port 0 scanning...
792 17:55:36.882974 scan_static_bus for USB3 port 0
793 17:55:36.889660 scan_static_bus for USB3 port 0 done
794 17:55:36.893128 scan_bus: bus USB3 port 0 finished in 6 msecs
795 17:55:36.896568 USB3 port 1 scanning...
796 17:55:36.900046 scan_static_bus for USB3 port 1
797 17:55:36.903033 scan_static_bus for USB3 port 1 done
798 17:55:36.906783 scan_bus: bus USB3 port 1 finished in 6 msecs
799 17:55:36.909689 USB3 port 2 scanning...
800 17:55:36.913469 scan_static_bus for USB3 port 2
801 17:55:36.916367 scan_static_bus for USB3 port 2 done
802 17:55:36.919463 scan_bus: bus USB3 port 2 finished in 6 msecs
803 17:55:36.922873 USB3 port 3 scanning...
804 17:55:36.926553 scan_static_bus for USB3 port 3
805 17:55:36.929645 scan_static_bus for USB3 port 3 done
806 17:55:36.936368 scan_bus: bus USB3 port 3 finished in 6 msecs
807 17:55:36.939991 scan_static_bus for USB0 port 0 done
808 17:55:36.942831 scan_bus: bus USB0 port 0 finished in 172 msecs
809 17:55:36.946369 scan_static_bus for PCI: 00:14.0 done
810 17:55:36.952628 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
811 17:55:36.956423 PCI: 00:14.3 scanning...
812 17:55:36.959422 scan_static_bus for PCI: 00:14.3
813 17:55:36.959523 GENERIC: 0.0 enabled
814 17:55:36.962917 scan_static_bus for PCI: 00:14.3 done
815 17:55:36.969690 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
816 17:55:36.972808 PCI: 00:15.0 scanning...
817 17:55:36.976207 scan_static_bus for PCI: 00:15.0
818 17:55:36.976306 I2C: 00:2c enabled
819 17:55:36.979512 I2C: 00:15 enabled
820 17:55:36.982851 scan_static_bus for PCI: 00:15.0 done
821 17:55:36.985939 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
822 17:55:36.989567 PCI: 00:15.1 scanning...
823 17:55:36.993467 scan_static_bus for PCI: 00:15.1
824 17:55:36.996446 scan_static_bus for PCI: 00:15.1 done
825 17:55:37.000629 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
826 17:55:37.004446 PCI: 00:15.2 scanning...
827 17:55:37.006969 scan_static_bus for PCI: 00:15.2
828 17:55:37.010900 GENERIC: 0.0 disabled
829 17:55:37.011004 I2C: 00:15 enabled
830 17:55:37.014240 I2C: 00:10 disabled
831 17:55:37.017860 I2C: 00:10 disabled
832 17:55:37.017967 I2C: 00:2c enabled
833 17:55:37.020770 I2C: 00:40 enabled
834 17:55:37.020865 I2C: 00:10 enabled
835 17:55:37.024398 I2C: 00:39 enabled
836 17:55:37.027922 scan_static_bus for PCI: 00:15.2 done
837 17:55:37.034187 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
838 17:55:37.034312 PCI: 00:15.3 scanning...
839 17:55:37.037931 scan_static_bus for PCI: 00:15.3
840 17:55:37.040917 I2C: 00:36 enabled
841 17:55:37.044571 I2C: 00:10 disabled
842 17:55:37.044693 I2C: 00:0c enabled
843 17:55:37.047491 I2C: 00:50 enabled
844 17:55:37.051015 scan_static_bus for PCI: 00:15.3 done
845 17:55:37.054078 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
846 17:55:37.057770 PCI: 00:19.0 scanning...
847 17:55:37.060806 scan_static_bus for PCI: 00:19.0
848 17:55:37.063994 I2C: 00:1a enabled
849 17:55:37.064087 I2C: 00:1a disabled
850 17:55:37.067513 I2C: 00:1a disabled
851 17:55:37.070528 I2C: 00:28 enabled
852 17:55:37.070630 I2C: 00:29 enabled
853 17:55:37.074131 scan_static_bus for PCI: 00:19.0 done
854 17:55:37.080867 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
855 17:55:37.080961 PCI: 00:1e.2 scanning...
856 17:55:37.087324 scan_generic_bus for PCI: 00:1e.2
857 17:55:37.087418 SPI: 00 enabled
858 17:55:37.094187 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
859 17:55:37.097260 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
860 17:55:37.100968 PCI: 00:1f.0 scanning...
861 17:55:37.103983 scan_static_bus for PCI: 00:1f.0
862 17:55:37.107557 PNP: 0c09.0 enabled
863 17:55:37.107652 PNP: 0c09.0 scanning...
864 17:55:37.110772 scan_static_bus for PNP: 0c09.0
865 17:55:37.117419 scan_static_bus for PNP: 0c09.0 done
866 17:55:37.120819 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
867 17:55:37.124175 scan_static_bus for PCI: 00:1f.0 done
868 17:55:37.130611 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
869 17:55:37.130713 PCI: 00:1f.3 scanning...
870 17:55:37.133851 scan_static_bus for PCI: 00:1f.3
871 17:55:37.137490 GENERIC: 0.0 disabled
872 17:55:37.140587 scan_static_bus for PCI: 00:1f.3 done
873 17:55:37.147425 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
874 17:55:37.147549 PCI: 00:1f.5 scanning...
875 17:55:37.150500 scan_generic_bus for PCI: 00:1f.5
876 17:55:37.157252 scan_generic_bus for PCI: 00:1f.5 done
877 17:55:37.160288 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
878 17:55:37.167008 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
879 17:55:37.170542 scan_static_bus for Root Device done
880 17:55:37.173549 scan_bus: bus Root Device finished in 665 msecs
881 17:55:37.173645 done
882 17:55:37.180371 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1086 ms
883 17:55:37.183280 Chrome EC: UHEPI supported
884 17:55:37.190017 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
885 17:55:37.197067 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
886 17:55:37.199863 SPI flash protection: WPSW=1 SRP0=0
887 17:55:37.203633 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
888 17:55:37.209766 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
889 17:55:37.213448 found VGA at PCI: 00:02.0
890 17:55:37.216552 Setting up VGA for PCI: 00:02.0
891 17:55:37.219725 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
892 17:55:37.226341 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
893 17:55:37.230035 Allocating resources...
894 17:55:37.230126 Reading resources...
895 17:55:37.236898 Root Device read_resources bus 0 link: 0
896 17:55:37.239629 CPU_CLUSTER: 0 read_resources bus 0 link: 0
897 17:55:37.246454 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
898 17:55:37.250069 DOMAIN: 0000 read_resources bus 0 link: 0
899 17:55:37.305001 PCI: 00:04.0 read_resources bus 1 link: 0
900 17:55:37.305499 PCI: 00:04.0 read_resources bus 1 link: 0 done
901 17:55:37.305658 PCI: 00:05.0 read_resources bus 2 link: 0
902 17:55:37.306004 PCI: 00:05.0 read_resources bus 2 link: 0 done
903 17:55:37.306153 PCI: 00:14.0 read_resources bus 0 link: 0
904 17:55:37.306290 USB0 port 0 read_resources bus 0 link: 0
905 17:55:37.306440 USB0 port 0 read_resources bus 0 link: 0 done
906 17:55:37.306578 PCI: 00:14.0 read_resources bus 0 link: 0 done
907 17:55:37.306732 PCI: 00:14.3 read_resources bus 0 link: 0
908 17:55:37.306867 PCI: 00:14.3 read_resources bus 0 link: 0 done
909 17:55:37.307004 PCI: 00:15.0 read_resources bus 0 link: 0
910 17:55:37.327109 PCI: 00:15.0 read_resources bus 0 link: 0 done
911 17:55:37.327290 PCI: 00:15.2 read_resources bus 0 link: 0
912 17:55:37.327435 PCI: 00:15.2 read_resources bus 0 link: 0 done
913 17:55:37.327784 PCI: 00:15.3 read_resources bus 0 link: 0
914 17:55:37.330638 PCI: 00:15.3 read_resources bus 0 link: 0 done
915 17:55:37.334361 PCI: 00:19.0 read_resources bus 0 link: 0
916 17:55:37.337090 PCI: 00:19.0 read_resources bus 0 link: 0 done
917 17:55:37.344521 PCI: 00:1e.2 read_resources bus 3 link: 0
918 17:55:37.348042 PCI: 00:1e.2 read_resources bus 3 link: 0 done
919 17:55:37.354329 PCI: 00:1f.0 read_resources bus 0 link: 0
920 17:55:37.357753 PCI: 00:1f.0 read_resources bus 0 link: 0 done
921 17:55:37.364441 PCI: 00:1f.3 read_resources bus 0 link: 0
922 17:55:37.367491 PCI: 00:1f.3 read_resources bus 0 link: 0 done
923 17:55:37.374373 DOMAIN: 0000 read_resources bus 0 link: 0 done
924 17:55:37.377536 Root Device read_resources bus 0 link: 0 done
925 17:55:37.381136 Done reading resources.
926 17:55:37.384056 Show resources in subtree (Root Device)...After reading.
927 17:55:37.390674 Root Device child on link 0 CPU_CLUSTER: 0
928 17:55:37.394256 CPU_CLUSTER: 0 child on link 0 APIC: 00
929 17:55:37.394435 APIC: 00
930 17:55:37.397372 APIC: 02
931 17:55:37.400433 DOMAIN: 0000 child on link 0 PCI: 00:00.0
932 17:55:37.410685 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
933 17:55:37.420296 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
934 17:55:37.420480 PCI: 00:00.0
935 17:55:37.430233 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
936 17:55:37.440360 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
937 17:55:37.450059 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
938 17:55:37.460190 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
939 17:55:37.470826 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
940 17:55:37.476662 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
941 17:55:37.487101 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
942 17:55:37.496562 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
943 17:55:37.506821 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
944 17:55:37.516412 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
945 17:55:37.523405 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
946 17:55:37.533211 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
947 17:55:37.542977 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
948 17:55:37.552817 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
949 17:55:37.562544 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
950 17:55:37.572770 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
951 17:55:37.582765 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
952 17:55:37.588842 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
953 17:55:37.599125 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
954 17:55:37.602109 PCI: 00:02.0
955 17:55:37.612274 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
956 17:55:37.621960 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
957 17:55:37.628333 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
958 17:55:37.634986 PCI: 00:04.0 child on link 0 GENERIC: 0.0
959 17:55:37.644961 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
960 17:55:37.645116 GENERIC: 0.0
961 17:55:37.651553 PCI: 00:05.0 child on link 0 GENERIC: 0.0
962 17:55:37.661469 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 17:55:37.661622 GENERIC: 0.0
964 17:55:37.664496 PCI: 00:08.0
965 17:55:37.674551 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
966 17:55:37.678078 PCI: 00:14.0 child on link 0 USB0 port 0
967 17:55:37.688590 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
968 17:55:37.692373 USB0 port 0 child on link 0 USB2 port 0
969 17:55:37.695357 USB2 port 0
970 17:55:37.695451 USB2 port 1
971 17:55:37.699091 USB2 port 2
972 17:55:37.699183 USB2 port 3
973 17:55:37.702013 USB2 port 4
974 17:55:37.702153 USB2 port 5
975 17:55:37.705613 USB2 port 6
976 17:55:37.708659 USB2 port 7
977 17:55:37.708769 USB3 port 0
978 17:55:37.712305 USB3 port 1
979 17:55:37.712440 USB3 port 2
980 17:55:37.715307 USB3 port 3
981 17:55:37.715432 PCI: 00:14.2
982 17:55:37.722104 PCI: 00:14.3 child on link 0 GENERIC: 0.0
983 17:55:37.731785 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
984 17:55:37.731926 GENERIC: 0.0
985 17:55:37.735015 PCI: 00:14.5
986 17:55:37.744870 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 17:55:37.748547 PCI: 00:15.0 child on link 0 I2C: 00:2c
988 17:55:37.758813 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 17:55:37.758953 I2C: 00:2c
990 17:55:37.761710 I2C: 00:15
991 17:55:37.761794 PCI: 00:15.1
992 17:55:37.771840 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 17:55:37.778115 PCI: 00:15.2 child on link 0 GENERIC: 0.0
994 17:55:37.788453 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 17:55:37.788610 GENERIC: 0.0
996 17:55:37.792084 I2C: 00:15
997 17:55:37.792179 I2C: 00:10
998 17:55:37.794886 I2C: 00:10
999 17:55:37.795000 I2C: 00:2c
1000 17:55:37.795113 I2C: 00:40
1001 17:55:37.798567 I2C: 00:10
1002 17:55:37.798690 I2C: 00:39
1003 17:55:37.805079 PCI: 00:15.3 child on link 0 I2C: 00:36
1004 17:55:37.814828 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 17:55:37.814958 I2C: 00:36
1006 17:55:37.818392 I2C: 00:10
1007 17:55:37.818499 I2C: 00:0c
1008 17:55:37.821331 I2C: 00:50
1009 17:55:37.821434 PCI: 00:16.0
1010 17:55:37.831278 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 17:55:37.834805 PCI: 00:19.0 child on link 0 I2C: 00:1a
1012 17:55:37.844451 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 17:55:37.847668 I2C: 00:1a
1014 17:55:37.847787 I2C: 00:1a
1015 17:55:37.851094 I2C: 00:1a
1016 17:55:37.851185 I2C: 00:28
1017 17:55:37.854488 I2C: 00:29
1018 17:55:37.854578 PCI: 00:19.2
1019 17:55:37.867941 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1020 17:55:37.878050 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1021 17:55:37.878176 PCI: 00:1a.0
1022 17:55:37.887381 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 17:55:37.890957 PCI: 00:1e.0
1024 17:55:37.894275 PCI: 00:1e.2 child on link 0 SPI: 00
1025 17:55:37.904533 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 17:55:37.904678 SPI: 00
1027 17:55:37.907745 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1028 17:55:37.917318 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1029 17:55:37.920951 PNP: 0c09.0
1030 17:55:37.927532 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1031 17:55:37.930614 PCI: 00:1f.2
1032 17:55:37.940446 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1033 17:55:37.947160 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1034 17:55:37.954214 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1035 17:55:37.963803 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1036 17:55:37.973766 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1037 17:55:37.973915 GENERIC: 0.0
1038 17:55:37.976732 PCI: 00:1f.5
1039 17:55:37.987164 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1040 17:55:37.993705 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1041 17:55:38.000151 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1042 17:55:38.006880 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1043 17:55:38.013567 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1044 17:55:38.019883 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1045 17:55:38.029746 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1046 17:55:38.033278 DOMAIN: 0000: Resource ranges:
1047 17:55:38.036457 * Base: 1000, Size: 800, Tag: 100
1048 17:55:38.040199 * Base: 1900, Size: e700, Tag: 100
1049 17:55:38.043308 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1050 17:55:38.050139 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1051 17:55:38.059801 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1052 17:55:38.066462 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1053 17:55:38.073256 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1054 17:55:38.082935 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1055 17:55:38.089816 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1056 17:55:38.096359 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1057 17:55:38.102807 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1058 17:55:38.112882 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1059 17:55:38.119662 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1060 17:55:38.125872 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1061 17:55:38.135704 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1062 17:55:38.142884 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1063 17:55:38.149034 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1064 17:55:38.158908 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1065 17:55:38.165461 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1066 17:55:38.172513 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1067 17:55:38.182012 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1068 17:55:38.188929 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1069 17:55:38.195502 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1070 17:55:38.205459 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1071 17:55:38.211939 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1072 17:55:38.218845 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1073 17:55:38.221971 DOMAIN: 0000: Resource ranges:
1074 17:55:38.228525 * Base: 7fc00000, Size: 40400000, Tag: 200
1075 17:55:38.231713 * Base: d0000000, Size: 2b000000, Tag: 200
1076 17:55:38.235201 * Base: fb001000, Size: 2fff000, Tag: 200
1077 17:55:38.241478 * Base: fe010000, Size: 22000, Tag: 200
1078 17:55:38.245059 * Base: fe033000, Size: a4d000, Tag: 200
1079 17:55:38.248389 * Base: fea88000, Size: 2f8000, Tag: 200
1080 17:55:38.251727 * Base: fed88000, Size: 8000, Tag: 200
1081 17:55:38.258378 * Base: fed93000, Size: d000, Tag: 200
1082 17:55:38.262689 * Base: feda2000, Size: 125e000, Tag: 200
1083 17:55:38.265835 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1084 17:55:38.272414 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1085 17:55:38.279014 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1086 17:55:38.285596 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1087 17:55:38.292004 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1088 17:55:38.298811 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1089 17:55:38.305474 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1090 17:55:38.311893 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1091 17:55:38.318685 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1092 17:55:38.325308 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1093 17:55:38.331768 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1094 17:55:38.338601 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1095 17:55:38.345195 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1096 17:55:38.352048 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1097 17:55:38.358360 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1098 17:55:38.364938 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1099 17:55:38.371506 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1100 17:55:38.378205 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1101 17:55:38.384747 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1102 17:55:38.391593 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1103 17:55:38.398098 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1104 17:55:38.404762 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1105 17:55:38.415146 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1106 17:55:38.417837 Root Device assign_resources, bus 0 link: 0
1107 17:55:38.421531 DOMAIN: 0000 assign_resources, bus 0 link: 0
1108 17:55:38.431157 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1109 17:55:38.438074 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1110 17:55:38.447789 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1111 17:55:38.454594 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1112 17:55:38.457761 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 17:55:38.464596 PCI: 00:04.0 assign_resources, bus 1 link: 0
1114 17:55:38.470833 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1115 17:55:38.477614 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 17:55:38.480907 PCI: 00:05.0 assign_resources, bus 2 link: 0
1117 17:55:38.490784 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1118 17:55:38.497826 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1119 17:55:38.501015 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 17:55:38.507837 PCI: 00:14.0 assign_resources, bus 0 link: 0
1121 17:55:38.513906 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1122 17:55:38.520584 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 17:55:38.524117 PCI: 00:14.3 assign_resources, bus 0 link: 0
1124 17:55:38.530288 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1125 17:55:38.541010 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1126 17:55:38.544218 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 17:55:38.550817 PCI: 00:15.0 assign_resources, bus 0 link: 0
1128 17:55:38.557047 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1129 17:55:38.567267 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1130 17:55:38.570426 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 17:55:38.573495 PCI: 00:15.2 assign_resources, bus 0 link: 0
1132 17:55:38.583867 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1133 17:55:38.586875 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 17:55:38.593496 PCI: 00:15.3 assign_resources, bus 0 link: 0
1135 17:55:38.600334 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1136 17:55:38.610143 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1137 17:55:38.613272 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 17:55:38.616379 PCI: 00:19.0 assign_resources, bus 0 link: 0
1139 17:55:38.626394 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1140 17:55:38.633266 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1141 17:55:38.642993 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1142 17:55:38.646016 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 17:55:38.652823 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1144 17:55:38.655953 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 17:55:38.659750 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1146 17:55:38.666410 LPC: Trying to open IO window from 800 size 1ff
1147 17:55:38.672453 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1148 17:55:38.683072 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1149 17:55:38.685902 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 17:55:38.692678 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1151 17:55:38.699471 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1152 17:55:38.702953 DOMAIN: 0000 assign_resources, bus 0 link: 0
1153 17:55:38.708951 Root Device assign_resources, bus 0 link: 0
1154 17:55:38.709042 Done setting resources.
1155 17:55:38.715478 Show resources in subtree (Root Device)...After assigning values.
1156 17:55:38.722439 Root Device child on link 0 CPU_CLUSTER: 0
1157 17:55:38.725557 CPU_CLUSTER: 0 child on link 0 APIC: 00
1158 17:55:38.725651 APIC: 00
1159 17:55:38.729234 APIC: 02
1160 17:55:38.732268 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1161 17:55:38.742015 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1162 17:55:38.751986 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1163 17:55:38.752089 PCI: 00:00.0
1164 17:55:38.762322 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1165 17:55:38.771839 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1166 17:55:38.781633 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1167 17:55:38.791472 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1168 17:55:38.801885 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1169 17:55:38.808376 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1170 17:55:38.818292 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1171 17:55:38.828158 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1172 17:55:38.838077 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1173 17:55:38.847808 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1174 17:55:38.857783 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1175 17:55:38.864559 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1176 17:55:38.874068 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1177 17:55:38.884176 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1178 17:55:38.893973 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1179 17:55:38.904406 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1180 17:55:38.914323 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1181 17:55:38.920553 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1182 17:55:38.930747 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1183 17:55:38.933907 PCI: 00:02.0
1184 17:55:38.943647 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1185 17:55:38.953713 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1186 17:55:38.963658 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1187 17:55:38.966815 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1188 17:55:38.976725 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1189 17:55:38.980274 GENERIC: 0.0
1190 17:55:38.983316 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1191 17:55:38.993494 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1192 17:55:38.997066 GENERIC: 0.0
1193 17:55:38.997159 PCI: 00:08.0
1194 17:55:39.009790 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1195 17:55:39.013325 PCI: 00:14.0 child on link 0 USB0 port 0
1196 17:55:39.023048 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1197 17:55:39.026886 USB0 port 0 child on link 0 USB2 port 0
1198 17:55:39.029985 USB2 port 0
1199 17:55:39.030065 USB2 port 1
1200 17:55:39.033113 USB2 port 2
1201 17:55:39.036255 USB2 port 3
1202 17:55:39.036348 USB2 port 4
1203 17:55:39.039840 USB2 port 5
1204 17:55:39.039932 USB2 port 6
1205 17:55:39.042970 USB2 port 7
1206 17:55:39.043064 USB3 port 0
1207 17:55:39.046530 USB3 port 1
1208 17:55:39.046625 USB3 port 2
1209 17:55:39.049933 USB3 port 3
1210 17:55:39.050031 PCI: 00:14.2
1211 17:55:39.056350 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1212 17:55:39.065972 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1213 17:55:39.066118 GENERIC: 0.0
1214 17:55:39.069581 PCI: 00:14.5
1215 17:55:39.079244 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1216 17:55:39.083137 PCI: 00:15.0 child on link 0 I2C: 00:2c
1217 17:55:39.092558 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1218 17:55:39.096159 I2C: 00:2c
1219 17:55:39.096259 I2C: 00:15
1220 17:55:39.098995 PCI: 00:15.1
1221 17:55:39.109289 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1222 17:55:39.112302 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1223 17:55:39.122505 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1224 17:55:39.125729 GENERIC: 0.0
1225 17:55:39.125824 I2C: 00:15
1226 17:55:39.128792 I2C: 00:10
1227 17:55:39.128954 I2C: 00:10
1228 17:55:39.132481 I2C: 00:2c
1229 17:55:39.132645 I2C: 00:40
1230 17:55:39.135486 I2C: 00:10
1231 17:55:39.135652 I2C: 00:39
1232 17:55:39.139309 PCI: 00:15.3 child on link 0 I2C: 00:36
1233 17:55:39.152199 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1234 17:55:39.152375 I2C: 00:36
1235 17:55:39.152517 I2C: 00:10
1236 17:55:39.155691 I2C: 00:0c
1237 17:55:39.155838 I2C: 00:50
1238 17:55:39.158658 PCI: 00:16.0
1239 17:55:39.168705 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1240 17:55:39.172305 PCI: 00:19.0 child on link 0 I2C: 00:1a
1241 17:55:39.181776 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1242 17:55:39.185667 I2C: 00:1a
1243 17:55:39.185816 I2C: 00:1a
1244 17:55:39.188896 I2C: 00:1a
1245 17:55:39.188992 I2C: 00:28
1246 17:55:39.191923 I2C: 00:29
1247 17:55:39.192004 PCI: 00:19.2
1248 17:55:39.205558 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 17:55:39.215334 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1250 17:55:39.215439 PCI: 00:1a.0
1251 17:55:39.225031 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1252 17:55:39.228722 PCI: 00:1e.0
1253 17:55:39.231807 PCI: 00:1e.2 child on link 0 SPI: 00
1254 17:55:39.241641 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1255 17:55:39.244679 SPI: 00
1256 17:55:39.248455 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1257 17:55:39.258196 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1258 17:55:39.258342 PNP: 0c09.0
1259 17:55:39.267712 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1260 17:55:39.267831 PCI: 00:1f.2
1261 17:55:39.277936 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1262 17:55:39.288087 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1263 17:55:39.291478 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1264 17:55:39.301022 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1265 17:55:39.314514 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1266 17:55:39.314656 GENERIC: 0.0
1267 17:55:39.317612 PCI: 00:1f.5
1268 17:55:39.327467 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1269 17:55:39.327631 Done allocating resources.
1270 17:55:39.334205 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2098 ms
1271 17:55:39.337530 Enabling resources...
1272 17:55:39.340588 PCI: 00:00.0 subsystem <- 8086/4e22
1273 17:55:39.343789 PCI: 00:00.0 cmd <- 06
1274 17:55:39.347478 PCI: 00:02.0 subsystem <- 8086/4e55
1275 17:55:39.350602 PCI: 00:02.0 cmd <- 03
1276 17:55:39.354269 PCI: 00:04.0 subsystem <- 8086/4e03
1277 17:55:39.357293 PCI: 00:04.0 cmd <- 02
1278 17:55:39.360893 PCI: 00:05.0 bridge ctrl <- 0003
1279 17:55:39.363819 PCI: 00:05.0 subsystem <- 8086/4e19
1280 17:55:39.367550 PCI: 00:05.0 cmd <- 02
1281 17:55:39.367645 PCI: 00:08.0 cmd <- 06
1282 17:55:39.373553 PCI: 00:14.0 subsystem <- 8086/4ded
1283 17:55:39.373663 PCI: 00:14.0 cmd <- 02
1284 17:55:39.377028 PCI: 00:14.3 subsystem <- 8086/4df0
1285 17:55:39.380674 PCI: 00:14.3 cmd <- 02
1286 17:55:39.384165 PCI: 00:14.5 subsystem <- 8086/4df8
1287 17:55:39.387176 PCI: 00:14.5 cmd <- 06
1288 17:55:39.390314 PCI: 00:15.0 subsystem <- 8086/4de8
1289 17:55:39.393773 PCI: 00:15.0 cmd <- 02
1290 17:55:39.397262 PCI: 00:15.1 subsystem <- 8086/4de9
1291 17:55:39.400156 PCI: 00:15.1 cmd <- 02
1292 17:55:39.403920 PCI: 00:15.2 subsystem <- 8086/4dea
1293 17:55:39.404026 PCI: 00:15.2 cmd <- 02
1294 17:55:39.410727 PCI: 00:15.3 subsystem <- 8086/4deb
1295 17:55:39.410827 PCI: 00:15.3 cmd <- 02
1296 17:55:39.413784 PCI: 00:16.0 subsystem <- 8086/4de0
1297 17:55:39.417297 PCI: 00:16.0 cmd <- 02
1298 17:55:39.420303 PCI: 00:19.0 subsystem <- 8086/4dc5
1299 17:55:39.423982 PCI: 00:19.0 cmd <- 02
1300 17:55:39.427121 PCI: 00:19.2 subsystem <- 8086/4dc7
1301 17:55:39.430079 PCI: 00:19.2 cmd <- 06
1302 17:55:39.433570 PCI: 00:1a.0 subsystem <- 8086/4dc4
1303 17:55:39.437261 PCI: 00:1a.0 cmd <- 06
1304 17:55:39.439832 PCI: 00:1e.2 subsystem <- 8086/4daa
1305 17:55:39.443289 PCI: 00:1e.2 cmd <- 06
1306 17:55:39.446848 PCI: 00:1f.0 subsystem <- 8086/4d87
1307 17:55:39.446954 PCI: 00:1f.0 cmd <- 407
1308 17:55:39.453561 PCI: 00:1f.3 subsystem <- 8086/4dc8
1309 17:55:39.453663 PCI: 00:1f.3 cmd <- 02
1310 17:55:39.456578 PCI: 00:1f.5 subsystem <- 8086/4da4
1311 17:55:39.459845 PCI: 00:1f.5 cmd <- 406
1312 17:55:39.464723 done.
1313 17:55:39.468537 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1314 17:55:39.471484 Initializing devices...
1315 17:55:39.474266 Root Device init
1316 17:55:39.474360 mainboard: EC init
1317 17:55:39.481352 Chrome EC: Set SMI mask to 0x0000000000000000
1318 17:55:39.488064 Chrome EC: clear events_b mask to 0x0000000000000000
1319 17:55:39.490973 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1320 17:55:39.497473 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1321 17:55:39.504261 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1322 17:55:39.507742 Chrome EC: Set WAKE mask to 0x0000000000000000
1323 17:55:39.514481 Root Device init finished in 35 msecs
1324 17:55:39.517604 PCI: 00:00.0 init
1325 17:55:39.517715 CPU TDP = 6 Watts
1326 17:55:39.520509 CPU PL1 = 7 Watts
1327 17:55:39.524126 CPU PL2 = 12 Watts
1328 17:55:39.527753 PCI: 00:00.0 init finished in 6 msecs
1329 17:55:39.527852 PCI: 00:02.0 init
1330 17:55:39.530820 GMA: Found VBT in CBFS
1331 17:55:39.533951 GMA: Found valid VBT in CBFS
1332 17:55:39.540575 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1333 17:55:39.547554 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1334 17:55:39.551055 PCI: 00:02.0 init finished in 18 msecs
1335 17:55:39.553869 PCI: 00:08.0 init
1336 17:55:39.557601 PCI: 00:08.0 init finished in 0 msecs
1337 17:55:39.560596 PCI: 00:14.0 init
1338 17:55:39.563752 XHCI: Updated LFPS sampling OFF time to 9 ms
1339 17:55:39.567446 PCI: 00:14.0 init finished in 4 msecs
1340 17:55:39.570512 PCI: 00:15.0 init
1341 17:55:39.574145 I2C bus 0 version 0x3230302a
1342 17:55:39.577257 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1343 17:55:39.580559 PCI: 00:15.0 init finished in 6 msecs
1344 17:55:39.583996 PCI: 00:15.1 init
1345 17:55:39.587393 I2C bus 1 version 0x3230302a
1346 17:55:39.590418 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1347 17:55:39.593946 PCI: 00:15.1 init finished in 6 msecs
1348 17:55:39.596911 PCI: 00:15.2 init
1349 17:55:39.597011 I2C bus 2 version 0x3230302a
1350 17:55:39.603581 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1351 17:55:39.607047 PCI: 00:15.2 init finished in 6 msecs
1352 17:55:39.607140 PCI: 00:15.3 init
1353 17:55:39.610191 I2C bus 3 version 0x3230302a
1354 17:55:39.613798 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1355 17:55:39.617234 PCI: 00:15.3 init finished in 6 msecs
1356 17:55:39.620355 PCI: 00:16.0 init
1357 17:55:39.623911 PCI: 00:16.0 init finished in 0 msecs
1358 17:55:39.626859 PCI: 00:19.0 init
1359 17:55:39.630512 I2C bus 4 version 0x3230302a
1360 17:55:39.633617 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1361 17:55:39.636812 PCI: 00:19.0 init finished in 6 msecs
1362 17:55:39.640412 PCI: 00:1a.0 init
1363 17:55:39.643446 PCI: 00:1a.0 init finished in 0 msecs
1364 17:55:39.646948 PCI: 00:1f.0 init
1365 17:55:39.650177 IOAPIC: Initializing IOAPIC at 0xfec00000
1366 17:55:39.653550 IOAPIC: Bootstrap Processor Local APIC = 0x00
1367 17:55:39.656636 IOAPIC: ID = 0x02
1368 17:55:39.660089 IOAPIC: Dumping registers
1369 17:55:39.660181 reg 0x0000: 0x02000000
1370 17:55:39.663561 reg 0x0001: 0x00770020
1371 17:55:39.666587 reg 0x0002: 0x00000000
1372 17:55:39.670024 PCI: 00:1f.0 init finished in 21 msecs
1373 17:55:39.673244 PCI: 00:1f.2 init
1374 17:55:39.676832 Disabling ACPI via APMC.
1375 17:55:39.680038 APMC done.
1376 17:55:39.683505 PCI: 00:1f.2 init finished in 5 msecs
1377 17:55:39.693308 PNP: 0c09.0 init
1378 17:55:39.696841 Google Chrome EC uptime: 6.548 seconds
1379 17:55:39.703459 Google Chrome AP resets since EC boot: 0
1380 17:55:39.707143 Google Chrome most recent AP reset causes:
1381 17:55:39.713718 Google Chrome EC reset flags at last EC boot: reset-pin
1382 17:55:39.716833 PNP: 0c09.0 init finished in 18 msecs
1383 17:55:39.716928 Devices initialized
1384 17:55:39.719856 Show all devs... After init.
1385 17:55:39.723306 Root Device: enabled 1
1386 17:55:39.726795 CPU_CLUSTER: 0: enabled 1
1387 17:55:39.729778 DOMAIN: 0000: enabled 1
1388 17:55:39.729870 PCI: 00:00.0: enabled 1
1389 17:55:39.733423 PCI: 00:02.0: enabled 1
1390 17:55:39.736520 PCI: 00:04.0: enabled 1
1391 17:55:39.736642 PCI: 00:05.0: enabled 1
1392 17:55:39.740226 PCI: 00:09.0: enabled 0
1393 17:55:39.743256 PCI: 00:12.6: enabled 0
1394 17:55:39.746281 PCI: 00:14.0: enabled 1
1395 17:55:39.746403 PCI: 00:14.1: enabled 0
1396 17:55:39.750052 PCI: 00:14.2: enabled 0
1397 17:55:39.753004 PCI: 00:14.3: enabled 1
1398 17:55:39.756700 PCI: 00:14.5: enabled 1
1399 17:55:39.756829 PCI: 00:15.0: enabled 1
1400 17:55:39.759774 PCI: 00:15.1: enabled 1
1401 17:55:39.762910 PCI: 00:15.2: enabled 1
1402 17:55:39.766422 PCI: 00:15.3: enabled 1
1403 17:55:39.766547 PCI: 00:16.0: enabled 1
1404 17:55:39.769825 PCI: 00:16.1: enabled 0
1405 17:55:39.772774 PCI: 00:16.4: enabled 0
1406 17:55:39.772884 PCI: 00:16.5: enabled 0
1407 17:55:39.776341 PCI: 00:17.0: enabled 0
1408 17:55:39.779461 PCI: 00:19.0: enabled 1
1409 17:55:39.783174 PCI: 00:19.1: enabled 0
1410 17:55:39.783297 PCI: 00:19.2: enabled 1
1411 17:55:39.786540 PCI: 00:1a.0: enabled 1
1412 17:55:39.789360 PCI: 00:1c.0: enabled 0
1413 17:55:39.792985 PCI: 00:1c.1: enabled 0
1414 17:55:39.793073 PCI: 00:1c.2: enabled 0
1415 17:55:39.796531 PCI: 00:1c.3: enabled 0
1416 17:55:39.799455 PCI: 00:1c.4: enabled 0
1417 17:55:39.802831 PCI: 00:1c.5: enabled 0
1418 17:55:39.802923 PCI: 00:1c.6: enabled 0
1419 17:55:39.806327 PCI: 00:1c.7: enabled 1
1420 17:55:39.809302 PCI: 00:1e.0: enabled 0
1421 17:55:39.813256 PCI: 00:1e.1: enabled 0
1422 17:55:39.813351 PCI: 00:1e.2: enabled 1
1423 17:55:39.815969 PCI: 00:1e.3: enabled 0
1424 17:55:39.819597 PCI: 00:1f.0: enabled 1
1425 17:55:39.819712 PCI: 00:1f.1: enabled 0
1426 17:55:39.822662 PCI: 00:1f.2: enabled 1
1427 17:55:39.825712 PCI: 00:1f.3: enabled 1
1428 17:55:39.829307 PCI: 00:1f.4: enabled 0
1429 17:55:39.829388 PCI: 00:1f.5: enabled 1
1430 17:55:39.832569 PCI: 00:1f.7: enabled 0
1431 17:55:39.835997 GENERIC: 0.0: enabled 1
1432 17:55:39.839065 GENERIC: 0.0: enabled 1
1433 17:55:39.839157 USB0 port 0: enabled 1
1434 17:55:39.842244 GENERIC: 0.0: enabled 1
1435 17:55:39.845919 I2C: 00:2c: enabled 1
1436 17:55:39.846010 I2C: 00:15: enabled 1
1437 17:55:39.848910 GENERIC: 0.0: enabled 0
1438 17:55:39.852540 I2C: 00:15: enabled 1
1439 17:55:39.852632 I2C: 00:10: enabled 0
1440 17:55:39.855680 I2C: 00:10: enabled 0
1441 17:55:39.859059 I2C: 00:2c: enabled 1
1442 17:55:39.862239 I2C: 00:40: enabled 1
1443 17:55:39.862331 I2C: 00:10: enabled 1
1444 17:55:39.865407 I2C: 00:39: enabled 1
1445 17:55:39.869116 I2C: 00:36: enabled 1
1446 17:55:39.869207 I2C: 00:10: enabled 0
1447 17:55:39.872035 I2C: 00:0c: enabled 1
1448 17:55:39.875509 I2C: 00:50: enabled 1
1449 17:55:39.875601 I2C: 00:1a: enabled 1
1450 17:55:39.878773 I2C: 00:1a: enabled 0
1451 17:55:39.882192 I2C: 00:1a: enabled 0
1452 17:55:39.882284 I2C: 00:28: enabled 1
1453 17:55:39.885536 I2C: 00:29: enabled 1
1454 17:55:39.888598 PCI: 00:00.0: enabled 1
1455 17:55:39.888689 SPI: 00: enabled 1
1456 17:55:39.892308 PNP: 0c09.0: enabled 1
1457 17:55:39.895262 GENERIC: 0.0: enabled 0
1458 17:55:39.895354 USB2 port 0: enabled 1
1459 17:55:39.899028 USB2 port 1: enabled 1
1460 17:55:39.902039 USB2 port 2: enabled 1
1461 17:55:39.905486 USB2 port 3: enabled 1
1462 17:55:39.905578 USB2 port 4: enabled 0
1463 17:55:39.908965 USB2 port 5: enabled 1
1464 17:55:39.911848 USB2 port 6: enabled 0
1465 17:55:39.911939 USB2 port 7: enabled 1
1466 17:55:39.915390 USB3 port 0: enabled 1
1467 17:55:39.919088 USB3 port 1: enabled 1
1468 17:55:39.919180 USB3 port 2: enabled 1
1469 17:55:39.921854 USB3 port 3: enabled 1
1470 17:55:39.925388 APIC: 00: enabled 1
1471 17:55:39.925479 APIC: 02: enabled 1
1472 17:55:39.928379 PCI: 00:08.0: enabled 1
1473 17:55:39.935202 BS: BS_DEV_INIT run times (exec / console): 23 / 437 ms
1474 17:55:39.938770 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1475 17:55:39.941776 ELOG: NV offset 0xbfa000 size 0x1000
1476 17:55:39.950177 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1477 17:55:39.956685 ELOG: Event(17) added with size 13 at 2023-10-09 17:55:39 UTC
1478 17:55:39.963397 ELOG: Event(92) added with size 9 at 2023-10-09 17:55:39 UTC
1479 17:55:39.969528 ELOG: Event(93) added with size 9 at 2023-10-09 17:55:39 UTC
1480 17:55:39.976335 ELOG: Event(9E) added with size 10 at 2023-10-09 17:55:39 UTC
1481 17:55:39.982561 ELOG: Event(9F) added with size 14 at 2023-10-09 17:55:39 UTC
1482 17:55:39.989620 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1483 17:55:39.993145 ELOG: Event(A1) added with size 10 at 2023-10-09 17:55:39 UTC
1484 17:55:40.002744 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1485 17:55:40.009587 ELOG: Event(A0) added with size 9 at 2023-10-09 17:55:39 UTC
1486 17:55:40.012502 elog_add_boot_reason: Logged dev mode boot
1487 17:55:40.019263 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1488 17:55:40.019356 Finalize devices...
1489 17:55:40.022703 Devices finalized
1490 17:55:40.028905 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1491 17:55:40.032417 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1492 17:55:40.039514 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1493 17:55:40.042559 ME: HFSTS1 : 0x80030045
1494 17:55:40.045556 ME: HFSTS2 : 0x30280136
1495 17:55:40.051922 ME: HFSTS3 : 0x00000050
1496 17:55:40.055200 ME: HFSTS4 : 0x00004000
1497 17:55:40.058636 ME: HFSTS5 : 0x00000000
1498 17:55:40.062066 ME: HFSTS6 : 0x40400006
1499 17:55:40.065659 ME: Manufacturing Mode : NO
1500 17:55:40.068814 ME: FW Partition Table : OK
1501 17:55:40.071900 ME: Bringup Loader Failure : NO
1502 17:55:40.075545 ME: Firmware Init Complete : NO
1503 17:55:40.078648 ME: Boot Options Present : NO
1504 17:55:40.081751 ME: Update In Progress : NO
1505 17:55:40.085308 ME: D0i3 Support : YES
1506 17:55:40.088371 ME: Low Power State Enabled : NO
1507 17:55:40.092111 ME: CPU Replaced : YES
1508 17:55:40.095376 ME: CPU Replacement Valid : YES
1509 17:55:40.098204 ME: Current Working State : 5
1510 17:55:40.101798 ME: Current Operation State : 1
1511 17:55:40.105245 ME: Current Operation Mode : 3
1512 17:55:40.108385 ME: Error Code : 0
1513 17:55:40.111764 ME: CPU Debug Disabled : YES
1514 17:55:40.115330 ME: TXT Support : NO
1515 17:55:40.121918 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1516 17:55:40.127930 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1517 17:55:40.131580 ACPI: Writing ACPI tables at 76b27000.
1518 17:55:40.135394 ACPI: * FACS
1519 17:55:40.135487 ACPI: * DSDT
1520 17:55:40.138517 Ramoops buffer: 0x100000@0x76a26000.
1521 17:55:40.144770 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1522 17:55:40.147862 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1523 17:55:40.151527 Google Chrome EC: version:
1524 17:55:40.154562 ro: magolor_1.1.9999-103b6f9
1525 17:55:40.158307 rw: magolor_1.1.9999-103b6f9
1526 17:55:40.161714 running image: 1
1527 17:55:40.165033 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1528 17:55:40.169516 ACPI: * FADT
1529 17:55:40.169610 SCI is IRQ9
1530 17:55:40.176162 ACPI: added table 1/32, length now 40
1531 17:55:40.176294 ACPI: * SSDT
1532 17:55:40.179221 Found 1 CPU(s) with 2 core(s) each.
1533 17:55:40.182846 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1534 17:55:40.189219 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1535 17:55:40.192819 Could not locate 'wifi_sar' in VPD.
1536 17:55:40.195953 Checking CBFS for default SAR values
1537 17:55:40.202708 wifi_sar_defaults.hex has bad len in CBFS
1538 17:55:40.205828 failed from getting SAR limits!
1539 17:55:40.208940 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1540 17:55:40.215537 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1541 17:55:40.218998 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1542 17:55:40.225864 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1543 17:55:40.229211 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1544 17:55:40.235535 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1545 17:55:40.239325 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1546 17:55:40.245833 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1547 17:55:40.252220 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1548 17:55:40.258882 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1549 17:55:40.261973 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1550 17:55:40.268782 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1551 17:55:40.275241 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1552 17:55:40.278869 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1553 17:55:40.282310 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1554 17:55:40.290580 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1555 17:55:40.294278 PS2K: Passing 101 keymaps to kernel
1556 17:55:40.300509 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1557 17:55:40.307160 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1558 17:55:40.310780 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1559 17:55:40.316928 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1560 17:55:40.323750 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1561 17:55:40.327303 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1562 17:55:40.334027 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1563 17:55:40.340451 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1564 17:55:40.343801 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1565 17:55:40.350507 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1566 17:55:40.353447 ACPI: added table 2/32, length now 44
1567 17:55:40.356931 ACPI: * MCFG
1568 17:55:40.360323 ACPI: added table 3/32, length now 48
1569 17:55:40.360417 ACPI: * TPM2
1570 17:55:40.363459 TPM2 log created at 0x76a16000
1571 17:55:40.367189 ACPI: added table 4/32, length now 52
1572 17:55:40.370113 ACPI: * MADT
1573 17:55:40.370206 SCI is IRQ9
1574 17:55:40.373719 ACPI: added table 5/32, length now 56
1575 17:55:40.376702 current = 76b2d580
1576 17:55:40.380271 ACPI: * DMAR
1577 17:55:40.383315 ACPI: added table 6/32, length now 60
1578 17:55:40.386808 ACPI: added table 7/32, length now 64
1579 17:55:40.386901 ACPI: * HPET
1580 17:55:40.393178 ACPI: added table 8/32, length now 68
1581 17:55:40.393272 ACPI: done.
1582 17:55:40.397056 ACPI tables: 26304 bytes.
1583 17:55:40.399826 smbios_write_tables: 76a15000
1584 17:55:40.403406 EC returned error result code 3
1585 17:55:40.406463 Couldn't obtain OEM name from CBI
1586 17:55:40.410230 Create SMBIOS type 16
1587 17:55:40.410358 Create SMBIOS type 17
1588 17:55:40.413240 GENERIC: 0.0 (WIFI Device)
1589 17:55:40.416920 SMBIOS tables: 913 bytes.
1590 17:55:40.419917 Writing table forward entry at 0x00000500
1591 17:55:40.426711 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1592 17:55:40.429750 Writing coreboot table at 0x76b4b000
1593 17:55:40.436435 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1594 17:55:40.439995 1. 0000000000001000-000000000009ffff: RAM
1595 17:55:40.446767 2. 00000000000a0000-00000000000fffff: RESERVED
1596 17:55:40.449922 3. 0000000000100000-0000000076a14fff: RAM
1597 17:55:40.456349 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1598 17:55:40.459729 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1599 17:55:40.466169 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1600 17:55:40.469566 7. 0000000077000000-000000007fbfffff: RESERVED
1601 17:55:40.476301 8. 00000000c0000000-00000000cfffffff: RESERVED
1602 17:55:40.479304 9. 00000000fb000000-00000000fb000fff: RESERVED
1603 17:55:40.486096 10. 00000000fe000000-00000000fe00ffff: RESERVED
1604 17:55:40.489250 11. 00000000fea80000-00000000fea87fff: RESERVED
1605 17:55:40.495909 12. 00000000fed80000-00000000fed87fff: RESERVED
1606 17:55:40.499768 13. 00000000fed90000-00000000fed92fff: RESERVED
1607 17:55:40.506059 14. 00000000feda0000-00000000feda1fff: RESERVED
1608 17:55:40.509578 15. 0000000100000000-00000001803fffff: RAM
1609 17:55:40.512626 Passing 4 GPIOs to payload:
1610 17:55:40.515682 NAME | PORT | POLARITY | VALUE
1611 17:55:40.522554 lid | undefined | high | high
1612 17:55:40.525615 power | undefined | high | low
1613 17:55:40.532392 oprom | undefined | high | low
1614 17:55:40.539368 EC in RW | 0x000000b9 | high | low
1615 17:55:40.546035 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 4c7d
1616 17:55:40.546133 coreboot table: 1504 bytes.
1617 17:55:40.552609 IMD ROOT 0. 0x76fff000 0x00001000
1618 17:55:40.555823 IMD SMALL 1. 0x76ffe000 0x00001000
1619 17:55:40.559139 FSP MEMORY 2. 0x76c4e000 0x003b0000
1620 17:55:40.562397 CONSOLE 3. 0x76c2e000 0x00020000
1621 17:55:40.565922 FMAP 4. 0x76c2d000 0x00000578
1622 17:55:40.569233 TIME STAMP 5. 0x76c2c000 0x00000910
1623 17:55:40.572355 VBOOT WORK 6. 0x76c18000 0x00014000
1624 17:55:40.575631 ROMSTG STCK 7. 0x76c17000 0x00001000
1625 17:55:40.579135 AFTER CAR 8. 0x76c0d000 0x0000a000
1626 17:55:40.585816 RAMSTAGE 9. 0x76ba7000 0x00066000
1627 17:55:40.588688 REFCODE 10. 0x76b67000 0x00040000
1628 17:55:40.592410 SMM BACKUP 11. 0x76b57000 0x00010000
1629 17:55:40.595440 4f444749 12. 0x76b55000 0x00002000
1630 17:55:40.599017 EXT VBT13. 0x76b53000 0x00001c43
1631 17:55:40.602109 COREBOOT 14. 0x76b4b000 0x00008000
1632 17:55:40.605731 ACPI 15. 0x76b27000 0x00024000
1633 17:55:40.608795 ACPI GNVS 16. 0x76b26000 0x00001000
1634 17:55:40.612166 RAMOOPS 17. 0x76a26000 0x00100000
1635 17:55:40.619036 TPM2 TCGLOG18. 0x76a16000 0x00010000
1636 17:55:40.622201 SMBIOS 19. 0x76a15000 0x00000800
1637 17:55:40.622284 IMD small region:
1638 17:55:40.625275 IMD ROOT 0. 0x76ffec00 0x00000400
1639 17:55:40.632069 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1640 17:55:40.635142 VPD 2. 0x76ffeb60 0x0000006c
1641 17:55:40.638859 POWER STATE 3. 0x76ffeb20 0x00000040
1642 17:55:40.642132 ROMSTAGE 4. 0x76ffeb00 0x00000004
1643 17:55:40.645542 MEM INFO 5. 0x76ffe920 0x000001e0
1644 17:55:40.652204 BS: BS_WRITE_TABLES run times (exec / console): 6 / 518 ms
1645 17:55:40.655209 MTRR: Physical address space:
1646 17:55:40.661932 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1647 17:55:40.668702 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1648 17:55:40.675421 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1649 17:55:40.681672 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1650 17:55:40.685269 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1651 17:55:40.691580 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1652 17:55:40.698084 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1653 17:55:40.701337 MTRR: Fixed MSR 0x250 0x0606060606060606
1654 17:55:40.708409 MTRR: Fixed MSR 0x258 0x0606060606060606
1655 17:55:40.711388 MTRR: Fixed MSR 0x259 0x0000000000000000
1656 17:55:40.714990 MTRR: Fixed MSR 0x268 0x0606060606060606
1657 17:55:40.717998 MTRR: Fixed MSR 0x269 0x0606060606060606
1658 17:55:40.724637 MTRR: Fixed MSR 0x26a 0x0606060606060606
1659 17:55:40.728350 MTRR: Fixed MSR 0x26b 0x0606060606060606
1660 17:55:40.731325 MTRR: Fixed MSR 0x26c 0x0606060606060606
1661 17:55:40.734406 MTRR: Fixed MSR 0x26d 0x0606060606060606
1662 17:55:40.741408 MTRR: Fixed MSR 0x26e 0x0606060606060606
1663 17:55:40.744505 MTRR: Fixed MSR 0x26f 0x0606060606060606
1664 17:55:40.748180 call enable_fixed_mtrr()
1665 17:55:40.751133 CPU physical address size: 39 bits
1666 17:55:40.754764 MTRR: default type WB/UC MTRR counts: 6/5.
1667 17:55:40.757814 MTRR: UC selected as default type.
1668 17:55:40.764604 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1669 17:55:40.771518 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1670 17:55:40.778012 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1671 17:55:40.784412 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1672 17:55:40.787940 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1673 17:55:40.791779
1674 17:55:40.791877 MTRR check
1675 17:55:40.794889 Fixed MTRRs : Enabled
1676 17:55:40.795013 Variable MTRRs: Enabled
1677 17:55:40.795093
1678 17:55:40.801452 MTRR: Fixed MSR 0x250 0x0606060606060606
1679 17:55:40.805090 MTRR: Fixed MSR 0x258 0x0606060606060606
1680 17:55:40.808192 MTRR: Fixed MSR 0x259 0x0000000000000000
1681 17:55:40.811347 MTRR: Fixed MSR 0x268 0x0606060606060606
1682 17:55:40.818216 MTRR: Fixed MSR 0x269 0x0606060606060606
1683 17:55:40.821181 MTRR: Fixed MSR 0x26a 0x0606060606060606
1684 17:55:40.824660 MTRR: Fixed MSR 0x26b 0x0606060606060606
1685 17:55:40.828065 MTRR: Fixed MSR 0x26c 0x0606060606060606
1686 17:55:40.834752 MTRR: Fixed MSR 0x26d 0x0606060606060606
1687 17:55:40.837857 MTRR: Fixed MSR 0x26e 0x0606060606060606
1688 17:55:40.841516 MTRR: Fixed MSR 0x26f 0x0606060606060606
1689 17:55:40.847712 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1690 17:55:40.850822 call enable_fixed_mtrr()
1691 17:55:40.855123 Checking cr50 for pending updates
1692 17:55:40.855216 CPU physical address size: 39 bits
1693 17:55:40.859899 Reading cr50 TPM mode
1694 17:55:40.870272 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1695 17:55:40.877847 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1696 17:55:40.880919 Checking segment from ROM address 0xfff9d5b8
1697 17:55:40.887898 Checking segment from ROM address 0xfff9d5d4
1698 17:55:40.891482 Loading segment from ROM address 0xfff9d5b8
1699 17:55:40.894488 code (compression=0)
1700 17:55:40.901296 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1701 17:55:40.910944 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1702 17:55:40.914000 it's not compressed!
1703 17:55:41.040037 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1704 17:55:41.046669 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1705 17:55:41.053794 Loading segment from ROM address 0xfff9d5d4
1706 17:55:41.057328 Entry Point 0x30000000
1707 17:55:41.057431 Loaded segments
1708 17:55:41.063977 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1709 17:55:41.080538 Finalizing chipset.
1710 17:55:41.083565 Finalizing SMM.
1711 17:55:41.083658 APMC done.
1712 17:55:41.090363 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1713 17:55:41.093439 mp_park_aps done after 0 msecs.
1714 17:55:41.096528 Jumping to boot code at 0x30000000(0x76b4b000)
1715 17:55:41.106412 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1716 17:55:41.106508
1717 17:55:41.106582
1718 17:55:41.106650
1719 17:55:41.110179 Starting depthcharge on Magolor...
1720 17:55:41.110272
1721 17:55:41.110632 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1722 17:55:41.110745 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1723 17:55:41.110836 Setting prompt string to ['dedede:']
1724 17:55:41.110926 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1725 17:55:41.119738 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1726 17:55:41.119836
1727 17:55:41.126503 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1728 17:55:41.126598
1729 17:55:41.130045 fw_config match found: AUDIO_AMP=UNPROVISIONED
1730 17:55:41.130139
1731 17:55:41.133222 Wipe memory regions:
1732 17:55:41.133315
1733 17:55:41.136276 [0x00000000001000, 0x000000000a0000)
1734 17:55:41.136368
1735 17:55:41.139736 [0x00000000100000, 0x00000030000000)
1736 17:55:41.269365
1737 17:55:41.272762 [0x00000031062170, 0x00000076a15000)
1738 17:55:41.441730
1739 17:55:41.444908 [0x00000100000000, 0x00000180400000)
1740 17:55:42.508849
1741 17:55:42.509013 R8152: Initializing
1742 17:55:42.509090
1743 17:55:42.512205 Version 6 (ocp_data = 5c30)
1744 17:55:42.515536
1745 17:55:42.515634 R8152: Done initializing
1746 17:55:42.515708
1747 17:55:42.518986 Adding net device
1748 17:55:42.519083
1749 17:55:42.521881 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1750 17:55:42.525400
1751 17:55:42.525500
1752 17:55:42.525573
1753 17:55:42.525872 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1755 17:55:42.626266 dedede: tftpboot 192.168.201.1 11712681/tftp-deploy-v3xvvq2a/kernel/bzImage 11712681/tftp-deploy-v3xvvq2a/kernel/cmdline 11712681/tftp-deploy-v3xvvq2a/ramdisk/ramdisk.cpio.gz
1756 17:55:42.626468 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1757 17:55:42.626577 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1758 17:55:42.631355 tftpboot 192.168.201.1 11712681/tftp-deploy-v3xvvq2a/kernel/bzIploy-v3xvvq2a/kernel/cmdline 11712681/tftp-deploy-v3xvvq2a/ramdisk/ramdisk.cpio.gz
1759 17:55:42.631499
1760 17:55:42.631606 Waiting for link
1761 17:55:42.833095
1762 17:55:42.833261 done.
1763 17:55:42.833343
1764 17:55:42.833412 MAC: 00:24:32:30:7b:81
1765 17:55:42.833480
1766 17:55:42.836540 Sending DHCP discover... done.
1767 17:55:42.836656
1768 17:55:42.839493 Waiting for reply... done.
1769 17:55:42.839603
1770 17:55:42.843070 Sending DHCP request... done.
1771 17:55:42.843215
1772 17:55:42.867358 Waiting for reply... done.
1773 17:55:42.867524
1774 17:55:42.867601 My ip is 192.168.201.12
1775 17:55:42.867671
1776 17:55:42.870448 The DHCP server ip is 192.168.201.1
1777 17:55:42.873961
1778 17:55:42.877400 TFTP server IP predefined by user: 192.168.201.1
1779 17:55:42.877487
1780 17:55:42.883728 Bootfile predefined by user: 11712681/tftp-deploy-v3xvvq2a/kernel/bzImage
1781 17:55:42.883853
1782 17:55:42.887083 Sending tftp read request... done.
1783 17:55:42.887199
1784 17:55:42.890587 Waiting for the transfer...
1785 17:55:42.893526
1786 17:55:43.428908 00000000 ################################################################
1787 17:55:43.429070
1788 17:55:43.962896 00080000 ################################################################
1789 17:55:43.963094
1790 17:55:44.526759 00100000 ################################################################
1791 17:55:44.526937
1792 17:55:45.090834 00180000 ################################################################
1793 17:55:45.091001
1794 17:55:45.669075 00200000 ################################################################
1795 17:55:45.669245
1796 17:55:46.234400 00280000 ################################################################
1797 17:55:46.234616
1798 17:55:46.806083 00300000 ################################################################
1799 17:55:46.806249
1800 17:55:47.386666 00380000 ################################################################
1801 17:55:47.386866
1802 17:55:47.927270 00400000 ################################################################
1803 17:55:47.927498
1804 17:55:48.473831 00480000 ################################################################
1805 17:55:48.473996
1806 17:55:49.023221 00500000 ################################################################
1807 17:55:49.023386
1808 17:55:49.579215 00580000 ################################################################
1809 17:55:49.579385
1810 17:55:50.116592 00600000 ################################################################
1811 17:55:50.116837
1812 17:55:50.654489 00680000 ################################################################
1813 17:55:50.654694
1814 17:55:51.189331 00700000 ################################################################
1815 17:55:51.189497
1816 17:55:51.730295 00780000 ################################################################
1817 17:55:51.730489
1818 17:55:51.835335 00800000 ############# done.
1819 17:55:51.835543
1820 17:55:51.838420 The bootfile was 8490896 bytes long.
1821 17:55:51.838571
1822 17:55:51.841559 Sending tftp read request... done.
1823 17:55:51.841726
1824 17:55:51.845265 Waiting for the transfer...
1825 17:55:51.845439
1826 17:55:52.389735 00000000 ################################################################
1827 17:55:52.389896
1828 17:55:52.946800 00080000 ################################################################
1829 17:55:52.946959
1830 17:55:53.504248 00100000 ################################################################
1831 17:55:53.504413
1832 17:55:54.058934 00180000 ################################################################
1833 17:55:54.059092
1834 17:55:54.616326 00200000 ################################################################
1835 17:55:54.616480
1836 17:55:55.164099 00280000 ################################################################
1837 17:55:55.164255
1838 17:55:55.721437 00300000 ################################################################
1839 17:55:55.721592
1840 17:55:56.296651 00380000 ################################################################
1841 17:55:56.296834
1842 17:55:56.862764 00400000 ################################################################
1843 17:55:56.862919
1844 17:55:57.422648 00480000 ################################################################
1845 17:55:57.422802
1846 17:55:58.000720 00500000 ################################################################
1847 17:55:58.000889
1848 17:55:58.574859 00580000 ################################################################
1849 17:55:58.575027
1850 17:55:59.150813 00600000 ################################################################
1851 17:55:59.150972
1852 17:55:59.710941 00680000 ################################################################
1853 17:55:59.711102
1854 17:56:00.259148 00700000 ################################################################
1855 17:56:00.259309
1856 17:56:00.823751 00780000 ################################################################
1857 17:56:00.823908
1858 17:56:01.301245 00800000 ###################################################### done.
1859 17:56:01.301400
1860 17:56:01.304189 Sending tftp read request... done.
1861 17:56:01.307513
1862 17:56:01.307612 Waiting for the transfer...
1863 17:56:01.307686
1864 17:56:01.310776 00000000 # done.
1865 17:56:01.310886
1866 17:56:01.320898 Command line loaded dynamically from TFTP file: 11712681/tftp-deploy-v3xvvq2a/kernel/cmdline
1867 17:56:01.321018
1868 17:56:01.333786 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1869 17:56:01.337447
1870 17:56:01.340510 ec_init: CrosEC protocol v3 supported (256, 256)
1871 17:56:01.348430
1872 17:56:01.351321 Shutting down all USB controllers.
1873 17:56:01.351425
1874 17:56:01.351521 Removing current net device
1875 17:56:01.351612
1876 17:56:01.354754 Finalizing coreboot
1877 17:56:01.354856
1878 17:56:01.361540 Exiting depthcharge with code 4 at timestamp: 27100061
1879 17:56:01.361637
1880 17:56:01.361711
1881 17:56:01.361779 Starting kernel ...
1882 17:56:01.361843
1883 17:56:01.361906
1884 17:56:01.362300 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
1885 17:56:01.362411 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
1886 17:56:01.362518 Setting prompt string to ['Linux version [0-9]']
1887 17:56:01.362596 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1888 17:56:01.362672 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1890 18:00:28.363368 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
1892 18:00:28.364549 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
1894 18:00:28.365402 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1897 18:00:28.366916 end: 2 depthcharge-action (duration 00:05:00) [common]
1899 18:00:28.368020 Cleaning after the job
1900 18:00:28.368121 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712681/tftp-deploy-v3xvvq2a/ramdisk
1901 18:00:28.369794 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712681/tftp-deploy-v3xvvq2a/kernel
1902 18:00:28.371273 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712681/tftp-deploy-v3xvvq2a/modules
1903 18:00:28.371653 start: 5.1 power-off (timeout 00:00:30) [common]
1904 18:00:28.371832 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-4' '--port=1' '--command=off'
1905 18:00:28.449255 >> Command sent successfully.
1906 18:00:28.455569 Returned 0 in 0 seconds
1907 18:00:28.556651 end: 5.1 power-off (duration 00:00:00) [common]
1909 18:00:28.558274 start: 5.2 read-feedback (timeout 00:10:00) [common]
1910 18:00:28.559397 Listened to connection for namespace 'common' for up to 1s
1912 18:00:28.560556 Listened to connection for namespace 'common' for up to 1s
1913 18:00:29.560140 Finalising connection for namespace 'common'
1914 18:00:29.560765 Disconnecting from shell: Finalise
1915 18:00:29.561224
1916 18:00:29.662248 end: 5.2 read-feedback (duration 00:00:01) [common]
1917 18:00:29.662807 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712681
1918 18:00:29.716293 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712681
1919 18:00:29.716539 JobError: Your job cannot terminate cleanly.