Boot log: acer-chromebox-cxi4-puff
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:46:31.029683 lava-dispatcher, installed at version: 2023.08
2 17:46:31.029893 start: 0 validate
3 17:46:31.030036 Start time: 2023-10-09 17:46:31.030028+00:00 (UTC)
4 17:46:31.030183 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:46:31.030400 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:46:31.300929 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:46:31.301633 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:46:31.565360 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:46:31.566131 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:46:34.607469 validate duration: 3.58
12 17:46:34.607755 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:46:34.607863 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:46:34.607957 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:46:34.608083 Not decompressing ramdisk as can be used compressed.
16 17:46:34.608167 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:46:34.608230 saving as /var/lib/lava/dispatcher/tmp/11712668/tftp-deploy-h31gc96b/ramdisk/rootfs.cpio.gz
18 17:46:34.608293 total size: 8418130 (8 MB)
19 17:46:35.134473 progress 0 % (0 MB)
20 17:46:35.140433 progress 5 % (0 MB)
21 17:46:35.142747 progress 10 % (0 MB)
22 17:46:35.145036 progress 15 % (1 MB)
23 17:46:35.147443 progress 20 % (1 MB)
24 17:46:35.149775 progress 25 % (2 MB)
25 17:46:35.152078 progress 30 % (2 MB)
26 17:46:35.154136 progress 35 % (2 MB)
27 17:46:35.156431 progress 40 % (3 MB)
28 17:46:35.158700 progress 45 % (3 MB)
29 17:46:35.160975 progress 50 % (4 MB)
30 17:46:35.163323 progress 55 % (4 MB)
31 17:46:35.165594 progress 60 % (4 MB)
32 17:46:35.167665 progress 65 % (5 MB)
33 17:46:35.169852 progress 70 % (5 MB)
34 17:46:35.172083 progress 75 % (6 MB)
35 17:46:35.174340 progress 80 % (6 MB)
36 17:46:35.176606 progress 85 % (6 MB)
37 17:46:35.178827 progress 90 % (7 MB)
38 17:46:35.180985 progress 95 % (7 MB)
39 17:46:35.183046 progress 100 % (8 MB)
40 17:46:35.183274 8 MB downloaded in 0.57 s (13.96 MB/s)
41 17:46:35.183429 end: 1.1.1 http-download (duration 00:00:01) [common]
43 17:46:35.183666 end: 1.1 download-retry (duration 00:00:01) [common]
44 17:46:35.183752 start: 1.2 download-retry (timeout 00:09:59) [common]
45 17:46:35.183838 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 17:46:35.183977 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:46:35.184052 saving as /var/lib/lava/dispatcher/tmp/11712668/tftp-deploy-h31gc96b/kernel/bzImage
48 17:46:35.184113 total size: 8490896 (8 MB)
49 17:46:35.184174 No compression specified
50 17:46:35.185601 progress 0 % (0 MB)
51 17:46:35.187763 progress 5 % (0 MB)
52 17:46:35.189983 progress 10 % (0 MB)
53 17:46:35.192244 progress 15 % (1 MB)
54 17:46:35.194467 progress 20 % (1 MB)
55 17:46:35.196716 progress 25 % (2 MB)
56 17:46:35.198978 progress 30 % (2 MB)
57 17:46:35.201199 progress 35 % (2 MB)
58 17:46:35.203442 progress 40 % (3 MB)
59 17:46:35.205643 progress 45 % (3 MB)
60 17:46:35.207871 progress 50 % (4 MB)
61 17:46:35.210065 progress 55 % (4 MB)
62 17:46:35.212269 progress 60 % (4 MB)
63 17:46:35.214465 progress 65 % (5 MB)
64 17:46:35.216663 progress 70 % (5 MB)
65 17:46:35.218877 progress 75 % (6 MB)
66 17:46:35.221084 progress 80 % (6 MB)
67 17:46:35.223300 progress 85 % (6 MB)
68 17:46:35.225517 progress 90 % (7 MB)
69 17:46:35.227734 progress 95 % (7 MB)
70 17:46:35.229952 progress 100 % (8 MB)
71 17:46:35.230066 8 MB downloaded in 0.05 s (176.23 MB/s)
72 17:46:35.230208 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:46:35.230435 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:46:35.230521 start: 1.3 download-retry (timeout 00:09:59) [common]
76 17:46:35.230611 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 17:46:35.230750 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:46:35.230826 saving as /var/lib/lava/dispatcher/tmp/11712668/tftp-deploy-h31gc96b/modules/modules.tar
79 17:46:35.230888 total size: 250868 (0 MB)
80 17:46:35.230950 Using unxz to decompress xz
81 17:46:35.235308 progress 13 % (0 MB)
82 17:46:35.235704 progress 26 % (0 MB)
83 17:46:35.235945 progress 39 % (0 MB)
84 17:46:35.237447 progress 52 % (0 MB)
85 17:46:35.239380 progress 65 % (0 MB)
86 17:46:35.241297 progress 78 % (0 MB)
87 17:46:35.243276 progress 91 % (0 MB)
88 17:46:35.245030 progress 100 % (0 MB)
89 17:46:35.250851 0 MB downloaded in 0.02 s (11.99 MB/s)
90 17:46:35.251085 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:46:35.251346 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:46:35.251442 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 17:46:35.251539 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 17:46:35.251624 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:46:35.251713 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 17:46:35.251935 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d
98 17:46:35.252081 makedir: /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin
99 17:46:35.252189 makedir: /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/tests
100 17:46:35.252293 makedir: /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/results
101 17:46:35.252407 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-add-keys
102 17:46:35.252553 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-add-sources
103 17:46:35.252685 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-background-process-start
104 17:46:35.252816 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-background-process-stop
105 17:46:35.252943 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-common-functions
106 17:46:35.253069 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-echo-ipv4
107 17:46:35.253198 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-install-packages
108 17:46:35.253324 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-installed-packages
109 17:46:35.253454 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-os-build
110 17:46:35.253581 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-probe-channel
111 17:46:35.253708 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-probe-ip
112 17:46:35.253833 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-target-ip
113 17:46:35.253979 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-target-mac
114 17:46:35.254105 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-target-storage
115 17:46:35.254237 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-test-case
116 17:46:35.254363 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-test-event
117 17:46:35.254489 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-test-feedback
118 17:46:35.254625 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-test-raise
119 17:46:35.254754 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-test-reference
120 17:46:35.254883 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-test-runner
121 17:46:35.255010 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-test-set
122 17:46:35.255162 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-test-shell
123 17:46:35.255294 Updating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-install-packages (oe)
124 17:46:35.255447 Updating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/bin/lava-installed-packages (oe)
125 17:46:35.255571 Creating /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/environment
126 17:46:35.255671 LAVA metadata
127 17:46:35.255747 - LAVA_JOB_ID=11712668
128 17:46:35.255814 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:46:35.255924 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 17:46:35.255993 skipped lava-vland-overlay
131 17:46:35.256072 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:46:35.256152 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 17:46:35.256217 skipped lava-multinode-overlay
134 17:46:35.256294 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:46:35.256377 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 17:46:35.256450 Loading test definitions
137 17:46:35.256542 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 17:46:35.256622 Using /lava-11712668 at stage 0
139 17:46:35.256955 uuid=11712668_1.4.2.3.1 testdef=None
140 17:46:35.257046 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:46:35.257135 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 17:46:35.257680 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:46:35.257914 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 17:46:35.258565 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:46:35.258839 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 17:46:35.259468 runner path: /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/0/tests/0_dmesg test_uuid 11712668_1.4.2.3.1
149 17:46:35.259630 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:46:35.259868 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 17:46:35.259983 Using /lava-11712668 at stage 1
153 17:46:35.260346 uuid=11712668_1.4.2.3.5 testdef=None
154 17:46:35.260437 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:46:35.260523 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 17:46:35.261002 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:46:35.261219 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 17:46:35.261879 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:46:35.262112 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 17:46:35.262807 runner path: /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/1/tests/1_bootrr test_uuid 11712668_1.4.2.3.5
163 17:46:35.262960 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:46:35.263166 Creating lava-test-runner.conf files
166 17:46:35.263229 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/0 for stage 0
167 17:46:35.263327 - 0_dmesg
168 17:46:35.263410 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712668/lava-overlay-ko4ego3d/lava-11712668/1 for stage 1
169 17:46:35.263502 - 1_bootrr
170 17:46:35.263597 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:46:35.263684 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 17:46:35.272243 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:46:35.272349 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 17:46:35.272437 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:46:35.272524 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:46:35.272609 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 17:46:35.520677 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:46:35.521052 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 17:46:35.521170 extracting modules file /var/lib/lava/dispatcher/tmp/11712668/tftp-deploy-h31gc96b/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712668/extract-overlay-ramdisk-5jjfw67k/ramdisk
180 17:46:35.534319 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:46:35.534433 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 17:46:35.534517 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712668/compress-overlay-k_a51t91/overlay-1.4.2.4.tar.gz to ramdisk
183 17:46:35.534592 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712668/compress-overlay-k_a51t91/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712668/extract-overlay-ramdisk-5jjfw67k/ramdisk
184 17:46:35.543552 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:46:35.543661 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 17:46:35.543753 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:46:35.543842 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 17:46:35.543918 Building ramdisk /var/lib/lava/dispatcher/tmp/11712668/extract-overlay-ramdisk-5jjfw67k/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712668/extract-overlay-ramdisk-5jjfw67k/ramdisk
189 17:46:35.668593 >> 49788 blocks
190 17:46:36.511629 rename /var/lib/lava/dispatcher/tmp/11712668/extract-overlay-ramdisk-5jjfw67k/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712668/tftp-deploy-h31gc96b/ramdisk/ramdisk.cpio.gz
191 17:46:36.512070 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:46:36.512195 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 17:46:36.512294 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 17:46:36.512393 No mkimage arch provided, not using FIT.
195 17:46:36.512485 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:46:36.512565 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:46:36.512675 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:46:36.512765 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 17:46:36.512846 No LXC device requested
200 17:46:36.512927 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:46:36.513016 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 17:46:36.513101 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:46:36.513177 Checking files for TFTP limit of 4294967296 bytes.
204 17:46:36.513579 end: 1 tftp-deploy (duration 00:00:02) [common]
205 17:46:36.513684 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:46:36.513777 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:46:36.513901 substitutions:
208 17:46:36.513967 - {DTB}: None
209 17:46:36.514030 - {INITRD}: 11712668/tftp-deploy-h31gc96b/ramdisk/ramdisk.cpio.gz
210 17:46:36.514089 - {KERNEL}: 11712668/tftp-deploy-h31gc96b/kernel/bzImage
211 17:46:36.514147 - {LAVA_MAC}: None
212 17:46:36.514203 - {PRESEED_CONFIG}: None
213 17:46:36.514258 - {PRESEED_LOCAL}: None
214 17:46:36.514312 - {RAMDISK}: 11712668/tftp-deploy-h31gc96b/ramdisk/ramdisk.cpio.gz
215 17:46:36.514367 - {ROOT_PART}: None
216 17:46:36.514420 - {ROOT}: None
217 17:46:36.514473 - {SERVER_IP}: 192.168.201.1
218 17:46:36.514526 - {TEE}: None
219 17:46:36.514586 Parsed boot commands:
220 17:46:36.514643 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:46:36.514819 Parsed boot commands: tftpboot 192.168.201.1 11712668/tftp-deploy-h31gc96b/kernel/bzImage 11712668/tftp-deploy-h31gc96b/kernel/cmdline 11712668/tftp-deploy-h31gc96b/ramdisk/ramdisk.cpio.gz
222 17:46:36.514905 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:46:36.514997 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:46:36.515091 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:46:36.515175 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:46:36.515245 Not connected, no need to disconnect.
227 17:46:36.515320 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:46:36.515400 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:46:36.515474 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi4-puff-cbg-5'
230 17:46:36.519465 Setting prompt string to ['lava-test: # ']
231 17:46:36.519820 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:46:36.519923 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:46:36.520020 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:46:36.520111 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:46:36.520306 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-5' '--port=1' '--command=reboot'
236 17:46:43.286842 >> Command sent successfully.
237 17:46:43.297980 Returned 0 in 6 seconds
238 17:46:43.399180 end: 2.2.2.1 pdu-reboot (duration 00:00:07) [common]
240 17:46:43.400664 end: 2.2.2 reset-device (duration 00:00:07) [common]
241 17:46:43.401199 start: 2.2.3 depthcharge-start (timeout 00:04:53) [common]
242 17:46:43.401666 Setting prompt string to 'Starting depthcharge on Kaisa...'
243 17:46:43.402015 Changing prompt to 'Starting depthcharge on Kaisa...'
244 17:46:43.402420 depthcharge-start: Wait for prompt Starting depthcharge on Kaisa... (timeout 00:05:00)
245 17:46:43.403743 [Enter `^Ec?' for help]
246 17:46:43.683439 �
247 17:46:43.684307
248 17:46:43.694014 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 bootblock starting (log level: 8)...
249 17:46:43.698946 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz
250 17:46:43.703820 CPU: ID a0660, Cometlake-U A0 (6+2), ucode: 000000c9
251 17:46:43.709102 CPU: AES supported, TXT NOT supported, VT supported
252 17:46:43.714018 MCH: device id 9b71 (rev 00) is CometLake-U (2+2)
253 17:46:43.718510 PCH: device id 0285 (rev 00) is Cometlake-U Base
254 17:46:43.723844 IGD: device id 9baa (rev 04) is CometLake ULT GT2
255 17:46:43.727817 VBOOT: Loading verstage.
256 17:46:43.732329 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 17:46:43.736956 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 17:46:43.742591 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 17:46:43.746057 CBFS: Locating 'fallback/verstage'
260 17:46:43.749931 CBFS: Found @ offset 10c240 size 1152c
261 17:46:43.750928
262 17:46:43.751385
263 17:46:43.762196 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 verstage starting (log level: 8)...
264 17:46:43.776950 Probing TPM: . done!
265 17:46:43.778933 TPM ready after 0 ms
266 17:46:43.784112 Connected to device vid:did:rid of 1ae0:0028:00
267 17:46:43.794373 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
268 17:46:43.798499 Initialized TPM device CR50 revision 0
269 17:46:43.901410 tlcl_send_startup: Startup return code is 0
270 17:46:43.903667 TPM: setup succeeded
271 17:46:43.916242 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 17:46:43.928759 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 17:46:43.937199 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 17:46:43.949967 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 17:46:43.953728 Chrome EC: UHEPI supported
276 17:46:43.954509 Phase 1
277 17:46:43.959258 FMAP: area GBB found @ c05000 (12288 bytes)
278 17:46:43.966653 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 17:46:43.972920 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 17:46:43.975916 Recovery requested (1009000e)
281 17:46:43.981178 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 17:46:43.991706 tlcl_extend: response is 0
283 17:46:43.996682 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 17:46:44.006372 tlcl_extend: response is 0
285 17:46:44.010457 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 17:46:44.014654 CBFS: Locating 'fallback/romstage'
287 17:46:44.017407 CBFS: Found @ offset 80 size 1607c
288 17:46:44.023760 BS: verstage times (exec / console): total (unknown) / 119 ms
289 17:46:44.025313
290 17:46:44.025932
291 17:46:44.036727 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 romstage starting (log level: 8)...
292 17:46:44.042668 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
293 17:46:44.048104 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
294 17:46:44.052064 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
295 17:46:44.056793 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
296 17:46:44.060198 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
297 17:46:44.065188 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
298 17:46:44.066967 TCO_STS: 0000 0000
299 17:46:44.070575 GEN_PMCON: e0015038 00000200
300 17:46:44.073110 GBLRST_CAUSE: 00000000 00000000
301 17:46:44.075379 prev_sleep_state 5
302 17:46:44.078993 Boot Count incremented to 17608
303 17:46:44.085114 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 17:46:44.087547 CBFS: Locating 'fspm.bin'
305 17:46:44.091063 CBFS: Found @ offset 66fc0 size 71000
306 17:46:44.095289 Chrome EC: UHEPI supported
307 17:46:44.100511 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
308 17:46:44.105062 Probing TPM: done!
309 17:46:44.110196 Connected to device vid:did:rid of 1ae0:0028:00
310 17:46:44.120603 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
311 17:46:44.124757 Initialized TPM device CR50 revision 0
312 17:46:44.138124 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 17:46:44.144846 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
314 17:46:44.147387 MRC cache found, size 1948
315 17:46:44.149860 bootmode is set to: 2
316 17:46:44.152273 PRMRR disabled by config.
317 17:46:44.157086 FMAP: area RW_SPD_CACHE found @ aff000 (4096 bytes)
318 17:46:44.161084 SPD_CACHE: cache found, size 0x1000
319 17:46:44.164609 No memory dimm at address 50
320 17:46:44.167127 SPD_CACHE: DIMM0 is not present
321 17:46:44.173267 SPD_CACHE: DIMM1 is the same
322 17:46:44.174571 SPD @ 0x52
323 17:46:44.176901 SPD: module type is DDR4
324 17:46:44.181787 SPD: module part number is HMA851S6CJR6N-VK
325 17:46:44.188145 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
326 17:46:44.192073 SPD: device width 16 bits, bus width 64 bits
327 17:46:44.196672 SPD: module size is 4096 MB (per channel)
328 17:46:44.199667 memory slot: 2 configuration done.
329 17:46:44.248314 CBMEM:
330 17:46:44.251693 IMD: root @ 0x99fff000 254 entries.
331 17:46:44.254813 IMD: root @ 0x99ffec00 62 entries.
332 17:46:44.259557 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 17:46:44.263707 WARNING: RO_VPD is uninitialized or empty.
334 17:46:44.268223 FMAP: area RW_VPD found @ af8000 (8192 bytes)
335 17:46:44.272015 External stage cache:
336 17:46:44.275887 IMD: root @ 0x9abff000 254 entries.
337 17:46:44.278745 IMD: root @ 0x9abfec00 62 entries.
338 17:46:44.293812 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
339 17:46:44.303384 tlcl_write: response is 0
340 17:46:44.307136 MRC: TPM MRC hash updated successfully.
341 17:46:44.308691 1 DIMMs found
342 17:46:44.310409 SMM Memory Map
343 17:46:44.313590 SMRAM : 0x9a000000 0x1000000
344 17:46:44.318139 Subregion 0: 0x9a000000 0xa00000
345 17:46:44.320602 Subregion 1: 0x9aa00000 0x200000
346 17:46:44.323917 Subregion 2: 0x9ac00000 0x400000
347 17:46:44.327113 top_of_ram = 0x9a000000
348 17:46:44.331995 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
349 17:46:44.337552 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
350 17:46:44.342134 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 17:46:44.347250 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
352 17:46:44.350820 CBFS: Locating 'fallback/postcar'
353 17:46:44.354824 CBFS: Found @ offset 1076c0 size 4b28
354 17:46:44.360669 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
355 17:46:44.371554 Loading module at 0x99c0c000 with entry 0x99c0c000. filesize: 0x4818 memsize: 0x8af8
356 17:46:44.376510 Processing 173 relocs. Offset value of 0x97c0c000
357 17:46:44.384006 BS: romstage times (exec / console): total (unknown) / 267 ms
358 17:46:44.384640
359 17:46:44.384994
360 17:46:44.396091 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 postcar starting (log level: 8)...
361 17:46:44.400890 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 17:46:44.404503 CBFS: Locating 'fallback/ramstage'
363 17:46:44.407859 CBFS: Found @ offset 44e00 size 1e0ef
364 17:46:44.414552 Decompressing stage fallback/ramstage @ 0x99ba4fc0 (415200 bytes)
365 17:46:44.445592 Loading module at 0x99ba5000 with entry 0x99ba5000. filesize: 0x46598 memsize: 0x655a0
366 17:46:44.451130 Processing 4604 relocs. Offset value of 0x98da5000
367 17:46:44.456961 BS: postcar times (exec / console): total (unknown) / 43 ms
368 17:46:44.457520
369 17:46:44.458271
370 17:46:44.468418 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 ramstage starting (log level: 8)...
371 17:46:44.469895 Normal boot
372 17:46:44.474569 cse_lite: Skip switching to RW in the recovery path
373 17:46:44.480287 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 5 ms
374 17:46:44.485197 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
375 17:46:44.489958 CBFS: Locating 'cpu_microcode_blob.bin'
376 17:46:44.493131 CBFS: Found @ offset 16180 size 2ec00
377 17:46:44.498170 microcode: sig=0xa0660 pf=0x80 revision=0xc9
378 17:46:44.499889 Skip microcode update
379 17:46:44.505011 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 17:46:44.507705 CBFS: Locating 'fsps.bin'
381 17:46:44.511498 CBFS: Found @ offset d8fc0 size 2e69d
382 17:46:44.548001 Detected 2 core, 2 thread CPU.
383 17:46:44.550012 Setting up SMI for CPU
384 17:46:44.551818 IED base = 0x9ac00000
385 17:46:44.554139 IED size = 0x00400000
386 17:46:44.557084 Will perform SMM setup.
387 17:46:44.561439 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz.
388 17:46:44.569577 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
389 17:46:44.574819 Processing 16 relocs. Offset value of 0x00030000
390 17:46:44.577643 Attempting to start 1 APs
391 17:46:44.580630 Waiting for 10ms after sending INIT.
392 17:46:44.594982 Waiting for 1st SIPI to complete...done.
393 17:46:44.597341 AP: slot 1 apic_id 2.
394 17:46:44.600875 Waiting for 2nd SIPI to complete...done.
395 17:46:44.609420 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 17:46:44.614730 Processing 13 relocs. Offset value of 0x00038000
397 17:46:44.621287 SMM Module: stub loaded at 0x00038000. Will call 0x99bc2760(0x00000000)
398 17:46:44.625235 Installing SMM handler to 0x9a000000
399 17:46:44.634039 Loading module at 0x9a010000 with entry 0x9a010a30. filesize: 0x7bc8 memsize: 0xcc90
400 17:46:44.638387 Processing 617 relocs. Offset value of 0x9a010000
401 17:46:44.646493 Loading module at 0x9a008000 with entry 0x9a008000. filesize: 0x1b8 memsize: 0x1b8
402 17:46:44.651581 Processing 13 relocs. Offset value of 0x9a008000
403 17:46:44.657609 SMM Module: placing jmp sequence at 0x9a007c00 rel16 0x03fd
404 17:46:44.664141 SMM Module: stub loaded at 0x9a008000. Will call 0x9a010a30(0x00000000)
405 17:46:44.667530 Clearing SMI status registers
406 17:46:44.669377 SMI_STS: PM1
407 17:46:44.670932 PM1_STS: PWRBTN
408 17:46:44.673164 New SMBASE 0x9a000000
409 17:46:44.676055 In relocation handler: CPU 0
410 17:46:44.680522 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
411 17:46:44.685378 Writing SMRR. base = 0x9a000006, mask=0xff000800
412 17:46:44.687081 Relocation complete.
413 17:46:44.689817 New SMBASE 0x99fffc00
414 17:46:44.692242 In relocation handler: CPU 1
415 17:46:44.696140 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
416 17:46:44.701397 Writing SMRR. base = 0x9a000006, mask=0xff000800
417 17:46:44.703872 Relocation complete.
418 17:46:44.705779 Initializing CPU #0
419 17:46:44.709100 CPU: vendor Intel device a0660
420 17:46:44.712957 CPU: family 06, model a6, stepping 00
421 17:46:44.715655 Clearing out pending MCEs
422 17:46:44.717926 Setting up local APIC...
423 17:46:44.720473 apic_id: 0x00 done.
424 17:46:44.723412 Turbo is available but hidden
425 17:46:44.725164 Turbo is unavailable
426 17:46:44.727586 VMX status: enabled
427 17:46:44.731416 IA32_FEATURE_CONTROL status: locked
428 17:46:44.732739 Skip microcode update
429 17:46:44.734881 CPU #0 initialized
430 17:46:44.737320 Initializing CPU #1
431 17:46:44.740455 CPU: vendor Intel device a0660
432 17:46:44.744083 CPU: family 06, model a6, stepping 00
433 17:46:44.747050 Clearing out pending MCEs
434 17:46:44.749394 Setting up local APIC...
435 17:46:44.751584 apic_id: 0x02 done.
436 17:46:44.753689 VMX status: enabled
437 17:46:44.757157 IA32_FEATURE_CONTROL status: locked
438 17:46:44.759426 Skip microcode update
439 17:46:44.761785 CPU #1 initialized
440 17:46:44.765710 bsp_do_flight_plan done after 160 msecs.
441 17:46:44.767231 Enabling SMIs.
442 17:46:44.768803 Locking SMM.
443 17:46:44.775088 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 89 / 199 ms
444 17:46:44.786375 Waiting for DisplayPort
445 17:46:47.805263 DisplayPort not ready after 3000ms. Abort.
446 17:46:47.811073 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
447 17:46:47.813760 CBFS: Locating 'vbt.bin'
448 17:46:47.817145 CBFS: Found @ offset 66a80 size 49e
449 17:46:47.822049 Found a VBT of 4608 bytes after decompression
450 17:46:47.823558 psys_pmax = 182W
451 17:46:47.873168 Display FSP Version Info HOB
452 17:46:47.876014 Reference Code - CPU = 9.0.1e.30
453 17:46:47.878606 uCode Version = 0.0.0.ca
454 17:46:47.881443 TXT ACM version = ff.ff.ff.ffff
455 17:46:47.884796 Reference Code - ME = 9.0.1e.30
456 17:46:47.886792 MEBx version = 0.0.0.0
457 17:46:47.890428 ME Firmware Version = Consumer SKU
458 17:46:47.894262 Reference Code - CML PCH = 9.0.1e.30
459 17:46:47.897247 PCH-CRID Status = Disabled
460 17:46:47.900498 PCH-CRID Original Value = ff.ff.ff.ffff
461 17:46:47.904798 PCH-CRID New Value = ff.ff.ff.ffff
462 17:46:47.908268 OPROM - RST - RAID = ff.ff.ff.ffff
463 17:46:47.912225 ChipsetInit Base Version = ff.ff.ff.ffff
464 17:46:47.916362 ChipsetInit Oem Version = ff.ff.ff.ffff
465 17:46:47.920384 Reference Code - SA - System Agent = 9.0.1e.30
466 17:46:47.923783 Reference Code - MRC = 0.0.0.2d
467 17:46:47.927720 SA - PCIe Version = 9.0.1e.30
468 17:46:47.929559 SA-CRID Status = Disabled
469 17:46:47.932641 SA-CRID Original Value = 0.0.0.0
470 17:46:47.935392 SA-CRID New Value = 0.0.0.0
471 17:46:47.938935 OPROM - VBIOS = ff.ff.ff.ffff
472 17:46:47.943044 Found PCIe Root Port #7 at PCI: 00:1c.0.
473 17:46:47.950727 Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.
474 17:46:47.961943 pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing.
475 17:46:47.973978 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
476 17:46:47.985969 pcie_rp_update_dev: Couldn't find PCIe Root Port #14 (originally PCI: 00:1d.5) which was enabled in devicetree, removing.
477 17:46:47.992346 BS: BS_DEV_INIT_CHIPS run times (exec / console): 3064 / 140 ms
478 17:46:47.993356 RTC Init
479 17:46:47.997016 Set power on after power failure.
480 17:46:47.998819 Disabling Deep S3
481 17:46:48.000996 Disabling Deep S3
482 17:46:48.002753 Disabling Deep S4
483 17:46:48.004609 Disabling Deep S4
484 17:46:48.006723 Disabling Deep S5
485 17:46:48.008562 Disabling Deep S5
486 17:46:48.014733 BS: BS_DEV_INIT_CHIPS exit times (exec / console): 1 / 15 ms
487 17:46:48.016134 Enumerating buses...
488 17:46:48.021084 Show all devs... Before device enumeration.
489 17:46:48.023160 Root Device: enabled 1
490 17:46:48.025824 CPU_CLUSTER: 0: enabled 1
491 17:46:48.028325 DOMAIN: 0000: enabled 1
492 17:46:48.030275 APIC: 00: enabled 1
493 17:46:48.033176 PCI: 00:00.0: enabled 1
494 17:46:48.035273 PCI: 00:02.0: enabled 1
495 17:46:48.037901 PCI: 00:04.0: enabled 1
496 17:46:48.039698 PCI: 00:05.0: enabled 0
497 17:46:48.043118 PCI: 00:12.0: enabled 1
498 17:46:48.044704 PCI: 00:12.5: enabled 0
499 17:46:48.047390 PCI: 00:12.6: enabled 0
500 17:46:48.049539 PCI: 00:14.0: enabled 1
501 17:46:48.052236 PCI: 00:14.1: enabled 0
502 17:46:48.054443 PCI: 00:14.3: enabled 1
503 17:46:48.057292 PCI: 00:14.5: enabled 1
504 17:46:48.059732 PCI: 00:15.0: enabled 0
505 17:46:48.061738 PCI: 00:15.1: enabled 0
506 17:46:48.064795 PCI: 00:15.2: enabled 1
507 17:46:48.067297 PCI: 00:15.3: enabled 1
508 17:46:48.069378 PCI: 00:16.0: enabled 1
509 17:46:48.071760 PCI: 00:16.1: enabled 0
510 17:46:48.073843 PCI: 00:16.2: enabled 0
511 17:46:48.076529 PCI: 00:16.3: enabled 0
512 17:46:48.079501 PCI: 00:16.4: enabled 0
513 17:46:48.081444 PCI: 00:16.5: enabled 0
514 17:46:48.084441 PCI: 00:17.0: enabled 1
515 17:46:48.086051 PCI: 00:19.0: enabled 1
516 17:46:48.088820 PCI: 00:19.1: enabled 0
517 17:46:48.091279 PCI: 00:19.2: enabled 0
518 17:46:48.093669 PCI: 00:1a.0: enabled 1
519 17:46:48.096236 PCI: 00:1c.0: enabled 0
520 17:46:48.098278 PCI: 00:1c.1: enabled 0
521 17:46:48.101248 PCI: 00:1c.2: enabled 0
522 17:46:48.103378 PCI: 00:1c.3: enabled 0
523 17:46:48.105867 PCI: 00:1c.4: enabled 0
524 17:46:48.108638 PCI: 00:1c.5: enabled 0
525 17:46:48.110822 PCI: 00:1c.0: enabled 1
526 17:46:48.112951 PCI: 00:1c.7: enabled 0
527 17:46:48.115742 PCI: 00:1d.0: enabled 1
528 17:46:48.118149 PCI: 00:1d.1: enabled 0
529 17:46:48.120341 PCI: 00:1d.2: enabled 1
530 17:46:48.123060 PCI: 00:1d.3: enabled 0
531 17:46:48.125207 PCI: 00:1d.4: enabled 0
532 17:46:48.127605 PCI: 00:1d.5: enabled 1
533 17:46:48.130637 PCI: 00:1e.0: enabled 1
534 17:46:48.132656 PCI: 00:1e.1: enabled 0
535 17:46:48.135170 PCI: 00:1e.2: enabled 1
536 17:46:48.137386 PCI: 00:1e.3: enabled 0
537 17:46:48.139586 PCI: 00:1f.0: enabled 1
538 17:46:48.142213 PCI: 00:1f.1: enabled 1
539 17:46:48.144467 PCI: 00:1f.2: enabled 1
540 17:46:48.146970 PCI: 00:1f.3: enabled 1
541 17:46:48.149544 PCI: 00:1f.4: enabled 1
542 17:46:48.152249 PCI: 00:1f.5: enabled 1
543 17:46:48.154267 PCI: 00:1f.6: enabled 0
544 17:46:48.156758 GENERIC: 0.0: enabled 1
545 17:46:48.159462 USB0 port 0: enabled 1
546 17:46:48.161422 I2C: 00:4a: enabled 1
547 17:46:48.164038 I2C: 00:4a: enabled 1
548 17:46:48.166350 I2C: 00:1a: enabled 1
549 17:46:48.168788 PCI: 00:00.0: enabled 1
550 17:46:48.171374 PCI: 00:00.0: enabled 1
551 17:46:48.172726 SPI: 00: enabled 1
552 17:46:48.175349 PNP: 0c09.0: enabled 1
553 17:46:48.177441 USB2 port 0: enabled 1
554 17:46:48.179637 USB2 port 1: enabled 1
555 17:46:48.182107 USB2 port 2: enabled 1
556 17:46:48.184384 USB2 port 3: enabled 1
557 17:46:48.186888 USB2 port 5: enabled 1
558 17:46:48.189423 USB2 port 6: enabled 0
559 17:46:48.191322 USB2 port 9: enabled 1
560 17:46:48.193427 USB3 port 0: enabled 1
561 17:46:48.196645 USB3 port 1: enabled 1
562 17:46:48.198657 USB3 port 2: enabled 1
563 17:46:48.200881 USB3 port 3: enabled 1
564 17:46:48.203144 USB3 port 4: enabled 1
565 17:46:48.205950 USB2 port 4: enabled 1
566 17:46:48.207695 USB3 port 5: enabled 1
567 17:46:48.209608 APIC: 02: enabled 1
568 17:46:48.212140 Compare with tree...
569 17:46:48.214372 Root Device: enabled 1
570 17:46:48.217309 CPU_CLUSTER: 0: enabled 1
571 17:46:48.219551 APIC: 00: enabled 1
572 17:46:48.221655 APIC: 02: enabled 1
573 17:46:48.224562 DOMAIN: 0000: enabled 1
574 17:46:48.227019 PCI: 00:00.0: enabled 1
575 17:46:48.229674 PCI: 00:02.0: enabled 1
576 17:46:48.232525 PCI: 00:04.0: enabled 1
577 17:46:48.234739 GENERIC: 0.0: enabled 1
578 17:46:48.237751 PCI: 00:05.0: enabled 0
579 17:46:48.240362 PCI: 00:12.0: enabled 1
580 17:46:48.242640 PCI: 00:12.5: enabled 0
581 17:46:48.245504 PCI: 00:12.6: enabled 0
582 17:46:48.248517 PCI: 00:14.0: enabled 1
583 17:46:48.250468 USB0 port 0: enabled 1
584 17:46:48.253860 USB2 port 0: enabled 1
585 17:46:48.256108 USB2 port 1: enabled 1
586 17:46:48.258708 USB2 port 2: enabled 1
587 17:46:48.261272 USB2 port 3: enabled 1
588 17:46:48.264535 USB2 port 5: enabled 1
589 17:46:48.267288 USB2 port 6: enabled 0
590 17:46:48.269911 USB2 port 9: enabled 1
591 17:46:48.272341 USB3 port 0: enabled 1
592 17:46:48.274986 USB3 port 1: enabled 1
593 17:46:48.277910 USB3 port 2: enabled 1
594 17:46:48.280507 USB3 port 3: enabled 1
595 17:46:48.283594 USB3 port 4: enabled 1
596 17:46:48.285870 USB2 port 4: enabled 1
597 17:46:48.288832 USB3 port 5: enabled 1
598 17:46:48.291212 PCI: 00:14.1: enabled 0
599 17:46:48.293520 PCI: 00:14.3: enabled 1
600 17:46:48.296767 PCI: 00:14.5: enabled 1
601 17:46:48.298797 PCI: 00:15.0: enabled 0
602 17:46:48.302128 PCI: 00:15.1: enabled 0
603 17:46:48.304493 PCI: 00:15.2: enabled 1
604 17:46:48.307225 I2C: 00:4a: enabled 1
605 17:46:48.309737 PCI: 00:15.3: enabled 1
606 17:46:48.312128 I2C: 00:4a: enabled 1
607 17:46:48.314543 PCI: 00:16.0: enabled 1
608 17:46:48.316982 PCI: 00:16.1: enabled 0
609 17:46:48.319986 PCI: 00:16.2: enabled 0
610 17:46:48.322449 PCI: 00:16.3: enabled 0
611 17:46:48.325492 PCI: 00:16.4: enabled 0
612 17:46:48.327786 PCI: 00:16.5: enabled 0
613 17:46:48.330508 PCI: 00:17.0: enabled 1
614 17:46:48.333258 PCI: 00:19.0: enabled 1
615 17:46:48.335303 I2C: 00:1a: enabled 1
616 17:46:48.337853 PCI: 00:19.1: enabled 0
617 17:46:48.340899 PCI: 00:19.2: enabled 0
618 17:46:48.343388 PCI: 00:1a.0: enabled 1
619 17:46:48.346135 PCI: 00:1c.0: enabled 1
620 17:46:48.348721 PCI: 00:00.0: enabled 1
621 17:46:48.351734 PCI: 00:1e.0: enabled 1
622 17:46:48.354142 PCI: 00:1e.1: enabled 0
623 17:46:48.356474 PCI: 00:1e.2: enabled 1
624 17:46:48.358981 SPI: 00: enabled 1
625 17:46:48.361512 PCI: 00:1e.3: enabled 0
626 17:46:48.363864 PCI: 00:1f.0: enabled 1
627 17:46:48.366808 PNP: 0c09.0: enabled 1
628 17:46:48.369737 PCI: 00:1f.1: enabled 1
629 17:46:48.372259 PCI: 00:1f.2: enabled 1
630 17:46:48.374741 PCI: 00:1f.3: enabled 1
631 17:46:48.377464 PCI: 00:1f.4: enabled 1
632 17:46:48.380264 PCI: 00:1f.5: enabled 1
633 17:46:48.382787 PCI: 00:1f.6: enabled 0
634 17:46:48.385279 Root Device scanning...
635 17:46:48.388599 scan_static_bus for Root Device
636 17:46:48.390746 CPU_CLUSTER: 0 enabled
637 17:46:48.393194 DOMAIN: 0000 enabled
638 17:46:48.395616 DOMAIN: 0000 scanning...
639 17:46:48.398901 PCI: pci_scan_bus for bus 00
640 17:46:48.402297 PCI: 00:00.0 [8086/0000] ops
641 17:46:48.405121 PCI: 00:00.0 [8086/9b71] enabled
642 17:46:48.408603 PCI: 00:02.0 [8086/0000] bus ops
643 17:46:48.411798 PCI: 00:02.0 [8086/9baa] enabled
644 17:46:48.415232 PCI: 00:04.0 [8086/0000] bus ops
645 17:46:48.418467 PCI: 00:04.0 [8086/1903] enabled
646 17:46:48.421895 PCI: 00:08.0 [8086/1911] enabled
647 17:46:48.424997 PCI: 00:12.0 [8086/02f9] enabled
648 17:46:48.428737 PCI: 00:14.0 [8086/0000] bus ops
649 17:46:48.432431 PCI: 00:14.0 [8086/02ed] enabled
650 17:46:48.435559 PCI: 00:14.2 [8086/02ef] enabled
651 17:46:48.438422 PCI: 00:14.3 [8086/02f0] enabled
652 17:46:48.441233 PCI: 00:14.5 [8086/0000] ops
653 17:46:48.444738 PCI: 00:14.5 [8086/02f5] enabled
654 17:46:48.447866 PCI: 00:15.0 [8086/0000] bus ops
655 17:46:48.451361 PCI: 00:15.0 [8086/02e8] disabled
656 17:46:48.454953 PCI: 00:15.2 [8086/0000] bus ops
657 17:46:48.457953 PCI: 00:15.2 [8086/02ea] enabled
658 17:46:48.461522 PCI: 00:15.3 [8086/0000] bus ops
659 17:46:48.464729 PCI: 00:15.3 [8086/02eb] enabled
660 17:46:48.467860 PCI: 00:16.0 [8086/0000] ops
661 17:46:48.471453 PCI: 00:16.0 [8086/02e0] enabled
662 17:46:48.476669 PCI: Static device PCI: 00:17.0 not found, disabling it.
663 17:46:48.480456 PCI: 00:19.0 [8086/0000] bus ops
664 17:46:48.483440 PCI: 00:19.0 [8086/02c5] enabled
665 17:46:48.486787 PCI: 00:1a.0 [8086/0000] ops
666 17:46:48.489680 PCI: 00:1a.0 [8086/02c4] enabled
667 17:46:48.493209 PCI: 00:1c.0 [8086/0000] bus ops
668 17:46:48.496824 PCI: 00:1c.0 [8086/02be] enabled
669 17:46:48.499188 PCI: 00:1e.0 [8086/0000] ops
670 17:46:48.502616 PCI: 00:1e.0 [8086/02a8] enabled
671 17:46:48.505631 PCI: 00:1e.2 [8086/0000] bus ops
672 17:46:48.509040 PCI: 00:1e.2 [8086/02aa] enabled
673 17:46:48.512870 PCI: 00:1f.0 [8086/0000] bus ops
674 17:46:48.515713 PCI: 00:1f.0 [8086/0285] enabled
675 17:46:48.521526 PCI: Static device PCI: 00:1f.1 not found, disabling it.
676 17:46:48.527359 PCI: Static device PCI: 00:1f.2 not found, disabling it.
677 17:46:48.530159 PCI: 00:1f.3 [8086/0000] bus ops
678 17:46:48.533449 PCI: 00:1f.3 [8086/02c8] enabled
679 17:46:48.536870 PCI: 00:1f.4 [8086/0000] bus ops
680 17:46:48.540523 PCI: 00:1f.4 [8086/02a3] enabled
681 17:46:48.543625 PCI: 00:1f.5 [8086/0000] bus ops
682 17:46:48.547232 PCI: 00:1f.5 [8086/02a4] enabled
683 17:46:48.549670 PCI: Leftover static devices:
684 17:46:48.551424 PCI: 00:05.0
685 17:46:48.552728 PCI: 00:12.5
686 17:46:48.553873 PCI: 00:12.6
687 17:46:48.555496 PCI: 00:14.1
688 17:46:48.556897 PCI: 00:15.1
689 17:46:48.558478 PCI: 00:16.1
690 17:46:48.559483 PCI: 00:16.2
691 17:46:48.560644 PCI: 00:16.3
692 17:46:48.562064 PCI: 00:16.4
693 17:46:48.563821 PCI: 00:16.5
694 17:46:48.565039 PCI: 00:17.0
695 17:46:48.566321 PCI: 00:19.1
696 17:46:48.567552 PCI: 00:19.2
697 17:46:48.569367 PCI: 00:1e.1
698 17:46:48.570687 PCI: 00:1e.3
699 17:46:48.571719 PCI: 00:1f.1
700 17:46:48.573183 PCI: 00:1f.2
701 17:46:48.574695 PCI: 00:1f.6
702 17:46:48.577760 PCI: Check your devicetree.cb.
703 17:46:48.579868 PCI: 00:02.0 scanning...
704 17:46:48.583885 scan_generic_bus for PCI: 00:02.0
705 17:46:48.587806 scan_generic_bus for PCI: 00:02.0 done
706 17:46:48.592415 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
707 17:46:48.594954 PCI: 00:04.0 scanning...
708 17:46:48.599321 scan_generic_bus for PCI: 00:04.0
709 17:46:48.603392 bus: PCI: 00:04.0[0]->GENERIC: 0.0 enabled
710 17:46:48.607420 scan_generic_bus for PCI: 00:04.0 done
711 17:46:48.611932 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
712 17:46:48.614630 PCI: 00:14.0 scanning...
713 17:46:48.617701 scan_static_bus for PCI: 00:14.0
714 17:46:48.620352 USB0 port 0 enabled
715 17:46:48.622140 USB0 port 0 scanning...
716 17:46:48.625956 scan_static_bus for USB0 port 0
717 17:46:48.628421 USB2 port 0 enabled
718 17:46:48.630115 USB2 port 1 enabled
719 17:46:48.632509 USB2 port 2 enabled
720 17:46:48.634397 USB2 port 3 enabled
721 17:46:48.636232 USB2 port 5 enabled
722 17:46:48.638175 USB2 port 6 disabled
723 17:46:48.640501 USB2 port 9 enabled
724 17:46:48.642107 USB3 port 0 enabled
725 17:46:48.644518 USB3 port 1 enabled
726 17:46:48.646647 USB3 port 2 enabled
727 17:46:48.648884 USB3 port 3 enabled
728 17:46:48.650576 USB3 port 4 enabled
729 17:46:48.652677 USB2 port 4 enabled
730 17:46:48.654919 USB3 port 5 enabled
731 17:46:48.657566 USB2 port 0 scanning...
732 17:46:48.660490 scan_static_bus for USB2 port 0
733 17:46:48.664043 scan_static_bus for USB2 port 0 done
734 17:46:48.669202 scan_bus: bus USB2 port 0 finished in 6 msecs
735 17:46:48.671425 USB2 port 1 scanning...
736 17:46:48.674892 scan_static_bus for USB2 port 1
737 17:46:48.678788 scan_static_bus for USB2 port 1 done
738 17:46:48.682940 scan_bus: bus USB2 port 1 finished in 6 msecs
739 17:46:48.685563 USB2 port 2 scanning...
740 17:46:48.689398 scan_static_bus for USB2 port 2
741 17:46:48.693358 scan_static_bus for USB2 port 2 done
742 17:46:48.697344 scan_bus: bus USB2 port 2 finished in 6 msecs
743 17:46:48.699599 USB2 port 3 scanning...
744 17:46:48.703692 scan_static_bus for USB2 port 3
745 17:46:48.707285 scan_static_bus for USB2 port 3 done
746 17:46:48.711717 scan_bus: bus USB2 port 3 finished in 6 msecs
747 17:46:48.714644 USB2 port 5 scanning...
748 17:46:48.717677 scan_static_bus for USB2 port 5
749 17:46:48.721284 scan_static_bus for USB2 port 5 done
750 17:46:48.725878 scan_bus: bus USB2 port 5 finished in 6 msecs
751 17:46:48.728402 USB2 port 9 scanning...
752 17:46:48.731399 scan_static_bus for USB2 port 9
753 17:46:48.735459 scan_static_bus for USB2 port 9 done
754 17:46:48.739804 scan_bus: bus USB2 port 9 finished in 6 msecs
755 17:46:48.742533 USB3 port 0 scanning...
756 17:46:48.745643 scan_static_bus for USB3 port 0
757 17:46:48.749895 scan_static_bus for USB3 port 0 done
758 17:46:48.753973 scan_bus: bus USB3 port 0 finished in 6 msecs
759 17:46:48.756533 USB3 port 1 scanning...
760 17:46:48.759966 scan_static_bus for USB3 port 1
761 17:46:48.764228 scan_static_bus for USB3 port 1 done
762 17:46:48.768665 scan_bus: bus USB3 port 1 finished in 6 msecs
763 17:46:48.770536 USB3 port 2 scanning...
764 17:46:48.774464 scan_static_bus for USB3 port 2
765 17:46:48.778085 scan_static_bus for USB3 port 2 done
766 17:46:48.782354 scan_bus: bus USB3 port 2 finished in 6 msecs
767 17:46:48.784974 USB3 port 3 scanning...
768 17:46:48.788440 scan_static_bus for USB3 port 3
769 17:46:48.791910 scan_static_bus for USB3 port 3 done
770 17:46:48.796912 scan_bus: bus USB3 port 3 finished in 6 msecs
771 17:46:48.799270 USB3 port 4 scanning...
772 17:46:48.802808 scan_static_bus for USB3 port 4
773 17:46:48.806735 scan_static_bus for USB3 port 4 done
774 17:46:48.810944 scan_bus: bus USB3 port 4 finished in 6 msecs
775 17:46:48.813501 USB2 port 4 scanning...
776 17:46:48.816898 scan_static_bus for USB2 port 4
777 17:46:48.821149 scan_static_bus for USB2 port 4 done
778 17:46:48.825363 scan_bus: bus USB2 port 4 finished in 6 msecs
779 17:46:48.827822 USB3 port 5 scanning...
780 17:46:48.830929 scan_static_bus for USB3 port 5
781 17:46:48.834762 scan_static_bus for USB3 port 5 done
782 17:46:48.839884 scan_bus: bus USB3 port 5 finished in 6 msecs
783 17:46:48.842973 scan_static_bus for USB0 port 0 done
784 17:46:48.848019 scan_bus: bus USB0 port 0 finished in 219 msecs
785 17:46:48.851403 scan_static_bus for PCI: 00:14.0 done
786 17:46:48.856668 scan_bus: bus PCI: 00:14.0 finished in 236 msecs
787 17:46:48.859053 PCI: 00:15.2 scanning...
788 17:46:48.862882 scan_generic_bus for PCI: 00:15.2
789 17:46:48.866939 bus: PCI: 00:15.2[0]->I2C: 02:4a enabled
790 17:46:48.870383 scan_generic_bus for PCI: 00:15.2 done
791 17:46:48.875123 scan_bus: bus PCI: 00:15.2 finished in 11 msecs
792 17:46:48.877849 PCI: 00:15.3 scanning...
793 17:46:48.881730 scan_generic_bus for PCI: 00:15.3
794 17:46:48.885645 bus: PCI: 00:15.3[0]->I2C: 03:4a enabled
795 17:46:48.889693 scan_generic_bus for PCI: 00:15.3 done
796 17:46:48.894389 scan_bus: bus PCI: 00:15.3 finished in 11 msecs
797 17:46:48.897253 PCI: 00:19.0 scanning...
798 17:46:48.900427 scan_generic_bus for PCI: 00:19.0
799 17:46:48.904789 bus: PCI: 00:19.0[0]->I2C: 04:1a enabled
800 17:46:48.908465 scan_generic_bus for PCI: 00:19.0 done
801 17:46:48.913888 scan_bus: bus PCI: 00:19.0 finished in 11 msecs
802 17:46:48.915894 PCI: 00:1c.0 scanning...
803 17:46:48.919823 do_pci_scan_bridge for PCI: 00:1c.0
804 17:46:48.922788 PCI: pci_scan_bus for bus 01
805 17:46:48.926035 PCI: 01:00.0 [10ec/8168] ops
806 17:46:48.929304 PCI: 01:00.0 [10ec/8168] enabled
807 17:46:48.932845 Enabling Common Clock Configuration
808 17:46:48.937658 L1 Sub-State supported from root port 28
809 17:46:48.939793 L1 Sub-State Support = 0xf
810 17:46:48.942753 CommonModeRestoreTime = 0x96
811 17:46:48.947149 Power On Value = 0xf, Power On Scale = 0x1
812 17:46:48.948731 ASPM: Enabled L1
813 17:46:48.952825 PCIe: Max_Payload_Size adjusted to 128
814 17:46:48.957768 scan_bus: bus PCI: 00:1c.0 finished in 36 msecs
815 17:46:48.959823 PCI: 00:1e.2 scanning...
816 17:46:48.964283 scan_generic_bus for PCI: 00:1e.2
817 17:46:48.967673 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
818 17:46:48.971418 scan_generic_bus for PCI: 00:1e.2 done
819 17:46:48.976271 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
820 17:46:48.978739 PCI: 00:1f.0 scanning...
821 17:46:48.982175 scan_static_bus for PCI: 00:1f.0
822 17:46:48.984828 PNP: 0c09.0 enabled
823 17:46:48.987058 PNP: 0c09.0 scanning...
824 17:46:48.990115 scan_static_bus for PNP: 0c09.0
825 17:46:48.993946 scan_static_bus for PNP: 0c09.0 done
826 17:46:48.998650 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
827 17:46:49.002282 scan_static_bus for PCI: 00:1f.0 done
828 17:46:49.007000 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
829 17:46:49.009514 PCI: 00:1f.3 scanning...
830 17:46:49.013443 scan_static_bus for PCI: 00:1f.3
831 17:46:49.017120 scan_static_bus for PCI: 00:1f.3 done
832 17:46:49.021869 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
833 17:46:49.024462 PCI: 00:1f.4 scanning...
834 17:46:49.027898 scan_generic_bus for PCI: 00:1f.4
835 17:46:49.031727 scan_generic_bus for PCI: 00:1f.4 done
836 17:46:49.036629 scan_bus: bus PCI: 00:1f.4 finished in 7 msecs
837 17:46:49.038871 PCI: 00:1f.5 scanning...
838 17:46:49.042826 scan_generic_bus for PCI: 00:1f.5
839 17:46:49.046448 scan_generic_bus for PCI: 00:1f.5 done
840 17:46:49.051306 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
841 17:46:49.056102 scan_bus: bus DOMAIN: 0000 finished in 653 msecs
842 17:46:49.059753 scan_static_bus for Root Device done
843 17:46:49.065213 scan_bus: bus Root Device finished in 673 msecs
844 17:46:49.065484 done
845 17:46:49.072310 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1038 ms
846 17:46:49.078102 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
847 17:46:49.083444 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
848 17:46:49.089330 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
849 17:46:49.095215 MRC: 'RECOVERY_MRC_CACHE' does not need update.
850 17:46:49.098494 Chrome EC: UHEPI supported
851 17:46:49.104224 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
852 17:46:49.107665 SPI flash protection: WPSW=0 SRP0=0
853 17:46:49.112182 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
854 17:46:49.118165 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 39 ms
855 17:46:49.121341 found VGA at PCI: 00:02.0
856 17:46:49.124480 Setting up VGA for PCI: 00:02.0
857 17:46:49.129484 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
858 17:46:49.134606 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
859 17:46:49.137076 Allocating resources...
860 17:46:49.138795 Reading resources...
861 17:46:49.143035 Root Device read_resources bus 0 link: 0
862 17:46:49.147652 CPU_CLUSTER: 0 read_resources bus 0 link: 0
863 17:46:49.153225 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
864 17:46:49.157897 DOMAIN: 0000 read_resources bus 0 link: 0
865 17:46:49.162679 PCI: 00:04.0 read_resources bus 1 link: 0
866 17:46:49.168054 PCI: 00:04.0 read_resources bus 1 link: 0 done
867 17:46:49.173240 PCI: 00:14.0 read_resources bus 0 link: 0
868 17:46:49.177403 USB0 port 0 read_resources bus 0 link: 0
869 17:46:49.186518 USB0 port 0 read_resources bus 0 link: 0 done
870 17:46:49.191900 PCI: 00:14.0 read_resources bus 0 link: 0 done
871 17:46:49.197411 PCI: 00:15.2 read_resources bus 2 link: 0
872 17:46:49.202445 PCI: 00:15.2 read_resources bus 2 link: 0 done
873 17:46:49.207350 PCI: 00:15.3 read_resources bus 3 link: 0
874 17:46:49.212105 PCI: 00:15.3 read_resources bus 3 link: 0 done
875 17:46:49.216783 PCI: 00:19.0 read_resources bus 4 link: 0
876 17:46:49.222311 PCI: 00:19.0 read_resources bus 4 link: 0 done
877 17:46:49.227335 PCI: 00:1c.0 read_resources bus 1 link: 0
878 17:46:49.232731 PCI: 00:1c.0 read_resources bus 1 link: 0 done
879 17:46:49.237286 PCI: 00:1e.2 read_resources bus 5 link: 0
880 17:46:49.242530 PCI: 00:1e.2 read_resources bus 5 link: 0 done
881 17:46:49.247548 PCI: 00:1f.0 read_resources bus 0 link: 0
882 17:46:49.252842 PCI: 00:1f.0 read_resources bus 0 link: 0 done
883 17:46:49.258743 DOMAIN: 0000 read_resources bus 0 link: 0 done
884 17:46:49.263689 Root Device read_resources bus 0 link: 0 done
885 17:46:49.266183 Done reading resources.
886 17:46:49.271879 Show resources in subtree (Root Device)...After reading.
887 17:46:49.276500 Root Device child on link 0 CPU_CLUSTER: 0
888 17:46:49.280521 CPU_CLUSTER: 0 child on link 0 APIC: 00
889 17:46:49.281792 APIC: 00
890 17:46:49.283134 APIC: 02
891 17:46:49.287737 DOMAIN: 0000 child on link 0 PCI: 00:00.0
892 17:46:49.296532 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
893 17:46:49.306321 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
894 17:46:49.308243 PCI: 00:00.0
895 17:46:49.317956 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
896 17:46:49.327244 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
897 17:46:49.336541 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
898 17:46:49.345644 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
899 17:46:49.355098 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
900 17:46:49.364383 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
901 17:46:49.373796 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
902 17:46:49.383356 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
903 17:46:49.392318 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
904 17:46:49.401133 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
905 17:46:49.411265 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
906 17:46:49.420257 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
907 17:46:49.429691 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
908 17:46:49.439727 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
909 17:46:49.449322 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
910 17:46:49.458245 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
911 17:46:49.459881 PCI: 00:02.0
912 17:46:49.469872 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
913 17:46:49.480391 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
914 17:46:49.488284 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
915 17:46:49.492922 PCI: 00:04.0 child on link 0 GENERIC: 0.0
916 17:46:49.502975 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
917 17:46:49.504792 GENERIC: 0.0
918 17:46:49.506751 PCI: 00:08.0
919 17:46:49.516264 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
920 17:46:49.517984 PCI: 00:12.0
921 17:46:49.527633 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
922 17:46:49.532206 PCI: 00:14.0 child on link 0 USB0 port 0
923 17:46:49.542463 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
924 17:46:49.546485 USB0 port 0 child on link 0 USB2 port 0
925 17:46:49.548383 USB2 port 0
926 17:46:49.549999 USB2 port 1
927 17:46:49.551922 USB2 port 2
928 17:46:49.553217 USB2 port 3
929 17:46:49.555629 USB2 port 5
930 17:46:49.557335 USB2 port 6
931 17:46:49.559309 USB2 port 9
932 17:46:49.560784 USB3 port 0
933 17:46:49.563265 USB3 port 1
934 17:46:49.564381 USB3 port 2
935 17:46:49.565560 USB3 port 3
936 17:46:49.567438 USB3 port 4
937 17:46:49.569346 USB2 port 4
938 17:46:49.571380 USB3 port 5
939 17:46:49.572915 PCI: 00:14.2
940 17:46:49.582699 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
941 17:46:49.592965 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
942 17:46:49.594133 PCI: 00:14.3
943 17:46:49.604269 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
944 17:46:49.606055 PCI: 00:14.5
945 17:46:49.616073 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
946 17:46:49.617530 PCI: 00:15.0
947 17:46:49.621752 PCI: 00:15.2 child on link 0 I2C: 02:4a
948 17:46:49.631657 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
949 17:46:49.633552 I2C: 02:4a
950 17:46:49.637460 PCI: 00:15.3 child on link 0 I2C: 03:4a
951 17:46:49.647243 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
952 17:46:49.648813 I2C: 03:4a
953 17:46:49.650639 PCI: 00:16.0
954 17:46:49.660958 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
955 17:46:49.664991 PCI: 00:19.0 child on link 0 I2C: 04:1a
956 17:46:49.675012 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
957 17:46:49.676510 I2C: 04:1a
958 17:46:49.678120 PCI: 00:1a.0
959 17:46:49.688315 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
960 17:46:49.692284 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
961 17:46:49.701559 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
962 17:46:49.711199 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
963 17:46:49.720071 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
964 17:46:49.721675 PCI: 01:00.0
965 17:46:49.730011 PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
966 17:46:49.740543 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
967 17:46:49.750219 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
968 17:46:49.752021 PCI: 00:1e.0
969 17:46:49.763286 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
970 17:46:49.772970 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
971 17:46:49.776618 PCI: 00:1e.2 child on link 0 SPI: 00
972 17:46:49.786898 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
973 17:46:49.788412 SPI: 00
974 17:46:49.792617 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
975 17:46:49.801232 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
976 17:46:49.809876 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
977 17:46:49.811689 PNP: 0c09.0
978 17:46:49.820772 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
979 17:46:49.822299 PCI: 00:1f.3
980 17:46:49.831855 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
981 17:46:49.842517 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
982 17:46:49.843652 PCI: 00:1f.4
983 17:46:49.852874 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
984 17:46:49.862700 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
985 17:46:49.864342 PCI: 00:1f.5
986 17:46:49.873447 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
987 17:46:49.881284 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
988 17:46:49.886873 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
989 17:46:49.890264 PCI: 01:00.0 10 * [0x0 - 0xff] io
990 17:46:49.897284 PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
991 17:46:49.903532 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
992 17:46:49.907554 PCI: 01:00.0 20 * [0x0 - 0x3fff] mem
993 17:46:49.911475 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
994 17:46:49.918753 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
995 17:46:49.926157 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
996 17:46:49.933589 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
997 17:46:49.940608 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
998 17:46:49.946755 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
999 17:46:49.954783 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1000 17:46:49.961969 update_constraints: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1001 17:46:49.969724 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1002 17:46:49.977071 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1003 17:46:49.980055 DOMAIN: 0000: Resource ranges:
1004 17:46:49.983768 * Base: 1000, Size: 800, Tag: 100
1005 17:46:49.987363 * Base: 1900, Size: d6a0, Tag: 100
1006 17:46:49.991021 * Base: efc0, Size: 1040, Tag: 100
1007 17:46:49.996603 PCI: 00:1c.0 1c * [0x2000 - 0x2fff] limit: 2fff io
1008 17:46:50.001701 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1009 17:46:50.008020 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1010 17:46:50.014845 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1011 17:46:50.022621 update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1012 17:46:50.030869 update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)
1013 17:46:50.037870 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1014 17:46:50.046239 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1015 17:46:50.053444 update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed)
1016 17:46:50.061209 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1017 17:46:50.069081 update_constraints: PCI: 00:00.0 06 base fe000000 limit fe00ffff mem (fixed)
1018 17:46:50.076905 update_constraints: PCI: 00:00.0 07 base fed90000 limit fed90fff mem (fixed)
1019 17:46:50.083866 update_constraints: PCI: 00:00.0 08 base fed91000 limit fed91fff mem (fixed)
1020 17:46:50.092065 update_constraints: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1021 17:46:50.099808 update_constraints: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1022 17:46:50.107150 update_constraints: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1023 17:46:50.114518 update_constraints: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1024 17:46:50.122900 update_constraints: PCI: 00:00.0 0d base 100000000 limit 15e7fffff mem (fixed)
1025 17:46:50.130634 update_constraints: PCI: 00:00.0 0e base 000a0000 limit 000bffff mem (fixed)
1026 17:46:50.138081 update_constraints: PCI: 00:00.0 0f base 000c0000 limit 000fffff mem (fixed)
1027 17:46:50.146197 update_constraints: PCI: 00:1e.0 10 base fe032000 limit fe032fff mem (fixed)
1028 17:46:50.149015 DOMAIN: 0000: Resource ranges:
1029 17:46:50.153826 * Base: 9f800000, Size: 40800000, Tag: 200
1030 17:46:50.158210 * Base: f0000000, Size: c000000, Tag: 200
1031 17:46:50.162234 * Base: fc001000, Size: 1fff000, Tag: 200
1032 17:46:50.166155 * Base: fe010000, Size: 22000, Tag: 200
1033 17:46:50.170272 * Base: fe033000, Size: cdd000, Tag: 200
1034 17:46:50.174385 * Base: fed18000, Size: 68000, Tag: 200
1035 17:46:50.178205 * Base: fed84000, Size: c000, Tag: 200
1036 17:46:50.182365 * Base: fed92000, Size: e000, Tag: 200
1037 17:46:50.186723 * Base: feda2000, Size: 125e000, Tag: 200
1038 17:46:50.191322 * Base: 15e800000, Size: 7ea1800000, Tag: 100200
1039 17:46:50.198942 PCI: 00:02.0 18 * [0xa0000000 - 0xafffffff] limit: afffffff prefmem
1040 17:46:50.205590 PCI: 00:02.0 10 * [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem
1041 17:46:50.211944 PCI: 00:1c.0 20 * [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem
1042 17:46:50.218505 PCI: 00:1f.3 20 * [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem
1043 17:46:50.225315 PCI: 00:14.0 10 * [0x9fa00000 - 0x9fa0ffff] limit: 9fa0ffff mem
1044 17:46:50.231400 PCI: 00:04.0 10 * [0x9fa10000 - 0x9fa17fff] limit: 9fa17fff mem
1045 17:46:50.238334 PCI: 00:14.3 10 * [0x9fa18000 - 0x9fa1bfff] limit: 9fa1bfff mem
1046 17:46:50.245037 PCI: 00:1f.3 10 * [0x9fa1c000 - 0x9fa1ffff] limit: 9fa1ffff mem
1047 17:46:50.251363 PCI: 00:14.2 10 * [0x9fa20000 - 0x9fa21fff] limit: 9fa21fff mem
1048 17:46:50.257841 PCI: 00:08.0 10 * [0x9fa22000 - 0x9fa22fff] limit: 9fa22fff mem
1049 17:46:50.265057 PCI: 00:12.0 10 * [0x9fa23000 - 0x9fa23fff] limit: 9fa23fff mem
1050 17:46:50.271170 PCI: 00:14.2 18 * [0x9fa24000 - 0x9fa24fff] limit: 9fa24fff mem
1051 17:46:50.277897 PCI: 00:14.5 10 * [0x9fa25000 - 0x9fa25fff] limit: 9fa25fff mem
1052 17:46:50.284088 PCI: 00:15.2 10 * [0x9fa26000 - 0x9fa26fff] limit: 9fa26fff mem
1053 17:46:50.291061 PCI: 00:15.3 10 * [0x9fa27000 - 0x9fa27fff] limit: 9fa27fff mem
1054 17:46:50.297500 PCI: 00:16.0 10 * [0x9fa28000 - 0x9fa28fff] limit: 9fa28fff mem
1055 17:46:50.304335 PCI: 00:19.0 10 * [0x9fa29000 - 0x9fa29fff] limit: 9fa29fff mem
1056 17:46:50.311063 PCI: 00:1a.0 10 * [0x9fa2a000 - 0x9fa2afff] limit: 9fa2afff mem
1057 17:46:50.317424 PCI: 00:1e.0 18 * [0x9fa2b000 - 0x9fa2bfff] limit: 9fa2bfff mem
1058 17:46:50.324623 PCI: 00:1e.2 10 * [0x9fa2c000 - 0x9fa2cfff] limit: 9fa2cfff mem
1059 17:46:50.330702 PCI: 00:1f.5 10 * [0x9fa2d000 - 0x9fa2dfff] limit: 9fa2dfff mem
1060 17:46:50.337640 PCI: 00:1f.4 10 * [0x9fa2e000 - 0x9fa2e0ff] limit: 9fa2e0ff mem
1061 17:46:50.344539 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1062 17:46:50.351339 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
1063 17:46:50.355204 PCI: 00:1c.0: Resource ranges:
1064 17:46:50.358820 * Base: 2000, Size: 1000, Tag: 100
1065 17:46:50.363274 PCI: 01:00.0 10 * [0x2000 - 0x20ff] limit: 20ff io
1066 17:46:50.370716 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
1067 17:46:50.379073 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff
1068 17:46:50.382228 PCI: 00:1c.0: Resource ranges:
1069 17:46:50.386881 * Base: 9f800000, Size: 100000, Tag: 200
1070 17:46:50.393264 PCI: 01:00.0 20 * [0x9f800000 - 0x9f803fff] limit: 9f803fff mem
1071 17:46:50.399290 PCI: 01:00.0 18 * [0x9f804000 - 0x9f804fff] limit: 9f804fff mem
1072 17:46:50.407751 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done
1073 17:46:50.415278 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1074 17:46:50.419873 Root Device assign_resources, bus 0 link: 0
1075 17:46:50.424394 DOMAIN: 0000 assign_resources, bus 0 link: 0
1076 17:46:50.433078 PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64
1077 17:46:50.441595 PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64
1078 17:46:50.449297 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1079 17:46:50.457481 PCI: 00:04.0 10 <- [0x009fa10000 - 0x009fa17fff] size 0x00008000 gran 0x0f mem64
1080 17:46:50.461404 PCI: 00:04.0 assign_resources, bus 1 link: 0
1081 17:46:50.466731 PCI: 00:04.0 assign_resources, bus 1 link: 0
1082 17:46:50.474679 PCI: 00:08.0 10 <- [0x009fa22000 - 0x009fa22fff] size 0x00001000 gran 0x0c mem64
1083 17:46:50.483291 PCI: 00:12.0 10 <- [0x009fa23000 - 0x009fa23fff] size 0x00001000 gran 0x0c mem64
1084 17:46:50.491636 PCI: 00:14.0 10 <- [0x009fa00000 - 0x009fa0ffff] size 0x00010000 gran 0x10 mem64
1085 17:46:50.496820 PCI: 00:14.0 assign_resources, bus 0 link: 0
1086 17:46:50.501181 PCI: 00:14.0 assign_resources, bus 0 link: 0
1087 17:46:50.509187 PCI: 00:14.2 10 <- [0x009fa20000 - 0x009fa21fff] size 0x00002000 gran 0x0d mem64
1088 17:46:50.517166 PCI: 00:14.2 18 <- [0x009fa24000 - 0x009fa24fff] size 0x00001000 gran 0x0c mem64
1089 17:46:50.525587 PCI: 00:14.3 10 <- [0x009fa18000 - 0x009fa1bfff] size 0x00004000 gran 0x0e mem64
1090 17:46:50.533868 PCI: 00:14.5 10 <- [0x009fa25000 - 0x009fa25fff] size 0x00001000 gran 0x0c mem64
1091 17:46:50.542360 PCI: 00:15.2 10 <- [0x009fa26000 - 0x009fa26fff] size 0x00001000 gran 0x0c mem64
1092 17:46:50.546253 PCI: 00:15.2 assign_resources, bus 2 link: 0
1093 17:46:50.551522 PCI: 00:15.2 assign_resources, bus 2 link: 0
1094 17:46:50.560013 PCI: 00:15.3 10 <- [0x009fa27000 - 0x009fa27fff] size 0x00001000 gran 0x0c mem64
1095 17:46:50.564290 PCI: 00:15.3 assign_resources, bus 3 link: 0
1096 17:46:50.568992 PCI: 00:15.3 assign_resources, bus 3 link: 0
1097 17:46:50.576786 PCI: 00:16.0 10 <- [0x009fa28000 - 0x009fa28fff] size 0x00001000 gran 0x0c mem64
1098 17:46:50.585929 PCI: 00:19.0 10 <- [0x009fa29000 - 0x009fa29fff] size 0x00001000 gran 0x0c mem64
1099 17:46:50.589466 PCI: 00:19.0 assign_resources, bus 4 link: 0
1100 17:46:50.595126 PCI: 00:19.0 assign_resources, bus 4 link: 0
1101 17:46:50.603103 PCI: 00:1a.0 10 <- [0x009fa2a000 - 0x009fa2afff] size 0x00001000 gran 0x0c mem64
1102 17:46:50.611779 PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io
1103 17:46:50.621363 PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1104 17:46:50.629822 PCI: 00:1c.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 01 mem
1105 17:46:50.634266 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1106 17:46:50.642345 PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
1107 17:46:50.650412 PCI: 01:00.0 18 <- [0x009f804000 - 0x009f804fff] size 0x00001000 gran 0x0c mem64
1108 17:46:50.658044 PCI: 01:00.0 20 <- [0x009f800000 - 0x009f803fff] size 0x00004000 gran 0x0e mem64
1109 17:46:50.662721 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1110 17:46:50.671061 PCI: 00:1e.0 18 <- [0x009fa2b000 - 0x009fa2bfff] size 0x00001000 gran 0x0c mem64
1111 17:46:50.679756 PCI: 00:1e.2 10 <- [0x009fa2c000 - 0x009fa2cfff] size 0x00001000 gran 0x0c mem64
1112 17:46:50.684023 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1113 17:46:50.688691 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1114 17:46:50.693379 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1115 17:46:50.698888 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1116 17:46:50.703721 LPC: Trying to open IO window from 800 size 1ff
1117 17:46:50.711967 PCI: 00:1f.3 10 <- [0x009fa1c000 - 0x009fa1ffff] size 0x00004000 gran 0x0e mem64
1118 17:46:50.719431 PCI: 00:1f.3 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 mem64
1119 17:46:50.728529 PCI: 00:1f.4 10 <- [0x009fa2e000 - 0x009fa2e0ff] size 0x00000100 gran 0x08 mem64
1120 17:46:50.736093 PCI: 00:1f.5 10 <- [0x009fa2d000 - 0x009fa2dfff] size 0x00001000 gran 0x0c mem
1121 17:46:50.740839 DOMAIN: 0000 assign_resources, bus 0 link: 0
1122 17:46:50.745786 Root Device assign_resources, bus 0 link: 0
1123 17:46:50.747961 Done setting resources.
1124 17:46:50.754542 Show resources in subtree (Root Device)...After assigning values.
1125 17:46:50.759009 Root Device child on link 0 CPU_CLUSTER: 0
1126 17:46:50.762921 CPU_CLUSTER: 0 child on link 0 APIC: 00
1127 17:46:50.764693 APIC: 00
1128 17:46:50.765937 APIC: 02
1129 17:46:50.769973 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1130 17:46:50.779823 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1131 17:46:50.789389 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1132 17:46:50.790843 PCI: 00:00.0
1133 17:46:50.800431 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1134 17:46:50.809778 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1135 17:46:50.819123 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1136 17:46:50.828348 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1137 17:46:50.837928 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1138 17:46:50.847068 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1139 17:46:50.856329 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1140 17:46:50.865827 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1141 17:46:50.875178 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1142 17:46:50.884201 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1143 17:46:50.893522 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1144 17:46:50.902752 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1145 17:46:50.912439 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1146 17:46:50.922603 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
1147 17:46:50.931742 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1148 17:46:50.940638 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1149 17:46:50.942518 PCI: 00:02.0
1150 17:46:50.952995 PCI: 00:02.0 resource base b0000000 size 1000000 align 24 gran 24 limit b0ffffff flags 60000201 index 10
1151 17:46:50.963591 PCI: 00:02.0 resource base a0000000 size 10000000 align 28 gran 28 limit afffffff flags 60001201 index 18
1152 17:46:50.972803 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1153 17:46:50.977506 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1154 17:46:50.987399 PCI: 00:04.0 resource base 9fa10000 size 8000 align 15 gran 15 limit 9fa17fff flags 60000201 index 10
1155 17:46:50.989276 GENERIC: 0.0
1156 17:46:50.991203 PCI: 00:08.0
1157 17:46:51.000967 PCI: 00:08.0 resource base 9fa22000 size 1000 align 12 gran 12 limit 9fa22fff flags 60000201 index 10
1158 17:46:51.002869 PCI: 00:12.0
1159 17:46:51.013464 PCI: 00:12.0 resource base 9fa23000 size 1000 align 12 gran 12 limit 9fa23fff flags 60000201 index 10
1160 17:46:51.017346 PCI: 00:14.0 child on link 0 USB0 port 0
1161 17:46:51.028118 PCI: 00:14.0 resource base 9fa00000 size 10000 align 16 gran 16 limit 9fa0ffff flags 60000201 index 10
1162 17:46:51.032208 USB0 port 0 child on link 0 USB2 port 0
1163 17:46:51.034011 USB2 port 0
1164 17:46:51.036259 USB2 port 1
1165 17:46:51.038067 USB2 port 2
1166 17:46:51.039774 USB2 port 3
1167 17:46:51.041301 USB2 port 5
1168 17:46:51.042933 USB2 port 6
1169 17:46:51.044807 USB2 port 9
1170 17:46:51.046923 USB3 port 0
1171 17:46:51.048530 USB3 port 1
1172 17:46:51.049783 USB3 port 2
1173 17:46:51.051697 USB3 port 3
1174 17:46:51.053427 USB3 port 4
1175 17:46:51.055705 USB2 port 4
1176 17:46:51.056912 USB3 port 5
1177 17:46:51.059093 PCI: 00:14.2
1178 17:46:51.068735 PCI: 00:14.2 resource base 9fa20000 size 2000 align 13 gran 13 limit 9fa21fff flags 60000201 index 10
1179 17:46:51.079392 PCI: 00:14.2 resource base 9fa24000 size 1000 align 12 gran 12 limit 9fa24fff flags 60000201 index 18
1180 17:46:51.081224 PCI: 00:14.3
1181 17:46:51.091320 PCI: 00:14.3 resource base 9fa18000 size 4000 align 14 gran 14 limit 9fa1bfff flags 60000201 index 10
1182 17:46:51.092975 PCI: 00:14.5
1183 17:46:51.103376 PCI: 00:14.5 resource base 9fa25000 size 1000 align 12 gran 12 limit 9fa25fff flags 60000201 index 10
1184 17:46:51.104854 PCI: 00:15.0
1185 17:46:51.109112 PCI: 00:15.2 child on link 0 I2C: 02:4a
1186 17:46:51.119699 PCI: 00:15.2 resource base 9fa26000 size 1000 align 12 gran 12 limit 9fa26fff flags 60000201 index 10
1187 17:46:51.120812 I2C: 02:4a
1188 17:46:51.125374 PCI: 00:15.3 child on link 0 I2C: 03:4a
1189 17:46:51.135488 PCI: 00:15.3 resource base 9fa27000 size 1000 align 12 gran 12 limit 9fa27fff flags 60000201 index 10
1190 17:46:51.136936 I2C: 03:4a
1191 17:46:51.139138 PCI: 00:16.0
1192 17:46:51.149433 PCI: 00:16.0 resource base 9fa28000 size 1000 align 12 gran 12 limit 9fa28fff flags 60000201 index 10
1193 17:46:51.153417 PCI: 00:19.0 child on link 0 I2C: 04:1a
1194 17:46:51.163733 PCI: 00:19.0 resource base 9fa29000 size 1000 align 12 gran 12 limit 9fa29fff flags 60000201 index 10
1195 17:46:51.165200 I2C: 04:1a
1196 17:46:51.167301 PCI: 00:1a.0
1197 17:46:51.177480 PCI: 00:1a.0 resource base 9fa2a000 size 1000 align 12 gran 12 limit 9fa2afff flags 60000201 index 10
1198 17:46:51.181751 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1199 17:46:51.191318 PCI: 00:1c.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
1200 17:46:51.202521 PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1201 17:46:51.213332 PCI: 00:1c.0 resource base 9f800000 size 100000 align 20 gran 20 limit 9f8fffff flags 60080202 index 20
1202 17:46:51.215065 PCI: 01:00.0
1203 17:46:51.224476 PCI: 01:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10
1204 17:46:51.234969 PCI: 01:00.0 resource base 9f804000 size 1000 align 12 gran 12 limit 9f804fff flags 60000201 index 18
1205 17:46:51.245045 PCI: 01:00.0 resource base 9f800000 size 4000 align 14 gran 14 limit 9f803fff flags 60000201 index 20
1206 17:46:51.246901 PCI: 00:1e.0
1207 17:46:51.257962 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1208 17:46:51.268635 PCI: 00:1e.0 resource base 9fa2b000 size 1000 align 12 gran 12 limit 9fa2bfff flags 60000201 index 18
1209 17:46:51.272489 PCI: 00:1e.2 child on link 0 SPI: 00
1210 17:46:51.282862 PCI: 00:1e.2 resource base 9fa2c000 size 1000 align 12 gran 12 limit 9fa2cfff flags 60000201 index 10
1211 17:46:51.284181 SPI: 00
1212 17:46:51.288061 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 17:46:51.296864 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 17:46:51.306624 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 17:46:51.307613 PNP: 0c09.0
1216 17:46:51.316790 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 17:46:51.318269 PCI: 00:1f.3
1218 17:46:51.328452 PCI: 00:1f.3 resource base 9fa1c000 size 4000 align 14 gran 14 limit 9fa1ffff flags 60000201 index 10
1219 17:46:51.339431 PCI: 00:1f.3 resource base 9f900000 size 100000 align 20 gran 20 limit 9f9fffff flags 60000201 index 20
1220 17:46:51.340833 PCI: 00:1f.4
1221 17:46:51.349822 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 17:46:51.359957 PCI: 00:1f.4 resource base 9fa2e000 size 100 align 12 gran 8 limit 9fa2e0ff flags 60000201 index 10
1223 17:46:51.361561 PCI: 00:1f.5
1224 17:46:51.371719 PCI: 00:1f.5 resource base 9fa2d000 size 1000 align 12 gran 12 limit 9fa2dfff flags 60000200 index 10
1225 17:46:51.374305 Done allocating resources.
1226 17:46:51.380689 BS: BS_DEV_RESOURCES run times (exec / console): 31 / 2220 ms
1227 17:46:51.383237 Enabling resources...
1228 17:46:51.387854 PCI: 00:00.0 subsystem <- 8086/9b71
1229 17:46:51.389941 PCI: 00:00.0 cmd <- 06
1230 17:46:51.393510 PCI: 00:02.0 subsystem <- 8086/9baa
1231 17:46:51.396867 PCI: 00:02.0 cmd <- 03
1232 17:46:51.400506 PCI: 00:04.0 subsystem <- 8086/1903
1233 17:46:51.402511 PCI: 00:04.0 cmd <- 02
1234 17:46:51.404944 PCI: 00:08.0 cmd <- 06
1235 17:46:51.409042 PCI: 00:12.0 subsystem <- 8086/02f9
1236 17:46:51.411365 PCI: 00:12.0 cmd <- 02
1237 17:46:51.415862 PCI: 00:14.0 subsystem <- 8086/02ed
1238 17:46:51.417772 PCI: 00:14.0 cmd <- 02
1239 17:46:51.419897 PCI: 00:14.2 cmd <- 02
1240 17:46:51.424157 PCI: 00:14.3 subsystem <- 8086/02f0
1241 17:46:51.426557 PCI: 00:14.3 cmd <- 02
1242 17:46:51.430485 PCI: 00:14.5 subsystem <- 8086/02f5
1243 17:46:51.432426 PCI: 00:14.5 cmd <- 06
1244 17:46:51.436709 PCI: 00:15.2 subsystem <- 8086/02ea
1245 17:46:51.439103 PCI: 00:15.2 cmd <- 02
1246 17:46:51.442712 PCI: 00:15.3 subsystem <- 8086/02eb
1247 17:46:51.445503 PCI: 00:15.3 cmd <- 02
1248 17:46:51.448609 PCI: 00:16.0 subsystem <- 8086/02e0
1249 17:46:51.451057 PCI: 00:16.0 cmd <- 02
1250 17:46:51.455634 PCI: 00:19.0 subsystem <- 8086/02c5
1251 17:46:51.457732 PCI: 00:19.0 cmd <- 02
1252 17:46:51.461438 PCI: 00:1a.0 subsystem <- 8086/02c4
1253 17:46:51.463982 PCI: 00:1a.0 cmd <- 06
1254 17:46:51.467764 PCI: 00:1c.0 bridge ctrl <- 0013
1255 17:46:51.470815 PCI: 00:1c.0 subsystem <- 8086/02be
1256 17:46:51.474128 PCI: 00:1c.0 cmd <- 07
1257 17:46:51.477320 PCI: 00:1e.0 subsystem <- 8086/02a8
1258 17:46:51.479748 PCI: 00:1e.0 cmd <- 06
1259 17:46:51.483740 PCI: 00:1e.2 subsystem <- 8086/02aa
1260 17:46:51.486166 PCI: 00:1e.2 cmd <- 06
1261 17:46:51.489730 PCI: 00:1f.0 subsystem <- 8086/0285
1262 17:46:51.492479 PCI: 00:1f.0 cmd <- 407
1263 17:46:51.495939 PCI: 00:1f.3 subsystem <- 8086/02c8
1264 17:46:51.498187 PCI: 00:1f.3 cmd <- 02
1265 17:46:51.502129 PCI: 00:1f.4 subsystem <- 8086/02a3
1266 17:46:51.504752 PCI: 00:1f.4 cmd <- 03
1267 17:46:51.509130 PCI: 00:1f.5 subsystem <- 8086/02a4
1268 17:46:51.511375 PCI: 00:1f.5 cmd <- 406
1269 17:46:51.515764 PCI: 01:00.0 cmd <- 03
1270 17:46:51.517877 done.
1271 17:46:51.523903 BS: BS_DEV_ENABLE run times (exec / console): 11 / 126 ms
1272 17:46:51.526302 Initializing devices...
1273 17:46:51.527941 Root Device init
1274 17:46:51.532616 Chrome EC: Set SMI mask to 0x0000000000000000
1275 17:46:51.539032 Chrome EC: clear events_b mask to 0x0000000000000000
1276 17:46:51.544130 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004
1277 17:46:51.550910 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004
1278 17:46:51.556841 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000000080004
1279 17:46:51.562067 Chrome EC: Set WAKE mask to 0x0000000000000000
1280 17:46:51.566389 Root Device init finished in 33 msecs
1281 17:46:51.570549 PCI: 00:00.0 init
1282 17:46:51.573334 CPU TDP = 15 Watts
1283 17:46:51.574991 CPU PL1 = 15 Watts
1284 17:46:51.577385 CPU PL2 = 35 Watts
1285 17:46:51.578754 CPU PsysPL2 = 65 Watts
1286 17:46:51.583152 PCI: 00:00.0 init finished in 9 msecs
1287 17:46:51.585024 PCI: 00:02.0 init
1288 17:46:51.587456 GMA: Found VBT in CBFS
1289 17:46:51.590562 GMA: Found valid VBT in CBFS
1290 17:46:51.594005 PCI: 00:02.0 init finished in 5 msecs
1291 17:46:51.596262 PCI: 00:08.0 init
1292 17:46:51.600279 PCI: 00:08.0 init finished in 0 msecs
1293 17:46:51.602760 PCI: 00:12.0 init
1294 17:46:51.606527 PCI: 00:12.0 init finished in 0 msecs
1295 17:46:51.608774 PCI: 00:14.0 init
1296 17:46:51.612814 PCI: 00:14.0 init finished in 0 msecs
1297 17:46:51.614497 PCI: 00:14.2 init
1298 17:46:51.618463 PCI: 00:14.2 init finished in 0 msecs
1299 17:46:51.621111 PCI: 00:14.3 init
1300 17:46:51.624582 PCI: 00:14.3 init finished in 0 msecs
1301 17:46:51.628046 PCI: 00:15.2 init
1302 17:46:51.630546 I2C bus 2 version 0x3132322a
1303 17:46:51.634626 DW I2C bus 2 at 0x9fa26000 (400 KHz)
1304 17:46:51.638215 PCI: 00:15.2 init finished in 6 msecs
1305 17:46:51.640118 PCI: 00:15.3 init
1306 17:46:51.643453 I2C bus 3 version 0x3132322a
1307 17:46:51.647259 DW I2C bus 3 at 0x9fa27000 (400 KHz)
1308 17:46:51.651102 PCI: 00:15.3 init finished in 6 msecs
1309 17:46:51.653400 PCI: 00:16.0 init
1310 17:46:51.656704 PCI: 00:16.0 init finished in 0 msecs
1311 17:46:51.659439 PCI: 00:19.0 init
1312 17:46:51.662061 I2C bus 4 version 0x3132322a
1313 17:46:51.665740 DW I2C bus 4 at 0x9fa29000 (400 KHz)
1314 17:46:51.669631 PCI: 00:19.0 init finished in 6 msecs
1315 17:46:51.671909 PCI: 00:1a.0 init
1316 17:46:51.675805 PCI: 00:1a.0 init finished in 0 msecs
1317 17:46:51.678495 PCI: 00:1c.0 init
1318 17:46:51.681004 Initializing PCH PCIe bridge.
1319 17:46:51.684737 PCI: 00:1c.0 init finished in 3 msecs
1320 17:46:51.687819 PCI: 00:1f.0 init
1321 17:46:51.692611 IOAPIC: Initializing IOAPIC at 0xfec00000
1322 17:46:51.696853 IOAPIC: Bootstrap Processor Local APIC = 0x00
1323 17:46:51.698762 IOAPIC: ID = 0x02
1324 17:46:51.700924 IOAPIC: Dumping registers
1325 17:46:51.703511 reg 0x0000: 0x02000000
1326 17:46:51.706511 reg 0x0001: 0x00770020
1327 17:46:51.708833 reg 0x0002: 0x00000000
1328 17:46:51.712886 PCI: 00:1f.0 init finished in 21 msecs
1329 17:46:51.715964 PCI: 00:1f.4 init
1330 17:46:51.719385 PCI: 00:1f.4 init finished in 0 msecs
1331 17:46:51.729986 PCI: 01:00.0 init
1332 17:46:51.734395 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1333 17:46:51.741617 Error: Could not locate 'ethernet_mac0' in VPD
1334 17:46:51.748564 r8168: mac address not found in VPD, using default 00:e0:4c:00:c0:b0
1335 17:46:51.752402 r8168: ignore invalid MAC address in cbfs
1336 17:46:51.755200 r8168: Resetting NIC...done
1337 17:46:51.758970 r8168: Programming MAC Address...done
1338 17:46:51.761744 r8168: Customized LED 0x5af
1339 17:46:51.766051 r8168: read back LED setting as 0x5af
1340 17:46:51.769604 PCI: 01:00.0 init finished in 35 msecs
1341 17:46:51.772557 PNP: 0c09.0 init
1342 17:46:51.776726 Google Chrome EC uptime: 546797.391 seconds
1343 17:46:51.781081 Google Chrome AP resets since EC boot: 273
1344 17:46:51.785271 Google Chrome most recent AP reset causes:
1345 17:46:51.789381 521913.838: 32768 shutdown: power failure
1346 17:46:51.793684 521913.843: 32768 shutdown: power failure
1347 17:46:51.797522 521914.142: 32775 shutdown: entering G3
1348 17:46:51.802601 546782.182: 32774 shutdown: by console command
1349 17:46:51.808659 Google Chrome EC reset flags at last EC boot: reset-pin
1350 17:46:51.812020 PNP: 0c09.0 init finished in 36 msecs
1351 17:46:51.814526 Devices initialized
1352 17:46:51.817731 Show all devs... After init.
1353 17:46:51.819871 Root Device: enabled 1
1354 17:46:51.822082 CPU_CLUSTER: 0: enabled 1
1355 17:46:51.824751 DOMAIN: 0000: enabled 1
1356 17:46:51.826946 APIC: 00: enabled 1
1357 17:46:51.829333 PCI: 00:00.0: enabled 1
1358 17:46:51.831953 PCI: 00:02.0: enabled 1
1359 17:46:51.833875 PCI: 00:04.0: enabled 1
1360 17:46:51.836788 PCI: 00:05.0: enabled 0
1361 17:46:51.839305 PCI: 00:12.0: enabled 1
1362 17:46:51.841273 PCI: 00:12.5: enabled 0
1363 17:46:51.844038 PCI: 00:12.6: enabled 0
1364 17:46:51.846926 PCI: 00:14.0: enabled 1
1365 17:46:51.848380 PCI: 00:14.1: enabled 0
1366 17:46:51.850896 PCI: 00:14.3: enabled 1
1367 17:46:51.853573 PCI: 00:14.5: enabled 1
1368 17:46:51.856318 PCI: 00:15.0: enabled 0
1369 17:46:51.858421 PCI: 00:15.1: enabled 0
1370 17:46:51.860654 PCI: 00:15.2: enabled 1
1371 17:46:51.862886 PCI: 00:15.3: enabled 1
1372 17:46:51.865186 PCI: 00:16.0: enabled 1
1373 17:46:51.868372 PCI: 00:16.1: enabled 0
1374 17:46:51.870426 PCI: 00:16.2: enabled 0
1375 17:46:51.873190 PCI: 00:16.3: enabled 0
1376 17:46:51.875467 PCI: 00:16.4: enabled 0
1377 17:46:51.878566 PCI: 00:16.5: enabled 0
1378 17:46:51.880197 PCI: 00:17.0: enabled 0
1379 17:46:51.883533 PCI: 00:19.0: enabled 1
1380 17:46:51.885164 PCI: 00:19.1: enabled 0
1381 17:46:51.887381 PCI: 00:19.2: enabled 0
1382 17:46:51.890290 PCI: 00:1a.0: enabled 1
1383 17:46:51.892573 PCI: 00:1c.0: enabled 0
1384 17:46:51.894861 PCI: 00:1c.1: enabled 0
1385 17:46:51.897226 PCI: 00:1c.2: enabled 0
1386 17:46:51.899503 PCI: 00:1c.3: enabled 0
1387 17:46:51.902289 PCI: 00:1c.4: enabled 0
1388 17:46:51.904817 PCI: 00:1c.5: enabled 0
1389 17:46:51.906796 PCI: 00:1c.0: enabled 1
1390 17:46:51.909629 PCI: 00:1c.7: enabled 0
1391 17:46:51.912273 PCI: 00:1d.0: enabled 1
1392 17:46:51.914659 PCI: 00:1d.1: enabled 0
1393 17:46:51.917145 PCI: 00:1d.2: enabled 1
1394 17:46:51.919581 PCI: 00:1d.3: enabled 0
1395 17:46:51.922066 PCI: 00:1d.4: enabled 0
1396 17:46:51.924272 PCI: 00:1d.5: enabled 1
1397 17:46:51.926249 PCI: 00:1e.0: enabled 1
1398 17:46:51.929254 PCI: 00:1e.1: enabled 0
1399 17:46:51.931987 PCI: 00:1e.2: enabled 1
1400 17:46:51.933791 PCI: 00:1e.3: enabled 0
1401 17:46:51.936637 PCI: 00:1f.0: enabled 1
1402 17:46:51.938628 PCI: 00:1f.1: enabled 0
1403 17:46:51.940980 PCI: 00:1f.2: enabled 0
1404 17:46:51.943615 PCI: 00:1f.3: enabled 1
1405 17:46:51.946522 PCI: 00:1f.4: enabled 1
1406 17:46:51.948365 PCI: 00:1f.5: enabled 1
1407 17:46:51.951036 PCI: 00:1f.6: enabled 0
1408 17:46:51.954105 GENERIC: 0.0: enabled 1
1409 17:46:51.955688 USB0 port 0: enabled 1
1410 17:46:51.958061 I2C: 02:4a: enabled 1
1411 17:46:51.959978 I2C: 03:4a: enabled 1
1412 17:46:51.962407 I2C: 04:1a: enabled 1
1413 17:46:51.965376 PCI: 01:00.0: enabled 1
1414 17:46:51.967200 PCI: 00:00.0: enabled 1
1415 17:46:51.969423 SPI: 00: enabled 1
1416 17:46:51.971857 PNP: 0c09.0: enabled 1
1417 17:46:51.973784 USB2 port 0: enabled 1
1418 17:46:51.976805 USB2 port 1: enabled 1
1419 17:46:51.978731 USB2 port 2: enabled 1
1420 17:46:51.980966 USB2 port 3: enabled 1
1421 17:46:51.983501 USB2 port 5: enabled 1
1422 17:46:51.986399 USB2 port 6: enabled 0
1423 17:46:51.988264 USB2 port 9: enabled 1
1424 17:46:51.990318 USB3 port 0: enabled 1
1425 17:46:51.992681 USB3 port 1: enabled 1
1426 17:46:51.994705 USB3 port 2: enabled 1
1427 17:46:51.997776 USB3 port 3: enabled 1
1428 17:46:51.999922 USB3 port 4: enabled 1
1429 17:46:52.001799 USB2 port 4: enabled 1
1430 17:46:52.004343 USB3 port 5: enabled 1
1431 17:46:52.006436 APIC: 02: enabled 1
1432 17:46:52.009044 PCI: 00:08.0: enabled 1
1433 17:46:52.011419 PCI: 00:14.2: enabled 1
1434 17:46:52.016384 BS: BS_DEV_INIT run times (exec / console): 27 / 459 ms
1435 17:46:52.019430 Disabling ACPI via APMC.
1436 17:46:52.025335 APMC done.
1437 17:46:52.030509 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1438 17:46:52.034263 ELOG: NV offset 0xaf0000 size 0x4000
1439 17:46:52.042063 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1440 17:46:52.048392 ELOG: Event(17) added with size 13 at 2023-10-09 17:46:51 UTC
1441 17:46:52.055003 ELOG: Event(92) added with size 9 at 2023-10-09 17:46:51 UTC
1442 17:46:52.061024 ELOG: Event(93) added with size 9 at 2023-10-09 17:46:51 UTC
1443 17:46:52.067385 ELOG: Event(9E) added with size 10 at 2023-10-09 17:46:51 UTC
1444 17:46:52.073908 ELOG: Event(9F) added with size 14 at 2023-10-09 17:46:51 UTC
1445 17:46:52.079121 BS: BS_DEV_INIT exit times (exec / console): 8 / 49 ms
1446 17:46:52.085895 ELOG: Event(A1) added with size 10 at 2023-10-09 17:46:51 UTC
1447 17:46:52.093601 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1448 17:46:52.100002 ELOG: Event(A0) added with size 9 at 2023-10-09 17:46:51 UTC
1449 17:46:52.103752 elog_add_boot_reason: Logged dev mode boot
1450 17:46:52.109617 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1451 17:46:52.112432 Finalize devices...
1452 17:46:52.113939 Devices finalized
1453 17:46:52.119176 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1454 17:46:52.124153 FMAP: area RW_NVRAM found @ afa000 (20480 bytes)
1455 17:46:52.130350 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1456 17:46:52.134361 ME: HFSTS1 : 0x80030045
1457 17:46:52.138827 ME: HFSTS2 : 0x30280136
1458 17:46:52.142483 ME: HFSTS3 : 0x00000050
1459 17:46:52.146917 ME: HFSTS4 : 0x00004800
1460 17:46:52.150716 ME: HFSTS5 : 0x00000000
1461 17:46:52.154383 ME: HFSTS6 : 0x40400006
1462 17:46:52.158295 ME: Manufacturing Mode : NO
1463 17:46:52.161479 ME: FW Partition Table : OK
1464 17:46:52.164753 ME: Bringup Loader Failure : NO
1465 17:46:52.167924 ME: Firmware Init Complete : NO
1466 17:46:52.170971 ME: Boot Options Present : NO
1467 17:46:52.174895 ME: Update In Progress : NO
1468 17:46:52.177811 ME: D0i3 Support : YES
1469 17:46:52.181350 ME: Low Power State Enabled : NO
1470 17:46:52.184407 ME: CPU Replaced : YES
1471 17:46:52.188355 ME: CPU Replacement Valid : YES
1472 17:46:52.191263 ME: Current Working State : 5
1473 17:46:52.194647 ME: Current Operation State : 1
1474 17:46:52.197993 ME: Current Operation Mode : 3
1475 17:46:52.201491 ME: Error Code : 0
1476 17:46:52.204346 ME: CPU Debug Disabled : YES
1477 17:46:52.207779 ME: TXT Support : NO
1478 17:46:52.213605 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1479 17:46:52.218906 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1480 17:46:52.222318 CBFS: Locating 'fallback/dsdt.aml'
1481 17:46:52.225915 CBFS: Found @ offset 636c0 size 32e0
1482 17:46:52.231781 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1483 17:46:52.234280 CBFS: Locating 'fallback/slic'
1484 17:46:52.239720 CBFS: 'fallback/slic' not found.
1485 17:46:52.243888 ACPI: Writing ACPI tables at 99b31000.
1486 17:46:52.245429 ACPI: * FACS
1487 17:46:52.246811 ACPI: * DSDT
1488 17:46:52.250433 Ramoops buffer: 0x100000@0x99a30000.
1489 17:46:52.255294 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1490 17:46:52.259535 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1491 17:46:52.264624 Google Chrome EC: version:
1492 17:46:52.267202 ro: puff_v2.0.4638-67e4d7990
1493 17:46:52.269771 rw: puff_v2.0.4638-67e4d7990
1494 17:46:52.272294 running image: 1
1495 17:46:52.278320 PCI space above 4GB MMIO is at 0x15e800000, len = 0x7ea1800000
1496 17:46:52.281561 ACPI: * FADT
1497 17:46:52.282994 SCI is IRQ9
1498 17:46:52.286839 ACPI: added table 1/32, length now 40
1499 17:46:52.288394 ACPI: * SSDT
1500 17:46:52.292324 Found 1 CPU(s) with 2 core(s) each.
1501 17:46:52.296146 \_SB.PCI0.WFA3.WFA3: Intel WiFi PCI: 00:14.3
1502 17:46:52.300300 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1503 17:46:52.304546 \_SB.PCI0.I2C2.PS17: Parade PS175 at I2C: 02:4a
1504 17:46:52.310237 \_SB.PCI0.I2C3.RTD2: Realtek RTD2142 at I2C: 03:4a
1505 17:46:52.314804 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 04:1a
1506 17:46:52.320034 \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 01:00.0
1507 17:46:52.324455 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1508 17:46:52.329149 EC returned error result code 3
1509 17:46:52.332704 EC returned error result code 1
1510 17:46:52.337447 PS2K: Bad resp from EC. Vivaldi disabled!
1511 17:46:52.343452 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-A Front Left at USB2 port 0
1512 17:46:52.349587 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-C Port Rear at USB2 port 1
1513 17:46:52.356389 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-A Front Right at USB2 port 2
1514 17:46:52.362500 \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Rear Right at USB2 port 3
1515 17:46:52.368435 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Rear Left at USB2 port 5
1516 17:46:52.373901 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1517 17:46:52.379949 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Front Left at USB3 port 0
1518 17:46:52.386441 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Front Right at USB3 port 1
1519 17:46:52.392988 \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Rear Right at USB3 port 2
1520 17:46:52.398492 \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-C Rear at USB3 port 3
1521 17:46:52.404653 \_SB.PCI0.XHCI.RHUB.SS05: USB3 Type-A Rear Left at USB3 port 4
1522 17:46:52.411109 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-A Rear Middle at USB2 port 4
1523 17:46:52.417519 \_SB.PCI0.XHCI.RHUB.SS06: USB3 Type-A Rear Middle at USB3 port 5
1524 17:46:52.421703 ACPI: added table 2/32, length now 44
1525 17:46:52.423101 ACPI: * MCFG
1526 17:46:52.426647 ACPI: added table 3/32, length now 48
1527 17:46:52.429091 ACPI: * TPM2
1528 17:46:52.431262 TPM2 log created at 0x99a20000
1529 17:46:52.435604 ACPI: added table 4/32, length now 52
1530 17:46:52.437131 ACPI: * MADT
1531 17:46:52.437961 SCI is IRQ9
1532 17:46:52.441803 ACPI: added table 5/32, length now 56
1533 17:46:52.444245 current = 99b36070
1534 17:46:52.445767 ACPI: * DMAR
1535 17:46:52.449606 ACPI: added table 6/32, length now 60
1536 17:46:52.453600 ACPI: added table 7/32, length now 64
1537 17:46:52.455249 ACPI: * HPET
1538 17:46:52.459036 ACPI: added table 8/32, length now 68
1539 17:46:52.459877 ACPI: done.
1540 17:46:52.463185 ACPI tables: 20912 bytes.
1541 17:46:52.465821 smbios_write_tables: 99a1f000
1542 17:46:52.469303 EC returned error result code 3
1543 17:46:52.472960 Couldn't obtain OEM name from CBI
1544 17:46:52.475862 Create SMBIOS type 17
1545 17:46:52.478825 PCI: 00:00.0 (Intel Cannonlake)
1546 17:46:52.481674 PCI: 00:14.3 (Intel WiFi)
1547 17:46:52.484446 SMBIOS tables: 841 bytes.
1548 17:46:52.488610 Writing table forward entry at 0x00000500
1549 17:46:52.494667 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1629
1550 17:46:52.498697 Writing coreboot table at 0x99b55000
1551 17:46:52.504175 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1552 17:46:52.508766 1. 0000000000001000-000000000009ffff: RAM
1553 17:46:52.513577 2. 00000000000a0000-00000000000fffff: RESERVED
1554 17:46:52.518152 3. 0000000000100000-0000000099a1efff: RAM
1555 17:46:52.523630 4. 0000000099a1f000-0000000099ba4fff: CONFIGURATION TABLES
1556 17:46:52.528647 5. 0000000099ba5000-0000000099c0afff: RAMSTAGE
1557 17:46:52.534922 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1558 17:46:52.539792 7. 000000009a000000-000000009f7fffff: RESERVED
1559 17:46:52.544497 8. 00000000e0000000-00000000efffffff: RESERVED
1560 17:46:52.548451 9. 00000000fc000000-00000000fc000fff: RESERVED
1561 17:46:52.553942 10. 00000000fe000000-00000000fe00ffff: RESERVED
1562 17:46:52.558092 11. 00000000fed10000-00000000fed17fff: RESERVED
1563 17:46:52.563618 12. 00000000fed80000-00000000fed83fff: RESERVED
1564 17:46:52.568343 13. 00000000fed90000-00000000fed91fff: RESERVED
1565 17:46:52.572523 14. 00000000feda0000-00000000feda1fff: RESERVED
1566 17:46:52.576743 15. 0000000100000000-000000015e7fffff: RAM
1567 17:46:52.580267 Graphics hand-off block not found
1568 17:46:52.584522 FSP did not return a valid framebuffer
1569 17:46:52.586832 Passing 4 GPIOs to payload:
1570 17:46:52.591948 NAME | PORT | POLARITY | VALUE
1571 17:46:52.597408 lid | undefined | high | high
1572 17:46:52.602676 power | undefined | high | low
1573 17:46:52.607928 oprom | undefined | high | low
1574 17:46:52.613135 EC in RW | 0x000000cb | high | low
1575 17:46:52.614410 Board ID: 4
1576 17:46:52.619533 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1577 17:46:52.626041 Wrote coreboot table at: 0x99b55000, 0x578 bytes, checksum 1a2e
1578 17:46:52.629119 coreboot table: 1424 bytes.
1579 17:46:52.632868 IMD ROOT 0. 0x99fff000 0x00001000
1580 17:46:52.636377 IMD SMALL 1. 0x99ffe000 0x00001000
1581 17:46:52.640528 FSP MEMORY 2. 0x99c4e000 0x003b0000
1582 17:46:52.643554 CONSOLE 3. 0x99c2e000 0x00020000
1583 17:46:52.647414 FMAP 4. 0x99c2d000 0x00000578
1584 17:46:52.651331 TIME STAMP 5. 0x99c2c000 0x00000910
1585 17:46:52.654932 VBOOT WORK 6. 0x99c18000 0x00014000
1586 17:46:52.658125 MRC DATA 7. 0x99c16000 0x00001958
1587 17:46:52.662495 ROMSTG STCK 8. 0x99c15000 0x00001000
1588 17:46:52.666304 AFTER CAR 9. 0x99c0b000 0x0000a000
1589 17:46:52.669472 RAMSTAGE 10. 0x99ba4000 0x00067000
1590 17:46:52.673427 REFCODE 11. 0x99b6f000 0x00035000
1591 17:46:52.676723 SMM BACKUP 12. 0x99b5f000 0x00010000
1592 17:46:52.680678 4f444749 13. 0x99b5d000 0x00002000
1593 17:46:52.684690 COREBOOT 14. 0x99b55000 0x00008000
1594 17:46:52.688102 ACPI 15. 0x99b31000 0x00024000
1595 17:46:52.691634 ACPI GNVS 16. 0x99b30000 0x00001000
1596 17:46:52.695662 RAMOOPS 17. 0x99a30000 0x00100000
1597 17:46:52.698987 TPM2 TCGLOG18. 0x99a20000 0x00010000
1598 17:46:52.702739 SMBIOS 19. 0x99a1f000 0x00000800
1599 17:46:52.704828 IMD small region:
1600 17:46:52.708500 IMD ROOT 0. 0x99ffec00 0x00000400
1601 17:46:52.712992 FSP RUNTIME 1. 0x99ffebe0 0x00000004
1602 17:46:52.716716 VPD 2. 0x99ffeb80 0x00000058
1603 17:46:52.720607 POWER STATE 3. 0x99ffeb40 0x00000040
1604 17:46:52.724527 ROMSTAGE 4. 0x99ffeb20 0x00000004
1605 17:46:52.728187 MEM INFO 5. 0x99ffe960 0x000001b9
1606 17:46:52.733922 BS: BS_WRITE_TABLES run times (exec / console): 9 / 504 ms
1607 17:46:52.737125 MTRR: Physical address space:
1608 17:46:52.743213 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1609 17:46:52.749643 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1610 17:46:52.755796 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1611 17:46:52.761904 0x000000009b000000 - 0x00000000a0000000 size 0x05000000 type 0
1612 17:46:52.768288 0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1
1613 17:46:52.774460 0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0
1614 17:46:52.780641 0x0000000100000000 - 0x000000015e800000 size 0x5e800000 type 6
1615 17:46:52.784289 MTRR: Fixed MSR 0x250 0x0606060606060606
1616 17:46:52.789171 MTRR: Fixed MSR 0x258 0x0606060606060606
1617 17:46:52.792920 MTRR: Fixed MSR 0x259 0x0000000000000000
1618 17:46:52.796917 MTRR: Fixed MSR 0x268 0x0606060606060606
1619 17:46:52.801023 MTRR: Fixed MSR 0x269 0x0606060606060606
1620 17:46:52.804815 MTRR: Fixed MSR 0x26a 0x0606060606060606
1621 17:46:52.809319 MTRR: Fixed MSR 0x26b 0x0606060606060606
1622 17:46:52.813067 MTRR: Fixed MSR 0x26c 0x0606060606060606
1623 17:46:52.817359 MTRR: Fixed MSR 0x26d 0x0606060606060606
1624 17:46:52.821775 MTRR: Fixed MSR 0x26e 0x0606060606060606
1625 17:46:52.825770 MTRR: Fixed MSR 0x26f 0x0606060606060606
1626 17:46:52.828408 call enable_fixed_mtrr()
1627 17:46:52.832345 CPU physical address size: 39 bits
1628 17:46:52.836649 MTRR: default type WB/UC MTRR counts: 5/6.
1629 17:46:52.840244 MTRR: WB selected as default type.
1630 17:46:52.845972 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1631 17:46:52.852389 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1632 17:46:52.858479 MTRR: 2 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1
1633 17:46:52.864583 MTRR: 3 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0
1634 17:46:52.871395 MTRR: 4 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1635 17:46:52.875223 MTRR: Fixed MSR 0x250 0x0606060606060606
1636 17:46:52.879305 MTRR: Fixed MSR 0x258 0x0606060606060606
1637 17:46:52.883669 MTRR: Fixed MSR 0x259 0x0000000000000000
1638 17:46:52.888263 MTRR: Fixed MSR 0x268 0x0606060606060606
1639 17:46:52.892235 MTRR: Fixed MSR 0x269 0x0606060606060606
1640 17:46:52.896333 MTRR: Fixed MSR 0x26a 0x0606060606060606
1641 17:46:52.899690 MTRR: Fixed MSR 0x26b 0x0606060606060606
1642 17:46:52.903858 MTRR: Fixed MSR 0x26c 0x0606060606060606
1643 17:46:52.907953 MTRR: Fixed MSR 0x26d 0x0606060606060606
1644 17:46:52.912086 MTRR: Fixed MSR 0x26e 0x0606060606060606
1645 17:46:52.916065 MTRR: Fixed MSR 0x26f 0x0606060606060606
1646 17:46:52.917212
1647 17:46:52.918374 MTRR check
1648 17:46:52.920672 Fixed MTRRs : Enabled
1649 17:46:52.923103 Variable MTRRs: Enabled
1650 17:46:52.923882
1651 17:46:52.925465 call enable_fixed_mtrr()
1652 17:46:52.931495 BS: BS_WRITE_TABLES exit times (exec / console): 46 / 142 ms
1653 17:46:52.935391 CPU physical address size: 39 bits
1654 17:46:52.937146 Probing TPM: done!
1655 17:46:52.942543 Connected to device vid:did:rid of 1ae0:0028:00
1656 17:46:52.952564 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
1657 17:46:52.956577 Initialized TPM device CR50 revision 0
1658 17:46:52.959770 Checking cr50 for pending updates
1659 17:46:52.965491 Reading cr50 TPM mode
1660 17:46:52.975642 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 25 ms
1661 17:46:52.981106 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1662 17:46:52.984089 CBFS: Locating 'fallback/payload'
1663 17:46:52.988933 CBFS: Found @ offset 3a0c00 size 48db0
1664 17:46:52.993339 Checking segment from ROM address 0xfffa8c38
1665 17:46:52.997862 Checking segment from ROM address 0xfffa8c54
1666 17:46:53.001844 Loading segment from ROM address 0xfffa8c38
1667 17:46:53.004587 code (compression=0)
1668 17:46:53.012448 New segment dstaddr 0x30000000 memsize 0x2660100 srcaddr 0xfffa8c70 filesize 0x48d78
1669 17:46:53.021801 Loading Segment: addr: 0x30000000 memsz: 0x0000000002660100 filesz: 0x0000000000048d78
1670 17:46:53.023749 it's not compressed!
1671 17:46:53.126766 [ 0x30000000, 30048d78, 0x32660100) <- fffa8c70
1672 17:46:53.133723 Clearing Segment: addr: 0x0000000030048d78 memsz: 0x0000000002617388
1673 17:46:53.141617 Loading segment from ROM address 0xfffa8c54
1674 17:46:53.143499 Entry Point 0x30000000
1675 17:46:53.145275 Loaded segments
1676 17:46:53.151424 BS: BS_PAYLOAD_LOAD run times (exec / console): 103 / 67 ms
1677 17:46:53.155486 Finalizing chipset.
1678 17:46:53.156416 Finalizing SMM.
1679 17:46:53.158464 APMC done.
1680 17:46:53.163880 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 5 ms
1681 17:46:53.167261 mp_park_aps done after 0 msecs.
1682 17:46:53.171813 Jumping to boot code at 0x30000000(0x99b55000)
1683 17:46:53.181021 CPU0: stack: 0x99bf8000 - 0x99bf9000, lowest used address 0x99bf8a88, stack used: 1400 bytes
1684 17:46:53.181494
1685 17:46:53.182031
1686 17:46:53.182836
1687 17:46:53.187545 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
1688 17:46:53.188125 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
1689 17:46:53.188565 Setting prompt string to ['puff:']
1690 17:46:53.189000 bootloader-commands: Wait for prompt ['puff:'] (timeout 00:04:43)
1691 17:46:53.189696 Starting depthcharge on Kaisa...
1692 17:46:53.190085
1693 17:46:53.192065 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1694 17:46:53.192530
1695 17:46:53.199883 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1696 17:46:53.200388
1697 17:46:53.201599 BIOS MMAP details:
1698 17:46:53.202108
1699 17:46:53.204537 IFD Base Offset : 0x300000
1700 17:46:53.204962
1701 17:46:53.207412 IFD End Offset : 0x1000000
1702 17:46:53.208122
1703 17:46:53.209895 MMAP Size : 0xd00000
1704 17:46:53.210328
1705 17:46:53.212927 MMAP Start : 0xff300000
1706 17:46:53.213896
1707 17:46:53.217899 Looking for NVMe Controller 0x3105c848 @ 00:1d:00
1708 17:46:53.218895
1709 17:46:53.220640 Wipe memory regions:
1710 17:46:53.221068
1711 17:46:53.223963 [0x00000000001000, 0x000000000a0000)
1712 17:46:53.224387
1713 17:46:53.227647 [0x00000000100000, 0x00000030000000)
1714 17:46:53.276831
1715 17:46:53.280722 [0x00000032660100, 0x00000099a1f000)
1716 17:46:53.383745
1717 17:46:53.387329 [0x00000100000000, 0x0000015e800000)
1718 17:46:53.788898
1719 17:46:53.790375 R8152: Initializing
1720 17:46:53.790837
1721 17:46:53.793441 Version 9 (ocp_data = 6010)
1722 17:46:53.793970
1723 17:46:53.796480 R8152: Done initializing
1724 17:46:53.797229
1725 17:46:53.797877 Adding net device
1726 17:46:54.099073
1727 17:46:54.103937 [firmware-puff-13324.B-collabora] Feb 14 2023 12:06:39
1728 17:46:54.104528
1729 17:46:54.104991
1730 17:46:54.105382
1731 17:46:54.106145 Setting prompt string to ['puff:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1733 17:46:54.207379 puff: tftpboot 192.168.201.1 11712668/tftp-deploy-h31gc96b/kernel/bzImage 11712668/tftp-deploy-h31gc96b/kernel/cmdline 11712668/tftp-deploy-h31gc96b/ramdisk/ramdisk.cpio.gz
1734 17:46:54.208010 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1735 17:46:54.208408 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
1736 17:46:54.251156 tftpboot 192.168.201.1 11712668/tftp-deploy-h31gc96b/kernel/bzImage 11712668/tftp-deploy-h31gc96b/kernel/cmdline 11712668/tftp-deploy-h31gc96b/ramdisk/ramdisk.cpio.gz
1737 17:46:54.251705
1738 17:46:54.252058 Waiting for link
1739 17:46:54.412376
1740 17:46:54.413247 done.
1741 17:46:54.413615
1742 17:46:54.415438 MAC: 00:e0:4c:68:02:15
1743 17:46:54.415863
1744 17:46:54.418359 Sending DHCP discover... done.
1745 17:46:54.418833
1746 17:46:54.420973 Waiting for reply... done.
1747 17:46:54.421403
1748 17:46:54.423832 Sending DHCP request... done.
1749 17:46:54.424261
1750 17:46:54.429736 Waiting for reply... done.
1751 17:46:54.430575
1752 17:46:54.431667 My ip is 192.168.201.14
1753 17:46:54.432131
1754 17:46:54.435541 The DHCP server ip is 192.168.201.1
1755 17:46:54.435990
1756 17:46:54.440025 TFTP server IP predefined by user: 192.168.201.1
1757 17:46:54.440488
1758 17:46:54.447019 Bootfile predefined by user: 11712668/tftp-deploy-h31gc96b/kernel/bzImage
1759 17:46:54.447949
1760 17:46:54.450813 Sending tftp read request... done.
1761 17:46:54.451259
1762 17:46:54.457542 Waiting for the transfer...
1763 17:46:54.457994
1764 17:46:54.719916 00000000 ################################################################
1765 17:46:54.720559
1766 17:46:54.986829 00080000 ################################################################
1767 17:46:54.987166
1768 17:46:55.250205 00100000 ################################################################
1769 17:46:55.250556
1770 17:46:55.493798 00180000 ################################################################
1771 17:46:55.493936
1772 17:46:55.758933 00200000 ################################################################
1773 17:46:55.759330
1774 17:46:56.022269 00280000 ################################################################
1775 17:46:56.022413
1776 17:46:56.289193 00300000 ################################################################
1777 17:46:56.289652
1778 17:46:56.548734 00380000 ################################################################
1779 17:46:56.549186
1780 17:46:56.789962 00400000 ################################################################
1781 17:46:56.790303
1782 17:46:57.043182 00480000 ################################################################
1783 17:46:57.043634
1784 17:46:57.294588 00500000 ################################################################
1785 17:46:57.294732
1786 17:46:57.584409 00580000 ################################################################
1787 17:46:57.584554
1788 17:46:57.832600 00600000 ################################################################
1789 17:46:57.832743
1790 17:46:58.092674 00680000 ################################################################
1791 17:46:58.093149
1792 17:46:58.345417 00700000 ################################################################
1793 17:46:58.345564
1794 17:46:58.603945 00780000 ################################################################
1795 17:46:58.604341
1796 17:46:58.654411 00800000 ############# done.
1797 17:46:58.654729
1798 17:46:58.658013 The bootfile was 8490896 bytes long.
1799 17:46:58.658480
1800 17:46:58.661945 Sending tftp read request... done.
1801 17:46:58.662030
1802 17:46:58.664756 Waiting for the transfer...
1803 17:46:58.664864
1804 17:46:58.932212 00000000 ################################################################
1805 17:46:58.932353
1806 17:46:59.194227 00080000 ################################################################
1807 17:46:59.194617
1808 17:46:59.443944 00100000 ################################################################
1809 17:46:59.444303
1810 17:46:59.707453 00180000 ################################################################
1811 17:46:59.707969
1812 17:46:59.959316 00200000 ################################################################
1813 17:46:59.959456
1814 17:47:00.202699 00280000 ################################################################
1815 17:47:00.202865
1816 17:47:00.448499 00300000 ################################################################
1817 17:47:00.448869
1818 17:47:00.698930 00380000 ################################################################
1819 17:47:00.699300
1820 17:47:00.950421 00400000 ################################################################
1821 17:47:00.950572
1822 17:47:01.207782 00480000 ################################################################
1823 17:47:01.208190
1824 17:47:01.458304 00500000 ################################################################
1825 17:47:01.459120
1826 17:47:01.718270 00580000 ################################################################
1827 17:47:01.718410
1828 17:47:01.966123 00600000 ################################################################
1829 17:47:01.966255
1830 17:47:02.221147 00680000 ################################################################
1831 17:47:02.221717
1832 17:47:02.471596 00700000 ################################################################
1833 17:47:02.471982
1834 17:47:02.721434 00780000 ################################################################
1835 17:47:02.721820
1836 17:47:02.926149 00800000 ####################################################### done.
1837 17:47:02.926321
1838 17:47:02.929738 Sending tftp read request... done.
1839 17:47:02.930284
1840 17:47:02.932652 Waiting for the transfer...
1841 17:47:02.933184
1842 17:47:02.934507 00000000 # done.
1843 17:47:02.934631
1844 17:47:02.943209 Command line loaded dynamically from TFTP file: 11712668/tftp-deploy-h31gc96b/kernel/cmdline
1845 17:47:02.943532
1846 17:47:02.958489 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1847 17:47:02.958893
1848 17:47:02.963827 ec_init: CrosEC protocol v3 supported (256, 256)
1849 17:47:02.967535
1850 17:47:02.971306 Shutting down all USB controllers.
1851 17:47:02.971418
1852 17:47:02.974054 Removing current net device
1853 17:47:02.974638
1854 17:47:02.976090 Finalizing coreboot
1855 17:47:02.976491
1856 17:47:02.981394 Exiting depthcharge with code 4 at timestamp: 19268160
1857 17:47:02.981804
1858 17:47:02.981925
1859 17:47:02.983546 Starting kernel ...
1860 17:47:02.983648
1861 17:47:02.983781
1862 17:47:02.984182 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
1863 17:47:02.984310 start: 2.2.5 auto-login-action (timeout 00:04:34) [common]
1864 17:47:02.984388 Setting prompt string to ['Linux version [0-9]']
1865 17:47:02.984458 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1866 17:47:02.984529 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1868 17:51:36.985238 end: 2.2.5 auto-login-action (duration 00:04:34) [common]
1870 17:51:36.986250 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 274 seconds'
1872 17:51:36.987081 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1875 17:51:36.988361 end: 2 depthcharge-action (duration 00:05:00) [common]
1877 17:51:36.989432 Cleaning after the job
1878 17:51:36.989909 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712668/tftp-deploy-h31gc96b/ramdisk
1879 17:51:36.995853 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712668/tftp-deploy-h31gc96b/kernel
1880 17:51:37.001879 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712668/tftp-deploy-h31gc96b/modules
1881 17:51:37.004181 start: 5.1 power-off (timeout 00:00:30) [common]
1882 17:51:37.004991 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-5' '--port=1' '--command=off'
1883 17:51:37.968113 >> Command sent successfully.
1884 17:51:37.978874 Returned 0 in 0 seconds
1885 17:51:38.080251 end: 5.1 power-off (duration 00:00:01) [common]
1887 17:51:38.081982 start: 5.2 read-feedback (timeout 00:09:59) [common]
1888 17:51:38.083263 Listened to connection for namespace 'common' for up to 1s
1890 17:51:39.082884 Finalising connection for namespace 'common'
1891 17:51:39.083529 Disconnecting from shell: Finalise
1892 17:51:39.083909
1893 17:51:39.184933 end: 5.2 read-feedback (duration 00:00:01) [common]
1894 17:51:39.185540 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712668
1895 17:51:39.237816 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712668
1896 17:51:39.238053 JobError: Your job cannot terminate cleanly.