Boot log: asus-CM1400CXA-dalboz
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:52:48.780884 lava-dispatcher, installed at version: 2023.08
2 17:52:48.781098 start: 0 validate
3 17:52:48.781230 Start time: 2023-10-09 17:52:48.781222+00:00 (UTC)
4 17:52:48.781352 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:52:48.781479 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:52:49.051371 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:52:49.052055 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:52:49.321968 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:52:49.322154 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:52:49.581094 validate duration: 0.80
12 17:52:49.581396 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:52:49.581506 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:52:49.581616 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:52:49.581752 Not decompressing ramdisk as can be used compressed.
16 17:52:49.581883 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:52:49.581948 saving as /var/lib/lava/dispatcher/tmp/11712686/tftp-deploy-9j92yy2v/ramdisk/rootfs.cpio.gz
18 17:52:49.582012 total size: 8418130 (8 MB)
19 17:52:49.583179 progress 0 % (0 MB)
20 17:52:49.585944 progress 5 % (0 MB)
21 17:52:49.588224 progress 10 % (0 MB)
22 17:52:49.590583 progress 15 % (1 MB)
23 17:52:49.592869 progress 20 % (1 MB)
24 17:52:49.595183 progress 25 % (2 MB)
25 17:52:49.597469 progress 30 % (2 MB)
26 17:52:49.599624 progress 35 % (2 MB)
27 17:52:49.601944 progress 40 % (3 MB)
28 17:52:49.604225 progress 45 % (3 MB)
29 17:52:49.606507 progress 50 % (4 MB)
30 17:52:49.608741 progress 55 % (4 MB)
31 17:52:49.611084 progress 60 % (4 MB)
32 17:52:49.613153 progress 65 % (5 MB)
33 17:52:49.615433 progress 70 % (5 MB)
34 17:52:49.617694 progress 75 % (6 MB)
35 17:52:49.620063 progress 80 % (6 MB)
36 17:52:49.622376 progress 85 % (6 MB)
37 17:52:49.624671 progress 90 % (7 MB)
38 17:52:49.627019 progress 95 % (7 MB)
39 17:52:49.629192 progress 100 % (8 MB)
40 17:52:49.629438 8 MB downloaded in 0.05 s (169.28 MB/s)
41 17:52:49.629597 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:52:49.629895 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:52:49.629983 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:52:49.630071 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:52:49.630215 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:52:49.630292 saving as /var/lib/lava/dispatcher/tmp/11712686/tftp-deploy-9j92yy2v/kernel/bzImage
48 17:52:49.630358 total size: 8490896 (8 MB)
49 17:52:49.630430 No compression specified
50 17:52:49.631695 progress 0 % (0 MB)
51 17:52:49.634176 progress 5 % (0 MB)
52 17:52:49.636491 progress 10 % (0 MB)
53 17:52:49.638793 progress 15 % (1 MB)
54 17:52:49.641112 progress 20 % (1 MB)
55 17:52:49.643431 progress 25 % (2 MB)
56 17:52:49.645694 progress 30 % (2 MB)
57 17:52:49.648010 progress 35 % (2 MB)
58 17:52:49.650328 progress 40 % (3 MB)
59 17:52:49.652602 progress 45 % (3 MB)
60 17:52:49.654870 progress 50 % (4 MB)
61 17:52:49.657112 progress 55 % (4 MB)
62 17:52:49.659397 progress 60 % (4 MB)
63 17:52:49.661614 progress 65 % (5 MB)
64 17:52:49.663888 progress 70 % (5 MB)
65 17:52:49.666187 progress 75 % (6 MB)
66 17:52:49.668417 progress 80 % (6 MB)
67 17:52:49.670681 progress 85 % (6 MB)
68 17:52:49.672901 progress 90 % (7 MB)
69 17:52:49.675165 progress 95 % (7 MB)
70 17:52:49.677448 progress 100 % (8 MB)
71 17:52:49.677566 8 MB downloaded in 0.05 s (171.54 MB/s)
72 17:52:49.677712 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:52:49.677987 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:52:49.678073 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:52:49.678157 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:52:49.678302 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:52:49.678376 saving as /var/lib/lava/dispatcher/tmp/11712686/tftp-deploy-9j92yy2v/modules/modules.tar
79 17:52:49.678438 total size: 250868 (0 MB)
80 17:52:49.678500 Using unxz to decompress xz
81 17:52:49.682767 progress 13 % (0 MB)
82 17:52:49.683188 progress 26 % (0 MB)
83 17:52:49.683433 progress 39 % (0 MB)
84 17:52:49.685017 progress 52 % (0 MB)
85 17:52:49.686929 progress 65 % (0 MB)
86 17:52:49.688787 progress 78 % (0 MB)
87 17:52:49.690674 progress 91 % (0 MB)
88 17:52:49.692399 progress 100 % (0 MB)
89 17:52:49.698066 0 MB downloaded in 0.02 s (12.19 MB/s)
90 17:52:49.698306 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:52:49.698572 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:52:49.698665 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:52:49.698762 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:52:49.698844 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:52:49.698933 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:52:49.699166 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_
98 17:52:49.699308 makedir: /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin
99 17:52:49.699417 makedir: /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/tests
100 17:52:49.699519 makedir: /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/results
101 17:52:49.699635 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-add-keys
102 17:52:49.699780 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-add-sources
103 17:52:49.699911 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-background-process-start
104 17:52:49.700049 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-background-process-stop
105 17:52:49.700177 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-common-functions
106 17:52:49.700303 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-echo-ipv4
107 17:52:49.700432 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-install-packages
108 17:52:49.700557 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-installed-packages
109 17:52:49.700681 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-os-build
110 17:52:49.700806 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-probe-channel
111 17:52:49.700929 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-probe-ip
112 17:52:49.701054 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-target-ip
113 17:52:49.701177 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-target-mac
114 17:52:49.701300 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-target-storage
115 17:52:49.701428 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-test-case
116 17:52:49.701552 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-test-event
117 17:52:49.701675 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-test-feedback
118 17:52:49.701844 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-test-raise
119 17:52:49.701976 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-test-reference
120 17:52:49.702107 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-test-runner
121 17:52:49.702233 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-test-set
122 17:52:49.702359 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-test-shell
123 17:52:49.702489 Updating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-install-packages (oe)
124 17:52:49.702645 Updating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/bin/lava-installed-packages (oe)
125 17:52:49.702774 Creating /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/environment
126 17:52:49.702879 LAVA metadata
127 17:52:49.702953 - LAVA_JOB_ID=11712686
128 17:52:49.703018 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:52:49.703124 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:52:49.703189 skipped lava-vland-overlay
131 17:52:49.703266 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:52:49.703346 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:52:49.703409 skipped lava-multinode-overlay
134 17:52:49.703481 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:52:49.703560 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:52:49.703632 Loading test definitions
137 17:52:49.703724 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:52:49.703800 Using /lava-11712686 at stage 0
139 17:52:49.704132 uuid=11712686_1.4.2.3.1 testdef=None
140 17:52:49.704221 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:52:49.704305 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:52:49.704842 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:52:49.705081 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:52:49.705756 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:52:49.706023 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:52:49.706648 runner path: /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/0/tests/0_dmesg test_uuid 11712686_1.4.2.3.1
149 17:52:49.706841 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:52:49.707068 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 17:52:49.707139 Using /lava-11712686 at stage 1
153 17:52:49.707447 uuid=11712686_1.4.2.3.5 testdef=None
154 17:52:49.707535 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:52:49.707632 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 17:52:49.708133 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:52:49.708359 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 17:52:49.709068 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:52:49.709326 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 17:52:49.710008 runner path: /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/1/tests/1_bootrr test_uuid 11712686_1.4.2.3.5
163 17:52:49.710160 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:52:49.710364 Creating lava-test-runner.conf files
166 17:52:49.710427 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/0 for stage 0
167 17:52:49.710514 - 0_dmesg
168 17:52:49.710592 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712686/lava-overlay-h3_e3lv_/lava-11712686/1 for stage 1
169 17:52:49.710711 - 1_bootrr
170 17:52:49.710821 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:52:49.710905 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 17:52:49.719482 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:52:49.719589 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 17:52:49.719676 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:52:49.719759 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:52:49.719844 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 17:52:49.974689 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:52:49.975069 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 17:52:49.975209 extracting modules file /var/lib/lava/dispatcher/tmp/11712686/tftp-deploy-9j92yy2v/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712686/extract-overlay-ramdisk-tfa3dhyo/ramdisk
180 17:52:49.989694 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:52:49.989886 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 17:52:49.990010 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712686/compress-overlay-jc0_2yy5/overlay-1.4.2.4.tar.gz to ramdisk
183 17:52:49.990112 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712686/compress-overlay-jc0_2yy5/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712686/extract-overlay-ramdisk-tfa3dhyo/ramdisk
184 17:52:50.000592 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:52:50.000716 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 17:52:50.000809 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:52:50.000897 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 17:52:50.001003 Building ramdisk /var/lib/lava/dispatcher/tmp/11712686/extract-overlay-ramdisk-tfa3dhyo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712686/extract-overlay-ramdisk-tfa3dhyo/ramdisk
189 17:52:50.133797 >> 49788 blocks
190 17:52:51.001459 rename /var/lib/lava/dispatcher/tmp/11712686/extract-overlay-ramdisk-tfa3dhyo/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712686/tftp-deploy-9j92yy2v/ramdisk/ramdisk.cpio.gz
191 17:52:51.001953 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:52:51.002085 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 17:52:51.002195 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 17:52:51.002295 No mkimage arch provided, not using FIT.
195 17:52:51.002388 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:52:51.002475 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:52:51.002589 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:52:51.002703 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 17:52:51.002849 No LXC device requested
200 17:52:51.002961 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:52:51.003084 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 17:52:51.003197 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:52:51.003300 Checking files for TFTP limit of 4294967296 bytes.
204 17:52:51.003815 end: 1 tftp-deploy (duration 00:00:01) [common]
205 17:52:51.003944 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:52:51.004065 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:52:51.004229 substitutions:
208 17:52:51.004324 - {DTB}: None
209 17:52:51.004415 - {INITRD}: 11712686/tftp-deploy-9j92yy2v/ramdisk/ramdisk.cpio.gz
210 17:52:51.004504 - {KERNEL}: 11712686/tftp-deploy-9j92yy2v/kernel/bzImage
211 17:52:51.004597 - {LAVA_MAC}: None
212 17:52:51.004683 - {PRESEED_CONFIG}: None
213 17:52:51.004768 - {PRESEED_LOCAL}: None
214 17:52:51.004853 - {RAMDISK}: 11712686/tftp-deploy-9j92yy2v/ramdisk/ramdisk.cpio.gz
215 17:52:51.004926 - {ROOT_PART}: None
216 17:52:51.004984 - {ROOT}: None
217 17:52:51.005039 - {SERVER_IP}: 192.168.201.1
218 17:52:51.005094 - {TEE}: None
219 17:52:51.005149 Parsed boot commands:
220 17:52:51.005213 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:52:51.005394 Parsed boot commands: tftpboot 192.168.201.1 11712686/tftp-deploy-9j92yy2v/kernel/bzImage 11712686/tftp-deploy-9j92yy2v/kernel/cmdline 11712686/tftp-deploy-9j92yy2v/ramdisk/ramdisk.cpio.gz
222 17:52:51.005480 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:52:51.005567 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:52:51.005688 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:52:51.005841 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:52:51.005940 Not connected, no need to disconnect.
227 17:52:51.006017 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:52:51.006098 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:52:51.006165 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-CM1400CXA-dalboz-cbg-8'
230 17:52:51.010499 Setting prompt string to ['lava-test: # ']
231 17:52:51.010875 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:52:51.010981 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:52:51.011098 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:52:51.011226 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:52:51.011458 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-CM1400CXA-dalboz-cbg-8' '--port=1' '--command=reboot'
236 17:52:56.144251 >> Command sent successfully.
237 17:52:56.146969 Returned 0 in 5 seconds
238 17:52:56.247479 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 17:52:56.247814 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 17:52:56.247913 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 17:52:56.248004 Setting prompt string to 'Starting depthcharge on Shuboz...'
243 17:52:56.248074 Changing prompt to 'Starting depthcharge on Shuboz...'
244 17:52:56.248142 depthcharge-start: Wait for prompt Starting depthcharge on Shuboz... (timeout 00:05:00)
245 17:52:56.248410 [Enter `^Ec?' for help]
246 17:52:58.130024
247 17:52:58.130186
248 17:52:58.136649 coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 bootblock starting (log level: 8)...
249 17:52:58.136738 Family_Model: 00820f01
250 17:52:58.139838 PSP boot mode: Production
251 17:52:58.143157 Silicon level: Production
252 17:52:58.146606 PMxC0 STATUS: 0x800 BIT11
253 17:52:58.146689 I2C bus 3 version 0x3132322a
254 17:52:58.149840 DW I2C bus 3 at 0xfedc5000 (400 KHz)
255 17:52:58.156740 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
256 17:52:58.159559 CBFS: Locating 'fallback/romstage'
257 17:52:58.162824 CBFS: Found @ offset 123000 size cc24
258 17:52:58.172825 BS: bootblock times (exec / console): total (unknown) / 34 ms
259 17:52:58.172908
260 17:52:58.172973
261 17:52:58.179549 coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 romstage starting (log level: 8)...
262 17:52:58.182817 POST: 0x41
263 17:52:58.182900 POST: 0x42
264 17:52:58.186233 Family_Model: 00820f01
265 17:52:58.192740 GPIO Control Switch: 0xef000000, Wake Stat 0: 0x00000000, Wake Stat 1: 0x00000000
266 17:52:58.192823 POST: 0x43
267 17:52:58.196177 Boot Count incremented to 8690
268 17:52:58.199414 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
269 17:52:58.202813 CBFS: Locating 'fspm.bin'
270 17:52:58.206002 CBFS: Found @ offset 152f00 size 18558
271 17:52:58.246036 Spec version: v2.0
272 17:52:58.249513 Revision: 0.0.0, Build Number 1
273 17:52:58.249620 Type: release/test
274 17:52:58.256194 image ID: AMD_PCS0, base 0x20c0000 + 0x4b000
275 17:52:58.259372 Config region 0x46f2c + 0x104
276 17:52:58.259459 Memory init offset 0x7b8
277 17:52:58.262611 POST: 0x34
278 17:52:58.262696 bootmode is set to: 0
279 17:52:58.265865 POST: 0x36
280 17:52:58.269209 Calling FspMemoryInit: 0x020c07b8
281 17:52:58.269291 0x02000dec: raminit_upd
282 17:52:58.272621 0x0204ccbc: &hob_list_ptr
283 17:52:58.272703 POST: 0x92
284 17:52:58.278933 POST: 0x98
285 17:52:58.279015 CBMEM:
286 17:52:58.282554 IMD: root @ 0xcb7ff000 254 entries.
287 17:52:58.285486 IMD: root @ 0xcb7fec00 62 entries.
288 17:52:58.289235 FMAP: area RO_VPD found @ 800000 (16384 bytes)
289 17:52:58.292481 WARNING: RO_VPD is uninitialized or empty.
290 17:52:58.298762 FMAP: area RW_VPD found @ 615000 (8192 bytes)
291 17:52:58.298845 External stage cache:
292 17:52:58.302365 IMD: root @ 0xcbfff000 254 entries.
293 17:52:58.305591 IMD: root @ 0xcbffec00 62 entries.
294 17:52:58.308928 FspMemoryInit returned 0x00000000
295 17:52:58.312215 FMAP: area RW_MRC_CACHE found @ 0 (65536 bytes)
296 17:52:58.319379 APOB valid copy is already in flash
297 17:52:58.322529 POST: 0x44
298 17:52:58.325918 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
299 17:52:58.329213 CBFS: Locating 'fallback/ramstage'
300 17:52:58.332591 CBFS: Found @ offset 132280 size 1c422
301 17:52:58.338880 Decompressing stage fallback/ramstage @ 0xca6b5fc0 (1119536 bytes)
302 17:52:58.394465 Loading module at 0xca6b6000 with entry 0xca6b6000. filesize: 0x40980 memsize: 0x1114f0
303 17:52:58.397744 Processing 4370 relocs. Offset value of 0xba6b6000
304 17:52:58.404374 BS: romstage times (exec / console): total (unknown) / 132 ms
305 17:52:58.404462
306 17:52:58.404528
307 17:52:58.411100 coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 ramstage starting (log level: 8)...
308 17:52:58.414393 POST: 0x39
309 17:52:58.414476 POST: 0x80
310 17:52:58.414542 Normal boot
311 17:52:58.417678 POST: 0x70
312 17:52:58.421041 BS: BS_PRE_DEVICE run times (exec / console): 0 / 1 ms
313 17:52:58.424449 POST: 0x71
314 17:52:58.424532 mainboard: EC init
315 17:52:58.427643 Chrome EC: Set SMI mask to 0x0000000000000000
316 17:52:58.431083 Chrome EC: UHEPI supported
317 17:52:58.437559 Chrome EC: clear events_b mask to 0x0000000000000000
318 17:52:58.441133 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
319 17:52:58.447758 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001400101e
320 17:52:58.451073 Chrome EC: Set WAKE mask to 0x0000000000000000
321 17:52:58.454476 Board ID: 4
322 17:52:58.457577 EC returned error result code 3
323 17:52:58.464181 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
324 17:52:58.464267 CBFS: Locating 'fsps.bin'
325 17:52:58.467612 CBFS: Found @ offset 16bfc0 size 1654d
326 17:52:58.508854 Spec version: v2.0
327 17:52:58.512049 Revision: 0.0.0, Build Number 1
328 17:52:58.512132 Type: release/test
329 17:52:58.518650 image ID: AMD_PCS0, base 0xca677000 + 0x3e000
330 17:52:58.521929 Config region 0x3cf54 + 0x202
331 17:52:58.522013 Silicon init offset 0x3c2
332 17:52:58.525235 Notify phase offset 0x3b8
333 17:52:58.528550 Calling FspSiliconInit: 0xca6773c2
334 17:52:58.531802 0xca7074f0: upd
335 17:52:58.531885 POST: 0x93
336 17:52:58.814328 POST: 0x99
337 17:52:58.817667 FspSiliconInit returned 0x00000000
338 17:52:58.821090 I2C bus 2 version 0x3132322a
339 17:52:58.824373 DW I2C bus 2 at 0xfedc4000 (400 KHz)
340 17:52:58.827694 FMAP: area RW_ELOG found @ 610000 (4096 bytes)
341 17:52:58.831042 spi_init: SPI BAR at 0xfec10000
342 17:52:58.831139 Manufacturer: ef
343 17:52:58.837607 SF: Detected ef 8018 with sector size 0x1000, total 0x1000000
344 17:52:58.840834 ELOG: NV offset 0x610000 size 0x1000
345 17:52:58.851337 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
346 17:52:58.857946 ELOG: Event(17) added with size 13 at 2023-10-09 17:53:01 UTC
347 17:52:58.864747 ELOG: Event(9F) added with size 14 at 2023-10-09 17:53:01 UTC
348 17:52:58.864895 PM1_STS: PWRBTN
349 17:52:58.871275 BS: BS_DEV_INIT_CHIPS run times (exec / console): 330 / 113 ms
350 17:52:58.874566 EC returned error result code 3
351 17:52:58.877950 FW_CONFIG value is 0x4080000
352 17:52:58.881262 fw_config match found: TOUCHPAD=REGULAR_TOUCHPAD
353 17:52:58.884503 I2C: 00:15 disabled by fw_config
354 17:52:58.891446 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_ALC5682
355 17:52:58.891647 GENERIC: 1.0 disabled by fw_config
356 17:52:58.897941 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_ALC5682
357 17:52:58.901022 GENERIC: 1.0 disabled by fw_config
358 17:52:58.907791 BS: BS_DEV_ENUMERATE entry times (exec / console): 1 / 30 ms
359 17:52:58.907938 POST: 0x72
360 17:52:58.910925 Enumerating buses...
361 17:52:58.914292 Show all devs... Before device enumeration.
362 17:52:58.914404 Root Device: enabled 1
363 17:52:58.917583 CPU_CLUSTER: 0: enabled 1
364 17:52:58.920883 DOMAIN: 0000: enabled 1
365 17:52:58.924165 MMIO: fedc5000: enabled 1
366 17:52:58.924371 MMIO: fedca000: enabled 0
367 17:52:58.927794 MMIO: fedce000: enabled 0
368 17:52:58.931035 MMIO: fedcf000: enabled 0
369 17:52:58.931165 MMIO: fedc4000: enabled 1
370 17:52:58.934389 GENERIC: 0.1: enabled 1
371 17:52:58.937377 APIC: 00: enabled 1
372 17:52:58.937467 PCI: 00:00.0: enabled 1
373 17:52:58.940670 PCI: 00:00.2: enabled 1
374 17:52:58.944298 PCI: 00:01.0: enabled 1
375 17:52:58.944381 PCI: 00:01.1: enabled 0
376 17:52:58.947538 PCI: 00:01.2: enabled 1
377 17:52:58.947629 PCI: 00:01.3: enabled 1
378 17:52:58.950814 PCI: 00:01.4: enabled 0
379 17:52:58.954203 PCI: 00:01.5: enabled 0
380 17:52:58.954301 PCI: 00:08.0: enabled 1
381 17:52:58.957531 PCI: 00:08.1: enabled 1
382 17:52:58.960663 PCI: 00:08.2: enabled 0
383 17:52:58.960755 PCI: 00:14.0: enabled 1
384 17:52:58.964174 PCI: 00:14.3: enabled 1
385 17:52:58.967381 PCI: 00:18.0: enabled 1
386 17:52:58.967483 PCI: 00:18.1: enabled 1
387 17:52:58.970712 PCI: 00:18.2: enabled 1
388 17:52:58.974431 PCI: 00:18.3: enabled 1
389 17:52:58.974597 PCI: 00:18.4: enabled 1
390 17:52:58.977600 PCI: 00:18.5: enabled 1
391 17:52:58.980793 PCI: 00:18.6: enabled 1
392 17:52:58.980887 I2C: 00:50: enabled 1
393 17:52:58.984220 I2C: 00:10: enabled 1
394 17:52:58.984332 I2C: 00:15: enabled 1
395 17:52:58.987374 I2C: 00:15: enabled 0
396 17:52:58.990969 PCI: 00:00.0: enabled 1
397 17:52:58.991062 PCI: 00:00.0: enabled 1
398 17:52:58.994283 PCI: 00:00.1: enabled 1
399 17:52:58.997259 PCI: 00:00.2: enabled 1
400 17:52:58.997350 PCI: 00:00.3: enabled 1
401 17:52:59.000528 PCI: 00:00.5: enabled 1
402 17:52:59.004036 PCI: 00:00.6: enabled 0
403 17:52:59.004171 PCI: 00:00.7: enabled 1
404 17:52:59.007281 PCI: 00:00.0: enabled 0
405 17:52:59.010549 PNP: 0c09.0: enabled 1
406 17:52:59.010676 USB0 port 0: enabled 1
407 17:52:59.014012 GENERIC: 0.0: enabled 1
408 17:52:59.017182 GENERIC: 1.0: enabled 0
409 17:52:59.017271 GENERIC: 0.0: enabled 1
410 17:52:59.020525 GENERIC: 0.0: enabled 1
411 17:52:59.023767 GENERIC: 1.0: enabled 0
412 17:52:59.023855 USB2 port 0: enabled 1
413 17:52:59.026997 USB2 port 1: enabled 1
414 17:52:59.027112 USB2 port 2: enabled 1
415 17:52:59.030362 USB2 port 3: enabled 1
416 17:52:59.033750 USB2 port 4: enabled 1
417 17:52:59.033850 USB2 port 5: enabled 1
418 17:52:59.036982 USB3 port 0: enabled 1
419 17:52:59.040424 USB3 port 1: enabled 1
420 17:52:59.040512 USB3 port 2: enabled 1
421 17:52:59.043689 USB3 port 3: enabled 1
422 17:52:59.043776 I2C: 00:1a: enabled 1
423 17:52:59.047305 I2C: 00:1a: enabled 1
424 17:52:59.050551 Compare with tree...
425 17:52:59.050639 Root Device: enabled 1
426 17:52:59.053813 CPU_CLUSTER: 0: enabled 1
427 17:52:59.057242 APIC: 00: enabled 1
428 17:52:59.057330 DOMAIN: 0000: enabled 1
429 17:52:59.060505 PCI: 00:00.0: enabled 1
430 17:52:59.063808 PCI: 00:00.2: enabled 1
431 17:52:59.063895 PCI: 00:01.0: enabled 1
432 17:52:59.067023 PCI: 00:01.1: enabled 0
433 17:52:59.070336 PCI: 00:01.2: enabled 1
434 17:52:59.073641 PCI: 00:00.0: enabled 1
435 17:52:59.073758 PCI: 00:01.3: enabled 1
436 17:52:59.076847 PCI: 00:01.4: enabled 0
437 17:52:59.080367 PCI: 00:01.5: enabled 0
438 17:52:59.080479 PCI: 00:08.0: enabled 1
439 17:52:59.083577 PCI: 00:08.1: enabled 1
440 17:52:59.086843 PCI: 00:00.0: enabled 1
441 17:52:59.090147 PCI: 00:00.1: enabled 1
442 17:52:59.090233 PCI: 00:00.2: enabled 1
443 17:52:59.093380 PCI: 00:00.3: enabled 1
444 17:52:59.096550 USB0 port 0: enabled 1
445 17:52:59.099878 USB2 port 0: enabled 1
446 17:52:59.099961 USB2 port 1: enabled 1
447 17:52:59.103519 USB2 port 2: enabled 1
448 17:52:59.106632 USB2 port 3: enabled 1
449 17:52:59.110170 USB2 port 4: enabled 1
450 17:52:59.110253 USB2 port 5: enabled 1
451 17:52:59.113389 USB3 port 0: enabled 1
452 17:52:59.116618 USB3 port 1: enabled 1
453 17:52:59.119952 USB3 port 2: enabled 1
454 17:52:59.120035 USB3 port 3: enabled 1
455 17:52:59.123174 PCI: 00:00.5: enabled 1
456 17:52:59.126439 GENERIC: 0.0: enabled 1
457 17:52:59.129678 GENERIC: 1.0: enabled 0
458 17:52:59.129822 PCI: 00:00.6: enabled 0
459 17:52:59.132995 PCI: 00:00.7: enabled 1
460 17:52:59.136626 PCI: 00:08.2: enabled 0
461 17:52:59.139656 PCI: 00:00.0: enabled 0
462 17:52:59.139743 PCI: 00:14.0: enabled 1
463 17:52:59.143251 PCI: 00:14.3: enabled 1
464 17:52:59.146399 PNP: 0c09.0: enabled 1
465 17:52:59.146485 GENERIC: 0.0: enabled 1
466 17:52:59.149746 I2C: 00:1a: enabled 1
467 17:52:59.152762 GENERIC: 0.0: enabled 1
468 17:52:59.156259 GENERIC: 1.0: enabled 0
469 17:52:59.159638 I2C: 00:1a: enabled 1
470 17:52:59.159724 PCI: 00:18.0: enabled 1
471 17:52:59.162942 PCI: 00:18.1: enabled 1
472 17:52:59.166372 PCI: 00:18.2: enabled 1
473 17:52:59.166458 PCI: 00:18.3: enabled 1
474 17:52:59.169351 PCI: 00:18.4: enabled 1
475 17:52:59.172756 PCI: 00:18.5: enabled 1
476 17:52:59.172841 PCI: 00:18.6: enabled 1
477 17:52:59.176346 MMIO: fedc5000: enabled 1
478 17:52:59.179684 I2C: 00:50: enabled 1
479 17:52:59.182945 MMIO: fedca000: enabled 0
480 17:52:59.183064 MMIO: fedce000: enabled 0
481 17:52:59.186178 MMIO: fedcf000: enabled 0
482 17:52:59.189446 MMIO: fedc4000: enabled 1
483 17:52:59.189532 I2C: 00:10: enabled 1
484 17:52:59.192638 I2C: 00:15: enabled 1
485 17:52:59.196184 I2C: 00:15: enabled 0
486 17:52:59.196270 GENERIC: 0.1: enabled 1
487 17:52:59.199339 Mainboard Shuboz Enable.
488 17:52:59.202882 Root Device scanning...
489 17:52:59.205930 scan_static_bus for Root Device
490 17:52:59.206015 CPU_CLUSTER: 0 enabled
491 17:52:59.209571 DOMAIN: 0000 enabled
492 17:52:59.212793 MMIO: fedc5000 enabled
493 17:52:59.212878 MMIO: fedca000 disabled
494 17:52:59.215910 MMIO: fedce000 disabled
495 17:52:59.215995 MMIO: fedcf000 disabled
496 17:52:59.219198 MMIO: fedc4000 enabled
497 17:52:59.222899 GENERIC: 0.1 enabled
498 17:52:59.222984 DOMAIN: 0000 scanning...
499 17:52:59.226282 PCI: pci_scan_bus for bus 00
500 17:52:59.226367 POST: 0x24
501 17:52:59.229547 PCI: 00:00.0 [1022/15d0] ops
502 17:52:59.232518 PCI: 00:00.0 [1022/15d0] enabled
503 17:52:59.236044 PCI: 00:00.2 [1022/0000] ops
504 17:52:59.239547 PCI: 00:00.2 [1022/15d1] enabled
505 17:52:59.242626 PCI: 00:01.0 [1022/1452] enabled
506 17:52:59.246030 PCI: 00:01.2 [1022/15d3] bus ops
507 17:52:59.249198 PCI: 00:01.2 [1022/15d3] enabled
508 17:52:59.249275 PCI: 00:01.3 [1022/15d3] bus ops
509 17:52:59.252489 PCI: 00:01.3 [1022/15d3] enabled
510 17:52:59.255976 PCI: 00:08.0 [1022/1452] enabled
511 17:52:59.259142 PCI: 00:08.1 [1022/0000] bus ops
512 17:52:59.262499 PCI: 00:08.1 [1022/15db] enabled
513 17:52:59.265950 PCI: 00:14.0 [1022/790b] bus ops
514 17:52:59.269325 PCI: 00:14.0 [1022/790b] enabled
515 17:52:59.272794 PCI: 00:14.3 [1022/0000] bus ops
516 17:52:59.275811 PCI: 00:14.3 [1022/790e] enabled
517 17:52:59.275898 PCI: 00:18.0 [1022/0000] ops
518 17:52:59.279151 PCI: 00:18.0 [1022/15e8] enabled
519 17:52:59.282417 PCI: 00:18.1 [1022/0000] ops
520 17:52:59.285844 PCI: 00:18.1 [1022/15e9] enabled
521 17:52:59.289193 PCI: 00:18.2 [1022/0000] ops
522 17:52:59.292465 PCI: 00:18.2 [1022/15ea] enabled
523 17:52:59.292551 PCI: 00:18.3 [1022/0000] ops
524 17:52:59.295705 PCI: 00:18.3 [1022/15eb] enabled
525 17:52:59.298972 PCI: 00:18.4 [1022/0000] ops
526 17:52:59.302146 PCI: 00:18.4 [1022/15ec] enabled
527 17:52:59.305445 PCI: 00:18.5 [1022/0000] ops
528 17:52:59.309162 PCI: 00:18.5 [1022/15ed] enabled
529 17:52:59.309248 PCI: 00:18.6 [1022/0000] ops
530 17:52:59.312407 PCI: 00:18.6 [1022/15ee] enabled
531 17:52:59.315644 PCI: 00:18.7 [1022/15ef] enabled
532 17:52:59.319222 POST: 0x25
533 17:52:59.319333 PCI: Leftover static devices:
534 17:52:59.322090 PCI: 00:01.1
535 17:52:59.322176 PCI: 00:01.4
536 17:52:59.322297 PCI: 00:01.5
537 17:52:59.326206 PCI: 00:08.2
538 17:52:59.326291 PCI: Check your devicetree.cb.
539 17:52:59.330184 PCI: 00:01.2 scanning...
540 17:52:59.333751 do_pci_scan_bridge for PCI: 00:01.2
541 17:52:59.337205 PCI: pci_scan_bus for bus 01
542 17:52:59.337289 POST: 0x24
543 17:52:59.340597 PCI: 01:00.0 [10ec/c822] enabled
544 17:52:59.340682 POST: 0x25
545 17:52:59.343847 POST: 0x55
546 17:52:59.343935 Enabling Common Clock Configuration
547 17:52:59.350654 L1 Sub-State supported from root port 1
548 17:52:59.350740 L1 Sub-State Support = 0xf
549 17:52:59.353901 CommonModeRestoreTime = 0x1e
550 17:52:59.357385 Power On Value = 0x1e, Power On Scale = 0x0
551 17:52:59.360708 ASPM: Enabled L1
552 17:52:59.364226 PCIe: Max_Payload_Size adjusted to 128
553 17:52:59.367470 scan_bus: bus PCI: 00:01.2 finished in 33 msecs
554 17:52:59.370774 PCI: 00:01.3 scanning...
555 17:52:59.374053 do_pci_scan_bridge for PCI: 00:01.3
556 17:52:59.374135 PCI: pci_scan_bus for bus 02
557 17:52:59.377707 POST: 0x24
558 17:52:59.380640 PCI: 02:00.0 [17a0/9750] enabled
559 17:52:59.380722 POST: 0x25
560 17:52:59.380788 POST: 0x55
561 17:52:59.384303 Enabling Common Clock Configuration
562 17:52:59.387564 L1 Sub-State supported from root port 1
563 17:52:59.390721 L1 Sub-State Support = 0xf
564 17:52:59.393931 CommonModeRestoreTime = 0xff
565 17:52:59.397346 Power On Value = 0x1f, Power On Scale = 0x2
566 17:52:59.400639 ASPM: Enabled L1
567 17:52:59.407303 PCIe: Max_Payload_Size adjusted to 128
568 17:52:59.414248 scan_bus: bus PCI: 00:01.3 finished in 39 msecs
569 17:52:59.414331 PCI: 00:08.1 scanning...
570 17:52:59.417647 do_pci_scan_bridge for PCI: 00:08.1
571 17:52:59.420826 PCI: pci_scan_bus for bus 03
572 17:52:59.424187 POST: 0x24
573 17:52:59.424269 PCI: 03:00.0 [1002/0000] ops
574 17:52:59.427441 PCI: 03:00.0 [1002/15d8] enabled
575 17:52:59.430838 PCI: 03:00.1 [1002/15de] enabled
576 17:52:59.434490 PCI: 03:00.2 [1022/15df] enabled
577 17:52:59.437563 PCI: 03:00.3 [1022/0000] bus ops
578 17:52:59.440853 PCI: 03:00.3 [1022/15e5] enabled
579 17:52:59.444168 PCI: 03:00.5 [1022/15e2] bus ops
580 17:52:59.448074 PCI: 03:00.5 [1022/15e2] enabled
581 17:52:59.448158 PCI: 03:00.7 [1022/15e4] enabled
582 17:52:59.451238 POST: 0x25
583 17:52:59.451321 PCI: Leftover static devices:
584 17:52:59.454855 PCI: 03:00.6
585 17:52:59.458068 PCI: Check your devicetree.cb.
586 17:52:59.458151 PCI: 03:00.3 scanning...
587 17:52:59.461576 scan_static_bus for PCI: 03:00.3
588 17:52:59.464720 USB0 port 0 enabled
589 17:52:59.464802 USB0 port 0 scanning...
590 17:52:59.468256 scan_static_bus for USB0 port 0
591 17:52:59.471407 USB2 port 0 enabled
592 17:52:59.471497 USB2 port 1 enabled
593 17:52:59.474627 USB2 port 2 enabled
594 17:52:59.474701 USB2 port 3 enabled
595 17:52:59.478019 USB2 port 4 enabled
596 17:52:59.481469 USB2 port 5 enabled
597 17:52:59.481552 USB3 port 0 enabled
598 17:52:59.484861 USB3 port 1 enabled
599 17:52:59.484943 USB3 port 2 enabled
600 17:52:59.488362 USB3 port 3 enabled
601 17:52:59.488445 USB2 port 0 scanning...
602 17:52:59.491515 scan_static_bus for USB2 port 0
603 17:52:59.494847 scan_static_bus for USB2 port 0 done
604 17:52:59.498040 scan_bus: bus USB2 port 0 finished in 6 msecs
605 17:52:59.501348 USB2 port 1 scanning...
606 17:52:59.504652 scan_static_bus for USB2 port 1
607 17:52:59.508175 scan_static_bus for USB2 port 1 done
608 17:52:59.511270 scan_bus: bus USB2 port 1 finished in 6 msecs
609 17:52:59.514635 USB2 port 2 scanning...
610 17:52:59.517915 scan_static_bus for USB2 port 2
611 17:52:59.521255 scan_static_bus for USB2 port 2 done
612 17:52:59.524762 scan_bus: bus USB2 port 2 finished in 6 msecs
613 17:52:59.527926 USB2 port 3 scanning...
614 17:52:59.531227 scan_static_bus for USB2 port 3
615 17:52:59.534570 scan_static_bus for USB2 port 3 done
616 17:52:59.538201 scan_bus: bus USB2 port 3 finished in 6 msecs
617 17:52:59.538284 USB2 port 4 scanning...
618 17:52:59.541417 scan_static_bus for USB2 port 4
619 17:52:59.544519 scan_static_bus for USB2 port 4 done
620 17:52:59.551235 scan_bus: bus USB2 port 4 finished in 6 msecs
621 17:52:59.551322 USB2 port 5 scanning...
622 17:52:59.554544 scan_static_bus for USB2 port 5
623 17:52:59.557810 scan_static_bus for USB2 port 5 done
624 17:52:59.561439 scan_bus: bus USB2 port 5 finished in 6 msecs
625 17:52:59.564595 USB3 port 0 scanning...
626 17:52:59.567915 scan_static_bus for USB3 port 0
627 17:52:59.571134 scan_static_bus for USB3 port 0 done
628 17:52:59.574407 scan_bus: bus USB3 port 0 finished in 6 msecs
629 17:52:59.577689 USB3 port 1 scanning...
630 17:52:59.581210 scan_static_bus for USB3 port 1
631 17:52:59.584654 scan_static_bus for USB3 port 1 done
632 17:52:59.587674 scan_bus: bus USB3 port 1 finished in 6 msecs
633 17:52:59.587757 USB3 port 2 scanning...
634 17:52:59.591347 scan_static_bus for USB3 port 2
635 17:52:59.594464 scan_static_bus for USB3 port 2 done
636 17:52:59.601009 scan_bus: bus USB3 port 2 finished in 6 msecs
637 17:52:59.601092 USB3 port 3 scanning...
638 17:52:59.604483 scan_static_bus for USB3 port 3
639 17:52:59.607736 scan_static_bus for USB3 port 3 done
640 17:52:59.611330 scan_bus: bus USB3 port 3 finished in 6 msecs
641 17:52:59.614475 scan_static_bus for USB0 port 0 done
642 17:52:59.621376 scan_bus: bus USB0 port 0 finished in 149 msecs
643 17:52:59.624652 scan_static_bus for PCI: 03:00.3 done
644 17:52:59.627898 scan_bus: bus PCI: 03:00.3 finished in 163 msecs
645 17:52:59.631020 PCI: 03:00.5 scanning...
646 17:52:59.631103 scan_static_bus for PCI: 03:00.5
647 17:52:59.634688 GENERIC: 0.0 enabled
648 17:52:59.637820 GENERIC: 1.0 disabled
649 17:52:59.641240 scan_static_bus for PCI: 03:00.5 done
650 17:52:59.644411 scan_bus: bus PCI: 03:00.5 finished in 10 msecs
651 17:52:59.644495 POST: 0x55
652 17:52:59.651168 scan_bus: bus PCI: 00:08.1 finished in 229 msecs
653 17:52:59.651252 PCI: 00:14.0 scanning...
654 17:52:59.654421 scan_generic_bus for PCI: 00:14.0
655 17:52:59.657807 scan_generic_bus for PCI: 00:14.0 done
656 17:52:59.661014 scan_bus: bus PCI: 00:14.0 finished in 6 msecs
657 17:52:59.664237 PCI: 00:14.3 scanning...
658 17:52:59.667795 scan_static_bus for PCI: 00:14.3
659 17:52:59.671315 PNP: 0c09.0 enabled
660 17:52:59.671397 PNP: 0c09.0 scanning...
661 17:52:59.674531 scan_static_bus for PNP: 0c09.0
662 17:52:59.678046 GENERIC: 0.0 enabled
663 17:52:59.678128 GENERIC: 0.0 enabled
664 17:52:59.681243 GENERIC: 1.0 disabled
665 17:52:59.684471 GENERIC: 0.0 scanning...
666 17:52:59.684553 scan_static_bus for GENERIC: 0.0
667 17:52:59.687929 I2C: 00:1a enabled
668 17:52:59.691269 scan_static_bus for GENERIC: 0.0 done
669 17:52:59.694335 scan_bus: bus GENERIC: 0.0 finished in 8 msecs
670 17:52:59.697926 GENERIC: 0.0 scanning...
671 17:52:59.701180 scan_static_bus for GENERIC: 0.0
672 17:52:59.704559 scan_static_bus for GENERIC: 0.0 done
673 17:52:59.707707 scan_bus: bus GENERIC: 0.0 finished in 6 msecs
674 17:52:59.711181 scan_static_bus for PNP: 0c09.0 done
675 17:52:59.714941 scan_bus: bus PNP: 0c09.0 finished in 39 msecs
676 17:52:59.717692 scan_static_bus for PCI: 00:14.3 done
677 17:52:59.724522 scan_bus: bus PCI: 00:14.3 finished in 53 msecs
678 17:52:59.724621 POST: 0x55
679 17:52:59.727822 scan_bus: bus DOMAIN: 0000 finished in 499 msecs
680 17:52:59.731206 MMIO: fedc5000 scanning...
681 17:52:59.734719 scan_generic_bus for MMIO: fedc5000
682 17:52:59.737973 bus: MMIO: fedc5000[0]->I2C: 01:50 enabled
683 17:52:59.741186 scan_generic_bus for MMIO: fedc5000 done
684 17:52:59.744531 scan_bus: bus MMIO: fedc5000 finished in 10 msecs
685 17:52:59.748244 MMIO: fedc4000 scanning...
686 17:52:59.751443 scan_generic_bus for MMIO: fedc4000
687 17:52:59.754603 bus: MMIO: fedc4000[0]->I2C: 02:10 enabled
688 17:52:59.761123 bus: MMIO: fedc4000[0]->I2C: 02:15 enabled
689 17:52:59.764527 bus: MMIO: fedc4000[0]->I2C: 02:15 disabled
690 17:52:59.767824 scan_generic_bus for MMIO: fedc4000 done
691 17:52:59.771044 scan_bus: bus MMIO: fedc4000 finished in 18 msecs
692 17:52:59.774456 scan_static_bus for Root Device done
693 17:52:59.778021 scan_bus: bus Root Device finished in 571 msecs
694 17:52:59.781175 done
695 17:52:59.784364 BS: BS_DEV_ENUMERATE run times (exec / console): 8 / 863 ms
696 17:52:59.784450 POST: 0x73
697 17:52:59.787947 found VGA at PCI: 03:00.0
698 17:52:59.791271 Setting up VGA for PCI: 03:00.0
699 17:52:59.794523 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:08.1
700 17:52:59.800923 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
701 17:52:59.804452 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
702 17:52:59.807806 Allocating resources...
703 17:52:59.807892 Reading resources...
704 17:52:59.811073 Root Device read_resources bus 0 link: 0
705 17:52:59.817668 CPU_CLUSTER: 0 read_resources bus 0 link: 0
706 17:52:59.821011 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
707 17:52:59.824182 DOMAIN: 0000 read_resources bus 0 link: 0
708 17:52:59.831042 Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
709 17:52:59.834408 PCI: 00:01.2 read_resources bus 1 link: 0
710 17:52:59.837502 PCI: 00:01.2 read_resources bus 1 link: 0 done
711 17:52:59.840878 PCI: 00:01.3 read_resources bus 2 link: 0
712 17:52:59.850801 PCI: 00:01.3 read_resources bus 2 link: 0 done
713 17:52:59.854075 PCI: 00:08.1 read_resources bus 3 link: 0
714 17:52:59.857361 PCI: 03:00.3 read_resources bus 0 link: 0
715 17:52:59.860685 USB0 port 0 read_resources bus 0 link: 0
716 17:52:59.867197 USB0 port 0 read_resources bus 0 link: 0 done
717 17:52:59.870794 PCI: 03:00.3 read_resources bus 0 link: 0 done
718 17:52:59.873773 PCI: 03:00.5 read_resources bus 0 link: 0
719 17:52:59.877364 PCI: 03:00.5 read_resources bus 0 link: 0 done
720 17:52:59.884139 PCI: 00:08.1 read_resources bus 3 link: 0 done
721 17:52:59.884226 ACPI GNVS at 0xca676000
722 17:52:59.887227 PCI: 00:14.3 read_resources bus 0 link: 0
723 17:52:59.932876 PNP: 0c09.0 read_resources bus 0 link: 0
724 17:52:59.933157 GENERIC: 0.0 read_resources bus 0 link: 0
725 17:52:59.933234 GENERIC: 0.0 read_resources bus 0 link: 0 done
726 17:52:59.933317 PNP: 0c09.0 read_resources bus 0 link: 0 done
727 17:52:59.933591 PCI: 00:14.3 read_resources bus 0 link: 0 done
728 17:52:59.933705 DOMAIN: 0000 read_resources bus 0 link: 0 done
729 17:52:59.933837 MMIO: fedc5000 read_resources bus 1 link: 0
730 17:52:59.933923 MMIO: fedc5000 read_resources bus 1 link: 0 done
731 17:52:59.934036 MMIO: fedc4000 read_resources bus 2 link: 0
732 17:52:59.934324 MMIO: fedc4000 read_resources bus 2 link: 0 done
733 17:52:59.977537 Root Device read_resources bus 0 link: 0 done
734 17:52:59.977643 Done reading resources.
735 17:52:59.977748 Show resources in subtree (Root Device)...After reading.
736 17:52:59.978041 Root Device child on link 0 CPU_CLUSTER: 0
737 17:52:59.978129 CPU_CLUSTER: 0 child on link 0 APIC: 00
738 17:52:59.978245 APIC: 00
739 17:52:59.978357 DOMAIN: 0000 child on link 0 PCI: 00:00.0
740 17:52:59.978454 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
741 17:52:59.978552 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000100
742 17:52:59.978649 PCI: 00:00.0
743 17:52:59.990477 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
744 17:52:59.990910 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
745 17:52:59.997347 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 2
746 17:53:00.007329 PCI: 00:00.0 resource base 100000 size 1f00000 align 0 gran 0 limit 0 flags e0004200 index 3
747 17:53:00.013729 PCI: 00:00.0 resource base 2000000 size 1c0000 align 0 gran 0 limit 0 flags f0004200 index 4
748 17:53:00.023953 PCI: 00:00.0 resource base 21c0000 size c9640000 align 0 gran 0 limit 0 flags e0004200 index 5
749 17:53:00.030537 PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
750 17:53:00.040568 PCI: 00:00.0 resource base cc000000 size 4000000 align 0 gran 0 limit 0 flags f0004200 index 6
751 17:53:00.050650 PCI: 00:00.0 resource base 100000000 size 12f340000 align 0 gran 0 limit 0 flags e0004200 index 7
752 17:53:00.057275 PCI: 00:00.0 resource base 22f340000 size cc0000 align 0 gran 0 limit 0 flags f0004200 index 8
753 17:53:00.067141 PCI: 00:00.0 resource base cb800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9
754 17:53:00.073729 PCI: 00:00.0 resource base cb7fe000 size 2000 align 0 gran 0 limit 0 flags f0004200 index a
755 17:53:00.083789 PCI: 00:00.0 resource base ca7fe000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
756 17:53:00.093900 PCI: 00:00.0 resource base fec01000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec01000
757 17:53:00.093985 PCI: 00:00.2
758 17:53:00.100511 PCI: 00:00.2 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 44
759 17:53:00.103968 PCI: 00:01.0
760 17:53:00.107195 PCI: 00:01.2 child on link 0 PCI: 01:00.0
761 17:53:00.117038 PCI: 00:01.2 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
762 17:53:00.123553 PCI: 00:01.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
763 17:53:00.133685 PCI: 00:01.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
764 17:53:00.133778 PCI: 01:00.0
765 17:53:00.140357 PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
766 17:53:00.150522 PCI: 01:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 18
767 17:53:00.153759 PCI: 00:01.3 child on link 0 PCI: 02:00.0
768 17:53:00.163737 PCI: 00:01.3 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
769 17:53:00.170236 PCI: 00:01.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
770 17:53:00.180042 PCI: 00:01.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
771 17:53:00.180152 PCI: 02:00.0
772 17:53:00.190197 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
773 17:53:00.190298 PCI: 00:08.0
774 17:53:00.193386 PCI: 00:08.1 child on link 0 PCI: 03:00.0
775 17:53:00.203569 PCI: 00:08.1 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
776 17:53:00.213396 PCI: 00:08.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
777 17:53:00.220192 PCI: 00:08.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
778 17:53:00.220294 PCI: 03:00.0
779 17:53:00.229931 PCI: 03:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 10
780 17:53:00.239979 PCI: 03:00.0 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 1201 index 18
781 17:53:00.246604 PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 20
782 17:53:00.256686 PCI: 03:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 24
783 17:53:00.256917 PCI: 03:00.1
784 17:53:00.266637 PCI: 03:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
785 17:53:00.266748 PCI: 03:00.2
786 17:53:00.276627 PCI: 03:00.2 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
787 17:53:00.283190 PCI: 03:00.2 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24
788 17:53:00.286363 PCI: 03:00.3 child on link 0 USB0 port 0
789 17:53:00.296446 PCI: 03:00.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 10
790 17:53:00.299956 USB0 port 0 child on link 0 USB2 port 0
791 17:53:00.303462 USB2 port 0
792 17:53:00.303598 USB2 port 1
793 17:53:00.306633 USB2 port 2
794 17:53:00.306756 USB2 port 3
795 17:53:00.310145 USB2 port 4
796 17:53:00.310326 USB2 port 5
797 17:53:00.313321 USB3 port 0
798 17:53:00.313431 USB3 port 1
799 17:53:00.316567 USB3 port 2
800 17:53:00.316658 USB3 port 3
801 17:53:00.323161 PCI: 03:00.5 child on link 0 GENERIC: 0.0
802 17:53:00.331092 PCI: 03:00.5 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 10
803 17:53:00.331220 GENERIC: 0.0
804 17:53:00.334427 GENERIC: 1.0
805 17:53:00.334518 PCI: 03:00.7
806 17:53:00.344371 PCI: 03:00.7 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
807 17:53:00.351022 PCI: 03:00.7 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24
808 17:53:00.354476 PCI: 00:14.0
809 17:53:00.357582 PCI: 00:14.3 child on link 0 PNP: 0c09.0
810 17:53:00.364497 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
811 17:53:00.374478 PCI: 00:14.3 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
812 17:53:00.384317 PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
813 17:53:00.390968 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
814 17:53:00.400883 PCI: 00:14.3 resource base fedc4000 size 2000 align 0 gran 0 limit 0 flags c0000200 index 4
815 17:53:00.404163 PNP: 0c09.0 child on link 0 GENERIC: 0.0
816 17:53:00.410812 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
817 17:53:00.414373 GENERIC: 0.0 child on link 0 I2C: 00:1a
818 17:53:00.417636 I2C: 00:1a
819 17:53:00.417828 GENERIC: 0.0
820 17:53:00.424250 GENERIC: 1.0 child on link 0 I2C: 00:1a
821 17:53:00.424395 I2C: 00:1a
822 17:53:00.427585 PCI: 00:18.0
823 17:53:00.427683 PCI: 00:18.1
824 17:53:00.427809 PCI: 00:18.2
825 17:53:00.430731 PCI: 00:18.3
826 17:53:00.430829 PCI: 00:18.4
827 17:53:00.434176 PCI: 00:18.5
828 17:53:00.434256 PCI: 00:18.6
829 17:53:00.437412 PCI: 00:18.7
830 17:53:00.440766 MMIO: fedc5000 child on link 0 I2C: 01:50
831 17:53:00.440847 I2C: 01:50
832 17:53:00.444182 MMIO: fedca000
833 17:53:00.444276 MMIO: fedce000
834 17:53:00.447714 MMIO: fedcf000
835 17:53:00.451080 MMIO: fedc4000 child on link 0 I2C: 02:10
836 17:53:00.451168 I2C: 02:10
837 17:53:00.454272 I2C: 02:15
838 17:53:00.454380 I2C: 02:15
839 17:53:00.454454 GENERIC: 0.1
840 17:53:00.461163 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
841 17:53:00.467854 PCI: 00:01.2 io: size: 0 align: 12 gran: 12 limit: ffffffff
842 17:53:00.470826 PCI: 01:00.0 10 * [0x0 - 0xff] io
843 17:53:00.477717 PCI: 00:01.2 io: size: 1000 align: 12 gran: 12 limit: ffff done
844 17:53:00.480928 PCI: 00:01.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
845 17:53:00.487842 PCI: 01:00.0 18 * [0x0 - 0xffff] mem
846 17:53:00.491001 PCI: 00:01.2 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
847 17:53:00.497558 PCI: 00:01.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
848 17:53:00.504420 PCI: 00:01.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
849 17:53:00.510892 PCI: 00:01.3 io: size: 0 align: 12 gran: 12 limit: ffffffff
850 17:53:00.517661 PCI: 00:01.3 io: size: 0 align: 12 gran: 12 limit: ffffffff done
851 17:53:00.521011 PCI: 00:01.3 mem: size: 0 align: 20 gran: 20 limit: ffffffff
852 17:53:00.527721 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
853 17:53:00.531077 PCI: 00:01.3 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
854 17:53:00.537681 PCI: 00:01.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
855 17:53:00.544588 PCI: 00:01.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
856 17:53:00.552553 PCI: 00:08.1 io: size: 0 align: 12 gran: 12 limit: ffffffff
857 17:53:00.557093 PCI: 03:00.0 20 * [0x0 - 0xff] io
858 17:53:00.560801 PCI: 00:08.1 io: size: 1000 align: 12 gran: 12 limit: ffff done
859 17:53:00.564825 PCI: 00:08.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
860 17:53:00.568049 PCI: 03:00.2 18 * [0x0 - 0xfffff] mem
861 17:53:00.574538 PCI: 03:00.3 10 * [0x100000 - 0x1fffff] mem
862 17:53:00.578059 PCI: 03:00.7 18 * [0x200000 - 0x2fffff] mem
863 17:53:00.581444 PCI: 03:00.0 24 * [0x300000 - 0x37ffff] mem
864 17:53:00.584710 PCI: 03:00.5 10 * [0x380000 - 0x3bffff] mem
865 17:53:00.591387 PCI: 03:00.1 10 * [0x3c0000 - 0x3c3fff] mem
866 17:53:00.594531 PCI: 03:00.2 24 * [0x3c4000 - 0x3c5fff] mem
867 17:53:00.597945 PCI: 03:00.7 24 * [0x3c6000 - 0x3c7fff] mem
868 17:53:00.604631 PCI: 00:08.1 mem: size: 400000 align: 20 gran: 20 limit: ffffffff done
869 17:53:00.611181 PCI: 00:08.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
870 17:53:00.614439 PCI: 03:00.0 10 * [0x0 - 0xfffffff] prefmem
871 17:53:00.621079 PCI: 03:00.0 18 * [0x10000000 - 0x101fffff] prefmem
872 17:53:00.627653 PCI: 00:08.1 prefmem: size: 10200000 align: 28 gran: 20 limit: ffffffffffffffff done
873 17:53:00.634546 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
874 17:53:00.641122 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
875 17:53:00.647572 update_constraints: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
876 17:53:00.654253 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
877 17:53:00.657478 DOMAIN: 0000: Resource ranges:
878 17:53:00.660869 * Base: 1000, Size: f000, Tag: 100
879 17:53:00.664125 PCI: 00:01.2 1c * [0x1000 - 0x1fff] limit: 1fff io
880 17:53:00.670758 PCI: 00:08.1 1c * [0x2000 - 0x2fff] limit: 2fff io
881 17:53:00.674431 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
882 17:53:00.680823 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffffffff
883 17:53:00.687684 update_constraints: PCI: 00:00.0 00 base 00000000 limit 0009ffff mem (fixed)
884 17:53:00.694257 update_constraints: PCI: 00:00.0 01 base 000a0000 limit 000bffff mem (fixed)
885 17:53:00.700795 update_constraints: PCI: 00:00.0 02 base 000c0000 limit 000fffff mem (fixed)
886 17:53:00.707536 update_constraints: PCI: 00:00.0 03 base 00100000 limit 01ffffff mem (fixed)
887 17:53:00.717354 update_constraints: PCI: 00:00.0 04 base 02000000 limit 021bffff mem (fixed)
888 17:53:00.723972 update_constraints: PCI: 00:00.0 05 base 021c0000 limit cb7fffff mem (fixed)
889 17:53:00.730960 update_constraints: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed)
890 17:53:00.737268 update_constraints: PCI: 00:00.0 06 base cc000000 limit cfffffff mem (fixed)
891 17:53:00.744161 update_constraints: PCI: 00:00.0 07 base 100000000 limit 22f33ffff mem (fixed)
892 17:53:00.750684 update_constraints: PCI: 00:00.0 08 base 22f340000 limit 22fffffff mem (fixed)
893 17:53:00.757352 update_constraints: PCI: 00:00.0 09 base cb800000 limit cbffffff mem (fixed)
894 17:53:00.763803 update_constraints: PCI: 00:00.0 0a base cb7fe000 limit cb7fffff mem (fixed)
895 17:53:00.770504 update_constraints: PCI: 00:00.0 0b base ca7fe000 limit cb7fdfff mem (fixed)
896 17:53:00.780595 update_constraints: PCI: 00:00.0 fec01000 base fec01000 limit fec01fff mem (fixed)
897 17:53:00.787303 update_constraints: PCI: 00:14.3 10000100 base ff000000 limit ffffffff mem (fixed)
898 17:53:00.793738 update_constraints: PCI: 00:14.3 02 base fec10000 limit fec103ff mem (fixed)
899 17:53:00.800296 update_constraints: PCI: 00:14.3 03 base fec00000 limit fec00fff mem (fixed)
900 17:53:00.807213 update_constraints: PCI: 00:14.3 04 base fedc4000 limit fedc5fff mem (fixed)
901 17:53:00.810709 DOMAIN: 0000: Resource ranges:
902 17:53:00.813732 * Base: d0000000, Size: 28000000, Tag: 200
903 17:53:00.817224 * Base: fc000000, Size: 2c00000, Tag: 200
904 17:53:00.820542 * Base: fec02000, Size: e000, Tag: 200
905 17:53:00.823727 * Base: fec11000, Size: 1b3000, Tag: 200
906 17:53:00.830360 * Base: fedc6000, Size: 23a000, Tag: 200
907 17:53:00.833718 * Base: 230000000, Size: fffdd0000000, Tag: 100200
908 17:53:00.840488 PCI: 00:08.1 24 * [0xd0000000 - 0xe01fffff] limit: e01fffff prefmem
909 17:53:00.847298 PCI: 00:08.1 20 * [0xe0200000 - 0xe05fffff] limit: e05fffff mem
910 17:53:00.850645 PCI: 00:01.2 20 * [0xe0600000 - 0xe06fffff] limit: e06fffff mem
911 17:53:00.857246 PCI: 00:01.3 20 * [0xe0700000 - 0xe07fffff] limit: e07fffff mem
912 17:53:00.863902 PCI: 00:00.2 44 * [0xe0800000 - 0xe087ffff] limit: e087ffff mem
913 17:53:00.870201 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffffffff done
914 17:53:00.877033 PCI: 00:01.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff
915 17:53:00.880442 PCI: 00:01.2: Resource ranges:
916 17:53:00.883500 * Base: 1000, Size: 1000, Tag: 100
917 17:53:00.886961 PCI: 01:00.0 10 * [0x1000 - 0x10ff] limit: 10ff io
918 17:53:00.893614 PCI: 00:01.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff done
919 17:53:00.900259 PCI: 00:01.2 mem: base: e0600000 size: 100000 align: 20 gran: 20 limit: e06fffff
920 17:53:00.903563 PCI: 00:01.2: Resource ranges:
921 17:53:00.906991 * Base: e0600000, Size: 100000, Tag: 200
922 17:53:00.913587 PCI: 01:00.0 18 * [0xe0600000 - 0xe060ffff] limit: e060ffff mem
923 17:53:00.920188 PCI: 00:01.2 mem: base: e0600000 size: 100000 align: 20 gran: 20 limit: e06fffff done
924 17:53:00.926761 PCI: 00:01.3 mem: base: e0700000 size: 100000 align: 20 gran: 20 limit: e07fffff
925 17:53:00.930211 PCI: 00:01.3: Resource ranges:
926 17:53:00.933583 * Base: e0700000, Size: 100000, Tag: 200
927 17:53:00.940322 PCI: 02:00.0 10 * [0xe0700000 - 0xe0700fff] limit: e0700fff mem
928 17:53:00.946749 PCI: 00:01.3 mem: base: e0700000 size: 100000 align: 20 gran: 20 limit: e07fffff done
929 17:53:00.953584 PCI: 00:08.1 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
930 17:53:00.956889 PCI: 00:08.1: Resource ranges:
931 17:53:00.960196 * Base: 2000, Size: 1000, Tag: 100
932 17:53:00.963541 PCI: 03:00.0 20 * [0x2000 - 0x20ff] limit: 20ff io
933 17:53:00.970241 PCI: 00:08.1 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
934 17:53:00.980220 PCI: 00:08.1 prefmem: base: d0000000 size: 10200000 align: 28 gran: 20 limit: e01fffff
935 17:53:00.983484 PCI: 00:08.1: Resource ranges:
936 17:53:00.986921 * Base: d0000000, Size: 10200000, Tag: 1200
937 17:53:00.993375 PCI: 03:00.0 10 * [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem
938 17:53:00.999906 PCI: 03:00.0 18 * [0xe0000000 - 0xe01fffff] limit: e01fffff prefmem
939 17:53:01.006590 PCI: 00:08.1 prefmem: base: d0000000 size: 10200000 align: 28 gran: 20 limit: e01fffff done
940 17:53:01.013053 PCI: 00:08.1 mem: base: e0200000 size: 400000 align: 20 gran: 20 limit: e05fffff
941 17:53:01.016507 PCI: 00:08.1: Resource ranges:
942 17:53:01.020251 * Base: e0200000, Size: 400000, Tag: 200
943 17:53:01.026468 PCI: 03:00.2 18 * [0xe0200000 - 0xe02fffff] limit: e02fffff mem
944 17:53:01.033406 PCI: 03:00.3 10 * [0xe0300000 - 0xe03fffff] limit: e03fffff mem
945 17:53:01.036622 PCI: 03:00.7 18 * [0xe0400000 - 0xe04fffff] limit: e04fffff mem
946 17:53:01.043101 PCI: 03:00.0 24 * [0xe0500000 - 0xe057ffff] limit: e057ffff mem
947 17:53:01.049946 PCI: 03:00.5 10 * [0xe0580000 - 0xe05bffff] limit: e05bffff mem
948 17:53:01.056450 PCI: 03:00.1 10 * [0xe05c0000 - 0xe05c3fff] limit: e05c3fff mem
949 17:53:01.063196 PCI: 03:00.2 24 * [0xe05c4000 - 0xe05c5fff] limit: e05c5fff mem
950 17:53:01.066397 PCI: 03:00.7 24 * [0xe05c6000 - 0xe05c7fff] limit: e05c7fff mem
951 17:53:01.076457 PCI: 00:08.1 mem: base: e0200000 size: 400000 align: 20 gran: 20 limit: e05fffff done
952 17:53:01.083003 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
953 17:53:01.086286 Root Device assign_resources, bus 0 link: 0
954 17:53:01.089739 DOMAIN: 0000 assign_resources, bus 0 link: 0
955 17:53:01.096533 PCI: 00:00.2 44 <- [0x00e0800000 - 0x00e087ffff] size 0x00080000 gran 0x13 mem
956 17:53:01.102961 PCI: 00:01.2 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
957 17:53:01.113023 PCI: 00:01.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
958 17:53:01.119579 PCI: 00:01.2 20 <- [0x00e0600000 - 0x00e06fffff] size 0x00100000 gran 0x14 bus 01 mem
959 17:53:01.122848 PCI: 00:01.2 assign_resources, bus 1 link: 0
960 17:53:01.132771 PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
961 17:53:01.139591 PCI: 01:00.0 18 <- [0x00e0600000 - 0x00e060ffff] size 0x00010000 gran 0x10 mem64
962 17:53:01.142952 PCI: 00:01.2 assign_resources, bus 1 link: 0
963 17:53:01.149687 PCI: 00:01.3 1c <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x0c bus 02 io
964 17:53:01.160027 PCI: 00:01.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
965 17:53:01.166875 PCI: 00:01.3 20 <- [0x00e0700000 - 0x00e07fffff] size 0x00100000 gran 0x14 bus 02 mem
966 17:53:01.170194 PCI: 00:01.3 assign_resources, bus 2 link: 0
967 17:53:01.182009 PCI: 02:00.0 10 <- [0x00e0700000 - 0x00e0700fff] size 0x00001000 gran 0x0c mem
968 17:53:01.188863 PCI: 00:01.3 assign_resources, bus 2 link: 0
969 17:53:01.195485 PCI: 00:08.1 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io
970 17:53:01.202295 PCI: 00:08.1 24 <- [0x00d0000000 - 0x00e01fffff] size 0x10200000 gran 0x14 bus 03 prefmem
971 17:53:01.212234 PCI: 00:08.1 20 <- [0x00e0200000 - 0x00e05fffff] size 0x00400000 gran 0x14 bus 03 mem
972 17:53:01.215540 PCI: 00:08.1 assign_resources, bus 3 link: 0
973 17:53:01.222148 PCI: 03:00.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
974 17:53:01.228891 PCI: 03:00.0 18 <- [0x00e0000000 - 0x00e01fffff] size 0x00200000 gran 0x15 prefmem64
975 17:53:01.235515 PCI: 03:00.0 20 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
976 17:53:01.242054 PCI: 03:00.0 24 <- [0x00e0500000 - 0x00e057ffff] size 0x00080000 gran 0x13 mem
977 17:53:01.252177 PCI: 03:00.1 10 <- [0x00e05c0000 - 0x00e05c3fff] size 0x00004000 gran 0x0e mem
978 17:53:01.258887 PCI: 03:00.2 18 <- [0x00e0200000 - 0x00e02fffff] size 0x00100000 gran 0x14 mem
979 17:53:01.265257 PCI: 03:00.2 24 <- [0x00e05c4000 - 0x00e05c5fff] size 0x00002000 gran 0x0d mem
980 17:53:01.271939 PCI: 03:00.3 10 <- [0x00e0300000 - 0x00e03fffff] size 0x00100000 gran 0x14 mem64
981 17:53:01.275299 PCI: 03:00.3 assign_resources, bus 0 link: 0
982 17:53:01.278796 PCI: 03:00.3 assign_resources, bus 0 link: 0
983 17:53:01.285495 PCI: 03:00.5 10 <- [0x00e0580000 - 0x00e05bffff] size 0x00040000 gran 0x12 mem
984 17:53:01.292022 PCI: 03:00.5 assign_resources, bus 0 link: 0
985 17:53:01.295427 PCI: 03:00.5 assign_resources, bus 0 link: 0
986 17:53:01.302083 PCI: 03:00.7 18 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 mem
987 17:53:01.308822 PCI: 03:00.7 24 <- [0x00e05c6000 - 0x00e05c7fff] size 0x00002000 gran 0x0d mem
988 17:53:01.311883 PCI: 00:08.1 assign_resources, bus 3 link: 0
989 17:53:01.315402 PCI: 00:14.3 assign_resources, bus 0 link: 0
990 17:53:01.321874 PCI: 00:14.3 assign_resources, bus 0 link: 0
991 17:53:01.325248 DOMAIN: 0000 assign_resources, bus 0 link: 0
992 17:53:01.328486 Root Device assign_resources, bus 0 link: 0
993 17:53:01.332058 Done setting resources.
994 17:53:01.338690 Show resources in subtree (Root Device)...After assigning values.
995 17:53:01.341782 Root Device child on link 0 CPU_CLUSTER: 0
996 17:53:01.345460 CPU_CLUSTER: 0 child on link 0 APIC: 00
997 17:53:01.345547 APIC: 00
998 17:53:01.348646 DOMAIN: 0000 child on link 0 PCI: 00:00.0
999 17:53:01.358410 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1000 17:53:01.368535 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000100
1001 17:53:01.368627 PCI: 00:00.0
1002 17:53:01.375041 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
1003 17:53:01.385226 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1004 17:53:01.391726 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 2
1005 17:53:01.401613 PCI: 00:00.0 resource base 100000 size 1f00000 align 0 gran 0 limit 0 flags e0004200 index 3
1006 17:53:01.408564 PCI: 00:00.0 resource base 2000000 size 1c0000 align 0 gran 0 limit 0 flags f0004200 index 4
1007 17:53:01.418247 PCI: 00:00.0 resource base 21c0000 size c9640000 align 0 gran 0 limit 0 flags e0004200 index 5
1008 17:53:01.428396 PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
1009 17:53:01.434825 PCI: 00:00.0 resource base cc000000 size 4000000 align 0 gran 0 limit 0 flags f0004200 index 6
1010 17:53:01.444695 PCI: 00:00.0 resource base 100000000 size 12f340000 align 0 gran 0 limit 0 flags e0004200 index 7
1011 17:53:01.454881 PCI: 00:00.0 resource base 22f340000 size cc0000 align 0 gran 0 limit 0 flags f0004200 index 8
1012 17:53:01.461513 PCI: 00:00.0 resource base cb800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9
1013 17:53:01.471560 PCI: 00:00.0 resource base cb7fe000 size 2000 align 0 gran 0 limit 0 flags f0004200 index a
1014 17:53:01.478180 PCI: 00:00.0 resource base ca7fe000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1015 17:53:01.488203 PCI: 00:00.0 resource base fec01000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec01000
1016 17:53:01.488326 PCI: 00:00.2
1017 17:53:01.497914 PCI: 00:00.2 resource base e0800000 size 80000 align 19 gran 19 limit e087ffff flags 60000200 index 44
1018 17:53:01.501446 PCI: 00:01.0
1019 17:53:01.504474 PCI: 00:01.2 child on link 0 PCI: 01:00.0
1020 17:53:01.511162 PCI: 00:01.2 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
1021 17:53:01.521122 PCI: 00:01.2 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1022 17:53:01.531230 PCI: 00:01.2 resource base e0600000 size 100000 align 20 gran 20 limit e06fffff flags 60080202 index 20
1023 17:53:01.534519 PCI: 01:00.0
1024 17:53:01.541117 PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
1025 17:53:01.551131 PCI: 01:00.0 resource base e0600000 size 10000 align 16 gran 16 limit e060ffff flags 60000201 index 18
1026 17:53:01.554358 PCI: 00:01.3 child on link 0 PCI: 02:00.0
1027 17:53:01.564710 PCI: 00:01.3 resource base ffffffff size 0 align 12 gran 12 limit ffffffff flags 20080102 index 1c
1028 17:53:01.574489 PCI: 00:01.3 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1029 17:53:01.584637 PCI: 00:01.3 resource base e0700000 size 100000 align 20 gran 20 limit e07fffff flags 60080202 index 20
1030 17:53:01.584724 PCI: 02:00.0
1031 17:53:01.594435 PCI: 02:00.0 resource base e0700000 size 1000 align 12 gran 12 limit e0700fff flags 60000200 index 10
1032 17:53:01.597774 PCI: 00:08.0
1033 17:53:01.601140 PCI: 00:08.1 child on link 0 PCI: 03:00.0
1034 17:53:01.607881 PCI: 00:08.1 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
1035 17:53:01.617839 PCI: 00:08.1 resource base d0000000 size 10200000 align 28 gran 20 limit e01fffff flags 60081202 index 24
1036 17:53:01.627819 PCI: 00:08.1 resource base e0200000 size 400000 align 20 gran 20 limit e05fffff flags 60080202 index 20
1037 17:53:01.630958 PCI: 03:00.0
1038 17:53:01.637662 PCI: 03:00.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 10
1039 17:53:01.647637 PCI: 03:00.0 resource base e0000000 size 200000 align 21 gran 21 limit e01fffff flags 60001201 index 18
1040 17:53:01.657909 PCI: 03:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 20
1041 17:53:01.667513 PCI: 03:00.0 resource base e0500000 size 80000 align 19 gran 19 limit e057ffff flags 60000200 index 24
1042 17:53:01.667601 PCI: 03:00.1
1043 17:53:01.677637 PCI: 03:00.1 resource base e05c0000 size 4000 align 14 gran 14 limit e05c3fff flags 60000200 index 10
1044 17:53:01.677727 PCI: 03:00.2
1045 17:53:01.687567 PCI: 03:00.2 resource base e0200000 size 100000 align 20 gran 20 limit e02fffff flags 60000200 index 18
1046 17:53:01.697543 PCI: 03:00.2 resource base e05c4000 size 2000 align 13 gran 13 limit e05c5fff flags 60000200 index 24
1047 17:53:01.700726 PCI: 03:00.3 child on link 0 USB0 port 0
1048 17:53:01.710894 PCI: 03:00.3 resource base e0300000 size 100000 align 20 gran 20 limit e03fffff flags 60000201 index 10
1049 17:53:01.713941 USB0 port 0 child on link 0 USB2 port 0
1050 17:53:01.717608 USB2 port 0
1051 17:53:01.717694 USB2 port 1
1052 17:53:01.720956 USB2 port 2
1053 17:53:01.721041 USB2 port 3
1054 17:53:01.724118 USB2 port 4
1055 17:53:01.724203 USB2 port 5
1056 17:53:01.727649 USB3 port 0
1057 17:53:01.727734 USB3 port 1
1058 17:53:01.730852 USB3 port 2
1059 17:53:01.730938 USB3 port 3
1060 17:53:01.734127 PCI: 03:00.5 child on link 0 GENERIC: 0.0
1061 17:53:01.744125 PCI: 03:00.5 resource base e0580000 size 40000 align 18 gran 18 limit e05bffff flags 60000200 index 10
1062 17:53:01.747576 GENERIC: 0.0
1063 17:53:01.747693 GENERIC: 1.0
1064 17:53:01.751072 PCI: 03:00.7
1065 17:53:01.760929 PCI: 03:00.7 resource base e0400000 size 100000 align 20 gran 20 limit e04fffff flags 60000200 index 18
1066 17:53:01.767447 PCI: 03:00.7 resource base e05c6000 size 2000 align 13 gran 13 limit e05c7fff flags 60000200 index 24
1067 17:53:01.771100 PCI: 00:14.0
1068 17:53:01.774426 PCI: 00:14.3 child on link 0 PNP: 0c09.0
1069 17:53:01.784224 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
1070 17:53:01.790857 PCI: 00:14.3 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
1071 17:53:01.800789 PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
1072 17:53:01.807123 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
1073 17:53:01.817355 PCI: 00:14.3 resource base fedc4000 size 2000 align 0 gran 0 limit 0 flags c0000200 index 4
1074 17:53:01.820645 PNP: 0c09.0 child on link 0 GENERIC: 0.0
1075 17:53:01.827200 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1076 17:53:01.833679 GENERIC: 0.0 child on link 0 I2C: 00:1a
1077 17:53:01.833760 I2C: 00:1a
1078 17:53:01.837331 GENERIC: 0.0
1079 17:53:01.840583 GENERIC: 1.0 child on link 0 I2C: 00:1a
1080 17:53:01.840664 I2C: 00:1a
1081 17:53:01.843899 PCI: 00:18.0
1082 17:53:01.843972 PCI: 00:18.1
1083 17:53:01.847153 PCI: 00:18.2
1084 17:53:01.847222 PCI: 00:18.3
1085 17:53:01.850105 PCI: 00:18.4
1086 17:53:01.850174 PCI: 00:18.5
1087 17:53:01.850233 PCI: 00:18.6
1088 17:53:01.853430 PCI: 00:18.7
1089 17:53:01.856831 MMIO: fedc5000 child on link 0 I2C: 01:50
1090 17:53:01.860434 I2C: 01:50
1091 17:53:01.860508 MMIO: fedca000
1092 17:53:01.860634 MMIO: fedce000
1093 17:53:01.863648 MMIO: fedcf000
1094 17:53:01.866869 MMIO: fedc4000 child on link 0 I2C: 02:10
1095 17:53:01.870177 I2C: 02:10
1096 17:53:01.870257 I2C: 02:15
1097 17:53:01.870319 I2C: 02:15
1098 17:53:01.873480 GENERIC: 0.1
1099 17:53:01.873547 Done allocating resources.
1100 17:53:01.880273 BS: BS_DEV_RESOURCES run times (exec / console): 14 / 2072 ms
1101 17:53:01.883500 0x00000020: notify_params->phase
1102 17:53:01.886780 Calling FspNotify: 0xca6773b8
1103 17:53:01.890090 0xca6fff7c: notify_params
1104 17:53:01.890166 POST: 0x94
1105 17:53:01.895582 POST: 0x94
1106 17:53:01.898972 FspNotify returned 0x00000000
1107 17:53:01.902398 PCI_INTR tables: Writing registers C00/C01 for PCI IRQ routing:
1108 17:53:01.908768 PCI_INTR_INDEX name PIC mode APIC mode
1109 17:53:01.912199 0x00 INTA# 0x06 0x1F
1110 17:53:01.915617 0x01 INTB# 0x0D 0x1F
1111 17:53:01.918847 0x02 INTC# 0x0E 0x1F
1112 17:53:01.922405 0x03 INTD# 0x0F 0x1F
1113 17:53:01.925514 0x04 INTE# 0x0F 0x1F
1114 17:53:01.928859 0x05 INTF#/GENINT2 0x0E 0x1F
1115 17:53:01.932287 0x06 INTG# 0x0D 0x1F
1116 17:53:01.935573 0x07 INTH# 0x06 0x1F
1117 17:53:01.938837 0x08 Misc 0xFA 0x00
1118 17:53:01.942059 0x09 Misc0 0xF1 0x00
1119 17:53:01.945459 0x0A Misc1 0x00 0x00
1120 17:53:01.948959 0x0B Misc2 0x00 0x00
1121 17:53:01.952208 0x0C Ser IRQ INTA 0x1F 0x1F
1122 17:53:01.955448 0x0D Ser IRQ INTB 0x1F 0x1F
1123 17:53:01.958641 0x0E Ser IRQ INTC 0x1F 0x1F
1124 17:53:01.962037 0x0F Ser IRQ INTD 0x1F 0x1F
1125 17:53:01.965424 0x10 SCI 0x09 0x09
1126 17:53:01.968759 0x11 SMBUS 0x1F 0x1F
1127 17:53:01.972156 0x12 ASF 0x1F 0x1F
1128 17:53:01.975448 0x16 PerMon 0x1F 0x1F
1129 17:53:01.978669 0x17 SD 0x1F 0x1F
1130 17:53:01.982024 0x1A SDIO 0x1F 0x1F
1131 17:53:01.985304 0x20 CIR 0x1F 0x1F
1132 17:53:01.988791 0x21 GPIOa 0x1F 0x1F
1133 17:53:01.992125 0x22 GPIOb 0x1F 0x1F
1134 17:53:01.995286 0x23 GPIOc 0x1F 0x1F
1135 17:53:01.998831 0x41 SATA 0x1F 0x1F
1136 17:53:02.002118 0x43 eMMC 0x05 0x05
1137 17:53:02.005240 0x50 GPP0 0x1F 0x1F
1138 17:53:02.008564 0x51 GPP1 0x1F 0x1F
1139 17:53:02.012024 0x52 GPP2 0x1F 0x1F
1140 17:53:02.015226 0x53 GPP3 0x1F 0x1F
1141 17:53:02.018733 0x62 GPIO 0x07 0x07
1142 17:53:02.018818 0x70 I2C0 0x1F 0x1F
1143 17:53:02.022156 0x71 I2C1 0x1F 0x1F
1144 17:53:02.025235 0x72 I2C2 0x0A 0x0A
1145 17:53:02.028651 0x73 I2C3 0x0B 0x0B
1146 17:53:02.031995 0x74 UART0 0x04 0x04
1147 17:53:02.035274 0x75 UART1 0x03 0x03
1148 17:53:02.038832 0x76 I2C4 0x1F 0x1F
1149 17:53:02.041912 0x77 I2C5 0x1F 0x1F
1150 17:53:02.045416 0x78 UART2 0x1F 0x1F
1151 17:53:02.048555 0x79 UART3 0x1F 0x1F
1152 17:53:02.055473 PCI_CFG IRQ: Write PCI config space IRQ assignments
1153 17:53:02.058791 PCI IRQ: Found device 0:00.02 using PIN A
1154 17:53:02.062213 PCI Devfn (0x2) not found in pirq_data table
1155 17:53:02.065213 PCI IRQ: Found device 0:08.01 using PIN A
1156 17:53:02.072122 Found this device in pirq_data table entry 7
1157 17:53:02.072205 Orig INT_PIN : 1 (PIN A)
1158 17:53:02.075413 PCI_INTR idx : 0x04 (INTE#)
1159 17:53:02.078714 INT_LINE : 0xF (IRQ 15)
1160 17:53:02.081897 PCI IRQ: Found device 1:00.00 using PIN A
1161 17:53:02.085306 With INT_PIN swizzled to PIN A
1162 17:53:02.088546 Attached to bridge device 0:01h.02h
1163 17:53:02.091815 Found this device in pirq_data table entry 1
1164 17:53:02.095293 Orig INT_PIN : 1 (PIN A)
1165 17:53:02.095383 PCI_INTR idx : 0x04 (INTE#)
1166 17:53:02.098513 INT_LINE : 0xF (IRQ 15)
1167 17:53:02.101836 PCI IRQ: Found device 3:00.00 using PIN A
1168 17:53:02.105134 With INT_PIN swizzled to PIN A
1169 17:53:02.108393 Attached to bridge device 0:08h.01h
1170 17:53:02.111711 Found this device in pirq_data table entry 7
1171 17:53:02.115144 Orig INT_PIN : 1 (PIN A)
1172 17:53:02.118381 PCI_INTR idx : 0x04 (INTE#)
1173 17:53:02.118473 INT_LINE : 0xF (IRQ 15)
1174 17:53:02.125247 PCI IRQ: Found device 3:00.01 using PIN B
1175 17:53:02.125387 With INT_PIN swizzled to PIN B
1176 17:53:02.128482 Attached to bridge device 0:08h.01h
1177 17:53:02.135090 Found this device in pirq_data table entry 7
1178 17:53:02.135171 Orig INT_PIN : 2 (PIN B)
1179 17:53:02.138340 PCI_INTR idx : 0x05 (INTF#/GENINT2)
1180 17:53:02.141804 INT_LINE : 0xE (IRQ 14)
1181 17:53:02.144911 PCI IRQ: Found device 3:00.02 using PIN C
1182 17:53:02.148353 With INT_PIN swizzled to PIN C
1183 17:53:02.151475 Attached to bridge device 0:08h.01h
1184 17:53:02.154847 Found this device in pirq_data table entry 7
1185 17:53:02.158177 Orig INT_PIN : 3 (PIN C)
1186 17:53:02.161369 PCI_INTR idx : 0x06 (INTG#)
1187 17:53:02.164769 INT_LINE : 0xD (IRQ 13)
1188 17:53:02.168343 PCI IRQ: Found device 3:00.03 using PIN D
1189 17:53:02.171791 With INT_PIN swizzled to PIN D
1190 17:53:02.171873 Attached to bridge device 0:08h.01h
1191 17:53:02.178209 Found this device in pirq_data table entry 7
1192 17:53:02.178291 Orig INT_PIN : 4 (PIN D)
1193 17:53:02.181508 PCI_INTR idx : 0x07 (INTH#)
1194 17:53:02.185026 INT_LINE : 0x6 (IRQ 6)
1195 17:53:02.188155 PCI IRQ: Found device 3:00.05 using PIN B
1196 17:53:02.191422 With INT_PIN swizzled to PIN B
1197 17:53:02.194754 Attached to bridge device 0:08h.01h
1198 17:53:02.198014 Found this device in pirq_data table entry 7
1199 17:53:02.201518 Orig INT_PIN : 2 (PIN B)
1200 17:53:02.204812 PCI_INTR idx : 0x05 (INTF#/GENINT2)
1201 17:53:02.208063 INT_LINE : 0xE (IRQ 14)
1202 17:53:02.211392 PCI IRQ: Found device 3:00.07 using PIN D
1203 17:53:02.214507 With INT_PIN swizzled to PIN D
1204 17:53:02.217780 Attached to bridge device 0:08h.01h
1205 17:53:02.221091 Found this device in pirq_data table entry 7
1206 17:53:02.221229 Orig INT_PIN : 4 (PIN D)
1207 17:53:02.224448 PCI_INTR idx : 0x07 (INTH#)
1208 17:53:02.227767 INT_LINE : 0x6 (IRQ 6)
1209 17:53:02.235596 PCI IRQ: Found device 2:00.00 using PIN A
1210 17:53:02.239142 With INT_PIN swizzled to PIN A
1211 17:53:02.242471 Attached to bridge device 0:01h.03h
1212 17:53:02.251645 Found this device in pirq_data table entry 2
1213 17:53:02.255834 Orig INT_PIN : 1 (PIN A)
1214 17:53:02.258939 PCI_INTR idx : 0x00 (INTA#)
1215 17:53:02.262178 INT_LINE : 0x6 (IRQ 6)
1216 17:53:02.265657 PCI_CFG IRQ: Finished writing PCI config space IRQ assignments
1217 17:53:02.272282 BS: BS_DEV_ENABLE entry times (exec / console): 17 / 368 ms
1218 17:53:02.272365 POST: 0x74
1219 17:53:02.275444 Enabling resources...
1220 17:53:02.278984 PCI: 00:00.0 cmd <- 00
1221 17:53:02.279067 PCI: 00:00.2 subsystem <- 1022/1510
1222 17:53:02.282363 PCI: 00:00.2 cmd <- 06
1223 17:53:02.285616 PCI: 00:01.0 subsystem <- 1022/1510
1224 17:53:02.288933 PCI: 00:01.0 cmd <- 00
1225 17:53:02.292405 PCI: 00:01.2 bridge ctrl <- 0013
1226 17:53:02.292489 PCI: 00:01.2 cmd <- 07
1227 17:53:02.295868 PCI: 00:01.3 bridge ctrl <- 0013
1228 17:53:02.299156 PCI: 00:01.3 cmd <- 06
1229 17:53:02.302470 PCI: 00:08.0 subsystem <- 1022/1510
1230 17:53:02.302552 PCI: 00:08.0 cmd <- 00
1231 17:53:02.305814 PCI: 00:08.1 bridge ctrl <- 001b
1232 17:53:02.309026 PCI: 00:08.1 cmd <- 07
1233 17:53:02.312348 PCI: 00:14.0 subsystem <- 1022/1510
1234 17:53:02.315613 PCI: 00:14.0 cmd <- 403
1235 17:53:02.318981 PCI: 00:14.3 subsystem <- 1022/1510
1236 17:53:02.319073 PCI: 00:14.3 cmd <- 0f
1237 17:53:02.322324 PCI: 00:18.7 cmd <- 00
1238 17:53:02.325520 PCI: 01:00.0 subsystem <- 1022/1510
1239 17:53:02.325622 PCI: 01:00.0 cmd <- 03
1240 17:53:02.331747 PCI: 02:00.0 cmd <- 06
1241 17:53:02.337705 PCI: 03:00.0 subsystem <- 1022/1510
1242 17:53:02.340473 PCI: 03:00.0 cmd <- 07
1243 17:53:02.343968 PCI: 03:00.1 subsystem <- 1022/1510
1244 17:53:02.347129 PCI: 03:00.1 cmd <- 02
1245 17:53:02.350676 PCI: 03:00.2 subsystem <- 1022/1510
1246 17:53:02.350750 PCI: 03:00.2 cmd <- 02
1247 17:53:02.353836 PCI: 03:00.3 subsystem <- 1022/1510
1248 17:53:02.357263 PCI: 03:00.3 cmd <- 02
1249 17:53:02.360755 PCI: 03:00.5 subsystem <- 1022/1510
1250 17:53:02.364126 PCI: 03:00.5 cmd <- 02
1251 17:53:02.364202 PCI: 03:00.7 subsystem <- 1022/1510
1252 17:53:02.367363 PCI: 03:00.7 cmd <- 02
1253 17:53:02.367440 done.
1254 17:53:02.373859 BS: BS_DEV_ENABLE run times (exec / console): 8 / 89 ms
1255 17:53:02.373938 POST: 0x75
1256 17:53:02.377217 Initializing devices...
1257 17:53:02.377302 POST: 0x75
1258 17:53:02.380810 CPU_CLUSTER: 0 init
1259 17:53:02.384134 MTRR: Physical address space:
1260 17:53:02.387404 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1261 17:53:02.393997 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1262 17:53:02.400731 0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6
1263 17:53:02.403822 0x00000000d0000000 - 0x00000000e0200000 size 0x10200000 type 1
1264 17:53:02.410616 0x00000000e0200000 - 0x0000000100000000 size 0x1fe00000 type 0
1265 17:53:02.417262 0x0000000100000000 - 0x0000000230000000 size 0x130000000 type 6
1266 17:53:02.420599 MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
1267 17:53:02.423918 MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
1268 17:53:02.427135 MTRR: Fixed MSR 0x259 0x0000000000000000
1269 17:53:02.430439 MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
1270 17:53:02.433673 MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
1271 17:53:02.437287 MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
1272 17:53:02.440600 MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
1273 17:53:02.443925 MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
1274 17:53:02.450297 MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
1275 17:53:02.453714 MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
1276 17:53:02.456976 MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
1277 17:53:02.460311 call enable_fixed_mtrr()
1278 17:53:02.460402 CPU physical address size: 48 bits
1279 17:53:02.467106 MTRR: default type WB/UC MTRR counts: 10/5.
1280 17:53:02.470336 MTRR: UC selected as default type.
1281 17:53:02.473511 MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6
1282 17:53:02.480212 MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6
1283 17:53:02.487026 MTRR: 2 base 0x00000000c0000000 mask 0x0000fffff0000000 type 6
1284 17:53:02.490330 MTRR: 3 base 0x00000000d0000000 mask 0x0000fffff0000000 type 1
1285 17:53:02.496926 MTRR: 4 base 0x00000000e0000000 mask 0x0000ffffffe00000 type 1
1286 17:53:02.497008
1287 17:53:02.497077 MTRR check
1288 17:53:02.500113 Fixed MTRRs : Enabled
1289 17:53:02.503430 Variable MTRRs: Enabled
1290 17:53:02.503505
1291 17:53:02.503566 POST: 0x93
1292 17:53:02.506986 Setting up SMI for CPU
1293 17:53:02.507056 Will perform SMM setup.
1294 17:53:02.513344 CPU: AMD 3015Ce with Radeon Graphics .
1295 17:53:02.520199 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
1296 17:53:02.523488 Processing 16 relocs. Offset value of 0x00030000
1297 17:53:02.526790 Attempting to start 3 APs
1298 17:53:02.530146 Waiting for 10ms after sending INIT.
1299 17:53:02.545153 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 3.
1300 17:53:02.548183 AP: slot 3 apic_id 1.
1301 17:53:02.548264 AP: slot 2 apic_id 2.
1302 17:53:02.548327 done.
1303 17:53:02.558125 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
1304 17:53:02.561617 Processing 13 relocs. Offset value of 0x00038000
1305 17:53:02.568167 SMM Module: stub loaded at 0x00038000. Will call 0xca6d31cb(0x00000000)
1306 17:53:02.571768 Installing permanent SMM handler to 0xcb800000
1307 17:53:02.581606 Loading module at 0xcb810000 with entry 0xcb8114d2. filesize: 0x6b10 memsize: 0xd3c8
1308 17:53:02.584862 Processing 415 relocs. Offset value of 0xcb810000
1309 17:53:02.591497 Loading module at 0xcb808000 with entry 0xcb808000. filesize: 0x1b8 memsize: 0x1b8
1310 17:53:02.594823 Processing 13 relocs. Offset value of 0xcb808000
1311 17:53:02.601550 SMM Module: placing jmp sequence at 0xcb807e00 rel16 0x01fd
1312 17:53:02.608161 SMM Module: placing jmp sequence at 0xcb807c00 rel16 0x03fd
1313 17:53:02.611454 SMM Module: placing jmp sequence at 0xcb807a00 rel16 0x05fd
1314 17:53:02.618062 SMM Module: stub loaded at 0xcb808000. Will call 0xcb8114d2(0x00000000)
1315 17:53:02.624790 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb800000, cpu = 0
1316 17:53:02.628238 Relocation complete.
1317 17:53:02.635024 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffe00, cpu = 1
1318 17:53:02.635103 Relocation complete.
1319 17:53:02.641578 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffa00, cpu = 3
1320 17:53:02.644818 Relocation complete.
1321 17:53:02.651389 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffc00, cpu = 2
1322 17:53:02.651472 Relocation complete.
1323 17:53:02.655016 Initializing CPU #0
1324 17:53:02.658385 CPU: vendor AMD device 820f01
1325 17:53:02.661661 CPU: family 17, model 20, stepping 01
1326 17:53:02.661762 Setting up local APIC...
1327 17:53:02.664818 apic_id: 0x00 done.
1328 17:53:02.668321 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1329 17:53:02.671380 CBFS: Locating 'cpu_microcode_blob.bin'
1330 17:53:02.674809 CBFS: Found @ offset 12fc80 size 2580
1331 17:53:02.681496 microcode: patch id to apply = 0x08200103
1332 17:53:02.685122 microcode: being updated to patch id = 0x08200103 succeeded
1333 17:53:02.688211 CPU #0 initialized
1334 17:53:02.688284 Initializing CPU #2
1335 17:53:02.691816 Initializing CPU #3
1336 17:53:02.695025 CPU: vendor AMD device 820f01
1337 17:53:02.695103 CPU: vendor AMD device 820f01
1338 17:53:02.698287 Initializing CPU #1
1339 17:53:02.701594 CPU: family 17, model 20, stepping 01
1340 17:53:02.705017 CPU: family 17, model 20, stepping 01
1341 17:53:02.708213 Setting up local APIC...
1342 17:53:02.711614 CPU: vendor AMD device 820f01
1343 17:53:02.711704 apic_id: 0x01 done.
1344 17:53:02.714849 Setting up local APIC...
1345 17:53:02.718345 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1346 17:53:02.724885 apic_id: 0x02 CBFS: Locating 'cpu_microcode_blob.bin'
1347 17:53:02.724976 done.
1348 17:53:02.728323 CBFS: Found @ offset 12fc80 size 2580
1349 17:53:02.731692 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1350 17:53:02.735012 CPU: family 17, model 20, stepping 01
1351 17:53:02.738198 microcode: patch id to apply = 0x08200103
1352 17:53:02.741515 CBFS: Locating 'cpu_microcode_blob.bin'
1353 17:53:02.748285 microcode: being updated to patch id = 0x08200103 succeeded
1354 17:53:02.751578 CBFS: Found @ offset 12fc80 size 2580
1355 17:53:02.754778 CPU #3 initialized
1356 17:53:02.758169 microcode: patch id to apply = 0x08200103
1357 17:53:02.758259 Setting up local APIC...
1358 17:53:02.764551 microcode: being updated to patch id = 0x08200103 succeeded
1359 17:53:02.768253 apic_id: 0x03 done.
1360 17:53:02.768336 CPU #2 initialized
1361 17:53:02.771513 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1362 17:53:02.778013 CBFS: Locating 'cpu_microcode_blob.bin'
1363 17:53:02.781386 CBFS: Found @ offset 12fc80 size 2580
1364 17:53:02.784865 microcode: patch id to apply = 0x08200103
1365 17:53:02.791481 microcode: being updated to patch id = 0x08200103 succeeded
1366 17:53:02.791560 CPU #1 initialized
1367 17:53:02.794684 bsp_do_flight_plan done after 241 msecs.
1368 17:53:02.794759
1369 17:53:02.794828
1370 17:53:02.801501 coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 smm starting (log level: 8)...
1371 17:53:02.801643
1372 17:53:02.804806 SMI# #1
1373 17:53:02.808123 spi_init: SPI BAR at 0xfec10000
1374 17:53:02.808193 PSP: Notify SMM info... OK
1375 17:53:02.811348 MTRR: TEMPORARY Physical address space:
1376 17:53:02.817942 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1377 17:53:02.824718 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1378 17:53:02.827894 0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6
1379 17:53:02.834648 0x00000000d0000000 - 0x00000000ff000000 size 0x2f000000 type 0
1380 17:53:02.841073 0x00000000ff000000 - 0x0000000100000000 size 0x01000000 type 5
1381 17:53:02.847855 0x0000000100000000 - 0x0000000230000000 size 0x130000000 type 6
1382 17:53:02.851175 MTRR: default type WB/UC MTRR counts: 7/6.
1383 17:53:02.854194 MTRR: UC selected as default type.
1384 17:53:02.857590 MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6
1385 17:53:02.864243 MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6
1386 17:53:02.870962 MTRR: 2 base 0x00000000c0000000 mask 0x0000fffff0000000 type 6
1387 17:53:02.874339 MTRR: 3 base 0x00000000ff000000 mask 0x0000ffffff000000 type 5
1388 17:53:02.880868 MTRR: 4 base 0x0000000100000000 mask 0x0000ffff00000000 type 6
1389 17:53:02.887557 MTRR: 5 base 0x0000000200000000 mask 0x0000ffffc0000000 type 6
1390 17:53:02.890839 CPU_CLUSTER: 0 init finished in 505 msecs
1391 17:53:02.890927 POST: 0x75
1392 17:53:02.890999 POST: 0x75
1393 17:53:02.894132 POST: 0x75
1394 17:53:02.894205 POST: 0x75
1395 17:53:02.894267 POST: 0x75
1396 17:53:02.897374 POST: 0x75
1397 17:53:02.897448 POST: 0x75
1398 17:53:02.897517 POST: 0x75
1399 17:53:02.900707 POST: 0x75
1400 17:53:02.900780 POST: 0x75
1401 17:53:02.900839 POST: 0x75
1402 17:53:02.904205 POST: 0x75
1403 17:53:02.904290 PCI: 00:00.0 init
1404 17:53:02.907520 IOAPIC: Initializing IOAPIC at 0xfec01000
1405 17:53:02.914270 IOAPIC: Bootstrap Processor Local APIC = 0x00
1406 17:53:02.914351 IOAPIC: ID = 0x09
1407 17:53:02.917539 IOAPIC: Dumping registers
1408 17:53:02.920733 reg 0x0000: 0x09000000
1409 17:53:02.920810 reg 0x0001: 0x001f8021
1410 17:53:02.924386 reg 0x0002: 0x00000000
1411 17:53:02.927444 IOAPIC: 32 interrupts
1412 17:53:02.927521 IOAPIC: Enabling interrupts on FSB
1413 17:53:02.934190 IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
1414 17:53:02.937330 IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
1415 17:53:02.944101 IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
1416 17:53:02.947331 IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
1417 17:53:02.950569 IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
1418 17:53:02.957470 IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
1419 17:53:02.960743 IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
1420 17:53:02.964093 IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
1421 17:53:02.970503 IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
1422 17:53:02.974155 IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
1423 17:53:02.977205 IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
1424 17:53:02.983727 IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
1425 17:53:02.987370 IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
1426 17:53:02.993824 IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
1427 17:53:02.997318 IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
1428 17:53:03.000498 IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
1429 17:53:03.007145 IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
1430 17:53:03.010514 IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
1431 17:53:03.014089 IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
1432 17:53:03.020557 IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
1433 17:53:03.023695 IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
1434 17:53:03.027244 IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
1435 17:53:03.033681 IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
1436 17:53:03.037037 IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
1437 17:53:03.043545 IOAPIC: reg 0x00000018 value 0x00000000 0x00010000
1438 17:53:03.047225 IOAPIC: reg 0x00000019 value 0x00000000 0x00010000
1439 17:53:03.050279 IOAPIC: reg 0x0000001a value 0x00000000 0x00010000
1440 17:53:03.057036 IOAPIC: reg 0x0000001b value 0x00000000 0x00010000
1441 17:53:03.060125 IOAPIC: reg 0x0000001c value 0x00000000 0x00010000
1442 17:53:03.063455 IOAPIC: reg 0x0000001d value 0x00000000 0x00010000
1443 17:53:03.070377 IOAPIC: reg 0x0000001e value 0x00000000 0x00010000
1444 17:53:03.073534 IOAPIC: reg 0x0000001f value 0x00000000 0x00010000
1445 17:53:03.077049 PCI: 00:00.0 init finished in 168 msecs
1446 17:53:03.077132 POST: 0x75
1447 17:53:03.080348 POST: 0x75
1448 17:53:03.080429 PCI: 00:01.0 init
1449 17:53:03.083618 PCI: 00:01.0 init finished in 0 msecs
1450 17:53:03.086819 POST: 0x75
1451 17:53:03.086900 POST: 0x75
1452 17:53:03.086965 POST: 0x75
1453 17:53:03.090194 PCI: 00:08.0 init
1454 17:53:03.093589 PCI: 00:08.0 init finished in 0 msecs
1455 17:53:03.093698 POST: 0x75
1456 17:53:03.096778 POST: 0x75
1457 17:53:03.096858 PCI: 00:14.0 init
1458 17:53:03.100074 IOAPIC: Initializing IOAPIC at 0xfec00000
1459 17:53:03.103702 IOAPIC: Bootstrap Processor Local APIC = 0x00
1460 17:53:03.106777 IOAPIC: ID = 0x08
1461 17:53:03.110251 IOAPIC: Dumping registers
1462 17:53:03.110333 reg 0x0000: 0x08000000
1463 17:53:03.113456 reg 0x0001: 0x00178021
1464 17:53:03.116735 reg 0x0002: 0x08000000
1465 17:53:03.116818 IOAPIC: 24 interrupts
1466 17:53:03.119980 IOAPIC: Enabling interrupts on FSB
1467 17:53:03.126787 IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
1468 17:53:03.130200 IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
1469 17:53:03.133360 IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
1470 17:53:03.139935 IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
1471 17:53:03.143487 IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
1472 17:53:03.146833 IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
1473 17:53:03.153219 IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
1474 17:53:03.156583 IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
1475 17:53:03.160113 IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
1476 17:53:03.166656 IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
1477 17:53:03.169902 IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
1478 17:53:03.173483 IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
1479 17:53:03.179876 IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
1480 17:53:03.183297 IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
1481 17:53:03.189861 IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
1482 17:53:03.193096 IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
1483 17:53:03.196465 IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
1484 17:53:03.203280 IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
1485 17:53:03.206533 IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
1486 17:53:03.209678 IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
1487 17:53:03.216737 IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
1488 17:53:03.219875 IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
1489 17:53:03.223144 IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
1490 17:53:03.229785 IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
1491 17:53:03.232987 PCI: 00:14.0 init finished in 132 msecs
1492 17:53:03.233071 POST: 0x75
1493 17:53:03.236342 PCI: 00:14.3 init
1494 17:53:03.236442 RTC Init
1495 17:53:03.239783 PCI: 00:14.3 init finished in 0 msecs
1496 17:53:03.239899 POST: 0x75
1497 17:53:03.243152 POST: 0x75
1498 17:53:03.243234 POST: 0x75
1499 17:53:03.243299 POST: 0x75
1500 17:53:03.246309 POST: 0x75
1501 17:53:03.246393 POST: 0x75
1502 17:53:03.246473 POST: 0x75
1503 17:53:03.249724 POST: 0x75
1504 17:53:03.249863 PCI: 00:18.7 init
1505 17:53:03.252878 PCI: 00:18.7 init finished in 0 msecs
1506 17:53:03.256337 POST: 0x75
1507 17:53:03.256434 PCI: 01:00.0 init
1508 17:53:03.259520 PCI: 01:00.0 init finished in 0 msecs
1509 17:53:03.259604 POST: 0x75
1510 17:53:03.262827 PCI: 02:00.0 init
1511 17:53:03.266340 PCI: 02:00.0 init finished in 0 msecs
1512 17:53:03.266422 POST: 0x75
1513 17:53:03.269398 PCI: 03:00.0 init
1514 17:53:03.273171 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1515 17:53:03.276114 CBFS: Locating 'pci1002,15d8,ea.rom'
1516 17:53:03.279473 CBFS: 'pci1002,15d8,ea.rom' not found.
1517 17:53:03.282855 Using RV2 VBIOS.
1518 17:53:03.286161 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1519 17:53:03.289482 CBFS: Locating 'pci1002,15dd,c4.rom'
1520 17:53:03.292831 CBFS: Found @ offset 18f9c0 size d400
1521 17:53:03.299481 In CBFS, ROM address for PCI: 03:00.0 = 0xff1a19f8
1522 17:53:03.303015 PCI expansion ROM, signature 0xaa55, INIT size 0xd400, data ptr 0x01b0
1523 17:53:03.309560 PCI ROM image, vendor ID 1002, device ID 15dd,
1524 17:53:03.312962 PCI ROM image, Class Code 030000, Code Type 00
1525 17:53:03.319293 Copying VGA ROM Image from 0xff1a19f8 to 0xc0000, 0xd400 bytes
1526 17:53:03.327923 Real mode stub @0x00000600: 889 bytes
1527 17:53:03.328007 Calling Option ROM...
1528 17:53:03.352301 ... Option ROM returned.
1529 17:53:03.355689 VBE: Getting information about VESA mode 41d4
1530 17:53:03.359131 VBE: resolution: 1920x1080@32
1531 17:53:03.362309 VBE: framebuffer: 0xd0000000
1532 17:53:03.365535 VBE: Setting VESA mode 41d4
1533 17:53:03.389593 fb_add_framebuffer_info_ex: channel bit mask=24 and BPP=32 don't match. This is a driver bug.
1534 17:53:03.396195 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1535 17:53:03.403141 x_res x y_res: 1920 x 1080, size: 8294400 at 0xd0000000
1536 17:53:03.403236 VGA Option ROM was run
1537 17:53:03.406433 PCI: 03:00.0 init finished in 134 msecs
1538 17:53:03.409775 POST: 0x75
1539 17:53:03.409860 PCI: 03:00.1 init
1540 17:53:03.412893 PCI: 03:00.1 init finished in 0 msecs
1541 17:53:03.412983 POST: 0x75
1542 17:53:03.416125 PCI: 03:00.2 init
1543 17:53:03.419523 PCI: 03:00.2 init finished in 0 msecs
1544 17:53:03.419606 POST: 0x75
1545 17:53:03.423091 PCI: 03:00.3 init
1546 17:53:03.426171 PCI: 03:00.3 init finished in 0 msecs
1547 17:53:03.426254 POST: 0x75
1548 17:53:03.429711 PCI: 03:00.5 init
1549 17:53:03.432926 PCI: 03:00.5 init finished in 0 msecs
1550 17:53:03.433013 POST: 0x75
1551 17:53:03.436087 PCI: 03:00.7 init
1552 17:53:03.439402 PCI: 03:00.7 init finished in 0 msecs
1553 17:53:03.439485 POST: 0x75
1554 17:53:03.439559 POST: 0x75
1555 17:53:03.442851 POST: 0x75
1556 17:53:03.442934 POST: 0x75
1557 17:53:03.443006 POST: 0x75
1558 17:53:03.446179 POST: 0x75
1559 17:53:03.446265 POST: 0x75
1560 17:53:03.446331 POST: 0x75
1561 17:53:03.449436 POST: 0x75
1562 17:53:03.449513 POST: 0x75
1563 17:53:03.449577 POST: 0x75
1564 17:53:03.452753 POST: 0x75
1565 17:53:03.452826 POST: 0x75
1566 17:53:03.452888 POST: 0x75
1567 17:53:03.455990 PNP: 0c09.0 init
1568 17:53:03.459315 Google Chrome EC uptime: 7.254 seconds
1569 17:53:03.462889 Google Chrome AP resets since EC boot: 0
1570 17:53:03.466077 Google Chrome most recent AP reset causes:
1571 17:53:03.472857 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1572 17:53:03.476108 PNP: 0c09.0 init finished in 17 msecs
1573 17:53:03.476182 POST: 0x75
1574 17:53:03.479453 POST: 0x75
1575 17:53:03.479562 POST: 0x75
1576 17:53:03.479628 POST: 0x75
1577 17:53:03.482681 POST: 0x75
1578 17:53:03.482762 POST: 0x75
1579 17:53:03.482832 POST: 0x75
1580 17:53:03.485823 POST: 0x75
1581 17:53:03.485902 POST: 0x75
1582 17:53:03.489130 Devices initialized
1583 17:53:03.489201 Show all devs... After init.
1584 17:53:03.492727 Root Device: enabled 1
1585 17:53:03.496069 CPU_CLUSTER: 0: enabled 1
1586 17:53:03.496160 DOMAIN: 0000: enabled 1
1587 17:53:03.499282 MMIO: fedc5000: enabled 1
1588 17:53:03.502665 MMIO: fedca000: enabled 0
1589 17:53:03.502756 MMIO: fedce000: enabled 0
1590 17:53:03.505944 MMIO: fedcf000: enabled 0
1591 17:53:03.509213 MMIO: fedc4000: enabled 1
1592 17:53:03.509299 GENERIC: 0.1: enabled 1
1593 17:53:03.512500 APIC: 00: enabled 1
1594 17:53:03.515752 PCI: 00:00.0: enabled 1
1595 17:53:03.515860 PCI: 00:00.2: enabled 1
1596 17:53:03.519175 PCI: 00:01.0: enabled 1
1597 17:53:03.522772 PCI: 00:01.1: enabled 0
1598 17:53:03.522883 PCI: 00:01.2: enabled 1
1599 17:53:03.525937 PCI: 00:01.3: enabled 1
1600 17:53:03.529422 PCI: 00:01.4: enabled 0
1601 17:53:03.529533 PCI: 00:01.5: enabled 0
1602 17:53:03.532684 PCI: 00:08.0: enabled 1
1603 17:53:03.535868 PCI: 00:08.1: enabled 1
1604 17:53:03.535954 PCI: 00:08.2: enabled 0
1605 17:53:03.539162 PCI: 00:14.0: enabled 1
1606 17:53:03.542538 PCI: 00:14.3: enabled 1
1607 17:53:03.542620 PCI: 00:18.0: enabled 1
1608 17:53:03.545784 PCI: 00:18.1: enabled 1
1609 17:53:03.545876 PCI: 00:18.2: enabled 1
1610 17:53:03.549049 PCI: 00:18.3: enabled 1
1611 17:53:03.552739 PCI: 00:18.4: enabled 1
1612 17:53:03.552815 PCI: 00:18.5: enabled 1
1613 17:53:03.555963 PCI: 00:18.6: enabled 1
1614 17:53:03.559273 I2C: 01:50: enabled 1
1615 17:53:03.559347 I2C: 02:10: enabled 1
1616 17:53:03.562467 I2C: 02:15: enabled 1
1617 17:53:03.565900 I2C: 02:15: enabled 0
1618 17:53:03.565999 PCI: 01:00.0: enabled 1
1619 17:53:03.569079 PCI: 03:00.0: enabled 1
1620 17:53:03.572294 PCI: 03:00.1: enabled 1
1621 17:53:03.572372 PCI: 03:00.2: enabled 1
1622 17:53:03.575724 PCI: 03:00.3: enabled 1
1623 17:53:03.575802 PCI: 03:00.5: enabled 1
1624 17:53:03.579177 PCI: 03:00.6: enabled 0
1625 17:53:03.582336 PCI: 03:00.7: enabled 1
1626 17:53:03.582415 PCI: 00:00.0: enabled 0
1627 17:53:03.585543 PNP: 0c09.0: enabled 1
1628 17:53:03.589150 USB0 port 0: enabled 1
1629 17:53:03.589225 GENERIC: 0.0: enabled 1
1630 17:53:03.592574 GENERIC: 1.0: enabled 0
1631 17:53:03.595841 GENERIC: 0.0: enabled 1
1632 17:53:03.595946 GENERIC: 0.0: enabled 1
1633 17:53:03.599117 GENERIC: 1.0: enabled 0
1634 17:53:03.602267 USB2 port 0: enabled 1
1635 17:53:03.602342 USB2 port 1: enabled 1
1636 17:53:03.605643 USB2 port 2: enabled 1
1637 17:53:03.605764 USB2 port 3: enabled 1
1638 17:53:03.608922 USB2 port 4: enabled 1
1639 17:53:03.612192 USB2 port 5: enabled 1
1640 17:53:03.612288 USB3 port 0: enabled 1
1641 17:53:03.615564 USB3 port 1: enabled 1
1642 17:53:03.618827 USB3 port 2: enabled 1
1643 17:53:03.618908 USB3 port 3: enabled 1
1644 17:53:03.622354 I2C: 00:1a: enabled 1
1645 17:53:03.622442 I2C: 00:1a: enabled 1
1646 17:53:03.625495 PCI: 00:18.7: enabled 1
1647 17:53:03.628708 PCI: 02:00.0: enabled 1
1648 17:53:03.628817 APIC: 03: enabled 1
1649 17:53:03.632337 APIC: 02: enabled 1
1650 17:53:03.632445 APIC: 01: enabled 1
1651 17:53:03.638993 BS: BS_DEV_INIT run times (exec / console): 210 / 1048 ms
1652 17:53:03.642147 SCIMAP 56 maps to GPE 31 (active high, edge trigger)
1653 17:53:03.648783 ELOG: Event(A0) added with size 9 at 2023-10-09 17:53:05 UTC
1654 17:53:03.652229 elog_add_boot_reason: Logged dev mode boot
1655 17:53:03.658910 BS: BS_POST_DEVICE entry times (exec / console): 0 / 14 ms
1656 17:53:03.659014 POST: 0x76
1657 17:53:03.662202 Finalize devices...
1658 17:53:03.662279 Devices finalized
1659 17:53:03.668997 BS: BS_POST_DEVICE run times (exec / console): 0 / 5 ms
1660 17:53:03.672347 FMAP: area RW_NVRAM found @ 617000 (20480 bytes)
1661 17:53:03.678887 BS: BS_POST_DEVICE exit times (exec / console): 1 / 4 ms
1662 17:53:03.678962 POST: 0x77
1663 17:53:03.682301 BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 1 ms
1664 17:53:03.685393 Saving dimm info for smbios type 17
1665 17:53:03.688751 AMD_FSP_DMI_HOB found
1666 17:53:03.691935 AGESA TYPE 17 DMI INFO:
1667 17:53:03.692008 Handle: 1
1668 17:53:03.695647 TotalWidth: 64
1669 17:53:03.695721 DataWidth: 64
1670 17:53:03.698734 MemorySize: 8192
1671 17:53:03.698814 DeviceSet: 0
1672 17:53:03.698876 Speed: 1600
1673 17:53:03.702147 ManufacturerIdCode: 0
1674 17:53:03.705359 Attributes: 1
1675 17:53:03.705434 ExtSize: 0
1676 17:53:03.705498 ConfigSpeed: 800
1677 17:53:03.708655 MemoryType: 0x1a
1678 17:53:03.708727 FormFactor: 0xd
1679 17:53:03.711992 DeviceLocator: DIMM 0
1680 17:53:03.715187 BankLocator: P0 CHANNEL A
1681 17:53:03.718458 SerialNumber(8): 00000000
1682 17:53:03.722164 PartNumber(0):
1683 17:53:03.722236 CBMEM_ID_MEMINFO:
1684 17:53:03.725120 dimm_size: 8192
1685 17:53:03.725221 ddr_type: 0x1a
1686 17:53:03.728462 ddr_frequency: 0
1687 17:53:03.728535 rank_per_dimm: 1
1688 17:53:03.732113 channel_num: 0
1689 17:53:03.732185 dimm_num: 0
1690 17:53:03.735123 bank_locator: 0
1691 17:53:03.735197 mod_id: 0
1692 17:53:03.735259 mod_type: 0x4
1693 17:53:03.738456 bus_width: 3
1694 17:53:03.738526 serial: 00000000
1695 17:53:03.741799 module_part_number(18): MT40A1G16KD-062E_E
1696 17:53:03.748716 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 59 ms
1697 17:53:03.748805 POST: 0x79
1698 17:53:03.751988 POST: 0x9c
1699 17:53:03.755175 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1700 17:53:03.758650 CBFS: Locating 'fallback/dsdt.aml'
1701 17:53:03.762140 CBFS: Found @ offset 14ed40 size 417b
1702 17:53:03.765384 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1703 17:53:03.768536 CBFS: Locating 'fallback/slic'
1704 17:53:03.772108 CBFS: 'fallback/slic' not found.
1705 17:53:03.775282 ACPI: Writing ACPI tables at ca63a000.
1706 17:53:03.778418 ACPI: * FACS
1707 17:53:03.778501 ACPI: * DSDT
1708 17:53:03.781841 Ramoops buffer: 0x100000@0xca53a000.
1709 17:53:03.785385 FMAP: area RO_VPD found @ 800000 (16384 bytes)
1710 17:53:03.791943 FMAP: area RW_VPD found @ 615000 (8192 bytes)
1711 17:53:03.792032 ACPI: * FADT
1712 17:53:03.795113 pm_base: 0x0400
1713 17:53:03.798638 ACPI: added table 1/32, length now 40
1714 17:53:03.798714 ACPI: * SSDT
1715 17:53:03.805337 PSS: 1200MHz power 1461 control 0x0 status 0x0
1716 17:53:03.808444 PSS: 800MHz power 760 control 0x1 status 0x1
1717 17:53:03.811962 PSS: 400MHz power 364 control 0x2 status 0x2
1718 17:53:03.815315 PSS: 1200MHz power 1461 control 0x0 status 0x0
1719 17:53:03.818551 PSS: 800MHz power 760 control 0x1 status 0x1
1720 17:53:03.825132 PSS: 400MHz power 364 control 0x2 status 0x2
1721 17:53:03.828475 PSS: 1200MHz power 1461 control 0x0 status 0x0
1722 17:53:03.831965 PSS: 800MHz power 760 control 0x1 status 0x1
1723 17:53:03.835335 PSS: 400MHz power 364 control 0x2 status 0x2
1724 17:53:03.841552 PSS: 1200MHz power 1461 control 0x0 status 0x0
1725 17:53:03.845304 PSS: 800MHz power 760 control 0x1 status 0x1
1726 17:53:03.848547 PSS: 400MHz power 364 control 0x2 status 0x2
1727 17:53:03.851899 \_SB.MAXM: Maxim Integrated 98357A Amplifier
1728 17:53:03.855217 \_SB.I2C3.TPMI: I2C TPM at I2C: 01:50
1729 17:53:03.858518 \_SB.I2C2.D010: ELAN Touchscreen at I2C: 02:10
1730 17:53:03.865145 \_SB.I2C2.D015: ELAN Touchpad at I2C: 02:15
1731 17:53:03.868551 \_SB.PCI0.PBR1.WF00.WF00: WIFI Device PCI: 01:00.0
1732 17:53:03.871633 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1733 17:53:03.875280 CBFS: Locating 'pci1002,15d8,ea.rom'
1734 17:53:03.878206 CBFS: 'pci1002,15d8,ea.rom' not found.
1735 17:53:03.881601 Using RV2 VBIOS.
1736 17:53:03.884860 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1737 17:53:03.888476 CBFS: Locating 'pci1002,15dd,c4.rom'
1738 17:53:03.891582 CBFS: Found @ offset 18f9c0 size d400
1739 17:53:03.898152 In CBFS, ROM address for PCI: 03:00.0 = 0xff1a19f8
1740 17:53:03.904705 PCI expansion ROM, signature 0xaa55, INIT size 0xd400, data ptr 0x01b0
1741 17:53:03.908316 PCI ROM image, vendor ID 1002, device ID 15dd,
1742 17:53:03.911331 PCI ROM image, Class Code 030000, Code Type 00
1743 17:53:03.914854 xHCI SSDT generation
1744 17:53:03.918055 xhci_fill_ssdt: Got GPE 31 for PCI: 03:00.3
1745 17:53:03.921266 xHCI Supported Protocol:
1746 17:53:03.924853 Major: 0x2, Minor: 0x0, Protocol: 'USB '
1747 17:53:03.927956 Port Offset: 1, Port Count: 6
1748 17:53:03.928040 xHCI Supported Protocol:
1749 17:53:03.931502 Major: 0x3, Minor: 0x10, Protocol: 'USB '
1750 17:53:03.934807 Port Offset: 7, Port Count: 1
1751 17:53:03.938013 xHCI Supported Protocol:
1752 17:53:03.941348 Major: 0x3, Minor: 0x10, Protocol: 'USB '
1753 17:53:03.944653 Port Offset: 8, Port Count: 1
1754 17:53:03.947887 xHCI Supported Protocol:
1755 17:53:03.951196 Major: 0x3, Minor: 0x10, Protocol: 'USB '
1756 17:53:03.954632 Port Offset: 9, Port Count: 1
1757 17:53:03.954710 xHCI Supported Protocol:
1758 17:53:03.961057 Major: 0x3, Minor: 0x10, Protocol: 'USB '
1759 17:53:03.964236 Port Offset: 10, Port Count: 1
1760 17:53:03.967547 EC returned error result code 1
1761 17:53:03.970824 PS2K: Bad resp from EC. Vivaldi disabled!
1762 17:53:03.974457 \_SB.PCI0.PBRA.ACPD.I2S0: I2S machine driver at GENERIC: 0.0
1763 17:53:03.981080 \_SB.PCI0.PBRA.ACPD.I2S1: I2S machine driver at GENERIC: 1.0
1764 17:53:03.987476 \_SB.PCI0.LPCB.EC0.CREC.TUN0: Cros EC I2C Tunnel at GENERIC: 0.0
1765 17:53:03.994387 \_SB.PCI0.LPCB.EC0.CREC.ECA0: Cros EC audio codec at GENERIC: 0.0
1766 17:53:03.997410 \_SB.PCI0.PBRA.XHC0.RHUB.HS01: Left Type-C Port at USB2 port 0
1767 17:53:04.004066 \_SB.PCI0.PBRA.XHC0.RHUB.HS02: Right Type-C Port at USB2 port 1
1768 17:53:04.010723 \_SB.PCI0.PBRA.XHC0.RHUB.HS03: Left Type-A Port at USB2 port 2
1769 17:53:04.014217 \_SB.PCI0.PBRA.XHC0.RHUB.HS04: Right Type-A Port at USB2 port 3
1770 17:53:04.020689 \_SB.PCI0.PBRA.XHC0.RHUB.HS05: User-Facing Camera at USB2 port 4
1771 17:53:04.024340 \_SB.PCI0.PBRA.XHC0.RHUB.HS06: Bluetooth at USB2 port 5
1772 17:53:04.030833 \_SB.PCI0.PBRA.XHC0.RHUB.SS01: Left Type-C Port at USB3 port 0
1773 17:53:04.037467 \_SB.PCI0.PBRA.XHC0.RHUB.SS02: Right Type-C Port at USB3 port 1
1774 17:53:04.044072 \_SB.PCI0.PBRA.XHC0.RHUB.SS03: Left Type-A Port at USB3 port 2
1775 17:53:04.047486 \_SB.PCI0.PBRA.XHC0.RHUB.SS04: Right Type-A Port at USB3 port 3
1776 17:53:04.054497 \_SB.PCI0.LPCB.EC0.CREC.TUN0.RT58: Realtek RT5682 at I2C: 00:1a
1777 17:53:04.057621 ACPI: added table 2/32, length now 44
1778 17:53:04.057814 ACPI: * MCFG
1779 17:53:04.061082 ACPI: added table 3/32, length now 48
1780 17:53:04.064250 ACPI: * TPM2
1781 17:53:04.067583 TPM2 log created at 0xca51c000
1782 17:53:04.070726 ACPI: added table 4/32, length now 52
1783 17:53:04.070912 ACPI: * MADT
1784 17:53:04.074025 ACPI: added table 5/32, length now 56
1785 17:53:04.077590 current = ca6408c0
1786 17:53:04.080798 ACPI: added table 6/32, length now 60
1787 17:53:04.080944 ACPI: * ALIB (AGESA).
1788 17:53:04.084015 ACPI: added table 7/32, length now 64
1789 17:53:04.100252 ACPI: added table 8/32, length now 68
1790 17:53:04.100372 ACPI: * HPET
1791 17:53:04.103565 ACPI: added table 9/32, length now 72
1792 17:53:04.110032 Copying initialized VBIOS image from 0x000c0000
1793 17:53:04.110117 ACPI: * VFCT at ca646320
1794 17:53:04.113502 ACPI: added table 10/32, length now 76
1795 17:53:04.116917 ACPI: done.
1796 17:53:04.117005 ACPI tables: 104336 bytes.
1797 17:53:04.120192 smbios_write_tables: ca51b000
1798 17:53:04.123482 EC returned error result code 3
1799 17:53:04.126773 Couldn't obtain OEM name from CBI
1800 17:53:04.130244 Create SMBIOS type 16
1801 17:53:04.130358 Create SMBIOS type 17
1802 17:53:04.133425 PCI: 01:00.0 (WIFI Device)
1803 17:53:04.136545 SMBIOS tables: 869 bytes.
1804 17:53:04.140327 Writing table forward entry at 0x00000500
1805 17:53:04.146819 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 5578
1806 17:53:04.150110 Writing coreboot table at 0xca65e000
1807 17:53:04.153463 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1808 17:53:04.156955 1. 0000000000001000-000000000009ffff: RAM
1809 17:53:04.163224 2. 00000000000a0000-00000000000fffff: RESERVED
1810 17:53:04.166592 3. 0000000000100000-0000000001ffffff: RAM
1811 17:53:04.169917 4. 0000000002000000-00000000021bffff: RESERVED
1812 17:53:04.173487 5. 00000000021c0000-00000000ca51afff: RAM
1813 17:53:04.180300 6. 00000000ca51b000-00000000ca6b5fff: CONFIGURATION TABLES
1814 17:53:04.183438 7. 00000000ca6b6000-00000000ca7c7fff: RAMSTAGE
1815 17:53:04.190110 8. 00000000ca7c8000-00000000cb7fffff: CONFIGURATION TABLES
1816 17:53:04.193125 9. 00000000cb800000-00000000cfffffff: RESERVED
1817 17:53:04.196697 10. 00000000f8000000-00000000fbffffff: RESERVED
1818 17:53:04.199760 11. 0000000100000000-000000022f33ffff: RAM
1819 17:53:04.206557 12. 000000022f340000-000000022fffffff: RESERVED
1820 17:53:04.209841 Passing 3 GPIOs to payload:
1821 17:53:04.213363 NAME | PORT | POLARITY | VALUE
1822 17:53:04.216582 lid | undefined | high | high
1823 17:53:04.223295 power | undefined | high | low
1824 17:53:04.226427 EC in RW | 0x0000000b | high | high
1825 17:53:04.233162 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1826 17:53:04.236482 Wrote coreboot table at: 0xca65e000, 0x528 bytes, checksum 78dd
1827 17:53:04.239519 coreboot table: 1344 bytes.
1828 17:53:04.243086 IMD ROOT 0. 0xcb7ff000 0x00001000
1829 17:53:04.246291 IMD SMALL 1. 0xcb7fe000 0x00001000
1830 17:53:04.249737 FSP MEMORY 2. 0xca7fe000 0x01000000
1831 17:53:04.253044 CONSOLE 3. 0xca7de000 0x00020000
1832 17:53:04.256238 FMAP 4. 0xca7dd000 0x00000452
1833 17:53:04.259861 TIME STAMP 5. 0xca7dc000 0x00000910
1834 17:53:04.263209 VBOOT WORK 6. 0xca7c8000 0x00014000
1835 17:53:04.266373 RAMSTAGE 7. 0xca6b5000 0x00113000
1836 17:53:04.269590 REFCODE 8. 0xca677000 0x0003e000
1837 17:53:04.273209 ACPI GNVS 9. 0xca676000 0x00001000
1838 17:53:04.276529 SMM BACKUP 10. 0xca666000 0x00010000
1839 17:53:04.279843 COREBOOT 11. 0xca65e000 0x00008000
1840 17:53:04.283191 ACPI 12. 0xca63a000 0x00024000
1841 17:53:04.286476 RAMOOPS 13. 0xca53a000 0x00100000
1842 17:53:04.289954 VGA ROM #0 14. 0xca52c000 0x0000d400
1843 17:53:04.293370 TPM2 TCGLOG15. 0xca51c000 0x00010000
1844 17:53:04.296395 SMBIOS 16. 0xca51b000 0x00000800
1845 17:53:04.299719 IMD small region:
1846 17:53:04.302987 IMD ROOT 0. 0xcb7fec00 0x00000400
1847 17:53:04.306617 FSP RUNTIME 1. 0xcb7febe0 0x00000004
1848 17:53:04.309647 VPD 2. 0xcb7feb80 0x00000058
1849 17:53:04.313195 POWER STATE 3. 0xcb7feb40 0x00000030
1850 17:53:04.316501 ROMSTAGE 4. 0xcb7feb20 0x00000004
1851 17:53:04.319881 EARLY DRAM USAGE 5. 0xcb7feb00 0x00000008
1852 17:53:04.323111 MEM INFO 6. 0xcb7fe920 0x000001e0
1853 17:53:04.329567 BS: BS_WRITE_TABLES run times (exec / console): 14 / 560 ms
1854 17:53:04.332938 Probing TPM I2C: done! DID_VID 0x00281ae0
1855 17:53:04.336079 Locality already claimed
1856 17:53:04.339657 cr50 TPM 2.0 (i2c 3:0x50 id 0x28)
1857 17:53:04.339798 Checking cr50 for pending updates
1858 17:53:04.351560 Reading cr50 TPM mode
1859 17:53:04.365693 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 14 ms
1860 17:53:04.365869 POST: 0x7a
1861 17:53:04.372380 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1862 17:53:04.375374 CBFS: Locating 'fallback/payload'
1863 17:53:04.378705 CBFS: Found @ offset 1c9a40 size 2335d
1864 17:53:04.381957 Checking segment from ROM address 0xff1dba78
1865 17:53:04.385470 Checking segment from ROM address 0xff1dba94
1866 17:53:04.388755 Loading segment from ROM address 0xff1dba78
1867 17:53:04.391921 code (compression=1)
1868 17:53:04.398723 New segment dstaddr 0x30000000 memsize 0x10651f0 srcaddr 0xff1dbab0 filesize 0x23325
1869 17:53:04.408629 Loading Segment: addr: 0x30000000 memsz: 0x00000000010651f0 filesz: 0x0000000000023325
1870 17:53:04.408729 using LZMA
1871 17:53:04.449078 [ 0x30000000, 3004d29c, 0x310651f0) <- ff1dbab0
1872 17:53:04.455881 Clearing Segment: addr: 0x000000003004d29c memsz: 0x0000000001017f54
1873 17:53:04.462584 Loading segment from ROM address 0xff1dba94
1874 17:53:04.462694 Entry Point 0x30000000
1875 17:53:04.466034 Loaded segments
1876 17:53:04.468827 BS: BS_PAYLOAD_LOAD run times (exec / console): 39 / 60 ms
1877 17:53:04.472669 0x00000040: notify_params->phase
1878 17:53:04.475796 Calling FspNotify: 0xca6773b8
1879 17:53:04.479375 0xca6fff6c: notify_params
1880 17:53:04.479521 POST: 0x95
1881 17:53:04.483977 POST: 0x95
1882 17:53:04.487330 FspNotify returned 0x00000000
1883 17:53:04.490839 0x000000f0: notify_params->phase
1884 17:53:04.490985 Calling FspNotify: 0xca6773b8
1885 17:53:04.494240 0xca6fff7c: notify_params
1886 17:53:04.494360 POST: 0x88
1887 17:53:04.497432 POST: 0x89
1888 17:53:04.500556 FspNotify returned 0x00000000
1889 17:53:04.500663 Lock SMM configuration
1890 17:53:04.500759 POST: 0xfe
1891 17:53:04.507469 BS: BS_PAYLOAD_LOAD exit times (exec / console): 3 / 29 ms
1892 17:53:04.510601 PSP: Notify that POST is finishing... OK
1893 17:53:04.517388 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 4 ms
1894 17:53:04.517503 POST: 0x7b
1895 17:53:04.520510 mp_park_aps done after 0 msecs.
1896 17:53:04.523806 Jumping to boot code at 0x30000000(0xca65e000)
1897 17:53:04.527172 POST: 0xf8
1898 17:53:04.533673 CPU0: stack: 0xca6ff000 - 0xca700000, lowest used address 0xca6ff92c, stack used: 1748 bytes
1899 17:53:04.533795
1900 17:53:04.533942
1901 17:53:04.534072
1902 17:53:04.537114 Starting depthcharge on Shuboz...
1903 17:53:04.537230
1904 17:53:04.537630 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1905 17:53:04.537794 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
1906 17:53:04.537925 Setting prompt string to ['zork:']
1907 17:53:04.538040 bootloader-commands: Wait for prompt ['zork:'] (timeout 00:04:46)
1908 17:53:04.543874 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1909 17:53:04.544037
1910 17:53:04.550379 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1911 17:53:04.550530
1912 17:53:04.553947 new_rt5682_codec: chip = 0x1A
1913 17:53:04.569128
1914 17:53:04.572292 Looking for NVMe Controller 0x300617a8 @ 00:01:07
1915 17:53:04.572375
1916 17:53:04.572444 Wipe memory regions:
1917 17:53:04.572560
1918 17:53:04.575501 [0x00000000001000, 0x000000000a0000)
1919 17:53:04.575608
1920 17:53:04.579030 [0x00000000100000, 0x00000002000000)
1921 17:53:04.588154
1922 17:53:04.588270 [0x000000021c0000, 0x00000030000000)
1923 17:53:04.741663
1924 17:53:04.741852 [0x000000310651f0, 0x000000ca51b000)
1925 17:53:05.243126
1926 17:53:05.243317 [0x00000100000000, 0x0000022f340000)
1927 17:53:06.730810
1928 17:53:06.731311 R8152: Initializing
1929 17:53:06.731646
1930 17:53:06.733602 Version 6 (ocp_data = 5c30)
1931 17:53:06.734122
1932 17:53:06.737085 R8152: Done initializing
1933 17:53:06.737596
1934 17:53:06.738061 Adding net device
1935 17:53:07.040606
1936 17:53:07.043481 [firmware-zork-13434.B-collabora] Oct 13 2022 14:21:34
1937 17:53:07.044235
1938 17:53:07.044791
1939 17:53:07.045146
1940 17:53:07.045963 Setting prompt string to ['zork:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1942 17:53:07.147122 zork: tftpboot 192.168.201.1 11712686/tftp-deploy-9j92yy2v/kernel/bzImage 11712686/tftp-deploy-9j92yy2v/kernel/cmdline 11712686/tftp-deploy-9j92yy2v/ramdisk/ramdisk.cpio.gz
1943 17:53:07.147815 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1944 17:53:07.148399 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
1945 17:53:07.152301 tftpboot 192.168.201.1 11712686/tftp-deploy-9j92yy2v/kernel/bzImagey2v/kernel/cmdline 11712686/tftp-deply-9j92yy2v/ramdisk/ramdisk.cpio.gz
1946 17:53:07.152815
1947 17:53:07.153181 Waiting for link
1948 17:53:07.354115
1949 17:53:07.354265 done.
1950 17:53:07.354341
1951 17:53:07.354403 MAC: 00:24:32:30:7b:7b
1952 17:53:07.354472
1953 17:53:07.357575 Sending DHCP discover... done.
1954 17:53:07.357658
1955 17:53:07.360574 Waiting for reply... done.
1956 17:53:07.360735
1957 17:53:07.364068 Sending DHCP request... done.
1958 17:53:07.364143
1959 17:53:07.367969 Waiting for reply... done.
1960 17:53:07.368050
1961 17:53:07.368117 My ip is 192.168.201.16
1962 17:53:07.368177
1963 17:53:07.371162 The DHCP server ip is 192.168.201.1
1964 17:53:07.371237
1965 17:53:07.377973 TFTP server IP predefined by user: 192.168.201.1
1966 17:53:07.378049
1967 17:53:07.384470 Bootfile predefined by user: 11712686/tftp-deploy-9j92yy2v/kernel/bzImage
1968 17:53:07.384543
1969 17:53:07.387497 Sending tftp read request... done.
1970 17:53:07.387573
1971 17:53:07.391430 Waiting for the transfer...
1972 17:53:07.391502
1973 17:53:07.998109 00000000 ################################################################
1974 17:53:07.998253
1975 17:53:08.583497 00080000 ################################################################
1976 17:53:08.583640
1977 17:53:09.244835 00100000 ################################################################
1978 17:53:09.244978
1979 17:53:09.850526 00180000 ################################################################
1980 17:53:09.850687
1981 17:53:10.394171 00200000 ################################################################
1982 17:53:10.394305
1983 17:53:10.932414 00280000 ################################################################
1984 17:53:10.932580
1985 17:53:11.475533 00300000 ################################################################
1986 17:53:11.475673
1987 17:53:12.060965 00380000 ################################################################
1988 17:53:12.061131
1989 17:53:12.614038 00400000 ################################################################
1990 17:53:12.614188
1991 17:53:13.180633 00480000 ################################################################
1992 17:53:13.180780
1993 17:53:13.740103 00500000 ################################################################
1994 17:53:13.740241
1995 17:53:14.365668 00580000 ################################################################
1996 17:53:14.365880
1997 17:53:14.938295 00600000 ################################################################
1998 17:53:14.938454
1999 17:53:15.516063 00680000 ################################################################
2000 17:53:15.516214
2001 17:53:16.100628 00700000 ################################################################
2002 17:53:16.100777
2003 17:53:16.646815 00780000 ################################################################
2004 17:53:16.646959
2005 17:53:16.766129 00800000 ############# done.
2006 17:53:16.766272
2007 17:53:16.769291 The bootfile was 8490896 bytes long.
2008 17:53:16.769391
2009 17:53:16.772870 Sending tftp read request... done.
2010 17:53:16.772954
2011 17:53:16.773023 Waiting for the transfer...
2012 17:53:16.773084
2013 17:53:17.319770 00000000 ################################################################
2014 17:53:17.319909
2015 17:53:17.886389 00080000 ################################################################
2016 17:53:17.886563
2017 17:53:18.465440 00100000 ################################################################
2018 17:53:18.465655
2019 17:53:19.047878 00180000 ################################################################
2020 17:53:19.048380
2021 17:53:19.725029 00200000 ################################################################
2022 17:53:19.725855
2023 17:53:20.294503 00280000 ################################################################
2024 17:53:20.294652
2025 17:53:20.854098 00300000 ################################################################
2026 17:53:20.854243
2027 17:53:21.412170 00380000 ################################################################
2028 17:53:21.412310
2029 17:53:21.956285 00400000 ################################################################
2030 17:53:21.956449
2031 17:53:22.504483 00480000 ################################################################
2032 17:53:22.504635
2033 17:53:23.064371 00500000 ################################################################
2034 17:53:23.064529
2035 17:53:23.625632 00580000 ################################################################
2036 17:53:23.625820
2037 17:53:24.172830 00600000 ################################################################
2038 17:53:24.173003
2039 17:53:24.767724 00680000 ################################################################
2040 17:53:24.767904
2041 17:53:25.346716 00700000 ################################################################
2042 17:53:25.346898
2043 17:53:25.890272 00780000 ################################################################
2044 17:53:25.890432
2045 17:53:26.326322 00800000 ##################################################### done.
2046 17:53:26.326497
2047 17:53:26.329442 Sending tftp read request... done.
2048 17:53:26.329555
2049 17:53:26.332681 Waiting for the transfer...
2050 17:53:26.332789
2051 17:53:26.332886 00000000 # done.
2052 17:53:26.332980
2053 17:53:26.342702 Command line loaded dynamically from TFTP file: 11712686/tftp-deploy-9j92yy2v/kernel/cmdline
2054 17:53:26.342812
2055 17:53:26.356054 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2056 17:53:26.356162
2057 17:53:26.359361 ec_init: CrosEC protocol v3 supported (256, 256)
2058 17:53:26.367591
2059 17:53:26.367697 Shutting down all USB controllers.
2060 17:53:26.367791
2061 17:53:26.370893 Removing current net device
2062 17:53:26.371001
2063 17:53:26.374253 Finalizing coreboot
2064 17:53:26.374369
2065 17:53:26.374470
2066 17:53:26.374561
2067 17:53:26.380716 coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 smm starting (log level: 8)...
2068 17:53:26.380823
2069 17:53:26.380898 SMI# #3
2070 17:53:26.387189 Exiting depthcharge with code 4 at timestamp: 29448093
2071 17:53:26.387291
2072 17:53:26.387389
2073 17:53:26.387480 Starting kernel ...
2074 17:53:26.387570
2075 17:53:26.387655
2076 17:53:26.388277 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2077 17:53:26.388411 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2078 17:53:26.388516 Setting prompt string to ['Linux version [0-9]']
2079 17:53:26.388619 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 17:53:26.388722 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2081 17:53:26.740176
2082 17:53:26.740354
2083 17:53:26.740486
2084 17:53:26.746878 coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 smm starting (log level: 8)...
2085 17:53:26.746959
2086 17:53:26.747022 SMI# #0
2087 17:53:26.750171 Chrome EC: Set SMI mask to 0x0000000000000000
2088 17:53:26.753549 Chrome EC: UHEPI supported
2089 17:53:26.760032 Clearing pending EC events. Error code EC_RES_UNAVAILABLE(9) is expected.
2090 17:53:26.763356 EC returned error result code 9
2091 17:53:26.766657 Chrome EC: Set SCI mask to 0x00000000142609fb
2093 17:57:51.388803 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2095 17:57:51.389377 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2097 17:57:51.389802 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2100 17:57:51.390557 end: 2 depthcharge-action (duration 00:05:00) [common]
2102 17:57:51.391194 Cleaning after the job
2103 17:57:51.391416 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712686/tftp-deploy-9j92yy2v/ramdisk
2104 17:57:51.393776 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712686/tftp-deploy-9j92yy2v/kernel
2105 17:57:51.396184 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712686/tftp-deploy-9j92yy2v/modules
2106 17:57:51.397100 start: 5.1 power-off (timeout 00:00:30) [common]
2107 17:57:51.397628 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-CM1400CXA-dalboz-cbg-8' '--port=1' '--command=off'
2108 17:57:51.492182 >> Command sent successfully.
2109 17:57:51.494612 Returned 0 in 0 seconds
2110 17:57:51.595377 end: 5.1 power-off (duration 00:00:00) [common]
2112 17:57:51.597356 start: 5.2 read-feedback (timeout 00:10:00) [common]
2113 17:57:51.598847 Listened to connection for namespace 'common' for up to 1s
2114 17:57:51.599963 Listened to connection for namespace 'common' for up to 1s
2115 17:57:52.599414 Finalising connection for namespace 'common'
2116 17:57:52.600021 Disconnecting from shell: Finalise
2117 17:57:52.600402
2118 17:57:52.701158 end: 5.2 read-feedback (duration 00:00:01) [common]
2119 17:57:52.701346 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712686
2120 17:57:52.720806 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712686
2121 17:57:52.721005 JobError: Your job cannot terminate cleanly.