Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:56:54.724878 lava-dispatcher, installed at version: 2023.08
2 17:56:54.725091 start: 0 validate
3 17:56:54.725224 Start time: 2023-10-09 17:56:54.725216+00:00 (UTC)
4 17:56:54.725348 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:56:54.725479 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:56:54.994903 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:56:54.995074 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:56:55.261694 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:56:55.261869 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:56:55.529576 validate duration: 0.80
12 17:56:55.529875 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:56:55.529982 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:56:55.530088 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:56:55.530255 Not decompressing ramdisk as can be used compressed.
16 17:56:55.530344 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:56:55.530408 saving as /var/lib/lava/dispatcher/tmp/11712675/tftp-deploy-2t_81_k8/ramdisk/rootfs.cpio.gz
18 17:56:55.530472 total size: 8418130 (8 MB)
19 17:56:55.531629 progress 0 % (0 MB)
20 17:56:55.534053 progress 5 % (0 MB)
21 17:56:55.536369 progress 10 % (0 MB)
22 17:56:55.538841 progress 15 % (1 MB)
23 17:56:55.541520 progress 20 % (1 MB)
24 17:56:55.544085 progress 25 % (2 MB)
25 17:56:55.546629 progress 30 % (2 MB)
26 17:56:55.548966 progress 35 % (2 MB)
27 17:56:55.551657 progress 40 % (3 MB)
28 17:56:55.554374 progress 45 % (3 MB)
29 17:56:55.556796 progress 50 % (4 MB)
30 17:56:55.559138 progress 55 % (4 MB)
31 17:56:55.561618 progress 60 % (4 MB)
32 17:56:55.563831 progress 65 % (5 MB)
33 17:56:55.566393 progress 70 % (5 MB)
34 17:56:55.568790 progress 75 % (6 MB)
35 17:56:55.571297 progress 80 % (6 MB)
36 17:56:55.573864 progress 85 % (6 MB)
37 17:56:55.576481 progress 90 % (7 MB)
38 17:56:55.578908 progress 95 % (7 MB)
39 17:56:55.581011 progress 100 % (8 MB)
40 17:56:55.581242 8 MB downloaded in 0.05 s (158.13 MB/s)
41 17:56:55.581404 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:56:55.581639 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:56:55.581725 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:56:55.581811 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:56:55.581958 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:56:55.582033 saving as /var/lib/lava/dispatcher/tmp/11712675/tftp-deploy-2t_81_k8/kernel/bzImage
48 17:56:55.582093 total size: 8490896 (8 MB)
49 17:56:55.582153 No compression specified
50 17:56:55.583370 progress 0 % (0 MB)
51 17:56:55.585625 progress 5 % (0 MB)
52 17:56:55.587971 progress 10 % (0 MB)
53 17:56:55.590295 progress 15 % (1 MB)
54 17:56:55.592677 progress 20 % (1 MB)
55 17:56:55.595063 progress 25 % (2 MB)
56 17:56:55.597769 progress 30 % (2 MB)
57 17:56:55.600142 progress 35 % (2 MB)
58 17:56:55.602486 progress 40 % (3 MB)
59 17:56:55.604868 progress 45 % (3 MB)
60 17:56:55.607181 progress 50 % (4 MB)
61 17:56:55.609454 progress 55 % (4 MB)
62 17:56:55.611751 progress 60 % (4 MB)
63 17:56:55.614009 progress 65 % (5 MB)
64 17:56:55.616338 progress 70 % (5 MB)
65 17:56:55.618683 progress 75 % (6 MB)
66 17:56:55.620941 progress 80 % (6 MB)
67 17:56:55.623229 progress 85 % (6 MB)
68 17:56:55.625507 progress 90 % (7 MB)
69 17:56:55.627771 progress 95 % (7 MB)
70 17:56:55.630048 progress 100 % (8 MB)
71 17:56:55.630165 8 MB downloaded in 0.05 s (168.46 MB/s)
72 17:56:55.630314 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:56:55.630568 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:56:55.630658 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:56:55.630743 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:56:55.630897 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:56:55.630972 saving as /var/lib/lava/dispatcher/tmp/11712675/tftp-deploy-2t_81_k8/modules/modules.tar
79 17:56:55.631034 total size: 250868 (0 MB)
80 17:56:55.631097 Using unxz to decompress xz
81 17:56:55.635443 progress 13 % (0 MB)
82 17:56:55.635878 progress 26 % (0 MB)
83 17:56:55.636129 progress 39 % (0 MB)
84 17:56:55.637718 progress 52 % (0 MB)
85 17:56:55.639631 progress 65 % (0 MB)
86 17:56:55.641593 progress 78 % (0 MB)
87 17:56:55.643552 progress 91 % (0 MB)
88 17:56:55.645337 progress 100 % (0 MB)
89 17:56:55.651164 0 MB downloaded in 0.02 s (11.89 MB/s)
90 17:56:55.651421 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:56:55.651695 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:56:55.651791 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:56:55.651892 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:56:55.651974 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:56:55.652065 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:56:55.652300 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n
98 17:56:55.652450 makedir: /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin
99 17:56:55.652566 makedir: /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/tests
100 17:56:55.652672 makedir: /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/results
101 17:56:55.652795 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-add-keys
102 17:56:55.652950 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-add-sources
103 17:56:55.653087 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-background-process-start
104 17:56:55.653225 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-background-process-stop
105 17:56:55.653356 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-common-functions
106 17:56:55.653487 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-echo-ipv4
107 17:56:55.653617 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-install-packages
108 17:56:55.653763 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-installed-packages
109 17:56:55.653894 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-os-build
110 17:56:55.654024 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-probe-channel
111 17:56:55.654153 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-probe-ip
112 17:56:55.654285 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-target-ip
113 17:56:55.654414 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-target-mac
114 17:56:55.654555 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-target-storage
115 17:56:55.654693 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-test-case
116 17:56:55.654854 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-test-event
117 17:56:55.654986 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-test-feedback
118 17:56:55.655116 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-test-raise
119 17:56:55.655251 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-test-reference
120 17:56:55.655385 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-test-runner
121 17:56:55.655516 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-test-set
122 17:56:55.655647 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-test-shell
123 17:56:55.655780 Updating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-install-packages (oe)
124 17:56:55.655956 Updating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/bin/lava-installed-packages (oe)
125 17:56:55.656090 Creating /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/environment
126 17:56:55.656199 LAVA metadata
127 17:56:55.656277 - LAVA_JOB_ID=11712675
128 17:56:55.656347 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:56:55.656464 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:56:55.656533 skipped lava-vland-overlay
131 17:56:55.656614 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:56:55.656696 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:56:55.656763 skipped lava-multinode-overlay
134 17:56:55.656840 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:56:55.656923 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:56:55.657006 Loading test definitions
137 17:56:55.657105 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:56:55.657196 Using /lava-11712675 at stage 0
139 17:56:55.657540 uuid=11712675_1.4.2.3.1 testdef=None
140 17:56:55.657631 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:56:55.657719 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:56:55.658277 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:56:55.658507 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:56:55.659184 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:56:55.659416 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:56:55.660063 runner path: /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/0/tests/0_dmesg test_uuid 11712675_1.4.2.3.1
149 17:56:55.660224 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:56:55.660453 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 17:56:55.660526 Using /lava-11712675 at stage 1
153 17:56:55.660844 uuid=11712675_1.4.2.3.5 testdef=None
154 17:56:55.660933 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:56:55.661018 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 17:56:55.661508 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:56:55.661724 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 17:56:55.662387 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:56:55.662629 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 17:56:55.663284 runner path: /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/1/tests/1_bootrr test_uuid 11712675_1.4.2.3.5
163 17:56:55.663440 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:56:55.663647 Creating lava-test-runner.conf files
166 17:56:55.663710 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/0 for stage 0
167 17:56:55.663801 - 0_dmesg
168 17:56:55.663883 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712675/lava-overlay-ls2u9a8n/lava-11712675/1 for stage 1
169 17:56:55.663976 - 1_bootrr
170 17:56:55.664072 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:56:55.664159 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 17:56:55.672921 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:56:55.673030 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 17:56:55.673153 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:56:55.673246 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:56:55.673343 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 17:56:55.932345 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:56:55.932744 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 17:56:55.932866 extracting modules file /var/lib/lava/dispatcher/tmp/11712675/tftp-deploy-2t_81_k8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712675/extract-overlay-ramdisk-z6mpcoyf/ramdisk
180 17:56:55.946773 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:56:55.946908 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 17:56:55.947005 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712675/compress-overlay-6ilfg9nb/overlay-1.4.2.4.tar.gz to ramdisk
183 17:56:55.947079 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712675/compress-overlay-6ilfg9nb/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712675/extract-overlay-ramdisk-z6mpcoyf/ramdisk
184 17:56:55.958354 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:56:55.958514 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 17:56:55.958629 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:56:55.958722 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 17:56:55.958804 Building ramdisk /var/lib/lava/dispatcher/tmp/11712675/extract-overlay-ramdisk-z6mpcoyf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712675/extract-overlay-ramdisk-z6mpcoyf/ramdisk
189 17:56:56.105416 >> 49788 blocks
190 17:56:56.992972 rename /var/lib/lava/dispatcher/tmp/11712675/extract-overlay-ramdisk-z6mpcoyf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712675/tftp-deploy-2t_81_k8/ramdisk/ramdisk.cpio.gz
191 17:56:56.993419 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:56:56.993557 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 17:56:56.993664 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 17:56:56.993764 No mkimage arch provided, not using FIT.
195 17:56:56.993855 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:56:56.993943 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:56:56.994050 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:56:56.994142 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 17:56:56.994225 No LXC device requested
200 17:56:56.994303 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:56:56.994392 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 17:56:56.994469 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:56:56.994589 Checking files for TFTP limit of 4294967296 bytes.
204 17:56:56.995003 end: 1 tftp-deploy (duration 00:00:01) [common]
205 17:56:56.995106 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:56:56.995197 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:56:56.995317 substitutions:
208 17:56:56.995383 - {DTB}: None
209 17:56:56.995443 - {INITRD}: 11712675/tftp-deploy-2t_81_k8/ramdisk/ramdisk.cpio.gz
210 17:56:56.995502 - {KERNEL}: 11712675/tftp-deploy-2t_81_k8/kernel/bzImage
211 17:56:56.995558 - {LAVA_MAC}: None
212 17:56:56.995614 - {PRESEED_CONFIG}: None
213 17:56:56.995668 - {PRESEED_LOCAL}: None
214 17:56:56.995723 - {RAMDISK}: 11712675/tftp-deploy-2t_81_k8/ramdisk/ramdisk.cpio.gz
215 17:56:56.995777 - {ROOT_PART}: None
216 17:56:56.995830 - {ROOT}: None
217 17:56:56.995886 - {SERVER_IP}: 192.168.201.1
218 17:56:56.995940 - {TEE}: None
219 17:56:56.995994 Parsed boot commands:
220 17:56:56.996047 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:56:56.996227 Parsed boot commands: tftpboot 192.168.201.1 11712675/tftp-deploy-2t_81_k8/kernel/bzImage 11712675/tftp-deploy-2t_81_k8/kernel/cmdline 11712675/tftp-deploy-2t_81_k8/ramdisk/ramdisk.cpio.gz
222 17:56:56.996315 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:56:56.996401 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:56:56.996491 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:56:56.996572 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:56:56.996642 Not connected, no need to disconnect.
227 17:56:56.996715 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:56:56.996794 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:56:56.996863 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-10'
230 17:56:57.000918 Setting prompt string to ['lava-test: # ']
231 17:56:57.001282 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:56:57.001388 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:56:57.001483 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:56:57.001626 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:56:57.001855 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
236 17:57:02.137455 >> Command sent successfully.
237 17:57:02.140100 Returned 0 in 5 seconds
238 17:57:02.240493 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 17:57:02.240816 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 17:57:02.240919 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 17:57:02.241009 Setting prompt string to 'Starting depthcharge on Voema...'
243 17:57:02.241076 Changing prompt to 'Starting depthcharge on Voema...'
244 17:57:02.241141 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 17:57:02.241408 [Enter `^Ec?' for help]
246 17:57:03.803037
247 17:57:03.803209
248 17:57:03.813353 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 17:57:03.817324 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
250 17:57:03.820858 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 17:57:03.828663 CPU: AES supported, TXT NOT supported, VT supported
252 17:57:03.832619 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 17:57:03.839822 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 17:57:03.843124 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 17:57:03.846502 VBOOT: Loading verstage.
256 17:57:03.850345 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 17:57:03.854374 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 17:57:03.861257 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 17:57:03.868922 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 17:57:03.876355 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 17:57:03.876457
262 17:57:03.876522
263 17:57:03.887172 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 17:57:03.902906 Probing TPM: . done!
265 17:57:03.906437 TPM ready after 0 ms
266 17:57:03.910823 Connected to device vid:did:rid of 1ae0:0028:00
267 17:57:03.922394 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
268 17:57:03.930345 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 17:57:04.015918 Initialized TPM device CR50 revision 0
270 17:57:04.034900 tlcl_send_startup: Startup return code is 0
271 17:57:04.035004 TPM: setup succeeded
272 17:57:04.053349 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 17:57:04.062905 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 17:57:04.074808 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 17:57:04.084551 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 17:57:04.088744 Chrome EC: UHEPI supported
277 17:57:04.091779 Phase 1
278 17:57:04.095158 FMAP: area GBB found @ 1805000 (458752 bytes)
279 17:57:04.104776 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 17:57:04.111608 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 17:57:04.118047 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 17:57:04.124719 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 17:57:04.128160 Recovery requested (1009000e)
284 17:57:04.131252 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 17:57:04.142878 tlcl_extend: response is 0
286 17:57:04.149931 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 17:57:04.159833 tlcl_extend: response is 0
288 17:57:04.166347 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 17:57:04.172928 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 17:57:04.179348 BS: verstage times (exec / console): total (unknown) / 142 ms
291 17:57:04.179434
292 17:57:04.179501
293 17:57:04.192405 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 17:57:04.198972 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 17:57:04.202415 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 17:57:04.209190 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 17:57:04.212281 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 17:57:04.215418 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 17:57:04.219057 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 17:57:04.222199 TCO_STS: 0000 0000
301 17:57:04.225360 GEN_PMCON: d0015038 00002200
302 17:57:04.228534 GBLRST_CAUSE: 00000000 00000000
303 17:57:04.232043 HPR_CAUSE0: 00000000
304 17:57:04.232120 prev_sleep_state 5
305 17:57:04.235133 Boot Count incremented to 21669
306 17:57:04.242097 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 17:57:04.248759 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 17:57:04.258679 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 17:57:04.265383 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 17:57:04.268329 Chrome EC: UHEPI supported
311 17:57:04.275218 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 17:57:04.286425 Probing TPM: done!
313 17:57:04.292701 Connected to device vid:did:rid of 1ae0:0028:00
314 17:57:04.302545 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
315 17:57:04.305965 Initialized TPM device CR50 revision 0
316 17:57:04.321535 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 17:57:04.328977 MRC: Hash idx 0x100b comparison successful.
318 17:57:04.329063 MRC cache found, size faa8
319 17:57:04.332138 bootmode is set to: 2
320 17:57:04.335415 SPD index = 2
321 17:57:04.341740 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 17:57:04.341815 SPD: module type is LPDDR4X
323 17:57:04.349069 SPD: module part number is MT53D1G64D4NW-046
324 17:57:04.355763 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
325 17:57:04.358800 SPD: device width 16 bits, bus width 16 bits
326 17:57:04.362333 SPD: module size is 2048 MB (per channel)
327 17:57:04.792873 CBMEM:
328 17:57:04.796288 IMD: root @ 0x76fff000 254 entries.
329 17:57:04.799367 IMD: root @ 0x76ffec00 62 entries.
330 17:57:04.802960 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 17:57:04.809428 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 17:57:04.812647 External stage cache:
333 17:57:04.815773 IMD: root @ 0x7b3ff000 254 entries.
334 17:57:04.818898 IMD: root @ 0x7b3fec00 62 entries.
335 17:57:04.834643 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 17:57:04.841418 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 17:57:04.847872 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 17:57:04.861594 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 17:57:04.868397 cse_lite: Skip switching to RW in the recovery path
340 17:57:04.868482 8 DIMMs found
341 17:57:04.871784 SMM Memory Map
342 17:57:04.874918 SMRAM : 0x7b000000 0x800000
343 17:57:04.877987 Subregion 0: 0x7b000000 0x200000
344 17:57:04.881702 Subregion 1: 0x7b200000 0x200000
345 17:57:04.884830 Subregion 2: 0x7b400000 0x400000
346 17:57:04.884914 top_of_ram = 0x77000000
347 17:57:04.891159 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 17:57:04.897817 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 17:57:04.901802 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 17:57:04.909046 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 17:57:04.915809 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 17:57:04.922499 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 17:57:04.932205 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 17:57:04.935425 Processing 211 relocs. Offset value of 0x74c0b000
355 17:57:04.944495 BS: romstage times (exec / console): total (unknown) / 277 ms
356 17:57:04.950344
357 17:57:04.950427
358 17:57:04.960132 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 17:57:04.963302 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 17:57:04.973260 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 17:57:04.979941 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 17:57:04.986232 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 17:57:04.992796 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 17:57:05.037275 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 17:57:05.043533 Processing 5008 relocs. Offset value of 0x75d98000
366 17:57:05.050109 BS: postcar times (exec / console): total (unknown) / 59 ms
367 17:57:05.050195
368 17:57:05.050262
369 17:57:05.060126 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 17:57:05.060217 Normal boot
371 17:57:05.063802 FW_CONFIG value is 0x804c02
372 17:57:05.066932 PCI: 00:07.0 disabled by fw_config
373 17:57:05.069912 PCI: 00:07.1 disabled by fw_config
374 17:57:05.076812 PCI: 00:0d.2 disabled by fw_config
375 17:57:05.079718 PCI: 00:1c.7 disabled by fw_config
376 17:57:05.083253 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 17:57:05.089858 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 17:57:05.096656 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 17:57:05.099789 GENERIC: 0.0 disabled by fw_config
380 17:57:05.103283 GENERIC: 1.0 disabled by fw_config
381 17:57:05.106473 fw_config match found: DB_USB=USB3_ACTIVE
382 17:57:05.109492 fw_config match found: DB_USB=USB3_ACTIVE
383 17:57:05.116200 fw_config match found: DB_USB=USB3_ACTIVE
384 17:57:05.119650 fw_config match found: DB_USB=USB3_ACTIVE
385 17:57:05.122860 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 17:57:05.132791 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 17:57:05.139196 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 17:57:05.145810 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 17:57:05.152598 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 17:57:05.155631 microcode: Update skipped, already up-to-date
391 17:57:05.162209 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 17:57:05.191018 Detected 4 core, 8 thread CPU.
393 17:57:05.194141 Setting up SMI for CPU
394 17:57:05.197266 IED base = 0x7b400000
395 17:57:05.200943 IED size = 0x00400000
396 17:57:05.201027 Will perform SMM setup.
397 17:57:05.207211 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
398 17:57:05.213920 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 17:57:05.220143 Processing 16 relocs. Offset value of 0x00030000
400 17:57:05.223500 Attempting to start 7 APs
401 17:57:05.226670 Waiting for 10ms after sending INIT.
402 17:57:05.242462 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 17:57:05.242621 done.
404 17:57:05.245694 AP: slot 7 apic_id 3.
405 17:57:05.249194 AP: slot 4 apic_id 2.
406 17:57:05.252271 Waiting for 2nd SIPI to complete...done.
407 17:57:05.255907 AP: slot 5 apic_id 5.
408 17:57:05.256006 AP: slot 2 apic_id 4.
409 17:57:05.259015 AP: slot 6 apic_id 6.
410 17:57:05.262110 AP: slot 3 apic_id 7.
411 17:57:05.268804 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 17:57:05.275323 Processing 13 relocs. Offset value of 0x00038000
413 17:57:05.278840 Unable to locate Global NVS
414 17:57:05.285191 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 17:57:05.288753 Installing permanent SMM handler to 0x7b000000
416 17:57:05.298183 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 17:57:05.301877 Processing 794 relocs. Offset value of 0x7b010000
418 17:57:05.311393 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 17:57:05.315020 Processing 13 relocs. Offset value of 0x7b008000
420 17:57:05.321570 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 17:57:05.327860 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 17:57:05.334444 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 17:57:05.340955 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 17:57:05.344244 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 17:57:05.350927 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 17:57:05.357749 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 17:57:05.360888 Unable to locate Global NVS
428 17:57:05.367333 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 17:57:05.370872 Clearing SMI status registers
430 17:57:05.373887 SMI_STS: PM1
431 17:57:05.373970 PM1_STS: PWRBTN
432 17:57:05.384000 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 17:57:05.384083 In relocation handler: CPU 0
434 17:57:05.390714 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 17:57:05.393627 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 17:57:05.396861 Relocation complete.
437 17:57:05.403496 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 17:57:05.406722 In relocation handler: CPU 1
439 17:57:05.410436 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 17:57:05.413602 Relocation complete.
441 17:57:05.419890 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
442 17:57:05.423530 In relocation handler: CPU 7
443 17:57:05.426514 New SMBASE=0x7affe400 IEDBASE=0x7b400000
444 17:57:05.430076 Relocation complete.
445 17:57:05.436852 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
446 17:57:05.439779 In relocation handler: CPU 4
447 17:57:05.443119 New SMBASE=0x7afff000 IEDBASE=0x7b400000
448 17:57:05.449482 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 17:57:05.449569 Relocation complete.
450 17:57:05.459311 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
451 17:57:05.459402 In relocation handler: CPU 6
452 17:57:05.466084 New SMBASE=0x7affe800 IEDBASE=0x7b400000
453 17:57:05.469521 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 17:57:05.472500 Relocation complete.
455 17:57:05.479039 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
456 17:57:05.482486 In relocation handler: CPU 3
457 17:57:05.485615 New SMBASE=0x7afff400 IEDBASE=0x7b400000
458 17:57:05.489272 Relocation complete.
459 17:57:05.495779 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
460 17:57:05.498889 In relocation handler: CPU 5
461 17:57:05.502482 New SMBASE=0x7affec00 IEDBASE=0x7b400000
462 17:57:05.505607 Relocation complete.
463 17:57:05.511876 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
464 17:57:05.515547 In relocation handler: CPU 2
465 17:57:05.518791 New SMBASE=0x7afff800 IEDBASE=0x7b400000
466 17:57:05.524961 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 17:57:05.525085 Relocation complete.
468 17:57:05.528805 Initializing CPU #0
469 17:57:05.531766 CPU: vendor Intel device 806c1
470 17:57:05.535352 CPU: family 06, model 8c, stepping 01
471 17:57:05.538430 Clearing out pending MCEs
472 17:57:05.541610 Setting up local APIC...
473 17:57:05.545205 apic_id: 0x00 done.
474 17:57:05.545283 Turbo is available but hidden
475 17:57:05.548281 Turbo is available and visible
476 17:57:05.555080 microcode: Update skipped, already up-to-date
477 17:57:05.555159 CPU #0 initialized
478 17:57:05.558183 Initializing CPU #4
479 17:57:05.561339 Initializing CPU #7
480 17:57:05.564426 CPU: vendor Intel device 806c1
481 17:57:05.568509 CPU: family 06, model 8c, stepping 01
482 17:57:05.572089 CPU: vendor Intel device 806c1
483 17:57:05.575628 CPU: family 06, model 8c, stepping 01
484 17:57:05.575704 Clearing out pending MCEs
485 17:57:05.578869 Clearing out pending MCEs
486 17:57:05.582062 Setting up local APIC...
487 17:57:05.585198 Initializing CPU #1
488 17:57:05.585274 Initializing CPU #5
489 17:57:05.588521 Initializing CPU #2
490 17:57:05.592017 CPU: vendor Intel device 806c1
491 17:57:05.595303 CPU: family 06, model 8c, stepping 01
492 17:57:05.598364 apic_id: 0x02 done.
493 17:57:05.601786 CPU: vendor Intel device 806c1
494 17:57:05.604906 CPU: family 06, model 8c, stepping 01
495 17:57:05.608570 microcode: Update skipped, already up-to-date
496 17:57:05.611611 Setting up local APIC...
497 17:57:05.614828 Clearing out pending MCEs
498 17:57:05.618427 CPU: vendor Intel device 806c1
499 17:57:05.621594 CPU: family 06, model 8c, stepping 01
500 17:57:05.624735 Setting up local APIC...
501 17:57:05.624810 Initializing CPU #3
502 17:57:05.628378 Initializing CPU #6
503 17:57:05.631483 CPU: vendor Intel device 806c1
504 17:57:05.634592 CPU: family 06, model 8c, stepping 01
505 17:57:05.638078 CPU: vendor Intel device 806c1
506 17:57:05.641331 CPU: family 06, model 8c, stepping 01
507 17:57:05.644421 Clearing out pending MCEs
508 17:57:05.648153 Clearing out pending MCEs
509 17:57:05.648230 Setting up local APIC...
510 17:57:05.651257 CPU #4 initialized
511 17:57:05.654385 apic_id: 0x03 done.
512 17:57:05.654493 Clearing out pending MCEs
513 17:57:05.661163 microcode: Update skipped, already up-to-date
514 17:57:05.664373 Clearing out pending MCEs
515 17:57:05.664449 apic_id: 0x05 done.
516 17:57:05.667432 Setting up local APIC...
517 17:57:05.670939 apic_id: 0x07 done.
518 17:57:05.671019 Setting up local APIC...
519 17:57:05.674118 apic_id: 0x04 done.
520 17:57:05.680807 microcode: Update skipped, already up-to-date
521 17:57:05.684369 microcode: Update skipped, already up-to-date
522 17:57:05.687290 CPU #5 initialized
523 17:57:05.687369 CPU #2 initialized
524 17:57:05.690751 Setting up local APIC...
525 17:57:05.690827 CPU #7 initialized
526 17:57:05.697269 microcode: Update skipped, already up-to-date
527 17:57:05.700686 apic_id: 0x06 done.
528 17:57:05.700774 CPU #3 initialized
529 17:57:05.707125 microcode: Update skipped, already up-to-date
530 17:57:05.707204 apic_id: 0x01 done.
531 17:57:05.710358 CPU #6 initialized
532 17:57:05.713840 microcode: Update skipped, already up-to-date
533 17:57:05.716896 CPU #1 initialized
534 17:57:05.720024 bsp_do_flight_plan done after 463 msecs.
535 17:57:05.723281 CPU: frequency set to 4400 MHz
536 17:57:05.726818 Enabling SMIs.
537 17:57:05.733132 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 17:57:05.747412 SATAXPCIE1 indicates PCIe NVMe is present
539 17:57:05.751052 Probing TPM: done!
540 17:57:05.754187 Connected to device vid:did:rid of 1ae0:0028:00
541 17:57:05.764883 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
542 17:57:05.768502 Initialized TPM device CR50 revision 0
543 17:57:05.771362 Enabling S0i3.4
544 17:57:05.777992 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 17:57:05.781497 Found a VBT of 8704 bytes after decompression
546 17:57:05.788248 cse_lite: CSE RO boot. HybridStorageMode disabled
547 17:57:05.794336 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 17:57:05.869534 FSPS returned 0
549 17:57:05.873085 Executing Phase 1 of FspMultiPhaseSiInit
550 17:57:05.882749 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 17:57:05.885952 port C0 DISC req: usage 1 usb3 1 usb2 5
552 17:57:05.889109 Raw Buffer output 0 00000511
553 17:57:05.892395 Raw Buffer output 1 00000000
554 17:57:05.896787 pmc_send_ipc_cmd succeeded
555 17:57:05.903077 port C1 DISC req: usage 1 usb3 2 usb2 3
556 17:57:05.903161 Raw Buffer output 0 00000321
557 17:57:05.906574 Raw Buffer output 1 00000000
558 17:57:05.910922 pmc_send_ipc_cmd succeeded
559 17:57:05.915757 Detected 4 core, 8 thread CPU.
560 17:57:05.919018 Detected 4 core, 8 thread CPU.
561 17:57:06.119842 Display FSP Version Info HOB
562 17:57:06.122867 Reference Code - CPU = a.0.4c.31
563 17:57:06.126269 uCode Version = 0.0.0.86
564 17:57:06.129617 TXT ACM version = ff.ff.ff.ffff
565 17:57:06.133048 Reference Code - ME = a.0.4c.31
566 17:57:06.135993 MEBx version = 0.0.0.0
567 17:57:06.139277 ME Firmware Version = Consumer SKU
568 17:57:06.142768 Reference Code - PCH = a.0.4c.31
569 17:57:06.146322 PCH-CRID Status = Disabled
570 17:57:06.150063 PCH-CRID Original Value = ff.ff.ff.ffff
571 17:57:06.153834 PCH-CRID New Value = ff.ff.ff.ffff
572 17:57:06.156957 OPROM - RST - RAID = ff.ff.ff.ffff
573 17:57:06.160129 PCH Hsio Version = 4.0.0.0
574 17:57:06.163704 Reference Code - SA - System Agent = a.0.4c.31
575 17:57:06.166724 Reference Code - MRC = 2.0.0.1
576 17:57:06.170341 SA - PCIe Version = a.0.4c.31
577 17:57:06.173540 SA-CRID Status = Disabled
578 17:57:06.176636 SA-CRID Original Value = 0.0.0.1
579 17:57:06.179801 SA-CRID New Value = 0.0.0.1
580 17:57:06.183429 OPROM - VBIOS = ff.ff.ff.ffff
581 17:57:06.186562 IO Manageability Engine FW Version = 11.1.4.0
582 17:57:06.189602 PHY Build Version = 0.0.0.e0
583 17:57:06.193332 Thunderbolt(TM) FW Version = 0.0.0.0
584 17:57:06.199639 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 17:57:06.203161 ITSS IRQ Polarities Before:
586 17:57:06.203255 IPC0: 0xffffffff
587 17:57:06.206245 IPC1: 0xffffffff
588 17:57:06.206318 IPC2: 0xffffffff
589 17:57:06.209316 IPC3: 0xffffffff
590 17:57:06.212922 ITSS IRQ Polarities After:
591 17:57:06.213014 IPC0: 0xffffffff
592 17:57:06.216143 IPC1: 0xffffffff
593 17:57:06.216218 IPC2: 0xffffffff
594 17:57:06.219263 IPC3: 0xffffffff
595 17:57:06.222673 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 17:57:06.235619 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 17:57:06.245443 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 17:57:06.258906 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 17:57:06.265771 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
600 17:57:06.268784 Enumerating buses...
601 17:57:06.272345 Show all devs... Before device enumeration.
602 17:57:06.275356 Root Device: enabled 1
603 17:57:06.275441 DOMAIN: 0000: enabled 1
604 17:57:06.278440 CPU_CLUSTER: 0: enabled 1
605 17:57:06.282109 PCI: 00:00.0: enabled 1
606 17:57:06.285330 PCI: 00:02.0: enabled 1
607 17:57:06.285415 PCI: 00:04.0: enabled 1
608 17:57:06.288489 PCI: 00:05.0: enabled 1
609 17:57:06.291692 PCI: 00:06.0: enabled 0
610 17:57:06.294779 PCI: 00:07.0: enabled 0
611 17:57:06.294883 PCI: 00:07.1: enabled 0
612 17:57:06.298319 PCI: 00:07.2: enabled 0
613 17:57:06.301325 PCI: 00:07.3: enabled 0
614 17:57:06.304557 PCI: 00:08.0: enabled 1
615 17:57:06.304638 PCI: 00:09.0: enabled 0
616 17:57:06.308025 PCI: 00:0a.0: enabled 0
617 17:57:06.311275 PCI: 00:0d.0: enabled 1
618 17:57:06.314933 PCI: 00:0d.1: enabled 0
619 17:57:06.315014 PCI: 00:0d.2: enabled 0
620 17:57:06.317993 PCI: 00:0d.3: enabled 0
621 17:57:06.321149 PCI: 00:0e.0: enabled 0
622 17:57:06.324752 PCI: 00:10.2: enabled 1
623 17:57:06.324880 PCI: 00:10.6: enabled 0
624 17:57:06.328123 PCI: 00:10.7: enabled 0
625 17:57:06.331476 PCI: 00:12.0: enabled 0
626 17:57:06.334602 PCI: 00:12.6: enabled 0
627 17:57:06.334678 PCI: 00:13.0: enabled 0
628 17:57:06.337741 PCI: 00:14.0: enabled 1
629 17:57:06.341281 PCI: 00:14.1: enabled 0
630 17:57:06.344203 PCI: 00:14.2: enabled 1
631 17:57:06.344281 PCI: 00:14.3: enabled 1
632 17:57:06.347447 PCI: 00:15.0: enabled 1
633 17:57:06.351045 PCI: 00:15.1: enabled 1
634 17:57:06.351125 PCI: 00:15.2: enabled 1
635 17:57:06.354022 PCI: 00:15.3: enabled 1
636 17:57:06.357526 PCI: 00:16.0: enabled 1
637 17:57:06.360730 PCI: 00:16.1: enabled 0
638 17:57:06.360805 PCI: 00:16.2: enabled 0
639 17:57:06.364112 PCI: 00:16.3: enabled 0
640 17:57:06.367514 PCI: 00:16.4: enabled 0
641 17:57:06.370739 PCI: 00:16.5: enabled 0
642 17:57:06.370894 PCI: 00:17.0: enabled 1
643 17:57:06.373918 PCI: 00:19.0: enabled 0
644 17:57:06.377249 PCI: 00:19.1: enabled 1
645 17:57:06.380720 PCI: 00:19.2: enabled 0
646 17:57:06.380796 PCI: 00:1c.0: enabled 1
647 17:57:06.383743 PCI: 00:1c.1: enabled 0
648 17:57:06.386922 PCI: 00:1c.2: enabled 0
649 17:57:06.390045 PCI: 00:1c.3: enabled 0
650 17:57:06.390118 PCI: 00:1c.4: enabled 0
651 17:57:06.393601 PCI: 00:1c.5: enabled 0
652 17:57:06.396706 PCI: 00:1c.6: enabled 1
653 17:57:06.400374 PCI: 00:1c.7: enabled 0
654 17:57:06.400471 PCI: 00:1d.0: enabled 1
655 17:57:06.403398 PCI: 00:1d.1: enabled 0
656 17:57:06.406531 PCI: 00:1d.2: enabled 1
657 17:57:06.409771 PCI: 00:1d.3: enabled 0
658 17:57:06.409844 PCI: 00:1e.0: enabled 1
659 17:57:06.413330 PCI: 00:1e.1: enabled 0
660 17:57:06.416498 PCI: 00:1e.2: enabled 1
661 17:57:06.419626 PCI: 00:1e.3: enabled 1
662 17:57:06.419733 PCI: 00:1f.0: enabled 1
663 17:57:06.423356 PCI: 00:1f.1: enabled 0
664 17:57:06.426620 PCI: 00:1f.2: enabled 1
665 17:57:06.429759 PCI: 00:1f.3: enabled 1
666 17:57:06.429834 PCI: 00:1f.4: enabled 0
667 17:57:06.433382 PCI: 00:1f.5: enabled 1
668 17:57:06.436387 PCI: 00:1f.6: enabled 0
669 17:57:06.436462 PCI: 00:1f.7: enabled 0
670 17:57:06.439503 APIC: 00: enabled 1
671 17:57:06.442716 GENERIC: 0.0: enabled 1
672 17:57:06.446335 GENERIC: 0.0: enabled 1
673 17:57:06.446415 GENERIC: 1.0: enabled 1
674 17:57:06.449294 GENERIC: 0.0: enabled 1
675 17:57:06.452650 GENERIC: 1.0: enabled 1
676 17:57:06.455789 USB0 port 0: enabled 1
677 17:57:06.455869 GENERIC: 0.0: enabled 1
678 17:57:06.459411 USB0 port 0: enabled 1
679 17:57:06.462517 GENERIC: 0.0: enabled 1
680 17:57:06.462609 I2C: 00:1a: enabled 1
681 17:57:06.465684 I2C: 00:31: enabled 1
682 17:57:06.469312 I2C: 00:32: enabled 1
683 17:57:06.469386 I2C: 00:10: enabled 1
684 17:57:06.472219 I2C: 00:15: enabled 1
685 17:57:06.475566 GENERIC: 0.0: enabled 0
686 17:57:06.479082 GENERIC: 1.0: enabled 0
687 17:57:06.479154 GENERIC: 0.0: enabled 1
688 17:57:06.482423 SPI: 00: enabled 1
689 17:57:06.485609 SPI: 00: enabled 1
690 17:57:06.485688 PNP: 0c09.0: enabled 1
691 17:57:06.488702 GENERIC: 0.0: enabled 1
692 17:57:06.492114 USB3 port 0: enabled 1
693 17:57:06.492194 USB3 port 1: enabled 1
694 17:57:06.495238 USB3 port 2: enabled 0
695 17:57:06.498728 USB3 port 3: enabled 0
696 17:57:06.501966 USB2 port 0: enabled 0
697 17:57:06.502042 USB2 port 1: enabled 1
698 17:57:06.505249 USB2 port 2: enabled 1
699 17:57:06.508804 USB2 port 3: enabled 0
700 17:57:06.508921 USB2 port 4: enabled 1
701 17:57:06.511989 USB2 port 5: enabled 0
702 17:57:06.514984 USB2 port 6: enabled 0
703 17:57:06.518629 USB2 port 7: enabled 0
704 17:57:06.518703 USB2 port 8: enabled 0
705 17:57:06.521710 USB2 port 9: enabled 0
706 17:57:06.524862 USB3 port 0: enabled 0
707 17:57:06.524939 USB3 port 1: enabled 1
708 17:57:06.527949 USB3 port 2: enabled 0
709 17:57:06.531574 USB3 port 3: enabled 0
710 17:57:06.534482 GENERIC: 0.0: enabled 1
711 17:57:06.534631 GENERIC: 1.0: enabled 1
712 17:57:06.538021 APIC: 01: enabled 1
713 17:57:06.541246 APIC: 04: enabled 1
714 17:57:06.541316 APIC: 07: enabled 1
715 17:57:06.544924 APIC: 02: enabled 1
716 17:57:06.544998 APIC: 05: enabled 1
717 17:57:06.547963 APIC: 06: enabled 1
718 17:57:06.551185 APIC: 03: enabled 1
719 17:57:06.551260 Compare with tree...
720 17:57:06.554819 Root Device: enabled 1
721 17:57:06.557694 DOMAIN: 0000: enabled 1
722 17:57:06.560960 PCI: 00:00.0: enabled 1
723 17:57:06.561032 PCI: 00:02.0: enabled 1
724 17:57:06.564584 PCI: 00:04.0: enabled 1
725 17:57:06.567681 GENERIC: 0.0: enabled 1
726 17:57:06.570808 PCI: 00:05.0: enabled 1
727 17:57:06.573993 PCI: 00:06.0: enabled 0
728 17:57:06.577582 PCI: 00:07.0: enabled 0
729 17:57:06.577662 GENERIC: 0.0: enabled 1
730 17:57:06.580801 PCI: 00:07.1: enabled 0
731 17:57:06.583851 GENERIC: 1.0: enabled 1
732 17:57:06.587347 PCI: 00:07.2: enabled 0
733 17:57:06.590635 GENERIC: 0.0: enabled 1
734 17:57:06.590711 PCI: 00:07.3: enabled 0
735 17:57:06.593866 GENERIC: 1.0: enabled 1
736 17:57:06.597194 PCI: 00:08.0: enabled 1
737 17:57:06.600420 PCI: 00:09.0: enabled 0
738 17:57:06.603538 PCI: 00:0a.0: enabled 0
739 17:57:06.603614 PCI: 00:0d.0: enabled 1
740 17:57:06.606856 USB0 port 0: enabled 1
741 17:57:06.610348 USB3 port 0: enabled 1
742 17:57:06.613916 USB3 port 1: enabled 1
743 17:57:06.617090 USB3 port 2: enabled 0
744 17:57:06.620236 USB3 port 3: enabled 0
745 17:57:06.620308 PCI: 00:0d.1: enabled 0
746 17:57:06.623352 PCI: 00:0d.2: enabled 0
747 17:57:06.627076 GENERIC: 0.0: enabled 1
748 17:57:06.630272 PCI: 00:0d.3: enabled 0
749 17:57:06.633372 PCI: 00:0e.0: enabled 0
750 17:57:06.633442 PCI: 00:10.2: enabled 1
751 17:57:06.636663 PCI: 00:10.6: enabled 0
752 17:57:06.639745 PCI: 00:10.7: enabled 0
753 17:57:06.643188 PCI: 00:12.0: enabled 0
754 17:57:06.646744 PCI: 00:12.6: enabled 0
755 17:57:06.646819 PCI: 00:13.0: enabled 0
756 17:57:06.649779 PCI: 00:14.0: enabled 1
757 17:57:06.652928 USB0 port 0: enabled 1
758 17:57:06.656667 USB2 port 0: enabled 0
759 17:57:06.659761 USB2 port 1: enabled 1
760 17:57:06.659834 USB2 port 2: enabled 1
761 17:57:06.662920 USB2 port 3: enabled 0
762 17:57:06.666015 USB2 port 4: enabled 1
763 17:57:06.669798 USB2 port 5: enabled 0
764 17:57:06.672795 USB2 port 6: enabled 0
765 17:57:06.676014 USB2 port 7: enabled 0
766 17:57:06.679182 USB2 port 8: enabled 0
767 17:57:06.679261 USB2 port 9: enabled 0
768 17:57:06.682744 USB3 port 0: enabled 0
769 17:57:06.685792 USB3 port 1: enabled 1
770 17:57:06.689221 USB3 port 2: enabled 0
771 17:57:06.692732 USB3 port 3: enabled 0
772 17:57:06.692814 PCI: 00:14.1: enabled 0
773 17:57:06.695832 PCI: 00:14.2: enabled 1
774 17:57:06.698961 PCI: 00:14.3: enabled 1
775 17:57:06.702392 GENERIC: 0.0: enabled 1
776 17:57:06.705546 PCI: 00:15.0: enabled 1
777 17:57:06.705633 I2C: 00:1a: enabled 1
778 17:57:06.709190 I2C: 00:31: enabled 1
779 17:57:06.712196 I2C: 00:32: enabled 1
780 17:57:06.715448 PCI: 00:15.1: enabled 1
781 17:57:06.718678 I2C: 00:10: enabled 1
782 17:57:06.718768 PCI: 00:15.2: enabled 1
783 17:57:06.722224 PCI: 00:15.3: enabled 1
784 17:57:06.725495 PCI: 00:16.0: enabled 1
785 17:57:06.728699 PCI: 00:16.1: enabled 0
786 17:57:06.732222 PCI: 00:16.2: enabled 0
787 17:57:06.732314 PCI: 00:16.3: enabled 0
788 17:57:06.735292 PCI: 00:16.4: enabled 0
789 17:57:06.738429 PCI: 00:16.5: enabled 0
790 17:57:06.742203 PCI: 00:17.0: enabled 1
791 17:57:06.791559 PCI: 00:19.0: enabled 0
792 17:57:06.791684 PCI: 00:19.1: enabled 1
793 17:57:06.791788 I2C: 00:15: enabled 1
794 17:57:06.792059 PCI: 00:19.2: enabled 0
795 17:57:06.792142 PCI: 00:1d.0: enabled 1
796 17:57:06.792242 GENERIC: 0.0: enabled 1
797 17:57:06.792341 PCI: 00:1e.0: enabled 1
798 17:57:06.792463 PCI: 00:1e.1: enabled 0
799 17:57:06.792560 PCI: 00:1e.2: enabled 1
800 17:57:06.792662 SPI: 00: enabled 1
801 17:57:06.792758 PCI: 00:1e.3: enabled 1
802 17:57:06.792865 SPI: 00: enabled 1
803 17:57:06.792960 PCI: 00:1f.0: enabled 1
804 17:57:06.793079 PNP: 0c09.0: enabled 1
805 17:57:06.793172 PCI: 00:1f.1: enabled 0
806 17:57:06.793292 PCI: 00:1f.2: enabled 1
807 17:57:06.793388 GENERIC: 0.0: enabled 1
808 17:57:06.793513 GENERIC: 0.0: enabled 1
809 17:57:06.793623 GENERIC: 1.0: enabled 1
810 17:57:06.825013 PCI: 00:1f.3: enabled 1
811 17:57:06.825104 PCI: 00:1f.4: enabled 0
812 17:57:06.825224 PCI: 00:1f.5: enabled 1
813 17:57:06.825512 PCI: 00:1f.6: enabled 0
814 17:57:06.825592 PCI: 00:1f.7: enabled 0
815 17:57:06.825673 CPU_CLUSTER: 0: enabled 1
816 17:57:06.825772 APIC: 00: enabled 1
817 17:57:06.825858 APIC: 01: enabled 1
818 17:57:06.825955 APIC: 04: enabled 1
819 17:57:06.826086 APIC: 07: enabled 1
820 17:57:06.826194 APIC: 02: enabled 1
821 17:57:06.826306 APIC: 05: enabled 1
822 17:57:06.826413 APIC: 06: enabled 1
823 17:57:06.830916 APIC: 03: enabled 1
824 17:57:06.831024 Root Device scanning...
825 17:57:06.831114 scan_static_bus for Root Device
826 17:57:06.834175 DOMAIN: 0000 enabled
827 17:57:06.837520 CPU_CLUSTER: 0 enabled
828 17:57:06.840444 DOMAIN: 0000 scanning...
829 17:57:06.844055 PCI: pci_scan_bus for bus 00
830 17:57:06.844148 PCI: 00:00.0 [8086/0000] ops
831 17:57:06.847352 PCI: 00:00.0 [8086/9a12] enabled
832 17:57:06.850264 PCI: 00:02.0 [8086/0000] bus ops
833 17:57:06.853662 PCI: 00:02.0 [8086/9a40] enabled
834 17:57:06.857263 PCI: 00:04.0 [8086/0000] bus ops
835 17:57:06.860443 PCI: 00:04.0 [8086/9a03] enabled
836 17:57:06.866673 PCI: 00:05.0 [8086/9a19] enabled
837 17:57:06.870260 PCI: 00:07.0 [0000/0000] hidden
838 17:57:06.873382 PCI: 00:08.0 [8086/9a11] enabled
839 17:57:06.876584 PCI: 00:0a.0 [8086/9a0d] disabled
840 17:57:06.880179 PCI: 00:0d.0 [8086/0000] bus ops
841 17:57:06.883099 PCI: 00:0d.0 [8086/9a13] enabled
842 17:57:06.886566 PCI: 00:14.0 [8086/0000] bus ops
843 17:57:06.889818 PCI: 00:14.0 [8086/a0ed] enabled
844 17:57:06.892826 PCI: 00:14.2 [8086/a0ef] enabled
845 17:57:06.896420 PCI: 00:14.3 [8086/0000] bus ops
846 17:57:06.899432 PCI: 00:14.3 [8086/a0f0] enabled
847 17:57:06.902932 PCI: 00:15.0 [8086/0000] bus ops
848 17:57:06.906130 PCI: 00:15.0 [8086/a0e8] enabled
849 17:57:06.909305 PCI: 00:15.1 [8086/0000] bus ops
850 17:57:06.912816 PCI: 00:15.1 [8086/a0e9] enabled
851 17:57:06.915894 PCI: 00:15.2 [8086/0000] bus ops
852 17:57:06.919045 PCI: 00:15.2 [8086/a0ea] enabled
853 17:57:06.922564 PCI: 00:15.3 [8086/0000] bus ops
854 17:57:06.925612 PCI: 00:15.3 [8086/a0eb] enabled
855 17:57:06.929280 PCI: 00:16.0 [8086/0000] ops
856 17:57:06.932662 PCI: 00:16.0 [8086/a0e0] enabled
857 17:57:06.935456 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 17:57:06.942131 PCI: 00:19.0 [8086/0000] bus ops
859 17:57:06.945644 PCI: 00:19.0 [8086/a0c5] disabled
860 17:57:06.948615 PCI: 00:19.1 [8086/0000] bus ops
861 17:57:06.952245 PCI: 00:19.1 [8086/a0c6] enabled
862 17:57:06.955151 PCI: 00:1d.0 [8086/0000] bus ops
863 17:57:06.958759 PCI: 00:1d.0 [8086/a0b0] enabled
864 17:57:06.961847 PCI: 00:1e.0 [8086/0000] ops
865 17:57:06.964882 PCI: 00:1e.0 [8086/a0a8] enabled
866 17:57:06.968487 PCI: 00:1e.2 [8086/0000] bus ops
867 17:57:06.971653 PCI: 00:1e.2 [8086/a0aa] enabled
868 17:57:06.974744 PCI: 00:1e.3 [8086/0000] bus ops
869 17:57:06.978397 PCI: 00:1e.3 [8086/a0ab] enabled
870 17:57:06.981488 PCI: 00:1f.0 [8086/0000] bus ops
871 17:57:06.984621 PCI: 00:1f.0 [8086/a087] enabled
872 17:57:06.984728 RTC Init
873 17:57:06.987773 Set power on after power failure.
874 17:57:06.991279 Disabling Deep S3
875 17:57:06.991396 Disabling Deep S3
876 17:57:06.994276 Disabling Deep S4
877 17:57:06.994385 Disabling Deep S4
878 17:57:06.997988 Disabling Deep S5
879 17:57:07.001012 Disabling Deep S5
880 17:57:07.001117 PCI: 00:1f.2 [0000/0000] hidden
881 17:57:07.007568 PCI: 00:1f.3 [8086/0000] bus ops
882 17:57:07.010773 PCI: 00:1f.3 [8086/a0c8] enabled
883 17:57:07.014247 PCI: 00:1f.5 [8086/0000] bus ops
884 17:57:07.017306 PCI: 00:1f.5 [8086/a0a4] enabled
885 17:57:07.017382 PCI: Leftover static devices:
886 17:57:07.020978 PCI: 00:10.2
887 17:57:07.021057 PCI: 00:10.6
888 17:57:07.024175 PCI: 00:10.7
889 17:57:07.024251 PCI: 00:06.0
890 17:57:07.027248 PCI: 00:07.1
891 17:57:07.027326 PCI: 00:07.2
892 17:57:07.027399 PCI: 00:07.3
893 17:57:07.030515 PCI: 00:09.0
894 17:57:07.030639 PCI: 00:0d.1
895 17:57:07.034080 PCI: 00:0d.2
896 17:57:07.034175 PCI: 00:0d.3
897 17:57:07.037075 PCI: 00:0e.0
898 17:57:07.037186 PCI: 00:12.0
899 17:57:07.037284 PCI: 00:12.6
900 17:57:07.040586 PCI: 00:13.0
901 17:57:07.040663 PCI: 00:14.1
902 17:57:07.043556 PCI: 00:16.1
903 17:57:07.043640 PCI: 00:16.2
904 17:57:07.043714 PCI: 00:16.3
905 17:57:07.047133 PCI: 00:16.4
906 17:57:07.047242 PCI: 00:16.5
907 17:57:07.050485 PCI: 00:17.0
908 17:57:07.050619 PCI: 00:19.2
909 17:57:07.053388 PCI: 00:1e.1
910 17:57:07.053472 PCI: 00:1f.1
911 17:57:07.053541 PCI: 00:1f.4
912 17:57:07.056787 PCI: 00:1f.6
913 17:57:07.056867 PCI: 00:1f.7
914 17:57:07.060095 PCI: Check your devicetree.cb.
915 17:57:07.063634 PCI: 00:02.0 scanning...
916 17:57:07.066671 scan_generic_bus for PCI: 00:02.0
917 17:57:07.070231 scan_generic_bus for PCI: 00:02.0 done
918 17:57:07.076511 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 17:57:07.076592 PCI: 00:04.0 scanning...
920 17:57:07.083290 scan_generic_bus for PCI: 00:04.0
921 17:57:07.083368 GENERIC: 0.0 enabled
922 17:57:07.089492 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 17:57:07.093115 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 17:57:07.096517 PCI: 00:0d.0 scanning...
925 17:57:07.099599 scan_static_bus for PCI: 00:0d.0
926 17:57:07.102775 USB0 port 0 enabled
927 17:57:07.106364 USB0 port 0 scanning...
928 17:57:07.109296 scan_static_bus for USB0 port 0
929 17:57:07.109370 USB3 port 0 enabled
930 17:57:07.112842 USB3 port 1 enabled
931 17:57:07.116113 USB3 port 2 disabled
932 17:57:07.116190 USB3 port 3 disabled
933 17:57:07.119560 USB3 port 0 scanning...
934 17:57:07.122732 scan_static_bus for USB3 port 0
935 17:57:07.125824 scan_static_bus for USB3 port 0 done
936 17:57:07.132821 scan_bus: bus USB3 port 0 finished in 6 msecs
937 17:57:07.132910 USB3 port 1 scanning...
938 17:57:07.135845 scan_static_bus for USB3 port 1
939 17:57:07.142164 scan_static_bus for USB3 port 1 done
940 17:57:07.145709 scan_bus: bus USB3 port 1 finished in 6 msecs
941 17:57:07.148702 scan_static_bus for USB0 port 0 done
942 17:57:07.152359 scan_bus: bus USB0 port 0 finished in 43 msecs
943 17:57:07.158737 scan_static_bus for PCI: 00:0d.0 done
944 17:57:07.162232 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 17:57:07.165254 PCI: 00:14.0 scanning...
946 17:57:07.168626 scan_static_bus for PCI: 00:14.0
947 17:57:07.171784 USB0 port 0 enabled
948 17:57:07.171859 USB0 port 0 scanning...
949 17:57:07.175240 scan_static_bus for USB0 port 0
950 17:57:07.178355 USB2 port 0 disabled
951 17:57:07.181635 USB2 port 1 enabled
952 17:57:07.181708 USB2 port 2 enabled
953 17:57:07.185334 USB2 port 3 disabled
954 17:57:07.188363 USB2 port 4 enabled
955 17:57:07.188440 USB2 port 5 disabled
956 17:57:07.191454 USB2 port 6 disabled
957 17:57:07.195053 USB2 port 7 disabled
958 17:57:07.195130 USB2 port 8 disabled
959 17:57:07.198074 USB2 port 9 disabled
960 17:57:07.198153 USB3 port 0 disabled
961 17:57:07.201654 USB3 port 1 enabled
962 17:57:07.204628 USB3 port 2 disabled
963 17:57:07.204706 USB3 port 3 disabled
964 17:57:07.208210 USB2 port 1 scanning...
965 17:57:07.211241 scan_static_bus for USB2 port 1
966 17:57:07.214604 scan_static_bus for USB2 port 1 done
967 17:57:07.221314 scan_bus: bus USB2 port 1 finished in 6 msecs
968 17:57:07.221407 USB2 port 2 scanning...
969 17:57:07.224849 scan_static_bus for USB2 port 2
970 17:57:07.231145 scan_static_bus for USB2 port 2 done
971 17:57:07.234911 scan_bus: bus USB2 port 2 finished in 6 msecs
972 17:57:07.237912 USB2 port 4 scanning...
973 17:57:07.241107 scan_static_bus for USB2 port 4
974 17:57:07.244176 scan_static_bus for USB2 port 4 done
975 17:57:07.247864 scan_bus: bus USB2 port 4 finished in 6 msecs
976 17:57:07.250931 USB3 port 1 scanning...
977 17:57:07.254023 scan_static_bus for USB3 port 1
978 17:57:07.257426 scan_static_bus for USB3 port 1 done
979 17:57:07.264170 scan_bus: bus USB3 port 1 finished in 6 msecs
980 17:57:07.267426 scan_static_bus for USB0 port 0 done
981 17:57:07.270538 scan_bus: bus USB0 port 0 finished in 93 msecs
982 17:57:07.274018 scan_static_bus for PCI: 00:14.0 done
983 17:57:07.280650 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
984 17:57:07.284199 PCI: 00:14.3 scanning...
985 17:57:07.287315 scan_static_bus for PCI: 00:14.3
986 17:57:07.287397 GENERIC: 0.0 enabled
987 17:57:07.290456 scan_static_bus for PCI: 00:14.3 done
988 17:57:07.297263 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 17:57:07.300245 PCI: 00:15.0 scanning...
990 17:57:07.303380 scan_static_bus for PCI: 00:15.0
991 17:57:07.303462 I2C: 00:1a enabled
992 17:57:07.306992 I2C: 00:31 enabled
993 17:57:07.310255 I2C: 00:32 enabled
994 17:57:07.313404 scan_static_bus for PCI: 00:15.0 done
995 17:57:07.316517 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 17:57:07.319997 PCI: 00:15.1 scanning...
997 17:57:07.323183 scan_static_bus for PCI: 00:15.1
998 17:57:07.326703 I2C: 00:10 enabled
999 17:57:07.329801 scan_static_bus for PCI: 00:15.1 done
1000 17:57:07.333384 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 17:57:07.336650 PCI: 00:15.2 scanning...
1002 17:57:07.339711 scan_static_bus for PCI: 00:15.2
1003 17:57:07.342912 scan_static_bus for PCI: 00:15.2 done
1004 17:57:07.349603 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 17:57:07.349685 PCI: 00:15.3 scanning...
1006 17:57:07.353145 scan_static_bus for PCI: 00:15.3
1007 17:57:07.359472 scan_static_bus for PCI: 00:15.3 done
1008 17:57:07.362889 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 17:57:07.365836 PCI: 00:19.1 scanning...
1010 17:57:07.369218 scan_static_bus for PCI: 00:19.1
1011 17:57:07.369295 I2C: 00:15 enabled
1012 17:57:07.375963 scan_static_bus for PCI: 00:19.1 done
1013 17:57:07.379325 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 17:57:07.382296 PCI: 00:1d.0 scanning...
1015 17:57:07.385550 do_pci_scan_bridge for PCI: 00:1d.0
1016 17:57:07.388968 PCI: pci_scan_bus for bus 01
1017 17:57:07.392592 PCI: 01:00.0 [15b7/5009] enabled
1018 17:57:07.396327 GENERIC: 0.0 enabled
1019 17:57:07.396408 Enabling Common Clock Configuration
1020 17:57:07.403424 L1 Sub-State supported from root port 29
1021 17:57:07.406505 L1 Sub-State Support = 0x5
1022 17:57:07.406628 CommonModeRestoreTime = 0x28
1023 17:57:07.412700 Power On Value = 0x16, Power On Scale = 0x0
1024 17:57:07.412782 ASPM: Enabled L1
1025 17:57:07.419684 PCIe: Max_Payload_Size adjusted to 128
1026 17:57:07.422624 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 17:57:07.426073 PCI: 00:1e.2 scanning...
1028 17:57:07.429240 scan_generic_bus for PCI: 00:1e.2
1029 17:57:07.429322 SPI: 00 enabled
1030 17:57:07.435919 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 17:57:07.442666 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 17:57:07.442779 PCI: 00:1e.3 scanning...
1033 17:57:07.448970 scan_generic_bus for PCI: 00:1e.3
1034 17:57:07.449053 SPI: 00 enabled
1035 17:57:07.455646 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 17:57:07.458862 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 17:57:07.462676 PCI: 00:1f.0 scanning...
1038 17:57:07.465763 scan_static_bus for PCI: 00:1f.0
1039 17:57:07.468797 PNP: 0c09.0 enabled
1040 17:57:07.472289 PNP: 0c09.0 scanning...
1041 17:57:07.475302 scan_static_bus for PNP: 0c09.0
1042 17:57:07.478528 scan_static_bus for PNP: 0c09.0 done
1043 17:57:07.482060 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 17:57:07.485388 scan_static_bus for PCI: 00:1f.0 done
1045 17:57:07.492007 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 17:57:07.495339 PCI: 00:1f.2 scanning...
1047 17:57:07.498320 scan_static_bus for PCI: 00:1f.2
1048 17:57:07.498425 GENERIC: 0.0 enabled
1049 17:57:07.501883 GENERIC: 0.0 scanning...
1050 17:57:07.505221 scan_static_bus for GENERIC: 0.0
1051 17:57:07.508369 GENERIC: 0.0 enabled
1052 17:57:07.508449 GENERIC: 1.0 enabled
1053 17:57:07.514786 scan_static_bus for GENERIC: 0.0 done
1054 17:57:07.518279 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 17:57:07.521406 scan_static_bus for PCI: 00:1f.2 done
1056 17:57:07.527773 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 17:57:07.527883 PCI: 00:1f.3 scanning...
1058 17:57:07.531224 scan_static_bus for PCI: 00:1f.3
1059 17:57:07.537820 scan_static_bus for PCI: 00:1f.3 done
1060 17:57:07.541016 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 17:57:07.544589 PCI: 00:1f.5 scanning...
1062 17:57:07.547693 scan_generic_bus for PCI: 00:1f.5
1063 17:57:07.550879 scan_generic_bus for PCI: 00:1f.5 done
1064 17:57:07.557628 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 17:57:07.560813 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1066 17:57:07.564438 scan_static_bus for Root Device done
1067 17:57:07.570744 scan_bus: bus Root Device finished in 735 msecs
1068 17:57:07.570850 done
1069 17:57:07.577308 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1070 17:57:07.580879 Chrome EC: UHEPI supported
1071 17:57:07.587058 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 17:57:07.593911 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 17:57:07.597213 SPI flash protection: WPSW=0 SRP0=0
1074 17:57:07.600565 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 17:57:07.607008 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 17:57:07.610116 found VGA at PCI: 00:02.0
1077 17:57:07.613249 Setting up VGA for PCI: 00:02.0
1078 17:57:07.616966 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 17:57:07.623179 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 17:57:07.626647 Allocating resources...
1081 17:57:07.626726 Reading resources...
1082 17:57:07.629767 Root Device read_resources bus 0 link: 0
1083 17:57:07.636658 DOMAIN: 0000 read_resources bus 0 link: 0
1084 17:57:07.640025 PCI: 00:04.0 read_resources bus 1 link: 0
1085 17:57:07.646155 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 17:57:07.649784 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 17:57:07.655977 USB0 port 0 read_resources bus 0 link: 0
1088 17:57:07.659659 USB0 port 0 read_resources bus 0 link: 0 done
1089 17:57:07.665991 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 17:57:07.669681 PCI: 00:14.0 read_resources bus 0 link: 0
1091 17:57:07.672770 USB0 port 0 read_resources bus 0 link: 0
1092 17:57:07.680311 USB0 port 0 read_resources bus 0 link: 0 done
1093 17:57:07.683899 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 17:57:07.690435 PCI: 00:14.3 read_resources bus 0 link: 0
1095 17:57:07.694026 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 17:57:07.700671 PCI: 00:15.0 read_resources bus 0 link: 0
1097 17:57:07.703480 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 17:57:07.710258 PCI: 00:15.1 read_resources bus 0 link: 0
1099 17:57:07.713626 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 17:57:07.720921 PCI: 00:19.1 read_resources bus 0 link: 0
1101 17:57:07.723964 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 17:57:07.730630 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 17:57:07.733761 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 17:57:07.740772 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 17:57:07.744224 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 17:57:07.750480 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 17:57:07.754029 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 17:57:07.760379 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 17:57:07.763950 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 17:57:07.770231 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 17:57:07.773477 GENERIC: 0.0 read_resources bus 0 link: 0
1112 17:57:07.780305 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 17:57:07.783308 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 17:57:07.789918 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 17:57:07.793239 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 17:57:07.799526 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 17:57:07.803167 Root Device read_resources bus 0 link: 0 done
1118 17:57:07.806162 Done reading resources.
1119 17:57:07.812690 Show resources in subtree (Root Device)...After reading.
1120 17:57:07.816133 Root Device child on link 0 DOMAIN: 0000
1121 17:57:07.819669 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 17:57:07.829377 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 17:57:07.839113 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 17:57:07.842272 PCI: 00:00.0
1125 17:57:07.852408 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 17:57:07.862136 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 17:57:07.868426 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 17:57:07.878364 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 17:57:07.888595 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 17:57:07.898209 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 17:57:07.908380 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 17:57:07.918282 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 17:57:07.924868 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 17:57:07.934314 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 17:57:07.944185 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 17:57:07.954107 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 17:57:07.964115 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 17:57:07.970693 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 17:57:07.980643 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 17:57:07.990442 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 17:57:08.000424 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 17:57:08.010026 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 17:57:08.019984 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 17:57:08.029852 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 17:57:08.029935 PCI: 00:02.0
1146 17:57:08.042622 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 17:57:08.052899 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 17:57:08.059253 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 17:57:08.065951 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 17:57:08.075602 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 17:57:08.075685 GENERIC: 0.0
1152 17:57:08.079309 PCI: 00:05.0
1153 17:57:08.088700 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 17:57:08.092323 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 17:57:08.095306 GENERIC: 0.0
1156 17:57:08.095387 PCI: 00:08.0
1157 17:57:08.105241 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 17:57:08.108687 PCI: 00:0a.0
1159 17:57:08.111915 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 17:57:08.121924 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 17:57:08.128412 USB0 port 0 child on link 0 USB3 port 0
1162 17:57:08.128492 USB3 port 0
1163 17:57:08.131699 USB3 port 1
1164 17:57:08.131779 USB3 port 2
1165 17:57:08.134681 USB3 port 3
1166 17:57:08.138271 PCI: 00:14.0 child on link 0 USB0 port 0
1167 17:57:08.147860 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 17:57:08.151437 USB0 port 0 child on link 0 USB2 port 0
1169 17:57:08.154436 USB2 port 0
1170 17:57:08.157569 USB2 port 1
1171 17:57:08.157663 USB2 port 2
1172 17:57:08.161241 USB2 port 3
1173 17:57:08.161321 USB2 port 4
1174 17:57:08.164330 USB2 port 5
1175 17:57:08.164410 USB2 port 6
1176 17:57:08.167416 USB2 port 7
1177 17:57:08.167509 USB2 port 8
1178 17:57:08.171072 USB2 port 9
1179 17:57:08.171151 USB3 port 0
1180 17:57:08.174307 USB3 port 1
1181 17:57:08.174400 USB3 port 2
1182 17:57:08.177285 USB3 port 3
1183 17:57:08.177406 PCI: 00:14.2
1184 17:57:08.190808 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 17:57:08.200391 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 17:57:08.204023 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 17:57:08.213699 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 17:57:08.213780 GENERIC: 0.0
1189 17:57:08.220426 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 17:57:08.230288 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 17:57:08.230384 I2C: 00:1a
1192 17:57:08.233376 I2C: 00:31
1193 17:57:08.233459 I2C: 00:32
1194 17:57:08.240000 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 17:57:08.249859 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 17:57:08.249958 I2C: 00:10
1197 17:57:08.253258 PCI: 00:15.2
1198 17:57:08.263084 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 17:57:08.263168 PCI: 00:15.3
1200 17:57:08.272910 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 17:57:08.276119 PCI: 00:16.0
1202 17:57:08.285888 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 17:57:08.285995 PCI: 00:19.0
1204 17:57:08.289622 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 17:57:08.299638 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 17:57:08.302598 I2C: 00:15
1207 17:57:08.305763 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 17:57:08.315633 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 17:57:08.325351 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 17:57:08.335126 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 17:57:08.335208 GENERIC: 0.0
1212 17:57:08.338758 PCI: 01:00.0
1213 17:57:08.348349 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 17:57:08.358100 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1215 17:57:08.358183 PCI: 00:1e.0
1216 17:57:08.371124 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1217 17:57:08.374732 PCI: 00:1e.2 child on link 0 SPI: 00
1218 17:57:08.384313 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 17:57:08.384394 SPI: 00
1220 17:57:08.390975 PCI: 00:1e.3 child on link 0 SPI: 00
1221 17:57:08.400814 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 17:57:08.400902 SPI: 00
1223 17:57:08.403997 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1224 17:57:08.414091 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1225 17:57:08.417158 PNP: 0c09.0
1226 17:57:08.423884 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1227 17:57:08.430849 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1228 17:57:08.436834 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1229 17:57:08.446756 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1230 17:57:08.453298 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1231 17:57:08.453382 GENERIC: 0.0
1232 17:57:08.456422 GENERIC: 1.0
1233 17:57:08.456506 PCI: 00:1f.3
1234 17:57:08.466679 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1235 17:57:08.476764 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1236 17:57:08.479805 PCI: 00:1f.5
1237 17:57:08.489837 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1238 17:57:08.493088 CPU_CLUSTER: 0 child on link 0 APIC: 00
1239 17:57:08.493171 APIC: 00
1240 17:57:08.496247 APIC: 01
1241 17:57:08.496330 APIC: 04
1242 17:57:08.496416 APIC: 07
1243 17:57:08.499345 APIC: 02
1244 17:57:08.499427 APIC: 05
1245 17:57:08.502705 APIC: 06
1246 17:57:08.502788 APIC: 03
1247 17:57:08.509152 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1248 17:57:08.516106 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1249 17:57:08.522212 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1250 17:57:08.528898 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1251 17:57:08.532104 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1252 17:57:08.535952 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1253 17:57:08.545479 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1254 17:57:08.551848 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1255 17:57:08.558493 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1256 17:57:08.565083 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1257 17:57:08.571847 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1258 17:57:08.581537 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1259 17:57:08.588048 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1260 17:57:08.594753 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1261 17:57:08.597917 DOMAIN: 0000: Resource ranges:
1262 17:57:08.601045 * Base: 1000, Size: 800, Tag: 100
1263 17:57:08.604237 * Base: 1900, Size: e700, Tag: 100
1264 17:57:08.610712 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1265 17:57:08.617660 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1266 17:57:08.624277 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1267 17:57:08.630528 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1268 17:57:08.640345 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1269 17:57:08.646896 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1270 17:57:08.653645 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1271 17:57:08.663554 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1272 17:57:08.670044 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1273 17:57:08.676461 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1274 17:57:08.686630 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1275 17:57:08.692980 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1276 17:57:08.703003 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1277 17:57:08.709292 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1278 17:57:08.716003 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1279 17:57:08.725801 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1280 17:57:08.732507 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1281 17:57:08.738900 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1282 17:57:08.748607 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1283 17:57:08.755357 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1284 17:57:08.761877 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1285 17:57:08.771864 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1286 17:57:08.778378 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1287 17:57:08.784774 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1288 17:57:08.794754 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1289 17:57:08.798211 DOMAIN: 0000: Resource ranges:
1290 17:57:08.801543 * Base: 7fc00000, Size: 40400000, Tag: 200
1291 17:57:08.804626 * Base: d0000000, Size: 28000000, Tag: 200
1292 17:57:08.811431 * Base: fa000000, Size: 1000000, Tag: 200
1293 17:57:08.814668 * Base: fb001000, Size: 2fff000, Tag: 200
1294 17:57:08.817824 * Base: fe010000, Size: 2e000, Tag: 200
1295 17:57:08.824411 * Base: fe03f000, Size: d41000, Tag: 200
1296 17:57:08.827341 * Base: fed88000, Size: 8000, Tag: 200
1297 17:57:08.830902 * Base: fed93000, Size: d000, Tag: 200
1298 17:57:08.834234 * Base: feda2000, Size: 1e000, Tag: 200
1299 17:57:08.840549 * Base: fede0000, Size: 1220000, Tag: 200
1300 17:57:08.844195 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1301 17:57:08.850355 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1302 17:57:08.856999 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1303 17:57:08.863867 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1304 17:57:08.870635 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1305 17:57:08.876858 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1306 17:57:08.883507 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1307 17:57:08.890149 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1308 17:57:08.896570 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1309 17:57:08.903199 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1310 17:57:08.910001 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1311 17:57:08.916256 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1312 17:57:08.922741 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1313 17:57:08.929364 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1314 17:57:08.935833 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1315 17:57:08.942319 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1316 17:57:08.949000 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1317 17:57:08.955638 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1318 17:57:08.962418 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1319 17:57:08.972418 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1320 17:57:08.978783 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1321 17:57:08.985115 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1322 17:57:08.991924 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1323 17:57:08.998545 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1324 17:57:09.005209 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1325 17:57:09.008282 PCI: 00:1d.0: Resource ranges:
1326 17:57:09.011590 * Base: 7fc00000, Size: 100000, Tag: 200
1327 17:57:09.021527 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1328 17:57:09.027769 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1329 17:57:09.034713 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1330 17:57:09.041359 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1331 17:57:09.047654 Root Device assign_resources, bus 0 link: 0
1332 17:57:09.051216 DOMAIN: 0000 assign_resources, bus 0 link: 0
1333 17:57:09.061016 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1334 17:57:09.067676 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1335 17:57:09.074020 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1336 17:57:09.084063 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1337 17:57:09.087242 PCI: 00:04.0 assign_resources, bus 1 link: 0
1338 17:57:09.094081 PCI: 00:04.0 assign_resources, bus 1 link: 0
1339 17:57:09.100743 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1340 17:57:09.110320 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1341 17:57:09.117293 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1342 17:57:09.123251 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1343 17:57:09.126714 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1344 17:57:09.136311 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1345 17:57:09.139696 PCI: 00:14.0 assign_resources, bus 0 link: 0
1346 17:57:09.142825 PCI: 00:14.0 assign_resources, bus 0 link: 0
1347 17:57:09.153246 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1348 17:57:09.159462 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1349 17:57:09.169218 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1350 17:57:09.172631 PCI: 00:14.3 assign_resources, bus 0 link: 0
1351 17:57:09.179010 PCI: 00:14.3 assign_resources, bus 0 link: 0
1352 17:57:09.185853 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1353 17:57:09.192096 PCI: 00:15.0 assign_resources, bus 0 link: 0
1354 17:57:09.195226 PCI: 00:15.0 assign_resources, bus 0 link: 0
1355 17:57:09.205174 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1356 17:57:09.208676 PCI: 00:15.1 assign_resources, bus 0 link: 0
1357 17:57:09.211745 PCI: 00:15.1 assign_resources, bus 0 link: 0
1358 17:57:09.221751 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1359 17:57:09.228243 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1360 17:57:09.238291 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1361 17:57:09.244751 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1362 17:57:09.251652 PCI: 00:19.1 assign_resources, bus 0 link: 0
1363 17:57:09.254681 PCI: 00:19.1 assign_resources, bus 0 link: 0
1364 17:57:09.264229 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1365 17:57:09.274289 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1366 17:57:09.280525 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1367 17:57:09.287286 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1368 17:57:09.293537 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1369 17:57:09.303633 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1370 17:57:09.306825 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 17:57:09.316765 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1372 17:57:09.319798 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1373 17:57:09.326915 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1374 17:57:09.333357 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1375 17:57:09.339925 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1376 17:57:09.342832 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1377 17:57:09.346283 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 17:57:09.353430 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1379 17:57:09.356300 LPC: Trying to open IO window from 800 size 1ff
1380 17:57:09.366166 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1381 17:57:09.372366 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1382 17:57:09.382590 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1383 17:57:09.385470 DOMAIN: 0000 assign_resources, bus 0 link: 0
1384 17:57:09.392661 Root Device assign_resources, bus 0 link: 0
1385 17:57:09.392743 Done setting resources.
1386 17:57:09.398974 Show resources in subtree (Root Device)...After assigning values.
1387 17:57:09.405333 Root Device child on link 0 DOMAIN: 0000
1388 17:57:09.409018 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1389 17:57:09.418720 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1390 17:57:09.428342 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1391 17:57:09.428425 PCI: 00:00.0
1392 17:57:09.438180 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1393 17:57:09.448033 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1394 17:57:09.458317 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1395 17:57:09.467959 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1396 17:57:09.477433 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1397 17:57:09.487206 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1398 17:57:09.497134 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1399 17:57:09.503933 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1400 17:57:09.513714 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1401 17:57:09.523323 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1402 17:57:09.533080 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1403 17:57:09.542983 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1404 17:57:09.552750 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1405 17:57:09.559098 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1406 17:57:09.568918 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1407 17:57:09.578914 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1408 17:57:09.589235 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1409 17:57:09.598668 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1410 17:57:09.608779 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1411 17:57:09.618498 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1412 17:57:09.618605 PCI: 00:02.0
1413 17:57:09.631799 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1414 17:57:09.641644 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1415 17:57:09.651646 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1416 17:57:09.654656 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1417 17:57:09.664443 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1418 17:57:09.667587 GENERIC: 0.0
1419 17:57:09.667670 PCI: 00:05.0
1420 17:57:09.677840 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1421 17:57:09.684282 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1422 17:57:09.684364 GENERIC: 0.0
1423 17:57:09.687333 PCI: 00:08.0
1424 17:57:09.697236 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1425 17:57:09.700843 PCI: 00:0a.0
1426 17:57:09.703941 PCI: 00:0d.0 child on link 0 USB0 port 0
1427 17:57:09.713656 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1428 17:57:09.716789 USB0 port 0 child on link 0 USB3 port 0
1429 17:57:09.720475 USB3 port 0
1430 17:57:09.720580 USB3 port 1
1431 17:57:09.723706 USB3 port 2
1432 17:57:09.726954 USB3 port 3
1433 17:57:09.730277 PCI: 00:14.0 child on link 0 USB0 port 0
1434 17:57:09.739995 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1435 17:57:09.743241 USB0 port 0 child on link 0 USB2 port 0
1436 17:57:09.746843 USB2 port 0
1437 17:57:09.746924 USB2 port 1
1438 17:57:09.749888 USB2 port 2
1439 17:57:09.753092 USB2 port 3
1440 17:57:09.753172 USB2 port 4
1441 17:57:09.756255 USB2 port 5
1442 17:57:09.756335 USB2 port 6
1443 17:57:09.759600 USB2 port 7
1444 17:57:09.759680 USB2 port 8
1445 17:57:09.763175 USB2 port 9
1446 17:57:09.763255 USB3 port 0
1447 17:57:09.766247 USB3 port 1
1448 17:57:09.766327 USB3 port 2
1449 17:57:09.769360 USB3 port 3
1450 17:57:09.769440 PCI: 00:14.2
1451 17:57:09.782483 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1452 17:57:09.792681 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1453 17:57:09.795750 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1454 17:57:09.805732 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1455 17:57:09.809342 GENERIC: 0.0
1456 17:57:09.812575 PCI: 00:15.0 child on link 0 I2C: 00:1a
1457 17:57:09.822442 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1458 17:57:09.825719 I2C: 00:1a
1459 17:57:09.825800 I2C: 00:31
1460 17:57:09.828864 I2C: 00:32
1461 17:57:09.831935 PCI: 00:15.1 child on link 0 I2C: 00:10
1462 17:57:09.842052 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1463 17:57:09.845140 I2C: 00:10
1464 17:57:09.845266 PCI: 00:15.2
1465 17:57:09.855021 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1466 17:57:09.858687 PCI: 00:15.3
1467 17:57:09.868088 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1468 17:57:09.868177 PCI: 00:16.0
1469 17:57:09.878097 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1470 17:57:09.881174 PCI: 00:19.0
1471 17:57:09.884813 PCI: 00:19.1 child on link 0 I2C: 00:15
1472 17:57:09.894721 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1473 17:57:09.897585 I2C: 00:15
1474 17:57:09.901239 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1475 17:57:09.911129 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1476 17:57:09.924173 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1477 17:57:09.933818 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1478 17:57:09.933917 GENERIC: 0.0
1479 17:57:09.937356 PCI: 01:00.0
1480 17:57:09.947075 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1481 17:57:09.956889 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1482 17:57:09.960438 PCI: 00:1e.0
1483 17:57:09.970314 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1484 17:57:09.973368 PCI: 00:1e.2 child on link 0 SPI: 00
1485 17:57:09.983395 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1486 17:57:09.986500 SPI: 00
1487 17:57:09.990050 PCI: 00:1e.3 child on link 0 SPI: 00
1488 17:57:09.999982 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1489 17:57:10.003036 SPI: 00
1490 17:57:10.006535 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1491 17:57:10.015911 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1492 17:57:10.016019 PNP: 0c09.0
1493 17:57:10.025738 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1494 17:57:10.029458 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1495 17:57:10.038981 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1496 17:57:10.049011 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1497 17:57:10.052495 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1498 17:57:10.055672 GENERIC: 0.0
1499 17:57:10.055753 GENERIC: 1.0
1500 17:57:10.058774 PCI: 00:1f.3
1501 17:57:10.068765 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1502 17:57:10.078467 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1503 17:57:10.081663 PCI: 00:1f.5
1504 17:57:10.091845 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1505 17:57:10.094892 CPU_CLUSTER: 0 child on link 0 APIC: 00
1506 17:57:10.098421 APIC: 00
1507 17:57:10.098502 APIC: 01
1508 17:57:10.098609 APIC: 04
1509 17:57:10.101634 APIC: 07
1510 17:57:10.101715 APIC: 02
1511 17:57:10.101779 APIC: 05
1512 17:57:10.104735 APIC: 06
1513 17:57:10.104816 APIC: 03
1514 17:57:10.107886 Done allocating resources.
1515 17:57:10.114498 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2474 ms
1516 17:57:10.121482 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1517 17:57:10.124563 Configure GPIOs for I2S audio on UP4.
1518 17:57:10.130933 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1519 17:57:10.134415 Enabling resources...
1520 17:57:10.137546 PCI: 00:00.0 subsystem <- 8086/9a12
1521 17:57:10.141119 PCI: 00:00.0 cmd <- 06
1522 17:57:10.144426 PCI: 00:02.0 subsystem <- 8086/9a40
1523 17:57:10.147434 PCI: 00:02.0 cmd <- 03
1524 17:57:10.150835 PCI: 00:04.0 subsystem <- 8086/9a03
1525 17:57:10.150940 PCI: 00:04.0 cmd <- 02
1526 17:57:10.157196 PCI: 00:05.0 subsystem <- 8086/9a19
1527 17:57:10.157315 PCI: 00:05.0 cmd <- 02
1528 17:57:10.160486 PCI: 00:08.0 subsystem <- 8086/9a11
1529 17:57:10.163645 PCI: 00:08.0 cmd <- 06
1530 17:57:10.167336 PCI: 00:0d.0 subsystem <- 8086/9a13
1531 17:57:10.170448 PCI: 00:0d.0 cmd <- 02
1532 17:57:10.174011 PCI: 00:14.0 subsystem <- 8086/a0ed
1533 17:57:10.177209 PCI: 00:14.0 cmd <- 02
1534 17:57:10.180229 PCI: 00:14.2 subsystem <- 8086/a0ef
1535 17:57:10.183814 PCI: 00:14.2 cmd <- 02
1536 17:57:10.186912 PCI: 00:14.3 subsystem <- 8086/a0f0
1537 17:57:10.189936 PCI: 00:14.3 cmd <- 02
1538 17:57:10.193503 PCI: 00:15.0 subsystem <- 8086/a0e8
1539 17:57:10.196505 PCI: 00:15.0 cmd <- 02
1540 17:57:10.199953 PCI: 00:15.1 subsystem <- 8086/a0e9
1541 17:57:10.203036 PCI: 00:15.1 cmd <- 02
1542 17:57:10.206262 PCI: 00:15.2 subsystem <- 8086/a0ea
1543 17:57:10.206363 PCI: 00:15.2 cmd <- 02
1544 17:57:10.213036 PCI: 00:15.3 subsystem <- 8086/a0eb
1545 17:57:10.213159 PCI: 00:15.3 cmd <- 02
1546 17:57:10.216337 PCI: 00:16.0 subsystem <- 8086/a0e0
1547 17:57:10.219763 PCI: 00:16.0 cmd <- 02
1548 17:57:10.222676 PCI: 00:19.1 subsystem <- 8086/a0c6
1549 17:57:10.225928 PCI: 00:19.1 cmd <- 02
1550 17:57:10.229682 PCI: 00:1d.0 bridge ctrl <- 0013
1551 17:57:10.233205 PCI: 00:1d.0 subsystem <- 8086/a0b0
1552 17:57:10.236286 PCI: 00:1d.0 cmd <- 06
1553 17:57:10.239447 PCI: 00:1e.0 subsystem <- 8086/a0a8
1554 17:57:10.242643 PCI: 00:1e.0 cmd <- 06
1555 17:57:10.245816 PCI: 00:1e.2 subsystem <- 8086/a0aa
1556 17:57:10.248896 PCI: 00:1e.2 cmd <- 06
1557 17:57:10.252506 PCI: 00:1e.3 subsystem <- 8086/a0ab
1558 17:57:10.255647 PCI: 00:1e.3 cmd <- 02
1559 17:57:10.259096 PCI: 00:1f.0 subsystem <- 8086/a087
1560 17:57:10.262318 PCI: 00:1f.0 cmd <- 407
1561 17:57:10.265698 PCI: 00:1f.3 subsystem <- 8086/a0c8
1562 17:57:10.265779 PCI: 00:1f.3 cmd <- 02
1563 17:57:10.272091 PCI: 00:1f.5 subsystem <- 8086/a0a4
1564 17:57:10.272172 PCI: 00:1f.5 cmd <- 406
1565 17:57:10.277499 PCI: 01:00.0 cmd <- 02
1566 17:57:10.282128 done.
1567 17:57:10.285213 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1568 17:57:10.288691 Initializing devices...
1569 17:57:10.291863 Root Device init
1570 17:57:10.294854 Chrome EC: Set SMI mask to 0x0000000000000000
1571 17:57:10.301574 Chrome EC: clear events_b mask to 0x0000000000000000
1572 17:57:10.308116 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1573 17:57:10.314939 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1574 17:57:10.318012 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1575 17:57:10.324660 Chrome EC: Set WAKE mask to 0x0000000000000000
1576 17:57:10.328004 fw_config match found: DB_USB=USB3_ACTIVE
1577 17:57:10.334633 Configure Right Type-C port orientation for retimer
1578 17:57:10.337572 Root Device init finished in 43 msecs
1579 17:57:10.340836 PCI: 00:00.0 init
1580 17:57:10.344442 CPU TDP = 9 Watts
1581 17:57:10.344524 CPU PL1 = 9 Watts
1582 17:57:10.347507 CPU PL2 = 40 Watts
1583 17:57:10.350557 CPU PL4 = 83 Watts
1584 17:57:10.354154 PCI: 00:00.0 init finished in 8 msecs
1585 17:57:10.354237 PCI: 00:02.0 init
1586 17:57:10.357380 GMA: Found VBT in CBFS
1587 17:57:10.360946 GMA: Found valid VBT in CBFS
1588 17:57:10.367330 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1589 17:57:10.373695 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1590 17:57:10.377072 PCI: 00:02.0 init finished in 18 msecs
1591 17:57:10.380527 PCI: 00:05.0 init
1592 17:57:10.383761 PCI: 00:05.0 init finished in 0 msecs
1593 17:57:10.386960 PCI: 00:08.0 init
1594 17:57:10.390498 PCI: 00:08.0 init finished in 0 msecs
1595 17:57:10.393607 PCI: 00:14.0 init
1596 17:57:10.396776 PCI: 00:14.0 init finished in 0 msecs
1597 17:57:10.399843 PCI: 00:14.2 init
1598 17:57:10.403508 PCI: 00:14.2 init finished in 0 msecs
1599 17:57:10.406359 PCI: 00:15.0 init
1600 17:57:10.409708 I2C bus 0 version 0x3230302a
1601 17:57:10.413311 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1602 17:57:10.416491 PCI: 00:15.0 init finished in 6 msecs
1603 17:57:10.419717 PCI: 00:15.1 init
1604 17:57:10.419821 I2C bus 1 version 0x3230302a
1605 17:57:10.426478 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1606 17:57:10.429628 PCI: 00:15.1 init finished in 6 msecs
1607 17:57:10.429743 PCI: 00:15.2 init
1608 17:57:10.433018 I2C bus 2 version 0x3230302a
1609 17:57:10.435940 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1610 17:57:10.442553 PCI: 00:15.2 init finished in 6 msecs
1611 17:57:10.442675 PCI: 00:15.3 init
1612 17:57:10.445750 I2C bus 3 version 0x3230302a
1613 17:57:10.449328 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1614 17:57:10.452536 PCI: 00:15.3 init finished in 6 msecs
1615 17:57:10.456130 PCI: 00:16.0 init
1616 17:57:10.459330 PCI: 00:16.0 init finished in 0 msecs
1617 17:57:10.462425 PCI: 00:19.1 init
1618 17:57:10.466008 I2C bus 5 version 0x3230302a
1619 17:57:10.468921 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1620 17:57:10.472599 PCI: 00:19.1 init finished in 6 msecs
1621 17:57:10.475855 PCI: 00:1d.0 init
1622 17:57:10.479273 Initializing PCH PCIe bridge.
1623 17:57:10.482324 PCI: 00:1d.0 init finished in 3 msecs
1624 17:57:10.485754 PCI: 00:1f.0 init
1625 17:57:10.488760 IOAPIC: Initializing IOAPIC at 0xfec00000
1626 17:57:10.495735 IOAPIC: Bootstrap Processor Local APIC = 0x00
1627 17:57:10.495820 IOAPIC: ID = 0x02
1628 17:57:10.498685 IOAPIC: Dumping registers
1629 17:57:10.501842 reg 0x0000: 0x02000000
1630 17:57:10.501948 reg 0x0001: 0x00770020
1631 17:57:10.505161 reg 0x0002: 0x00000000
1632 17:57:10.511896 PCI: 00:1f.0 init finished in 21 msecs
1633 17:57:10.512004 PCI: 00:1f.2 init
1634 17:57:10.515271 Disabling ACPI via APMC.
1635 17:57:10.519455 APMC done.
1636 17:57:10.522429 PCI: 00:1f.2 init finished in 6 msecs
1637 17:57:10.533948 PCI: 01:00.0 init
1638 17:57:10.537046 PCI: 01:00.0 init finished in 0 msecs
1639 17:57:10.540427 PNP: 0c09.0 init
1640 17:57:10.543774 Google Chrome EC uptime: 8.321 seconds
1641 17:57:10.550301 Google Chrome AP resets since EC boot: 1
1642 17:57:10.553913 Google Chrome most recent AP reset causes:
1643 17:57:10.556979 0.454: 32775 shutdown: entering G3
1644 17:57:10.563682 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1645 17:57:10.566853 PNP: 0c09.0 init finished in 22 msecs
1646 17:57:10.572358 Devices initialized
1647 17:57:10.576001 Show all devs... After init.
1648 17:57:10.579082 Root Device: enabled 1
1649 17:57:10.579161 DOMAIN: 0000: enabled 1
1650 17:57:10.582196 CPU_CLUSTER: 0: enabled 1
1651 17:57:10.585584 PCI: 00:00.0: enabled 1
1652 17:57:10.588734 PCI: 00:02.0: enabled 1
1653 17:57:10.588813 PCI: 00:04.0: enabled 1
1654 17:57:10.591889 PCI: 00:05.0: enabled 1
1655 17:57:10.595309 PCI: 00:06.0: enabled 0
1656 17:57:10.598526 PCI: 00:07.0: enabled 0
1657 17:57:10.598648 PCI: 00:07.1: enabled 0
1658 17:57:10.601860 PCI: 00:07.2: enabled 0
1659 17:57:10.605429 PCI: 00:07.3: enabled 0
1660 17:57:10.608588 PCI: 00:08.0: enabled 1
1661 17:57:10.608668 PCI: 00:09.0: enabled 0
1662 17:57:10.611733 PCI: 00:0a.0: enabled 0
1663 17:57:10.615377 PCI: 00:0d.0: enabled 1
1664 17:57:10.618459 PCI: 00:0d.1: enabled 0
1665 17:57:10.618608 PCI: 00:0d.2: enabled 0
1666 17:57:10.621851 PCI: 00:0d.3: enabled 0
1667 17:57:10.625161 PCI: 00:0e.0: enabled 0
1668 17:57:10.628350 PCI: 00:10.2: enabled 1
1669 17:57:10.628429 PCI: 00:10.6: enabled 0
1670 17:57:10.631463 PCI: 00:10.7: enabled 0
1671 17:57:10.634662 PCI: 00:12.0: enabled 0
1672 17:57:10.638302 PCI: 00:12.6: enabled 0
1673 17:57:10.638382 PCI: 00:13.0: enabled 0
1674 17:57:10.641395 PCI: 00:14.0: enabled 1
1675 17:57:10.644925 PCI: 00:14.1: enabled 0
1676 17:57:10.647801 PCI: 00:14.2: enabled 1
1677 17:57:10.647906 PCI: 00:14.3: enabled 1
1678 17:57:10.651254 PCI: 00:15.0: enabled 1
1679 17:57:10.654658 PCI: 00:15.1: enabled 1
1680 17:57:10.657700 PCI: 00:15.2: enabled 1
1681 17:57:10.657780 PCI: 00:15.3: enabled 1
1682 17:57:10.660937 PCI: 00:16.0: enabled 1
1683 17:57:10.664614 PCI: 00:16.1: enabled 0
1684 17:57:10.667792 PCI: 00:16.2: enabled 0
1685 17:57:10.667872 PCI: 00:16.3: enabled 0
1686 17:57:10.670830 PCI: 00:16.4: enabled 0
1687 17:57:10.674329 PCI: 00:16.5: enabled 0
1688 17:57:10.677314 PCI: 00:17.0: enabled 0
1689 17:57:10.677403 PCI: 00:19.0: enabled 0
1690 17:57:10.680900 PCI: 00:19.1: enabled 1
1691 17:57:10.684087 PCI: 00:19.2: enabled 0
1692 17:57:10.684167 PCI: 00:1c.0: enabled 1
1693 17:57:10.687548 PCI: 00:1c.1: enabled 0
1694 17:57:10.690480 PCI: 00:1c.2: enabled 0
1695 17:57:10.694122 PCI: 00:1c.3: enabled 0
1696 17:57:10.694201 PCI: 00:1c.4: enabled 0
1697 17:57:10.697282 PCI: 00:1c.5: enabled 0
1698 17:57:10.700427 PCI: 00:1c.6: enabled 1
1699 17:57:10.703745 PCI: 00:1c.7: enabled 0
1700 17:57:10.703850 PCI: 00:1d.0: enabled 1
1701 17:57:10.707021 PCI: 00:1d.1: enabled 0
1702 17:57:10.710643 PCI: 00:1d.2: enabled 1
1703 17:57:10.713880 PCI: 00:1d.3: enabled 0
1704 17:57:10.713959 PCI: 00:1e.0: enabled 1
1705 17:57:10.716940 PCI: 00:1e.1: enabled 0
1706 17:57:10.720105 PCI: 00:1e.2: enabled 1
1707 17:57:10.723702 PCI: 00:1e.3: enabled 1
1708 17:57:10.723797 PCI: 00:1f.0: enabled 1
1709 17:57:10.726879 PCI: 00:1f.1: enabled 0
1710 17:57:10.730268 PCI: 00:1f.2: enabled 1
1711 17:57:10.733263 PCI: 00:1f.3: enabled 1
1712 17:57:10.733342 PCI: 00:1f.4: enabled 0
1713 17:57:10.736820 PCI: 00:1f.5: enabled 1
1714 17:57:10.739937 PCI: 00:1f.6: enabled 0
1715 17:57:10.743129 PCI: 00:1f.7: enabled 0
1716 17:57:10.743209 APIC: 00: enabled 1
1717 17:57:10.746524 GENERIC: 0.0: enabled 1
1718 17:57:10.749727 GENERIC: 0.0: enabled 1
1719 17:57:10.749808 GENERIC: 1.0: enabled 1
1720 17:57:10.753267 GENERIC: 0.0: enabled 1
1721 17:57:10.756345 GENERIC: 1.0: enabled 1
1722 17:57:10.759807 USB0 port 0: enabled 1
1723 17:57:10.759886 GENERIC: 0.0: enabled 1
1724 17:57:10.762801 USB0 port 0: enabled 1
1725 17:57:10.766327 GENERIC: 0.0: enabled 1
1726 17:57:10.766407 I2C: 00:1a: enabled 1
1727 17:57:10.769486 I2C: 00:31: enabled 1
1728 17:57:10.772624 I2C: 00:32: enabled 1
1729 17:57:10.776327 I2C: 00:10: enabled 1
1730 17:57:10.776466 I2C: 00:15: enabled 1
1731 17:57:10.779499 GENERIC: 0.0: enabled 0
1732 17:57:10.782855 GENERIC: 1.0: enabled 0
1733 17:57:10.782934 GENERIC: 0.0: enabled 1
1734 17:57:10.785960 SPI: 00: enabled 1
1735 17:57:10.789139 SPI: 00: enabled 1
1736 17:57:10.789243 PNP: 0c09.0: enabled 1
1737 17:57:10.792274 GENERIC: 0.0: enabled 1
1738 17:57:10.795635 USB3 port 0: enabled 1
1739 17:57:10.799356 USB3 port 1: enabled 1
1740 17:57:10.799435 USB3 port 2: enabled 0
1741 17:57:10.802511 USB3 port 3: enabled 0
1742 17:57:10.805632 USB2 port 0: enabled 0
1743 17:57:10.805712 USB2 port 1: enabled 1
1744 17:57:10.808759 USB2 port 2: enabled 1
1745 17:57:10.812307 USB2 port 3: enabled 0
1746 17:57:10.815331 USB2 port 4: enabled 1
1747 17:57:10.815410 USB2 port 5: enabled 0
1748 17:57:10.818579 USB2 port 6: enabled 0
1749 17:57:10.821873 USB2 port 7: enabled 0
1750 17:57:10.821973 USB2 port 8: enabled 0
1751 17:57:10.825132 USB2 port 9: enabled 0
1752 17:57:10.828462 USB3 port 0: enabled 0
1753 17:57:10.832034 USB3 port 1: enabled 1
1754 17:57:10.832114 USB3 port 2: enabled 0
1755 17:57:10.835071 USB3 port 3: enabled 0
1756 17:57:10.838426 GENERIC: 0.0: enabled 1
1757 17:57:10.838505 GENERIC: 1.0: enabled 1
1758 17:57:10.841834 APIC: 01: enabled 1
1759 17:57:10.845126 APIC: 04: enabled 1
1760 17:57:10.845231 APIC: 07: enabled 1
1761 17:57:10.848292 APIC: 02: enabled 1
1762 17:57:10.851345 APIC: 05: enabled 1
1763 17:57:10.851425 APIC: 06: enabled 1
1764 17:57:10.854979 APIC: 03: enabled 1
1765 17:57:10.858006 PCI: 01:00.0: enabled 1
1766 17:57:10.861138 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1767 17:57:10.868168 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1768 17:57:10.871107 ELOG: NV offset 0xf30000 size 0x1000
1769 17:57:10.877851 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1770 17:57:10.884571 ELOG: Event(17) added with size 13 at 2023-10-09 17:57:10 UTC
1771 17:57:10.890896 ELOG: Event(92) added with size 9 at 2023-10-09 17:57:10 UTC
1772 17:57:10.897389 ELOG: Event(93) added with size 9 at 2023-10-09 17:57:10 UTC
1773 17:57:10.903974 ELOG: Event(9E) added with size 10 at 2023-10-09 17:57:10 UTC
1774 17:57:10.910815 ELOG: Event(9F) added with size 14 at 2023-10-09 17:57:10 UTC
1775 17:57:10.916978 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1776 17:57:10.923573 ELOG: Event(A1) added with size 10 at 2023-10-09 17:57:10 UTC
1777 17:57:10.930284 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1778 17:57:10.936853 ELOG: Event(A0) added with size 9 at 2023-10-09 17:57:10 UTC
1779 17:57:10.940125 elog_add_boot_reason: Logged dev mode boot
1780 17:57:10.946921 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1781 17:57:10.949900 Finalize devices...
1782 17:57:10.949980 Devices finalized
1783 17:57:10.956346 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1784 17:57:10.960098 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1785 17:57:10.966330 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1786 17:57:10.973063 ME: HFSTS1 : 0x80030055
1787 17:57:10.976551 ME: HFSTS2 : 0x30280116
1788 17:57:10.979824 ME: HFSTS3 : 0x00000050
1789 17:57:10.986049 ME: HFSTS4 : 0x00004000
1790 17:57:10.989412 ME: HFSTS5 : 0x00000000
1791 17:57:10.992637 ME: HFSTS6 : 0x40400006
1792 17:57:10.999470 ME: Manufacturing Mode : YES
1793 17:57:11.002382 ME: SPI Protection Mode Enabled : NO
1794 17:57:11.005947 ME: FW Partition Table : OK
1795 17:57:11.009142 ME: Bringup Loader Failure : NO
1796 17:57:11.012313 ME: Firmware Init Complete : NO
1797 17:57:11.015904 ME: Boot Options Present : NO
1798 17:57:11.019124 ME: Update In Progress : NO
1799 17:57:11.022258 ME: D0i3 Support : YES
1800 17:57:11.028548 ME: Low Power State Enabled : NO
1801 17:57:11.032233 ME: CPU Replaced : YES
1802 17:57:11.035266 ME: CPU Replacement Valid : YES
1803 17:57:11.038343 ME: Current Working State : 5
1804 17:57:11.041850 ME: Current Operation State : 1
1805 17:57:11.045338 ME: Current Operation Mode : 3
1806 17:57:11.048594 ME: Error Code : 0
1807 17:57:11.051887 ME: Enhanced Debug Mode : NO
1808 17:57:11.058450 ME: CPU Debug Disabled : YES
1809 17:57:11.061734 ME: TXT Support : NO
1810 17:57:11.067990 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1811 17:57:11.074677 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1812 17:57:11.077815 CBFS: 'fallback/slic' not found.
1813 17:57:11.081340 ACPI: Writing ACPI tables at 76b01000.
1814 17:57:11.084390 ACPI: * FACS
1815 17:57:11.084472 ACPI: * DSDT
1816 17:57:11.087605 Ramoops buffer: 0x100000@0x76a00000.
1817 17:57:11.094295 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1818 17:57:11.097417 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1819 17:57:11.101083 Google Chrome EC: version:
1820 17:57:11.104234 ro: voema_v2.0.10114-a447f03e46
1821 17:57:11.107252 rw: voema_v2.0.10114-a447f03e46
1822 17:57:11.110806 running image: 2
1823 17:57:11.117424 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1824 17:57:11.120560 ACPI: * FADT
1825 17:57:11.120642 SCI is IRQ9
1826 17:57:11.123785 ACPI: added table 1/32, length now 40
1827 17:57:11.126851 ACPI: * SSDT
1828 17:57:11.130483 Found 1 CPU(s) with 8 core(s) each.
1829 17:57:11.136699 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1830 17:57:11.140273 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1831 17:57:11.143398 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1832 17:57:11.146859 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1833 17:57:11.153057 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1834 17:57:11.159645 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1835 17:57:11.163272 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1836 17:57:11.169845 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1837 17:57:11.176285 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1838 17:57:11.179766 \_SB.PCI0.RP09: Added StorageD3Enable property
1839 17:57:11.186071 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1840 17:57:11.189538 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1841 17:57:11.195777 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1842 17:57:11.199333 PS2K: Passing 80 keymaps to kernel
1843 17:57:11.206150 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1844 17:57:11.212263 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1845 17:57:11.218894 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1846 17:57:11.225720 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1847 17:57:11.231968 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1848 17:57:11.238422 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1849 17:57:11.245193 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1850 17:57:11.251521 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1851 17:57:11.255102 ACPI: added table 2/32, length now 44
1852 17:57:11.258172 ACPI: * MCFG
1853 17:57:11.261571 ACPI: added table 3/32, length now 48
1854 17:57:11.261660 ACPI: * TPM2
1855 17:57:11.264753 TPM2 log created at 0x769f0000
1856 17:57:11.268362 ACPI: added table 4/32, length now 52
1857 17:57:11.271410 ACPI: * MADT
1858 17:57:11.271490 SCI is IRQ9
1859 17:57:11.274886 ACPI: added table 5/32, length now 56
1860 17:57:11.277674 current = 76b09850
1861 17:57:11.281271 ACPI: * DMAR
1862 17:57:11.284290 ACPI: added table 6/32, length now 60
1863 17:57:11.287711 ACPI: added table 7/32, length now 64
1864 17:57:11.287791 ACPI: * HPET
1865 17:57:11.294273 ACPI: added table 8/32, length now 68
1866 17:57:11.294353 ACPI: done.
1867 17:57:11.297942 ACPI tables: 35216 bytes.
1868 17:57:11.300921 smbios_write_tables: 769ef000
1869 17:57:11.304511 EC returned error result code 3
1870 17:57:11.307709 Couldn't obtain OEM name from CBI
1871 17:57:11.310820 Create SMBIOS type 16
1872 17:57:11.313876 Create SMBIOS type 17
1873 17:57:11.313955 GENERIC: 0.0 (WIFI Device)
1874 17:57:11.317405 SMBIOS tables: 1734 bytes.
1875 17:57:11.324002 Writing table forward entry at 0x00000500
1876 17:57:11.327174 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1877 17:57:11.333560 Writing coreboot table at 0x76b25000
1878 17:57:11.337229 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1879 17:57:11.343448 1. 0000000000001000-000000000009ffff: RAM
1880 17:57:11.346993 2. 00000000000a0000-00000000000fffff: RESERVED
1881 17:57:11.350130 3. 0000000000100000-00000000769eefff: RAM
1882 17:57:11.356842 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1883 17:57:11.363301 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1884 17:57:11.369924 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1885 17:57:11.373097 7. 0000000077000000-000000007fbfffff: RESERVED
1886 17:57:11.379445 8. 00000000c0000000-00000000cfffffff: RESERVED
1887 17:57:11.382970 9. 00000000f8000000-00000000f9ffffff: RESERVED
1888 17:57:11.386113 10. 00000000fb000000-00000000fb000fff: RESERVED
1889 17:57:11.392863 11. 00000000fe000000-00000000fe00ffff: RESERVED
1890 17:57:11.396036 12. 00000000fed80000-00000000fed87fff: RESERVED
1891 17:57:11.402483 13. 00000000fed90000-00000000fed92fff: RESERVED
1892 17:57:11.405913 14. 00000000feda0000-00000000feda1fff: RESERVED
1893 17:57:11.412564 15. 00000000fedc0000-00000000feddffff: RESERVED
1894 17:57:11.415711 16. 0000000100000000-00000004803fffff: RAM
1895 17:57:11.419273 Passing 4 GPIOs to payload:
1896 17:57:11.422294 NAME | PORT | POLARITY | VALUE
1897 17:57:11.428656 lid | undefined | high | high
1898 17:57:11.435568 power | undefined | high | low
1899 17:57:11.438637 oprom | undefined | high | low
1900 17:57:11.445261 EC in RW | 0x000000e5 | high | high
1901 17:57:11.452013 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1902 17:57:11.455233 coreboot table: 1576 bytes.
1903 17:57:11.458257 IMD ROOT 0. 0x76fff000 0x00001000
1904 17:57:11.461854 IMD SMALL 1. 0x76ffe000 0x00001000
1905 17:57:11.464898 FSP MEMORY 2. 0x76c4e000 0x003b0000
1906 17:57:11.468291 VPD 3. 0x76c4d000 0x00000367
1907 17:57:11.471640 RO MCACHE 4. 0x76c4c000 0x00000fdc
1908 17:57:11.478304 CONSOLE 5. 0x76c2c000 0x00020000
1909 17:57:11.481444 FMAP 6. 0x76c2b000 0x00000578
1910 17:57:11.484544 TIME STAMP 7. 0x76c2a000 0x00000910
1911 17:57:11.488220 VBOOT WORK 8. 0x76c16000 0x00014000
1912 17:57:11.491472 ROMSTG STCK 9. 0x76c15000 0x00001000
1913 17:57:11.494271 AFTER CAR 10. 0x76c0a000 0x0000b000
1914 17:57:11.497916 RAMSTAGE 11. 0x76b97000 0x00073000
1915 17:57:11.501459 REFCODE 12. 0x76b42000 0x00055000
1916 17:57:11.507728 SMM BACKUP 13. 0x76b32000 0x00010000
1917 17:57:11.511096 4f444749 14. 0x76b30000 0x00002000
1918 17:57:11.514386 EXT VBT15. 0x76b2d000 0x0000219f
1919 17:57:11.517328 COREBOOT 16. 0x76b25000 0x00008000
1920 17:57:11.520505 ACPI 17. 0x76b01000 0x00024000
1921 17:57:11.523897 ACPI GNVS 18. 0x76b00000 0x00001000
1922 17:57:11.527129 RAMOOPS 19. 0x76a00000 0x00100000
1923 17:57:11.530736 TPM2 TCGLOG20. 0x769f0000 0x00010000
1924 17:57:11.537447 SMBIOS 21. 0x769ef000 0x00000800
1925 17:57:11.537528 IMD small region:
1926 17:57:11.540610 IMD ROOT 0. 0x76ffec00 0x00000400
1927 17:57:11.547234 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1928 17:57:11.550423 POWER STATE 2. 0x76ffeb80 0x00000044
1929 17:57:11.553455 ROMSTAGE 3. 0x76ffeb60 0x00000004
1930 17:57:11.557163 MEM INFO 4. 0x76ffe980 0x000001e0
1931 17:57:11.563600 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1932 17:57:11.566824 MTRR: Physical address space:
1933 17:57:11.573309 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1934 17:57:11.579594 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1935 17:57:11.586411 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1936 17:57:11.589940 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1937 17:57:11.596215 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1938 17:57:11.602955 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1939 17:57:11.609334 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1940 17:57:11.612820 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 17:57:11.619239 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 17:57:11.622716 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 17:57:11.625788 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 17:57:11.628974 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 17:57:11.635835 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 17:57:11.638809 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 17:57:11.641970 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 17:57:11.645666 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 17:57:11.651818 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 17:57:11.655026 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 17:57:11.659225 call enable_fixed_mtrr()
1952 17:57:11.662264 CPU physical address size: 39 bits
1953 17:57:11.668902 MTRR: default type WB/UC MTRR counts: 6/7.
1954 17:57:11.672094 MTRR: WB selected as default type.
1955 17:57:11.678722 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 17:57:11.685143 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 17:57:11.688667 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 17:57:11.695030 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1959 17:57:11.701846 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1960 17:57:11.708099 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1961 17:57:11.716076 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 17:57:11.719049 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 17:57:11.722741 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 17:57:11.725851 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 17:57:11.732351 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 17:57:11.735542 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 17:57:11.738845 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 17:57:11.742371 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 17:57:11.748741 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 17:57:11.751874 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 17:57:11.755325 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 17:57:11.758846 MTRR: Fixed MSR 0x250 0x0606060606060606
1973 17:57:11.765006 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 17:57:11.768277 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 17:57:11.771880 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 17:57:11.775101 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 17:57:11.781672 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 17:57:11.784803 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 17:57:11.788276 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 17:57:11.791317 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 17:57:11.798111 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 17:57:11.801593 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 17:57:11.804762 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 17:57:11.812185 MTRR: Fixed MSR 0x258 0x0606060606060606
1985 17:57:11.812275 call enable_fixed_mtrr()
1986 17:57:11.818807 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 17:57:11.822318 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 17:57:11.825405 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 17:57:11.828576 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 17:57:11.835219 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 17:57:11.838791 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 17:57:11.841798 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 17:57:11.845131 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 17:57:11.851589 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 17:57:11.855207 CPU physical address size: 39 bits
1996 17:57:11.860129 call enable_fixed_mtrr()
1997 17:57:11.863494 call enable_fixed_mtrr()
1998 17:57:11.866897 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 17:57:11.870068 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 17:57:11.876857 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 17:57:11.880076 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 17:57:11.883067 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 17:57:11.886272 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 17:57:11.893140 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 17:57:11.896359 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 17:57:11.899764 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 17:57:11.902810 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 17:57:11.909287 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 17:57:11.912772 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 17:57:11.919729 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 17:57:11.922976 MTRR: Fixed MSR 0x259 0x0000000000000000
2012 17:57:11.925978 MTRR: Fixed MSR 0x268 0x0606060606060606
2013 17:57:11.929604 MTRR: Fixed MSR 0x269 0x0606060606060606
2014 17:57:11.935990 MTRR: Fixed MSR 0x26a 0x0606060606060606
2015 17:57:11.939190 MTRR: Fixed MSR 0x26b 0x0606060606060606
2016 17:57:11.942786 MTRR: Fixed MSR 0x26c 0x0606060606060606
2017 17:57:11.945869 MTRR: Fixed MSR 0x26d 0x0606060606060606
2018 17:57:11.952771 MTRR: Fixed MSR 0x26e 0x0606060606060606
2019 17:57:11.956007 MTRR: Fixed MSR 0x26f 0x0606060606060606
2020 17:57:11.959076 call enable_fixed_mtrr()
2021 17:57:11.962643 call enable_fixed_mtrr()
2022 17:57:11.965766 CPU physical address size: 39 bits
2023 17:57:11.965848
2024 17:57:11.969954 MTRR check
2025 17:57:11.973039 CPU physical address size: 39 bits
2026 17:57:11.980256 CPU physical address size: 39 bits
2027 17:57:11.983358 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 17:57:11.986413 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 17:57:11.990160 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 17:57:11.993341 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 17:57:11.999742 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 17:57:12.002863 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 17:57:12.005865 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 17:57:12.012720 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 17:57:12.016214 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 17:57:12.019317 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 17:57:12.022419 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 17:57:12.028833 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 17:57:12.032338 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 17:57:12.035405 call enable_fixed_mtrr()
2041 17:57:12.038818 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 17:57:12.045371 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 17:57:12.048590 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 17:57:12.052295 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 17:57:12.055443 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 17:57:12.061758 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 17:57:12.065119 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 17:57:12.068110 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 17:57:12.071655 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 17:57:12.077857 CPU physical address size: 39 bits
2051 17:57:12.082503 call enable_fixed_mtrr()
2052 17:57:12.085757 CPU physical address size: 39 bits
2053 17:57:12.092373 Fixed MTRRs : CPU physical address size: 39 bits
2054 17:57:12.092454 Enabled
2055 17:57:12.095446 Variable MTRRs: Enabled
2056 17:57:12.095525
2057 17:57:12.102201 BS: BS_WRITE_TABLES exit times (exec / console): 380 / 152 ms
2058 17:57:12.105265 Checking cr50 for pending updates
2059 17:57:12.111792 Reading cr50 TPM mode
2060 17:57:12.122235 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 6 ms
2061 17:57:12.132240 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2062 17:57:12.135290 Checking segment from ROM address 0xffc02b38
2063 17:57:12.138643 Checking segment from ROM address 0xffc02b54
2064 17:57:12.145396 Loading segment from ROM address 0xffc02b38
2065 17:57:12.145477 code (compression=0)
2066 17:57:12.154804 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2067 17:57:12.164899 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2068 17:57:12.164980 it's not compressed!
2069 17:57:12.309908 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2070 17:57:12.316130 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2071 17:57:12.323060 Loading segment from ROM address 0xffc02b54
2072 17:57:12.326163 Entry Point 0x30000000
2073 17:57:12.326254 Loaded segments
2074 17:57:12.333008 BS: BS_PAYLOAD_LOAD run times (exec / console): 141 / 63 ms
2075 17:57:12.378577 Finalizing chipset.
2076 17:57:12.381732 Finalizing SMM.
2077 17:57:12.381901 APMC done.
2078 17:57:12.388401 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2079 17:57:12.391824 mp_park_aps done after 0 msecs.
2080 17:57:12.394918 Jumping to boot code at 0x30000000(0x76b25000)
2081 17:57:12.404311 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2082 17:57:12.407980
2083 17:57:12.408063
2084 17:57:12.408128
2085 17:57:12.411157 Starting depthcharge on Voema...
2086 17:57:12.411229
2087 17:57:12.411575 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2088 17:57:12.411682 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2089 17:57:12.411764 Setting prompt string to ['volteer:']
2090 17:57:12.411865 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2091 17:57:12.417510 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2092 17:57:12.417589
2093 17:57:12.424434 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2094 17:57:12.424521
2095 17:57:12.430742 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2096 17:57:12.430826
2097 17:57:12.434444 Failed to find eMMC card reader
2098 17:57:12.434535
2099 17:57:12.437613 Wipe memory regions:
2100 17:57:12.437693
2101 17:57:12.440763 [0x00000000001000, 0x000000000a0000)
2102 17:57:12.440844
2103 17:57:12.443744 [0x00000000100000, 0x00000030000000)
2104 17:57:12.481886
2105 17:57:12.484919 [0x00000032662db0, 0x000000769ef000)
2106 17:57:12.537311
2107 17:57:12.540401 [0x00000100000000, 0x00000480400000)
2108 17:57:13.220346
2109 17:57:13.223806 ec_init: CrosEC protocol v3 supported (256, 256)
2110 17:57:13.654863
2111 17:57:13.655019 R8152: Initializing
2112 17:57:13.655088
2113 17:57:13.657894 Version 6 (ocp_data = 5c30)
2114 17:57:13.657963
2115 17:57:13.660987 R8152: Done initializing
2116 17:57:13.661067
2117 17:57:13.664631 Adding net device
2118 17:57:13.965730
2119 17:57:13.969318 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2120 17:57:13.969408
2121 17:57:13.969471
2122 17:57:13.969531
2123 17:57:13.972791 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2125 17:57:14.073183 volteer: tftpboot 192.168.201.1 11712675/tftp-deploy-2t_81_k8/kernel/bzImage 11712675/tftp-deploy-2t_81_k8/kernel/cmdline 11712675/tftp-deploy-2t_81_k8/ramdisk/ramdisk.cpio.gz
2126 17:57:14.073336 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2127 17:57:14.073423 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2128 17:57:14.077524 tftpboot 192.168.201.1 11712675/tftp-deploy-2t_81_k8/kernel/bzIploy-2t_81_k8/kernel/cmdline 11712675/tftp-deploy-2t_81_k8/ramdisk/ramdisk.cpio.gz
2129 17:57:14.077611
2130 17:57:14.077675 Waiting for link
2131 17:57:14.280175
2132 17:57:14.280321 done.
2133 17:57:14.280388
2134 17:57:14.280447 MAC: 00:24:32:30:7a:04
2135 17:57:14.280505
2136 17:57:14.283646 Sending DHCP discover... done.
2137 17:57:14.283789
2138 17:57:14.287022 Waiting for reply... done.
2139 17:57:14.287102
2140 17:57:14.291436 Sending DHCP request... done.
2141 17:57:14.291517
2142 17:57:14.296444 Waiting for reply... done.
2143 17:57:14.296574
2144 17:57:14.296686 My ip is 192.168.201.22
2145 17:57:14.296747
2146 17:57:14.300147 The DHCP server ip is 192.168.201.1
2147 17:57:14.303215
2148 17:57:14.306275 TFTP server IP predefined by user: 192.168.201.1
2149 17:57:14.306355
2150 17:57:14.313049 Bootfile predefined by user: 11712675/tftp-deploy-2t_81_k8/kernel/bzImage
2151 17:57:14.313130
2152 17:57:14.316162 Sending tftp read request... done.
2153 17:57:14.316242
2154 17:57:14.322898 Waiting for the transfer...
2155 17:57:14.322990
2156 17:57:14.872731 00000000 ################################################################
2157 17:57:14.872877
2158 17:57:15.440836 00080000 ################################################################
2159 17:57:15.440984
2160 17:57:16.012589 00100000 ################################################################
2161 17:57:16.012741
2162 17:57:16.563226 00180000 ################################################################
2163 17:57:16.563368
2164 17:57:17.126787 00200000 ################################################################
2165 17:57:17.126949
2166 17:57:17.678493 00280000 ################################################################
2167 17:57:17.678688
2168 17:57:18.227041 00300000 ################################################################
2169 17:57:18.227215
2170 17:57:18.792824 00380000 ################################################################
2171 17:57:18.792997
2172 17:57:19.353138 00400000 ################################################################
2173 17:57:19.353286
2174 17:57:19.909698 00480000 ################################################################
2175 17:57:19.909874
2176 17:57:20.472878 00500000 ################################################################
2177 17:57:20.473074
2178 17:57:21.049965 00580000 ################################################################
2179 17:57:21.050146
2180 17:57:21.608529 00600000 ################################################################
2181 17:57:21.608683
2182 17:57:22.164208 00680000 ################################################################
2183 17:57:22.164348
2184 17:57:22.734757 00700000 ################################################################
2185 17:57:22.734902
2186 17:57:23.282651 00780000 ################################################################
2187 17:57:23.282789
2188 17:57:23.392190 00800000 ############# done.
2189 17:57:23.392343
2190 17:57:23.395396 The bootfile was 8490896 bytes long.
2191 17:57:23.395485
2192 17:57:23.398928 Sending tftp read request... done.
2193 17:57:23.399027
2194 17:57:23.402071 Waiting for the transfer...
2195 17:57:23.402158
2196 17:57:23.993948 00000000 ################################################################
2197 17:57:23.994469
2198 17:57:24.650625 00080000 ################################################################
2199 17:57:24.651144
2200 17:57:25.246439 00100000 ################################################################
2201 17:57:25.246663
2202 17:57:25.798069 00180000 ################################################################
2203 17:57:25.798222
2204 17:57:26.347143 00200000 ################################################################
2205 17:57:26.347296
2206 17:57:26.889582 00280000 ################################################################
2207 17:57:26.889728
2208 17:57:27.453800 00300000 ################################################################
2209 17:57:27.453948
2210 17:57:28.008968 00380000 ################################################################
2211 17:57:28.009134
2212 17:57:28.548733 00400000 ################################################################
2213 17:57:28.548910
2214 17:57:29.091209 00480000 ################################################################
2215 17:57:29.091345
2216 17:57:29.650493 00500000 ################################################################
2217 17:57:29.650680
2218 17:57:30.196241 00580000 ################################################################
2219 17:57:30.196386
2220 17:57:30.745035 00600000 ################################################################
2221 17:57:30.745183
2222 17:57:31.290705 00680000 ################################################################
2223 17:57:31.290850
2224 17:57:31.843210 00700000 ################################################################
2225 17:57:31.843358
2226 17:57:32.382158 00780000 ################################################################
2227 17:57:32.382308
2228 17:57:32.831642 00800000 ##################################################### done.
2229 17:57:32.831873
2230 17:57:32.834746 Sending tftp read request... done.
2231 17:57:32.834829
2232 17:57:32.837691 Waiting for the transfer...
2233 17:57:32.837773
2234 17:57:32.837837 00000000 # done.
2235 17:57:32.837898
2236 17:57:32.848058 Command line loaded dynamically from TFTP file: 11712675/tftp-deploy-2t_81_k8/kernel/cmdline
2237 17:57:32.848140
2238 17:57:32.863981 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2239 17:57:32.868744
2240 17:57:32.872260 Shutting down all USB controllers.
2241 17:57:32.872341
2242 17:57:32.872405 Removing current net device
2243 17:57:32.872464
2244 17:57:32.875265 Finalizing coreboot
2245 17:57:32.875346
2246 17:57:32.881891 Exiting depthcharge with code 4 at timestamp: 29105996
2247 17:57:32.881973
2248 17:57:32.882035
2249 17:57:32.882094 Starting kernel ...
2250 17:57:32.882150
2251 17:57:32.882205
2252 17:57:32.882607 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2253 17:57:32.882701 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2254 17:57:32.882776 Setting prompt string to ['Linux version [0-9]']
2255 17:57:32.882841 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2256 17:57:32.882906 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2258 18:01:56.883507 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2260 18:01:56.884490 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2262 18:01:56.885266 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2265 18:01:56.886502 end: 2 depthcharge-action (duration 00:05:00) [common]
2267 18:01:56.887586 Cleaning after the job
2268 18:01:56.888019 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712675/tftp-deploy-2t_81_k8/ramdisk
2269 18:01:56.894358 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712675/tftp-deploy-2t_81_k8/kernel
2270 18:01:56.900678 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712675/tftp-deploy-2t_81_k8/modules
2271 18:01:56.902981 start: 5.1 power-off (timeout 00:00:30) [common]
2272 18:01:56.903896 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2273 18:01:57.013669 >> Command sent successfully.
2274 18:01:57.017703 Returned 0 in 0 seconds
2275 18:01:57.118601 end: 5.1 power-off (duration 00:00:00) [common]
2277 18:01:57.119716 start: 5.2 read-feedback (timeout 00:10:00) [common]
2278 18:01:57.120567 Listened to connection for namespace 'common' for up to 1s
2279 18:01:58.121426 Finalising connection for namespace 'common'
2280 18:01:58.122100 Disconnecting from shell: Finalise
2281 18:01:58.122564
2282 18:01:58.223612 end: 5.2 read-feedback (duration 00:00:01) [common]
2283 18:01:58.224245 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712675
2284 18:01:58.244533 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712675
2285 18:01:58.244673 JobError: Your job cannot terminate cleanly.