Boot log: dell-latitude-5400-4305U-sarien
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:52:57.591294 lava-dispatcher, installed at version: 2023.08
2 17:52:57.591512 start: 0 validate
3 17:52:57.591651 Start time: 2023-10-09 17:52:57.591643+00:00 (UTC)
4 17:52:57.591811 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:52:57.591990 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:52:57.865379 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:52:57.865561 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:52:58.123102 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:52:58.123351 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:53:02.626000 validate duration: 5.03
12 17:53:02.627402 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:53:02.628258 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:53:02.628858 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:53:02.629474 Not decompressing ramdisk as can be used compressed.
16 17:53:02.629953 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:53:02.630307 saving as /var/lib/lava/dispatcher/tmp/11712663/tftp-deploy-6h6or6z3/ramdisk/rootfs.cpio.gz
18 17:53:02.630720 total size: 8418130 (8 MB)
19 17:53:03.131214 progress 0 % (0 MB)
20 17:53:03.143242 progress 5 % (0 MB)
21 17:53:03.155110 progress 10 % (0 MB)
22 17:53:03.165856 progress 15 % (1 MB)
23 17:53:03.172678 progress 20 % (1 MB)
24 17:53:03.177743 progress 25 % (2 MB)
25 17:53:03.182129 progress 30 % (2 MB)
26 17:53:03.185613 progress 35 % (2 MB)
27 17:53:03.189108 progress 40 % (3 MB)
28 17:53:03.192285 progress 45 % (3 MB)
29 17:53:03.195189 progress 50 % (4 MB)
30 17:53:03.198000 progress 55 % (4 MB)
31 17:53:03.200540 progress 60 % (4 MB)
32 17:53:03.202834 progress 65 % (5 MB)
33 17:53:03.205156 progress 70 % (5 MB)
34 17:53:03.207422 progress 75 % (6 MB)
35 17:53:03.209659 progress 80 % (6 MB)
36 17:53:03.211947 progress 85 % (6 MB)
37 17:53:03.214176 progress 90 % (7 MB)
38 17:53:03.216454 progress 95 % (7 MB)
39 17:53:03.218513 progress 100 % (8 MB)
40 17:53:03.218746 8 MB downloaded in 0.59 s (13.65 MB/s)
41 17:53:03.218905 end: 1.1.1 http-download (duration 00:00:01) [common]
43 17:53:03.219150 end: 1.1 download-retry (duration 00:00:01) [common]
44 17:53:03.219239 start: 1.2 download-retry (timeout 00:09:59) [common]
45 17:53:03.219331 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 17:53:03.219472 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:53:03.219547 saving as /var/lib/lava/dispatcher/tmp/11712663/tftp-deploy-6h6or6z3/kernel/bzImage
48 17:53:03.219611 total size: 8490896 (8 MB)
49 17:53:03.219712 No compression specified
50 17:53:03.220839 progress 0 % (0 MB)
51 17:53:03.223007 progress 5 % (0 MB)
52 17:53:03.225407 progress 10 % (0 MB)
53 17:53:03.227742 progress 15 % (1 MB)
54 17:53:03.230008 progress 20 % (1 MB)
55 17:53:03.232301 progress 25 % (2 MB)
56 17:53:03.234546 progress 30 % (2 MB)
57 17:53:03.236853 progress 35 % (2 MB)
58 17:53:03.239093 progress 40 % (3 MB)
59 17:53:03.241386 progress 45 % (3 MB)
60 17:53:03.243635 progress 50 % (4 MB)
61 17:53:03.245909 progress 55 % (4 MB)
62 17:53:03.248168 progress 60 % (4 MB)
63 17:53:03.250366 progress 65 % (5 MB)
64 17:53:03.252639 progress 70 % (5 MB)
65 17:53:03.254855 progress 75 % (6 MB)
66 17:53:03.257099 progress 80 % (6 MB)
67 17:53:03.259303 progress 85 % (6 MB)
68 17:53:03.261549 progress 90 % (7 MB)
69 17:53:03.263779 progress 95 % (7 MB)
70 17:53:03.266010 progress 100 % (8 MB)
71 17:53:03.266127 8 MB downloaded in 0.05 s (174.10 MB/s)
72 17:53:03.266275 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:53:03.266506 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:53:03.266594 start: 1.3 download-retry (timeout 00:09:59) [common]
76 17:53:03.266685 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 17:53:03.266825 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:53:03.266899 saving as /var/lib/lava/dispatcher/tmp/11712663/tftp-deploy-6h6or6z3/modules/modules.tar
79 17:53:03.266961 total size: 250868 (0 MB)
80 17:53:03.267024 Using unxz to decompress xz
81 17:53:03.270869 progress 13 % (0 MB)
82 17:53:03.271276 progress 26 % (0 MB)
83 17:53:03.271515 progress 39 % (0 MB)
84 17:53:03.273158 progress 52 % (0 MB)
85 17:53:03.274972 progress 65 % (0 MB)
86 17:53:03.276857 progress 78 % (0 MB)
87 17:53:03.278702 progress 91 % (0 MB)
88 17:53:03.280444 progress 100 % (0 MB)
89 17:53:03.285965 0 MB downloaded in 0.02 s (12.59 MB/s)
90 17:53:03.286204 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:53:03.286475 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:53:03.286574 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 17:53:03.286673 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 17:53:03.286756 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:53:03.286850 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 17:53:03.287071 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6
98 17:53:03.287206 makedir: /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin
99 17:53:03.287312 makedir: /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/tests
100 17:53:03.287411 makedir: /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/results
101 17:53:03.287525 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-add-keys
102 17:53:03.287703 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-add-sources
103 17:53:03.287834 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-background-process-start
104 17:53:03.287964 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-background-process-stop
105 17:53:03.288089 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-common-functions
106 17:53:03.288215 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-echo-ipv4
107 17:53:03.288345 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-install-packages
108 17:53:03.288471 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-installed-packages
109 17:53:03.288595 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-os-build
110 17:53:03.288720 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-probe-channel
111 17:53:03.288846 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-probe-ip
112 17:53:03.288971 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-target-ip
113 17:53:03.289095 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-target-mac
114 17:53:03.289219 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-target-storage
115 17:53:03.289348 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-test-case
116 17:53:03.289471 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-test-event
117 17:53:03.289594 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-test-feedback
118 17:53:03.289720 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-test-raise
119 17:53:03.289845 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-test-reference
120 17:53:03.289969 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-test-runner
121 17:53:03.290092 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-test-set
122 17:53:03.290220 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-test-shell
123 17:53:03.290355 Updating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-install-packages (oe)
124 17:53:03.290510 Updating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/bin/lava-installed-packages (oe)
125 17:53:03.290633 Creating /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/environment
126 17:53:03.290733 LAVA metadata
127 17:53:03.290807 - LAVA_JOB_ID=11712663
128 17:53:03.290872 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:53:03.290978 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 17:53:03.291045 skipped lava-vland-overlay
131 17:53:03.291122 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:53:03.291204 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 17:53:03.291268 skipped lava-multinode-overlay
134 17:53:03.291343 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:53:03.291432 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 17:53:03.291506 Loading test definitions
137 17:53:03.291600 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 17:53:03.291722 Using /lava-11712663 at stage 0
139 17:53:03.292031 uuid=11712663_1.4.2.3.1 testdef=None
140 17:53:03.292120 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:53:03.292208 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 17:53:03.292815 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:53:03.293033 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 17:53:03.293665 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:53:03.293893 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 17:53:03.294519 runner path: /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/0/tests/0_dmesg test_uuid 11712663_1.4.2.3.1
149 17:53:03.294676 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:53:03.294905 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 17:53:03.294978 Using /lava-11712663 at stage 1
153 17:53:03.295273 uuid=11712663_1.4.2.3.5 testdef=None
154 17:53:03.295361 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:53:03.295445 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 17:53:03.295963 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:53:03.296180 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 17:53:03.296828 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:53:03.297057 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 17:53:03.297690 runner path: /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/1/tests/1_bootrr test_uuid 11712663_1.4.2.3.5
163 17:53:03.297841 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:53:03.298047 Creating lava-test-runner.conf files
166 17:53:03.298110 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/0 for stage 0
167 17:53:03.298199 - 0_dmesg
168 17:53:03.298281 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712663/lava-overlay-jsz33kb6/lava-11712663/1 for stage 1
169 17:53:03.298409 - 1_bootrr
170 17:53:03.298529 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:53:03.298616 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 17:53:03.307188 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:53:03.307295 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 17:53:03.307381 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:53:03.307466 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:53:03.307550 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 17:53:03.561546 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:53:03.561924 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 17:53:03.562040 extracting modules file /var/lib/lava/dispatcher/tmp/11712663/tftp-deploy-6h6or6z3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712663/extract-overlay-ramdisk-n1j2dk9r/ramdisk
180 17:53:03.576271 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:53:03.576389 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 17:53:03.576481 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712663/compress-overlay-7xgu4o86/overlay-1.4.2.4.tar.gz to ramdisk
183 17:53:03.576554 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712663/compress-overlay-7xgu4o86/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712663/extract-overlay-ramdisk-n1j2dk9r/ramdisk
184 17:53:03.586773 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:53:03.586887 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 17:53:03.586981 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:53:03.587073 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 17:53:03.587160 Building ramdisk /var/lib/lava/dispatcher/tmp/11712663/extract-overlay-ramdisk-n1j2dk9r/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712663/extract-overlay-ramdisk-n1j2dk9r/ramdisk
189 17:53:03.715537 >> 49788 blocks
190 17:53:04.543985 rename /var/lib/lava/dispatcher/tmp/11712663/extract-overlay-ramdisk-n1j2dk9r/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712663/tftp-deploy-6h6or6z3/ramdisk/ramdisk.cpio.gz
191 17:53:04.544477 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:53:04.544617 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 17:53:04.544735 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 17:53:04.544833 No mkimage arch provided, not using FIT.
195 17:53:04.544949 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:53:04.545037 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:53:04.545155 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:53:04.545258 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 17:53:04.545356 No LXC device requested
200 17:53:04.545437 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:53:04.545538 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 17:53:04.545622 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:53:04.545707 Checking files for TFTP limit of 4294967296 bytes.
204 17:53:04.546239 end: 1 tftp-deploy (duration 00:00:02) [common]
205 17:53:04.546392 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:53:04.546533 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:53:04.546708 substitutions:
208 17:53:04.546804 - {DTB}: None
209 17:53:04.546914 - {INITRD}: 11712663/tftp-deploy-6h6or6z3/ramdisk/ramdisk.cpio.gz
210 17:53:04.547006 - {KERNEL}: 11712663/tftp-deploy-6h6or6z3/kernel/bzImage
211 17:53:04.547111 - {LAVA_MAC}: None
212 17:53:04.547206 - {PRESEED_CONFIG}: None
213 17:53:04.547294 - {PRESEED_LOCAL}: None
214 17:53:04.547379 - {RAMDISK}: 11712663/tftp-deploy-6h6or6z3/ramdisk/ramdisk.cpio.gz
215 17:53:04.547482 - {ROOT_PART}: None
216 17:53:04.547569 - {ROOT}: None
217 17:53:04.547687 - {SERVER_IP}: 192.168.201.1
218 17:53:04.547794 - {TEE}: None
219 17:53:04.547891 Parsed boot commands:
220 17:53:04.547969 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:53:04.548199 Parsed boot commands: tftpboot 192.168.201.1 11712663/tftp-deploy-6h6or6z3/kernel/bzImage 11712663/tftp-deploy-6h6or6z3/kernel/cmdline 11712663/tftp-deploy-6h6or6z3/ramdisk/ramdisk.cpio.gz
222 17:53:04.548315 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:53:04.548450 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:53:04.548584 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:53:04.548705 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:53:04.548822 Not connected, no need to disconnect.
227 17:53:04.548929 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:53:04.549054 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:53:04.549162 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-4305U-sarien-cbg-0'
230 17:53:04.553333 Setting prompt string to ['lava-test: # ']
231 17:53:04.553714 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:53:04.553833 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:53:04.553939 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:53:04.554045 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:53:04.554286 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=reboot'
236 17:53:21.489584 >> Command sent successfully.
237 17:53:21.500081 Returned 0 in 16 seconds
238 17:53:21.601499 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 17:53:21.603437 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 17:53:21.604172 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 17:53:21.604786 Setting prompt string to 'Starting depthcharge on sarien...'
243 17:53:21.605343 Changing prompt to 'Starting depthcharge on sarien...'
244 17:53:21.605942 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 17:53:21.607325 [Enter `^Ec?' for help]
246 17:53:21.607785
247 17:53:21.608138
248 17:53:21.608464 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 17:53:21.608789 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
250 17:53:21.609096 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 17:53:21.609406 CPU: AES supported, TXT NOT supported, VT supported
252 17:53:21.609695 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
253 17:53:21.609983 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 17:53:21.610268 IGD: device id 3ea1 (rev 02) is Unknown
255 17:53:21.610548 VBOOT: Loading verstage.
256 17:53:21.610840 CBFS @ 1d00000 size 300000
257 17:53:21.611124 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 17:53:21.611408 CBFS: Locating 'fallback/verstage'
259 17:53:21.611740 CBFS: Found @ offset 10f6c0 size 1435c
260 17:53:21.612192
261 17:53:21.612510
262 17:53:21.612850 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 17:53:21.613147 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 17:53:21.613467 done! DID_VID 0x00281ae0
265 17:53:21.613866 TPM ready after 0 ms
266 17:53:21.614161 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 17:53:21.614440 tlcl_send_startup: Startup return code is 0
268 17:53:21.614719 TPM: setup succeeded
269 17:53:21.614999 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 17:53:21.615282 Checking cr50 for recovery request
271 17:53:21.615560 Phase 1
272 17:53:21.615913 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 17:53:21.616203 FMAP: base = fe000000 size = 2000000 #areas = 37
274 17:53:21.616486 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 17:53:21.616770 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 17:53:21.617052 Phase 2
277 17:53:21.617327 Phase 3
278 17:53:21.617598 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 17:53:21.617877 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 17:53:21.618156 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
281 17:53:21.618435 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
282 17:53:21.618872 VB2:vb2_verify_keyblock() Checking key block signature...
283 17:53:21.619166 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
284 17:53:21.619465 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
285 17:53:21.619797 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 17:53:21.620085 Phase 4
287 17:53:21.620381 FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)
288 17:53:21.620665 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 17:53:21.620949 VB2:vb2_rsa_verify_digest() Digest check failed!
290 17:53:21.621227 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 17:53:21.621576 Saving nvdata
292 17:53:21.621902 Reboot requested (10020007)
293 17:53:21.622185 board_reset() called!
294 17:53:21.622463 full_reset() called!
295 17:53:25.721596
296 17:53:25.722034
297 17:53:25.731004 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 17:53:25.734703 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
299 17:53:25.740104 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 17:53:25.744831 CPU: AES supported, TXT NOT supported, VT supported
301 17:53:25.749725 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
302 17:53:25.755545 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 17:53:25.759532 IGD: device id 3ea1 (rev 02) is Unknown
304 17:53:25.762631 VBOOT: Loading verstage.
305 17:53:25.766078 CBFS @ 1d00000 size 300000
306 17:53:25.771658 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 17:53:25.775868 CBFS: Locating 'fallback/verstage'
308 17:53:25.779834 CBFS: Found @ offset 10f6c0 size 1435c
309 17:53:25.793745
310 17:53:25.793830
311 17:53:25.802090 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 17:53:25.809011 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 17:53:25.812463 done! DID_VID 0x00281ae0
314 17:53:25.814568 TPM ready after 0 ms
315 17:53:25.818615 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 17:53:25.918619 tlcl_send_startup: Startup return code is 0
317 17:53:25.920624 TPM: setup succeeded
318 17:53:25.938804 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 17:53:25.941505 Checking cr50 for recovery request
320 17:53:25.952294 Phase 1
321 17:53:25.956283 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 17:53:25.960883 FMAP: base = fe000000 size = 2000000 #areas = 37
323 17:53:25.965889 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 17:53:25.973080 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 17:53:25.979493 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 17:53:25.982117 Recovery requested (1009000e)
327 17:53:25.983550 Saving nvdata
328 17:53:25.998694 tlcl_extend: response is 0
329 17:53:26.013299 tlcl_extend: response is 0
330 17:53:26.016871 CBFS @ 1d00000 size 300000
331 17:53:26.022846 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 17:53:26.026195 CBFS: Locating 'fallback/romstage'
333 17:53:26.030423 CBFS: Found @ offset 80 size 15b2c
334 17:53:26.031010
335 17:53:26.031619
336 17:53:26.040539 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 17:53:26.044637 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 17:53:26.048870 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 17:53:26.053618 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 17:53:26.057891 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 17:53:26.062576 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 17:53:26.064312 TCO_STS: 0000 0004
343 17:53:26.067489 GEN_PMCON: d0015209 00002200
344 17:53:26.070224 GBLRST_CAUSE: 00000000 00000000
345 17:53:26.072492 prev_sleep_state 5
346 17:53:26.076107 Boot Count incremented to 42459
347 17:53:26.079910 CBFS @ 1d00000 size 300000
348 17:53:26.086253 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 17:53:26.088643 CBFS: Locating 'fspm.bin'
350 17:53:26.091931 CBFS: Found @ offset 60fc0 size 70000
351 17:53:26.097503 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 17:53:26.102175 FMAP: base = fe000000 size = 2000000 #areas = 37
353 17:53:26.108681 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 17:53:26.114060 Probing TPM I2C: done! DID_VID 0x00281ae0
355 17:53:26.117208 Locality already claimed
356 17:53:26.120496 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 17:53:26.140094 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 17:53:26.146744 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 17:53:26.149530 MRC cache found, size 18e0
360 17:53:26.151593 bootmode is set to :2
361 17:53:26.242141 CBMEM:
362 17:53:26.245516 IMD: root @ 89fff000 254 entries.
363 17:53:26.248419 IMD: root @ 89ffec00 62 entries.
364 17:53:26.251179 External stage cache:
365 17:53:26.254647 IMD: root @ 8abff000 254 entries.
366 17:53:26.258663 IMD: root @ 8abfec00 62 entries.
367 17:53:26.263978 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 17:53:26.267276 creating vboot_handoff structure
369 17:53:26.288705 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 17:53:26.304359 tlcl_write: response is 0
371 17:53:26.323383 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 17:53:26.327253 MRC: TPM MRC hash updated successfully.
373 17:53:26.328966 1 DIMMs found
374 17:53:26.330849 top_of_ram = 0x8a000000
375 17:53:26.336500 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 17:53:26.340961 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 17:53:26.343875 CBFS @ 1d00000 size 300000
378 17:53:26.350133 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 17:53:26.353260 CBFS: Locating 'fallback/postcar'
380 17:53:26.358153 CBFS: Found @ offset 107000 size 41a4
381 17:53:26.363482 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 17:53:26.374098 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 17:53:26.379958 Processing 126 relocs. Offset value of 0x87cdd000
384 17:53:26.381280
385 17:53:26.381966
386 17:53:26.389688 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 17:53:26.393247 CBFS @ 1d00000 size 300000
388 17:53:26.398822 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 17:53:26.403113 CBFS: Locating 'fallback/ramstage'
390 17:53:26.406633 CBFS: Found @ offset 458c0 size 1a8a8
391 17:53:26.412641 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 17:53:26.439602 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 17:53:26.445482 Processing 3754 relocs. Offset value of 0x88e81000
394 17:53:26.451386
395 17:53:26.451911
396 17:53:26.459380 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 17:53:26.463419 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 17:53:26.469500 FMAP: base = fe000000 size = 2000000 #areas = 37
399 17:53:26.473493 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 17:53:26.478238 WARNING: RO_VPD is uninitialized or empty.
401 17:53:26.482944 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 17:53:26.487147 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 17:53:26.488545 Normal boot.
404 17:53:26.495487 BS: BS_PRE_DEVICE times (us): entry 0 run 57 exit 1162
405 17:53:26.498862 CBFS @ 1d00000 size 300000
406 17:53:26.504356 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 17:53:26.508452 CBFS: Locating 'cpu_microcode_blob.bin'
408 17:53:26.512695 CBFS: Found @ offset 15c40 size 2fc00
409 17:53:26.517254 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 17:53:26.518622 Skip microcode update
411 17:53:26.521951 CBFS @ 1d00000 size 300000
412 17:53:26.528499 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 17:53:26.530717 CBFS: Locating 'fsps.bin'
414 17:53:26.534501 CBFS: Found @ offset d1fc0 size 35000
415 17:53:26.568918 Detected 2 core, 2 thread CPU.
416 17:53:26.571437 Setting up SMI for CPU
417 17:53:26.573235 IED base = 0x8ac00000
418 17:53:26.575395 IED size = 0x00400000
419 17:53:26.578317 Will perform SMM setup.
420 17:53:26.583098 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.
421 17:53:26.591468 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 17:53:26.596087 Processing 16 relocs. Offset value of 0x00030000
423 17:53:26.598134 Attempting to start 1 APs
424 17:53:26.601802 Waiting for 10ms after sending INIT.
425 17:53:26.616703 Waiting for 1st SIPI to complete...done.
426 17:53:26.619399 AP: slot 1 apic_id 2.
427 17:53:26.623370 Waiting for 2nd SIPI to complete...done.
428 17:53:26.630396 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
429 17:53:26.635201 Processing 13 relocs. Offset value of 0x00038000
430 17:53:26.642059 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
431 17:53:26.645860 Installing SMM handler to 0x8a000000
432 17:53:26.653188 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
433 17:53:26.659354 Processing 867 relocs. Offset value of 0x8a010000
434 17:53:26.668065 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
435 17:53:26.672225 Processing 13 relocs. Offset value of 0x8a008000
436 17:53:26.677394 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
437 17:53:26.685223 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
438 17:53:26.687229 Clearing SMI status registers
439 17:53:26.688771 SMI_STS: PM1
440 17:53:26.691276 PM1_STS: WAK PWRBTN
441 17:53:26.693507 TCO_STS: BOOT SECOND_TO
442 17:53:26.695403 GPE0 STD STS: eSPI
443 17:53:26.698234 New SMBASE 0x8a000000
444 17:53:26.700577 In relocation handler: CPU 0
445 17:53:26.704701 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
446 17:53:26.710033 Writing SMRR. base = 0x8a000006, mask=0xff000800
447 17:53:26.712204 Relocation complete.
448 17:53:26.714838 New SMBASE 0x89fffc00
449 17:53:26.718194 In relocation handler: CPU 1
450 17:53:26.721551 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
451 17:53:26.727054 Writing SMRR. base = 0x8a000006, mask=0xff000800
452 17:53:26.729138 Relocation complete.
453 17:53:26.730412 Initializing CPU #0
454 17:53:26.734638 CPU: vendor Intel device 806ec
455 17:53:26.738093 CPU: family 06, model 8e, stepping 0c
456 17:53:26.740894 Clearing out pending MCEs
457 17:53:26.745452 Setting up local APIC... apic_id: 0x00 done.
458 17:53:26.747438 Turbo is available but hidden
459 17:53:26.749553 Turbo has been enabled
460 17:53:26.752372 VMX status: enabled
461 17:53:26.756167 IA32_FEATURE_CONTROL status: locked
462 17:53:26.757627 Skip microcode update
463 17:53:26.759983 CPU #0 initialized
464 17:53:26.762783 Initializing CPU #1
465 17:53:26.765076 CPU: vendor Intel device 806ec
466 17:53:26.769584 CPU: family 06, model 8e, stepping 0c
467 17:53:26.772305 Clearing out pending MCEs
468 17:53:26.776696 Setting up local APIC... apic_id: 0x02 done.
469 17:53:26.778008 VMX status: enabled
470 17:53:26.781983 IA32_FEATURE_CONTROL status: locked
471 17:53:26.783966 Skip microcode update
472 17:53:26.785845 CPU #1 initialized
473 17:53:26.789953 bsp_do_flight_plan done after 163 msecs.
474 17:53:26.793838 CPU: frequency set to 2200 MHz
475 17:53:26.795326 Enabling SMIs.
476 17:53:26.795911 Locking SMM.
477 17:53:26.799321 CBFS @ 1d00000 size 300000
478 17:53:26.805943 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
479 17:53:26.808039 CBFS: Locating 'vbt.bin'
480 17:53:26.811594 CBFS: Found @ offset 60a40 size 4a0
481 17:53:26.816883 Found a VBT of 4608 bytes after decompression
482 17:53:26.830388 FMAP: area GBB found @ 1c11000 (978944 bytes)
483 17:53:26.938441 Detected 2 core, 2 thread CPU.
484 17:53:26.941645 Detected 2 core, 2 thread CPU.
485 17:53:27.171383 Display FSP Version Info HOB
486 17:53:27.174837 Reference Code - CPU = 7.0.5e.40
487 17:53:27.177028 uCode Version = 0.0.0.b8
488 17:53:27.179668 Display FSP Version Info HOB
489 17:53:27.183513 Reference Code - ME = 7.0.5e.40
490 17:53:27.186126 MEBx version = 0.0.0.0
491 17:53:27.189551 ME Firmware Version = Consumer SKU
492 17:53:27.191978 Display FSP Version Info HOB
493 17:53:27.195810 Reference Code - CNL PCH = 7.0.5e.40
494 17:53:27.198525 PCH-CRID Status = Disabled
495 17:53:27.202477 CNL PCH H A0 Hsio Version = 2.0.0.0
496 17:53:27.205381 CNL PCH H Ax Hsio Version = 9.0.0.0
497 17:53:27.209579 CNL PCH H Bx Hsio Version = a.0.0.0
498 17:53:27.213094 CNL PCH LP B0 Hsio Version = 7.0.0.0
499 17:53:27.216498 CNL PCH LP Bx Hsio Version = 6.0.0.0
500 17:53:27.220651 CNL PCH LP Dx Hsio Version = 7.0.0.0
501 17:53:27.223409 Display FSP Version Info HOB
502 17:53:27.227861 Reference Code - SA - System Agent = 7.0.5e.40
503 17:53:27.230940 Reference Code - MRC = 0.7.1.68
504 17:53:27.234561 SA - PCIe Version = 7.0.5e.40
505 17:53:27.236930 SA-CRID Status = Disabled
506 17:53:27.240558 SA-CRID Original Value = 0.0.0.c
507 17:53:27.242859 SA-CRID New Value = 0.0.0.c
508 17:53:27.261290 RTC Init
509 17:53:27.264769 Set power off after power failure.
510 17:53:27.267601 Disabling Deep S3
511 17:53:27.268896 Disabling Deep S3
512 17:53:27.271499 Disabling Deep S4
513 17:53:27.272325 Disabling Deep S4
514 17:53:27.275078 Disabling Deep S5
515 17:53:27.276492 Disabling Deep S5
516 17:53:27.283511 BS: BS_DEV_INIT_CHIPS times (us): entry 301014 run 463704 exit 16242
517 17:53:27.286051 Enumerating buses...
518 17:53:27.289576 Show all devs... Before device enumeration.
519 17:53:27.291994 Root Device: enabled 1
520 17:53:27.294424 CPU_CLUSTER: 0: enabled 1
521 17:53:27.296969 DOMAIN: 0000: enabled 1
522 17:53:27.299621 APIC: 00: enabled 1
523 17:53:27.302148 PCI: 00:00.0: enabled 1
524 17:53:27.304976 PCI: 00:02.0: enabled 1
525 17:53:27.306253 PCI: 00:04.0: enabled 1
526 17:53:27.309588 PCI: 00:12.0: enabled 1
527 17:53:27.311518 PCI: 00:12.5: enabled 0
528 17:53:27.313845 PCI: 00:12.6: enabled 0
529 17:53:27.315841 PCI: 00:13.0: enabled 0
530 17:53:27.319257 PCI: 00:14.0: enabled 1
531 17:53:27.321111 PCI: 00:14.1: enabled 0
532 17:53:27.323245 PCI: 00:14.3: enabled 1
533 17:53:27.325600 PCI: 00:14.5: enabled 0
534 17:53:27.328374 PCI: 00:15.0: enabled 1
535 17:53:27.331240 PCI: 00:15.1: enabled 1
536 17:53:27.333244 PCI: 00:15.2: enabled 0
537 17:53:27.335253 PCI: 00:15.3: enabled 0
538 17:53:27.337750 PCI: 00:16.0: enabled 1
539 17:53:27.340352 PCI: 00:16.1: enabled 0
540 17:53:27.343335 PCI: 00:16.2: enabled 0
541 17:53:27.345127 PCI: 00:16.3: enabled 0
542 17:53:27.348375 PCI: 00:16.4: enabled 0
543 17:53:27.350289 PCI: 00:16.5: enabled 0
544 17:53:27.352694 PCI: 00:17.0: enabled 1
545 17:53:27.354653 PCI: 00:19.0: enabled 1
546 17:53:27.357613 PCI: 00:19.1: enabled 0
547 17:53:27.359665 PCI: 00:19.2: enabled 1
548 17:53:27.362337 PCI: 00:1a.0: enabled 0
549 17:53:27.364737 PCI: 00:1c.0: enabled 1
550 17:53:27.367424 PCI: 00:1c.1: enabled 0
551 17:53:27.369168 PCI: 00:1c.2: enabled 0
552 17:53:27.372394 PCI: 00:1c.3: enabled 0
553 17:53:27.374619 PCI: 00:1c.4: enabled 0
554 17:53:27.377207 PCI: 00:1c.5: enabled 0
555 17:53:27.379822 PCI: 00:1c.6: enabled 0
556 17:53:27.381773 PCI: 00:1c.7: enabled 1
557 17:53:27.383930 PCI: 00:1d.0: enabled 1
558 17:53:27.386701 PCI: 00:1d.1: enabled 1
559 17:53:27.389413 PCI: 00:1d.2: enabled 0
560 17:53:27.391550 PCI: 00:1d.3: enabled 0
561 17:53:27.394078 PCI: 00:1d.4: enabled 1
562 17:53:27.396308 PCI: 00:1e.0: enabled 0
563 17:53:27.398519 PCI: 00:1e.1: enabled 0
564 17:53:27.400965 PCI: 00:1e.2: enabled 0
565 17:53:27.403532 PCI: 00:1e.3: enabled 0
566 17:53:27.406097 PCI: 00:1f.0: enabled 1
567 17:53:27.408786 PCI: 00:1f.1: enabled 1
568 17:53:27.410549 PCI: 00:1f.2: enabled 1
569 17:53:27.413622 PCI: 00:1f.3: enabled 1
570 17:53:27.415568 PCI: 00:1f.4: enabled 1
571 17:53:27.418700 PCI: 00:1f.5: enabled 1
572 17:53:27.420442 PCI: 00:1f.6: enabled 1
573 17:53:27.422721 USB0 port 0: enabled 1
574 17:53:27.425426 I2C: 00:10: enabled 1
575 17:53:27.427297 I2C: 00:10: enabled 1
576 17:53:27.429532 I2C: 00:34: enabled 1
577 17:53:27.431799 I2C: 00:2c: enabled 1
578 17:53:27.433926 I2C: 00:50: enabled 1
579 17:53:27.436196 PNP: 0c09.0: enabled 1
580 17:53:27.439976 USB2 port 0: enabled 1
581 17:53:27.441238 USB2 port 1: enabled 1
582 17:53:27.444106 USB2 port 2: enabled 1
583 17:53:27.446602 USB2 port 4: enabled 1
584 17:53:27.447987 USB2 port 5: enabled 1
585 17:53:27.450465 USB2 port 6: enabled 1
586 17:53:27.452955 USB2 port 7: enabled 1
587 17:53:27.455417 USB2 port 8: enabled 1
588 17:53:27.457384 USB2 port 9: enabled 1
589 17:53:27.460344 USB3 port 0: enabled 1
590 17:53:27.462225 USB3 port 1: enabled 1
591 17:53:27.464958 USB3 port 2: enabled 1
592 17:53:27.467054 USB3 port 3: enabled 1
593 17:53:27.469059 USB3 port 4: enabled 1
594 17:53:27.471070 APIC: 02: enabled 1
595 17:53:27.474388 Compare with tree...
596 17:53:27.476674 Root Device: enabled 1
597 17:53:27.478529 CPU_CLUSTER: 0: enabled 1
598 17:53:27.480702 APIC: 00: enabled 1
599 17:53:27.482656 APIC: 02: enabled 1
600 17:53:27.485936 DOMAIN: 0000: enabled 1
601 17:53:27.488104 PCI: 00:00.0: enabled 1
602 17:53:27.490836 PCI: 00:02.0: enabled 1
603 17:53:27.493624 PCI: 00:04.0: enabled 1
604 17:53:27.495849 PCI: 00:12.0: enabled 1
605 17:53:27.498663 PCI: 00:12.5: enabled 0
606 17:53:27.501330 PCI: 00:12.6: enabled 0
607 17:53:27.503711 PCI: 00:13.0: enabled 0
608 17:53:27.506313 PCI: 00:14.0: enabled 1
609 17:53:27.509027 USB0 port 0: enabled 1
610 17:53:27.511691 USB2 port 0: enabled 1
611 17:53:27.514893 USB2 port 1: enabled 1
612 17:53:27.517543 USB2 port 2: enabled 1
613 17:53:27.520071 USB2 port 4: enabled 1
614 17:53:27.522621 USB2 port 5: enabled 1
615 17:53:27.524959 USB2 port 6: enabled 1
616 17:53:27.527791 USB2 port 7: enabled 1
617 17:53:27.531121 USB2 port 8: enabled 1
618 17:53:27.533670 USB2 port 9: enabled 1
619 17:53:27.535826 USB3 port 0: enabled 1
620 17:53:27.539607 USB3 port 1: enabled 1
621 17:53:27.541828 USB3 port 2: enabled 1
622 17:53:27.544234 USB3 port 3: enabled 1
623 17:53:27.546772 USB3 port 4: enabled 1
624 17:53:27.549440 PCI: 00:14.1: enabled 0
625 17:53:27.552743 PCI: 00:14.3: enabled 1
626 17:53:27.554684 PCI: 00:14.5: enabled 0
627 17:53:27.557505 PCI: 00:15.0: enabled 1
628 17:53:27.560691 I2C: 00:10: enabled 1
629 17:53:27.562367 I2C: 00:10: enabled 1
630 17:53:27.565823 I2C: 00:34: enabled 1
631 17:53:27.568217 PCI: 00:15.1: enabled 1
632 17:53:27.570272 I2C: 00:2c: enabled 1
633 17:53:27.573474 PCI: 00:15.2: enabled 0
634 17:53:27.576108 PCI: 00:15.3: enabled 0
635 17:53:27.578175 PCI: 00:16.0: enabled 1
636 17:53:27.580594 PCI: 00:16.1: enabled 0
637 17:53:27.583829 PCI: 00:16.2: enabled 0
638 17:53:27.586383 PCI: 00:16.3: enabled 0
639 17:53:27.588561 PCI: 00:16.4: enabled 0
640 17:53:27.591343 PCI: 00:16.5: enabled 0
641 17:53:27.594052 PCI: 00:17.0: enabled 1
642 17:53:27.596866 PCI: 00:19.0: enabled 1
643 17:53:27.599245 I2C: 00:50: enabled 1
644 17:53:27.602012 PCI: 00:19.1: enabled 0
645 17:53:27.604166 PCI: 00:19.2: enabled 1
646 17:53:27.606882 PCI: 00:1a.0: enabled 0
647 17:53:27.609516 PCI: 00:1c.0: enabled 1
648 17:53:27.612389 PCI: 00:1c.1: enabled 0
649 17:53:27.615015 PCI: 00:1c.2: enabled 0
650 17:53:27.617830 PCI: 00:1c.3: enabled 0
651 17:53:27.620315 PCI: 00:1c.4: enabled 0
652 17:53:27.623137 PCI: 00:1c.5: enabled 0
653 17:53:27.625037 PCI: 00:1c.6: enabled 0
654 17:53:27.627900 PCI: 00:1c.7: enabled 1
655 17:53:27.630618 PCI: 00:1d.0: enabled 1
656 17:53:27.633317 PCI: 00:1d.1: enabled 1
657 17:53:27.636435 PCI: 00:1d.2: enabled 0
658 17:53:27.639077 PCI: 00:1d.3: enabled 0
659 17:53:27.641608 PCI: 00:1d.4: enabled 1
660 17:53:27.643947 PCI: 00:1e.0: enabled 0
661 17:53:27.646702 PCI: 00:1e.1: enabled 0
662 17:53:27.649344 PCI: 00:1e.2: enabled 0
663 17:53:27.651291 PCI: 00:1e.3: enabled 0
664 17:53:27.654495 PCI: 00:1f.0: enabled 1
665 17:53:27.656594 PNP: 0c09.0: enabled 1
666 17:53:27.659505 PCI: 00:1f.1: enabled 1
667 17:53:27.661965 PCI: 00:1f.2: enabled 1
668 17:53:27.665324 PCI: 00:1f.3: enabled 1
669 17:53:27.667387 PCI: 00:1f.4: enabled 1
670 17:53:27.670059 PCI: 00:1f.5: enabled 1
671 17:53:27.673243 PCI: 00:1f.6: enabled 1
672 17:53:27.675102 Root Device scanning...
673 17:53:27.678768 root_dev_scan_bus for Root Device
674 17:53:27.681410 CPU_CLUSTER: 0 enabled
675 17:53:27.684006 DOMAIN: 0000 enabled
676 17:53:27.685595 DOMAIN: 0000 scanning...
677 17:53:27.689625 PCI: pci_scan_bus for bus 00
678 17:53:27.692335 PCI: 00:00.0 [8086/0000] ops
679 17:53:27.695824 PCI: 00:00.0 [8086/3e35] enabled
680 17:53:27.698485 PCI: 00:02.0 [8086/0000] ops
681 17:53:27.701796 PCI: 00:02.0 [8086/3ea1] enabled
682 17:53:27.704796 PCI: 00:04.0 [8086/1903] enabled
683 17:53:27.708178 PCI: 00:08.0 [8086/1911] enabled
684 17:53:27.712174 PCI: 00:12.0 [8086/9df9] enabled
685 17:53:27.715604 PCI: 00:14.0 [8086/0000] bus ops
686 17:53:27.718493 PCI: 00:14.0 [8086/9ded] enabled
687 17:53:27.721775 PCI: 00:14.2 [8086/9def] enabled
688 17:53:27.724673 PCI: 00:14.3 [8086/9df0] enabled
689 17:53:27.727881 PCI: 00:15.0 [8086/0000] bus ops
690 17:53:27.731248 PCI: 00:15.0 [8086/9de8] enabled
691 17:53:27.734508 PCI: 00:15.1 [8086/0000] bus ops
692 17:53:27.737823 PCI: 00:15.1 [8086/9de9] enabled
693 17:53:27.741206 PCI: 00:16.0 [8086/0000] ops
694 17:53:27.744706 PCI: 00:16.0 [8086/9de0] enabled
695 17:53:27.747430 PCI: 00:17.0 [8086/0000] ops
696 17:53:27.750993 PCI: 00:17.0 [8086/9dd3] enabled
697 17:53:27.753750 PCI: 00:19.0 [8086/0000] bus ops
698 17:53:27.757585 PCI: 00:19.0 [8086/9dc5] enabled
699 17:53:27.760472 PCI: 00:19.2 [8086/0000] ops
700 17:53:27.763338 PCI: 00:19.2 [8086/9dc7] enabled
701 17:53:27.766720 PCI: 00:1c.0 [8086/0000] bus ops
702 17:53:27.770396 PCI: 00:1c.0 [8086/9dbf] enabled
703 17:53:27.776512 PCI: Static device PCI: 00:1c.7 not found, disabling it.
704 17:53:27.779366 PCI: 00:1d.0 [8086/0000] bus ops
705 17:53:27.782547 PCI: 00:1d.0 [8086/9db4] enabled
706 17:53:27.788470 PCI: Static device PCI: 00:1d.1 not found, disabling it.
707 17:53:27.794415 PCI: Static device PCI: 00:1d.4 not found, disabling it.
708 17:53:27.796946 PCI: 00:1f.0 [8086/0000] bus ops
709 17:53:27.800317 PCI: 00:1f.0 [8086/9d84] enabled
710 17:53:27.805967 PCI: Static device PCI: 00:1f.1 not found, disabling it.
711 17:53:27.811743 PCI: Static device PCI: 00:1f.2 not found, disabling it.
712 17:53:27.815851 PCI: 00:1f.3 [8086/0000] bus ops
713 17:53:27.818198 PCI: 00:1f.3 [8086/9dc8] enabled
714 17:53:27.821980 PCI: 00:1f.4 [8086/0000] bus ops
715 17:53:27.824739 PCI: 00:1f.4 [8086/9da3] enabled
716 17:53:27.828625 PCI: 00:1f.5 [8086/0000] bus ops
717 17:53:27.831964 PCI: 00:1f.5 [8086/9da4] enabled
718 17:53:27.835994 PCI: 00:1f.6 [8086/15be] enabled
719 17:53:27.838476 PCI: Leftover static devices:
720 17:53:27.839912 PCI: 00:12.5
721 17:53:27.841934 PCI: 00:12.6
722 17:53:27.842830 PCI: 00:13.0
723 17:53:27.844548 PCI: 00:14.1
724 17:53:27.845339 PCI: 00:14.5
725 17:53:27.846181 PCI: 00:15.2
726 17:53:27.848072 PCI: 00:15.3
727 17:53:27.848925 PCI: 00:16.1
728 17:53:27.850675 PCI: 00:16.2
729 17:53:27.852966 PCI: 00:16.3
730 17:53:27.853416 PCI: 00:16.4
731 17:53:27.854878 PCI: 00:16.5
732 17:53:27.856077 PCI: 00:19.1
733 17:53:27.858272 PCI: 00:1a.0
734 17:53:27.859613 PCI: 00:1c.1
735 17:53:27.860061 PCI: 00:1c.2
736 17:53:27.861074 PCI: 00:1c.3
737 17:53:27.863114 PCI: 00:1c.4
738 17:53:27.864266 PCI: 00:1c.5
739 17:53:27.865581 PCI: 00:1c.6
740 17:53:27.867597 PCI: 00:1c.7
741 17:53:27.868364 PCI: 00:1d.1
742 17:53:27.869612 PCI: 00:1d.2
743 17:53:27.870660 PCI: 00:1d.3
744 17:53:27.871994 PCI: 00:1d.4
745 17:53:27.873416 PCI: 00:1e.0
746 17:53:27.874679 PCI: 00:1e.1
747 17:53:27.876130 PCI: 00:1e.2
748 17:53:27.877448 PCI: 00:1e.3
749 17:53:27.878899 PCI: 00:1f.1
750 17:53:27.880888 PCI: 00:1f.2
751 17:53:27.883473 PCI: Check your devicetree.cb.
752 17:53:27.886447 PCI: 00:14.0 scanning...
753 17:53:27.889561 scan_usb_bus for PCI: 00:14.0
754 17:53:27.891899 USB0 port 0 enabled
755 17:53:27.894658 USB0 port 0 scanning...
756 17:53:27.897935 scan_usb_bus for USB0 port 0
757 17:53:27.899044 USB2 port 0 enabled
758 17:53:27.901080 USB2 port 1 enabled
759 17:53:27.902971 USB2 port 2 enabled
760 17:53:27.905832 USB2 port 4 enabled
761 17:53:27.907114 USB2 port 5 enabled
762 17:53:27.910094 USB2 port 6 enabled
763 17:53:27.912424 USB2 port 7 enabled
764 17:53:27.913605 USB2 port 8 enabled
765 17:53:27.916022 USB2 port 9 enabled
766 17:53:27.918119 USB3 port 0 enabled
767 17:53:27.919280 USB3 port 1 enabled
768 17:53:27.921422 USB3 port 2 enabled
769 17:53:27.923559 USB3 port 3 enabled
770 17:53:27.926241 USB3 port 4 enabled
771 17:53:27.927770 USB2 port 0 scanning...
772 17:53:27.931157 scan_usb_bus for USB2 port 0
773 17:53:27.934282 scan_usb_bus for USB2 port 0 done
774 17:53:27.940501 scan_bus: scanning of bus USB2 port 0 took 9063 usecs
775 17:53:27.942415 USB2 port 1 scanning...
776 17:53:27.945880 scan_usb_bus for USB2 port 1
777 17:53:27.950036 scan_usb_bus for USB2 port 1 done
778 17:53:27.954192 scan_bus: scanning of bus USB2 port 1 took 9064 usecs
779 17:53:27.957704 USB2 port 2 scanning...
780 17:53:27.959934 scan_usb_bus for USB2 port 2
781 17:53:27.963241 scan_usb_bus for USB2 port 2 done
782 17:53:27.968899 scan_bus: scanning of bus USB2 port 2 took 9064 usecs
783 17:53:27.971618 USB2 port 4 scanning...
784 17:53:27.975056 scan_usb_bus for USB2 port 4
785 17:53:27.978444 scan_usb_bus for USB2 port 4 done
786 17:53:27.983792 scan_bus: scanning of bus USB2 port 4 took 9062 usecs
787 17:53:27.986105 USB2 port 5 scanning...
788 17:53:27.988799 scan_usb_bus for USB2 port 5
789 17:53:27.992483 scan_usb_bus for USB2 port 5 done
790 17:53:27.997632 scan_bus: scanning of bus USB2 port 5 took 9062 usecs
791 17:53:28.000453 USB2 port 6 scanning...
792 17:53:28.003583 scan_usb_bus for USB2 port 6
793 17:53:28.006427 scan_usb_bus for USB2 port 6 done
794 17:53:28.012275 scan_bus: scanning of bus USB2 port 6 took 9063 usecs
795 17:53:28.014192 USB2 port 7 scanning...
796 17:53:28.018296 scan_usb_bus for USB2 port 7
797 17:53:28.021380 scan_usb_bus for USB2 port 7 done
798 17:53:28.027238 scan_bus: scanning of bus USB2 port 7 took 9063 usecs
799 17:53:28.029254 USB2 port 8 scanning...
800 17:53:28.032244 scan_usb_bus for USB2 port 8
801 17:53:28.035363 scan_usb_bus for USB2 port 8 done
802 17:53:28.041499 scan_bus: scanning of bus USB2 port 8 took 9062 usecs
803 17:53:28.043106 USB2 port 9 scanning...
804 17:53:28.046203 scan_usb_bus for USB2 port 9
805 17:53:28.050197 scan_usb_bus for USB2 port 9 done
806 17:53:28.055745 scan_bus: scanning of bus USB2 port 9 took 9065 usecs
807 17:53:28.057706 USB3 port 0 scanning...
808 17:53:28.061233 scan_usb_bus for USB3 port 0
809 17:53:28.064622 scan_usb_bus for USB3 port 0 done
810 17:53:28.069445 scan_bus: scanning of bus USB3 port 0 took 9062 usecs
811 17:53:28.072229 USB3 port 1 scanning...
812 17:53:28.075801 scan_usb_bus for USB3 port 1
813 17:53:28.079133 scan_usb_bus for USB3 port 1 done
814 17:53:28.084684 scan_bus: scanning of bus USB3 port 1 took 9062 usecs
815 17:53:28.087426 USB3 port 2 scanning...
816 17:53:28.089394 scan_usb_bus for USB3 port 2
817 17:53:28.092924 scan_usb_bus for USB3 port 2 done
818 17:53:28.098863 scan_bus: scanning of bus USB3 port 2 took 9061 usecs
819 17:53:28.100958 USB3 port 3 scanning...
820 17:53:28.104512 scan_usb_bus for USB3 port 3
821 17:53:28.107612 scan_usb_bus for USB3 port 3 done
822 17:53:28.112923 scan_bus: scanning of bus USB3 port 3 took 9061 usecs
823 17:53:28.115138 USB3 port 4 scanning...
824 17:53:28.118772 scan_usb_bus for USB3 port 4
825 17:53:28.122711 scan_usb_bus for USB3 port 4 done
826 17:53:28.127523 scan_bus: scanning of bus USB3 port 4 took 9062 usecs
827 17:53:28.131510 scan_usb_bus for USB0 port 0 done
828 17:53:28.136342 scan_bus: scanning of bus USB0 port 0 took 239359 usecs
829 17:53:28.139832 scan_usb_bus for PCI: 00:14.0 done
830 17:53:28.145830 scan_bus: scanning of bus PCI: 00:14.0 took 256294 usecs
831 17:53:28.148096 PCI: 00:15.0 scanning...
832 17:53:28.151970 scan_generic_bus for PCI: 00:15.0
833 17:53:28.156152 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
834 17:53:28.159524 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
835 17:53:28.164528 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
836 17:53:28.167504 scan_generic_bus for PCI: 00:15.0 done
837 17:53:28.173651 scan_bus: scanning of bus PCI: 00:15.0 took 22386 usecs
838 17:53:28.175701 PCI: 00:15.1 scanning...
839 17:53:28.179851 scan_generic_bus for PCI: 00:15.1
840 17:53:28.183525 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
841 17:53:28.187948 scan_generic_bus for PCI: 00:15.1 done
842 17:53:28.192845 scan_bus: scanning of bus PCI: 00:15.1 took 14218 usecs
843 17:53:28.195564 PCI: 00:19.0 scanning...
844 17:53:28.199011 scan_generic_bus for PCI: 00:19.0
845 17:53:28.203184 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
846 17:53:28.207815 scan_generic_bus for PCI: 00:19.0 done
847 17:53:28.212461 scan_bus: scanning of bus PCI: 00:19.0 took 14211 usecs
848 17:53:28.215239 PCI: 00:1c.0 scanning...
849 17:53:28.219167 do_pci_scan_bridge for PCI: 00:1c.0
850 17:53:28.222147 PCI: pci_scan_bus for bus 01
851 17:53:28.225938 PCI: 01:00.0 [10ec/525a] enabled
852 17:53:28.228869 Capability: type 0x01 @ 0x80
853 17:53:28.231811 Capability: type 0x05 @ 0x90
854 17:53:28.234878 Capability: type 0x10 @ 0xb0
855 17:53:28.237398 Capability: type 0x10 @ 0x40
856 17:53:28.240755 Enabling Common Clock Configuration
857 17:53:28.245535 L1 Sub-State supported from root port 28
858 17:53:28.248303 L1 Sub-State Support = 0xf
859 17:53:28.251713 CommonModeRestoreTime = 0x3c
860 17:53:28.255032 Power On Value = 0x6, Power On Scale = 0x1
861 17:53:28.257453 ASPM: Enabled L0s and L1
862 17:53:28.261226 Capability: type 0x01 @ 0x80
863 17:53:28.264485 Capability: type 0x05 @ 0x90
864 17:53:28.267037 Capability: type 0x10 @ 0xb0
865 17:53:28.272308 scan_bus: scanning of bus PCI: 00:1c.0 took 53678 usecs
866 17:53:28.274318 PCI: 00:1d.0 scanning...
867 17:53:28.278214 do_pci_scan_bridge for PCI: 00:1d.0
868 17:53:28.281212 PCI: pci_scan_bus for bus 02
869 17:53:28.285934 PCI: 02:00.0 [15b7/5004] enabled
870 17:53:28.288002 Capability: type 0x01 @ 0x80
871 17:53:28.290686 Capability: type 0x05 @ 0x90
872 17:53:28.293638 Capability: type 0x11 @ 0xb0
873 17:53:28.297650 Capability: type 0x10 @ 0xc0
874 17:53:28.299854 Capability: type 0x10 @ 0x40
875 17:53:28.303227 Enabling Common Clock Configuration
876 17:53:28.307775 L1 Sub-State supported from root port 29
877 17:53:28.310351 L1 Sub-State Support = 0x5
878 17:53:28.313502 CommonModeRestoreTime = 0xff
879 17:53:28.317120 Power On Value = 0x16, Power On Scale = 0x0
880 17:53:28.319417 ASPM: Enabled L1
881 17:53:28.321815 Capability: type 0x01 @ 0x80
882 17:53:28.324966 Capability: type 0x05 @ 0x90
883 17:53:28.328245 Capability: type 0x11 @ 0xb0
884 17:53:28.330870 Capability: type 0x10 @ 0xc0
885 17:53:28.337081 scan_bus: scanning of bus PCI: 00:1d.0 took 58804 usecs
886 17:53:28.338790 PCI: 00:1f.0 scanning...
887 17:53:28.342510 scan_lpc_bus for PCI: 00:1f.0
888 17:53:28.344987 PNP: 0c09.0 enabled
889 17:53:28.348069 scan_lpc_bus for PCI: 00:1f.0 done
890 17:53:28.353904 scan_bus: scanning of bus PCI: 00:1f.0 took 11397 usecs
891 17:53:28.355827 PCI: 00:1f.3 scanning...
892 17:53:28.361863 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
893 17:53:28.364069 PCI: 00:1f.4 scanning...
894 17:53:28.368369 scan_generic_bus for PCI: 00:1f.4
895 17:53:28.372039 scan_generic_bus for PCI: 00:1f.4 done
896 17:53:28.377976 scan_bus: scanning of bus PCI: 00:1f.4 took 10131 usecs
897 17:53:28.380739 PCI: 00:1f.5 scanning...
898 17:53:28.383327 scan_generic_bus for PCI: 00:1f.5
899 17:53:28.387460 scan_generic_bus for PCI: 00:1f.5 done
900 17:53:28.393376 scan_bus: scanning of bus PCI: 00:1f.5 took 10129 usecs
901 17:53:28.398746 scan_bus: scanning of bus DOMAIN: 0000 took 709665 usecs
902 17:53:28.403753 root_dev_scan_bus for Root Device done
903 17:53:28.409081 scan_bus: scanning of bus Root Device took 729807 usecs
904 17:53:28.409911 done
905 17:53:28.414994 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
906 17:53:28.421773 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
907 17:53:28.429301 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
908 17:53:28.435959 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
909 17:53:28.440408 SPI flash protection: WPSW=1 SRP0=0
910 17:53:28.444242 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
911 17:53:28.449986 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1125978 exit 34824
912 17:53:28.453201 found VGA at PCI: 00:02.0
913 17:53:28.456655 Setting up VGA for PCI: 00:02.0
914 17:53:28.460857 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
915 17:53:28.466369 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
916 17:53:28.469350 Allocating resources...
917 17:53:28.471230 Reading resources...
918 17:53:28.474840 Root Device read_resources bus 0 link: 0
919 17:53:28.479205 CPU_CLUSTER: 0 read_resources bus 0 link: 0
920 17:53:28.485069 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
921 17:53:28.488935 DOMAIN: 0000 read_resources bus 0 link: 0
922 17:53:28.495433 PCI: 00:14.0 read_resources bus 0 link: 0
923 17:53:28.499704 USB0 port 0 read_resources bus 0 link: 0
924 17:53:28.509320 USB0 port 0 read_resources bus 0 link: 0 done
925 17:53:28.514686 PCI: 00:14.0 read_resources bus 0 link: 0 done
926 17:53:28.519491 PCI: 00:15.0 read_resources bus 1 link: 0
927 17:53:28.525615 PCI: 00:15.0 read_resources bus 1 link: 0 done
928 17:53:28.530208 PCI: 00:15.1 read_resources bus 2 link: 0
929 17:53:28.535736 PCI: 00:15.1 read_resources bus 2 link: 0 done
930 17:53:28.541007 PCI: 00:19.0 read_resources bus 3 link: 0
931 17:53:28.545864 PCI: 00:19.0 read_resources bus 3 link: 0 done
932 17:53:28.550424 PCI: 00:1c.0 read_resources bus 1 link: 0
933 17:53:28.556859 PCI: 00:1c.0 read_resources bus 1 link: 0 done
934 17:53:28.560567 PCI: 00:1d.0 read_resources bus 2 link: 0
935 17:53:28.565332 PCI: 00:1d.0 read_resources bus 2 link: 0 done
936 17:53:28.570523 PCI: 00:1f.0 read_resources bus 0 link: 0
937 17:53:28.575350 PCI: 00:1f.0 read_resources bus 0 link: 0 done
938 17:53:28.582038 DOMAIN: 0000 read_resources bus 0 link: 0 done
939 17:53:28.586948 Root Device read_resources bus 0 link: 0 done
940 17:53:28.589597 Done reading resources.
941 17:53:28.595926 Show resources in subtree (Root Device)...After reading.
942 17:53:28.599234 Root Device child on link 0 CPU_CLUSTER: 0
943 17:53:28.603399 CPU_CLUSTER: 0 child on link 0 APIC: 00
944 17:53:28.605304 APIC: 00
945 17:53:28.606118 APIC: 02
946 17:53:28.610645 DOMAIN: 0000 child on link 0 PCI: 00:00.0
947 17:53:28.620396 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
948 17:53:28.630017 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
949 17:53:28.630883 PCI: 00:00.0
950 17:53:28.640493 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
951 17:53:28.650502 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
952 17:53:28.660059 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
953 17:53:28.669448 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
954 17:53:28.677863 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
955 17:53:28.688273 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
956 17:53:28.697333 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
957 17:53:28.706143 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
958 17:53:28.714916 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
959 17:53:28.724129 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
960 17:53:28.734006 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
961 17:53:28.744680 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
962 17:53:28.753525 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
963 17:53:28.762136 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
964 17:53:28.764012 PCI: 00:02.0
965 17:53:28.774042 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
966 17:53:28.784506 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
967 17:53:28.793172 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
968 17:53:28.795361 PCI: 00:04.0
969 17:53:28.804501 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
970 17:53:28.806168 PCI: 00:08.0
971 17:53:28.816428 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 17:53:28.818407 PCI: 00:12.0
973 17:53:28.827983 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
974 17:53:28.832754 PCI: 00:14.0 child on link 0 USB0 port 0
975 17:53:28.841957 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
976 17:53:28.847251 USB0 port 0 child on link 0 USB2 port 0
977 17:53:28.848066 USB2 port 0
978 17:53:28.850848 USB2 port 1
979 17:53:28.852094 USB2 port 2
980 17:53:28.853684 USB2 port 4
981 17:53:28.855512 USB2 port 5
982 17:53:28.856842 USB2 port 6
983 17:53:28.858870 USB2 port 7
984 17:53:28.860758 USB2 port 8
985 17:53:28.862328 USB2 port 9
986 17:53:28.864702 USB3 port 0
987 17:53:28.865462 USB3 port 1
988 17:53:28.868050 USB3 port 2
989 17:53:28.869475 USB3 port 3
990 17:53:28.870885 USB3 port 4
991 17:53:28.872770 PCI: 00:14.2
992 17:53:28.882968 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
993 17:53:28.892040 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
994 17:53:28.893791 PCI: 00:14.3
995 17:53:28.904427 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
996 17:53:28.908467 PCI: 00:15.0 child on link 0 I2C: 01:10
997 17:53:28.918329 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
998 17:53:28.919760 I2C: 01:10
999 17:53:28.921469 I2C: 01:10
1000 17:53:28.923039 I2C: 01:34
1001 17:53:28.926871 PCI: 00:15.1 child on link 0 I2C: 02:2c
1002 17:53:28.937397 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1003 17:53:28.938722 I2C: 02:2c
1004 17:53:28.939935 PCI: 00:16.0
1005 17:53:28.950162 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1006 17:53:28.952084 PCI: 00:17.0
1007 17:53:28.961643 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1008 17:53:28.970344 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1009 17:53:28.977895 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1010 17:53:28.987198 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1011 17:53:28.995000 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1012 17:53:29.004273 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1013 17:53:29.007900 PCI: 00:19.0 child on link 0 I2C: 03:50
1014 17:53:29.018526 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1015 17:53:29.027491 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1016 17:53:29.029140 I2C: 03:50
1017 17:53:29.031896 PCI: 00:19.2
1018 17:53:29.042124 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1019 17:53:29.052442 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1020 17:53:29.056446 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1021 17:53:29.064967 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1022 17:53:29.074803 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1023 17:53:29.083983 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1024 17:53:29.085535 PCI: 01:00.0
1025 17:53:29.094876 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1026 17:53:29.099579 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1027 17:53:29.108620 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1028 17:53:29.117526 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1029 17:53:29.127094 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1030 17:53:29.128564 PCI: 02:00.0
1031 17:53:29.139337 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1032 17:53:29.142598 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1033 17:53:29.151791 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1034 17:53:29.161598 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1035 17:53:29.162311 PNP: 0c09.0
1036 17:53:29.171792 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1037 17:53:29.179949 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1038 17:53:29.188598 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1039 17:53:29.190570 PCI: 00:1f.3
1040 17:53:29.200122 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1041 17:53:29.209293 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1042 17:53:29.211937 PCI: 00:1f.4
1043 17:53:29.220499 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1044 17:53:29.231110 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1045 17:53:29.231861 PCI: 00:1f.5
1046 17:53:29.241002 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1047 17:53:29.242370 PCI: 00:1f.6
1048 17:53:29.251802 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1049 17:53:29.258238 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1050 17:53:29.264534 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1051 17:53:29.271719 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1052 17:53:29.277885 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1053 17:53:29.284474 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1054 17:53:29.287872 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1055 17:53:29.291721 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1056 17:53:29.295303 PCI: 00:17.0 18 * [0x60 - 0x67] io
1057 17:53:29.298569 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1058 17:53:29.306776 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1059 17:53:29.312261 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1060 17:53:29.320039 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1061 17:53:29.328482 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1062 17:53:29.335828 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1063 17:53:29.338810 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1064 17:53:29.347275 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1065 17:53:29.355344 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1066 17:53:29.363439 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1067 17:53:29.370675 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1068 17:53:29.374005 PCI: 02:00.0 10 * [0x0 - 0x3fff] mem
1069 17:53:29.382255 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1070 17:53:29.386503 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1071 17:53:29.391634 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1072 17:53:29.397080 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1073 17:53:29.402093 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1074 17:53:29.405967 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1075 17:53:29.410861 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1076 17:53:29.415934 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1077 17:53:29.420904 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1078 17:53:29.425643 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1079 17:53:29.430919 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1080 17:53:29.436048 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1081 17:53:29.440130 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1082 17:53:29.445031 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1083 17:53:29.449609 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1084 17:53:29.454841 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1085 17:53:29.460484 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1086 17:53:29.465096 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1087 17:53:29.469375 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1088 17:53:29.474778 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1089 17:53:29.479001 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1090 17:53:29.484456 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1091 17:53:29.488593 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1092 17:53:29.494613 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1093 17:53:29.498573 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1094 17:53:29.503609 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1095 17:53:29.512067 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1096 17:53:29.515418 avoid_fixed_resources: DOMAIN: 0000
1097 17:53:29.521522 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1098 17:53:29.527670 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1099 17:53:29.535252 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1100 17:53:29.542809 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1101 17:53:29.550160 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1102 17:53:29.558454 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1103 17:53:29.566229 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1104 17:53:29.574059 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1105 17:53:29.580832 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1106 17:53:29.588365 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1107 17:53:29.596067 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1108 17:53:29.603422 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1109 17:53:29.605385 Setting resources...
1110 17:53:29.611280 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1111 17:53:29.615991 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1112 17:53:29.619490 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1113 17:53:29.623366 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1114 17:53:29.628151 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1115 17:53:29.634297 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1116 17:53:29.639800 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1117 17:53:29.646669 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1118 17:53:29.652341 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1119 17:53:29.659766 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1120 17:53:29.666214 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1121 17:53:29.672107 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1122 17:53:29.677094 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1123 17:53:29.681498 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1124 17:53:29.686163 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1125 17:53:29.691068 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1126 17:53:29.695594 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1127 17:53:29.700913 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1128 17:53:29.706273 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1129 17:53:29.711111 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1130 17:53:29.715302 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1131 17:53:29.719949 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1132 17:53:29.725268 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1133 17:53:29.729502 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1134 17:53:29.734281 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1135 17:53:29.739266 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1136 17:53:29.744456 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1137 17:53:29.749825 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1138 17:53:29.754361 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1139 17:53:29.759424 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1140 17:53:29.763613 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1141 17:53:29.769058 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1142 17:53:29.773278 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1143 17:53:29.778940 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1144 17:53:29.783368 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1145 17:53:29.787979 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1146 17:53:29.795344 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1147 17:53:29.803033 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1148 17:53:29.810003 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1149 17:53:29.818424 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1150 17:53:29.822916 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1151 17:53:29.830064 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1152 17:53:29.837393 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1153 17:53:29.844438 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1154 17:53:29.852475 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1155 17:53:29.857207 PCI: 02:00.0 10 * [0xd1100000 - 0xd1103fff] mem
1156 17:53:29.864635 PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done
1157 17:53:29.868439 Root Device assign_resources, bus 0 link: 0
1158 17:53:29.873330 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 17:53:29.881796 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1160 17:53:29.890202 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1161 17:53:29.898567 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1162 17:53:29.906255 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1163 17:53:29.914675 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1164 17:53:29.922904 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1165 17:53:29.931135 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1166 17:53:29.935749 PCI: 00:14.0 assign_resources, bus 0 link: 0
1167 17:53:29.940302 PCI: 00:14.0 assign_resources, bus 0 link: 0
1168 17:53:29.949357 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1169 17:53:29.956892 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1170 17:53:29.965109 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1171 17:53:29.973211 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1172 17:53:29.978242 PCI: 00:15.0 assign_resources, bus 1 link: 0
1173 17:53:29.982416 PCI: 00:15.0 assign_resources, bus 1 link: 0
1174 17:53:29.990695 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1175 17:53:29.995373 PCI: 00:15.1 assign_resources, bus 2 link: 0
1176 17:53:30.000707 PCI: 00:15.1 assign_resources, bus 2 link: 0
1177 17:53:30.008371 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1178 17:53:30.017142 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1179 17:53:30.024941 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1180 17:53:30.032390 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1181 17:53:30.039992 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1182 17:53:30.047285 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1183 17:53:30.055241 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1184 17:53:30.063259 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1185 17:53:30.071608 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1186 17:53:30.075507 PCI: 00:19.0 assign_resources, bus 3 link: 0
1187 17:53:30.080565 PCI: 00:19.0 assign_resources, bus 3 link: 0
1188 17:53:30.089416 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1189 17:53:30.097708 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1190 17:53:30.106640 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1191 17:53:30.114629 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1192 17:53:30.120156 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1193 17:53:30.128419 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1194 17:53:30.132417 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1195 17:53:30.141229 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1196 17:53:30.149965 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1197 17:53:30.158228 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1198 17:53:30.162966 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1199 17:53:30.171319 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64
1200 17:53:30.175664 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1201 17:53:30.180723 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1202 17:53:30.185537 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1203 17:53:30.190378 LPC: Trying to open IO window from 930 size 8
1204 17:53:30.194679 LPC: Trying to open IO window from 940 size 8
1205 17:53:30.199745 LPC: Trying to open IO window from 950 size 10
1206 17:53:30.208301 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1207 17:53:30.215578 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1208 17:53:30.224178 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1209 17:53:30.232196 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1210 17:53:30.241020 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1211 17:53:30.245202 DOMAIN: 0000 assign_resources, bus 0 link: 0
1212 17:53:30.249560 Root Device assign_resources, bus 0 link: 0
1213 17:53:30.252247 Done setting resources.
1214 17:53:30.258594 Show resources in subtree (Root Device)...After assigning values.
1215 17:53:30.262822 Root Device child on link 0 CPU_CLUSTER: 0
1216 17:53:30.267524 CPU_CLUSTER: 0 child on link 0 APIC: 00
1217 17:53:30.268650 APIC: 00
1218 17:53:30.270041 APIC: 02
1219 17:53:30.274230 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1220 17:53:30.283911 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1221 17:53:30.294750 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1222 17:53:30.296858 PCI: 00:00.0
1223 17:53:30.306117 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 17:53:30.315490 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1225 17:53:30.324945 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1226 17:53:30.334194 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1227 17:53:30.343211 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1228 17:53:30.353000 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1229 17:53:30.361881 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1230 17:53:30.371140 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1231 17:53:30.380526 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1232 17:53:30.390415 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1233 17:53:30.399770 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1234 17:53:30.410005 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
1235 17:53:30.419443 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1236 17:53:30.428289 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1237 17:53:30.429553 PCI: 00:02.0
1238 17:53:30.440459 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1239 17:53:30.450639 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1240 17:53:30.459358 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1241 17:53:30.461245 PCI: 00:04.0
1242 17:53:30.472006 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1243 17:53:30.473301 PCI: 00:08.0
1244 17:53:30.483832 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1245 17:53:30.485150 PCI: 00:12.0
1246 17:53:30.496095 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1247 17:53:30.500422 PCI: 00:14.0 child on link 0 USB0 port 0
1248 17:53:30.510097 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1249 17:53:30.515108 USB0 port 0 child on link 0 USB2 port 0
1250 17:53:30.517015 USB2 port 0
1251 17:53:30.519092 USB2 port 1
1252 17:53:30.520411 USB2 port 2
1253 17:53:30.521541 USB2 port 4
1254 17:53:30.523851 USB2 port 5
1255 17:53:30.525892 USB2 port 6
1256 17:53:30.526636 USB2 port 7
1257 17:53:30.528788 USB2 port 8
1258 17:53:30.530861 USB2 port 9
1259 17:53:30.532228 USB3 port 0
1260 17:53:30.534192 USB3 port 1
1261 17:53:30.536185 USB3 port 2
1262 17:53:30.537558 USB3 port 3
1263 17:53:30.539744 USB3 port 4
1264 17:53:30.541250 PCI: 00:14.2
1265 17:53:30.551593 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1266 17:53:30.561403 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1267 17:53:30.563425 PCI: 00:14.3
1268 17:53:30.573608 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1269 17:53:30.577922 PCI: 00:15.0 child on link 0 I2C: 01:10
1270 17:53:30.587894 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1271 17:53:30.589861 I2C: 01:10
1272 17:53:30.590988 I2C: 01:10
1273 17:53:30.593700 I2C: 01:34
1274 17:53:30.597884 PCI: 00:15.1 child on link 0 I2C: 02:2c
1275 17:53:30.607666 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1276 17:53:30.608942 I2C: 02:2c
1277 17:53:30.610903 PCI: 00:16.0
1278 17:53:30.620606 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1279 17:53:30.622818 PCI: 00:17.0
1280 17:53:30.632929 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1281 17:53:30.643840 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1282 17:53:30.651974 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1283 17:53:30.661117 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1284 17:53:30.670228 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1285 17:53:30.680385 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1286 17:53:30.685021 PCI: 00:19.0 child on link 0 I2C: 03:50
1287 17:53:30.694656 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1288 17:53:30.705002 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1289 17:53:30.707552 I2C: 03:50
1290 17:53:30.708604 PCI: 00:19.2
1291 17:53:30.719853 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1292 17:53:30.729810 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1293 17:53:30.734410 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1294 17:53:30.743422 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1295 17:53:30.753779 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1296 17:53:30.764215 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1297 17:53:30.766274 PCI: 01:00.0
1298 17:53:30.775981 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1299 17:53:30.780726 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1300 17:53:30.790357 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1301 17:53:30.799812 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1302 17:53:30.810609 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1303 17:53:30.812634 PCI: 02:00.0
1304 17:53:30.822212 PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10
1305 17:53:30.826651 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1306 17:53:30.835412 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1307 17:53:30.844602 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1308 17:53:30.846903 PNP: 0c09.0
1309 17:53:30.854994 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1310 17:53:30.863995 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1311 17:53:30.871733 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1312 17:53:30.873890 PCI: 00:1f.3
1313 17:53:30.883801 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1314 17:53:30.894788 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1315 17:53:30.896738 PCI: 00:1f.4
1316 17:53:30.904966 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1317 17:53:30.915878 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1318 17:53:30.916520 PCI: 00:1f.5
1319 17:53:30.926951 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1320 17:53:30.929038 PCI: 00:1f.6
1321 17:53:30.938928 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1322 17:53:30.942062 Done allocating resources.
1323 17:53:30.947732 BS: BS_DEV_RESOURCES times (us): entry 0 run 2491915 exit 13
1324 17:53:30.950599 Enabling resources...
1325 17:53:30.955184 PCI: 00:00.0 subsystem <- 1028/3e35
1326 17:53:30.958407 PCI: 00:00.0 cmd <- 06
1327 17:53:30.961608 PCI: 00:02.0 subsystem <- 1028/3ea1
1328 17:53:30.964052 PCI: 00:02.0 cmd <- 03
1329 17:53:30.967948 PCI: 00:04.0 subsystem <- 1028/1903
1330 17:53:30.971020 PCI: 00:04.0 cmd <- 02
1331 17:53:30.972678 PCI: 00:08.0 cmd <- 06
1332 17:53:30.976687 PCI: 00:12.0 subsystem <- 1028/9df9
1333 17:53:30.979426 PCI: 00:12.0 cmd <- 02
1334 17:53:30.983083 PCI: 00:14.0 subsystem <- 1028/9ded
1335 17:53:30.986016 PCI: 00:14.0 cmd <- 02
1336 17:53:30.988138 PCI: 00:14.2 cmd <- 02
1337 17:53:30.992177 PCI: 00:14.3 subsystem <- 1028/9df0
1338 17:53:30.994882 PCI: 00:14.3 cmd <- 02
1339 17:53:30.998032 PCI: 00:15.0 subsystem <- 1028/9de8
1340 17:53:31.000668 PCI: 00:15.0 cmd <- 02
1341 17:53:31.004233 PCI: 00:15.1 subsystem <- 1028/9de9
1342 17:53:31.006469 PCI: 00:15.1 cmd <- 02
1343 17:53:31.010466 PCI: 00:16.0 subsystem <- 1028/9de0
1344 17:53:31.013108 PCI: 00:16.0 cmd <- 02
1345 17:53:31.016790 PCI: 00:17.0 subsystem <- 1028/9dd3
1346 17:53:31.018828 PCI: 00:17.0 cmd <- 03
1347 17:53:31.023733 PCI: 00:19.0 subsystem <- 1028/9dc5
1348 17:53:31.026357 PCI: 00:19.0 cmd <- 06
1349 17:53:31.029272 PCI: 00:19.2 subsystem <- 1028/9dc7
1350 17:53:31.032478 PCI: 00:19.2 cmd <- 06
1351 17:53:31.035316 PCI: 00:1c.0 bridge ctrl <- 0003
1352 17:53:31.039377 PCI: 00:1c.0 subsystem <- 1028/9dbf
1353 17:53:31.041480 Capability: type 0x10 @ 0x40
1354 17:53:31.044881 Capability: type 0x05 @ 0x80
1355 17:53:31.047763 Capability: type 0x0d @ 0x90
1356 17:53:31.049868 PCI: 00:1c.0 cmd <- 06
1357 17:53:31.053939 PCI: 00:1d.0 bridge ctrl <- 0003
1358 17:53:31.056944 PCI: 00:1d.0 subsystem <- 1028/9db4
1359 17:53:31.060146 Capability: type 0x10 @ 0x40
1360 17:53:31.063384 Capability: type 0x05 @ 0x80
1361 17:53:31.066246 Capability: type 0x0d @ 0x90
1362 17:53:31.068869 PCI: 00:1d.0 cmd <- 06
1363 17:53:31.072352 PCI: 00:1f.0 subsystem <- 1028/9d84
1364 17:53:31.074836 PCI: 00:1f.0 cmd <- 407
1365 17:53:31.078994 PCI: 00:1f.3 subsystem <- 1028/9dc8
1366 17:53:31.081022 PCI: 00:1f.3 cmd <- 02
1367 17:53:31.084812 PCI: 00:1f.4 subsystem <- 1028/9da3
1368 17:53:31.087828 PCI: 00:1f.4 cmd <- 03
1369 17:53:31.091761 PCI: 00:1f.5 subsystem <- 1028/9da4
1370 17:53:31.093705 PCI: 00:1f.5 cmd <- 406
1371 17:53:31.098109 PCI: 00:1f.6 subsystem <- 1028/15be
1372 17:53:31.099619 PCI: 00:1f.6 cmd <- 02
1373 17:53:31.110474 PCI: 01:00.0 cmd <- 02
1374 17:53:31.113954 PCI: 02:00.0 cmd <- 02
1375 17:53:31.116472 done.
1376 17:53:31.121088 BS: BS_DEV_ENABLE times (us): entry 510 run 167100 exit 0
1377 17:53:31.123927 Initializing devices...
1378 17:53:31.126761 Root Device init ...
1379 17:53:31.130933 Root Device init finished in 2139 usecs
1380 17:53:31.133068 CPU_CLUSTER: 0 init ...
1381 17:53:31.137875 CPU_CLUSTER: 0 init finished in 2430 usecs
1382 17:53:31.141289 PCI: 00:00.0 init ...
1383 17:53:31.143719 CPU TDP: 15 Watts
1384 17:53:31.146593 CPU PL2 = 51 Watts
1385 17:53:31.150300 PCI: 00:00.0 init finished in 7038 usecs
1386 17:53:31.153049 PCI: 00:02.0 init ...
1387 17:53:31.156620 PCI: 00:02.0 init finished in 2236 usecs
1388 17:53:31.160024 PCI: 00:04.0 init ...
1389 17:53:31.163336 PCI: 00:04.0 init finished in 2237 usecs
1390 17:53:31.166672 PCI: 00:08.0 init ...
1391 17:53:31.169932 PCI: 00:08.0 init finished in 2236 usecs
1392 17:53:31.173275 PCI: 00:12.0 init ...
1393 17:53:31.177033 PCI: 00:12.0 init finished in 2235 usecs
1394 17:53:31.179547 PCI: 00:14.0 init ...
1395 17:53:31.184195 PCI: 00:14.0 init finished in 2236 usecs
1396 17:53:31.186456 PCI: 00:14.2 init ...
1397 17:53:31.190882 PCI: 00:14.2 init finished in 2235 usecs
1398 17:53:31.193166 PCI: 00:14.3 init ...
1399 17:53:31.197575 PCI: 00:14.3 init finished in 2240 usecs
1400 17:53:31.200050 PCI: 00:15.0 init ...
1401 17:53:31.203357 DW I2C bus 0 at 0xd1347000 (400 KHz)
1402 17:53:31.207468 PCI: 00:15.0 init finished in 5935 usecs
1403 17:53:31.210801 PCI: 00:15.1 init ...
1404 17:53:31.213835 DW I2C bus 1 at 0xd1348000 (400 KHz)
1405 17:53:31.217781 PCI: 00:15.1 init finished in 5934 usecs
1406 17:53:31.221142 PCI: 00:16.0 init ...
1407 17:53:31.224904 PCI: 00:16.0 init finished in 2236 usecs
1408 17:53:31.227988 PCI: 00:19.0 init ...
1409 17:53:31.231683 DW I2C bus 4 at 0xd134a000 (400 KHz)
1410 17:53:31.235490 PCI: 00:19.0 init finished in 5924 usecs
1411 17:53:31.238975 PCI: 00:1c.0 init ...
1412 17:53:31.241213 Initializing PCH PCIe bridge.
1413 17:53:31.245760 PCI: 00:1c.0 init finished in 5248 usecs
1414 17:53:31.248448 PCI: 00:1d.0 init ...
1415 17:53:31.251935 Initializing PCH PCIe bridge.
1416 17:53:31.256166 PCI: 00:1d.0 init finished in 5249 usecs
1417 17:53:31.258791 PCI: 00:1f.0 init ...
1418 17:53:31.262979 IOAPIC: Initializing IOAPIC at 0xfec00000
1419 17:53:31.267174 IOAPIC: Bootstrap Processor Local APIC = 0x00
1420 17:53:31.268551 IOAPIC: ID = 0x02
1421 17:53:31.271363 IOAPIC: Dumping registers
1422 17:53:31.274617 reg 0x0000: 0x02000000
1423 17:53:31.276013 reg 0x0001: 0x00770020
1424 17:53:31.279264 reg 0x0002: 0x00000000
1425 17:53:31.283266 PCI: 00:1f.0 init finished in 23329 usecs
1426 17:53:31.285540 PCI: 00:1f.3 init ...
1427 17:53:31.290914 HDA: codec_mask = 05
1428 17:53:31.294976 HDA: Initializing codec #2
1429 17:53:31.297806 HDA: codec viddid: 8086280b
1430 17:53:31.300055 HDA: No verb table entry found
1431 17:53:31.302440 HDA: Initializing codec #0
1432 17:53:31.305328 HDA: codec viddid: 10ec0236
1433 17:53:31.312695 HDA: verb loaded.
1434 17:53:31.317450 PCI: 00:1f.3 init finished in 28840 usecs
1435 17:53:31.319503 PCI: 00:1f.4 init ...
1436 17:53:31.323597 PCI: 00:1f.4 init finished in 2246 usecs
1437 17:53:31.326490 PCI: 00:1f.6 init ...
1438 17:53:31.330911 PCI: 00:1f.6 init finished in 2236 usecs
1439 17:53:31.341250 PCI: 01:00.0 init ...
1440 17:53:31.345540 PCI: 01:00.0 init finished in 2236 usecs
1441 17:53:31.348661 PCI: 02:00.0 init ...
1442 17:53:31.353103 PCI: 02:00.0 init finished in 2236 usecs
1443 17:53:31.354751 PNP: 0c09.0 init ...
1444 17:53:31.359467 EC Label : 00.00.20
1445 17:53:31.362518 EC Revision : 9ca674bba
1446 17:53:31.366655 EC Model Num : 08B9
1447 17:53:31.369872 EC Build Date : 05/10/19
1448 17:53:31.378483 PNP: 0c09.0 init finished in 21746 usecs
1449 17:53:31.381494 Devices initialized
1450 17:53:31.384602 Show all devs... After init.
1451 17:53:31.386239 Root Device: enabled 1
1452 17:53:31.389294 CPU_CLUSTER: 0: enabled 1
1453 17:53:31.391383 DOMAIN: 0000: enabled 1
1454 17:53:31.393365 APIC: 00: enabled 1
1455 17:53:31.396193 PCI: 00:00.0: enabled 1
1456 17:53:31.398928 PCI: 00:02.0: enabled 1
1457 17:53:31.400326 PCI: 00:04.0: enabled 1
1458 17:53:31.403068 PCI: 00:12.0: enabled 1
1459 17:53:31.405896 PCI: 00:12.5: enabled 0
1460 17:53:31.408217 PCI: 00:12.6: enabled 0
1461 17:53:31.410313 PCI: 00:13.0: enabled 0
1462 17:53:31.413241 PCI: 00:14.0: enabled 1
1463 17:53:31.415287 PCI: 00:14.1: enabled 0
1464 17:53:31.417438 PCI: 00:14.3: enabled 1
1465 17:53:31.421048 PCI: 00:14.5: enabled 0
1466 17:53:31.422344 PCI: 00:15.0: enabled 1
1467 17:53:31.424899 PCI: 00:15.1: enabled 1
1468 17:53:31.427437 PCI: 00:15.2: enabled 0
1469 17:53:31.429990 PCI: 00:15.3: enabled 0
1470 17:53:31.432378 PCI: 00:16.0: enabled 1
1471 17:53:31.434554 PCI: 00:16.1: enabled 0
1472 17:53:31.437332 PCI: 00:16.2: enabled 0
1473 17:53:31.440094 PCI: 00:16.3: enabled 0
1474 17:53:31.442737 PCI: 00:16.4: enabled 0
1475 17:53:31.445367 PCI: 00:16.5: enabled 0
1476 17:53:31.446624 PCI: 00:17.0: enabled 1
1477 17:53:31.449175 PCI: 00:19.0: enabled 1
1478 17:53:31.451736 PCI: 00:19.1: enabled 0
1479 17:53:31.454334 PCI: 00:19.2: enabled 1
1480 17:53:31.456303 PCI: 00:1a.0: enabled 0
1481 17:53:31.458773 PCI: 00:1c.0: enabled 1
1482 17:53:31.461298 PCI: 00:1c.1: enabled 0
1483 17:53:31.463786 PCI: 00:1c.2: enabled 0
1484 17:53:31.466192 PCI: 00:1c.3: enabled 0
1485 17:53:31.468573 PCI: 00:1c.4: enabled 0
1486 17:53:31.470788 PCI: 00:1c.5: enabled 0
1487 17:53:31.473717 PCI: 00:1c.6: enabled 0
1488 17:53:31.476263 PCI: 00:1c.7: enabled 0
1489 17:53:31.478238 PCI: 00:1d.0: enabled 1
1490 17:53:31.480704 PCI: 00:1d.1: enabled 0
1491 17:53:31.483620 PCI: 00:1d.2: enabled 0
1492 17:53:31.485539 PCI: 00:1d.3: enabled 0
1493 17:53:31.488266 PCI: 00:1d.4: enabled 0
1494 17:53:31.490154 PCI: 00:1e.0: enabled 0
1495 17:53:31.492888 PCI: 00:1e.1: enabled 0
1496 17:53:31.494922 PCI: 00:1e.2: enabled 0
1497 17:53:31.497665 PCI: 00:1e.3: enabled 0
1498 17:53:31.500274 PCI: 00:1f.0: enabled 1
1499 17:53:31.502384 PCI: 00:1f.1: enabled 0
1500 17:53:31.505810 PCI: 00:1f.2: enabled 0
1501 17:53:31.507928 PCI: 00:1f.3: enabled 1
1502 17:53:31.510035 PCI: 00:1f.4: enabled 1
1503 17:53:31.512158 PCI: 00:1f.5: enabled 1
1504 17:53:31.515527 PCI: 00:1f.6: enabled 1
1505 17:53:31.516975 USB0 port 0: enabled 1
1506 17:53:31.519821 I2C: 01:10: enabled 1
1507 17:53:31.521270 I2C: 01:10: enabled 1
1508 17:53:31.524060 I2C: 01:34: enabled 1
1509 17:53:31.526140 I2C: 02:2c: enabled 1
1510 17:53:31.528137 I2C: 03:50: enabled 1
1511 17:53:31.530334 PNP: 0c09.0: enabled 1
1512 17:53:31.533080 USB2 port 0: enabled 1
1513 17:53:31.535599 USB2 port 1: enabled 1
1514 17:53:31.537441 USB2 port 2: enabled 1
1515 17:53:31.540047 USB2 port 4: enabled 1
1516 17:53:31.542570 USB2 port 5: enabled 1
1517 17:53:31.544817 USB2 port 6: enabled 1
1518 17:53:31.546626 USB2 port 7: enabled 1
1519 17:53:31.549450 USB2 port 8: enabled 1
1520 17:53:31.551508 USB2 port 9: enabled 1
1521 17:53:31.554077 USB3 port 0: enabled 1
1522 17:53:31.557340 USB3 port 1: enabled 1
1523 17:53:31.559421 USB3 port 2: enabled 1
1524 17:53:31.560947 USB3 port 3: enabled 1
1525 17:53:31.563556 USB3 port 4: enabled 1
1526 17:53:31.565711 APIC: 02: enabled 1
1527 17:53:31.568698 PCI: 00:08.0: enabled 1
1528 17:53:31.570087 PCI: 00:14.2: enabled 1
1529 17:53:31.572853 PCI: 01:00.0: enabled 1
1530 17:53:31.575219 PCI: 02:00.0: enabled 1
1531 17:53:31.580464 Disabling ACPI via APMC:
1532 17:53:31.582785 done.
1533 17:53:31.587470 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1534 17:53:31.591147 ELOG: NV offset 0x1bf0000 size 0x4000
1535 17:53:31.598536 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1536 17:53:31.605443 ELOG: Event(17) added with size 13 at 2023-10-09 17:51:59 UTC
1537 17:53:31.609916 POST: Unexpected post code in previous boot: 0x73
1538 17:53:31.617400 ELOG: Event(A3) added with size 11 at 2023-10-09 17:51:59 UTC
1539 17:53:31.622632 ELOG: Event(92) added with size 9 at 2023-10-09 17:51:59 UTC
1540 17:53:31.629142 ELOG: Event(93) added with size 9 at 2023-10-09 17:51:59 UTC
1541 17:53:31.636034 ELOG: Event(9A) added with size 9 at 2023-10-09 17:51:59 UTC
1542 17:53:31.641920 ELOG: Event(9E) added with size 10 at 2023-10-09 17:51:59 UTC
1543 17:53:31.647696 ELOG: Event(9F) added with size 14 at 2023-10-09 17:51:59 UTC
1544 17:53:31.654771 BS: BS_DEV_INIT times (us): entry 0 run 453554 exit 72524
1545 17:53:31.660174 ELOG: Event(A1) added with size 10 at 2023-10-09 17:51:59 UTC
1546 17:53:31.668933 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1547 17:53:31.674393 ELOG: Event(A0) added with size 9 at 2023-10-09 17:51:59 UTC
1548 17:53:31.678431 elog_add_boot_reason: Logged dev mode boot
1549 17:53:31.681197 Finalize devices...
1550 17:53:31.683261 PCI: 00:17.0 final
1551 17:53:31.684116 Devices finalized
1552 17:53:31.689552 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1553 17:53:31.696982 BS: BS_POST_DEVICE times (us): entry 24776 run 5936 exit 5363
1554 17:53:31.702346 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1555 17:53:31.709850 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1556 17:53:31.715213 disable_unused_touchscreen: Disable ACPI0C50
1557 17:53:31.719769 disable_unused_touchscreen: Enable ELAN900C
1558 17:53:31.722091 CBFS @ 1d00000 size 300000
1559 17:53:31.728090 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1560 17:53:31.731470 CBFS: Locating 'fallback/dsdt.aml'
1561 17:53:31.735724 CBFS: Found @ offset 10b200 size 4448
1562 17:53:31.738572 CBFS @ 1d00000 size 300000
1563 17:53:31.745088 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1564 17:53:31.748083 CBFS: Locating 'fallback/slic'
1565 17:53:31.753255 CBFS: 'fallback/slic' not found.
1566 17:53:31.757141 ACPI: Writing ACPI tables at 89c0f000.
1567 17:53:31.759003 ACPI: * FACS
1568 17:53:31.760778 ACPI: * DSDT
1569 17:53:31.764114 Ramoops buffer: 0x100000@0x89b0e000.
1570 17:53:31.768686 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1571 17:53:31.773452 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1572 17:53:31.776937 ACPI: * FADT
1573 17:53:31.778254 SCI is IRQ9
1574 17:53:31.782291 ACPI: added table 1/32, length now 40
1575 17:53:31.783580 ACPI: * SSDT
1576 17:53:31.787908 Found 1 CPU(s) with 2 core(s) each.
1577 17:53:31.791986 Error: Could not locate 'wifi_sar' in VPD.
1578 17:53:31.796263 Error: failed from getting SAR limits!
1579 17:53:31.800154 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1580 17:53:31.803791 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1581 17:53:31.807761 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1582 17:53:31.811583 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1583 17:53:31.817599 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1584 17:53:31.821822 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1585 17:53:31.827214 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1586 17:53:31.831457 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1587 17:53:31.837380 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1588 17:53:31.843239 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1589 17:53:31.848507 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1590 17:53:31.854911 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1591 17:53:31.859565 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1592 17:53:31.864416 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1593 17:53:31.868431 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1594 17:53:31.873765 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1595 17:53:31.879260 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1596 17:53:31.884813 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1597 17:53:31.890702 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1598 17:53:31.897432 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1599 17:53:31.902375 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1600 17:53:31.906978 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1601 17:53:31.910532 ACPI: added table 2/32, length now 44
1602 17:53:31.913108 ACPI: * MCFG
1603 17:53:31.916036 ACPI: added table 3/32, length now 48
1604 17:53:31.917691 ACPI: * TPM2
1605 17:53:31.920557 TPM2 log created at 89afe000
1606 17:53:31.924901 ACPI: added table 4/32, length now 52
1607 17:53:31.926820 ACPI: * MADT
1608 17:53:31.927883 SCI is IRQ9
1609 17:53:31.931056 ACPI: added table 5/32, length now 56
1610 17:53:31.933890 current = 89c14720
1611 17:53:31.936562 ACPI: * IGD OpRegion
1612 17:53:31.938057 GMA: Found VBT in CBFS
1613 17:53:31.940907 GMA: Found valid VBT in CBFS
1614 17:53:31.945129 ACPI: added table 6/32, length now 60
1615 17:53:31.946454 ACPI: * HPET
1616 17:53:31.950606 ACPI: added table 7/32, length now 64
1617 17:53:31.951823 ACPI: done.
1618 17:53:31.954526 ACPI tables: 30672 bytes.
1619 17:53:31.957162 smbios_write_tables: 89afd000
1620 17:53:31.959558 recv_ec_data: 0x01
1621 17:53:31.962581 Create SMBIOS type 17
1622 17:53:31.964586 PCI: 00:14.3 (Intel WiFi)
1623 17:53:31.967700 SMBIOS tables: 708 bytes.
1624 17:53:31.972020 Writing table forward entry at 0x00000500
1625 17:53:31.977941 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1626 17:53:31.981479 Writing coreboot table at 0x89c33000
1627 17:53:31.987727 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1628 17:53:31.991468 1. 0000000000001000-000000000009ffff: RAM
1629 17:53:31.996723 2. 00000000000a0000-00000000000fffff: RESERVED
1630 17:53:32.000428 3. 0000000000100000-0000000089afcfff: RAM
1631 17:53:32.006022 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1632 17:53:32.010678 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1633 17:53:32.016608 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1634 17:53:32.021546 7. 000000008a000000-000000008f7fffff: RESERVED
1635 17:53:32.026959 8. 00000000e0000000-00000000efffffff: RESERVED
1636 17:53:32.031609 9. 00000000fc000000-00000000fc000fff: RESERVED
1637 17:53:32.035865 10. 00000000fe000000-00000000fe00ffff: RESERVED
1638 17:53:32.040445 11. 00000000fed10000-00000000fed17fff: RESERVED
1639 17:53:32.045196 12. 00000000fed80000-00000000fed83fff: RESERVED
1640 17:53:32.050641 13. 00000000feda0000-00000000feda1fff: RESERVED
1641 17:53:32.054184 14. 0000000100000000-000000016e7fffff: RAM
1642 17:53:32.058553 Graphics framebuffer located at 0xc0000000
1643 17:53:32.061531 Passing 6 GPIOs to payload:
1644 17:53:32.066766 NAME | PORT | POLARITY | VALUE
1645 17:53:32.072161 write protect | 0x000000dc | high | high
1646 17:53:32.077470 recovery | 0x000000d5 | low | high
1647 17:53:32.082806 lid | undefined | high | high
1648 17:53:32.088396 power | undefined | high | low
1649 17:53:32.093180 oprom | undefined | high | low
1650 17:53:32.098448 EC in RW | undefined | high | low
1651 17:53:32.101200 recv_ec_data: 0x01
1652 17:53:32.102586 SKU ID: 3
1653 17:53:32.105400 CBFS @ 1d00000 size 300000
1654 17:53:32.111529 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1655 17:53:32.116684 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum 3917
1656 17:53:32.120535 coreboot table: 1484 bytes.
1657 17:53:32.123951 IMD ROOT 0. 89fff000 00001000
1658 17:53:32.126296 IMD SMALL 1. 89ffe000 00001000
1659 17:53:32.129763 FSP MEMORY 2. 89d0e000 002f0000
1660 17:53:32.133326 CONSOLE 3. 89cee000 00020000
1661 17:53:32.136225 TIME STAMP 4. 89ced000 00000910
1662 17:53:32.139244 VBOOT WORK 5. 89cea000 00003000
1663 17:53:32.143355 VBOOT 6. 89ce9000 00000c0c
1664 17:53:32.146498 MRC DATA 7. 89ce7000 000018f0
1665 17:53:32.149905 ROMSTG STCK 8. 89ce6000 00000400
1666 17:53:32.152619 AFTER CAR 9. 89cdc000 0000a000
1667 17:53:32.155705 RAMSTAGE 10. 89c80000 0005c000
1668 17:53:32.158912 REFCODE 11. 89c4b000 00035000
1669 17:53:32.162351 SMM BACKUP 12. 89c3b000 00010000
1670 17:53:32.166523 COREBOOT 13. 89c33000 00008000
1671 17:53:32.169248 ACPI 14. 89c0f000 00024000
1672 17:53:32.173354 ACPI GNVS 15. 89c0e000 00001000
1673 17:53:32.176132 RAMOOPS 16. 89b0e000 00100000
1674 17:53:32.179309 TPM2 TCGLOG17. 89afe000 00010000
1675 17:53:32.182126 SMBIOS 18. 89afd000 00000800
1676 17:53:32.184830 IMD small region:
1677 17:53:32.187632 IMD ROOT 0. 89ffec00 00000400
1678 17:53:32.191473 FSP RUNTIME 1. 89ffebe0 00000004
1679 17:53:32.194556 POWER STATE 2. 89ffeba0 00000040
1680 17:53:32.198264 ROMSTAGE 3. 89ffeb80 00000004
1681 17:53:32.201601 MEM INFO 4. 89ffe9c0 000001a9
1682 17:53:32.205664 VPD 5. 89ffe960 00000058
1683 17:53:32.209183 COREBOOTFWD 6. 89ffe920 00000028
1684 17:53:32.212800 MTRR: Physical address space:
1685 17:53:32.218246 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1686 17:53:32.224704 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1687 17:53:32.230848 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1688 17:53:32.237136 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1689 17:53:32.243949 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1690 17:53:32.249165 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1691 17:53:32.255683 0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6
1692 17:53:32.260066 MTRR: Fixed MSR 0x250 0x0606060606060606
1693 17:53:32.263809 MTRR: Fixed MSR 0x258 0x0606060606060606
1694 17:53:32.269886 MTRR: Fixed MSR 0x259 0x0000000000000000
1695 17:53:32.273078 MTRR: Fixed MSR 0x268 0x0606060606060606
1696 17:53:32.276487 MTRR: Fixed MSR 0x269 0x0606060606060606
1697 17:53:32.280270 MTRR: Fixed MSR 0x26a 0x0606060606060606
1698 17:53:32.284526 MTRR: Fixed MSR 0x26b 0x0606060606060606
1699 17:53:32.288140 MTRR: Fixed MSR 0x26c 0x0606060606060606
1700 17:53:32.292415 MTRR: Fixed MSR 0x26d 0x0606060606060606
1701 17:53:32.297082 MTRR: Fixed MSR 0x26e 0x0606060606060606
1702 17:53:32.300833 MTRR: Fixed MSR 0x26f 0x0606060606060606
1703 17:53:32.304014 call enable_fixed_mtrr()
1704 17:53:32.307573 CPU physical address size: 39 bits
1705 17:53:32.311075 MTRR: default type WB/UC MTRR counts: 7/6.
1706 17:53:32.315232 MTRR: UC selected as default type.
1707 17:53:32.321535 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1708 17:53:32.327045 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1709 17:53:32.333805 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1710 17:53:32.339513 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1711 17:53:32.346247 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1712 17:53:32.351897 MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6
1713 17:53:32.353133
1714 17:53:32.354032 MTRR check
1715 17:53:32.355759 Fixed MTRRs : Enabled
1716 17:53:32.358781 Variable MTRRs: Enabled
1717 17:53:32.359533
1718 17:53:32.363585 MTRR: Fixed MSR 0x250 0x0606060606060606
1719 17:53:32.367052 MTRR: Fixed MSR 0x258 0x0606060606060606
1720 17:53:32.371903 MTRR: Fixed MSR 0x259 0x0000000000000000
1721 17:53:32.375218 MTRR: Fixed MSR 0x268 0x0606060606060606
1722 17:53:32.378872 MTRR: Fixed MSR 0x269 0x0606060606060606
1723 17:53:32.383123 MTRR: Fixed MSR 0x26a 0x0606060606060606
1724 17:53:32.387794 MTRR: Fixed MSR 0x26b 0x0606060606060606
1725 17:53:32.391343 MTRR: Fixed MSR 0x26c 0x0606060606060606
1726 17:53:32.396077 MTRR: Fixed MSR 0x26d 0x0606060606060606
1727 17:53:32.399244 MTRR: Fixed MSR 0x26e 0x0606060606060606
1728 17:53:32.404203 MTRR: Fixed MSR 0x26f 0x0606060606060606
1729 17:53:32.410707 BS: BS_WRITE_TABLES times (us): entry 17198 run 490184 exit 150014
1730 17:53:32.413206 call enable_fixed_mtrr()
1731 17:53:32.415578 CBFS @ 1d00000 size 300000
1732 17:53:32.418607 CPU physical address size: 39 bits
1733 17:53:32.425017 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1734 17:53:32.428664 CBFS: Locating 'fallback/payload'
1735 17:53:32.433987 CBFS: Found @ offset 1cf4c0 size 3a954
1736 17:53:32.438723 Checking segment from ROM address 0xffecf4f8
1737 17:53:32.442137 Checking segment from ROM address 0xffecf514
1738 17:53:32.446942 Loading segment from ROM address 0xffecf4f8
1739 17:53:32.449760 code (compression=0)
1740 17:53:32.458355 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1741 17:53:32.466518 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1742 17:53:32.468472 it's not compressed!
1743 17:53:32.550730 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1744 17:53:32.558003 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1745 17:53:32.565462 Loading segment from ROM address 0xffecf514
1746 17:53:32.568558 Entry Point 0x30100018
1747 17:53:32.569910 Loaded segments
1748 17:53:32.579768 Finalizing chipset.
1749 17:53:32.581255 Finalizing SMM.
1750 17:53:32.587437 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 159639 exit 11518
1751 17:53:32.590505 mp_park_aps done after 0 msecs.
1752 17:53:32.594768 Jumping to boot code at 30100018(89c33000)
1753 17:53:32.604266 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1754 17:53:32.604394
1755 17:53:32.604897
1756 17:53:32.605021
1757 17:53:32.607577 Starting depthcharge on sarien...
1758 17:53:32.607727
1759 17:53:32.608428 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1760 17:53:32.608579 start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
1761 17:53:32.608707 Setting prompt string to ['sarien:']
1762 17:53:32.608834 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:32)
1763 17:53:32.615537 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1764 17:53:32.615708
1765 17:53:32.623042 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1766 17:53:32.623231
1767 17:53:32.630727 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1768 17:53:32.630979
1769 17:53:32.632725 BIOS MMAP details:
1770 17:53:32.632987
1771 17:53:32.635455 IFD Base Offset : 0x1000000
1772 17:53:32.635810
1773 17:53:32.638892 IFD End Offset : 0x2000000
1774 17:53:32.639734
1775 17:53:32.642312 MMAP Size : 0x1000000
1776 17:53:32.642824
1777 17:53:32.644333 MMAP Start : 0xff000000
1778 17:53:32.645001
1779 17:53:32.651238 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1780 17:53:32.654339
1781 17:53:32.658588 Failed to find BH720 with VID/DID 1217:8620
1782 17:53:32.659273
1783 17:53:32.662747 New NVMe Controller 0x3214e050 @ 00:1d:04
1784 17:53:32.663209
1785 17:53:32.666418 New NVMe Controller 0x3214e118 @ 00:1d:00
1786 17:53:32.666969
1787 17:53:32.672665 The GBB signature is at 0x30000014 and is: 24 47 42 42
1788 17:53:32.676756
1789 17:53:32.678714 Wipe memory regions:
1790 17:53:32.679110
1791 17:53:32.682166 [0x00000000001000, 0x000000000a0000)
1792 17:53:32.683102
1793 17:53:32.686359 [0x00000000100000, 0x00000030000000)
1794 17:53:32.768956
1795 17:53:32.772426 [0x00000032751910, 0x00000089afd000)
1796 17:53:32.923167
1797 17:53:32.926822 [0x00000100000000, 0x0000016e800000)
1798 17:53:33.546930
1799 17:53:33.548561 R8152: Initializing
1800 17:53:33.549008
1801 17:53:33.551235 Version 9 (ocp_data = 6010)
1802 17:53:33.552004
1803 17:53:33.553833 R8152: Done initializing
1804 17:53:33.554536
1805 17:53:33.556541 Adding net device
1806 17:53:33.556982
1807 17:53:33.562293 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
1808 17:53:33.562720
1809 17:53:33.563059
1810 17:53:33.563372
1811 17:53:33.564457 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1813 17:53:33.665653 sarien: tftpboot 192.168.201.1 11712663/tftp-deploy-6h6or6z3/kernel/bzImage 11712663/tftp-deploy-6h6or6z3/kernel/cmdline 11712663/tftp-deploy-6h6or6z3/ramdisk/ramdisk.cpio.gz
1814 17:53:33.666269 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1815 17:53:33.666878 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
1816 17:53:33.670364 tftpboot 192.168.201.1 11712663/tftp-deploy-6h6or6z3/kernel/bzImage 11712663/tftp-deploy-6h6or6z3/kernel/cmdline 11712663/tftp-deploy-6h6or6z3/ramdisk/ramdisk.cpio.gz
1817 17:53:33.670780
1818 17:53:33.712017 Waiting for link
1819 17:53:33.870239
1820 17:53:33.871324 done.
1821 17:53:33.871854
1822 17:53:33.872606 MAC: 00:e0:4c:78:7f:db
1823 17:53:33.873604
1824 17:53:33.875887 Sending DHCP discover... done.
1825 17:53:33.876372
1826 17:53:33.879551 Waiting for reply... done.
1827 17:53:33.880198
1828 17:53:33.881442 Sending DHCP request... done.
1829 17:53:33.883220
1830 17:53:33.885396 Waiting for reply... done.
1831 17:53:33.886012
1832 17:53:33.888185 My ip is 192.168.201.104
1833 17:53:33.888704
1834 17:53:33.892468 The DHCP server ip is 192.168.201.1
1835 17:53:33.893110
1836 17:53:33.897180 TFTP server IP predefined by user: 192.168.201.1
1837 17:53:33.897610
1838 17:53:33.903514 Bootfile predefined by user: 11712663/tftp-deploy-6h6or6z3/kernel/bzImage
1839 17:53:33.904585
1840 17:53:33.907139 Sending tftp read request... done.
1841 17:53:33.907579
1842 17:53:33.914055 Waiting for the transfer...
1843 17:53:33.914535
1844 17:53:34.303903 00000000 ################################################################
1845 17:53:34.304457
1846 17:53:34.581985 00080000 ################################################################
1847 17:53:34.582556
1848 17:53:34.827106 00100000 ################################################################
1849 17:53:34.827802
1850 17:53:35.071237 00180000 ################################################################
1851 17:53:35.071385
1852 17:53:35.332773 00200000 ################################################################
1853 17:53:35.332928
1854 17:53:35.583813 00280000 ################################################################
1855 17:53:35.584292
1856 17:53:35.855356 00300000 ################################################################
1857 17:53:35.855721
1858 17:53:36.099657 00380000 ################################################################
1859 17:53:36.100009
1860 17:53:36.343213 00400000 ################################################################
1861 17:53:36.343672
1862 17:53:36.585565 00480000 ################################################################
1863 17:53:36.585919
1864 17:53:36.832754 00500000 ################################################################
1865 17:53:36.832899
1866 17:53:37.075355 00580000 ################################################################
1867 17:53:37.075728
1868 17:53:37.324812 00600000 ################################################################
1869 17:53:37.325001
1870 17:53:37.584506 00680000 ################################################################
1871 17:53:37.584973
1872 17:53:37.845298 00700000 ################################################################
1873 17:53:37.845667
1874 17:53:38.104171 00780000 ################################################################
1875 17:53:38.104554
1876 17:53:38.154520 00800000 ############# done.
1877 17:53:38.154673
1878 17:53:38.157499 The bootfile was 8490896 bytes long.
1879 17:53:38.157908
1880 17:53:38.161268 Sending tftp read request... done.
1881 17:53:38.161594
1882 17:53:38.164119 Waiting for the transfer...
1883 17:53:38.164216
1884 17:53:38.434800 00000000 ################################################################
1885 17:53:38.435505
1886 17:53:38.685447 00080000 ################################################################
1887 17:53:38.685628
1888 17:53:38.931122 00100000 ################################################################
1889 17:53:38.931838
1890 17:53:39.181915 00180000 ################################################################
1891 17:53:39.182119
1892 17:53:39.436315 00200000 ################################################################
1893 17:53:39.436937
1894 17:53:39.686456 00280000 ################################################################
1895 17:53:39.687075
1896 17:53:39.950051 00300000 ################################################################
1897 17:53:39.950494
1898 17:53:40.196172 00380000 ################################################################
1899 17:53:40.196830
1900 17:53:40.462354 00400000 ################################################################
1901 17:53:40.463006
1902 17:53:40.708730 00480000 ################################################################
1903 17:53:40.708940
1904 17:53:40.954011 00500000 ################################################################
1905 17:53:40.954196
1906 17:53:41.218428 00580000 ################################################################
1907 17:53:41.218584
1908 17:53:41.484977 00600000 ################################################################
1909 17:53:41.485125
1910 17:53:41.737289 00680000 ################################################################
1911 17:53:41.737678
1912 17:53:41.996241 00700000 ################################################################
1913 17:53:41.996929
1914 17:53:42.254082 00780000 ################################################################
1915 17:53:42.254664
1916 17:53:42.488960 00800000 ####################################################### done.
1917 17:53:42.489111
1918 17:53:42.492531 Sending tftp read request... done.
1919 17:53:42.492686
1920 17:53:42.494812 Waiting for the transfer...
1921 17:53:42.495316
1922 17:53:42.497095 00000000 # done.
1923 17:53:42.497790
1924 17:53:42.506022 Command line loaded dynamically from TFTP file: 11712663/tftp-deploy-6h6or6z3/kernel/cmdline
1925 17:53:42.506123
1926 17:53:42.525955 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1927 17:53:42.529661
1928 17:53:42.533091 Shutting down all USB controllers.
1929 17:53:42.533206
1930 17:53:42.535822 Removing current net device
1931 17:53:42.539909
1932 17:53:42.542563 EC: exit firmware mode
1933 17:53:42.543208
1934 17:53:42.545819 Finalizing coreboot
1935 17:53:42.545911
1936 17:53:42.550907 Exiting depthcharge with code 4 at timestamp: 16848625
1937 17:53:42.550990
1938 17:53:42.551056
1939 17:53:42.552915 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
1940 17:53:42.553026 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
1941 17:53:42.553108 Setting prompt string to ['Linux version [0-9]']
1942 17:53:42.553200 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1943 17:53:42.553285 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1944 17:53:42.553467 Starting kernel ...
1945 17:53:42.553539
1946 17:53:42.553601
1948 17:58:04.553356 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
1950 17:58:04.553570 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
1952 17:58:04.553733 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1955 17:58:04.554043 end: 2 depthcharge-action (duration 00:05:00) [common]
1957 17:58:04.554282 Cleaning after the job
1958 17:58:04.554377 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712663/tftp-deploy-6h6or6z3/ramdisk
1959 17:58:04.555578 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712663/tftp-deploy-6h6or6z3/kernel
1960 17:58:04.556907 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712663/tftp-deploy-6h6or6z3/modules
1961 17:58:04.557259 start: 5.1 power-off (timeout 00:00:30) [common]
1962 17:58:04.557428 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=off'
1963 17:58:09.695334 >> Command sent successfully.
1964 17:58:09.706442 Returned 0 in 5 seconds
1965 17:58:09.807750 end: 5.1 power-off (duration 00:00:05) [common]
1967 17:58:09.809179 start: 5.2 read-feedback (timeout 00:09:55) [common]
1968 17:58:09.810398 Listened to connection for namespace 'common' for up to 1s
1969 17:58:10.809875 Finalising connection for namespace 'common'
1970 17:58:10.810064 Disconnecting from shell: Finalise
1971 17:58:10.810149
1972 17:58:10.910487 end: 5.2 read-feedback (duration 00:00:01) [common]
1973 17:58:10.910646 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712663
1974 17:58:10.927514 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712663
1975 17:58:10.927703 JobError: Your job cannot terminate cleanly.