Boot log: dell-latitude-5400-8665U-sarien
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:51:59.494616 lava-dispatcher, installed at version: 2023.08
2 17:51:59.494849 start: 0 validate
3 17:51:59.494999 Start time: 2023-10-09 17:51:59.494990+00:00 (UTC)
4 17:51:59.495130 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:51:59.495271 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:51:59.764733 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:51:59.765382 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:52:00.034398 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:52:00.034581 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:52:03.486679 validate duration: 3.99
12 17:52:03.488188 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:52:03.488845 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:52:03.489416 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:52:03.490122 Not decompressing ramdisk as can be used compressed.
16 17:52:03.490720 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:52:03.491271 saving as /var/lib/lava/dispatcher/tmp/11712677/tftp-deploy-njdwww91/ramdisk/rootfs.cpio.gz
18 17:52:03.491668 total size: 8418130 (8 MB)
19 17:52:04.008835 progress 0 % (0 MB)
20 17:52:04.021414 progress 5 % (0 MB)
21 17:52:04.033633 progress 10 % (0 MB)
22 17:52:04.044374 progress 15 % (1 MB)
23 17:52:04.051104 progress 20 % (1 MB)
24 17:52:04.056094 progress 25 % (2 MB)
25 17:52:04.060411 progress 30 % (2 MB)
26 17:52:04.063827 progress 35 % (2 MB)
27 17:52:04.067279 progress 40 % (3 MB)
28 17:52:04.070494 progress 45 % (3 MB)
29 17:52:04.073424 progress 50 % (4 MB)
30 17:52:04.076321 progress 55 % (4 MB)
31 17:52:04.078838 progress 60 % (4 MB)
32 17:52:04.081159 progress 65 % (5 MB)
33 17:52:04.083657 progress 70 % (5 MB)
34 17:52:04.086205 progress 75 % (6 MB)
35 17:52:04.088725 progress 80 % (6 MB)
36 17:52:04.091212 progress 85 % (6 MB)
37 17:52:04.093763 progress 90 % (7 MB)
38 17:52:04.096335 progress 95 % (7 MB)
39 17:52:04.098778 progress 100 % (8 MB)
40 17:52:04.099066 8 MB downloaded in 0.61 s (13.22 MB/s)
41 17:52:04.099291 end: 1.1.1 http-download (duration 00:00:01) [common]
43 17:52:04.099710 end: 1.1 download-retry (duration 00:00:01) [common]
44 17:52:04.099839 start: 1.2 download-retry (timeout 00:09:59) [common]
45 17:52:04.099968 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 17:52:04.100168 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:52:04.100280 saving as /var/lib/lava/dispatcher/tmp/11712677/tftp-deploy-njdwww91/kernel/bzImage
48 17:52:04.100380 total size: 8490896 (8 MB)
49 17:52:04.100479 No compression specified
50 17:52:04.102232 progress 0 % (0 MB)
51 17:52:04.104795 progress 5 % (0 MB)
52 17:52:04.107456 progress 10 % (0 MB)
53 17:52:04.110032 progress 15 % (1 MB)
54 17:52:04.112607 progress 20 % (1 MB)
55 17:52:04.115164 progress 25 % (2 MB)
56 17:52:04.117828 progress 30 % (2 MB)
57 17:52:04.120390 progress 35 % (2 MB)
58 17:52:04.123057 progress 40 % (3 MB)
59 17:52:04.125725 progress 45 % (3 MB)
60 17:52:04.128466 progress 50 % (4 MB)
61 17:52:04.131035 progress 55 % (4 MB)
62 17:52:04.133567 progress 60 % (4 MB)
63 17:52:04.136091 progress 65 % (5 MB)
64 17:52:04.138569 progress 70 % (5 MB)
65 17:52:04.141069 progress 75 % (6 MB)
66 17:52:04.143604 progress 80 % (6 MB)
67 17:52:04.146131 progress 85 % (6 MB)
68 17:52:04.148672 progress 90 % (7 MB)
69 17:52:04.151146 progress 95 % (7 MB)
70 17:52:04.153726 progress 100 % (8 MB)
71 17:52:04.153851 8 MB downloaded in 0.05 s (151.45 MB/s)
72 17:52:04.154006 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:52:04.154248 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:52:04.154341 start: 1.3 download-retry (timeout 00:09:59) [common]
76 17:52:04.154434 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 17:52:04.154586 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:52:04.154664 saving as /var/lib/lava/dispatcher/tmp/11712677/tftp-deploy-njdwww91/modules/modules.tar
79 17:52:04.154729 total size: 250868 (0 MB)
80 17:52:04.154795 Using unxz to decompress xz
81 17:52:04.159948 progress 13 % (0 MB)
82 17:52:04.160449 progress 26 % (0 MB)
83 17:52:04.160713 progress 39 % (0 MB)
84 17:52:04.162481 progress 52 % (0 MB)
85 17:52:04.164551 progress 65 % (0 MB)
86 17:52:04.166566 progress 78 % (0 MB)
87 17:52:04.168815 progress 91 % (0 MB)
88 17:52:04.170734 progress 100 % (0 MB)
89 17:52:04.176822 0 MB downloaded in 0.02 s (10.83 MB/s)
90 17:52:04.177073 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:52:04.177355 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:52:04.177456 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 17:52:04.177556 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 17:52:04.177648 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:52:04.177745 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 17:52:04.178017 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g
98 17:52:04.178178 makedir: /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin
99 17:52:04.178297 makedir: /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/tests
100 17:52:04.178410 makedir: /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/results
101 17:52:04.178536 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-add-keys
102 17:52:04.178699 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-add-sources
103 17:52:04.178845 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-background-process-start
104 17:52:04.178990 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-background-process-stop
105 17:52:04.179128 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-common-functions
106 17:52:04.179265 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-echo-ipv4
107 17:52:04.179402 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-install-packages
108 17:52:04.179562 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-installed-packages
109 17:52:04.179701 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-os-build
110 17:52:04.179847 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-probe-channel
111 17:52:04.180094 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-probe-ip
112 17:52:04.180290 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-target-ip
113 17:52:04.180468 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-target-mac
114 17:52:04.180643 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-target-storage
115 17:52:04.180825 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-test-case
116 17:52:04.180999 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-test-event
117 17:52:04.181171 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-test-feedback
118 17:52:04.181349 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-test-raise
119 17:52:04.181524 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-test-reference
120 17:52:04.181696 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-test-runner
121 17:52:04.181868 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-test-set
122 17:52:04.182041 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-test-shell
123 17:52:04.182220 Updating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-install-packages (oe)
124 17:52:04.182426 Updating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/bin/lava-installed-packages (oe)
125 17:52:04.182593 Creating /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/environment
126 17:52:04.182732 LAVA metadata
127 17:52:04.182842 - LAVA_JOB_ID=11712677
128 17:52:04.182945 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:52:04.183093 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 17:52:04.183194 skipped lava-vland-overlay
131 17:52:04.183318 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:52:04.183441 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 17:52:04.183539 skipped lava-multinode-overlay
134 17:52:04.183654 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:52:04.183775 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 17:52:04.183887 Loading test definitions
137 17:52:04.184069 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 17:52:04.184187 Using /lava-11712677 at stage 0
139 17:52:04.184664 uuid=11712677_1.4.2.3.1 testdef=None
140 17:52:04.184791 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:52:04.184924 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 17:52:04.185741 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:52:04.186118 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 17:52:04.187155 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:52:04.187554 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 17:52:04.188420 runner path: /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/0/tests/0_dmesg test_uuid 11712677_1.4.2.3.1
149 17:52:04.188589 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:52:04.188832 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 17:52:04.188909 Using /lava-11712677 at stage 1
153 17:52:04.189247 uuid=11712677_1.4.2.3.5 testdef=None
154 17:52:04.189342 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:52:04.189432 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 17:52:04.189948 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:52:04.190178 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 17:52:04.190884 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:52:04.191130 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 17:52:04.191816 runner path: /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/1/tests/1_bootrr test_uuid 11712677_1.4.2.3.5
163 17:52:04.191981 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:52:04.192246 Creating lava-test-runner.conf files
166 17:52:04.192313 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/0 for stage 0
167 17:52:04.192409 - 0_dmesg
168 17:52:04.192495 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712677/lava-overlay-f0hjqp6g/lava-11712677/1 for stage 1
169 17:52:04.192593 - 1_bootrr
170 17:52:04.192695 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:52:04.192784 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 17:52:04.202031 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:52:04.202141 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 17:52:04.202237 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:52:04.202327 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:52:04.202416 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 17:52:04.487949 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:52:04.488427 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 17:52:04.488564 extracting modules file /var/lib/lava/dispatcher/tmp/11712677/tftp-deploy-njdwww91/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712677/extract-overlay-ramdisk-p83u3us1/ramdisk
180 17:52:04.504194 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:52:04.504328 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 17:52:04.504432 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712677/compress-overlay-go8dcinl/overlay-1.4.2.4.tar.gz to ramdisk
183 17:52:04.504510 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712677/compress-overlay-go8dcinl/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712677/extract-overlay-ramdisk-p83u3us1/ramdisk
184 17:52:04.514678 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:52:04.514834 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 17:52:04.514929 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:52:04.515020 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 17:52:04.515107 Building ramdisk /var/lib/lava/dispatcher/tmp/11712677/extract-overlay-ramdisk-p83u3us1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712677/extract-overlay-ramdisk-p83u3us1/ramdisk
189 17:52:04.676456 >> 49788 blocks
190 17:52:05.615579 rename /var/lib/lava/dispatcher/tmp/11712677/extract-overlay-ramdisk-p83u3us1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712677/tftp-deploy-njdwww91/ramdisk/ramdisk.cpio.gz
191 17:52:05.616113 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:52:05.616254 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 17:52:05.616365 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 17:52:05.616476 No mkimage arch provided, not using FIT.
195 17:52:05.616577 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:52:05.616674 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:52:05.616796 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:52:05.616899 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 17:52:05.616987 No LXC device requested
200 17:52:05.617072 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:52:05.617163 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 17:52:05.617247 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:52:05.617322 Checking files for TFTP limit of 4294967296 bytes.
204 17:52:05.617779 end: 1 tftp-deploy (duration 00:00:02) [common]
205 17:52:05.617913 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:52:05.618015 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:52:05.618143 substitutions:
208 17:52:05.618216 - {DTB}: None
209 17:52:05.618282 - {INITRD}: 11712677/tftp-deploy-njdwww91/ramdisk/ramdisk.cpio.gz
210 17:52:05.618346 - {KERNEL}: 11712677/tftp-deploy-njdwww91/kernel/bzImage
211 17:52:05.618407 - {LAVA_MAC}: None
212 17:52:05.618468 - {PRESEED_CONFIG}: None
213 17:52:05.618527 - {PRESEED_LOCAL}: None
214 17:52:05.618585 - {RAMDISK}: 11712677/tftp-deploy-njdwww91/ramdisk/ramdisk.cpio.gz
215 17:52:05.618645 - {ROOT_PART}: None
216 17:52:05.618702 - {ROOT}: None
217 17:52:05.618760 - {SERVER_IP}: 192.168.201.1
218 17:52:05.618818 - {TEE}: None
219 17:52:05.618876 Parsed boot commands:
220 17:52:05.618933 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:52:05.619123 Parsed boot commands: tftpboot 192.168.201.1 11712677/tftp-deploy-njdwww91/kernel/bzImage 11712677/tftp-deploy-njdwww91/kernel/cmdline 11712677/tftp-deploy-njdwww91/ramdisk/ramdisk.cpio.gz
222 17:52:05.619215 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:52:05.619306 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:52:05.619407 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:52:05.619497 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:52:05.619573 Not connected, no need to disconnect.
227 17:52:05.619653 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:52:05.619744 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:52:05.619832 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-0'
230 17:52:05.624281 Setting prompt string to ['lava-test: # ']
231 17:52:05.624662 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:52:05.624778 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:52:05.624882 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:52:05.625005 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:52:05.625261 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=reboot'
236 17:52:22.536504 >> Command sent successfully.
237 17:52:22.539398 Returned 0 in 16 seconds
238 17:52:22.639824 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 17:52:22.640210 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 17:52:22.640321 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 17:52:22.640422 Setting prompt string to 'Starting depthcharge on sarien...'
243 17:52:22.640502 Changing prompt to 'Starting depthcharge on sarien...'
244 17:52:22.640577 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 17:52:22.640873 [Enter `^Ec?' for help]
246 17:52:22.640963
247 17:52:22.641038
248 17:52:22.641112 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 17:52:22.641182 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
250 17:52:22.641248 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 17:52:22.641313 CPU: AES supported, TXT supported, VT supported
252 17:52:22.641374 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
253 17:52:22.641435 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 17:52:22.641495 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
255 17:52:22.641556 VBOOT: Loading verstage.
256 17:52:22.641618 CBFS @ 1d00000 size 300000
257 17:52:22.641678 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 17:52:22.641738 CBFS: Locating 'fallback/verstage'
259 17:52:22.641798 CBFS: Found @ offset 10f6c0 size 1435c
260 17:52:22.641858
261 17:52:22.641942
262 17:52:22.642005 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 17:52:22.642067 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 17:52:22.642127 done! DID_VID 0x00281ae0
265 17:52:22.642187 TPM ready after 0 ms
266 17:52:22.642247 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 17:52:22.642306 tlcl_send_startup: Startup return code is 0
268 17:52:22.642366 TPM: setup succeeded
269 17:52:22.642425 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 17:52:22.642484 Checking cr50 for recovery request
271 17:52:22.642543 Phase 1
272 17:52:22.642601 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 17:52:22.642660 FMAP: base = fe000000 size = 2000000 #areas = 37
274 17:52:22.642720 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 17:52:22.642780 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 17:52:22.642840 Phase 2
277 17:52:22.642913 Phase 3
278 17:52:22.642973 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 17:52:22.643033 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 17:52:22.643092 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
281 17:52:22.643151 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
282 17:52:22.643211 VB2:vb2_verify_keyblock() Checking key block signature...
283 17:52:22.643270 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
284 17:52:22.643329 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
285 17:52:22.643389 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 17:52:22.643447 Phase 4
287 17:52:22.643506 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
288 17:52:22.643565 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 17:52:22.643624 VB2:vb2_rsa_verify_digest() Digest check failed!
290 17:52:22.643683 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 17:52:22.643742 Saving nvdata
292 17:52:22.643800 Reboot requested (10020007)
293 17:52:22.643862 board_reset() called!
294 17:52:22.643962 full_reset() called!
295 17:52:26.842247
296 17:52:26.842425
297 17:52:26.850742 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 17:52:26.855170 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
299 17:52:26.860653 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 17:52:26.864656 CPU: AES supported, TXT supported, VT supported
301 17:52:26.869796 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
302 17:52:26.875208 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 17:52:26.880206 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
304 17:52:26.883946 VBOOT: Loading verstage.
305 17:52:26.886328 CBFS @ 1d00000 size 300000
306 17:52:26.893143 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 17:52:26.896540 CBFS: Locating 'fallback/verstage'
308 17:52:26.900967 CBFS: Found @ offset 10f6c0 size 1435c
309 17:52:26.914745
310 17:52:26.915229
311 17:52:26.923824 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 17:52:26.930380 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 17:52:27.053117 .done! DID_VID 0x00281ae0
314 17:52:27.055330 TPM ready after 0 ms
315 17:52:27.058926 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 17:52:27.115738 tlcl_send_startup: Startup return code is 0
317 17:52:27.117510 TPM: setup succeeded
318 17:52:27.134795 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 17:52:27.138251 Checking cr50 for recovery request
320 17:52:27.148025 Phase 1
321 17:52:27.152773 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 17:52:27.157747 FMAP: base = fe000000 size = 2000000 #areas = 37
323 17:52:27.162237 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 17:52:27.169479 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 17:52:27.176012 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 17:52:27.178987 Recovery requested (1009000e)
327 17:52:27.180327 Saving nvdata
328 17:52:27.195293 tlcl_extend: response is 0
329 17:52:27.209911 tlcl_extend: response is 0
330 17:52:27.213236 CBFS @ 1d00000 size 300000
331 17:52:27.219934 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 17:52:27.222945 CBFS: Locating 'fallback/romstage'
333 17:52:27.226756 CBFS: Found @ offset 80 size 15b2c
334 17:52:27.228189
335 17:52:27.228284
336 17:52:27.236832 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 17:52:27.241844 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 17:52:27.246168 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 17:52:27.250487 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 17:52:27.255130 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 17:52:27.258641 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 17:52:27.260792 TCO_STS: 0000 0004
343 17:52:27.263957 GEN_PMCON: d0015209 00002200
344 17:52:27.266924 GBLRST_CAUSE: 00000000 00000000
345 17:52:27.268749 prev_sleep_state 5
346 17:52:27.272567 Boot Count incremented to 35580
347 17:52:27.276123 CBFS @ 1d00000 size 300000
348 17:52:27.281874 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 17:52:27.284373 CBFS: Locating 'fspm.bin'
350 17:52:27.288567 CBFS: Found @ offset 60fc0 size 70000
351 17:52:27.293746 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 17:52:27.298786 FMAP: base = fe000000 size = 2000000 #areas = 37
353 17:52:27.304511 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 17:52:27.311309 Probing TPM I2C: done! DID_VID 0x00281ae0
355 17:52:27.313641 Locality already claimed
356 17:52:27.317218 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 17:52:27.336412 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 17:52:27.342961 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 17:52:27.345806 MRC cache found, size 18e0
360 17:52:27.348135 bootmode is set to :2
361 17:52:45.120474 CBMEM:
362 17:52:45.124734 IMD: root @ 89fff000 254 entries.
363 17:52:45.127611 IMD: root @ 89ffec00 62 entries.
364 17:52:45.130520 External stage cache:
365 17:52:45.133969 IMD: root @ 8abff000 254 entries.
366 17:52:45.137552 IMD: root @ 8abfec00 62 entries.
367 17:52:45.143237 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 17:52:45.146604 creating vboot_handoff structure
369 17:52:45.168879 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 17:52:45.210539 tlcl_write: response is 0
371 17:52:45.230696 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 17:52:45.234176 MRC: TPM MRC hash updated successfully.
373 17:52:45.236649 1 DIMMs found
374 17:52:45.238274 top_of_ram = 0x8a000000
375 17:52:45.243673 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 17:52:45.248447 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 17:52:45.251525 CBFS @ 1d00000 size 300000
378 17:52:45.257777 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 17:52:45.261535 CBFS: Locating 'fallback/postcar'
380 17:52:45.265063 CBFS: Found @ offset 107000 size 41a4
381 17:52:45.270852 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 17:52:45.280639 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 17:52:45.286524 Processing 126 relocs. Offset value of 0x87cdd000
384 17:52:45.289376
385 17:52:45.289498
386 17:52:45.297417 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 17:52:45.300077 CBFS @ 1d00000 size 300000
388 17:52:45.306388 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 17:52:45.309824 CBFS: Locating 'fallback/ramstage'
390 17:52:45.314005 CBFS: Found @ offset 458c0 size 1a8a8
391 17:52:45.320509 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 17:52:45.348314 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 17:52:45.353273 Processing 3754 relocs. Offset value of 0x88e81000
394 17:52:45.359283
395 17:52:45.359803
396 17:52:45.368813 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 17:52:45.372701 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 17:52:45.377230 FMAP: base = fe000000 size = 2000000 #areas = 37
399 17:52:45.382763 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 17:52:45.386608 WARNING: RO_VPD is uninitialized or empty.
401 17:52:45.391260 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 17:52:45.396137 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 17:52:45.397786 Normal boot.
404 17:52:45.404621 BS: BS_PRE_DEVICE times (us): entry 0 run 56 exit 1165
405 17:52:45.407372 CBFS @ 1d00000 size 300000
406 17:52:45.413117 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 17:52:45.417175 CBFS: Locating 'cpu_microcode_blob.bin'
408 17:52:45.421198 CBFS: Found @ offset 15c40 size 2fc00
409 17:52:45.425987 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 17:52:45.427876 Skip microcode update
411 17:52:45.430669 CBFS @ 1d00000 size 300000
412 17:52:45.436839 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 17:52:45.439184 CBFS: Locating 'fsps.bin'
414 17:52:45.443148 CBFS: Found @ offset d1fc0 size 35000
415 17:52:45.473688 Detected 4 core, 8 thread CPU.
416 17:52:45.475948 Setting up SMI for CPU
417 17:52:45.477812 IED base = 0x8ac00000
418 17:52:45.480031 IED size = 0x00400000
419 17:52:45.483357 Will perform SMM setup.
420 17:52:45.488041 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
421 17:52:45.495782 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 17:52:45.500415 Processing 16 relocs. Offset value of 0x00030000
423 17:52:45.503392 Attempting to start 7 APs
424 17:52:45.507471 Waiting for 10ms after sending INIT.
425 17:52:45.522895 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
426 17:52:45.523267 done.
427 17:52:45.525773 AP: slot 5 apic_id 4.
428 17:52:45.528508 AP: slot 6 apic_id 5.
429 17:52:45.530112 AP: slot 1 apic_id 2.
430 17:52:45.532895 AP: slot 3 apic_id 3.
431 17:52:45.535370 AP: slot 4 apic_id 6.
432 17:52:45.537300 AP: slot 7 apic_id 7.
433 17:52:45.541292 Waiting for 2nd SIPI to complete...done.
434 17:52:45.548832 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
435 17:52:45.553805 Processing 13 relocs. Offset value of 0x00038000
436 17:52:45.560708 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
437 17:52:45.564182 Installing SMM handler to 0x8a000000
438 17:52:45.572140 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
439 17:52:45.577471 Processing 867 relocs. Offset value of 0x8a010000
440 17:52:45.586119 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
441 17:52:45.590877 Processing 13 relocs. Offset value of 0x8a008000
442 17:52:45.596024 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
443 17:52:45.601926 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
444 17:52:45.607748 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
445 17:52:45.613430 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
446 17:52:45.618760 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
447 17:52:45.624875 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
448 17:52:45.630939 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
449 17:52:45.637308 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
450 17:52:45.640659 Clearing SMI status registers
451 17:52:45.642282 SMI_STS: PM1
452 17:52:45.645106 PM1_STS: WAK PWRBTN TMROF
453 17:52:45.647133 TCO_STS: BOOT SECOND_TO
454 17:52:45.649299 GPE0 STD STS: eSPI
455 17:52:45.651694 New SMBASE 0x8a000000
456 17:52:45.654918 In relocation handler: CPU 0
457 17:52:45.658761 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
458 17:52:45.663984 Writing SMRR. base = 0x8a000006, mask=0xff000800
459 17:52:45.666168 Relocation complete.
460 17:52:45.667939 New SMBASE 0x89fff800
461 17:52:45.670771 In relocation handler: CPU 2
462 17:52:45.674972 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
463 17:52:45.679877 Writing SMRR. base = 0x8a000006, mask=0xff000800
464 17:52:45.682190 Relocation complete.
465 17:52:45.684782 New SMBASE 0x89fffc00
466 17:52:45.687114 In relocation handler: CPU 1
467 17:52:45.691162 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
468 17:52:45.696397 Writing SMRR. base = 0x8a000006, mask=0xff000800
469 17:52:45.699040 Relocation complete.
470 17:52:45.700736 New SMBASE 0x89fff400
471 17:52:45.703794 In relocation handler: CPU 3
472 17:52:45.707719 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
473 17:52:45.712507 Writing SMRR. base = 0x8a000006, mask=0xff000800
474 17:52:45.714705 Relocation complete.
475 17:52:45.716953 New SMBASE 0x89ffec00
476 17:52:45.720279 In relocation handler: CPU 5
477 17:52:45.723893 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
478 17:52:45.728948 Writing SMRR. base = 0x8a000006, mask=0xff000800
479 17:52:45.730661 Relocation complete.
480 17:52:45.733060 New SMBASE 0x89ffe800
481 17:52:45.736224 In relocation handler: CPU 6
482 17:52:45.740037 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
483 17:52:45.744960 Writing SMRR. base = 0x8a000006, mask=0xff000800
484 17:52:45.747461 Relocation complete.
485 17:52:45.749670 New SMBASE 0x89fff000
486 17:52:45.752393 In relocation handler: CPU 4
487 17:52:45.756442 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
488 17:52:45.761080 Writing SMRR. base = 0x8a000006, mask=0xff000800
489 17:52:45.763680 Relocation complete.
490 17:52:45.765864 New SMBASE 0x89ffe400
491 17:52:45.768927 In relocation handler: CPU 7
492 17:52:45.772703 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
493 17:52:45.777462 Writing SMRR. base = 0x8a000006, mask=0xff000800
494 17:52:45.787646 Relocation complete.
495 17:52:45.787777 Initializing CPU #0
496 17:52:45.787895 CPU: vendor Intel device 806ec
497 17:52:45.789349 CPU: family 06, model 8e, stepping 0c
498 17:52:45.791640 Clearing out pending MCEs
499 17:52:45.796255 Setting up local APIC... apic_id: 0x00 done.
500 17:52:45.799489 Turbo is available but hidden
501 17:52:45.801963 Turbo has been enabled
502 17:52:45.803555 VMX status: enabled
503 17:52:45.807217 IA32_FEATURE_CONTROL status: locked
504 17:52:45.809561 Skip microcode update
505 17:52:45.811492 CPU #0 initialized
506 17:52:45.814092 Initializing CPU #2
507 17:52:45.815636 Initializing CPU #5
508 17:52:45.817705 Initializing CPU #6
509 17:52:45.820849 CPU: vendor Intel device 806ec
510 17:52:45.824951 CPU: family 06, model 8e, stepping 0c
511 17:52:45.827957 CPU: vendor Intel device 806ec
512 17:52:45.831904 CPU: family 06, model 8e, stepping 0c
513 17:52:45.834356 Clearing out pending MCEs
514 17:52:45.836727 Clearing out pending MCEs
515 17:52:45.842833 Setting up local APIC...CPU: vendor Intel device 806ec
516 17:52:45.846238 CPU: family 06, model 8e, stepping 0c
517 17:52:45.848526 Clearing out pending MCEs
518 17:52:45.850748 Initializing CPU #4
519 17:52:45.852454 Initializing CPU #7
520 17:52:45.856217 CPU: vendor Intel device 806ec
521 17:52:45.859451 CPU: family 06, model 8e, stepping 0c
522 17:52:45.862682 CPU: vendor Intel device 806ec
523 17:52:45.866379 CPU: family 06, model 8e, stepping 0c
524 17:52:45.869530 Clearing out pending MCEs
525 17:52:45.871601 Clearing out pending MCEs
526 17:52:45.878714 Setting up local APIC...Setting up local APIC... apic_id: 0x06 done.
527 17:52:45.883101 Setting up local APIC...Initializing CPU #1
528 17:52:45.885368 Initializing CPU #3
529 17:52:45.888208 CPU: vendor Intel device 806ec
530 17:52:45.891747 CPU: family 06, model 8e, stepping 0c
531 17:52:45.895316 CPU: vendor Intel device 806ec
532 17:52:45.898540 CPU: family 06, model 8e, stepping 0c
533 17:52:45.901272 Clearing out pending MCEs
534 17:52:45.904111 Clearing out pending MCEs
535 17:52:45.908870 Setting up local APIC... apic_id: 0x07 done.
536 17:52:45.910752 VMX status: enabled
537 17:52:45.912503 VMX status: enabled
538 17:52:45.916285 IA32_FEATURE_CONTROL status: locked
539 17:52:45.920127 IA32_FEATURE_CONTROL status: locked
540 17:52:45.922051 Skip microcode update
541 17:52:45.924277 Skip microcode update
542 17:52:45.926096 CPU #4 initialized
543 17:52:45.927812 CPU #7 initialized
544 17:52:45.935214 Setting up local APIC...Setting up local APIC... apic_id: 0x03 done.
545 17:52:45.937161 apic_id: 0x02 done.
546 17:52:45.939207 VMX status: enabled
547 17:52:45.941068 VMX status: enabled
548 17:52:45.944520 IA32_FEATURE_CONTROL status: locked
549 17:52:45.948453 IA32_FEATURE_CONTROL status: locked
550 17:52:45.950278 Skip microcode update
551 17:52:45.952985 Skip microcode update
552 17:52:45.954932 CPU #3 initialized
553 17:52:45.956653 CPU #1 initialized
554 17:52:45.958707 apic_id: 0x05 done.
555 17:52:45.960790 apic_id: 0x04 done.
556 17:52:45.962771 VMX status: enabled
557 17:52:45.965053 VMX status: enabled
558 17:52:45.968352 IA32_FEATURE_CONTROL status: locked
559 17:52:45.972729 IA32_FEATURE_CONTROL status: locked
560 17:52:45.974685 Skip microcode update
561 17:52:45.976409 Skip microcode update
562 17:52:45.978724 CPU #6 initialized
563 17:52:45.981008 CPU #5 initialized
564 17:52:45.982705 apic_id: 0x01 done.
565 17:52:45.985404 VMX status: enabled
566 17:52:45.988241 IA32_FEATURE_CONTROL status: locked
567 17:52:45.990582 Skip microcode update
568 17:52:45.992726 CPU #2 initialized
569 17:52:45.996795 bsp_do_flight_plan done after 451 msecs.
570 17:52:46.000034 CPU: frequency set to 4800 MHz
571 17:52:46.001672 Enabling SMIs.
572 17:52:46.003106 Locking SMM.
573 17:52:46.005986 CBFS @ 1d00000 size 300000
574 17:52:46.012309 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
575 17:52:46.015043 CBFS: Locating 'vbt.bin'
576 17:52:46.018745 CBFS: Found @ offset 60a40 size 4a0
577 17:52:46.023740 Found a VBT of 4608 bytes after decompression
578 17:52:46.037170 FMAP: area GBB found @ 1c11000 (978944 bytes)
579 17:52:46.069197 Detected 4 core, 8 thread CPU.
580 17:52:46.072258 Detected 4 core, 8 thread CPU.
581 17:52:46.299180 Display FSP Version Info HOB
582 17:52:46.302286 Reference Code - CPU = 7.0.5e.40
583 17:52:46.304771 uCode Version = 0.0.0.b8
584 17:52:46.307658 Display FSP Version Info HOB
585 17:52:46.310968 Reference Code - ME = 7.0.5e.40
586 17:52:46.313779 MEBx version = 0.0.0.0
587 17:52:46.317017 ME Firmware Version = Consumer SKU
588 17:52:46.319447 Display FSP Version Info HOB
589 17:52:46.323326 Reference Code - CNL PCH = 7.0.5e.40
590 17:52:46.325969 PCH-CRID Status = Disabled
591 17:52:46.329745 CNL PCH H A0 Hsio Version = 2.0.0.0
592 17:52:46.333648 CNL PCH H Ax Hsio Version = 9.0.0.0
593 17:52:46.336935 CNL PCH H Bx Hsio Version = a.0.0.0
594 17:52:46.340515 CNL PCH LP B0 Hsio Version = 7.0.0.0
595 17:52:46.344105 CNL PCH LP Bx Hsio Version = 6.0.0.0
596 17:52:46.348127 CNL PCH LP Dx Hsio Version = 7.0.0.0
597 17:52:46.351091 Display FSP Version Info HOB
598 17:52:46.355475 Reference Code - SA - System Agent = 7.0.5e.40
599 17:52:46.358539 Reference Code - MRC = 0.7.1.68
600 17:52:46.362367 SA - PCIe Version = 7.0.5e.40
601 17:52:46.364346 SA-CRID Status = Disabled
602 17:52:46.367729 SA-CRID Original Value = 0.0.0.c
603 17:52:46.370395 SA-CRID New Value = 0.0.0.c
604 17:52:46.388901 RTC Init
605 17:52:46.392779 Set power off after power failure.
606 17:52:46.394339 Disabling Deep S3
607 17:52:46.396724 Disabling Deep S3
608 17:52:46.398885 Disabling Deep S4
609 17:52:46.399772 Disabling Deep S4
610 17:52:46.401897 Disabling Deep S5
611 17:52:46.403705 Disabling Deep S5
612 17:52:46.411017 BS: BS_DEV_INIT_CHIPS times (us): entry 598865 run 384407 exit 16221
613 17:52:46.412909 Enumerating buses...
614 17:52:46.417007 Show all devs... Before device enumeration.
615 17:52:46.419288 Root Device: enabled 1
616 17:52:46.422047 CPU_CLUSTER: 0: enabled 1
617 17:52:46.424690 DOMAIN: 0000: enabled 1
618 17:52:46.426444 APIC: 00: enabled 1
619 17:52:46.429237 PCI: 00:00.0: enabled 1
620 17:52:46.431217 PCI: 00:02.0: enabled 1
621 17:52:46.434092 PCI: 00:04.0: enabled 1
622 17:52:46.435943 PCI: 00:12.0: enabled 1
623 17:52:46.438676 PCI: 00:12.5: enabled 0
624 17:52:46.441388 PCI: 00:12.6: enabled 0
625 17:52:46.443879 PCI: 00:13.0: enabled 0
626 17:52:46.445916 PCI: 00:14.0: enabled 1
627 17:52:46.448463 PCI: 00:14.1: enabled 0
628 17:52:46.450950 PCI: 00:14.3: enabled 1
629 17:52:46.453240 PCI: 00:14.5: enabled 0
630 17:52:46.455479 PCI: 00:15.0: enabled 1
631 17:52:46.457780 PCI: 00:15.1: enabled 1
632 17:52:46.460827 PCI: 00:15.2: enabled 0
633 17:52:46.463513 PCI: 00:15.3: enabled 0
634 17:52:46.465924 PCI: 00:16.0: enabled 1
635 17:52:46.468393 PCI: 00:16.1: enabled 0
636 17:52:46.470214 PCI: 00:16.2: enabled 0
637 17:52:46.472607 PCI: 00:16.3: enabled 0
638 17:52:46.475471 PCI: 00:16.4: enabled 0
639 17:52:46.477193 PCI: 00:16.5: enabled 0
640 17:52:46.479803 PCI: 00:17.0: enabled 1
641 17:52:46.482292 PCI: 00:19.0: enabled 1
642 17:52:46.484710 PCI: 00:19.1: enabled 0
643 17:52:46.487409 PCI: 00:19.2: enabled 1
644 17:52:46.489898 PCI: 00:1a.0: enabled 0
645 17:52:46.492108 PCI: 00:1c.0: enabled 1
646 17:52:46.494421 PCI: 00:1c.1: enabled 0
647 17:52:46.497534 PCI: 00:1c.2: enabled 0
648 17:52:46.499530 PCI: 00:1c.3: enabled 0
649 17:52:46.501701 PCI: 00:1c.4: enabled 0
650 17:52:46.503975 PCI: 00:1c.5: enabled 0
651 17:52:46.506992 PCI: 00:1c.6: enabled 0
652 17:52:46.509412 PCI: 00:1c.7: enabled 1
653 17:52:46.511696 PCI: 00:1d.0: enabled 1
654 17:52:46.514001 PCI: 00:1d.1: enabled 1
655 17:52:46.516201 PCI: 00:1d.2: enabled 0
656 17:52:46.518925 PCI: 00:1d.3: enabled 0
657 17:52:46.521250 PCI: 00:1d.4: enabled 1
658 17:52:46.524048 PCI: 00:1e.0: enabled 0
659 17:52:46.525963 PCI: 00:1e.1: enabled 0
660 17:52:46.529038 PCI: 00:1e.2: enabled 0
661 17:52:46.530771 PCI: 00:1e.3: enabled 0
662 17:52:46.533335 PCI: 00:1f.0: enabled 1
663 17:52:46.535773 PCI: 00:1f.1: enabled 1
664 17:52:46.538586 PCI: 00:1f.2: enabled 1
665 17:52:46.540415 PCI: 00:1f.3: enabled 1
666 17:52:46.542915 PCI: 00:1f.4: enabled 1
667 17:52:46.545588 PCI: 00:1f.5: enabled 1
668 17:52:46.548027 PCI: 00:1f.6: enabled 1
669 17:52:46.550157 USB0 port 0: enabled 1
670 17:52:46.552825 I2C: 00:10: enabled 1
671 17:52:46.555084 I2C: 00:10: enabled 1
672 17:52:46.556734 I2C: 00:34: enabled 1
673 17:52:46.559645 I2C: 00:2c: enabled 1
674 17:52:46.561297 I2C: 00:50: enabled 1
675 17:52:46.563987 PNP: 0c09.0: enabled 1
676 17:52:46.566489 USB2 port 0: enabled 1
677 17:52:46.568504 USB2 port 1: enabled 1
678 17:52:46.570865 USB2 port 2: enabled 1
679 17:52:46.573168 USB2 port 4: enabled 1
680 17:52:46.575453 USB2 port 5: enabled 1
681 17:52:46.577803 USB2 port 6: enabled 1
682 17:52:46.580416 USB2 port 7: enabled 1
683 17:52:46.582560 USB2 port 8: enabled 1
684 17:52:46.585047 USB2 port 9: enabled 1
685 17:52:46.587508 USB3 port 0: enabled 1
686 17:52:46.589486 USB3 port 1: enabled 1
687 17:52:46.591865 USB3 port 2: enabled 1
688 17:52:46.594160 USB3 port 3: enabled 1
689 17:52:46.596442 USB3 port 4: enabled 1
690 17:52:46.598552 APIC: 02: enabled 1
691 17:52:46.600682 APIC: 01: enabled 1
692 17:52:46.602789 APIC: 03: enabled 1
693 17:52:46.605195 APIC: 06: enabled 1
694 17:52:46.606981 APIC: 04: enabled 1
695 17:52:46.608593 APIC: 05: enabled 1
696 17:52:46.610824 APIC: 07: enabled 1
697 17:52:46.612804 Compare with tree...
698 17:52:46.615586 Root Device: enabled 1
699 17:52:46.617865 CPU_CLUSTER: 0: enabled 1
700 17:52:46.620406 APIC: 00: enabled 1
701 17:52:46.622579 APIC: 02: enabled 1
702 17:52:46.625487 APIC: 01: enabled 1
703 17:52:46.627090 APIC: 03: enabled 1
704 17:52:46.629572 APIC: 06: enabled 1
705 17:52:46.631527 APIC: 04: enabled 1
706 17:52:46.633676 APIC: 05: enabled 1
707 17:52:46.636544 APIC: 07: enabled 1
708 17:52:46.638622 DOMAIN: 0000: enabled 1
709 17:52:46.640789 PCI: 00:00.0: enabled 1
710 17:52:46.643695 PCI: 00:02.0: enabled 1
711 17:52:46.646272 PCI: 00:04.0: enabled 1
712 17:52:46.649135 PCI: 00:12.0: enabled 1
713 17:52:46.651499 PCI: 00:12.5: enabled 0
714 17:52:46.654784 PCI: 00:12.6: enabled 0
715 17:52:46.656685 PCI: 00:13.0: enabled 0
716 17:52:46.659856 PCI: 00:14.0: enabled 1
717 17:52:46.661941 USB0 port 0: enabled 1
718 17:52:46.664991 USB2 port 0: enabled 1
719 17:52:46.667502 USB2 port 1: enabled 1
720 17:52:46.670477 USB2 port 2: enabled 1
721 17:52:46.672834 USB2 port 4: enabled 1
722 17:52:46.676150 USB2 port 5: enabled 1
723 17:52:46.678422 USB2 port 6: enabled 1
724 17:52:46.681457 USB2 port 7: enabled 1
725 17:52:46.683718 USB2 port 8: enabled 1
726 17:52:46.686355 USB2 port 9: enabled 1
727 17:52:46.689266 USB3 port 0: enabled 1
728 17:52:46.692170 USB3 port 1: enabled 1
729 17:52:46.694679 USB3 port 2: enabled 1
730 17:52:46.697319 USB3 port 3: enabled 1
731 17:52:46.699953 USB3 port 4: enabled 1
732 17:52:46.702848 PCI: 00:14.1: enabled 0
733 17:52:46.705412 PCI: 00:14.3: enabled 1
734 17:52:46.708292 PCI: 00:14.5: enabled 0
735 17:52:46.711031 PCI: 00:15.0: enabled 1
736 17:52:46.713366 I2C: 00:10: enabled 1
737 17:52:46.715913 I2C: 00:10: enabled 1
738 17:52:46.718659 I2C: 00:34: enabled 1
739 17:52:46.721336 PCI: 00:15.1: enabled 1
740 17:52:46.723920 I2C: 00:2c: enabled 1
741 17:52:46.726025 PCI: 00:15.2: enabled 0
742 17:52:46.728949 PCI: 00:15.3: enabled 0
743 17:52:46.731447 PCI: 00:16.0: enabled 1
744 17:52:46.734821 PCI: 00:16.1: enabled 0
745 17:52:46.736982 PCI: 00:16.2: enabled 0
746 17:52:46.739322 PCI: 00:16.3: enabled 0
747 17:52:46.741858 PCI: 00:16.4: enabled 0
748 17:52:46.744777 PCI: 00:16.5: enabled 0
749 17:52:46.747352 PCI: 00:17.0: enabled 1
750 17:52:46.749843 PCI: 00:19.0: enabled 1
751 17:52:46.752431 I2C: 00:50: enabled 1
752 17:52:46.754672 PCI: 00:19.1: enabled 0
753 17:52:46.757475 PCI: 00:19.2: enabled 1
754 17:52:46.760016 PCI: 00:1a.0: enabled 0
755 17:52:46.763214 PCI: 00:1c.0: enabled 1
756 17:52:46.765199 PCI: 00:1c.1: enabled 0
757 17:52:46.768166 PCI: 00:1c.2: enabled 0
758 17:52:46.770693 PCI: 00:1c.3: enabled 0
759 17:52:46.773530 PCI: 00:1c.4: enabled 0
760 17:52:46.775708 PCI: 00:1c.5: enabled 0
761 17:52:46.778219 PCI: 00:1c.6: enabled 0
762 17:52:46.780996 PCI: 00:1c.7: enabled 1
763 17:52:46.783627 PCI: 00:1d.0: enabled 1
764 17:52:46.786771 PCI: 00:1d.1: enabled 1
765 17:52:46.789207 PCI: 00:1d.2: enabled 0
766 17:52:46.791801 PCI: 00:1d.3: enabled 0
767 17:52:46.794230 PCI: 00:1d.4: enabled 1
768 17:52:46.796910 PCI: 00:1e.0: enabled 0
769 17:52:46.799881 PCI: 00:1e.1: enabled 0
770 17:52:46.802206 PCI: 00:1e.2: enabled 0
771 17:52:46.804752 PCI: 00:1e.3: enabled 0
772 17:52:46.807480 PCI: 00:1f.0: enabled 1
773 17:52:46.809972 PNP: 0c09.0: enabled 1
774 17:52:46.812414 PCI: 00:1f.1: enabled 1
775 17:52:46.815263 PCI: 00:1f.2: enabled 1
776 17:52:46.817809 PCI: 00:1f.3: enabled 1
777 17:52:46.820273 PCI: 00:1f.4: enabled 1
778 17:52:46.822868 PCI: 00:1f.5: enabled 1
779 17:52:46.826100 PCI: 00:1f.6: enabled 1
780 17:52:46.828412 Root Device scanning...
781 17:52:46.831783 root_dev_scan_bus for Root Device
782 17:52:46.834120 CPU_CLUSTER: 0 enabled
783 17:52:46.836462 DOMAIN: 0000 enabled
784 17:52:46.838807 DOMAIN: 0000 scanning...
785 17:52:46.842161 PCI: pci_scan_bus for bus 00
786 17:52:46.845172 PCI: 00:00.0 [8086/0000] ops
787 17:52:46.848161 PCI: 00:00.0 [8086/3e34] enabled
788 17:52:46.851595 PCI: 00:02.0 [8086/0000] ops
789 17:52:46.854533 PCI: 00:02.0 [8086/3ea0] enabled
790 17:52:46.858242 PCI: 00:04.0 [8086/1903] enabled
791 17:52:46.861196 PCI: 00:08.0 [8086/1911] enabled
792 17:52:46.865277 PCI: 00:12.0 [8086/9df9] enabled
793 17:52:46.868231 PCI: 00:14.0 [8086/0000] bus ops
794 17:52:46.871266 PCI: 00:14.0 [8086/9ded] enabled
795 17:52:46.874712 PCI: 00:14.2 [8086/9def] enabled
796 17:52:46.878726 PCI: 00:14.3 [8086/9df0] enabled
797 17:52:46.881208 PCI: 00:15.0 [8086/0000] bus ops
798 17:52:46.884648 PCI: 00:15.0 [8086/9de8] enabled
799 17:52:46.888040 PCI: 00:15.1 [8086/0000] bus ops
800 17:52:46.891614 PCI: 00:15.1 [8086/9de9] enabled
801 17:52:46.897087 PCI: Static device PCI: 00:16.0 not found, disabling it.
802 17:52:46.900471 PCI: 00:17.0 [8086/0000] ops
803 17:52:46.903385 PCI: 00:17.0 [8086/9dd3] enabled
804 17:52:46.906186 PCI: 00:19.0 [8086/0000] bus ops
805 17:52:46.909694 PCI: 00:19.0 [8086/9dc5] enabled
806 17:52:46.912340 PCI: 00:19.2 [8086/0000] ops
807 17:52:46.916289 PCI: 00:19.2 [8086/9dc7] enabled
808 17:52:46.919068 PCI: 00:1c.0 [8086/0000] bus ops
809 17:52:46.922657 PCI: 00:1c.0 [8086/9dbf] enabled
810 17:52:46.928539 PCI: Static device PCI: 00:1c.7 not found, disabling it.
811 17:52:46.932165 PCI: 00:1d.0 [8086/0000] bus ops
812 17:52:46.935130 PCI: 00:1d.0 [8086/9db4] enabled
813 17:52:46.941032 PCI: Static device PCI: 00:1d.1 not found, disabling it.
814 17:52:46.946807 PCI: Static device PCI: 00:1d.4 not found, disabling it.
815 17:52:46.949598 PCI: 00:1f.0 [8086/0000] bus ops
816 17:52:46.952861 PCI: 00:1f.0 [8086/9d84] enabled
817 17:52:46.958878 PCI: Static device PCI: 00:1f.1 not found, disabling it.
818 17:52:46.964317 PCI: Static device PCI: 00:1f.2 not found, disabling it.
819 17:52:46.967993 PCI: 00:1f.3 [8086/0000] bus ops
820 17:52:46.970936 PCI: 00:1f.3 [8086/9dc8] enabled
821 17:52:46.974740 PCI: 00:1f.4 [8086/0000] bus ops
822 17:52:46.977508 PCI: 00:1f.4 [8086/9da3] enabled
823 17:52:46.980992 PCI: 00:1f.5 [8086/0000] bus ops
824 17:52:46.984025 PCI: 00:1f.5 [8086/9da4] enabled
825 17:52:46.987444 PCI: 00:1f.6 [8086/15be] enabled
826 17:52:46.990391 PCI: Leftover static devices:
827 17:52:46.992187 PCI: 00:12.5
828 17:52:46.993034 PCI: 00:12.6
829 17:52:46.994676 PCI: 00:13.0
830 17:52:46.996285 PCI: 00:14.1
831 17:52:46.997124 PCI: 00:14.5
832 17:52:46.998872 PCI: 00:15.2
833 17:52:46.999842 PCI: 00:15.3
834 17:52:47.001110 PCI: 00:16.0
835 17:52:47.002835 PCI: 00:16.1
836 17:52:47.004037 PCI: 00:16.2
837 17:52:47.005946 PCI: 00:16.3
838 17:52:47.006602 PCI: 00:16.4
839 17:52:47.008251 PCI: 00:16.5
840 17:52:47.009733 PCI: 00:19.1
841 17:52:47.010699 PCI: 00:1a.0
842 17:52:47.012363 PCI: 00:1c.1
843 17:52:47.013616 PCI: 00:1c.2
844 17:52:47.015147 PCI: 00:1c.3
845 17:52:47.016621 PCI: 00:1c.4
846 17:52:47.017647 PCI: 00:1c.5
847 17:52:47.019239 PCI: 00:1c.6
848 17:52:47.020424 PCI: 00:1c.7
849 17:52:47.021665 PCI: 00:1d.1
850 17:52:47.023777 PCI: 00:1d.2
851 17:52:47.024537 PCI: 00:1d.3
852 17:52:47.025770 PCI: 00:1d.4
853 17:52:47.027636 PCI: 00:1e.0
854 17:52:47.028944 PCI: 00:1e.1
855 17:52:47.030409 PCI: 00:1e.2
856 17:52:47.031596 PCI: 00:1e.3
857 17:52:47.032808 PCI: 00:1f.1
858 17:52:47.033981 PCI: 00:1f.2
859 17:52:47.037195 PCI: Check your devicetree.cb.
860 17:52:47.039607 PCI: 00:14.0 scanning...
861 17:52:47.043039 scan_usb_bus for PCI: 00:14.0
862 17:52:47.044890 USB0 port 0 enabled
863 17:52:47.048186 USB0 port 0 scanning...
864 17:52:47.050889 scan_usb_bus for USB0 port 0
865 17:52:47.052831 USB2 port 0 enabled
866 17:52:47.055183 USB2 port 1 enabled
867 17:52:47.057277 USB2 port 2 enabled
868 17:52:47.058680 USB2 port 4 enabled
869 17:52:47.061825 USB2 port 5 enabled
870 17:52:47.063323 USB2 port 6 enabled
871 17:52:47.065129 USB2 port 7 enabled
872 17:52:47.067568 USB2 port 8 enabled
873 17:52:47.069112 USB2 port 9 enabled
874 17:52:47.070836 USB3 port 0 enabled
875 17:52:47.073571 USB3 port 1 enabled
876 17:52:47.075217 USB3 port 2 enabled
877 17:52:47.077056 USB3 port 3 enabled
878 17:52:47.079631 USB3 port 4 enabled
879 17:52:47.082213 USB2 port 0 scanning...
880 17:52:47.084939 scan_usb_bus for USB2 port 0
881 17:52:47.088413 scan_usb_bus for USB2 port 0 done
882 17:52:47.093565 scan_bus: scanning of bus USB2 port 0 took 9060 usecs
883 17:52:47.096022 USB2 port 1 scanning...
884 17:52:47.099208 scan_usb_bus for USB2 port 1
885 17:52:47.102782 scan_usb_bus for USB2 port 1 done
886 17:52:47.107982 scan_bus: scanning of bus USB2 port 1 took 9061 usecs
887 17:52:47.110605 USB2 port 2 scanning...
888 17:52:47.113937 scan_usb_bus for USB2 port 2
889 17:52:47.117417 scan_usb_bus for USB2 port 2 done
890 17:52:47.123014 scan_bus: scanning of bus USB2 port 2 took 9061 usecs
891 17:52:47.124971 USB2 port 4 scanning...
892 17:52:47.128218 scan_usb_bus for USB2 port 4
893 17:52:47.131696 scan_usb_bus for USB2 port 4 done
894 17:52:47.136970 scan_bus: scanning of bus USB2 port 4 took 9061 usecs
895 17:52:47.139423 USB2 port 5 scanning...
896 17:52:47.142771 scan_usb_bus for USB2 port 5
897 17:52:47.146114 scan_usb_bus for USB2 port 5 done
898 17:52:47.151559 scan_bus: scanning of bus USB2 port 5 took 9061 usecs
899 17:52:47.153751 USB2 port 6 scanning...
900 17:52:47.156910 scan_usb_bus for USB2 port 6
901 17:52:47.160418 scan_usb_bus for USB2 port 6 done
902 17:52:47.165525 scan_bus: scanning of bus USB2 port 6 took 9060 usecs
903 17:52:47.168465 USB2 port 7 scanning...
904 17:52:47.171842 scan_usb_bus for USB2 port 7
905 17:52:47.174739 scan_usb_bus for USB2 port 7 done
906 17:52:47.180039 scan_bus: scanning of bus USB2 port 7 took 9060 usecs
907 17:52:47.182603 USB2 port 8 scanning...
908 17:52:47.185995 scan_usb_bus for USB2 port 8
909 17:52:47.189163 scan_usb_bus for USB2 port 8 done
910 17:52:47.195085 scan_bus: scanning of bus USB2 port 8 took 9061 usecs
911 17:52:47.196799 USB2 port 9 scanning...
912 17:52:47.200197 scan_usb_bus for USB2 port 9
913 17:52:47.203746 scan_usb_bus for USB2 port 9 done
914 17:52:47.208630 scan_bus: scanning of bus USB2 port 9 took 9054 usecs
915 17:52:47.211571 USB3 port 0 scanning...
916 17:52:47.214785 scan_usb_bus for USB3 port 0
917 17:52:47.217765 scan_usb_bus for USB3 port 0 done
918 17:52:47.223460 scan_bus: scanning of bus USB3 port 0 took 9061 usecs
919 17:52:47.225849 USB3 port 1 scanning...
920 17:52:47.228702 scan_usb_bus for USB3 port 1
921 17:52:47.232271 scan_usb_bus for USB3 port 1 done
922 17:52:47.238380 scan_bus: scanning of bus USB3 port 1 took 9055 usecs
923 17:52:47.240132 USB3 port 2 scanning...
924 17:52:47.243698 scan_usb_bus for USB3 port 2
925 17:52:47.247531 scan_usb_bus for USB3 port 2 done
926 17:52:47.252223 scan_bus: scanning of bus USB3 port 2 took 9062 usecs
927 17:52:47.254612 USB3 port 3 scanning...
928 17:52:47.258378 scan_usb_bus for USB3 port 3
929 17:52:47.261690 scan_usb_bus for USB3 port 3 done
930 17:52:47.266531 scan_bus: scanning of bus USB3 port 3 took 9060 usecs
931 17:52:47.269154 USB3 port 4 scanning...
932 17:52:47.272714 scan_usb_bus for USB3 port 4
933 17:52:47.276192 scan_usb_bus for USB3 port 4 done
934 17:52:47.281223 scan_bus: scanning of bus USB3 port 4 took 9061 usecs
935 17:52:47.284094 scan_usb_bus for USB0 port 0 done
936 17:52:47.289616 scan_bus: scanning of bus USB0 port 0 took 239295 usecs
937 17:52:47.293318 scan_usb_bus for PCI: 00:14.0 done
938 17:52:47.299355 scan_bus: scanning of bus PCI: 00:14.0 took 256227 usecs
939 17:52:47.302189 PCI: 00:15.0 scanning...
940 17:52:47.305443 scan_generic_bus for PCI: 00:15.0
941 17:52:47.309737 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
942 17:52:47.314037 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
943 17:52:47.317646 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
944 17:52:47.321895 scan_generic_bus for PCI: 00:15.0 done
945 17:52:47.327008 scan_bus: scanning of bus PCI: 00:15.0 took 22382 usecs
946 17:52:47.329494 PCI: 00:15.1 scanning...
947 17:52:47.333410 scan_generic_bus for PCI: 00:15.1
948 17:52:47.337310 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
949 17:52:47.340954 scan_generic_bus for PCI: 00:15.1 done
950 17:52:47.347158 scan_bus: scanning of bus PCI: 00:15.1 took 14211 usecs
951 17:52:47.349021 PCI: 00:19.0 scanning...
952 17:52:47.352813 scan_generic_bus for PCI: 00:19.0
953 17:52:47.356991 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
954 17:52:47.361049 scan_generic_bus for PCI: 00:19.0 done
955 17:52:47.366561 scan_bus: scanning of bus PCI: 00:19.0 took 14213 usecs
956 17:52:47.369072 PCI: 00:1c.0 scanning...
957 17:52:47.372807 do_pci_scan_bridge for PCI: 00:1c.0
958 17:52:47.375687 PCI: pci_scan_bus for bus 01
959 17:52:47.379268 PCI: 01:00.0 [10ec/525a] enabled
960 17:52:47.382070 Capability: type 0x01 @ 0x80
961 17:52:47.385340 Capability: type 0x05 @ 0x90
962 17:52:47.388786 Capability: type 0x10 @ 0xb0
963 17:52:47.391242 Capability: type 0x10 @ 0x40
964 17:52:47.395023 Enabling Common Clock Configuration
965 17:52:47.398880 L1 Sub-State supported from root port 28
966 17:52:47.401956 L1 Sub-State Support = 0xf
967 17:52:47.405184 CommonModeRestoreTime = 0x3c
968 17:52:47.408723 Power On Value = 0x6, Power On Scale = 0x1
969 17:52:47.411941 ASPM: Enabled L0s and L1
970 17:52:47.414523 Capability: type 0x01 @ 0x80
971 17:52:47.417646 Capability: type 0x05 @ 0x90
972 17:52:47.420004 Capability: type 0x10 @ 0xb0
973 17:52:47.425786 scan_bus: scanning of bus PCI: 00:1c.0 took 53657 usecs
974 17:52:47.427901 PCI: 00:1d.0 scanning...
975 17:52:47.432293 do_pci_scan_bridge for PCI: 00:1d.0
976 17:52:47.434820 PCI: pci_scan_bus for bus 02
977 17:52:47.438363 PCI: 02:00.0 [1217/8620] enabled
978 17:52:47.441815 Capability: type 0x01 @ 0x6c
979 17:52:47.444895 Capability: type 0x05 @ 0x48
980 17:52:47.447366 Capability: type 0x10 @ 0x80
981 17:52:47.450709 Capability: type 0x10 @ 0x40
982 17:52:47.454761 L1 Sub-State supported from root port 29
983 17:52:47.457155 L1 Sub-State Support = 0xf
984 17:52:47.460043 CommonModeRestoreTime = 0x78
985 17:52:47.464165 Power On Value = 0x16, Power On Scale = 0x0
986 17:52:47.465961 ASPM: Enabled L1
987 17:52:47.470990 Capability: type 0x01 @ 0x6c
988 17:52:47.475100 Capability: type 0x05 @ 0x48
989 17:52:47.480143 Capability: type 0x10 @ 0x80
990 17:52:47.487161 scan_bus: scanning of bus PCI: 00:1d.0 took 56011 usecs
991 17:52:47.489606 PCI: 00:1f.0 scanning...
992 17:52:47.493203 scan_lpc_bus for PCI: 00:1f.0
993 17:52:47.495099 PNP: 0c09.0 enabled
994 17:52:47.498394 scan_lpc_bus for PCI: 00:1f.0 done
995 17:52:47.503898 scan_bus: scanning of bus PCI: 00:1f.0 took 11385 usecs
996 17:52:47.506529 PCI: 00:1f.3 scanning...
997 17:52:47.512783 scan_bus: scanning of bus PCI: 00:1f.3 took 2839 usecs
998 17:52:47.514968 PCI: 00:1f.4 scanning...
999 17:52:47.518976 scan_generic_bus for PCI: 00:1f.4
1000 17:52:47.522250 scan_generic_bus for PCI: 00:1f.4 done
1001 17:52:47.528085 scan_bus: scanning of bus PCI: 00:1f.4 took 10126 usecs
1002 17:52:47.530714 PCI: 00:1f.5 scanning...
1003 17:52:47.534462 scan_generic_bus for PCI: 00:1f.5
1004 17:52:47.538045 scan_generic_bus for PCI: 00:1f.5 done
1005 17:52:47.544010 scan_bus: scanning of bus PCI: 00:1f.5 took 10119 usecs
1006 17:52:47.549711 scan_bus: scanning of bus DOMAIN: 0000 took 707462 usecs
1007 17:52:47.553401 root_dev_scan_bus for Root Device done
1008 17:52:47.558992 scan_bus: scanning of bus Root Device took 727599 usecs
1009 17:52:47.559841 done
1010 17:52:47.566269 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1011 17:52:47.572026 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1012 17:52:47.579621 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1013 17:52:47.585448 MRC: cache data 'RECOVERY_MRC_CACHE' needs update.
1014 17:52:47.602824 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1015 17:52:47.606019 ELOG: NV offset 0x1bf0000 size 0x4000
1016 17:52:47.614439 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1017 17:52:47.620601 ELOG: Event(17) added with size 13 at 2023-10-09 17:52:27 UTC
1018 17:52:47.626976 ELOG: Event(AA) added with size 11 at 2023-10-09 17:52:27 UTC
1019 17:52:47.632977 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1020 17:52:47.636578 SPI flash protection: WPSW=0 SRP0=0
1021 17:52:47.641166 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1022 17:52:47.647565 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1149308 exit 75708
1023 17:52:47.650561 found VGA at PCI: 00:02.0
1024 17:52:47.653668 Setting up VGA for PCI: 00:02.0
1025 17:52:47.658655 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1026 17:52:47.663514 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1027 17:52:47.665776 Allocating resources...
1028 17:52:47.668218 Reading resources...
1029 17:52:47.671769 Root Device read_resources bus 0 link: 0
1030 17:52:47.676981 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1031 17:52:47.682551 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1032 17:52:47.686262 DOMAIN: 0000 read_resources bus 0 link: 0
1033 17:52:47.692487 PCI: 00:14.0 read_resources bus 0 link: 0
1034 17:52:47.696913 USB0 port 0 read_resources bus 0 link: 0
1035 17:52:47.707000 USB0 port 0 read_resources bus 0 link: 0 done
1036 17:52:47.711155 PCI: 00:14.0 read_resources bus 0 link: 0 done
1037 17:52:47.716640 PCI: 00:15.0 read_resources bus 1 link: 0
1038 17:52:47.722435 PCI: 00:15.0 read_resources bus 1 link: 0 done
1039 17:52:47.727866 PCI: 00:15.1 read_resources bus 2 link: 0
1040 17:52:47.732415 PCI: 00:15.1 read_resources bus 2 link: 0 done
1041 17:52:47.737319 PCI: 00:19.0 read_resources bus 3 link: 0
1042 17:52:47.742477 PCI: 00:19.0 read_resources bus 3 link: 0 done
1043 17:52:47.747150 PCI: 00:1c.0 read_resources bus 1 link: 0
1044 17:52:47.752826 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1045 17:52:47.757450 PCI: 00:1d.0 read_resources bus 2 link: 0
1046 17:52:47.764134 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1047 17:52:47.769225 PCI: 00:1f.0 read_resources bus 0 link: 0
1048 17:52:47.774121 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1049 17:52:47.780435 DOMAIN: 0000 read_resources bus 0 link: 0 done
1050 17:52:47.785791 Root Device read_resources bus 0 link: 0 done
1051 17:52:47.788267 Done reading resources.
1052 17:52:47.793325 Show resources in subtree (Root Device)...After reading.
1053 17:52:47.798255 Root Device child on link 0 CPU_CLUSTER: 0
1054 17:52:47.802551 CPU_CLUSTER: 0 child on link 0 APIC: 00
1055 17:52:47.803846 APIC: 00
1056 17:52:47.805267 APIC: 02
1057 17:52:47.806169 APIC: 01
1058 17:52:47.807231 APIC: 03
1059 17:52:47.809283 APIC: 06
1060 17:52:47.810014 APIC: 04
1061 17:52:47.811198 APIC: 05
1062 17:52:47.812309 APIC: 07
1063 17:52:47.817048 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1064 17:52:47.825759 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1065 17:52:47.835635 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1066 17:52:47.837001 PCI: 00:00.0
1067 17:52:47.847061 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1068 17:52:47.856118 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1069 17:52:47.866172 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1070 17:52:47.875000 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1071 17:52:47.884264 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1072 17:52:47.893941 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1073 17:52:47.902922 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1074 17:52:47.912474 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1075 17:52:47.921290 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1076 17:52:47.931035 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1077 17:52:47.941094 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1078 17:52:47.950672 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1079 17:52:47.959244 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1080 17:52:47.968720 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1081 17:52:47.970391 PCI: 00:02.0
1082 17:52:47.980171 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1083 17:52:47.990925 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1084 17:52:47.998787 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1085 17:52:48.000625 PCI: 00:04.0
1086 17:52:48.010926 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1087 17:52:48.011939 PCI: 00:08.0
1088 17:52:48.021926 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1089 17:52:48.023656 PCI: 00:12.0
1090 17:52:48.034115 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1091 17:52:48.038011 PCI: 00:14.0 child on link 0 USB0 port 0
1092 17:52:48.048292 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1093 17:52:48.052110 USB0 port 0 child on link 0 USB2 port 0
1094 17:52:48.053966 USB2 port 0
1095 17:52:48.056157 USB2 port 1
1096 17:52:48.058185 USB2 port 2
1097 17:52:48.059789 USB2 port 4
1098 17:52:48.061120 USB2 port 5
1099 17:52:48.063035 USB2 port 6
1100 17:52:48.064817 USB2 port 7
1101 17:52:48.066641 USB2 port 8
1102 17:52:48.068397 USB2 port 9
1103 17:52:48.070051 USB3 port 0
1104 17:52:48.071639 USB3 port 1
1105 17:52:48.073296 USB3 port 2
1106 17:52:48.075429 USB3 port 3
1107 17:52:48.077203 USB3 port 4
1108 17:52:48.078379 PCI: 00:14.2
1109 17:52:48.088662 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1110 17:52:48.098412 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1111 17:52:48.100471 PCI: 00:14.3
1112 17:52:48.109985 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1113 17:52:48.114399 PCI: 00:15.0 child on link 0 I2C: 01:10
1114 17:52:48.124168 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1115 17:52:48.125509 I2C: 01:10
1116 17:52:48.127759 I2C: 01:10
1117 17:52:48.128734 I2C: 01:34
1118 17:52:48.132825 PCI: 00:15.1 child on link 0 I2C: 02:2c
1119 17:52:48.143016 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1120 17:52:48.144925 I2C: 02:2c
1121 17:52:48.146212 PCI: 00:17.0
1122 17:52:48.155373 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1123 17:52:48.164137 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1124 17:52:48.172628 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1125 17:52:48.180773 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1126 17:52:48.189235 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1127 17:52:48.197863 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1128 17:52:48.202850 PCI: 00:19.0 child on link 0 I2C: 03:50
1129 17:52:48.212292 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 17:52:48.222385 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1131 17:52:48.223992 I2C: 03:50
1132 17:52:48.225662 PCI: 00:19.2
1133 17:52:48.236677 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1134 17:52:48.246899 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1135 17:52:48.250980 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1136 17:52:48.259927 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1137 17:52:48.269297 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1138 17:52:48.278543 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1139 17:52:48.280034 PCI: 01:00.0
1140 17:52:48.289165 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1141 17:52:48.293802 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1142 17:52:48.302571 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1143 17:52:48.312275 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1144 17:52:48.321193 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1145 17:52:48.323242 PCI: 02:00.0
1146 17:52:48.332817 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1147 17:52:48.341877 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1148 17:52:48.345938 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1149 17:52:48.354343 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1150 17:52:48.363345 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1151 17:52:48.364968 PNP: 0c09.0
1152 17:52:48.373632 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1153 17:52:48.382043 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1154 17:52:48.390922 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1155 17:52:48.392742 PCI: 00:1f.3
1156 17:52:48.402906 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1157 17:52:48.412642 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1158 17:52:48.414150 PCI: 00:1f.4
1159 17:52:48.423396 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1160 17:52:48.432940 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1161 17:52:48.435070 PCI: 00:1f.5
1162 17:52:48.444243 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1163 17:52:48.445440 PCI: 00:1f.6
1164 17:52:48.454557 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1165 17:52:48.461019 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1166 17:52:48.467583 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1167 17:52:48.474201 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1168 17:52:48.480693 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1169 17:52:48.487297 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1170 17:52:48.491152 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1171 17:52:48.494541 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1172 17:52:48.498456 PCI: 00:17.0 18 * [0x60 - 0x67] io
1173 17:52:48.501635 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1174 17:52:48.508485 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1175 17:52:48.514723 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1176 17:52:48.523249 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1177 17:52:48.531526 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1178 17:52:48.538380 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1179 17:52:48.542109 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1180 17:52:48.549948 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1181 17:52:48.557890 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1182 17:52:48.566852 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1183 17:52:48.573164 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1184 17:52:48.577093 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1185 17:52:48.581250 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1186 17:52:48.588814 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1187 17:52:48.593455 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1188 17:52:48.598381 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1189 17:52:48.603793 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1190 17:52:48.608034 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1191 17:52:48.612669 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1192 17:52:48.617613 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1193 17:52:48.622296 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1194 17:52:48.627516 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1195 17:52:48.632966 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1196 17:52:48.636930 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1197 17:52:48.642885 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1198 17:52:48.646843 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1199 17:52:48.651535 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1200 17:52:48.656612 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1201 17:52:48.661647 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1202 17:52:48.666419 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1203 17:52:48.670885 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1204 17:52:48.675928 PCI: 00:19.0 10 * [0x11349000 - 0x11349fff] mem
1205 17:52:48.681291 PCI: 00:19.0 18 * [0x1134a000 - 0x1134afff] mem
1206 17:52:48.686012 PCI: 00:19.2 18 * [0x1134b000 - 0x1134bfff] mem
1207 17:52:48.690609 PCI: 00:1f.5 10 * [0x1134c000 - 0x1134cfff] mem
1208 17:52:48.695663 PCI: 00:17.0 24 * [0x1134d000 - 0x1134d7ff] mem
1209 17:52:48.700435 PCI: 00:17.0 14 * [0x1134e000 - 0x1134e0ff] mem
1210 17:52:48.705659 PCI: 00:1f.4 10 * [0x1134f000 - 0x1134f0ff] mem
1211 17:52:48.713954 DOMAIN: 0000 mem: base: 1134f100 size: 1134f100 align: 28 gran: 0 limit: ffffffff done
1212 17:52:48.717366 avoid_fixed_resources: DOMAIN: 0000
1213 17:52:48.723600 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 17:52:48.729291 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 17:52:48.736974 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 17:52:48.745070 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1217 17:52:48.752097 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1218 17:52:48.760375 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1219 17:52:48.767733 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1220 17:52:48.775633 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 17:52:48.782969 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 17:52:48.790603 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 17:52:48.797525 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 17:52:48.804766 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 17:52:48.807037 Setting resources...
1226 17:52:48.813519 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 17:52:48.818150 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 17:52:48.821011 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 17:52:48.825488 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 17:52:48.829244 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 17:52:48.835629 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 17:52:48.842000 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 17:52:48.848720 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 17:52:48.854099 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1235 17:52:48.860566 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1236 17:52:48.868484 DOMAIN: 0000 mem: base:c0000000 size:1134f100 align:28 gran:0 limit:dfffffff
1237 17:52:48.873924 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1238 17:52:48.878049 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1239 17:52:48.883938 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1240 17:52:48.888148 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1241 17:52:48.892958 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1242 17:52:48.897576 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1243 17:52:48.902714 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1244 17:52:48.907164 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1245 17:52:48.912865 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1246 17:52:48.917420 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1247 17:52:48.922365 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1248 17:52:48.926704 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1249 17:52:48.931970 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1250 17:52:48.936977 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1251 17:52:48.941620 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1252 17:52:48.946450 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1253 17:52:48.951756 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1254 17:52:48.956289 PCI: 00:19.0 10 * [0xd1349000 - 0xd1349fff] mem
1255 17:52:48.961034 PCI: 00:19.0 18 * [0xd134a000 - 0xd134afff] mem
1256 17:52:48.965987 PCI: 00:19.2 18 * [0xd134b000 - 0xd134bfff] mem
1257 17:52:48.970628 PCI: 00:1f.5 10 * [0xd134c000 - 0xd134cfff] mem
1258 17:52:48.975567 PCI: 00:17.0 24 * [0xd134d000 - 0xd134d7ff] mem
1259 17:52:48.980179 PCI: 00:17.0 14 * [0xd134e000 - 0xd134e0ff] mem
1260 17:52:48.985170 PCI: 00:1f.4 10 * [0xd134f000 - 0xd134f0ff] mem
1261 17:52:48.993452 DOMAIN: 0000 mem: next_base: d134f100 size: 1134f100 align: 28 gran: 0 done
1262 17:52:48.999972 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1263 17:52:49.007518 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1264 17:52:49.014545 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1265 17:52:49.019438 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1266 17:52:49.026846 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1267 17:52:49.034407 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1268 17:52:49.041494 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1269 17:52:49.049512 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1270 17:52:49.054781 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1271 17:52:49.058969 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1272 17:52:49.066215 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1273 17:52:49.070691 Root Device assign_resources, bus 0 link: 0
1274 17:52:49.075620 DOMAIN: 0000 assign_resources, bus 0 link: 0
1275 17:52:49.084567 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1276 17:52:49.092678 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1277 17:52:49.100233 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1278 17:52:49.108791 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1279 17:52:49.117084 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1280 17:52:49.125066 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1281 17:52:49.132848 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1282 17:52:49.137397 PCI: 00:14.0 assign_resources, bus 0 link: 0
1283 17:52:49.142586 PCI: 00:14.0 assign_resources, bus 0 link: 0
1284 17:52:49.150513 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1285 17:52:49.158484 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1286 17:52:49.167371 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1287 17:52:49.175124 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1288 17:52:49.179535 PCI: 00:15.0 assign_resources, bus 1 link: 0
1289 17:52:49.184194 PCI: 00:15.0 assign_resources, bus 1 link: 0
1290 17:52:49.193316 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1291 17:52:49.197199 PCI: 00:15.1 assign_resources, bus 2 link: 0
1292 17:52:49.201890 PCI: 00:15.1 assign_resources, bus 2 link: 0
1293 17:52:49.209856 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1294 17:52:49.218019 PCI: 00:17.0 14 <- [0x00d134e000 - 0x00d134e0ff] size 0x00000100 gran 0x08 mem
1295 17:52:49.225644 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1296 17:52:49.233043 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1297 17:52:49.241300 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1298 17:52:49.248445 PCI: 00:17.0 24 <- [0x00d134d000 - 0x00d134d7ff] size 0x00000800 gran 0x0b mem
1299 17:52:49.257127 PCI: 00:19.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1300 17:52:49.265002 PCI: 00:19.0 18 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1301 17:52:49.269250 PCI: 00:19.0 assign_resources, bus 3 link: 0
1302 17:52:49.274486 PCI: 00:19.0 assign_resources, bus 3 link: 0
1303 17:52:49.282726 PCI: 00:19.2 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1304 17:52:49.291468 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1305 17:52:49.299680 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1306 17:52:49.308492 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1307 17:52:49.313372 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1308 17:52:49.321259 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1309 17:52:49.326183 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1310 17:52:49.334423 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1311 17:52:49.343595 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1312 17:52:49.352037 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1313 17:52:49.356173 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1314 17:52:49.365934 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1315 17:52:49.375219 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1316 17:52:49.382149 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1317 17:52:49.386516 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1318 17:52:49.392008 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1319 17:52:49.396031 LPC: Trying to open IO window from 930 size 8
1320 17:52:49.400811 LPC: Trying to open IO window from 940 size 8
1321 17:52:49.405668 LPC: Trying to open IO window from 950 size 10
1322 17:52:49.413695 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1323 17:52:49.421884 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1324 17:52:49.430611 PCI: 00:1f.4 10 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem64
1325 17:52:49.438029 PCI: 00:1f.5 10 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem
1326 17:52:49.446213 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1327 17:52:49.450800 DOMAIN: 0000 assign_resources, bus 0 link: 0
1328 17:52:49.455852 Root Device assign_resources, bus 0 link: 0
1329 17:52:49.458092 Done setting resources.
1330 17:52:49.464852 Show resources in subtree (Root Device)...After assigning values.
1331 17:52:49.468865 Root Device child on link 0 CPU_CLUSTER: 0
1332 17:52:49.472947 CPU_CLUSTER: 0 child on link 0 APIC: 00
1333 17:52:49.474595 APIC: 00
1334 17:52:49.475752 APIC: 02
1335 17:52:49.477395 APIC: 01
1336 17:52:49.478070 APIC: 03
1337 17:52:49.479957 APIC: 06
1338 17:52:49.481163 APIC: 04
1339 17:52:49.481702 APIC: 05
1340 17:52:49.483337 APIC: 07
1341 17:52:49.487717 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1342 17:52:49.497184 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1343 17:52:49.508355 DOMAIN: 0000 resource base c0000000 size 1134f100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1344 17:52:49.510157 PCI: 00:00.0
1345 17:52:49.519789 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1346 17:52:49.529096 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1347 17:52:49.538472 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1348 17:52:49.548460 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1349 17:52:49.557578 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1350 17:52:49.566411 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1351 17:52:49.575698 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1352 17:52:49.584502 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1353 17:52:49.594009 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1354 17:52:49.603419 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1355 17:52:49.613109 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1356 17:52:49.623270 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1357 17:52:49.632641 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1358 17:52:49.641116 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1359 17:52:49.643482 PCI: 00:02.0
1360 17:52:49.653290 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1361 17:52:49.664590 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1362 17:52:49.673439 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1363 17:52:49.675304 PCI: 00:04.0
1364 17:52:49.685441 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1365 17:52:49.686816 PCI: 00:08.0
1366 17:52:49.697069 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1367 17:52:49.698708 PCI: 00:12.0
1368 17:52:49.709130 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1369 17:52:49.713939 PCI: 00:14.0 child on link 0 USB0 port 0
1370 17:52:49.723756 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1371 17:52:49.728476 USB0 port 0 child on link 0 USB2 port 0
1372 17:52:49.730013 USB2 port 0
1373 17:52:49.731829 USB2 port 1
1374 17:52:49.733544 USB2 port 2
1375 17:52:49.736050 USB2 port 4
1376 17:52:49.737165 USB2 port 5
1377 17:52:49.738960 USB2 port 6
1378 17:52:49.740716 USB2 port 7
1379 17:52:49.742438 USB2 port 8
1380 17:52:49.744512 USB2 port 9
1381 17:52:49.745762 USB3 port 0
1382 17:52:49.747569 USB3 port 1
1383 17:52:49.749260 USB3 port 2
1384 17:52:49.750921 USB3 port 3
1385 17:52:49.752618 USB3 port 4
1386 17:52:49.754403 PCI: 00:14.2
1387 17:52:49.764831 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1388 17:52:49.775240 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1389 17:52:49.777081 PCI: 00:14.3
1390 17:52:49.787099 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1391 17:52:49.791144 PCI: 00:15.0 child on link 0 I2C: 01:10
1392 17:52:49.801633 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1393 17:52:49.803236 I2C: 01:10
1394 17:52:49.804650 I2C: 01:10
1395 17:52:49.806456 I2C: 01:34
1396 17:52:49.810929 PCI: 00:15.1 child on link 0 I2C: 02:2c
1397 17:52:49.821199 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1398 17:52:49.822860 I2C: 02:2c
1399 17:52:49.824862 PCI: 00:17.0
1400 17:52:49.834750 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1401 17:52:49.844764 PCI: 00:17.0 resource base d134e000 size 100 align 12 gran 8 limit d134e0ff flags 60000200 index 14
1402 17:52:49.853784 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1403 17:52:49.862864 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1404 17:52:49.871889 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1405 17:52:49.881906 PCI: 00:17.0 resource base d134d000 size 800 align 12 gran 11 limit d134d7ff flags 60000200 index 24
1406 17:52:49.886080 PCI: 00:19.0 child on link 0 I2C: 03:50
1407 17:52:49.896690 PCI: 00:19.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1408 17:52:49.906528 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 18
1409 17:52:49.908117 I2C: 03:50
1410 17:52:49.909890 PCI: 00:19.2
1411 17:52:49.921090 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1412 17:52:49.931151 PCI: 00:19.2 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1413 17:52:49.935872 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1414 17:52:49.945392 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1415 17:52:49.955144 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1416 17:52:49.965890 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1417 17:52:49.967148 PCI: 01:00.0
1418 17:52:49.977803 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1419 17:52:49.982643 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1420 17:52:49.991093 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1421 17:52:50.001275 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1422 17:52:50.011984 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1423 17:52:50.013671 PCI: 02:00.0
1424 17:52:50.024167 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1425 17:52:50.034131 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1426 17:52:50.038995 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1427 17:52:50.047269 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1428 17:52:50.056286 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1429 17:52:50.058500 PNP: 0c09.0
1430 17:52:50.066832 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1431 17:52:50.075118 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1432 17:52:50.083583 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1433 17:52:50.085346 PCI: 00:1f.3
1434 17:52:50.095711 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1435 17:52:50.106100 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1436 17:52:50.108438 PCI: 00:1f.4
1437 17:52:50.116747 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1438 17:52:50.127094 PCI: 00:1f.4 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000201 index 10
1439 17:52:50.128939 PCI: 00:1f.5
1440 17:52:50.139180 PCI: 00:1f.5 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000200 index 10
1441 17:52:50.140840 PCI: 00:1f.6
1442 17:52:50.151243 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1443 17:52:50.153701 Done allocating resources.
1444 17:52:50.159781 BS: BS_DEV_RESOURCES times (us): entry 0 run 2506141 exit 15
1445 17:52:50.162245 Enabling resources...
1446 17:52:50.166829 PCI: 00:00.0 subsystem <- 1028/3e34
1447 17:52:50.169174 PCI: 00:00.0 cmd <- 06
1448 17:52:50.173125 PCI: 00:02.0 subsystem <- 1028/3ea0
1449 17:52:50.175408 PCI: 00:02.0 cmd <- 03
1450 17:52:50.179917 PCI: 00:04.0 subsystem <- 1028/1903
1451 17:52:50.181515 PCI: 00:04.0 cmd <- 02
1452 17:52:50.184436 PCI: 00:08.0 cmd <- 06
1453 17:52:50.188416 PCI: 00:12.0 subsystem <- 1028/9df9
1454 17:52:50.191263 PCI: 00:12.0 cmd <- 02
1455 17:52:50.194998 PCI: 00:14.0 subsystem <- 1028/9ded
1456 17:52:50.196863 PCI: 00:14.0 cmd <- 02
1457 17:52:50.199800 PCI: 00:14.2 cmd <- 02
1458 17:52:50.203854 PCI: 00:14.3 subsystem <- 1028/9df0
1459 17:52:50.206038 PCI: 00:14.3 cmd <- 02
1460 17:52:50.209615 PCI: 00:15.0 subsystem <- 1028/9de8
1461 17:52:50.211899 PCI: 00:15.0 cmd <- 02
1462 17:52:50.216481 PCI: 00:15.1 subsystem <- 1028/9de9
1463 17:52:50.218298 PCI: 00:15.1 cmd <- 02
1464 17:52:50.222457 PCI: 00:17.0 subsystem <- 1028/9dd3
1465 17:52:50.224611 PCI: 00:17.0 cmd <- 03
1466 17:52:50.228881 PCI: 00:19.0 subsystem <- 1028/9dc5
1467 17:52:50.230825 PCI: 00:19.0 cmd <- 06
1468 17:52:50.234834 PCI: 00:19.2 subsystem <- 1028/9dc7
1469 17:52:50.237151 PCI: 00:19.2 cmd <- 06
1470 17:52:50.241483 PCI: 00:1c.0 bridge ctrl <- 0003
1471 17:52:50.244420 PCI: 00:1c.0 subsystem <- 1028/9dbf
1472 17:52:50.247062 Capability: type 0x10 @ 0x40
1473 17:52:50.250116 Capability: type 0x05 @ 0x80
1474 17:52:50.253074 Capability: type 0x0d @ 0x90
1475 17:52:50.255887 PCI: 00:1c.0 cmd <- 06
1476 17:52:50.258957 PCI: 00:1d.0 bridge ctrl <- 0003
1477 17:52:50.263026 PCI: 00:1d.0 subsystem <- 1028/9db4
1478 17:52:50.265543 Capability: type 0x10 @ 0x40
1479 17:52:50.268858 Capability: type 0x05 @ 0x80
1480 17:52:50.271240 Capability: type 0x0d @ 0x90
1481 17:52:50.273781 PCI: 00:1d.0 cmd <- 06
1482 17:52:50.277771 PCI: 00:1f.0 subsystem <- 1028/9d84
1483 17:52:50.280097 PCI: 00:1f.0 cmd <- 407
1484 17:52:50.284093 PCI: 00:1f.3 subsystem <- 1028/9dc8
1485 17:52:50.286570 PCI: 00:1f.3 cmd <- 02
1486 17:52:50.291069 PCI: 00:1f.4 subsystem <- 1028/9da3
1487 17:52:50.292850 PCI: 00:1f.4 cmd <- 03
1488 17:52:50.296727 PCI: 00:1f.5 subsystem <- 1028/9da4
1489 17:52:50.299444 PCI: 00:1f.5 cmd <- 406
1490 17:52:50.302881 PCI: 00:1f.6 subsystem <- 1028/15be
1491 17:52:50.305060 PCI: 00:1f.6 cmd <- 02
1492 17:52:50.315786 PCI: 01:00.0 cmd <- 02
1493 17:52:50.320202 PCI: 02:00.0 cmd <- 06
1494 17:52:50.324539 done.
1495 17:52:50.330216 BS: BS_DEV_ENABLE times (us): entry 398 run 164222 exit 0
1496 17:52:50.332830 Initializing devices...
1497 17:52:50.334839 Root Device init ...
1498 17:52:50.338709 Root Device init finished in 2139 usecs
1499 17:52:50.341466 CPU_CLUSTER: 0 init ...
1500 17:52:50.346801 CPU_CLUSTER: 0 init finished in 2431 usecs
1501 17:52:50.352891 PCI: 00:00.0 init ...
1502 17:52:50.355181 CPU TDP: 15 Watts
1503 17:52:50.357115 CPU PL2 = 51 Watts
1504 17:52:50.361867 PCI: 00:00.0 init finished in 7040 usecs
1505 17:52:50.364430 PCI: 00:02.0 init ...
1506 17:52:50.368390 PCI: 00:02.0 init finished in 2237 usecs
1507 17:52:50.370934 PCI: 00:04.0 init ...
1508 17:52:50.375288 PCI: 00:04.0 init finished in 2237 usecs
1509 17:52:50.377576 PCI: 00:08.0 init ...
1510 17:52:50.382106 PCI: 00:08.0 init finished in 2237 usecs
1511 17:52:50.384037 PCI: 00:12.0 init ...
1512 17:52:50.388375 PCI: 00:12.0 init finished in 2236 usecs
1513 17:52:50.390930 PCI: 00:14.0 init ...
1514 17:52:50.395132 PCI: 00:14.0 init finished in 2236 usecs
1515 17:52:50.398111 PCI: 00:14.2 init ...
1516 17:52:50.402532 PCI: 00:14.2 init finished in 2236 usecs
1517 17:52:50.404548 PCI: 00:14.3 init ...
1518 17:52:50.408175 PCI: 00:14.3 init finished in 2242 usecs
1519 17:52:50.410489 PCI: 00:15.0 init ...
1520 17:52:50.414518 DW I2C bus 0 at 0xd1347000 (400 KHz)
1521 17:52:50.418797 PCI: 00:15.0 init finished in 5936 usecs
1522 17:52:50.421047 PCI: 00:15.1 init ...
1523 17:52:50.424931 DW I2C bus 1 at 0xd1348000 (400 KHz)
1524 17:52:50.429051 PCI: 00:15.1 init finished in 5936 usecs
1525 17:52:50.432247 PCI: 00:19.0 init ...
1526 17:52:50.435815 DW I2C bus 4 at 0xd1349000 (400 KHz)
1527 17:52:50.439724 PCI: 00:19.0 init finished in 5925 usecs
1528 17:52:50.442845 PCI: 00:1c.0 init ...
1529 17:52:50.445715 Initializing PCH PCIe bridge.
1530 17:52:50.450293 PCI: 00:1c.0 init finished in 5250 usecs
1531 17:52:50.453035 PCI: 00:1d.0 init ...
1532 17:52:50.456083 Initializing PCH PCIe bridge.
1533 17:52:50.459436 PCI: 00:1d.0 init finished in 5250 usecs
1534 17:52:50.463092 PCI: 00:1f.0 init ...
1535 17:52:50.466619 IOAPIC: Initializing IOAPIC at 0xfec00000
1536 17:52:50.470928 IOAPIC: Bootstrap Processor Local APIC = 0x00
1537 17:52:50.472952 IOAPIC: ID = 0x02
1538 17:52:50.475603 IOAPIC: Dumping registers
1539 17:52:50.478138 reg 0x0000: 0x02000000
1540 17:52:50.480791 reg 0x0001: 0x00770020
1541 17:52:50.483543 reg 0x0002: 0x00000000
1542 17:52:50.489312 PCI: 00:1f.0 init finished in 25029 usecs
1543 17:52:50.491971 PCI: 00:1f.3 init ...
1544 17:52:50.497256 HDA: codec_mask = 05
1545 17:52:50.500144 HDA: Initializing codec #2
1546 17:52:50.502345 HDA: codec viddid: 8086280b
1547 17:52:50.505584 HDA: No verb table entry found
1548 17:52:50.508867 HDA: Initializing codec #0
1549 17:52:50.511123 HDA: codec viddid: 10ec0236
1550 17:52:50.517989 HDA: verb loaded.
1551 17:52:50.522698 PCI: 00:1f.3 init finished in 28836 usecs
1552 17:52:50.526088 PCI: 00:1f.4 init ...
1553 17:52:50.529486 PCI: 00:1f.4 init finished in 2246 usecs
1554 17:52:50.532369 PCI: 00:1f.6 init ...
1555 17:52:50.536387 PCI: 00:1f.6 init finished in 2236 usecs
1556 17:52:50.547193 PCI: 01:00.0 init ...
1557 17:52:50.551396 PCI: 01:00.0 init finished in 2237 usecs
1558 17:52:50.553788 PCI: 02:00.0 init ...
1559 17:52:50.558097 PCI: 02:00.0 init finished in 2237 usecs
1560 17:52:50.560532 PNP: 0c09.0 init ...
1561 17:52:50.564422 EC Label : 00.00.20
1562 17:52:50.568624 EC Revision : 9ca674bba
1563 17:52:50.571934 EC Model Num : 08B9
1564 17:52:50.575441 EC Build Date : 05/10/19
1565 17:52:50.584293 PNP: 0c09.0 init finished in 21724 usecs
1566 17:52:50.586520 Devices initialized
1567 17:52:50.589973 Show all devs... After init.
1568 17:52:50.591937 Root Device: enabled 1
1569 17:52:50.595586 CPU_CLUSTER: 0: enabled 1
1570 17:52:50.596879 DOMAIN: 0000: enabled 1
1571 17:52:50.599057 APIC: 00: enabled 1
1572 17:52:50.601408 PCI: 00:00.0: enabled 1
1573 17:52:50.603955 PCI: 00:02.0: enabled 1
1574 17:52:50.606112 PCI: 00:04.0: enabled 1
1575 17:52:50.608639 PCI: 00:12.0: enabled 1
1576 17:52:50.610914 PCI: 00:12.5: enabled 0
1577 17:52:50.613540 PCI: 00:12.6: enabled 0
1578 17:52:50.615990 PCI: 00:13.0: enabled 0
1579 17:52:50.618413 PCI: 00:14.0: enabled 1
1580 17:52:50.621141 PCI: 00:14.1: enabled 0
1581 17:52:50.623145 PCI: 00:14.3: enabled 1
1582 17:52:50.625544 PCI: 00:14.5: enabled 0
1583 17:52:50.627805 PCI: 00:15.0: enabled 1
1584 17:52:50.630736 PCI: 00:15.1: enabled 1
1585 17:52:50.633100 PCI: 00:15.2: enabled 0
1586 17:52:50.635299 PCI: 00:15.3: enabled 0
1587 17:52:50.637649 PCI: 00:16.0: enabled 0
1588 17:52:50.640499 PCI: 00:16.1: enabled 0
1589 17:52:50.642644 PCI: 00:16.2: enabled 0
1590 17:52:50.645386 PCI: 00:16.3: enabled 0
1591 17:52:50.647719 PCI: 00:16.4: enabled 0
1592 17:52:50.650557 PCI: 00:16.5: enabled 0
1593 17:52:50.652866 PCI: 00:17.0: enabled 1
1594 17:52:50.654730 PCI: 00:19.0: enabled 1
1595 17:52:50.657636 PCI: 00:19.1: enabled 0
1596 17:52:50.659790 PCI: 00:19.2: enabled 1
1597 17:52:50.662174 PCI: 00:1a.0: enabled 0
1598 17:52:50.664815 PCI: 00:1c.0: enabled 1
1599 17:52:50.667134 PCI: 00:1c.1: enabled 0
1600 17:52:50.669472 PCI: 00:1c.2: enabled 0
1601 17:52:50.671754 PCI: 00:1c.3: enabled 0
1602 17:52:50.674190 PCI: 00:1c.4: enabled 0
1603 17:52:50.676453 PCI: 00:1c.5: enabled 0
1604 17:52:50.679305 PCI: 00:1c.6: enabled 0
1605 17:52:50.682073 PCI: 00:1c.7: enabled 0
1606 17:52:50.683898 PCI: 00:1d.0: enabled 1
1607 17:52:50.686459 PCI: 00:1d.1: enabled 0
1608 17:52:50.688902 PCI: 00:1d.2: enabled 0
1609 17:52:50.691225 PCI: 00:1d.3: enabled 0
1610 17:52:50.694036 PCI: 00:1d.4: enabled 0
1611 17:52:50.696303 PCI: 00:1e.0: enabled 0
1612 17:52:50.698888 PCI: 00:1e.1: enabled 0
1613 17:52:50.700857 PCI: 00:1e.2: enabled 0
1614 17:52:50.703671 PCI: 00:1e.3: enabled 0
1615 17:52:50.705638 PCI: 00:1f.0: enabled 1
1616 17:52:50.708896 PCI: 00:1f.1: enabled 0
1617 17:52:50.710516 PCI: 00:1f.2: enabled 0
1618 17:52:50.713287 PCI: 00:1f.3: enabled 1
1619 17:52:50.715686 PCI: 00:1f.4: enabled 1
1620 17:52:50.718021 PCI: 00:1f.5: enabled 1
1621 17:52:50.721237 PCI: 00:1f.6: enabled 1
1622 17:52:50.723113 USB0 port 0: enabled 1
1623 17:52:50.725055 I2C: 01:10: enabled 1
1624 17:52:50.727564 I2C: 01:10: enabled 1
1625 17:52:50.729510 I2C: 01:34: enabled 1
1626 17:52:50.731899 I2C: 02:2c: enabled 1
1627 17:52:50.734165 I2C: 03:50: enabled 1
1628 17:52:50.736319 PNP: 0c09.0: enabled 1
1629 17:52:50.738613 USB2 port 0: enabled 1
1630 17:52:50.741331 USB2 port 1: enabled 1
1631 17:52:50.743047 USB2 port 2: enabled 1
1632 17:52:50.745557 USB2 port 4: enabled 1
1633 17:52:50.747753 USB2 port 5: enabled 1
1634 17:52:50.750285 USB2 port 6: enabled 1
1635 17:52:50.752582 USB2 port 7: enabled 1
1636 17:52:50.755161 USB2 port 8: enabled 1
1637 17:52:50.757401 USB2 port 9: enabled 1
1638 17:52:50.759824 USB3 port 0: enabled 1
1639 17:52:50.761980 USB3 port 1: enabled 1
1640 17:52:50.764193 USB3 port 2: enabled 1
1641 17:52:50.766951 USB3 port 3: enabled 1
1642 17:52:50.769128 USB3 port 4: enabled 1
1643 17:52:50.770993 APIC: 02: enabled 1
1644 17:52:50.773618 APIC: 01: enabled 1
1645 17:52:50.775889 APIC: 03: enabled 1
1646 17:52:50.777337 APIC: 06: enabled 1
1647 17:52:50.779385 APIC: 04: enabled 1
1648 17:52:50.781257 APIC: 05: enabled 1
1649 17:52:50.783202 APIC: 07: enabled 1
1650 17:52:50.786177 PCI: 00:08.0: enabled 1
1651 17:52:50.788395 PCI: 00:14.2: enabled 1
1652 17:52:50.790667 PCI: 01:00.0: enabled 1
1653 17:52:50.793008 PCI: 02:00.0: enabled 1
1654 17:52:50.798253 Disabling ACPI via APMC:
1655 17:52:50.800039 done.
1656 17:52:50.806270 ELOG: Event(92) added with size 9 at 2023-10-09 17:52:30 UTC
1657 17:52:50.812420 ELOG: Event(93) added with size 9 at 2023-10-09 17:52:30 UTC
1658 17:52:50.819101 ELOG: Event(9A) added with size 9 at 2023-10-09 17:52:30 UTC
1659 17:52:50.825429 ELOG: Event(9E) added with size 10 at 2023-10-09 17:52:30 UTC
1660 17:52:50.831646 ELOG: Event(9F) added with size 14 at 2023-10-09 17:52:30 UTC
1661 17:52:50.837272 BS: BS_DEV_INIT times (us): entry 0 run 462960 exit 38310
1662 17:52:50.843667 ELOG: Event(A1) added with size 10 at 2023-10-09 17:52:30 UTC
1663 17:52:50.851263 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1664 17:52:50.858267 ELOG: Event(A0) added with size 9 at 2023-10-09 17:52:30 UTC
1665 17:52:50.862173 elog_add_boot_reason: Logged dev mode boot
1666 17:52:50.864520 Finalize devices...
1667 17:52:50.866564 PCI: 00:17.0 final
1668 17:52:50.867901 Devices finalized
1669 17:52:50.873165 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1670 17:52:50.879445 BS: BS_POST_DEVICE times (us): entry 24786 run 5939 exit 5370
1671 17:52:50.885191 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 84 exit 0
1672 17:52:50.894255 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1673 17:52:50.898229 disable_unused_touchscreen: Disable ACPI0C50
1674 17:52:50.902574 disable_unused_touchscreen: Enable ELAN900C
1675 17:52:50.905481 CBFS @ 1d00000 size 300000
1676 17:52:50.912413 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1677 17:52:50.915789 CBFS: Locating 'fallback/dsdt.aml'
1678 17:52:50.919590 CBFS: Found @ offset 10b200 size 4448
1679 17:52:50.922301 CBFS @ 1d00000 size 300000
1680 17:52:50.928623 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1681 17:52:50.931908 CBFS: Locating 'fallback/slic'
1682 17:52:50.937443 CBFS: 'fallback/slic' not found.
1683 17:52:50.940730 ACPI: Writing ACPI tables at 89c0f000.
1684 17:52:50.942420 ACPI: * FACS
1685 17:52:50.943802 ACPI: * DSDT
1686 17:52:50.947390 Ramoops buffer: 0x100000@0x89b0e000.
1687 17:52:50.952459 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1688 17:52:50.957274 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1689 17:52:50.961156 ACPI: * FADT
1690 17:52:50.962208 SCI is IRQ9
1691 17:52:50.966350 ACPI: added table 1/32, length now 40
1692 17:52:50.967939 ACPI: * SSDT
1693 17:52:50.971460 Found 1 CPU(s) with 8 core(s) each.
1694 17:52:50.975815 Error: Could not locate 'wifi_sar' in VPD.
1695 17:52:50.979972 Error: failed from getting SAR limits!
1696 17:52:50.983390 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1697 17:52:50.988129 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1698 17:52:50.992111 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1699 17:52:50.995970 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1700 17:52:51.001458 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1701 17:52:51.006651 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1702 17:52:51.011386 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1703 17:52:51.015394 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1704 17:52:51.021593 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1705 17:52:51.027159 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1706 17:52:51.032931 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1707 17:52:51.039072 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1708 17:52:51.043507 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1709 17:52:51.048579 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1710 17:52:51.052376 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1711 17:52:51.058632 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1712 17:52:51.062944 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1713 17:52:51.069053 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1714 17:52:51.075037 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1715 17:52:51.080223 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1716 17:52:51.086169 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1717 17:52:51.091480 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1718 17:52:51.094494 ACPI: added table 2/32, length now 44
1719 17:52:51.096170 ACPI: * MCFG
1720 17:52:51.101239 ACPI: added table 3/32, length now 48
1721 17:52:51.102113 ACPI: * TPM2
1722 17:52:51.104463 TPM2 log created at 89afe000
1723 17:52:51.108433 ACPI: added table 4/32, length now 52
1724 17:52:51.110161 ACPI: * MADT
1725 17:52:51.111295 SCI is IRQ9
1726 17:52:51.115059 ACPI: added table 5/32, length now 56
1727 17:52:51.117337 current = 89c14bd0
1728 17:52:51.119403 ACPI: * IGD OpRegion
1729 17:52:51.121857 GMA: Found VBT in CBFS
1730 17:52:51.125093 GMA: Found valid VBT in CBFS
1731 17:52:51.128745 ACPI: added table 6/32, length now 60
1732 17:52:51.130203 ACPI: * HPET
1733 17:52:51.133809 ACPI: added table 7/32, length now 64
1734 17:52:51.135705 ACPI: done.
1735 17:52:51.138039 ACPI tables: 31872 bytes.
1736 17:52:51.140812 smbios_write_tables: 89afd000
1737 17:52:51.143240 recv_ec_data: 0x01
1738 17:52:51.145715 Create SMBIOS type 17
1739 17:52:51.148138 PCI: 00:14.3 (Intel WiFi)
1740 17:52:51.150931 SMBIOS tables: 708 bytes.
1741 17:52:51.155019 Writing table forward entry at 0x00000500
1742 17:52:51.161037 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1743 17:52:51.164685 Writing coreboot table at 0x89c33000
1744 17:52:51.170697 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1745 17:52:51.174736 1. 0000000000001000-000000000009ffff: RAM
1746 17:52:51.179836 2. 00000000000a0000-00000000000fffff: RESERVED
1747 17:52:51.183794 3. 0000000000100000-0000000089afcfff: RAM
1748 17:52:51.189996 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1749 17:52:51.194747 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1750 17:52:51.200472 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1751 17:52:51.205139 7. 000000008a000000-000000008f7fffff: RESERVED
1752 17:52:51.210448 8. 00000000e0000000-00000000efffffff: RESERVED
1753 17:52:51.215255 9. 00000000fc000000-00000000fc000fff: RESERVED
1754 17:52:51.220046 10. 00000000fe000000-00000000fe00ffff: RESERVED
1755 17:52:51.224681 11. 00000000fed10000-00000000fed17fff: RESERVED
1756 17:52:51.229377 12. 00000000fed80000-00000000fed83fff: RESERVED
1757 17:52:51.233935 13. 00000000feda0000-00000000feda1fff: RESERVED
1758 17:52:51.238646 14. 0000000100000000-000000026e7fffff: RAM
1759 17:52:51.242977 Graphics framebuffer located at 0xc0000000
1760 17:52:51.245583 Passing 6 GPIOs to payload:
1761 17:52:51.250832 NAME | PORT | POLARITY | VALUE
1762 17:52:51.255635 write protect | 0x000000dc | high | low
1763 17:52:51.261067 recovery | 0x000000d5 | low | high
1764 17:52:51.266319 lid | undefined | high | high
1765 17:52:51.271419 power | undefined | high | low
1766 17:52:51.276699 oprom | undefined | high | low
1767 17:52:51.281860 EC in RW | undefined | high | low
1768 17:52:51.284763 recv_ec_data: 0x01
1769 17:52:51.285630 SKU ID: 3
1770 17:52:51.288303 CBFS @ 1d00000 size 300000
1771 17:52:51.294696 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1772 17:52:51.300399 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum ca4e
1773 17:52:51.303251 coreboot table: 1484 bytes.
1774 17:52:51.307012 IMD ROOT 0. 89fff000 00001000
1775 17:52:51.310126 IMD SMALL 1. 89ffe000 00001000
1776 17:52:51.313918 FSP MEMORY 2. 89d0e000 002f0000
1777 17:52:51.316981 CONSOLE 3. 89cee000 00020000
1778 17:52:51.320044 TIME STAMP 4. 89ced000 00000910
1779 17:52:51.323531 VBOOT WORK 5. 89cea000 00003000
1780 17:52:51.326550 VBOOT 6. 89ce9000 00000c0c
1781 17:52:51.330207 MRC DATA 7. 89ce7000 000018f0
1782 17:52:51.333196 ROMSTG STCK 8. 89ce6000 00000400
1783 17:52:51.336651 AFTER CAR 9. 89cdc000 0000a000
1784 17:52:51.339929 RAMSTAGE 10. 89c80000 0005c000
1785 17:52:51.343389 REFCODE 11. 89c4b000 00035000
1786 17:52:51.346567 SMM BACKUP 12. 89c3b000 00010000
1787 17:52:51.350714 COREBOOT 13. 89c33000 00008000
1788 17:52:51.352971 ACPI 14. 89c0f000 00024000
1789 17:52:51.356517 ACPI GNVS 15. 89c0e000 00001000
1790 17:52:51.359541 RAMOOPS 16. 89b0e000 00100000
1791 17:52:51.363102 TPM2 TCGLOG17. 89afe000 00010000
1792 17:52:51.366961 SMBIOS 18. 89afd000 00000800
1793 17:52:51.368169 IMD small region:
1794 17:52:51.371955 IMD ROOT 0. 89ffec00 00000400
1795 17:52:51.375297 FSP RUNTIME 1. 89ffebe0 00000004
1796 17:52:51.378816 POWER STATE 2. 89ffeba0 00000040
1797 17:52:51.382193 ROMSTAGE 3. 89ffeb80 00000004
1798 17:52:51.385916 MEM INFO 4. 89ffe9c0 000001a9
1799 17:52:51.389208 VPD 5. 89ffe960 00000058
1800 17:52:51.392672 COREBOOTFWD 6. 89ffe920 00000028
1801 17:52:51.396108 MTRR: Physical address space:
1802 17:52:51.402132 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1803 17:52:51.408441 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1804 17:52:51.414403 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1805 17:52:51.420642 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1806 17:52:51.426911 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1807 17:52:51.432969 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1808 17:52:51.439496 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1809 17:52:51.443401 MTRR: Fixed MSR 0x250 0x0606060606060606
1810 17:52:51.447475 MTRR: Fixed MSR 0x258 0x0606060606060606
1811 17:52:51.451903 MTRR: Fixed MSR 0x259 0x0000000000000000
1812 17:52:51.456192 MTRR: Fixed MSR 0x268 0x0606060606060606
1813 17:52:51.460170 MTRR: Fixed MSR 0x269 0x0606060606060606
1814 17:52:51.463914 MTRR: Fixed MSR 0x26a 0x0606060606060606
1815 17:52:51.468044 MTRR: Fixed MSR 0x26b 0x0606060606060606
1816 17:52:51.471957 MTRR: Fixed MSR 0x26c 0x0606060606060606
1817 17:52:51.476479 MTRR: Fixed MSR 0x26d 0x0606060606060606
1818 17:52:51.480416 MTRR: Fixed MSR 0x26e 0x0606060606060606
1819 17:52:51.484196 MTRR: Fixed MSR 0x26f 0x0606060606060606
1820 17:52:51.488157 call enable_fixed_mtrr()
1821 17:52:51.491545 CPU physical address size: 39 bits
1822 17:52:51.495552 MTRR: default type WB/UC MTRR counts: 7/7.
1823 17:52:51.499019 MTRR: UC selected as default type.
1824 17:52:51.505296 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1825 17:52:51.512219 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1826 17:52:51.517385 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1827 17:52:51.523994 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1828 17:52:51.530557 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1829 17:52:51.536321 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1830 17:52:51.542718 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1831 17:52:51.543921
1832 17:52:51.544762 MTRR check
1833 17:52:51.547302 Fixed MTRRs : Enabled
1834 17:52:51.549784 Variable MTRRs: Enabled
1835 17:52:51.550165
1836 17:52:51.554103 MTRR: Fixed MSR 0x250 0x0606060606060606
1837 17:52:51.558006 MTRR: Fixed MSR 0x258 0x0606060606060606
1838 17:52:51.562042 MTRR: Fixed MSR 0x259 0x0000000000000000
1839 17:52:51.566286 MTRR: Fixed MSR 0x268 0x0606060606060606
1840 17:52:51.570485 MTRR: Fixed MSR 0x269 0x0606060606060606
1841 17:52:51.575014 MTRR: Fixed MSR 0x26a 0x0606060606060606
1842 17:52:51.578456 MTRR: Fixed MSR 0x26b 0x0606060606060606
1843 17:52:51.582431 MTRR: Fixed MSR 0x26c 0x0606060606060606
1844 17:52:51.586869 MTRR: Fixed MSR 0x26d 0x0606060606060606
1845 17:52:51.591233 MTRR: Fixed MSR 0x26e 0x0606060606060606
1846 17:52:51.594793 MTRR: Fixed MSR 0x26f 0x0606060606060606
1847 17:52:51.601882 BS: BS_WRITE_TABLES times (us): entry 17198 run 490407 exit 157260
1848 17:52:51.604458 call enable_fixed_mtrr()
1849 17:52:51.607292 CBFS @ 1d00000 size 300000
1850 17:52:51.613703 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1851 17:52:51.617102 CPU physical address size: 39 bits
1852 17:52:51.620651 CBFS: Locating 'fallback/payload'
1853 17:52:51.625137 MTRR: Fixed MSR 0x250 0x0606060606060606
1854 17:52:51.628555 MTRR: Fixed MSR 0x258 0x0606060606060606
1855 17:52:51.633080 MTRR: Fixed MSR 0x259 0x0000000000000000
1856 17:52:51.637497 MTRR: Fixed MSR 0x268 0x0606060606060606
1857 17:52:51.641289 MTRR: Fixed MSR 0x269 0x0606060606060606
1858 17:52:51.645088 MTRR: Fixed MSR 0x26a 0x0606060606060606
1859 17:52:51.649401 MTRR: Fixed MSR 0x26b 0x0606060606060606
1860 17:52:51.653229 MTRR: Fixed MSR 0x26c 0x0606060606060606
1861 17:52:51.657993 MTRR: Fixed MSR 0x26d 0x0606060606060606
1862 17:52:51.661448 MTRR: Fixed MSR 0x26e 0x0606060606060606
1863 17:52:51.665766 MTRR: Fixed MSR 0x26f 0x0606060606060606
1864 17:52:51.669860 MTRR: Fixed MSR 0x250 0x0606060606060606
1865 17:52:51.674297 MTRR: Fixed MSR 0x258 0x0606060606060606
1866 17:52:51.678146 MTRR: Fixed MSR 0x259 0x0000000000000000
1867 17:52:51.682265 MTRR: Fixed MSR 0x268 0x0606060606060606
1868 17:52:51.686476 MTRR: Fixed MSR 0x269 0x0606060606060606
1869 17:52:51.691450 MTRR: Fixed MSR 0x26a 0x0606060606060606
1870 17:52:51.694668 MTRR: Fixed MSR 0x26b 0x0606060606060606
1871 17:52:51.698652 MTRR: Fixed MSR 0x26c 0x0606060606060606
1872 17:52:51.703086 MTRR: Fixed MSR 0x26d 0x0606060606060606
1873 17:52:51.707004 MTRR: Fixed MSR 0x26e 0x0606060606060606
1874 17:52:51.710975 MTRR: Fixed MSR 0x26f 0x0606060606060606
1875 17:52:51.713768 call enable_fixed_mtrr()
1876 17:52:51.716506 call enable_fixed_mtrr()
1877 17:52:51.719964 CPU physical address size: 39 bits
1878 17:52:51.723914 CPU physical address size: 39 bits
1879 17:52:51.727539 MTRR: Fixed MSR 0x250 0x0606060606060606
1880 17:52:51.732020 MTRR: Fixed MSR 0x250 0x0606060606060606
1881 17:52:51.735637 MTRR: Fixed MSR 0x258 0x0606060606060606
1882 17:52:51.739681 MTRR: Fixed MSR 0x259 0x0000000000000000
1883 17:52:51.744528 MTRR: Fixed MSR 0x268 0x0606060606060606
1884 17:52:51.747993 MTRR: Fixed MSR 0x269 0x0606060606060606
1885 17:52:51.752030 MTRR: Fixed MSR 0x26a 0x0606060606060606
1886 17:52:51.756079 MTRR: Fixed MSR 0x26b 0x0606060606060606
1887 17:52:51.760481 MTRR: Fixed MSR 0x26c 0x0606060606060606
1888 17:52:51.764901 MTRR: Fixed MSR 0x26d 0x0606060606060606
1889 17:52:51.768714 MTRR: Fixed MSR 0x26e 0x0606060606060606
1890 17:52:51.772821 MTRR: Fixed MSR 0x26f 0x0606060606060606
1891 17:52:51.777060 MTRR: Fixed MSR 0x258 0x0606060606060606
1892 17:52:51.779502 call enable_fixed_mtrr()
1893 17:52:51.783976 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 17:52:51.788004 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 17:52:51.791737 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 17:52:51.795751 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 17:52:51.800054 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 17:52:51.804008 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 17:52:51.808126 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 17:52:51.812118 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 17:52:51.816108 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 17:52:51.820085 CPU physical address size: 39 bits
1903 17:52:51.822844 call enable_fixed_mtrr()
1904 17:52:51.827093 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 17:52:51.831242 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 17:52:51.835184 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 17:52:51.839218 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 17:52:51.843863 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 17:52:51.847293 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 17:52:51.851762 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 17:52:51.855292 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 17:52:51.859988 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 17:52:51.863693 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 17:52:51.868130 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 17:52:51.872002 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 17:52:51.876603 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 17:52:51.878949 call enable_fixed_mtrr()
1918 17:52:51.883043 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 17:52:51.887136 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 17:52:51.891561 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 17:52:51.895031 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 17:52:51.899721 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 17:52:51.903604 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 17:52:51.907490 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 17:52:51.911565 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 17:52:51.915811 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 17:52:51.919761 CPU physical address size: 39 bits
1928 17:52:51.922313 call enable_fixed_mtrr()
1929 17:52:51.925996 CPU physical address size: 39 bits
1930 17:52:51.930416 CBFS: Found @ offset 1cf4c0 size 3a954
1931 17:52:51.933280 CPU physical address size: 39 bits
1932 17:52:51.937891 Checking segment from ROM address 0xffecf4f8
1933 17:52:51.942761 Checking segment from ROM address 0xffecf514
1934 17:52:51.947160 Loading segment from ROM address 0xffecf4f8
1935 17:52:51.948688 code (compression=0)
1936 17:52:51.957350 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1937 17:52:51.966059 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1938 17:52:51.968169 it's not compressed!
1939 17:52:52.050225 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1940 17:52:52.057077 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1941 17:52:52.065014 Loading segment from ROM address 0xffecf514
1942 17:52:52.068218 Entry Point 0x30100018
1943 17:52:52.069246 Loaded segments
1944 17:52:52.073607 Finalizing chipset.
1945 17:52:52.074813 Finalizing SMM.
1946 17:52:52.081468 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 467196 exit 5985
1947 17:52:52.084379 mp_park_aps done after 0 msecs.
1948 17:52:52.089522 Jumping to boot code at 30100018(89c33000)
1949 17:52:52.097556 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1950 17:52:52.098076
1951 17:52:52.098851
1952 17:52:52.099204
1953 17:52:52.101164 Starting depthcharge on sarien...
1954 17:52:52.101578
1955 17:52:52.104375 end: 2.2.3 depthcharge-start (duration 00:00:29) [common]
1956 17:52:52.104974 start: 2.2.4 bootloader-commands (timeout 00:04:14) [common]
1957 17:52:52.105444 Setting prompt string to ['sarien:']
1958 17:52:52.105837 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:14)
1959 17:52:52.109250 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1960 17:52:52.109751
1961 17:52:52.116614 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1962 17:52:52.117035
1963 17:52:52.124522 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1964 17:52:52.124943
1965 17:52:52.126087 BIOS MMAP details:
1966 17:52:52.126705
1967 17:52:52.129528 IFD Base Offset : 0x1000000
1968 17:52:52.129940
1969 17:52:52.132445 IFD End Offset : 0x2000000
1970 17:52:52.133090
1971 17:52:52.135242 MMAP Size : 0x1000000
1972 17:52:52.135658
1973 17:52:52.138173 MMAP Start : 0xff000000
1974 17:52:52.138796
1975 17:52:52.144722 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1976 17:52:52.149266
1977 17:52:52.153390 New NVMe Controller 0x3214e128 @ 00:1d:04
1978 17:52:52.153810
1979 17:52:52.157774 New NVMe Controller 0x3214e1f0 @ 00:1d:00
1980 17:52:52.158465
1981 17:52:52.163298 The GBB signature is at 0x30000014 and is: 24 47 42 42
1982 17:52:52.167566
1983 17:52:52.169788 Wipe memory regions:
1984 17:52:52.170199
1985 17:52:52.173080 [0x00000000001000, 0x000000000a0000)
1986 17:52:52.173862
1987 17:52:52.176789 [0x00000000100000, 0x00000030000000)
1988 17:52:52.259642
1989 17:52:52.262996 [0x00000032751910, 0x00000089afd000)
1990 17:52:52.413237
1991 17:52:52.416746 [0x00000100000000, 0x0000026e800000)
1992 17:52:53.425703
1993 17:52:53.427868 R8152: Initializing
1994 17:52:53.428552
1995 17:52:53.429891 Version 6 (ocp_data = 5c30)
1996 17:52:53.431463
1997 17:52:53.433493 R8152: Done initializing
1998 17:52:53.433933
1999 17:52:53.435485 Adding net device
2000 17:52:53.435896
2001 17:52:53.441221 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2002 17:52:53.441637
2003 17:52:53.442235
2004 17:52:53.442584
2005 17:52:53.443391 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2007 17:52:53.544780 sarien: tftpboot 192.168.201.1 11712677/tftp-deploy-njdwww91/kernel/bzImage 11712677/tftp-deploy-njdwww91/kernel/cmdline 11712677/tftp-deploy-njdwww91/ramdisk/ramdisk.cpio.gz
2008 17:52:53.545393 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2009 17:52:53.546017 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:12)
2010 17:52:53.588460 tftpboot 192.168.201.1 11712677/tftp-deploy-njdwww91/kernel/bzImage 11712677/tftp-deploy-njdwww91/kernel/cmdline 11712677/tftp-deploy-njdwww91/ramdisk/ramdisk.cpio.gz
2011 17:52:53.588995
2012 17:52:53.589336 Waiting for link
2013 17:52:53.748827
2014 17:52:53.749651 done.
2015 17:52:53.750034
2016 17:52:53.751650 MAC: 00:24:32:30:7b:ce
2017 17:52:53.752439
2018 17:52:53.754690 Sending DHCP discover... done.
2019 17:52:53.755297
2020 17:52:53.757473 Waiting for reply... done.
2021 17:52:53.757892
2022 17:52:53.760883 Sending DHCP request... done.
2023 17:52:53.761491
2024 17:52:53.763887 Waiting for reply... done.
2025 17:52:53.764496
2026 17:52:53.766561 My ip is 192.168.201.162
2027 17:52:53.767181
2028 17:52:53.770295 The DHCP server ip is 192.168.201.1
2029 17:52:53.770887
2030 17:52:53.774923 TFTP server IP predefined by user: 192.168.201.1
2031 17:52:53.775538
2032 17:52:53.782271 Bootfile predefined by user: 11712677/tftp-deploy-njdwww91/kernel/bzImage
2033 17:52:53.782769
2034 17:52:53.785512 Sending tftp read request... done.
2035 17:52:53.786142
2036 17:52:53.791683 Waiting for the transfer...
2037 17:52:53.792019
2038 17:52:54.418645 00000000 ################################################################
2039 17:52:54.419180
2040 17:52:55.003891 00080000 ################################################################
2041 17:52:55.004316
2042 17:52:55.546171 00100000 ################################################################
2043 17:52:55.546522
2044 17:52:56.100491 00180000 ################################################################
2045 17:52:56.100916
2046 17:52:56.658618 00200000 ################################################################
2047 17:52:56.659478
2048 17:52:57.216623 00280000 ################################################################
2049 17:52:57.217063
2050 17:52:57.764833 00300000 ################################################################
2051 17:52:57.765663
2052 17:52:58.320411 00380000 ################################################################
2053 17:52:58.320841
2054 17:52:58.935922 00400000 ################################################################
2055 17:52:58.936416
2056 17:52:59.486283 00480000 ################################################################
2057 17:52:59.486768
2058 17:53:00.075239 00500000 ################################################################
2059 17:53:00.075934
2060 17:53:00.702334 00580000 ################################################################
2061 17:53:00.702811
2062 17:53:01.301431 00600000 ################################################################
2063 17:53:01.302300
2064 17:53:01.880743 00680000 ################################################################
2065 17:53:01.880903
2066 17:53:02.445658 00700000 ################################################################
2067 17:53:02.445814
2068 17:53:03.012550 00780000 ################################################################
2069 17:53:03.013100
2070 17:53:03.118432 00800000 ############# done.
2071 17:53:03.118581
2072 17:53:03.121489 The bootfile was 8490896 bytes long.
2073 17:53:03.121583
2074 17:53:03.125313 Sending tftp read request... done.
2075 17:53:03.125460
2076 17:53:03.128419 Waiting for the transfer...
2077 17:53:03.128532
2078 17:53:03.687134 00000000 ################################################################
2079 17:53:03.687519
2080 17:53:04.226274 00080000 ################################################################
2081 17:53:04.226758
2082 17:53:04.782048 00100000 ################################################################
2083 17:53:04.783854
2084 17:53:05.455179 00180000 ################################################################
2085 17:53:05.455708
2086 17:53:06.082173 00200000 ################################################################
2087 17:53:06.082742
2088 17:53:06.742782 00280000 ################################################################
2089 17:53:06.744182
2090 17:53:07.373223 00300000 ################################################################
2091 17:53:07.373840
2092 17:53:08.062429 00380000 ################################################################
2093 17:53:08.062980
2094 17:53:08.735834 00400000 ################################################################
2095 17:53:08.737134
2096 17:53:09.362601 00480000 ################################################################
2097 17:53:09.363234
2098 17:53:10.040162 00500000 ################################################################
2099 17:53:10.041521
2100 17:53:10.664440 00580000 ################################################################
2101 17:53:10.664985
2102 17:53:11.289077 00600000 ################################################################
2103 17:53:11.289569
2104 17:53:11.900863 00680000 ################################################################
2105 17:53:11.901013
2106 17:53:12.530645 00700000 ################################################################
2107 17:53:12.531156
2108 17:53:13.194489 00780000 ################################################################
2109 17:53:13.195014
2110 17:53:13.741120 00800000 ##################################################### done.
2111 17:53:13.741654
2112 17:53:13.744231 Sending tftp read request... done.
2113 17:53:13.744626
2114 17:53:13.748117 Waiting for the transfer...
2115 17:53:13.748740
2116 17:53:13.750047 00000000 # done.
2117 17:53:13.750540
2118 17:53:13.759295 Command line loaded dynamically from TFTP file: 11712677/tftp-deploy-njdwww91/kernel/cmdline
2119 17:53:13.759740
2120 17:53:13.778654 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2121 17:53:13.782496
2122 17:53:13.785770 Shutting down all USB controllers.
2123 17:53:13.786471
2124 17:53:13.789323 Removing current net device
2125 17:53:13.789992
2126 17:53:13.792677 EC: exit firmware mode
2127 17:53:13.793345
2128 17:53:13.795232 Finalizing coreboot
2129 17:53:13.795878
2130 17:53:13.800554 Exiting depthcharge with code 4 at timestamp: 46970145
2131 17:53:13.800834
2132 17:53:13.801042
2133 17:53:13.802612 Starting kernel ...
2134 17:53:13.803276 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2135 17:53:13.803469 start: 2.2.5 auto-login-action (timeout 00:03:52) [common]
2136 17:53:13.803617 Setting prompt string to ['Linux version [0-9]']
2137 17:53:13.803748 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 17:53:13.803872 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2139 17:53:13.804200
2140 17:53:13.804330
2142 17:57:05.804549 end: 2.2.5 auto-login-action (duration 00:03:52) [common]
2144 17:57:05.805828 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 232 seconds'
2146 17:57:05.806780 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2149 17:57:05.808590 end: 2 depthcharge-action (duration 00:05:00) [common]
2151 17:57:05.809955 Cleaning after the job
2152 17:57:05.810489 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712677/tftp-deploy-njdwww91/ramdisk
2153 17:57:05.817762 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712677/tftp-deploy-njdwww91/kernel
2154 17:57:05.825450 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712677/tftp-deploy-njdwww91/modules
2155 17:57:05.826563 start: 5.1 power-off (timeout 00:00:30) [common]
2156 17:57:05.826758 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=off'
2157 17:57:10.974470 >> Command sent successfully.
2158 17:57:10.980509 Returned 0 in 5 seconds
2159 17:57:11.080921 end: 5.1 power-off (duration 00:00:05) [common]
2161 17:57:11.081290 start: 5.2 read-feedback (timeout 00:09:55) [common]
2162 17:57:11.081594 Listened to connection for namespace 'common' for up to 1s
2163 17:57:12.082536 Finalising connection for namespace 'common'
2164 17:57:12.082729 Disconnecting from shell: Finalise
2165 17:57:12.082816
2166 17:57:12.183153 end: 5.2 read-feedback (duration 00:00:01) [common]
2167 17:57:12.183306 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712677
2168 17:57:12.202249 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712677
2169 17:57:12.202422 JobError: Your job cannot terminate cleanly.