Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:46:37.290703 lava-dispatcher, installed at version: 2023.08
2 17:46:37.290871 start: 0 validate
3 17:46:37.290977 Start time: 2023-10-09 17:46:37.290970+00:00 (UTC)
4 17:46:37.291082 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:46:37.291191 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 17:46:37.559892 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:46:37.560507 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:46:37.830769 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:46:37.831351 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:46:41.934879 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:46:41.935493 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:46:42.203824 validate duration: 4.91
14 17:46:42.204073 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:46:42.204160 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:46:42.204233 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:46:42.204346 Not decompressing ramdisk as can be used compressed.
18 17:46:42.204432 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 17:46:42.204485 saving as /var/lib/lava/dispatcher/tmp/11712669/tftp-deploy-wrvq2wvj/ramdisk/initrd.cpio.gz
20 17:46:42.204535 total size: 5432690 (5 MB)
21 17:46:42.717210 progress 0 % (0 MB)
22 17:46:42.722112 progress 5 % (0 MB)
23 17:46:42.723154 progress 10 % (0 MB)
24 17:46:42.724172 progress 15 % (0 MB)
25 17:46:42.725255 progress 20 % (1 MB)
26 17:46:42.726291 progress 25 % (1 MB)
27 17:46:42.727272 progress 30 % (1 MB)
28 17:46:42.728326 progress 35 % (1 MB)
29 17:46:42.729263 progress 40 % (2 MB)
30 17:46:42.730291 progress 45 % (2 MB)
31 17:46:42.731230 progress 50 % (2 MB)
32 17:46:42.732318 progress 55 % (2 MB)
33 17:46:42.733285 progress 60 % (3 MB)
34 17:46:42.734322 progress 65 % (3 MB)
35 17:46:42.735382 progress 70 % (3 MB)
36 17:46:42.736352 progress 75 % (3 MB)
37 17:46:42.737303 progress 80 % (4 MB)
38 17:46:42.738337 progress 85 % (4 MB)
39 17:46:42.739383 progress 90 % (4 MB)
40 17:46:42.740397 progress 95 % (4 MB)
41 17:46:42.741371 progress 100 % (5 MB)
42 17:46:42.741569 5 MB downloaded in 0.54 s (9.65 MB/s)
43 17:46:42.741718 end: 1.1.1 http-download (duration 00:00:01) [common]
45 17:46:42.741932 end: 1.1 download-retry (duration 00:00:01) [common]
46 17:46:42.741998 start: 1.2 download-retry (timeout 00:09:59) [common]
47 17:46:42.742062 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 17:46:42.742177 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 17:46:42.742234 saving as /var/lib/lava/dispatcher/tmp/11712669/tftp-deploy-wrvq2wvj/kernel/bzImage
50 17:46:42.742297 total size: 8490896 (8 MB)
51 17:46:42.742357 No compression specified
52 17:46:42.743335 progress 0 % (0 MB)
53 17:46:42.744892 progress 5 % (0 MB)
54 17:46:42.746515 progress 10 % (0 MB)
55 17:46:42.748068 progress 15 % (1 MB)
56 17:46:42.749766 progress 20 % (1 MB)
57 17:46:42.751286 progress 25 % (2 MB)
58 17:46:42.752804 progress 30 % (2 MB)
59 17:46:42.754417 progress 35 % (2 MB)
60 17:46:42.755950 progress 40 % (3 MB)
61 17:46:42.757505 progress 45 % (3 MB)
62 17:46:42.759033 progress 50 % (4 MB)
63 17:46:42.760538 progress 55 % (4 MB)
64 17:46:42.762063 progress 60 % (4 MB)
65 17:46:42.763554 progress 65 % (5 MB)
66 17:46:42.765058 progress 70 % (5 MB)
67 17:46:42.766595 progress 75 % (6 MB)
68 17:46:42.768075 progress 80 % (6 MB)
69 17:46:42.769596 progress 85 % (6 MB)
70 17:46:42.771073 progress 90 % (7 MB)
71 17:46:42.772555 progress 95 % (7 MB)
72 17:46:42.774096 progress 100 % (8 MB)
73 17:46:42.774186 8 MB downloaded in 0.03 s (253.97 MB/s)
74 17:46:42.774306 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:46:42.774490 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:46:42.774555 start: 1.3 download-retry (timeout 00:09:59) [common]
78 17:46:42.774622 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 17:46:42.774739 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 17:46:42.774797 saving as /var/lib/lava/dispatcher/tmp/11712669/tftp-deploy-wrvq2wvj/nfsrootfs/full.rootfs.tar
81 17:46:42.774844 total size: 133380384 (127 MB)
82 17:46:42.774890 Using unxz to decompress xz
83 17:46:42.777869 progress 0 % (0 MB)
84 17:46:43.070118 progress 5 % (6 MB)
85 17:46:43.382112 progress 10 % (12 MB)
86 17:46:43.627771 progress 15 % (19 MB)
87 17:46:43.792142 progress 20 % (25 MB)
88 17:46:44.003508 progress 25 % (31 MB)
89 17:46:44.303771 progress 30 % (38 MB)
90 17:46:44.602022 progress 35 % (44 MB)
91 17:46:44.947834 progress 40 % (50 MB)
92 17:46:45.282268 progress 45 % (57 MB)
93 17:46:45.593029 progress 50 % (63 MB)
94 17:46:45.916972 progress 55 % (69 MB)
95 17:46:46.231959 progress 60 % (76 MB)
96 17:46:46.547167 progress 65 % (82 MB)
97 17:46:46.864144 progress 70 % (89 MB)
98 17:46:47.183257 progress 75 % (95 MB)
99 17:46:47.568824 progress 80 % (101 MB)
100 17:46:47.947651 progress 85 % (108 MB)
101 17:46:48.178519 progress 90 % (114 MB)
102 17:46:48.477510 progress 95 % (120 MB)
103 17:46:48.818645 progress 100 % (127 MB)
104 17:46:48.823345 127 MB downloaded in 6.05 s (21.03 MB/s)
105 17:46:48.823575 end: 1.3.1 http-download (duration 00:00:06) [common]
107 17:46:48.823805 end: 1.3 download-retry (duration 00:00:06) [common]
108 17:46:48.823879 start: 1.4 download-retry (timeout 00:09:53) [common]
109 17:46:48.823949 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 17:46:48.824087 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 17:46:48.824151 saving as /var/lib/lava/dispatcher/tmp/11712669/tftp-deploy-wrvq2wvj/modules/modules.tar
112 17:46:48.824201 total size: 250868 (0 MB)
113 17:46:48.824253 Using unxz to decompress xz
114 17:46:48.827261 progress 13 % (0 MB)
115 17:46:48.827558 progress 26 % (0 MB)
116 17:46:48.827748 progress 39 % (0 MB)
117 17:46:48.829388 progress 52 % (0 MB)
118 17:46:48.831003 progress 65 % (0 MB)
119 17:46:48.832598 progress 78 % (0 MB)
120 17:46:48.834218 progress 91 % (0 MB)
121 17:46:48.835658 progress 100 % (0 MB)
122 17:46:48.840375 0 MB downloaded in 0.02 s (14.80 MB/s)
123 17:46:48.840552 end: 1.4.1 http-download (duration 00:00:00) [common]
125 17:46:48.840780 end: 1.4 download-retry (duration 00:00:00) [common]
126 17:46:48.840864 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 17:46:48.840949 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 17:46:50.141312 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11712669/extract-nfsrootfs-rezw2vxs
129 17:46:50.141627 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
130 17:46:50.141725 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
131 17:46:50.141872 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7
132 17:46:50.141983 makedir: /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin
133 17:46:50.142068 makedir: /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/tests
134 17:46:50.142147 makedir: /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/results
135 17:46:50.142230 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-add-keys
136 17:46:50.142346 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-add-sources
137 17:46:50.142449 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-background-process-start
138 17:46:50.142550 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-background-process-stop
139 17:46:50.142648 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-common-functions
140 17:46:50.142745 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-echo-ipv4
141 17:46:50.142839 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-install-packages
142 17:46:50.142941 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-installed-packages
143 17:46:50.143037 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-os-build
144 17:46:50.143136 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-probe-channel
145 17:46:50.143232 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-probe-ip
146 17:46:50.143338 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-target-ip
147 17:46:50.143429 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-target-mac
148 17:46:50.143520 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-target-storage
149 17:46:50.143612 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-test-case
150 17:46:50.143703 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-test-event
151 17:46:50.143793 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-test-feedback
152 17:46:50.143885 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-test-raise
153 17:46:50.143974 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-test-reference
154 17:46:50.144064 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-test-runner
155 17:46:50.144154 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-test-set
156 17:46:50.144254 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-test-shell
157 17:46:50.144351 Updating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-install-packages (oe)
158 17:46:50.144469 Updating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/bin/lava-installed-packages (oe)
159 17:46:50.144560 Creating /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/environment
160 17:46:50.144633 LAVA metadata
161 17:46:50.144689 - LAVA_JOB_ID=11712669
162 17:46:50.144738 - LAVA_DISPATCHER_IP=192.168.201.1
163 17:46:50.144818 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
164 17:46:50.144871 skipped lava-vland-overlay
165 17:46:50.144928 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 17:46:50.144988 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
167 17:46:50.145036 skipped lava-multinode-overlay
168 17:46:50.145090 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 17:46:50.145150 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
170 17:46:50.145206 Loading test definitions
171 17:46:50.145275 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
172 17:46:50.145330 Using /lava-11712669 at stage 0
173 17:46:50.145584 uuid=11712669_1.5.2.3.1 testdef=None
174 17:46:50.145655 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 17:46:50.145720 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
176 17:46:50.146117 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 17:46:50.146288 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
179 17:46:50.146769 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 17:46:50.146945 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
182 17:46:50.147423 runner path: /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/0/tests/0_dmesg test_uuid 11712669_1.5.2.3.1
183 17:46:50.147541 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 17:46:50.147710 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
186 17:46:50.147763 Using /lava-11712669 at stage 1
187 17:46:50.148005 uuid=11712669_1.5.2.3.5 testdef=None
188 17:46:50.148074 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 17:46:50.148137 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
190 17:46:50.148491 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 17:46:50.148656 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
193 17:46:50.149163 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 17:46:50.149333 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
196 17:46:50.149817 runner path: /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/1/tests/1_bootrr test_uuid 11712669_1.5.2.3.5
197 17:46:50.149928 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 17:46:50.150089 Creating lava-test-runner.conf files
200 17:46:50.150136 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/0 for stage 0
201 17:46:50.150200 - 0_dmesg
202 17:46:50.150261 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712669/lava-overlay-k1fpg9z7/lava-11712669/1 for stage 1
203 17:46:50.150328 - 1_bootrr
204 17:46:50.150399 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 17:46:50.150464 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
206 17:46:50.155918 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 17:46:50.156006 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
208 17:46:50.156075 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 17:46:50.156139 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 17:46:50.156203 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
211 17:46:50.248127 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 17:46:50.248402 start: 1.5.4 extract-modules (timeout 00:09:52) [common]
213 17:46:50.248494 extracting modules file /var/lib/lava/dispatcher/tmp/11712669/tftp-deploy-wrvq2wvj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712669/extract-nfsrootfs-rezw2vxs
214 17:46:50.257064 extracting modules file /var/lib/lava/dispatcher/tmp/11712669/tftp-deploy-wrvq2wvj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712669/extract-overlay-ramdisk-omwr5_u9/ramdisk
215 17:46:50.265986 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 17:46:50.266081 start: 1.5.5 apply-overlay-tftp (timeout 00:09:52) [common]
217 17:46:50.266150 [common] Applying overlay to NFS
218 17:46:50.266205 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712669/compress-overlay-o67wqsil/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712669/extract-nfsrootfs-rezw2vxs
219 17:46:50.271757 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 17:46:50.271850 start: 1.5.6 configure-preseed-file (timeout 00:09:52) [common]
221 17:46:50.271922 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 17:46:50.271993 start: 1.5.7 compress-ramdisk (timeout 00:09:52) [common]
223 17:46:50.272055 Building ramdisk /var/lib/lava/dispatcher/tmp/11712669/extract-overlay-ramdisk-omwr5_u9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712669/extract-overlay-ramdisk-omwr5_u9/ramdisk
224 17:46:50.301669 >> 26159 blocks
225 17:46:50.770819 rename /var/lib/lava/dispatcher/tmp/11712669/extract-overlay-ramdisk-omwr5_u9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712669/tftp-deploy-wrvq2wvj/ramdisk/ramdisk.cpio.gz
226 17:46:50.771150 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
227 17:46:50.771266 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
228 17:46:50.771359 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
229 17:46:50.771433 No mkimage arch provided, not using FIT.
230 17:46:50.771505 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 17:46:50.771571 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 17:46:50.771648 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
233 17:46:50.771725 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
234 17:46:50.771789 No LXC device requested
235 17:46:50.771854 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 17:46:50.771924 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
237 17:46:50.771988 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 17:46:50.772045 Checking files for TFTP limit of 4294967296 bytes.
239 17:46:50.772352 end: 1 tftp-deploy (duration 00:00:09) [common]
240 17:46:50.772444 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 17:46:50.772508 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 17:46:50.772595 substitutions:
243 17:46:50.772645 - {DTB}: None
244 17:46:50.772691 - {INITRD}: 11712669/tftp-deploy-wrvq2wvj/ramdisk/ramdisk.cpio.gz
245 17:46:50.772736 - {KERNEL}: 11712669/tftp-deploy-wrvq2wvj/kernel/bzImage
246 17:46:50.772779 - {LAVA_MAC}: None
247 17:46:50.772822 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11712669/extract-nfsrootfs-rezw2vxs
248 17:46:50.772865 - {NFS_SERVER_IP}: 192.168.201.1
249 17:46:50.772907 - {PRESEED_CONFIG}: None
250 17:46:50.772950 - {PRESEED_LOCAL}: None
251 17:46:50.772992 - {RAMDISK}: 11712669/tftp-deploy-wrvq2wvj/ramdisk/ramdisk.cpio.gz
252 17:46:50.773034 - {ROOT_PART}: None
253 17:46:50.773077 - {ROOT}: None
254 17:46:50.773119 - {SERVER_IP}: 192.168.201.1
255 17:46:50.773162 - {TEE}: None
256 17:46:50.773205 Parsed boot commands:
257 17:46:50.773247 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 17:46:50.773392 Parsed boot commands: tftpboot 192.168.201.1 11712669/tftp-deploy-wrvq2wvj/kernel/bzImage 11712669/tftp-deploy-wrvq2wvj/kernel/cmdline 11712669/tftp-deploy-wrvq2wvj/ramdisk/ramdisk.cpio.gz
259 17:46:50.773470 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 17:46:50.773533 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 17:46:50.773600 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 17:46:50.773663 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 17:46:50.773716 Not connected, no need to disconnect.
264 17:46:50.773773 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 17:46:50.773835 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 17:46:50.773887 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-1'
267 17:46:50.776215 Setting prompt string to ['lava-test: # ']
268 17:46:50.776446 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 17:46:50.776527 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 17:46:50.776600 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 17:46:50.776667 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 17:46:50.776816 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=reboot'
273 17:46:55.924811 >> Command sent successfully.
274 17:46:55.932731 Returned 0 in 5 seconds
275 17:46:56.033775 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 17:46:56.034937 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 17:46:56.035314 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 17:46:56.035626 Setting prompt string to 'Starting depthcharge on Volmar...'
280 17:46:56.035873 Changing prompt to 'Starting depthcharge on Volmar...'
281 17:46:56.036127 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
282 17:46:56.036961 [Enter `^Ec?' for help]
283 17:46:57.402835
284 17:46:57.402976
285 17:46:57.409484 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
286 17:46:57.413339 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
287 17:46:57.416967 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
288 17:46:57.425181 CPU: AES supported, TXT NOT supported, VT supported
289 17:46:57.432630 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
290 17:46:57.432711 Cache size = 10 MiB
291 17:46:57.436414 MCH: device id 4609 (rev 04) is Alderlake-P
292 17:46:57.443778 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
293 17:46:57.447437 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
294 17:46:57.451314 VBOOT: Loading verstage.
295 17:46:57.455104 FMAP: Found "FLASH" version 1.1 at 0x1804000.
296 17:46:57.458300 FMAP: base = 0x0 size = 0x2000000 #areas = 37
297 17:46:57.465323 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 17:46:57.471661 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
299 17:46:57.481848 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
300 17:46:57.481951
301 17:46:57.482019
302 17:46:57.491631 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
303 17:46:57.495080 Probing TPM I2C: I2C bus 1 version 0x3230302a
304 17:46:57.501515 DW I2C bus 1 at 0xfe022000 (400 KHz)
305 17:46:57.501598 done! DID_VID 0x00281ae0
306 17:46:57.505312 TPM ready after 0 ms
307 17:46:57.509156 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
308 17:46:57.521809 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
309 17:46:57.528274 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
310 17:46:57.580955 tlcl_send_startup: Startup return code is 0
311 17:46:57.581078 TPM: setup succeeded
312 17:46:57.602241 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
313 17:46:57.625151 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
314 17:46:57.628497 Chrome EC: UHEPI supported
315 17:46:57.631475 Reading cr50 boot mode
316 17:46:57.646262 Cr50 says boot_mode is VERIFIED_RW(0x00).
317 17:46:57.646370 Phase 1
318 17:46:57.653272 FMAP: area GBB found @ 1805000 (458752 bytes)
319 17:46:57.660574 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
320 17:46:57.667753 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
321 17:46:57.674585 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 17:46:57.674712 Phase 2
323 17:46:57.674786 Phase 3
324 17:46:57.681779 FMAP: area GBB found @ 1805000 (458752 bytes)
325 17:46:57.685192 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
326 17:46:57.691769 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
327 17:46:57.694922 VB2:vb2_verify_keyblock() Checking keyblock signature...
328 17:46:57.705025 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
329 17:46:57.711683 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
330 17:46:57.718939 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
331 17:46:57.733097 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
332 17:46:57.736075 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
333 17:46:57.740067 VB2:vb2_verify_fw_preamble() Verifying preamble.
334 17:46:57.747111 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
335 17:46:57.753481 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
336 17:46:57.760109 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
337 17:46:57.765393 Phase 4
338 17:46:57.768828 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
339 17:46:57.775384 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
340 17:46:57.988219 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
341 17:46:57.994742 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
342 17:46:57.998009 Saving vboot hash.
343 17:46:58.004729 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
344 17:46:58.020470 tlcl_extend: response is 0
345 17:46:58.027198 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
346 17:46:58.033725 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
347 17:46:58.048146 tlcl_extend: response is 0
348 17:46:58.054372 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
349 17:46:58.074781 tlcl_lock_nv_write: response is 0
350 17:46:58.095413 tlcl_lock_nv_write: response is 0
351 17:46:58.095503 Slot A is selected
352 17:46:58.102341 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
353 17:46:58.108539 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
354 17:46:58.115156 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
355 17:46:58.121819 BS: verstage times (exec / console): total (unknown) / 256 ms
356 17:46:58.121902
357 17:46:58.121980
358 17:46:58.128681 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
359 17:46:58.132400 Google Chrome EC: version:
360 17:46:58.135721 ro: volmar_v2.0.14126-e605144e9c
361 17:46:58.139178 rw: volmar_v0.0.55-22d1557
362 17:46:58.142599 running image: 2
363 17:46:58.145954 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
364 17:46:58.155823 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
365 17:46:58.162399 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
366 17:46:58.169205 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
367 17:46:58.178971 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
368 17:46:58.189093 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
369 17:46:58.192423 EC took 1007us to calculate image hash
370 17:46:58.202415 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
371 17:46:58.205675 VB2:sync_ec() select_rw=RW(active)
372 17:46:58.215550 Waited 275us to clear limit power flag.
373 17:46:58.222502 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
374 17:46:58.225578 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
375 17:46:58.228986 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
376 17:46:58.235568 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
377 17:46:58.239218 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
378 17:46:58.242049 TCO_STS: 0000 0000
379 17:46:58.245564 GEN_PMCON: d0015038 00002200
380 17:46:58.245642 GBLRST_CAUSE: 00000000 00000000
381 17:46:58.248923 HPR_CAUSE0: 00000000
382 17:46:58.252162 prev_sleep_state 5
383 17:46:58.255359 Abort disabling TXT, as CPU is not TXT capable.
384 17:46:58.263189 cse_lite: Number of partitions = 3
385 17:46:58.266635 cse_lite: Current partition = RO
386 17:46:58.266712 cse_lite: Next partition = RO
387 17:46:58.270450 cse_lite: Flags = 0x7
388 17:46:58.277012 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
389 17:46:58.286639 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
390 17:46:58.290066 FMAP: area SI_ME found @ 1000 (5238784 bytes)
391 17:46:58.296764 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
392 17:46:58.303314 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
393 17:46:58.310051 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
394 17:46:58.313399 cse_lite: CSE CBFS RW version : 16.1.25.2049
395 17:46:58.319736 cse_lite: Set Boot Partition Info Command (RW)
396 17:46:58.323286 HECI: Global Reset(Type:1) Command
397 17:46:59.745501 ) Core(TM) i3-1215U
398 17:46:59.752696 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
399 17:46:59.755580 CPU: AES supported, TXT NOT supported, VT supported
400 17:46:59.762638 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
401 17:46:59.765830 Cache size = 10 MiB
402 17:46:59.768996 MCH: device id 4609 (rev 04) is Alderlake-P
403 17:46:59.775751 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
404 17:46:59.779420 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
405 17:46:59.782235 VBOOT: Loading verstage.
406 17:46:59.786756 FMAP: Found "FLASH" version 1.1 at 0x1804000.
407 17:46:59.793463 FMAP: base = 0x0 size = 0x2000000 #areas = 37
408 17:46:59.797001 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
409 17:46:59.803775 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
410 17:46:59.813845 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
411 17:46:59.814346
412 17:46:59.814621
413 17:46:59.823539 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
414 17:46:59.827003 Probing TPM I2C: I2C bus 1 version 0x3230302a
415 17:46:59.833633 DW I2C bus 1 at 0xfe022000 (400 KHz)
416 17:46:59.834132 done! DID_VID 0x00281ae0
417 17:46:59.837221 TPM ready after 0 ms
418 17:46:59.841033 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
419 17:46:59.854747 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
420 17:46:59.858214 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
421 17:46:59.913508 tlcl_send_startup: Startup return code is 0
422 17:46:59.914003 TPM: setup succeeded
423 17:46:59.934598 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
424 17:46:59.956642 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
425 17:46:59.960827 Chrome EC: UHEPI supported
426 17:46:59.964104 Reading cr50 boot mode
427 17:46:59.978666 Cr50 says boot_mode is VERIFIED_RW(0x00).
428 17:46:59.979149 Phase 1
429 17:46:59.984829 FMAP: area GBB found @ 1805000 (458752 bytes)
430 17:46:59.991711 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 17:46:59.998280 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 17:47:00.005525 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
433 17:47:00.008791 Phase 2
434 17:47:00.009260 Phase 3
435 17:47:00.011734 FMAP: area GBB found @ 1805000 (458752 bytes)
436 17:47:00.018494 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
437 17:47:00.021355 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
438 17:47:00.028587 VB2:vb2_verify_keyblock() Checking keyblock signature...
439 17:47:00.035039 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
440 17:47:00.041309 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
441 17:47:00.051594 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
442 17:47:00.063500 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
443 17:47:00.066939 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
444 17:47:00.073971 VB2:vb2_verify_fw_preamble() Verifying preamble.
445 17:47:00.080377 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
446 17:47:00.086734 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
447 17:47:00.093689 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
448 17:47:00.097728 Phase 4
449 17:47:00.101489 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
450 17:47:00.107720 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
451 17:47:00.320360 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
452 17:47:00.326703 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
453 17:47:00.330237 Saving vboot hash.
454 17:47:00.336833 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
455 17:47:00.352804 tlcl_extend: response is 0
456 17:47:00.359659 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
457 17:47:00.365666 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
458 17:47:00.380304 tlcl_extend: response is 0
459 17:47:00.387214 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
460 17:47:00.407492 tlcl_lock_nv_write: response is 0
461 17:47:00.426256 tlcl_lock_nv_write: response is 0
462 17:47:00.426740 Slot A is selected
463 17:47:00.432772 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
464 17:47:00.439617 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
465 17:47:00.446286 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
466 17:47:00.452668 BS: verstage times (exec / console): total (unknown) / 257 ms
467 17:47:00.453175
468 17:47:00.453569
469 17:47:00.459173 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
470 17:47:00.463118 Google Chrome EC: version:
471 17:47:00.466702 ro: volmar_v2.0.14126-e605144e9c
472 17:47:00.469629 rw: volmar_v0.0.55-22d1557
473 17:47:00.473292 running image: 2
474 17:47:00.476382 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
475 17:47:00.485917 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
476 17:47:00.492843 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
477 17:47:00.499789 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
478 17:47:00.509963 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
479 17:47:00.519698 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
480 17:47:00.523162 EC took 941us to calculate image hash
481 17:47:00.533064 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
482 17:47:00.536283 VB2:sync_ec() select_rw=RW(active)
483 17:47:00.548690 Waited 270us to clear limit power flag.
484 17:47:00.552083 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
485 17:47:00.556135 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
486 17:47:00.560069 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
487 17:47:00.563219 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
488 17:47:00.569924 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
489 17:47:00.570392 TCO_STS: 0000 0000
490 17:47:00.573565 GEN_PMCON: d1001038 00002200
491 17:47:00.576725 GBLRST_CAUSE: 00000040 00000000
492 17:47:00.580329 HPR_CAUSE0: 00000000
493 17:47:00.580842 prev_sleep_state 5
494 17:47:00.586669 Abort disabling TXT, as CPU is not TXT capable.
495 17:47:00.589869 cse_lite: Number of partitions = 3
496 17:47:00.593150 cse_lite: Current partition = RW
497 17:47:00.596227 cse_lite: Next partition = RW
498 17:47:00.600108 cse_lite: Flags = 0x7
499 17:47:00.606831 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
500 17:47:00.616853 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
501 17:47:00.619821 FMAP: area SI_ME found @ 1000 (5238784 bytes)
502 17:47:00.626076 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
503 17:47:00.632774 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
504 17:47:00.639701 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
505 17:47:00.643060 cse_lite: CSE CBFS RW version : 16.1.25.2049
506 17:47:00.646609 Boot Count incremented to 2684
507 17:47:00.652892 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
508 17:47:00.659518 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
509 17:47:00.672312 Probing TPM I2C: done! DID_VID 0x00281ae0
510 17:47:00.675685 Locality already claimed
511 17:47:00.678967 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
512 17:47:00.698317 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
513 17:47:00.705041 MRC: Hash idx 0x100d comparison successful.
514 17:47:00.708418 MRC cache found, size f6c8
515 17:47:00.708803 bootmode is set to: 2
516 17:47:00.712221 EC returned error result code 3
517 17:47:00.715879 FW_CONFIG value from CBI is 0x131
518 17:47:00.722549 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
519 17:47:00.725406 SPD index = 0
520 17:47:00.732706 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
521 17:47:00.733181 SPD: module type is LPDDR4X
522 17:47:00.738966 SPD: module part number is K4U6E3S4AB-MGCL
523 17:47:00.745740 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
524 17:47:00.749280 SPD: device width 16 bits, bus width 16 bits
525 17:47:00.752500 SPD: module size is 1024 MB (per channel)
526 17:47:00.821039 CBMEM:
527 17:47:00.824408 IMD: root @ 0x76fff000 254 entries.
528 17:47:00.827397 IMD: root @ 0x76ffec00 62 entries.
529 17:47:00.835673 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
530 17:47:00.838480 RO_VPD is uninitialized or empty.
531 17:47:00.842739 FMAP: area RW_VPD found @ f29000 (8192 bytes)
532 17:47:00.848955 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
533 17:47:00.852055 External stage cache:
534 17:47:00.855422 IMD: root @ 0x7bbff000 254 entries.
535 17:47:00.858384 IMD: root @ 0x7bbfec00 62 entries.
536 17:47:00.865683 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
537 17:47:00.872306 MRC: Checking cached data update for 'RW_MRC_CACHE'.
538 17:47:00.875906 MRC: 'RW_MRC_CACHE' does not need update.
539 17:47:00.876360 8 DIMMs found
540 17:47:00.878990 SMM Memory Map
541 17:47:00.881966 SMRAM : 0x7b800000 0x800000
542 17:47:00.885832 Subregion 0: 0x7b800000 0x200000
543 17:47:00.888902 Subregion 1: 0x7ba00000 0x200000
544 17:47:00.892475 Subregion 2: 0x7bc00000 0x400000
545 17:47:00.896040 top_of_ram = 0x77000000
546 17:47:00.899140 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
547 17:47:00.905761 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
548 17:47:00.912323 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
549 17:47:00.915575 MTRR Range: Start=ff000000 End=0 (Size 1000000)
550 17:47:00.915979 Normal boot
551 17:47:00.925197 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
552 17:47:00.932025 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
553 17:47:00.938324 Processing 237 relocs. Offset value of 0x74ab9000
554 17:47:00.946538 BS: romstage times (exec / console): total (unknown) / 377 ms
555 17:47:00.954109
556 17:47:00.954512
557 17:47:00.960460 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
558 17:47:00.960821 Normal boot
559 17:47:00.967479 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
560 17:47:00.974254 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
561 17:47:00.981058 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
562 17:47:00.990729 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
563 17:47:01.038635 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
564 17:47:01.045588 Processing 5931 relocs. Offset value of 0x72a2f000
565 17:47:01.048313 BS: postcar times (exec / console): total (unknown) / 51 ms
566 17:47:01.051967
567 17:47:01.052455
568 17:47:01.058736 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
569 17:47:01.062190 Reserving BERT start 76a1e000, size 10000
570 17:47:01.065685 Normal boot
571 17:47:01.068358 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
572 17:47:01.075649 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
573 17:47:01.085418 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
574 17:47:01.088598 FMAP: area RW_VPD found @ f29000 (8192 bytes)
575 17:47:01.092181 Google Chrome EC: version:
576 17:47:01.095466 ro: volmar_v2.0.14126-e605144e9c
577 17:47:01.098565 rw: volmar_v0.0.55-22d1557
578 17:47:01.101833 running image: 2
579 17:47:01.105759 ACPI _SWS is PM1 Index 8 GPE Index -1
580 17:47:01.112406 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
581 17:47:01.115332 EC returned error result code 3
582 17:47:01.118620 FW_CONFIG value from CBI is 0x131
583 17:47:01.125423 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
584 17:47:01.129368 PCI: 00:1c.2 disabled by fw_config
585 17:47:01.132913 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
586 17:47:01.136029 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
587 17:47:01.142334 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
588 17:47:01.145784 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
589 17:47:01.152259 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
590 17:47:01.158717 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
591 17:47:01.165955 microcode: sig=0x906a4 pf=0x80 revision=0x423
592 17:47:01.168790 microcode: Update skipped, already up-to-date
593 17:47:01.175894 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
594 17:47:01.209848 Detected 6 core, 8 thread CPU.
595 17:47:01.212864 Setting up SMI for CPU
596 17:47:01.215994 IED base = 0x7bc00000
597 17:47:01.216501 IED size = 0x00400000
598 17:47:01.219466 Will perform SMM setup.
599 17:47:01.222770 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
600 17:47:01.226005 LAPIC 0x0 in XAPIC mode.
601 17:47:01.235671 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
602 17:47:01.239450 Processing 18 relocs. Offset value of 0x00030000
603 17:47:01.244110 Attempting to start 7 APs
604 17:47:01.247452 Waiting for 10ms after sending INIT.
605 17:47:01.260210 Waiting for SIPI to complete...
606 17:47:01.263387 done.
607 17:47:01.263778 LAPIC 0x16 in XAPIC mode.
608 17:47:01.266826 Waiting for SIPI to complete...
609 17:47:01.270635 done.
610 17:47:01.271124 LAPIC 0x14 in XAPIC mode.
611 17:47:01.276869 AP: slot 2 apic_id 16, MCU rev: 0x00000423
612 17:47:01.279948 LAPIC 0x10 in XAPIC mode.
613 17:47:01.283300 AP: slot 1 apic_id 14, MCU rev: 0x00000423
614 17:47:01.286634 AP: slot 3 apic_id 10, MCU rev: 0x00000423
615 17:47:01.289769 LAPIC 0x12 in XAPIC mode.
616 17:47:01.293438 LAPIC 0x9 in XAPIC mode.
617 17:47:01.296896 AP: slot 4 apic_id 12, MCU rev: 0x00000423
618 17:47:01.299912 AP: slot 6 apic_id 9, MCU rev: 0x00000423
619 17:47:01.303775 LAPIC 0x8 in XAPIC mode.
620 17:47:01.306860 LAPIC 0x1 in XAPIC mode.
621 17:47:01.309827 AP: slot 7 apic_id 8, MCU rev: 0x00000423
622 17:47:01.313359 AP: slot 5 apic_id 1, MCU rev: 0x00000423
623 17:47:01.316237 smm_setup_relocation_handler: enter
624 17:47:01.319795 smm_setup_relocation_handler: exit
625 17:47:01.329493 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
626 17:47:01.333226 Processing 11 relocs. Offset value of 0x00038000
627 17:47:01.339717 smm_module_setup_stub: stack_top = 0x7b804000
628 17:47:01.343259 smm_module_setup_stub: per cpu stack_size = 0x800
629 17:47:01.349296 smm_module_setup_stub: runtime.start32_offset = 0x4c
630 17:47:01.352939 smm_module_setup_stub: runtime.smm_size = 0x10000
631 17:47:01.359335 SMM Module: stub loaded at 38000. Will call 0x76a52094
632 17:47:01.362694 Installing permanent SMM handler to 0x7b800000
633 17:47:01.368944 smm_load_module: total_smm_space_needed e468, available -> 200000
634 17:47:01.379491 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
635 17:47:01.382513 Processing 255 relocs. Offset value of 0x7b9f6000
636 17:47:01.388948 smm_load_module: smram_start: 0x7b800000
637 17:47:01.392172 smm_load_module: smram_end: 7ba00000
638 17:47:01.395597 smm_load_module: handler start 0x7b9f6d5f
639 17:47:01.398800 smm_load_module: handler_size 98d0
640 17:47:01.402615 smm_load_module: fxsave_area 0x7b9ff000
641 17:47:01.405460 smm_load_module: fxsave_size 1000
642 17:47:01.412695 smm_load_module: CONFIG_MSEG_SIZE 0x0
643 17:47:01.415793 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
644 17:47:01.422071 smm_load_module: handler_mod_params.smbase = 0x7b800000
645 17:47:01.425374 smm_load_module: per_cpu_save_state_size = 0x400
646 17:47:01.428704 smm_load_module: num_cpus = 0x8
647 17:47:01.435464 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
648 17:47:01.442055 smm_load_module: total_save_state_size = 0x2000
649 17:47:01.445545 smm_load_module: cpu0 entry: 7b9e6000
650 17:47:01.448749 smm_create_map: cpus allowed in one segment 30
651 17:47:01.451748 smm_create_map: min # of segments needed 1
652 17:47:01.455029 CPU 0x0
653 17:47:01.458444 smbase 7b9e6000 entry 7b9ee000
654 17:47:01.461754 ss_start 7b9f5c00 code_end 7b9ee208
655 17:47:01.465317 CPU 0x1
656 17:47:01.468835 smbase 7b9e5c00 entry 7b9edc00
657 17:47:01.472066 ss_start 7b9f5800 code_end 7b9ede08
658 17:47:01.472568 CPU 0x2
659 17:47:01.475374 smbase 7b9e5800 entry 7b9ed800
660 17:47:01.481877 ss_start 7b9f5400 code_end 7b9eda08
661 17:47:01.482388 CPU 0x3
662 17:47:01.484739 smbase 7b9e5400 entry 7b9ed400
663 17:47:01.491504 ss_start 7b9f5000 code_end 7b9ed608
664 17:47:01.491912 CPU 0x4
665 17:47:01.494920 smbase 7b9e5000 entry 7b9ed000
666 17:47:01.497667 ss_start 7b9f4c00 code_end 7b9ed208
667 17:47:01.500913 CPU 0x5
668 17:47:01.504874 smbase 7b9e4c00 entry 7b9ecc00
669 17:47:01.508011 ss_start 7b9f4800 code_end 7b9ece08
670 17:47:01.511137 CPU 0x6
671 17:47:01.514352 smbase 7b9e4800 entry 7b9ec800
672 17:47:01.517674 ss_start 7b9f4400 code_end 7b9eca08
673 17:47:01.517748 CPU 0x7
674 17:47:01.521524 smbase 7b9e4400 entry 7b9ec400
675 17:47:01.528042 ss_start 7b9f4000 code_end 7b9ec608
676 17:47:01.534540 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
677 17:47:01.541269 Processing 11 relocs. Offset value of 0x7b9ee000
678 17:47:01.548108 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
679 17:47:01.551227 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
680 17:47:01.558001 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
681 17:47:01.564676 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
682 17:47:01.571206 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
683 17:47:01.578066 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
684 17:47:01.584568 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
685 17:47:01.590950 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
686 17:47:01.597866 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
687 17:47:01.601278 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
688 17:47:01.608222 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
689 17:47:01.615216 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
690 17:47:01.621580 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
691 17:47:01.628500 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
692 17:47:01.634937 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
693 17:47:01.638096 smm_module_setup_stub: stack_top = 0x7b804000
694 17:47:01.644953 smm_module_setup_stub: per cpu stack_size = 0x800
695 17:47:01.648284 smm_module_setup_stub: runtime.start32_offset = 0x4c
696 17:47:01.654911 smm_module_setup_stub: runtime.smm_size = 0x200000
697 17:47:01.661496 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
698 17:47:01.664865 Clearing SMI status registers
699 17:47:01.668238 SMI_STS: PM1
700 17:47:01.668770 PM1_STS: WAK PWRBTN
701 17:47:01.674730 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
702 17:47:01.678088 In relocation handler: CPU 0
703 17:47:01.684471 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
704 17:47:01.687660 Writing SMRR. base = 0x7b800006, mask=0xff800c00
705 17:47:01.691157 Relocation complete.
706 17:47:01.697860 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
707 17:47:01.700840 In relocation handler: CPU 5
708 17:47:01.704655 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
709 17:47:01.707677 Relocation complete.
710 17:47:01.714297 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
711 17:47:01.717490 In relocation handler: CPU 4
712 17:47:01.721197 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
713 17:47:01.724282 Writing SMRR. base = 0x7b800006, mask=0xff800c00
714 17:47:01.728111 Relocation complete.
715 17:47:01.734580 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
716 17:47:01.738018 In relocation handler: CPU 2
717 17:47:01.741020 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
718 17:47:01.747875 Writing SMRR. base = 0x7b800006, mask=0xff800c00
719 17:47:01.748345 Relocation complete.
720 17:47:01.757724 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
721 17:47:01.758081 In relocation handler: CPU 3
722 17:47:01.764911 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
723 17:47:01.767946 Writing SMRR. base = 0x7b800006, mask=0xff800c00
724 17:47:01.771104 Relocation complete.
725 17:47:01.777845 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
726 17:47:01.781224 In relocation handler: CPU 1
727 17:47:01.784328 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
728 17:47:01.790862 Writing SMRR. base = 0x7b800006, mask=0xff800c00
729 17:47:01.791359 Relocation complete.
730 17:47:01.797426 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
731 17:47:01.800735 In relocation handler: CPU 7
732 17:47:01.804203 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
733 17:47:01.810679 Writing SMRR. base = 0x7b800006, mask=0xff800c00
734 17:47:01.814198 Relocation complete.
735 17:47:01.821166 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
736 17:47:01.824207 In relocation handler: CPU 6
737 17:47:01.827646 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
738 17:47:01.831127 Relocation complete.
739 17:47:01.831703 Initializing CPU #0
740 17:47:01.834347 CPU: vendor Intel device 906a4
741 17:47:01.837292 CPU: family 06, model 9a, stepping 04
742 17:47:01.840639 Clearing out pending MCEs
743 17:47:01.843737 cpu: energy policy set to 7
744 17:47:01.846760 Turbo is available but hidden
745 17:47:01.850390 Turbo is available and visible
746 17:47:01.853577 microcode: Update skipped, already up-to-date
747 17:47:01.856805 CPU #0 initialized
748 17:47:01.856884 Initializing CPU #5
749 17:47:01.860219 Initializing CPU #3
750 17:47:01.863336 Initializing CPU #4
751 17:47:01.863413 Initializing CPU #2
752 17:47:01.867114 Initializing CPU #7
753 17:47:01.870425 CPU: vendor Intel device 906a4
754 17:47:01.874140 CPU: family 06, model 9a, stepping 04
755 17:47:01.877247 CPU: vendor Intel device 906a4
756 17:47:01.880916 CPU: family 06, model 9a, stepping 04
757 17:47:01.884076 Clearing out pending MCEs
758 17:47:01.884548 Initializing CPU #1
759 17:47:01.887352 cpu: energy policy set to 7
760 17:47:01.890646 Clearing out pending MCEs
761 17:47:01.893983 microcode: Update skipped, already up-to-date
762 17:47:01.897227 CPU #3 initialized
763 17:47:01.900404 cpu: energy policy set to 7
764 17:47:01.904175 CPU: vendor Intel device 906a4
765 17:47:01.907446 CPU: family 06, model 9a, stepping 04
766 17:47:01.910544 CPU: vendor Intel device 906a4
767 17:47:01.914033 CPU: family 06, model 9a, stepping 04
768 17:47:01.917204 Clearing out pending MCEs
769 17:47:01.920370 Clearing out pending MCEs
770 17:47:01.923387 CPU: vendor Intel device 906a4
771 17:47:01.926971 CPU: family 06, model 9a, stepping 04
772 17:47:01.927400 Initializing CPU #6
773 17:47:01.933355 microcode: Update skipped, already up-to-date
774 17:47:01.933439 CPU #2 initialized
775 17:47:01.937357 cpu: energy policy set to 7
776 17:47:01.940313 cpu: energy policy set to 7
777 17:47:01.943537 microcode: Update skipped, already up-to-date
778 17:47:01.946985 CPU #4 initialized
779 17:47:01.950036 microcode: Update skipped, already up-to-date
780 17:47:01.953440 CPU #1 initialized
781 17:47:01.957004 CPU: vendor Intel device 906a4
782 17:47:01.960394 CPU: family 06, model 9a, stepping 04
783 17:47:01.963612 Clearing out pending MCEs
784 17:47:01.966720 CPU: vendor Intel device 906a4
785 17:47:01.970018 CPU: family 06, model 9a, stepping 04
786 17:47:01.973867 Clearing out pending MCEs
787 17:47:01.976733 cpu: energy policy set to 7
788 17:47:01.977097 Clearing out pending MCEs
789 17:47:01.983162 microcode: Update skipped, already up-to-date
790 17:47:01.983517 CPU #7 initialized
791 17:47:01.986983 cpu: energy policy set to 7
792 17:47:01.990169 cpu: energy policy set to 7
793 17:47:01.993748 microcode: Update skipped, already up-to-date
794 17:47:01.996670 CPU #6 initialized
795 17:47:02.000100 microcode: Update skipped, already up-to-date
796 17:47:02.003515 CPU #5 initialized
797 17:47:02.006903 bsp_do_flight_plan done after 734 msecs.
798 17:47:02.010214 CPU: frequency set to 4400 MHz
799 17:47:02.013494 Enabling SMIs.
800 17:47:02.020159 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
801 17:47:02.034906 Probing TPM I2C: done! DID_VID 0x00281ae0
802 17:47:02.037970 Locality already claimed
803 17:47:02.041866 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
804 17:47:02.052238 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
805 17:47:02.056285 Enabling GPIO PM b/c CR50 has long IRQ pulse support
806 17:47:02.062477 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
807 17:47:02.069321 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
808 17:47:02.072718 Found a VBT of 9216 bytes after decompression
809 17:47:02.076245 PCI 1.0, PIN A, using IRQ #16
810 17:47:02.079495 PCI 2.0, PIN A, using IRQ #17
811 17:47:02.082504 PCI 4.0, PIN A, using IRQ #18
812 17:47:02.086128 PCI 5.0, PIN A, using IRQ #16
813 17:47:02.089098 PCI 6.0, PIN A, using IRQ #16
814 17:47:02.092715 PCI 6.2, PIN C, using IRQ #18
815 17:47:02.096243 PCI 7.0, PIN A, using IRQ #19
816 17:47:02.099324 PCI 7.1, PIN B, using IRQ #20
817 17:47:02.102974 PCI 7.2, PIN C, using IRQ #21
818 17:47:02.106146 PCI 7.3, PIN D, using IRQ #22
819 17:47:02.109273 PCI 8.0, PIN A, using IRQ #23
820 17:47:02.112627 PCI D.0, PIN A, using IRQ #17
821 17:47:02.116227 PCI D.1, PIN B, using IRQ #19
822 17:47:02.116728 PCI 10.0, PIN A, using IRQ #24
823 17:47:02.119460 PCI 10.1, PIN B, using IRQ #25
824 17:47:02.122665 PCI 10.6, PIN C, using IRQ #20
825 17:47:02.125836 PCI 10.7, PIN D, using IRQ #21
826 17:47:02.129149 PCI 11.0, PIN A, using IRQ #26
827 17:47:02.132699 PCI 11.1, PIN B, using IRQ #27
828 17:47:02.135941 PCI 11.2, PIN C, using IRQ #28
829 17:47:02.139140 PCI 11.3, PIN D, using IRQ #29
830 17:47:02.142670 PCI 12.0, PIN A, using IRQ #30
831 17:47:02.146080 PCI 12.6, PIN B, using IRQ #31
832 17:47:02.149498 PCI 12.7, PIN C, using IRQ #22
833 17:47:02.152522 PCI 13.0, PIN A, using IRQ #32
834 17:47:02.155504 PCI 13.1, PIN B, using IRQ #33
835 17:47:02.159274 PCI 13.2, PIN C, using IRQ #34
836 17:47:02.162443 PCI 13.3, PIN D, using IRQ #35
837 17:47:02.166350 PCI 14.0, PIN B, using IRQ #23
838 17:47:02.168966 PCI 14.1, PIN A, using IRQ #36
839 17:47:02.169354 PCI 14.3, PIN C, using IRQ #17
840 17:47:02.172384 PCI 15.0, PIN A, using IRQ #37
841 17:47:02.176221 PCI 15.1, PIN B, using IRQ #38
842 17:47:02.178975 PCI 15.2, PIN C, using IRQ #39
843 17:47:02.182531 PCI 15.3, PIN D, using IRQ #40
844 17:47:02.185448 PCI 16.0, PIN A, using IRQ #18
845 17:47:02.189520 PCI 16.1, PIN B, using IRQ #19
846 17:47:02.192636 PCI 16.2, PIN C, using IRQ #20
847 17:47:02.195999 PCI 16.3, PIN D, using IRQ #21
848 17:47:02.200765 PCI 16.4, PIN A, using IRQ #18
849 17:47:02.202148 PCI 16.5, PIN B, using IRQ #19
850 17:47:02.206010 PCI 17.0, PIN A, using IRQ #22
851 17:47:02.208930 PCI 19.0, PIN A, using IRQ #41
852 17:47:02.212495 PCI 19.1, PIN B, using IRQ #42
853 17:47:02.215499 PCI 19.2, PIN C, using IRQ #43
854 17:47:02.218952 PCI 1C.0, PIN A, using IRQ #16
855 17:47:02.222241 PCI 1C.1, PIN B, using IRQ #17
856 17:47:02.222791 PCI 1C.2, PIN C, using IRQ #18
857 17:47:02.225809 PCI 1C.3, PIN D, using IRQ #19
858 17:47:02.228792 PCI 1C.4, PIN A, using IRQ #16
859 17:47:02.232230 PCI 1C.5, PIN B, using IRQ #17
860 17:47:02.235320 PCI 1C.6, PIN C, using IRQ #18
861 17:47:02.238815 PCI 1C.7, PIN D, using IRQ #19
862 17:47:02.242133 PCI 1D.0, PIN A, using IRQ #16
863 17:47:02.245682 PCI 1D.1, PIN B, using IRQ #17
864 17:47:02.248821 PCI 1D.2, PIN C, using IRQ #18
865 17:47:02.252181 PCI 1D.3, PIN D, using IRQ #19
866 17:47:02.255670 PCI 1E.0, PIN A, using IRQ #23
867 17:47:02.258735 PCI 1E.1, PIN B, using IRQ #20
868 17:47:02.262341 PCI 1E.2, PIN C, using IRQ #44
869 17:47:02.265757 PCI 1E.3, PIN D, using IRQ #45
870 17:47:02.268656 PCI 1F.3, PIN B, using IRQ #22
871 17:47:02.272277 PCI 1F.4, PIN C, using IRQ #23
872 17:47:02.274997 PCI 1F.6, PIN D, using IRQ #20
873 17:47:02.278686 PCI 1F.7, PIN A, using IRQ #21
874 17:47:02.282116 IRQ: Using dynamically assigned PCI IO-APIC IRQs
875 17:47:02.288201 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
876 17:47:02.472342 FSPS returned 0
877 17:47:02.475527 Executing Phase 1 of FspMultiPhaseSiInit
878 17:47:02.485551 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
879 17:47:02.489119 port C0 DISC req: usage 1 usb3 1 usb2 1
880 17:47:02.492271 Raw Buffer output 0 00000111
881 17:47:02.495239 Raw Buffer output 1 00000000
882 17:47:02.499207 pmc_send_ipc_cmd succeeded
883 17:47:02.505848 port C1 DISC req: usage 1 usb3 3 usb2 3
884 17:47:02.506323 Raw Buffer output 0 00000331
885 17:47:02.509354 Raw Buffer output 1 00000000
886 17:47:02.513169 pmc_send_ipc_cmd succeeded
887 17:47:02.517514 Detected 6 core, 8 thread CPU.
888 17:47:02.520553 Detected 6 core, 8 thread CPU.
889 17:47:02.525513 Detected 6 core, 8 thread CPU.
890 17:47:02.528906 Detected 6 core, 8 thread CPU.
891 17:47:02.532397 Detected 6 core, 8 thread CPU.
892 17:47:02.535441 Detected 6 core, 8 thread CPU.
893 17:47:02.539497 Detected 6 core, 8 thread CPU.
894 17:47:02.542132 Detected 6 core, 8 thread CPU.
895 17:47:02.545719 Detected 6 core, 8 thread CPU.
896 17:47:02.548733 Detected 6 core, 8 thread CPU.
897 17:47:02.552383 Detected 6 core, 8 thread CPU.
898 17:47:02.555687 Detected 6 core, 8 thread CPU.
899 17:47:02.559723 Detected 6 core, 8 thread CPU.
900 17:47:02.562196 Detected 6 core, 8 thread CPU.
901 17:47:02.565727 Detected 6 core, 8 thread CPU.
902 17:47:02.569178 Detected 6 core, 8 thread CPU.
903 17:47:02.572102 Detected 6 core, 8 thread CPU.
904 17:47:02.575473 Detected 6 core, 8 thread CPU.
905 17:47:02.578788 Detected 6 core, 8 thread CPU.
906 17:47:02.582225 Detected 6 core, 8 thread CPU.
907 17:47:02.585832 Detected 6 core, 8 thread CPU.
908 17:47:02.589031 Detected 6 core, 8 thread CPU.
909 17:47:02.868753 Detected 6 core, 8 thread CPU.
910 17:47:02.871949 Detected 6 core, 8 thread CPU.
911 17:47:02.875332 Detected 6 core, 8 thread CPU.
912 17:47:02.878895 Detected 6 core, 8 thread CPU.
913 17:47:02.882024 Detected 6 core, 8 thread CPU.
914 17:47:02.885248 Detected 6 core, 8 thread CPU.
915 17:47:02.888785 Detected 6 core, 8 thread CPU.
916 17:47:02.892028 Detected 6 core, 8 thread CPU.
917 17:47:02.895294 Detected 6 core, 8 thread CPU.
918 17:47:02.898954 Detected 6 core, 8 thread CPU.
919 17:47:02.902058 Detected 6 core, 8 thread CPU.
920 17:47:02.905109 Detected 6 core, 8 thread CPU.
921 17:47:02.908917 Detected 6 core, 8 thread CPU.
922 17:47:02.911753 Detected 6 core, 8 thread CPU.
923 17:47:02.915126 Detected 6 core, 8 thread CPU.
924 17:47:02.918420 Detected 6 core, 8 thread CPU.
925 17:47:02.921753 Detected 6 core, 8 thread CPU.
926 17:47:02.925238 Detected 6 core, 8 thread CPU.
927 17:47:02.928515 Detected 6 core, 8 thread CPU.
928 17:47:02.931877 Detected 6 core, 8 thread CPU.
929 17:47:02.935465 Display FSP Version Info HOB
930 17:47:02.938674 Reference Code - CPU = c.0.65.70
931 17:47:02.939145 uCode Version = 0.0.4.23
932 17:47:02.942039 TXT ACM version = ff.ff.ff.ffff
933 17:47:02.945110 Reference Code - ME = c.0.65.70
934 17:47:02.948432 MEBx version = 0.0.0.0
935 17:47:02.951815 ME Firmware Version = Lite SKU
936 17:47:02.955099 Reference Code - PCH = c.0.65.70
937 17:47:02.958553 PCH-CRID Status = Disabled
938 17:47:02.961772 PCH-CRID Original Value = ff.ff.ff.ffff
939 17:47:02.965268 PCH-CRID New Value = ff.ff.ff.ffff
940 17:47:02.968028 OPROM - RST - RAID = ff.ff.ff.ffff
941 17:47:02.971509 PCH Hsio Version = 4.0.0.0
942 17:47:02.974810 Reference Code - SA - System Agent = c.0.65.70
943 17:47:02.978630 Reference Code - MRC = 0.0.3.80
944 17:47:02.981656 SA - PCIe Version = c.0.65.70
945 17:47:02.985195 SA-CRID Status = Disabled
946 17:47:02.988199 SA-CRID Original Value = 0.0.0.4
947 17:47:02.991627 SA-CRID New Value = 0.0.0.4
948 17:47:02.995180 OPROM - VBIOS = ff.ff.ff.ffff
949 17:47:02.998196 IO Manageability Engine FW Version = 24.0.4.0
950 17:47:03.001494 PHY Build Version = 0.0.0.2016
951 17:47:03.005084 Thunderbolt(TM) FW Version = 0.0.0.0
952 17:47:03.011988 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
953 17:47:03.018493 BS: BS_DEV_INIT_CHIPS run times (exec / console): 485 / 507 ms
954 17:47:03.021217 Enumerating buses...
955 17:47:03.024878 Show all devs... Before device enumeration.
956 17:47:03.027921 Root Device: enabled 1
957 17:47:03.028304 CPU_CLUSTER: 0: enabled 1
958 17:47:03.031294 DOMAIN: 0000: enabled 1
959 17:47:03.034852 GPIO: 0: enabled 1
960 17:47:03.035207 PCI: 00:00.0: enabled 1
961 17:47:03.037949 PCI: 00:01.0: enabled 0
962 17:47:03.041990 PCI: 00:01.1: enabled 0
963 17:47:03.044918 PCI: 00:02.0: enabled 1
964 17:47:03.045519 PCI: 00:04.0: enabled 1
965 17:47:03.047973 PCI: 00:05.0: enabled 0
966 17:47:03.051667 PCI: 00:06.0: enabled 1
967 17:47:03.054456 PCI: 00:06.2: enabled 0
968 17:47:03.054810 PCI: 00:07.0: enabled 0
969 17:47:03.058008 PCI: 00:07.1: enabled 0
970 17:47:03.061486 PCI: 00:07.2: enabled 0
971 17:47:03.064588 PCI: 00:07.3: enabled 0
972 17:47:03.064992 PCI: 00:08.0: enabled 0
973 17:47:03.068035 PCI: 00:09.0: enabled 0
974 17:47:03.071594 PCI: 00:0a.0: enabled 1
975 17:47:03.074811 PCI: 00:0d.0: enabled 1
976 17:47:03.075311 PCI: 00:0d.1: enabled 0
977 17:47:03.078036 PCI: 00:0d.2: enabled 0
978 17:47:03.081546 PCI: 00:0d.3: enabled 0
979 17:47:03.084405 PCI: 00:0e.0: enabled 0
980 17:47:03.084801 PCI: 00:10.0: enabled 0
981 17:47:03.088556 PCI: 00:10.1: enabled 0
982 17:47:03.091469 PCI: 00:10.6: enabled 0
983 17:47:03.091864 PCI: 00:10.7: enabled 0
984 17:47:03.094863 PCI: 00:12.0: enabled 0
985 17:47:03.097762 PCI: 00:12.6: enabled 0
986 17:47:03.101190 PCI: 00:12.7: enabled 0
987 17:47:03.101714 PCI: 00:13.0: enabled 0
988 17:47:03.104599 PCI: 00:14.0: enabled 1
989 17:47:03.107729 PCI: 00:14.1: enabled 0
990 17:47:03.111195 PCI: 00:14.2: enabled 1
991 17:47:03.111659 PCI: 00:14.3: enabled 1
992 17:47:03.114877 PCI: 00:15.0: enabled 1
993 17:47:03.117897 PCI: 00:15.1: enabled 1
994 17:47:03.121024 PCI: 00:15.2: enabled 0
995 17:47:03.121457 PCI: 00:15.3: enabled 1
996 17:47:03.124680 PCI: 00:16.0: enabled 1
997 17:47:03.127556 PCI: 00:16.1: enabled 0
998 17:47:03.127953 PCI: 00:16.2: enabled 0
999 17:47:03.131119 PCI: 00:16.3: enabled 0
1000 17:47:03.134127 PCI: 00:16.4: enabled 0
1001 17:47:03.137676 PCI: 00:16.5: enabled 0
1002 17:47:03.138030 PCI: 00:17.0: enabled 1
1003 17:47:03.141126 PCI: 00:19.0: enabled 0
1004 17:47:03.144525 PCI: 00:19.1: enabled 1
1005 17:47:03.147802 PCI: 00:19.2: enabled 0
1006 17:47:03.148282 PCI: 00:1a.0: enabled 0
1007 17:47:03.151053 PCI: 00:1c.0: enabled 0
1008 17:47:03.154384 PCI: 00:1c.1: enabled 0
1009 17:47:03.157581 PCI: 00:1c.2: enabled 0
1010 17:47:03.157935 PCI: 00:1c.3: enabled 0
1011 17:47:03.160779 PCI: 00:1c.4: enabled 0
1012 17:47:03.164263 PCI: 00:1c.5: enabled 0
1013 17:47:03.167697 PCI: 00:1c.6: enabled 0
1014 17:47:03.168161 PCI: 00:1c.7: enabled 0
1015 17:47:03.170724 PCI: 00:1d.0: enabled 0
1016 17:47:03.174640 PCI: 00:1d.1: enabled 0
1017 17:47:03.175113 PCI: 00:1d.2: enabled 0
1018 17:47:03.177604 PCI: 00:1d.3: enabled 0
1019 17:47:03.181150 PCI: 00:1e.0: enabled 1
1020 17:47:03.184315 PCI: 00:1e.1: enabled 0
1021 17:47:03.184806 PCI: 00:1e.2: enabled 0
1022 17:47:03.187630 PCI: 00:1e.3: enabled 1
1023 17:47:03.191001 PCI: 00:1f.0: enabled 1
1024 17:47:03.194446 PCI: 00:1f.1: enabled 0
1025 17:47:03.194865 PCI: 00:1f.2: enabled 1
1026 17:47:03.197725 PCI: 00:1f.3: enabled 1
1027 17:47:03.201091 PCI: 00:1f.4: enabled 0
1028 17:47:03.204027 PCI: 00:1f.5: enabled 1
1029 17:47:03.204439 PCI: 00:1f.6: enabled 0
1030 17:47:03.207580 PCI: 00:1f.7: enabled 0
1031 17:47:03.210473 GENERIC: 0.0: enabled 1
1032 17:47:03.210573 GENERIC: 0.0: enabled 1
1033 17:47:03.214147 GENERIC: 1.0: enabled 1
1034 17:47:03.217553 GENERIC: 0.0: enabled 1
1035 17:47:03.221088 GENERIC: 1.0: enabled 1
1036 17:47:03.221608 USB0 port 0: enabled 1
1037 17:47:03.224331 USB0 port 0: enabled 1
1038 17:47:03.227463 GENERIC: 0.0: enabled 1
1039 17:47:03.230551 I2C: 00:1a: enabled 1
1040 17:47:03.230934 I2C: 00:31: enabled 1
1041 17:47:03.234110 I2C: 00:32: enabled 1
1042 17:47:03.237420 I2C: 00:50: enabled 1
1043 17:47:03.237768 I2C: 00:10: enabled 1
1044 17:47:03.240535 I2C: 00:15: enabled 1
1045 17:47:03.244113 I2C: 00:2c: enabled 1
1046 17:47:03.244583 GENERIC: 0.0: enabled 1
1047 17:47:03.247465 SPI: 00: enabled 1
1048 17:47:03.250906 PNP: 0c09.0: enabled 1
1049 17:47:03.251376 GENERIC: 0.0: enabled 1
1050 17:47:03.253687 USB3 port 0: enabled 1
1051 17:47:03.257061 USB3 port 1: enabled 0
1052 17:47:03.257434 USB3 port 2: enabled 1
1053 17:47:03.260629 USB3 port 3: enabled 0
1054 17:47:03.264354 USB2 port 0: enabled 1
1055 17:47:03.267532 USB2 port 1: enabled 0
1056 17:47:03.268020 USB2 port 2: enabled 1
1057 17:47:03.270734 USB2 port 3: enabled 0
1058 17:47:03.273668 USB2 port 4: enabled 0
1059 17:47:03.274046 USB2 port 5: enabled 1
1060 17:47:03.277301 USB2 port 6: enabled 0
1061 17:47:03.280629 USB2 port 7: enabled 0
1062 17:47:03.284271 USB2 port 8: enabled 1
1063 17:47:03.284760 USB2 port 9: enabled 1
1064 17:47:03.287599 USB3 port 0: enabled 1
1065 17:47:03.290571 USB3 port 1: enabled 0
1066 17:47:03.291043 USB3 port 2: enabled 0
1067 17:47:03.293642 USB3 port 3: enabled 0
1068 17:47:03.297508 GENERIC: 0.0: enabled 1
1069 17:47:03.300777 GENERIC: 1.0: enabled 1
1070 17:47:03.301265 APIC: 00: enabled 1
1071 17:47:03.303681 APIC: 14: enabled 1
1072 17:47:03.304064 APIC: 16: enabled 1
1073 17:47:03.306928 APIC: 10: enabled 1
1074 17:47:03.310416 APIC: 12: enabled 1
1075 17:47:03.310848 APIC: 01: enabled 1
1076 17:47:03.314097 APIC: 09: enabled 1
1077 17:47:03.314554 APIC: 08: enabled 1
1078 17:47:03.317230 Compare with tree...
1079 17:47:03.320050 Root Device: enabled 1
1080 17:47:03.324087 CPU_CLUSTER: 0: enabled 1
1081 17:47:03.324546 APIC: 00: enabled 1
1082 17:47:03.326925 APIC: 14: enabled 1
1083 17:47:03.330346 APIC: 16: enabled 1
1084 17:47:03.330694 APIC: 10: enabled 1
1085 17:47:03.333565 APIC: 12: enabled 1
1086 17:47:03.336709 APIC: 01: enabled 1
1087 17:47:03.336784 APIC: 09: enabled 1
1088 17:47:03.340609 APIC: 08: enabled 1
1089 17:47:03.343815 DOMAIN: 0000: enabled 1
1090 17:47:03.344302 GPIO: 0: enabled 1
1091 17:47:03.346808 PCI: 00:00.0: enabled 1
1092 17:47:03.350344 PCI: 00:01.0: enabled 0
1093 17:47:03.353470 PCI: 00:01.1: enabled 0
1094 17:47:03.356816 PCI: 00:02.0: enabled 1
1095 17:47:03.357178 PCI: 00:04.0: enabled 1
1096 17:47:03.360298 GENERIC: 0.0: enabled 1
1097 17:47:03.363640 PCI: 00:05.0: enabled 0
1098 17:47:03.366997 PCI: 00:06.0: enabled 1
1099 17:47:03.370308 PCI: 00:06.2: enabled 0
1100 17:47:03.370655 PCI: 00:08.0: enabled 0
1101 17:47:03.373844 PCI: 00:09.0: enabled 0
1102 17:47:03.377605 PCI: 00:0a.0: enabled 1
1103 17:47:03.381022 PCI: 00:0d.0: enabled 1
1104 17:47:03.383952 USB0 port 0: enabled 1
1105 17:47:03.384433 USB3 port 0: enabled 1
1106 17:47:03.387649 USB3 port 1: enabled 0
1107 17:47:03.390327 USB3 port 2: enabled 1
1108 17:47:03.393876 USB3 port 3: enabled 0
1109 17:47:03.397313 PCI: 00:0d.1: enabled 0
1110 17:47:03.397808 PCI: 00:0d.2: enabled 0
1111 17:47:03.400479 PCI: 00:0d.3: enabled 0
1112 17:47:03.403752 PCI: 00:0e.0: enabled 0
1113 17:47:03.406963 PCI: 00:10.0: enabled 0
1114 17:47:03.410592 PCI: 00:10.1: enabled 0
1115 17:47:03.410942 PCI: 00:10.6: enabled 0
1116 17:47:03.413485 PCI: 00:10.7: enabled 0
1117 17:47:03.416997 PCI: 00:12.0: enabled 0
1118 17:47:03.420174 PCI: 00:12.6: enabled 0
1119 17:47:03.423463 PCI: 00:12.7: enabled 0
1120 17:47:03.423817 PCI: 00:13.0: enabled 0
1121 17:47:03.426830 PCI: 00:14.0: enabled 1
1122 17:47:03.429980 USB0 port 0: enabled 1
1123 17:47:03.433770 USB2 port 0: enabled 1
1124 17:47:03.436734 USB2 port 1: enabled 0
1125 17:47:03.437179 USB2 port 2: enabled 1
1126 17:47:03.440539 USB2 port 3: enabled 0
1127 17:47:03.443576 USB2 port 4: enabled 0
1128 17:47:03.446933 USB2 port 5: enabled 1
1129 17:47:03.450071 USB2 port 6: enabled 0
1130 17:47:03.453172 USB2 port 7: enabled 0
1131 17:47:03.453550 USB2 port 8: enabled 1
1132 17:47:03.456792 USB2 port 9: enabled 1
1133 17:47:03.460115 USB3 port 0: enabled 1
1134 17:47:03.463630 USB3 port 1: enabled 0
1135 17:47:03.466713 USB3 port 2: enabled 0
1136 17:47:03.467120 USB3 port 3: enabled 0
1137 17:47:03.470231 PCI: 00:14.1: enabled 0
1138 17:47:03.473295 PCI: 00:14.2: enabled 1
1139 17:47:03.477177 PCI: 00:14.3: enabled 1
1140 17:47:03.480198 GENERIC: 0.0: enabled 1
1141 17:47:03.480560 PCI: 00:15.0: enabled 1
1142 17:47:03.483421 I2C: 00:1a: enabled 1
1143 17:47:03.486625 I2C: 00:31: enabled 1
1144 17:47:03.490017 I2C: 00:32: enabled 1
1145 17:47:03.493495 PCI: 00:15.1: enabled 1
1146 17:47:03.493852 I2C: 00:50: enabled 1
1147 17:47:03.496664 PCI: 00:15.2: enabled 0
1148 17:47:03.500188 PCI: 00:15.3: enabled 1
1149 17:47:03.503264 I2C: 00:10: enabled 1
1150 17:47:03.503631 PCI: 00:16.0: enabled 1
1151 17:47:03.506340 PCI: 00:16.1: enabled 0
1152 17:47:03.509965 PCI: 00:16.2: enabled 0
1153 17:47:03.513121 PCI: 00:16.3: enabled 0
1154 17:47:03.516269 PCI: 00:16.4: enabled 0
1155 17:47:03.516514 PCI: 00:16.5: enabled 0
1156 17:47:03.519673 PCI: 00:17.0: enabled 1
1157 17:47:03.523286 PCI: 00:19.0: enabled 0
1158 17:47:03.526541 PCI: 00:19.1: enabled 1
1159 17:47:03.529950 I2C: 00:15: enabled 1
1160 17:47:03.530444 I2C: 00:2c: enabled 1
1161 17:47:03.532942 PCI: 00:19.2: enabled 0
1162 17:47:03.536515 PCI: 00:1a.0: enabled 0
1163 17:47:03.539931 PCI: 00:1e.0: enabled 1
1164 17:47:03.543412 PCI: 00:1e.1: enabled 0
1165 17:47:03.543789 PCI: 00:1e.2: enabled 0
1166 17:47:03.546340 PCI: 00:1e.3: enabled 1
1167 17:47:03.549486 SPI: 00: enabled 1
1168 17:47:03.552794 PCI: 00:1f.0: enabled 1
1169 17:47:03.553150 PNP: 0c09.0: enabled 1
1170 17:47:03.556233 PCI: 00:1f.1: enabled 0
1171 17:47:03.559600 PCI: 00:1f.2: enabled 1
1172 17:47:03.563250 GENERIC: 0.0: enabled 1
1173 17:47:03.566448 GENERIC: 0.0: enabled 1
1174 17:47:03.569530 GENERIC: 1.0: enabled 1
1175 17:47:03.569881 PCI: 00:1f.3: enabled 1
1176 17:47:03.572955 PCI: 00:1f.4: enabled 0
1177 17:47:03.576216 PCI: 00:1f.5: enabled 1
1178 17:47:03.579729 PCI: 00:1f.6: enabled 0
1179 17:47:03.580096 PCI: 00:1f.7: enabled 0
1180 17:47:03.583488 Root Device scanning...
1181 17:47:03.586509 scan_static_bus for Root Device
1182 17:47:03.589859 CPU_CLUSTER: 0 enabled
1183 17:47:03.592912 DOMAIN: 0000 enabled
1184 17:47:03.593312 DOMAIN: 0000 scanning...
1185 17:47:03.596407 PCI: pci_scan_bus for bus 00
1186 17:47:03.599593 PCI: 00:00.0 [8086/0000] ops
1187 17:47:03.602914 PCI: 00:00.0 [8086/4609] enabled
1188 17:47:03.606441 PCI: 00:02.0 [8086/0000] bus ops
1189 17:47:03.609343 PCI: 00:02.0 [8086/46b3] enabled
1190 17:47:03.612808 PCI: 00:04.0 [8086/0000] bus ops
1191 17:47:03.616302 PCI: 00:04.0 [8086/461d] enabled
1192 17:47:03.619553 PCI: 00:06.0 [8086/0000] bus ops
1193 17:47:03.622974 PCI: 00:06.0 [8086/464d] enabled
1194 17:47:03.626478 PCI: 00:08.0 [8086/464f] disabled
1195 17:47:03.629556 PCI: 00:0a.0 [8086/467d] enabled
1196 17:47:03.632637 PCI: 00:0d.0 [8086/0000] bus ops
1197 17:47:03.636260 PCI: 00:0d.0 [8086/461e] enabled
1198 17:47:03.639635 PCI: 00:14.0 [8086/0000] bus ops
1199 17:47:03.642779 PCI: 00:14.0 [8086/51ed] enabled
1200 17:47:03.646234 PCI: 00:14.2 [8086/51ef] enabled
1201 17:47:03.649853 PCI: 00:14.3 [8086/0000] bus ops
1202 17:47:03.652704 PCI: 00:14.3 [8086/51f0] enabled
1203 17:47:03.656090 PCI: 00:15.0 [8086/0000] bus ops
1204 17:47:03.659607 PCI: 00:15.0 [8086/51e8] enabled
1205 17:47:03.663045 PCI: 00:15.1 [8086/0000] bus ops
1206 17:47:03.666201 PCI: 00:15.1 [8086/51e9] enabled
1207 17:47:03.669314 PCI: 00:15.2 [8086/0000] bus ops
1208 17:47:03.673070 PCI: 00:15.2 [8086/51ea] disabled
1209 17:47:03.676037 PCI: 00:15.3 [8086/0000] bus ops
1210 17:47:03.679600 PCI: 00:15.3 [8086/51eb] enabled
1211 17:47:03.682904 PCI: 00:16.0 [8086/0000] ops
1212 17:47:03.686112 PCI: 00:16.0 [8086/51e0] enabled
1213 17:47:03.692855 PCI: Static device PCI: 00:17.0 not found, disabling it.
1214 17:47:03.696051 PCI: 00:19.0 [8086/0000] bus ops
1215 17:47:03.699423 PCI: 00:19.0 [8086/51c5] disabled
1216 17:47:03.702546 PCI: 00:19.1 [8086/0000] bus ops
1217 17:47:03.706220 PCI: 00:19.1 [8086/51c6] enabled
1218 17:47:03.709528 PCI: 00:1e.0 [8086/0000] ops
1219 17:47:03.712938 PCI: 00:1e.0 [8086/51a8] enabled
1220 17:47:03.716134 PCI: 00:1e.3 [8086/0000] bus ops
1221 17:47:03.719329 PCI: 00:1e.3 [8086/51ab] enabled
1222 17:47:03.722476 PCI: 00:1f.0 [8086/0000] bus ops
1223 17:47:03.726291 PCI: 00:1f.0 [8086/5182] enabled
1224 17:47:03.729227 RTC Init
1225 17:47:03.732294 Set power on after power failure.
1226 17:47:03.732725 Disabling Deep S3
1227 17:47:03.735784 Disabling Deep S3
1228 17:47:03.739217 Disabling Deep S4
1229 17:47:03.739468 Disabling Deep S4
1230 17:47:03.742579 Disabling Deep S5
1231 17:47:03.742785 Disabling Deep S5
1232 17:47:03.745674 PCI: 00:1f.2 [0000/0000] hidden
1233 17:47:03.749125 PCI: 00:1f.3 [8086/0000] bus ops
1234 17:47:03.752700 PCI: 00:1f.3 [8086/51c8] enabled
1235 17:47:03.756187 PCI: 00:1f.5 [8086/0000] bus ops
1236 17:47:03.759277 PCI: 00:1f.5 [8086/51a4] enabled
1237 17:47:03.762533 GPIO: 0 enabled
1238 17:47:03.765466 PCI: Leftover static devices:
1239 17:47:03.765780 PCI: 00:01.0
1240 17:47:03.765999 PCI: 00:01.1
1241 17:47:03.769145 PCI: 00:05.0
1242 17:47:03.769491 PCI: 00:06.2
1243 17:47:03.772683 PCI: 00:09.0
1244 17:47:03.773308 PCI: 00:0d.1
1245 17:47:03.775686 PCI: 00:0d.2
1246 17:47:03.776035 PCI: 00:0d.3
1247 17:47:03.776282 PCI: 00:0e.0
1248 17:47:03.779175 PCI: 00:10.0
1249 17:47:03.779523 PCI: 00:10.1
1250 17:47:03.782514 PCI: 00:10.6
1251 17:47:03.782977 PCI: 00:10.7
1252 17:47:03.783229 PCI: 00:12.0
1253 17:47:03.785498 PCI: 00:12.6
1254 17:47:03.785844 PCI: 00:12.7
1255 17:47:03.789222 PCI: 00:13.0
1256 17:47:03.789736 PCI: 00:14.1
1257 17:47:03.792633 PCI: 00:16.1
1258 17:47:03.793101 PCI: 00:16.2
1259 17:47:03.793366 PCI: 00:16.3
1260 17:47:03.795476 PCI: 00:16.4
1261 17:47:03.795823 PCI: 00:16.5
1262 17:47:03.798845 PCI: 00:17.0
1263 17:47:03.799192 PCI: 00:19.2
1264 17:47:03.799433 PCI: 00:1a.0
1265 17:47:03.802217 PCI: 00:1e.1
1266 17:47:03.802561 PCI: 00:1e.2
1267 17:47:03.805288 PCI: 00:1f.1
1268 17:47:03.805364 PCI: 00:1f.4
1269 17:47:03.805427 PCI: 00:1f.6
1270 17:47:03.808724 PCI: 00:1f.7
1271 17:47:03.812148 PCI: Check your devicetree.cb.
1272 17:47:03.815441 PCI: 00:02.0 scanning...
1273 17:47:03.818986 scan_generic_bus for PCI: 00:02.0
1274 17:47:03.822122 scan_generic_bus for PCI: 00:02.0 done
1275 17:47:03.825424 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1276 17:47:03.828561 PCI: 00:04.0 scanning...
1277 17:47:03.832069 scan_generic_bus for PCI: 00:04.0
1278 17:47:03.835498 GENERIC: 0.0 enabled
1279 17:47:03.839157 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1280 17:47:03.845486 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1281 17:47:03.848734 PCI: 00:06.0 scanning...
1282 17:47:03.852149 do_pci_scan_bridge for PCI: 00:06.0
1283 17:47:03.855459 PCI: pci_scan_bus for bus 01
1284 17:47:03.859044 PCI: 01:00.0 [15b7/5009] enabled
1285 17:47:03.861850 Enabling Common Clock Configuration
1286 17:47:03.865152 L1 Sub-State supported from root port 6
1287 17:47:03.868572 L1 Sub-State Support = 0x5
1288 17:47:03.872019 CommonModeRestoreTime = 0x6e
1289 17:47:03.875058 Power On Value = 0x5, Power On Scale = 0x2
1290 17:47:03.878575 ASPM: Enabled L1
1291 17:47:03.882171 PCIe: Max_Payload_Size adjusted to 256
1292 17:47:03.882524 PCI: 01:00.0: Enabled LTR
1293 17:47:03.888732 PCI: 01:00.0: Programmed LTR max latencies
1294 17:47:03.892060 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1295 17:47:03.895036 PCI: 00:0d.0 scanning...
1296 17:47:03.898648 scan_static_bus for PCI: 00:0d.0
1297 17:47:03.901917 USB0 port 0 enabled
1298 17:47:03.902262 USB0 port 0 scanning...
1299 17:47:03.905100 scan_static_bus for USB0 port 0
1300 17:47:03.908577 USB3 port 0 enabled
1301 17:47:03.912065 USB3 port 1 disabled
1302 17:47:03.912520 USB3 port 2 enabled
1303 17:47:03.915630 USB3 port 3 disabled
1304 17:47:03.919004 USB3 port 0 scanning...
1305 17:47:03.922078 scan_static_bus for USB3 port 0
1306 17:47:03.925484 scan_static_bus for USB3 port 0 done
1307 17:47:03.928695 scan_bus: bus USB3 port 0 finished in 6 msecs
1308 17:47:03.931743 USB3 port 2 scanning...
1309 17:47:03.935147 scan_static_bus for USB3 port 2
1310 17:47:03.938644 scan_static_bus for USB3 port 2 done
1311 17:47:03.941984 scan_bus: bus USB3 port 2 finished in 6 msecs
1312 17:47:03.945222 scan_static_bus for USB0 port 0 done
1313 17:47:03.952192 scan_bus: bus USB0 port 0 finished in 43 msecs
1314 17:47:03.955399 scan_static_bus for PCI: 00:0d.0 done
1315 17:47:03.958350 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1316 17:47:03.961486 PCI: 00:14.0 scanning...
1317 17:47:03.965253 scan_static_bus for PCI: 00:14.0
1318 17:47:03.968375 USB0 port 0 enabled
1319 17:47:03.968722 USB0 port 0 scanning...
1320 17:47:03.971730 scan_static_bus for USB0 port 0
1321 17:47:03.975015 USB2 port 0 enabled
1322 17:47:03.978218 USB2 port 1 disabled
1323 17:47:03.978565 USB2 port 2 enabled
1324 17:47:03.981688 USB2 port 3 disabled
1325 17:47:03.984786 USB2 port 4 disabled
1326 17:47:03.985161 USB2 port 5 enabled
1327 17:47:03.988556 USB2 port 6 disabled
1328 17:47:03.991695 USB2 port 7 disabled
1329 17:47:03.992164 USB2 port 8 enabled
1330 17:47:03.995416 USB2 port 9 enabled
1331 17:47:03.995877 USB3 port 0 enabled
1332 17:47:03.998601 USB3 port 1 disabled
1333 17:47:04.001897 USB3 port 2 disabled
1334 17:47:04.002356 USB3 port 3 disabled
1335 17:47:04.004685 USB2 port 0 scanning...
1336 17:47:04.008605 scan_static_bus for USB2 port 0
1337 17:47:04.011515 scan_static_bus for USB2 port 0 done
1338 17:47:04.018297 scan_bus: bus USB2 port 0 finished in 6 msecs
1339 17:47:04.018645 USB2 port 2 scanning...
1340 17:47:04.021451 scan_static_bus for USB2 port 2
1341 17:47:04.024769 scan_static_bus for USB2 port 2 done
1342 17:47:04.031596 scan_bus: bus USB2 port 2 finished in 6 msecs
1343 17:47:04.032011 USB2 port 5 scanning...
1344 17:47:04.034869 scan_static_bus for USB2 port 5
1345 17:47:04.041500 scan_static_bus for USB2 port 5 done
1346 17:47:04.044944 scan_bus: bus USB2 port 5 finished in 6 msecs
1347 17:47:04.047914 USB2 port 8 scanning...
1348 17:47:04.051246 scan_static_bus for USB2 port 8
1349 17:47:04.054634 scan_static_bus for USB2 port 8 done
1350 17:47:04.058134 scan_bus: bus USB2 port 8 finished in 6 msecs
1351 17:47:04.061215 USB2 port 9 scanning...
1352 17:47:04.064880 scan_static_bus for USB2 port 9
1353 17:47:04.067904 scan_static_bus for USB2 port 9 done
1354 17:47:04.071394 scan_bus: bus USB2 port 9 finished in 6 msecs
1355 17:47:04.074746 USB3 port 0 scanning...
1356 17:47:04.077889 scan_static_bus for USB3 port 0
1357 17:47:04.081079 scan_static_bus for USB3 port 0 done
1358 17:47:04.087799 scan_bus: bus USB3 port 0 finished in 6 msecs
1359 17:47:04.091703 scan_static_bus for USB0 port 0 done
1360 17:47:04.094663 scan_bus: bus USB0 port 0 finished in 120 msecs
1361 17:47:04.097994 scan_static_bus for PCI: 00:14.0 done
1362 17:47:04.104606 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1363 17:47:04.108118 PCI: 00:14.3 scanning...
1364 17:47:04.111352 scan_static_bus for PCI: 00:14.3
1365 17:47:04.111716 GENERIC: 0.0 enabled
1366 17:47:04.114359 scan_static_bus for PCI: 00:14.3 done
1367 17:47:04.120923 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1368 17:47:04.121338 PCI: 00:15.0 scanning...
1369 17:47:04.124355 scan_static_bus for PCI: 00:15.0
1370 17:47:04.127961 I2C: 00:1a enabled
1371 17:47:04.131063 I2C: 00:31 enabled
1372 17:47:04.131422 I2C: 00:32 enabled
1373 17:47:04.134252 scan_static_bus for PCI: 00:15.0 done
1374 17:47:04.140961 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1375 17:47:04.144227 PCI: 00:15.1 scanning...
1376 17:47:04.147904 scan_static_bus for PCI: 00:15.1
1377 17:47:04.148362 I2C: 00:50 enabled
1378 17:47:04.151292 scan_static_bus for PCI: 00:15.1 done
1379 17:47:04.157665 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1380 17:47:04.158024 PCI: 00:15.3 scanning...
1381 17:47:04.161227 scan_static_bus for PCI: 00:15.3
1382 17:47:04.164531 I2C: 00:10 enabled
1383 17:47:04.167575 scan_static_bus for PCI: 00:15.3 done
1384 17:47:04.174089 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1385 17:47:04.174447 PCI: 00:19.1 scanning...
1386 17:47:04.177599 scan_static_bus for PCI: 00:19.1
1387 17:47:04.181046 I2C: 00:15 enabled
1388 17:47:04.183973 I2C: 00:2c enabled
1389 17:47:04.187740 scan_static_bus for PCI: 00:19.1 done
1390 17:47:04.190689 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1391 17:47:04.194220 PCI: 00:1e.3 scanning...
1392 17:47:04.197684 scan_generic_bus for PCI: 00:1e.3
1393 17:47:04.200809 SPI: 00 enabled
1394 17:47:04.203999 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1395 17:47:04.210772 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1396 17:47:04.214157 PCI: 00:1f.0 scanning...
1397 17:47:04.217176 scan_static_bus for PCI: 00:1f.0
1398 17:47:04.217579 PNP: 0c09.0 enabled
1399 17:47:04.220516 PNP: 0c09.0 scanning...
1400 17:47:04.224086 scan_static_bus for PNP: 0c09.0
1401 17:47:04.227624 scan_static_bus for PNP: 0c09.0 done
1402 17:47:04.230545 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1403 17:47:04.233999 scan_static_bus for PCI: 00:1f.0 done
1404 17:47:04.240448 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1405 17:47:04.243620 PCI: 00:1f.2 scanning...
1406 17:47:04.246893 scan_static_bus for PCI: 00:1f.2
1407 17:47:04.247005 GENERIC: 0.0 enabled
1408 17:47:04.250175 GENERIC: 0.0 scanning...
1409 17:47:04.253977 scan_static_bus for GENERIC: 0.0
1410 17:47:04.256631 GENERIC: 0.0 enabled
1411 17:47:04.256716 GENERIC: 1.0 enabled
1412 17:47:04.264032 scan_static_bus for GENERIC: 0.0 done
1413 17:47:04.266951 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1414 17:47:04.270653 scan_static_bus for PCI: 00:1f.2 done
1415 17:47:04.277114 scan_bus: bus PCI: 00:1f.2 finished in 27 msecs
1416 17:47:04.277609 PCI: 00:1f.3 scanning...
1417 17:47:04.280409 scan_static_bus for PCI: 00:1f.3
1418 17:47:04.283777 scan_static_bus for PCI: 00:1f.3 done
1419 17:47:04.291060 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1420 17:47:04.293449 PCI: 00:1f.5 scanning...
1421 17:47:04.297279 scan_generic_bus for PCI: 00:1f.5
1422 17:47:04.300440 scan_generic_bus for PCI: 00:1f.5 done
1423 17:47:04.303668 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1424 17:47:04.310400 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1425 17:47:04.314061 scan_static_bus for Root Device done
1426 17:47:04.316987 scan_bus: bus Root Device finished in 729 msecs
1427 17:47:04.317366 done
1428 17:47:04.323445 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1429 17:47:04.330484 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1430 17:47:04.336541 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1431 17:47:04.340701 SPI flash protection: WPSW=0 SRP0=0
1432 17:47:04.343230 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1433 17:47:04.350128 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1434 17:47:04.353319 found VGA at PCI: 00:02.0
1435 17:47:04.356523 Setting up VGA for PCI: 00:02.0
1436 17:47:04.363415 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1437 17:47:04.366742 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1438 17:47:04.369851 Allocating resources...
1439 17:47:04.370232 Reading resources...
1440 17:47:04.376862 Root Device read_resources bus 0 link: 0
1441 17:47:04.380011 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1442 17:47:04.383361 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1443 17:47:04.389826 DOMAIN: 0000 read_resources bus 0 link: 0
1444 17:47:04.396807 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1445 17:47:04.399955 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1446 17:47:04.406473 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1447 17:47:04.413185 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1448 17:47:04.419802 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1449 17:47:04.426481 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1450 17:47:04.432962 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1451 17:47:04.439777 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1452 17:47:04.446801 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1453 17:47:04.453307 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1454 17:47:04.459729 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1455 17:47:04.466510 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1456 17:47:04.473342 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1457 17:47:04.476416 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1458 17:47:04.482979 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1459 17:47:04.489884 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1460 17:47:04.496389 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1461 17:47:04.502835 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1462 17:47:04.509731 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1463 17:47:04.516587 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1464 17:47:04.523440 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1465 17:47:04.526153 PCI: 00:04.0 read_resources bus 1 link: 0
1466 17:47:04.529551 PCI: 00:04.0 read_resources bus 1 link: 0 done
1467 17:47:04.536328 PCI: 00:06.0 read_resources bus 1 link: 0
1468 17:47:04.539423 PCI: 00:06.0 read_resources bus 1 link: 0 done
1469 17:47:04.543066 PCI: 00:0d.0 read_resources bus 0 link: 0
1470 17:47:04.546117 USB0 port 0 read_resources bus 0 link: 0
1471 17:47:04.552567 USB0 port 0 read_resources bus 0 link: 0 done
1472 17:47:04.555939 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1473 17:47:04.563087 PCI: 00:14.0 read_resources bus 0 link: 0
1474 17:47:04.565987 USB0 port 0 read_resources bus 0 link: 0
1475 17:47:04.569011 USB0 port 0 read_resources bus 0 link: 0 done
1476 17:47:04.576076 PCI: 00:14.0 read_resources bus 0 link: 0 done
1477 17:47:04.579367 PCI: 00:14.3 read_resources bus 0 link: 0
1478 17:47:04.582934 PCI: 00:14.3 read_resources bus 0 link: 0 done
1479 17:47:04.589454 PCI: 00:15.0 read_resources bus 0 link: 0
1480 17:47:04.592556 PCI: 00:15.0 read_resources bus 0 link: 0 done
1481 17:47:04.595514 PCI: 00:15.1 read_resources bus 0 link: 0
1482 17:47:04.602508 PCI: 00:15.1 read_resources bus 0 link: 0 done
1483 17:47:04.605772 PCI: 00:15.3 read_resources bus 0 link: 0
1484 17:47:04.612494 PCI: 00:15.3 read_resources bus 0 link: 0 done
1485 17:47:04.615742 PCI: 00:19.1 read_resources bus 0 link: 0
1486 17:47:04.618912 PCI: 00:19.1 read_resources bus 0 link: 0 done
1487 17:47:04.625827 PCI: 00:1e.3 read_resources bus 2 link: 0
1488 17:47:04.628720 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1489 17:47:04.631781 PCI: 00:1f.0 read_resources bus 0 link: 0
1490 17:47:04.638792 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1491 17:47:04.642167 PCI: 00:1f.2 read_resources bus 0 link: 0
1492 17:47:04.645829 GENERIC: 0.0 read_resources bus 0 link: 0
1493 17:47:04.652008 GENERIC: 0.0 read_resources bus 0 link: 0 done
1494 17:47:04.655334 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1495 17:47:04.661653 DOMAIN: 0000 read_resources bus 0 link: 0 done
1496 17:47:04.665052 Root Device read_resources bus 0 link: 0 done
1497 17:47:04.668304 Done reading resources.
1498 17:47:04.674966 Show resources in subtree (Root Device)...After reading.
1499 17:47:04.678682 Root Device child on link 0 CPU_CLUSTER: 0
1500 17:47:04.681791 CPU_CLUSTER: 0 child on link 0 APIC: 00
1501 17:47:04.684956 APIC: 00
1502 17:47:04.685332 APIC: 14
1503 17:47:04.685682 APIC: 16
1504 17:47:04.688491 APIC: 10
1505 17:47:04.688849 APIC: 12
1506 17:47:04.689101 APIC: 01
1507 17:47:04.691634 APIC: 09
1508 17:47:04.691713 APIC: 08
1509 17:47:04.695199 DOMAIN: 0000 child on link 0 GPIO: 0
1510 17:47:04.705035 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1511 17:47:04.714991 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1512 17:47:04.718452 GPIO: 0
1513 17:47:04.718553 PCI: 00:00.0
1514 17:47:04.728260 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1515 17:47:04.738539 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1516 17:47:04.748395 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1517 17:47:04.755143 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1518 17:47:04.764921 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1519 17:47:04.774460 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1520 17:47:04.784514 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1521 17:47:04.794441 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1522 17:47:04.804458 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1523 17:47:04.814647 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1524 17:47:04.821173 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1525 17:47:04.830854 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1526 17:47:04.841448 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1527 17:47:04.850968 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1528 17:47:04.860730 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1529 17:47:04.867395 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1530 17:47:04.877299 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1531 17:47:04.887272 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1532 17:47:04.897367 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1533 17:47:04.907399 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1534 17:47:04.917516 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1535 17:47:04.927721 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1536 17:47:04.936970 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1537 17:47:04.947252 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1538 17:47:04.957068 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1539 17:47:04.963559 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1540 17:47:04.973690 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1541 17:47:04.984414 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1542 17:47:04.987408 PCI: 00:02.0
1543 17:47:04.996956 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1544 17:47:05.006953 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1545 17:47:05.013731 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1546 17:47:05.020459 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1547 17:47:05.030098 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1548 17:47:05.030543 GENERIC: 0.0
1549 17:47:05.036939 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1550 17:47:05.043475 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1551 17:47:05.053268 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1552 17:47:05.063503 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1553 17:47:05.063947 PCI: 01:00.0
1554 17:47:05.073481 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1555 17:47:05.083170 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1556 17:47:05.086547 PCI: 00:08.0
1557 17:47:05.086907 PCI: 00:0a.0
1558 17:47:05.096134 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1559 17:47:05.102621 PCI: 00:0d.0 child on link 0 USB0 port 0
1560 17:47:05.112676 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1561 17:47:05.116021 USB0 port 0 child on link 0 USB3 port 0
1562 17:47:05.119701 USB3 port 0
1563 17:47:05.119777 USB3 port 1
1564 17:47:05.122728 USB3 port 2
1565 17:47:05.122804 USB3 port 3
1566 17:47:05.129069 PCI: 00:14.0 child on link 0 USB0 port 0
1567 17:47:05.139109 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1568 17:47:05.142566 USB0 port 0 child on link 0 USB2 port 0
1569 17:47:05.142652 USB2 port 0
1570 17:47:05.145769 USB2 port 1
1571 17:47:05.149394 USB2 port 2
1572 17:47:05.149470 USB2 port 3
1573 17:47:05.152361 USB2 port 4
1574 17:47:05.152437 USB2 port 5
1575 17:47:05.156027 USB2 port 6
1576 17:47:05.156106 USB2 port 7
1577 17:47:05.159041 USB2 port 8
1578 17:47:05.159119 USB2 port 9
1579 17:47:05.162533 USB3 port 0
1580 17:47:05.162610 USB3 port 1
1581 17:47:05.165864 USB3 port 2
1582 17:47:05.165939 USB3 port 3
1583 17:47:05.169614 PCI: 00:14.2
1584 17:47:05.179326 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1585 17:47:05.188880 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1586 17:47:05.192311 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1587 17:47:05.202262 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1588 17:47:05.205538 GENERIC: 0.0
1589 17:47:05.209097 PCI: 00:15.0 child on link 0 I2C: 00:1a
1590 17:47:05.218909 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1591 17:47:05.218997 I2C: 00:1a
1592 17:47:05.222421 I2C: 00:31
1593 17:47:05.222496 I2C: 00:32
1594 17:47:05.229076 PCI: 00:15.1 child on link 0 I2C: 00:50
1595 17:47:05.238888 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1596 17:47:05.238981 I2C: 00:50
1597 17:47:05.242311 PCI: 00:15.2
1598 17:47:05.245669 PCI: 00:15.3 child on link 0 I2C: 00:10
1599 17:47:05.256240 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1600 17:47:05.256675 I2C: 00:10
1601 17:47:05.259237 PCI: 00:16.0
1602 17:47:05.269114 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1603 17:47:05.269503 PCI: 00:19.0
1604 17:47:05.275558 PCI: 00:19.1 child on link 0 I2C: 00:15
1605 17:47:05.285293 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1606 17:47:05.285392 I2C: 00:15
1607 17:47:05.288804 I2C: 00:2c
1608 17:47:05.288880 PCI: 00:1e.0
1609 17:47:05.302473 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1610 17:47:05.305529 PCI: 00:1e.3 child on link 0 SPI: 00
1611 17:47:05.315351 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1612 17:47:05.315435 SPI: 00
1613 17:47:05.318877 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1614 17:47:05.328441 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1615 17:47:05.332075 PNP: 0c09.0
1616 17:47:05.338534 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1617 17:47:05.345165 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1618 17:47:05.352567 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1619 17:47:05.362232 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1620 17:47:05.368763 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1621 17:47:05.368844 GENERIC: 0.0
1622 17:47:05.371936 GENERIC: 1.0
1623 17:47:05.372012 PCI: 00:1f.3
1624 17:47:05.382050 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1625 17:47:05.391874 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1626 17:47:05.395317 PCI: 00:1f.5
1627 17:47:05.401762 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1628 17:47:05.411943 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1629 17:47:05.415084 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1630 17:47:05.422202 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1631 17:47:05.428705 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1632 17:47:05.432184 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1633 17:47:05.438584 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1634 17:47:05.445376 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1635 17:47:05.451905 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1636 17:47:05.458364 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1637 17:47:05.465025 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1638 17:47:05.471422 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1639 17:47:05.482013 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1640 17:47:05.488663 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1641 17:47:05.494666 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1642 17:47:05.497997 DOMAIN: 0000: Resource ranges:
1643 17:47:05.501236 * Base: 1000, Size: 800, Tag: 100
1644 17:47:05.504608 * Base: 1900, Size: e700, Tag: 100
1645 17:47:05.511219 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1646 17:47:05.517553 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1647 17:47:05.524136 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1648 17:47:05.530951 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1649 17:47:05.541144 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1650 17:47:05.547756 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1651 17:47:05.554166 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1652 17:47:05.564175 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1653 17:47:05.571631 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1654 17:47:05.577474 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1655 17:47:05.588060 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1656 17:47:05.594369 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1657 17:47:05.601207 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1658 17:47:05.610681 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1659 17:47:05.617291 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1660 17:47:05.623975 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1661 17:47:05.633920 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1662 17:47:05.640652 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1663 17:47:05.647055 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1664 17:47:05.657076 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1665 17:47:05.663907 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1666 17:47:05.670585 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1667 17:47:05.680566 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1668 17:47:05.687345 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1669 17:47:05.693708 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1670 17:47:05.703884 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1671 17:47:05.710498 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1672 17:47:05.716725 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1673 17:47:05.726985 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1674 17:47:05.733412 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1675 17:47:05.740363 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1676 17:47:05.750157 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1677 17:47:05.756676 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1678 17:47:05.759732 DOMAIN: 0000: Resource ranges:
1679 17:47:05.763228 * Base: 80400000, Size: 3fc00000, Tag: 200
1680 17:47:05.766386 * Base: d0000000, Size: 28000000, Tag: 200
1681 17:47:05.772755 * Base: fa000000, Size: 1000000, Tag: 200
1682 17:47:05.776993 * Base: fb001000, Size: 17ff000, Tag: 200
1683 17:47:05.779649 * Base: fe800000, Size: 300000, Tag: 200
1684 17:47:05.786747 * Base: feb80000, Size: 80000, Tag: 200
1685 17:47:05.789842 * Base: fed00000, Size: 40000, Tag: 200
1686 17:47:05.793267 * Base: fed70000, Size: 10000, Tag: 200
1687 17:47:05.796859 * Base: fed88000, Size: 8000, Tag: 200
1688 17:47:05.800018 * Base: fed93000, Size: d000, Tag: 200
1689 17:47:05.806626 * Base: feda2000, Size: 1e000, Tag: 200
1690 17:47:05.809798 * Base: fede0000, Size: 1220000, Tag: 200
1691 17:47:05.813149 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1692 17:47:05.822897 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1693 17:47:05.830103 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1694 17:47:05.837001 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1695 17:47:05.842510 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1696 17:47:05.849435 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1697 17:47:05.855754 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1698 17:47:05.862363 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1699 17:47:05.869021 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1700 17:47:05.876210 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1701 17:47:05.883089 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1702 17:47:05.889459 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1703 17:47:05.895928 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1704 17:47:05.902703 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1705 17:47:05.909207 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1706 17:47:05.915929 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1707 17:47:05.922099 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1708 17:47:05.929050 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1709 17:47:05.935817 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1710 17:47:05.942557 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1711 17:47:05.949482 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1712 17:47:05.955720 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1713 17:47:05.959204 PCI: 00:06.0: Resource ranges:
1714 17:47:05.962704 * Base: 80400000, Size: 100000, Tag: 200
1715 17:47:05.968817 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1716 17:47:05.975363 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1717 17:47:05.985751 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1718 17:47:05.992327 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1719 17:47:05.995677 Root Device assign_resources, bus 0 link: 0
1720 17:47:06.002172 DOMAIN: 0000 assign_resources, bus 0 link: 0
1721 17:47:06.008908 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1722 17:47:06.018882 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1723 17:47:06.025350 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1724 17:47:06.031866 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1725 17:47:06.038497 PCI: 00:04.0 assign_resources, bus 1 link: 0
1726 17:47:06.042274 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1727 17:47:06.051947 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1728 17:47:06.061635 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1729 17:47:06.068262 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1730 17:47:06.075039 PCI: 00:06.0 assign_resources, bus 1 link: 0
1731 17:47:06.081303 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1732 17:47:06.091029 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1733 17:47:06.094589 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1734 17:47:06.104423 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1735 17:47:06.111238 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1736 17:47:06.114937 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1737 17:47:06.121301 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1738 17:47:06.128356 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1739 17:47:06.134613 PCI: 00:14.0 assign_resources, bus 0 link: 0
1740 17:47:06.138044 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1741 17:47:06.147527 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1742 17:47:06.154304 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1743 17:47:06.160605 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1744 17:47:06.167132 PCI: 00:14.3 assign_resources, bus 0 link: 0
1745 17:47:06.170882 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1746 17:47:06.180801 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1747 17:47:06.184392 PCI: 00:15.0 assign_resources, bus 0 link: 0
1748 17:47:06.191168 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1749 17:47:06.197218 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1750 17:47:06.200805 PCI: 00:15.1 assign_resources, bus 0 link: 0
1751 17:47:06.207207 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1752 17:47:06.214399 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1753 17:47:06.220459 PCI: 00:15.3 assign_resources, bus 0 link: 0
1754 17:47:06.223848 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1755 17:47:06.233912 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1756 17:47:06.240666 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1757 17:47:06.243862 PCI: 00:19.1 assign_resources, bus 0 link: 0
1758 17:47:06.250695 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1759 17:47:06.257001 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1760 17:47:06.263670 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1761 17:47:06.266739 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1762 17:47:06.270676 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1763 17:47:06.276929 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1764 17:47:06.280227 LPC: Trying to open IO window from 800 size 1ff
1765 17:47:06.289967 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1766 17:47:06.296726 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1767 17:47:06.307111 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1768 17:47:06.309934 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1769 17:47:06.316448 Root Device assign_resources, bus 0 link: 0 done
1770 17:47:06.316543 Done setting resources.
1771 17:47:06.323256 Show resources in subtree (Root Device)...After assigning values.
1772 17:47:06.330065 Root Device child on link 0 CPU_CLUSTER: 0
1773 17:47:06.333286 CPU_CLUSTER: 0 child on link 0 APIC: 00
1774 17:47:06.333657 APIC: 00
1775 17:47:06.336802 APIC: 14
1776 17:47:06.337165 APIC: 16
1777 17:47:06.337495 APIC: 10
1778 17:47:06.340071 APIC: 12
1779 17:47:06.340483 APIC: 01
1780 17:47:06.343248 APIC: 09
1781 17:47:06.343659 APIC: 08
1782 17:47:06.346531 DOMAIN: 0000 child on link 0 GPIO: 0
1783 17:47:06.356707 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1784 17:47:06.366463 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1785 17:47:06.366864 GPIO: 0
1786 17:47:06.369782 PCI: 00:00.0
1787 17:47:06.380116 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1788 17:47:06.386397 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1789 17:47:06.396327 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1790 17:47:06.406176 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1791 17:47:06.416020 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1792 17:47:06.425785 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1793 17:47:06.436080 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1794 17:47:06.446288 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1795 17:47:06.452496 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1796 17:47:06.462555 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1797 17:47:06.472593 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1798 17:47:06.482559 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1799 17:47:06.492495 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1800 17:47:06.502545 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1801 17:47:06.508857 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1802 17:47:06.518722 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1803 17:47:06.528918 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1804 17:47:06.538707 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1805 17:47:06.548713 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1806 17:47:06.558655 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1807 17:47:06.568588 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1808 17:47:06.578659 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1809 17:47:06.585249 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1810 17:47:06.595411 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1811 17:47:06.604848 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1812 17:47:06.614681 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1813 17:47:06.624311 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1814 17:47:06.634450 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1815 17:47:06.634589 PCI: 00:02.0
1816 17:47:06.647721 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1817 17:47:06.657885 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1818 17:47:06.667932 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1819 17:47:06.670943 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1820 17:47:06.680791 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1821 17:47:06.684445 GENERIC: 0.0
1822 17:47:06.687643 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1823 17:47:06.697663 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1824 17:47:06.708140 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1825 17:47:06.721139 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1826 17:47:06.721269 PCI: 01:00.0
1827 17:47:06.730755 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1828 17:47:06.740947 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1829 17:47:06.744351 PCI: 00:08.0
1830 17:47:06.744755 PCI: 00:0a.0
1831 17:47:06.754271 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1832 17:47:06.760725 PCI: 00:0d.0 child on link 0 USB0 port 0
1833 17:47:06.770852 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1834 17:47:06.773897 USB0 port 0 child on link 0 USB3 port 0
1835 17:47:06.777719 USB3 port 0
1836 17:47:06.778067 USB3 port 1
1837 17:47:06.780766 USB3 port 2
1838 17:47:06.781174 USB3 port 3
1839 17:47:06.787245 PCI: 00:14.0 child on link 0 USB0 port 0
1840 17:47:06.797316 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1841 17:47:06.800891 USB0 port 0 child on link 0 USB2 port 0
1842 17:47:06.803569 USB2 port 0
1843 17:47:06.803985 USB2 port 1
1844 17:47:06.807005 USB2 port 2
1845 17:47:06.807351 USB2 port 3
1846 17:47:06.810356 USB2 port 4
1847 17:47:06.810659 USB2 port 5
1848 17:47:06.813612 USB2 port 6
1849 17:47:06.813686 USB2 port 7
1850 17:47:06.816936 USB2 port 8
1851 17:47:06.820322 USB2 port 9
1852 17:47:06.820443 USB3 port 0
1853 17:47:06.823731 USB3 port 1
1854 17:47:06.824055 USB3 port 2
1855 17:47:06.826753 USB3 port 3
1856 17:47:06.827066 PCI: 00:14.2
1857 17:47:06.836573 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1858 17:47:06.846930 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1859 17:47:06.853130 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1860 17:47:06.863181 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1861 17:47:06.863271 GENERIC: 0.0
1862 17:47:06.869895 PCI: 00:15.0 child on link 0 I2C: 00:1a
1863 17:47:06.880068 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1864 17:47:06.880168 I2C: 00:1a
1865 17:47:06.883162 I2C: 00:31
1866 17:47:06.883240 I2C: 00:32
1867 17:47:06.886695 PCI: 00:15.1 child on link 0 I2C: 00:50
1868 17:47:06.899932 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1869 17:47:06.900374 I2C: 00:50
1870 17:47:06.903796 PCI: 00:15.2
1871 17:47:06.906714 PCI: 00:15.3 child on link 0 I2C: 00:10
1872 17:47:06.917034 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1873 17:47:06.917560 I2C: 00:10
1874 17:47:06.920219 PCI: 00:16.0
1875 17:47:06.929672 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1876 17:47:06.932946 PCI: 00:19.0
1877 17:47:06.937183 PCI: 00:19.1 child on link 0 I2C: 00:15
1878 17:47:06.946310 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1879 17:47:06.946697 I2C: 00:15
1880 17:47:06.949498 I2C: 00:2c
1881 17:47:06.949885 PCI: 00:1e.0
1882 17:47:06.963087 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1883 17:47:06.966703 PCI: 00:1e.3 child on link 0 SPI: 00
1884 17:47:06.976349 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1885 17:47:06.980217 SPI: 00
1886 17:47:06.983181 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1887 17:47:06.989476 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1888 17:47:06.992967 PNP: 0c09.0
1889 17:47:07.002835 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1890 17:47:07.006326 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1891 17:47:07.016182 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1892 17:47:07.026204 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1893 17:47:07.029204 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1894 17:47:07.032335 GENERIC: 0.0
1895 17:47:07.032410 GENERIC: 1.0
1896 17:47:07.036072 PCI: 00:1f.3
1897 17:47:07.045789 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1898 17:47:07.055859 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1899 17:47:07.056228 PCI: 00:1f.5
1900 17:47:07.069165 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1901 17:47:07.069623 Done allocating resources.
1902 17:47:07.075909 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1903 17:47:07.082232 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1904 17:47:07.085942 Configure audio over I2S with MAX98373 NAU88L25B.
1905 17:47:07.091319 Enabling BT offload
1906 17:47:07.098365 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1907 17:47:07.101768 Enabling resources...
1908 17:47:07.105053 PCI: 00:00.0 subsystem <- 8086/4609
1909 17:47:07.108454 PCI: 00:00.0 cmd <- 06
1910 17:47:07.111532 PCI: 00:02.0 subsystem <- 8086/46b3
1911 17:47:07.115339 PCI: 00:02.0 cmd <- 03
1912 17:47:07.118464 PCI: 00:04.0 subsystem <- 8086/461d
1913 17:47:07.118969 PCI: 00:04.0 cmd <- 02
1914 17:47:07.121506 PCI: 00:06.0 bridge ctrl <- 0013
1915 17:47:07.128476 PCI: 00:06.0 subsystem <- 8086/464d
1916 17:47:07.128934 PCI: 00:06.0 cmd <- 106
1917 17:47:07.131494 PCI: 00:0a.0 subsystem <- 8086/467d
1918 17:47:07.134984 PCI: 00:0a.0 cmd <- 02
1919 17:47:07.138456 PCI: 00:0d.0 subsystem <- 8086/461e
1920 17:47:07.141807 PCI: 00:0d.0 cmd <- 02
1921 17:47:07.145025 PCI: 00:14.0 subsystem <- 8086/51ed
1922 17:47:07.148832 PCI: 00:14.0 cmd <- 02
1923 17:47:07.151350 PCI: 00:14.2 subsystem <- 8086/51ef
1924 17:47:07.151738 PCI: 00:14.2 cmd <- 02
1925 17:47:07.158238 PCI: 00:14.3 subsystem <- 8086/51f0
1926 17:47:07.158695 PCI: 00:14.3 cmd <- 02
1927 17:47:07.161274 PCI: 00:15.0 subsystem <- 8086/51e8
1928 17:47:07.164625 PCI: 00:15.0 cmd <- 02
1929 17:47:07.167968 PCI: 00:15.1 subsystem <- 8086/51e9
1930 17:47:07.170987 PCI: 00:15.1 cmd <- 06
1931 17:47:07.174705 PCI: 00:15.3 subsystem <- 8086/51eb
1932 17:47:07.177720 PCI: 00:15.3 cmd <- 02
1933 17:47:07.181332 PCI: 00:16.0 subsystem <- 8086/51e0
1934 17:47:07.184478 PCI: 00:16.0 cmd <- 02
1935 17:47:07.187632 PCI: 00:19.1 subsystem <- 8086/51c6
1936 17:47:07.187706 PCI: 00:19.1 cmd <- 02
1937 17:47:07.191473 PCI: 00:1e.0 subsystem <- 8086/51a8
1938 17:47:07.194610 PCI: 00:1e.0 cmd <- 06
1939 17:47:07.198024 PCI: 00:1e.3 subsystem <- 8086/51ab
1940 17:47:07.201205 PCI: 00:1e.3 cmd <- 02
1941 17:47:07.204588 PCI: 00:1f.0 subsystem <- 8086/5182
1942 17:47:07.207958 PCI: 00:1f.0 cmd <- 407
1943 17:47:07.211088 PCI: 00:1f.3 subsystem <- 8086/51c8
1944 17:47:07.214684 PCI: 00:1f.3 cmd <- 02
1945 17:47:07.217755 PCI: 00:1f.5 subsystem <- 8086/51a4
1946 17:47:07.218102 PCI: 00:1f.5 cmd <- 406
1947 17:47:07.221267 PCI: 01:00.0 cmd <- 02
1948 17:47:07.221677 done.
1949 17:47:07.228034 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1950 17:47:07.231044 ME: Version: Unavailable
1951 17:47:07.234352 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1952 17:47:07.237396 Initializing devices...
1953 17:47:07.240874 Root Device init
1954 17:47:07.240939 mainboard: EC init
1955 17:47:07.247378 Chrome EC: Set SMI mask to 0x0000000000000000
1956 17:47:07.250722 Chrome EC: UHEPI supported
1957 17:47:07.257114 Chrome EC: clear events_b mask to 0x0000000000000000
1958 17:47:07.264020 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1959 17:47:07.267165 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1960 17:47:07.274970 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1961 17:47:07.282000 Chrome EC: Set WAKE mask to 0x0000000000000000
1962 17:47:07.288397 Root Device init finished in 42 msecs
1963 17:47:07.288463 PCI: 00:00.0 init
1964 17:47:07.291638 CPU TDP = 15 Watts
1965 17:47:07.294981 CPU PL1 = 15 Watts
1966 17:47:07.295040 CPU PL2 = 55 Watts
1967 17:47:07.298086 CPU PL4 = 123 Watts
1968 17:47:07.301484 PCI: 00:00.0 init finished in 8 msecs
1969 17:47:07.304822 PCI: 00:02.0 init
1970 17:47:07.304884 GMA: Found VBT in CBFS
1971 17:47:07.308165 GMA: Found valid VBT in CBFS
1972 17:47:07.314729 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1973 17:47:07.321474 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1974 17:47:07.324777 PCI: 00:02.0 init finished in 18 msecs
1975 17:47:07.328336 PCI: 00:06.0 init
1976 17:47:07.331593 Initializing PCH PCIe bridge.
1977 17:47:07.334892 PCI: 00:06.0 init finished in 3 msecs
1978 17:47:07.334951 PCI: 00:0a.0 init
1979 17:47:07.341203 PCI: 00:0a.0 init finished in 0 msecs
1980 17:47:07.341267 PCI: 00:14.0 init
1981 17:47:07.344730 PCI: 00:14.0 init finished in 0 msecs
1982 17:47:07.347960 PCI: 00:14.2 init
1983 17:47:07.351622 PCI: 00:14.2 init finished in 0 msecs
1984 17:47:07.354549 PCI: 00:15.0 init
1985 17:47:07.354607 I2C bus 0 version 0x3230302a
1986 17:47:07.361160 DW I2C bus 0 at 0x80655000 (400 KHz)
1987 17:47:07.364478 PCI: 00:15.0 init finished in 6 msecs
1988 17:47:07.364540 PCI: 00:15.1 init
1989 17:47:07.368414 I2C bus 1 version 0x3230302a
1990 17:47:07.371152 DW I2C bus 1 at 0x80656000 (400 KHz)
1991 17:47:07.374386 PCI: 00:15.1 init finished in 6 msecs
1992 17:47:07.377711 PCI: 00:15.3 init
1993 17:47:07.381071 I2C bus 3 version 0x3230302a
1994 17:47:07.384343 DW I2C bus 3 at 0x80657000 (400 KHz)
1995 17:47:07.387668 PCI: 00:15.3 init finished in 6 msecs
1996 17:47:07.390837 PCI: 00:16.0 init
1997 17:47:07.393916 PCI: 00:16.0 init finished in 0 msecs
1998 17:47:07.397459 PCI: 00:19.1 init
1999 17:47:07.397517 I2C bus 5 version 0x3230302a
2000 17:47:07.403950 DW I2C bus 5 at 0x80659000 (400 KHz)
2001 17:47:07.407369 PCI: 00:19.1 init finished in 6 msecs
2002 17:47:07.407426 PCI: 00:1f.0 init
2003 17:47:07.414133 IOAPIC: Initializing IOAPIC at 0xfec00000
2004 17:47:07.414195 IOAPIC: ID = 0x02
2005 17:47:07.417469 IOAPIC: Dumping registers
2006 17:47:07.420877 reg 0x0000: 0x02000000
2007 17:47:07.420934 reg 0x0001: 0x00770020
2008 17:47:07.424356 reg 0x0002: 0x00000000
2009 17:47:07.427151 IOAPIC: 120 interrupts
2010 17:47:07.430394 IOAPIC: Clearing IOAPIC at 0xfec00000
2011 17:47:07.437073 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2012 17:47:07.440311 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2013 17:47:07.443743 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2014 17:47:07.450495 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2015 17:47:07.453656 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2016 17:47:07.460107 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2017 17:47:07.463705 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2018 17:47:07.470168 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2019 17:47:07.473593 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2020 17:47:07.480305 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2021 17:47:07.483637 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2022 17:47:07.486989 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2023 17:47:07.493352 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2024 17:47:07.496758 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2025 17:47:07.503531 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2026 17:47:07.506805 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2027 17:47:07.513454 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2028 17:47:07.517019 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2029 17:47:07.523776 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2030 17:47:07.527388 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2031 17:47:07.530499 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2032 17:47:07.537207 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2033 17:47:07.540485 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2034 17:47:07.546866 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2035 17:47:07.550317 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2036 17:47:07.557285 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2037 17:47:07.560541 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2038 17:47:07.567252 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2039 17:47:07.570270 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2040 17:47:07.573931 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2041 17:47:07.580347 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2042 17:47:07.583520 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2043 17:47:07.590555 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2044 17:47:07.593408 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2045 17:47:07.600144 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2046 17:47:07.603314 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2047 17:47:07.606567 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2048 17:47:07.613188 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2049 17:47:07.616711 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2050 17:47:07.623392 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2051 17:47:07.626555 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2052 17:47:07.633208 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2053 17:47:07.636413 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2054 17:47:07.643173 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2055 17:47:07.646398 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2056 17:47:07.649673 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2057 17:47:07.656485 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2058 17:47:07.659644 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2059 17:47:07.666600 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2060 17:47:07.669728 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2061 17:47:07.676366 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2062 17:47:07.679622 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2063 17:47:07.686461 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2064 17:47:07.689687 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2065 17:47:07.692925 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2066 17:47:07.699808 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2067 17:47:07.703062 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2068 17:47:07.709613 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2069 17:47:07.712953 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2070 17:47:07.719709 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2071 17:47:07.722774 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2072 17:47:07.729542 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2073 17:47:07.732782 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2074 17:47:07.736082 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2075 17:47:07.742758 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2076 17:47:07.746050 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2077 17:47:07.752906 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2078 17:47:07.755978 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2079 17:47:07.762813 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2080 17:47:07.765934 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2081 17:47:07.772639 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2082 17:47:07.775907 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2083 17:47:07.779449 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2084 17:47:07.785903 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2085 17:47:07.789254 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2086 17:47:07.795836 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2087 17:47:07.799021 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2088 17:47:07.805756 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2089 17:47:07.809150 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2090 17:47:07.815741 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2091 17:47:07.819115 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2092 17:47:07.822241 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2093 17:47:07.829101 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2094 17:47:07.832279 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2095 17:47:07.839217 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2096 17:47:07.842122 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2097 17:47:07.848937 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2098 17:47:07.852262 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2099 17:47:07.859049 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2100 17:47:07.862267 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2101 17:47:07.865387 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2102 17:47:07.872426 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2103 17:47:07.875377 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2104 17:47:07.882147 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2105 17:47:07.885405 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2106 17:47:07.892005 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2107 17:47:07.895479 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2108 17:47:07.902442 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2109 17:47:07.905595 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2110 17:47:07.908919 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2111 17:47:07.915562 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2112 17:47:07.918595 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2113 17:47:07.925196 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2114 17:47:07.928649 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2115 17:47:07.935441 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2116 17:47:07.938677 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2117 17:47:07.946066 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2118 17:47:07.948797 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2119 17:47:07.952005 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2120 17:47:07.958897 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2121 17:47:07.962072 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2122 17:47:07.968456 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2123 17:47:07.972015 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2124 17:47:07.978505 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2125 17:47:07.982028 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2126 17:47:07.985279 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2127 17:47:07.991567 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2128 17:47:07.995068 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2129 17:47:08.001787 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2130 17:47:08.005212 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2131 17:47:08.012089 IOAPIC: Bootstrap Processor Local APIC = 0x00
2132 17:47:08.015637 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2133 17:47:08.018847 PCI: 00:1f.0 init finished in 607 msecs
2134 17:47:08.021982 PCI: 00:1f.2 init
2135 17:47:08.025138 apm_control: Disabling ACPI.
2136 17:47:08.028857 APMC done.
2137 17:47:08.032338 PCI: 00:1f.2 init finished in 6 msecs
2138 17:47:08.035175 PCI: 00:1f.3 init
2139 17:47:08.038626 PCI: 00:1f.3 init finished in 0 msecs
2140 17:47:08.038702 PCI: 01:00.0 init
2141 17:47:08.041913 PCI: 01:00.0 init finished in 0 msecs
2142 17:47:08.045539 PNP: 0c09.0 init
2143 17:47:08.048672 Google Chrome EC uptime: 12.130 seconds
2144 17:47:08.055394 Google Chrome AP resets since EC boot: 1
2145 17:47:08.058674 Google Chrome most recent AP reset causes:
2146 17:47:08.061850 0.341: 32775 shutdown: entering G3
2147 17:47:08.068635 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2148 17:47:08.072335 PNP: 0c09.0 init finished in 23 msecs
2149 17:47:08.074903 GENERIC: 0.0 init
2150 17:47:08.078504 GENERIC: 0.0 init finished in 0 msecs
2151 17:47:08.078582 GENERIC: 1.0 init
2152 17:47:08.085311 GENERIC: 1.0 init finished in 0 msecs
2153 17:47:08.085373 Devices initialized
2154 17:47:08.088524 Show all devs... After init.
2155 17:47:08.091993 Root Device: enabled 1
2156 17:47:08.092048 CPU_CLUSTER: 0: enabled 1
2157 17:47:08.095186 DOMAIN: 0000: enabled 1
2158 17:47:08.098384 GPIO: 0: enabled 1
2159 17:47:08.102048 PCI: 00:00.0: enabled 1
2160 17:47:08.102116 PCI: 00:01.0: enabled 0
2161 17:47:08.104925 PCI: 00:01.1: enabled 0
2162 17:47:08.108650 PCI: 00:02.0: enabled 1
2163 17:47:08.108716 PCI: 00:04.0: enabled 1
2164 17:47:08.111764 PCI: 00:05.0: enabled 0
2165 17:47:08.115113 PCI: 00:06.0: enabled 1
2166 17:47:08.118239 PCI: 00:06.2: enabled 0
2167 17:47:08.118319 PCI: 00:07.0: enabled 0
2168 17:47:08.121565 PCI: 00:07.1: enabled 0
2169 17:47:08.125199 PCI: 00:07.2: enabled 0
2170 17:47:08.128367 PCI: 00:07.3: enabled 0
2171 17:47:08.128442 PCI: 00:08.0: enabled 0
2172 17:47:08.131583 PCI: 00:09.0: enabled 0
2173 17:47:08.135292 PCI: 00:0a.0: enabled 1
2174 17:47:08.138254 PCI: 00:0d.0: enabled 1
2175 17:47:08.138316 PCI: 00:0d.1: enabled 0
2176 17:47:08.141931 PCI: 00:0d.2: enabled 0
2177 17:47:08.145262 PCI: 00:0d.3: enabled 0
2178 17:47:08.148215 PCI: 00:0e.0: enabled 0
2179 17:47:08.148297 PCI: 00:10.0: enabled 0
2180 17:47:08.151326 PCI: 00:10.1: enabled 0
2181 17:47:08.154820 PCI: 00:10.6: enabled 0
2182 17:47:08.158073 PCI: 00:10.7: enabled 0
2183 17:47:08.158140 PCI: 00:12.0: enabled 0
2184 17:47:08.161756 PCI: 00:12.6: enabled 0
2185 17:47:08.164539 PCI: 00:12.7: enabled 0
2186 17:47:08.164593 PCI: 00:13.0: enabled 0
2187 17:47:08.168404 PCI: 00:14.0: enabled 1
2188 17:47:08.171568 PCI: 00:14.1: enabled 0
2189 17:47:08.174572 PCI: 00:14.2: enabled 1
2190 17:47:08.174651 PCI: 00:14.3: enabled 1
2191 17:47:08.177702 PCI: 00:15.0: enabled 1
2192 17:47:08.181237 PCI: 00:15.1: enabled 1
2193 17:47:08.184303 PCI: 00:15.2: enabled 0
2194 17:47:08.184359 PCI: 00:15.3: enabled 1
2195 17:47:08.188065 PCI: 00:16.0: enabled 1
2196 17:47:08.191108 PCI: 00:16.1: enabled 0
2197 17:47:08.194546 PCI: 00:16.2: enabled 0
2198 17:47:08.194859 PCI: 00:16.3: enabled 0
2199 17:47:08.198258 PCI: 00:16.4: enabled 0
2200 17:47:08.201159 PCI: 00:16.5: enabled 0
2201 17:47:08.204764 PCI: 00:17.0: enabled 0
2202 17:47:08.205135 PCI: 00:19.0: enabled 0
2203 17:47:08.208153 PCI: 00:19.1: enabled 1
2204 17:47:08.211357 PCI: 00:19.2: enabled 0
2205 17:47:08.211474 PCI: 00:1a.0: enabled 0
2206 17:47:08.214669 PCI: 00:1c.0: enabled 0
2207 17:47:08.217708 PCI: 00:1c.1: enabled 0
2208 17:47:08.220908 PCI: 00:1c.2: enabled 0
2209 17:47:08.220971 PCI: 00:1c.3: enabled 0
2210 17:47:08.224642 PCI: 00:1c.4: enabled 0
2211 17:47:08.227839 PCI: 00:1c.5: enabled 0
2212 17:47:08.230894 PCI: 00:1c.6: enabled 0
2213 17:47:08.230964 PCI: 00:1c.7: enabled 0
2214 17:47:08.234543 PCI: 00:1d.0: enabled 0
2215 17:47:08.238152 PCI: 00:1d.1: enabled 0
2216 17:47:08.241187 PCI: 00:1d.2: enabled 0
2217 17:47:08.241240 PCI: 00:1d.3: enabled 0
2218 17:47:08.244886 PCI: 00:1e.0: enabled 1
2219 17:47:08.247663 PCI: 00:1e.1: enabled 0
2220 17:47:08.247945 PCI: 00:1e.2: enabled 0
2221 17:47:08.251013 PCI: 00:1e.3: enabled 1
2222 17:47:08.254568 PCI: 00:1f.0: enabled 1
2223 17:47:08.257596 PCI: 00:1f.1: enabled 0
2224 17:47:08.257656 PCI: 00:1f.2: enabled 1
2225 17:47:08.260678 PCI: 00:1f.3: enabled 1
2226 17:47:08.264333 PCI: 00:1f.4: enabled 0
2227 17:47:08.267726 PCI: 00:1f.5: enabled 1
2228 17:47:08.267802 PCI: 00:1f.6: enabled 0
2229 17:47:08.270773 PCI: 00:1f.7: enabled 0
2230 17:47:08.273877 GENERIC: 0.0: enabled 1
2231 17:47:08.277240 GENERIC: 0.0: enabled 1
2232 17:47:08.277302 GENERIC: 1.0: enabled 1
2233 17:47:08.280703 GENERIC: 0.0: enabled 1
2234 17:47:08.283877 GENERIC: 1.0: enabled 1
2235 17:47:08.287371 USB0 port 0: enabled 1
2236 17:47:08.287473 USB0 port 0: enabled 1
2237 17:47:08.290628 GENERIC: 0.0: enabled 1
2238 17:47:08.294052 I2C: 00:1a: enabled 1
2239 17:47:08.294144 I2C: 00:31: enabled 1
2240 17:47:08.297187 I2C: 00:32: enabled 1
2241 17:47:08.300737 I2C: 00:50: enabled 1
2242 17:47:08.300799 I2C: 00:10: enabled 1
2243 17:47:08.303950 I2C: 00:15: enabled 1
2244 17:47:08.307192 I2C: 00:2c: enabled 1
2245 17:47:08.307247 GENERIC: 0.0: enabled 1
2246 17:47:08.310657 SPI: 00: enabled 1
2247 17:47:08.314051 PNP: 0c09.0: enabled 1
2248 17:47:08.314108 GENERIC: 0.0: enabled 1
2249 17:47:08.317271 USB3 port 0: enabled 1
2250 17:47:08.320707 USB3 port 1: enabled 0
2251 17:47:08.323960 USB3 port 2: enabled 1
2252 17:47:08.324013 USB3 port 3: enabled 0
2253 17:47:08.327218 USB2 port 0: enabled 1
2254 17:47:08.330827 USB2 port 1: enabled 0
2255 17:47:08.330883 USB2 port 2: enabled 1
2256 17:47:08.334050 USB2 port 3: enabled 0
2257 17:47:08.337295 USB2 port 4: enabled 0
2258 17:47:08.340315 USB2 port 5: enabled 1
2259 17:47:08.340373 USB2 port 6: enabled 0
2260 17:47:08.343848 USB2 port 7: enabled 0
2261 17:47:08.347467 USB2 port 8: enabled 1
2262 17:47:08.347537 USB2 port 9: enabled 1
2263 17:47:08.351595 USB3 port 0: enabled 1
2264 17:47:08.354307 USB3 port 1: enabled 0
2265 17:47:08.354680 USB3 port 2: enabled 0
2266 17:47:08.357485 USB3 port 3: enabled 0
2267 17:47:08.360612 GENERIC: 0.0: enabled 1
2268 17:47:08.363887 GENERIC: 1.0: enabled 1
2269 17:47:08.364234 APIC: 00: enabled 1
2270 17:47:08.367418 APIC: 14: enabled 1
2271 17:47:08.371011 APIC: 16: enabled 1
2272 17:47:08.371358 APIC: 10: enabled 1
2273 17:47:08.373988 APIC: 12: enabled 1
2274 17:47:08.374334 APIC: 01: enabled 1
2275 17:47:08.377341 APIC: 09: enabled 1
2276 17:47:08.380645 APIC: 08: enabled 1
2277 17:47:08.380988 PCI: 01:00.0: enabled 1
2278 17:47:08.387070 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2279 17:47:08.390758 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2280 17:47:08.397014 ELOG: NV offset 0xf20000 size 0x4000
2281 17:47:08.403683 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2282 17:47:08.410119 ELOG: Event(17) added with size 13 at 2023-10-09 17:47:08 UTC
2283 17:47:08.416804 ELOG: Event(9E) added with size 10 at 2023-10-09 17:47:08 UTC
2284 17:47:08.423711 ELOG: Event(9F) added with size 14 at 2023-10-09 17:47:08 UTC
2285 17:47:08.430006 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2286 17:47:08.436602 ELOG: Event(A0) added with size 9 at 2023-10-09 17:47:08 UTC
2287 17:47:08.440061 elog_add_boot_reason: Logged dev mode boot
2288 17:47:08.446873 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2289 17:47:08.446937 Finalize devices...
2290 17:47:08.450168 PCI: 00:16.0 final
2291 17:47:08.450230 PCI: 00:1f.2 final
2292 17:47:08.453435 GENERIC: 0.0 final
2293 17:47:08.459954 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2294 17:47:08.460019 GENERIC: 1.0 final
2295 17:47:08.466582 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2296 17:47:08.469735 Devices finalized
2297 17:47:08.476665 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2298 17:47:08.479999 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2299 17:47:08.486241 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2300 17:47:08.489619 ME: HFSTS1 : 0x90000245
2301 17:47:08.496197 ME: HFSTS2 : 0x82100116
2302 17:47:08.499530 ME: HFSTS3 : 0x00000050
2303 17:47:08.502845 ME: HFSTS4 : 0x00004000
2304 17:47:08.509558 ME: HFSTS5 : 0x00000000
2305 17:47:08.512873 ME: HFSTS6 : 0x40600006
2306 17:47:08.515976 ME: Manufacturing Mode : NO
2307 17:47:08.519482 ME: SPI Protection Mode Enabled : YES
2308 17:47:08.526045 ME: FPFs Committed : YES
2309 17:47:08.529449 ME: Manufacturing Vars Locked : YES
2310 17:47:08.532693 ME: FW Partition Table : OK
2311 17:47:08.535943 ME: Bringup Loader Failure : NO
2312 17:47:08.539520 ME: Firmware Init Complete : YES
2313 17:47:08.542784 ME: Boot Options Present : NO
2314 17:47:08.546315 ME: Update In Progress : NO
2315 17:47:08.549368 ME: D0i3 Support : YES
2316 17:47:08.556107 ME: Low Power State Enabled : NO
2317 17:47:08.559567 ME: CPU Replaced : YES
2318 17:47:08.562769 ME: CPU Replacement Valid : YES
2319 17:47:08.566206 ME: Current Working State : 5
2320 17:47:08.569514 ME: Current Operation State : 1
2321 17:47:08.572683 ME: Current Operation Mode : 0
2322 17:47:08.576003 ME: Error Code : 0
2323 17:47:08.579083 ME: Enhanced Debug Mode : NO
2324 17:47:08.582399 ME: CPU Debug Disabled : YES
2325 17:47:08.589776 ME: TXT Support : NO
2326 17:47:08.592582 ME: WP for RO is enabled : YES
2327 17:47:08.599470 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2328 17:47:08.602793 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2329 17:47:08.609215 Ramoops buffer: 0x100000@0x76899000.
2330 17:47:08.612337 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2331 17:47:08.622498 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2332 17:47:08.625593 CBFS: 'fallback/slic' not found.
2333 17:47:08.628871 ACPI: Writing ACPI tables at 7686d000.
2334 17:47:08.629217 ACPI: * FACS
2335 17:47:08.632088 ACPI: * DSDT
2336 17:47:08.638990 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2337 17:47:08.642105 ACPI: * FADT
2338 17:47:08.642451 SCI is IRQ9
2339 17:47:08.645313 ACPI: added table 1/32, length now 40
2340 17:47:08.648884 ACPI: * SSDT
2341 17:47:08.655240 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2342 17:47:08.658608 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2343 17:47:08.665179 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2344 17:47:08.668746 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2345 17:47:08.675153 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2346 17:47:08.678309 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2347 17:47:08.685236 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2348 17:47:08.691850 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2349 17:47:08.695054 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2350 17:47:08.702137 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2351 17:47:08.705123 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2352 17:47:08.711390 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2353 17:47:08.714405 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2354 17:47:08.721135 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2355 17:47:08.727970 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2356 17:47:08.731246 PS2K: Passing 80 keymaps to kernel
2357 17:47:08.738165 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2358 17:47:08.744305 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2359 17:47:08.751380 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2360 17:47:08.757744 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2361 17:47:08.764523 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2362 17:47:08.770985 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2363 17:47:08.774351 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2364 17:47:08.781252 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2365 17:47:08.787534 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2366 17:47:08.794439 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2367 17:47:08.798283 ACPI: added table 2/32, length now 44
2368 17:47:08.801211 ACPI: * MCFG
2369 17:47:08.804871 ACPI: added table 3/32, length now 48
2370 17:47:08.805184 ACPI: * TPM2
2371 17:47:08.808380 TPM2 log created at 0x7685d000
2372 17:47:08.811846 ACPI: added table 4/32, length now 52
2373 17:47:08.815617 ACPI: * LPIT
2374 17:47:08.818288 ACPI: added table 5/32, length now 56
2375 17:47:08.821417 ACPI: * MADT
2376 17:47:08.821495 SCI is IRQ9
2377 17:47:08.824583 ACPI: added table 6/32, length now 60
2378 17:47:08.828217 cmd_reg from pmc_make_ipc_cmd 1052838
2379 17:47:08.835184 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2380 17:47:08.841093 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2381 17:47:08.848331 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2382 17:47:08.851554 PMC CrashLog size in discovery mode: 0xC00
2383 17:47:08.854537 cpu crashlog bar addr: 0x80640000
2384 17:47:08.858071 cpu discovery table offset: 0x6030
2385 17:47:08.864478 cpu_crashlog_discovery_table buffer count: 0x3
2386 17:47:08.871059 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2387 17:47:08.877517 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2388 17:47:08.884470 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2389 17:47:08.887660 PMC crashLog size in discovery mode : 0xC00
2390 17:47:08.894309 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2391 17:47:08.897666 discover mode PMC crashlog size adjusted to: 0x200
2392 17:47:08.907582 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2393 17:47:08.910958 discover mode PMC crashlog size adjusted to: 0x0
2394 17:47:08.914218 m_cpu_crashLog_size : 0x3480 bytes
2395 17:47:08.917809 CPU crashLog present.
2396 17:47:08.920631 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2397 17:47:08.927963 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2398 17:47:08.930828 current = 76876550
2399 17:47:08.933929 ACPI: * DMAR
2400 17:47:08.937309 ACPI: added table 7/32, length now 64
2401 17:47:08.940972 ACPI: added table 8/32, length now 68
2402 17:47:08.941032 ACPI: * HPET
2403 17:47:08.944138 ACPI: added table 9/32, length now 72
2404 17:47:08.947600 ACPI: done.
2405 17:47:08.950813 ACPI tables: 38528 bytes.
2406 17:47:08.954347 smbios_write_tables: 76857000
2407 17:47:08.957698 EC returned error result code 3
2408 17:47:08.961001 Couldn't obtain OEM name from CBI
2409 17:47:08.964208 Create SMBIOS type 16
2410 17:47:08.964275 Create SMBIOS type 17
2411 17:47:08.967854 Create SMBIOS type 20
2412 17:47:08.971068 GENERIC: 0.0 (WIFI Device)
2413 17:47:08.973951 SMBIOS tables: 2156 bytes.
2414 17:47:08.977294 Writing table forward entry at 0x00000500
2415 17:47:08.983929 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2416 17:47:08.987527 Writing coreboot table at 0x76891000
2417 17:47:08.993979 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2418 17:47:08.997518 1. 0000000000001000-000000000009ffff: RAM
2419 17:47:09.000876 2. 00000000000a0000-00000000000fffff: RESERVED
2420 17:47:09.007347 3. 0000000000100000-0000000076856fff: RAM
2421 17:47:09.013920 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2422 17:47:09.017564 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2423 17:47:09.023845 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2424 17:47:09.027309 7. 0000000077000000-00000000803fffff: RESERVED
2425 17:47:09.033799 8. 00000000c0000000-00000000cfffffff: RESERVED
2426 17:47:09.037060 9. 00000000f8000000-00000000f9ffffff: RESERVED
2427 17:47:09.043710 10. 00000000fb000000-00000000fb000fff: RESERVED
2428 17:47:09.047072 11. 00000000fc800000-00000000fe7fffff: RESERVED
2429 17:47:09.050428 12. 00000000feb00000-00000000feb7ffff: RESERVED
2430 17:47:09.056972 13. 00000000fec00000-00000000fecfffff: RESERVED
2431 17:47:09.060434 14. 00000000fed40000-00000000fed6ffff: RESERVED
2432 17:47:09.066798 15. 00000000fed80000-00000000fed87fff: RESERVED
2433 17:47:09.070336 16. 00000000fed90000-00000000fed92fff: RESERVED
2434 17:47:09.077026 17. 00000000feda0000-00000000feda1fff: RESERVED
2435 17:47:09.080131 18. 00000000fedc0000-00000000feddffff: RESERVED
2436 17:47:09.083575 19. 0000000100000000-000000027fbfffff: RAM
2437 17:47:09.086679 Passing 4 GPIOs to payload:
2438 17:47:09.093698 NAME | PORT | POLARITY | VALUE
2439 17:47:09.096891 lid | undefined | high | high
2440 17:47:09.103467 power | undefined | high | low
2441 17:47:09.110570 oprom | undefined | high | low
2442 17:47:09.113615 EC in RW | 0x00000151 | high | high
2443 17:47:09.116766 Board ID: 3
2444 17:47:09.116851 FW config: 0x131
2445 17:47:09.123679 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 63fa
2446 17:47:09.127179 coreboot table: 1788 bytes.
2447 17:47:09.130210 IMD ROOT 0. 0x76fff000 0x00001000
2448 17:47:09.133364 IMD SMALL 1. 0x76ffe000 0x00001000
2449 17:47:09.136868 FSP MEMORY 2. 0x76afe000 0x00500000
2450 17:47:09.140536 CONSOLE 3. 0x76ade000 0x00020000
2451 17:47:09.144026 RW MCACHE 4. 0x76add000 0x0000043c
2452 17:47:09.150272 RO MCACHE 5. 0x76adc000 0x00000fd8
2453 17:47:09.153332 FMAP 6. 0x76adb000 0x0000064a
2454 17:47:09.156492 TIME STAMP 7. 0x76ada000 0x00000910
2455 17:47:09.159974 VBOOT WORK 8. 0x76ac6000 0x00014000
2456 17:47:09.163610 MEM INFO 9. 0x76ac5000 0x000003b8
2457 17:47:09.166601 ROMSTG STCK10. 0x76ac4000 0x00001000
2458 17:47:09.170008 AFTER CAR 11. 0x76ab8000 0x0000c000
2459 17:47:09.176452 RAMSTAGE 12. 0x76a2e000 0x0008a000
2460 17:47:09.179955 ACPI BERT 13. 0x76a1e000 0x00010000
2461 17:47:09.183307 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2462 17:47:09.186250 REFCODE 15. 0x769ae000 0x0006f000
2463 17:47:09.189678 SMM BACKUP 16. 0x7699e000 0x00010000
2464 17:47:09.192955 IGD OPREGION17. 0x76999000 0x00004203
2465 17:47:09.196541 RAMOOPS 18. 0x76899000 0x00100000
2466 17:47:09.199866 COREBOOT 19. 0x76891000 0x00008000
2467 17:47:09.206660 ACPI 20. 0x7686d000 0x00024000
2468 17:47:09.209958 TPM2 TCGLOG21. 0x7685d000 0x00010000
2469 17:47:09.213162 PMC CRASHLOG22. 0x7685c000 0x00000c00
2470 17:47:09.216366 CPU CRASHLOG23. 0x76858000 0x00003480
2471 17:47:09.219639 SMBIOS 24. 0x76857000 0x00001000
2472 17:47:09.223215 IMD small region:
2473 17:47:09.226360 IMD ROOT 0. 0x76ffec00 0x00000400
2474 17:47:09.229780 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2475 17:47:09.232921 VPD 2. 0x76ffeb60 0x0000006c
2476 17:47:09.236184 POWER STATE 3. 0x76ffeb00 0x00000044
2477 17:47:09.242691 ROMSTAGE 4. 0x76ffeae0 0x00000004
2478 17:47:09.245657 ACPI GNVS 5. 0x76ffea80 0x00000048
2479 17:47:09.248894 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2480 17:47:09.256099 BS: BS_WRITE_TABLES run times (exec / console): 8 / 628 ms
2481 17:47:09.259727 MTRR: Physical address space:
2482 17:47:09.266263 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2483 17:47:09.269172 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2484 17:47:09.276290 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2485 17:47:09.282952 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2486 17:47:09.289229 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2487 17:47:09.295871 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2488 17:47:09.302707 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2489 17:47:09.305891 MTRR: Fixed MSR 0x250 0x0606060606060606
2490 17:47:09.309343 MTRR: Fixed MSR 0x258 0x0606060606060606
2491 17:47:09.315802 MTRR: Fixed MSR 0x259 0x0000000000000000
2492 17:47:09.319003 MTRR: Fixed MSR 0x268 0x0606060606060606
2493 17:47:09.322263 MTRR: Fixed MSR 0x269 0x0606060606060606
2494 17:47:09.325780 MTRR: Fixed MSR 0x26a 0x0606060606060606
2495 17:47:09.332279 MTRR: Fixed MSR 0x26b 0x0606060606060606
2496 17:47:09.335935 MTRR: Fixed MSR 0x26c 0x0606060606060606
2497 17:47:09.339146 MTRR: Fixed MSR 0x26d 0x0606060606060606
2498 17:47:09.342291 MTRR: Fixed MSR 0x26e 0x0606060606060606
2499 17:47:09.345524 MTRR: Fixed MSR 0x26f 0x0606060606060606
2500 17:47:09.350171 call enable_fixed_mtrr()
2501 17:47:09.353418 CPU physical address size: 39 bits
2502 17:47:09.360105 MTRR: default type WB/UC MTRR counts: 6/6.
2503 17:47:09.363351 MTRR: UC selected as default type.
2504 17:47:09.370260 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2505 17:47:09.373465 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2506 17:47:09.380131 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2507 17:47:09.386633 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2508 17:47:09.393732 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2509 17:47:09.400310 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2510 17:47:09.406624 MTRR: Fixed MSR 0x250 0x0606060606060606
2511 17:47:09.410116 MTRR: Fixed MSR 0x258 0x0606060606060606
2512 17:47:09.413218 MTRR: Fixed MSR 0x259 0x0000000000000000
2513 17:47:09.416772 MTRR: Fixed MSR 0x268 0x0606060606060606
2514 17:47:09.423463 MTRR: Fixed MSR 0x269 0x0606060606060606
2515 17:47:09.426501 MTRR: Fixed MSR 0x26a 0x0606060606060606
2516 17:47:09.429946 MTRR: Fixed MSR 0x26b 0x0606060606060606
2517 17:47:09.433166 MTRR: Fixed MSR 0x26c 0x0606060606060606
2518 17:47:09.439636 MTRR: Fixed MSR 0x26d 0x0606060606060606
2519 17:47:09.443087 MTRR: Fixed MSR 0x26e 0x0606060606060606
2520 17:47:09.446074 MTRR: Fixed MSR 0x26f 0x0606060606060606
2521 17:47:09.449724 MTRR: Fixed MSR 0x250 0x0606060606060606
2522 17:47:09.452861 call enable_fixed_mtrr()
2523 17:47:09.456045 MTRR: Fixed MSR 0x250 0x0606060606060606
2524 17:47:09.462953 MTRR: Fixed MSR 0x250 0x0606060606060606
2525 17:47:09.466482 MTRR: Fixed MSR 0x250 0x0606060606060606
2526 17:47:09.469827 CPU physical address size: 39 bits
2527 17:47:09.473143 MTRR: Fixed MSR 0x250 0x0606060606060606
2528 17:47:09.476177 MTRR: Fixed MSR 0x258 0x0606060606060606
2529 17:47:09.483280 MTRR: Fixed MSR 0x258 0x0606060606060606
2530 17:47:09.486184 MTRR: Fixed MSR 0x259 0x0000000000000000
2531 17:47:09.489874 MTRR: Fixed MSR 0x268 0x0606060606060606
2532 17:47:09.492921 MTRR: Fixed MSR 0x269 0x0606060606060606
2533 17:47:09.499912 MTRR: Fixed MSR 0x26a 0x0606060606060606
2534 17:47:09.503213 MTRR: Fixed MSR 0x26b 0x0606060606060606
2535 17:47:09.506267 MTRR: Fixed MSR 0x26c 0x0606060606060606
2536 17:47:09.509699 MTRR: Fixed MSR 0x26d 0x0606060606060606
2537 17:47:09.516467 MTRR: Fixed MSR 0x26e 0x0606060606060606
2538 17:47:09.519511 MTRR: Fixed MSR 0x26f 0x0606060606060606
2539 17:47:09.522918 MTRR: Fixed MSR 0x258 0x0606060606060606
2540 17:47:09.526562 MTRR: Fixed MSR 0x258 0x0606060606060606
2541 17:47:09.529729 MTRR: Fixed MSR 0x250 0x0606060606060606
2542 17:47:09.536264 MTRR: Fixed MSR 0x259 0x0000000000000000
2543 17:47:09.536612 call enable_fixed_mtrr()
2544 17:47:09.542719 MTRR: Fixed MSR 0x259 0x0000000000000000
2545 17:47:09.546188 MTRR: Fixed MSR 0x268 0x0606060606060606
2546 17:47:09.549450 MTRR: Fixed MSR 0x269 0x0606060606060606
2547 17:47:09.552972 MTRR: Fixed MSR 0x258 0x0606060606060606
2548 17:47:09.559483 MTRR: Fixed MSR 0x258 0x0606060606060606
2549 17:47:09.562726 MTRR: Fixed MSR 0x259 0x0000000000000000
2550 17:47:09.565724 MTRR: Fixed MSR 0x268 0x0606060606060606
2551 17:47:09.569092 MTRR: Fixed MSR 0x269 0x0606060606060606
2552 17:47:09.576178 MTRR: Fixed MSR 0x26a 0x0606060606060606
2553 17:47:09.579668 MTRR: Fixed MSR 0x26b 0x0606060606060606
2554 17:47:09.582849 MTRR: Fixed MSR 0x26c 0x0606060606060606
2555 17:47:09.586321 MTRR: Fixed MSR 0x26d 0x0606060606060606
2556 17:47:09.592601 MTRR: Fixed MSR 0x26e 0x0606060606060606
2557 17:47:09.595872 MTRR: Fixed MSR 0x26f 0x0606060606060606
2558 17:47:09.599457 MTRR: Fixed MSR 0x259 0x0000000000000000
2559 17:47:09.602500 call enable_fixed_mtrr()
2560 17:47:09.605794 CPU physical address size: 39 bits
2561 17:47:09.609026 CPU physical address size: 39 bits
2562 17:47:09.612538 MTRR: Fixed MSR 0x26a 0x0606060606060606
2563 17:47:09.615797 MTRR: Fixed MSR 0x259 0x0000000000000000
2564 17:47:09.622253 MTRR: Fixed MSR 0x268 0x0606060606060606
2565 17:47:09.625768 MTRR: Fixed MSR 0x269 0x0606060606060606
2566 17:47:09.628874 MTRR: Fixed MSR 0x26a 0x0606060606060606
2567 17:47:09.632238 MTRR: Fixed MSR 0x26b 0x0606060606060606
2568 17:47:09.638740 MTRR: Fixed MSR 0x26c 0x0606060606060606
2569 17:47:09.641871 MTRR: Fixed MSR 0x26d 0x0606060606060606
2570 17:47:09.645293 MTRR: Fixed MSR 0x26e 0x0606060606060606
2571 17:47:09.648505 MTRR: Fixed MSR 0x26f 0x0606060606060606
2572 17:47:09.651921 MTRR: Fixed MSR 0x268 0x0606060606060606
2573 17:47:09.659130 MTRR: Fixed MSR 0x269 0x0606060606060606
2574 17:47:09.662494 MTRR: Fixed MSR 0x26a 0x0606060606060606
2575 17:47:09.665415 MTRR: Fixed MSR 0x26b 0x0606060606060606
2576 17:47:09.668790 MTRR: Fixed MSR 0x26c 0x0606060606060606
2577 17:47:09.675453 MTRR: Fixed MSR 0x26d 0x0606060606060606
2578 17:47:09.678646 MTRR: Fixed MSR 0x26e 0x0606060606060606
2579 17:47:09.682131 MTRR: Fixed MSR 0x26f 0x0606060606060606
2580 17:47:09.685096 call enable_fixed_mtrr()
2581 17:47:09.688606 MTRR: Fixed MSR 0x26b 0x0606060606060606
2582 17:47:09.692268 CPU physical address size: 39 bits
2583 17:47:09.695445 MTRR: Fixed MSR 0x26c 0x0606060606060606
2584 17:47:09.698448 call enable_fixed_mtrr()
2585 17:47:09.701725 MTRR: Fixed MSR 0x26d 0x0606060606060606
2586 17:47:09.708320 MTRR: Fixed MSR 0x26e 0x0606060606060606
2587 17:47:09.711546 MTRR: Fixed MSR 0x26f 0x0606060606060606
2588 17:47:09.714992 CPU physical address size: 39 bits
2589 17:47:09.718496 call enable_fixed_mtrr()
2590 17:47:09.721562 MTRR: Fixed MSR 0x268 0x0606060606060606
2591 17:47:09.724732 CPU physical address size: 39 bits
2592 17:47:09.728263 MTRR: Fixed MSR 0x269 0x0606060606060606
2593 17:47:09.735155 MTRR: Fixed MSR 0x26a 0x0606060606060606
2594 17:47:09.738139 MTRR: Fixed MSR 0x26b 0x0606060606060606
2595 17:47:09.741144 MTRR: Fixed MSR 0x26c 0x0606060606060606
2596 17:47:09.744877 MTRR: Fixed MSR 0x26d 0x0606060606060606
2597 17:47:09.751499 MTRR: Fixed MSR 0x26e 0x0606060606060606
2598 17:47:09.754566 MTRR: Fixed MSR 0x26f 0x0606060606060606
2599 17:47:09.757848 call enable_fixed_mtrr()
2600 17:47:09.761323 CPU physical address size: 39 bits
2601 17:47:09.764849
2602 17:47:09.765243 MTRR check
2603 17:47:09.768188 Fixed MTRRs : Enabled
2604 17:47:09.768489 Variable MTRRs: Enabled
2605 17:47:09.768714
2606 17:47:09.774650 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2607 17:47:09.777884 Checking cr50 for pending updates
2608 17:47:09.790488 Reading cr50 TPM mode
2609 17:47:09.805663 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2610 17:47:09.815502 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2611 17:47:09.818945 Checking segment from ROM address 0xf96cbe6c
2612 17:47:09.821973 Checking segment from ROM address 0xf96cbe88
2613 17:47:09.828801 Loading segment from ROM address 0xf96cbe6c
2614 17:47:09.828884 code (compression=1)
2615 17:47:09.838575 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2616 17:47:09.845249 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2617 17:47:09.848672 using LZMA
2618 17:47:09.871688 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2619 17:47:09.878039 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2620 17:47:09.886163 Loading segment from ROM address 0xf96cbe88
2621 17:47:09.889435 Entry Point 0x30000000
2622 17:47:09.889893 Loaded segments
2623 17:47:09.895836 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2624 17:47:09.902593 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2625 17:47:09.905847 Finalizing chipset.
2626 17:47:09.908872 apm_control: Finalizing SMM.
2627 17:47:09.909216 APMC done.
2628 17:47:09.912580 HECI: CSE device 16.1 is disabled
2629 17:47:09.915763 HECI: CSE device 16.2 is disabled
2630 17:47:09.919117 HECI: CSE device 16.3 is disabled
2631 17:47:09.922860 HECI: CSE device 16.4 is disabled
2632 17:47:09.925819 HECI: CSE device 16.5 is disabled
2633 17:47:09.928780 HECI: Sending End-of-Post
2634 17:47:09.937425 CSE: EOP requested action: continue boot
2635 17:47:09.940658 CSE EOP successful, continuing boot
2636 17:47:09.947695 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2637 17:47:09.950425 mp_park_aps done after 0 msecs.
2638 17:47:09.954044 Jumping to boot code at 0x30000000(0x76891000)
2639 17:47:09.964038 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2640 17:47:09.968312
2641 17:47:09.968626
2642 17:47:09.968855
2643 17:47:09.971873 Starting depthcharge on Volmar...
2644 17:47:09.972324
2645 17:47:09.973208 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2646 17:47:09.973595 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2647 17:47:09.973877 Setting prompt string to ['brya:']
2648 17:47:09.974146 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2649 17:47:09.978233 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2650 17:47:09.978584
2651 17:47:09.985154 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2652 17:47:09.985624
2653 17:47:09.991071 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2654 17:47:09.991460
2655 17:47:09.994106 configure_storage: Failed to remap 1C:2
2656 17:47:09.994181
2657 17:47:09.997780 Wipe memory regions:
2658 17:47:09.997870
2659 17:47:10.000859 [0x00000000001000, 0x000000000a0000)
2660 17:47:10.000918
2661 17:47:10.004169 [0x00000000100000, 0x00000030000000)
2662 17:47:10.109460
2663 17:47:10.112839 [0x00000032668e60, 0x00000076857000)
2664 17:47:10.260694
2665 17:47:10.264510 [0x00000100000000, 0x0000027fc00000)
2666 17:47:11.094726
2667 17:47:11.097809 ec_init: CrosEC protocol v3 supported (256, 256)
2668 17:47:11.707024
2669 17:47:11.707429 R8152: Initializing
2670 17:47:11.707672
2671 17:47:11.710351 Version 9 (ocp_data = 6010)
2672 17:47:11.710694
2673 17:47:11.713755 R8152: Done initializing
2674 17:47:11.714095
2675 17:47:11.716906 Adding net device
2676 17:47:12.017763
2677 17:47:12.020994 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2678 17:47:12.021345
2679 17:47:12.021640
2680 17:47:12.021874
2681 17:47:12.022431 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2683 17:47:12.123248 brya: tftpboot 192.168.201.1 11712669/tftp-deploy-wrvq2wvj/kernel/bzImage 11712669/tftp-deploy-wrvq2wvj/kernel/cmdline 11712669/tftp-deploy-wrvq2wvj/ramdisk/ramdisk.cpio.gz
2684 17:47:12.123438 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2685 17:47:12.123525 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2686 17:47:12.127506 tftpboot 192.168.201.1 11712669/tftp-deploy-wrvq2wvj/kernel/bzIploy-wrvq2wvj/kernel/cmdline 11712669/tftp-deploy-wrvq2wvj/ramdisk/ramdisk.cpio.gz
2687 17:47:12.127599
2688 17:47:12.127654 Waiting for link
2689 17:47:12.331499
2690 17:47:12.331902 done.
2691 17:47:12.332138
2692 17:47:12.332437 MAC: 00:e0:4c:68:03:d9
2693 17:47:12.332654
2694 17:47:12.334439 Sending DHCP discover... done.
2695 17:47:12.334518
2696 17:47:12.338094 Waiting for reply... done.
2697 17:47:12.338171
2698 17:47:12.341104 Sending DHCP request... done.
2699 17:47:12.341183
2700 17:47:12.344226 Waiting for reply... done.
2701 17:47:12.344321
2702 17:47:12.347928 My ip is 192.168.201.14
2703 17:47:12.348002
2704 17:47:12.350809 The DHCP server ip is 192.168.201.1
2705 17:47:12.350915
2706 17:47:12.357549 TFTP server IP predefined by user: 192.168.201.1
2707 17:47:12.357626
2708 17:47:12.364238 Bootfile predefined by user: 11712669/tftp-deploy-wrvq2wvj/kernel/bzImage
2709 17:47:12.364315
2710 17:47:12.367469 Sending tftp read request... done.
2711 17:47:12.367544
2712 17:47:12.370659 Waiting for the transfer...
2713 17:47:12.370734
2714 17:47:12.600813 00000000 ################################################################
2715 17:47:12.600939
2716 17:47:12.829340 00080000 ################################################################
2717 17:47:12.829473
2718 17:47:13.056326 00100000 ################################################################
2719 17:47:13.056452
2720 17:47:13.283950 00180000 ################################################################
2721 17:47:13.284079
2722 17:47:13.513160 00200000 ################################################################
2723 17:47:13.513284
2724 17:47:13.741872 00280000 ################################################################
2725 17:47:13.742000
2726 17:47:13.970626 00300000 ################################################################
2727 17:47:13.970756
2728 17:47:14.197192 00380000 ################################################################
2729 17:47:14.197318
2730 17:47:14.424466 00400000 ################################################################
2731 17:47:14.424599
2732 17:47:14.654236 00480000 ################################################################
2733 17:47:14.654371
2734 17:47:14.883763 00500000 ################################################################
2735 17:47:14.883888
2736 17:47:15.115158 00580000 ################################################################
2737 17:47:15.115284
2738 17:47:15.344562 00600000 ################################################################
2739 17:47:15.344691
2740 17:47:15.572801 00680000 ################################################################
2741 17:47:15.572931
2742 17:47:15.801807 00700000 ################################################################
2743 17:47:15.801932
2744 17:47:16.031162 00780000 ################################################################
2745 17:47:16.031305
2746 17:47:16.075953 00800000 ############# done.
2747 17:47:16.076057
2748 17:47:16.079153 The bootfile was 8490896 bytes long.
2749 17:47:16.079223
2750 17:47:16.082416 Sending tftp read request... done.
2751 17:47:16.082480
2752 17:47:16.086037 Waiting for the transfer...
2753 17:47:16.086113
2754 17:47:16.315653 00000000 ################################################################
2755 17:47:16.315795
2756 17:47:16.542223 00080000 ################################################################
2757 17:47:16.542347
2758 17:47:16.769689 00100000 ################################################################
2759 17:47:16.769811
2760 17:47:16.996037 00180000 ################################################################
2761 17:47:16.996158
2762 17:47:17.222260 00200000 ################################################################
2763 17:47:17.222384
2764 17:47:17.450734 00280000 ################################################################
2765 17:47:17.450858
2766 17:47:17.677673 00300000 ################################################################
2767 17:47:17.677804
2768 17:47:17.904989 00380000 ################################################################
2769 17:47:17.905115
2770 17:47:18.131764 00400000 ################################################################
2771 17:47:18.131890
2772 17:47:18.357720 00480000 ################################################################
2773 17:47:18.357845
2774 17:47:18.581530 00500000 ################################################################ done.
2775 17:47:18.581661
2776 17:47:18.584849 Sending tftp read request... done.
2777 17:47:18.584914
2778 17:47:18.588148 Waiting for the transfer...
2779 17:47:18.588218
2780 17:47:18.588266 00000000 # done.
2781 17:47:18.588314
2782 17:47:18.598088 Command line loaded dynamically from TFTP file: 11712669/tftp-deploy-wrvq2wvj/kernel/cmdline
2783 17:47:18.598158
2784 17:47:18.621497 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11712669/extract-nfsrootfs-rezw2vxs,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2785 17:47:18.627915
2786 17:47:18.631568 Shutting down all USB controllers.
2787 17:47:18.631641
2788 17:47:18.631710 Removing current net device
2789 17:47:18.631786
2790 17:47:18.634597 Finalizing coreboot
2791 17:47:18.634672
2792 17:47:18.640992 Exiting depthcharge with code 4 at timestamp: 18917604
2793 17:47:18.641069
2794 17:47:18.641122
2795 17:47:18.641168 Starting kernel ...
2796 17:47:18.641213
2797 17:47:18.641256
2798 17:47:18.641584 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2799 17:47:18.641662 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2800 17:47:18.641722 Setting prompt string to ['Linux version [0-9]']
2801 17:47:18.641791 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2802 17:47:18.641859 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2804 17:51:50.641926 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2806 17:51:50.642115 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2808 17:51:50.642256 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2811 17:51:50.642477 end: 2 depthcharge-action (duration 00:05:00) [common]
2813 17:51:50.642696 Cleaning after the job
2814 17:51:50.642771 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712669/tftp-deploy-wrvq2wvj/ramdisk
2815 17:51:50.643367 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712669/tftp-deploy-wrvq2wvj/kernel
2816 17:51:50.644146 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712669/tftp-deploy-wrvq2wvj/nfsrootfs
2817 17:51:50.684723 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712669/tftp-deploy-wrvq2wvj/modules
2818 17:51:50.685151 start: 5.1 power-off (timeout 00:00:30) [common]
2819 17:51:50.685298 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=off'
2820 17:51:50.756201 >> Command sent successfully.
2821 17:51:50.758437 Returned 0 in 0 seconds
2822 17:51:50.858785 end: 5.1 power-off (duration 00:00:00) [common]
2824 17:51:50.859064 start: 5.2 read-feedback (timeout 00:10:00) [common]
2825 17:51:50.859256 Listened to connection for namespace 'common' for up to 1s
2827 17:51:50.859594 Listened to connection for namespace 'common' for up to 1s
2828 17:51:51.860254 Finalising connection for namespace 'common'
2829 17:51:51.860426 Disconnecting from shell: Finalise
2830 17:51:51.860488
2831 17:51:51.960774 end: 5.2 read-feedback (duration 00:00:01) [common]
2832 17:51:51.960916 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712669
2833 17:51:52.135680 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712669
2834 17:51:52.135867 JobError: Your job cannot terminate cleanly.