Boot log: acer-chromebox-cxi4-puff

    1 17:46:26.496586  lava-dispatcher, installed at version: 2023.08
    2 17:46:26.496788  start: 0 validate
    3 17:46:26.496920  Start time: 2023-10-09 17:46:26.496912+00:00 (UTC)
    4 17:46:26.497039  Using caching service: 'http://localhost/cache/?uri=%s'
    5 17:46:26.497176  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 17:46:26.767092  Using caching service: 'http://localhost/cache/?uri=%s'
    7 17:46:26.767804  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 17:46:27.028215  Using caching service: 'http://localhost/cache/?uri=%s'
    9 17:46:27.028395  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 17:46:38.487391  Using caching service: 'http://localhost/cache/?uri=%s'
   11 17:46:38.487554  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 17:46:38.750697  validate duration: 12.25
   14 17:46:38.751021  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 17:46:38.751120  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 17:46:38.751206  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 17:46:38.751332  Not decompressing ramdisk as can be used compressed.
   18 17:46:38.751418  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
   19 17:46:38.751484  saving as /var/lib/lava/dispatcher/tmp/11712682/tftp-deploy-5f0iqcbk/ramdisk/initrd.cpio.gz
   20 17:46:38.751550  total size: 5432690 (5 MB)
   21 17:46:39.522209  progress   0 % (0 MB)
   22 17:46:39.523984  progress   5 % (0 MB)
   23 17:46:39.525431  progress  10 % (0 MB)
   24 17:46:39.526858  progress  15 % (0 MB)
   25 17:46:39.528579  progress  20 % (1 MB)
   26 17:46:39.530030  progress  25 % (1 MB)
   27 17:46:39.531494  progress  30 % (1 MB)
   28 17:46:39.533060  progress  35 % (1 MB)
   29 17:46:39.534497  progress  40 % (2 MB)
   30 17:46:39.535936  progress  45 % (2 MB)
   31 17:46:39.537446  progress  50 % (2 MB)
   32 17:46:39.539043  progress  55 % (2 MB)
   33 17:46:39.540441  progress  60 % (3 MB)
   34 17:46:39.541836  progress  65 % (3 MB)
   35 17:46:39.543459  progress  70 % (3 MB)
   36 17:46:39.544874  progress  75 % (3 MB)
   37 17:46:39.546280  progress  80 % (4 MB)
   38 17:46:39.547749  progress  85 % (4 MB)
   39 17:46:39.549305  progress  90 % (4 MB)
   40 17:46:39.550710  progress  95 % (4 MB)
   41 17:46:39.552133  progress 100 % (5 MB)
   42 17:46:39.552345  5 MB downloaded in 0.80 s (6.47 MB/s)
   43 17:46:39.552501  end: 1.1.1 http-download (duration 00:00:01) [common]
   45 17:46:39.552744  end: 1.1 download-retry (duration 00:00:01) [common]
   46 17:46:39.552831  start: 1.2 download-retry (timeout 00:09:59) [common]
   47 17:46:39.552916  start: 1.2.1 http-download (timeout 00:09:59) [common]
   48 17:46:39.553054  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 17:46:39.553125  saving as /var/lib/lava/dispatcher/tmp/11712682/tftp-deploy-5f0iqcbk/kernel/bzImage
   50 17:46:39.553185  total size: 8490896 (8 MB)
   51 17:46:39.553246  No compression specified
   52 17:46:39.554381  progress   0 % (0 MB)
   53 17:46:39.556553  progress   5 % (0 MB)
   54 17:46:39.558831  progress  10 % (0 MB)
   55 17:46:39.561159  progress  15 % (1 MB)
   56 17:46:39.563470  progress  20 % (1 MB)
   57 17:46:39.565749  progress  25 % (2 MB)
   58 17:46:39.568021  progress  30 % (2 MB)
   59 17:46:39.570283  progress  35 % (2 MB)
   60 17:46:39.572585  progress  40 % (3 MB)
   61 17:46:39.574866  progress  45 % (3 MB)
   62 17:46:39.577159  progress  50 % (4 MB)
   63 17:46:39.579441  progress  55 % (4 MB)
   64 17:46:39.581674  progress  60 % (4 MB)
   65 17:46:39.583955  progress  65 % (5 MB)
   66 17:46:39.586283  progress  70 % (5 MB)
   67 17:46:39.588594  progress  75 % (6 MB)
   68 17:46:39.591016  progress  80 % (6 MB)
   69 17:46:39.593292  progress  85 % (6 MB)
   70 17:46:39.595629  progress  90 % (7 MB)
   71 17:46:39.597906  progress  95 % (7 MB)
   72 17:46:39.600252  progress 100 % (8 MB)
   73 17:46:39.600374  8 MB downloaded in 0.05 s (171.62 MB/s)
   74 17:46:39.600520  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 17:46:39.600751  end: 1.2 download-retry (duration 00:00:00) [common]
   77 17:46:39.600838  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 17:46:39.600926  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 17:46:39.601068  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
   80 17:46:39.601137  saving as /var/lib/lava/dispatcher/tmp/11712682/tftp-deploy-5f0iqcbk/nfsrootfs/full.rootfs.tar
   81 17:46:39.601199  total size: 133380384 (127 MB)
   82 17:46:39.601263  Using unxz to decompress xz
   83 17:46:39.605643  progress   0 % (0 MB)
   84 17:46:39.955018  progress   5 % (6 MB)
   85 17:46:40.313001  progress  10 % (12 MB)
   86 17:46:40.606436  progress  15 % (19 MB)
   87 17:46:40.794205  progress  20 % (25 MB)
   88 17:46:41.042745  progress  25 % (31 MB)
   89 17:46:41.397499  progress  30 % (38 MB)
   90 17:46:41.751150  progress  35 % (44 MB)
   91 17:46:42.164448  progress  40 % (50 MB)
   92 17:46:42.554371  progress  45 % (57 MB)
   93 17:46:42.916498  progress  50 % (63 MB)
   94 17:46:43.296014  progress  55 % (69 MB)
   95 17:46:43.663775  progress  60 % (76 MB)
   96 17:46:44.032112  progress  65 % (82 MB)
   97 17:46:44.403051  progress  70 % (89 MB)
   98 17:46:44.774037  progress  75 % (95 MB)
   99 17:46:45.216505  progress  80 % (101 MB)
  100 17:46:45.653030  progress  85 % (108 MB)
  101 17:46:45.921004  progress  90 % (114 MB)
  102 17:46:46.274579  progress  95 % (120 MB)
  103 17:46:46.674269  progress 100 % (127 MB)
  104 17:46:46.679770  127 MB downloaded in 7.08 s (17.97 MB/s)
  105 17:46:46.680033  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 17:46:46.680306  end: 1.3 download-retry (duration 00:00:07) [common]
  108 17:46:46.680396  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 17:46:46.680483  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 17:46:46.680638  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 17:46:46.680720  saving as /var/lib/lava/dispatcher/tmp/11712682/tftp-deploy-5f0iqcbk/modules/modules.tar
  112 17:46:46.680782  total size: 250868 (0 MB)
  113 17:46:46.680847  Using unxz to decompress xz
  114 17:46:46.685135  progress  13 % (0 MB)
  115 17:46:46.685601  progress  26 % (0 MB)
  116 17:46:46.685877  progress  39 % (0 MB)
  117 17:46:46.687633  progress  52 % (0 MB)
  118 17:46:46.689682  progress  65 % (0 MB)
  119 17:46:46.691721  progress  78 % (0 MB)
  120 17:46:46.693580  progress  91 % (0 MB)
  121 17:46:46.695388  progress 100 % (0 MB)
  122 17:46:46.700937  0 MB downloaded in 0.02 s (11.87 MB/s)
  123 17:46:46.701174  end: 1.4.1 http-download (duration 00:00:00) [common]
  125 17:46:46.701507  end: 1.4 download-retry (duration 00:00:00) [common]
  126 17:46:46.701621  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  127 17:46:46.701721  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  128 17:46:48.882311  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11712682/extract-nfsrootfs-myrhj0f3
  129 17:46:48.882530  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  130 17:46:48.882636  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  131 17:46:48.882811  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t
  132 17:46:48.883206  makedir: /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin
  133 17:46:48.883314  makedir: /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/tests
  134 17:46:48.883414  makedir: /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/results
  135 17:46:48.883529  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-add-keys
  136 17:46:48.883684  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-add-sources
  137 17:46:48.883817  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-background-process-start
  138 17:46:48.883946  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-background-process-stop
  139 17:46:48.884072  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-common-functions
  140 17:46:48.884201  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-echo-ipv4
  141 17:46:48.884326  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-install-packages
  142 17:46:48.884451  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-installed-packages
  143 17:46:48.884574  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-os-build
  144 17:46:48.884698  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-probe-channel
  145 17:46:48.884822  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-probe-ip
  146 17:46:48.884948  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-target-ip
  147 17:46:48.885073  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-target-mac
  148 17:46:48.885197  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-target-storage
  149 17:46:48.885324  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-test-case
  150 17:46:48.885450  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-test-event
  151 17:46:48.885574  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-test-feedback
  152 17:46:48.885697  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-test-raise
  153 17:46:48.885821  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-test-reference
  154 17:46:48.885946  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-test-runner
  155 17:46:48.886068  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-test-set
  156 17:46:48.886191  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-test-shell
  157 17:46:48.886316  Updating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-install-packages (oe)
  158 17:46:48.886471  Updating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/bin/lava-installed-packages (oe)
  159 17:46:48.886592  Creating /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/environment
  160 17:46:48.886687  LAVA metadata
  161 17:46:48.886757  - LAVA_JOB_ID=11712682
  162 17:46:48.886820  - LAVA_DISPATCHER_IP=192.168.201.1
  163 17:46:48.886936  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  164 17:46:48.887004  skipped lava-vland-overlay
  165 17:46:48.887079  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  166 17:46:48.887158  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  167 17:46:48.887218  skipped lava-multinode-overlay
  168 17:46:48.887289  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  169 17:46:48.887367  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  170 17:46:48.887440  Loading test definitions
  171 17:46:48.887529  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  172 17:46:48.887598  Using /lava-11712682 at stage 0
  173 17:46:48.887915  uuid=11712682_1.5.2.3.1 testdef=None
  174 17:46:48.888017  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  175 17:46:48.888104  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  176 17:46:48.888611  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  178 17:46:48.888828  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  179 17:46:48.889476  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  181 17:46:48.889704  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  182 17:46:48.890329  runner path: /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/0/tests/0_dmesg test_uuid 11712682_1.5.2.3.1
  183 17:46:48.890489  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  185 17:46:48.890711  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
  186 17:46:48.890782  Using /lava-11712682 at stage 1
  187 17:46:48.891093  uuid=11712682_1.5.2.3.5 testdef=None
  188 17:46:48.891180  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  189 17:46:48.891263  start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
  190 17:46:48.891728  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  192 17:46:48.891943  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
  193 17:46:48.892587  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  195 17:46:48.892812  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
  196 17:46:48.893441  runner path: /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/1/tests/1_bootrr test_uuid 11712682_1.5.2.3.5
  197 17:46:48.893593  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  199 17:46:48.893793  Creating lava-test-runner.conf files
  200 17:46:48.893855  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/0 for stage 0
  201 17:46:48.893944  - 0_dmesg
  202 17:46:48.894022  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712682/lava-overlay-21vg1v6t/lava-11712682/1 for stage 1
  203 17:46:48.894111  - 1_bootrr
  204 17:46:48.894204  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  205 17:46:48.894291  start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
  206 17:46:48.901511  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  207 17:46:48.901613  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
  208 17:46:48.901700  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  209 17:46:48.901797  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  210 17:46:48.901882  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
  211 17:46:49.037080  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  212 17:46:49.037458  start: 1.5.4 extract-modules (timeout 00:09:50) [common]
  213 17:46:49.037574  extracting modules file /var/lib/lava/dispatcher/tmp/11712682/tftp-deploy-5f0iqcbk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712682/extract-nfsrootfs-myrhj0f3
  214 17:46:49.051171  extracting modules file /var/lib/lava/dispatcher/tmp/11712682/tftp-deploy-5f0iqcbk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712682/extract-overlay-ramdisk-divqej3v/ramdisk
  215 17:46:49.064575  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  216 17:46:49.064713  start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
  217 17:46:49.064804  [common] Applying overlay to NFS
  218 17:46:49.064874  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712682/compress-overlay-akw1t7mc/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712682/extract-nfsrootfs-myrhj0f3
  219 17:46:49.072937  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  220 17:46:49.073054  start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
  221 17:46:49.073143  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  222 17:46:49.073233  start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
  223 17:46:49.073310  Building ramdisk /var/lib/lava/dispatcher/tmp/11712682/extract-overlay-ramdisk-divqej3v/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712682/extract-overlay-ramdisk-divqej3v/ramdisk
  224 17:46:49.141529  >> 26159 blocks

  225 17:46:49.669079  rename /var/lib/lava/dispatcher/tmp/11712682/extract-overlay-ramdisk-divqej3v/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712682/tftp-deploy-5f0iqcbk/ramdisk/ramdisk.cpio.gz
  226 17:46:49.669512  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  227 17:46:49.669633  start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
  228 17:46:49.669736  start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
  229 17:46:49.669829  No mkimage arch provided, not using FIT.
  230 17:46:49.669924  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  231 17:46:49.670009  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  232 17:46:49.670113  end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
  233 17:46:49.670205  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
  234 17:46:49.670286  No LXC device requested
  235 17:46:49.670371  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  236 17:46:49.670458  start: 1.7 deploy-device-env (timeout 00:09:49) [common]
  237 17:46:49.670539  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  238 17:46:49.670615  Checking files for TFTP limit of 4294967296 bytes.
  239 17:46:49.671064  end: 1 tftp-deploy (duration 00:00:11) [common]
  240 17:46:49.671176  start: 2 depthcharge-action (timeout 00:05:00) [common]
  241 17:46:49.671267  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  242 17:46:49.671389  substitutions:
  243 17:46:49.671454  - {DTB}: None
  244 17:46:49.671518  - {INITRD}: 11712682/tftp-deploy-5f0iqcbk/ramdisk/ramdisk.cpio.gz
  245 17:46:49.671577  - {KERNEL}: 11712682/tftp-deploy-5f0iqcbk/kernel/bzImage
  246 17:46:49.671635  - {LAVA_MAC}: None
  247 17:46:49.671691  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11712682/extract-nfsrootfs-myrhj0f3
  248 17:46:49.671747  - {NFS_SERVER_IP}: 192.168.201.1
  249 17:46:49.671802  - {PRESEED_CONFIG}: None
  250 17:46:49.671857  - {PRESEED_LOCAL}: None
  251 17:46:49.671911  - {RAMDISK}: 11712682/tftp-deploy-5f0iqcbk/ramdisk/ramdisk.cpio.gz
  252 17:46:49.671966  - {ROOT_PART}: None
  253 17:46:49.672019  - {ROOT}: None
  254 17:46:49.672072  - {SERVER_IP}: 192.168.201.1
  255 17:46:49.672126  - {TEE}: None
  256 17:46:49.672179  Parsed boot commands:
  257 17:46:49.672232  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  258 17:46:49.672406  Parsed boot commands: tftpboot 192.168.201.1 11712682/tftp-deploy-5f0iqcbk/kernel/bzImage 11712682/tftp-deploy-5f0iqcbk/kernel/cmdline 11712682/tftp-deploy-5f0iqcbk/ramdisk/ramdisk.cpio.gz
  259 17:46:49.672496  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  260 17:46:49.672578  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  261 17:46:49.672668  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  262 17:46:49.672756  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  263 17:46:49.672822  Not connected, no need to disconnect.
  264 17:46:49.672897  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  265 17:46:49.672981  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  266 17:46:49.673050  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi4-puff-cbg-6'
  267 17:46:49.676920  Setting prompt string to ['lava-test: # ']
  268 17:46:49.677264  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  269 17:46:49.677368  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  270 17:46:49.677470  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  271 17:46:49.677574  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  272 17:46:49.677800  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-6' '--port=1' '--command=reboot'
  273 17:46:56.408731  >> Command sent successfully.

  274 17:46:56.418533  Returned 0 in 6 seconds
  275 17:46:56.519746  end: 2.2.2.1 pdu-reboot (duration 00:00:07) [common]
  277 17:46:56.521444  end: 2.2.2 reset-device (duration 00:00:07) [common]
  278 17:46:56.521932  start: 2.2.3 depthcharge-start (timeout 00:04:53) [common]
  279 17:46:56.522385  Setting prompt string to 'Starting depthcharge on Kaisa...'
  280 17:46:56.522724  Changing prompt to 'Starting depthcharge on Kaisa...'
  281 17:46:56.523101  depthcharge-start: Wait for prompt Starting depthcharge on Kaisa... (timeout 00:05:00)
  282 17:46:56.524683  [Enter `^Ec?' for help]

  283 17:46:56.803565  
  284 17:46:56.804329  

  285 17:46:56.815026  coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 bootblock starting (log level: 8)...

  286 17:46:56.819527  CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz

  287 17:46:56.824391  CPU: ID a0660, Cometlake-U A0 (6+2), ucode: 000000c9

  288 17:46:56.829783  CPU: AES supported, TXT NOT supported, VT supported

  289 17:46:56.834497  MCH: device id 9b71 (rev 00) is CometLake-U (2+2)

  290 17:46:56.839051  PCH: device id 0285 (rev 00) is Cometlake-U Base

  291 17:46:56.844461  IGD: device id 9baa (rev 04) is CometLake ULT GT2

  292 17:46:56.847607  VBOOT: Loading verstage.

  293 17:46:56.852870  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  294 17:46:56.858049  FMAP: base = 0xff000000 size = 0x1000000 #areas = 32

  295 17:46:56.863016  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  296 17:46:56.866096  CBFS: Locating 'fallback/verstage'

  297 17:46:56.870461  CBFS: Found @ offset 10c240 size 1152c

  298 17:46:56.871790  

  299 17:46:56.871911  

  300 17:46:56.882338  coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 verstage starting (log level: 8)...

  301 17:46:56.897131  Probing TPM: . done!

  302 17:46:56.899222  TPM ready after 0 ms

  303 17:46:56.904888  Connected to device vid:did:rid of 1ae0:0028:00

  304 17:46:56.914983  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66

  305 17:46:56.919454  Initialized TPM device CR50 revision 0

  306 17:46:57.002004  tlcl_send_startup: Startup return code is 0

  307 17:46:57.004203  TPM: setup succeeded

  308 17:46:57.016809  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  309 17:46:57.030096  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  310 17:46:57.038044  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  311 17:46:57.050962  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  312 17:46:57.053961  Chrome EC: UHEPI supported

  313 17:46:57.055661  Phase 1

  314 17:46:57.060761  FMAP: area GBB found @ c05000 (12288 bytes)

  315 17:46:57.067672  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  316 17:46:57.074441  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  317 17:46:57.076832  Recovery requested (1009000e)

  318 17:46:57.082894  TPM: Extending digest for VBOOT: boot mode into PCR 0

  319 17:46:57.091900  tlcl_extend: response is 0

  320 17:46:57.098118  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  321 17:46:57.107149  tlcl_extend: response is 0

  322 17:46:57.112723  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  323 17:46:57.116038  CBFS: Locating 'fallback/romstage'

  324 17:46:57.119129  CBFS: Found @ offset 80 size 1607c

  325 17:46:57.125025  BS: verstage times (exec / console): total (unknown) / 119 ms

  326 17:46:57.126227  

  327 17:46:57.126661  

  328 17:46:57.137202  coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 romstage starting (log level: 8)...

  329 17:46:57.143311  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  330 17:46:57.148562  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  331 17:46:57.153188  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  332 17:46:57.157356  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  333 17:46:57.161663  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  334 17:46:57.165948  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  335 17:46:57.168027  TCO_STS:   0000 0000

  336 17:46:57.171052  GEN_PMCON: e0015038 00000200

  337 17:46:57.174029  GBLRST_CAUSE: 00000000 00000000

  338 17:46:57.176572  prev_sleep_state 5

  339 17:46:57.179753  Boot Count incremented to 11928

  340 17:46:57.185822  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  341 17:46:57.188092  CBFS: Locating 'fspm.bin'

  342 17:46:57.192091  CBFS: Found @ offset 66fc0 size 71000

  343 17:46:57.195862  Chrome EC: UHEPI supported

  344 17:46:57.201651  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  345 17:46:57.206727  Probing TPM:  done!

  346 17:46:57.211114  Connected to device vid:did:rid of 1ae0:0028:00

  347 17:46:57.221965  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66

  348 17:46:57.225207  Initialized TPM device CR50 revision 0

  349 17:46:57.239052  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  350 17:46:57.245373  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  351 17:46:57.248285  MRC cache found, size 1948

  352 17:46:57.250811  bootmode is set to: 2

  353 17:46:57.253104  PRMRR disabled by config.

  354 17:46:57.258606  FMAP: area RW_SPD_CACHE found @ aff000 (4096 bytes)

  355 17:46:57.262092  SPD_CACHE: cache found, size 0x1000

  356 17:46:57.265497  No memory dimm at address 50

  357 17:46:57.268406  SPD_CACHE: DIMM0 is not present

  358 17:46:57.274238  SPD_CACHE: DIMM1 is the same

  359 17:46:57.275488  SPD @ 0x52

  360 17:46:57.278303  SPD: module type is DDR4

  361 17:46:57.282769  SPD: module part number is HMA851S6CJR6N-VK    

  362 17:46:57.288849  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  363 17:46:57.293596  SPD: device width 16 bits, bus width 64 bits

  364 17:46:57.297779  SPD: module size is 4096 MB (per channel)

  365 17:46:57.300887  memory slot: 2 configuration done.

  366 17:46:57.349615  CBMEM:

  367 17:46:57.352889  IMD: root @ 0x99fff000 254 entries.

  368 17:46:57.356719  IMD: root @ 0x99ffec00 62 entries.

  369 17:46:57.360669  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  370 17:46:57.365035  WARNING: RO_VPD is uninitialized or empty.

  371 17:46:57.370161  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  372 17:46:57.373141  External stage cache:

  373 17:46:57.376718  IMD: root @ 0x9abff000 254 entries.

  374 17:46:57.380551  IMD: root @ 0x9abfec00 62 entries.

  375 17:46:57.395046  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  376 17:46:57.405156  tlcl_write: response is 0

  377 17:46:57.408665  MRC: TPM MRC hash updated successfully.

  378 17:46:57.410617  1 DIMMs found

  379 17:46:57.411974  SMM Memory Map

  380 17:46:57.415396  SMRAM       : 0x9a000000 0x1000000

  381 17:46:57.418993   Subregion 0: 0x9a000000 0xa00000

  382 17:46:57.421982   Subregion 1: 0x9aa00000 0x200000

  383 17:46:57.425417   Subregion 2: 0x9ac00000 0x400000

  384 17:46:57.427892  top_of_ram = 0x9a000000

  385 17:46:57.433056  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  386 17:46:57.438454  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  387 17:46:57.443322  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  388 17:46:57.448546  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  389 17:46:57.452088  CBFS: Locating 'fallback/postcar'

  390 17:46:57.456352  CBFS: Found @ offset 1076c0 size 4b28

  391 17:46:57.462292  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  392 17:46:57.472497  Loading module at 0x99c0c000 with entry 0x99c0c000. filesize: 0x4818 memsize: 0x8af8

  393 17:46:57.477433  Processing 173 relocs. Offset value of 0x97c0c000

  394 17:46:57.485304  BS: romstage times (exec / console): total (unknown) / 267 ms

  395 17:46:57.485991  

  396 17:46:57.486519  

  397 17:46:57.497167  coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 postcar starting (log level: 8)...

  398 17:46:57.502346  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  399 17:46:57.505438  CBFS: Locating 'fallback/ramstage'

  400 17:46:57.509656  CBFS: Found @ offset 44e00 size 1e0ef

  401 17:46:57.516271  Decompressing stage fallback/ramstage @ 0x99ba4fc0 (415200 bytes)

  402 17:46:57.547007  Loading module at 0x99ba5000 with entry 0x99ba5000. filesize: 0x46598 memsize: 0x655a0

  403 17:46:57.552076  Processing 4604 relocs. Offset value of 0x98da5000

  404 17:46:57.558342  BS: postcar times (exec / console): total (unknown) / 43 ms

  405 17:46:57.558999  

  406 17:46:57.559270  

  407 17:46:57.568999  coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 ramstage starting (log level: 8)...

  408 17:46:57.570569  Normal boot

  409 17:46:57.575437  cse_lite: Skip switching to RW in the recovery path

  410 17:46:57.582002  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 5 ms

  411 17:46:57.586278  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  412 17:46:57.590495  CBFS: Locating 'cpu_microcode_blob.bin'

  413 17:46:57.594215  CBFS: Found @ offset 16180 size 2ec00

  414 17:46:57.598625  microcode: sig=0xa0660 pf=0x80 revision=0xc9

  415 17:46:57.601306  Skip microcode update

  416 17:46:57.605972  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  417 17:46:57.608718  CBFS: Locating 'fsps.bin'

  418 17:46:57.612712  CBFS: Found @ offset d8fc0 size 2e69d

  419 17:46:57.648566  Detected 2 core, 2 thread CPU.

  420 17:46:57.651153  Setting up SMI for CPU

  421 17:46:57.653260  IED base = 0x9ac00000

  422 17:46:57.655283  IED size = 0x00400000

  423 17:46:57.657596  Will perform SMM setup.

  424 17:46:57.662988  CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz.

  425 17:46:57.670196  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  426 17:46:57.675918  Processing 16 relocs. Offset value of 0x00030000

  427 17:46:57.679065  Attempting to start 1 APs

  428 17:46:57.681867  Waiting for 10ms after sending INIT.

  429 17:46:57.696117  Waiting for 1st SIPI to complete...done.

  430 17:46:57.698197  AP: slot 1 apic_id 2.

  431 17:46:57.702659  Waiting for 2nd SIPI to complete...done.

  432 17:46:57.710406  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  433 17:46:57.714936  Processing 13 relocs. Offset value of 0x00038000

  434 17:46:57.722888  SMM Module: stub loaded at 0x00038000. Will call 0x99bc2760(0x00000000)

  435 17:46:57.726032  Installing SMM handler to 0x9a000000

  436 17:46:57.735260  Loading module at 0x9a010000 with entry 0x9a010a30. filesize: 0x7bc8 memsize: 0xcc90

  437 17:46:57.739560  Processing 617 relocs. Offset value of 0x9a010000

  438 17:46:57.747697  Loading module at 0x9a008000 with entry 0x9a008000. filesize: 0x1b8 memsize: 0x1b8

  439 17:46:57.752329  Processing 13 relocs. Offset value of 0x9a008000

  440 17:46:57.757985  SMM Module: placing jmp sequence at 0x9a007c00 rel16 0x03fd

  441 17:46:57.765059  SMM Module: stub loaded at 0x9a008000. Will call 0x9a010a30(0x00000000)

  442 17:46:57.768946  Clearing SMI status registers

  443 17:46:57.769945  SMI_STS: PM1 

  444 17:46:57.772354  PM1_STS: PWRBTN 

  445 17:46:57.774219  New SMBASE 0x9a000000

  446 17:46:57.777082  In relocation handler: CPU 0

  447 17:46:57.781541  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  448 17:46:57.786580  Writing SMRR. base = 0x9a000006, mask=0xff000800

  449 17:46:57.788381  Relocation complete.

  450 17:46:57.790363  New SMBASE 0x99fffc00

  451 17:46:57.793839  In relocation handler: CPU 1

  452 17:46:57.798048  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  453 17:46:57.802330  Writing SMRR. base = 0x9a000006, mask=0xff000800

  454 17:46:57.804201  Relocation complete.

  455 17:46:57.807015  Initializing CPU #0

  456 17:46:57.810273  CPU: vendor Intel device a0660

  457 17:46:57.813906  CPU: family 06, model a6, stepping 00

  458 17:46:57.816186  Clearing out pending MCEs

  459 17:46:57.818835  Setting up local APIC...

  460 17:46:57.820703   apic_id: 0x00 done.

  461 17:46:57.823879  Turbo is available but hidden

  462 17:46:57.826091  Turbo is unavailable

  463 17:46:57.828375  VMX status: enabled

  464 17:46:57.831722  IA32_FEATURE_CONTROL status: locked

  465 17:46:57.834192  Skip microcode update

  466 17:46:57.836030  CPU #0 initialized

  467 17:46:57.837595  Initializing CPU #1

  468 17:46:57.841734  CPU: vendor Intel device a0660

  469 17:46:57.845684  CPU: family 06, model a6, stepping 00

  470 17:46:57.847888  Clearing out pending MCEs

  471 17:46:57.850352  Setting up local APIC...

  472 17:46:57.852480   apic_id: 0x02 done.

  473 17:46:57.854801  VMX status: enabled

  474 17:46:57.857973  IA32_FEATURE_CONTROL status: locked

  475 17:46:57.860692  Skip microcode update

  476 17:46:57.862460  CPU #1 initialized

  477 17:46:57.866916  bsp_do_flight_plan done after 160 msecs.

  478 17:46:57.868287  Enabling SMIs.

  479 17:46:57.869730  Locking SMM.

  480 17:46:57.875758  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 88 / 199 ms

  481 17:46:57.887398  Waiting for DisplayPort

  482 17:47:00.913501  DisplayPort not ready after 3000ms. Abort.

  483 17:47:00.919542  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  484 17:47:00.922559  CBFS: Locating 'vbt.bin'

  485 17:47:00.926378  CBFS: Found @ offset 66a80 size 49e

  486 17:47:00.930774  Found a VBT of 4608 bytes after decompression

  487 17:47:00.932368  psys_pmax = 182W

  488 17:47:00.980848  Display FSP Version Info HOB

  489 17:47:00.983896  Reference Code - CPU = 9.0.1e.30

  490 17:47:00.986578  uCode Version = 0.0.0.ca

  491 17:47:00.989939  TXT ACM version = ff.ff.ff.ffff

  492 17:47:00.993489  Reference Code - ME = 9.0.1e.30

  493 17:47:00.995154  MEBx version = 0.0.0.0

  494 17:47:00.999298  ME Firmware Version = Consumer SKU

  495 17:47:01.002858  Reference Code - CML PCH = 9.0.1e.30

  496 17:47:01.005627  PCH-CRID Status = Disabled

  497 17:47:01.009614  PCH-CRID Original Value = ff.ff.ff.ffff

  498 17:47:01.013237  PCH-CRID New Value = ff.ff.ff.ffff

  499 17:47:01.016278  OPROM - RST - RAID = ff.ff.ff.ffff

  500 17:47:01.020359  ChipsetInit Base Version = ff.ff.ff.ffff

  501 17:47:01.024366  ChipsetInit Oem Version = ff.ff.ff.ffff

  502 17:47:01.028627  Reference Code - SA - System Agent = 9.0.1e.30

  503 17:47:01.032052  Reference Code - MRC = 0.0.0.2d

  504 17:47:01.035069  SA - PCIe Version = 9.0.1e.30

  505 17:47:01.037545  SA-CRID Status = Disabled

  506 17:47:01.041055  SA-CRID Original Value = 0.0.0.0

  507 17:47:01.044263  SA-CRID New Value = 0.0.0.0

  508 17:47:01.047100  OPROM - VBIOS = ff.ff.ff.ffff

  509 17:47:01.051213  Found PCIe Root Port #7 at PCI: 00:1c.0.

  510 17:47:01.058551  Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.

  511 17:47:01.070224  pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing.

  512 17:47:01.082300  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  513 17:47:01.094428  pcie_rp_update_dev: Couldn't find PCIe Root Port #14 (originally PCI: 00:1d.5) which was enabled in devicetree, removing.

  514 17:47:01.100493  BS: BS_DEV_INIT_CHIPS run times (exec / console): 3072 / 140 ms

  515 17:47:01.101865  RTC Init

  516 17:47:01.105237  Set power on after power failure.

  517 17:47:01.108113  Disabling Deep S3

  518 17:47:01.109553  Disabling Deep S3

  519 17:47:01.111435  Disabling Deep S4

  520 17:47:01.113246  Disabling Deep S4

  521 17:47:01.115055  Disabling Deep S5

  522 17:47:01.116591  Disabling Deep S5

  523 17:47:01.122691  BS: BS_DEV_INIT_CHIPS exit times (exec / console): 1 / 15 ms

  524 17:47:01.125349  Enumerating buses...

  525 17:47:01.129455  Show all devs... Before device enumeration.

  526 17:47:01.131619  Root Device: enabled 1

  527 17:47:01.134519  CPU_CLUSTER: 0: enabled 1

  528 17:47:01.136797  DOMAIN: 0000: enabled 1

  529 17:47:01.138586  APIC: 00: enabled 1

  530 17:47:01.141274  PCI: 00:00.0: enabled 1

  531 17:47:01.143252  PCI: 00:02.0: enabled 1

  532 17:47:01.145977  PCI: 00:04.0: enabled 1

  533 17:47:01.148412  PCI: 00:05.0: enabled 0

  534 17:47:01.150647  PCI: 00:12.0: enabled 1

  535 17:47:01.153054  PCI: 00:12.5: enabled 0

  536 17:47:01.155372  PCI: 00:12.6: enabled 0

  537 17:47:01.157728  PCI: 00:14.0: enabled 1

  538 17:47:01.161047  PCI: 00:14.1: enabled 0

  539 17:47:01.163054  PCI: 00:14.3: enabled 1

  540 17:47:01.165836  PCI: 00:14.5: enabled 1

  541 17:47:01.167968  PCI: 00:15.0: enabled 0

  542 17:47:01.170426  PCI: 00:15.1: enabled 0

  543 17:47:01.172603  PCI: 00:15.2: enabled 1

  544 17:47:01.175677  PCI: 00:15.3: enabled 1

  545 17:47:01.177829  PCI: 00:16.0: enabled 1

  546 17:47:01.179753  PCI: 00:16.1: enabled 0

  547 17:47:01.182460  PCI: 00:16.2: enabled 0

  548 17:47:01.185275  PCI: 00:16.3: enabled 0

  549 17:47:01.187672  PCI: 00:16.4: enabled 0

  550 17:47:01.189628  PCI: 00:16.5: enabled 0

  551 17:47:01.192611  PCI: 00:17.0: enabled 1

  552 17:47:01.195067  PCI: 00:19.0: enabled 1

  553 17:47:01.197184  PCI: 00:19.1: enabled 0

  554 17:47:01.199694  PCI: 00:19.2: enabled 0

  555 17:47:01.202096  PCI: 00:1a.0: enabled 1

  556 17:47:01.204748  PCI: 00:1c.0: enabled 0

  557 17:47:01.206816  PCI: 00:1c.1: enabled 0

  558 17:47:01.209505  PCI: 00:1c.2: enabled 0

  559 17:47:01.211949  PCI: 00:1c.3: enabled 0

  560 17:47:01.214020  PCI: 00:1c.4: enabled 0

  561 17:47:01.216700  PCI: 00:1c.5: enabled 0

  562 17:47:01.218885  PCI: 00:1c.0: enabled 1

  563 17:47:01.221237  PCI: 00:1c.7: enabled 0

  564 17:47:01.223687  PCI: 00:1d.0: enabled 1

  565 17:47:01.226551  PCI: 00:1d.1: enabled 0

  566 17:47:01.228840  PCI: 00:1d.2: enabled 1

  567 17:47:01.231483  PCI: 00:1d.3: enabled 0

  568 17:47:01.233656  PCI: 00:1d.4: enabled 0

  569 17:47:01.236164  PCI: 00:1d.5: enabled 1

  570 17:47:01.238691  PCI: 00:1e.0: enabled 1

  571 17:47:01.241146  PCI: 00:1e.1: enabled 0

  572 17:47:01.243656  PCI: 00:1e.2: enabled 1

  573 17:47:01.245944  PCI: 00:1e.3: enabled 0

  574 17:47:01.248392  PCI: 00:1f.0: enabled 1

  575 17:47:01.251137  PCI: 00:1f.1: enabled 1

  576 17:47:01.252997  PCI: 00:1f.2: enabled 1

  577 17:47:01.255189  PCI: 00:1f.3: enabled 1

  578 17:47:01.257691  PCI: 00:1f.4: enabled 1

  579 17:47:01.260840  PCI: 00:1f.5: enabled 1

  580 17:47:01.263047  PCI: 00:1f.6: enabled 0

  581 17:47:01.265506  GENERIC: 0.0: enabled 1

  582 17:47:01.267487  USB0 port 0: enabled 1

  583 17:47:01.270057  I2C: 00:4a: enabled 1

  584 17:47:01.271950  I2C: 00:4a: enabled 1

  585 17:47:01.274052  I2C: 00:1a: enabled 1

  586 17:47:01.276498  PCI: 00:00.0: enabled 1

  587 17:47:01.279669  PCI: 00:00.0: enabled 1

  588 17:47:01.280891  SPI: 00: enabled 1

  589 17:47:01.283482  PNP: 0c09.0: enabled 1

  590 17:47:01.285649  USB2 port 0: enabled 1

  591 17:47:01.288290  USB2 port 1: enabled 1

  592 17:47:01.290694  USB2 port 2: enabled 1

  593 17:47:01.292761  USB2 port 3: enabled 1

  594 17:47:01.294785  USB2 port 5: enabled 1

  595 17:47:01.297615  USB2 port 6: enabled 0

  596 17:47:01.300086  USB2 port 9: enabled 1

  597 17:47:01.301996  USB3 port 0: enabled 1

  598 17:47:01.304134  USB3 port 1: enabled 1

  599 17:47:01.306822  USB3 port 2: enabled 1

  600 17:47:01.309310  USB3 port 3: enabled 1

  601 17:47:01.311644  USB3 port 4: enabled 1

  602 17:47:01.314144  USB2 port 4: enabled 1

  603 17:47:01.315731  USB3 port 5: enabled 1

  604 17:47:01.318041  APIC: 02: enabled 1

  605 17:47:01.320728  Compare with tree...

  606 17:47:01.323086  Root Device: enabled 1

  607 17:47:01.325163   CPU_CLUSTER: 0: enabled 1

  608 17:47:01.327412    APIC: 00: enabled 1

  609 17:47:01.329629    APIC: 02: enabled 1

  610 17:47:01.332649   DOMAIN: 0000: enabled 1

  611 17:47:01.335114    PCI: 00:00.0: enabled 1

  612 17:47:01.337572    PCI: 00:02.0: enabled 1

  613 17:47:01.340277    PCI: 00:04.0: enabled 1

  614 17:47:01.342729     GENERIC: 0.0: enabled 1

  615 17:47:01.345969    PCI: 00:05.0: enabled 0

  616 17:47:01.348099    PCI: 00:12.0: enabled 1

  617 17:47:01.350905    PCI: 00:12.5: enabled 0

  618 17:47:01.353118    PCI: 00:12.6: enabled 0

  619 17:47:01.355932    PCI: 00:14.0: enabled 1

  620 17:47:01.358502     USB0 port 0: enabled 1

  621 17:47:01.361400      USB2 port 0: enabled 1

  622 17:47:01.364165      USB2 port 1: enabled 1

  623 17:47:01.366724      USB2 port 2: enabled 1

  624 17:47:01.369557      USB2 port 3: enabled 1

  625 17:47:01.372540      USB2 port 5: enabled 1

  626 17:47:01.374974      USB2 port 6: enabled 0

  627 17:47:01.377868      USB2 port 9: enabled 1

  628 17:47:01.381015      USB3 port 0: enabled 1

  629 17:47:01.383282      USB3 port 1: enabled 1

  630 17:47:01.385764      USB3 port 2: enabled 1

  631 17:47:01.388929      USB3 port 3: enabled 1

  632 17:47:01.391478      USB3 port 4: enabled 1

  633 17:47:01.394035      USB2 port 4: enabled 1

  634 17:47:01.396812      USB3 port 5: enabled 1

  635 17:47:01.399323    PCI: 00:14.1: enabled 0

  636 17:47:01.401773    PCI: 00:14.3: enabled 1

  637 17:47:01.405156    PCI: 00:14.5: enabled 1

  638 17:47:01.407482    PCI: 00:15.0: enabled 0

  639 17:47:01.410197    PCI: 00:15.1: enabled 0

  640 17:47:01.412983    PCI: 00:15.2: enabled 1

  641 17:47:01.415255     I2C: 00:4a: enabled 1

  642 17:47:01.417835    PCI: 00:15.3: enabled 1

  643 17:47:01.420975     I2C: 00:4a: enabled 1

  644 17:47:01.422806    PCI: 00:16.0: enabled 1

  645 17:47:01.425460    PCI: 00:16.1: enabled 0

  646 17:47:01.428650    PCI: 00:16.2: enabled 0

  647 17:47:01.430781    PCI: 00:16.3: enabled 0

  648 17:47:01.433417    PCI: 00:16.4: enabled 0

  649 17:47:01.435719    PCI: 00:16.5: enabled 0

  650 17:47:01.438708    PCI: 00:17.0: enabled 1

  651 17:47:01.441304    PCI: 00:19.0: enabled 1

  652 17:47:01.443424     I2C: 00:1a: enabled 1

  653 17:47:01.446885    PCI: 00:19.1: enabled 0

  654 17:47:01.449038    PCI: 00:19.2: enabled 0

  655 17:47:01.451763    PCI: 00:1a.0: enabled 1

  656 17:47:01.454445    PCI: 00:1c.0: enabled 1

  657 17:47:01.457152     PCI: 00:00.0: enabled 1

  658 17:47:01.460016    PCI: 00:1e.0: enabled 1

  659 17:47:01.462186    PCI: 00:1e.1: enabled 0

  660 17:47:01.464661    PCI: 00:1e.2: enabled 1

  661 17:47:01.467197     SPI: 00: enabled 1

  662 17:47:01.469632    PCI: 00:1e.3: enabled 0

  663 17:47:01.472435    PCI: 00:1f.0: enabled 1

  664 17:47:01.474778     PNP: 0c09.0: enabled 1

  665 17:47:01.477486    PCI: 00:1f.1: enabled 1

  666 17:47:01.480044    PCI: 00:1f.2: enabled 1

  667 17:47:01.483028    PCI: 00:1f.3: enabled 1

  668 17:47:01.485434    PCI: 00:1f.4: enabled 1

  669 17:47:01.488037    PCI: 00:1f.5: enabled 1

  670 17:47:01.490377    PCI: 00:1f.6: enabled 0

  671 17:47:01.492977  Root Device scanning...

  672 17:47:01.496415  scan_static_bus for Root Device

  673 17:47:01.498993  CPU_CLUSTER: 0 enabled

  674 17:47:01.501118  DOMAIN: 0000 enabled

  675 17:47:01.503483  DOMAIN: 0000 scanning...

  676 17:47:01.507328  PCI: pci_scan_bus for bus 00

  677 17:47:01.510196  PCI: 00:00.0 [8086/0000] ops

  678 17:47:01.513026  PCI: 00:00.0 [8086/9b71] enabled

  679 17:47:01.516499  PCI: 00:02.0 [8086/0000] bus ops

  680 17:47:01.519941  PCI: 00:02.0 [8086/9baa] enabled

  681 17:47:01.523068  PCI: 00:04.0 [8086/0000] bus ops

  682 17:47:01.526755  PCI: 00:04.0 [8086/1903] enabled

  683 17:47:01.529950  PCI: 00:08.0 [8086/1911] enabled

  684 17:47:01.533604  PCI: 00:12.0 [8086/02f9] enabled

  685 17:47:01.536481  PCI: 00:14.0 [8086/0000] bus ops

  686 17:47:01.540113  PCI: 00:14.0 [8086/02ed] enabled

  687 17:47:01.543453  PCI: 00:14.2 [8086/02ef] enabled

  688 17:47:01.546414  PCI: 00:14.3 [8086/02f0] enabled

  689 17:47:01.549709  PCI: 00:14.5 [8086/0000] ops

  690 17:47:01.552921  PCI: 00:14.5 [8086/02f5] enabled

  691 17:47:01.556108  PCI: 00:15.0 [8086/0000] bus ops

  692 17:47:01.559620  PCI: 00:15.0 [8086/02e8] disabled

  693 17:47:01.562999  PCI: 00:15.2 [8086/0000] bus ops

  694 17:47:01.565818  PCI: 00:15.2 [8086/02ea] enabled

  695 17:47:01.569418  PCI: 00:15.3 [8086/0000] bus ops

  696 17:47:01.572802  PCI: 00:15.3 [8086/02eb] enabled

  697 17:47:01.575919  PCI: 00:16.0 [8086/0000] ops

  698 17:47:01.579355  PCI: 00:16.0 [8086/02e0] enabled

  699 17:47:01.585169  PCI: Static device PCI: 00:17.0 not found, disabling it.

  700 17:47:01.587872  PCI: 00:19.0 [8086/0000] bus ops

  701 17:47:01.591437  PCI: 00:19.0 [8086/02c5] enabled

  702 17:47:01.593925  PCI: 00:1a.0 [8086/0000] ops

  703 17:47:01.597642  PCI: 00:1a.0 [8086/02c4] enabled

  704 17:47:01.600821  PCI: 00:1c.0 [8086/0000] bus ops

  705 17:47:01.604336  PCI: 00:1c.0 [8086/02be] enabled

  706 17:47:01.606720  PCI: 00:1e.0 [8086/0000] ops

  707 17:47:01.610687  PCI: 00:1e.0 [8086/02a8] enabled

  708 17:47:01.613581  PCI: 00:1e.2 [8086/0000] bus ops

  709 17:47:01.617482  PCI: 00:1e.2 [8086/02aa] enabled

  710 17:47:01.620476  PCI: 00:1f.0 [8086/0000] bus ops

  711 17:47:01.623394  PCI: 00:1f.0 [8086/0285] enabled

  712 17:47:01.629133  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  713 17:47:01.635303  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  714 17:47:01.638405  PCI: 00:1f.3 [8086/0000] bus ops

  715 17:47:01.641811  PCI: 00:1f.3 [8086/02c8] enabled

  716 17:47:01.644783  PCI: 00:1f.4 [8086/0000] bus ops

  717 17:47:01.648250  PCI: 00:1f.4 [8086/02a3] enabled

  718 17:47:01.651200  PCI: 00:1f.5 [8086/0000] bus ops

  719 17:47:01.654517  PCI: 00:1f.5 [8086/02a4] enabled

  720 17:47:01.658651  PCI: Leftover static devices:

  721 17:47:01.659396  PCI: 00:05.0

  722 17:47:01.660498  PCI: 00:12.5

  723 17:47:01.661956  PCI: 00:12.6

  724 17:47:01.663560  PCI: 00:14.1

  725 17:47:01.665196  PCI: 00:15.1

  726 17:47:01.666524  PCI: 00:16.1

  727 17:47:01.667200  PCI: 00:16.2

  728 17:47:01.668699  PCI: 00:16.3

  729 17:47:01.670528  PCI: 00:16.4

  730 17:47:01.671657  PCI: 00:16.5

  731 17:47:01.672759  PCI: 00:17.0

  732 17:47:01.674111  PCI: 00:19.1

  733 17:47:01.675596  PCI: 00:19.2

  734 17:47:01.677186  PCI: 00:1e.1

  735 17:47:01.678119  PCI: 00:1e.3

  736 17:47:01.679463  PCI: 00:1f.1

  737 17:47:01.681092  PCI: 00:1f.2

  738 17:47:01.682241  PCI: 00:1f.6

  739 17:47:01.685853  PCI: Check your devicetree.cb.

  740 17:47:01.688201  PCI: 00:02.0 scanning...

  741 17:47:01.692150  scan_generic_bus for PCI: 00:02.0

  742 17:47:01.695481  scan_generic_bus for PCI: 00:02.0 done

  743 17:47:01.700510  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  744 17:47:01.702674  PCI: 00:04.0 scanning...

  745 17:47:01.706633  scan_generic_bus for PCI: 00:04.0

  746 17:47:01.710609  bus: PCI: 00:04.0[0]->GENERIC: 0.0 enabled

  747 17:47:01.714684  scan_generic_bus for PCI: 00:04.0 done

  748 17:47:01.719834  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  749 17:47:01.722589  PCI: 00:14.0 scanning...

  750 17:47:01.726041  scan_static_bus for PCI: 00:14.0

  751 17:47:01.727839  USB0 port 0 enabled

  752 17:47:01.730183  USB0 port 0 scanning...

  753 17:47:01.734062  scan_static_bus for USB0 port 0

  754 17:47:01.735928  USB2 port 0 enabled

  755 17:47:01.737701  USB2 port 1 enabled

  756 17:47:01.739513  USB2 port 2 enabled

  757 17:47:01.742231  USB2 port 3 enabled

  758 17:47:01.743850  USB2 port 5 enabled

  759 17:47:01.745802  USB2 port 6 disabled

  760 17:47:01.748310  USB2 port 9 enabled

  761 17:47:01.750707  USB3 port 0 enabled

  762 17:47:01.752102  USB3 port 1 enabled

  763 17:47:01.754395  USB3 port 2 enabled

  764 17:47:01.756103  USB3 port 3 enabled

  765 17:47:01.758180  USB3 port 4 enabled

  766 17:47:01.760393  USB2 port 4 enabled

  767 17:47:01.762570  USB3 port 5 enabled

  768 17:47:01.765042  USB2 port 0 scanning...

  769 17:47:01.768428  scan_static_bus for USB2 port 0

  770 17:47:01.772200  scan_static_bus for USB2 port 0 done

  771 17:47:01.776975  scan_bus: bus USB2 port 0 finished in 6 msecs

  772 17:47:01.779103  USB2 port 1 scanning...

  773 17:47:01.782277  scan_static_bus for USB2 port 1

  774 17:47:01.785799  scan_static_bus for USB2 port 1 done

  775 17:47:01.790945  scan_bus: bus USB2 port 1 finished in 6 msecs

  776 17:47:01.793351  USB2 port 2 scanning...

  777 17:47:01.796388  scan_static_bus for USB2 port 2

  778 17:47:01.800430  scan_static_bus for USB2 port 2 done

  779 17:47:01.804719  scan_bus: bus USB2 port 2 finished in 6 msecs

  780 17:47:01.807663  USB2 port 3 scanning...

  781 17:47:01.810758  scan_static_bus for USB2 port 3

  782 17:47:01.814531  scan_static_bus for USB2 port 3 done

  783 17:47:01.819180  scan_bus: bus USB2 port 3 finished in 6 msecs

  784 17:47:01.821608  USB2 port 5 scanning...

  785 17:47:01.824885  scan_static_bus for USB2 port 5

  786 17:47:01.828931  scan_static_bus for USB2 port 5 done

  787 17:47:01.833584  scan_bus: bus USB2 port 5 finished in 6 msecs

  788 17:47:01.835869  USB2 port 9 scanning...

  789 17:47:01.838925  scan_static_bus for USB2 port 9

  790 17:47:01.842597  scan_static_bus for USB2 port 9 done

  791 17:47:01.847507  scan_bus: bus USB2 port 9 finished in 6 msecs

  792 17:47:01.849973  USB3 port 0 scanning...

  793 17:47:01.853250  scan_static_bus for USB3 port 0

  794 17:47:01.856995  scan_static_bus for USB3 port 0 done

  795 17:47:01.862243  scan_bus: bus USB3 port 0 finished in 6 msecs

  796 17:47:01.864327  USB3 port 1 scanning...

  797 17:47:01.868164  scan_static_bus for USB3 port 1

  798 17:47:01.871849  scan_static_bus for USB3 port 1 done

  799 17:47:01.876361  scan_bus: bus USB3 port 1 finished in 6 msecs

  800 17:47:01.878837  USB3 port 2 scanning...

  801 17:47:01.881695  scan_static_bus for USB3 port 2

  802 17:47:01.885713  scan_static_bus for USB3 port 2 done

  803 17:47:01.890395  scan_bus: bus USB3 port 2 finished in 6 msecs

  804 17:47:01.892575  USB3 port 3 scanning...

  805 17:47:01.896437  scan_static_bus for USB3 port 3

  806 17:47:01.900018  scan_static_bus for USB3 port 3 done

  807 17:47:01.904736  scan_bus: bus USB3 port 3 finished in 6 msecs

  808 17:47:01.906807  USB3 port 4 scanning...

  809 17:47:01.910745  scan_static_bus for USB3 port 4

  810 17:47:01.914106  scan_static_bus for USB3 port 4 done

  811 17:47:01.918616  scan_bus: bus USB3 port 4 finished in 6 msecs

  812 17:47:01.921158  USB2 port 4 scanning...

  813 17:47:01.925423  scan_static_bus for USB2 port 4

  814 17:47:01.928290  scan_static_bus for USB2 port 4 done

  815 17:47:01.933156  scan_bus: bus USB2 port 4 finished in 6 msecs

  816 17:47:01.935537  USB3 port 5 scanning...

  817 17:47:01.939140  scan_static_bus for USB3 port 5

  818 17:47:01.942359  scan_static_bus for USB3 port 5 done

  819 17:47:01.947279  scan_bus: bus USB3 port 5 finished in 6 msecs

  820 17:47:01.950822  scan_static_bus for USB0 port 0 done

  821 17:47:01.955562  scan_bus: bus USB0 port 0 finished in 219 msecs

  822 17:47:01.959679  scan_static_bus for PCI: 00:14.0 done

  823 17:47:01.964399  scan_bus: bus PCI: 00:14.0 finished in 236 msecs

  824 17:47:01.966543  PCI: 00:15.2 scanning...

  825 17:47:01.970231  scan_generic_bus for PCI: 00:15.2

  826 17:47:01.974441  bus: PCI: 00:15.2[0]->I2C: 02:4a enabled

  827 17:47:01.978855  scan_generic_bus for PCI: 00:15.2 done

  828 17:47:01.983663  scan_bus: bus PCI: 00:15.2 finished in 11 msecs

  829 17:47:01.986252  PCI: 00:15.3 scanning...

  830 17:47:01.989606  scan_generic_bus for PCI: 00:15.3

  831 17:47:01.993918  bus: PCI: 00:15.3[0]->I2C: 03:4a enabled

  832 17:47:01.997491  scan_generic_bus for PCI: 00:15.3 done

  833 17:47:02.002445  scan_bus: bus PCI: 00:15.3 finished in 11 msecs

  834 17:47:02.004872  PCI: 00:19.0 scanning...

  835 17:47:02.008445  scan_generic_bus for PCI: 00:19.0

  836 17:47:02.012549  bus: PCI: 00:19.0[0]->I2C: 04:1a enabled

  837 17:47:02.016492  scan_generic_bus for PCI: 00:19.0 done

  838 17:47:02.021407  scan_bus: bus PCI: 00:19.0 finished in 11 msecs

  839 17:47:02.023942  PCI: 00:1c.0 scanning...

  840 17:47:02.027511  do_pci_scan_bridge for PCI: 00:1c.0

  841 17:47:02.030820  PCI: pci_scan_bus for bus 01

  842 17:47:02.034168  PCI: 01:00.0 [10ec/8168] ops

  843 17:47:02.037351  PCI: 01:00.0 [10ec/8168] enabled

  844 17:47:02.041298  Enabling Common Clock Configuration

  845 17:47:02.045278  L1 Sub-State supported from root port 28

  846 17:47:02.047936  L1 Sub-State Support = 0xf

  847 17:47:02.051182  CommonModeRestoreTime = 0x96

  848 17:47:02.054887  Power On Value = 0xf, Power On Scale = 0x1

  849 17:47:02.056658  ASPM: Enabled L1

  850 17:47:02.060714  PCIe: Max_Payload_Size adjusted to 128

  851 17:47:02.065200  scan_bus: bus PCI: 00:1c.0 finished in 36 msecs

  852 17:47:02.068354  PCI: 00:1e.2 scanning...

  853 17:47:02.071955  scan_generic_bus for PCI: 00:1e.2

  854 17:47:02.075423  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

  855 17:47:02.079131  scan_generic_bus for PCI: 00:1e.2 done

  856 17:47:02.083689  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

  857 17:47:02.086879  PCI: 00:1f.0 scanning...

  858 17:47:02.090378  scan_static_bus for PCI: 00:1f.0

  859 17:47:02.092162  PNP: 0c09.0 enabled

  860 17:47:02.094971  PNP: 0c09.0 scanning...

  861 17:47:02.097927  scan_static_bus for PNP: 0c09.0

  862 17:47:02.102074  scan_static_bus for PNP: 0c09.0 done

  863 17:47:02.106598  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

  864 17:47:02.109877  scan_static_bus for PCI: 00:1f.0 done

  865 17:47:02.115003  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

  866 17:47:02.117964  PCI: 00:1f.3 scanning...

  867 17:47:02.120710  scan_static_bus for PCI: 00:1f.3

  868 17:47:02.124903  scan_static_bus for PCI: 00:1f.3 done

  869 17:47:02.129791  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

  870 17:47:02.132568  PCI: 00:1f.4 scanning...

  871 17:47:02.135862  scan_generic_bus for PCI: 00:1f.4

  872 17:47:02.140346  scan_generic_bus for PCI: 00:1f.4 done

  873 17:47:02.144504  scan_bus: bus PCI: 00:1f.4 finished in 7 msecs

  874 17:47:02.146678  PCI: 00:1f.5 scanning...

  875 17:47:02.150515  scan_generic_bus for PCI: 00:1f.5

  876 17:47:02.154826  scan_generic_bus for PCI: 00:1f.5 done

  877 17:47:02.159596  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

  878 17:47:02.164308  scan_bus: bus DOMAIN: 0000 finished in 653 msecs

  879 17:47:02.167731  scan_static_bus for Root Device done

  880 17:47:02.172417  scan_bus: bus Root Device finished in 672 msecs

  881 17:47:02.173748  done

  882 17:47:02.179650  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1037 ms

  883 17:47:02.185193  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  884 17:47:02.190875  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  885 17:47:02.196801  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

  886 17:47:02.203196  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  887 17:47:02.205829  Chrome EC: UHEPI supported

  888 17:47:02.211574  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

  889 17:47:02.215462  SPI flash protection: WPSW=0 SRP0=0

  890 17:47:02.219994  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

  891 17:47:02.226263  BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 39 ms

  892 17:47:02.229330  found VGA at PCI: 00:02.0

  893 17:47:02.232250  Setting up VGA for PCI: 00:02.0

  894 17:47:02.237384  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

  895 17:47:02.241949  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

  896 17:47:02.244595  Allocating resources...

  897 17:47:02.246495  Reading resources...

  898 17:47:02.250920  Root Device read_resources bus 0 link: 0

  899 17:47:02.255790  CPU_CLUSTER: 0 read_resources bus 0 link: 0

  900 17:47:02.261149  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

  901 17:47:02.265146  DOMAIN: 0000 read_resources bus 0 link: 0

  902 17:47:02.270635  PCI: 00:04.0 read_resources bus 1 link: 0

  903 17:47:02.275813  PCI: 00:04.0 read_resources bus 1 link: 0 done

  904 17:47:02.281062  PCI: 00:14.0 read_resources bus 0 link: 0

  905 17:47:02.285048  USB0 port 0 read_resources bus 0 link: 0

  906 17:47:02.294366  USB0 port 0 read_resources bus 0 link: 0 done

  907 17:47:02.299507  PCI: 00:14.0 read_resources bus 0 link: 0 done

  908 17:47:02.304652  PCI: 00:15.2 read_resources bus 2 link: 0

  909 17:47:02.309870  PCI: 00:15.2 read_resources bus 2 link: 0 done

  910 17:47:02.314316  PCI: 00:15.3 read_resources bus 3 link: 0

  911 17:47:02.319860  PCI: 00:15.3 read_resources bus 3 link: 0 done

  912 17:47:02.324870  PCI: 00:19.0 read_resources bus 4 link: 0

  913 17:47:02.329756  PCI: 00:19.0 read_resources bus 4 link: 0 done

  914 17:47:02.334771  PCI: 00:1c.0 read_resources bus 1 link: 0

  915 17:47:02.340551  PCI: 00:1c.0 read_resources bus 1 link: 0 done

  916 17:47:02.345223  PCI: 00:1e.2 read_resources bus 5 link: 0

  917 17:47:02.350154  PCI: 00:1e.2 read_resources bus 5 link: 0 done

  918 17:47:02.355452  PCI: 00:1f.0 read_resources bus 0 link: 0

  919 17:47:02.360172  PCI: 00:1f.0 read_resources bus 0 link: 0 done

  920 17:47:02.366338  DOMAIN: 0000 read_resources bus 0 link: 0 done

  921 17:47:02.371438  Root Device read_resources bus 0 link: 0 done

  922 17:47:02.373991  Done reading resources.

  923 17:47:02.379404  Show resources in subtree (Root Device)...After reading.

  924 17:47:02.383990   Root Device child on link 0 CPU_CLUSTER: 0

  925 17:47:02.387813    CPU_CLUSTER: 0 child on link 0 APIC: 00

  926 17:47:02.389652     APIC: 00

  927 17:47:02.390818     APIC: 02

  928 17:47:02.394837    DOMAIN: 0000 child on link 0 PCI: 00:00.0

  929 17:47:02.404750    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  930 17:47:02.414060    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

  931 17:47:02.415896     PCI: 00:00.0

  932 17:47:02.425761     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

  933 17:47:02.434520     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

  934 17:47:02.443919     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

  935 17:47:02.453027     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

  936 17:47:02.462858     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

  937 17:47:02.471923     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

  938 17:47:02.481341     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

  939 17:47:02.490959     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

  940 17:47:02.499919     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

  941 17:47:02.509167     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

  942 17:47:02.518215     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

  943 17:47:02.527581     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

  944 17:47:02.537432     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

  945 17:47:02.547289     PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d

  946 17:47:02.556029     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

  947 17:47:02.565534     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

  948 17:47:02.566653     PCI: 00:02.0

  949 17:47:02.577288     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

  950 17:47:02.587791     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

  951 17:47:02.595807     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

  952 17:47:02.600749     PCI: 00:04.0 child on link 0 GENERIC: 0.0

  953 17:47:02.610663     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

  954 17:47:02.612124      GENERIC: 0.0

  955 17:47:02.613565     PCI: 00:08.0

  956 17:47:02.623782     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  957 17:47:02.625389     PCI: 00:12.0

  958 17:47:02.635075     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  959 17:47:02.639605     PCI: 00:14.0 child on link 0 USB0 port 0

  960 17:47:02.649857     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

  961 17:47:02.654312      USB0 port 0 child on link 0 USB2 port 0

  962 17:47:02.655488       USB2 port 0

  963 17:47:02.657762       USB2 port 1

  964 17:47:02.659240       USB2 port 2

  965 17:47:02.660811       USB2 port 3

  966 17:47:02.662669       USB2 port 5

  967 17:47:02.664532       USB2 port 6

  968 17:47:02.667020       USB2 port 9

  969 17:47:02.668212       USB3 port 0

  970 17:47:02.670139       USB3 port 1

  971 17:47:02.671605       USB3 port 2

  972 17:47:02.673224       USB3 port 3

  973 17:47:02.674939       USB3 port 4

  974 17:47:02.676805       USB2 port 4

  975 17:47:02.678683       USB3 port 5

  976 17:47:02.680430     PCI: 00:14.2

  977 17:47:02.690296     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

  978 17:47:02.700454     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

  979 17:47:02.701847     PCI: 00:14.3

  980 17:47:02.712143     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

  981 17:47:02.713786     PCI: 00:14.5

  982 17:47:02.723526     PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  983 17:47:02.725369     PCI: 00:15.0

  984 17:47:02.729461     PCI: 00:15.2 child on link 0 I2C: 02:4a

  985 17:47:02.739371     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  986 17:47:02.741312      I2C: 02:4a

  987 17:47:02.745414     PCI: 00:15.3 child on link 0 I2C: 03:4a

  988 17:47:02.754686     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  989 17:47:02.756556      I2C: 03:4a

  990 17:47:02.757929     PCI: 00:16.0

  991 17:47:02.767770     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  992 17:47:02.772009     PCI: 00:19.0 child on link 0 I2C: 04:1a

  993 17:47:02.782184     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  994 17:47:02.784506      I2C: 04:1a

  995 17:47:02.785561     PCI: 00:1a.0

  996 17:47:02.795611     PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  997 17:47:02.799633     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

  998 17:47:02.808162     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

  999 17:47:02.818448     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1000 17:47:02.827366     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1001 17:47:02.828728      PCI: 01:00.0

 1002 17:47:02.837746      PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10

 1003 17:47:02.847385      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1004 17:47:02.857590      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20

 1005 17:47:02.859420     PCI: 00:1e.0

 1006 17:47:02.870159     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1007 17:47:02.880310     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1008 17:47:02.884520     PCI: 00:1e.2 child on link 0 SPI: 00

 1009 17:47:02.894225     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1010 17:47:02.895851      SPI: 00

 1011 17:47:02.900026     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1012 17:47:02.908200     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1013 17:47:02.917112     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1014 17:47:02.919177      PNP: 0c09.0

 1015 17:47:02.928204      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1016 17:47:02.929423     PCI: 00:1f.3

 1017 17:47:02.939715     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1018 17:47:02.949587     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1019 17:47:02.951575     PCI: 00:1f.4

 1020 17:47:02.960346     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1021 17:47:02.969598     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1022 17:47:02.971272     PCI: 00:1f.5

 1023 17:47:02.980383     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1024 17:47:02.988672  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1025 17:47:02.994022   PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1026 17:47:02.998061    PCI: 01:00.0 10 *  [0x0 - 0xff] io

 1027 17:47:03.004306   PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done

 1028 17:47:03.010079   PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1029 17:47:03.014016    PCI: 01:00.0 20 *  [0x0 - 0x3fff] mem

 1030 17:47:03.018771    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1031 17:47:03.026000   PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1032 17:47:03.033354   PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1033 17:47:03.040590   PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1034 17:47:03.047947  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1035 17:47:03.054026  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1036 17:47:03.061515   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1037 17:47:03.068936   update_constraints: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1038 17:47:03.076539   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1039 17:47:03.084604   update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1040 17:47:03.087430   DOMAIN: 0000: Resource ranges:

 1041 17:47:03.090767   * Base: 1000, Size: 800, Tag: 100

 1042 17:47:03.094864   * Base: 1900, Size: d6a0, Tag: 100

 1043 17:47:03.097752   * Base: efc0, Size: 1040, Tag: 100

 1044 17:47:03.103278    PCI: 00:1c.0 1c *  [0x2000 - 0x2fff] limit: 2fff io

 1045 17:47:03.108932    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1046 17:47:03.115625  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1047 17:47:03.122563  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1048 17:47:03.129789   update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1049 17:47:03.137935   update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)

 1050 17:47:03.145190   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1051 17:47:03.152975   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1052 17:47:03.160422   update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed)

 1053 17:47:03.168402   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1054 17:47:03.176496   update_constraints: PCI: 00:00.0 06 base fe000000 limit fe00ffff mem (fixed)

 1055 17:47:03.183744   update_constraints: PCI: 00:00.0 07 base fed90000 limit fed90fff mem (fixed)

 1056 17:47:03.191455   update_constraints: PCI: 00:00.0 08 base fed91000 limit fed91fff mem (fixed)

 1057 17:47:03.199435   update_constraints: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1058 17:47:03.206588   update_constraints: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1059 17:47:03.214408   update_constraints: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1060 17:47:03.222401   update_constraints: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1061 17:47:03.229804   update_constraints: PCI: 00:00.0 0d base 100000000 limit 15e7fffff mem (fixed)

 1062 17:47:03.237902   update_constraints: PCI: 00:00.0 0e base 000a0000 limit 000bffff mem (fixed)

 1063 17:47:03.245463   update_constraints: PCI: 00:00.0 0f base 000c0000 limit 000fffff mem (fixed)

 1064 17:47:03.253111   update_constraints: PCI: 00:1e.0 10 base fe032000 limit fe032fff mem (fixed)

 1065 17:47:03.255945   DOMAIN: 0000: Resource ranges:

 1066 17:47:03.260152   * Base: 9f800000, Size: 40800000, Tag: 200

 1067 17:47:03.264640   * Base: f0000000, Size: c000000, Tag: 200

 1068 17:47:03.268926   * Base: fc001000, Size: 1fff000, Tag: 200

 1069 17:47:03.272999   * Base: fe010000, Size: 22000, Tag: 200

 1070 17:47:03.277221   * Base: fe033000, Size: cdd000, Tag: 200

 1071 17:47:03.281373   * Base: fed18000, Size: 68000, Tag: 200

 1072 17:47:03.285528   * Base: fed84000, Size: c000, Tag: 200

 1073 17:47:03.289249   * Base: fed92000, Size: e000, Tag: 200

 1074 17:47:03.293405   * Base: feda2000, Size: 125e000, Tag: 200

 1075 17:47:03.298695   * Base: 15e800000, Size: 7ea1800000, Tag: 100200

 1076 17:47:03.305338    PCI: 00:02.0 18 *  [0xa0000000 - 0xafffffff] limit: afffffff prefmem

 1077 17:47:03.312298    PCI: 00:02.0 10 *  [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem

 1078 17:47:03.319152    PCI: 00:1c.0 20 *  [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem

 1079 17:47:03.325589    PCI: 00:1f.3 20 *  [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem

 1080 17:47:03.332255    PCI: 00:14.0 10 *  [0x9fa00000 - 0x9fa0ffff] limit: 9fa0ffff mem

 1081 17:47:03.338570    PCI: 00:04.0 10 *  [0x9fa10000 - 0x9fa17fff] limit: 9fa17fff mem

 1082 17:47:03.345401    PCI: 00:14.3 10 *  [0x9fa18000 - 0x9fa1bfff] limit: 9fa1bfff mem

 1083 17:47:03.352263    PCI: 00:1f.3 10 *  [0x9fa1c000 - 0x9fa1ffff] limit: 9fa1ffff mem

 1084 17:47:03.358858    PCI: 00:14.2 10 *  [0x9fa20000 - 0x9fa21fff] limit: 9fa21fff mem

 1085 17:47:03.365225    PCI: 00:08.0 10 *  [0x9fa22000 - 0x9fa22fff] limit: 9fa22fff mem

 1086 17:47:03.371723    PCI: 00:12.0 10 *  [0x9fa23000 - 0x9fa23fff] limit: 9fa23fff mem

 1087 17:47:03.377838    PCI: 00:14.2 18 *  [0x9fa24000 - 0x9fa24fff] limit: 9fa24fff mem

 1088 17:47:03.384927    PCI: 00:14.5 10 *  [0x9fa25000 - 0x9fa25fff] limit: 9fa25fff mem

 1089 17:47:03.391283    PCI: 00:15.2 10 *  [0x9fa26000 - 0x9fa26fff] limit: 9fa26fff mem

 1090 17:47:03.398369    PCI: 00:15.3 10 *  [0x9fa27000 - 0x9fa27fff] limit: 9fa27fff mem

 1091 17:47:03.404802    PCI: 00:16.0 10 *  [0x9fa28000 - 0x9fa28fff] limit: 9fa28fff mem

 1092 17:47:03.411450    PCI: 00:19.0 10 *  [0x9fa29000 - 0x9fa29fff] limit: 9fa29fff mem

 1093 17:47:03.417761    PCI: 00:1a.0 10 *  [0x9fa2a000 - 0x9fa2afff] limit: 9fa2afff mem

 1094 17:47:03.424296    PCI: 00:1e.0 18 *  [0x9fa2b000 - 0x9fa2bfff] limit: 9fa2bfff mem

 1095 17:47:03.431284    PCI: 00:1e.2 10 *  [0x9fa2c000 - 0x9fa2cfff] limit: 9fa2cfff mem

 1096 17:47:03.437404    PCI: 00:1f.5 10 *  [0x9fa2d000 - 0x9fa2dfff] limit: 9fa2dfff mem

 1097 17:47:03.444302    PCI: 00:1f.4 10 *  [0x9fa2e000 - 0x9fa2e0ff] limit: 9fa2e0ff mem

 1098 17:47:03.451680  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1099 17:47:03.458103  PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff

 1100 17:47:03.461684   PCI: 00:1c.0: Resource ranges:

 1101 17:47:03.465818   * Base: 2000, Size: 1000, Tag: 100

 1102 17:47:03.470954    PCI: 01:00.0 10 *  [0x2000 - 0x20ff] limit: 20ff io

 1103 17:47:03.478177  PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done

 1104 17:47:03.485573  PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff

 1105 17:47:03.489553   PCI: 00:1c.0: Resource ranges:

 1106 17:47:03.493533   * Base: 9f800000, Size: 100000, Tag: 200

 1107 17:47:03.500289    PCI: 01:00.0 20 *  [0x9f800000 - 0x9f803fff] limit: 9f803fff mem

 1108 17:47:03.506338    PCI: 01:00.0 18 *  [0x9f804000 - 0x9f804fff] limit: 9f804fff mem

 1109 17:47:03.515387  PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done

 1110 17:47:03.522192  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1111 17:47:03.526590  Root Device assign_resources, bus 0 link: 0

 1112 17:47:03.531088  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1113 17:47:03.539864  PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64

 1114 17:47:03.548068  PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64

 1115 17:47:03.555889  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1116 17:47:03.564237  PCI: 00:04.0 10 <- [0x009fa10000 - 0x009fa17fff] size 0x00008000 gran 0x0f mem64

 1117 17:47:03.568718  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1118 17:47:03.573145  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1119 17:47:03.581832  PCI: 00:08.0 10 <- [0x009fa22000 - 0x009fa22fff] size 0x00001000 gran 0x0c mem64

 1120 17:47:03.589822  PCI: 00:12.0 10 <- [0x009fa23000 - 0x009fa23fff] size 0x00001000 gran 0x0c mem64

 1121 17:47:03.598191  PCI: 00:14.0 10 <- [0x009fa00000 - 0x009fa0ffff] size 0x00010000 gran 0x10 mem64

 1122 17:47:03.603483  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1123 17:47:03.607450  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1124 17:47:03.615733  PCI: 00:14.2 10 <- [0x009fa20000 - 0x009fa21fff] size 0x00002000 gran 0x0d mem64

 1125 17:47:03.623836  PCI: 00:14.2 18 <- [0x009fa24000 - 0x009fa24fff] size 0x00001000 gran 0x0c mem64

 1126 17:47:03.632250  PCI: 00:14.3 10 <- [0x009fa18000 - 0x009fa1bfff] size 0x00004000 gran 0x0e mem64

 1127 17:47:03.640396  PCI: 00:14.5 10 <- [0x009fa25000 - 0x009fa25fff] size 0x00001000 gran 0x0c mem64

 1128 17:47:03.648409  PCI: 00:15.2 10 <- [0x009fa26000 - 0x009fa26fff] size 0x00001000 gran 0x0c mem64

 1129 17:47:03.653227  PCI: 00:15.2 assign_resources, bus 2 link: 0

 1130 17:47:03.657741  PCI: 00:15.2 assign_resources, bus 2 link: 0

 1131 17:47:03.666228  PCI: 00:15.3 10 <- [0x009fa27000 - 0x009fa27fff] size 0x00001000 gran 0x0c mem64

 1132 17:47:03.670371  PCI: 00:15.3 assign_resources, bus 3 link: 0

 1133 17:47:03.675650  PCI: 00:15.3 assign_resources, bus 3 link: 0

 1134 17:47:03.684733  PCI: 00:16.0 10 <- [0x009fa28000 - 0x009fa28fff] size 0x00001000 gran 0x0c mem64

 1135 17:47:03.692141  PCI: 00:19.0 10 <- [0x009fa29000 - 0x009fa29fff] size 0x00001000 gran 0x0c mem64

 1136 17:47:03.696612  PCI: 00:19.0 assign_resources, bus 4 link: 0

 1137 17:47:03.701511  PCI: 00:19.0 assign_resources, bus 4 link: 0

 1138 17:47:03.709970  PCI: 00:1a.0 10 <- [0x009fa2a000 - 0x009fa2afff] size 0x00001000 gran 0x0c mem64

 1139 17:47:03.718521  PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io

 1140 17:47:03.728357  PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1141 17:47:03.736741  PCI: 00:1c.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 01 mem

 1142 17:47:03.741443  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1143 17:47:03.749306  PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io

 1144 17:47:03.757290  PCI: 01:00.0 18 <- [0x009f804000 - 0x009f804fff] size 0x00001000 gran 0x0c mem64

 1145 17:47:03.765340  PCI: 01:00.0 20 <- [0x009f800000 - 0x009f803fff] size 0x00004000 gran 0x0e mem64

 1146 17:47:03.769910  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1147 17:47:03.778056  PCI: 00:1e.0 18 <- [0x009fa2b000 - 0x009fa2bfff] size 0x00001000 gran 0x0c mem64

 1148 17:47:03.786046  PCI: 00:1e.2 10 <- [0x009fa2c000 - 0x009fa2cfff] size 0x00001000 gran 0x0c mem64

 1149 17:47:03.790866  PCI: 00:1e.2 assign_resources, bus 5 link: 0

 1150 17:47:03.796106  PCI: 00:1e.2 assign_resources, bus 5 link: 0

 1151 17:47:03.800645  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1152 17:47:03.805806  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1153 17:47:03.810692  LPC: Trying to open IO window from 800 size 1ff

 1154 17:47:03.819151  PCI: 00:1f.3 10 <- [0x009fa1c000 - 0x009fa1ffff] size 0x00004000 gran 0x0e mem64

 1155 17:47:03.826730  PCI: 00:1f.3 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 mem64

 1156 17:47:03.834624  PCI: 00:1f.4 10 <- [0x009fa2e000 - 0x009fa2e0ff] size 0x00000100 gran 0x08 mem64

 1157 17:47:03.843040  PCI: 00:1f.5 10 <- [0x009fa2d000 - 0x009fa2dfff] size 0x00001000 gran 0x0c mem

 1158 17:47:03.847813  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1159 17:47:03.852373  Root Device assign_resources, bus 0 link: 0

 1160 17:47:03.855269  Done setting resources.

 1161 17:47:03.861113  Show resources in subtree (Root Device)...After assigning values.

 1162 17:47:03.866322   Root Device child on link 0 CPU_CLUSTER: 0

 1163 17:47:03.870412    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1164 17:47:03.871138     APIC: 00

 1165 17:47:03.872460     APIC: 02

 1166 17:47:03.876796    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1167 17:47:03.886115    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1168 17:47:03.895740    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1169 17:47:03.897632     PCI: 00:00.0

 1170 17:47:03.906940     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1171 17:47:03.916923     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1172 17:47:03.925992     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1173 17:47:03.935282     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1174 17:47:03.944321     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1175 17:47:03.953899     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1176 17:47:03.963632     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1177 17:47:03.972680     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1178 17:47:03.981569     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1179 17:47:03.990960     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1180 17:47:03.999949     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1181 17:47:04.009906     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1182 17:47:04.019107     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1183 17:47:04.029122     PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1184 17:47:04.038532     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1185 17:47:04.047508     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1186 17:47:04.049466     PCI: 00:02.0

 1187 17:47:04.059752     PCI: 00:02.0 resource base b0000000 size 1000000 align 24 gran 24 limit b0ffffff flags 60000201 index 10

 1188 17:47:04.070212     PCI: 00:02.0 resource base a0000000 size 10000000 align 28 gran 28 limit afffffff flags 60001201 index 18

 1189 17:47:04.078960     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1190 17:47:04.083613     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1191 17:47:04.094665     PCI: 00:04.0 resource base 9fa10000 size 8000 align 15 gran 15 limit 9fa17fff flags 60000201 index 10

 1192 17:47:04.096097      GENERIC: 0.0

 1193 17:47:04.097262     PCI: 00:08.0

 1194 17:47:04.107405     PCI: 00:08.0 resource base 9fa22000 size 1000 align 12 gran 12 limit 9fa22fff flags 60000201 index 10

 1195 17:47:04.109094     PCI: 00:12.0

 1196 17:47:04.119360     PCI: 00:12.0 resource base 9fa23000 size 1000 align 12 gran 12 limit 9fa23fff flags 60000201 index 10

 1197 17:47:04.124149     PCI: 00:14.0 child on link 0 USB0 port 0

 1198 17:47:04.134828     PCI: 00:14.0 resource base 9fa00000 size 10000 align 16 gran 16 limit 9fa0ffff flags 60000201 index 10

 1199 17:47:04.138925      USB0 port 0 child on link 0 USB2 port 0

 1200 17:47:04.140690       USB2 port 0

 1201 17:47:04.142392       USB2 port 1

 1202 17:47:04.144029       USB2 port 2

 1203 17:47:04.145930       USB2 port 3

 1204 17:47:04.147454       USB2 port 5

 1205 17:47:04.149038       USB2 port 6

 1206 17:47:04.151168       USB2 port 9

 1207 17:47:04.152770       USB3 port 0

 1208 17:47:04.154395       USB3 port 1

 1209 17:47:04.156633       USB3 port 2

 1210 17:47:04.158421       USB3 port 3

 1211 17:47:04.160372       USB3 port 4

 1212 17:47:04.162078       USB2 port 4

 1213 17:47:04.163718       USB3 port 5

 1214 17:47:04.165585     PCI: 00:14.2

 1215 17:47:04.175568     PCI: 00:14.2 resource base 9fa20000 size 2000 align 13 gran 13 limit 9fa21fff flags 60000201 index 10

 1216 17:47:04.185697     PCI: 00:14.2 resource base 9fa24000 size 1000 align 12 gran 12 limit 9fa24fff flags 60000201 index 18

 1217 17:47:04.187214     PCI: 00:14.3

 1218 17:47:04.197520     PCI: 00:14.3 resource base 9fa18000 size 4000 align 14 gran 14 limit 9fa1bfff flags 60000201 index 10

 1219 17:47:04.199042     PCI: 00:14.5

 1220 17:47:04.209468     PCI: 00:14.5 resource base 9fa25000 size 1000 align 12 gran 12 limit 9fa25fff flags 60000201 index 10

 1221 17:47:04.211358     PCI: 00:15.0

 1222 17:47:04.215873     PCI: 00:15.2 child on link 0 I2C: 02:4a

 1223 17:47:04.225824     PCI: 00:15.2 resource base 9fa26000 size 1000 align 12 gran 12 limit 9fa26fff flags 60000201 index 10

 1224 17:47:04.227665      I2C: 02:4a

 1225 17:47:04.232021     PCI: 00:15.3 child on link 0 I2C: 03:4a

 1226 17:47:04.242498     PCI: 00:15.3 resource base 9fa27000 size 1000 align 12 gran 12 limit 9fa27fff flags 60000201 index 10

 1227 17:47:04.243399      I2C: 03:4a

 1228 17:47:04.245692     PCI: 00:16.0

 1229 17:47:04.255648     PCI: 00:16.0 resource base 9fa28000 size 1000 align 12 gran 12 limit 9fa28fff flags 60000201 index 10

 1230 17:47:04.259792     PCI: 00:19.0 child on link 0 I2C: 04:1a

 1231 17:47:04.270524     PCI: 00:19.0 resource base 9fa29000 size 1000 align 12 gran 12 limit 9fa29fff flags 60000201 index 10

 1232 17:47:04.271468      I2C: 04:1a

 1233 17:47:04.273772     PCI: 00:1a.0

 1234 17:47:04.284151     PCI: 00:1a.0 resource base 9fa2a000 size 1000 align 12 gran 12 limit 9fa2afff flags 60000201 index 10

 1235 17:47:04.288050     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1236 17:47:04.297691     PCI: 00:1c.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c

 1237 17:47:04.309594     PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1238 17:47:04.319757     PCI: 00:1c.0 resource base 9f800000 size 100000 align 20 gran 20 limit 9f8fffff flags 60080202 index 20

 1239 17:47:04.321750      PCI: 01:00.0

 1240 17:47:04.331343      PCI: 01:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10

 1241 17:47:04.341574      PCI: 01:00.0 resource base 9f804000 size 1000 align 12 gran 12 limit 9f804fff flags 60000201 index 18

 1242 17:47:04.351415      PCI: 01:00.0 resource base 9f800000 size 4000 align 14 gran 14 limit 9f803fff flags 60000201 index 20

 1243 17:47:04.353258     PCI: 00:1e.0

 1244 17:47:04.364311     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1245 17:47:04.374561     PCI: 00:1e.0 resource base 9fa2b000 size 1000 align 12 gran 12 limit 9fa2bfff flags 60000201 index 18

 1246 17:47:04.378384     PCI: 00:1e.2 child on link 0 SPI: 00

 1247 17:47:04.388620     PCI: 00:1e.2 resource base 9fa2c000 size 1000 align 12 gran 12 limit 9fa2cfff flags 60000201 index 10

 1248 17:47:04.390027      SPI: 00

 1249 17:47:04.394472     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1250 17:47:04.402729     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1251 17:47:04.411946     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1252 17:47:04.413516      PNP: 0c09.0

 1253 17:47:04.422612      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1254 17:47:04.424524     PCI: 00:1f.3

 1255 17:47:04.434114     PCI: 00:1f.3 resource base 9fa1c000 size 4000 align 14 gran 14 limit 9fa1ffff flags 60000201 index 10

 1256 17:47:04.445070     PCI: 00:1f.3 resource base 9f900000 size 100000 align 20 gran 20 limit 9f9fffff flags 60000201 index 20

 1257 17:47:04.446957     PCI: 00:1f.4

 1258 17:47:04.455601     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1259 17:47:04.466211     PCI: 00:1f.4 resource base 9fa2e000 size 100 align 12 gran 8 limit 9fa2e0ff flags 60000201 index 10

 1260 17:47:04.467387     PCI: 00:1f.5

 1261 17:47:04.477612     PCI: 00:1f.5 resource base 9fa2d000 size 1000 align 12 gran 12 limit 9fa2dfff flags 60000200 index 10

 1262 17:47:04.480726  Done allocating resources.

 1263 17:47:04.486560  BS: BS_DEV_RESOURCES run times (exec / console): 30 / 2219 ms

 1264 17:47:04.489545  Enabling resources...

 1265 17:47:04.493318  PCI: 00:00.0 subsystem <- 8086/9b71

 1266 17:47:04.495872  PCI: 00:00.0 cmd <- 06

 1267 17:47:04.499975  PCI: 00:02.0 subsystem <- 8086/9baa

 1268 17:47:04.502368  PCI: 00:02.0 cmd <- 03

 1269 17:47:04.506050  PCI: 00:04.0 subsystem <- 8086/1903

 1270 17:47:04.508315  PCI: 00:04.0 cmd <- 02

 1271 17:47:04.510701  PCI: 00:08.0 cmd <- 06

 1272 17:47:04.515075  PCI: 00:12.0 subsystem <- 8086/02f9

 1273 17:47:04.517108  PCI: 00:12.0 cmd <- 02

 1274 17:47:04.520656  PCI: 00:14.0 subsystem <- 8086/02ed

 1275 17:47:04.523203  PCI: 00:14.0 cmd <- 02

 1276 17:47:04.526086  PCI: 00:14.2 cmd <- 02

 1277 17:47:04.530028  PCI: 00:14.3 subsystem <- 8086/02f0

 1278 17:47:04.532477  PCI: 00:14.3 cmd <- 02

 1279 17:47:04.536412  PCI: 00:14.5 subsystem <- 8086/02f5

 1280 17:47:04.538716  PCI: 00:14.5 cmd <- 06

 1281 17:47:04.542682  PCI: 00:15.2 subsystem <- 8086/02ea

 1282 17:47:04.544642  PCI: 00:15.2 cmd <- 02

 1283 17:47:04.549086  PCI: 00:15.3 subsystem <- 8086/02eb

 1284 17:47:04.551334  PCI: 00:15.3 cmd <- 02

 1285 17:47:04.555185  PCI: 00:16.0 subsystem <- 8086/02e0

 1286 17:47:04.557585  PCI: 00:16.0 cmd <- 02

 1287 17:47:04.561263  PCI: 00:19.0 subsystem <- 8086/02c5

 1288 17:47:04.563304  PCI: 00:19.0 cmd <- 02

 1289 17:47:04.567352  PCI: 00:1a.0 subsystem <- 8086/02c4

 1290 17:47:04.570363  PCI: 00:1a.0 cmd <- 06

 1291 17:47:04.573573  PCI: 00:1c.0 bridge ctrl <- 0013

 1292 17:47:04.577003  PCI: 00:1c.0 subsystem <- 8086/02be

 1293 17:47:04.579822  PCI: 00:1c.0 cmd <- 07

 1294 17:47:04.583090  PCI: 00:1e.0 subsystem <- 8086/02a8

 1295 17:47:04.585730  PCI: 00:1e.0 cmd <- 06

 1296 17:47:04.589640  PCI: 00:1e.2 subsystem <- 8086/02aa

 1297 17:47:04.592333  PCI: 00:1e.2 cmd <- 06

 1298 17:47:04.596186  PCI: 00:1f.0 subsystem <- 8086/0285

 1299 17:47:04.598292  PCI: 00:1f.0 cmd <- 407

 1300 17:47:04.602375  PCI: 00:1f.3 subsystem <- 8086/02c8

 1301 17:47:04.604604  PCI: 00:1f.3 cmd <- 02

 1302 17:47:04.608349  PCI: 00:1f.4 subsystem <- 8086/02a3

 1303 17:47:04.610702  PCI: 00:1f.4 cmd <- 03

 1304 17:47:04.614397  PCI: 00:1f.5 subsystem <- 8086/02a4

 1305 17:47:04.616824  PCI: 00:1f.5 cmd <- 406

 1306 17:47:04.621444  PCI: 01:00.0 cmd <- 03

 1307 17:47:04.624181  done.

 1308 17:47:04.629553  BS: BS_DEV_ENABLE run times (exec / console): 11 / 126 ms

 1309 17:47:04.632286  Initializing devices...

 1310 17:47:04.633925  Root Device init

 1311 17:47:04.638654  Chrome EC: Set SMI mask to 0x0000000000000000

 1312 17:47:04.644043  Chrome EC: clear events_b mask to 0x0000000000000000

 1313 17:47:04.650249  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004

 1314 17:47:04.655867  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004

 1315 17:47:04.662846  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000000080004

 1316 17:47:04.667722  Chrome EC: Set WAKE mask to 0x0000000000000000

 1317 17:47:04.672752  Root Device init finished in 34 msecs

 1318 17:47:04.676830  PCI: 00:00.0 init

 1319 17:47:04.679894  CPU TDP = 15 Watts

 1320 17:47:04.681348  CPU PL1 = 15 Watts

 1321 17:47:04.684038  CPU PL2 = 35 Watts

 1322 17:47:04.685814  CPU PsysPL2 = 65 Watts

 1323 17:47:04.689821  PCI: 00:00.0 init finished in 9 msecs

 1324 17:47:04.691737  PCI: 00:02.0 init

 1325 17:47:04.694302  GMA: Found VBT in CBFS

 1326 17:47:04.697653  GMA: Found valid VBT in CBFS

 1327 17:47:04.701443  PCI: 00:02.0 init finished in 5 msecs

 1328 17:47:04.703552  PCI: 00:08.0 init

 1329 17:47:04.707456  PCI: 00:08.0 init finished in 0 msecs

 1330 17:47:04.709725  PCI: 00:12.0 init

 1331 17:47:04.713642  PCI: 00:12.0 init finished in 0 msecs

 1332 17:47:04.715350  PCI: 00:14.0 init

 1333 17:47:04.719686  PCI: 00:14.0 init finished in 0 msecs

 1334 17:47:04.721453  PCI: 00:14.2 init

 1335 17:47:04.725550  PCI: 00:14.2 init finished in 0 msecs

 1336 17:47:04.727817  PCI: 00:14.3 init

 1337 17:47:04.731589  PCI: 00:14.3 init finished in 0 msecs

 1338 17:47:04.734550  PCI: 00:15.2 init

 1339 17:47:04.737330  I2C bus 2 version 0x3132322a

 1340 17:47:04.741697  DW I2C bus 2 at 0x9fa26000 (400 KHz)

 1341 17:47:04.745331  PCI: 00:15.2 init finished in 6 msecs

 1342 17:47:04.747395  PCI: 00:15.3 init

 1343 17:47:04.750451  I2C bus 3 version 0x3132322a

 1344 17:47:04.753741  DW I2C bus 3 at 0x9fa27000 (400 KHz)

 1345 17:47:04.757776  PCI: 00:15.3 init finished in 6 msecs

 1346 17:47:04.759935  PCI: 00:16.0 init

 1347 17:47:04.763580  PCI: 00:16.0 init finished in 0 msecs

 1348 17:47:04.766233  PCI: 00:19.0 init

 1349 17:47:04.768933  I2C bus 4 version 0x3132322a

 1350 17:47:04.773162  DW I2C bus 4 at 0x9fa29000 (400 KHz)

 1351 17:47:04.776438  PCI: 00:19.0 init finished in 6 msecs

 1352 17:47:04.778544  PCI: 00:1a.0 init

 1353 17:47:04.782551  PCI: 00:1a.0 init finished in 0 msecs

 1354 17:47:04.785196  PCI: 00:1c.0 init

 1355 17:47:04.787533  Initializing PCH PCIe bridge.

 1356 17:47:04.791750  PCI: 00:1c.0 init finished in 3 msecs

 1357 17:47:04.794895  PCI: 00:1f.0 init

 1358 17:47:04.799413  IOAPIC: Initializing IOAPIC at 0xfec00000

 1359 17:47:04.803742  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1360 17:47:04.805417  IOAPIC: ID = 0x02

 1361 17:47:04.808650  IOAPIC: Dumping registers

 1362 17:47:04.810310    reg 0x0000: 0x02000000

 1363 17:47:04.813308    reg 0x0001: 0x00770020

 1364 17:47:04.816028    reg 0x0002: 0x00000000

 1365 17:47:04.820081  PCI: 00:1f.0 init finished in 21 msecs

 1366 17:47:04.822743  PCI: 00:1f.4 init

 1367 17:47:04.826602  PCI: 00:1f.4 init finished in 0 msecs

 1368 17:47:04.837252  PCI: 01:00.0 init

 1369 17:47:04.841394  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1370 17:47:04.848179  Error: Could not locate 'ethernet_mac0' in VPD

 1371 17:47:04.855143  r8168: mac address not found in VPD, using default 00:e0:4c:00:c0:b0

 1372 17:47:04.859818  r8168: ignore invalid MAC address in cbfs

 1373 17:47:04.862176  r8168: Resetting NIC...done

 1374 17:47:04.866077  r8168: Programming MAC Address...done

 1375 17:47:04.868514  r8168: Customized LED 0x5af

 1376 17:47:04.872572  r8168: read back LED setting as 0x5af

 1377 17:47:04.876585  PCI: 01:00.0 init finished in 35 msecs

 1378 17:47:04.878611  PNP: 0c09.0 init

 1379 17:47:04.884031  Google Chrome EC uptime: 2869330.701 seconds

 1380 17:47:04.888082  Google Chrome AP resets since EC boot: 1877

 1381 17:47:04.892485  Google Chrome most recent AP reset causes:

 1382 17:47:04.896930  	2866195.974: 32768 shutdown: power failure

 1383 17:47:04.901478  	2866195.984: 32768 shutdown: power failure

 1384 17:47:04.905645  	2866196.274: 32775 shutdown: entering G3

 1385 17:47:04.910230  	2869315.597: 32774 shutdown: by console command

 1386 17:47:04.915627  Google Chrome EC reset flags at last EC boot: power-on

 1387 17:47:04.919753  PNP: 0c09.0 init finished in 36 msecs

 1388 17:47:04.921710  Devices initialized

 1389 17:47:04.924833  Show all devs... After init.

 1390 17:47:04.926868  Root Device: enabled 1

 1391 17:47:04.929615  CPU_CLUSTER: 0: enabled 1

 1392 17:47:04.932333  DOMAIN: 0000: enabled 1

 1393 17:47:04.934118  APIC: 00: enabled 1

 1394 17:47:04.936736  PCI: 00:00.0: enabled 1

 1395 17:47:04.939085  PCI: 00:02.0: enabled 1

 1396 17:47:04.941471  PCI: 00:04.0: enabled 1

 1397 17:47:04.944120  PCI: 00:05.0: enabled 0

 1398 17:47:04.946395  PCI: 00:12.0: enabled 1

 1399 17:47:04.949150  PCI: 00:12.5: enabled 0

 1400 17:47:04.951544  PCI: 00:12.6: enabled 0

 1401 17:47:04.953524  PCI: 00:14.0: enabled 1

 1402 17:47:04.956044  PCI: 00:14.1: enabled 0

 1403 17:47:04.958962  PCI: 00:14.3: enabled 1

 1404 17:47:04.960521  PCI: 00:14.5: enabled 1

 1405 17:47:04.963289  PCI: 00:15.0: enabled 0

 1406 17:47:04.965669  PCI: 00:15.1: enabled 0

 1407 17:47:04.968067  PCI: 00:15.2: enabled 1

 1408 17:47:04.971366  PCI: 00:15.3: enabled 1

 1409 17:47:04.973245  PCI: 00:16.0: enabled 1

 1410 17:47:04.976009  PCI: 00:16.1: enabled 0

 1411 17:47:04.978081  PCI: 00:16.2: enabled 0

 1412 17:47:04.980469  PCI: 00:16.3: enabled 0

 1413 17:47:04.982981  PCI: 00:16.4: enabled 0

 1414 17:47:04.985237  PCI: 00:16.5: enabled 0

 1415 17:47:04.987581  PCI: 00:17.0: enabled 0

 1416 17:47:04.990556  PCI: 00:19.0: enabled 1

 1417 17:47:04.992945  PCI: 00:19.1: enabled 0

 1418 17:47:04.995081  PCI: 00:19.2: enabled 0

 1419 17:47:04.997384  PCI: 00:1a.0: enabled 1

 1420 17:47:04.999450  PCI: 00:1c.0: enabled 0

 1421 17:47:05.002417  PCI: 00:1c.1: enabled 0

 1422 17:47:05.005192  PCI: 00:1c.2: enabled 0

 1423 17:47:05.007368  PCI: 00:1c.3: enabled 0

 1424 17:47:05.009628  PCI: 00:1c.4: enabled 0

 1425 17:47:05.011854  PCI: 00:1c.5: enabled 0

 1426 17:47:05.014783  PCI: 00:1c.0: enabled 1

 1427 17:47:05.017309  PCI: 00:1c.7: enabled 0

 1428 17:47:05.019589  PCI: 00:1d.0: enabled 1

 1429 17:47:05.021918  PCI: 00:1d.1: enabled 0

 1430 17:47:05.024781  PCI: 00:1d.2: enabled 1

 1431 17:47:05.026593  PCI: 00:1d.3: enabled 0

 1432 17:47:05.029933  PCI: 00:1d.4: enabled 0

 1433 17:47:05.031728  PCI: 00:1d.5: enabled 1

 1434 17:47:05.033897  PCI: 00:1e.0: enabled 1

 1435 17:47:05.036492  PCI: 00:1e.1: enabled 0

 1436 17:47:05.039350  PCI: 00:1e.2: enabled 1

 1437 17:47:05.041093  PCI: 00:1e.3: enabled 0

 1438 17:47:05.043550  PCI: 00:1f.0: enabled 1

 1439 17:47:05.046079  PCI: 00:1f.1: enabled 0

 1440 17:47:05.048413  PCI: 00:1f.2: enabled 0

 1441 17:47:05.050671  PCI: 00:1f.3: enabled 1

 1442 17:47:05.053019  PCI: 00:1f.4: enabled 1

 1443 17:47:05.055416  PCI: 00:1f.5: enabled 1

 1444 17:47:05.058030  PCI: 00:1f.6: enabled 0

 1445 17:47:05.060253  GENERIC: 0.0: enabled 1

 1446 17:47:05.062821  USB0 port 0: enabled 1

 1447 17:47:05.065017  I2C: 02:4a: enabled 1

 1448 17:47:05.067376  I2C: 03:4a: enabled 1

 1449 17:47:05.069403  I2C: 04:1a: enabled 1

 1450 17:47:05.071743  PCI: 01:00.0: enabled 1

 1451 17:47:05.074231  PCI: 00:00.0: enabled 1

 1452 17:47:05.075997  SPI: 00: enabled 1

 1453 17:47:05.079052  PNP: 0c09.0: enabled 1

 1454 17:47:05.080733  USB2 port 0: enabled 1

 1455 17:47:05.083337  USB2 port 1: enabled 1

 1456 17:47:05.085441  USB2 port 2: enabled 1

 1457 17:47:05.088141  USB2 port 3: enabled 1

 1458 17:47:05.090525  USB2 port 5: enabled 1

 1459 17:47:05.093104  USB2 port 6: enabled 0

 1460 17:47:05.095027  USB2 port 9: enabled 1

 1461 17:47:05.097653  USB3 port 0: enabled 1

 1462 17:47:05.099418  USB3 port 1: enabled 1

 1463 17:47:05.101969  USB3 port 2: enabled 1

 1464 17:47:05.104151  USB3 port 3: enabled 1

 1465 17:47:05.106559  USB3 port 4: enabled 1

 1466 17:47:05.109425  USB2 port 4: enabled 1

 1467 17:47:05.111078  USB3 port 5: enabled 1

 1468 17:47:05.113678  APIC: 02: enabled 1

 1469 17:47:05.116059  PCI: 00:08.0: enabled 1

 1470 17:47:05.118670  PCI: 00:14.2: enabled 1

 1471 17:47:05.123800  BS: BS_DEV_INIT run times (exec / console): 28 / 459 ms

 1472 17:47:05.126450  Disabling ACPI via APMC.

 1473 17:47:05.132439  APMC done.

 1474 17:47:05.136915  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1475 17:47:05.140650  ELOG: NV offset 0xaf0000 size 0x4000

 1476 17:47:05.148459  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1477 17:47:05.154693  ELOG: Event(17) added with size 13 at 2023-10-09 17:47:05 UTC

 1478 17:47:05.161836  ELOG: Event(92) added with size 9 at 2023-10-09 17:47:05 UTC

 1479 17:47:05.167958  ELOG: Event(93) added with size 9 at 2023-10-09 17:47:05 UTC

 1480 17:47:05.174417  ELOG: Event(9E) added with size 10 at 2023-10-09 17:47:05 UTC

 1481 17:47:05.180350  ELOG: Event(9F) added with size 14 at 2023-10-09 17:47:05 UTC

 1482 17:47:05.186299  BS: BS_DEV_INIT exit times (exec / console): 7 / 49 ms

 1483 17:47:05.192239  ELOG: Event(A1) added with size 10 at 2023-10-09 17:47:05 UTC

 1484 17:47:05.200044  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1485 17:47:05.206094  ELOG: Event(A0) added with size 9 at 2023-10-09 17:47:05 UTC

 1486 17:47:05.210376  elog_add_boot_reason: Logged dev mode boot

 1487 17:47:05.216510  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1488 17:47:05.218568  Finalize devices...

 1489 17:47:05.220797  Devices finalized

 1490 17:47:05.225630  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1491 17:47:05.231362  FMAP: area RW_NVRAM found @ afa000 (20480 bytes)

 1492 17:47:05.236792  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1493 17:47:05.241333  ME: HFSTS1                  : 0x80030045

 1494 17:47:05.244986  ME: HFSTS2                  : 0x30280136

 1495 17:47:05.249654  ME: HFSTS3                  : 0x00000050

 1496 17:47:05.253498  ME: HFSTS4                  : 0x00004800

 1497 17:47:05.257085  ME: HFSTS5                  : 0x00000000

 1498 17:47:05.261707  ME: HFSTS6                  : 0x40400006

 1499 17:47:05.264424  ME: Manufacturing Mode      : NO

 1500 17:47:05.268257  ME: FW Partition Table      : OK

 1501 17:47:05.271618  ME: Bringup Loader Failure  : NO

 1502 17:47:05.274487  ME: Firmware Init Complete  : NO

 1503 17:47:05.277974  ME: Boot Options Present    : NO

 1504 17:47:05.281247  ME: Update In Progress      : NO

 1505 17:47:05.284939  ME: D0i3 Support            : YES

 1506 17:47:05.287839  ME: Low Power State Enabled : NO

 1507 17:47:05.291124  ME: CPU Replaced            : YES

 1508 17:47:05.295082  ME: CPU Replacement Valid   : YES

 1509 17:47:05.298031  ME: Current Working State   : 5

 1510 17:47:05.301704  ME: Current Operation State : 1

 1511 17:47:05.304467  ME: Current Operation Mode  : 3

 1512 17:47:05.307966  ME: Error Code              : 0

 1513 17:47:05.311333  ME: CPU Debug Disabled      : YES

 1514 17:47:05.314408  ME: TXT Support             : NO

 1515 17:47:05.320585  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms

 1516 17:47:05.326155  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1517 17:47:05.329473  CBFS: Locating 'fallback/dsdt.aml'

 1518 17:47:05.332816  CBFS: Found @ offset 636c0 size 32e0

 1519 17:47:05.338292  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1520 17:47:05.341359  CBFS: Locating 'fallback/slic'

 1521 17:47:05.346984  CBFS: 'fallback/slic' not found.

 1522 17:47:05.350849  ACPI: Writing ACPI tables at 99b31000.

 1523 17:47:05.352103  ACPI:    * FACS

 1524 17:47:05.354178  ACPI:    * DSDT

 1525 17:47:05.357037  Ramoops buffer: 0x100000@0x99a30000.

 1526 17:47:05.362036  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1527 17:47:05.366440  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1528 17:47:05.370364  Google Chrome EC: version:

 1529 17:47:05.372567  	ro: puff_v2.0.4638-67e4d7990

 1530 17:47:05.376281  	rw: puff_v2.0.4638-67e4d7990

 1531 17:47:05.377784    running image: 1

 1532 17:47:05.384382  PCI space above 4GB MMIO is at 0x15e800000, len = 0x7ea1800000

 1533 17:47:05.387093  ACPI:    * FADT

 1534 17:47:05.388152  SCI is IRQ9

 1535 17:47:05.392590  ACPI: added table 1/32, length now 40

 1536 17:47:05.394425  ACPI:     * SSDT

 1537 17:47:05.397643  Found 1 CPU(s) with 2 core(s) each.

 1538 17:47:05.401834  \_SB.PCI0.WFA3.WFA3: Intel WiFi PCI: 00:14.3

 1539 17:47:05.405687  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1540 17:47:05.410807  \_SB.PCI0.I2C2.PS17: Parade PS175 at I2C: 02:4a

 1541 17:47:05.415603  \_SB.PCI0.I2C3.RTD2: Realtek RTD2142 at I2C: 03:4a

 1542 17:47:05.420828  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 04:1a

 1543 17:47:05.426030  \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 01:00.0

 1544 17:47:05.430251  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1545 17:47:05.437744  EC returned error result code 3

 1546 17:47:05.441988  EC returned error result code 1

 1547 17:47:05.446114  PS2K: Bad resp from EC. Vivaldi disabled!

 1548 17:47:05.452758  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-A Front Left at USB2 port 0

 1549 17:47:05.458651  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-C Port Rear at USB2 port 1

 1550 17:47:05.464824  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-A Front Right at USB2 port 2

 1551 17:47:05.471582  \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Rear Right at USB2 port 3

 1552 17:47:05.477381  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Rear Left at USB2 port 5

 1553 17:47:05.482251  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1554 17:47:05.488972  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Front Left at USB3 port 0

 1555 17:47:05.495537  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Front Right at USB3 port 1

 1556 17:47:05.501809  \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Rear Right at USB3 port 2

 1557 17:47:05.507175  \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-C Rear at USB3 port 3

 1558 17:47:05.513089  \_SB.PCI0.XHCI.RHUB.SS05: USB3 Type-A Rear Left at USB3 port 4

 1559 17:47:05.519588  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-A Rear Middle at USB2 port 4

 1560 17:47:05.525982  \_SB.PCI0.XHCI.RHUB.SS06: USB3 Type-A Rear Middle at USB3 port 5

 1561 17:47:05.529761  ACPI: added table 2/32, length now 44

 1562 17:47:05.531386  ACPI:    * MCFG

 1563 17:47:05.535555  ACPI: added table 3/32, length now 48

 1564 17:47:05.537015  ACPI:    * TPM2

 1565 17:47:05.540203  TPM2 log created at 0x99a20000

 1566 17:47:05.543584  ACPI: added table 4/32, length now 52

 1567 17:47:05.546116  ACPI:    * MADT

 1568 17:47:05.547067  SCI is IRQ9

 1569 17:47:05.550681  ACPI: added table 5/32, length now 56

 1570 17:47:05.553055  current = 99b36070

 1571 17:47:05.554529  ACPI:    * DMAR

 1572 17:47:05.557978  ACPI: added table 6/32, length now 60

 1573 17:47:05.561957  ACPI: added table 7/32, length now 64

 1574 17:47:05.563252  ACPI:    * HPET

 1575 17:47:05.567156  ACPI: added table 8/32, length now 68

 1576 17:47:05.568730  ACPI: done.

 1577 17:47:05.571371  ACPI tables: 20912 bytes.

 1578 17:47:05.574423  smbios_write_tables: 99a1f000

 1579 17:47:05.577974  EC returned error result code 3

 1580 17:47:05.581471  Couldn't obtain OEM name from CBI

 1581 17:47:05.584273  Create SMBIOS type 17

 1582 17:47:05.587517  PCI: 00:00.0 (Intel Cannonlake)

 1583 17:47:05.590059  PCI: 00:14.3 (Intel WiFi)

 1584 17:47:05.593181  SMBIOS tables: 841 bytes.

 1585 17:47:05.596934  Writing table forward entry at 0x00000500

 1586 17:47:05.603844  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1629

 1587 17:47:05.606867  Writing coreboot table at 0x99b55000

 1588 17:47:05.613007   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1589 17:47:05.617225   1. 0000000000001000-000000000009ffff: RAM

 1590 17:47:05.622055   2. 00000000000a0000-00000000000fffff: RESERVED

 1591 17:47:05.626391   3. 0000000000100000-0000000099a1efff: RAM

 1592 17:47:05.632314   4. 0000000099a1f000-0000000099ba4fff: CONFIGURATION TABLES

 1593 17:47:05.637413   5. 0000000099ba5000-0000000099c0afff: RAMSTAGE

 1594 17:47:05.642971   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1595 17:47:05.647316   7. 000000009a000000-000000009f7fffff: RESERVED

 1596 17:47:05.652656   8. 00000000e0000000-00000000efffffff: RESERVED

 1597 17:47:05.657439   9. 00000000fc000000-00000000fc000fff: RESERVED

 1598 17:47:05.661524  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1599 17:47:05.666373  11. 00000000fed10000-00000000fed17fff: RESERVED

 1600 17:47:05.671690  12. 00000000fed80000-00000000fed83fff: RESERVED

 1601 17:47:05.675954  13. 00000000fed90000-00000000fed91fff: RESERVED

 1602 17:47:05.680989  14. 00000000feda0000-00000000feda1fff: RESERVED

 1603 17:47:05.685024  15. 0000000100000000-000000015e7fffff: RAM

 1604 17:47:05.688329  Graphics hand-off block not found

 1605 17:47:05.692603  FSP did not return a valid framebuffer

 1606 17:47:05.695281  Passing 4 GPIOs to payload:

 1607 17:47:05.700741              NAME |       PORT | POLARITY |     VALUE

 1608 17:47:05.705996               lid |  undefined |     high |      high

 1609 17:47:05.710802             power |  undefined |     high |       low

 1610 17:47:05.716188             oprom |  undefined |     high |       low

 1611 17:47:05.721294          EC in RW | 0x000000cb |     high |       low

 1612 17:47:05.722918  Board ID: 4

 1613 17:47:05.728021  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1614 17:47:05.733896  Wrote coreboot table at: 0x99b55000, 0x578 bytes, checksum f5b0

 1615 17:47:05.736625  coreboot table: 1424 bytes.

 1616 17:47:05.741054  IMD ROOT    0. 0x99fff000 0x00001000

 1617 17:47:05.744471  IMD SMALL   1. 0x99ffe000 0x00001000

 1618 17:47:05.748414  FSP MEMORY  2. 0x99c4e000 0x003b0000

 1619 17:47:05.751940  CONSOLE     3. 0x99c2e000 0x00020000

 1620 17:47:05.755492  FMAP        4. 0x99c2d000 0x00000578

 1621 17:47:05.759490  TIME STAMP  5. 0x99c2c000 0x00000910

 1622 17:47:05.762817  VBOOT WORK  6. 0x99c18000 0x00014000

 1623 17:47:05.766611  MRC DATA    7. 0x99c16000 0x00001958

 1624 17:47:05.770058  ROMSTG STCK 8. 0x99c15000 0x00001000

 1625 17:47:05.774146  AFTER CAR   9. 0x99c0b000 0x0000a000

 1626 17:47:05.777622  RAMSTAGE   10. 0x99ba4000 0x00067000

 1627 17:47:05.781341  REFCODE    11. 0x99b6f000 0x00035000

 1628 17:47:05.785629  SMM BACKUP 12. 0x99b5f000 0x00010000

 1629 17:47:05.788937  4f444749   13. 0x99b5d000 0x00002000

 1630 17:47:05.793012  COREBOOT   14. 0x99b55000 0x00008000

 1631 17:47:05.796852  ACPI       15. 0x99b31000 0x00024000

 1632 17:47:05.800093  ACPI GNVS  16. 0x99b30000 0x00001000

 1633 17:47:05.803610  RAMOOPS    17. 0x99a30000 0x00100000

 1634 17:47:05.807534  TPM2 TCGLOG18. 0x99a20000 0x00010000

 1635 17:47:05.811741  SMBIOS     19. 0x99a1f000 0x00000800

 1636 17:47:05.813350  IMD small region:

 1637 17:47:05.816998    IMD ROOT    0. 0x99ffec00 0x00000400

 1638 17:47:05.820927    FSP RUNTIME 1. 0x99ffebe0 0x00000004

 1639 17:47:05.824783    VPD         2. 0x99ffeb80 0x00000058

 1640 17:47:05.829038    POWER STATE 3. 0x99ffeb40 0x00000040

 1641 17:47:05.832916    ROMSTAGE    4. 0x99ffeb20 0x00000004

 1642 17:47:05.836858    MEM INFO    5. 0x99ffe960 0x000001b9

 1643 17:47:05.842821  BS: BS_WRITE_TABLES run times (exec / console): 11 / 504 ms

 1644 17:47:05.846009  MTRR: Physical address space:

 1645 17:47:05.851865  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1646 17:47:05.858116  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1647 17:47:05.863988  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1648 17:47:05.870294  0x000000009b000000 - 0x00000000a0000000 size 0x05000000 type 0

 1649 17:47:05.876346  0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1

 1650 17:47:05.882820  0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0

 1651 17:47:05.889255  0x0000000100000000 - 0x000000015e800000 size 0x5e800000 type 6

 1652 17:47:05.893216  MTRR: Fixed MSR 0x250 0x0606060606060606

 1653 17:47:05.897310  MTRR: Fixed MSR 0x258 0x0606060606060606

 1654 17:47:05.901331  MTRR: Fixed MSR 0x259 0x0000000000000000

 1655 17:47:05.905752  MTRR: Fixed MSR 0x268 0x0606060606060606

 1656 17:47:05.909495  MTRR: Fixed MSR 0x269 0x0606060606060606

 1657 17:47:05.913645  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1658 17:47:05.917850  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1659 17:47:05.921503  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1660 17:47:05.925901  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1661 17:47:05.929726  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1662 17:47:05.933895  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1663 17:47:05.936978  call enable_fixed_mtrr()

 1664 17:47:05.940700  CPU physical address size: 39 bits

 1665 17:47:05.944871  MTRR: default type WB/UC MTRR counts: 5/6.

 1666 17:47:05.948416  MTRR: WB selected as default type.

 1667 17:47:05.954401  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1668 17:47:05.960608  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1669 17:47:05.967098  MTRR: 2 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1

 1670 17:47:05.972997  MTRR: 3 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0

 1671 17:47:05.979708  MTRR: 4 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0

 1672 17:47:05.983894  MTRR: Fixed MSR 0x250 0x0606060606060606

 1673 17:47:05.988153  MTRR: Fixed MSR 0x258 0x0606060606060606

 1674 17:47:05.992326  MTRR: Fixed MSR 0x259 0x0000000000000000

 1675 17:47:05.995875  MTRR: Fixed MSR 0x268 0x0606060606060606

 1676 17:47:06.000910  MTRR: Fixed MSR 0x269 0x0606060606060606

 1677 17:47:06.004067  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1678 17:47:06.008570  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1679 17:47:06.012649  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1680 17:47:06.016766  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1681 17:47:06.020330  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1682 17:47:06.025062  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1683 17:47:06.025145  

 1684 17:47:06.025898  MTRR check

 1685 17:47:06.028676  Fixed MTRRs   : Enabled

 1686 17:47:06.031070  Variable MTRRs: Enabled

 1687 17:47:06.031148  

 1688 17:47:06.034487  call enable_fixed_mtrr()

 1689 17:47:06.039545  BS: BS_WRITE_TABLES exit times (exec / console): 46 / 142 ms

 1690 17:47:06.043455  CPU physical address size: 39 bits

 1691 17:47:06.045519  Probing TPM:  done!

 1692 17:47:06.050688  Connected to device vid:did:rid of 1ae0:0028:00

 1693 17:47:06.060908  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66

 1694 17:47:06.064642  Initialized TPM device CR50 revision 0

 1695 17:47:06.067863  Checking cr50 for pending updates

 1696 17:47:06.073881  Reading cr50 TPM mode

 1697 17:47:06.083973  BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 25 ms

 1698 17:47:06.088778  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1699 17:47:06.092282  CBFS: Locating 'fallback/payload'

 1700 17:47:06.096969  CBFS: Found @ offset 3a0c00 size 48db0

 1701 17:47:06.101228  Checking segment from ROM address 0xfffa8c38

 1702 17:47:06.106021  Checking segment from ROM address 0xfffa8c54

 1703 17:47:06.110892  Loading segment from ROM address 0xfffa8c38

 1704 17:47:06.112350    code (compression=0)

 1705 17:47:06.121165    New segment dstaddr 0x30000000 memsize 0x2660100 srcaddr 0xfffa8c70 filesize 0x48d78

 1706 17:47:06.129902  Loading Segment: addr: 0x30000000 memsz: 0x0000000002660100 filesz: 0x0000000000048d78

 1707 17:47:06.132195  it's not compressed!

 1708 17:47:06.235112  [ 0x30000000, 30048d78, 0x32660100) <- fffa8c70

 1709 17:47:06.242289  Clearing Segment: addr: 0x0000000030048d78 memsz: 0x0000000002617388

 1710 17:47:06.250118  Loading segment from ROM address 0xfffa8c54

 1711 17:47:06.252599    Entry Point 0x30000000

 1712 17:47:06.253536  Loaded segments

 1713 17:47:06.260162  BS: BS_PAYLOAD_LOAD run times (exec / console): 103 / 67 ms

 1714 17:47:06.263238  Finalizing chipset.

 1715 17:47:06.264899  Finalizing SMM.

 1716 17:47:06.267069  APMC done.

 1717 17:47:06.271995  BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 5 ms

 1718 17:47:06.275162  mp_park_aps done after 0 msecs.

 1719 17:47:06.280341  Jumping to boot code at 0x30000000(0x99b55000)

 1720 17:47:06.289344  CPU0: stack: 0x99bf8000 - 0x99bf9000, lowest used address 0x99bf8a88, stack used: 1400 bytes

 1721 17:47:06.289881  

 1722 17:47:06.290340  

 1723 17:47:06.290925  

 1724 17:47:06.293001  Starting depthcharge on Kaisa...

 1725 17:47:06.293465  

 1726 17:47:06.297054  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 1727 17:47:06.297749  start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
 1728 17:47:06.298228  Setting prompt string to ['puff:']
 1729 17:47:06.298623  bootloader-commands: Wait for prompt ['puff:'] (timeout 00:04:43)
 1730 17:47:06.300438  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1731 17:47:06.300762  

 1732 17:47:06.307545  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1733 17:47:06.308399  

 1734 17:47:06.310212  BIOS MMAP details:

 1735 17:47:06.310408  

 1736 17:47:06.312903  IFD Base Offset  : 0x300000

 1737 17:47:06.313140  

 1738 17:47:06.315680  IFD End Offset   : 0x1000000

 1739 17:47:06.316093  

 1740 17:47:06.318853  MMAP Size        : 0xd00000

 1741 17:47:06.319087  

 1742 17:47:06.321535  MMAP Start       : 0xff300000

 1743 17:47:06.322000  

 1744 17:47:06.326760  Looking for NVMe Controller 0x3105c848 @ 00:1d:00

 1745 17:47:06.326996  

 1746 17:47:06.328837  Wipe memory regions:

 1747 17:47:06.329072  

 1748 17:47:06.332348  	[0x00000000001000, 0x000000000a0000)

 1749 17:47:06.332584  

 1750 17:47:06.336006  	[0x00000000100000, 0x00000030000000)

 1751 17:47:06.384973  

 1752 17:47:06.388821  	[0x00000032660100, 0x00000099a1f000)

 1753 17:47:06.491828  

 1754 17:47:06.495343  	[0x00000100000000, 0x0000015e800000)

 1755 17:47:06.896647  

 1756 17:47:06.899046  R8152: Initializing

 1757 17:47:06.899683  

 1758 17:47:06.901301  Version 9 (ocp_data = 6010)

 1759 17:47:06.902274  

 1760 17:47:06.904418  R8152: Done initializing

 1761 17:47:06.905158  

 1762 17:47:06.906452  Adding net device

 1763 17:47:07.207332  

 1764 17:47:07.212679  [firmware-puff-13324.B-collabora] Feb 14 2023 12:06:39

 1765 17:47:07.213183  

 1766 17:47:07.213553  

 1767 17:47:07.213953  

 1768 17:47:07.214773  Setting prompt string to ['puff:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1770 17:47:07.316035  puff: tftpboot 192.168.201.1 11712682/tftp-deploy-5f0iqcbk/kernel/bzImage 11712682/tftp-deploy-5f0iqcbk/kernel/cmdline 11712682/tftp-deploy-5f0iqcbk/ramdisk/ramdisk.cpio.gz

 1771 17:47:07.316609  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1772 17:47:07.316999  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
 1773 17:47:07.359351  tftpboot 192.168.201.1 11712682/tftp-deploy-5f0iqcbk/kernel/bzImage 11712682/tftp-deploy-5f0iqcbk/kernel/cmdline 11712682/tftp-deploy-5f0iqcbk/ramdisk/ramdisk.cpio.gz

 1774 17:47:07.359977  

 1775 17:47:07.360814  Waiting for link

 1776 17:47:07.519821  

 1777 17:47:07.520908  done.

 1778 17:47:07.520996  

 1779 17:47:07.522941  MAC: 00:e0:4c:68:01:9c

 1780 17:47:07.523030  

 1781 17:47:07.526201  Sending DHCP discover... done.

 1782 17:47:07.526662  

 1783 17:47:07.528630  Waiting for reply... done.

 1784 17:47:07.528935  

 1785 17:47:07.531858  Sending DHCP request... done.

 1786 17:47:07.531993  

 1787 17:47:07.534756  Waiting for reply... done.

 1788 17:47:07.534867  

 1789 17:47:07.537058  My ip is 192.168.201.12

 1790 17:47:07.537578  

 1791 17:47:07.540320  The DHCP server ip is 192.168.201.1

 1792 17:47:07.541016  

 1793 17:47:07.545341  TFTP server IP predefined by user: 192.168.201.1

 1794 17:47:07.545424  

 1795 17:47:07.552800  Bootfile predefined by user: 11712682/tftp-deploy-5f0iqcbk/kernel/bzImage

 1796 17:47:07.553098  

 1797 17:47:07.556531  Sending tftp read request... done.

 1798 17:47:07.556613  

 1799 17:47:07.559838  Waiting for the transfer... 

 1800 17:47:07.560114  

 1801 17:47:07.815739  00000000 ################################################################

 1802 17:47:07.816095  

 1803 17:47:08.070770  00080000 ################################################################

 1804 17:47:08.071226  

 1805 17:47:08.328157  00100000 ################################################################

 1806 17:47:08.328838  

 1807 17:47:08.595976  00180000 ################################################################

 1808 17:47:08.596345  

 1809 17:47:08.851924  00200000 ################################################################

 1810 17:47:08.852354  

 1811 17:47:09.126725  00280000 ################################################################

 1812 17:47:09.127548  

 1813 17:47:09.406884  00300000 ################################################################

 1814 17:47:09.407230  

 1815 17:47:09.690394  00380000 ################################################################

 1816 17:47:09.690811  

 1817 17:47:09.960201  00400000 ################################################################

 1818 17:47:09.960562  

 1819 17:47:10.206059  00480000 ################################################################

 1820 17:47:10.206406  

 1821 17:47:10.467517  00500000 ################################################################

 1822 17:47:10.468019  

 1823 17:47:10.751136  00580000 ################################################################

 1824 17:47:10.751533  

 1825 17:47:11.010940  00600000 ################################################################

 1826 17:47:11.011386  

 1827 17:47:11.289580  00680000 ################################################################

 1828 17:47:11.290535  

 1829 17:47:11.559102  00700000 ################################################################

 1830 17:47:11.559451  

 1831 17:47:11.813370  00780000 ################################################################

 1832 17:47:11.813707  

 1833 17:47:11.870590  00800000 ############# done.

 1834 17:47:11.871183  

 1835 17:47:11.874540  The bootfile was 8490896 bytes long.

 1836 17:47:11.874615  

 1837 17:47:11.878073  Sending tftp read request... done.

 1838 17:47:11.878150  

 1839 17:47:11.880898  Waiting for the transfer... 

 1840 17:47:11.880972  

 1841 17:47:12.132822  00000000 ################################################################

 1842 17:47:12.133223  

 1843 17:47:12.361436  00080000 ################################################################

 1844 17:47:12.361902  

 1845 17:47:12.590139  00100000 ################################################################

 1846 17:47:12.590317  

 1847 17:47:12.815558  00180000 ################################################################

 1848 17:47:12.815930  

 1849 17:47:13.042281  00200000 ################################################################

 1850 17:47:13.042825  

 1851 17:47:13.268368  00280000 ################################################################

 1852 17:47:13.268909  

 1853 17:47:13.501072  00300000 ################################################################

 1854 17:47:13.501435  

 1855 17:47:13.747314  00380000 ################################################################

 1856 17:47:13.747819  

 1857 17:47:13.991677  00400000 ################################################################

 1858 17:47:13.992160  

 1859 17:47:14.235845  00480000 ################################################################

 1860 17:47:14.236220  

 1861 17:47:14.475466  00500000 ############################################################### done.

 1862 17:47:14.475824  

 1863 17:47:14.478850  Sending tftp read request... done.

 1864 17:47:14.478962  

 1865 17:47:14.481706  Waiting for the transfer... 

 1866 17:47:14.482112  

 1867 17:47:14.484021  00000000 # done.

 1868 17:47:14.484110  

 1869 17:47:14.492971  Command line loaded dynamically from TFTP file: 11712682/tftp-deploy-5f0iqcbk/kernel/cmdline

 1870 17:47:14.493292  

 1871 17:47:14.517931  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11712682/extract-nfsrootfs-myrhj0f3,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 1872 17:47:14.518019  

 1873 17:47:14.522524  ec_init: CrosEC protocol v3 supported (256, 256)

 1874 17:47:14.525819  

 1875 17:47:14.529498  Shutting down all USB controllers.

 1876 17:47:14.529588  

 1877 17:47:14.532587  Removing current net device

 1878 17:47:14.532677  

 1879 17:47:14.534495  Finalizing coreboot

 1880 17:47:14.534593  

 1881 17:47:14.540095  Exiting depthcharge with code 4 at timestamp: 17709230

 1882 17:47:14.540203  

 1883 17:47:14.540284  

 1884 17:47:14.542002  end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
 1885 17:47:14.542127  start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
 1886 17:47:14.542221  Setting prompt string to ['Linux version [0-9]']
 1887 17:47:14.542306  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1888 17:47:14.542388  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 1889 17:47:14.542667  Starting kernel ...

 1890 17:47:14.542787  

 1891 17:47:14.542907  

 1893 17:51:49.543210  end: 2.2.5 auto-login-action (duration 00:04:35) [common]
 1895 17:51:49.544949  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
 1897 17:51:49.546217  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 1900 17:51:49.547607  end: 2 depthcharge-action (duration 00:05:00) [common]
 1902 17:51:49.547826  Cleaning after the job
 1903 17:51:49.547940  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712682/tftp-deploy-5f0iqcbk/ramdisk
 1904 17:51:49.548945  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712682/tftp-deploy-5f0iqcbk/kernel
 1905 17:51:49.550242  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712682/tftp-deploy-5f0iqcbk/nfsrootfs
 1906 17:51:49.631801  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712682/tftp-deploy-5f0iqcbk/modules
 1907 17:51:49.632268  start: 5.1 power-off (timeout 00:00:30) [common]
 1908 17:51:49.632447  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-6' '--port=1' '--command=off'
 1909 17:51:50.528023  >> Command sent successfully.

 1910 17:51:50.538580  Returned 0 in 0 seconds
 1911 17:51:50.639945  end: 5.1 power-off (duration 00:00:01) [common]
 1913 17:51:50.641505  start: 5.2 read-feedback (timeout 00:09:59) [common]
 1914 17:51:50.642806  Listened to connection for namespace 'common' for up to 1s
 1915 17:51:51.643076  Finalising connection for namespace 'common'
 1916 17:51:51.643330  Disconnecting from shell: Finalise
 1917 17:51:51.643473  

 1918 17:51:51.744145  end: 5.2 read-feedback (duration 00:00:01) [common]
 1919 17:51:51.744707  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712682
 1920 17:51:52.059473  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712682
 1921 17:51:52.059665  JobError: Your job cannot terminate cleanly.