Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:53:19.489237 lava-dispatcher, installed at version: 2023.08
2 17:53:19.489468 start: 0 validate
3 17:53:19.489630 Start time: 2023-10-09 17:53:19.489619+00:00 (UTC)
4 17:53:19.489762 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:53:19.489905 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 17:53:19.747594 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:53:19.748079 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:53:20.008548 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:53:20.009186 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:53:20.277599 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:53:20.277809 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:53:20.550625 validate duration: 1.06
14 17:53:20.551897 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:53:20.552450 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:53:20.552962 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:53:20.553593 Not decompressing ramdisk as can be used compressed.
18 17:53:20.554049 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 17:53:20.554381 saving as /var/lib/lava/dispatcher/tmp/11712702/tftp-deploy-1v70440t/ramdisk/initrd.cpio.gz
20 17:53:20.554713 total size: 5432690 (5 MB)
21 17:53:20.559471 progress 0 % (0 MB)
22 17:53:20.568061 progress 5 % (0 MB)
23 17:53:20.575514 progress 10 % (0 MB)
24 17:53:20.580683 progress 15 % (0 MB)
25 17:53:20.584989 progress 20 % (1 MB)
26 17:53:20.588298 progress 25 % (1 MB)
27 17:53:20.591247 progress 30 % (1 MB)
28 17:53:20.594125 progress 35 % (1 MB)
29 17:53:20.596519 progress 40 % (2 MB)
30 17:53:20.598723 progress 45 % (2 MB)
31 17:53:20.600899 progress 50 % (2 MB)
32 17:53:20.603053 progress 55 % (2 MB)
33 17:53:20.604989 progress 60 % (3 MB)
34 17:53:20.606766 progress 65 % (3 MB)
35 17:53:20.608701 progress 70 % (3 MB)
36 17:53:20.610423 progress 75 % (3 MB)
37 17:53:20.611975 progress 80 % (4 MB)
38 17:53:20.613585 progress 85 % (4 MB)
39 17:53:20.615323 progress 90 % (4 MB)
40 17:53:20.616903 progress 95 % (4 MB)
41 17:53:20.618495 progress 100 % (5 MB)
42 17:53:20.618743 5 MB downloaded in 0.06 s (80.88 MB/s)
43 17:53:20.618913 end: 1.1.1 http-download (duration 00:00:00) [common]
45 17:53:20.619181 end: 1.1 download-retry (duration 00:00:00) [common]
46 17:53:20.619283 start: 1.2 download-retry (timeout 00:10:00) [common]
47 17:53:20.619377 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 17:53:20.619529 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 17:53:20.619611 saving as /var/lib/lava/dispatcher/tmp/11712702/tftp-deploy-1v70440t/kernel/bzImage
50 17:53:20.619679 total size: 8490896 (8 MB)
51 17:53:20.619747 No compression specified
52 17:53:20.620969 progress 0 % (0 MB)
53 17:53:20.623411 progress 5 % (0 MB)
54 17:53:20.626010 progress 10 % (0 MB)
55 17:53:20.628557 progress 15 % (1 MB)
56 17:53:20.631086 progress 20 % (1 MB)
57 17:53:20.633683 progress 25 % (2 MB)
58 17:53:20.636234 progress 30 % (2 MB)
59 17:53:20.638772 progress 35 % (2 MB)
60 17:53:20.641315 progress 40 % (3 MB)
61 17:53:20.643855 progress 45 % (3 MB)
62 17:53:20.646445 progress 50 % (4 MB)
63 17:53:20.648989 progress 55 % (4 MB)
64 17:53:20.651509 progress 60 % (4 MB)
65 17:53:20.654012 progress 65 % (5 MB)
66 17:53:20.656520 progress 70 % (5 MB)
67 17:53:20.658996 progress 75 % (6 MB)
68 17:53:20.661479 progress 80 % (6 MB)
69 17:53:20.663942 progress 85 % (6 MB)
70 17:53:20.666414 progress 90 % (7 MB)
71 17:53:20.668906 progress 95 % (7 MB)
72 17:53:20.671381 progress 100 % (8 MB)
73 17:53:20.671507 8 MB downloaded in 0.05 s (156.25 MB/s)
74 17:53:20.671664 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:53:20.671916 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:53:20.672019 start: 1.3 download-retry (timeout 00:10:00) [common]
78 17:53:20.672119 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 17:53:20.672274 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 17:53:20.672349 saving as /var/lib/lava/dispatcher/tmp/11712702/tftp-deploy-1v70440t/nfsrootfs/full.rootfs.tar
81 17:53:20.672417 total size: 133380384 (127 MB)
82 17:53:20.672490 Using unxz to decompress xz
83 17:53:20.677148 progress 0 % (0 MB)
84 17:53:21.058212 progress 5 % (6 MB)
85 17:53:21.451124 progress 10 % (12 MB)
86 17:53:21.771154 progress 15 % (19 MB)
87 17:53:21.978429 progress 20 % (25 MB)
88 17:53:22.248414 progress 25 % (31 MB)
89 17:53:22.635950 progress 30 % (38 MB)
90 17:53:23.021855 progress 35 % (44 MB)
91 17:53:23.472746 progress 40 % (50 MB)
92 17:53:23.911250 progress 45 % (57 MB)
93 17:53:24.313538 progress 50 % (63 MB)
94 17:53:24.731064 progress 55 % (69 MB)
95 17:53:25.139392 progress 60 % (76 MB)
96 17:53:25.544048 progress 65 % (82 MB)
97 17:53:25.956742 progress 70 % (89 MB)
98 17:53:26.366642 progress 75 % (95 MB)
99 17:53:26.858937 progress 80 % (101 MB)
100 17:53:27.342466 progress 85 % (108 MB)
101 17:53:27.640797 progress 90 % (114 MB)
102 17:53:28.027131 progress 95 % (120 MB)
103 17:53:28.482299 progress 100 % (127 MB)
104 17:53:28.488329 127 MB downloaded in 7.82 s (16.27 MB/s)
105 17:53:28.488654 end: 1.3.1 http-download (duration 00:00:08) [common]
107 17:53:28.489090 end: 1.3 download-retry (duration 00:00:08) [common]
108 17:53:28.489223 start: 1.4 download-retry (timeout 00:09:52) [common]
109 17:53:28.489351 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 17:53:28.489555 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 17:53:28.489661 saving as /var/lib/lava/dispatcher/tmp/11712702/tftp-deploy-1v70440t/modules/modules.tar
112 17:53:28.489758 total size: 250868 (0 MB)
113 17:53:28.489858 Using unxz to decompress xz
114 17:53:28.494393 progress 13 % (0 MB)
115 17:53:28.494840 progress 26 % (0 MB)
116 17:53:28.495100 progress 39 % (0 MB)
117 17:53:28.496928 progress 52 % (0 MB)
118 17:53:28.498996 progress 65 % (0 MB)
119 17:53:28.501139 progress 78 % (0 MB)
120 17:53:28.503251 progress 91 % (0 MB)
121 17:53:28.505168 progress 100 % (0 MB)
122 17:53:28.511227 0 MB downloaded in 0.02 s (11.15 MB/s)
123 17:53:28.511487 end: 1.4.1 http-download (duration 00:00:00) [common]
125 17:53:28.511772 end: 1.4 download-retry (duration 00:00:00) [common]
126 17:53:28.511872 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 17:53:28.511979 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 17:53:30.975056 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11712702/extract-nfsrootfs-8o0u2gdf
129 17:53:30.975274 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 17:53:30.975390 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 17:53:30.975575 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_
132 17:53:30.975725 makedir: /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin
133 17:53:30.975842 makedir: /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/tests
134 17:53:30.975951 makedir: /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/results
135 17:53:30.976070 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-add-keys
136 17:53:30.976232 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-add-sources
137 17:53:30.976377 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-background-process-start
138 17:53:30.976520 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-background-process-stop
139 17:53:30.976673 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-common-functions
140 17:53:30.976819 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-echo-ipv4
141 17:53:30.976959 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-install-packages
142 17:53:30.977098 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-installed-packages
143 17:53:30.977236 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-os-build
144 17:53:30.977376 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-probe-channel
145 17:53:30.977517 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-probe-ip
146 17:53:30.977656 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-target-ip
147 17:53:30.977794 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-target-mac
148 17:53:30.977933 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-target-storage
149 17:53:30.978073 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-test-case
150 17:53:30.978214 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-test-event
151 17:53:30.978351 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-test-feedback
152 17:53:30.978490 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-test-raise
153 17:53:30.978627 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-test-reference
154 17:53:30.978777 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-test-runner
155 17:53:30.978923 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-test-set
156 17:53:30.979062 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-test-shell
157 17:53:30.979201 Updating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-install-packages (oe)
158 17:53:30.979371 Updating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/bin/lava-installed-packages (oe)
159 17:53:30.979508 Creating /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/environment
160 17:53:30.979613 LAVA metadata
161 17:53:30.979690 - LAVA_JOB_ID=11712702
162 17:53:30.979760 - LAVA_DISPATCHER_IP=192.168.201.1
163 17:53:30.979871 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 17:53:30.979946 skipped lava-vland-overlay
165 17:53:30.980044 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 17:53:30.980136 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 17:53:30.980204 skipped lava-multinode-overlay
168 17:53:30.980292 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 17:53:30.980383 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 17:53:30.980464 Loading test definitions
171 17:53:30.980563 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 17:53:30.980640 Using /lava-11712702 at stage 0
173 17:53:30.980999 uuid=11712702_1.5.2.3.1 testdef=None
174 17:53:30.981097 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 17:53:30.981190 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 17:53:30.981743 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 17:53:30.981983 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 17:53:30.982681 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 17:53:30.982932 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 17:53:30.983611 runner path: /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/0/tests/0_dmesg test_uuid 11712702_1.5.2.3.1
183 17:53:30.983781 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 17:53:30.984276 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 17:53:30.984360 Using /lava-11712702 at stage 1
187 17:53:30.984704 uuid=11712702_1.5.2.3.5 testdef=None
188 17:53:30.984800 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 17:53:30.984893 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 17:53:30.985407 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 17:53:30.985642 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 17:53:30.986344 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 17:53:30.986595 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 17:53:30.987294 runner path: /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/1/tests/1_bootrr test_uuid 11712702_1.5.2.3.5
197 17:53:30.987462 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 17:53:30.987686 Creating lava-test-runner.conf files
200 17:53:30.987755 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/0 for stage 0
201 17:53:30.987853 - 0_dmesg
202 17:53:30.987939 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712702/lava-overlay-vf_y36q_/lava-11712702/1 for stage 1
203 17:53:30.988044 - 1_bootrr
204 17:53:30.988148 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 17:53:30.988242 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 17:53:30.996180 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 17:53:30.996291 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 17:53:30.996384 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 17:53:30.996475 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 17:53:30.996567 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 17:53:31.149956 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 17:53:31.150393 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
213 17:53:31.150527 extracting modules file /var/lib/lava/dispatcher/tmp/11712702/tftp-deploy-1v70440t/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712702/extract-nfsrootfs-8o0u2gdf
214 17:53:31.166616 extracting modules file /var/lib/lava/dispatcher/tmp/11712702/tftp-deploy-1v70440t/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712702/extract-overlay-ramdisk-6tlcszkg/ramdisk
215 17:53:31.181650 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 17:53:31.181782 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 17:53:31.181879 [common] Applying overlay to NFS
218 17:53:31.181956 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712702/compress-overlay-9z6rradc/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712702/extract-nfsrootfs-8o0u2gdf
219 17:53:31.192736 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 17:53:31.192861 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 17:53:31.192971 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 17:53:31.193067 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 17:53:31.193151 Building ramdisk /var/lib/lava/dispatcher/tmp/11712702/extract-overlay-ramdisk-6tlcszkg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712702/extract-overlay-ramdisk-6tlcszkg/ramdisk
224 17:53:31.271082 >> 26159 blocks
225 17:53:31.854991 rename /var/lib/lava/dispatcher/tmp/11712702/extract-overlay-ramdisk-6tlcszkg/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712702/tftp-deploy-1v70440t/ramdisk/ramdisk.cpio.gz
226 17:53:31.855480 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 17:53:31.855614 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 17:53:31.855756 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 17:53:31.855940 No mkimage arch provided, not using FIT.
230 17:53:31.856090 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 17:53:31.856189 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 17:53:31.856309 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 17:53:31.856411 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 17:53:31.856499 No LXC device requested
235 17:53:31.856586 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 17:53:31.856684 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 17:53:31.856772 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 17:53:31.856851 Checking files for TFTP limit of 4294967296 bytes.
239 17:53:31.857279 end: 1 tftp-deploy (duration 00:00:11) [common]
240 17:53:31.857395 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 17:53:31.857498 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 17:53:31.857630 substitutions:
243 17:53:31.857701 - {DTB}: None
244 17:53:31.857768 - {INITRD}: 11712702/tftp-deploy-1v70440t/ramdisk/ramdisk.cpio.gz
245 17:53:31.857833 - {KERNEL}: 11712702/tftp-deploy-1v70440t/kernel/bzImage
246 17:53:31.857895 - {LAVA_MAC}: None
247 17:53:31.857956 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11712702/extract-nfsrootfs-8o0u2gdf
248 17:53:31.858020 - {NFS_SERVER_IP}: 192.168.201.1
249 17:53:31.858080 - {PRESEED_CONFIG}: None
250 17:53:31.858138 - {PRESEED_LOCAL}: None
251 17:53:31.858196 - {RAMDISK}: 11712702/tftp-deploy-1v70440t/ramdisk/ramdisk.cpio.gz
252 17:53:31.858255 - {ROOT_PART}: None
253 17:53:31.858314 - {ROOT}: None
254 17:53:31.858373 - {SERVER_IP}: 192.168.201.1
255 17:53:31.858431 - {TEE}: None
256 17:53:31.858489 Parsed boot commands:
257 17:53:31.858546 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 17:53:31.858734 Parsed boot commands: tftpboot 192.168.201.1 11712702/tftp-deploy-1v70440t/kernel/bzImage 11712702/tftp-deploy-1v70440t/kernel/cmdline 11712702/tftp-deploy-1v70440t/ramdisk/ramdisk.cpio.gz
259 17:53:31.858830 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 17:53:31.858924 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 17:53:31.859023 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 17:53:31.859116 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 17:53:31.859191 Not connected, no need to disconnect.
264 17:53:31.859273 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 17:53:31.859361 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 17:53:31.859434 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
267 17:53:31.863635 Setting prompt string to ['lava-test: # ']
268 17:53:31.864110 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 17:53:31.864226 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 17:53:31.864331 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 17:53:31.864469 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 17:53:31.864715 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 17:53:37.018164 >> Command sent successfully.
274 17:53:37.028872 Returned 0 in 5 seconds
275 17:53:37.130113 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 17:53:37.131627 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 17:53:37.132222 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 17:53:37.132697 Setting prompt string to 'Starting depthcharge on Helios...'
280 17:53:37.133089 Changing prompt to 'Starting depthcharge on Helios...'
281 17:53:37.133452 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 17:53:37.134673 [Enter `^Ec?' for help]
283 17:53:37.743701
284 17:53:37.744310
285 17:53:37.753734 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 17:53:37.756773 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 17:53:37.763780 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 17:53:37.766772 CPU: AES supported, TXT NOT supported, VT supported
289 17:53:37.773788 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 17:53:37.776908 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 17:53:37.783748 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 17:53:37.786982 VBOOT: Loading verstage.
293 17:53:37.790360 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 17:53:37.797289 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 17:53:37.800579 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 17:53:37.804240 CBFS @ c08000 size 3f8000
297 17:53:37.810515 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 17:53:37.813700 CBFS: Locating 'fallback/verstage'
299 17:53:37.816828 CBFS: Found @ offset 10fb80 size 1072c
300 17:53:37.820094
301 17:53:37.820548
302 17:53:37.829915 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 17:53:37.844669 Probing TPM: . done!
304 17:53:37.848281 TPM ready after 0 ms
305 17:53:37.851421 Connected to device vid:did:rid of 1ae0:0028:00
306 17:53:37.861589 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 17:53:37.864860 Initialized TPM device CR50 revision 0
308 17:53:37.909468 tlcl_send_startup: Startup return code is 0
309 17:53:37.909975 TPM: setup succeeded
310 17:53:37.922304 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 17:53:37.926157 Chrome EC: UHEPI supported
312 17:53:37.929359 Phase 1
313 17:53:37.932655 FMAP: area GBB found @ c05000 (12288 bytes)
314 17:53:37.939298 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 17:53:37.939822 Phase 2
316 17:53:37.942763 Phase 3
317 17:53:37.945863 FMAP: area GBB found @ c05000 (12288 bytes)
318 17:53:37.952722 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 17:53:37.959083 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 17:53:37.962644 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
321 17:53:37.968962 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 17:53:37.984867 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 17:53:37.988186 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
324 17:53:37.994630 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 17:53:37.998701 Phase 4
326 17:53:38.002629 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
327 17:53:38.008719 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 17:53:38.188662 VB2:vb2_rsa_verify_digest() Digest check failed!
329 17:53:38.194921 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 17:53:38.195473 Saving nvdata
331 17:53:38.198180 Reboot requested (10020007)
332 17:53:38.201655 board_reset() called!
333 17:53:38.202207 full_reset() called!
334 17:53:42.709928
335 17:53:42.710132
336 17:53:42.719831 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 17:53:42.723583 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 17:53:42.729973 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 17:53:42.733315 CPU: AES supported, TXT NOT supported, VT supported
340 17:53:42.739876 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 17:53:42.743111 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 17:53:42.749760 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 17:53:42.753131 VBOOT: Loading verstage.
344 17:53:42.756538 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 17:53:42.763077 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 17:53:42.766486 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 17:53:42.769752 CBFS @ c08000 size 3f8000
348 17:53:42.776461 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 17:53:42.779889 CBFS: Locating 'fallback/verstage'
350 17:53:42.783094 CBFS: Found @ offset 10fb80 size 1072c
351 17:53:42.787037
352 17:53:42.787175
353 17:53:42.796809 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 17:53:42.811244 Probing TPM: . done!
355 17:53:42.814846 TPM ready after 0 ms
356 17:53:42.818093 Connected to device vid:did:rid of 1ae0:0028:00
357 17:53:42.828104 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 17:53:42.831652 Initialized TPM device CR50 revision 0
359 17:53:42.875914 tlcl_send_startup: Startup return code is 0
360 17:53:42.876129 TPM: setup succeeded
361 17:53:42.888931 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 17:53:42.892769 Chrome EC: UHEPI supported
363 17:53:42.896075 Phase 1
364 17:53:42.899462 FMAP: area GBB found @ c05000 (12288 bytes)
365 17:53:42.906117 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 17:53:42.912630 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 17:53:42.915942 Recovery requested (1009000e)
368 17:53:42.921145 Saving nvdata
369 17:53:42.927815 tlcl_extend: response is 0
370 17:53:42.936636 tlcl_extend: response is 0
371 17:53:42.943555 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 17:53:42.947012 CBFS @ c08000 size 3f8000
373 17:53:42.953583 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 17:53:42.956867 CBFS: Locating 'fallback/romstage'
375 17:53:42.960072 CBFS: Found @ offset 80 size 145fc
376 17:53:42.963529 Accumulated console time in verstage 98 ms
377 17:53:42.963662
378 17:53:42.963774
379 17:53:42.976704 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 17:53:42.983360 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 17:53:42.986600 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 17:53:42.989773 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 17:53:42.996390 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 17:53:42.999943 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 17:53:43.003343 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 17:53:43.006809 TCO_STS: 0000 0000
387 17:53:43.009610 GEN_PMCON: e0015238 00000200
388 17:53:43.012913 GBLRST_CAUSE: 00000000 00000000
389 17:53:43.013010 prev_sleep_state 5
390 17:53:43.016169 Boot Count incremented to 63867
391 17:53:43.023025 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 17:53:43.026687 CBFS @ c08000 size 3f8000
393 17:53:43.033006 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 17:53:43.033120 CBFS: Locating 'fspm.bin'
395 17:53:43.039557 CBFS: Found @ offset 5ffc0 size 71000
396 17:53:43.042901 Chrome EC: UHEPI supported
397 17:53:43.049558 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 17:53:43.053566 Probing TPM: done!
399 17:53:43.060294 Connected to device vid:did:rid of 1ae0:0028:00
400 17:53:43.070162 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 17:53:43.075872 Initialized TPM device CR50 revision 0
402 17:53:43.084908 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 17:53:43.091305 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 17:53:43.094592 MRC cache found, size 1948
405 17:53:43.097966 bootmode is set to: 2
406 17:53:43.101171 PRMRR disabled by config.
407 17:53:43.101273 SPD INDEX = 1
408 17:53:43.108192 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 17:53:43.111567 CBFS @ c08000 size 3f8000
410 17:53:43.118005 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 17:53:43.118117 CBFS: Locating 'spd.bin'
412 17:53:43.121466 CBFS: Found @ offset 5fb80 size 400
413 17:53:43.124679 SPD: module type is LPDDR3
414 17:53:43.128038 SPD: module part is
415 17:53:43.134394 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 17:53:43.138176 SPD: device width 4 bits, bus width 8 bits
417 17:53:43.141635 SPD: module size is 4096 MB (per channel)
418 17:53:43.144583 memory slot: 0 configuration done.
419 17:53:43.147797 memory slot: 2 configuration done.
420 17:53:43.199405 CBMEM:
421 17:53:43.202833 IMD: root @ 99fff000 254 entries.
422 17:53:43.205841 IMD: root @ 99ffec00 62 entries.
423 17:53:43.209502 External stage cache:
424 17:53:43.212371 IMD: root @ 9abff000 254 entries.
425 17:53:43.216198 IMD: root @ 9abfec00 62 entries.
426 17:53:43.219027 Chrome EC: clear events_b mask to 0x0000000020004000
427 17:53:43.235289 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 17:53:43.248665 tlcl_write: response is 0
429 17:53:43.257541 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 17:53:43.264109 MRC: TPM MRC hash updated successfully.
431 17:53:43.264241 2 DIMMs found
432 17:53:43.267721 SMM Memory Map
433 17:53:43.270596 SMRAM : 0x9a000000 0x1000000
434 17:53:43.273845 Subregion 0: 0x9a000000 0xa00000
435 17:53:43.277385 Subregion 1: 0x9aa00000 0x200000
436 17:53:43.280510 Subregion 2: 0x9ac00000 0x400000
437 17:53:43.284108 top_of_ram = 0x9a000000
438 17:53:43.287355 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 17:53:43.293971 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 17:53:43.297297 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 17:53:43.303978 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 17:53:43.307276 CBFS @ c08000 size 3f8000
443 17:53:43.310319 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 17:53:43.313890 CBFS: Locating 'fallback/postcar'
445 17:53:43.320339 CBFS: Found @ offset 107000 size 4b44
446 17:53:43.323472 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 17:53:43.335923 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 17:53:43.339266 Processing 180 relocs. Offset value of 0x97c0c000
449 17:53:43.347684 Accumulated console time in romstage 286 ms
450 17:53:43.347816
451 17:53:43.347894
452 17:53:43.357700 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 17:53:43.364404 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 17:53:43.367573 CBFS @ c08000 size 3f8000
455 17:53:43.370871 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 17:53:43.377410 CBFS: Locating 'fallback/ramstage'
457 17:53:43.380783 CBFS: Found @ offset 43380 size 1b9e8
458 17:53:43.387194 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 17:53:43.419351 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 17:53:43.422480 Processing 3976 relocs. Offset value of 0x98db0000
461 17:53:43.429383 Accumulated console time in postcar 52 ms
462 17:53:43.429512
463 17:53:43.429592
464 17:53:43.439411 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 17:53:43.445851 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 17:53:43.449572 WARNING: RO_VPD is uninitialized or empty.
467 17:53:43.452713 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 17:53:43.459411 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 17:53:43.459552 Normal boot.
470 17:53:43.466136 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 17:53:43.469432 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 17:53:43.472686 CBFS @ c08000 size 3f8000
473 17:53:43.479224 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 17:53:43.482512 CBFS: Locating 'cpu_microcode_blob.bin'
475 17:53:43.485942 CBFS: Found @ offset 14700 size 2ec00
476 17:53:43.489298 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 17:53:43.492540 Skip microcode update
478 17:53:43.495691 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 17:53:43.499347 CBFS @ c08000 size 3f8000
480 17:53:43.505920 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 17:53:43.509268 CBFS: Locating 'fsps.bin'
482 17:53:43.512518 CBFS: Found @ offset d1fc0 size 35000
483 17:53:43.537645 Detected 4 core, 8 thread CPU.
484 17:53:43.540825 Setting up SMI for CPU
485 17:53:43.543966 IED base = 0x9ac00000
486 17:53:43.544092 IED size = 0x00400000
487 17:53:43.547657 Will perform SMM setup.
488 17:53:43.553950 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 17:53:43.560942 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 17:53:43.563807 Processing 16 relocs. Offset value of 0x00030000
491 17:53:43.567475 Attempting to start 7 APs
492 17:53:43.570730 Waiting for 10ms after sending INIT.
493 17:53:43.587755 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
494 17:53:43.587915 done.
495 17:53:43.590338 AP: slot 3 apic_id 6.
496 17:53:43.594100 AP: slot 5 apic_id 7.
497 17:53:43.597628 Waiting for 2nd SIPI to complete...done.
498 17:53:43.601036 AP: slot 4 apic_id 3.
499 17:53:43.601152 AP: slot 1 apic_id 2.
500 17:53:43.603944 AP: slot 7 apic_id 4.
501 17:53:43.607129 AP: slot 6 apic_id 5.
502 17:53:43.613988 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 17:53:43.617307 Processing 13 relocs. Offset value of 0x00038000
504 17:53:43.623763 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 17:53:43.630775 Installing SMM handler to 0x9a000000
506 17:53:43.636972 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 17:53:43.640544 Processing 658 relocs. Offset value of 0x9a010000
508 17:53:43.650456 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 17:53:43.653671 Processing 13 relocs. Offset value of 0x9a008000
510 17:53:43.660534 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 17:53:43.667202 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 17:53:43.670342 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 17:53:43.677658 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 17:53:43.684111 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 17:53:43.687317 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 17:53:43.693970 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 17:53:43.700394 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 17:53:43.704207 Clearing SMI status registers
519 17:53:43.707551 SMI_STS: PM1
520 17:53:43.707689 PM1_STS: PWRBTN
521 17:53:43.710473 TCO_STS: SECOND_TO
522 17:53:43.710571 New SMBASE 0x9a000000
523 17:53:43.714011 In relocation handler: CPU 0
524 17:53:43.720569 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 17:53:43.723843 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 17:53:43.727078 Relocation complete.
527 17:53:43.727188 New SMBASE 0x99fff800
528 17:53:43.730362 In relocation handler: CPU 2
529 17:53:43.737337 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
530 17:53:43.740425 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 17:53:43.743910 Relocation complete.
532 17:53:43.744052 New SMBASE 0x99fffc00
533 17:53:43.747195 In relocation handler: CPU 1
534 17:53:43.750688 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
535 17:53:43.757232 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 17:53:43.760506 Relocation complete.
537 17:53:43.760662 New SMBASE 0x99fff000
538 17:53:43.763791 In relocation handler: CPU 4
539 17:53:43.766959 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
540 17:53:43.773654 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 17:53:43.776994 Relocation complete.
542 17:53:43.777108 New SMBASE 0x99ffe400
543 17:53:43.780191 In relocation handler: CPU 7
544 17:53:43.783840 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
545 17:53:43.790129 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 17:53:43.790265 Relocation complete.
547 17:53:43.793558 New SMBASE 0x99ffe800
548 17:53:43.796601 In relocation handler: CPU 6
549 17:53:43.800137 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
550 17:53:43.806626 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 17:53:43.806760 Relocation complete.
552 17:53:43.810483 New SMBASE 0x99ffec00
553 17:53:43.813350 In relocation handler: CPU 5
554 17:53:43.816957 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
555 17:53:43.823542 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 17:53:43.823649 Relocation complete.
557 17:53:43.826958 New SMBASE 0x99fff400
558 17:53:43.830578 In relocation handler: CPU 3
559 17:53:43.833319 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
560 17:53:43.839931 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 17:53:43.840051 Relocation complete.
562 17:53:43.843300 Initializing CPU #0
563 17:53:43.846629 CPU: vendor Intel device 806ec
564 17:53:43.849885 CPU: family 06, model 8e, stepping 0c
565 17:53:43.853541 Clearing out pending MCEs
566 17:53:43.856990 Setting up local APIC...
567 17:53:43.857085 apic_id: 0x00 done.
568 17:53:43.860382 Turbo is available but hidden
569 17:53:43.863694 Turbo is available and visible
570 17:53:43.866478 VMX status: enabled
571 17:53:43.870247 IA32_FEATURE_CONTROL status: locked
572 17:53:43.870342 Skip microcode update
573 17:53:43.873575 CPU #0 initialized
574 17:53:43.876448 Initializing CPU #2
575 17:53:43.876542 Initializing CPU #6
576 17:53:43.879693 Initializing CPU #7
577 17:53:43.883647 CPU: vendor Intel device 806ec
578 17:53:43.886534 CPU: family 06, model 8e, stepping 0c
579 17:53:43.889865 Clearing out pending MCEs
580 17:53:43.889958 Initializing CPU #4
581 17:53:43.893570 Initializing CPU #1
582 17:53:43.896722 CPU: vendor Intel device 806ec
583 17:53:43.899821 CPU: family 06, model 8e, stepping 0c
584 17:53:43.903447 CPU: vendor Intel device 806ec
585 17:53:43.906498 CPU: family 06, model 8e, stepping 0c
586 17:53:43.910078 Clearing out pending MCEs
587 17:53:43.913404 Clearing out pending MCEs
588 17:53:43.913499 Setting up local APIC...
589 17:53:43.916753 Setting up local APIC...
590 17:53:43.920016 Initializing CPU #3
591 17:53:43.920110 Initializing CPU #5
592 17:53:43.923450 CPU: vendor Intel device 806ec
593 17:53:43.929993 CPU: family 06, model 8e, stepping 0c
594 17:53:43.930124 CPU: vendor Intel device 806ec
595 17:53:43.936729 CPU: family 06, model 8e, stepping 0c
596 17:53:43.936823 Clearing out pending MCEs
597 17:53:43.939911 apic_id: 0x01 done.
598 17:53:43.943147 Setting up local APIC...
599 17:53:43.946536 Setting up local APIC...
600 17:53:43.946630 VMX status: enabled
601 17:53:43.949861 apic_id: 0x02 done.
602 17:53:43.949955 apic_id: 0x03 done.
603 17:53:43.953119 VMX status: enabled
604 17:53:43.956252 VMX status: enabled
605 17:53:43.959492 IA32_FEATURE_CONTROL status: locked
606 17:53:43.963278 IA32_FEATURE_CONTROL status: locked
607 17:53:43.966286 Skip microcode update
608 17:53:43.966379 Skip microcode update
609 17:53:43.969844 CPU #1 initialized
610 17:53:43.969940 CPU #4 initialized
611 17:53:43.972855 CPU: vendor Intel device 806ec
612 17:53:43.976126 CPU: family 06, model 8e, stepping 0c
613 17:53:43.979459 CPU: vendor Intel device 806ec
614 17:53:43.986259 CPU: family 06, model 8e, stepping 0c
615 17:53:43.986354 Clearing out pending MCEs
616 17:53:43.989610 IA32_FEATURE_CONTROL status: locked
617 17:53:43.992847 Clearing out pending MCEs
618 17:53:43.996263 apic_id: 0x06 done.
619 17:53:43.999400 Setting up local APIC...
620 17:53:43.999494 Setting up local APIC...
621 17:53:44.002665 apic_id: 0x07 done.
622 17:53:44.006352 VMX status: enabled
623 17:53:44.006446 VMX status: enabled
624 17:53:44.009322 IA32_FEATURE_CONTROL status: locked
625 17:53:44.012840 apic_id: 0x04 done.
626 17:53:44.015958 Clearing out pending MCEs
627 17:53:44.016072 VMX status: enabled
628 17:53:44.022843 IA32_FEATURE_CONTROL status: locked
629 17:53:44.022936 Skip microcode update
630 17:53:44.025906 Skip microcode update
631 17:53:44.026000 CPU #3 initialized
632 17:53:44.029206 CPU #5 initialized
633 17:53:44.033090 Setting up local APIC...
634 17:53:44.033189 Skip microcode update
635 17:53:44.039807 IA32_FEATURE_CONTROL status: locked
636 17:53:44.039902 apic_id: 0x05 done.
637 17:53:44.043025 Skip microcode update
638 17:53:44.043119 VMX status: enabled
639 17:53:44.046250 CPU #7 initialized
640 17:53:44.049587 IA32_FEATURE_CONTROL status: locked
641 17:53:44.052454 CPU #2 initialized
642 17:53:44.052546 Skip microcode update
643 17:53:44.055909 CPU #6 initialized
644 17:53:44.059226 bsp_do_flight_plan done after 461 msecs.
645 17:53:44.062865 CPU: frequency set to 4200 MHz
646 17:53:44.066019 Enabling SMIs.
647 17:53:44.066111 Locking SMM.
648 17:53:44.081239 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 17:53:44.084617 CBFS @ c08000 size 3f8000
650 17:53:44.091032 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 17:53:44.091189 CBFS: Locating 'vbt.bin'
652 17:53:44.094260 CBFS: Found @ offset 5f5c0 size 499
653 17:53:44.101251 Found a VBT of 4608 bytes after decompression
654 17:53:44.283466 Display FSP Version Info HOB
655 17:53:44.287076 Reference Code - CPU = 9.0.1e.30
656 17:53:44.290511 uCode Version = 0.0.0.ca
657 17:53:44.293377 TXT ACM version = ff.ff.ff.ffff
658 17:53:44.296666 Display FSP Version Info HOB
659 17:53:44.300123 Reference Code - ME = 9.0.1e.30
660 17:53:44.303503 MEBx version = 0.0.0.0
661 17:53:44.306950 ME Firmware Version = Consumer SKU
662 17:53:44.310218 Display FSP Version Info HOB
663 17:53:44.313423 Reference Code - CML PCH = 9.0.1e.30
664 17:53:44.316847 PCH-CRID Status = Disabled
665 17:53:44.320239 PCH-CRID Original Value = ff.ff.ff.ffff
666 17:53:44.323449 PCH-CRID New Value = ff.ff.ff.ffff
667 17:53:44.326666 OPROM - RST - RAID = ff.ff.ff.ffff
668 17:53:44.329886 ChipsetInit Base Version = ff.ff.ff.ffff
669 17:53:44.333618 ChipsetInit Oem Version = ff.ff.ff.ffff
670 17:53:44.336687 Display FSP Version Info HOB
671 17:53:44.343544 Reference Code - SA - System Agent = 9.0.1e.30
672 17:53:44.346633 Reference Code - MRC = 0.7.1.6c
673 17:53:44.346727 SA - PCIe Version = 9.0.1e.30
674 17:53:44.350014 SA-CRID Status = Disabled
675 17:53:44.353286 SA-CRID Original Value = 0.0.0.c
676 17:53:44.356548 SA-CRID New Value = 0.0.0.c
677 17:53:44.360155 OPROM - VBIOS = ff.ff.ff.ffff
678 17:53:44.363458 RTC Init
679 17:53:44.366767 Set power on after power failure.
680 17:53:44.366861 Disabling Deep S3
681 17:53:44.369898 Disabling Deep S3
682 17:53:44.369991 Disabling Deep S4
683 17:53:44.373156 Disabling Deep S4
684 17:53:44.373250 Disabling Deep S5
685 17:53:44.376511 Disabling Deep S5
686 17:53:44.382815 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
687 17:53:44.382908 Enumerating buses...
688 17:53:44.389568 Show all devs... Before device enumeration.
689 17:53:44.389686 Root Device: enabled 1
690 17:53:44.393266 CPU_CLUSTER: 0: enabled 1
691 17:53:44.396664 DOMAIN: 0000: enabled 1
692 17:53:44.399649 APIC: 00: enabled 1
693 17:53:44.399763 PCI: 00:00.0: enabled 1
694 17:53:44.402885 PCI: 00:02.0: enabled 1
695 17:53:44.406262 PCI: 00:04.0: enabled 0
696 17:53:44.409689 PCI: 00:05.0: enabled 0
697 17:53:44.409782 PCI: 00:12.0: enabled 1
698 17:53:44.412992 PCI: 00:12.5: enabled 0
699 17:53:44.416612 PCI: 00:12.6: enabled 0
700 17:53:44.416735 PCI: 00:14.0: enabled 1
701 17:53:44.419970 PCI: 00:14.1: enabled 0
702 17:53:44.423353 PCI: 00:14.3: enabled 1
703 17:53:44.426689 PCI: 00:14.5: enabled 0
704 17:53:44.426781 PCI: 00:15.0: enabled 1
705 17:53:44.429543 PCI: 00:15.1: enabled 1
706 17:53:44.433385 PCI: 00:15.2: enabled 0
707 17:53:44.436381 PCI: 00:15.3: enabled 0
708 17:53:44.436473 PCI: 00:16.0: enabled 1
709 17:53:44.439633 PCI: 00:16.1: enabled 0
710 17:53:44.442992 PCI: 00:16.2: enabled 0
711 17:53:44.443084 PCI: 00:16.3: enabled 0
712 17:53:44.446295 PCI: 00:16.4: enabled 0
713 17:53:44.449532 PCI: 00:16.5: enabled 0
714 17:53:44.452907 PCI: 00:17.0: enabled 1
715 17:53:44.453000 PCI: 00:19.0: enabled 1
716 17:53:44.456406 PCI: 00:19.1: enabled 0
717 17:53:44.459736 PCI: 00:19.2: enabled 0
718 17:53:44.462916 PCI: 00:1a.0: enabled 0
719 17:53:44.463023 PCI: 00:1c.0: enabled 0
720 17:53:44.466141 PCI: 00:1c.1: enabled 0
721 17:53:44.469586 PCI: 00:1c.2: enabled 0
722 17:53:44.472759 PCI: 00:1c.3: enabled 0
723 17:53:44.472852 PCI: 00:1c.4: enabled 0
724 17:53:44.476107 PCI: 00:1c.5: enabled 0
725 17:53:44.479509 PCI: 00:1c.6: enabled 0
726 17:53:44.479609 PCI: 00:1c.7: enabled 0
727 17:53:44.482859 PCI: 00:1d.0: enabled 1
728 17:53:44.486132 PCI: 00:1d.1: enabled 0
729 17:53:44.489431 PCI: 00:1d.2: enabled 0
730 17:53:44.489524 PCI: 00:1d.3: enabled 0
731 17:53:44.492573 PCI: 00:1d.4: enabled 0
732 17:53:44.495877 PCI: 00:1d.5: enabled 1
733 17:53:44.499313 PCI: 00:1e.0: enabled 1
734 17:53:44.499405 PCI: 00:1e.1: enabled 0
735 17:53:44.502932 PCI: 00:1e.2: enabled 1
736 17:53:44.506210 PCI: 00:1e.3: enabled 1
737 17:53:44.509561 PCI: 00:1f.0: enabled 1
738 17:53:44.509653 PCI: 00:1f.1: enabled 1
739 17:53:44.513015 PCI: 00:1f.2: enabled 1
740 17:53:44.515867 PCI: 00:1f.3: enabled 1
741 17:53:44.515960 PCI: 00:1f.4: enabled 1
742 17:53:44.519653 PCI: 00:1f.5: enabled 1
743 17:53:44.522961 PCI: 00:1f.6: enabled 0
744 17:53:44.526229 USB0 port 0: enabled 1
745 17:53:44.526322 I2C: 00:15: enabled 1
746 17:53:44.529509 I2C: 00:5d: enabled 1
747 17:53:44.532738 GENERIC: 0.0: enabled 1
748 17:53:44.532830 I2C: 00:1a: enabled 1
749 17:53:44.536080 I2C: 00:38: enabled 1
750 17:53:44.539340 I2C: 00:39: enabled 1
751 17:53:44.539466 I2C: 00:3a: enabled 1
752 17:53:44.542830 I2C: 00:3b: enabled 1
753 17:53:44.546059 PCI: 00:00.0: enabled 1
754 17:53:44.546184 SPI: 00: enabled 1
755 17:53:44.549379 SPI: 01: enabled 1
756 17:53:44.552673 PNP: 0c09.0: enabled 1
757 17:53:44.552806 USB2 port 0: enabled 1
758 17:53:44.555885 USB2 port 1: enabled 1
759 17:53:44.559522 USB2 port 2: enabled 0
760 17:53:44.559617 USB2 port 3: enabled 0
761 17:53:44.562686 USB2 port 5: enabled 0
762 17:53:44.565999 USB2 port 6: enabled 1
763 17:53:44.569166 USB2 port 9: enabled 1
764 17:53:44.569260 USB3 port 0: enabled 1
765 17:53:44.572463 USB3 port 1: enabled 1
766 17:53:44.575692 USB3 port 2: enabled 1
767 17:53:44.575786 USB3 port 3: enabled 1
768 17:53:44.579463 USB3 port 4: enabled 0
769 17:53:44.582999 APIC: 02: enabled 1
770 17:53:44.583093 APIC: 01: enabled 1
771 17:53:44.585691 APIC: 06: enabled 1
772 17:53:44.589492 APIC: 03: enabled 1
773 17:53:44.589585 APIC: 07: enabled 1
774 17:53:44.592335 APIC: 05: enabled 1
775 17:53:44.592428 APIC: 04: enabled 1
776 17:53:44.595683 Compare with tree...
777 17:53:44.598994 Root Device: enabled 1
778 17:53:44.602665 CPU_CLUSTER: 0: enabled 1
779 17:53:44.602758 APIC: 00: enabled 1
780 17:53:44.605581 APIC: 02: enabled 1
781 17:53:44.608940 APIC: 01: enabled 1
782 17:53:44.609033 APIC: 06: enabled 1
783 17:53:44.612288 APIC: 03: enabled 1
784 17:53:44.615931 APIC: 07: enabled 1
785 17:53:44.616034 APIC: 05: enabled 1
786 17:53:44.619251 APIC: 04: enabled 1
787 17:53:44.622527 DOMAIN: 0000: enabled 1
788 17:53:44.625786 PCI: 00:00.0: enabled 1
789 17:53:44.625879 PCI: 00:02.0: enabled 1
790 17:53:44.629116 PCI: 00:04.0: enabled 0
791 17:53:44.632472 PCI: 00:05.0: enabled 0
792 17:53:44.635864 PCI: 00:12.0: enabled 1
793 17:53:44.638662 PCI: 00:12.5: enabled 0
794 17:53:44.638755 PCI: 00:12.6: enabled 0
795 17:53:44.642079 PCI: 00:14.0: enabled 1
796 17:53:44.645397 USB0 port 0: enabled 1
797 17:53:44.648981 USB2 port 0: enabled 1
798 17:53:44.652099 USB2 port 1: enabled 1
799 17:53:44.652192 USB2 port 2: enabled 0
800 17:53:44.655265 USB2 port 3: enabled 0
801 17:53:44.658585 USB2 port 5: enabled 0
802 17:53:44.662382 USB2 port 6: enabled 1
803 17:53:44.665449 USB2 port 9: enabled 1
804 17:53:44.665543 USB3 port 0: enabled 1
805 17:53:44.668620 USB3 port 1: enabled 1
806 17:53:44.672209 USB3 port 2: enabled 1
807 17:53:44.675510 USB3 port 3: enabled 1
808 17:53:44.678647 USB3 port 4: enabled 0
809 17:53:44.682017 PCI: 00:14.1: enabled 0
810 17:53:44.682110 PCI: 00:14.3: enabled 1
811 17:53:44.685390 PCI: 00:14.5: enabled 0
812 17:53:44.688714 PCI: 00:15.0: enabled 1
813 17:53:44.692117 I2C: 00:15: enabled 1
814 17:53:44.692237 PCI: 00:15.1: enabled 1
815 17:53:44.695511 I2C: 00:5d: enabled 1
816 17:53:44.698787 GENERIC: 0.0: enabled 1
817 17:53:44.702165 PCI: 00:15.2: enabled 0
818 17:53:44.705545 PCI: 00:15.3: enabled 0
819 17:53:44.705638 PCI: 00:16.0: enabled 1
820 17:53:44.708788 PCI: 00:16.1: enabled 0
821 17:53:44.712142 PCI: 00:16.2: enabled 0
822 17:53:44.715265 PCI: 00:16.3: enabled 0
823 17:53:44.718657 PCI: 00:16.4: enabled 0
824 17:53:44.718751 PCI: 00:16.5: enabled 0
825 17:53:44.722077 PCI: 00:17.0: enabled 1
826 17:53:44.725082 PCI: 00:19.0: enabled 1
827 17:53:44.728548 I2C: 00:1a: enabled 1
828 17:53:44.728641 I2C: 00:38: enabled 1
829 17:53:44.731891 I2C: 00:39: enabled 1
830 17:53:44.735182 I2C: 00:3a: enabled 1
831 17:53:44.738544 I2C: 00:3b: enabled 1
832 17:53:44.741840 PCI: 00:19.1: enabled 0
833 17:53:44.741934 PCI: 00:19.2: enabled 0
834 17:53:44.745160 PCI: 00:1a.0: enabled 0
835 17:53:44.748558 PCI: 00:1c.0: enabled 0
836 17:53:44.752242 PCI: 00:1c.1: enabled 0
837 17:53:44.752336 PCI: 00:1c.2: enabled 0
838 17:53:44.755516 PCI: 00:1c.3: enabled 0
839 17:53:44.758629 PCI: 00:1c.4: enabled 0
840 17:53:44.761758 PCI: 00:1c.5: enabled 0
841 17:53:44.765068 PCI: 00:1c.6: enabled 0
842 17:53:44.765160 PCI: 00:1c.7: enabled 0
843 17:53:44.768436 PCI: 00:1d.0: enabled 1
844 17:53:44.771941 PCI: 00:1d.1: enabled 0
845 17:53:44.775112 PCI: 00:1d.2: enabled 0
846 17:53:44.778757 PCI: 00:1d.3: enabled 0
847 17:53:44.778851 PCI: 00:1d.4: enabled 0
848 17:53:44.782107 PCI: 00:1d.5: enabled 1
849 17:53:44.785417 PCI: 00:00.0: enabled 1
850 17:53:44.788902 PCI: 00:1e.0: enabled 1
851 17:53:44.792018 PCI: 00:1e.1: enabled 0
852 17:53:44.792111 PCI: 00:1e.2: enabled 1
853 17:53:44.795360 SPI: 00: enabled 1
854 17:53:44.798675 PCI: 00:1e.3: enabled 1
855 17:53:44.798767 SPI: 01: enabled 1
856 17:53:44.801985 PCI: 00:1f.0: enabled 1
857 17:53:44.805286 PNP: 0c09.0: enabled 1
858 17:53:44.808651 PCI: 00:1f.1: enabled 1
859 17:53:44.811971 PCI: 00:1f.2: enabled 1
860 17:53:44.812077 PCI: 00:1f.3: enabled 1
861 17:53:44.815326 PCI: 00:1f.4: enabled 1
862 17:53:44.818636 PCI: 00:1f.5: enabled 1
863 17:53:44.821943 PCI: 00:1f.6: enabled 0
864 17:53:44.822035 Root Device scanning...
865 17:53:44.825660 scan_static_bus for Root Device
866 17:53:44.828643 CPU_CLUSTER: 0 enabled
867 17:53:44.832363 DOMAIN: 0000 enabled
868 17:53:44.835474 DOMAIN: 0000 scanning...
869 17:53:44.838756 PCI: pci_scan_bus for bus 00
870 17:53:44.838848 PCI: 00:00.0 [8086/0000] ops
871 17:53:44.842262 PCI: 00:00.0 [8086/9b61] enabled
872 17:53:44.845451 PCI: 00:02.0 [8086/0000] bus ops
873 17:53:44.848748 PCI: 00:02.0 [8086/9b41] enabled
874 17:53:44.852148 PCI: 00:04.0 [8086/1903] disabled
875 17:53:44.855468 PCI: 00:08.0 [8086/1911] enabled
876 17:53:44.858665 PCI: 00:12.0 [8086/02f9] enabled
877 17:53:44.861916 PCI: 00:14.0 [8086/0000] bus ops
878 17:53:44.865741 PCI: 00:14.0 [8086/02ed] enabled
879 17:53:44.868793 PCI: 00:14.2 [8086/02ef] enabled
880 17:53:44.872110 PCI: 00:14.3 [8086/02f0] enabled
881 17:53:44.875378 PCI: 00:15.0 [8086/0000] bus ops
882 17:53:44.878389 PCI: 00:15.0 [8086/02e8] enabled
883 17:53:44.882123 PCI: 00:15.1 [8086/0000] bus ops
884 17:53:44.885167 PCI: 00:15.1 [8086/02e9] enabled
885 17:53:44.888438 PCI: 00:16.0 [8086/0000] ops
886 17:53:44.892186 PCI: 00:16.0 [8086/02e0] enabled
887 17:53:44.895433 PCI: 00:17.0 [8086/0000] ops
888 17:53:44.898885 PCI: 00:17.0 [8086/02d3] enabled
889 17:53:44.902260 PCI: 00:19.0 [8086/0000] bus ops
890 17:53:44.905634 PCI: 00:19.0 [8086/02c5] enabled
891 17:53:44.908913 PCI: 00:1d.0 [8086/0000] bus ops
892 17:53:44.912283 PCI: 00:1d.0 [8086/02b0] enabled
893 17:53:44.918482 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 17:53:44.922387 PCI: 00:1e.0 [8086/0000] ops
895 17:53:44.925118 PCI: 00:1e.0 [8086/02a8] enabled
896 17:53:44.928458 PCI: 00:1e.2 [8086/0000] bus ops
897 17:53:44.932120 PCI: 00:1e.2 [8086/02aa] enabled
898 17:53:44.935267 PCI: 00:1e.3 [8086/0000] bus ops
899 17:53:44.938527 PCI: 00:1e.3 [8086/02ab] enabled
900 17:53:44.942252 PCI: 00:1f.0 [8086/0000] bus ops
901 17:53:44.945466 PCI: 00:1f.0 [8086/0284] enabled
902 17:53:44.948619 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 17:53:44.955522 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 17:53:44.958880 PCI: 00:1f.3 [8086/0000] bus ops
905 17:53:44.962116 PCI: 00:1f.3 [8086/02c8] enabled
906 17:53:44.965486 PCI: 00:1f.4 [8086/0000] bus ops
907 17:53:44.968844 PCI: 00:1f.4 [8086/02a3] enabled
908 17:53:44.972038 PCI: 00:1f.5 [8086/0000] bus ops
909 17:53:44.975165 PCI: 00:1f.5 [8086/02a4] enabled
910 17:53:44.978445 PCI: Leftover static devices:
911 17:53:44.978540 PCI: 00:05.0
912 17:53:44.982109 PCI: 00:12.5
913 17:53:44.982202 PCI: 00:12.6
914 17:53:44.985710 PCI: 00:14.1
915 17:53:44.985805 PCI: 00:14.5
916 17:53:44.988818 PCI: 00:15.2
917 17:53:44.988911 PCI: 00:15.3
918 17:53:44.988985 PCI: 00:16.1
919 17:53:44.991988 PCI: 00:16.2
920 17:53:44.992091 PCI: 00:16.3
921 17:53:44.995331 PCI: 00:16.4
922 17:53:44.995422 PCI: 00:16.5
923 17:53:44.995495 PCI: 00:19.1
924 17:53:44.998724 PCI: 00:19.2
925 17:53:44.998815 PCI: 00:1a.0
926 17:53:45.001811 PCI: 00:1c.0
927 17:53:45.001902 PCI: 00:1c.1
928 17:53:45.001975 PCI: 00:1c.2
929 17:53:45.005164 PCI: 00:1c.3
930 17:53:45.005257 PCI: 00:1c.4
931 17:53:45.008483 PCI: 00:1c.5
932 17:53:45.008575 PCI: 00:1c.6
933 17:53:45.008647 PCI: 00:1c.7
934 17:53:45.012130 PCI: 00:1d.1
935 17:53:45.012221 PCI: 00:1d.2
936 17:53:45.015586 PCI: 00:1d.3
937 17:53:45.015677 PCI: 00:1d.4
938 17:53:45.018385 PCI: 00:1d.5
939 17:53:45.018475 PCI: 00:1e.1
940 17:53:45.018548 PCI: 00:1f.1
941 17:53:45.021717 PCI: 00:1f.2
942 17:53:45.021808 PCI: 00:1f.6
943 17:53:45.025062 PCI: Check your devicetree.cb.
944 17:53:45.028407 PCI: 00:02.0 scanning...
945 17:53:45.031719 scan_generic_bus for PCI: 00:02.0
946 17:53:45.034946 scan_generic_bus for PCI: 00:02.0 done
947 17:53:45.041844 scan_bus: scanning of bus PCI: 00:02.0 took 10181 usecs
948 17:53:45.045268 PCI: 00:14.0 scanning...
949 17:53:45.048604 scan_static_bus for PCI: 00:14.0
950 17:53:45.048696 USB0 port 0 enabled
951 17:53:45.051953 USB0 port 0 scanning...
952 17:53:45.055000 scan_static_bus for USB0 port 0
953 17:53:45.058181 USB2 port 0 enabled
954 17:53:45.058273 USB2 port 1 enabled
955 17:53:45.061456 USB2 port 2 disabled
956 17:53:45.065058 USB2 port 3 disabled
957 17:53:45.065152 USB2 port 5 disabled
958 17:53:45.068458 USB2 port 6 enabled
959 17:53:45.071802 USB2 port 9 enabled
960 17:53:45.071887 USB3 port 0 enabled
961 17:53:45.075087 USB3 port 1 enabled
962 17:53:45.075179 USB3 port 2 enabled
963 17:53:45.078078 USB3 port 3 enabled
964 17:53:45.081481 USB3 port 4 disabled
965 17:53:45.081572 USB2 port 0 scanning...
966 17:53:45.084839 scan_static_bus for USB2 port 0
967 17:53:45.091584 scan_static_bus for USB2 port 0 done
968 17:53:45.094724 scan_bus: scanning of bus USB2 port 0 took 9694 usecs
969 17:53:45.097852 USB2 port 1 scanning...
970 17:53:45.101166 scan_static_bus for USB2 port 1
971 17:53:45.104752 scan_static_bus for USB2 port 1 done
972 17:53:45.111251 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
973 17:53:45.111354 USB2 port 6 scanning...
974 17:53:45.114409 scan_static_bus for USB2 port 6
975 17:53:45.121267 scan_static_bus for USB2 port 6 done
976 17:53:45.124541 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
977 17:53:45.127869 USB2 port 9 scanning...
978 17:53:45.131273 scan_static_bus for USB2 port 9
979 17:53:45.134515 scan_static_bus for USB2 port 9 done
980 17:53:45.141055 scan_bus: scanning of bus USB2 port 9 took 9685 usecs
981 17:53:45.141142 USB3 port 0 scanning...
982 17:53:45.144896 scan_static_bus for USB3 port 0
983 17:53:45.151358 scan_static_bus for USB3 port 0 done
984 17:53:45.154587 scan_bus: scanning of bus USB3 port 0 took 9695 usecs
985 17:53:45.158376 USB3 port 1 scanning...
986 17:53:45.161699 scan_static_bus for USB3 port 1
987 17:53:45.164910 scan_static_bus for USB3 port 1 done
988 17:53:45.171414 scan_bus: scanning of bus USB3 port 1 took 9694 usecs
989 17:53:45.171506 USB3 port 2 scanning...
990 17:53:45.174845 scan_static_bus for USB3 port 2
991 17:53:45.181285 scan_static_bus for USB3 port 2 done
992 17:53:45.184796 scan_bus: scanning of bus USB3 port 2 took 9694 usecs
993 17:53:45.188092 USB3 port 3 scanning...
994 17:53:45.191430 scan_static_bus for USB3 port 3
995 17:53:45.194630 scan_static_bus for USB3 port 3 done
996 17:53:45.201653 scan_bus: scanning of bus USB3 port 3 took 9697 usecs
997 17:53:45.204694 scan_static_bus for USB0 port 0 done
998 17:53:45.207929 scan_bus: scanning of bus USB0 port 0 took 155312 usecs
999 17:53:45.214779 scan_static_bus for PCI: 00:14.0 done
1000 17:53:45.218080 scan_bus: scanning of bus PCI: 00:14.0 took 172931 usecs
1001 17:53:45.221457 PCI: 00:15.0 scanning...
1002 17:53:45.224728 scan_generic_bus for PCI: 00:15.0
1003 17:53:45.228171 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 17:53:45.234290 scan_generic_bus for PCI: 00:15.0 done
1005 17:53:45.238135 scan_bus: scanning of bus PCI: 00:15.0 took 14295 usecs
1006 17:53:45.240984 PCI: 00:15.1 scanning...
1007 17:53:45.244437 scan_generic_bus for PCI: 00:15.1
1008 17:53:45.248132 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 17:53:45.254297 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 17:53:45.257946 scan_generic_bus for PCI: 00:15.1 done
1011 17:53:45.261014 scan_bus: scanning of bus PCI: 00:15.1 took 18623 usecs
1012 17:53:45.264669 PCI: 00:19.0 scanning...
1013 17:53:45.267831 scan_generic_bus for PCI: 00:19.0
1014 17:53:45.274738 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 17:53:45.277579 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 17:53:45.280987 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 17:53:45.284234 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 17:53:45.291224 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 17:53:45.294081 scan_generic_bus for PCI: 00:19.0 done
1020 17:53:45.297443 scan_bus: scanning of bus PCI: 00:19.0 took 30739 usecs
1021 17:53:45.300760 PCI: 00:1d.0 scanning...
1022 17:53:45.304372 do_pci_scan_bridge for PCI: 00:1d.0
1023 17:53:45.307561 PCI: pci_scan_bus for bus 01
1024 17:53:45.310654 PCI: 01:00.0 [1c5c/1327] enabled
1025 17:53:45.313944 Enabling Common Clock Configuration
1026 17:53:45.320886 L1 Sub-State supported from root port 29
1027 17:53:45.320979 L1 Sub-State Support = 0xf
1028 17:53:45.323977 CommonModeRestoreTime = 0x28
1029 17:53:45.330657 Power On Value = 0x16, Power On Scale = 0x0
1030 17:53:45.330749 ASPM: Enabled L1
1031 17:53:45.337507 scan_bus: scanning of bus PCI: 00:1d.0 took 32776 usecs
1032 17:53:45.340780 PCI: 00:1e.2 scanning...
1033 17:53:45.344109 scan_generic_bus for PCI: 00:1e.2
1034 17:53:45.347499 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 17:53:45.350762 scan_generic_bus for PCI: 00:1e.2 done
1036 17:53:45.357484 scan_bus: scanning of bus PCI: 00:1e.2 took 14012 usecs
1037 17:53:45.357575 PCI: 00:1e.3 scanning...
1038 17:53:45.364351 scan_generic_bus for PCI: 00:1e.3
1039 17:53:45.367560 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 17:53:45.371130 scan_generic_bus for PCI: 00:1e.3 done
1041 17:53:45.374509 scan_bus: scanning of bus PCI: 00:1e.3 took 13991 usecs
1042 17:53:45.377541 PCI: 00:1f.0 scanning...
1043 17:53:45.381152 scan_static_bus for PCI: 00:1f.0
1044 17:53:45.384535 PNP: 0c09.0 enabled
1045 17:53:45.387889 scan_static_bus for PCI: 00:1f.0 done
1046 17:53:45.394571 scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs
1047 17:53:45.397629 PCI: 00:1f.3 scanning...
1048 17:53:45.400987 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1049 17:53:45.404348 PCI: 00:1f.4 scanning...
1050 17:53:45.407694 scan_generic_bus for PCI: 00:1f.4
1051 17:53:45.410805 scan_generic_bus for PCI: 00:1f.4 done
1052 17:53:45.417700 scan_bus: scanning of bus PCI: 00:1f.4 took 10192 usecs
1053 17:53:45.420943 PCI: 00:1f.5 scanning...
1054 17:53:45.424142 scan_generic_bus for PCI: 00:1f.5
1055 17:53:45.427447 scan_generic_bus for PCI: 00:1f.5 done
1056 17:53:45.434262 scan_bus: scanning of bus PCI: 00:1f.5 took 10183 usecs
1057 17:53:45.437611 scan_bus: scanning of bus DOMAIN: 0000 took 604952 usecs
1058 17:53:45.444373 scan_static_bus for Root Device done
1059 17:53:45.447261 scan_bus: scanning of bus Root Device took 624826 usecs
1060 17:53:45.447353 done
1061 17:53:45.450983 Chrome EC: UHEPI supported
1062 17:53:45.457660 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 17:53:45.464371 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 17:53:45.471045 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 17:53:45.477971 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 17:53:45.481472 SPI flash protection: WPSW=0 SRP0=0
1067 17:53:45.484149 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 17:53:45.490856 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 17:53:45.494377 found VGA at PCI: 00:02.0
1070 17:53:45.497629 Setting up VGA for PCI: 00:02.0
1071 17:53:45.500659 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 17:53:45.507637 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 17:53:45.511039 Allocating resources...
1074 17:53:45.511131 Reading resources...
1075 17:53:45.514205 Root Device read_resources bus 0 link: 0
1076 17:53:45.520882 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 17:53:45.524441 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 17:53:45.530894 DOMAIN: 0000 read_resources bus 0 link: 0
1079 17:53:45.534128 PCI: 00:14.0 read_resources bus 0 link: 0
1080 17:53:45.541069 USB0 port 0 read_resources bus 0 link: 0
1081 17:53:45.547933 USB0 port 0 read_resources bus 0 link: 0 done
1082 17:53:45.551284 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 17:53:45.558761 PCI: 00:15.0 read_resources bus 1 link: 0
1084 17:53:45.562067 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 17:53:45.568825 PCI: 00:15.1 read_resources bus 2 link: 0
1086 17:53:45.571978 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 17:53:45.579595 PCI: 00:19.0 read_resources bus 3 link: 0
1088 17:53:45.585998 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 17:53:45.589327 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 17:53:45.596108 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 17:53:45.599225 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 17:53:45.606128 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 17:53:45.609438 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 17:53:45.616081 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 17:53:45.619586 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 17:53:45.626097 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 17:53:45.629487 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 17:53:45.636497 Root Device read_resources bus 0 link: 0 done
1099 17:53:45.639906 Done reading resources.
1100 17:53:45.643370 Show resources in subtree (Root Device)...After reading.
1101 17:53:45.649698 Root Device child on link 0 CPU_CLUSTER: 0
1102 17:53:45.653055 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 17:53:45.653148 APIC: 00
1104 17:53:45.656417 APIC: 02
1105 17:53:45.656510 APIC: 01
1106 17:53:45.656583 APIC: 06
1107 17:53:45.659659 APIC: 03
1108 17:53:45.659751 APIC: 07
1109 17:53:45.663013 APIC: 05
1110 17:53:45.663105 APIC: 04
1111 17:53:45.666454 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 17:53:45.676478 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 17:53:45.729143 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 17:53:45.729452 PCI: 00:00.0
1115 17:53:45.729570 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 17:53:45.730272 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 17:53:45.730578 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 17:53:45.730878 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 17:53:45.778841 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 17:53:45.779132 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 17:53:45.779227 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 17:53:45.779320 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 17:53:45.779934 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 17:53:45.783233 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 17:53:45.789880 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 17:53:45.799835 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 17:53:45.809819 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 17:53:45.819376 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 17:53:45.829271 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 17:53:45.836141 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 17:53:45.839552 PCI: 00:02.0
1132 17:53:45.849097 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 17:53:45.859386 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 17:53:45.869059 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 17:53:45.869153 PCI: 00:04.0
1136 17:53:45.872363 PCI: 00:08.0
1137 17:53:45.882994 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 17:53:45.883089 PCI: 00:12.0
1139 17:53:45.892573 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 17:53:45.899251 PCI: 00:14.0 child on link 0 USB0 port 0
1141 17:53:45.909026 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 17:53:45.912002 USB0 port 0 child on link 0 USB2 port 0
1143 17:53:45.912098 USB2 port 0
1144 17:53:45.915812 USB2 port 1
1145 17:53:45.915904 USB2 port 2
1146 17:53:45.918869 USB2 port 3
1147 17:53:45.918966 USB2 port 5
1148 17:53:45.921915 USB2 port 6
1149 17:53:45.925378 USB2 port 9
1150 17:53:45.925470 USB3 port 0
1151 17:53:45.928725 USB3 port 1
1152 17:53:45.928818 USB3 port 2
1153 17:53:45.932153 USB3 port 3
1154 17:53:45.932246 USB3 port 4
1155 17:53:45.935479 PCI: 00:14.2
1156 17:53:45.945349 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 17:53:45.955649 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 17:53:45.955743 PCI: 00:14.3
1159 17:53:45.965469 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 17:53:45.968531 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 17:53:45.978690 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 17:53:45.982063 I2C: 01:15
1163 17:53:45.985491 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 17:53:45.995467 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 17:53:45.998735 I2C: 02:5d
1166 17:53:45.998828 GENERIC: 0.0
1167 17:53:46.002100 PCI: 00:16.0
1168 17:53:46.011934 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 17:53:46.012055 PCI: 00:17.0
1170 17:53:46.021452 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 17:53:46.031594 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 17:53:46.038271 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 17:53:46.048139 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 17:53:46.054588 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 17:53:46.064662 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 17:53:46.067939 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 17:53:46.078008 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 17:53:46.081767 I2C: 03:1a
1179 17:53:46.081861 I2C: 03:38
1180 17:53:46.084592 I2C: 03:39
1181 17:53:46.084684 I2C: 03:3a
1182 17:53:46.084758 I2C: 03:3b
1183 17:53:46.091419 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 17:53:46.098273 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 17:53:46.108180 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 17:53:46.117958 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 17:53:46.121236 PCI: 01:00.0
1188 17:53:46.131127 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 17:53:46.131221 PCI: 00:1e.0
1190 17:53:46.141551 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 17:53:46.151402 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 17:53:46.158034 PCI: 00:1e.2 child on link 0 SPI: 00
1193 17:53:46.167804 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 17:53:46.167899 SPI: 00
1195 17:53:46.171453 PCI: 00:1e.3 child on link 0 SPI: 01
1196 17:53:46.181143 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 17:53:46.184710 SPI: 01
1198 17:53:46.188120 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 17:53:46.194695 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 17:53:46.204460 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 17:53:46.207741 PNP: 0c09.0
1202 17:53:46.214443 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 17:53:46.217753 PCI: 00:1f.3
1204 17:53:46.227470 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 17:53:46.237734 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 17:53:46.237829 PCI: 00:1f.4
1207 17:53:46.247682 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 17:53:46.257631 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 17:53:46.260901 PCI: 00:1f.5
1210 17:53:46.267514 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 17:53:46.273988 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 17:53:46.280755 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 17:53:46.287422 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 17:53:46.290864 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 17:53:46.293909 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 17:53:46.297399 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 17:53:46.303729 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 17:53:46.310626 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 17:53:46.317297 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 17:53:46.323364 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 17:53:46.333706 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 17:53:46.339970 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 17:53:46.343528 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 17:53:46.350594 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 17:53:46.357095 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 17:53:46.359954 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 17:53:46.363384 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 17:53:46.369929 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 17:53:46.373674 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 17:53:46.379972 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 17:53:46.383113 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 17:53:46.390075 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 17:53:46.392935 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 17:53:46.400022 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 17:53:46.403325 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 17:53:46.409500 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 17:53:46.413028 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 17:53:46.419470 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 17:53:46.422874 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 17:53:46.429464 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 17:53:46.432761 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 17:53:46.436006 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 17:53:46.442417 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 17:53:46.446254 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 17:53:46.452275 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 17:53:46.456103 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 17:53:46.462456 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 17:53:46.469132 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 17:53:46.472452 avoid_fixed_resources: DOMAIN: 0000
1250 17:53:46.479206 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 17:53:46.485684 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 17:53:46.492526 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 17:53:46.502444 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 17:53:46.509180 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 17:53:46.515617 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 17:53:46.525134 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 17:53:46.532092 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 17:53:46.538731 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 17:53:46.548504 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 17:53:46.555663 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 17:53:46.561860 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 17:53:46.565046 Setting resources...
1263 17:53:46.571757 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 17:53:46.575086 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 17:53:46.578495 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 17:53:46.581731 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 17:53:46.585277 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 17:53:46.591786 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 17:53:46.598389 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 17:53:46.605087 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 17:53:46.611773 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 17:53:46.618514 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 17:53:46.622019 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 17:53:46.628554 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 17:53:46.631716 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 17:53:46.638446 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 17:53:46.641987 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 17:53:46.648376 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 17:53:46.651628 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 17:53:46.658439 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 17:53:46.661826 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 17:53:46.665126 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 17:53:46.671317 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 17:53:46.674854 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 17:53:46.681407 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 17:53:46.684657 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 17:53:46.691375 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 17:53:46.694703 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 17:53:46.701438 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 17:53:46.704710 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 17:53:46.711508 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 17:53:46.714888 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 17:53:46.721570 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 17:53:46.724963 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 17:53:46.731157 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 17:53:46.737917 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 17:53:46.748188 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 17:53:46.754647 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 17:53:46.758014 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 17:53:46.768115 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 17:53:46.771385 Root Device assign_resources, bus 0 link: 0
1302 17:53:46.774322 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 17:53:46.784889 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 17:53:46.791622 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 17:53:46.801628 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 17:53:46.807910 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 17:53:46.818359 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 17:53:46.824672 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 17:53:46.831407 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 17:53:46.834527 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 17:53:46.841137 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 17:53:46.851250 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 17:53:46.857979 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 17:53:46.867801 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 17:53:46.871098 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 17:53:46.878177 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 17:53:46.884740 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 17:53:46.887902 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 17:53:46.894762 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 17:53:46.901271 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 17:53:46.911509 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 17:53:46.918067 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 17:53:46.924767 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 17:53:46.934757 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 17:53:46.940951 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 17:53:46.947896 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 17:53:46.957908 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 17:53:46.961336 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 17:53:46.967825 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 17:53:46.974456 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 17:53:46.984425 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 17:53:46.994423 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 17:53:46.997644 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 17:53:47.003908 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 17:53:47.010874 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 17:53:47.017555 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 17:53:47.027515 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 17:53:47.030944 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 17:53:47.037537 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 17:53:47.044048 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 17:53:47.047465 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 17:53:47.053965 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 17:53:47.057617 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 17:53:47.064226 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 17:53:47.067598 LPC: Trying to open IO window from 800 size 1ff
1346 17:53:47.077404 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 17:53:47.084155 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 17:53:47.093763 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 17:53:47.100480 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 17:53:47.107216 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 17:53:47.110631 Root Device assign_resources, bus 0 link: 0
1352 17:53:47.114028 Done setting resources.
1353 17:53:47.120402 Show resources in subtree (Root Device)...After assigning values.
1354 17:53:47.123523 Root Device child on link 0 CPU_CLUSTER: 0
1355 17:53:47.126969 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 17:53:47.130249 APIC: 00
1357 17:53:47.130346 APIC: 02
1358 17:53:47.130419 APIC: 01
1359 17:53:47.133907 APIC: 06
1360 17:53:47.133999 APIC: 03
1361 17:53:47.137081 APIC: 07
1362 17:53:47.137172 APIC: 05
1363 17:53:47.137244 APIC: 04
1364 17:53:47.143775 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 17:53:47.153648 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 17:53:47.163469 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 17:53:47.163562 PCI: 00:00.0
1368 17:53:47.173574 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 17:53:47.183120 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 17:53:47.193253 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 17:53:47.203165 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 17:53:47.213170 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 17:53:47.219718 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 17:53:47.229568 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 17:53:47.239479 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 17:53:47.249344 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 17:53:47.259099 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 17:53:47.266091 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 17:53:47.275896 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 17:53:47.286066 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 17:53:47.295620 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 17:53:47.305696 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 17:53:47.315799 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 17:53:47.315920 PCI: 00:02.0
1385 17:53:47.328898 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 17:53:47.338944 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 17:53:47.345522 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 17:53:47.348896 PCI: 00:04.0
1389 17:53:47.348987 PCI: 00:08.0
1390 17:53:47.361976 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 17:53:47.362068 PCI: 00:12.0
1392 17:53:47.372129 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 17:53:47.378465 PCI: 00:14.0 child on link 0 USB0 port 0
1394 17:53:47.388599 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 17:53:47.391544 USB0 port 0 child on link 0 USB2 port 0
1396 17:53:47.395504 USB2 port 0
1397 17:53:47.395597 USB2 port 1
1398 17:53:47.398652 USB2 port 2
1399 17:53:47.398744 USB2 port 3
1400 17:53:47.401543 USB2 port 5
1401 17:53:47.401635 USB2 port 6
1402 17:53:47.404868 USB2 port 9
1403 17:53:47.404960 USB3 port 0
1404 17:53:47.408144 USB3 port 1
1405 17:53:47.408242 USB3 port 2
1406 17:53:47.411483 USB3 port 3
1407 17:53:47.411573 USB3 port 4
1408 17:53:47.414909 PCI: 00:14.2
1409 17:53:47.424800 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 17:53:47.434571 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 17:53:47.437951 PCI: 00:14.3
1412 17:53:47.447895 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 17:53:47.451252 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 17:53:47.461260 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 17:53:47.464617 I2C: 01:15
1416 17:53:47.467420 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 17:53:47.477428 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 17:53:47.480828 I2C: 02:5d
1419 17:53:47.480919 GENERIC: 0.0
1420 17:53:47.483860 PCI: 00:16.0
1421 17:53:47.494026 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 17:53:47.494121 PCI: 00:17.0
1423 17:53:47.503991 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 17:53:47.513603 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 17:53:47.523522 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 17:53:47.533849 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 17:53:47.543837 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 17:53:47.553294 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 17:53:47.556982 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 17:53:47.566924 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 17:53:47.570327 I2C: 03:1a
1432 17:53:47.570417 I2C: 03:38
1433 17:53:47.573090 I2C: 03:39
1434 17:53:47.573180 I2C: 03:3a
1435 17:53:47.573252 I2C: 03:3b
1436 17:53:47.580164 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 17:53:47.589576 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 17:53:47.599626 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 17:53:47.610192 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 17:53:47.610283 PCI: 01:00.0
1441 17:53:47.623052 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 17:53:47.623175 PCI: 00:1e.0
1443 17:53:47.632576 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 17:53:47.642613 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 17:53:47.649637 PCI: 00:1e.2 child on link 0 SPI: 00
1446 17:53:47.659249 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 17:53:47.659341 SPI: 00
1448 17:53:47.662781 PCI: 00:1e.3 child on link 0 SPI: 01
1449 17:53:47.676098 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 17:53:47.676191 SPI: 01
1451 17:53:47.679369 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 17:53:47.689257 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 17:53:47.698804 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 17:53:47.698899 PNP: 0c09.0
1455 17:53:47.708627 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 17:53:47.708719 PCI: 00:1f.3
1457 17:53:47.718623 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 17:53:47.731777 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 17:53:47.731870 PCI: 00:1f.4
1460 17:53:47.742096 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 17:53:47.752010 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 17:53:47.752102 PCI: 00:1f.5
1463 17:53:47.761720 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 17:53:47.764944 Done allocating resources.
1465 17:53:47.771586 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 17:53:47.774741 Enabling resources...
1467 17:53:47.778120 PCI: 00:00.0 subsystem <- 8086/9b61
1468 17:53:47.781421 PCI: 00:00.0 cmd <- 06
1469 17:53:47.784771 PCI: 00:02.0 subsystem <- 8086/9b41
1470 17:53:47.788019 PCI: 00:02.0 cmd <- 03
1471 17:53:47.791344 PCI: 00:08.0 cmd <- 06
1472 17:53:47.794601 PCI: 00:12.0 subsystem <- 8086/02f9
1473 17:53:47.794695 PCI: 00:12.0 cmd <- 02
1474 17:53:47.801891 PCI: 00:14.0 subsystem <- 8086/02ed
1475 17:53:47.802014 PCI: 00:14.0 cmd <- 02
1476 17:53:47.805229 PCI: 00:14.2 cmd <- 02
1477 17:53:47.808538 PCI: 00:14.3 subsystem <- 8086/02f0
1478 17:53:47.811752 PCI: 00:14.3 cmd <- 02
1479 17:53:47.814930 PCI: 00:15.0 subsystem <- 8086/02e8
1480 17:53:47.818527 PCI: 00:15.0 cmd <- 02
1481 17:53:47.821340 PCI: 00:15.1 subsystem <- 8086/02e9
1482 17:53:47.824957 PCI: 00:15.1 cmd <- 02
1483 17:53:47.828070 PCI: 00:16.0 subsystem <- 8086/02e0
1484 17:53:47.831612 PCI: 00:16.0 cmd <- 02
1485 17:53:47.834704 PCI: 00:17.0 subsystem <- 8086/02d3
1486 17:53:47.838089 PCI: 00:17.0 cmd <- 03
1487 17:53:47.841276 PCI: 00:19.0 subsystem <- 8086/02c5
1488 17:53:47.841367 PCI: 00:19.0 cmd <- 02
1489 17:53:47.844802 PCI: 00:1d.0 bridge ctrl <- 0013
1490 17:53:47.851575 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 17:53:47.851667 PCI: 00:1d.0 cmd <- 06
1492 17:53:47.854673 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 17:53:47.858112 PCI: 00:1e.0 cmd <- 06
1494 17:53:47.861372 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 17:53:47.864647 PCI: 00:1e.2 cmd <- 06
1496 17:53:47.867919 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 17:53:47.871242 PCI: 00:1e.3 cmd <- 02
1498 17:53:47.874921 PCI: 00:1f.0 subsystem <- 8086/0284
1499 17:53:47.878015 PCI: 00:1f.0 cmd <- 407
1500 17:53:47.881360 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 17:53:47.884723 PCI: 00:1f.3 cmd <- 02
1502 17:53:47.888117 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 17:53:47.891339 PCI: 00:1f.4 cmd <- 03
1504 17:53:47.894548 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 17:53:47.897898 PCI: 00:1f.5 cmd <- 406
1506 17:53:47.905120 PCI: 01:00.0 cmd <- 02
1507 17:53:47.910609 done.
1508 17:53:47.922879 ME: Version: 14.0.39.1367
1509 17:53:47.929248 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1510 17:53:47.932714 Initializing devices...
1511 17:53:47.932809 Root Device init ...
1512 17:53:47.939366 Chrome EC: Set SMI mask to 0x0000000000000000
1513 17:53:47.942457 Chrome EC: clear events_b mask to 0x0000000000000000
1514 17:53:47.949001 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 17:53:47.955656 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 17:53:47.962522 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 17:53:47.965803 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 17:53:47.968810 Root Device init finished in 35178 usecs
1519 17:53:47.972498 CPU_CLUSTER: 0 init ...
1520 17:53:47.979018 CPU_CLUSTER: 0 init finished in 2448 usecs
1521 17:53:47.983137 PCI: 00:00.0 init ...
1522 17:53:47.986488 CPU TDP: 15 Watts
1523 17:53:47.989745 CPU PL2 = 64 Watts
1524 17:53:47.993161 PCI: 00:00.0 init finished in 7072 usecs
1525 17:53:47.996468 PCI: 00:02.0 init ...
1526 17:53:47.999617 PCI: 00:02.0 init finished in 2254 usecs
1527 17:53:48.003074 PCI: 00:08.0 init ...
1528 17:53:48.006421 PCI: 00:08.0 init finished in 2253 usecs
1529 17:53:48.009674 PCI: 00:12.0 init ...
1530 17:53:48.013232 PCI: 00:12.0 init finished in 2253 usecs
1531 17:53:48.016219 PCI: 00:14.0 init ...
1532 17:53:48.019612 PCI: 00:14.0 init finished in 2244 usecs
1533 17:53:48.022945 PCI: 00:14.2 init ...
1534 17:53:48.026157 PCI: 00:14.2 init finished in 2252 usecs
1535 17:53:48.029921 PCI: 00:14.3 init ...
1536 17:53:48.033071 PCI: 00:14.3 init finished in 2264 usecs
1537 17:53:48.036309 PCI: 00:15.0 init ...
1538 17:53:48.039524 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 17:53:48.042792 PCI: 00:15.0 init finished in 5979 usecs
1540 17:53:48.046368 PCI: 00:15.1 init ...
1541 17:53:48.049341 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 17:53:48.052892 PCI: 00:15.1 init finished in 5978 usecs
1543 17:53:48.056489 PCI: 00:16.0 init ...
1544 17:53:48.059650 PCI: 00:16.0 init finished in 2251 usecs
1545 17:53:48.063525 PCI: 00:19.0 init ...
1546 17:53:48.067014 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 17:53:48.073762 PCI: 00:19.0 init finished in 5978 usecs
1548 17:53:48.073852 PCI: 00:1d.0 init ...
1549 17:53:48.077121 Initializing PCH PCIe bridge.
1550 17:53:48.079935 PCI: 00:1d.0 init finished in 5276 usecs
1551 17:53:48.084952 PCI: 00:1f.0 init ...
1552 17:53:48.088140 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 17:53:48.095327 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 17:53:48.095418 IOAPIC: ID = 0x02
1555 17:53:48.098088 IOAPIC: Dumping registers
1556 17:53:48.101468 reg 0x0000: 0x02000000
1557 17:53:48.104834 reg 0x0001: 0x00770020
1558 17:53:48.104924 reg 0x0002: 0x00000000
1559 17:53:48.112080 PCI: 00:1f.0 init finished in 23545 usecs
1560 17:53:48.114894 PCI: 00:1f.4 init ...
1561 17:53:48.118192 PCI: 00:1f.4 init finished in 2263 usecs
1562 17:53:48.129171 PCI: 01:00.0 init ...
1563 17:53:48.132547 PCI: 01:00.0 init finished in 2243 usecs
1564 17:53:48.137240 PNP: 0c09.0 init ...
1565 17:53:48.140492 Google Chrome EC uptime: 11.050 seconds
1566 17:53:48.146867 Google Chrome AP resets since EC boot: 0
1567 17:53:48.150151 Google Chrome most recent AP reset causes:
1568 17:53:48.156512 Google Chrome EC reset flags at last EC boot: reset-pin
1569 17:53:48.160322 PNP: 0c09.0 init finished in 20570 usecs
1570 17:53:48.163465 Devices initialized
1571 17:53:48.163555 Show all devs... After init.
1572 17:53:48.166439 Root Device: enabled 1
1573 17:53:48.170118 CPU_CLUSTER: 0: enabled 1
1574 17:53:48.173300 DOMAIN: 0000: enabled 1
1575 17:53:48.173391 APIC: 00: enabled 1
1576 17:53:48.176695 PCI: 00:00.0: enabled 1
1577 17:53:48.179988 PCI: 00:02.0: enabled 1
1578 17:53:48.183623 PCI: 00:04.0: enabled 0
1579 17:53:48.183714 PCI: 00:05.0: enabled 0
1580 17:53:48.186654 PCI: 00:12.0: enabled 1
1581 17:53:48.189894 PCI: 00:12.5: enabled 0
1582 17:53:48.189984 PCI: 00:12.6: enabled 0
1583 17:53:48.193062 PCI: 00:14.0: enabled 1
1584 17:53:48.196192 PCI: 00:14.1: enabled 0
1585 17:53:48.199935 PCI: 00:14.3: enabled 1
1586 17:53:48.200052 PCI: 00:14.5: enabled 0
1587 17:53:48.203354 PCI: 00:15.0: enabled 1
1588 17:53:48.206632 PCI: 00:15.1: enabled 1
1589 17:53:48.210014 PCI: 00:15.2: enabled 0
1590 17:53:48.210105 PCI: 00:15.3: enabled 0
1591 17:53:48.212824 PCI: 00:16.0: enabled 1
1592 17:53:48.216148 PCI: 00:16.1: enabled 0
1593 17:53:48.219478 PCI: 00:16.2: enabled 0
1594 17:53:48.219567 PCI: 00:16.3: enabled 0
1595 17:53:48.223140 PCI: 00:16.4: enabled 0
1596 17:53:48.226541 PCI: 00:16.5: enabled 0
1597 17:53:48.229744 PCI: 00:17.0: enabled 1
1598 17:53:48.229835 PCI: 00:19.0: enabled 1
1599 17:53:48.233257 PCI: 00:19.1: enabled 0
1600 17:53:48.236344 PCI: 00:19.2: enabled 0
1601 17:53:48.236438 PCI: 00:1a.0: enabled 0
1602 17:53:48.239464 PCI: 00:1c.0: enabled 0
1603 17:53:48.242792 PCI: 00:1c.1: enabled 0
1604 17:53:48.246115 PCI: 00:1c.2: enabled 0
1605 17:53:48.246206 PCI: 00:1c.3: enabled 0
1606 17:53:48.249216 PCI: 00:1c.4: enabled 0
1607 17:53:48.252551 PCI: 00:1c.5: enabled 0
1608 17:53:48.256157 PCI: 00:1c.6: enabled 0
1609 17:53:48.256247 PCI: 00:1c.7: enabled 0
1610 17:53:48.259441 PCI: 00:1d.0: enabled 1
1611 17:53:48.262764 PCI: 00:1d.1: enabled 0
1612 17:53:48.266070 PCI: 00:1d.2: enabled 0
1613 17:53:48.266161 PCI: 00:1d.3: enabled 0
1614 17:53:48.269368 PCI: 00:1d.4: enabled 0
1615 17:53:48.272435 PCI: 00:1d.5: enabled 0
1616 17:53:48.272538 PCI: 00:1e.0: enabled 1
1617 17:53:48.275808 PCI: 00:1e.1: enabled 0
1618 17:53:48.279271 PCI: 00:1e.2: enabled 1
1619 17:53:48.282498 PCI: 00:1e.3: enabled 1
1620 17:53:48.282589 PCI: 00:1f.0: enabled 1
1621 17:53:48.285706 PCI: 00:1f.1: enabled 0
1622 17:53:48.289137 PCI: 00:1f.2: enabled 0
1623 17:53:48.292542 PCI: 00:1f.3: enabled 1
1624 17:53:48.292633 PCI: 00:1f.4: enabled 1
1625 17:53:48.295597 PCI: 00:1f.5: enabled 1
1626 17:53:48.299274 PCI: 00:1f.6: enabled 0
1627 17:53:48.302475 USB0 port 0: enabled 1
1628 17:53:48.302565 I2C: 01:15: enabled 1
1629 17:53:48.305844 I2C: 02:5d: enabled 1
1630 17:53:48.309212 GENERIC: 0.0: enabled 1
1631 17:53:48.309302 I2C: 03:1a: enabled 1
1632 17:53:48.312368 I2C: 03:38: enabled 1
1633 17:53:48.315731 I2C: 03:39: enabled 1
1634 17:53:48.315821 I2C: 03:3a: enabled 1
1635 17:53:48.319019 I2C: 03:3b: enabled 1
1636 17:53:48.322358 PCI: 00:00.0: enabled 1
1637 17:53:48.322448 SPI: 00: enabled 1
1638 17:53:48.325716 SPI: 01: enabled 1
1639 17:53:48.328923 PNP: 0c09.0: enabled 1
1640 17:53:48.329014 USB2 port 0: enabled 1
1641 17:53:48.332262 USB2 port 1: enabled 1
1642 17:53:48.335794 USB2 port 2: enabled 0
1643 17:53:48.335885 USB2 port 3: enabled 0
1644 17:53:48.338963 USB2 port 5: enabled 0
1645 17:53:48.342141 USB2 port 6: enabled 1
1646 17:53:48.345393 USB2 port 9: enabled 1
1647 17:53:48.345484 USB3 port 0: enabled 1
1648 17:53:48.348688 USB3 port 1: enabled 1
1649 17:53:48.352109 USB3 port 2: enabled 1
1650 17:53:48.352200 USB3 port 3: enabled 1
1651 17:53:48.355362 USB3 port 4: enabled 0
1652 17:53:48.358516 APIC: 02: enabled 1
1653 17:53:48.358606 APIC: 01: enabled 1
1654 17:53:48.362093 APIC: 06: enabled 1
1655 17:53:48.365361 APIC: 03: enabled 1
1656 17:53:48.365451 APIC: 07: enabled 1
1657 17:53:48.368739 APIC: 05: enabled 1
1658 17:53:48.368830 APIC: 04: enabled 1
1659 17:53:48.372116 PCI: 00:08.0: enabled 1
1660 17:53:48.375035 PCI: 00:14.2: enabled 1
1661 17:53:48.378371 PCI: 01:00.0: enabled 1
1662 17:53:48.382113 Disabling ACPI via APMC:
1663 17:53:48.382204 done.
1664 17:53:48.388423 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 17:53:48.391790 ELOG: NV offset 0xaf0000 size 0x4000
1666 17:53:48.398347 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 17:53:48.404823 ELOG: Event(17) added with size 13 at 2023-10-09 17:53:27 UTC
1668 17:53:48.411808 ELOG: Event(92) added with size 9 at 2023-10-09 17:53:27 UTC
1669 17:53:48.418399 ELOG: Event(93) added with size 9 at 2023-10-09 17:53:27 UTC
1670 17:53:48.424957 ELOG: Event(9A) added with size 9 at 2023-10-09 17:53:27 UTC
1671 17:53:48.431503 ELOG: Event(9E) added with size 10 at 2023-10-09 17:53:27 UTC
1672 17:53:48.438084 ELOG: Event(9F) added with size 14 at 2023-10-09 17:53:27 UTC
1673 17:53:48.441531 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1674 17:53:48.448914 ELOG: Event(A1) added with size 10 at 2023-10-09 17:53:27 UTC
1675 17:53:48.458649 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 17:53:48.465273 ELOG: Event(A0) added with size 9 at 2023-10-09 17:53:27 UTC
1677 17:53:48.468774 elog_add_boot_reason: Logged dev mode boot
1678 17:53:48.468866 Finalize devices...
1679 17:53:48.471988 PCI: 00:17.0 final
1680 17:53:48.475373 Devices finalized
1681 17:53:48.478726 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 17:53:48.485643 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 17:53:48.488616 ME: HFSTS1 : 0x90000245
1684 17:53:48.491741 ME: HFSTS2 : 0x3B850126
1685 17:53:48.498147 ME: HFSTS3 : 0x00000020
1686 17:53:48.501696 ME: HFSTS4 : 0x00004800
1687 17:53:48.505088 ME: HFSTS5 : 0x00000000
1688 17:53:48.508631 ME: HFSTS6 : 0x40400006
1689 17:53:48.511740 ME: Manufacturing Mode : NO
1690 17:53:48.515012 ME: FW Partition Table : OK
1691 17:53:48.518269 ME: Bringup Loader Failure : NO
1692 17:53:48.521422 ME: Firmware Init Complete : YES
1693 17:53:48.524828 ME: Boot Options Present : NO
1694 17:53:48.527944 ME: Update In Progress : NO
1695 17:53:48.531625 ME: D0i3 Support : YES
1696 17:53:48.534980 ME: Low Power State Enabled : NO
1697 17:53:48.537996 ME: CPU Replaced : NO
1698 17:53:48.541411 ME: CPU Replacement Valid : YES
1699 17:53:48.544767 ME: Current Working State : 5
1700 17:53:48.548019 ME: Current Operation State : 1
1701 17:53:48.551114 ME: Current Operation Mode : 0
1702 17:53:48.554523 ME: Error Code : 0
1703 17:53:48.557769 ME: CPU Debug Disabled : YES
1704 17:53:48.561115 ME: TXT Support : NO
1705 17:53:48.567924 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 17:53:48.574137 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 17:53:48.574236 CBFS @ c08000 size 3f8000
1708 17:53:48.580823 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 17:53:48.584122 CBFS: Locating 'fallback/dsdt.aml'
1710 17:53:48.587648 CBFS: Found @ offset 10bb80 size 3fa5
1711 17:53:48.594131 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 17:53:48.597446 CBFS @ c08000 size 3f8000
1713 17:53:48.600664 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 17:53:48.603920 CBFS: Locating 'fallback/slic'
1715 17:53:48.609049 CBFS: 'fallback/slic' not found.
1716 17:53:48.615658 ACPI: Writing ACPI tables at 99b3e000.
1717 17:53:48.615750 ACPI: * FACS
1718 17:53:48.619255 ACPI: * DSDT
1719 17:53:48.622630 Ramoops buffer: 0x100000@0x99a3d000.
1720 17:53:48.625843 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 17:53:48.632512 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 17:53:48.635602 Google Chrome EC: version:
1723 17:53:48.639156 ro: helios_v2.0.2659-56403530b
1724 17:53:48.642543 rw: helios_v2.0.2849-c41de27e7d
1725 17:53:48.642633 running image: 1
1726 17:53:48.646314 ACPI: * FADT
1727 17:53:48.646405 SCI is IRQ9
1728 17:53:48.653352 ACPI: added table 1/32, length now 40
1729 17:53:48.653443 ACPI: * SSDT
1730 17:53:48.656657 Found 1 CPU(s) with 8 core(s) each.
1731 17:53:48.659836 Error: Could not locate 'wifi_sar' in VPD.
1732 17:53:48.666419 Checking CBFS for default SAR values
1733 17:53:48.669733 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 17:53:48.673115 CBFS @ c08000 size 3f8000
1735 17:53:48.679394 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 17:53:48.683144 CBFS: Locating 'wifi_sar_defaults.hex'
1737 17:53:48.686541 CBFS: Found @ offset 5fac0 size 77
1738 17:53:48.689462 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 17:53:48.695960 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 17:53:48.699497 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 17:53:48.706171 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 17:53:48.709237 failed to find key in VPD: dsm_calib_r0_0
1743 17:53:48.719477 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 17:53:48.722730 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 17:53:48.726022 failed to find key in VPD: dsm_calib_r0_1
1746 17:53:48.736143 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 17:53:48.742947 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 17:53:48.746218 failed to find key in VPD: dsm_calib_r0_2
1749 17:53:48.755970 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 17:53:48.759317 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 17:53:48.766058 failed to find key in VPD: dsm_calib_r0_3
1752 17:53:48.772745 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 17:53:48.778936 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 17:53:48.782682 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 17:53:48.785649 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 17:53:48.789525 EC returned error result code 1
1757 17:53:48.792976 EC returned error result code 1
1758 17:53:48.796912 EC returned error result code 1
1759 17:53:48.803557 PS2K: Bad resp from EC. Vivaldi disabled!
1760 17:53:48.807031 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 17:53:48.813588 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 17:53:48.820078 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 17:53:48.823694 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 17:53:48.830331 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 17:53:48.837024 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 17:53:48.843379 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 17:53:48.846619 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 17:53:48.853242 ACPI: added table 2/32, length now 44
1769 17:53:48.853334 ACPI: * MCFG
1770 17:53:48.856527 ACPI: added table 3/32, length now 48
1771 17:53:48.860142 ACPI: * TPM2
1772 17:53:48.862919 TPM2 log created at 99a2d000
1773 17:53:48.866322 ACPI: added table 4/32, length now 52
1774 17:53:48.866418 ACPI: * MADT
1775 17:53:48.869496 SCI is IRQ9
1776 17:53:48.872865 ACPI: added table 5/32, length now 56
1777 17:53:48.872957 current = 99b43ac0
1778 17:53:48.876607 ACPI: * DMAR
1779 17:53:48.879620 ACPI: added table 6/32, length now 60
1780 17:53:48.882906 ACPI: * IGD OpRegion
1781 17:53:48.882998 GMA: Found VBT in CBFS
1782 17:53:48.886501 GMA: Found valid VBT in CBFS
1783 17:53:48.889521 ACPI: added table 7/32, length now 64
1784 17:53:48.892985 ACPI: * HPET
1785 17:53:48.896138 ACPI: added table 8/32, length now 68
1786 17:53:48.896229 ACPI: done.
1787 17:53:48.899513 ACPI tables: 31744 bytes.
1788 17:53:48.902972 smbios_write_tables: 99a2c000
1789 17:53:48.906319 EC returned error result code 3
1790 17:53:48.909768 Couldn't obtain OEM name from CBI
1791 17:53:48.913414 Create SMBIOS type 17
1792 17:53:48.916688 PCI: 00:00.0 (Intel Cannonlake)
1793 17:53:48.919986 PCI: 00:14.3 (Intel WiFi)
1794 17:53:48.923386 SMBIOS tables: 939 bytes.
1795 17:53:48.926574 Writing table forward entry at 0x00000500
1796 17:53:48.933342 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 17:53:48.936329 Writing coreboot table at 0x99b62000
1798 17:53:48.942779 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 17:53:48.946526 1. 0000000000001000-000000000009ffff: RAM
1800 17:53:48.949525 2. 00000000000a0000-00000000000fffff: RESERVED
1801 17:53:48.956464 3. 0000000000100000-0000000099a2bfff: RAM
1802 17:53:48.959764 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 17:53:48.966061 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 17:53:48.972743 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 17:53:48.976005 7. 000000009a000000-000000009f7fffff: RESERVED
1806 17:53:48.982806 8. 00000000e0000000-00000000efffffff: RESERVED
1807 17:53:48.986043 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 17:53:48.989192 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 17:53:48.995892 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 17:53:48.999088 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 17:53:49.005743 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 17:53:49.009236 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 17:53:49.015780 15. 0000000100000000-000000045e7fffff: RAM
1814 17:53:49.019168 Graphics framebuffer located at 0xc0000000
1815 17:53:49.022459 Passing 5 GPIOs to payload:
1816 17:53:49.025655 NAME | PORT | POLARITY | VALUE
1817 17:53:49.032208 write protect | undefined | high | low
1818 17:53:49.035481 lid | undefined | high | high
1819 17:53:49.042167 power | undefined | high | low
1820 17:53:49.049141 oprom | undefined | high | low
1821 17:53:49.052528 EC in RW | 0x000000cb | high | low
1822 17:53:49.055823 Board ID: 4
1823 17:53:49.058941 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 17:53:49.061937 CBFS @ c08000 size 3f8000
1825 17:53:49.068662 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 17:53:49.072146 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 17:53:49.075262 coreboot table: 1492 bytes.
1828 17:53:49.078644 IMD ROOT 0. 99fff000 00001000
1829 17:53:49.081916 IMD SMALL 1. 99ffe000 00001000
1830 17:53:49.085289 FSP MEMORY 2. 99c4e000 003b0000
1831 17:53:49.088622 CONSOLE 3. 99c2e000 00020000
1832 17:53:49.091974 FMAP 4. 99c2d000 0000054e
1833 17:53:49.095388 TIME STAMP 5. 99c2c000 00000910
1834 17:53:49.098668 VBOOT WORK 6. 99c18000 00014000
1835 17:53:49.102054 MRC DATA 7. 99c16000 00001958
1836 17:53:49.105174 ROMSTG STCK 8. 99c15000 00001000
1837 17:53:49.108466 AFTER CAR 9. 99c0b000 0000a000
1838 17:53:49.111963 RAMSTAGE 10. 99baf000 0005c000
1839 17:53:49.115663 REFCODE 11. 99b7a000 00035000
1840 17:53:49.118540 SMM BACKUP 12. 99b6a000 00010000
1841 17:53:49.121850 COREBOOT 13. 99b62000 00008000
1842 17:53:49.125021 ACPI 14. 99b3e000 00024000
1843 17:53:49.128498 ACPI GNVS 15. 99b3d000 00001000
1844 17:53:49.131844 RAMOOPS 16. 99a3d000 00100000
1845 17:53:49.135155 TPM2 TCGLOG17. 99a2d000 00010000
1846 17:53:49.138501 SMBIOS 18. 99a2c000 00000800
1847 17:53:49.141711 IMD small region:
1848 17:53:49.144984 IMD ROOT 0. 99ffec00 00000400
1849 17:53:49.148732 FSP RUNTIME 1. 99ffebe0 00000004
1850 17:53:49.151895 EC HOSTEVENT 2. 99ffebc0 00000008
1851 17:53:49.155121 POWER STATE 3. 99ffeb80 00000040
1852 17:53:49.158500 ROMSTAGE 4. 99ffeb60 00000004
1853 17:53:49.161755 MEM INFO 5. 99ffe9a0 000001b9
1854 17:53:49.165155 VPD 6. 99ffe920 0000006c
1855 17:53:49.168583 MTRR: Physical address space:
1856 17:53:49.175023 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 17:53:49.181578 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 17:53:49.188013 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 17:53:49.194694 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 17:53:49.201363 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 17:53:49.207973 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 17:53:49.211246 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 17:53:49.218135 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 17:53:49.221232 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 17:53:49.224587 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 17:53:49.228011 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 17:53:49.234662 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 17:53:49.237741 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 17:53:49.241451 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 17:53:49.244473 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 17:53:49.251453 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 17:53:49.254278 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 17:53:49.258022 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 17:53:49.261046 call enable_fixed_mtrr()
1875 17:53:49.264451 CPU physical address size: 39 bits
1876 17:53:49.267749 MTRR: default type WB/UC MTRR counts: 6/8.
1877 17:53:49.271125 MTRR: WB selected as default type.
1878 17:53:49.277697 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 17:53:49.284570 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 17:53:49.290952 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 17:53:49.297340 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 17:53:49.304554 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 17:53:49.310640 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 17:53:49.314061 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 17:53:49.320644 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 17:53:49.323761 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 17:53:49.327376 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 17:53:49.330640 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 17:53:49.336591 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 17:53:49.340599 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 17:53:49.343940 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 17:53:49.347202 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 17:53:49.350860 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 17:53:49.357143 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 17:53:49.357239
1896 17:53:49.357335 MTRR check
1897 17:53:49.360480 call enable_fixed_mtrr()
1898 17:53:49.363769 Fixed MTRRs : Enabled
1899 17:53:49.363870 Variable MTRRs: Enabled
1900 17:53:49.363984
1901 17:53:49.370306 CPU physical address size: 39 bits
1902 17:53:49.373912 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1903 17:53:49.377261 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 17:53:49.383794 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 17:53:49.387003 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 17:53:49.390379 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 17:53:49.393644 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 17:53:49.399988 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 17:53:49.403290 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 17:53:49.406963 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 17:53:49.410296 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 17:53:49.416541 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 17:53:49.419884 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 17:53:49.423197 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 17:53:49.426549 call enable_fixed_mtrr()
1916 17:53:49.429887 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 17:53:49.433238 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 17:53:49.440106 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 17:53:49.442975 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 17:53:49.446268 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 17:53:49.449635 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 17:53:49.456423 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 17:53:49.459864 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 17:53:49.463114 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 17:53:49.466340 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 17:53:49.469588 CPU physical address size: 39 bits
1927 17:53:49.472986 call enable_fixed_mtrr()
1928 17:53:49.476491 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 17:53:49.482917 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 17:53:49.486322 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 17:53:49.489151 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 17:53:49.492860 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 17:53:49.499748 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 17:53:49.502522 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 17:53:49.505836 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 17:53:49.509110 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 17:53:49.515812 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 17:53:49.519018 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 17:53:49.522378 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 17:53:49.525785 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 17:53:49.532482 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 17:53:49.535836 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 17:53:49.539033 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 17:53:49.542548 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 17:53:49.549030 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 17:53:49.552310 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 17:53:49.555590 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 17:53:49.559088 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 17:53:49.565647 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 17:53:49.565743 call enable_fixed_mtrr()
1951 17:53:49.568659 call enable_fixed_mtrr()
1952 17:53:49.571707 CPU physical address size: 39 bits
1953 17:53:49.575748 CPU physical address size: 39 bits
1954 17:53:49.578853 CPU physical address size: 39 bits
1955 17:53:49.585502 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1956 17:53:49.588783 MTRR: Fixed MSR 0x250 0x0606060606060606
1957 17:53:49.592016 MTRR: Fixed MSR 0x258 0x0606060606060606
1958 17:53:49.598336 MTRR: Fixed MSR 0x259 0x0000000000000000
1959 17:53:49.601895 MTRR: Fixed MSR 0x268 0x0606060606060606
1960 17:53:49.605454 MTRR: Fixed MSR 0x269 0x0606060606060606
1961 17:53:49.608536 MTRR: Fixed MSR 0x26a 0x0606060606060606
1962 17:53:49.615412 MTRR: Fixed MSR 0x26b 0x0606060606060606
1963 17:53:49.618776 MTRR: Fixed MSR 0x26c 0x0606060606060606
1964 17:53:49.621902 MTRR: Fixed MSR 0x26d 0x0606060606060606
1965 17:53:49.624914 MTRR: Fixed MSR 0x26e 0x0606060606060606
1966 17:53:49.631584 MTRR: Fixed MSR 0x26f 0x0606060606060606
1967 17:53:49.634926 MTRR: Fixed MSR 0x250 0x0606060606060606
1968 17:53:49.638337 call enable_fixed_mtrr()
1969 17:53:49.641552 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 17:53:49.644936 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 17:53:49.647981 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 17:53:49.654739 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 17:53:49.658175 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 17:53:49.661496 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 17:53:49.664907 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 17:53:49.671019 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 17:53:49.674522 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 17:53:49.677883 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 17:53:49.680956 CPU physical address size: 39 bits
1980 17:53:49.684410 call enable_fixed_mtrr()
1981 17:53:49.687711 CBFS @ c08000 size 3f8000
1982 17:53:49.694567 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1983 17:53:49.697883 CBFS: Locating 'fallback/payload'
1984 17:53:49.701208 CPU physical address size: 39 bits
1985 17:53:49.704333 CBFS: Found @ offset 1c96c0 size 3f798
1986 17:53:49.707434 Checking segment from ROM address 0xffdd16f8
1987 17:53:49.714133 Checking segment from ROM address 0xffdd1714
1988 17:53:49.717319 Loading segment from ROM address 0xffdd16f8
1989 17:53:49.720853 code (compression=0)
1990 17:53:49.727309 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 17:53:49.737550 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 17:53:49.737647 it's not compressed!
1993 17:53:49.831076 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 17:53:49.837615 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 17:53:49.841108 Loading segment from ROM address 0xffdd1714
1996 17:53:49.844180 Entry Point 0x30000000
1997 17:53:49.847429 Loaded segments
1998 17:53:49.852848 Finalizing chipset.
1999 17:53:49.856387 Finalizing SMM.
2000 17:53:49.859781 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 17:53:49.862989 mp_park_aps done after 0 msecs.
2002 17:53:49.869561 Jumping to boot code at 30000000(99b62000)
2003 17:53:49.876213 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 17:53:49.876343
2005 17:53:49.876425
2006 17:53:49.876494
2007 17:53:49.879572 Starting depthcharge on Helios...
2008 17:53:49.879653
2009 17:53:49.880027 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 17:53:49.880140 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 17:53:49.880231 Setting prompt string to ['hatch:']
2012 17:53:49.880326 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 17:53:49.889672 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 17:53:49.889796
2015 17:53:49.895902 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 17:53:49.896040
2017 17:53:49.902474 board_setup: Info: eMMC controller not present; skipping
2018 17:53:49.902576
2019 17:53:49.905802 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 17:53:49.905897
2021 17:53:49.912444 board_setup: Info: SDHCI controller not present; skipping
2022 17:53:49.912543
2023 17:53:49.915851 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 17:53:49.919063
2025 17:53:49.919159 Wipe memory regions:
2026 17:53:49.919234
2027 17:53:49.922338 [0x00000000001000, 0x000000000a0000)
2028 17:53:49.922430
2029 17:53:49.925711 [0x00000000100000, 0x00000030000000)
2030 17:53:49.991916
2031 17:53:49.995125 [0x00000030657430, 0x00000099a2c000)
2032 17:53:50.141937
2033 17:53:50.145152 [0x00000100000000, 0x0000045e800000)
2034 17:53:51.601488
2035 17:53:51.601653 R8152: Initializing
2036 17:53:51.601729
2037 17:53:51.604668 Version 9 (ocp_data = 6010)
2038 17:53:51.608872
2039 17:53:51.608965 R8152: Done initializing
2040 17:53:51.609038
2041 17:53:51.611802 Adding net device
2042 17:53:52.094931
2043 17:53:52.095100 R8152: Initializing
2044 17:53:52.095178
2045 17:53:52.098327 Version 6 (ocp_data = 5c30)
2046 17:53:52.098430
2047 17:53:52.101320 R8152: Done initializing
2048 17:53:52.101426
2049 17:53:52.104954 net_add_device: Attemp to include the same device
2050 17:53:52.108196
2051 17:53:52.115711 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 17:53:52.115823
2053 17:53:52.115896
2054 17:53:52.115964
2055 17:53:52.116278 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 17:53:52.216680 hatch: tftpboot 192.168.201.1 11712702/tftp-deploy-1v70440t/kernel/bzImage 11712702/tftp-deploy-1v70440t/kernel/cmdline 11712702/tftp-deploy-1v70440t/ramdisk/ramdisk.cpio.gz
2058 17:53:52.216879 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 17:53:52.216975 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 17:53:52.221192 tftpboot 192.168.201.1 11712702/tftp-deploy-1v70440t/kernel/bzImloy-1v70440t/kernel/cmdline 11712702/tftp-deploy-1v70440t/ramdisk/ramdisk.cpio.gz
2061 17:53:52.221295
2062 17:53:52.221370 Waiting for link
2063 17:53:52.422432
2064 17:53:52.422592 done.
2065 17:53:52.422668
2066 17:53:52.422739 MAC: 00:24:32:50:1a:59
2067 17:53:52.422807
2068 17:53:52.425225 Sending DHCP discover... done.
2069 17:53:52.425319
2070 17:53:52.428922 Waiting for reply... done.
2071 17:53:52.429014
2072 17:53:52.432285 Sending DHCP request... done.
2073 17:53:52.432379
2074 17:53:52.439460 Waiting for reply... done.
2075 17:53:52.439555
2076 17:53:52.439641 My ip is 192.168.201.14
2077 17:53:52.439712
2078 17:53:52.442765 The DHCP server ip is 192.168.201.1
2079 17:53:52.446072
2080 17:53:52.449792 TFTP server IP predefined by user: 192.168.201.1
2081 17:53:52.449885
2082 17:53:52.456242 Bootfile predefined by user: 11712702/tftp-deploy-1v70440t/kernel/bzImage
2083 17:53:52.456336
2084 17:53:52.459616 Sending tftp read request... done.
2085 17:53:52.459708
2086 17:53:52.465905 Waiting for the transfer...
2087 17:53:52.466001
2088 17:53:52.996365 00000000 ################################################################
2089 17:53:52.996529
2090 17:53:53.535349 00080000 ################################################################
2091 17:53:53.535509
2092 17:53:54.070902 00100000 ################################################################
2093 17:53:54.071063
2094 17:53:54.610512 00180000 ################################################################
2095 17:53:54.610674
2096 17:53:55.156038 00200000 ################################################################
2097 17:53:55.156198
2098 17:53:55.729770 00280000 ################################################################
2099 17:53:55.729936
2100 17:53:56.279175 00300000 ################################################################
2101 17:53:56.279344
2102 17:53:56.822538 00380000 ################################################################
2103 17:53:56.822705
2104 17:53:57.395552 00400000 ################################################################
2105 17:53:57.395721
2106 17:53:57.949892 00480000 ################################################################
2107 17:53:57.950064
2108 17:53:58.480253 00500000 ################################################################
2109 17:53:58.480420
2110 17:53:59.030306 00580000 ################################################################
2111 17:53:59.030483
2112 17:53:59.584500 00600000 ################################################################
2113 17:53:59.584673
2114 17:54:00.112489 00680000 ################################################################
2115 17:54:00.112658
2116 17:54:00.637966 00700000 ################################################################
2117 17:54:00.638139
2118 17:54:01.176821 00780000 ################################################################
2119 17:54:01.176991
2120 17:54:01.278305 00800000 ############# done.
2121 17:54:01.278471
2122 17:54:01.281660 The bootfile was 8490896 bytes long.
2123 17:54:01.281757
2124 17:54:01.284921 Sending tftp read request... done.
2125 17:54:01.285024
2126 17:54:01.288143 Waiting for the transfer...
2127 17:54:01.288269
2128 17:54:01.869897 00000000 ################################################################
2129 17:54:01.870067
2130 17:54:02.453460 00080000 ################################################################
2131 17:54:02.453621
2132 17:54:03.042641 00100000 ################################################################
2133 17:54:03.042789
2134 17:54:03.622369 00180000 ################################################################
2135 17:54:03.622538
2136 17:54:04.192504 00200000 ################################################################
2137 17:54:04.192668
2138 17:54:04.768163 00280000 ################################################################
2139 17:54:04.768320
2140 17:54:05.342814 00300000 ################################################################
2141 17:54:05.342981
2142 17:54:05.880632 00380000 ################################################################
2143 17:54:05.880794
2144 17:54:06.405820 00400000 ################################################################
2145 17:54:06.405983
2146 17:54:06.959471 00480000 ################################################################
2147 17:54:06.959642
2148 17:54:07.509674 00500000 ############################################################### done.
2149 17:54:07.509845
2150 17:54:07.512975 Sending tftp read request... done.
2151 17:54:07.513069
2152 17:54:07.516295 Waiting for the transfer...
2153 17:54:07.516386
2154 17:54:07.516458 00000000 # done.
2155 17:54:07.516526
2156 17:54:07.526193 Command line loaded dynamically from TFTP file: 11712702/tftp-deploy-1v70440t/kernel/cmdline
2157 17:54:07.526289
2158 17:54:07.555644 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11712702/extract-nfsrootfs-8o0u2gdf,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2159 17:54:07.555796
2160 17:54:07.558773 ec_init(0): CrosEC protocol v3 supported (256, 256)
2161 17:54:07.564956
2162 17:54:07.568194 Shutting down all USB controllers.
2163 17:54:07.568288
2164 17:54:07.568384 Removing current net device
2165 17:54:07.572550
2166 17:54:07.572673 Finalizing coreboot
2167 17:54:07.572770
2168 17:54:07.578738 Exiting depthcharge with code 4 at timestamp: 25024286
2169 17:54:07.578854
2170 17:54:07.578962
2171 17:54:07.579067 Starting kernel ...
2172 17:54:07.579173
2173 17:54:07.579279
2174 17:54:07.579806 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2175 17:54:07.579973 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2176 17:54:07.580114 Setting prompt string to ['Linux version [0-9]']
2177 17:54:07.580238 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2178 17:54:07.580364 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2180 17:58:31.580212 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2182 17:58:31.580466 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2184 17:58:31.580662 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2187 17:58:31.580975 end: 2 depthcharge-action (duration 00:05:00) [common]
2189 17:58:31.581247 Cleaning after the job
2190 17:58:31.581354 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712702/tftp-deploy-1v70440t/ramdisk
2191 17:58:31.582466 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712702/tftp-deploy-1v70440t/kernel
2192 17:58:31.584119 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712702/tftp-deploy-1v70440t/nfsrootfs
2193 17:58:31.669821 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712702/tftp-deploy-1v70440t/modules
2194 17:58:31.670371 start: 5.1 power-off (timeout 00:00:30) [common]
2195 17:58:31.670623 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2196 17:58:31.750612 >> Command sent successfully.
2197 17:58:31.756178 Returned 0 in 0 seconds
2198 17:58:31.857167 end: 5.1 power-off (duration 00:00:00) [common]
2200 17:58:31.858599 start: 5.2 read-feedback (timeout 00:10:00) [common]
2201 17:58:31.860102 Listened to connection for namespace 'common' for up to 1s
2203 17:58:31.861715 Listened to connection for namespace 'common' for up to 1s
2204 17:58:32.860243 Finalising connection for namespace 'common'
2205 17:58:32.860871 Disconnecting from shell: Finalise
2206 17:58:32.861238
2207 17:58:32.962051 end: 5.2 read-feedback (duration 00:00:01) [common]
2208 17:58:32.962422 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712702
2209 17:58:33.333088 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712702
2210 17:58:33.333293 JobError: Your job cannot terminate cleanly.