Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:58:54.656016 lava-dispatcher, installed at version: 2023.08
2 17:58:54.656226 start: 0 validate
3 17:58:54.656363 Start time: 2023-10-09 17:58:54.656355+00:00 (UTC)
4 17:58:54.656489 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:58:54.656615 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 17:58:54.919441 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:58:54.920114 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:58:55.191478 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:58:55.192141 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:58:55.461978 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:58:55.462808 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:58:55.731345 validate duration: 1.08
14 17:58:55.732762 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:58:55.733433 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:58:55.734138 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:58:55.734842 Not decompressing ramdisk as can be used compressed.
18 17:58:55.735351 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 17:58:55.735720 saving as /var/lib/lava/dispatcher/tmp/11712707/tftp-deploy-2pkod5nn/ramdisk/initrd.cpio.gz
20 17:58:55.736085 total size: 5432690 (5 MB)
21 17:58:55.741292 progress 0 % (0 MB)
22 17:58:55.750298 progress 5 % (0 MB)
23 17:58:55.757690 progress 10 % (0 MB)
24 17:58:55.762905 progress 15 % (0 MB)
25 17:58:55.767315 progress 20 % (1 MB)
26 17:58:55.770623 progress 25 % (1 MB)
27 17:58:55.773621 progress 30 % (1 MB)
28 17:58:55.776533 progress 35 % (1 MB)
29 17:58:55.778973 progress 40 % (2 MB)
30 17:58:55.781187 progress 45 % (2 MB)
31 17:58:55.783381 progress 50 % (2 MB)
32 17:58:55.785542 progress 55 % (2 MB)
33 17:58:55.787489 progress 60 % (3 MB)
34 17:58:55.789278 progress 65 % (3 MB)
35 17:58:55.791231 progress 70 % (3 MB)
36 17:58:55.792957 progress 75 % (3 MB)
37 17:58:55.794531 progress 80 % (4 MB)
38 17:58:55.796089 progress 85 % (4 MB)
39 17:58:55.797825 progress 90 % (4 MB)
40 17:58:55.799303 progress 95 % (4 MB)
41 17:58:55.800752 progress 100 % (5 MB)
42 17:58:55.800967 5 MB downloaded in 0.06 s (79.82 MB/s)
43 17:58:55.801129 end: 1.1.1 http-download (duration 00:00:00) [common]
45 17:58:55.801377 end: 1.1 download-retry (duration 00:00:00) [common]
46 17:58:55.801468 start: 1.2 download-retry (timeout 00:10:00) [common]
47 17:58:55.801555 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 17:58:55.801698 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 17:58:55.801772 saving as /var/lib/lava/dispatcher/tmp/11712707/tftp-deploy-2pkod5nn/kernel/bzImage
50 17:58:55.801834 total size: 8490896 (8 MB)
51 17:58:55.801896 No compression specified
52 17:58:55.803042 progress 0 % (0 MB)
53 17:58:55.805214 progress 5 % (0 MB)
54 17:58:55.807624 progress 10 % (0 MB)
55 17:58:55.809883 progress 15 % (1 MB)
56 17:58:55.812179 progress 20 % (1 MB)
57 17:58:55.814485 progress 25 % (2 MB)
58 17:58:55.816795 progress 30 % (2 MB)
59 17:58:55.819152 progress 35 % (2 MB)
60 17:58:55.821547 progress 40 % (3 MB)
61 17:58:55.823843 progress 45 % (3 MB)
62 17:58:55.826105 progress 50 % (4 MB)
63 17:58:55.828381 progress 55 % (4 MB)
64 17:58:55.830646 progress 60 % (4 MB)
65 17:58:55.832858 progress 65 % (5 MB)
66 17:58:55.835148 progress 70 % (5 MB)
67 17:58:55.837365 progress 75 % (6 MB)
68 17:58:55.839702 progress 80 % (6 MB)
69 17:58:55.841913 progress 85 % (6 MB)
70 17:58:55.844213 progress 90 % (7 MB)
71 17:58:55.846435 progress 95 % (7 MB)
72 17:58:55.848705 progress 100 % (8 MB)
73 17:58:55.848821 8 MB downloaded in 0.05 s (172.35 MB/s)
74 17:58:55.848966 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:58:55.849195 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:58:55.849280 start: 1.3 download-retry (timeout 00:10:00) [common]
78 17:58:55.849370 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 17:58:55.849513 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 17:58:55.849581 saving as /var/lib/lava/dispatcher/tmp/11712707/tftp-deploy-2pkod5nn/nfsrootfs/full.rootfs.tar
81 17:58:55.849642 total size: 133380384 (127 MB)
82 17:58:55.849704 Using unxz to decompress xz
83 17:58:55.853955 progress 0 % (0 MB)
84 17:58:56.201029 progress 5 % (6 MB)
85 17:58:56.561024 progress 10 % (12 MB)
86 17:58:56.856358 progress 15 % (19 MB)
87 17:58:57.043372 progress 20 % (25 MB)
88 17:58:57.285506 progress 25 % (31 MB)
89 17:58:57.631053 progress 30 % (38 MB)
90 17:58:57.975332 progress 35 % (44 MB)
91 17:58:58.379055 progress 40 % (50 MB)
92 17:58:58.767055 progress 45 % (57 MB)
93 17:58:59.131087 progress 50 % (63 MB)
94 17:58:59.509404 progress 55 % (69 MB)
95 17:58:59.870911 progress 60 % (76 MB)
96 17:59:00.233959 progress 65 % (82 MB)
97 17:59:00.597812 progress 70 % (89 MB)
98 17:59:00.963051 progress 75 % (95 MB)
99 17:59:01.399548 progress 80 % (101 MB)
100 17:59:01.831462 progress 85 % (108 MB)
101 17:59:02.098364 progress 90 % (114 MB)
102 17:59:02.442262 progress 95 % (120 MB)
103 17:59:02.831977 progress 100 % (127 MB)
104 17:59:02.837303 127 MB downloaded in 6.99 s (18.20 MB/s)
105 17:59:02.837567 end: 1.3.1 http-download (duration 00:00:07) [common]
107 17:59:02.837827 end: 1.3 download-retry (duration 00:00:07) [common]
108 17:59:02.837917 start: 1.4 download-retry (timeout 00:09:53) [common]
109 17:59:02.838068 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 17:59:02.838223 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 17:59:02.838298 saving as /var/lib/lava/dispatcher/tmp/11712707/tftp-deploy-2pkod5nn/modules/modules.tar
112 17:59:02.838359 total size: 250868 (0 MB)
113 17:59:02.838419 Using unxz to decompress xz
114 17:59:02.842556 progress 13 % (0 MB)
115 17:59:02.843003 progress 26 % (0 MB)
116 17:59:02.843272 progress 39 % (0 MB)
117 17:59:02.844801 progress 52 % (0 MB)
118 17:59:02.846748 progress 65 % (0 MB)
119 17:59:02.848600 progress 78 % (0 MB)
120 17:59:02.850453 progress 91 % (0 MB)
121 17:59:02.852202 progress 100 % (0 MB)
122 17:59:02.857723 0 MB downloaded in 0.02 s (12.36 MB/s)
123 17:59:02.857969 end: 1.4.1 http-download (duration 00:00:00) [common]
125 17:59:02.858229 end: 1.4 download-retry (duration 00:00:00) [common]
126 17:59:02.858320 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 17:59:02.858418 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 17:59:05.151407 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11712707/extract-nfsrootfs-bi1japna
129 17:59:05.151652 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 17:59:05.151795 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 17:59:05.152027 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez
132 17:59:05.152224 makedir: /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin
133 17:59:05.152373 makedir: /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/tests
134 17:59:05.152528 makedir: /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/results
135 17:59:05.152678 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-add-keys
136 17:59:05.152891 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-add-sources
137 17:59:05.153087 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-background-process-start
138 17:59:05.153261 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-background-process-stop
139 17:59:05.153425 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-common-functions
140 17:59:05.153595 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-echo-ipv4
141 17:59:05.153731 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-install-packages
142 17:59:05.153862 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-installed-packages
143 17:59:05.154023 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-os-build
144 17:59:05.154183 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-probe-channel
145 17:59:05.154346 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-probe-ip
146 17:59:05.154504 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-target-ip
147 17:59:05.154700 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-target-mac
148 17:59:05.154863 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-target-storage
149 17:59:05.155029 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-test-case
150 17:59:05.155191 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-test-event
151 17:59:05.155352 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-test-feedback
152 17:59:05.155513 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-test-raise
153 17:59:05.155713 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-test-reference
154 17:59:05.155875 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-test-runner
155 17:59:05.156036 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-test-set
156 17:59:05.156206 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-test-shell
157 17:59:05.156369 Updating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-install-packages (oe)
158 17:59:05.156560 Updating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/bin/lava-installed-packages (oe)
159 17:59:05.156717 Creating /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/environment
160 17:59:05.156842 LAVA metadata
161 17:59:05.156940 - LAVA_JOB_ID=11712707
162 17:59:05.157035 - LAVA_DISPATCHER_IP=192.168.201.1
163 17:59:05.157170 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 17:59:05.157267 skipped lava-vland-overlay
165 17:59:05.157375 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 17:59:05.157488 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 17:59:05.157577 skipped lava-multinode-overlay
168 17:59:05.157680 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 17:59:05.157799 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 17:59:05.157908 Loading test definitions
171 17:59:05.158034 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 17:59:05.158134 Using /lava-11712707 at stage 0
173 17:59:05.158614 uuid=11712707_1.5.2.3.1 testdef=None
174 17:59:05.158737 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 17:59:05.158852 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 17:59:05.159588 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 17:59:05.159945 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 17:59:05.160945 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 17:59:05.161307 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 17:59:05.162195 runner path: /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/0/tests/0_dmesg test_uuid 11712707_1.5.2.3.1
183 17:59:05.162392 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 17:59:05.162692 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 17:59:05.162763 Using /lava-11712707 at stage 1
187 17:59:05.163078 uuid=11712707_1.5.2.3.5 testdef=None
188 17:59:05.163166 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 17:59:05.163250 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 17:59:05.163930 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 17:59:05.164275 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 17:59:05.165216 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 17:59:05.165581 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 17:59:05.166709 runner path: /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/1/tests/1_bootrr test_uuid 11712707_1.5.2.3.5
197 17:59:05.166915 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 17:59:05.167248 Creating lava-test-runner.conf files
200 17:59:05.167385 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/0 for stage 0
201 17:59:05.167509 - 0_dmesg
202 17:59:05.167615 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712707/lava-overlay-g5l8lvez/lava-11712707/1 for stage 1
203 17:59:05.167709 - 1_bootrr
204 17:59:05.167804 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 17:59:05.167890 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 17:59:05.177072 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 17:59:05.177206 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 17:59:05.177322 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 17:59:05.177440 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 17:59:05.177555 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 17:59:05.319133 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 17:59:05.319522 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 17:59:05.319639 extracting modules file /var/lib/lava/dispatcher/tmp/11712707/tftp-deploy-2pkod5nn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712707/extract-nfsrootfs-bi1japna
214 17:59:05.333552 extracting modules file /var/lib/lava/dispatcher/tmp/11712707/tftp-deploy-2pkod5nn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712707/extract-overlay-ramdisk-h1lv2qux/ramdisk
215 17:59:05.346933 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 17:59:05.347058 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 17:59:05.347148 [common] Applying overlay to NFS
218 17:59:05.347220 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712707/compress-overlay-83aronj1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712707/extract-nfsrootfs-bi1japna
219 17:59:05.355502 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 17:59:05.355613 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 17:59:05.355700 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 17:59:05.355784 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 17:59:05.355862 Building ramdisk /var/lib/lava/dispatcher/tmp/11712707/extract-overlay-ramdisk-h1lv2qux/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712707/extract-overlay-ramdisk-h1lv2qux/ramdisk
224 17:59:05.426937 >> 26159 blocks
225 17:59:05.971594 rename /var/lib/lava/dispatcher/tmp/11712707/extract-overlay-ramdisk-h1lv2qux/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712707/tftp-deploy-2pkod5nn/ramdisk/ramdisk.cpio.gz
226 17:59:05.972060 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 17:59:05.972186 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 17:59:05.972284 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 17:59:05.972382 No mkimage arch provided, not using FIT.
230 17:59:05.972472 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 17:59:05.972558 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 17:59:05.972663 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 17:59:05.972753 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 17:59:05.972833 No LXC device requested
235 17:59:05.972910 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 17:59:05.972998 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 17:59:05.973076 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 17:59:05.973148 Checking files for TFTP limit of 4294967296 bytes.
239 17:59:05.973557 end: 1 tftp-deploy (duration 00:00:10) [common]
240 17:59:05.973661 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 17:59:05.973753 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 17:59:05.973877 substitutions:
243 17:59:05.973942 - {DTB}: None
244 17:59:05.974001 - {INITRD}: 11712707/tftp-deploy-2pkod5nn/ramdisk/ramdisk.cpio.gz
245 17:59:05.974059 - {KERNEL}: 11712707/tftp-deploy-2pkod5nn/kernel/bzImage
246 17:59:05.974116 - {LAVA_MAC}: None
247 17:59:05.974171 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11712707/extract-nfsrootfs-bi1japna
248 17:59:05.974226 - {NFS_SERVER_IP}: 192.168.201.1
249 17:59:05.974279 - {PRESEED_CONFIG}: None
250 17:59:05.974333 - {PRESEED_LOCAL}: None
251 17:59:05.974386 - {RAMDISK}: 11712707/tftp-deploy-2pkod5nn/ramdisk/ramdisk.cpio.gz
252 17:59:05.974438 - {ROOT_PART}: None
253 17:59:05.974491 - {ROOT}: None
254 17:59:05.974589 - {SERVER_IP}: 192.168.201.1
255 17:59:05.974643 - {TEE}: None
256 17:59:05.974695 Parsed boot commands:
257 17:59:05.974747 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 17:59:05.974921 Parsed boot commands: tftpboot 192.168.201.1 11712707/tftp-deploy-2pkod5nn/kernel/bzImage 11712707/tftp-deploy-2pkod5nn/kernel/cmdline 11712707/tftp-deploy-2pkod5nn/ramdisk/ramdisk.cpio.gz
259 17:59:05.975008 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 17:59:05.975092 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 17:59:05.975182 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 17:59:05.975267 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 17:59:05.975336 Not connected, no need to disconnect.
264 17:59:05.975410 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 17:59:05.975491 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 17:59:05.975558 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-9'
267 17:59:05.979570 Setting prompt string to ['lava-test: # ']
268 17:59:05.979991 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 17:59:05.980099 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 17:59:05.980191 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 17:59:05.980281 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 17:59:05.980474 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
273 17:59:11.112794 >> Command sent successfully.
274 17:59:11.115340 Returned 0 in 5 seconds
275 17:59:11.215757 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 17:59:11.216094 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 17:59:11.216192 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 17:59:11.216278 Setting prompt string to 'Starting depthcharge on Voema...'
280 17:59:11.216348 Changing prompt to 'Starting depthcharge on Voema...'
281 17:59:11.216417 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 17:59:11.216683 [Enter `^Ec?' for help]
283 17:59:12.782741
284 17:59:12.783309
285 17:59:12.792513 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 17:59:12.799254 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 17:59:12.802677 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 17:59:12.805690 CPU: AES supported, TXT NOT supported, VT supported
289 17:59:12.812334 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 17:59:12.819164 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 17:59:12.822143 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 17:59:12.825436 VBOOT: Loading verstage.
293 17:59:12.832235 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 17:59:12.835398 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 17:59:12.842059 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 17:59:12.848758 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 17:59:12.855157 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 17:59:12.858291
299 17:59:12.858376
300 17:59:12.868273 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 17:59:12.882680 Probing TPM: . done!
302 17:59:12.885748 TPM ready after 0 ms
303 17:59:12.889405 Connected to device vid:did:rid of 1ae0:0028:00
304 17:59:12.900773 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
305 17:59:12.907480 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 17:59:12.910564 Initialized TPM device CR50 revision 0
307 17:59:12.962177 tlcl_send_startup: Startup return code is 0
308 17:59:12.962310 TPM: setup succeeded
309 17:59:12.978022 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 17:59:12.992954 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 17:59:13.006841 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 17:59:13.017062 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 17:59:13.020717 Chrome EC: UHEPI supported
314 17:59:13.023998 Phase 1
315 17:59:13.027357 FMAP: area GBB found @ 1805000 (458752 bytes)
316 17:59:13.037448 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 17:59:13.043725 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 17:59:13.051043 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 17:59:13.057097 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 17:59:13.060626 Recovery requested (1009000e)
321 17:59:13.063889 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 17:59:13.075501 tlcl_extend: response is 0
323 17:59:13.082498 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 17:59:13.092259 tlcl_extend: response is 0
325 17:59:13.099361 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 17:59:13.105669 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 17:59:13.112397 BS: verstage times (exec / console): total (unknown) / 142 ms
328 17:59:13.112997
329 17:59:13.113501
330 17:59:13.125420 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 17:59:13.132175 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 17:59:13.135345 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 17:59:13.138879 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 17:59:13.145562 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 17:59:13.148905 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 17:59:13.152303 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 17:59:13.155544 TCO_STS: 0000 0000
338 17:59:13.158909 GEN_PMCON: d0015038 00002200
339 17:59:13.161764 GBLRST_CAUSE: 00000000 00000000
340 17:59:13.162374 HPR_CAUSE0: 00000000
341 17:59:13.165521 prev_sleep_state 5
342 17:59:13.168578 Boot Count incremented to 23480
343 17:59:13.175376 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 17:59:13.181623 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 17:59:13.191943 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 17:59:13.198343 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 17:59:13.201789 Chrome EC: UHEPI supported
348 17:59:13.208162 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 17:59:13.219005 Probing TPM: done!
350 17:59:13.227319 Connected to device vid:did:rid of 1ae0:0028:00
351 17:59:13.237406 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
352 17:59:13.244411 Initialized TPM device CR50 revision 0
353 17:59:13.257510 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 17:59:13.261123 MRC: Hash idx 0x100b comparison successful.
355 17:59:13.264557 MRC cache found, size faa8
356 17:59:13.264996 bootmode is set to: 2
357 17:59:13.267658 SPD index = 0
358 17:59:13.274374 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 17:59:13.277717 SPD: module type is LPDDR4X
360 17:59:13.281126 SPD: module part number is MT53E512M64D4NW-046
361 17:59:13.287350 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 17:59:13.294009 SPD: device width 16 bits, bus width 16 bits
363 17:59:13.297205 SPD: module size is 1024 MB (per channel)
364 17:59:13.730745 CBMEM:
365 17:59:13.733655 IMD: root @ 0x76fff000 254 entries.
366 17:59:13.737348 IMD: root @ 0x76ffec00 62 entries.
367 17:59:13.740470 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 17:59:13.746861 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 17:59:13.750501 External stage cache:
370 17:59:13.753900 IMD: root @ 0x7b3ff000 254 entries.
371 17:59:13.756947 IMD: root @ 0x7b3fec00 62 entries.
372 17:59:13.772590 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 17:59:13.779263 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 17:59:13.785811 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 17:59:13.799839 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 17:59:13.803556 cse_lite: Skip switching to RW in the recovery path
377 17:59:13.807555 8 DIMMs found
378 17:59:13.808067 SMM Memory Map
379 17:59:13.810417 SMRAM : 0x7b000000 0x800000
380 17:59:13.813580 Subregion 0: 0x7b000000 0x200000
381 17:59:13.817523 Subregion 1: 0x7b200000 0x200000
382 17:59:13.820672 Subregion 2: 0x7b400000 0x400000
383 17:59:13.823926 top_of_ram = 0x77000000
384 17:59:13.830360 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 17:59:13.833890 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 17:59:13.840070 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 17:59:13.843741 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 17:59:13.853640 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 17:59:13.860467 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 17:59:13.869918 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 17:59:13.873162 Processing 211 relocs. Offset value of 0x74c0b000
392 17:59:13.883035 BS: romstage times (exec / console): total (unknown) / 277 ms
393 17:59:13.888839
394 17:59:13.889260
395 17:59:13.898999 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 17:59:13.901919 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 17:59:13.911772 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 17:59:13.918142 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 17:59:13.925223 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 17:59:13.931224 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 17:59:13.978715 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 17:59:13.985803 Processing 5008 relocs. Offset value of 0x75d98000
403 17:59:13.988987 BS: postcar times (exec / console): total (unknown) / 59 ms
404 17:59:13.991975
405 17:59:13.992395
406 17:59:14.002512 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 17:59:14.003006 Normal boot
408 17:59:14.006028 FW_CONFIG value is 0x804c02
409 17:59:14.009057 PCI: 00:07.0 disabled by fw_config
410 17:59:14.012329 PCI: 00:07.1 disabled by fw_config
411 17:59:14.015910 PCI: 00:0d.2 disabled by fw_config
412 17:59:14.019026 PCI: 00:1c.7 disabled by fw_config
413 17:59:14.025333 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 17:59:14.032198 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 17:59:14.035286 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 17:59:14.038288 GENERIC: 0.0 disabled by fw_config
417 17:59:14.041913 GENERIC: 1.0 disabled by fw_config
418 17:59:14.048554 fw_config match found: DB_USB=USB3_ACTIVE
419 17:59:14.051881 fw_config match found: DB_USB=USB3_ACTIVE
420 17:59:14.055106 fw_config match found: DB_USB=USB3_ACTIVE
421 17:59:14.061828 fw_config match found: DB_USB=USB3_ACTIVE
422 17:59:14.064874 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 17:59:14.071616 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 17:59:14.081691 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 17:59:14.088773 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 17:59:14.091877 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 17:59:14.098421 microcode: Update skipped, already up-to-date
428 17:59:14.105252 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 17:59:14.131873 Detected 4 core, 8 thread CPU.
430 17:59:14.135321 Setting up SMI for CPU
431 17:59:14.138481 IED base = 0x7b400000
432 17:59:14.142178 IED size = 0x00400000
433 17:59:14.142347 Will perform SMM setup.
434 17:59:14.148439 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 17:59:14.155544 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 17:59:14.161891 Processing 16 relocs. Offset value of 0x00030000
437 17:59:14.165371 Attempting to start 7 APs
438 17:59:14.168507 Waiting for 10ms after sending INIT.
439 17:59:14.184654 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 17:59:14.184942 done.
441 17:59:14.187874 AP: slot 4 apic_id 6.
442 17:59:14.190770 AP: slot 5 apic_id 7.
443 17:59:14.191073 AP: slot 2 apic_id 3.
444 17:59:14.194492 AP: slot 6 apic_id 2.
445 17:59:14.197583 AP: slot 3 apic_id 5.
446 17:59:14.200881 Waiting for 2nd SIPI to complete...done.
447 17:59:14.204613 AP: slot 7 apic_id 4.
448 17:59:14.211304 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 17:59:14.217785 Processing 13 relocs. Offset value of 0x00038000
450 17:59:14.220810 Unable to locate Global NVS
451 17:59:14.228011 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 17:59:14.231081 Installing permanent SMM handler to 0x7b000000
453 17:59:14.241024 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 17:59:14.244424 Processing 794 relocs. Offset value of 0x7b010000
455 17:59:14.254068 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 17:59:14.257369 Processing 13 relocs. Offset value of 0x7b008000
457 17:59:14.263973 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 17:59:14.270840 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 17:59:14.273619 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 17:59:14.280494 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 17:59:14.287163 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 17:59:14.293876 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 17:59:14.300150 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 17:59:14.303810 Unable to locate Global NVS
465 17:59:14.310181 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 17:59:14.313845 Clearing SMI status registers
467 17:59:14.316762 SMI_STS: PM1
468 17:59:14.317183 PM1_STS: PWRBTN
469 17:59:14.323558 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 17:59:14.326594 In relocation handler: CPU 0
471 17:59:14.330190 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 17:59:14.336522 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 17:59:14.339672 Relocation complete.
474 17:59:14.346435 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 17:59:14.349815 In relocation handler: CPU 1
476 17:59:14.353423 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 17:59:14.353859 Relocation complete.
478 17:59:14.363563 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
479 17:59:14.366774 In relocation handler: CPU 6
480 17:59:14.370212 New SMBASE=0x7affe800 IEDBASE=0x7b400000
481 17:59:14.373686 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 17:59:14.377258 Relocation complete.
483 17:59:14.383360 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
484 17:59:14.386785 In relocation handler: CPU 2
485 17:59:14.390115 New SMBASE=0x7afff800 IEDBASE=0x7b400000
486 17:59:14.392985 Relocation complete.
487 17:59:14.399558 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
488 17:59:14.402783 In relocation handler: CPU 5
489 17:59:14.406613 New SMBASE=0x7affec00 IEDBASE=0x7b400000
490 17:59:14.409558 Relocation complete.
491 17:59:14.416474 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
492 17:59:14.419719 In relocation handler: CPU 4
493 17:59:14.422879 New SMBASE=0x7afff000 IEDBASE=0x7b400000
494 17:59:14.429875 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 17:59:14.430398 Relocation complete.
496 17:59:14.439607 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
497 17:59:14.440127 In relocation handler: CPU 3
498 17:59:14.445829 New SMBASE=0x7afff400 IEDBASE=0x7b400000
499 17:59:14.446364 Relocation complete.
500 17:59:14.456219 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
501 17:59:14.456753 In relocation handler: CPU 7
502 17:59:14.462612 New SMBASE=0x7affe400 IEDBASE=0x7b400000
503 17:59:14.465940 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 17:59:14.469067 Relocation complete.
505 17:59:14.469515 Initializing CPU #0
506 17:59:14.473044 CPU: vendor Intel device 806c1
507 17:59:14.476796 CPU: family 06, model 8c, stepping 01
508 17:59:14.479945 Clearing out pending MCEs
509 17:59:14.483155 Setting up local APIC...
510 17:59:14.486712 apic_id: 0x00 done.
511 17:59:14.487298 Turbo is available but hidden
512 17:59:14.490282 Turbo is available and visible
513 17:59:14.496525 microcode: Update skipped, already up-to-date
514 17:59:14.499538 CPU #0 initialized
515 17:59:14.500012 Initializing CPU #1
516 17:59:14.503065 Initializing CPU #5
517 17:59:14.503560 Initializing CPU #4
518 17:59:14.506295 CPU: vendor Intel device 806c1
519 17:59:14.509473 CPU: family 06, model 8c, stepping 01
520 17:59:14.513153 Initializing CPU #3
521 17:59:14.516162 Initializing CPU #7
522 17:59:14.516590 Initializing CPU #6
523 17:59:14.519792 Initializing CPU #2
524 17:59:14.523059 CPU: vendor Intel device 806c1
525 17:59:14.526393 CPU: family 06, model 8c, stepping 01
526 17:59:14.529477 CPU: vendor Intel device 806c1
527 17:59:14.533083 CPU: family 06, model 8c, stepping 01
528 17:59:14.536129 Clearing out pending MCEs
529 17:59:14.539381 Clearing out pending MCEs
530 17:59:14.539812 Setting up local APIC...
531 17:59:14.543086 CPU: vendor Intel device 806c1
532 17:59:14.549468 CPU: family 06, model 8c, stepping 01
533 17:59:14.549903 CPU: vendor Intel device 806c1
534 17:59:14.555996 CPU: family 06, model 8c, stepping 01
535 17:59:14.556557 Clearing out pending MCEs
536 17:59:14.559411 Setting up local APIC...
537 17:59:14.563038 Clearing out pending MCEs
538 17:59:14.566150 Setting up local APIC...
539 17:59:14.566610 apic_id: 0x02 done.
540 17:59:14.569718 apic_id: 0x03 done.
541 17:59:14.572646 microcode: Update skipped, already up-to-date
542 17:59:14.579558 microcode: Update skipped, already up-to-date
543 17:59:14.579992 CPU #6 initialized
544 17:59:14.582603 CPU #2 initialized
545 17:59:14.586012 Setting up local APIC...
546 17:59:14.589738 CPU: vendor Intel device 806c1
547 17:59:14.592766 CPU: family 06, model 8c, stepping 01
548 17:59:14.593290 apic_id: 0x05 done.
549 17:59:14.595845 apic_id: 0x04 done.
550 17:59:14.602407 microcode: Update skipped, already up-to-date
551 17:59:14.605989 microcode: Update skipped, already up-to-date
552 17:59:14.606700 CPU #3 initialized
553 17:59:14.609311 CPU #7 initialized
554 17:59:14.612783 Clearing out pending MCEs
555 17:59:14.615772 Clearing out pending MCEs
556 17:59:14.619509 CPU: vendor Intel device 806c1
557 17:59:14.622550 CPU: family 06, model 8c, stepping 01
558 17:59:14.625739 Setting up local APIC...
559 17:59:14.626292 Setting up local APIC...
560 17:59:14.629234 apic_id: 0x07 done.
561 17:59:14.632717 Clearing out pending MCEs
562 17:59:14.636066 microcode: Update skipped, already up-to-date
563 17:59:14.639257 Setting up local APIC...
564 17:59:14.639697 CPU #5 initialized
565 17:59:14.642353 apic_id: 0x06 done.
566 17:59:14.646022 apic_id: 0x01 done.
567 17:59:14.649057 microcode: Update skipped, already up-to-date
568 17:59:14.655888 microcode: Update skipped, already up-to-date
569 17:59:14.656310 CPU #4 initialized
570 17:59:14.658870 CPU #1 initialized
571 17:59:14.662450 bsp_do_flight_plan done after 457 msecs.
572 17:59:14.665499 CPU: frequency set to 4000 MHz
573 17:59:14.665925 Enabling SMIs.
574 17:59:14.672203 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 17:59:14.688874 SATAXPCIE1 indicates PCIe NVMe is present
576 17:59:14.692453 Probing TPM: done!
577 17:59:14.696237 Connected to device vid:did:rid of 1ae0:0028:00
578 17:59:14.706646 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
579 17:59:14.709510 Initialized TPM device CR50 revision 0
580 17:59:14.713171 Enabling S0i3.4
581 17:59:14.719586 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 17:59:14.722810 Found a VBT of 8704 bytes after decompression
583 17:59:14.729421 cse_lite: CSE RO boot. HybridStorageMode disabled
584 17:59:14.736034 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 17:59:14.813709 FSPS returned 0
586 17:59:14.816744 Executing Phase 1 of FspMultiPhaseSiInit
587 17:59:14.826622 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 17:59:14.829873 port C0 DISC req: usage 1 usb3 1 usb2 5
589 17:59:14.833246 Raw Buffer output 0 00000511
590 17:59:14.836141 Raw Buffer output 1 00000000
591 17:59:14.840409 pmc_send_ipc_cmd succeeded
592 17:59:14.846867 port C1 DISC req: usage 1 usb3 2 usb2 3
593 17:59:14.847295 Raw Buffer output 0 00000321
594 17:59:14.850043 Raw Buffer output 1 00000000
595 17:59:14.854559 pmc_send_ipc_cmd succeeded
596 17:59:14.859497 Detected 4 core, 8 thread CPU.
597 17:59:14.862575 Detected 4 core, 8 thread CPU.
598 17:59:15.096532 Display FSP Version Info HOB
599 17:59:15.099686 Reference Code - CPU = a.0.4c.31
600 17:59:15.102841 uCode Version = 0.0.0.86
601 17:59:15.106354 TXT ACM version = ff.ff.ff.ffff
602 17:59:15.109494 Reference Code - ME = a.0.4c.31
603 17:59:15.112571 MEBx version = 0.0.0.0
604 17:59:15.115853 ME Firmware Version = Consumer SKU
605 17:59:15.119515 Reference Code - PCH = a.0.4c.31
606 17:59:15.122511 PCH-CRID Status = Disabled
607 17:59:15.126190 PCH-CRID Original Value = ff.ff.ff.ffff
608 17:59:15.129187 PCH-CRID New Value = ff.ff.ff.ffff
609 17:59:15.132748 OPROM - RST - RAID = ff.ff.ff.ffff
610 17:59:15.135934 PCH Hsio Version = 4.0.0.0
611 17:59:15.139489 Reference Code - SA - System Agent = a.0.4c.31
612 17:59:15.142635 Reference Code - MRC = 2.0.0.1
613 17:59:15.146102 SA - PCIe Version = a.0.4c.31
614 17:59:15.149237 SA-CRID Status = Disabled
615 17:59:15.152885 SA-CRID Original Value = 0.0.0.1
616 17:59:15.156080 SA-CRID New Value = 0.0.0.1
617 17:59:15.159032 OPROM - VBIOS = ff.ff.ff.ffff
618 17:59:15.162646 IO Manageability Engine FW Version = 11.1.4.0
619 17:59:15.165833 PHY Build Version = 0.0.0.e0
620 17:59:15.169098 Thunderbolt(TM) FW Version = 0.0.0.0
621 17:59:15.175763 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 17:59:15.179230 ITSS IRQ Polarities Before:
623 17:59:15.179311 IPC0: 0xffffffff
624 17:59:15.182236 IPC1: 0xffffffff
625 17:59:15.182317 IPC2: 0xffffffff
626 17:59:15.185755 IPC3: 0xffffffff
627 17:59:15.188938 ITSS IRQ Polarities After:
628 17:59:15.189020 IPC0: 0xffffffff
629 17:59:15.192251 IPC1: 0xffffffff
630 17:59:15.192333 IPC2: 0xffffffff
631 17:59:15.195524 IPC3: 0xffffffff
632 17:59:15.198979 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 17:59:15.212247 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 17:59:15.222133 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 17:59:15.235554 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 17:59:15.242266 BS: BS_DEV_INIT_CHIPS run times (exec / console): 327 / 236 ms
637 17:59:15.245440 Enumerating buses...
638 17:59:15.249005 Show all devs... Before device enumeration.
639 17:59:15.252103 Root Device: enabled 1
640 17:59:15.252184 DOMAIN: 0000: enabled 1
641 17:59:15.255310 CPU_CLUSTER: 0: enabled 1
642 17:59:15.258415 PCI: 00:00.0: enabled 1
643 17:59:15.262012 PCI: 00:02.0: enabled 1
644 17:59:15.262094 PCI: 00:04.0: enabled 1
645 17:59:15.265124 PCI: 00:05.0: enabled 1
646 17:59:15.268176 PCI: 00:06.0: enabled 0
647 17:59:15.271764 PCI: 00:07.0: enabled 0
648 17:59:15.271845 PCI: 00:07.1: enabled 0
649 17:59:15.274871 PCI: 00:07.2: enabled 0
650 17:59:15.278407 PCI: 00:07.3: enabled 0
651 17:59:15.281671 PCI: 00:08.0: enabled 1
652 17:59:15.281756 PCI: 00:09.0: enabled 0
653 17:59:15.284957 PCI: 00:0a.0: enabled 0
654 17:59:15.288488 PCI: 00:0d.0: enabled 1
655 17:59:15.291575 PCI: 00:0d.1: enabled 0
656 17:59:15.291657 PCI: 00:0d.2: enabled 0
657 17:59:15.294790 PCI: 00:0d.3: enabled 0
658 17:59:15.297946 PCI: 00:0e.0: enabled 0
659 17:59:15.298028 PCI: 00:10.2: enabled 1
660 17:59:15.301374 PCI: 00:10.6: enabled 0
661 17:59:15.304965 PCI: 00:10.7: enabled 0
662 17:59:15.308161 PCI: 00:12.0: enabled 0
663 17:59:15.308243 PCI: 00:12.6: enabled 0
664 17:59:15.311152 PCI: 00:13.0: enabled 0
665 17:59:15.314751 PCI: 00:14.0: enabled 1
666 17:59:15.317834 PCI: 00:14.1: enabled 0
667 17:59:15.317916 PCI: 00:14.2: enabled 1
668 17:59:15.321628 PCI: 00:14.3: enabled 1
669 17:59:15.325094 PCI: 00:15.0: enabled 1
670 17:59:15.328540 PCI: 00:15.1: enabled 1
671 17:59:15.329067 PCI: 00:15.2: enabled 1
672 17:59:15.331925 PCI: 00:15.3: enabled 1
673 17:59:15.335060 PCI: 00:16.0: enabled 1
674 17:59:15.338463 PCI: 00:16.1: enabled 0
675 17:59:15.338923 PCI: 00:16.2: enabled 0
676 17:59:15.341606 PCI: 00:16.3: enabled 0
677 17:59:15.345085 PCI: 00:16.4: enabled 0
678 17:59:15.345623 PCI: 00:16.5: enabled 0
679 17:59:15.348383 PCI: 00:17.0: enabled 1
680 17:59:15.351357 PCI: 00:19.0: enabled 0
681 17:59:15.355010 PCI: 00:19.1: enabled 1
682 17:59:15.355429 PCI: 00:19.2: enabled 0
683 17:59:15.358141 PCI: 00:1c.0: enabled 1
684 17:59:15.361192 PCI: 00:1c.1: enabled 0
685 17:59:15.364466 PCI: 00:1c.2: enabled 0
686 17:59:15.364887 PCI: 00:1c.3: enabled 0
687 17:59:15.368170 PCI: 00:1c.4: enabled 0
688 17:59:15.371529 PCI: 00:1c.5: enabled 0
689 17:59:15.374613 PCI: 00:1c.6: enabled 1
690 17:59:15.375039 PCI: 00:1c.7: enabled 0
691 17:59:15.377962 PCI: 00:1d.0: enabled 1
692 17:59:15.381137 PCI: 00:1d.1: enabled 0
693 17:59:15.384707 PCI: 00:1d.2: enabled 1
694 17:59:15.385125 PCI: 00:1d.3: enabled 0
695 17:59:15.387724 PCI: 00:1e.0: enabled 1
696 17:59:15.390999 PCI: 00:1e.1: enabled 0
697 17:59:15.394133 PCI: 00:1e.2: enabled 1
698 17:59:15.394712 PCI: 00:1e.3: enabled 1
699 17:59:15.397917 PCI: 00:1f.0: enabled 1
700 17:59:15.400830 PCI: 00:1f.1: enabled 0
701 17:59:15.401251 PCI: 00:1f.2: enabled 1
702 17:59:15.404349 PCI: 00:1f.3: enabled 1
703 17:59:15.407553 PCI: 00:1f.4: enabled 0
704 17:59:15.410978 PCI: 00:1f.5: enabled 1
705 17:59:15.411422 PCI: 00:1f.6: enabled 0
706 17:59:15.414169 PCI: 00:1f.7: enabled 0
707 17:59:15.417477 APIC: 00: enabled 1
708 17:59:15.420843 GENERIC: 0.0: enabled 1
709 17:59:15.421281 GENERIC: 0.0: enabled 1
710 17:59:15.423906 GENERIC: 1.0: enabled 1
711 17:59:15.427783 GENERIC: 0.0: enabled 1
712 17:59:15.431022 GENERIC: 1.0: enabled 1
713 17:59:15.431511 USB0 port 0: enabled 1
714 17:59:15.434107 GENERIC: 0.0: enabled 1
715 17:59:15.437185 USB0 port 0: enabled 1
716 17:59:15.437609 GENERIC: 0.0: enabled 1
717 17:59:15.440957 I2C: 00:1a: enabled 1
718 17:59:15.444086 I2C: 00:31: enabled 1
719 17:59:15.444525 I2C: 00:32: enabled 1
720 17:59:15.447235 I2C: 00:10: enabled 1
721 17:59:15.450775 I2C: 00:15: enabled 1
722 17:59:15.453984 GENERIC: 0.0: enabled 0
723 17:59:15.454403 GENERIC: 1.0: enabled 0
724 17:59:15.457189 GENERIC: 0.0: enabled 1
725 17:59:15.460560 SPI: 00: enabled 1
726 17:59:15.460982 SPI: 00: enabled 1
727 17:59:15.463740 PNP: 0c09.0: enabled 1
728 17:59:15.467253 GENERIC: 0.0: enabled 1
729 17:59:15.467797 USB3 port 0: enabled 1
730 17:59:15.470513 USB3 port 1: enabled 1
731 17:59:15.473994 USB3 port 2: enabled 0
732 17:59:15.474416 USB3 port 3: enabled 0
733 17:59:15.476982 USB2 port 0: enabled 0
734 17:59:15.480585 USB2 port 1: enabled 1
735 17:59:15.483605 USB2 port 2: enabled 1
736 17:59:15.484027 USB2 port 3: enabled 0
737 17:59:15.487314 USB2 port 4: enabled 1
738 17:59:15.490570 USB2 port 5: enabled 0
739 17:59:15.491001 USB2 port 6: enabled 0
740 17:59:15.495055 USB2 port 7: enabled 0
741 17:59:15.497006 USB2 port 8: enabled 0
742 17:59:15.500059 USB2 port 9: enabled 0
743 17:59:15.500479 USB3 port 0: enabled 0
744 17:59:15.503693 USB3 port 1: enabled 1
745 17:59:15.506693 USB3 port 2: enabled 0
746 17:59:15.507116 USB3 port 3: enabled 0
747 17:59:15.510242 GENERIC: 0.0: enabled 1
748 17:59:15.513646 GENERIC: 1.0: enabled 1
749 17:59:15.514227 APIC: 01: enabled 1
750 17:59:15.517034 APIC: 03: enabled 1
751 17:59:15.520197 APIC: 05: enabled 1
752 17:59:15.520648 APIC: 06: enabled 1
753 17:59:15.523426 APIC: 07: enabled 1
754 17:59:15.526436 APIC: 02: enabled 1
755 17:59:15.526909 APIC: 04: enabled 1
756 17:59:15.529772 Compare with tree...
757 17:59:15.533380 Root Device: enabled 1
758 17:59:15.533925 DOMAIN: 0000: enabled 1
759 17:59:15.536396 PCI: 00:00.0: enabled 1
760 17:59:15.539849 PCI: 00:02.0: enabled 1
761 17:59:15.543211 PCI: 00:04.0: enabled 1
762 17:59:15.546414 GENERIC: 0.0: enabled 1
763 17:59:15.546887 PCI: 00:05.0: enabled 1
764 17:59:15.550015 PCI: 00:06.0: enabled 0
765 17:59:15.553037 PCI: 00:07.0: enabled 0
766 17:59:15.556667 GENERIC: 0.0: enabled 1
767 17:59:15.559794 PCI: 00:07.1: enabled 0
768 17:59:15.560227 GENERIC: 1.0: enabled 1
769 17:59:15.562878 PCI: 00:07.2: enabled 0
770 17:59:15.566568 GENERIC: 0.0: enabled 1
771 17:59:15.569738 PCI: 00:07.3: enabled 0
772 17:59:15.572924 GENERIC: 1.0: enabled 1
773 17:59:15.573346 PCI: 00:08.0: enabled 1
774 17:59:15.576435 PCI: 00:09.0: enabled 0
775 17:59:15.579462 PCI: 00:0a.0: enabled 0
776 17:59:15.583123 PCI: 00:0d.0: enabled 1
777 17:59:15.586081 USB0 port 0: enabled 1
778 17:59:15.586502 USB3 port 0: enabled 1
779 17:59:15.589708 USB3 port 1: enabled 1
780 17:59:15.592830 USB3 port 2: enabled 0
781 17:59:15.595962 USB3 port 3: enabled 0
782 17:59:15.599551 PCI: 00:0d.1: enabled 0
783 17:59:15.602487 PCI: 00:0d.2: enabled 0
784 17:59:15.603004 GENERIC: 0.0: enabled 1
785 17:59:15.605979 PCI: 00:0d.3: enabled 0
786 17:59:15.609600 PCI: 00:0e.0: enabled 0
787 17:59:15.612615 PCI: 00:10.2: enabled 1
788 17:59:15.616026 PCI: 00:10.6: enabled 0
789 17:59:15.616451 PCI: 00:10.7: enabled 0
790 17:59:15.619301 PCI: 00:12.0: enabled 0
791 17:59:15.622437 PCI: 00:12.6: enabled 0
792 17:59:15.625923 PCI: 00:13.0: enabled 0
793 17:59:15.629069 PCI: 00:14.0: enabled 1
794 17:59:15.629639 USB0 port 0: enabled 1
795 17:59:15.632600 USB2 port 0: enabled 0
796 17:59:15.635698 USB2 port 1: enabled 1
797 17:59:15.639179 USB2 port 2: enabled 1
798 17:59:15.642504 USB2 port 3: enabled 0
799 17:59:15.645825 USB2 port 4: enabled 1
800 17:59:15.646389 USB2 port 5: enabled 0
801 17:59:15.649028 USB2 port 6: enabled 0
802 17:59:15.651872 USB2 port 7: enabled 0
803 17:59:15.655343 USB2 port 8: enabled 0
804 17:59:15.658400 USB2 port 9: enabled 0
805 17:59:15.662058 USB3 port 0: enabled 0
806 17:59:15.662141 USB3 port 1: enabled 1
807 17:59:15.665015 USB3 port 2: enabled 0
808 17:59:15.668707 USB3 port 3: enabled 0
809 17:59:15.671948 PCI: 00:14.1: enabled 0
810 17:59:15.675001 PCI: 00:14.2: enabled 1
811 17:59:15.675175 PCI: 00:14.3: enabled 1
812 17:59:15.678706 GENERIC: 0.0: enabled 1
813 17:59:15.682118 PCI: 00:15.0: enabled 1
814 17:59:15.685123 I2C: 00:1a: enabled 1
815 17:59:15.688182 I2C: 00:31: enabled 1
816 17:59:15.688358 I2C: 00:32: enabled 1
817 17:59:15.691516 PCI: 00:15.1: enabled 1
818 17:59:15.695045 I2C: 00:10: enabled 1
819 17:59:15.698641 PCI: 00:15.2: enabled 1
820 17:59:15.699084 PCI: 00:15.3: enabled 1
821 17:59:15.701974 PCI: 00:16.0: enabled 1
822 17:59:15.705123 PCI: 00:16.1: enabled 0
823 17:59:15.708227 PCI: 00:16.2: enabled 0
824 17:59:15.711826 PCI: 00:16.3: enabled 0
825 17:59:15.712247 PCI: 00:16.4: enabled 0
826 17:59:15.715607 PCI: 00:16.5: enabled 0
827 17:59:15.719237 PCI: 00:17.0: enabled 1
828 17:59:15.722629 PCI: 00:19.0: enabled 0
829 17:59:15.723245 PCI: 00:19.1: enabled 1
830 17:59:15.725905 I2C: 00:15: enabled 1
831 17:59:15.729250 PCI: 00:19.2: enabled 0
832 17:59:15.774365 PCI: 00:1d.0: enabled 1
833 17:59:15.775047 GENERIC: 0.0: enabled 1
834 17:59:15.775787 PCI: 00:1e.0: enabled 1
835 17:59:15.776163 PCI: 00:1e.1: enabled 0
836 17:59:15.776530 PCI: 00:1e.2: enabled 1
837 17:59:15.776865 SPI: 00: enabled 1
838 17:59:15.777214 PCI: 00:1e.3: enabled 1
839 17:59:15.777641 SPI: 00: enabled 1
840 17:59:15.778112 PCI: 00:1f.0: enabled 1
841 17:59:15.778643 PNP: 0c09.0: enabled 1
842 17:59:15.778981 PCI: 00:1f.1: enabled 0
843 17:59:15.779293 PCI: 00:1f.2: enabled 1
844 17:59:15.779597 GENERIC: 0.0: enabled 1
845 17:59:15.779908 GENERIC: 0.0: enabled 1
846 17:59:15.780214 GENERIC: 1.0: enabled 1
847 17:59:15.780508 PCI: 00:1f.3: enabled 1
848 17:59:15.780784 PCI: 00:1f.4: enabled 0
849 17:59:15.781139 PCI: 00:1f.5: enabled 1
850 17:59:15.781433 PCI: 00:1f.6: enabled 0
851 17:59:15.781767 PCI: 00:1f.7: enabled 0
852 17:59:15.784739 CPU_CLUSTER: 0: enabled 1
853 17:59:15.788214 APIC: 00: enabled 1
854 17:59:15.788636 APIC: 01: enabled 1
855 17:59:15.791406 APIC: 03: enabled 1
856 17:59:15.794846 APIC: 05: enabled 1
857 17:59:15.795309 APIC: 06: enabled 1
858 17:59:15.797876 APIC: 07: enabled 1
859 17:59:15.801503 APIC: 02: enabled 1
860 17:59:15.802060 APIC: 04: enabled 1
861 17:59:15.805152 Root Device scanning...
862 17:59:15.808903 scan_static_bus for Root Device
863 17:59:15.811902 DOMAIN: 0000 enabled
864 17:59:15.815031 CPU_CLUSTER: 0 enabled
865 17:59:15.815478 DOMAIN: 0000 scanning...
866 17:59:15.818628 PCI: pci_scan_bus for bus 00
867 17:59:15.822060 PCI: 00:00.0 [8086/0000] ops
868 17:59:15.825073 PCI: 00:00.0 [8086/9a12] enabled
869 17:59:15.828626 PCI: 00:02.0 [8086/0000] bus ops
870 17:59:15.832121 PCI: 00:02.0 [8086/9a40] enabled
871 17:59:15.835231 PCI: 00:04.0 [8086/0000] bus ops
872 17:59:15.838150 PCI: 00:04.0 [8086/9a03] enabled
873 17:59:15.841453 PCI: 00:05.0 [8086/9a19] enabled
874 17:59:15.845179 PCI: 00:07.0 [0000/0000] hidden
875 17:59:15.848442 PCI: 00:08.0 [8086/9a11] enabled
876 17:59:15.851621 PCI: 00:0a.0 [8086/9a0d] disabled
877 17:59:15.854820 PCI: 00:0d.0 [8086/0000] bus ops
878 17:59:15.858462 PCI: 00:0d.0 [8086/9a13] enabled
879 17:59:15.861521 PCI: 00:14.0 [8086/0000] bus ops
880 17:59:15.864848 PCI: 00:14.0 [8086/a0ed] enabled
881 17:59:15.867928 PCI: 00:14.2 [8086/a0ef] enabled
882 17:59:15.871249 PCI: 00:14.3 [8086/0000] bus ops
883 17:59:15.874946 PCI: 00:14.3 [8086/a0f0] enabled
884 17:59:15.878296 PCI: 00:15.0 [8086/0000] bus ops
885 17:59:15.881082 PCI: 00:15.0 [8086/a0e8] enabled
886 17:59:15.884531 PCI: 00:15.1 [8086/0000] bus ops
887 17:59:15.887976 PCI: 00:15.1 [8086/a0e9] enabled
888 17:59:15.891414 PCI: 00:15.2 [8086/0000] bus ops
889 17:59:15.894568 PCI: 00:15.2 [8086/a0ea] enabled
890 17:59:15.897672 PCI: 00:15.3 [8086/0000] bus ops
891 17:59:15.901162 PCI: 00:15.3 [8086/a0eb] enabled
892 17:59:15.904826 PCI: 00:16.0 [8086/0000] ops
893 17:59:15.908030 PCI: 00:16.0 [8086/a0e0] enabled
894 17:59:15.914307 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 17:59:15.917564 PCI: 00:19.0 [8086/0000] bus ops
896 17:59:15.921253 PCI: 00:19.0 [8086/a0c5] disabled
897 17:59:15.924428 PCI: 00:19.1 [8086/0000] bus ops
898 17:59:15.927541 PCI: 00:19.1 [8086/a0c6] enabled
899 17:59:15.930965 PCI: 00:1d.0 [8086/0000] bus ops
900 17:59:15.934408 PCI: 00:1d.0 [8086/a0b0] enabled
901 17:59:15.937552 PCI: 00:1e.0 [8086/0000] ops
902 17:59:15.941063 PCI: 00:1e.0 [8086/a0a8] enabled
903 17:59:15.944204 PCI: 00:1e.2 [8086/0000] bus ops
904 17:59:15.947711 PCI: 00:1e.2 [8086/a0aa] enabled
905 17:59:15.951109 PCI: 00:1e.3 [8086/0000] bus ops
906 17:59:15.954146 PCI: 00:1e.3 [8086/a0ab] enabled
907 17:59:15.957263 PCI: 00:1f.0 [8086/0000] bus ops
908 17:59:15.960406 PCI: 00:1f.0 [8086/a087] enabled
909 17:59:15.964095 RTC Init
910 17:59:15.967187 Set power on after power failure.
911 17:59:15.967606 Disabling Deep S3
912 17:59:15.970649 Disabling Deep S3
913 17:59:15.971071 Disabling Deep S4
914 17:59:15.973889 Disabling Deep S4
915 17:59:15.974472 Disabling Deep S5
916 17:59:15.976962 Disabling Deep S5
917 17:59:15.980509 PCI: 00:1f.2 [0000/0000] hidden
918 17:59:15.983823 PCI: 00:1f.3 [8086/0000] bus ops
919 17:59:15.987114 PCI: 00:1f.3 [8086/a0c8] enabled
920 17:59:15.990719 PCI: 00:1f.5 [8086/0000] bus ops
921 17:59:15.993860 PCI: 00:1f.5 [8086/a0a4] enabled
922 17:59:15.996965 PCI: Leftover static devices:
923 17:59:15.997466 PCI: 00:10.2
924 17:59:16.000599 PCI: 00:10.6
925 17:59:16.001019 PCI: 00:10.7
926 17:59:16.003807 PCI: 00:06.0
927 17:59:16.004280 PCI: 00:07.1
928 17:59:16.004641 PCI: 00:07.2
929 17:59:16.007208 PCI: 00:07.3
930 17:59:16.007623 PCI: 00:09.0
931 17:59:16.010483 PCI: 00:0d.1
932 17:59:16.010935 PCI: 00:0d.2
933 17:59:16.011265 PCI: 00:0d.3
934 17:59:16.013627 PCI: 00:0e.0
935 17:59:16.014132 PCI: 00:12.0
936 17:59:16.017137 PCI: 00:12.6
937 17:59:16.017657 PCI: 00:13.0
938 17:59:16.020381 PCI: 00:14.1
939 17:59:16.020755 PCI: 00:16.1
940 17:59:16.021068 PCI: 00:16.2
941 17:59:16.023614 PCI: 00:16.3
942 17:59:16.024029 PCI: 00:16.4
943 17:59:16.026905 PCI: 00:16.5
944 17:59:16.027436 PCI: 00:17.0
945 17:59:16.027775 PCI: 00:19.2
946 17:59:16.030385 PCI: 00:1e.1
947 17:59:16.030842 PCI: 00:1f.1
948 17:59:16.033407 PCI: 00:1f.4
949 17:59:16.033831 PCI: 00:1f.6
950 17:59:16.036957 PCI: 00:1f.7
951 17:59:16.037384 PCI: Check your devicetree.cb.
952 17:59:16.040030 PCI: 00:02.0 scanning...
953 17:59:16.043596 scan_generic_bus for PCI: 00:02.0
954 17:59:16.050361 scan_generic_bus for PCI: 00:02.0 done
955 17:59:16.053471 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 17:59:16.056736 PCI: 00:04.0 scanning...
957 17:59:16.060218 scan_generic_bus for PCI: 00:04.0
958 17:59:16.060641 GENERIC: 0.0 enabled
959 17:59:16.066510 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 17:59:16.073405 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 17:59:16.076665 PCI: 00:0d.0 scanning...
962 17:59:16.079856 scan_static_bus for PCI: 00:0d.0
963 17:59:16.080281 USB0 port 0 enabled
964 17:59:16.083023 USB0 port 0 scanning...
965 17:59:16.086543 scan_static_bus for USB0 port 0
966 17:59:16.089509 USB3 port 0 enabled
967 17:59:16.089932 USB3 port 1 enabled
968 17:59:16.092867 USB3 port 2 disabled
969 17:59:16.096178 USB3 port 3 disabled
970 17:59:16.096639 USB3 port 0 scanning...
971 17:59:16.099703 scan_static_bus for USB3 port 0
972 17:59:16.103104 scan_static_bus for USB3 port 0 done
973 17:59:16.109325 scan_bus: bus USB3 port 0 finished in 6 msecs
974 17:59:16.112953 USB3 port 1 scanning...
975 17:59:16.115965 scan_static_bus for USB3 port 1
976 17:59:16.119592 scan_static_bus for USB3 port 1 done
977 17:59:16.122855 scan_bus: bus USB3 port 1 finished in 6 msecs
978 17:59:16.125872 scan_static_bus for USB0 port 0 done
979 17:59:16.132656 scan_bus: bus USB0 port 0 finished in 43 msecs
980 17:59:16.136138 scan_static_bus for PCI: 00:0d.0 done
981 17:59:16.139195 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 17:59:16.142618 PCI: 00:14.0 scanning...
983 17:59:16.145759 scan_static_bus for PCI: 00:14.0
984 17:59:16.149422 USB0 port 0 enabled
985 17:59:16.149943 USB0 port 0 scanning...
986 17:59:16.152680 scan_static_bus for USB0 port 0
987 17:59:16.156235 USB2 port 0 disabled
988 17:59:16.159322 USB2 port 1 enabled
989 17:59:16.159899 USB2 port 2 enabled
990 17:59:16.162653 USB2 port 3 disabled
991 17:59:16.166295 USB2 port 4 enabled
992 17:59:16.166771 USB2 port 5 disabled
993 17:59:16.169436 USB2 port 6 disabled
994 17:59:16.172567 USB2 port 7 disabled
995 17:59:16.172999 USB2 port 8 disabled
996 17:59:16.176176 USB2 port 9 disabled
997 17:59:16.176606 USB3 port 0 disabled
998 17:59:16.179157 USB3 port 1 enabled
999 17:59:16.182891 USB3 port 2 disabled
1000 17:59:16.183319 USB3 port 3 disabled
1001 17:59:16.185880 USB2 port 1 scanning...
1002 17:59:16.189498 scan_static_bus for USB2 port 1
1003 17:59:16.192686 scan_static_bus for USB2 port 1 done
1004 17:59:16.199264 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 17:59:16.199709 USB2 port 2 scanning...
1006 17:59:16.202485 scan_static_bus for USB2 port 2
1007 17:59:16.209392 scan_static_bus for USB2 port 2 done
1008 17:59:16.212447 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 17:59:16.216028 USB2 port 4 scanning...
1010 17:59:16.219251 scan_static_bus for USB2 port 4
1011 17:59:16.222447 scan_static_bus for USB2 port 4 done
1012 17:59:16.225769 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 17:59:16.229409 USB3 port 1 scanning...
1014 17:59:16.232447 scan_static_bus for USB3 port 1
1015 17:59:16.235426 scan_static_bus for USB3 port 1 done
1016 17:59:16.242010 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 17:59:16.245609 scan_static_bus for USB0 port 0 done
1018 17:59:16.249048 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 17:59:16.252277 scan_static_bus for PCI: 00:14.0 done
1020 17:59:16.258816 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1021 17:59:16.261947 PCI: 00:14.3 scanning...
1022 17:59:16.265751 scan_static_bus for PCI: 00:14.3
1023 17:59:16.266277 GENERIC: 0.0 enabled
1024 17:59:16.268728 scan_static_bus for PCI: 00:14.3 done
1025 17:59:16.275030 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 17:59:16.278230 PCI: 00:15.0 scanning...
1027 17:59:16.281726 scan_static_bus for PCI: 00:15.0
1028 17:59:16.282150 I2C: 00:1a enabled
1029 17:59:16.285210 I2C: 00:31 enabled
1030 17:59:16.285633 I2C: 00:32 enabled
1031 17:59:16.292058 scan_static_bus for PCI: 00:15.0 done
1032 17:59:16.295666 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 17:59:16.299425 PCI: 00:15.1 scanning...
1034 17:59:16.302643 scan_static_bus for PCI: 00:15.1
1035 17:59:16.303227 I2C: 00:10 enabled
1036 17:59:16.305650 scan_static_bus for PCI: 00:15.1 done
1037 17:59:16.312517 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 17:59:16.315441 PCI: 00:15.2 scanning...
1039 17:59:16.318960 scan_static_bus for PCI: 00:15.2
1040 17:59:16.322200 scan_static_bus for PCI: 00:15.2 done
1041 17:59:16.325553 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 17:59:16.328557 PCI: 00:15.3 scanning...
1043 17:59:16.332160 scan_static_bus for PCI: 00:15.3
1044 17:59:16.335578 scan_static_bus for PCI: 00:15.3 done
1045 17:59:16.341939 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 17:59:16.342579 PCI: 00:19.1 scanning...
1047 17:59:16.345327 scan_static_bus for PCI: 00:19.1
1048 17:59:16.348924 I2C: 00:15 enabled
1049 17:59:16.351838 scan_static_bus for PCI: 00:19.1 done
1050 17:59:16.358488 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 17:59:16.359129 PCI: 00:1d.0 scanning...
1052 17:59:16.365369 do_pci_scan_bridge for PCI: 00:1d.0
1053 17:59:16.365953 PCI: pci_scan_bus for bus 01
1054 17:59:16.368578 PCI: 01:00.0 [1c5c/174a] enabled
1055 17:59:16.372140 GENERIC: 0.0 enabled
1056 17:59:16.375174 Enabling Common Clock Configuration
1057 17:59:16.381867 L1 Sub-State supported from root port 29
1058 17:59:16.382459 L1 Sub-State Support = 0xf
1059 17:59:16.385299 CommonModeRestoreTime = 0x28
1060 17:59:16.391798 Power On Value = 0x16, Power On Scale = 0x0
1061 17:59:16.392362 ASPM: Enabled L1
1062 17:59:16.395080 PCIe: Max_Payload_Size adjusted to 128
1063 17:59:16.401729 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 17:59:16.404865 PCI: 00:1e.2 scanning...
1065 17:59:16.408449 scan_generic_bus for PCI: 00:1e.2
1066 17:59:16.408994 SPI: 00 enabled
1067 17:59:16.415095 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 17:59:16.418251 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 17:59:16.421314 PCI: 00:1e.3 scanning...
1070 17:59:16.424773 scan_generic_bus for PCI: 00:1e.3
1071 17:59:16.428322 SPI: 00 enabled
1072 17:59:16.434641 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 17:59:16.438037 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 17:59:16.441337 PCI: 00:1f.0 scanning...
1075 17:59:16.444500 scan_static_bus for PCI: 00:1f.0
1076 17:59:16.448334 PNP: 0c09.0 enabled
1077 17:59:16.448921 PNP: 0c09.0 scanning...
1078 17:59:16.451309 scan_static_bus for PNP: 0c09.0
1079 17:59:16.454865 scan_static_bus for PNP: 0c09.0 done
1080 17:59:16.461055 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 17:59:16.464274 scan_static_bus for PCI: 00:1f.0 done
1082 17:59:16.467939 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 17:59:16.471172 PCI: 00:1f.2 scanning...
1084 17:59:16.474260 scan_static_bus for PCI: 00:1f.2
1085 17:59:16.477832 GENERIC: 0.0 enabled
1086 17:59:16.480968 GENERIC: 0.0 scanning...
1087 17:59:16.483841 scan_static_bus for GENERIC: 0.0
1088 17:59:16.483915 GENERIC: 0.0 enabled
1089 17:59:16.487365 GENERIC: 1.0 enabled
1090 17:59:16.490454 scan_static_bus for GENERIC: 0.0 done
1091 17:59:16.497436 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 17:59:16.500540 scan_static_bus for PCI: 00:1f.2 done
1093 17:59:16.503625 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 17:59:16.507257 PCI: 00:1f.3 scanning...
1095 17:59:16.510307 scan_static_bus for PCI: 00:1f.3
1096 17:59:16.513463 scan_static_bus for PCI: 00:1f.3 done
1097 17:59:16.520055 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 17:59:16.520141 PCI: 00:1f.5 scanning...
1099 17:59:16.527236 scan_generic_bus for PCI: 00:1f.5
1100 17:59:16.530273 scan_generic_bus for PCI: 00:1f.5 done
1101 17:59:16.533595 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 17:59:16.540493 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1103 17:59:16.543717 scan_static_bus for Root Device done
1104 17:59:16.547109 scan_bus: bus Root Device finished in 736 msecs
1105 17:59:16.547191 done
1106 17:59:16.553464 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 17:59:16.557096 Chrome EC: UHEPI supported
1108 17:59:16.563755 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 17:59:16.570448 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 17:59:16.573597 SPI flash protection: WPSW=1 SRP0=0
1111 17:59:16.577448 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 17:59:16.583542 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 17:59:16.587152 found VGA at PCI: 00:02.0
1114 17:59:16.590395 Setting up VGA for PCI: 00:02.0
1115 17:59:16.597336 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 17:59:16.600587 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 17:59:16.603569 Allocating resources...
1118 17:59:16.604116 Reading resources...
1119 17:59:16.610627 Root Device read_resources bus 0 link: 0
1120 17:59:16.613826 DOMAIN: 0000 read_resources bus 0 link: 0
1121 17:59:16.620076 PCI: 00:04.0 read_resources bus 1 link: 0
1122 17:59:16.623567 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 17:59:16.630024 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 17:59:16.633674 USB0 port 0 read_resources bus 0 link: 0
1125 17:59:16.640032 USB0 port 0 read_resources bus 0 link: 0 done
1126 17:59:16.643579 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 17:59:16.646505 PCI: 00:14.0 read_resources bus 0 link: 0
1128 17:59:16.653343 USB0 port 0 read_resources bus 0 link: 0
1129 17:59:16.656387 USB0 port 0 read_resources bus 0 link: 0 done
1130 17:59:16.663066 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 17:59:16.666649 PCI: 00:14.3 read_resources bus 0 link: 0
1132 17:59:16.673737 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 17:59:16.676597 PCI: 00:15.0 read_resources bus 0 link: 0
1134 17:59:16.683422 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 17:59:16.687312 PCI: 00:15.1 read_resources bus 0 link: 0
1136 17:59:16.693537 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 17:59:16.696603 PCI: 00:19.1 read_resources bus 0 link: 0
1138 17:59:16.703847 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 17:59:16.706998 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 17:59:16.713571 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 17:59:16.716876 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 17:59:16.723689 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 17:59:16.727271 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 17:59:16.733455 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 17:59:16.737095 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 17:59:16.743886 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 17:59:16.746583 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 17:59:16.749928 GENERIC: 0.0 read_resources bus 0 link: 0
1149 17:59:16.757871 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 17:59:16.761280 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 17:59:16.768150 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 17:59:16.771165 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 17:59:16.778210 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 17:59:16.781683 Root Device read_resources bus 0 link: 0 done
1155 17:59:16.784496 Done reading resources.
1156 17:59:16.791000 Show resources in subtree (Root Device)...After reading.
1157 17:59:16.794497 Root Device child on link 0 DOMAIN: 0000
1158 17:59:16.797692 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 17:59:16.807627 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 17:59:16.817859 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 17:59:16.820975 PCI: 00:00.0
1162 17:59:16.830819 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 17:59:16.837644 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 17:59:16.847755 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 17:59:16.857415 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 17:59:16.867523 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 17:59:16.877441 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 17:59:16.887503 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 17:59:16.894296 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 17:59:16.903691 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 17:59:16.914059 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 17:59:16.923902 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 17:59:16.933498 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 17:59:16.943412 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 17:59:16.950199 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 17:59:16.959683 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 17:59:16.969820 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 17:59:16.979625 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 17:59:16.990124 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 17:59:16.999779 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 17:59:17.009272 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 17:59:17.009862 PCI: 00:02.0
1183 17:59:17.019165 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 17:59:17.029294 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 17:59:17.039030 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 17:59:17.042640 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 17:59:17.052333 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 17:59:17.055877 GENERIC: 0.0
1189 17:59:17.056488 PCI: 00:05.0
1190 17:59:17.065375 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 17:59:17.072057 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 17:59:17.072650 GENERIC: 0.0
1193 17:59:17.075370 PCI: 00:08.0
1194 17:59:17.085437 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 17:59:17.086046 PCI: 00:0a.0
1196 17:59:17.092064 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 17:59:17.101942 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 17:59:17.105032 USB0 port 0 child on link 0 USB3 port 0
1199 17:59:17.108731 USB3 port 0
1200 17:59:17.109267 USB3 port 1
1201 17:59:17.111837 USB3 port 2
1202 17:59:17.112375 USB3 port 3
1203 17:59:17.115428 PCI: 00:14.0 child on link 0 USB0 port 0
1204 17:59:17.125137 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 17:59:17.131835 USB0 port 0 child on link 0 USB2 port 0
1206 17:59:17.132482 USB2 port 0
1207 17:59:17.134942 USB2 port 1
1208 17:59:17.135545 USB2 port 2
1209 17:59:17.138366 USB2 port 3
1210 17:59:17.141547 USB2 port 4
1211 17:59:17.142103 USB2 port 5
1212 17:59:17.145254 USB2 port 6
1213 17:59:17.145863 USB2 port 7
1214 17:59:17.148376 USB2 port 8
1215 17:59:17.148969 USB2 port 9
1216 17:59:17.151661 USB3 port 0
1217 17:59:17.152189 USB3 port 1
1218 17:59:17.155097 USB3 port 2
1219 17:59:17.155744 USB3 port 3
1220 17:59:17.158219 PCI: 00:14.2
1221 17:59:17.167973 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 17:59:17.177926 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 17:59:17.181301 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 17:59:17.190819 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 17:59:17.194027 GENERIC: 0.0
1226 17:59:17.197479 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 17:59:17.207617 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 17:59:17.210756 I2C: 00:1a
1229 17:59:17.210865 I2C: 00:31
1230 17:59:17.210944 I2C: 00:32
1231 17:59:17.217366 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 17:59:17.227402 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 17:59:17.227511 I2C: 00:10
1234 17:59:17.230507 PCI: 00:15.2
1235 17:59:17.240706 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 17:59:17.240789 PCI: 00:15.3
1237 17:59:17.250821 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 17:59:17.254483 PCI: 00:16.0
1239 17:59:17.263770 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 17:59:17.264213 PCI: 00:19.0
1241 17:59:17.270963 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 17:59:17.280411 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 17:59:17.280851 I2C: 00:15
1244 17:59:17.284003 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 17:59:17.294026 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 17:59:17.304048 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 17:59:17.313574 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 17:59:17.314014 GENERIC: 0.0
1249 17:59:17.317094 PCI: 01:00.0
1250 17:59:17.327173 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 17:59:17.337050 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 17:59:17.343974 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 17:59:17.347044 PCI: 00:1e.0
1254 17:59:17.356860 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 17:59:17.360494 PCI: 00:1e.2 child on link 0 SPI: 00
1256 17:59:17.370146 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 17:59:17.373109 SPI: 00
1258 17:59:17.376734 PCI: 00:1e.3 child on link 0 SPI: 00
1259 17:59:17.386403 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 17:59:17.386949 SPI: 00
1261 17:59:17.393281 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 17:59:17.399914 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 17:59:17.403313 PNP: 0c09.0
1264 17:59:17.413282 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 17:59:17.416252 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 17:59:17.426399 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 17:59:17.436430 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 17:59:17.439535 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 17:59:17.443025 GENERIC: 0.0
1270 17:59:17.443447 GENERIC: 1.0
1271 17:59:17.446187 PCI: 00:1f.3
1272 17:59:17.456122 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 17:59:17.465537 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 17:59:17.465648 PCI: 00:1f.5
1275 17:59:17.475912 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 17:59:17.479152 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 17:59:17.482446 APIC: 00
1278 17:59:17.482584 APIC: 01
1279 17:59:17.482656 APIC: 03
1280 17:59:17.485779 APIC: 05
1281 17:59:17.485887 APIC: 06
1282 17:59:17.485980 APIC: 07
1283 17:59:17.489411 APIC: 02
1284 17:59:17.489492 APIC: 04
1285 17:59:17.499384 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 17:59:17.502610 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 17:59:17.509524 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 17:59:17.516114 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 17:59:17.519372 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 17:59:17.522971 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 17:59:17.529576 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 17:59:17.536097 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 17:59:17.542973 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 17:59:17.549475 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 17:59:17.559609 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 17:59:17.565815 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 17:59:17.572658 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 17:59:17.579477 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 17:59:17.585696 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 17:59:17.589190 DOMAIN: 0000: Resource ranges:
1301 17:59:17.592502 * Base: 1000, Size: 800, Tag: 100
1302 17:59:17.595713 * Base: 1900, Size: e700, Tag: 100
1303 17:59:17.602131 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 17:59:17.608770 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 17:59:17.615672 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 17:59:17.621983 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 17:59:17.631924 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 17:59:17.638726 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 17:59:17.645173 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 17:59:17.655500 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 17:59:17.662054 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 17:59:17.668506 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 17:59:17.678377 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 17:59:17.685062 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 17:59:17.691377 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 17:59:17.701753 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 17:59:17.708367 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 17:59:17.714504 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 17:59:17.724686 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 17:59:17.731012 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 17:59:17.737747 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 17:59:17.747631 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 17:59:17.754247 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 17:59:17.764486 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 17:59:17.771249 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 17:59:17.777800 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 17:59:17.787617 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 17:59:17.788286 DOMAIN: 0000: Resource ranges:
1329 17:59:17.794137 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 17:59:17.797220 * Base: d0000000, Size: 28000000, Tag: 200
1331 17:59:17.800425 * Base: fa000000, Size: 1000000, Tag: 200
1332 17:59:17.807488 * Base: fb001000, Size: 2fff000, Tag: 200
1333 17:59:17.810870 * Base: fe010000, Size: 2e000, Tag: 200
1334 17:59:17.814060 * Base: fe03f000, Size: d41000, Tag: 200
1335 17:59:17.816842 * Base: fed88000, Size: 8000, Tag: 200
1336 17:59:17.823386 * Base: fed93000, Size: d000, Tag: 200
1337 17:59:17.827077 * Base: feda2000, Size: 1e000, Tag: 200
1338 17:59:17.830597 * Base: fede0000, Size: 1220000, Tag: 200
1339 17:59:17.837053 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 17:59:17.843359 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 17:59:17.850202 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 17:59:17.856790 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 17:59:17.863400 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 17:59:17.870324 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 17:59:17.876583 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 17:59:17.883181 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 17:59:17.890029 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 17:59:17.896455 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 17:59:17.902869 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 17:59:17.909246 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 17:59:17.915848 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 17:59:17.922341 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 17:59:17.929147 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 17:59:17.935494 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 17:59:17.942244 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 17:59:17.948982 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 17:59:17.955235 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 17:59:17.962238 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 17:59:17.968655 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 17:59:17.975162 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 17:59:17.981673 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 17:59:17.988524 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 17:59:17.998448 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 17:59:18.001874 PCI: 00:1d.0: Resource ranges:
1365 17:59:18.004758 * Base: 7fc00000, Size: 100000, Tag: 200
1366 17:59:18.011399 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 17:59:18.018100 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 17:59:18.024689 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 17:59:18.031252 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 17:59:18.041143 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 17:59:18.044821 Root Device assign_resources, bus 0 link: 0
1372 17:59:18.047914 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 17:59:18.058124 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 17:59:18.064686 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 17:59:18.074476 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 17:59:18.081159 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 17:59:18.087842 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 17:59:18.090772 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 17:59:18.100964 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 17:59:18.107587 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 17:59:18.117589 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 17:59:18.120740 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 17:59:18.124023 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 17:59:18.133786 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 17:59:18.136918 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 17:59:18.143521 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 17:59:18.150105 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 17:59:18.160323 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 17:59:18.167410 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 17:59:18.170834 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 17:59:18.177385 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 17:59:18.183958 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 17:59:18.190859 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 17:59:18.193880 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 17:59:18.203955 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 17:59:18.207201 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 17:59:18.210292 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 17:59:18.220254 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 17:59:18.227017 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 17:59:18.236789 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 17:59:18.243127 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 17:59:18.250116 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 17:59:18.253313 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 17:59:18.263364 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 17:59:18.273079 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 17:59:18.279677 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 17:59:18.286591 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 17:59:18.293233 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 17:59:18.302874 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 17:59:18.309886 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 17:59:18.313136 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 17:59:18.322905 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 17:59:18.326421 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 17:59:18.333209 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 17:59:18.339504 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 17:59:18.346314 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 17:59:18.349369 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 17:59:18.352961 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 17:59:18.359638 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 17:59:18.362907 LPC: Trying to open IO window from 800 size 1ff
1421 17:59:18.372789 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 17:59:18.379707 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 17:59:18.389259 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 17:59:18.392830 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 17:59:18.399591 Root Device assign_resources, bus 0 link: 0
1426 17:59:18.400021 Done setting resources.
1427 17:59:18.405924 Show resources in subtree (Root Device)...After assigning values.
1428 17:59:18.412489 Root Device child on link 0 DOMAIN: 0000
1429 17:59:18.416014 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 17:59:18.426013 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 17:59:18.436351 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 17:59:18.436938 PCI: 00:00.0
1433 17:59:18.446176 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 17:59:18.455728 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 17:59:18.466108 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 17:59:18.475757 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 17:59:18.482610 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 17:59:18.492170 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 17:59:18.502324 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 17:59:18.512423 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 17:59:18.521949 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 17:59:18.528718 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 17:59:18.538969 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 17:59:18.548682 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 17:59:18.558641 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 17:59:18.568779 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 17:59:18.575134 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 17:59:18.584946 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 17:59:18.595027 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 17:59:18.604728 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 17:59:18.614816 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 17:59:18.624777 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 17:59:18.627693 PCI: 00:02.0
1454 17:59:18.637641 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 17:59:18.647648 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 17:59:18.657597 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 17:59:18.661274 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 17:59:18.670702 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 17:59:18.674374 GENERIC: 0.0
1460 17:59:18.674988 PCI: 00:05.0
1461 17:59:18.687655 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 17:59:18.690631 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 17:59:18.691126 GENERIC: 0.0
1464 17:59:18.693760 PCI: 00:08.0
1465 17:59:18.704056 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 17:59:18.707028 PCI: 00:0a.0
1467 17:59:18.710739 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 17:59:18.720495 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 17:59:18.723657 USB0 port 0 child on link 0 USB3 port 0
1470 17:59:18.727316 USB3 port 0
1471 17:59:18.727736 USB3 port 1
1472 17:59:18.730698 USB3 port 2
1473 17:59:18.733417 USB3 port 3
1474 17:59:18.737095 PCI: 00:14.0 child on link 0 USB0 port 0
1475 17:59:18.746959 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 17:59:18.750024 USB0 port 0 child on link 0 USB2 port 0
1477 17:59:18.753280 USB2 port 0
1478 17:59:18.753737 USB2 port 1
1479 17:59:18.756805 USB2 port 2
1480 17:59:18.757241 USB2 port 3
1481 17:59:18.760061 USB2 port 4
1482 17:59:18.763348 USB2 port 5
1483 17:59:18.763836 USB2 port 6
1484 17:59:18.766588 USB2 port 7
1485 17:59:18.767075 USB2 port 8
1486 17:59:18.769895 USB2 port 9
1487 17:59:18.770462 USB3 port 0
1488 17:59:18.773063 USB3 port 1
1489 17:59:18.773479 USB3 port 2
1490 17:59:18.776382 USB3 port 3
1491 17:59:18.776859 PCI: 00:14.2
1492 17:59:18.786295 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 17:59:18.799690 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 17:59:18.803347 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 17:59:18.812665 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 17:59:18.816372 GENERIC: 0.0
1497 17:59:18.819529 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 17:59:18.829279 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 17:59:18.832644 I2C: 00:1a
1500 17:59:18.833061 I2C: 00:31
1501 17:59:18.833395 I2C: 00:32
1502 17:59:18.839558 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 17:59:18.849212 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 17:59:18.849636 I2C: 00:10
1505 17:59:18.852788 PCI: 00:15.2
1506 17:59:18.862715 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 17:59:18.863142 PCI: 00:15.3
1508 17:59:18.875674 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 17:59:18.876100 PCI: 00:16.0
1510 17:59:18.885335 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 17:59:18.889038 PCI: 00:19.0
1512 17:59:18.892040 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 17:59:18.902037 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 17:59:18.905206 I2C: 00:15
1515 17:59:18.909036 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 17:59:18.918631 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 17:59:18.928847 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 17:59:18.941798 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 17:59:18.942357 GENERIC: 0.0
1520 17:59:18.945305 PCI: 01:00.0
1521 17:59:18.955330 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 17:59:18.965281 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 17:59:18.975109 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 17:59:18.978765 PCI: 00:1e.0
1525 17:59:18.988512 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 17:59:18.991721 PCI: 00:1e.2 child on link 0 SPI: 00
1527 17:59:19.001659 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 17:59:19.004773 SPI: 00
1529 17:59:19.007847 PCI: 00:1e.3 child on link 0 SPI: 00
1530 17:59:19.018187 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 17:59:19.018775 SPI: 00
1532 17:59:19.024302 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 17:59:19.031177 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 17:59:19.034744 PNP: 0c09.0
1535 17:59:19.041092 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 17:59:19.047697 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 17:59:19.057840 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 17:59:19.064350 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 17:59:19.071132 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 17:59:19.071692 GENERIC: 0.0
1541 17:59:19.074390 GENERIC: 1.0
1542 17:59:19.077429 PCI: 00:1f.3
1543 17:59:19.087250 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 17:59:19.097119 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 17:59:19.097591 PCI: 00:1f.5
1546 17:59:19.107200 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 17:59:19.113762 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 17:59:19.114255 APIC: 00
1549 17:59:19.116891 APIC: 01
1550 17:59:19.117358 APIC: 03
1551 17:59:19.117724 APIC: 05
1552 17:59:19.120214 APIC: 06
1553 17:59:19.120781 APIC: 07
1554 17:59:19.121168 APIC: 02
1555 17:59:19.123525 APIC: 04
1556 17:59:19.127100 Done allocating resources.
1557 17:59:19.133329 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 17:59:19.136766 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 17:59:19.142963 Configure GPIOs for I2S audio on UP4.
1560 17:59:19.149766 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 17:59:19.150192 Enabling resources...
1562 17:59:19.156399 PCI: 00:00.0 subsystem <- 8086/9a12
1563 17:59:19.156849 PCI: 00:00.0 cmd <- 06
1564 17:59:19.159736 PCI: 00:02.0 subsystem <- 8086/9a40
1565 17:59:19.162910 PCI: 00:02.0 cmd <- 03
1566 17:59:19.166434 PCI: 00:04.0 subsystem <- 8086/9a03
1567 17:59:19.169801 PCI: 00:04.0 cmd <- 02
1568 17:59:19.173002 PCI: 00:05.0 subsystem <- 8086/9a19
1569 17:59:19.176158 PCI: 00:05.0 cmd <- 02
1570 17:59:19.179267 PCI: 00:08.0 subsystem <- 8086/9a11
1571 17:59:19.182877 PCI: 00:08.0 cmd <- 06
1572 17:59:19.186001 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 17:59:19.189772 PCI: 00:0d.0 cmd <- 02
1574 17:59:19.192668 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 17:59:19.195910 PCI: 00:14.0 cmd <- 02
1576 17:59:19.198979 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 17:59:19.199415 PCI: 00:14.2 cmd <- 02
1578 17:59:19.206079 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 17:59:19.206709 PCI: 00:14.3 cmd <- 02
1580 17:59:19.212245 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 17:59:19.212663 PCI: 00:15.0 cmd <- 02
1582 17:59:19.215929 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 17:59:19.219002 PCI: 00:15.1 cmd <- 02
1584 17:59:19.222201 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 17:59:19.225710 PCI: 00:15.2 cmd <- 02
1586 17:59:19.229048 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 17:59:19.232519 PCI: 00:15.3 cmd <- 02
1588 17:59:19.235433 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 17:59:19.238793 PCI: 00:16.0 cmd <- 02
1590 17:59:19.242341 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 17:59:19.245356 PCI: 00:19.1 cmd <- 02
1592 17:59:19.248457 PCI: 00:1d.0 bridge ctrl <- 0013
1593 17:59:19.252090 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 17:59:19.255370 PCI: 00:1d.0 cmd <- 06
1595 17:59:19.258456 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 17:59:19.258927 PCI: 00:1e.0 cmd <- 06
1597 17:59:19.265144 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 17:59:19.265706 PCI: 00:1e.2 cmd <- 06
1599 17:59:19.271895 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 17:59:19.272366 PCI: 00:1e.3 cmd <- 02
1601 17:59:19.275346 PCI: 00:1f.0 subsystem <- 8086/a087
1602 17:59:19.278127 PCI: 00:1f.0 cmd <- 407
1603 17:59:19.281565 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 17:59:19.284878 PCI: 00:1f.3 cmd <- 02
1605 17:59:19.288555 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 17:59:19.291769 PCI: 00:1f.5 cmd <- 406
1607 17:59:19.295341 PCI: 01:00.0 cmd <- 02
1608 17:59:19.300038 done.
1609 17:59:19.303045 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 17:59:19.306739 Initializing devices...
1611 17:59:19.309863 Root Device init
1612 17:59:19.313121 Chrome EC: Set SMI mask to 0x0000000000000000
1613 17:59:19.319974 Chrome EC: clear events_b mask to 0x0000000000000000
1614 17:59:19.326511 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 17:59:19.333385 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 17:59:19.339703 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 17:59:19.342999 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 17:59:19.350914 fw_config match found: DB_USB=USB3_ACTIVE
1619 17:59:19.353855 Configure Right Type-C port orientation for retimer
1620 17:59:19.357656 Root Device init finished in 45 msecs
1621 17:59:19.361349 PCI: 00:00.0 init
1622 17:59:19.364925 CPU TDP = 9 Watts
1623 17:59:19.365477 CPU PL1 = 9 Watts
1624 17:59:19.368309 CPU PL2 = 40 Watts
1625 17:59:19.371756 CPU PL4 = 83 Watts
1626 17:59:19.374809 PCI: 00:00.0 init finished in 8 msecs
1627 17:59:19.375236 PCI: 00:02.0 init
1628 17:59:19.377886 GMA: Found VBT in CBFS
1629 17:59:19.381762 GMA: Found valid VBT in CBFS
1630 17:59:19.387977 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 17:59:19.394590 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 17:59:19.398285 PCI: 00:02.0 init finished in 18 msecs
1633 17:59:19.401368 PCI: 00:05.0 init
1634 17:59:19.404717 PCI: 00:05.0 init finished in 0 msecs
1635 17:59:19.408191 PCI: 00:08.0 init
1636 17:59:19.411383 PCI: 00:08.0 init finished in 0 msecs
1637 17:59:19.414747 PCI: 00:14.0 init
1638 17:59:19.417560 PCI: 00:14.0 init finished in 0 msecs
1639 17:59:19.421232 PCI: 00:14.2 init
1640 17:59:19.424541 PCI: 00:14.2 init finished in 0 msecs
1641 17:59:19.427831 PCI: 00:15.0 init
1642 17:59:19.431126 I2C bus 0 version 0x3230302a
1643 17:59:19.434117 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 17:59:19.437801 PCI: 00:15.0 init finished in 6 msecs
1645 17:59:19.438273 PCI: 00:15.1 init
1646 17:59:19.440907 I2C bus 1 version 0x3230302a
1647 17:59:19.444094 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 17:59:19.450894 PCI: 00:15.1 init finished in 6 msecs
1649 17:59:19.451361 PCI: 00:15.2 init
1650 17:59:19.453974 I2C bus 2 version 0x3230302a
1651 17:59:19.457380 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 17:59:19.460719 PCI: 00:15.2 init finished in 6 msecs
1653 17:59:19.464532 PCI: 00:15.3 init
1654 17:59:19.467734 I2C bus 3 version 0x3230302a
1655 17:59:19.470944 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 17:59:19.473948 PCI: 00:15.3 init finished in 6 msecs
1657 17:59:19.477785 PCI: 00:16.0 init
1658 17:59:19.480603 PCI: 00:16.0 init finished in 0 msecs
1659 17:59:19.483786 PCI: 00:19.1 init
1660 17:59:19.487430 I2C bus 5 version 0x3230302a
1661 17:59:19.490443 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 17:59:19.494129 PCI: 00:19.1 init finished in 6 msecs
1663 17:59:19.497436 PCI: 00:1d.0 init
1664 17:59:19.500933 Initializing PCH PCIe bridge.
1665 17:59:19.504038 PCI: 00:1d.0 init finished in 3 msecs
1666 17:59:19.507129 PCI: 00:1f.0 init
1667 17:59:19.510384 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 17:59:19.513945 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 17:59:19.517062 IOAPIC: ID = 0x02
1670 17:59:19.520207 IOAPIC: Dumping registers
1671 17:59:19.520628 reg 0x0000: 0x02000000
1672 17:59:19.523434 reg 0x0001: 0x00770020
1673 17:59:19.526979 reg 0x0002: 0x00000000
1674 17:59:19.530102 PCI: 00:1f.0 init finished in 21 msecs
1675 17:59:19.533751 PCI: 00:1f.2 init
1676 17:59:19.536760 Disabling ACPI via APMC.
1677 17:59:19.540373 APMC done.
1678 17:59:19.543790 PCI: 00:1f.2 init finished in 6 msecs
1679 17:59:19.555206 PCI: 01:00.0 init
1680 17:59:19.558410 PCI: 01:00.0 init finished in 0 msecs
1681 17:59:19.562119 PNP: 0c09.0 init
1682 17:59:19.568600 Google Chrome EC uptime: 8.412 seconds
1683 17:59:19.571874 Google Chrome AP resets since EC boot: 0
1684 17:59:19.575368 Google Chrome most recent AP reset causes:
1685 17:59:19.582001 Google Chrome EC reset flags at last EC boot: reset-pin
1686 17:59:19.585079 PNP: 0c09.0 init finished in 19 msecs
1687 17:59:19.590690 Devices initialized
1688 17:59:19.593929 Show all devs... After init.
1689 17:59:19.597113 Root Device: enabled 1
1690 17:59:19.597578 DOMAIN: 0000: enabled 1
1691 17:59:19.600741 CPU_CLUSTER: 0: enabled 1
1692 17:59:19.604022 PCI: 00:00.0: enabled 1
1693 17:59:19.607402 PCI: 00:02.0: enabled 1
1694 17:59:19.607975 PCI: 00:04.0: enabled 1
1695 17:59:19.610292 PCI: 00:05.0: enabled 1
1696 17:59:19.613914 PCI: 00:06.0: enabled 0
1697 17:59:19.616918 PCI: 00:07.0: enabled 0
1698 17:59:19.617506 PCI: 00:07.1: enabled 0
1699 17:59:19.620739 PCI: 00:07.2: enabled 0
1700 17:59:19.624007 PCI: 00:07.3: enabled 0
1701 17:59:19.627235 PCI: 00:08.0: enabled 1
1702 17:59:19.627656 PCI: 00:09.0: enabled 0
1703 17:59:19.630235 PCI: 00:0a.0: enabled 0
1704 17:59:19.633523 PCI: 00:0d.0: enabled 1
1705 17:59:19.637122 PCI: 00:0d.1: enabled 0
1706 17:59:19.637693 PCI: 00:0d.2: enabled 0
1707 17:59:19.640247 PCI: 00:0d.3: enabled 0
1708 17:59:19.643364 PCI: 00:0e.0: enabled 0
1709 17:59:19.647006 PCI: 00:10.2: enabled 1
1710 17:59:19.647435 PCI: 00:10.6: enabled 0
1711 17:59:19.650187 PCI: 00:10.7: enabled 0
1712 17:59:19.653648 PCI: 00:12.0: enabled 0
1713 17:59:19.654064 PCI: 00:12.6: enabled 0
1714 17:59:19.657090 PCI: 00:13.0: enabled 0
1715 17:59:19.659903 PCI: 00:14.0: enabled 1
1716 17:59:19.663595 PCI: 00:14.1: enabled 0
1717 17:59:19.664015 PCI: 00:14.2: enabled 1
1718 17:59:19.666671 PCI: 00:14.3: enabled 1
1719 17:59:19.669874 PCI: 00:15.0: enabled 1
1720 17:59:19.673459 PCI: 00:15.1: enabled 1
1721 17:59:19.673875 PCI: 00:15.2: enabled 1
1722 17:59:19.676690 PCI: 00:15.3: enabled 1
1723 17:59:19.679718 PCI: 00:16.0: enabled 1
1724 17:59:19.682829 PCI: 00:16.1: enabled 0
1725 17:59:19.683250 PCI: 00:16.2: enabled 0
1726 17:59:19.686613 PCI: 00:16.3: enabled 0
1727 17:59:19.689841 PCI: 00:16.4: enabled 0
1728 17:59:19.693307 PCI: 00:16.5: enabled 0
1729 17:59:19.693883 PCI: 00:17.0: enabled 0
1730 17:59:19.696384 PCI: 00:19.0: enabled 0
1731 17:59:19.699941 PCI: 00:19.1: enabled 1
1732 17:59:19.703319 PCI: 00:19.2: enabled 0
1733 17:59:19.703708 PCI: 00:1c.0: enabled 1
1734 17:59:19.706469 PCI: 00:1c.1: enabled 0
1735 17:59:19.709772 PCI: 00:1c.2: enabled 0
1736 17:59:19.710311 PCI: 00:1c.3: enabled 0
1737 17:59:19.713102 PCI: 00:1c.4: enabled 0
1738 17:59:19.716472 PCI: 00:1c.5: enabled 0
1739 17:59:19.719757 PCI: 00:1c.6: enabled 1
1740 17:59:19.720189 PCI: 00:1c.7: enabled 0
1741 17:59:19.722850 PCI: 00:1d.0: enabled 1
1742 17:59:19.726430 PCI: 00:1d.1: enabled 0
1743 17:59:19.729992 PCI: 00:1d.2: enabled 1
1744 17:59:19.730579 PCI: 00:1d.3: enabled 0
1745 17:59:19.733032 PCI: 00:1e.0: enabled 1
1746 17:59:19.736148 PCI: 00:1e.1: enabled 0
1747 17:59:19.739970 PCI: 00:1e.2: enabled 1
1748 17:59:19.740782 PCI: 00:1e.3: enabled 1
1749 17:59:19.742929 PCI: 00:1f.0: enabled 1
1750 17:59:19.746473 PCI: 00:1f.1: enabled 0
1751 17:59:19.746942 PCI: 00:1f.2: enabled 1
1752 17:59:19.749698 PCI: 00:1f.3: enabled 1
1753 17:59:19.752761 PCI: 00:1f.4: enabled 0
1754 17:59:19.756152 PCI: 00:1f.5: enabled 1
1755 17:59:19.756643 PCI: 00:1f.6: enabled 0
1756 17:59:19.759692 PCI: 00:1f.7: enabled 0
1757 17:59:19.762913 APIC: 00: enabled 1
1758 17:59:19.765964 GENERIC: 0.0: enabled 1
1759 17:59:19.766660 GENERIC: 0.0: enabled 1
1760 17:59:19.769342 GENERIC: 1.0: enabled 1
1761 17:59:19.772284 GENERIC: 0.0: enabled 1
1762 17:59:19.772383 GENERIC: 1.0: enabled 1
1763 17:59:19.775463 USB0 port 0: enabled 1
1764 17:59:19.778966 GENERIC: 0.0: enabled 1
1765 17:59:19.782134 USB0 port 0: enabled 1
1766 17:59:19.782233 GENERIC: 0.0: enabled 1
1767 17:59:19.785874 I2C: 00:1a: enabled 1
1768 17:59:19.789060 I2C: 00:31: enabled 1
1769 17:59:19.789175 I2C: 00:32: enabled 1
1770 17:59:19.792368 I2C: 00:10: enabled 1
1771 17:59:19.795906 I2C: 00:15: enabled 1
1772 17:59:19.796007 GENERIC: 0.0: enabled 0
1773 17:59:19.798811 GENERIC: 1.0: enabled 0
1774 17:59:19.802469 GENERIC: 0.0: enabled 1
1775 17:59:19.805607 SPI: 00: enabled 1
1776 17:59:19.805752 SPI: 00: enabled 1
1777 17:59:19.808601 PNP: 0c09.0: enabled 1
1778 17:59:19.812222 GENERIC: 0.0: enabled 1
1779 17:59:19.812383 USB3 port 0: enabled 1
1780 17:59:19.815243 USB3 port 1: enabled 1
1781 17:59:19.818848 USB3 port 2: enabled 0
1782 17:59:19.818958 USB3 port 3: enabled 0
1783 17:59:19.822054 USB2 port 0: enabled 0
1784 17:59:19.825376 USB2 port 1: enabled 1
1785 17:59:19.828654 USB2 port 2: enabled 1
1786 17:59:19.828763 USB2 port 3: enabled 0
1787 17:59:19.832063 USB2 port 4: enabled 1
1788 17:59:19.835298 USB2 port 5: enabled 0
1789 17:59:19.835413 USB2 port 6: enabled 0
1790 17:59:19.838986 USB2 port 7: enabled 0
1791 17:59:19.842190 USB2 port 8: enabled 0
1792 17:59:19.842283 USB2 port 9: enabled 0
1793 17:59:19.845495 USB3 port 0: enabled 0
1794 17:59:19.848611 USB3 port 1: enabled 1
1795 17:59:19.852311 USB3 port 2: enabled 0
1796 17:59:19.852424 USB3 port 3: enabled 0
1797 17:59:19.855520 GENERIC: 0.0: enabled 1
1798 17:59:19.858595 GENERIC: 1.0: enabled 1
1799 17:59:19.858738 APIC: 01: enabled 1
1800 17:59:19.862043 APIC: 03: enabled 1
1801 17:59:19.865512 APIC: 05: enabled 1
1802 17:59:19.865721 APIC: 06: enabled 1
1803 17:59:19.868681 APIC: 07: enabled 1
1804 17:59:19.868832 APIC: 02: enabled 1
1805 17:59:19.871870 APIC: 04: enabled 1
1806 17:59:19.875446 PCI: 01:00.0: enabled 1
1807 17:59:19.878597 BS: BS_DEV_INIT run times (exec / console): 34 / 536 ms
1808 17:59:19.885401 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1809 17:59:19.888534 ELOG: NV offset 0xf30000 size 0x1000
1810 17:59:19.895952 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1811 17:59:19.902598 ELOG: Event(17) added with size 13 at 2023-10-09 17:59:19 UTC
1812 17:59:19.909396 ELOG: Event(92) added with size 9 at 2023-10-09 17:59:19 UTC
1813 17:59:19.915717 ELOG: Event(93) added with size 9 at 2023-10-09 17:59:19 UTC
1814 17:59:19.922283 ELOG: Event(9E) added with size 10 at 2023-10-09 17:59:19 UTC
1815 17:59:19.929075 ELOG: Event(9F) added with size 14 at 2023-10-09 17:59:19 UTC
1816 17:59:19.935631 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1817 17:59:19.942400 ELOG: Event(A1) added with size 10 at 2023-10-09 17:59:19 UTC
1818 17:59:19.949362 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1819 17:59:19.955342 ELOG: Event(A0) added with size 9 at 2023-10-09 17:59:19 UTC
1820 17:59:19.959244 elog_add_boot_reason: Logged dev mode boot
1821 17:59:19.965572 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1822 17:59:19.966124 Finalize devices...
1823 17:59:19.968573 Devices finalized
1824 17:59:19.975771 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1825 17:59:19.978941 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1826 17:59:19.985379 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1827 17:59:19.988502 ME: HFSTS1 : 0x80030055
1828 17:59:19.995004 ME: HFSTS2 : 0x30280116
1829 17:59:19.998646 ME: HFSTS3 : 0x00000050
1830 17:59:20.001818 ME: HFSTS4 : 0x00004000
1831 17:59:20.008379 ME: HFSTS5 : 0x00000000
1832 17:59:20.011537 ME: HFSTS6 : 0x00400006
1833 17:59:20.015225 ME: Manufacturing Mode : YES
1834 17:59:20.018220 ME: SPI Protection Mode Enabled : NO
1835 17:59:20.025212 ME: FW Partition Table : OK
1836 17:59:20.028367 ME: Bringup Loader Failure : NO
1837 17:59:20.031944 ME: Firmware Init Complete : NO
1838 17:59:20.034869 ME: Boot Options Present : NO
1839 17:59:20.038080 ME: Update In Progress : NO
1840 17:59:20.041708 ME: D0i3 Support : YES
1841 17:59:20.044575 ME: Low Power State Enabled : NO
1842 17:59:20.048400 ME: CPU Replaced : YES
1843 17:59:20.054950 ME: CPU Replacement Valid : YES
1844 17:59:20.057702 ME: Current Working State : 5
1845 17:59:20.061595 ME: Current Operation State : 1
1846 17:59:20.065108 ME: Current Operation Mode : 3
1847 17:59:20.068008 ME: Error Code : 0
1848 17:59:20.071265 ME: Enhanced Debug Mode : NO
1849 17:59:20.074753 ME: CPU Debug Disabled : YES
1850 17:59:20.077848 ME: TXT Support : NO
1851 17:59:20.084603 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1852 17:59:20.094597 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1853 17:59:20.097290 CBFS: 'fallback/slic' not found.
1854 17:59:20.101005 ACPI: Writing ACPI tables at 76b01000.
1855 17:59:20.101470 ACPI: * FACS
1856 17:59:20.104482 ACPI: * DSDT
1857 17:59:20.107856 Ramoops buffer: 0x100000@0x76a00000.
1858 17:59:20.110957 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1859 17:59:20.117966 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1860 17:59:20.120797 Google Chrome EC: version:
1861 17:59:20.124006 ro: voema_v2.0.10114-a447f03e46
1862 17:59:20.127447 rw: voema_v2.0.10114-a447f03e46
1863 17:59:20.127871 running image: 1
1864 17:59:20.133961 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1865 17:59:20.138589 ACPI: * FADT
1866 17:59:20.139056 SCI is IRQ9
1867 17:59:20.145636 ACPI: added table 1/32, length now 40
1868 17:59:20.146241 ACPI: * SSDT
1869 17:59:20.148602 Found 1 CPU(s) with 8 core(s) each.
1870 17:59:20.155140 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1871 17:59:20.158911 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1872 17:59:20.162076 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1873 17:59:20.165067 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1874 17:59:20.171679 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1875 17:59:20.178602 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1876 17:59:20.182290 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1877 17:59:20.188917 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1878 17:59:20.195456 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1879 17:59:20.198605 \_SB.PCI0.RP09: Added StorageD3Enable property
1880 17:59:20.205431 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1881 17:59:20.208368 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1882 17:59:20.214836 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1883 17:59:20.218398 PS2K: Passing 80 keymaps to kernel
1884 17:59:20.224639 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1885 17:59:20.231433 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1886 17:59:20.238056 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1887 17:59:20.244847 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1888 17:59:20.251478 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1889 17:59:20.257973 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1890 17:59:20.265064 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1891 17:59:20.271027 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1892 17:59:20.274472 ACPI: added table 2/32, length now 44
1893 17:59:20.275083 ACPI: * MCFG
1894 17:59:20.281465 ACPI: added table 3/32, length now 48
1895 17:59:20.281882 ACPI: * TPM2
1896 17:59:20.284490 TPM2 log created at 0x769f0000
1897 17:59:20.287623 ACPI: added table 4/32, length now 52
1898 17:59:20.290997 ACPI: * MADT
1899 17:59:20.291562 SCI is IRQ9
1900 17:59:20.294580 ACPI: added table 5/32, length now 56
1901 17:59:20.297906 current = 76b09850
1902 17:59:20.298321 ACPI: * DMAR
1903 17:59:20.301122 ACPI: added table 6/32, length now 60
1904 17:59:20.307595 ACPI: added table 7/32, length now 64
1905 17:59:20.308100 ACPI: * HPET
1906 17:59:20.310769 ACPI: added table 8/32, length now 68
1907 17:59:20.314472 ACPI: done.
1908 17:59:20.314934 ACPI tables: 35216 bytes.
1909 17:59:20.317810 smbios_write_tables: 769ef000
1910 17:59:20.324973 EC returned error result code 3
1911 17:59:20.328525 Couldn't obtain OEM name from CBI
1912 17:59:20.328943 Create SMBIOS type 16
1913 17:59:20.331812 Create SMBIOS type 17
1914 17:59:20.335061 GENERIC: 0.0 (WIFI Device)
1915 17:59:20.338145 SMBIOS tables: 1750 bytes.
1916 17:59:20.341841 Writing table forward entry at 0x00000500
1917 17:59:20.348206 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1918 17:59:20.351316 Writing coreboot table at 0x76b25000
1919 17:59:20.358049 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1920 17:59:20.361070 1. 0000000000001000-000000000009ffff: RAM
1921 17:59:20.367902 2. 00000000000a0000-00000000000fffff: RESERVED
1922 17:59:20.371072 3. 0000000000100000-00000000769eefff: RAM
1923 17:59:20.377870 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1924 17:59:20.381383 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1925 17:59:20.387384 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1926 17:59:20.390493 7. 0000000077000000-000000007fbfffff: RESERVED
1927 17:59:20.397344 8. 00000000c0000000-00000000cfffffff: RESERVED
1928 17:59:20.400959 9. 00000000f8000000-00000000f9ffffff: RESERVED
1929 17:59:20.407551 10. 00000000fb000000-00000000fb000fff: RESERVED
1930 17:59:20.410943 11. 00000000fe000000-00000000fe00ffff: RESERVED
1931 17:59:20.416946 12. 00000000fed80000-00000000fed87fff: RESERVED
1932 17:59:20.420189 13. 00000000fed90000-00000000fed92fff: RESERVED
1933 17:59:20.426921 14. 00000000feda0000-00000000feda1fff: RESERVED
1934 17:59:20.430256 15. 00000000fedc0000-00000000feddffff: RESERVED
1935 17:59:20.433784 16. 0000000100000000-00000002803fffff: RAM
1936 17:59:20.437010 Passing 4 GPIOs to payload:
1937 17:59:20.443567 NAME | PORT | POLARITY | VALUE
1938 17:59:20.447248 lid | undefined | high | high
1939 17:59:20.453653 power | undefined | high | low
1940 17:59:20.460347 oprom | undefined | high | low
1941 17:59:20.463510 EC in RW | 0x000000e5 | high | low
1942 17:59:20.470173 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum c1a3
1943 17:59:20.473550 coreboot table: 1576 bytes.
1944 17:59:20.476876 IMD ROOT 0. 0x76fff000 0x00001000
1945 17:59:20.479844 IMD SMALL 1. 0x76ffe000 0x00001000
1946 17:59:20.483519 FSP MEMORY 2. 0x76c4e000 0x003b0000
1947 17:59:20.486624 VPD 3. 0x76c4d000 0x00000367
1948 17:59:20.493259 RO MCACHE 4. 0x76c4c000 0x00000fdc
1949 17:59:20.496449 CONSOLE 5. 0x76c2c000 0x00020000
1950 17:59:20.499586 FMAP 6. 0x76c2b000 0x00000578
1951 17:59:20.502781 TIME STAMP 7. 0x76c2a000 0x00000910
1952 17:59:20.506400 VBOOT WORK 8. 0x76c16000 0x00014000
1953 17:59:20.509482 ROMSTG STCK 9. 0x76c15000 0x00001000
1954 17:59:20.512933 AFTER CAR 10. 0x76c0a000 0x0000b000
1955 17:59:20.516534 RAMSTAGE 11. 0x76b97000 0x00073000
1956 17:59:20.522965 REFCODE 12. 0x76b42000 0x00055000
1957 17:59:20.525771 SMM BACKUP 13. 0x76b32000 0x00010000
1958 17:59:20.529069 4f444749 14. 0x76b30000 0x00002000
1959 17:59:20.532527 EXT VBT15. 0x76b2d000 0x0000219f
1960 17:59:20.536222 COREBOOT 16. 0x76b25000 0x00008000
1961 17:59:20.539420 ACPI 17. 0x76b01000 0x00024000
1962 17:59:20.542551 ACPI GNVS 18. 0x76b00000 0x00001000
1963 17:59:20.545725 RAMOOPS 19. 0x76a00000 0x00100000
1964 17:59:20.552091 TPM2 TCGLOG20. 0x769f0000 0x00010000
1965 17:59:20.555383 SMBIOS 21. 0x769ef000 0x00000800
1966 17:59:20.555790 IMD small region:
1967 17:59:20.562079 IMD ROOT 0. 0x76ffec00 0x00000400
1968 17:59:20.565672 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1969 17:59:20.568787 POWER STATE 2. 0x76ffeb80 0x00000044
1970 17:59:20.571934 ROMSTAGE 3. 0x76ffeb60 0x00000004
1971 17:59:20.574760 MEM INFO 4. 0x76ffe980 0x000001e0
1972 17:59:20.581679 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1973 17:59:20.585045 MTRR: Physical address space:
1974 17:59:20.591626 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1975 17:59:20.598368 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1976 17:59:20.605297 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1977 17:59:20.612091 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1978 17:59:20.615288 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1979 17:59:20.621992 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1980 17:59:20.628347 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1981 17:59:20.631612 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 17:59:20.638054 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 17:59:20.641698 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 17:59:20.645087 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 17:59:20.648125 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 17:59:20.654721 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 17:59:20.657939 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 17:59:20.661572 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 17:59:20.664648 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 17:59:20.671247 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 17:59:20.674822 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 17:59:20.678127 call enable_fixed_mtrr()
1993 17:59:20.681430 CPU physical address size: 39 bits
1994 17:59:20.684553 MTRR: default type WB/UC MTRR counts: 6/6.
1995 17:59:20.687836 MTRR: UC selected as default type.
1996 17:59:20.694500 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1997 17:59:20.701683 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1998 17:59:20.708416 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1999 17:59:20.714570 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2000 17:59:20.721167 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2001 17:59:20.727456 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2002 17:59:20.727892
2003 17:59:20.728225 MTRR check
2004 17:59:20.731108 Fixed MTRRs : Enabled
2005 17:59:20.734372 Variable MTRRs: Enabled
2006 17:59:20.734925
2007 17:59:20.737471 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 17:59:20.744239 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 17:59:20.747413 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 17:59:20.751254 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 17:59:20.754011 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 17:59:20.757678 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 17:59:20.764157 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 17:59:20.767413 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 17:59:20.770727 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 17:59:20.774190 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 17:59:20.780924 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 17:59:20.787027 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2019 17:59:20.790736 call enable_fixed_mtrr()
2020 17:59:20.794871 Checking cr50 for pending updates
2021 17:59:20.795516 CPU physical address size: 39 bits
2022 17:59:20.801420 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 17:59:20.804916 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 17:59:20.807955 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 17:59:20.811366 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 17:59:20.818170 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 17:59:20.821477 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 17:59:20.824684 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 17:59:20.827781 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 17:59:20.831363 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 17:59:20.838214 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 17:59:20.841370 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 17:59:20.844401 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 17:59:20.851692 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 17:59:20.854517 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 17:59:20.857907 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 17:59:20.861369 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 17:59:20.868124 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 17:59:20.871656 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 17:59:20.874496 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 17:59:20.877724 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 17:59:20.884410 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 17:59:20.887789 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 17:59:20.891411 call enable_fixed_mtrr()
2045 17:59:20.894502 call enable_fixed_mtrr()
2046 17:59:20.897774 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 17:59:20.901317 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 17:59:20.904349 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 17:59:20.911038 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 17:59:20.914199 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 17:59:20.917397 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 17:59:20.920782 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 17:59:20.927235 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 17:59:20.930704 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 17:59:20.934296 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 17:59:20.937311 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 17:59:20.943700 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 17:59:20.947346 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 17:59:20.950441 call enable_fixed_mtrr()
2060 17:59:20.953609 MTRR: Fixed MSR 0x259 0x0000000000000000
2061 17:59:20.957139 MTRR: Fixed MSR 0x268 0x0606060606060606
2062 17:59:20.963794 MTRR: Fixed MSR 0x269 0x0606060606060606
2063 17:59:20.967184 MTRR: Fixed MSR 0x26a 0x0606060606060606
2064 17:59:20.970629 MTRR: Fixed MSR 0x26b 0x0606060606060606
2065 17:59:20.973880 MTRR: Fixed MSR 0x26c 0x0606060606060606
2066 17:59:20.979992 MTRR: Fixed MSR 0x26d 0x0606060606060606
2067 17:59:20.983623 MTRR: Fixed MSR 0x26e 0x0606060606060606
2068 17:59:20.987016 MTRR: Fixed MSR 0x26f 0x0606060606060606
2069 17:59:20.990240 CPU physical address size: 39 bits
2070 17:59:20.994225 call enable_fixed_mtrr()
2071 17:59:20.997616 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 17:59:21.004149 MTRR: Fixed MSR 0x250 0x0606060606060606
2073 17:59:21.007804 MTRR: Fixed MSR 0x258 0x0606060606060606
2074 17:59:21.010720 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 17:59:21.014404 MTRR: Fixed MSR 0x268 0x0606060606060606
2076 17:59:21.020664 MTRR: Fixed MSR 0x269 0x0606060606060606
2077 17:59:21.024381 MTRR: Fixed MSR 0x26a 0x0606060606060606
2078 17:59:21.027410 MTRR: Fixed MSR 0x26b 0x0606060606060606
2079 17:59:21.030848 MTRR: Fixed MSR 0x26c 0x0606060606060606
2080 17:59:21.037163 MTRR: Fixed MSR 0x26d 0x0606060606060606
2081 17:59:21.040171 MTRR: Fixed MSR 0x26e 0x0606060606060606
2082 17:59:21.043905 MTRR: Fixed MSR 0x26f 0x0606060606060606
2083 17:59:21.050636 MTRR: Fixed MSR 0x258 0x0606060606060606
2084 17:59:21.050717 call enable_fixed_mtrr()
2085 17:59:21.056876 MTRR: Fixed MSR 0x259 0x0000000000000000
2086 17:59:21.060465 MTRR: Fixed MSR 0x268 0x0606060606060606
2087 17:59:21.063504 MTRR: Fixed MSR 0x269 0x0606060606060606
2088 17:59:21.066735 MTRR: Fixed MSR 0x26a 0x0606060606060606
2089 17:59:21.073743 MTRR: Fixed MSR 0x26b 0x0606060606060606
2090 17:59:21.076713 MTRR: Fixed MSR 0x26c 0x0606060606060606
2091 17:59:21.080405 MTRR: Fixed MSR 0x26d 0x0606060606060606
2092 17:59:21.083435 MTRR: Fixed MSR 0x26e 0x0606060606060606
2093 17:59:21.086683 MTRR: Fixed MSR 0x26f 0x0606060606060606
2094 17:59:21.093525 CPU physical address size: 39 bits
2095 17:59:21.096579 call enable_fixed_mtrr()
2096 17:59:21.101001 Reading cr50 TPM mode
2097 17:59:21.101088 CPU physical address size: 39 bits
2098 17:59:21.107819 CPU physical address size: 39 bits
2099 17:59:21.111057 CPU physical address size: 39 bits
2100 17:59:21.114372 CPU physical address size: 39 bits
2101 17:59:21.120791 BS: BS_PAYLOAD_LOAD entry times (exec / console): 312 / 6 ms
2102 17:59:21.127408 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2103 17:59:21.130957 Checking segment from ROM address 0xffc02b38
2104 17:59:21.137601 Checking segment from ROM address 0xffc02b54
2105 17:59:21.140921 Loading segment from ROM address 0xffc02b38
2106 17:59:21.144198 code (compression=0)
2107 17:59:21.150451 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2108 17:59:21.160475 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2109 17:59:21.163734 it's not compressed!
2110 17:59:21.302417 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2111 17:59:21.308547 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2112 17:59:21.315541 Loading segment from ROM address 0xffc02b54
2113 17:59:21.318706 Entry Point 0x30000000
2114 17:59:21.319135 Loaded segments
2115 17:59:21.324942 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2116 17:59:21.368173 Finalizing chipset.
2117 17:59:21.371472 Finalizing SMM.
2118 17:59:21.371945 APMC done.
2119 17:59:21.377944 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2120 17:59:21.381571 mp_park_aps done after 0 msecs.
2121 17:59:21.384691 Jumping to boot code at 0x30000000(0x76b25000)
2122 17:59:21.394286 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2123 17:59:21.394838
2124 17:59:21.395267
2125 17:59:21.397858
2126 17:59:21.398273 Starting depthcharge on Voema...
2127 17:59:21.399395 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2128 17:59:21.399910 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2129 17:59:21.400315 Setting prompt string to ['volteer:']
2130 17:59:21.400753 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2131 17:59:21.401651
2132 17:59:21.407892 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2133 17:59:21.408374
2134 17:59:21.414449 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2135 17:59:21.414935
2136 17:59:21.421135 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2137 17:59:21.421578
2138 17:59:21.424334 Failed to find eMMC card reader
2139 17:59:21.424765
2140 17:59:21.425090 Wipe memory regions:
2141 17:59:21.427610
2142 17:59:21.431109 [0x00000000001000, 0x000000000a0000)
2143 17:59:21.431528
2144 17:59:21.433942 [0x00000000100000, 0x00000030000000)
2145 17:59:21.459702
2146 17:59:21.462566 [0x00000032662db0, 0x000000769ef000)
2147 17:59:21.498757
2148 17:59:21.501967 [0x00000100000000, 0x00000280400000)
2149 17:59:21.705861
2150 17:59:21.709447 ec_init: CrosEC protocol v3 supported (256, 256)
2151 17:59:22.141936
2152 17:59:22.142443 R8152: Initializing
2153 17:59:22.142847
2154 17:59:22.144786 Version 6 (ocp_data = 5c30)
2155 17:59:22.145200
2156 17:59:22.148243 R8152: Done initializing
2157 17:59:22.148701
2158 17:59:22.151757 Adding net device
2159 17:59:22.452568
2160 17:59:22.455920 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2161 17:59:22.456340
2162 17:59:22.456668
2163 17:59:22.456991
2164 17:59:22.459333 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2166 17:59:22.560580 volteer: tftpboot 192.168.201.1 11712707/tftp-deploy-2pkod5nn/kernel/bzImage 11712707/tftp-deploy-2pkod5nn/kernel/cmdline 11712707/tftp-deploy-2pkod5nn/ramdisk/ramdisk.cpio.gz
2167 17:59:22.561194 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2168 17:59:22.561683 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2169 17:59:22.565777 tftpboot 192.168.201.1 11712707/tftp-deploy-2pkod5nn/kernel/bzIploy-2pkod5nn/kernel/cmdline 11712707/tftp-deploy-2pkod5nn/ramdisk/ramdisk.cpio.gz
2170 17:59:22.566215
2171 17:59:22.566675 Waiting for link
2172 17:59:22.769810
2173 17:59:22.770086 done.
2174 17:59:22.770277
2175 17:59:22.770483 MAC: 00:24:32:30:77:76
2176 17:59:22.770707
2177 17:59:22.772906 Sending DHCP discover... done.
2178 17:59:22.773144
2179 17:59:22.776346 Waiting for reply... done.
2180 17:59:22.776662
2181 17:59:22.781135 Sending DHCP request... done.
2182 17:59:22.781516
2183 17:59:22.789915 Waiting for reply... done.
2184 17:59:22.790329
2185 17:59:22.790745 My ip is 192.168.201.16
2186 17:59:22.791057
2187 17:59:22.796603 The DHCP server ip is 192.168.201.1
2188 17:59:22.797021
2189 17:59:22.800090 TFTP server IP predefined by user: 192.168.201.1
2190 17:59:22.800507
2191 17:59:22.806023 Bootfile predefined by user: 11712707/tftp-deploy-2pkod5nn/kernel/bzImage
2192 17:59:22.806105
2193 17:59:22.809707 Sending tftp read request... done.
2194 17:59:22.809788
2195 17:59:22.816188 Waiting for the transfer...
2196 17:59:22.816282
2197 17:59:23.466584 00000000 ################################################################
2198 17:59:23.467096
2199 17:59:24.155069 00080000 ################################################################
2200 17:59:24.155669
2201 17:59:24.811556 00100000 ################################################################
2202 17:59:24.812080
2203 17:59:25.448568 00180000 ################################################################
2204 17:59:25.448811
2205 17:59:25.994244 00200000 ################################################################
2206 17:59:25.994421
2207 17:59:26.663325 00280000 ################################################################
2208 17:59:26.663479
2209 17:59:27.234953 00300000 ################################################################
2210 17:59:27.235138
2211 17:59:27.837399 00380000 ################################################################
2212 17:59:27.837985
2213 17:59:28.447062 00400000 ################################################################
2214 17:59:28.447579
2215 17:59:29.099438 00480000 ################################################################
2216 17:59:29.099993
2217 17:59:29.736303 00500000 ################################################################
2218 17:59:29.736484
2219 17:59:30.358710 00580000 ################################################################
2220 17:59:30.359273
2221 17:59:30.997886 00600000 ################################################################
2222 17:59:30.998058
2223 17:59:31.658366 00680000 ################################################################
2224 17:59:31.658968
2225 17:59:32.290446 00700000 ################################################################
2226 17:59:32.290970
2227 17:59:32.940403 00780000 ################################################################
2228 17:59:32.940958
2229 17:59:33.063824 00800000 ############# done.
2230 17:59:33.064324
2231 17:59:33.067661 The bootfile was 8490896 bytes long.
2232 17:59:33.068105
2233 17:59:33.070786 Sending tftp read request... done.
2234 17:59:33.071349
2235 17:59:33.073933 Waiting for the transfer...
2236 17:59:33.074627
2237 17:59:33.649459 00000000 ################################################################
2238 17:59:33.650120
2239 17:59:34.318265 00080000 ################################################################
2240 17:59:34.319006
2241 17:59:34.999070 00100000 ################################################################
2242 17:59:34.999623
2243 17:59:35.695290 00180000 ################################################################
2244 17:59:35.695851
2245 17:59:36.267163 00200000 ################################################################
2246 17:59:36.267337
2247 17:59:36.842229 00280000 ################################################################
2248 17:59:36.842380
2249 17:59:37.461397 00300000 ################################################################
2250 17:59:37.461914
2251 17:59:38.097944 00380000 ################################################################
2252 17:59:38.098462
2253 17:59:38.742209 00400000 ################################################################
2254 17:59:38.742770
2255 17:59:39.402088 00480000 ################################################################
2256 17:59:39.402235
2257 17:59:40.037499 00500000 ############################################################### done.
2258 17:59:40.037645
2259 17:59:40.041274 Sending tftp read request... done.
2260 17:59:40.041357
2261 17:59:40.044317 Waiting for the transfer...
2262 17:59:40.044399
2263 17:59:40.044463 00000000 # done.
2264 17:59:40.044525
2265 17:59:40.053924 Command line loaded dynamically from TFTP file: 11712707/tftp-deploy-2pkod5nn/kernel/cmdline
2266 17:59:40.054007
2267 17:59:40.077418 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11712707/extract-nfsrootfs-bi1japna,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2268 17:59:40.083903
2269 17:59:40.087073 Shutting down all USB controllers.
2270 17:59:40.087503
2271 17:59:40.087940 Removing current net device
2272 17:59:40.088351
2273 17:59:40.090287 Finalizing coreboot
2274 17:59:40.090822
2275 17:59:40.097134 Exiting depthcharge with code 4 at timestamp: 27352911
2276 17:59:40.097565
2277 17:59:40.097997
2278 17:59:40.098407 Starting kernel ...
2279 17:59:40.098850
2280 17:59:40.099247
2281 17:59:40.100572 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2282 17:59:40.101126 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2283 17:59:40.101509 Setting prompt string to ['Linux version [0-9]']
2284 17:59:40.101862 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2285 17:59:40.102203 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2287 18:04:06.101335 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2289 18:04:06.101548 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2291 18:04:06.101712 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2294 18:04:06.101964 end: 2 depthcharge-action (duration 00:05:00) [common]
2296 18:04:06.102178 Cleaning after the job
2297 18:04:06.102270 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712707/tftp-deploy-2pkod5nn/ramdisk
2298 18:04:06.103211 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712707/tftp-deploy-2pkod5nn/kernel
2299 18:04:06.104518 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712707/tftp-deploy-2pkod5nn/nfsrootfs
2300 18:04:06.182623 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712707/tftp-deploy-2pkod5nn/modules
2301 18:04:06.183129 start: 5.1 power-off (timeout 00:00:30) [common]
2302 18:04:06.183322 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2303 18:04:06.260292 >> Command sent successfully.
2304 18:04:06.262792 Returned 0 in 0 seconds
2305 18:04:06.363215 end: 5.1 power-off (duration 00:00:00) [common]
2307 18:04:06.363540 start: 5.2 read-feedback (timeout 00:10:00) [common]
2308 18:04:06.363806 Listened to connection for namespace 'common' for up to 1s
2309 18:04:07.364769 Finalising connection for namespace 'common'
2310 18:04:07.364954 Disconnecting from shell: Finalise
2311 18:04:07.365036
2312 18:04:07.465373 end: 5.2 read-feedback (duration 00:00:01) [common]
2313 18:04:07.465522 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712707
2314 18:04:07.786077 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712707
2315 18:04:07.786312 JobError: Your job cannot terminate cleanly.