Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 18:01:57.654724 lava-dispatcher, installed at version: 2023.08
2 18:01:57.654938 start: 0 validate
3 18:01:57.655067 Start time: 2023-10-09 18:01:57.655059+00:00 (UTC)
4 18:01:57.655184 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:01:57.655316 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 18:01:57.929083 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:01:57.929762 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:01:58.199992 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:01:58.200837 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 18:01:58.471825 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:01:58.472797 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 18:01:58.751145 validate duration: 1.10
14 18:01:58.752458 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:01:58.752953 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:01:58.753416 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:01:58.754023 Not decompressing ramdisk as can be used compressed.
18 18:01:58.754453 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 18:01:58.754794 saving as /var/lib/lava/dispatcher/tmp/11712678/tftp-deploy-04zmianc/ramdisk/initrd.cpio.gz
20 18:01:58.755124 total size: 5432480 (5 MB)
21 18:01:58.760503 progress 0 % (0 MB)
22 18:01:58.769035 progress 5 % (0 MB)
23 18:01:58.774942 progress 10 % (0 MB)
24 18:01:58.778971 progress 15 % (0 MB)
25 18:01:58.782819 progress 20 % (1 MB)
26 18:01:58.785972 progress 25 % (1 MB)
27 18:01:58.788703 progress 30 % (1 MB)
28 18:01:58.791442 progress 35 % (1 MB)
29 18:01:58.793669 progress 40 % (2 MB)
30 18:01:58.795849 progress 45 % (2 MB)
31 18:01:58.797794 progress 50 % (2 MB)
32 18:01:58.799971 progress 55 % (2 MB)
33 18:01:58.801782 progress 60 % (3 MB)
34 18:01:58.803520 progress 65 % (3 MB)
35 18:01:58.805489 progress 70 % (3 MB)
36 18:01:58.807114 progress 75 % (3 MB)
37 18:01:58.808687 progress 80 % (4 MB)
38 18:01:58.810258 progress 85 % (4 MB)
39 18:01:58.811981 progress 90 % (4 MB)
40 18:01:58.813463 progress 95 % (4 MB)
41 18:01:58.814980 progress 100 % (5 MB)
42 18:01:58.815205 5 MB downloaded in 0.06 s (86.20 MB/s)
43 18:01:58.815386 end: 1.1.1 http-download (duration 00:00:00) [common]
45 18:01:58.815696 end: 1.1 download-retry (duration 00:00:00) [common]
46 18:01:58.815793 start: 1.2 download-retry (timeout 00:10:00) [common]
47 18:01:58.815882 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 18:01:58.816019 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 18:01:58.816096 saving as /var/lib/lava/dispatcher/tmp/11712678/tftp-deploy-04zmianc/kernel/bzImage
50 18:01:58.816166 total size: 8490896 (8 MB)
51 18:01:58.816228 No compression specified
52 18:01:58.817357 progress 0 % (0 MB)
53 18:01:58.819587 progress 5 % (0 MB)
54 18:01:58.821974 progress 10 % (0 MB)
55 18:01:58.824310 progress 15 % (1 MB)
56 18:01:58.826566 progress 20 % (1 MB)
57 18:01:58.828855 progress 25 % (2 MB)
58 18:01:58.831114 progress 30 % (2 MB)
59 18:01:58.833386 progress 35 % (2 MB)
60 18:01:58.835725 progress 40 % (3 MB)
61 18:01:58.837999 progress 45 % (3 MB)
62 18:01:58.840329 progress 50 % (4 MB)
63 18:01:58.842612 progress 55 % (4 MB)
64 18:01:58.844947 progress 60 % (4 MB)
65 18:01:58.847146 progress 65 % (5 MB)
66 18:01:58.849422 progress 70 % (5 MB)
67 18:01:58.851634 progress 75 % (6 MB)
68 18:01:58.853867 progress 80 % (6 MB)
69 18:01:58.856136 progress 85 % (6 MB)
70 18:01:58.858350 progress 90 % (7 MB)
71 18:01:58.860625 progress 95 % (7 MB)
72 18:01:58.862920 progress 100 % (8 MB)
73 18:01:58.863038 8 MB downloaded in 0.05 s (172.77 MB/s)
74 18:01:58.863181 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:01:58.863412 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:01:58.863499 start: 1.3 download-retry (timeout 00:10:00) [common]
78 18:01:58.863584 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 18:01:58.863777 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 18:01:58.863853 saving as /var/lib/lava/dispatcher/tmp/11712678/tftp-deploy-04zmianc/nfsrootfs/full.rootfs.tar
81 18:01:58.863915 total size: 207157356 (197 MB)
82 18:01:58.863983 Using unxz to decompress xz
83 18:01:58.868287 progress 0 % (0 MB)
84 18:01:59.419013 progress 5 % (9 MB)
85 18:01:59.945816 progress 10 % (19 MB)
86 18:02:00.557365 progress 15 % (29 MB)
87 18:02:00.920091 progress 20 % (39 MB)
88 18:02:01.285341 progress 25 % (49 MB)
89 18:02:01.892666 progress 30 % (59 MB)
90 18:02:02.442373 progress 35 % (69 MB)
91 18:02:03.048507 progress 40 % (79 MB)
92 18:02:03.608326 progress 45 % (88 MB)
93 18:02:04.197587 progress 50 % (98 MB)
94 18:02:04.834975 progress 55 % (108 MB)
95 18:02:05.527785 progress 60 % (118 MB)
96 18:02:05.665520 progress 65 % (128 MB)
97 18:02:05.804373 progress 70 % (138 MB)
98 18:02:05.897241 progress 75 % (148 MB)
99 18:02:05.966595 progress 80 % (158 MB)
100 18:02:06.035851 progress 85 % (167 MB)
101 18:02:06.135200 progress 90 % (177 MB)
102 18:02:06.419410 progress 95 % (187 MB)
103 18:02:07.017336 progress 100 % (197 MB)
104 18:02:07.023743 197 MB downloaded in 8.16 s (24.21 MB/s)
105 18:02:07.023995 end: 1.3.1 http-download (duration 00:00:08) [common]
107 18:02:07.024263 end: 1.3 download-retry (duration 00:00:08) [common]
108 18:02:07.024356 start: 1.4 download-retry (timeout 00:09:52) [common]
109 18:02:07.024449 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 18:02:07.024599 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 18:02:07.024671 saving as /var/lib/lava/dispatcher/tmp/11712678/tftp-deploy-04zmianc/modules/modules.tar
112 18:02:07.024734 total size: 250868 (0 MB)
113 18:02:07.024800 Using unxz to decompress xz
114 18:02:07.029243 progress 13 % (0 MB)
115 18:02:07.029649 progress 26 % (0 MB)
116 18:02:07.029894 progress 39 % (0 MB)
117 18:02:07.031445 progress 52 % (0 MB)
118 18:02:07.033336 progress 65 % (0 MB)
119 18:02:07.035176 progress 78 % (0 MB)
120 18:02:07.037106 progress 91 % (0 MB)
121 18:02:07.038812 progress 100 % (0 MB)
122 18:02:07.044350 0 MB downloaded in 0.02 s (12.20 MB/s)
123 18:02:07.044589 end: 1.4.1 http-download (duration 00:00:00) [common]
125 18:02:07.044859 end: 1.4 download-retry (duration 00:00:00) [common]
126 18:02:07.044965 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 18:02:07.045067 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 18:02:10.659859 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11712678/extract-nfsrootfs-38_o8s1d
129 18:02:10.660069 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 18:02:10.660171 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
131 18:02:10.660345 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x
132 18:02:10.660494 makedir: /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin
133 18:02:10.660638 makedir: /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/tests
134 18:02:10.660748 makedir: /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/results
135 18:02:10.660853 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-add-keys
136 18:02:10.661002 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-add-sources
137 18:02:10.661136 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-background-process-start
138 18:02:10.661269 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-background-process-stop
139 18:02:10.661397 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-common-functions
140 18:02:10.661523 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-echo-ipv4
141 18:02:10.661650 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-install-packages
142 18:02:10.661778 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-installed-packages
143 18:02:10.661904 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-os-build
144 18:02:10.662030 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-probe-channel
145 18:02:10.662159 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-probe-ip
146 18:02:10.662285 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-target-ip
147 18:02:10.662411 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-target-mac
148 18:02:10.662537 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-target-storage
149 18:02:10.662667 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-test-case
150 18:02:10.662795 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-test-event
151 18:02:10.662922 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-test-feedback
152 18:02:10.663049 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-test-raise
153 18:02:10.663187 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-test-reference
154 18:02:10.663316 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-test-runner
155 18:02:10.663443 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-test-set
156 18:02:10.663571 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-test-shell
157 18:02:10.663735 Updating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-add-keys (debian)
158 18:02:10.663890 Updating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-add-sources (debian)
159 18:02:10.664035 Updating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-install-packages (debian)
160 18:02:10.664177 Updating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-installed-packages (debian)
161 18:02:10.664317 Updating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/bin/lava-os-build (debian)
162 18:02:10.664440 Creating /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/environment
163 18:02:10.664537 LAVA metadata
164 18:02:10.664607 - LAVA_JOB_ID=11712678
165 18:02:10.664672 - LAVA_DISPATCHER_IP=192.168.201.1
166 18:02:10.664774 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
167 18:02:10.664841 skipped lava-vland-overlay
168 18:02:10.664917 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 18:02:10.665012 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
170 18:02:10.665075 skipped lava-multinode-overlay
171 18:02:10.665150 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 18:02:10.665229 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
173 18:02:10.665303 Loading test definitions
174 18:02:10.665396 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
175 18:02:10.665467 Using /lava-11712678 at stage 0
176 18:02:10.665762 uuid=11712678_1.5.2.3.1 testdef=None
177 18:02:10.665851 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 18:02:10.665936 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
179 18:02:10.666400 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 18:02:10.666623 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
182 18:02:10.667194 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 18:02:10.667426 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
185 18:02:10.668165 runner path: /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/0/tests/0_timesync-off test_uuid 11712678_1.5.2.3.1
186 18:02:10.668325 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 18:02:10.668559 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
189 18:02:10.668632 Using /lava-11712678 at stage 0
190 18:02:10.668729 Fetching tests from https://github.com/kernelci/test-definitions.git
191 18:02:10.668809 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/0/tests/1_kselftest-filesystems'
192 18:02:23.661994 Running '/usr/bin/git checkout kernelci.org
193 18:02:23.810009 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
194 18:02:23.810989 uuid=11712678_1.5.2.3.5 testdef=None
195 18:02:23.811186 end: 1.5.2.3.5 git-repo-action (duration 00:00:13) [common]
197 18:02:23.811573 start: 1.5.2.3.6 test-overlay (timeout 00:09:35) [common]
198 18:02:23.812865 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 18:02:23.813242 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:35) [common]
201 18:02:23.814935 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 18:02:23.815185 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:35) [common]
204 18:02:23.816194 runner path: /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/0/tests/1_kselftest-filesystems test_uuid 11712678_1.5.2.3.5
205 18:02:23.816290 BOARD='asus-C436FA-Flip-hatch'
206 18:02:23.816356 BRANCH='cip'
207 18:02:23.816418 SKIPFILE='/dev/null'
208 18:02:23.816478 SKIP_INSTALL='True'
209 18:02:23.816536 TESTPROG_URL='None'
210 18:02:23.816594 TST_CASENAME=''
211 18:02:23.816654 TST_CMDFILES='filesystems'
212 18:02:23.816803 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 18:02:23.817013 Creating lava-test-runner.conf files
215 18:02:23.817079 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712678/lava-overlay-_hu21q8x/lava-11712678/0 for stage 0
216 18:02:23.817177 - 0_timesync-off
217 18:02:23.817247 - 1_kselftest-filesystems
218 18:02:23.817469 end: 1.5.2.3 test-definition (duration 00:00:13) [common]
219 18:02:23.817659 start: 1.5.2.4 compress-overlay (timeout 00:09:35) [common]
220 18:02:31.297158 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
221 18:02:31.297320 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:27) [common]
222 18:02:31.297447 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 18:02:31.297549 end: 1.5.2 lava-overlay (duration 00:00:21) [common]
224 18:02:31.297642 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:27) [common]
225 18:02:31.435160 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 18:02:31.435559 start: 1.5.4 extract-modules (timeout 00:09:27) [common]
227 18:02:31.435734 extracting modules file /var/lib/lava/dispatcher/tmp/11712678/tftp-deploy-04zmianc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712678/extract-nfsrootfs-38_o8s1d
228 18:02:31.449301 extracting modules file /var/lib/lava/dispatcher/tmp/11712678/tftp-deploy-04zmianc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712678/extract-overlay-ramdisk-p6o6uoso/ramdisk
229 18:02:31.462930 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 18:02:31.463065 start: 1.5.5 apply-overlay-tftp (timeout 00:09:27) [common]
231 18:02:31.463155 [common] Applying overlay to NFS
232 18:02:31.463231 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712678/compress-overlay-wyrxjc82/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712678/extract-nfsrootfs-38_o8s1d
233 18:02:32.391810 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 18:02:32.391986 start: 1.5.6 configure-preseed-file (timeout 00:09:26) [common]
235 18:02:32.392083 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 18:02:32.392173 start: 1.5.7 compress-ramdisk (timeout 00:09:26) [common]
237 18:02:32.392261 Building ramdisk /var/lib/lava/dispatcher/tmp/11712678/extract-overlay-ramdisk-p6o6uoso/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712678/extract-overlay-ramdisk-p6o6uoso/ramdisk
238 18:02:32.462454 >> 26159 blocks
239 18:02:32.997687 rename /var/lib/lava/dispatcher/tmp/11712678/extract-overlay-ramdisk-p6o6uoso/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712678/tftp-deploy-04zmianc/ramdisk/ramdisk.cpio.gz
240 18:02:32.998196 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 18:02:32.998353 start: 1.5.8 prepare-kernel (timeout 00:09:26) [common]
242 18:02:32.998502 start: 1.5.8.1 prepare-fit (timeout 00:09:26) [common]
243 18:02:32.998632 No mkimage arch provided, not using FIT.
244 18:02:32.998763 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 18:02:32.998860 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 18:02:32.998977 end: 1.5 prepare-tftp-overlay (duration 00:00:26) [common]
247 18:02:32.999079 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:26) [common]
248 18:02:32.999196 No LXC device requested
249 18:02:32.999314 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 18:02:32.999436 start: 1.7 deploy-device-env (timeout 00:09:26) [common]
251 18:02:32.999558 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 18:02:32.999680 Checking files for TFTP limit of 4294967296 bytes.
253 18:02:33.000249 end: 1 tftp-deploy (duration 00:00:34) [common]
254 18:02:33.000397 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 18:02:33.000527 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 18:02:33.000696 substitutions:
257 18:02:33.000771 - {DTB}: None
258 18:02:33.000845 - {INITRD}: 11712678/tftp-deploy-04zmianc/ramdisk/ramdisk.cpio.gz
259 18:02:33.000910 - {KERNEL}: 11712678/tftp-deploy-04zmianc/kernel/bzImage
260 18:02:33.000970 - {LAVA_MAC}: None
261 18:02:33.001070 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11712678/extract-nfsrootfs-38_o8s1d
262 18:02:33.001162 - {NFS_SERVER_IP}: 192.168.201.1
263 18:02:33.001255 - {PRESEED_CONFIG}: None
264 18:02:33.001342 - {PRESEED_LOCAL}: None
265 18:02:33.001441 - {RAMDISK}: 11712678/tftp-deploy-04zmianc/ramdisk/ramdisk.cpio.gz
266 18:02:33.001530 - {ROOT_PART}: None
267 18:02:33.001622 - {ROOT}: None
268 18:02:33.001709 - {SERVER_IP}: 192.168.201.1
269 18:02:33.001794 - {TEE}: None
270 18:02:33.001879 Parsed boot commands:
271 18:02:33.001963 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 18:02:33.002182 Parsed boot commands: tftpboot 192.168.201.1 11712678/tftp-deploy-04zmianc/kernel/bzImage 11712678/tftp-deploy-04zmianc/kernel/cmdline 11712678/tftp-deploy-04zmianc/ramdisk/ramdisk.cpio.gz
273 18:02:33.002299 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 18:02:33.002416 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 18:02:33.002543 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 18:02:33.002659 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 18:02:33.002761 Not connected, no need to disconnect.
278 18:02:33.002866 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 18:02:33.002982 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 18:02:33.003076 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
281 18:02:33.007290 Setting prompt string to ['lava-test: # ']
282 18:02:33.007692 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 18:02:33.007803 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 18:02:33.007909 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 18:02:33.008009 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 18:02:33.008202 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
287 18:02:38.160550 >> Command sent successfully.
288 18:02:38.172522 Returned 0 in 5 seconds
289 18:02:38.273840 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 18:02:38.275369 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 18:02:38.276001 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 18:02:38.276535 Setting prompt string to 'Starting depthcharge on Helios...'
294 18:02:38.276899 Changing prompt to 'Starting depthcharge on Helios...'
295 18:02:38.277334 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 18:02:38.278661 [Enter `^Ec?' for help]
297 18:02:38.885956
298 18:02:38.886601
299 18:02:38.895823 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 18:02:38.898990 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 18:02:38.906129 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 18:02:38.909149 CPU: AES supported, TXT NOT supported, VT supported
303 18:02:38.916207 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 18:02:38.918973 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 18:02:38.925986 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 18:02:38.928976 VBOOT: Loading verstage.
307 18:02:38.932326 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 18:02:38.939009 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 18:02:38.942309 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 18:02:38.945328 CBFS @ c08000 size 3f8000
311 18:02:38.952193 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 18:02:38.955324 CBFS: Locating 'fallback/verstage'
313 18:02:38.958504 CBFS: Found @ offset 10fb80 size 1072c
314 18:02:38.961894
315 18:02:38.962323
316 18:02:38.972235 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 18:02:38.986308 Probing TPM: . done!
318 18:02:38.989965 TPM ready after 0 ms
319 18:02:38.993116 Connected to device vid:did:rid of 1ae0:0028:00
320 18:02:39.003542 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 18:02:39.006617 Initialized TPM device CR50 revision 0
322 18:02:39.051219 tlcl_send_startup: Startup return code is 0
323 18:02:39.051852 TPM: setup succeeded
324 18:02:39.063913 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 18:02:39.067731 Chrome EC: UHEPI supported
326 18:02:39.071136 Phase 1
327 18:02:39.074365 FMAP: area GBB found @ c05000 (12288 bytes)
328 18:02:39.080651 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 18:02:39.081127 Phase 2
330 18:02:39.084752 Phase 3
331 18:02:39.087621 FMAP: area GBB found @ c05000 (12288 bytes)
332 18:02:39.094026 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 18:02:39.101550 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
334 18:02:39.104206 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
335 18:02:39.110806 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 18:02:39.126368 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
337 18:02:39.129720 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
338 18:02:39.136589 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 18:02:39.140924 Phase 4
340 18:02:39.144570 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
341 18:02:39.150732 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 18:02:39.330449 VB2:vb2_rsa_verify_digest() Digest check failed!
343 18:02:39.336455 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 18:02:39.337022 Saving nvdata
345 18:02:39.340412 Reboot requested (10020007)
346 18:02:39.343344 board_reset() called!
347 18:02:39.344092 full_reset() called!
348 18:02:43.853583
349 18:02:43.854169
350 18:02:43.862845 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 18:02:43.866212 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 18:02:43.873115 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 18:02:43.876640 CPU: AES supported, TXT NOT supported, VT supported
354 18:02:43.883397 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 18:02:43.886388 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 18:02:43.892997 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 18:02:43.896156 VBOOT: Loading verstage.
358 18:02:43.900046 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 18:02:43.906502 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 18:02:43.909327 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 18:02:43.913173 CBFS @ c08000 size 3f8000
362 18:02:43.919451 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 18:02:43.923261 CBFS: Locating 'fallback/verstage'
364 18:02:43.926246 CBFS: Found @ offset 10fb80 size 1072c
365 18:02:43.929553
366 18:02:43.930109
367 18:02:43.939577 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 18:02:43.953800 Probing TPM: . done!
369 18:02:43.957506 TPM ready after 0 ms
370 18:02:43.960693 Connected to device vid:did:rid of 1ae0:0028:00
371 18:02:43.971012 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
372 18:02:43.974440 Initialized TPM device CR50 revision 0
373 18:02:44.018916 tlcl_send_startup: Startup return code is 0
374 18:02:44.019491 TPM: setup succeeded
375 18:02:44.032082 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 18:02:44.035870 Chrome EC: UHEPI supported
377 18:02:44.038911 Phase 1
378 18:02:44.042394 FMAP: area GBB found @ c05000 (12288 bytes)
379 18:02:44.049299 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 18:02:44.055605 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 18:02:44.058960 Recovery requested (1009000e)
382 18:02:44.064663 Saving nvdata
383 18:02:44.071062 tlcl_extend: response is 0
384 18:02:44.079315 tlcl_extend: response is 0
385 18:02:44.086756 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 18:02:44.089813 CBFS @ c08000 size 3f8000
387 18:02:44.096274 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 18:02:44.099915 CBFS: Locating 'fallback/romstage'
389 18:02:44.103538 CBFS: Found @ offset 80 size 145fc
390 18:02:44.106317 Accumulated console time in verstage 98 ms
391 18:02:44.106749
392 18:02:44.107158
393 18:02:44.119798 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 18:02:44.126507 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 18:02:44.129371 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 18:02:44.132616 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 18:02:44.139740 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 18:02:44.143387 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 18:02:44.146015 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
400 18:02:44.149466 TCO_STS: 0000 0000
401 18:02:44.152655 GEN_PMCON: e0015238 00000200
402 18:02:44.155992 GBLRST_CAUSE: 00000000 00000000
403 18:02:44.156524 prev_sleep_state 5
404 18:02:44.159285 Boot Count incremented to 66020
405 18:02:44.166524 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 18:02:44.169594 CBFS @ c08000 size 3f8000
407 18:02:44.176676 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 18:02:44.177156 CBFS: Locating 'fspm.bin'
409 18:02:44.183058 CBFS: Found @ offset 5ffc0 size 71000
410 18:02:44.186136 Chrome EC: UHEPI supported
411 18:02:44.192746 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 18:02:44.196360 Probing TPM: done!
413 18:02:44.202973 Connected to device vid:did:rid of 1ae0:0028:00
414 18:02:44.212777 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
415 18:02:44.218320 Initialized TPM device CR50 revision 0
416 18:02:44.227316 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 18:02:44.234174 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 18:02:44.237335 MRC cache found, size 1948
419 18:02:44.241269 bootmode is set to: 2
420 18:02:44.244353 PRMRR disabled by config.
421 18:02:44.244846 SPD INDEX = 1
422 18:02:44.250631 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 18:02:44.254344 CBFS @ c08000 size 3f8000
424 18:02:44.260744 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 18:02:44.261364 CBFS: Locating 'spd.bin'
426 18:02:44.263945 CBFS: Found @ offset 5fb80 size 400
427 18:02:44.267612 SPD: module type is LPDDR3
428 18:02:44.270705 SPD: module part is
429 18:02:44.277484 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 18:02:44.280687 SPD: device width 4 bits, bus width 8 bits
431 18:02:44.284075 SPD: module size is 4096 MB (per channel)
432 18:02:44.287000 memory slot: 0 configuration done.
433 18:02:44.290441 memory slot: 2 configuration done.
434 18:02:44.342925 CBMEM:
435 18:02:44.346051 IMD: root @ 99fff000 254 entries.
436 18:02:44.349191 IMD: root @ 99ffec00 62 entries.
437 18:02:44.352257 External stage cache:
438 18:02:44.356236 IMD: root @ 9abff000 254 entries.
439 18:02:44.359158 IMD: root @ 9abfec00 62 entries.
440 18:02:44.362391 Chrome EC: clear events_b mask to 0x0000000020004000
441 18:02:44.378455 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 18:02:44.391589 tlcl_write: response is 0
443 18:02:44.401088 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 18:02:44.407239 MRC: TPM MRC hash updated successfully.
445 18:02:44.407713 2 DIMMs found
446 18:02:44.410811 SMM Memory Map
447 18:02:44.414219 SMRAM : 0x9a000000 0x1000000
448 18:02:44.417236 Subregion 0: 0x9a000000 0xa00000
449 18:02:44.420830 Subregion 1: 0x9aa00000 0x200000
450 18:02:44.423905 Subregion 2: 0x9ac00000 0x400000
451 18:02:44.427322 top_of_ram = 0x9a000000
452 18:02:44.430780 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 18:02:44.437063 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 18:02:44.440355 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 18:02:44.446962 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 18:02:44.450285 CBFS @ c08000 size 3f8000
457 18:02:44.453911 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 18:02:44.457217 CBFS: Locating 'fallback/postcar'
459 18:02:44.463854 CBFS: Found @ offset 107000 size 4b44
460 18:02:44.467097 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 18:02:44.479427 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 18:02:44.482627 Processing 180 relocs. Offset value of 0x97c0c000
463 18:02:44.491558 Accumulated console time in romstage 286 ms
464 18:02:44.492040
465 18:02:44.492419
466 18:02:44.501333 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 18:02:44.507830 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 18:02:44.511374 CBFS @ c08000 size 3f8000
469 18:02:44.518095 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 18:02:44.521006 CBFS: Locating 'fallback/ramstage'
471 18:02:44.524467 CBFS: Found @ offset 43380 size 1b9e8
472 18:02:44.531228 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 18:02:44.563455 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 18:02:44.566588 Processing 3976 relocs. Offset value of 0x98db0000
475 18:02:44.573542 Accumulated console time in postcar 52 ms
476 18:02:44.574100
477 18:02:44.574596
478 18:02:44.583265 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 18:02:44.589915 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 18:02:44.593126 WARNING: RO_VPD is uninitialized or empty.
481 18:02:44.596304 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 18:02:44.603053 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 18:02:44.603486 Normal boot.
484 18:02:44.609893 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 18:02:44.613178 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 18:02:44.616337 CBFS @ c08000 size 3f8000
487 18:02:44.623267 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 18:02:44.626469 CBFS: Locating 'cpu_microcode_blob.bin'
489 18:02:44.629620 CBFS: Found @ offset 14700 size 2ec00
490 18:02:44.632711 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 18:02:44.636548 Skip microcode update
492 18:02:44.642994 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 18:02:44.643568 CBFS @ c08000 size 3f8000
494 18:02:44.649540 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 18:02:44.652695 CBFS: Locating 'fsps.bin'
496 18:02:44.656259 CBFS: Found @ offset d1fc0 size 35000
497 18:02:44.681737 Detected 4 core, 8 thread CPU.
498 18:02:44.684928 Setting up SMI for CPU
499 18:02:44.688089 IED base = 0x9ac00000
500 18:02:44.688516 IED size = 0x00400000
501 18:02:44.691421 Will perform SMM setup.
502 18:02:44.698140 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 18:02:44.704825 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 18:02:44.708215 Processing 16 relocs. Offset value of 0x00030000
505 18:02:44.711722 Attempting to start 7 APs
506 18:02:44.714898 Waiting for 10ms after sending INIT.
507 18:02:44.731296 Waiting for 1st SIPI to complete...done.
508 18:02:44.731775 AP: slot 2 apic_id 1.
509 18:02:44.737757 Waiting for 2nd SIPI to complete...done.
510 18:02:44.738216 AP: slot 3 apic_id 2.
511 18:02:44.741444 AP: slot 1 apic_id 3.
512 18:02:44.744480 AP: slot 4 apic_id 6.
513 18:02:44.744913 AP: slot 5 apic_id 7.
514 18:02:44.748207 AP: slot 6 apic_id 5.
515 18:02:44.751391 AP: slot 7 apic_id 4.
516 18:02:44.757974 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 18:02:44.761226 Processing 13 relocs. Offset value of 0x00038000
518 18:02:44.767714 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 18:02:44.774422 Installing SMM handler to 0x9a000000
520 18:02:44.781144 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 18:02:44.784220 Processing 658 relocs. Offset value of 0x9a010000
522 18:02:44.794232 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 18:02:44.797665 Processing 13 relocs. Offset value of 0x9a008000
524 18:02:44.804471 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 18:02:44.811241 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 18:02:44.814133 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 18:02:44.821200 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 18:02:44.827974 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 18:02:44.834491 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 18:02:44.837684 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 18:02:44.843916 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 18:02:44.847786 Clearing SMI status registers
533 18:02:44.851029 SMI_STS: PM1
534 18:02:44.851455 PM1_STS: PWRBTN
535 18:02:44.854207 TCO_STS: SECOND_TO
536 18:02:44.857121 New SMBASE 0x9a000000
537 18:02:44.860865 In relocation handler: CPU 0
538 18:02:44.864172 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 18:02:44.867549 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 18:02:44.870576 Relocation complete.
541 18:02:44.873920 New SMBASE 0x99fff800
542 18:02:44.874349 In relocation handler: CPU 2
543 18:02:44.880982 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
544 18:02:44.884279 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 18:02:44.887358 Relocation complete.
546 18:02:44.891151 New SMBASE 0x99fff400
547 18:02:44.891584 In relocation handler: CPU 3
548 18:02:44.897314 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
549 18:02:44.900613 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 18:02:44.904205 Relocation complete.
551 18:02:44.904637 New SMBASE 0x99fffc00
552 18:02:44.907334 In relocation handler: CPU 1
553 18:02:44.913881 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
554 18:02:44.917265 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 18:02:44.920725 Relocation complete.
556 18:02:44.921151 New SMBASE 0x99ffe800
557 18:02:44.923989 In relocation handler: CPU 6
558 18:02:44.927013 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
559 18:02:44.933929 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 18:02:44.936980 Relocation complete.
561 18:02:44.937407 New SMBASE 0x99ffe400
562 18:02:44.940732 In relocation handler: CPU 7
563 18:02:44.943985 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
564 18:02:44.950309 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 18:02:44.953922 Relocation complete.
566 18:02:44.954491 New SMBASE 0x99fff000
567 18:02:44.957267 In relocation handler: CPU 4
568 18:02:44.960269 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
569 18:02:44.967159 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 18:02:44.967591 Relocation complete.
571 18:02:44.970173 New SMBASE 0x99ffec00
572 18:02:44.973843 In relocation handler: CPU 5
573 18:02:44.977075 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
574 18:02:44.984229 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 18:02:44.984834 Relocation complete.
576 18:02:44.987377 Initializing CPU #0
577 18:02:44.990373 CPU: vendor Intel device 806ec
578 18:02:44.993313 CPU: family 06, model 8e, stepping 0c
579 18:02:44.997223 Clearing out pending MCEs
580 18:02:45.000229 Setting up local APIC...
581 18:02:45.000659 apic_id: 0x00 done.
582 18:02:45.003620 Turbo is available but hidden
583 18:02:45.006575 Turbo is available and visible
584 18:02:45.010335 VMX status: enabled
585 18:02:45.013576 IA32_FEATURE_CONTROL status: locked
586 18:02:45.016742 Skip microcode update
587 18:02:45.017174 CPU #0 initialized
588 18:02:45.020301 Initializing CPU #2
589 18:02:45.023552 Initializing CPU #6
590 18:02:45.024017 Initializing CPU #7
591 18:02:45.026448 CPU: vendor Intel device 806ec
592 18:02:45.030213 CPU: family 06, model 8e, stepping 0c
593 18:02:45.033523 CPU: vendor Intel device 806ec
594 18:02:45.036472 CPU: family 06, model 8e, stepping 0c
595 18:02:45.040377 Clearing out pending MCEs
596 18:02:45.043302 Clearing out pending MCEs
597 18:02:45.046488 Setting up local APIC...
598 18:02:45.049622 CPU: vendor Intel device 806ec
599 18:02:45.053006 CPU: family 06, model 8e, stepping 0c
600 18:02:45.056755 Clearing out pending MCEs
601 18:02:45.057184 Initializing CPU #4
602 18:02:45.060487 Initializing CPU #5
603 18:02:45.063158 Setting up local APIC...
604 18:02:45.063592 apic_id: 0x05 done.
605 18:02:45.066538 Setting up local APIC...
606 18:02:45.069952 CPU: vendor Intel device 806ec
607 18:02:45.073147 CPU: family 06, model 8e, stepping 0c
608 18:02:45.076309 CPU: vendor Intel device 806ec
609 18:02:45.079622 CPU: family 06, model 8e, stepping 0c
610 18:02:45.082642 Clearing out pending MCEs
611 18:02:45.086060 Clearing out pending MCEs
612 18:02:45.089364 Setting up local APIC...
613 18:02:45.089800 apic_id: 0x04 done.
614 18:02:45.092585 VMX status: enabled
615 18:02:45.093022 VMX status: enabled
616 18:02:45.099529 IA32_FEATURE_CONTROL status: locked
617 18:02:45.102856 IA32_FEATURE_CONTROL status: locked
618 18:02:45.103290 Skip microcode update
619 18:02:45.105990 Initializing CPU #1
620 18:02:45.106421 Initializing CPU #3
621 18:02:45.109751 CPU: vendor Intel device 806ec
622 18:02:45.115760 CPU: family 06, model 8e, stepping 0c
623 18:02:45.119521 CPU: vendor Intel device 806ec
624 18:02:45.122660 CPU: family 06, model 8e, stepping 0c
625 18:02:45.123097 Clearing out pending MCEs
626 18:02:45.125802 Clearing out pending MCEs
627 18:02:45.129410 Setting up local APIC...
628 18:02:45.132807 apic_id: 0x01 done.
629 18:02:45.133240 apic_id: 0x02 done.
630 18:02:45.135689 Setting up local APIC...
631 18:02:45.139616 VMX status: enabled
632 18:02:45.140097 apic_id: 0x03 done.
633 18:02:45.142329 VMX status: enabled
634 18:02:45.146253 VMX status: enabled
635 18:02:45.149416 IA32_FEATURE_CONTROL status: locked
636 18:02:45.152618 IA32_FEATURE_CONTROL status: locked
637 18:02:45.153056 Skip microcode update
638 18:02:45.155562 Skip microcode update
639 18:02:45.159234 CPU #3 initialized
640 18:02:45.159708 CPU #1 initialized
641 18:02:45.162550 apic_id: 0x07 done.
642 18:02:45.166013 Setting up local APIC...
643 18:02:45.169303 IA32_FEATURE_CONTROL status: locked
644 18:02:45.169741 Skip microcode update
645 18:02:45.172383 CPU #6 initialized
646 18:02:45.175375 CPU #7 initialized
647 18:02:45.175870 VMX status: enabled
648 18:02:45.179081 apic_id: 0x06 done.
649 18:02:45.182381 IA32_FEATURE_CONTROL status: locked
650 18:02:45.186042 VMX status: enabled
651 18:02:45.186516 Skip microcode update
652 18:02:45.189322 IA32_FEATURE_CONTROL status: locked
653 18:02:45.192293 CPU #5 initialized
654 18:02:45.195452 Skip microcode update
655 18:02:45.195941 Skip microcode update
656 18:02:45.198843 CPU #4 initialized
657 18:02:45.199279 CPU #2 initialized
658 18:02:45.205695 bsp_do_flight_plan done after 466 msecs.
659 18:02:45.209275 CPU: frequency set to 4200 MHz
660 18:02:45.209712 Enabling SMIs.
661 18:02:45.212324 Locking SMM.
662 18:02:45.225408 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 18:02:45.228591 CBFS @ c08000 size 3f8000
664 18:02:45.235838 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 18:02:45.236281 CBFS: Locating 'vbt.bin'
666 18:02:45.238605 CBFS: Found @ offset 5f5c0 size 499
667 18:02:45.245532 Found a VBT of 4608 bytes after decompression
668 18:02:45.426179 Display FSP Version Info HOB
669 18:02:45.429751 Reference Code - CPU = 9.0.1e.30
670 18:02:45.433233 uCode Version = 0.0.0.ca
671 18:02:45.436108 TXT ACM version = ff.ff.ff.ffff
672 18:02:45.439283 Display FSP Version Info HOB
673 18:02:45.443126 Reference Code - ME = 9.0.1e.30
674 18:02:45.446308 MEBx version = 0.0.0.0
675 18:02:45.449360 ME Firmware Version = Consumer SKU
676 18:02:45.453059 Display FSP Version Info HOB
677 18:02:45.456163 Reference Code - CML PCH = 9.0.1e.30
678 18:02:45.459255 PCH-CRID Status = Disabled
679 18:02:45.462815 PCH-CRID Original Value = ff.ff.ff.ffff
680 18:02:45.465799 PCH-CRID New Value = ff.ff.ff.ffff
681 18:02:45.469594 OPROM - RST - RAID = ff.ff.ff.ffff
682 18:02:45.472797 ChipsetInit Base Version = ff.ff.ff.ffff
683 18:02:45.476136 ChipsetInit Oem Version = ff.ff.ff.ffff
684 18:02:45.479284 Display FSP Version Info HOB
685 18:02:45.486173 Reference Code - SA - System Agent = 9.0.1e.30
686 18:02:45.489370 Reference Code - MRC = 0.7.1.6c
687 18:02:45.489823 SA - PCIe Version = 9.0.1e.30
688 18:02:45.492564 SA-CRID Status = Disabled
689 18:02:45.495703 SA-CRID Original Value = 0.0.0.c
690 18:02:45.498920 SA-CRID New Value = 0.0.0.c
691 18:02:45.502174 OPROM - VBIOS = ff.ff.ff.ffff
692 18:02:45.505709 RTC Init
693 18:02:45.509077 Set power on after power failure.
694 18:02:45.509514 Disabling Deep S3
695 18:02:45.512393 Disabling Deep S3
696 18:02:45.512830 Disabling Deep S4
697 18:02:45.515381 Disabling Deep S4
698 18:02:45.515880 Disabling Deep S5
699 18:02:45.519093 Disabling Deep S5
700 18:02:45.525614 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
701 18:02:45.526046 Enumerating buses...
702 18:02:45.532021 Show all devs... Before device enumeration.
703 18:02:45.532503 Root Device: enabled 1
704 18:02:45.535319 CPU_CLUSTER: 0: enabled 1
705 18:02:45.538971 DOMAIN: 0000: enabled 1
706 18:02:45.541904 APIC: 00: enabled 1
707 18:02:45.542337 PCI: 00:00.0: enabled 1
708 18:02:45.545617 PCI: 00:02.0: enabled 1
709 18:02:45.548623 PCI: 00:04.0: enabled 0
710 18:02:45.552112 PCI: 00:05.0: enabled 0
711 18:02:45.552545 PCI: 00:12.0: enabled 1
712 18:02:45.555062 PCI: 00:12.5: enabled 0
713 18:02:45.558734 PCI: 00:12.6: enabled 0
714 18:02:45.562205 PCI: 00:14.0: enabled 1
715 18:02:45.562637 PCI: 00:14.1: enabled 0
716 18:02:45.565401 PCI: 00:14.3: enabled 1
717 18:02:45.568455 PCI: 00:14.5: enabled 0
718 18:02:45.568885 PCI: 00:15.0: enabled 1
719 18:02:45.571597 PCI: 00:15.1: enabled 1
720 18:02:45.575371 PCI: 00:15.2: enabled 0
721 18:02:45.578551 PCI: 00:15.3: enabled 0
722 18:02:45.578987 PCI: 00:16.0: enabled 1
723 18:02:45.581935 PCI: 00:16.1: enabled 0
724 18:02:45.584905 PCI: 00:16.2: enabled 0
725 18:02:45.588526 PCI: 00:16.3: enabled 0
726 18:02:45.589047 PCI: 00:16.4: enabled 0
727 18:02:45.591543 PCI: 00:16.5: enabled 0
728 18:02:45.594928 PCI: 00:17.0: enabled 1
729 18:02:45.598495 PCI: 00:19.0: enabled 1
730 18:02:45.598928 PCI: 00:19.1: enabled 0
731 18:02:45.601799 PCI: 00:19.2: enabled 0
732 18:02:45.605004 PCI: 00:1a.0: enabled 0
733 18:02:45.605443 PCI: 00:1c.0: enabled 0
734 18:02:45.608336 PCI: 00:1c.1: enabled 0
735 18:02:45.611900 PCI: 00:1c.2: enabled 0
736 18:02:45.614802 PCI: 00:1c.3: enabled 0
737 18:02:45.615237 PCI: 00:1c.4: enabled 0
738 18:02:45.618523 PCI: 00:1c.5: enabled 0
739 18:02:45.621647 PCI: 00:1c.6: enabled 0
740 18:02:45.624794 PCI: 00:1c.7: enabled 0
741 18:02:45.625225 PCI: 00:1d.0: enabled 1
742 18:02:45.627862 PCI: 00:1d.1: enabled 0
743 18:02:45.631181 PCI: 00:1d.2: enabled 0
744 18:02:45.634896 PCI: 00:1d.3: enabled 0
745 18:02:45.635332 PCI: 00:1d.4: enabled 0
746 18:02:45.637826 PCI: 00:1d.5: enabled 1
747 18:02:45.641353 PCI: 00:1e.0: enabled 1
748 18:02:45.644820 PCI: 00:1e.1: enabled 0
749 18:02:45.645250 PCI: 00:1e.2: enabled 1
750 18:02:45.648126 PCI: 00:1e.3: enabled 1
751 18:02:45.651233 PCI: 00:1f.0: enabled 1
752 18:02:45.651703 PCI: 00:1f.1: enabled 1
753 18:02:45.654418 PCI: 00:1f.2: enabled 1
754 18:02:45.657495 PCI: 00:1f.3: enabled 1
755 18:02:45.661208 PCI: 00:1f.4: enabled 1
756 18:02:45.661642 PCI: 00:1f.5: enabled 1
757 18:02:45.664281 PCI: 00:1f.6: enabled 0
758 18:02:45.668192 USB0 port 0: enabled 1
759 18:02:45.668732 I2C: 00:15: enabled 1
760 18:02:45.671120 I2C: 00:5d: enabled 1
761 18:02:45.674275 GENERIC: 0.0: enabled 1
762 18:02:45.677683 I2C: 00:1a: enabled 1
763 18:02:45.678116 I2C: 00:38: enabled 1
764 18:02:45.681055 I2C: 00:39: enabled 1
765 18:02:45.684434 I2C: 00:3a: enabled 1
766 18:02:45.684869 I2C: 00:3b: enabled 1
767 18:02:45.687719 PCI: 00:00.0: enabled 1
768 18:02:45.690833 SPI: 00: enabled 1
769 18:02:45.691269 SPI: 01: enabled 1
770 18:02:45.694278 PNP: 0c09.0: enabled 1
771 18:02:45.697483 USB2 port 0: enabled 1
772 18:02:45.697922 USB2 port 1: enabled 1
773 18:02:45.701268 USB2 port 2: enabled 0
774 18:02:45.704409 USB2 port 3: enabled 0
775 18:02:45.704839 USB2 port 5: enabled 0
776 18:02:45.707442 USB2 port 6: enabled 1
777 18:02:45.710660 USB2 port 9: enabled 1
778 18:02:45.713733 USB3 port 0: enabled 1
779 18:02:45.714040 USB3 port 1: enabled 1
780 18:02:45.717540 USB3 port 2: enabled 1
781 18:02:45.720751 USB3 port 3: enabled 1
782 18:02:45.720983 USB3 port 4: enabled 0
783 18:02:45.723679 APIC: 03: enabled 1
784 18:02:45.727116 APIC: 01: enabled 1
785 18:02:45.727272 APIC: 02: enabled 1
786 18:02:45.730540 APIC: 06: enabled 1
787 18:02:45.730720 APIC: 07: enabled 1
788 18:02:45.733981 APIC: 05: enabled 1
789 18:02:45.737206 APIC: 04: enabled 1
790 18:02:45.737325 Compare with tree...
791 18:02:45.740526 Root Device: enabled 1
792 18:02:45.743584 CPU_CLUSTER: 0: enabled 1
793 18:02:45.746792 APIC: 00: enabled 1
794 18:02:45.746896 APIC: 03: enabled 1
795 18:02:45.750140 APIC: 01: enabled 1
796 18:02:45.753833 APIC: 02: enabled 1
797 18:02:45.753918 APIC: 06: enabled 1
798 18:02:45.757045 APIC: 07: enabled 1
799 18:02:45.760633 APIC: 05: enabled 1
800 18:02:45.760718 APIC: 04: enabled 1
801 18:02:45.763544 DOMAIN: 0000: enabled 1
802 18:02:45.767135 PCI: 00:00.0: enabled 1
803 18:02:45.770313 PCI: 00:02.0: enabled 1
804 18:02:45.770400 PCI: 00:04.0: enabled 0
805 18:02:45.773443 PCI: 00:05.0: enabled 0
806 18:02:45.777294 PCI: 00:12.0: enabled 1
807 18:02:45.780353 PCI: 00:12.5: enabled 0
808 18:02:45.780438 PCI: 00:12.6: enabled 0
809 18:02:45.783515 PCI: 00:14.0: enabled 1
810 18:02:45.786992 USB0 port 0: enabled 1
811 18:02:45.790398 USB2 port 0: enabled 1
812 18:02:45.794189 USB2 port 1: enabled 1
813 18:02:45.794281 USB2 port 2: enabled 0
814 18:02:45.797227 USB2 port 3: enabled 0
815 18:02:45.800612 USB2 port 5: enabled 0
816 18:02:45.803535 USB2 port 6: enabled 1
817 18:02:45.807403 USB2 port 9: enabled 1
818 18:02:45.810584 USB3 port 0: enabled 1
819 18:02:45.811013 USB3 port 1: enabled 1
820 18:02:45.814398 USB3 port 2: enabled 1
821 18:02:45.817682 USB3 port 3: enabled 1
822 18:02:45.820636 USB3 port 4: enabled 0
823 18:02:45.823913 PCI: 00:14.1: enabled 0
824 18:02:45.827039 PCI: 00:14.3: enabled 1
825 18:02:45.827517 PCI: 00:14.5: enabled 0
826 18:02:45.830303 PCI: 00:15.0: enabled 1
827 18:02:45.833382 I2C: 00:15: enabled 1
828 18:02:45.837056 PCI: 00:15.1: enabled 1
829 18:02:45.837541 I2C: 00:5d: enabled 1
830 18:02:45.840466 GENERIC: 0.0: enabled 1
831 18:02:45.844013 PCI: 00:15.2: enabled 0
832 18:02:45.846665 PCI: 00:15.3: enabled 0
833 18:02:45.850431 PCI: 00:16.0: enabled 1
834 18:02:45.850866 PCI: 00:16.1: enabled 0
835 18:02:45.853717 PCI: 00:16.2: enabled 0
836 18:02:45.856813 PCI: 00:16.3: enabled 0
837 18:02:45.860106 PCI: 00:16.4: enabled 0
838 18:02:45.863635 PCI: 00:16.5: enabled 0
839 18:02:45.864111 PCI: 00:17.0: enabled 1
840 18:02:45.867014 PCI: 00:19.0: enabled 1
841 18:02:45.870309 I2C: 00:1a: enabled 1
842 18:02:45.873132 I2C: 00:38: enabled 1
843 18:02:45.873564 I2C: 00:39: enabled 1
844 18:02:45.876585 I2C: 00:3a: enabled 1
845 18:02:45.880228 I2C: 00:3b: enabled 1
846 18:02:45.883319 PCI: 00:19.1: enabled 0
847 18:02:45.886317 PCI: 00:19.2: enabled 0
848 18:02:45.886400 PCI: 00:1a.0: enabled 0
849 18:02:45.889368 PCI: 00:1c.0: enabled 0
850 18:02:45.893051 PCI: 00:1c.1: enabled 0
851 18:02:45.896235 PCI: 00:1c.2: enabled 0
852 18:02:45.899412 PCI: 00:1c.3: enabled 0
853 18:02:45.899508 PCI: 00:1c.4: enabled 0
854 18:02:45.902566 PCI: 00:1c.5: enabled 0
855 18:02:45.906177 PCI: 00:1c.6: enabled 0
856 18:02:45.909550 PCI: 00:1c.7: enabled 0
857 18:02:45.912842 PCI: 00:1d.0: enabled 1
858 18:02:45.912967 PCI: 00:1d.1: enabled 0
859 18:02:45.915891 PCI: 00:1d.2: enabled 0
860 18:02:45.919513 PCI: 00:1d.3: enabled 0
861 18:02:45.922557 PCI: 00:1d.4: enabled 0
862 18:02:45.926025 PCI: 00:1d.5: enabled 1
863 18:02:45.926181 PCI: 00:00.0: enabled 1
864 18:02:45.929136 PCI: 00:1e.0: enabled 1
865 18:02:45.932523 PCI: 00:1e.1: enabled 0
866 18:02:45.935567 PCI: 00:1e.2: enabled 1
867 18:02:45.935809 SPI: 00: enabled 1
868 18:02:45.939451 PCI: 00:1e.3: enabled 1
869 18:02:45.942766 SPI: 01: enabled 1
870 18:02:45.945794 PCI: 00:1f.0: enabled 1
871 18:02:45.946100 PNP: 0c09.0: enabled 1
872 18:02:45.949373 PCI: 00:1f.1: enabled 1
873 18:02:45.952884 PCI: 00:1f.2: enabled 1
874 18:02:45.955942 PCI: 00:1f.3: enabled 1
875 18:02:45.959444 PCI: 00:1f.4: enabled 1
876 18:02:45.959984 PCI: 00:1f.5: enabled 1
877 18:02:45.962562 PCI: 00:1f.6: enabled 0
878 18:02:45.965719 Root Device scanning...
879 18:02:45.969101 scan_static_bus for Root Device
880 18:02:45.972786 CPU_CLUSTER: 0 enabled
881 18:02:45.973218 DOMAIN: 0000 enabled
882 18:02:45.975932 DOMAIN: 0000 scanning...
883 18:02:45.979567 PCI: pci_scan_bus for bus 00
884 18:02:45.982419 PCI: 00:00.0 [8086/0000] ops
885 18:02:45.985794 PCI: 00:00.0 [8086/9b61] enabled
886 18:02:45.989228 PCI: 00:02.0 [8086/0000] bus ops
887 18:02:45.992292 PCI: 00:02.0 [8086/9b41] enabled
888 18:02:45.995820 PCI: 00:04.0 [8086/1903] disabled
889 18:02:45.999392 PCI: 00:08.0 [8086/1911] enabled
890 18:02:46.002743 PCI: 00:12.0 [8086/02f9] enabled
891 18:02:46.005928 PCI: 00:14.0 [8086/0000] bus ops
892 18:02:46.008968 PCI: 00:14.0 [8086/02ed] enabled
893 18:02:46.012602 PCI: 00:14.2 [8086/02ef] enabled
894 18:02:46.015751 PCI: 00:14.3 [8086/02f0] enabled
895 18:02:46.018984 PCI: 00:15.0 [8086/0000] bus ops
896 18:02:46.022253 PCI: 00:15.0 [8086/02e8] enabled
897 18:02:46.025405 PCI: 00:15.1 [8086/0000] bus ops
898 18:02:46.028620 PCI: 00:15.1 [8086/02e9] enabled
899 18:02:46.032390 PCI: 00:16.0 [8086/0000] ops
900 18:02:46.035315 PCI: 00:16.0 [8086/02e0] enabled
901 18:02:46.038826 PCI: 00:17.0 [8086/0000] ops
902 18:02:46.042160 PCI: 00:17.0 [8086/02d3] enabled
903 18:02:46.045481 PCI: 00:19.0 [8086/0000] bus ops
904 18:02:46.048449 PCI: 00:19.0 [8086/02c5] enabled
905 18:02:46.052066 PCI: 00:1d.0 [8086/0000] bus ops
906 18:02:46.055499 PCI: 00:1d.0 [8086/02b0] enabled
907 18:02:46.061755 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 18:02:46.065303 PCI: 00:1e.0 [8086/0000] ops
909 18:02:46.068340 PCI: 00:1e.0 [8086/02a8] enabled
910 18:02:46.071995 PCI: 00:1e.2 [8086/0000] bus ops
911 18:02:46.075204 PCI: 00:1e.2 [8086/02aa] enabled
912 18:02:46.078375 PCI: 00:1e.3 [8086/0000] bus ops
913 18:02:46.081572 PCI: 00:1e.3 [8086/02ab] enabled
914 18:02:46.085213 PCI: 00:1f.0 [8086/0000] bus ops
915 18:02:46.088615 PCI: 00:1f.0 [8086/0284] enabled
916 18:02:46.091500 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 18:02:46.098278 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 18:02:46.101744 PCI: 00:1f.3 [8086/0000] bus ops
919 18:02:46.105319 PCI: 00:1f.3 [8086/02c8] enabled
920 18:02:46.108027 PCI: 00:1f.4 [8086/0000] bus ops
921 18:02:46.111626 PCI: 00:1f.4 [8086/02a3] enabled
922 18:02:46.114578 PCI: 00:1f.5 [8086/0000] bus ops
923 18:02:46.118372 PCI: 00:1f.5 [8086/02a4] enabled
924 18:02:46.121560 PCI: Leftover static devices:
925 18:02:46.122161 PCI: 00:05.0
926 18:02:46.124811 PCI: 00:12.5
927 18:02:46.125277 PCI: 00:12.6
928 18:02:46.128068 PCI: 00:14.1
929 18:02:46.128549 PCI: 00:14.5
930 18:02:46.129000 PCI: 00:15.2
931 18:02:46.131227 PCI: 00:15.3
932 18:02:46.131748 PCI: 00:16.1
933 18:02:46.135006 PCI: 00:16.2
934 18:02:46.135474 PCI: 00:16.3
935 18:02:46.136014 PCI: 00:16.4
936 18:02:46.138274 PCI: 00:16.5
937 18:02:46.138714 PCI: 00:19.1
938 18:02:46.141452 PCI: 00:19.2
939 18:02:46.141894 PCI: 00:1a.0
940 18:02:46.142371 PCI: 00:1c.0
941 18:02:46.144476 PCI: 00:1c.1
942 18:02:46.144920 PCI: 00:1c.2
943 18:02:46.147877 PCI: 00:1c.3
944 18:02:46.148310 PCI: 00:1c.4
945 18:02:46.151606 PCI: 00:1c.5
946 18:02:46.152062 PCI: 00:1c.6
947 18:02:46.152405 PCI: 00:1c.7
948 18:02:46.154763 PCI: 00:1d.1
949 18:02:46.155190 PCI: 00:1d.2
950 18:02:46.158410 PCI: 00:1d.3
951 18:02:46.158934 PCI: 00:1d.4
952 18:02:46.159385 PCI: 00:1d.5
953 18:02:46.161363 PCI: 00:1e.1
954 18:02:46.161839 PCI: 00:1f.1
955 18:02:46.164878 PCI: 00:1f.2
956 18:02:46.165319 PCI: 00:1f.6
957 18:02:46.167685 PCI: Check your devicetree.cb.
958 18:02:46.171279 PCI: 00:02.0 scanning...
959 18:02:46.174572 scan_generic_bus for PCI: 00:02.0
960 18:02:46.178135 scan_generic_bus for PCI: 00:02.0 done
961 18:02:46.184475 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
962 18:02:46.187583 PCI: 00:14.0 scanning...
963 18:02:46.190873 scan_static_bus for PCI: 00:14.0
964 18:02:46.191351 USB0 port 0 enabled
965 18:02:46.194546 USB0 port 0 scanning...
966 18:02:46.197686 scan_static_bus for USB0 port 0
967 18:02:46.200971 USB2 port 0 enabled
968 18:02:46.201442 USB2 port 1 enabled
969 18:02:46.204542 USB2 port 2 disabled
970 18:02:46.207843 USB2 port 3 disabled
971 18:02:46.208290 USB2 port 5 disabled
972 18:02:46.210640 USB2 port 6 enabled
973 18:02:46.211083 USB2 port 9 enabled
974 18:02:46.214406 USB3 port 0 enabled
975 18:02:46.217476 USB3 port 1 enabled
976 18:02:46.217948 USB3 port 2 enabled
977 18:02:46.221099 USB3 port 3 enabled
978 18:02:46.224359 USB3 port 4 disabled
979 18:02:46.224800 USB2 port 0 scanning...
980 18:02:46.227554 scan_static_bus for USB2 port 0
981 18:02:46.230627 scan_static_bus for USB2 port 0 done
982 18:02:46.237784 scan_bus: scanning of bus USB2 port 0 took 9697 usecs
983 18:02:46.240912 USB2 port 1 scanning...
984 18:02:46.244244 scan_static_bus for USB2 port 1
985 18:02:46.247413 scan_static_bus for USB2 port 1 done
986 18:02:46.254240 scan_bus: scanning of bus USB2 port 1 took 9692 usecs
987 18:02:46.254670 USB2 port 6 scanning...
988 18:02:46.257381 scan_static_bus for USB2 port 6
989 18:02:46.264100 scan_static_bus for USB2 port 6 done
990 18:02:46.267140 scan_bus: scanning of bus USB2 port 6 took 9701 usecs
991 18:02:46.270411 USB2 port 9 scanning...
992 18:02:46.274051 scan_static_bus for USB2 port 9
993 18:02:46.276995 scan_static_bus for USB2 port 9 done
994 18:02:46.284083 scan_bus: scanning of bus USB2 port 9 took 9687 usecs
995 18:02:46.284520 USB3 port 0 scanning...
996 18:02:46.286934 scan_static_bus for USB3 port 0
997 18:02:46.293826 scan_static_bus for USB3 port 0 done
998 18:02:46.296816 scan_bus: scanning of bus USB3 port 0 took 9686 usecs
999 18:02:46.300678 USB3 port 1 scanning...
1000 18:02:46.303867 scan_static_bus for USB3 port 1
1001 18:02:46.307112 scan_static_bus for USB3 port 1 done
1002 18:02:46.313652 scan_bus: scanning of bus USB3 port 1 took 9693 usecs
1003 18:02:46.314096 USB3 port 2 scanning...
1004 18:02:46.317149 scan_static_bus for USB3 port 2
1005 18:02:46.323820 scan_static_bus for USB3 port 2 done
1006 18:02:46.327062 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
1007 18:02:46.330074 USB3 port 3 scanning...
1008 18:02:46.333606 scan_static_bus for USB3 port 3
1009 18:02:46.337166 scan_static_bus for USB3 port 3 done
1010 18:02:46.343597 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
1011 18:02:46.346836 scan_static_bus for USB0 port 0 done
1012 18:02:46.353185 scan_bus: scanning of bus USB0 port 0 took 155276 usecs
1013 18:02:46.357055 scan_static_bus for PCI: 00:14.0 done
1014 18:02:46.360194 scan_bus: scanning of bus PCI: 00:14.0 took 172898 usecs
1015 18:02:46.363377 PCI: 00:15.0 scanning...
1016 18:02:46.366522 scan_generic_bus for PCI: 00:15.0
1017 18:02:46.370088 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 18:02:46.376786 scan_generic_bus for PCI: 00:15.0 done
1019 18:02:46.379559 scan_bus: scanning of bus PCI: 00:15.0 took 14293 usecs
1020 18:02:46.383016 PCI: 00:15.1 scanning...
1021 18:02:46.386486 scan_generic_bus for PCI: 00:15.1
1022 18:02:46.389512 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 18:02:46.396611 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 18:02:46.399418 scan_generic_bus for PCI: 00:15.1 done
1025 18:02:46.406420 scan_bus: scanning of bus PCI: 00:15.1 took 18633 usecs
1026 18:02:46.407175 PCI: 00:19.0 scanning...
1027 18:02:46.409384 scan_generic_bus for PCI: 00:19.0
1028 18:02:46.416681 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 18:02:46.419809 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 18:02:46.422699 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 18:02:46.426332 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 18:02:46.432889 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 18:02:46.436347 scan_generic_bus for PCI: 00:19.0 done
1034 18:02:46.442642 scan_bus: scanning of bus PCI: 00:19.0 took 30732 usecs
1035 18:02:46.443289 PCI: 00:1d.0 scanning...
1036 18:02:46.446273 do_pci_scan_bridge for PCI: 00:1d.0
1037 18:02:46.449054 PCI: pci_scan_bus for bus 01
1038 18:02:46.452544 PCI: 01:00.0 [1c5c/1327] enabled
1039 18:02:46.459385 Enabling Common Clock Configuration
1040 18:02:46.462547 L1 Sub-State supported from root port 29
1041 18:02:46.465721 L1 Sub-State Support = 0xf
1042 18:02:46.465960 CommonModeRestoreTime = 0x28
1043 18:02:46.472273 Power On Value = 0x16, Power On Scale = 0x0
1044 18:02:46.472513 ASPM: Enabled L1
1045 18:02:46.478948 scan_bus: scanning of bus PCI: 00:1d.0 took 32780 usecs
1046 18:02:46.482158 PCI: 00:1e.2 scanning...
1047 18:02:46.485785 scan_generic_bus for PCI: 00:1e.2
1048 18:02:46.488731 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 18:02:46.492216 scan_generic_bus for PCI: 00:1e.2 done
1050 18:02:46.498763 scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs
1051 18:02:46.501905 PCI: 00:1e.3 scanning...
1052 18:02:46.505487 scan_generic_bus for PCI: 00:1e.3
1053 18:02:46.508888 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 18:02:46.512344 scan_generic_bus for PCI: 00:1e.3 done
1055 18:02:46.518831 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1056 18:02:46.521975 PCI: 00:1f.0 scanning...
1057 18:02:46.525024 scan_static_bus for PCI: 00:1f.0
1058 18:02:46.525103 PNP: 0c09.0 enabled
1059 18:02:46.528738 scan_static_bus for PCI: 00:1f.0 done
1060 18:02:46.535092 scan_bus: scanning of bus PCI: 00:1f.0 took 12049 usecs
1061 18:02:46.538484 PCI: 00:1f.3 scanning...
1062 18:02:46.545413 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1063 18:02:46.545490 PCI: 00:1f.4 scanning...
1064 18:02:46.548702 scan_generic_bus for PCI: 00:1f.4
1065 18:02:46.554855 scan_generic_bus for PCI: 00:1f.4 done
1066 18:02:46.558650 scan_bus: scanning of bus PCI: 00:1f.4 took 10175 usecs
1067 18:02:46.561738 PCI: 00:1f.5 scanning...
1068 18:02:46.565165 scan_generic_bus for PCI: 00:1f.5
1069 18:02:46.568557 scan_generic_bus for PCI: 00:1f.5 done
1070 18:02:46.575024 scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs
1071 18:02:46.581838 scan_bus: scanning of bus DOMAIN: 0000 took 604857 usecs
1072 18:02:46.585010 scan_static_bus for Root Device done
1073 18:02:46.591760 scan_bus: scanning of bus Root Device took 624730 usecs
1074 18:02:46.591838 done
1075 18:02:46.594856 Chrome EC: UHEPI supported
1076 18:02:46.601686 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 18:02:46.604624 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 18:02:46.611173 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 18:02:46.618869 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 18:02:46.622254 SPI flash protection: WPSW=0 SRP0=0
1081 18:02:46.628595 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 18:02:46.631604 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1083 18:02:46.635472 found VGA at PCI: 00:02.0
1084 18:02:46.638570 Setting up VGA for PCI: 00:02.0
1085 18:02:46.644814 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 18:02:46.648585 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 18:02:46.651910 Allocating resources...
1088 18:02:46.655021 Reading resources...
1089 18:02:46.658079 Root Device read_resources bus 0 link: 0
1090 18:02:46.661746 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 18:02:46.668397 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 18:02:46.671539 DOMAIN: 0000 read_resources bus 0 link: 0
1093 18:02:46.679066 PCI: 00:14.0 read_resources bus 0 link: 0
1094 18:02:46.681923 USB0 port 0 read_resources bus 0 link: 0
1095 18:02:46.690649 USB0 port 0 read_resources bus 0 link: 0 done
1096 18:02:46.693494 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 18:02:46.700744 PCI: 00:15.0 read_resources bus 1 link: 0
1098 18:02:46.704186 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 18:02:46.710680 PCI: 00:15.1 read_resources bus 2 link: 0
1100 18:02:46.714430 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 18:02:46.721603 PCI: 00:19.0 read_resources bus 3 link: 0
1102 18:02:46.728117 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 18:02:46.731531 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 18:02:46.738360 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 18:02:46.741520 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 18:02:46.748680 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 18:02:46.751704 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 18:02:46.758595 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 18:02:46.761662 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 18:02:46.768451 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 18:02:46.774888 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 18:02:46.778063 Root Device read_resources bus 0 link: 0 done
1113 18:02:46.781303 Done reading resources.
1114 18:02:46.785132 Show resources in subtree (Root Device)...After reading.
1115 18:02:46.791295 Root Device child on link 0 CPU_CLUSTER: 0
1116 18:02:46.794658 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 18:02:46.795086 APIC: 00
1118 18:02:46.797786 APIC: 03
1119 18:02:46.798212 APIC: 01
1120 18:02:46.801580 APIC: 02
1121 18:02:46.802008 APIC: 06
1122 18:02:46.802351 APIC: 07
1123 18:02:46.804935 APIC: 05
1124 18:02:46.805362 APIC: 04
1125 18:02:46.808293 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 18:02:46.864109 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 18:02:46.864240 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 18:02:46.866012 PCI: 00:00.0
1129 18:02:46.866290 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 18:02:46.866368 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 18:02:46.866438 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 18:02:46.914010 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 18:02:46.914287 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 18:02:46.914901 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 18:02:46.915647 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 18:02:46.916114 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 18:02:46.916190 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 18:02:46.924418 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 18:02:46.931378 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 18:02:46.941584 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 18:02:46.950826 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 18:02:46.961491 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 18:02:46.971086 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 18:02:46.980775 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 18:02:46.981024 PCI: 00:02.0
1146 18:02:46.991527 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 18:02:47.001460 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 18:02:47.010893 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 18:02:47.011444 PCI: 00:04.0
1150 18:02:47.014503 PCI: 00:08.0
1151 18:02:47.024278 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 18:02:47.024905 PCI: 00:12.0
1153 18:02:47.034393 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 18:02:47.041063 PCI: 00:14.0 child on link 0 USB0 port 0
1155 18:02:47.051246 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 18:02:47.054459 USB0 port 0 child on link 0 USB2 port 0
1157 18:02:47.054887 USB2 port 0
1158 18:02:47.057752 USB2 port 1
1159 18:02:47.061084 USB2 port 2
1160 18:02:47.061514 USB2 port 3
1161 18:02:47.063926 USB2 port 5
1162 18:02:47.064350 USB2 port 6
1163 18:02:47.067703 USB2 port 9
1164 18:02:47.068145 USB3 port 0
1165 18:02:47.070715 USB3 port 1
1166 18:02:47.071138 USB3 port 2
1167 18:02:47.074009 USB3 port 3
1168 18:02:47.074586 USB3 port 4
1169 18:02:47.077742 PCI: 00:14.2
1170 18:02:47.087353 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 18:02:47.097092 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 18:02:47.097523 PCI: 00:14.3
1173 18:02:47.107179 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 18:02:47.113444 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 18:02:47.123414 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 18:02:47.123983 I2C: 01:15
1177 18:02:47.127227 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 18:02:47.137249 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 18:02:47.140282 I2C: 02:5d
1180 18:02:47.140711 GENERIC: 0.0
1181 18:02:47.143510 PCI: 00:16.0
1182 18:02:47.153466 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 18:02:47.154037 PCI: 00:17.0
1184 18:02:47.163225 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 18:02:47.173582 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 18:02:47.179900 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 18:02:47.189583 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 18:02:47.196515 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 18:02:47.206271 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 18:02:47.209539 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 18:02:47.219838 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 18:02:47.223044 I2C: 03:1a
1193 18:02:47.223575 I2C: 03:38
1194 18:02:47.226395 I2C: 03:39
1195 18:02:47.226834 I2C: 03:3a
1196 18:02:47.229954 I2C: 03:3b
1197 18:02:47.232764 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 18:02:47.243003 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 18:02:47.253270 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 18:02:47.259550 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 18:02:47.262749 PCI: 01:00.0
1202 18:02:47.272536 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 18:02:47.273014 PCI: 00:1e.0
1204 18:02:47.285834 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 18:02:47.295520 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 18:02:47.299057 PCI: 00:1e.2 child on link 0 SPI: 00
1207 18:02:47.309070 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 18:02:47.309583 SPI: 00
1209 18:02:47.315842 PCI: 00:1e.3 child on link 0 SPI: 01
1210 18:02:47.325514 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 18:02:47.326057 SPI: 01
1212 18:02:47.328682 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 18:02:47.339200 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 18:02:47.348624 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 18:02:47.349189 PNP: 0c09.0
1216 18:02:47.358912 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 18:02:47.359497 PCI: 00:1f.3
1218 18:02:47.368975 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 18:02:47.379036 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 18:02:47.381787 PCI: 00:1f.4
1221 18:02:47.391845 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 18:02:47.398581 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 18:02:47.401586 PCI: 00:1f.5
1224 18:02:47.411550 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 18:02:47.418102 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 18:02:47.424936 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 18:02:47.431807 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 18:02:47.434899 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 18:02:47.438216 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 18:02:47.441018 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 18:02:47.444708 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 18:02:47.451359 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 18:02:47.457912 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 18:02:47.464842 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 18:02:47.474453 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 18:02:47.481465 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 18:02:47.484696 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 18:02:47.494217 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 18:02:47.497829 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 18:02:47.501159 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 18:02:47.508025 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 18:02:47.511295 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 18:02:47.517543 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 18:02:47.520860 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 18:02:47.527438 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 18:02:47.530850 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 18:02:47.537413 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 18:02:47.540449 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 18:02:47.547630 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 18:02:47.550182 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 18:02:47.557355 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 18:02:47.560780 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 18:02:47.566869 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 18:02:47.570462 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 18:02:47.573697 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 18:02:47.579913 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 18:02:47.583677 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 18:02:47.590073 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 18:02:47.593940 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 18:02:47.600179 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 18:02:47.603327 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 18:02:47.613607 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 18:02:47.616816 avoid_fixed_resources: DOMAIN: 0000
1264 18:02:47.623031 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 18:02:47.626995 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 18:02:47.636408 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 18:02:47.643199 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 18:02:47.649784 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 18:02:47.659844 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 18:02:47.666485 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 18:02:47.672928 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 18:02:47.682892 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 18:02:47.689159 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 18:02:47.696294 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 18:02:47.702624 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 18:02:47.705833 Setting resources...
1277 18:02:47.712831 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 18:02:47.716158 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 18:02:47.719367 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 18:02:47.725707 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 18:02:47.729307 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 18:02:47.735705 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 18:02:47.742224 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 18:02:47.748859 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 18:02:47.755275 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 18:02:47.759156 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 18:02:47.765390 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 18:02:47.768797 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 18:02:47.775413 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 18:02:47.778842 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 18:02:47.785348 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 18:02:47.788651 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 18:02:47.795037 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 18:02:47.798878 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 18:02:47.804922 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 18:02:47.808243 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 18:02:47.815559 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 18:02:47.818615 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 18:02:47.825165 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 18:02:47.828217 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 18:02:47.831541 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 18:02:47.838238 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 18:02:47.841523 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 18:02:47.847926 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 18:02:47.851181 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 18:02:47.858195 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 18:02:47.861186 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 18:02:47.868013 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 18:02:47.874467 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 18:02:47.880977 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 18:02:47.891088 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 18:02:47.897350 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 18:02:47.900900 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 18:02:47.907041 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 18:02:47.913886 Root Device assign_resources, bus 0 link: 0
1316 18:02:47.917258 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 18:02:47.927099 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 18:02:47.933514 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 18:02:47.943616 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 18:02:47.950638 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 18:02:47.960319 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 18:02:47.967227 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 18:02:47.973242 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 18:02:47.976444 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 18:02:47.986897 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 18:02:47.993231 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 18:02:48.002955 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 18:02:48.010024 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 18:02:48.013039 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 18:02:48.019583 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 18:02:48.026533 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 18:02:48.032936 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 18:02:48.036408 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 18:02:48.046177 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 18:02:48.052816 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 18:02:48.059303 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 18:02:48.069586 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 18:02:48.075775 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 18:02:48.082527 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 18:02:48.092506 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 18:02:48.098848 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 18:02:48.105315 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 18:02:48.108876 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 18:02:48.118484 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 18:02:48.125530 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 18:02:48.135414 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 18:02:48.139059 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 18:02:48.148789 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 18:02:48.152115 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 18:02:48.162170 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 18:02:48.168199 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 18:02:48.175103 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 18:02:48.178339 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 18:02:48.187969 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 18:02:48.191495 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 18:02:48.194697 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 18:02:48.201550 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 18:02:48.204769 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 18:02:48.211171 LPC: Trying to open IO window from 800 size 1ff
1360 18:02:48.218714 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 18:02:48.227700 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 18:02:48.234783 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 18:02:48.244360 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 18:02:48.247634 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 18:02:48.254672 Root Device assign_resources, bus 0 link: 0
1366 18:02:48.255168 Done setting resources.
1367 18:02:48.260963 Show resources in subtree (Root Device)...After assigning values.
1368 18:02:48.267620 Root Device child on link 0 CPU_CLUSTER: 0
1369 18:02:48.271173 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 18:02:48.271620 APIC: 00
1371 18:02:48.274367 APIC: 03
1372 18:02:48.274782 APIC: 01
1373 18:02:48.275116 APIC: 02
1374 18:02:48.277847 APIC: 06
1375 18:02:48.278264 APIC: 07
1376 18:02:48.278625 APIC: 05
1377 18:02:48.281073 APIC: 04
1378 18:02:48.284180 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 18:02:48.294192 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 18:02:48.304261 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 18:02:48.307458 PCI: 00:00.0
1382 18:02:48.317121 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 18:02:48.327787 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 18:02:48.337320 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 18:02:48.344049 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 18:02:48.353861 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 18:02:48.363422 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 18:02:48.373468 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 18:02:48.383198 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 18:02:48.393527 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 18:02:48.399919 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 18:02:48.409824 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 18:02:48.419629 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 18:02:48.429718 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 18:02:48.439313 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 18:02:48.449407 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 18:02:48.455759 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 18:02:48.459328 PCI: 00:02.0
1399 18:02:48.468975 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 18:02:48.479362 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 18:02:48.489295 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 18:02:48.492557 PCI: 00:04.0
1403 18:02:48.492973 PCI: 00:08.0
1404 18:02:48.502541 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 18:02:48.505515 PCI: 00:12.0
1406 18:02:48.515764 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 18:02:48.518708 PCI: 00:14.0 child on link 0 USB0 port 0
1408 18:02:48.528705 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 18:02:48.535595 USB0 port 0 child on link 0 USB2 port 0
1410 18:02:48.536070 USB2 port 0
1411 18:02:48.538772 USB2 port 1
1412 18:02:48.539188 USB2 port 2
1413 18:02:48.542152 USB2 port 3
1414 18:02:48.542621 USB2 port 5
1415 18:02:48.545361 USB2 port 6
1416 18:02:48.545796 USB2 port 9
1417 18:02:48.548650 USB3 port 0
1418 18:02:48.549085 USB3 port 1
1419 18:02:48.551909 USB3 port 2
1420 18:02:48.552346 USB3 port 3
1421 18:02:48.555570 USB3 port 4
1422 18:02:48.556049 PCI: 00:14.2
1423 18:02:48.568197 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 18:02:48.578617 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 18:02:48.579062 PCI: 00:14.3
1426 18:02:48.588396 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 18:02:48.594872 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 18:02:48.605132 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 18:02:48.605558 I2C: 01:15
1430 18:02:48.608106 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 18:02:48.621299 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 18:02:48.621766 I2C: 02:5d
1433 18:02:48.624550 GENERIC: 0.0
1434 18:02:48.624985 PCI: 00:16.0
1435 18:02:48.634772 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 18:02:48.637789 PCI: 00:17.0
1437 18:02:48.647910 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 18:02:48.657481 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 18:02:48.667590 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 18:02:48.674483 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 18:02:48.684067 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 18:02:48.693964 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 18:02:48.697760 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 18:02:48.710695 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 18:02:48.711208 I2C: 03:1a
1446 18:02:48.713909 I2C: 03:38
1447 18:02:48.714412 I2C: 03:39
1448 18:02:48.714777 I2C: 03:3a
1449 18:02:48.717586 I2C: 03:3b
1450 18:02:48.720869 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 18:02:48.730792 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 18:02:48.740861 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 18:02:48.750255 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 18:02:48.753828 PCI: 01:00.0
1455 18:02:48.763509 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 18:02:48.764377 PCI: 00:1e.0
1457 18:02:48.777026 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 18:02:48.786673 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 18:02:48.790140 PCI: 00:1e.2 child on link 0 SPI: 00
1460 18:02:48.799970 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 18:02:48.803629 SPI: 00
1462 18:02:48.806880 PCI: 00:1e.3 child on link 0 SPI: 01
1463 18:02:48.816312 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 18:02:48.816742 SPI: 01
1465 18:02:48.823280 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 18:02:48.829939 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 18:02:48.839757 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 18:02:48.842992 PNP: 0c09.0
1469 18:02:48.849850 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 18:02:48.852963 PCI: 00:1f.3
1471 18:02:48.863182 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 18:02:48.872737 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 18:02:48.873171 PCI: 00:1f.4
1474 18:02:48.882838 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 18:02:48.892213 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 18:02:48.895764 PCI: 00:1f.5
1477 18:02:48.905719 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 18:02:48.908649 Done allocating resources.
1479 18:02:48.911825 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 18:02:48.915899 Enabling resources...
1481 18:02:48.922345 PCI: 00:00.0 subsystem <- 8086/9b61
1482 18:02:48.922774 PCI: 00:00.0 cmd <- 06
1483 18:02:48.925835 PCI: 00:02.0 subsystem <- 8086/9b41
1484 18:02:48.928789 PCI: 00:02.0 cmd <- 03
1485 18:02:48.932604 PCI: 00:08.0 cmd <- 06
1486 18:02:48.935710 PCI: 00:12.0 subsystem <- 8086/02f9
1487 18:02:48.938691 PCI: 00:12.0 cmd <- 02
1488 18:02:48.942348 PCI: 00:14.0 subsystem <- 8086/02ed
1489 18:02:48.945620 PCI: 00:14.0 cmd <- 02
1490 18:02:48.948534 PCI: 00:14.2 cmd <- 02
1491 18:02:48.952120 PCI: 00:14.3 subsystem <- 8086/02f0
1492 18:02:48.952549 PCI: 00:14.3 cmd <- 02
1493 18:02:48.959041 PCI: 00:15.0 subsystem <- 8086/02e8
1494 18:02:48.959603 PCI: 00:15.0 cmd <- 02
1495 18:02:48.962053 PCI: 00:15.1 subsystem <- 8086/02e9
1496 18:02:48.965305 PCI: 00:15.1 cmd <- 02
1497 18:02:48.969066 PCI: 00:16.0 subsystem <- 8086/02e0
1498 18:02:48.972232 PCI: 00:16.0 cmd <- 02
1499 18:02:48.975271 PCI: 00:17.0 subsystem <- 8086/02d3
1500 18:02:48.978612 PCI: 00:17.0 cmd <- 03
1501 18:02:48.982524 PCI: 00:19.0 subsystem <- 8086/02c5
1502 18:02:48.985372 PCI: 00:19.0 cmd <- 02
1503 18:02:48.988432 PCI: 00:1d.0 bridge ctrl <- 0013
1504 18:02:48.992156 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 18:02:48.995291 PCI: 00:1d.0 cmd <- 06
1506 18:02:48.998787 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 18:02:49.001858 PCI: 00:1e.0 cmd <- 06
1508 18:02:49.005502 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 18:02:49.008675 PCI: 00:1e.2 cmd <- 06
1510 18:02:49.011743 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 18:02:49.012195 PCI: 00:1e.3 cmd <- 02
1512 18:02:49.018617 PCI: 00:1f.0 subsystem <- 8086/0284
1513 18:02:49.019046 PCI: 00:1f.0 cmd <- 407
1514 18:02:49.021575 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 18:02:49.025437 PCI: 00:1f.3 cmd <- 02
1516 18:02:49.028408 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 18:02:49.031524 PCI: 00:1f.4 cmd <- 03
1518 18:02:49.035147 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 18:02:49.038136 PCI: 00:1f.5 cmd <- 406
1520 18:02:49.047715 PCI: 01:00.0 cmd <- 02
1521 18:02:49.052370 done.
1522 18:02:49.065134 ME: Version: 14.0.39.1367
1523 18:02:49.071866 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1524 18:02:49.075126 Initializing devices...
1525 18:02:49.075555 Root Device init ...
1526 18:02:49.081418 Chrome EC: Set SMI mask to 0x0000000000000000
1527 18:02:49.084626 Chrome EC: clear events_b mask to 0x0000000000000000
1528 18:02:49.091734 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 18:02:49.098627 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 18:02:49.104663 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 18:02:49.108497 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 18:02:49.112032 Root Device init finished in 35181 usecs
1533 18:02:49.115421 CPU_CLUSTER: 0 init ...
1534 18:02:49.121773 CPU_CLUSTER: 0 init finished in 2448 usecs
1535 18:02:49.125649 PCI: 00:00.0 init ...
1536 18:02:49.128837 CPU TDP: 15 Watts
1537 18:02:49.132625 CPU PL2 = 64 Watts
1538 18:02:49.135707 PCI: 00:00.0 init finished in 7081 usecs
1539 18:02:49.139276 PCI: 00:02.0 init ...
1540 18:02:49.142433 PCI: 00:02.0 init finished in 2253 usecs
1541 18:02:49.145763 PCI: 00:08.0 init ...
1542 18:02:49.148661 PCI: 00:08.0 init finished in 2254 usecs
1543 18:02:49.152361 PCI: 00:12.0 init ...
1544 18:02:49.155684 PCI: 00:12.0 init finished in 2252 usecs
1545 18:02:49.158615 PCI: 00:14.0 init ...
1546 18:02:49.162471 PCI: 00:14.0 init finished in 2252 usecs
1547 18:02:49.165518 PCI: 00:14.2 init ...
1548 18:02:49.169170 PCI: 00:14.2 init finished in 2254 usecs
1549 18:02:49.172504 PCI: 00:14.3 init ...
1550 18:02:49.175619 PCI: 00:14.3 init finished in 2272 usecs
1551 18:02:49.178771 PCI: 00:15.0 init ...
1552 18:02:49.181945 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 18:02:49.185144 PCI: 00:15.0 init finished in 5979 usecs
1554 18:02:49.188971 PCI: 00:15.1 init ...
1555 18:02:49.192304 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 18:02:49.195357 PCI: 00:15.1 init finished in 5979 usecs
1557 18:02:49.198648 PCI: 00:16.0 init ...
1558 18:02:49.201804 PCI: 00:16.0 init finished in 2252 usecs
1559 18:02:49.206289 PCI: 00:19.0 init ...
1560 18:02:49.209191 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 18:02:49.215596 PCI: 00:19.0 init finished in 5978 usecs
1562 18:02:49.215718 PCI: 00:1d.0 init ...
1563 18:02:49.219350 Initializing PCH PCIe bridge.
1564 18:02:49.222247 PCI: 00:1d.0 init finished in 5277 usecs
1565 18:02:49.227308 PCI: 00:1f.0 init ...
1566 18:02:49.230563 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 18:02:49.237071 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 18:02:49.237175 IOAPIC: ID = 0x02
1569 18:02:49.240270 IOAPIC: Dumping registers
1570 18:02:49.244232 reg 0x0000: 0x02000000
1571 18:02:49.247397 reg 0x0001: 0x00770020
1572 18:02:49.247480 reg 0x0002: 0x00000000
1573 18:02:49.253996 PCI: 00:1f.0 init finished in 23549 usecs
1574 18:02:49.257049 PCI: 00:1f.4 init ...
1575 18:02:49.260667 PCI: 00:1f.4 init finished in 2262 usecs
1576 18:02:49.271838 PCI: 01:00.0 init ...
1577 18:02:49.275148 PCI: 01:00.0 init finished in 2254 usecs
1578 18:02:49.278900 PNP: 0c09.0 init ...
1579 18:02:49.282493 Google Chrome EC uptime: 11.087 seconds
1580 18:02:49.289023 Google Chrome AP resets since EC boot: 0
1581 18:02:49.292358 Google Chrome most recent AP reset causes:
1582 18:02:49.299329 Google Chrome EC reset flags at last EC boot: reset-pin
1583 18:02:49.302383 PNP: 0c09.0 init finished in 20637 usecs
1584 18:02:49.305999 Devices initialized
1585 18:02:49.309124 Show all devs... After init.
1586 18:02:49.309208 Root Device: enabled 1
1587 18:02:49.312290 CPU_CLUSTER: 0: enabled 1
1588 18:02:49.315526 DOMAIN: 0000: enabled 1
1589 18:02:49.315610 APIC: 00: enabled 1
1590 18:02:49.318713 PCI: 00:00.0: enabled 1
1591 18:02:49.322284 PCI: 00:02.0: enabled 1
1592 18:02:49.325677 PCI: 00:04.0: enabled 0
1593 18:02:49.325760 PCI: 00:05.0: enabled 0
1594 18:02:49.328466 PCI: 00:12.0: enabled 1
1595 18:02:49.332296 PCI: 00:12.5: enabled 0
1596 18:02:49.335603 PCI: 00:12.6: enabled 0
1597 18:02:49.335721 PCI: 00:14.0: enabled 1
1598 18:02:49.338976 PCI: 00:14.1: enabled 0
1599 18:02:49.342029 PCI: 00:14.3: enabled 1
1600 18:02:49.342117 PCI: 00:14.5: enabled 0
1601 18:02:49.345441 PCI: 00:15.0: enabled 1
1602 18:02:49.349173 PCI: 00:15.1: enabled 1
1603 18:02:49.352126 PCI: 00:15.2: enabled 0
1604 18:02:49.352287 PCI: 00:15.3: enabled 0
1605 18:02:49.355283 PCI: 00:16.0: enabled 1
1606 18:02:49.358904 PCI: 00:16.1: enabled 0
1607 18:02:49.361894 PCI: 00:16.2: enabled 0
1608 18:02:49.362096 PCI: 00:16.3: enabled 0
1609 18:02:49.365632 PCI: 00:16.4: enabled 0
1610 18:02:49.368695 PCI: 00:16.5: enabled 0
1611 18:02:49.371928 PCI: 00:17.0: enabled 1
1612 18:02:49.372123 PCI: 00:19.0: enabled 1
1613 18:02:49.375854 PCI: 00:19.1: enabled 0
1614 18:02:49.378844 PCI: 00:19.2: enabled 0
1615 18:02:49.379364 PCI: 00:1a.0: enabled 0
1616 18:02:49.381928 PCI: 00:1c.0: enabled 0
1617 18:02:49.385698 PCI: 00:1c.1: enabled 0
1618 18:02:49.388643 PCI: 00:1c.2: enabled 0
1619 18:02:49.389074 PCI: 00:1c.3: enabled 0
1620 18:02:49.391854 PCI: 00:1c.4: enabled 0
1621 18:02:49.395317 PCI: 00:1c.5: enabled 0
1622 18:02:49.398799 PCI: 00:1c.6: enabled 0
1623 18:02:49.399234 PCI: 00:1c.7: enabled 0
1624 18:02:49.402242 PCI: 00:1d.0: enabled 1
1625 18:02:49.405181 PCI: 00:1d.1: enabled 0
1626 18:02:49.408529 PCI: 00:1d.2: enabled 0
1627 18:02:49.408957 PCI: 00:1d.3: enabled 0
1628 18:02:49.411806 PCI: 00:1d.4: enabled 0
1629 18:02:49.415273 PCI: 00:1d.5: enabled 0
1630 18:02:49.418753 PCI: 00:1e.0: enabled 1
1631 18:02:49.419182 PCI: 00:1e.1: enabled 0
1632 18:02:49.422076 PCI: 00:1e.2: enabled 1
1633 18:02:49.425200 PCI: 00:1e.3: enabled 1
1634 18:02:49.425629 PCI: 00:1f.0: enabled 1
1635 18:02:49.428322 PCI: 00:1f.1: enabled 0
1636 18:02:49.431925 PCI: 00:1f.2: enabled 0
1637 18:02:49.435448 PCI: 00:1f.3: enabled 1
1638 18:02:49.435924 PCI: 00:1f.4: enabled 1
1639 18:02:49.438090 PCI: 00:1f.5: enabled 1
1640 18:02:49.441865 PCI: 00:1f.6: enabled 0
1641 18:02:49.445298 USB0 port 0: enabled 1
1642 18:02:49.445720 I2C: 01:15: enabled 1
1643 18:02:49.448321 I2C: 02:5d: enabled 1
1644 18:02:49.451489 GENERIC: 0.0: enabled 1
1645 18:02:49.452111 I2C: 03:1a: enabled 1
1646 18:02:49.454659 I2C: 03:38: enabled 1
1647 18:02:49.458018 I2C: 03:39: enabled 1
1648 18:02:49.458499 I2C: 03:3a: enabled 1
1649 18:02:49.461825 I2C: 03:3b: enabled 1
1650 18:02:49.464618 PCI: 00:00.0: enabled 1
1651 18:02:49.465112 SPI: 00: enabled 1
1652 18:02:49.468282 SPI: 01: enabled 1
1653 18:02:49.471202 PNP: 0c09.0: enabled 1
1654 18:02:49.471739 USB2 port 0: enabled 1
1655 18:02:49.474424 USB2 port 1: enabled 1
1656 18:02:49.478226 USB2 port 2: enabled 0
1657 18:02:49.478927 USB2 port 3: enabled 0
1658 18:02:49.481535 USB2 port 5: enabled 0
1659 18:02:49.484762 USB2 port 6: enabled 1
1660 18:02:49.487616 USB2 port 9: enabled 1
1661 18:02:49.488359 USB3 port 0: enabled 1
1662 18:02:49.490827 USB3 port 1: enabled 1
1663 18:02:49.494298 USB3 port 2: enabled 1
1664 18:02:49.494619 USB3 port 3: enabled 1
1665 18:02:49.497625 USB3 port 4: enabled 0
1666 18:02:49.501512 APIC: 03: enabled 1
1667 18:02:49.501829 APIC: 01: enabled 1
1668 18:02:49.504579 APIC: 02: enabled 1
1669 18:02:49.507760 APIC: 06: enabled 1
1670 18:02:49.508071 APIC: 07: enabled 1
1671 18:02:49.510885 APIC: 05: enabled 1
1672 18:02:49.511213 APIC: 04: enabled 1
1673 18:02:49.514040 PCI: 00:08.0: enabled 1
1674 18:02:49.517974 PCI: 00:14.2: enabled 1
1675 18:02:49.521289 PCI: 01:00.0: enabled 1
1676 18:02:49.524292 Disabling ACPI via APMC:
1677 18:02:49.524601 done.
1678 18:02:49.531091 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 18:02:49.534303 ELOG: NV offset 0xaf0000 size 0x4000
1680 18:02:49.541183 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 18:02:49.547332 ELOG: Event(17) added with size 13 at 2023-10-09 18:01:17 UTC
1682 18:02:49.554356 POST: Unexpected post code in previous boot: 0x73
1683 18:02:49.560553 ELOG: Event(A3) added with size 11 at 2023-10-09 18:01:17 UTC
1684 18:02:49.567041 ELOG: Event(A6) added with size 13 at 2023-10-09 18:01:17 UTC
1685 18:02:49.573790 ELOG: Event(92) added with size 9 at 2023-10-09 18:01:17 UTC
1686 18:02:49.580218 ELOG: Event(93) added with size 9 at 2023-10-09 18:01:17 UTC
1687 18:02:49.583912 ELOG: Event(9A) added with size 9 at 2023-10-09 18:01:17 UTC
1688 18:02:49.590450 ELOG: Event(9E) added with size 10 at 2023-10-09 18:01:17 UTC
1689 18:02:49.596712 ELOG: Event(9F) added with size 14 at 2023-10-09 18:01:17 UTC
1690 18:02:49.603238 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1691 18:02:49.609961 ELOG: Event(A1) added with size 10 at 2023-10-09 18:01:17 UTC
1692 18:02:49.616831 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1693 18:02:49.622952 ELOG: Event(A0) added with size 9 at 2023-10-09 18:01:17 UTC
1694 18:02:49.626411 elog_add_boot_reason: Logged dev mode boot
1695 18:02:49.630501 Finalize devices...
1696 18:02:49.633709 PCI: 00:17.0 final
1697 18:02:49.634128 Devices finalized
1698 18:02:49.640071 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1699 18:02:49.643734 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1700 18:02:49.650707 ME: HFSTS1 : 0x90000245
1701 18:02:49.653719 ME: HFSTS2 : 0x3B850126
1702 18:02:49.656808 ME: HFSTS3 : 0x00000020
1703 18:02:49.660441 ME: HFSTS4 : 0x00004800
1704 18:02:49.666815 ME: HFSTS5 : 0x00000000
1705 18:02:49.670038 ME: HFSTS6 : 0x40400006
1706 18:02:49.673102 ME: Manufacturing Mode : NO
1707 18:02:49.676854 ME: FW Partition Table : OK
1708 18:02:49.679815 ME: Bringup Loader Failure : NO
1709 18:02:49.683721 ME: Firmware Init Complete : YES
1710 18:02:49.686772 ME: Boot Options Present : NO
1711 18:02:49.690146 ME: Update In Progress : NO
1712 18:02:49.693444 ME: D0i3 Support : YES
1713 18:02:49.696241 ME: Low Power State Enabled : NO
1714 18:02:49.699584 ME: CPU Replaced : NO
1715 18:02:49.702857 ME: CPU Replacement Valid : YES
1716 18:02:49.706747 ME: Current Working State : 5
1717 18:02:49.709924 ME: Current Operation State : 1
1718 18:02:49.712864 ME: Current Operation Mode : 0
1719 18:02:49.716447 ME: Error Code : 0
1720 18:02:49.719520 ME: CPU Debug Disabled : YES
1721 18:02:49.723151 ME: TXT Support : NO
1722 18:02:49.729764 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1723 18:02:49.732719 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1724 18:02:49.736509 CBFS @ c08000 size 3f8000
1725 18:02:49.742549 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1726 18:02:49.746307 CBFS: Locating 'fallback/dsdt.aml'
1727 18:02:49.749324 CBFS: Found @ offset 10bb80 size 3fa5
1728 18:02:49.756556 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1729 18:02:49.756995 CBFS @ c08000 size 3f8000
1730 18:02:49.762647 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1731 18:02:49.766158 CBFS: Locating 'fallback/slic'
1732 18:02:49.769550 CBFS: 'fallback/slic' not found.
1733 18:02:49.776217 ACPI: Writing ACPI tables at 99b3e000.
1734 18:02:49.776646 ACPI: * FACS
1735 18:02:49.779779 ACPI: * DSDT
1736 18:02:49.782840 Ramoops buffer: 0x100000@0x99a3d000.
1737 18:02:49.786505 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1738 18:02:49.792583 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1739 18:02:49.795819 Google Chrome EC: version:
1740 18:02:49.799665 ro: helios_v2.0.2659-56403530b
1741 18:02:49.802747 rw: helios_v2.0.2849-c41de27e7d
1742 18:02:49.803188 running image: 1
1743 18:02:49.807294 ACPI: * FADT
1744 18:02:49.807839 SCI is IRQ9
1745 18:02:49.813602 ACPI: added table 1/32, length now 40
1746 18:02:49.814154 ACPI: * SSDT
1747 18:02:49.817301 Found 1 CPU(s) with 8 core(s) each.
1748 18:02:49.820407 Error: Could not locate 'wifi_sar' in VPD.
1749 18:02:49.826823 Checking CBFS for default SAR values
1750 18:02:49.830109 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1751 18:02:49.833743 CBFS @ c08000 size 3f8000
1752 18:02:49.840186 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1753 18:02:49.843263 CBFS: Locating 'wifi_sar_defaults.hex'
1754 18:02:49.847008 CBFS: Found @ offset 5fac0 size 77
1755 18:02:49.850299 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1756 18:02:49.856614 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1757 18:02:49.860295 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1758 18:02:49.866924 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1759 18:02:49.870232 failed to find key in VPD: dsm_calib_r0_0
1760 18:02:49.879961 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1761 18:02:49.883422 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1762 18:02:49.886671 failed to find key in VPD: dsm_calib_r0_1
1763 18:02:49.896108 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1764 18:02:49.903006 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1765 18:02:49.906297 failed to find key in VPD: dsm_calib_r0_2
1766 18:02:49.916446 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1767 18:02:49.919403 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1768 18:02:49.926059 failed to find key in VPD: dsm_calib_r0_3
1769 18:02:49.932893 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1770 18:02:49.939334 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1771 18:02:49.942410 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1772 18:02:49.946187 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1773 18:02:49.950109 EC returned error result code 1
1774 18:02:49.953464 EC returned error result code 1
1775 18:02:49.957534 EC returned error result code 1
1776 18:02:49.964272 PS2K: Bad resp from EC. Vivaldi disabled!
1777 18:02:49.967678 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1778 18:02:49.974412 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1779 18:02:49.981057 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1780 18:02:49.983823 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1781 18:02:49.990720 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1782 18:02:49.997161 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1783 18:02:50.003911 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1784 18:02:50.007562 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1785 18:02:50.010367 ACPI: added table 2/32, length now 44
1786 18:02:50.013453 ACPI: * MCFG
1787 18:02:50.017343 ACPI: added table 3/32, length now 48
1788 18:02:50.020339 ACPI: * TPM2
1789 18:02:50.023447 TPM2 log created at 99a2d000
1790 18:02:50.027441 ACPI: added table 4/32, length now 52
1791 18:02:50.028021 ACPI: * MADT
1792 18:02:50.030762 SCI is IRQ9
1793 18:02:50.033643 ACPI: added table 5/32, length now 56
1794 18:02:50.034173 current = 99b43ac0
1795 18:02:50.036768 ACPI: * DMAR
1796 18:02:50.040012 ACPI: added table 6/32, length now 60
1797 18:02:50.043316 ACPI: * IGD OpRegion
1798 18:02:50.043772 GMA: Found VBT in CBFS
1799 18:02:50.047170 GMA: Found valid VBT in CBFS
1800 18:02:50.050315 ACPI: added table 7/32, length now 64
1801 18:02:50.053356 ACPI: * HPET
1802 18:02:50.057295 ACPI: added table 8/32, length now 68
1803 18:02:50.057727 ACPI: done.
1804 18:02:50.060245 ACPI tables: 31744 bytes.
1805 18:02:50.063989 smbios_write_tables: 99a2c000
1806 18:02:50.066942 EC returned error result code 3
1807 18:02:50.070464 Couldn't obtain OEM name from CBI
1808 18:02:50.073809 Create SMBIOS type 17
1809 18:02:50.076687 PCI: 00:00.0 (Intel Cannonlake)
1810 18:02:50.080405 PCI: 00:14.3 (Intel WiFi)
1811 18:02:50.083463 SMBIOS tables: 939 bytes.
1812 18:02:50.087263 Writing table forward entry at 0x00000500
1813 18:02:50.093489 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1814 18:02:50.097043 Writing coreboot table at 0x99b62000
1815 18:02:50.103390 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1816 18:02:50.106695 1. 0000000000001000-000000000009ffff: RAM
1817 18:02:50.109845 2. 00000000000a0000-00000000000fffff: RESERVED
1818 18:02:50.116875 3. 0000000000100000-0000000099a2bfff: RAM
1819 18:02:50.119773 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1820 18:02:50.126729 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1821 18:02:50.133120 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1822 18:02:50.136351 7. 000000009a000000-000000009f7fffff: RESERVED
1823 18:02:50.143455 8. 00000000e0000000-00000000efffffff: RESERVED
1824 18:02:50.146566 9. 00000000fc000000-00000000fc000fff: RESERVED
1825 18:02:50.149733 10. 00000000fe000000-00000000fe00ffff: RESERVED
1826 18:02:50.156234 11. 00000000fed10000-00000000fed17fff: RESERVED
1827 18:02:50.160008 12. 00000000fed80000-00000000fed83fff: RESERVED
1828 18:02:50.166301 13. 00000000fed90000-00000000fed91fff: RESERVED
1829 18:02:50.169551 14. 00000000feda0000-00000000feda1fff: RESERVED
1830 18:02:50.176420 15. 0000000100000000-000000045e7fffff: RAM
1831 18:02:50.179734 Graphics framebuffer located at 0xc0000000
1832 18:02:50.183317 Passing 5 GPIOs to payload:
1833 18:02:50.186212 NAME | PORT | POLARITY | VALUE
1834 18:02:50.192726 write protect | undefined | high | low
1835 18:02:50.195961 lid | undefined | high | high
1836 18:02:50.202752 power | undefined | high | low
1837 18:02:50.209382 oprom | undefined | high | low
1838 18:02:50.212450 EC in RW | 0x000000cb | high | low
1839 18:02:50.215995 Board ID: 4
1840 18:02:50.218957 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1841 18:02:50.222642 CBFS @ c08000 size 3f8000
1842 18:02:50.228939 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1843 18:02:50.232736 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1844 18:02:50.235584 coreboot table: 1492 bytes.
1845 18:02:50.239123 IMD ROOT 0. 99fff000 00001000
1846 18:02:50.242619 IMD SMALL 1. 99ffe000 00001000
1847 18:02:50.245840 FSP MEMORY 2. 99c4e000 003b0000
1848 18:02:50.249050 CONSOLE 3. 99c2e000 00020000
1849 18:02:50.252328 FMAP 4. 99c2d000 0000054e
1850 18:02:50.255483 TIME STAMP 5. 99c2c000 00000910
1851 18:02:50.259332 VBOOT WORK 6. 99c18000 00014000
1852 18:02:50.262244 MRC DATA 7. 99c16000 00001958
1853 18:02:50.265459 ROMSTG STCK 8. 99c15000 00001000
1854 18:02:50.269314 AFTER CAR 9. 99c0b000 0000a000
1855 18:02:50.272561 RAMSTAGE 10. 99baf000 0005c000
1856 18:02:50.275631 REFCODE 11. 99b7a000 00035000
1857 18:02:50.278901 SMM BACKUP 12. 99b6a000 00010000
1858 18:02:50.282209 COREBOOT 13. 99b62000 00008000
1859 18:02:50.285969 ACPI 14. 99b3e000 00024000
1860 18:02:50.289198 ACPI GNVS 15. 99b3d000 00001000
1861 18:02:50.292445 RAMOOPS 16. 99a3d000 00100000
1862 18:02:50.295581 TPM2 TCGLOG17. 99a2d000 00010000
1863 18:02:50.298751 SMBIOS 18. 99a2c000 00000800
1864 18:02:50.302342 IMD small region:
1865 18:02:50.305853 IMD ROOT 0. 99ffec00 00000400
1866 18:02:50.309192 FSP RUNTIME 1. 99ffebe0 00000004
1867 18:02:50.312149 EC HOSTEVENT 2. 99ffebc0 00000008
1868 18:02:50.315672 POWER STATE 3. 99ffeb80 00000040
1869 18:02:50.319258 ROMSTAGE 4. 99ffeb60 00000004
1870 18:02:50.322646 MEM INFO 5. 99ffe9a0 000001b9
1871 18:02:50.325805 VPD 6. 99ffe920 0000006c
1872 18:02:50.328827 MTRR: Physical address space:
1873 18:02:50.335164 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1874 18:02:50.341865 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1875 18:02:50.348518 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1876 18:02:50.355530 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1877 18:02:50.361702 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1878 18:02:50.368518 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1879 18:02:50.371578 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1880 18:02:50.378597 MTRR: Fixed MSR 0x250 0x0606060606060606
1881 18:02:50.381911 MTRR: Fixed MSR 0x258 0x0606060606060606
1882 18:02:50.385329 MTRR: Fixed MSR 0x259 0x0000000000000000
1883 18:02:50.388333 MTRR: Fixed MSR 0x268 0x0606060606060606
1884 18:02:50.394905 MTRR: Fixed MSR 0x269 0x0606060606060606
1885 18:02:50.398526 MTRR: Fixed MSR 0x26a 0x0606060606060606
1886 18:02:50.401657 MTRR: Fixed MSR 0x26b 0x0606060606060606
1887 18:02:50.404562 MTRR: Fixed MSR 0x26c 0x0606060606060606
1888 18:02:50.411453 MTRR: Fixed MSR 0x26d 0x0606060606060606
1889 18:02:50.414543 MTRR: Fixed MSR 0x26e 0x0606060606060606
1890 18:02:50.417651 MTRR: Fixed MSR 0x26f 0x0606060606060606
1891 18:02:50.421595 call enable_fixed_mtrr()
1892 18:02:50.424609 CPU physical address size: 39 bits
1893 18:02:50.427590 MTRR: default type WB/UC MTRR counts: 6/8.
1894 18:02:50.434161 MTRR: WB selected as default type.
1895 18:02:50.437550 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1896 18:02:50.444200 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1897 18:02:50.450859 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1898 18:02:50.457221 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1899 18:02:50.464406 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1900 18:02:50.470823 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1901 18:02:50.474020 MTRR: Fixed MSR 0x250 0x0606060606060606
1902 18:02:50.481007 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 18:02:50.484218 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 18:02:50.487490 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 18:02:50.491078 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 18:02:50.497524 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 18:02:50.500634 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 18:02:50.503819 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 18:02:50.507197 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 18:02:50.510973 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 18:02:50.517307 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 18:02:50.517747
1913 18:02:50.518191 MTRR check
1914 18:02:50.520786 Fixed MTRRs : Enabled
1915 18:02:50.524315 Variable MTRRs: Enabled
1916 18:02:50.524750
1917 18:02:50.525198 call enable_fixed_mtrr()
1918 18:02:50.530884 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1919 18:02:50.533859 CPU physical address size: 39 bits
1920 18:02:50.540336 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1921 18:02:50.543616 CBFS @ c08000 size 3f8000
1922 18:02:50.547509 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1923 18:02:50.553781 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 18:02:50.557028 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 18:02:50.560270 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 18:02:50.564065 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 18:02:50.566930 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 18:02:50.573792 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 18:02:50.576941 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 18:02:50.580366 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 18:02:50.583519 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 18:02:50.589895 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 18:02:50.593210 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 18:02:50.596780 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 18:02:50.599762 call enable_fixed_mtrr()
1936 18:02:50.603580 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 18:02:50.610229 MTRR: Fixed MSR 0x259 0x0000000000000000
1938 18:02:50.613366 MTRR: Fixed MSR 0x268 0x0606060606060606
1939 18:02:50.616687 MTRR: Fixed MSR 0x269 0x0606060606060606
1940 18:02:50.619915 MTRR: Fixed MSR 0x26a 0x0606060606060606
1941 18:02:50.626436 MTRR: Fixed MSR 0x26b 0x0606060606060606
1942 18:02:50.629361 MTRR: Fixed MSR 0x26c 0x0606060606060606
1943 18:02:50.632889 MTRR: Fixed MSR 0x26d 0x0606060606060606
1944 18:02:50.636346 MTRR: Fixed MSR 0x26e 0x0606060606060606
1945 18:02:50.639086 MTRR: Fixed MSR 0x26f 0x0606060606060606
1946 18:02:50.645757 CPU physical address size: 39 bits
1947 18:02:50.646238 call enable_fixed_mtrr()
1948 18:02:50.652929 MTRR: Fixed MSR 0x250 0x0606060606060606
1949 18:02:50.656138 MTRR: Fixed MSR 0x258 0x0606060606060606
1950 18:02:50.659175 MTRR: Fixed MSR 0x259 0x0000000000000000
1951 18:02:50.662515 MTRR: Fixed MSR 0x268 0x0606060606060606
1952 18:02:50.669404 MTRR: Fixed MSR 0x269 0x0606060606060606
1953 18:02:50.672673 MTRR: Fixed MSR 0x26a 0x0606060606060606
1954 18:02:50.675589 MTRR: Fixed MSR 0x26b 0x0606060606060606
1955 18:02:50.679288 MTRR: Fixed MSR 0x26c 0x0606060606060606
1956 18:02:50.685812 MTRR: Fixed MSR 0x26d 0x0606060606060606
1957 18:02:50.688867 MTRR: Fixed MSR 0x26e 0x0606060606060606
1958 18:02:50.692508 MTRR: Fixed MSR 0x26f 0x0606060606060606
1959 18:02:50.695814 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 18:02:50.699216 call enable_fixed_mtrr()
1961 18:02:50.702116 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 18:02:50.708520 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 18:02:50.712221 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 18:02:50.715211 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 18:02:50.718470 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 18:02:50.725472 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 18:02:50.728733 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 18:02:50.731924 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 18:02:50.735210 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 18:02:50.741924 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 18:02:50.744936 CPU physical address size: 39 bits
1972 18:02:50.748184 call enable_fixed_mtrr()
1973 18:02:50.751694 CBFS: Locating 'fallback/payload'
1974 18:02:50.754733 CPU physical address size: 39 bits
1975 18:02:50.757911 CPU physical address size: 39 bits
1976 18:02:50.761237 CBFS: Found @ offset 1c96c0 size 3f798
1977 18:02:50.764968 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 18:02:50.768132 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 18:02:50.774922 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 18:02:50.778212 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 18:02:50.781354 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 18:02:50.784841 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 18:02:50.790945 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 18:02:50.794360 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 18:02:50.797748 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 18:02:50.801242 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 18:02:50.808242 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 18:02:50.810860 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 18:02:50.814252 call enable_fixed_mtrr()
1990 18:02:50.817910 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 18:02:50.820769 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 18:02:50.824033 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 18:02:50.830959 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 18:02:50.834737 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 18:02:50.837162 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 18:02:50.840534 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 18:02:50.847521 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 18:02:50.850519 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 18:02:50.853781 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 18:02:50.857324 CPU physical address size: 39 bits
2001 18:02:50.860923 call enable_fixed_mtrr()
2002 18:02:50.863959 Checking segment from ROM address 0xffdd16f8
2003 18:02:50.867223 CPU physical address size: 39 bits
2004 18:02:50.874112 Checking segment from ROM address 0xffdd1714
2005 18:02:50.877315 Loading segment from ROM address 0xffdd16f8
2006 18:02:50.881122 code (compression=0)
2007 18:02:50.887517 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2008 18:02:50.896970 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2009 18:02:50.900523 it's not compressed!
2010 18:02:50.991767 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2011 18:02:50.998627 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2012 18:02:51.001564 Loading segment from ROM address 0xffdd1714
2013 18:02:51.005085 Entry Point 0x30000000
2014 18:02:51.008285 Loaded segments
2015 18:02:51.014026 Finalizing chipset.
2016 18:02:51.017071 Finalizing SMM.
2017 18:02:51.020398 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2018 18:02:51.023711 mp_park_aps done after 0 msecs.
2019 18:02:51.030408 Jumping to boot code at 30000000(99b62000)
2020 18:02:51.037292 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2021 18:02:51.037734
2022 18:02:51.038096
2023 18:02:51.038414
2024 18:02:51.040550 Starting depthcharge on Helios...
2025 18:02:51.040985
2026 18:02:51.042048 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2027 18:02:51.042540 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2028 18:02:51.043081 Setting prompt string to ['hatch:']
2029 18:02:51.043674 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2030 18:02:51.050204 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2031 18:02:51.050753
2032 18:02:51.056570 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2033 18:02:51.056995
2034 18:02:51.063456 board_setup: Info: eMMC controller not present; skipping
2035 18:02:51.063923
2036 18:02:51.066658 New NVMe Controller 0x30053ac0 @ 00:1d:00
2037 18:02:51.067089
2038 18:02:51.073689 board_setup: Info: SDHCI controller not present; skipping
2039 18:02:51.074118
2040 18:02:51.079952 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2041 18:02:51.080390
2042 18:02:51.080789 Wipe memory regions:
2043 18:02:51.081119
2044 18:02:51.083404 [0x00000000001000, 0x000000000a0000)
2045 18:02:51.083883
2046 18:02:51.086266 [0x00000000100000, 0x00000030000000)
2047 18:02:51.153446
2048 18:02:51.156259 [0x00000030657430, 0x00000099a2c000)
2049 18:02:51.293885
2050 18:02:51.296887 [0x00000100000000, 0x0000045e800000)
2051 18:02:52.679821
2052 18:02:52.680350 R8152: Initializing
2053 18:02:52.680702
2054 18:02:52.682763 Version 9 (ocp_data = 6010)
2055 18:02:52.687529
2056 18:02:52.688001 R8152: Done initializing
2057 18:02:52.688348
2058 18:02:52.690643 Adding net device
2059 18:02:53.173341
2060 18:02:53.173862 R8152: Initializing
2061 18:02:53.174230
2062 18:02:53.176436 Version 6 (ocp_data = 5c30)
2063 18:02:53.176855
2064 18:02:53.179626 R8152: Done initializing
2065 18:02:53.180143
2066 18:02:53.182965 net_add_device: Attemp to include the same device
2067 18:02:53.186515
2068 18:02:53.193742 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2069 18:02:53.194181
2070 18:02:53.194522
2071 18:02:53.194836
2072 18:02:53.195580 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2074 18:02:53.296691 hatch: tftpboot 192.168.201.1 11712678/tftp-deploy-04zmianc/kernel/bzImage 11712678/tftp-deploy-04zmianc/kernel/cmdline 11712678/tftp-deploy-04zmianc/ramdisk/ramdisk.cpio.gz
2075 18:02:53.296899 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2076 18:02:53.297015 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2077 18:02:53.301536 tftpboot 192.168.201.1 11712678/tftp-deploy-04zmianc/kernel/bzIploy-04zmianc/kernel/cmdline 11712678/tftp-deploy-04zmianc/ramdisk/ramdisk.cpio.gz
2078 18:02:53.301646
2079 18:02:53.301728 Waiting for link
2080 18:02:53.503078
2081 18:02:53.503605 done.
2082 18:02:53.503991
2083 18:02:53.504313 MAC: 00:24:32:50:19:be
2084 18:02:53.504626
2085 18:02:53.506093 Sending DHCP discover... done.
2086 18:02:53.506521
2087 18:02:53.509780 Waiting for reply... done.
2088 18:02:53.510326
2089 18:02:53.512962 Sending DHCP request... done.
2090 18:02:53.513461
2091 18:02:53.515829 Waiting for reply... done.
2092 18:02:53.516251
2093 18:02:53.519850 My ip is 192.168.201.15
2094 18:02:53.520290
2095 18:02:53.522822 The DHCP server ip is 192.168.201.1
2096 18:02:53.523251
2097 18:02:53.529148 TFTP server IP predefined by user: 192.168.201.1
2098 18:02:53.529582
2099 18:02:53.535814 Bootfile predefined by user: 11712678/tftp-deploy-04zmianc/kernel/bzImage
2100 18:02:53.536326
2101 18:02:53.539491 Sending tftp read request... done.
2102 18:02:53.539959
2103 18:02:53.547391 Waiting for the transfer...
2104 18:02:53.547970
2105 18:02:54.175739 00000000 ################################################################
2106 18:02:54.176363
2107 18:02:54.864655 00080000 ################################################################
2108 18:02:54.865200
2109 18:02:55.504599 00100000 ################################################################
2110 18:02:55.504746
2111 18:02:56.122351 00180000 ################################################################
2112 18:02:56.122523
2113 18:02:56.804282 00200000 ################################################################
2114 18:02:56.804810
2115 18:02:57.465110 00280000 ################################################################
2116 18:02:57.465295
2117 18:02:58.021938 00300000 ################################################################
2118 18:02:58.022070
2119 18:02:58.664532 00380000 ################################################################
2120 18:02:58.664759
2121 18:02:59.220459 00400000 ################################################################
2122 18:02:59.220613
2123 18:02:59.764961 00480000 ################################################################
2124 18:02:59.765119
2125 18:03:00.297259 00500000 ################################################################
2126 18:03:00.297409
2127 18:03:00.854452 00580000 ################################################################
2128 18:03:00.854600
2129 18:03:01.404352 00600000 ################################################################
2130 18:03:01.404504
2131 18:03:01.968701 00680000 ################################################################
2132 18:03:01.968846
2133 18:03:02.523141 00700000 ################################################################
2134 18:03:02.523293
2135 18:03:03.085806 00780000 ################################################################
2136 18:03:03.085952
2137 18:03:03.192858 00800000 ############# done.
2138 18:03:03.193011
2139 18:03:03.196036 The bootfile was 8490896 bytes long.
2140 18:03:03.196126
2141 18:03:03.199509 Sending tftp read request... done.
2142 18:03:03.199615
2143 18:03:03.202382 Waiting for the transfer...
2144 18:03:03.202470
2145 18:03:03.745556 00000000 ################################################################
2146 18:03:03.745699
2147 18:03:04.347994 00080000 ################################################################
2148 18:03:04.348473
2149 18:03:04.919376 00100000 ################################################################
2150 18:03:04.919525
2151 18:03:05.565496 00180000 ################################################################
2152 18:03:05.566036
2153 18:03:06.166930 00200000 ################################################################
2154 18:03:06.167104
2155 18:03:06.819723 00280000 ################################################################
2156 18:03:06.820258
2157 18:03:07.493888 00300000 ################################################################
2158 18:03:07.494403
2159 18:03:08.197781 00380000 ################################################################
2160 18:03:08.198307
2161 18:03:08.881200 00400000 ################################################################
2162 18:03:08.881840
2163 18:03:09.523461 00480000 ################################################################
2164 18:03:09.524182
2165 18:03:10.153891 00500000 ############################################################### done.
2166 18:03:10.154616
2167 18:03:10.157202 Sending tftp read request... done.
2168 18:03:10.157634
2169 18:03:10.160841 Waiting for the transfer...
2170 18:03:10.161291
2171 18:03:10.161779 00000000 # done.
2172 18:03:10.162197
2173 18:03:10.170382 Command line loaded dynamically from TFTP file: 11712678/tftp-deploy-04zmianc/kernel/cmdline
2174 18:03:10.170967
2175 18:03:10.200071 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11712678/extract-nfsrootfs-38_o8s1d,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2176 18:03:10.200529
2177 18:03:10.207007 ec_init(0): CrosEC protocol v3 supported (256, 256)
2178 18:03:10.210196
2179 18:03:10.213422 Shutting down all USB controllers.
2180 18:03:10.214013
2181 18:03:10.214436 Removing current net device
2182 18:03:10.217373
2183 18:03:10.217916 Finalizing coreboot
2184 18:03:10.218372
2185 18:03:10.224202 Exiting depthcharge with code 4 at timestamp: 26534994
2186 18:03:10.224773
2187 18:03:10.225140
2188 18:03:10.225501 Starting kernel ...
2189 18:03:10.225818
2190 18:03:10.226118
2191 18:03:10.227281 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2192 18:03:10.227799 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2193 18:03:10.228256 Setting prompt string to ['Linux version [0-9]']
2194 18:03:10.228628 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2195 18:03:10.228994 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2197 18:07:33.228602 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2199 18:07:33.229639 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2201 18:07:33.230430 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2204 18:07:33.231836 end: 2 depthcharge-action (duration 00:05:00) [common]
2206 18:07:33.232942 Cleaning after the job
2207 18:07:33.233398 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712678/tftp-deploy-04zmianc/ramdisk
2208 18:07:33.238224 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712678/tftp-deploy-04zmianc/kernel
2209 18:07:33.244366 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712678/tftp-deploy-04zmianc/nfsrootfs
2210 18:07:33.364158 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712678/tftp-deploy-04zmianc/modules
2211 18:07:33.364627 start: 4.1 power-off (timeout 00:00:30) [common]
2212 18:07:33.364807 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2213 18:07:33.443179 >> Command sent successfully.
2214 18:07:33.449231 Returned 0 in 0 seconds
2215 18:07:33.550179 end: 4.1 power-off (duration 00:00:00) [common]
2217 18:07:33.551524 start: 4.2 read-feedback (timeout 00:10:00) [common]
2218 18:07:33.552701 Listened to connection for namespace 'common' for up to 1s
2220 18:07:33.553902 Listened to connection for namespace 'common' for up to 1s
2221 18:07:34.553357 Finalising connection for namespace 'common'
2222 18:07:34.553978 Disconnecting from shell: Finalise
2223 18:07:34.554354
2224 18:07:34.655336 end: 4.2 read-feedback (duration 00:00:01) [common]
2225 18:07:34.655957 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712678
2226 18:07:35.261785 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712678
2227 18:07:35.262009 JobError: Your job cannot terminate cleanly.