Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 18:00:54.642813 lava-dispatcher, installed at version: 2023.08
2 18:00:54.643023 start: 0 validate
3 18:00:54.643156 Start time: 2023-10-09 18:00:54.643147+00:00 (UTC)
4 18:00:54.643279 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:00:54.643409 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 18:00:54.915016 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:00:54.915754 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:00:55.184836 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:00:55.185006 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 18:00:55.444295 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:00:55.445161 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1778-gc774a35d86d2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 18:00:55.722130 validate duration: 1.08
14 18:00:55.723653 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:00:55.724211 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:00:55.724691 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:00:55.725322 Not decompressing ramdisk as can be used compressed.
18 18:00:55.725781 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 18:00:55.726157 saving as /var/lib/lava/dispatcher/tmp/11712680/tftp-deploy-219w9ws9/ramdisk/initrd.cpio.gz
20 18:00:55.726514 total size: 5671549 (5 MB)
21 18:00:55.731912 progress 0 % (0 MB)
22 18:00:55.740696 progress 5 % (0 MB)
23 18:00:55.746860 progress 10 % (0 MB)
24 18:00:55.750780 progress 15 % (0 MB)
25 18:00:55.754479 progress 20 % (1 MB)
26 18:00:55.757803 progress 25 % (1 MB)
27 18:00:55.760404 progress 30 % (1 MB)
28 18:00:55.763139 progress 35 % (1 MB)
29 18:00:55.765607 progress 40 % (2 MB)
30 18:00:55.767718 progress 45 % (2 MB)
31 18:00:55.769861 progress 50 % (2 MB)
32 18:00:55.772024 progress 55 % (3 MB)
33 18:00:55.773736 progress 60 % (3 MB)
34 18:00:55.775653 progress 65 % (3 MB)
35 18:00:55.777263 progress 70 % (3 MB)
36 18:00:55.778705 progress 75 % (4 MB)
37 18:00:55.780288 progress 80 % (4 MB)
38 18:00:55.781834 progress 85 % (4 MB)
39 18:00:55.783259 progress 90 % (4 MB)
40 18:00:55.784799 progress 95 % (5 MB)
41 18:00:55.786364 progress 100 % (5 MB)
42 18:00:55.786469 5 MB downloaded in 0.06 s (90.18 MB/s)
43 18:00:55.786623 end: 1.1.1 http-download (duration 00:00:00) [common]
45 18:00:55.786856 end: 1.1 download-retry (duration 00:00:00) [common]
46 18:00:55.786942 start: 1.2 download-retry (timeout 00:10:00) [common]
47 18:00:55.787024 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 18:00:55.787158 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 18:00:55.787231 saving as /var/lib/lava/dispatcher/tmp/11712680/tftp-deploy-219w9ws9/kernel/bzImage
50 18:00:55.787290 total size: 8490896 (8 MB)
51 18:00:55.787349 No compression specified
52 18:00:55.788416 progress 0 % (0 MB)
53 18:00:55.790634 progress 5 % (0 MB)
54 18:00:55.792882 progress 10 % (0 MB)
55 18:00:55.795175 progress 15 % (1 MB)
56 18:00:55.797415 progress 20 % (1 MB)
57 18:00:55.799690 progress 25 % (2 MB)
58 18:00:55.801952 progress 30 % (2 MB)
59 18:00:55.804333 progress 35 % (2 MB)
60 18:00:55.806644 progress 40 % (3 MB)
61 18:00:55.808901 progress 45 % (3 MB)
62 18:00:55.811225 progress 50 % (4 MB)
63 18:00:55.813482 progress 55 % (4 MB)
64 18:00:55.815734 progress 60 % (4 MB)
65 18:00:55.817942 progress 65 % (5 MB)
66 18:00:55.820185 progress 70 % (5 MB)
67 18:00:55.822384 progress 75 % (6 MB)
68 18:00:55.824629 progress 80 % (6 MB)
69 18:00:55.826898 progress 85 % (6 MB)
70 18:00:55.829126 progress 90 % (7 MB)
71 18:00:55.831366 progress 95 % (7 MB)
72 18:00:55.833601 progress 100 % (8 MB)
73 18:00:55.833713 8 MB downloaded in 0.05 s (174.45 MB/s)
74 18:00:55.833853 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:00:55.834085 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:00:55.834171 start: 1.3 download-retry (timeout 00:10:00) [common]
78 18:00:55.834262 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 18:00:55.834397 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 18:00:55.834463 saving as /var/lib/lava/dispatcher/tmp/11712680/tftp-deploy-219w9ws9/nfsrootfs/full.rootfs.tar
81 18:00:55.834555 total size: 126031368 (120 MB)
82 18:00:55.834631 Using unxz to decompress xz
83 18:00:55.838772 progress 0 % (0 MB)
84 18:00:56.328009 progress 5 % (6 MB)
85 18:00:56.815938 progress 10 % (12 MB)
86 18:00:57.310445 progress 15 % (18 MB)
87 18:00:57.819728 progress 20 % (24 MB)
88 18:00:58.169748 progress 25 % (30 MB)
89 18:00:58.507559 progress 30 % (36 MB)
90 18:00:58.771824 progress 35 % (42 MB)
91 18:00:58.952079 progress 40 % (48 MB)
92 18:00:59.315963 progress 45 % (54 MB)
93 18:00:59.691758 progress 50 % (60 MB)
94 18:01:00.028701 progress 55 % (66 MB)
95 18:01:00.383169 progress 60 % (72 MB)
96 18:01:00.718086 progress 65 % (78 MB)
97 18:01:01.105008 progress 70 % (84 MB)
98 18:01:01.522487 progress 75 % (90 MB)
99 18:01:01.934150 progress 80 % (96 MB)
100 18:01:02.031737 progress 85 % (102 MB)
101 18:01:02.186053 progress 90 % (108 MB)
102 18:01:02.519671 progress 95 % (114 MB)
103 18:01:02.888118 progress 100 % (120 MB)
104 18:01:02.892916 120 MB downloaded in 7.06 s (17.03 MB/s)
105 18:01:02.893174 end: 1.3.1 http-download (duration 00:00:07) [common]
107 18:01:02.893435 end: 1.3 download-retry (duration 00:00:07) [common]
108 18:01:02.893526 start: 1.4 download-retry (timeout 00:09:53) [common]
109 18:01:02.893616 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 18:01:02.893775 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1778-gc774a35d86d2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 18:01:02.893848 saving as /var/lib/lava/dispatcher/tmp/11712680/tftp-deploy-219w9ws9/modules/modules.tar
112 18:01:02.893909 total size: 250868 (0 MB)
113 18:01:02.893974 Using unxz to decompress xz
114 18:01:02.898301 progress 13 % (0 MB)
115 18:01:02.898713 progress 26 % (0 MB)
116 18:01:02.898956 progress 39 % (0 MB)
117 18:01:02.900523 progress 52 % (0 MB)
118 18:01:02.902359 progress 65 % (0 MB)
119 18:01:02.904238 progress 78 % (0 MB)
120 18:01:02.906093 progress 91 % (0 MB)
121 18:01:02.907818 progress 100 % (0 MB)
122 18:01:02.913303 0 MB downloaded in 0.02 s (12.34 MB/s)
123 18:01:02.913538 end: 1.4.1 http-download (duration 00:00:00) [common]
125 18:01:02.913794 end: 1.4 download-retry (duration 00:00:00) [common]
126 18:01:02.913886 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 18:01:02.913983 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 18:01:05.914980 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11712680/extract-nfsrootfs-1ox7wldr
129 18:01:05.915185 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 18:01:05.915280 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 18:01:05.915449 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4
132 18:01:05.915582 makedir: /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin
133 18:01:05.915694 makedir: /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/tests
134 18:01:05.915793 makedir: /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/results
135 18:01:05.915894 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-add-keys
136 18:01:05.916034 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-add-sources
137 18:01:05.916160 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-background-process-start
138 18:01:05.916289 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-background-process-stop
139 18:01:05.916412 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-common-functions
140 18:01:05.916571 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-echo-ipv4
141 18:01:05.916730 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-install-packages
142 18:01:05.916850 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-installed-packages
143 18:01:05.916977 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-os-build
144 18:01:05.917100 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-probe-channel
145 18:01:05.917219 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-probe-ip
146 18:01:05.917339 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-target-ip
147 18:01:05.917457 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-target-mac
148 18:01:05.917575 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-target-storage
149 18:01:05.917698 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-test-case
150 18:01:05.917819 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-test-event
151 18:01:05.917937 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-test-feedback
152 18:01:05.918056 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-test-raise
153 18:01:05.918175 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-test-reference
154 18:01:05.918300 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-test-runner
155 18:01:05.918422 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-test-set
156 18:01:05.918594 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-test-shell
157 18:01:05.918733 Updating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-install-packages (oe)
158 18:01:05.918884 Updating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/bin/lava-installed-packages (oe)
159 18:01:05.919013 Creating /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/environment
160 18:01:05.919108 LAVA metadata
161 18:01:05.919177 - LAVA_JOB_ID=11712680
162 18:01:05.919238 - LAVA_DISPATCHER_IP=192.168.201.1
163 18:01:05.919335 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 18:01:05.919401 skipped lava-vland-overlay
165 18:01:05.919474 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 18:01:05.919550 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 18:01:05.919609 skipped lava-multinode-overlay
168 18:01:05.919679 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 18:01:05.919754 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 18:01:05.919825 Loading test definitions
171 18:01:05.919920 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 18:01:05.919993 Using /lava-11712680 at stage 0
173 18:01:05.920100 Fetching tests from https://github.com/kernelci/test-definitions
174 18:01:05.920194 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/0/tests/0_ltp-ipc'
175 18:01:09.997772 Running '/usr/bin/git checkout kernelci.org
176 18:01:10.145932 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 18:01:10.146770 uuid=11712680_1.5.2.3.1 testdef=None
178 18:01:10.146927 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
180 18:01:10.147170 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
181 18:01:10.147972 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 18:01:10.148213 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
184 18:01:10.149296 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 18:01:10.149544 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
187 18:01:10.150593 runner path: /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/0/tests/0_ltp-ipc test_uuid 11712680_1.5.2.3.1
188 18:01:10.150681 SKIPFILE='skipfile-lkft.yaml'
189 18:01:10.150744 SKIP_INSTALL='true'
190 18:01:10.150801 TST_CMDFILES='ipc'
191 18:01:10.150942 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 18:01:10.151149 Creating lava-test-runner.conf files
194 18:01:10.151211 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712680/lava-overlay-vhz2j0h4/lava-11712680/0 for stage 0
195 18:01:10.151302 - 0_ltp-ipc
196 18:01:10.151405 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
197 18:01:10.151490 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
198 18:01:17.764395 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 18:01:17.764549 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
200 18:01:17.764640 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 18:01:17.764737 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
202 18:01:17.764828 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
203 18:01:17.907658 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 18:01:17.908069 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
205 18:01:17.908188 extracting modules file /var/lib/lava/dispatcher/tmp/11712680/tftp-deploy-219w9ws9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712680/extract-nfsrootfs-1ox7wldr
206 18:01:17.921724 extracting modules file /var/lib/lava/dispatcher/tmp/11712680/tftp-deploy-219w9ws9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712680/extract-overlay-ramdisk-v6921qq0/ramdisk
207 18:01:17.934915 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 18:01:17.935031 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
209 18:01:17.935120 [common] Applying overlay to NFS
210 18:01:17.935193 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712680/compress-overlay-ckhqjb2x/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712680/extract-nfsrootfs-1ox7wldr
211 18:01:18.852186 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 18:01:18.852357 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
213 18:01:18.852448 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 18:01:18.852541 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
215 18:01:18.852621 Building ramdisk /var/lib/lava/dispatcher/tmp/11712680/extract-overlay-ramdisk-v6921qq0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712680/extract-overlay-ramdisk-v6921qq0/ramdisk
216 18:01:18.935649 >> 27178 blocks
217 18:01:19.492260 rename /var/lib/lava/dispatcher/tmp/11712680/extract-overlay-ramdisk-v6921qq0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712680/tftp-deploy-219w9ws9/ramdisk/ramdisk.cpio.gz
218 18:01:19.492723 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 18:01:19.492848 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
220 18:01:19.492947 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
221 18:01:19.493069 No mkimage arch provided, not using FIT.
222 18:01:19.493160 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 18:01:19.493248 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 18:01:19.493352 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
225 18:01:19.493446 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
226 18:01:19.493558 No LXC device requested
227 18:01:19.493635 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 18:01:19.493723 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
229 18:01:19.493802 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 18:01:19.493880 Checking files for TFTP limit of 4294967296 bytes.
231 18:01:19.494321 end: 1 tftp-deploy (duration 00:00:24) [common]
232 18:01:19.494441 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 18:01:19.494540 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 18:01:19.494681 substitutions:
235 18:01:19.494752 - {DTB}: None
236 18:01:19.494814 - {INITRD}: 11712680/tftp-deploy-219w9ws9/ramdisk/ramdisk.cpio.gz
237 18:01:19.494889 - {KERNEL}: 11712680/tftp-deploy-219w9ws9/kernel/bzImage
238 18:01:19.494992 - {LAVA_MAC}: None
239 18:01:19.495047 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11712680/extract-nfsrootfs-1ox7wldr
240 18:01:19.495103 - {NFS_SERVER_IP}: 192.168.201.1
241 18:01:19.495157 - {PRESEED_CONFIG}: None
242 18:01:19.495211 - {PRESEED_LOCAL}: None
243 18:01:19.495264 - {RAMDISK}: 11712680/tftp-deploy-219w9ws9/ramdisk/ramdisk.cpio.gz
244 18:01:19.495317 - {ROOT_PART}: None
245 18:01:19.495410 - {ROOT}: None
246 18:01:19.495481 - {SERVER_IP}: 192.168.201.1
247 18:01:19.495584 - {TEE}: None
248 18:01:19.495639 Parsed boot commands:
249 18:01:19.495692 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 18:01:19.495868 Parsed boot commands: tftpboot 192.168.201.1 11712680/tftp-deploy-219w9ws9/kernel/bzImage 11712680/tftp-deploy-219w9ws9/kernel/cmdline 11712680/tftp-deploy-219w9ws9/ramdisk/ramdisk.cpio.gz
251 18:01:19.495955 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 18:01:19.496043 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 18:01:19.496135 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 18:01:19.496260 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 18:01:19.496334 Not connected, no need to disconnect.
256 18:01:19.496407 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 18:01:19.496485 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 18:01:19.496552 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
259 18:01:19.500790 Setting prompt string to ['lava-test: # ']
260 18:01:19.501159 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 18:01:19.501265 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 18:01:19.501437 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 18:01:19.501557 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 18:01:19.501758 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
265 18:01:24.638453 >> Command sent successfully.
266 18:01:24.641103 Returned 0 in 5 seconds
267 18:01:24.741494 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 18:01:24.741815 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 18:01:24.741954 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 18:01:24.742041 Setting prompt string to 'Starting depthcharge on Helios...'
272 18:01:24.742108 Changing prompt to 'Starting depthcharge on Helios...'
273 18:01:24.742179 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
274 18:01:24.742478 [Enter `^Ec?' for help]
275 18:01:25.363671
276 18:01:25.364219
277 18:01:25.372793 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
278 18:01:25.376360 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
279 18:01:25.382920 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
280 18:01:25.386705 CPU: AES supported, TXT NOT supported, VT supported
281 18:01:25.393093 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
282 18:01:25.396982 PCH: device id 0284 (rev 00) is Cometlake-U Premium
283 18:01:25.403124 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
284 18:01:25.406565 VBOOT: Loading verstage.
285 18:01:25.410047 FMAP: Found "FLASH" version 1.1 at 0xc04000.
286 18:01:25.416603 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
287 18:01:25.419600 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
288 18:01:25.423193 CBFS @ c08000 size 3f8000
289 18:01:25.429632 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
290 18:01:25.433344 CBFS: Locating 'fallback/verstage'
291 18:01:25.436467 CBFS: Found @ offset 10fb80 size 1072c
292 18:01:25.439645
293 18:01:25.440143
294 18:01:25.449474 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
295 18:01:25.464072 Probing TPM: . done!
296 18:01:25.467587 TPM ready after 0 ms
297 18:01:25.470563 Connected to device vid:did:rid of 1ae0:0028:00
298 18:01:25.480731 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
299 18:01:25.484054 Initialized TPM device CR50 revision 0
300 18:01:25.531455 tlcl_send_startup: Startup return code is 0
301 18:01:25.531969 TPM: setup succeeded
302 18:01:25.543921 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
303 18:01:25.547852 Chrome EC: UHEPI supported
304 18:01:25.551105 Phase 1
305 18:01:25.554249 FMAP: area GBB found @ c05000 (12288 bytes)
306 18:01:25.560938 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
307 18:01:25.564688 Phase 2
308 18:01:25.565255 Phase 3
309 18:01:25.567824 FMAP: area GBB found @ c05000 (12288 bytes)
310 18:01:25.574493 VB2:vb2_report_dev_firmware() This is developer signed firmware
311 18:01:25.580900 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
312 18:01:25.584962 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
313 18:01:25.591066 VB2:vb2_verify_keyblock() Checking keyblock signature...
314 18:01:25.606610 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
315 18:01:25.610161 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
316 18:01:25.616804 VB2:vb2_verify_fw_preamble() Verifying preamble.
317 18:01:25.620662 Phase 4
318 18:01:25.624362 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
319 18:01:25.630597 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
320 18:01:25.811071 VB2:vb2_rsa_verify_digest() Digest check failed!
321 18:01:25.817558 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
322 18:01:25.818133 Saving nvdata
323 18:01:25.820458 Reboot requested (10020007)
324 18:01:25.823497 board_reset() called!
325 18:01:25.823955 full_reset() called!
326 18:01:30.330691
327 18:01:30.331550
328 18:01:30.340705 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
329 18:01:30.343527 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
330 18:01:30.350137 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
331 18:01:30.353563 CPU: AES supported, TXT NOT supported, VT supported
332 18:01:30.360379 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
333 18:01:30.364039 PCH: device id 0284 (rev 00) is Cometlake-U Premium
334 18:01:30.370108 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
335 18:01:30.373283 VBOOT: Loading verstage.
336 18:01:30.376930 FMAP: Found "FLASH" version 1.1 at 0xc04000.
337 18:01:30.383776 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
338 18:01:30.390121 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
339 18:01:30.390204 CBFS @ c08000 size 3f8000
340 18:01:30.396563 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
341 18:01:30.399844 CBFS: Locating 'fallback/verstage'
342 18:01:30.402791 CBFS: Found @ offset 10fb80 size 1072c
343 18:01:30.406919
344 18:01:30.406999
345 18:01:30.416917 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
346 18:01:30.431524 Probing TPM: . done!
347 18:01:30.434705 TPM ready after 0 ms
348 18:01:30.438119 Connected to device vid:did:rid of 1ae0:0028:00
349 18:01:30.448376 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
350 18:01:30.451852 Initialized TPM device CR50 revision 0
351 18:01:30.498559 tlcl_send_startup: Startup return code is 0
352 18:01:30.498686 TPM: setup succeeded
353 18:01:30.511343 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
354 18:01:30.516026 Chrome EC: UHEPI supported
355 18:01:30.519157 Phase 1
356 18:01:30.522360 FMAP: area GBB found @ c05000 (12288 bytes)
357 18:01:30.529201 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
358 18:01:30.535965 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
359 18:01:30.538985 Recovery requested (1009000e)
360 18:01:30.544663 Saving nvdata
361 18:01:30.551015 tlcl_extend: response is 0
362 18:01:30.559840 tlcl_extend: response is 0
363 18:01:30.566666 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
364 18:01:30.570261 CBFS @ c08000 size 3f8000
365 18:01:30.576684 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
366 18:01:30.580051 CBFS: Locating 'fallback/romstage'
367 18:01:30.583302 CBFS: Found @ offset 80 size 145fc
368 18:01:30.586865 Accumulated console time in verstage 98 ms
369 18:01:30.587304
370 18:01:30.587669
371 18:01:30.599892 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
372 18:01:30.606370 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
373 18:01:30.609968 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
374 18:01:30.613559 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
375 18:01:30.620140 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
376 18:01:30.623180 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
377 18:01:30.626331 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
378 18:01:30.629718 TCO_STS: 0000 0000
379 18:01:30.633179 GEN_PMCON: e0015238 00000200
380 18:01:30.636146 GBLRST_CAUSE: 00000000 00000000
381 18:01:30.636749 prev_sleep_state 5
382 18:01:30.639799 Boot Count incremented to 71420
383 18:01:30.646672 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 18:01:30.649640 CBFS @ c08000 size 3f8000
385 18:01:30.656273 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
386 18:01:30.656784 CBFS: Locating 'fspm.bin'
387 18:01:30.662672 CBFS: Found @ offset 5ffc0 size 71000
388 18:01:30.666256 Chrome EC: UHEPI supported
389 18:01:30.672717 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
390 18:01:30.676302 Probing TPM: done!
391 18:01:30.682723 Connected to device vid:did:rid of 1ae0:0028:00
392 18:01:30.692813 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
393 18:01:30.699161 Initialized TPM device CR50 revision 0
394 18:01:30.708126 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
395 18:01:30.714683 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 18:01:30.717629 MRC cache found, size 1948
397 18:01:30.721413 bootmode is set to: 2
398 18:01:30.724500 PRMRR disabled by config.
399 18:01:30.725008 SPD INDEX = 1
400 18:01:30.731314 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 18:01:30.734440 CBFS @ c08000 size 3f8000
402 18:01:30.740941 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 18:01:30.741407 CBFS: Locating 'spd.bin'
404 18:01:30.744531 CBFS: Found @ offset 5fb80 size 400
405 18:01:30.748041 SPD: module type is LPDDR3
406 18:01:30.750891 SPD: module part is
407 18:01:30.757666 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
408 18:01:30.760820 SPD: device width 4 bits, bus width 8 bits
409 18:01:30.764420 SPD: module size is 4096 MB (per channel)
410 18:01:30.767692 memory slot: 0 configuration done.
411 18:01:30.770796 memory slot: 2 configuration done.
412 18:01:30.822664 CBMEM:
413 18:01:30.825458 IMD: root @ 99fff000 254 entries.
414 18:01:30.829231 IMD: root @ 99ffec00 62 entries.
415 18:01:30.832358 External stage cache:
416 18:01:30.835546 IMD: root @ 9abff000 254 entries.
417 18:01:30.839032 IMD: root @ 9abfec00 62 entries.
418 18:01:30.842422 Chrome EC: clear events_b mask to 0x0000000020004000
419 18:01:30.858209 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
420 18:01:30.871941 tlcl_write: response is 0
421 18:01:30.880603 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 18:01:30.887304 MRC: TPM MRC hash updated successfully.
423 18:01:30.887855 2 DIMMs found
424 18:01:30.890899 SMM Memory Map
425 18:01:30.894123 SMRAM : 0x9a000000 0x1000000
426 18:01:30.897221 Subregion 0: 0x9a000000 0xa00000
427 18:01:30.900865 Subregion 1: 0x9aa00000 0x200000
428 18:01:30.903833 Subregion 2: 0x9ac00000 0x400000
429 18:01:30.907566 top_of_ram = 0x9a000000
430 18:01:30.910405 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
431 18:01:30.917190 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
432 18:01:30.920716 MTRR Range: Start=ff000000 End=0 (Size 1000000)
433 18:01:30.927125 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 18:01:30.930747 CBFS @ c08000 size 3f8000
435 18:01:30.934038 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 18:01:30.937041 CBFS: Locating 'fallback/postcar'
437 18:01:30.943849 CBFS: Found @ offset 107000 size 4b44
438 18:01:30.946874 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 18:01:30.959873 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 18:01:30.963013 Processing 180 relocs. Offset value of 0x97c0c000
441 18:01:30.971574 Accumulated console time in romstage 286 ms
442 18:01:30.972127
443 18:01:30.972494
444 18:01:30.981225 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 18:01:30.988032 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 18:01:30.991260 CBFS @ c08000 size 3f8000
447 18:01:30.994787 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 18:01:31.001182 CBFS: Locating 'fallback/ramstage'
449 18:01:31.004866 CBFS: Found @ offset 43380 size 1b9e8
450 18:01:31.011083 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 18:01:31.043063 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 18:01:31.046591 Processing 3976 relocs. Offset value of 0x98db0000
453 18:01:31.053034 Accumulated console time in postcar 52 ms
454 18:01:31.053555
455 18:01:31.053894
456 18:01:31.063457 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 18:01:31.069938 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 18:01:31.073396 WARNING: RO_VPD is uninitialized or empty.
459 18:01:31.076313 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 18:01:31.083136 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 18:01:31.083561 Normal boot.
462 18:01:31.089785 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 18:01:31.093089 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 18:01:31.096402 CBFS @ c08000 size 3f8000
465 18:01:31.103045 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 18:01:31.106340 CBFS: Locating 'cpu_microcode_blob.bin'
467 18:01:31.109374 CBFS: Found @ offset 14700 size 2ec00
468 18:01:31.112820 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 18:01:31.115907 Skip microcode update
470 18:01:31.122753 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 18:01:31.123176 CBFS @ c08000 size 3f8000
472 18:01:31.129373 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 18:01:31.132747 CBFS: Locating 'fsps.bin'
474 18:01:31.135866 CBFS: Found @ offset d1fc0 size 35000
475 18:01:31.161303 Detected 4 core, 8 thread CPU.
476 18:01:31.164530 Setting up SMI for CPU
477 18:01:31.168227 IED base = 0x9ac00000
478 18:01:31.168727 IED size = 0x00400000
479 18:01:31.171566 Will perform SMM setup.
480 18:01:31.177928 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 18:01:31.184799 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 18:01:31.187970 Processing 16 relocs. Offset value of 0x00030000
483 18:01:31.191678 Attempting to start 7 APs
484 18:01:31.194883 Waiting for 10ms after sending INIT.
485 18:01:31.210972 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
486 18:01:31.211429 done.
487 18:01:31.214410 AP: slot 6 apic_id 4.
488 18:01:31.217660 AP: slot 7 apic_id 5.
489 18:01:31.221114 Waiting for 2nd SIPI to complete...done.
490 18:01:31.224826 AP: slot 3 apic_id 2.
491 18:01:31.225244 AP: slot 1 apic_id 3.
492 18:01:31.227753 AP: slot 4 apic_id 6.
493 18:01:31.231088 AP: slot 5 apic_id 7.
494 18:01:31.237854 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 18:01:31.244572 Processing 13 relocs. Offset value of 0x00038000
496 18:01:31.247594 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
497 18:01:31.254675 Installing SMM handler to 0x9a000000
498 18:01:31.261130 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
499 18:01:31.267658 Processing 658 relocs. Offset value of 0x9a010000
500 18:01:31.274280 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
501 18:01:31.277256 Processing 13 relocs. Offset value of 0x9a008000
502 18:01:31.284050 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
503 18:01:31.290817 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
504 18:01:31.297063 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
505 18:01:31.300759 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
506 18:01:31.307084 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
507 18:01:31.313929 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
508 18:01:31.317385 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
509 18:01:31.324173 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
510 18:01:31.327642 Clearing SMI status registers
511 18:01:31.330778 SMI_STS: PM1
512 18:01:31.331294 PM1_STS: PWRBTN
513 18:01:31.334145 TCO_STS: SECOND_TO
514 18:01:31.337136 New SMBASE 0x9a000000
515 18:01:31.340887 In relocation handler: CPU 0
516 18:01:31.343906 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
517 18:01:31.347458 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 18:01:31.350718 Relocation complete.
519 18:01:31.354170 New SMBASE 0x99fff800
520 18:01:31.357575 In relocation handler: CPU 2
521 18:01:31.360709 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
522 18:01:31.363767 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 18:01:31.367063 Relocation complete.
524 18:01:31.370823 New SMBASE 0x99fffc00
525 18:01:31.371299 In relocation handler: CPU 1
526 18:01:31.376962 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
527 18:01:31.380821 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 18:01:31.383669 Relocation complete.
529 18:01:31.384086 New SMBASE 0x99fff400
530 18:01:31.387486 In relocation handler: CPU 3
531 18:01:31.393681 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
532 18:01:31.397415 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 18:01:31.400540 Relocation complete.
534 18:01:31.400957 New SMBASE 0x99fff000
535 18:01:31.403870 In relocation handler: CPU 4
536 18:01:31.410454 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
537 18:01:31.413919 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 18:01:31.417103 Relocation complete.
539 18:01:31.417516 New SMBASE 0x99ffec00
540 18:01:31.420112 In relocation handler: CPU 5
541 18:01:31.427073 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
542 18:01:31.430206 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 18:01:31.433475 Relocation complete.
544 18:01:31.433890 New SMBASE 0x99ffe400
545 18:01:31.437119 In relocation handler: CPU 7
546 18:01:31.440262 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
547 18:01:31.446770 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 18:01:31.449739 Relocation complete.
549 18:01:31.450150 New SMBASE 0x99ffe800
550 18:01:31.453118 In relocation handler: CPU 6
551 18:01:31.456272 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
552 18:01:31.463099 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 18:01:31.466311 Relocation complete.
554 18:01:31.466762 Initializing CPU #0
555 18:01:31.469854 CPU: vendor Intel device 806ec
556 18:01:31.473042 CPU: family 06, model 8e, stepping 0c
557 18:01:31.476517 Clearing out pending MCEs
558 18:01:31.479433 Setting up local APIC...
559 18:01:31.482942 apic_id: 0x00 done.
560 18:01:31.486633 Turbo is available but hidden
561 18:01:31.487154 Turbo is available and visible
562 18:01:31.489821 VMX status: enabled
563 18:01:31.492975 IA32_FEATURE_CONTROL status: locked
564 18:01:31.496243 Skip microcode update
565 18:01:31.496658 CPU #0 initialized
566 18:01:31.499351 Initializing CPU #2
567 18:01:31.502975 Initializing CPU #5
568 18:01:31.503435 Initializing CPU #4
569 18:01:31.506108 CPU: vendor Intel device 806ec
570 18:01:31.509363 CPU: family 06, model 8e, stepping 0c
571 18:01:31.512770 CPU: vendor Intel device 806ec
572 18:01:31.519031 CPU: family 06, model 8e, stepping 0c
573 18:01:31.519446 Clearing out pending MCEs
574 18:01:31.522907 Clearing out pending MCEs
575 18:01:31.525886 Setting up local APIC...
576 18:01:31.529684 CPU: vendor Intel device 806ec
577 18:01:31.532426 CPU: family 06, model 8e, stepping 0c
578 18:01:31.535666 Clearing out pending MCEs
579 18:01:31.536079 Initializing CPU #3
580 18:01:31.538938 Initializing CPU #1
581 18:01:31.542561 CPU: vendor Intel device 806ec
582 18:01:31.545813 CPU: family 06, model 8e, stepping 0c
583 18:01:31.549263 CPU: vendor Intel device 806ec
584 18:01:31.552075 CPU: family 06, model 8e, stepping 0c
585 18:01:31.555512 Clearing out pending MCEs
586 18:01:31.558767 Clearing out pending MCEs
587 18:01:31.561814 Setting up local APIC...
588 18:01:31.562284 apic_id: 0x06 done.
589 18:01:31.565597 Setting up local APIC...
590 18:01:31.568573 Setting up local APIC...
591 18:01:31.569006 Initializing CPU #7
592 18:01:31.571930 Initializing CPU #6
593 18:01:31.575505 CPU: vendor Intel device 806ec
594 18:01:31.578662 CPU: family 06, model 8e, stepping 0c
595 18:01:31.582085 CPU: vendor Intel device 806ec
596 18:01:31.585293 CPU: family 06, model 8e, stepping 0c
597 18:01:31.588429 Clearing out pending MCEs
598 18:01:31.592113 Clearing out pending MCEs
599 18:01:31.592614 Setting up local APIC...
600 18:01:31.595139 apic_id: 0x07 done.
601 18:01:31.598808 VMX status: enabled
602 18:01:31.599275 VMX status: enabled
603 18:01:31.601928 IA32_FEATURE_CONTROL status: locked
604 18:01:31.605112 Setting up local APIC...
605 18:01:31.608682 Skip microcode update
606 18:01:31.611752 IA32_FEATURE_CONTROL status: locked
607 18:01:31.615014 CPU #4 initialized
608 18:01:31.615487 Skip microcode update
609 18:01:31.618629 Setting up local APIC...
610 18:01:31.621786 CPU #5 initialized
611 18:01:31.622218 apic_id: 0x01 done.
612 18:01:31.624990 apic_id: 0x05 done.
613 18:01:31.628682 apic_id: 0x04 done.
614 18:01:31.629155 VMX status: enabled
615 18:01:31.631940 VMX status: enabled
616 18:01:31.635165 IA32_FEATURE_CONTROL status: locked
617 18:01:31.638181 IA32_FEATURE_CONTROL status: locked
618 18:01:31.641842 Skip microcode update
619 18:01:31.642235 Skip microcode update
620 18:01:31.645138 CPU #7 initialized
621 18:01:31.645627 CPU #6 initialized
622 18:01:31.648370 VMX status: enabled
623 18:01:31.651555 apic_id: 0x02 done.
624 18:01:31.652037 apic_id: 0x03 done.
625 18:01:31.654792 VMX status: enabled
626 18:01:31.658430 VMX status: enabled
627 18:01:31.661296 IA32_FEATURE_CONTROL status: locked
628 18:01:31.665036 IA32_FEATURE_CONTROL status: locked
629 18:01:31.665575 Skip microcode update
630 18:01:31.668184 Skip microcode update
631 18:01:31.671550 CPU #3 initialized
632 18:01:31.671988 CPU #1 initialized
633 18:01:31.675248 IA32_FEATURE_CONTROL status: locked
634 18:01:31.678144 Skip microcode update
635 18:01:31.681025 CPU #2 initialized
636 18:01:31.684669 bsp_do_flight_plan done after 462 msecs.
637 18:01:31.688282 CPU: frequency set to 4200 MHz
638 18:01:31.688751 Enabling SMIs.
639 18:01:31.691169 Locking SMM.
640 18:01:31.705737 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
641 18:01:31.708883 CBFS @ c08000 size 3f8000
642 18:01:31.715184 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
643 18:01:31.715669 CBFS: Locating 'vbt.bin'
644 18:01:31.718949 CBFS: Found @ offset 5f5c0 size 499
645 18:01:31.725647 Found a VBT of 4608 bytes after decompression
646 18:01:31.910752 Display FSP Version Info HOB
647 18:01:31.913600 Reference Code - CPU = 9.0.1e.30
648 18:01:31.917415 uCode Version = 0.0.0.ca
649 18:01:31.920604 TXT ACM version = ff.ff.ff.ffff
650 18:01:31.923654 Display FSP Version Info HOB
651 18:01:31.927237 Reference Code - ME = 9.0.1e.30
652 18:01:31.930479 MEBx version = 0.0.0.0
653 18:01:31.934225 ME Firmware Version = Consumer SKU
654 18:01:31.937210 Display FSP Version Info HOB
655 18:01:31.940376 Reference Code - CML PCH = 9.0.1e.30
656 18:01:31.940949 PCH-CRID Status = Disabled
657 18:01:31.947237 PCH-CRID Original Value = ff.ff.ff.ffff
658 18:01:31.950481 PCH-CRID New Value = ff.ff.ff.ffff
659 18:01:31.953993 OPROM - RST - RAID = ff.ff.ff.ffff
660 18:01:31.957218 ChipsetInit Base Version = ff.ff.ff.ffff
661 18:01:31.960212 ChipsetInit Oem Version = ff.ff.ff.ffff
662 18:01:31.963314 Display FSP Version Info HOB
663 18:01:31.970204 Reference Code - SA - System Agent = 9.0.1e.30
664 18:01:31.973567 Reference Code - MRC = 0.7.1.6c
665 18:01:31.974047 SA - PCIe Version = 9.0.1e.30
666 18:01:31.976907 SA-CRID Status = Disabled
667 18:01:31.980375 SA-CRID Original Value = 0.0.0.c
668 18:01:31.983213 SA-CRID New Value = 0.0.0.c
669 18:01:31.986927 OPROM - VBIOS = ff.ff.ff.ffff
670 18:01:31.989804 RTC Init
671 18:01:31.993223 Set power on after power failure.
672 18:01:31.993793 Disabling Deep S3
673 18:01:31.997236 Disabling Deep S3
674 18:01:31.997671 Disabling Deep S4
675 18:01:32.000020 Disabling Deep S4
676 18:01:32.000451 Disabling Deep S5
677 18:01:32.003774 Disabling Deep S5
678 18:01:32.010154 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 195 exit 1
679 18:01:32.010695 Enumerating buses...
680 18:01:32.016820 Show all devs... Before device enumeration.
681 18:01:32.017380 Root Device: enabled 1
682 18:01:32.020129 CPU_CLUSTER: 0: enabled 1
683 18:01:32.023419 DOMAIN: 0000: enabled 1
684 18:01:32.027032 APIC: 00: enabled 1
685 18:01:32.027526 PCI: 00:00.0: enabled 1
686 18:01:32.030069 PCI: 00:02.0: enabled 1
687 18:01:32.033400 PCI: 00:04.0: enabled 0
688 18:01:32.033886 PCI: 00:05.0: enabled 0
689 18:01:32.036555 PCI: 00:12.0: enabled 1
690 18:01:32.040347 PCI: 00:12.5: enabled 0
691 18:01:32.043379 PCI: 00:12.6: enabled 0
692 18:01:32.043901 PCI: 00:14.0: enabled 1
693 18:01:32.046610 PCI: 00:14.1: enabled 0
694 18:01:32.049685 PCI: 00:14.3: enabled 1
695 18:01:32.053435 PCI: 00:14.5: enabled 0
696 18:01:32.053996 PCI: 00:15.0: enabled 1
697 18:01:32.056916 PCI: 00:15.1: enabled 1
698 18:01:32.059628 PCI: 00:15.2: enabled 0
699 18:01:32.063387 PCI: 00:15.3: enabled 0
700 18:01:32.063893 PCI: 00:16.0: enabled 1
701 18:01:32.066332 PCI: 00:16.1: enabled 0
702 18:01:32.069822 PCI: 00:16.2: enabled 0
703 18:01:32.070382 PCI: 00:16.3: enabled 0
704 18:01:32.073334 PCI: 00:16.4: enabled 0
705 18:01:32.076527 PCI: 00:16.5: enabled 0
706 18:01:32.079792 PCI: 00:17.0: enabled 1
707 18:01:32.080354 PCI: 00:19.0: enabled 1
708 18:01:32.082966 PCI: 00:19.1: enabled 0
709 18:01:32.086220 PCI: 00:19.2: enabled 0
710 18:01:32.089512 PCI: 00:1a.0: enabled 0
711 18:01:32.089979 PCI: 00:1c.0: enabled 0
712 18:01:32.093204 PCI: 00:1c.1: enabled 0
713 18:01:32.096345 PCI: 00:1c.2: enabled 0
714 18:01:32.100087 PCI: 00:1c.3: enabled 0
715 18:01:32.100655 PCI: 00:1c.4: enabled 0
716 18:01:32.103120 PCI: 00:1c.5: enabled 0
717 18:01:32.106047 PCI: 00:1c.6: enabled 0
718 18:01:32.106568 PCI: 00:1c.7: enabled 0
719 18:01:32.109472 PCI: 00:1d.0: enabled 1
720 18:01:32.112636 PCI: 00:1d.1: enabled 0
721 18:01:32.116340 PCI: 00:1d.2: enabled 0
722 18:01:32.116808 PCI: 00:1d.3: enabled 0
723 18:01:32.119435 PCI: 00:1d.4: enabled 0
724 18:01:32.122930 PCI: 00:1d.5: enabled 1
725 18:01:32.126162 PCI: 00:1e.0: enabled 1
726 18:01:32.126663 PCI: 00:1e.1: enabled 0
727 18:01:32.129840 PCI: 00:1e.2: enabled 1
728 18:01:32.132703 PCI: 00:1e.3: enabled 1
729 18:01:32.136048 PCI: 00:1f.0: enabled 1
730 18:01:32.136516 PCI: 00:1f.1: enabled 1
731 18:01:32.139524 PCI: 00:1f.2: enabled 1
732 18:01:32.142602 PCI: 00:1f.3: enabled 1
733 18:01:32.143072 PCI: 00:1f.4: enabled 1
734 18:01:32.145862 PCI: 00:1f.5: enabled 1
735 18:01:32.149667 PCI: 00:1f.6: enabled 0
736 18:01:32.152708 USB0 port 0: enabled 1
737 18:01:32.153276 I2C: 00:15: enabled 1
738 18:01:32.155847 I2C: 00:5d: enabled 1
739 18:01:32.158985 GENERIC: 0.0: enabled 1
740 18:01:32.159459 I2C: 00:1a: enabled 1
741 18:01:32.162692 I2C: 00:38: enabled 1
742 18:01:32.165913 I2C: 00:39: enabled 1
743 18:01:32.166444 I2C: 00:3a: enabled 1
744 18:01:32.169172 I2C: 00:3b: enabled 1
745 18:01:32.172574 PCI: 00:00.0: enabled 1
746 18:01:32.173043 SPI: 00: enabled 1
747 18:01:32.175740 SPI: 01: enabled 1
748 18:01:32.179068 PNP: 0c09.0: enabled 1
749 18:01:32.179537 USB2 port 0: enabled 1
750 18:01:32.183196 USB2 port 1: enabled 1
751 18:01:32.185888 USB2 port 2: enabled 0
752 18:01:32.189332 USB2 port 3: enabled 0
753 18:01:32.189800 USB2 port 5: enabled 0
754 18:01:32.192326 USB2 port 6: enabled 1
755 18:01:32.195942 USB2 port 9: enabled 1
756 18:01:32.196585 USB3 port 0: enabled 1
757 18:01:32.199060 USB3 port 1: enabled 1
758 18:01:32.202485 USB3 port 2: enabled 1
759 18:01:32.206198 USB3 port 3: enabled 1
760 18:01:32.206831 USB3 port 4: enabled 0
761 18:01:32.209140 APIC: 03: enabled 1
762 18:01:32.209608 APIC: 01: enabled 1
763 18:01:32.212116 APIC: 02: enabled 1
764 18:01:32.215685 APIC: 06: enabled 1
765 18:01:32.216209 APIC: 07: enabled 1
766 18:01:32.219006 APIC: 04: enabled 1
767 18:01:32.222146 APIC: 05: enabled 1
768 18:01:32.222654 Compare with tree...
769 18:01:32.225761 Root Device: enabled 1
770 18:01:32.229062 CPU_CLUSTER: 0: enabled 1
771 18:01:32.229623 APIC: 00: enabled 1
772 18:01:32.232470 APIC: 03: enabled 1
773 18:01:32.235527 APIC: 01: enabled 1
774 18:01:32.235991 APIC: 02: enabled 1
775 18:01:32.238884 APIC: 06: enabled 1
776 18:01:32.242219 APIC: 07: enabled 1
777 18:01:32.242751 APIC: 04: enabled 1
778 18:01:32.245276 APIC: 05: enabled 1
779 18:01:32.248773 DOMAIN: 0000: enabled 1
780 18:01:32.252806 PCI: 00:00.0: enabled 1
781 18:01:32.253369 PCI: 00:02.0: enabled 1
782 18:01:32.255879 PCI: 00:04.0: enabled 0
783 18:01:32.258712 PCI: 00:05.0: enabled 0
784 18:01:32.262383 PCI: 00:12.0: enabled 1
785 18:01:32.265289 PCI: 00:12.5: enabled 0
786 18:01:32.265756 PCI: 00:12.6: enabled 0
787 18:01:32.269255 PCI: 00:14.0: enabled 1
788 18:01:32.272167 USB0 port 0: enabled 1
789 18:01:32.275568 USB2 port 0: enabled 1
790 18:01:32.278637 USB2 port 1: enabled 1
791 18:01:32.279096 USB2 port 2: enabled 0
792 18:01:32.282296 USB2 port 3: enabled 0
793 18:01:32.285519 USB2 port 5: enabled 0
794 18:01:32.288646 USB2 port 6: enabled 1
795 18:01:32.292252 USB2 port 9: enabled 1
796 18:01:32.295311 USB3 port 0: enabled 1
797 18:01:32.295778 USB3 port 1: enabled 1
798 18:01:32.298697 USB3 port 2: enabled 1
799 18:01:32.302239 USB3 port 3: enabled 1
800 18:01:32.305307 USB3 port 4: enabled 0
801 18:01:32.308734 PCI: 00:14.1: enabled 0
802 18:01:32.309248 PCI: 00:14.3: enabled 1
803 18:01:32.312011 PCI: 00:14.5: enabled 0
804 18:01:32.315380 PCI: 00:15.0: enabled 1
805 18:01:32.318358 I2C: 00:15: enabled 1
806 18:01:32.321821 PCI: 00:15.1: enabled 1
807 18:01:32.322319 I2C: 00:5d: enabled 1
808 18:01:32.325160 GENERIC: 0.0: enabled 1
809 18:01:32.328347 PCI: 00:15.2: enabled 0
810 18:01:32.332022 PCI: 00:15.3: enabled 0
811 18:01:32.335150 PCI: 00:16.0: enabled 1
812 18:01:32.335703 PCI: 00:16.1: enabled 0
813 18:01:32.338480 PCI: 00:16.2: enabled 0
814 18:01:32.341939 PCI: 00:16.3: enabled 0
815 18:01:32.345101 PCI: 00:16.4: enabled 0
816 18:01:32.345644 PCI: 00:16.5: enabled 0
817 18:01:32.348327 PCI: 00:17.0: enabled 1
818 18:01:32.352195 PCI: 00:19.0: enabled 1
819 18:01:32.355100 I2C: 00:1a: enabled 1
820 18:01:32.358471 I2C: 00:38: enabled 1
821 18:01:32.359002 I2C: 00:39: enabled 1
822 18:01:32.361696 I2C: 00:3a: enabled 1
823 18:01:32.364899 I2C: 00:3b: enabled 1
824 18:01:32.368277 PCI: 00:19.1: enabled 0
825 18:01:32.368744 PCI: 00:19.2: enabled 0
826 18:01:32.372257 PCI: 00:1a.0: enabled 0
827 18:01:32.375176 PCI: 00:1c.0: enabled 0
828 18:01:32.378349 PCI: 00:1c.1: enabled 0
829 18:01:32.381993 PCI: 00:1c.2: enabled 0
830 18:01:32.382603 PCI: 00:1c.3: enabled 0
831 18:01:32.385195 PCI: 00:1c.4: enabled 0
832 18:01:32.388137 PCI: 00:1c.5: enabled 0
833 18:01:32.391390 PCI: 00:1c.6: enabled 0
834 18:01:32.394630 PCI: 00:1c.7: enabled 0
835 18:01:32.395102 PCI: 00:1d.0: enabled 1
836 18:01:32.398384 PCI: 00:1d.1: enabled 0
837 18:01:32.401368 PCI: 00:1d.2: enabled 0
838 18:01:32.404738 PCI: 00:1d.3: enabled 0
839 18:01:32.407996 PCI: 00:1d.4: enabled 0
840 18:01:32.408455 PCI: 00:1d.5: enabled 1
841 18:01:32.411429 PCI: 00:00.0: enabled 1
842 18:01:32.414720 PCI: 00:1e.0: enabled 1
843 18:01:32.418185 PCI: 00:1e.1: enabled 0
844 18:01:32.421167 PCI: 00:1e.2: enabled 1
845 18:01:32.421626 SPI: 00: enabled 1
846 18:01:32.424614 PCI: 00:1e.3: enabled 1
847 18:01:32.428141 SPI: 01: enabled 1
848 18:01:32.431396 PCI: 00:1f.0: enabled 1
849 18:01:32.431881 PNP: 0c09.0: enabled 1
850 18:01:32.434428 PCI: 00:1f.1: enabled 1
851 18:01:32.438164 PCI: 00:1f.2: enabled 1
852 18:01:32.441263 PCI: 00:1f.3: enabled 1
853 18:01:32.441751 PCI: 00:1f.4: enabled 1
854 18:01:32.444403 PCI: 00:1f.5: enabled 1
855 18:01:32.447942 PCI: 00:1f.6: enabled 0
856 18:01:32.450922 Root Device scanning...
857 18:01:32.454712 scan_static_bus for Root Device
858 18:01:32.457774 CPU_CLUSTER: 0 enabled
859 18:01:32.458408 DOMAIN: 0000 enabled
860 18:01:32.461242 DOMAIN: 0000 scanning...
861 18:01:32.464348 PCI: pci_scan_bus for bus 00
862 18:01:32.468062 PCI: 00:00.0 [8086/0000] ops
863 18:01:32.471075 PCI: 00:00.0 [8086/9b61] enabled
864 18:01:32.474710 PCI: 00:02.0 [8086/0000] bus ops
865 18:01:32.477679 PCI: 00:02.0 [8086/9b41] enabled
866 18:01:32.480820 PCI: 00:04.0 [8086/1903] disabled
867 18:01:32.484433 PCI: 00:08.0 [8086/1911] enabled
868 18:01:32.487537 PCI: 00:12.0 [8086/02f9] enabled
869 18:01:32.491151 PCI: 00:14.0 [8086/0000] bus ops
870 18:01:32.494440 PCI: 00:14.0 [8086/02ed] enabled
871 18:01:32.497838 PCI: 00:14.2 [8086/02ef] enabled
872 18:01:32.500723 PCI: 00:14.3 [8086/02f0] enabled
873 18:01:32.504558 PCI: 00:15.0 [8086/0000] bus ops
874 18:01:32.507826 PCI: 00:15.0 [8086/02e8] enabled
875 18:01:32.510860 PCI: 00:15.1 [8086/0000] bus ops
876 18:01:32.514082 PCI: 00:15.1 [8086/02e9] enabled
877 18:01:32.517402 PCI: 00:16.0 [8086/0000] ops
878 18:01:32.521030 PCI: 00:16.0 [8086/02e0] enabled
879 18:01:32.523996 PCI: 00:17.0 [8086/0000] ops
880 18:01:32.527391 PCI: 00:17.0 [8086/02d3] enabled
881 18:01:32.530695 PCI: 00:19.0 [8086/0000] bus ops
882 18:01:32.533947 PCI: 00:19.0 [8086/02c5] enabled
883 18:01:32.537575 PCI: 00:1d.0 [8086/0000] bus ops
884 18:01:32.540444 PCI: 00:1d.0 [8086/02b0] enabled
885 18:01:32.544289 PCI: Static device PCI: 00:1d.5 not found, disabling it.
886 18:01:32.547428 PCI: 00:1e.0 [8086/0000] ops
887 18:01:32.550899 PCI: 00:1e.0 [8086/02a8] enabled
888 18:01:32.554383 PCI: 00:1e.2 [8086/0000] bus ops
889 18:01:32.557351 PCI: 00:1e.2 [8086/02aa] enabled
890 18:01:32.560539 PCI: 00:1e.3 [8086/0000] bus ops
891 18:01:32.564090 PCI: 00:1e.3 [8086/02ab] enabled
892 18:01:32.567280 PCI: 00:1f.0 [8086/0000] bus ops
893 18:01:32.570876 PCI: 00:1f.0 [8086/0284] enabled
894 18:01:32.576917 PCI: Static device PCI: 00:1f.1 not found, disabling it.
895 18:01:32.583653 PCI: Static device PCI: 00:1f.2 not found, disabling it.
896 18:01:32.587219 PCI: 00:1f.3 [8086/0000] bus ops
897 18:01:32.590445 PCI: 00:1f.3 [8086/02c8] enabled
898 18:01:32.593704 PCI: 00:1f.4 [8086/0000] bus ops
899 18:01:32.596838 PCI: 00:1f.4 [8086/02a3] enabled
900 18:01:32.600171 PCI: 00:1f.5 [8086/0000] bus ops
901 18:01:32.603776 PCI: 00:1f.5 [8086/02a4] enabled
902 18:01:32.607103 PCI: Leftover static devices:
903 18:01:32.607520 PCI: 00:05.0
904 18:01:32.610167 PCI: 00:12.5
905 18:01:32.610790 PCI: 00:12.6
906 18:01:32.611132 PCI: 00:14.1
907 18:01:32.613676 PCI: 00:14.5
908 18:01:32.614183 PCI: 00:15.2
909 18:01:32.616980 PCI: 00:15.3
910 18:01:32.617446 PCI: 00:16.1
911 18:01:32.617845 PCI: 00:16.2
912 18:01:32.620030 PCI: 00:16.3
913 18:01:32.620449 PCI: 00:16.4
914 18:01:32.623729 PCI: 00:16.5
915 18:01:32.624382 PCI: 00:19.1
916 18:01:32.624728 PCI: 00:19.2
917 18:01:32.627143 PCI: 00:1a.0
918 18:01:32.627561 PCI: 00:1c.0
919 18:01:32.630096 PCI: 00:1c.1
920 18:01:32.630696 PCI: 00:1c.2
921 18:01:32.631172 PCI: 00:1c.3
922 18:01:32.633689 PCI: 00:1c.4
923 18:01:32.634105 PCI: 00:1c.5
924 18:01:32.637268 PCI: 00:1c.6
925 18:01:32.637811 PCI: 00:1c.7
926 18:01:32.639933 PCI: 00:1d.1
927 18:01:32.640520 PCI: 00:1d.2
928 18:01:32.640866 PCI: 00:1d.3
929 18:01:32.643642 PCI: 00:1d.4
930 18:01:32.644060 PCI: 00:1d.5
931 18:01:32.647050 PCI: 00:1e.1
932 18:01:32.647525 PCI: 00:1f.1
933 18:01:32.647905 PCI: 00:1f.2
934 18:01:32.650370 PCI: 00:1f.6
935 18:01:32.653655 PCI: Check your devicetree.cb.
936 18:01:32.657357 PCI: 00:02.0 scanning...
937 18:01:32.660589 scan_generic_bus for PCI: 00:02.0
938 18:01:32.663154 scan_generic_bus for PCI: 00:02.0 done
939 18:01:32.670223 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
940 18:01:32.670788 PCI: 00:14.0 scanning...
941 18:01:32.673264 scan_static_bus for PCI: 00:14.0
942 18:01:32.676965 USB0 port 0 enabled
943 18:01:32.679919 USB0 port 0 scanning...
944 18:01:32.683385 scan_static_bus for USB0 port 0
945 18:01:32.683839 USB2 port 0 enabled
946 18:01:32.686627 USB2 port 1 enabled
947 18:01:32.689774 USB2 port 2 disabled
948 18:01:32.690228 USB2 port 3 disabled
949 18:01:32.693251 USB2 port 5 disabled
950 18:01:32.696833 USB2 port 6 enabled
951 18:01:32.697245 USB2 port 9 enabled
952 18:01:32.699934 USB3 port 0 enabled
953 18:01:32.700345 USB3 port 1 enabled
954 18:01:32.703026 USB3 port 2 enabled
955 18:01:32.706830 USB3 port 3 enabled
956 18:01:32.707353 USB3 port 4 disabled
957 18:01:32.710098 USB2 port 0 scanning...
958 18:01:32.712810 scan_static_bus for USB2 port 0
959 18:01:32.716620 scan_static_bus for USB2 port 0 done
960 18:01:32.723036 scan_bus: scanning of bus USB2 port 0 took 9711 usecs
961 18:01:32.726603 USB2 port 1 scanning...
962 18:01:32.729609 scan_static_bus for USB2 port 1
963 18:01:32.733103 scan_static_bus for USB2 port 1 done
964 18:01:32.736766 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
965 18:01:32.739683 USB2 port 6 scanning...
966 18:01:32.743235 scan_static_bus for USB2 port 6
967 18:01:32.746189 scan_static_bus for USB2 port 6 done
968 18:01:32.752963 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
969 18:01:32.756240 USB2 port 9 scanning...
970 18:01:32.759619 scan_static_bus for USB2 port 9
971 18:01:32.762650 scan_static_bus for USB2 port 9 done
972 18:01:32.765754 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
973 18:01:32.769425 USB3 port 0 scanning...
974 18:01:32.772255 scan_static_bus for USB3 port 0
975 18:01:32.776034 scan_static_bus for USB3 port 0 done
976 18:01:32.782289 scan_bus: scanning of bus USB3 port 0 took 9699 usecs
977 18:01:32.785510 USB3 port 1 scanning...
978 18:01:32.789199 scan_static_bus for USB3 port 1
979 18:01:32.792337 scan_static_bus for USB3 port 1 done
980 18:01:32.795683 scan_bus: scanning of bus USB3 port 1 took 9694 usecs
981 18:01:32.798869 USB3 port 2 scanning...
982 18:01:32.802138 scan_static_bus for USB3 port 2
983 18:01:32.805232 scan_static_bus for USB3 port 2 done
984 18:01:32.812509 scan_bus: scanning of bus USB3 port 2 took 9702 usecs
985 18:01:32.815629 USB3 port 3 scanning...
986 18:01:32.818783 scan_static_bus for USB3 port 3
987 18:01:32.822436 scan_static_bus for USB3 port 3 done
988 18:01:32.825536 scan_bus: scanning of bus USB3 port 3 took 9710 usecs
989 18:01:32.832242 scan_static_bus for USB0 port 0 done
990 18:01:32.835295 scan_bus: scanning of bus USB0 port 0 took 155406 usecs
991 18:01:32.838840 scan_static_bus for PCI: 00:14.0 done
992 18:01:32.845547 scan_bus: scanning of bus PCI: 00:14.0 took 173033 usecs
993 18:01:32.849002 PCI: 00:15.0 scanning...
994 18:01:32.852185 scan_generic_bus for PCI: 00:15.0
995 18:01:32.855570 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
996 18:01:32.858778 scan_generic_bus for PCI: 00:15.0 done
997 18:01:32.865626 scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
998 18:01:32.868715 PCI: 00:15.1 scanning...
999 18:01:32.871962 scan_generic_bus for PCI: 00:15.1
1000 18:01:32.875281 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1001 18:01:32.881564 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1002 18:01:32.885202 scan_generic_bus for PCI: 00:15.1 done
1003 18:01:32.888538 scan_bus: scanning of bus PCI: 00:15.1 took 18648 usecs
1004 18:01:32.891646 PCI: 00:19.0 scanning...
1005 18:01:32.895343 scan_generic_bus for PCI: 00:19.0
1006 18:01:32.898364 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1007 18:01:32.904997 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1008 18:01:32.908227 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1009 18:01:32.911526 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1010 18:01:32.914998 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1011 18:01:32.921788 scan_generic_bus for PCI: 00:19.0 done
1012 18:01:32.924947 scan_bus: scanning of bus PCI: 00:19.0 took 30768 usecs
1013 18:01:32.928473 PCI: 00:1d.0 scanning...
1014 18:01:32.931592 do_pci_scan_bridge for PCI: 00:1d.0
1015 18:01:32.934791 PCI: pci_scan_bus for bus 01
1016 18:01:32.938311 PCI: 01:00.0 [1c5c/1327] enabled
1017 18:01:32.941327 Enabling Common Clock Configuration
1018 18:01:32.944926 L1 Sub-State supported from root port 29
1019 18:01:32.948262 L1 Sub-State Support = 0xf
1020 18:01:32.951865 CommonModeRestoreTime = 0x28
1021 18:01:32.954796 Power On Value = 0x16, Power On Scale = 0x0
1022 18:01:32.958296 ASPM: Enabled L1
1023 18:01:32.965045 scan_bus: scanning of bus PCI: 00:1d.0 took 32800 usecs
1024 18:01:32.965145 PCI: 00:1e.2 scanning...
1025 18:01:32.971718 scan_generic_bus for PCI: 00:1e.2
1026 18:01:32.974831 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1027 18:01:32.978347 scan_generic_bus for PCI: 00:1e.2 done
1028 18:01:32.984994 scan_bus: scanning of bus PCI: 00:1e.2 took 14015 usecs
1029 18:01:32.985066 PCI: 00:1e.3 scanning...
1030 18:01:32.988260 scan_generic_bus for PCI: 00:1e.3
1031 18:01:32.995048 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1032 18:01:32.998260 scan_generic_bus for PCI: 00:1e.3 done
1033 18:01:33.001847 scan_bus: scanning of bus PCI: 00:1e.3 took 14004 usecs
1034 18:01:33.004901 PCI: 00:1f.0 scanning...
1035 18:01:33.008173 scan_static_bus for PCI: 00:1f.0
1036 18:01:33.011331 PNP: 0c09.0 enabled
1037 18:01:33.014778 scan_static_bus for PCI: 00:1f.0 done
1038 18:01:33.021336 scan_bus: scanning of bus PCI: 00:1f.0 took 12050 usecs
1039 18:01:33.021507 PCI: 00:1f.3 scanning...
1040 18:01:33.028432 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1041 18:01:33.031714 PCI: 00:1f.4 scanning...
1042 18:01:33.034740 scan_generic_bus for PCI: 00:1f.4
1043 18:01:33.038402 scan_generic_bus for PCI: 00:1f.4 done
1044 18:01:33.044851 scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs
1045 18:01:33.048147 PCI: 00:1f.5 scanning...
1046 18:01:33.051492 scan_generic_bus for PCI: 00:1f.5
1047 18:01:33.054511 scan_generic_bus for PCI: 00:1f.5 done
1048 18:01:33.061058 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1049 18:01:33.064335 scan_bus: scanning of bus DOMAIN: 0000 took 605284 usecs
1050 18:01:33.067824 scan_static_bus for Root Device done
1051 18:01:33.074803 scan_bus: scanning of bus Root Device took 625174 usecs
1052 18:01:33.074876 done
1053 18:01:33.077652 Chrome EC: UHEPI supported
1054 18:01:33.084427 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1055 18:01:33.091194 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1056 18:01:33.097972 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1057 18:01:33.104700 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1058 18:01:33.107884 SPI flash protection: WPSW=0 SRP0=0
1059 18:01:33.110914 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1060 18:01:33.117896 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1061 18:01:33.120880 found VGA at PCI: 00:02.0
1062 18:01:33.124412 Setting up VGA for PCI: 00:02.0
1063 18:01:33.127532 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1064 18:01:33.134224 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1065 18:01:33.137720 Allocating resources...
1066 18:01:33.137823 Reading resources...
1067 18:01:33.144357 Root Device read_resources bus 0 link: 0
1068 18:01:33.147649 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1069 18:01:33.150868 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1070 18:01:33.157552 DOMAIN: 0000 read_resources bus 0 link: 0
1071 18:01:33.164353 PCI: 00:14.0 read_resources bus 0 link: 0
1072 18:01:33.167857 USB0 port 0 read_resources bus 0 link: 0
1073 18:01:33.175010 USB0 port 0 read_resources bus 0 link: 0 done
1074 18:01:33.178597 PCI: 00:14.0 read_resources bus 0 link: 0 done
1075 18:01:33.185916 PCI: 00:15.0 read_resources bus 1 link: 0
1076 18:01:33.189289 PCI: 00:15.0 read_resources bus 1 link: 0 done
1077 18:01:33.195953 PCI: 00:15.1 read_resources bus 2 link: 0
1078 18:01:33.199029 PCI: 00:15.1 read_resources bus 2 link: 0 done
1079 18:01:33.206426 PCI: 00:19.0 read_resources bus 3 link: 0
1080 18:01:33.213201 PCI: 00:19.0 read_resources bus 3 link: 0 done
1081 18:01:33.216314 PCI: 00:1d.0 read_resources bus 1 link: 0
1082 18:01:33.223134 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1083 18:01:33.226302 PCI: 00:1e.2 read_resources bus 4 link: 0
1084 18:01:33.232971 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1085 18:01:33.236161 PCI: 00:1e.3 read_resources bus 5 link: 0
1086 18:01:33.242771 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1087 18:01:33.246501 PCI: 00:1f.0 read_resources bus 0 link: 0
1088 18:01:33.253182 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1089 18:01:33.259737 DOMAIN: 0000 read_resources bus 0 link: 0 done
1090 18:01:33.262867 Root Device read_resources bus 0 link: 0 done
1091 18:01:33.265872 Done reading resources.
1092 18:01:33.273098 Show resources in subtree (Root Device)...After reading.
1093 18:01:33.276043 Root Device child on link 0 CPU_CLUSTER: 0
1094 18:01:33.279245 CPU_CLUSTER: 0 child on link 0 APIC: 00
1095 18:01:33.282485 APIC: 00
1096 18:01:33.282599 APIC: 03
1097 18:01:33.282672 APIC: 01
1098 18:01:33.286138 APIC: 02
1099 18:01:33.286235 APIC: 06
1100 18:01:33.286311 APIC: 07
1101 18:01:33.289359 APIC: 04
1102 18:01:33.289466 APIC: 05
1103 18:01:33.296131 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1104 18:01:33.345618 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1105 18:01:33.345919 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1106 18:01:33.346010 PCI: 00:00.0
1107 18:01:33.346119 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1108 18:01:33.346208 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1109 18:01:33.346717 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1110 18:01:33.395624 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1111 18:01:33.395976 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1112 18:01:33.396074 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1113 18:01:33.396990 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1114 18:01:33.397091 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1115 18:01:33.405009 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1116 18:01:33.408156 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1117 18:01:33.418292 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1118 18:01:33.427961 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1119 18:01:33.438319 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1120 18:01:33.447728 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1121 18:01:33.454627 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1122 18:01:33.464441 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1123 18:01:33.467852 PCI: 00:02.0
1124 18:01:33.477994 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 18:01:33.487993 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 18:01:33.494426 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 18:01:33.497590 PCI: 00:04.0
1128 18:01:33.497665 PCI: 00:08.0
1129 18:01:33.507653 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 18:01:33.510812 PCI: 00:12.0
1131 18:01:33.520653 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 18:01:33.524255 PCI: 00:14.0 child on link 0 USB0 port 0
1133 18:01:33.534789 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1134 18:01:33.541025 USB0 port 0 child on link 0 USB2 port 0
1135 18:01:33.541435 USB2 port 0
1136 18:01:33.544475 USB2 port 1
1137 18:01:33.545053 USB2 port 2
1138 18:01:33.547973 USB2 port 3
1139 18:01:33.548384 USB2 port 5
1140 18:01:33.551182 USB2 port 6
1141 18:01:33.551589 USB2 port 9
1142 18:01:33.554414 USB3 port 0
1143 18:01:33.555012 USB3 port 1
1144 18:01:33.558054 USB3 port 2
1145 18:01:33.558458 USB3 port 3
1146 18:01:33.561086 USB3 port 4
1147 18:01:33.561494 PCI: 00:14.2
1148 18:01:33.571229 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1149 18:01:33.580620 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1150 18:01:33.584067 PCI: 00:14.3
1151 18:01:33.593809 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 18:01:33.597217 PCI: 00:15.0 child on link 0 I2C: 01:15
1153 18:01:33.607552 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 18:01:33.610616 I2C: 01:15
1155 18:01:33.613887 PCI: 00:15.1 child on link 0 I2C: 02:5d
1156 18:01:33.624108 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 18:01:33.624710 I2C: 02:5d
1158 18:01:33.627425 GENERIC: 0.0
1159 18:01:33.627876 PCI: 00:16.0
1160 18:01:33.637624 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 18:01:33.640429 PCI: 00:17.0
1162 18:01:33.650457 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1163 18:01:33.657565 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1164 18:01:33.667256 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1165 18:01:33.673731 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1166 18:01:33.683621 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1167 18:01:33.693378 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1168 18:01:33.696709 PCI: 00:19.0 child on link 0 I2C: 03:1a
1169 18:01:33.706687 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 18:01:33.707101 I2C: 03:1a
1171 18:01:33.709703 I2C: 03:38
1172 18:01:33.710120 I2C: 03:39
1173 18:01:33.713428 I2C: 03:3a
1174 18:01:33.713834 I2C: 03:3b
1175 18:01:33.720109 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1176 18:01:33.726474 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1177 18:01:33.736489 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1178 18:01:33.746657 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1179 18:01:33.747143 PCI: 01:00.0
1180 18:01:33.756370 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 18:01:33.759522 PCI: 00:1e.0
1182 18:01:33.769448 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1183 18:01:33.779757 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1184 18:01:33.786050 PCI: 00:1e.2 child on link 0 SPI: 00
1185 18:01:33.795871 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 18:01:33.796279 SPI: 00
1187 18:01:33.799280 PCI: 00:1e.3 child on link 0 SPI: 01
1188 18:01:33.809140 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 18:01:33.812800 SPI: 01
1190 18:01:33.816352 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1191 18:01:33.822729 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1192 18:01:33.832648 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1193 18:01:33.835854 PNP: 0c09.0
1194 18:01:33.842282 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1195 18:01:33.846184 PCI: 00:1f.3
1196 18:01:33.855728 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1197 18:01:33.865466 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1198 18:01:33.865960 PCI: 00:1f.4
1199 18:01:33.875769 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1200 18:01:33.885778 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1201 18:01:33.888651 PCI: 00:1f.5
1202 18:01:33.895303 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1203 18:01:33.902218 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1204 18:01:33.908628 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1205 18:01:33.915214 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1206 18:01:33.918511 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1207 18:01:33.922036 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1208 18:01:33.925435 PCI: 00:17.0 18 * [0x60 - 0x67] io
1209 18:01:33.932112 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1210 18:01:33.938819 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1211 18:01:33.945084 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1212 18:01:33.951853 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1213 18:01:33.962027 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1214 18:01:33.968163 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1215 18:01:33.971862 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1216 18:01:33.978156 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1217 18:01:33.985369 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1218 18:01:33.988141 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1219 18:01:33.991359 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1220 18:01:33.998263 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1221 18:01:34.001521 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1222 18:01:34.007839 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1223 18:01:34.011392 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1224 18:01:34.017984 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1225 18:01:34.021024 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1226 18:01:34.027851 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1227 18:01:34.031206 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1228 18:01:34.037584 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1229 18:01:34.041280 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1230 18:01:34.047531 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1231 18:01:34.051097 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1232 18:01:34.057808 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1233 18:01:34.061084 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1234 18:01:34.067821 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1235 18:01:34.070815 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1236 18:01:34.074070 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1237 18:01:34.080979 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1238 18:01:34.084140 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1239 18:01:34.090732 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1240 18:01:34.097374 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1241 18:01:34.103910 avoid_fixed_resources: DOMAIN: 0000
1242 18:01:34.107109 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1243 18:01:34.113645 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1244 18:01:34.120547 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1245 18:01:34.130284 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1246 18:01:34.137198 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1247 18:01:34.143538 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1248 18:01:34.153426 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1249 18:01:34.160538 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 18:01:34.167080 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1251 18:01:34.176600 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1252 18:01:34.183697 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1253 18:01:34.190219 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1254 18:01:34.193428 Setting resources...
1255 18:01:34.199755 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1256 18:01:34.203480 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1257 18:01:34.206688 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1258 18:01:34.209617 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1259 18:01:34.213289 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1260 18:01:34.219851 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1261 18:01:34.226442 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1262 18:01:34.233018 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1263 18:01:34.239918 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1264 18:01:34.246614 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1265 18:01:34.249527 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1266 18:01:34.256356 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1267 18:01:34.259360 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1268 18:01:34.266211 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1269 18:01:34.269384 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1270 18:01:34.276088 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1271 18:01:34.279201 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1272 18:01:34.285864 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1273 18:01:34.289511 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1274 18:01:34.295952 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1275 18:01:34.298982 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1276 18:01:34.305761 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1277 18:01:34.309075 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1278 18:01:34.315587 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1279 18:01:34.319300 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1280 18:01:34.322154 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1281 18:01:34.329137 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1282 18:01:34.332435 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1283 18:01:34.339099 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1284 18:01:34.342247 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1285 18:01:34.349191 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1286 18:01:34.352017 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1287 18:01:34.362319 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1288 18:01:34.368840 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1289 18:01:34.375748 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1290 18:01:34.382309 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1291 18:01:34.388463 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1292 18:01:34.395359 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1293 18:01:34.398764 Root Device assign_resources, bus 0 link: 0
1294 18:01:34.405218 DOMAIN: 0000 assign_resources, bus 0 link: 0
1295 18:01:34.411617 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1296 18:01:34.421645 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1297 18:01:34.428348 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1298 18:01:34.438494 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1299 18:01:34.445077 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1300 18:01:34.454891 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1301 18:01:34.458073 PCI: 00:14.0 assign_resources, bus 0 link: 0
1302 18:01:34.461408 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 18:01:34.471276 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1304 18:01:34.478074 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1305 18:01:34.488212 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1306 18:01:34.494842 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1307 18:01:34.501318 PCI: 00:15.0 assign_resources, bus 1 link: 0
1308 18:01:34.504925 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 18:01:34.514440 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1310 18:01:34.518046 PCI: 00:15.1 assign_resources, bus 2 link: 0
1311 18:01:34.521071 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 18:01:34.531501 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1313 18:01:34.538046 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1314 18:01:34.547841 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1315 18:01:34.554620 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1316 18:01:34.561195 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1317 18:01:34.571007 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1318 18:01:34.577494 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1319 18:01:34.587582 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1320 18:01:34.590767 PCI: 00:19.0 assign_resources, bus 3 link: 0
1321 18:01:34.593971 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 18:01:34.603666 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1323 18:01:34.613601 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1324 18:01:34.620174 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1325 18:01:34.626799 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1326 18:01:34.633802 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1327 18:01:34.639846 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 18:01:34.646794 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1329 18:01:34.656505 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1330 18:01:34.659628 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1331 18:01:34.662845 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 18:01:34.673107 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1333 18:01:34.677047 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1334 18:01:34.683446 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 18:01:34.686771 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1336 18:01:34.693518 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 18:01:34.696452 LPC: Trying to open IO window from 800 size 1ff
1338 18:01:34.706460 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1339 18:01:34.712903 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1340 18:01:34.722575 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1341 18:01:34.729389 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1342 18:01:34.735764 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 18:01:34.739390 Root Device assign_resources, bus 0 link: 0
1344 18:01:34.742590 Done setting resources.
1345 18:01:34.749112 Show resources in subtree (Root Device)...After assigning values.
1346 18:01:34.752325 Root Device child on link 0 CPU_CLUSTER: 0
1347 18:01:34.755901 CPU_CLUSTER: 0 child on link 0 APIC: 00
1348 18:01:34.758908 APIC: 00
1349 18:01:34.759443 APIC: 03
1350 18:01:34.759799 APIC: 01
1351 18:01:34.762082 APIC: 02
1352 18:01:34.762565 APIC: 06
1353 18:01:34.765486 APIC: 07
1354 18:01:34.765931 APIC: 04
1355 18:01:34.766277 APIC: 05
1356 18:01:34.772424 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1357 18:01:34.782252 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1358 18:01:34.791923 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1359 18:01:34.792162 PCI: 00:00.0
1360 18:01:34.801695 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1361 18:01:34.811500 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1362 18:01:34.821040 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1363 18:01:34.831346 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1364 18:01:34.841382 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1365 18:01:34.851030 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1366 18:01:34.857388 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1367 18:01:34.867499 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1368 18:01:34.877397 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1369 18:01:34.887399 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1370 18:01:34.897317 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1371 18:01:34.903783 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1372 18:01:34.913998 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1373 18:01:34.923874 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1374 18:01:34.933730 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1375 18:01:34.943854 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1376 18:01:34.943950 PCI: 00:02.0
1377 18:01:34.956707 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1378 18:01:34.966392 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1379 18:01:34.976663 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1380 18:01:34.976789 PCI: 00:04.0
1381 18:01:34.980076 PCI: 00:08.0
1382 18:01:34.989823 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1383 18:01:34.989949 PCI: 00:12.0
1384 18:01:34.999574 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1385 18:01:35.006243 PCI: 00:14.0 child on link 0 USB0 port 0
1386 18:01:35.016207 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1387 18:01:35.019840 USB0 port 0 child on link 0 USB2 port 0
1388 18:01:35.023139 USB2 port 0
1389 18:01:35.023219 USB2 port 1
1390 18:01:35.026196 USB2 port 2
1391 18:01:35.026301 USB2 port 3
1392 18:01:35.029827 USB2 port 5
1393 18:01:35.029907 USB2 port 6
1394 18:01:35.032832 USB2 port 9
1395 18:01:35.032911 USB3 port 0
1396 18:01:35.036449 USB3 port 1
1397 18:01:35.036528 USB3 port 2
1398 18:01:35.039577 USB3 port 3
1399 18:01:35.039677 USB3 port 4
1400 18:01:35.042855 PCI: 00:14.2
1401 18:01:35.052904 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1402 18:01:35.062851 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1403 18:01:35.065906 PCI: 00:14.3
1404 18:01:35.075785 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1405 18:01:35.078955 PCI: 00:15.0 child on link 0 I2C: 01:15
1406 18:01:35.089341 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1407 18:01:35.092643 I2C: 01:15
1408 18:01:35.095654 PCI: 00:15.1 child on link 0 I2C: 02:5d
1409 18:01:35.105806 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1410 18:01:35.108794 I2C: 02:5d
1411 18:01:35.108874 GENERIC: 0.0
1412 18:01:35.112379 PCI: 00:16.0
1413 18:01:35.121942 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1414 18:01:35.122023 PCI: 00:17.0
1415 18:01:35.132141 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1416 18:01:35.142107 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1417 18:01:35.151823 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1418 18:01:35.161939 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1419 18:01:35.172032 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1420 18:01:35.181434 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1421 18:01:35.185582 PCI: 00:19.0 child on link 0 I2C: 03:1a
1422 18:01:35.195591 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1423 18:01:35.198333 I2C: 03:1a
1424 18:01:35.198791 I2C: 03:38
1425 18:01:35.202186 I2C: 03:39
1426 18:01:35.202633 I2C: 03:3a
1427 18:01:35.204956 I2C: 03:3b
1428 18:01:35.208476 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1429 18:01:35.218283 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1430 18:01:35.227742 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1431 18:01:35.237690 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1432 18:01:35.237772 PCI: 01:00.0
1433 18:01:35.251217 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1434 18:01:35.251298 PCI: 00:1e.0
1435 18:01:35.261325 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1436 18:01:35.274428 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1437 18:01:35.277492 PCI: 00:1e.2 child on link 0 SPI: 00
1438 18:01:35.287418 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1439 18:01:35.287498 SPI: 00
1440 18:01:35.290510 PCI: 00:1e.3 child on link 0 SPI: 01
1441 18:01:35.303874 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1442 18:01:35.303954 SPI: 01
1443 18:01:35.307270 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1444 18:01:35.317434 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1445 18:01:35.327058 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1446 18:01:35.327228 PNP: 0c09.0
1447 18:01:35.337303 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1448 18:01:35.337496 PCI: 00:1f.3
1449 18:01:35.346952 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1450 18:01:35.360466 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1451 18:01:35.360663 PCI: 00:1f.4
1452 18:01:35.370586 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1453 18:01:35.380373 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1454 18:01:35.380868 PCI: 00:1f.5
1455 18:01:35.393871 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1456 18:01:35.394426 Done allocating resources.
1457 18:01:35.400153 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1458 18:01:35.403666 Enabling resources...
1459 18:01:35.406849 PCI: 00:00.0 subsystem <- 8086/9b61
1460 18:01:35.409972 PCI: 00:00.0 cmd <- 06
1461 18:01:35.413412 PCI: 00:02.0 subsystem <- 8086/9b41
1462 18:01:35.416579 PCI: 00:02.0 cmd <- 03
1463 18:01:35.420107 PCI: 00:08.0 cmd <- 06
1464 18:01:35.423096 PCI: 00:12.0 subsystem <- 8086/02f9
1465 18:01:35.426496 PCI: 00:12.0 cmd <- 02
1466 18:01:35.429784 PCI: 00:14.0 subsystem <- 8086/02ed
1467 18:01:35.430257 PCI: 00:14.0 cmd <- 02
1468 18:01:35.433281 PCI: 00:14.2 cmd <- 02
1469 18:01:35.436700 PCI: 00:14.3 subsystem <- 8086/02f0
1470 18:01:35.439737 PCI: 00:14.3 cmd <- 02
1471 18:01:35.443262 PCI: 00:15.0 subsystem <- 8086/02e8
1472 18:01:35.446352 PCI: 00:15.0 cmd <- 02
1473 18:01:35.450216 PCI: 00:15.1 subsystem <- 8086/02e9
1474 18:01:35.453405 PCI: 00:15.1 cmd <- 02
1475 18:01:35.456379 PCI: 00:16.0 subsystem <- 8086/02e0
1476 18:01:35.459486 PCI: 00:16.0 cmd <- 02
1477 18:01:35.463279 PCI: 00:17.0 subsystem <- 8086/02d3
1478 18:01:35.466380 PCI: 00:17.0 cmd <- 03
1479 18:01:35.469725 PCI: 00:19.0 subsystem <- 8086/02c5
1480 18:01:35.473053 PCI: 00:19.0 cmd <- 02
1481 18:01:35.476330 PCI: 00:1d.0 bridge ctrl <- 0013
1482 18:01:35.479598 PCI: 00:1d.0 subsystem <- 8086/02b0
1483 18:01:35.480063 PCI: 00:1d.0 cmd <- 06
1484 18:01:35.486651 PCI: 00:1e.0 subsystem <- 8086/02a8
1485 18:01:35.487298 PCI: 00:1e.0 cmd <- 06
1486 18:01:35.492697 PCI: 00:1e.2 subsystem <- 8086/02aa
1487 18:01:35.493147 PCI: 00:1e.2 cmd <- 06
1488 18:01:35.496375 PCI: 00:1e.3 subsystem <- 8086/02ab
1489 18:01:35.499764 PCI: 00:1e.3 cmd <- 02
1490 18:01:35.502701 PCI: 00:1f.0 subsystem <- 8086/0284
1491 18:01:35.506480 PCI: 00:1f.0 cmd <- 407
1492 18:01:35.509530 PCI: 00:1f.3 subsystem <- 8086/02c8
1493 18:01:35.512594 PCI: 00:1f.3 cmd <- 02
1494 18:01:35.516343 PCI: 00:1f.4 subsystem <- 8086/02a3
1495 18:01:35.519271 PCI: 00:1f.4 cmd <- 03
1496 18:01:35.522556 PCI: 00:1f.5 subsystem <- 8086/02a4
1497 18:01:35.526178 PCI: 00:1f.5 cmd <- 406
1498 18:01:35.534500 PCI: 01:00.0 cmd <- 02
1499 18:01:35.539223 done.
1500 18:01:35.549627 ME: Version: 14.0.39.1367
1501 18:01:35.556676 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1502 18:01:35.561157 Initializing devices...
1503 18:01:35.561606 Root Device init ...
1504 18:01:35.566148 Chrome EC: Set SMI mask to 0x0000000000000000
1505 18:01:35.569123 Chrome EC: clear events_b mask to 0x0000000000000000
1506 18:01:35.575866 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1507 18:01:35.582729 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1508 18:01:35.589279 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1509 18:01:35.592213 Chrome EC: Set WAKE mask to 0x0000000000000000
1510 18:01:35.595771 Root Device init finished in 35253 usecs
1511 18:01:35.599508 CPU_CLUSTER: 0 init ...
1512 18:01:35.606056 CPU_CLUSTER: 0 init finished in 2448 usecs
1513 18:01:35.610315 PCI: 00:00.0 init ...
1514 18:01:35.613504 CPU TDP: 15 Watts
1515 18:01:35.617011 CPU PL2 = 64 Watts
1516 18:01:35.620141 PCI: 00:00.0 init finished in 7077 usecs
1517 18:01:35.623379 PCI: 00:02.0 init ...
1518 18:01:35.626879 PCI: 00:02.0 init finished in 2255 usecs
1519 18:01:35.629877 PCI: 00:08.0 init ...
1520 18:01:35.633141 PCI: 00:08.0 init finished in 2254 usecs
1521 18:01:35.636779 PCI: 00:12.0 init ...
1522 18:01:35.639909 PCI: 00:12.0 init finished in 2253 usecs
1523 18:01:35.642952 PCI: 00:14.0 init ...
1524 18:01:35.646425 PCI: 00:14.0 init finished in 2245 usecs
1525 18:01:35.649816 PCI: 00:14.2 init ...
1526 18:01:35.653310 PCI: 00:14.2 init finished in 2253 usecs
1527 18:01:35.656507 PCI: 00:14.3 init ...
1528 18:01:35.659441 PCI: 00:14.3 init finished in 2270 usecs
1529 18:01:35.663049 PCI: 00:15.0 init ...
1530 18:01:35.666781 DW I2C bus 0 at 0xd121f000 (400 KHz)
1531 18:01:35.669649 PCI: 00:15.0 init finished in 5978 usecs
1532 18:01:35.673248 PCI: 00:15.1 init ...
1533 18:01:35.676455 DW I2C bus 1 at 0xd1220000 (400 KHz)
1534 18:01:35.682695 PCI: 00:15.1 init finished in 5979 usecs
1535 18:01:35.683106 PCI: 00:16.0 init ...
1536 18:01:35.689642 PCI: 00:16.0 init finished in 2253 usecs
1537 18:01:35.690233 PCI: 00:19.0 init ...
1538 18:01:35.696085 DW I2C bus 4 at 0xd1222000 (400 KHz)
1539 18:01:35.699989 PCI: 00:19.0 init finished in 5980 usecs
1540 18:01:35.702980 PCI: 00:1d.0 init ...
1541 18:01:35.706157 Initializing PCH PCIe bridge.
1542 18:01:35.709264 PCI: 00:1d.0 init finished in 5288 usecs
1543 18:01:35.713014 PCI: 00:1f.0 init ...
1544 18:01:35.716088 IOAPIC: Initializing IOAPIC at 0xfec00000
1545 18:01:35.722962 IOAPIC: Bootstrap Processor Local APIC = 0x00
1546 18:01:35.723374 IOAPIC: ID = 0x02
1547 18:01:35.726066 IOAPIC: Dumping registers
1548 18:01:35.729221 reg 0x0000: 0x02000000
1549 18:01:35.732565 reg 0x0001: 0x00770020
1550 18:01:35.732993 reg 0x0002: 0x00000000
1551 18:01:35.739384 PCI: 00:1f.0 init finished in 23538 usecs
1552 18:01:35.742722 PCI: 00:1f.4 init ...
1553 18:01:35.745548 PCI: 00:1f.4 init finished in 2264 usecs
1554 18:01:35.756334 PCI: 01:00.0 init ...
1555 18:01:35.759365 PCI: 01:00.0 init finished in 2253 usecs
1556 18:01:35.764162 PNP: 0c09.0 init ...
1557 18:01:35.767278 Google Chrome EC uptime: 11.093 seconds
1558 18:01:35.773708 Google Chrome AP resets since EC boot: 0
1559 18:01:35.777153 Google Chrome most recent AP reset causes:
1560 18:01:35.783800 Google Chrome EC reset flags at last EC boot: reset-pin
1561 18:01:35.787044 PNP: 0c09.0 init finished in 20573 usecs
1562 18:01:35.790104 Devices initialized
1563 18:01:35.793268 Show all devs... After init.
1564 18:01:35.793689 Root Device: enabled 1
1565 18:01:35.796954 CPU_CLUSTER: 0: enabled 1
1566 18:01:35.800055 DOMAIN: 0000: enabled 1
1567 18:01:35.800575 APIC: 00: enabled 1
1568 18:01:35.803431 PCI: 00:00.0: enabled 1
1569 18:01:35.806693 PCI: 00:02.0: enabled 1
1570 18:01:35.810190 PCI: 00:04.0: enabled 0
1571 18:01:35.810649 PCI: 00:05.0: enabled 0
1572 18:01:35.813489 PCI: 00:12.0: enabled 1
1573 18:01:35.816590 PCI: 00:12.5: enabled 0
1574 18:01:35.820031 PCI: 00:12.6: enabled 0
1575 18:01:35.820539 PCI: 00:14.0: enabled 1
1576 18:01:35.823291 PCI: 00:14.1: enabled 0
1577 18:01:35.826510 PCI: 00:14.3: enabled 1
1578 18:01:35.826977 PCI: 00:14.5: enabled 0
1579 18:01:35.830035 PCI: 00:15.0: enabled 1
1580 18:01:35.833602 PCI: 00:15.1: enabled 1
1581 18:01:35.836504 PCI: 00:15.2: enabled 0
1582 18:01:35.837015 PCI: 00:15.3: enabled 0
1583 18:01:35.839973 PCI: 00:16.0: enabled 1
1584 18:01:35.843116 PCI: 00:16.1: enabled 0
1585 18:01:35.846663 PCI: 00:16.2: enabled 0
1586 18:01:35.847074 PCI: 00:16.3: enabled 0
1587 18:01:35.849607 PCI: 00:16.4: enabled 0
1588 18:01:35.852943 PCI: 00:16.5: enabled 0
1589 18:01:35.856568 PCI: 00:17.0: enabled 1
1590 18:01:35.857020 PCI: 00:19.0: enabled 1
1591 18:01:35.859653 PCI: 00:19.1: enabled 0
1592 18:01:35.862729 PCI: 00:19.2: enabled 0
1593 18:01:35.863182 PCI: 00:1a.0: enabled 0
1594 18:01:35.866311 PCI: 00:1c.0: enabled 0
1595 18:01:35.869461 PCI: 00:1c.1: enabled 0
1596 18:01:35.873022 PCI: 00:1c.2: enabled 0
1597 18:01:35.873461 PCI: 00:1c.3: enabled 0
1598 18:01:35.875976 PCI: 00:1c.4: enabled 0
1599 18:01:35.879455 PCI: 00:1c.5: enabled 0
1600 18:01:35.882785 PCI: 00:1c.6: enabled 0
1601 18:01:35.883192 PCI: 00:1c.7: enabled 0
1602 18:01:35.886138 PCI: 00:1d.0: enabled 1
1603 18:01:35.889447 PCI: 00:1d.1: enabled 0
1604 18:01:35.892489 PCI: 00:1d.2: enabled 0
1605 18:01:35.892946 PCI: 00:1d.3: enabled 0
1606 18:01:35.896249 PCI: 00:1d.4: enabled 0
1607 18:01:35.899412 PCI: 00:1d.5: enabled 0
1608 18:01:35.902986 PCI: 00:1e.0: enabled 1
1609 18:01:35.903436 PCI: 00:1e.1: enabled 0
1610 18:01:35.905996 PCI: 00:1e.2: enabled 1
1611 18:01:35.909722 PCI: 00:1e.3: enabled 1
1612 18:01:35.910342 PCI: 00:1f.0: enabled 1
1613 18:01:35.912802 PCI: 00:1f.1: enabled 0
1614 18:01:35.916231 PCI: 00:1f.2: enabled 0
1615 18:01:35.919291 PCI: 00:1f.3: enabled 1
1616 18:01:35.919744 PCI: 00:1f.4: enabled 1
1617 18:01:35.922435 PCI: 00:1f.5: enabled 1
1618 18:01:35.925881 PCI: 00:1f.6: enabled 0
1619 18:01:35.929773 USB0 port 0: enabled 1
1620 18:01:35.930344 I2C: 01:15: enabled 1
1621 18:01:35.932598 I2C: 02:5d: enabled 1
1622 18:01:35.935812 GENERIC: 0.0: enabled 1
1623 18:01:35.936262 I2C: 03:1a: enabled 1
1624 18:01:35.938941 I2C: 03:38: enabled 1
1625 18:01:35.942238 I2C: 03:39: enabled 1
1626 18:01:35.942816 I2C: 03:3a: enabled 1
1627 18:01:35.945784 I2C: 03:3b: enabled 1
1628 18:01:35.948946 PCI: 00:00.0: enabled 1
1629 18:01:35.949393 SPI: 00: enabled 1
1630 18:01:35.952224 SPI: 01: enabled 1
1631 18:01:35.955711 PNP: 0c09.0: enabled 1
1632 18:01:35.956118 USB2 port 0: enabled 1
1633 18:01:35.958997 USB2 port 1: enabled 1
1634 18:01:35.962027 USB2 port 2: enabled 0
1635 18:01:35.965662 USB2 port 3: enabled 0
1636 18:01:35.966069 USB2 port 5: enabled 0
1637 18:01:35.968775 USB2 port 6: enabled 1
1638 18:01:35.972012 USB2 port 9: enabled 1
1639 18:01:35.972420 USB3 port 0: enabled 1
1640 18:01:35.975589 USB3 port 1: enabled 1
1641 18:01:35.978811 USB3 port 2: enabled 1
1642 18:01:35.979251 USB3 port 3: enabled 1
1643 18:01:35.982059 USB3 port 4: enabled 0
1644 18:01:35.985139 APIC: 03: enabled 1
1645 18:01:35.985547 APIC: 01: enabled 1
1646 18:01:35.988566 APIC: 02: enabled 1
1647 18:01:35.992165 APIC: 06: enabled 1
1648 18:01:35.992672 APIC: 07: enabled 1
1649 18:01:35.995222 APIC: 04: enabled 1
1650 18:01:35.998606 APIC: 05: enabled 1
1651 18:01:35.999015 PCI: 00:08.0: enabled 1
1652 18:01:36.001774 PCI: 00:14.2: enabled 1
1653 18:01:36.004955 PCI: 01:00.0: enabled 1
1654 18:01:36.008674 Disabling ACPI via APMC:
1655 18:01:36.011861 done.
1656 18:01:36.015494 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1657 18:01:36.018840 ELOG: NV offset 0xaf0000 size 0x4000
1658 18:01:36.025219 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1659 18:01:36.032297 ELOG: Event(17) added with size 13 at 2023-10-09 18:01:36 UTC
1660 18:01:36.038620 ELOG: Event(92) added with size 9 at 2023-10-09 18:01:36 UTC
1661 18:01:36.045377 ELOG: Event(93) added with size 9 at 2023-10-09 18:01:36 UTC
1662 18:01:36.051802 ELOG: Event(9A) added with size 9 at 2023-10-09 18:01:36 UTC
1663 18:01:36.058256 ELOG: Event(9E) added with size 10 at 2023-10-09 18:01:36 UTC
1664 18:01:36.065247 ELOG: Event(9F) added with size 14 at 2023-10-09 18:01:36 UTC
1665 18:01:36.067970 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1666 18:01:36.075846 ELOG: Event(A1) added with size 10 at 2023-10-09 18:01:36 UTC
1667 18:01:36.085575 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1668 18:01:36.092578 ELOG: Event(A0) added with size 9 at 2023-10-09 18:01:36 UTC
1669 18:01:36.095595 elog_add_boot_reason: Logged dev mode boot
1670 18:01:36.099335 Finalize devices...
1671 18:01:36.099743 PCI: 00:17.0 final
1672 18:01:36.102196 Devices finalized
1673 18:01:36.105416 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1674 18:01:36.112308 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1675 18:01:36.115687 ME: HFSTS1 : 0x90000245
1676 18:01:36.118720 ME: HFSTS2 : 0x3B850126
1677 18:01:36.125167 ME: HFSTS3 : 0x00000020
1678 18:01:36.128563 ME: HFSTS4 : 0x00004800
1679 18:01:36.132012 ME: HFSTS5 : 0x00000000
1680 18:01:36.135120 ME: HFSTS6 : 0x40400006
1681 18:01:36.138638 ME: Manufacturing Mode : NO
1682 18:01:36.142254 ME: FW Partition Table : OK
1683 18:01:36.145359 ME: Bringup Loader Failure : NO
1684 18:01:36.148517 ME: Firmware Init Complete : YES
1685 18:01:36.152234 ME: Boot Options Present : NO
1686 18:01:36.155358 ME: Update In Progress : NO
1687 18:01:36.158382 ME: D0i3 Support : YES
1688 18:01:36.162120 ME: Low Power State Enabled : NO
1689 18:01:36.165263 ME: CPU Replaced : NO
1690 18:01:36.168359 ME: CPU Replacement Valid : YES
1691 18:01:36.171974 ME: Current Working State : 5
1692 18:01:36.174882 ME: Current Operation State : 1
1693 18:01:36.178499 ME: Current Operation Mode : 0
1694 18:01:36.181638 ME: Error Code : 0
1695 18:01:36.185265 ME: CPU Debug Disabled : YES
1696 18:01:36.188375 ME: TXT Support : NO
1697 18:01:36.195046 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1698 18:01:36.201998 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 18:01:36.202509 CBFS @ c08000 size 3f8000
1700 18:01:36.208352 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 18:01:36.211693 CBFS: Locating 'fallback/dsdt.aml'
1702 18:01:36.214581 CBFS: Found @ offset 10bb80 size 3fa5
1703 18:01:36.221377 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 18:01:36.224800 CBFS @ c08000 size 3f8000
1705 18:01:36.227928 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 18:01:36.230968 CBFS: Locating 'fallback/slic'
1707 18:01:36.236420 CBFS: 'fallback/slic' not found.
1708 18:01:36.243089 ACPI: Writing ACPI tables at 99b3e000.
1709 18:01:36.243521 ACPI: * FACS
1710 18:01:36.246147 ACPI: * DSDT
1711 18:01:36.249603 Ramoops buffer: 0x100000@0x99a3d000.
1712 18:01:36.252642 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1713 18:01:36.259422 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1714 18:01:36.262624 Google Chrome EC: version:
1715 18:01:36.266218 ro: helios_v2.0.2659-56403530b
1716 18:01:36.269436 rw: helios_v2.0.2849-c41de27e7d
1717 18:01:36.269843 running image: 1
1718 18:01:36.273601 ACPI: * FADT
1719 18:01:36.274049 SCI is IRQ9
1720 18:01:36.280372 ACPI: added table 1/32, length now 40
1721 18:01:36.280780 ACPI: * SSDT
1722 18:01:36.283343 Found 1 CPU(s) with 8 core(s) each.
1723 18:01:36.286860 Error: Could not locate 'wifi_sar' in VPD.
1724 18:01:36.293439 Checking CBFS for default SAR values
1725 18:01:36.297079 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 18:01:36.300355 CBFS @ c08000 size 3f8000
1727 18:01:36.306645 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 18:01:36.310188 CBFS: Locating 'wifi_sar_defaults.hex'
1729 18:01:36.313580 CBFS: Found @ offset 5fac0 size 77
1730 18:01:36.316684 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1731 18:01:36.323331 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1732 18:01:36.326371 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1733 18:01:36.333175 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1734 18:01:36.336459 failed to find key in VPD: dsm_calib_r0_0
1735 18:01:36.346472 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1736 18:01:36.349387 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1737 18:01:36.356338 failed to find key in VPD: dsm_calib_r0_1
1738 18:01:36.362956 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1739 18:01:36.369354 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1740 18:01:36.372570 failed to find key in VPD: dsm_calib_r0_2
1741 18:01:36.382378 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1742 18:01:36.385957 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1743 18:01:36.392842 failed to find key in VPD: dsm_calib_r0_3
1744 18:01:36.399194 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1745 18:01:36.405858 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1746 18:01:36.409172 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1747 18:01:36.412494 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1748 18:01:36.416584 EC returned error result code 1
1749 18:01:36.420367 EC returned error result code 1
1750 18:01:36.424067 EC returned error result code 1
1751 18:01:36.430221 PS2K: Bad resp from EC. Vivaldi disabled!
1752 18:01:36.434043 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1753 18:01:36.440290 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1754 18:01:36.446906 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1755 18:01:36.450423 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1756 18:01:36.456964 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1757 18:01:36.463594 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1758 18:01:36.470227 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1759 18:01:36.473357 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1760 18:01:36.480058 ACPI: added table 2/32, length now 44
1761 18:01:36.480137 ACPI: * MCFG
1762 18:01:36.483032 ACPI: added table 3/32, length now 48
1763 18:01:36.486145 ACPI: * TPM2
1764 18:01:36.489937 TPM2 log created at 99a2d000
1765 18:01:36.493287 ACPI: added table 4/32, length now 52
1766 18:01:36.493377 ACPI: * MADT
1767 18:01:36.496173 SCI is IRQ9
1768 18:01:36.499831 ACPI: added table 5/32, length now 56
1769 18:01:36.499911 current = 99b43ac0
1770 18:01:36.503111 ACPI: * DMAR
1771 18:01:36.506313 ACPI: added table 6/32, length now 60
1772 18:01:36.509888 ACPI: * IGD OpRegion
1773 18:01:36.509967 GMA: Found VBT in CBFS
1774 18:01:36.512986 GMA: Found valid VBT in CBFS
1775 18:01:36.516294 ACPI: added table 7/32, length now 64
1776 18:01:36.519325 ACPI: * HPET
1777 18:01:36.522900 ACPI: added table 8/32, length now 68
1778 18:01:36.522979 ACPI: done.
1779 18:01:36.526197 ACPI tables: 31744 bytes.
1780 18:01:36.529785 smbios_write_tables: 99a2c000
1781 18:01:36.532948 EC returned error result code 3
1782 18:01:36.536151 Couldn't obtain OEM name from CBI
1783 18:01:36.540006 Create SMBIOS type 17
1784 18:01:36.543113 PCI: 00:00.0 (Intel Cannonlake)
1785 18:01:36.546187 PCI: 00:14.3 (Intel WiFi)
1786 18:01:36.549648 SMBIOS tables: 939 bytes.
1787 18:01:36.553153 Writing table forward entry at 0x00000500
1788 18:01:36.559618 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1789 18:01:36.562687 Writing coreboot table at 0x99b62000
1790 18:01:36.569448 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1791 18:01:36.572831 1. 0000000000001000-000000000009ffff: RAM
1792 18:01:36.576139 2. 00000000000a0000-00000000000fffff: RESERVED
1793 18:01:36.582970 3. 0000000000100000-0000000099a2bfff: RAM
1794 18:01:36.589248 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1795 18:01:36.593010 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1796 18:01:36.599688 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1797 18:01:36.602826 7. 000000009a000000-000000009f7fffff: RESERVED
1798 18:01:36.609714 8. 00000000e0000000-00000000efffffff: RESERVED
1799 18:01:36.612765 9. 00000000fc000000-00000000fc000fff: RESERVED
1800 18:01:36.619380 10. 00000000fe000000-00000000fe00ffff: RESERVED
1801 18:01:36.623128 11. 00000000fed10000-00000000fed17fff: RESERVED
1802 18:01:36.626016 12. 00000000fed80000-00000000fed83fff: RESERVED
1803 18:01:36.632741 13. 00000000fed90000-00000000fed91fff: RESERVED
1804 18:01:36.636227 14. 00000000feda0000-00000000feda1fff: RESERVED
1805 18:01:36.642925 15. 0000000100000000-000000045e7fffff: RAM
1806 18:01:36.645906 Graphics framebuffer located at 0xc0000000
1807 18:01:36.649022 Passing 5 GPIOs to payload:
1808 18:01:36.652963 NAME | PORT | POLARITY | VALUE
1809 18:01:36.659164 write protect | undefined | high | low
1810 18:01:36.665673 lid | undefined | high | high
1811 18:01:36.669193 power | undefined | high | low
1812 18:01:36.675706 oprom | undefined | high | low
1813 18:01:36.679097 EC in RW | 0x000000cb | high | low
1814 18:01:36.682451 Board ID: 4
1815 18:01:36.685863 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1816 18:01:36.688826 CBFS @ c08000 size 3f8000
1817 18:01:36.695230 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1818 18:01:36.702133 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1819 18:01:36.702627 coreboot table: 1492 bytes.
1820 18:01:36.705211 IMD ROOT 0. 99fff000 00001000
1821 18:01:36.708542 IMD SMALL 1. 99ffe000 00001000
1822 18:01:36.711738 FSP MEMORY 2. 99c4e000 003b0000
1823 18:01:36.715595 CONSOLE 3. 99c2e000 00020000
1824 18:01:36.721933 FMAP 4. 99c2d000 0000054e
1825 18:01:36.724956 TIME STAMP 5. 99c2c000 00000910
1826 18:01:36.728651 VBOOT WORK 6. 99c18000 00014000
1827 18:01:36.731722 MRC DATA 7. 99c16000 00001958
1828 18:01:36.735085 ROMSTG STCK 8. 99c15000 00001000
1829 18:01:36.738264 AFTER CAR 9. 99c0b000 0000a000
1830 18:01:36.741545 RAMSTAGE 10. 99baf000 0005c000
1831 18:01:36.745173 REFCODE 11. 99b7a000 00035000
1832 18:01:36.748095 SMM BACKUP 12. 99b6a000 00010000
1833 18:01:36.751780 COREBOOT 13. 99b62000 00008000
1834 18:01:36.754609 ACPI 14. 99b3e000 00024000
1835 18:01:36.758589 ACPI GNVS 15. 99b3d000 00001000
1836 18:01:36.761731 RAMOOPS 16. 99a3d000 00100000
1837 18:01:36.764954 TPM2 TCGLOG17. 99a2d000 00010000
1838 18:01:36.768029 SMBIOS 18. 99a2c000 00000800
1839 18:01:36.768472 IMD small region:
1840 18:01:36.771626 IMD ROOT 0. 99ffec00 00000400
1841 18:01:36.774651 FSP RUNTIME 1. 99ffebe0 00000004
1842 18:01:36.778094 EC HOSTEVENT 2. 99ffebc0 00000008
1843 18:01:36.781396 POWER STATE 3. 99ffeb80 00000040
1844 18:01:36.787891 ROMSTAGE 4. 99ffeb60 00000004
1845 18:01:36.791410 MEM INFO 5. 99ffe9a0 000001b9
1846 18:01:36.794755 VPD 6. 99ffe920 0000006c
1847 18:01:36.798014 MTRR: Physical address space:
1848 18:01:36.801000 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1849 18:01:36.807747 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1850 18:01:36.814655 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1851 18:01:36.821019 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1852 18:01:36.827701 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1853 18:01:36.834001 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1854 18:01:36.840913 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1855 18:01:36.844166 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 18:01:36.847390 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 18:01:36.851077 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 18:01:36.857179 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 18:01:36.860589 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 18:01:36.864048 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 18:01:36.867345 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 18:01:36.874199 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 18:01:36.877344 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 18:01:36.880076 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 18:01:36.883687 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 18:01:36.887218 call enable_fixed_mtrr()
1867 18:01:36.890935 CPU physical address size: 39 bits
1868 18:01:36.897124 MTRR: default type WB/UC MTRR counts: 6/8.
1869 18:01:36.900599 MTRR: WB selected as default type.
1870 18:01:36.907349 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1871 18:01:36.910320 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1872 18:01:36.917135 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1873 18:01:36.923863 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1874 18:01:36.930734 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1875 18:01:36.936945 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1876 18:01:36.940154 MTRR: Fixed MSR 0x250 0x0606060606060606
1877 18:01:36.946861 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 18:01:36.950151 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 18:01:36.953287 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 18:01:36.956935 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 18:01:36.963251 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 18:01:36.966378 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 18:01:36.969944 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 18:01:36.973344 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 18:01:36.979879 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 18:01:36.983130 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 18:01:36.983210
1888 18:01:36.983273 MTRR check
1889 18:01:36.986404 Fixed MTRRs : Enabled
1890 18:01:36.989754 Variable MTRRs: Enabled
1891 18:01:36.989833
1892 18:01:36.992916 call enable_fixed_mtrr()
1893 18:01:36.996475 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 18:01:36.999672 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 18:01:37.003129 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 18:01:37.009474 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 18:01:37.012935 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 18:01:37.016653 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 18:01:37.019697 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 18:01:37.026240 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 18:01:37.029585 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 18:01:37.033188 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 18:01:37.036255 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 18:01:37.042951 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 18:01:37.046115 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 18:01:37.049562 call enable_fixed_mtrr()
1907 18:01:37.052526 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 18:01:37.056243 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 18:01:37.059385 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 18:01:37.066349 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 18:01:37.069419 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 18:01:37.072567 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 18:01:37.076692 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 18:01:37.082620 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 18:01:37.086061 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 18:01:37.089599 CPU physical address size: 39 bits
1917 18:01:37.092462 call enable_fixed_mtrr()
1918 18:01:37.095823 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 18:01:37.099181 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 18:01:37.106073 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 18:01:37.109197 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 18:01:37.112442 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 18:01:37.115609 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 18:01:37.119735 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 18:01:37.125892 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 18:01:37.129280 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 18:01:37.132411 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 18:01:37.135891 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 18:01:37.142334 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 18:01:37.145563 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 18:01:37.148745 call enable_fixed_mtrr()
1932 18:01:37.152107 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 18:01:37.155393 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 18:01:37.158686 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 18:01:37.165365 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 18:01:37.168637 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 18:01:37.172099 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 18:01:37.175235 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 18:01:37.182033 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 18:01:37.185486 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 18:01:37.188743 CPU physical address size: 39 bits
1942 18:01:37.191700 call enable_fixed_mtrr()
1943 18:01:37.195092 CPU physical address size: 39 bits
1944 18:01:37.201576 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1945 18:01:37.204929 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 18:01:37.208371 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 18:01:37.211560 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 18:01:37.218123 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 18:01:37.221667 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 18:01:37.224960 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 18:01:37.228199 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 18:01:37.234913 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 18:01:37.238065 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 18:01:37.241907 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 18:01:37.244929 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 18:01:37.252182 MTRR: Fixed MSR 0x250 0x0606060606060606
1957 18:01:37.252836 call enable_fixed_mtrr()
1958 18:01:37.258652 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 18:01:37.261613 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 18:01:37.264767 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 18:01:37.268617 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 18:01:37.274817 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 18:01:37.278166 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 18:01:37.281190 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 18:01:37.284680 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 18:01:37.291045 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 18:01:37.294256 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 18:01:37.298091 CPU physical address size: 39 bits
1969 18:01:37.301082 call enable_fixed_mtrr()
1970 18:01:37.304866 CPU physical address size: 39 bits
1971 18:01:37.307749 CPU physical address size: 39 bits
1972 18:01:37.311227 CPU physical address size: 39 bits
1973 18:01:37.314724 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1974 18:01:37.317678 CBFS @ c08000 size 3f8000
1975 18:01:37.324025 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1976 18:01:37.327611 CBFS: Locating 'fallback/payload'
1977 18:01:37.334032 CBFS: Found @ offset 1c96c0 size 3f798
1978 18:01:37.337388 Checking segment from ROM address 0xffdd16f8
1979 18:01:37.341018 Checking segment from ROM address 0xffdd1714
1980 18:01:37.347212 Loading segment from ROM address 0xffdd16f8
1981 18:01:37.347629 code (compression=0)
1982 18:01:37.357864 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1983 18:01:37.363935 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1984 18:01:37.367409 it's not compressed!
1985 18:01:37.459730 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1986 18:01:37.466882 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1987 18:01:37.469583 Loading segment from ROM address 0xffdd1714
1988 18:01:37.472760 Entry Point 0x30000000
1989 18:01:37.476141 Loaded segments
1990 18:01:37.481850 Finalizing chipset.
1991 18:01:37.485122 Finalizing SMM.
1992 18:01:37.488560 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1993 18:01:37.491886 mp_park_aps done after 0 msecs.
1994 18:01:37.498596 Jumping to boot code at 30000000(99b62000)
1995 18:01:37.504892 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1996 18:01:37.505331
1997 18:01:37.505750
1998 18:01:37.506069
1999 18:01:37.508465 Starting depthcharge on Helios...
2000 18:01:37.508905
2001 18:01:37.510248 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2002 18:01:37.510862 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2003 18:01:37.511443 Setting prompt string to ['hatch:']
2004 18:01:37.512099 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2005 18:01:37.518493 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2006 18:01:37.519157
2007 18:01:37.524627 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2008 18:01:37.525040
2009 18:01:37.531390 board_setup: Info: eMMC controller not present; skipping
2010 18:01:37.531812
2011 18:01:37.534413 New NVMe Controller 0x30053ac0 @ 00:1d:00
2012 18:01:37.535068
2013 18:01:37.541263 board_setup: Info: SDHCI controller not present; skipping
2014 18:01:37.541677
2015 18:01:37.547613 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2016 18:01:37.548043
2017 18:01:37.548370 Wipe memory regions:
2018 18:01:37.548673
2019 18:01:37.551298 [0x00000000001000, 0x000000000a0000)
2020 18:01:37.551713
2021 18:01:37.557292 [0x00000000100000, 0x00000030000000)
2022 18:01:37.620661
2023 18:01:37.623554 [0x00000030657430, 0x00000099a2c000)
2024 18:01:37.761232
2025 18:01:37.764022 [0x00000100000000, 0x0000045e800000)
2026 18:01:39.146838
2027 18:01:39.147380 R8152: Initializing
2028 18:01:39.147837
2029 18:01:39.149756 Version 9 (ocp_data = 6010)
2030 18:01:39.154129
2031 18:01:39.154584 R8152: Done initializing
2032 18:01:39.154951
2033 18:01:39.157616 Adding net device
2034 18:01:39.766934
2035 18:01:39.767447 R8152: Initializing
2036 18:01:39.767962
2037 18:01:39.770309 Version 6 (ocp_data = 5c30)
2038 18:01:39.770885
2039 18:01:39.773555 R8152: Done initializing
2040 18:01:39.774067
2041 18:01:39.780216 net_add_device: Attemp to include the same device
2042 18:01:39.780760
2043 18:01:39.787454 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2044 18:01:39.787904
2045 18:01:39.788226
2046 18:01:39.788525
2047 18:01:39.789270 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2049 18:01:39.890434 hatch: tftpboot 192.168.201.1 11712680/tftp-deploy-219w9ws9/kernel/bzImage 11712680/tftp-deploy-219w9ws9/kernel/cmdline 11712680/tftp-deploy-219w9ws9/ramdisk/ramdisk.cpio.gz
2050 18:01:39.891078 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2051 18:01:39.891486 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2052 18:01:39.896160 tftpboot 192.168.201.1 11712680/tftp-deploy-219w9ws9/kernel/bzImloy-219w9ws9/kernel/cmdline 11712680/tftp-deploy-219w9ws9/ramdisk/ramdisk.cpio.gz
2053 18:01:39.896598
2054 18:01:39.896925 Waiting for link
2055 18:01:40.097141
2056 18:01:40.097696 done.
2057 18:01:40.098058
2058 18:01:40.098396 MAC: 00:24:32:50:1a:5f
2059 18:01:40.098768
2060 18:01:40.100596 Sending DHCP discover... done.
2061 18:01:40.101055
2062 18:01:40.103815 Waiting for reply... done.
2063 18:01:40.104271
2064 18:01:40.106928 Sending DHCP request... done.
2065 18:01:40.107385
2066 18:01:40.113644 Waiting for reply... done.
2067 18:01:40.114098
2068 18:01:40.114426 My ip is 192.168.201.21
2069 18:01:40.114794
2070 18:01:40.117142 The DHCP server ip is 192.168.201.1
2071 18:01:40.120183
2072 18:01:40.123340 TFTP server IP predefined by user: 192.168.201.1
2073 18:01:40.123760
2074 18:01:40.130023 Bootfile predefined by user: 11712680/tftp-deploy-219w9ws9/kernel/bzImage
2075 18:01:40.130451
2076 18:01:40.133218 Sending tftp read request... done.
2077 18:01:40.133634
2078 18:01:40.142771 Waiting for the transfer...
2079 18:01:40.143201
2080 18:01:40.688981 00000000 ################################################################
2081 18:01:40.689128
2082 18:01:41.254800 00080000 ################################################################
2083 18:01:41.254992
2084 18:01:41.905493 00100000 ################################################################
2085 18:01:41.906035
2086 18:01:42.554339 00180000 ################################################################
2087 18:01:42.554501
2088 18:01:43.193722 00200000 ################################################################
2089 18:01:43.194353
2090 18:01:43.872911 00280000 ################################################################
2091 18:01:43.873444
2092 18:01:44.439241 00300000 ################################################################
2093 18:01:44.439385
2094 18:01:45.037275 00380000 ################################################################
2095 18:01:45.037421
2096 18:01:45.620296 00400000 ################################################################
2097 18:01:45.620451
2098 18:01:46.278861 00480000 ################################################################
2099 18:01:46.279526
2100 18:01:46.857097 00500000 ################################################################
2101 18:01:46.857240
2102 18:01:47.439144 00580000 ################################################################
2103 18:01:47.439654
2104 18:01:48.022206 00600000 ################################################################
2105 18:01:48.022802
2106 18:01:48.623425 00680000 ################################################################
2107 18:01:48.623575
2108 18:01:49.185524 00700000 ################################################################
2109 18:01:49.185695
2110 18:01:49.808320 00780000 ################################################################
2111 18:01:49.808821
2112 18:01:49.937887 00800000 ############# done.
2113 18:01:49.938587
2114 18:01:49.940988 The bootfile was 8490896 bytes long.
2115 18:01:49.941517
2116 18:01:49.944690 Sending tftp read request... done.
2117 18:01:49.945252
2118 18:01:49.947853 Waiting for the transfer...
2119 18:01:49.948431
2120 18:01:50.538952 00000000 ################################################################
2121 18:01:50.539145
2122 18:01:51.182671 00080000 ################################################################
2123 18:01:51.183228
2124 18:01:51.847309 00100000 ################################################################
2125 18:01:51.847946
2126 18:01:52.504307 00180000 ################################################################
2127 18:01:52.504863
2128 18:01:53.177645 00200000 ################################################################
2129 18:01:53.178158
2130 18:01:53.815942 00280000 ################################################################
2131 18:01:53.816127
2132 18:01:54.438437 00300000 ################################################################
2133 18:01:54.439012
2134 18:01:55.113226 00380000 ################################################################
2135 18:01:55.113378
2136 18:01:55.684554 00400000 ################################################################
2137 18:01:55.684694
2138 18:01:56.338868 00480000 ################################################################
2139 18:01:56.339382
2140 18:01:56.993553 00500000 ################################################################
2141 18:01:56.993709
2142 18:01:57.279904 00580000 ############################# done.
2143 18:01:57.280404
2144 18:01:57.283086 Sending tftp read request... done.
2145 18:01:57.283500
2146 18:01:57.286250 Waiting for the transfer...
2147 18:01:57.286778
2148 18:01:57.287111 00000000 # done.
2149 18:01:57.287427
2150 18:01:57.296345 Command line loaded dynamically from TFTP file: 11712680/tftp-deploy-219w9ws9/kernel/cmdline
2151 18:01:57.296754
2152 18:01:57.326002 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11712680/extract-nfsrootfs-1ox7wldr,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2153 18:01:57.326518
2154 18:01:57.332090 ec_init(0): CrosEC protocol v3 supported (256, 256)
2155 18:01:57.336178
2156 18:01:57.339520 Shutting down all USB controllers.
2157 18:01:57.339932
2158 18:01:57.340258 Removing current net device
2159 18:01:57.347181
2160 18:01:57.347612 Finalizing coreboot
2161 18:01:57.347940
2162 18:01:57.353542 Exiting depthcharge with code 4 at timestamp: 27190929
2163 18:01:57.354017
2164 18:01:57.354343
2165 18:01:57.354711 Starting kernel ...
2166 18:01:57.355014
2167 18:01:57.355294
2168 18:01:57.356406 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2169 18:01:57.356882 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2170 18:01:57.357249 Setting prompt string to ['Linux version [0-9]']
2171 18:01:57.357577 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 18:01:57.357901 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2174 18:06:19.357709 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2176 18:06:19.359058 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2178 18:06:19.359959 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2181 18:06:19.361601 end: 2 depthcharge-action (duration 00:05:00) [common]
2183 18:06:19.362882 Cleaning after the job
2184 18:06:19.363378 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712680/tftp-deploy-219w9ws9/ramdisk
2185 18:06:19.367829 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712680/tftp-deploy-219w9ws9/kernel
2186 18:06:19.373948 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712680/tftp-deploy-219w9ws9/nfsrootfs
2187 18:06:19.514821 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712680/tftp-deploy-219w9ws9/modules
2188 18:06:19.515289 start: 4.1 power-off (timeout 00:00:30) [common]
2189 18:06:19.515457 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2190 18:06:19.597479 >> Command sent successfully.
2191 18:06:19.608300 Returned 0 in 0 seconds
2192 18:06:19.709605 end: 4.1 power-off (duration 00:00:00) [common]
2194 18:06:19.711341 start: 4.2 read-feedback (timeout 00:10:00) [common]
2195 18:06:19.712720 Listened to connection for namespace 'common' for up to 1s
2197 18:06:19.714091 Listened to connection for namespace 'common' for up to 1s
2198 18:06:20.713313 Finalising connection for namespace 'common'
2199 18:06:20.713920 Disconnecting from shell: Finalise
2200 18:06:20.714271
2201 18:06:20.815345 end: 4.2 read-feedback (duration 00:00:01) [common]
2202 18:06:20.815907 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712680
2203 18:06:21.354142 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712680
2204 18:06:21.354337 JobError: Your job cannot terminate cleanly.