Boot log: asus-C436FA-Flip-hatch

    1 17:32:31.627935  lava-dispatcher, installed at version: 2023.08
    2 17:32:31.628146  start: 0 validate
    3 17:32:31.628284  Start time: 2023-10-02 17:32:31.628276+00:00 (UTC)
    4 17:32:31.628407  Using caching service: 'http://localhost/cache/?uri=%s'
    5 17:32:31.628540  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 17:32:31.887629  Using caching service: 'http://localhost/cache/?uri=%s'
    7 17:32:31.887816  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1779-g48d33e0df7175%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 17:32:32.153324  Using caching service: 'http://localhost/cache/?uri=%s'
    9 17:32:32.153509  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1779-g48d33e0df7175%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 17:32:32.419037  validate duration: 0.79
   12 17:32:32.419331  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 17:32:32.419442  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 17:32:32.419537  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 17:32:32.419692  Not decompressing ramdisk as can be used compressed.
   16 17:32:32.419796  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 17:32:32.419867  saving as /var/lib/lava/dispatcher/tmp/11661510/tftp-deploy-65gj70wz/ramdisk/rootfs.cpio.gz
   18 17:32:32.419931  total size: 8418130 (8 MB)
   19 17:32:32.420929  progress   0 % (0 MB)
   20 17:32:32.423330  progress   5 % (0 MB)
   21 17:32:32.425634  progress  10 % (0 MB)
   22 17:32:32.427927  progress  15 % (1 MB)
   23 17:32:32.430188  progress  20 % (1 MB)
   24 17:32:32.432481  progress  25 % (2 MB)
   25 17:32:32.434737  progress  30 % (2 MB)
   26 17:32:32.436872  progress  35 % (2 MB)
   27 17:32:32.439137  progress  40 % (3 MB)
   28 17:32:32.441439  progress  45 % (3 MB)
   29 17:32:32.443683  progress  50 % (4 MB)
   30 17:32:32.445900  progress  55 % (4 MB)
   31 17:32:32.448222  progress  60 % (4 MB)
   32 17:32:32.450268  progress  65 % (5 MB)
   33 17:32:32.452510  progress  70 % (5 MB)
   34 17:32:32.454713  progress  75 % (6 MB)
   35 17:32:32.456918  progress  80 % (6 MB)
   36 17:32:32.459109  progress  85 % (6 MB)
   37 17:32:32.461319  progress  90 % (7 MB)
   38 17:32:32.463527  progress  95 % (7 MB)
   39 17:32:32.465584  progress 100 % (8 MB)
   40 17:32:32.465812  8 MB downloaded in 0.05 s (174.98 MB/s)
   41 17:32:32.465971  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 17:32:32.466212  end: 1.1 download-retry (duration 00:00:00) [common]
   44 17:32:32.466299  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 17:32:32.466383  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 17:32:32.466523  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1779-g48d33e0df7175/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 17:32:32.466595  saving as /var/lib/lava/dispatcher/tmp/11661510/tftp-deploy-65gj70wz/kernel/bzImage
   48 17:32:32.466656  total size: 8490896 (8 MB)
   49 17:32:32.466717  No compression specified
   50 17:32:32.467785  progress   0 % (0 MB)
   51 17:32:32.469933  progress   5 % (0 MB)
   52 17:32:32.472189  progress  10 % (0 MB)
   53 17:32:32.474431  progress  15 % (1 MB)
   54 17:32:32.476695  progress  20 % (1 MB)
   55 17:32:32.478935  progress  25 % (2 MB)
   56 17:32:32.481179  progress  30 % (2 MB)
   57 17:32:32.483461  progress  35 % (2 MB)
   58 17:32:32.485791  progress  40 % (3 MB)
   59 17:32:32.488049  progress  45 % (3 MB)
   60 17:32:32.490262  progress  50 % (4 MB)
   61 17:32:32.492560  progress  55 % (4 MB)
   62 17:32:32.494836  progress  60 % (4 MB)
   63 17:32:32.497134  progress  65 % (5 MB)
   64 17:32:32.499344  progress  70 % (5 MB)
   65 17:32:32.501601  progress  75 % (6 MB)
   66 17:32:32.503838  progress  80 % (6 MB)
   67 17:32:32.506042  progress  85 % (6 MB)
   68 17:32:32.508387  progress  90 % (7 MB)
   69 17:32:32.510674  progress  95 % (7 MB)
   70 17:32:32.512931  progress 100 % (8 MB)
   71 17:32:32.513047  8 MB downloaded in 0.05 s (174.56 MB/s)
   72 17:32:32.513194  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 17:32:32.513423  end: 1.2 download-retry (duration 00:00:00) [common]
   75 17:32:32.513508  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 17:32:32.513592  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 17:32:32.513728  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1779-g48d33e0df7175/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 17:32:32.513803  saving as /var/lib/lava/dispatcher/tmp/11661510/tftp-deploy-65gj70wz/modules/modules.tar
   79 17:32:32.513863  total size: 250800 (0 MB)
   80 17:32:32.513925  Using unxz to decompress xz
   81 17:32:32.518061  progress  13 % (0 MB)
   82 17:32:32.518468  progress  26 % (0 MB)
   83 17:32:32.518753  progress  39 % (0 MB)
   84 17:32:32.520526  progress  52 % (0 MB)
   85 17:32:32.522444  progress  65 % (0 MB)
   86 17:32:32.524368  progress  78 % (0 MB)
   87 17:32:32.526121  progress  91 % (0 MB)
   88 17:32:32.528087  progress 100 % (0 MB)
   89 17:32:32.533413  0 MB downloaded in 0.02 s (12.24 MB/s)
   90 17:32:32.533653  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 17:32:32.533921  end: 1.3 download-retry (duration 00:00:00) [common]
   93 17:32:32.534017  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   94 17:32:32.534117  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   95 17:32:32.534202  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 17:32:32.534294  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   97 17:32:32.534524  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz
   98 17:32:32.534664  makedir: /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin
   99 17:32:32.534772  makedir: /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/tests
  100 17:32:32.534872  makedir: /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/results
  101 17:32:32.534990  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-add-keys
  102 17:32:32.535136  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-add-sources
  103 17:32:32.535270  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-background-process-start
  104 17:32:32.535399  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-background-process-stop
  105 17:32:32.535528  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-common-functions
  106 17:32:32.535701  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-echo-ipv4
  107 17:32:32.535830  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-install-packages
  108 17:32:32.535956  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-installed-packages
  109 17:32:32.536082  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-os-build
  110 17:32:32.536215  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-probe-channel
  111 17:32:32.536341  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-probe-ip
  112 17:32:32.536467  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-target-ip
  113 17:32:32.536594  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-target-mac
  114 17:32:32.536720  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-target-storage
  115 17:32:32.536848  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-test-case
  116 17:32:32.537002  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-test-event
  117 17:32:32.537129  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-test-feedback
  118 17:32:32.537257  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-test-raise
  119 17:32:32.537383  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-test-reference
  120 17:32:32.537514  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-test-runner
  121 17:32:32.537639  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-test-set
  122 17:32:32.537781  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-test-shell
  123 17:32:32.537915  Updating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-install-packages (oe)
  124 17:32:32.538071  Updating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/bin/lava-installed-packages (oe)
  125 17:32:32.538203  Creating /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/environment
  126 17:32:32.538303  LAVA metadata
  127 17:32:32.538377  - LAVA_JOB_ID=11661510
  128 17:32:32.538440  - LAVA_DISPATCHER_IP=192.168.201.1
  129 17:32:32.538540  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  130 17:32:32.538615  skipped lava-vland-overlay
  131 17:32:32.538693  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 17:32:32.538775  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  133 17:32:32.538839  skipped lava-multinode-overlay
  134 17:32:32.538916  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 17:32:32.538999  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  136 17:32:32.539075  Loading test definitions
  137 17:32:32.539168  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  138 17:32:32.539249  Using /lava-11661510 at stage 0
  139 17:32:32.539564  uuid=11661510_1.4.2.3.1 testdef=None
  140 17:32:32.539680  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 17:32:32.539789  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  142 17:32:32.540326  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 17:32:32.540542  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  145 17:32:32.541183  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 17:32:32.541411  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  148 17:32:32.542029  runner path: /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/0/tests/0_dmesg test_uuid 11661510_1.4.2.3.1
  149 17:32:32.542187  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 17:32:32.542416  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  152 17:32:32.542487  Using /lava-11661510 at stage 1
  153 17:32:32.542784  uuid=11661510_1.4.2.3.5 testdef=None
  154 17:32:32.542872  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 17:32:32.542957  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  156 17:32:32.543434  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 17:32:32.543676  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  159 17:32:32.544341  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 17:32:32.544569  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  162 17:32:32.545199  runner path: /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/1/tests/1_bootrr test_uuid 11661510_1.4.2.3.5
  163 17:32:32.545351  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 17:32:32.545555  Creating lava-test-runner.conf files
  166 17:32:32.545617  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/0 for stage 0
  167 17:32:32.545707  - 0_dmesg
  168 17:32:32.545789  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11661510/lava-overlay-4nism8qz/lava-11661510/1 for stage 1
  169 17:32:32.545880  - 1_bootrr
  170 17:32:32.545974  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 17:32:32.546058  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  172 17:32:32.554535  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 17:32:32.554638  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  174 17:32:32.554724  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 17:32:32.554846  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 17:32:32.554960  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  177 17:32:32.808865  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 17:32:32.809308  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  179 17:32:32.809432  extracting modules file /var/lib/lava/dispatcher/tmp/11661510/tftp-deploy-65gj70wz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11661510/extract-overlay-ramdisk-61cgadtj/ramdisk
  180 17:32:32.824264  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 17:32:32.824385  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  182 17:32:32.824479  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11661510/compress-overlay-gwzv9eh4/overlay-1.4.2.4.tar.gz to ramdisk
  183 17:32:32.824552  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11661510/compress-overlay-gwzv9eh4/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11661510/extract-overlay-ramdisk-61cgadtj/ramdisk
  184 17:32:32.833449  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 17:32:32.833561  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  186 17:32:32.833652  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 17:32:32.833741  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  188 17:32:32.833819  Building ramdisk /var/lib/lava/dispatcher/tmp/11661510/extract-overlay-ramdisk-61cgadtj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11661510/extract-overlay-ramdisk-61cgadtj/ramdisk
  189 17:32:32.963365  >> 49788 blocks

  190 17:32:33.800925  rename /var/lib/lava/dispatcher/tmp/11661510/extract-overlay-ramdisk-61cgadtj/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11661510/tftp-deploy-65gj70wz/ramdisk/ramdisk.cpio.gz
  191 17:32:33.801367  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 17:32:33.801500  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  193 17:32:33.801603  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  194 17:32:33.801706  No mkimage arch provided, not using FIT.
  195 17:32:33.801798  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 17:32:33.801883  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 17:32:33.801991  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 17:32:33.802083  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  199 17:32:33.802166  No LXC device requested
  200 17:32:33.802244  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 17:32:33.802329  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  202 17:32:33.802409  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 17:32:33.802480  Checking files for TFTP limit of 4294967296 bytes.
  204 17:32:33.802900  end: 1 tftp-deploy (duration 00:00:01) [common]
  205 17:32:33.803007  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 17:32:33.803098  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 17:32:33.803216  substitutions:
  208 17:32:33.803287  - {DTB}: None
  209 17:32:33.803350  - {INITRD}: 11661510/tftp-deploy-65gj70wz/ramdisk/ramdisk.cpio.gz
  210 17:32:33.803410  - {KERNEL}: 11661510/tftp-deploy-65gj70wz/kernel/bzImage
  211 17:32:33.803469  - {LAVA_MAC}: None
  212 17:32:33.803526  - {PRESEED_CONFIG}: None
  213 17:32:33.803582  - {PRESEED_LOCAL}: None
  214 17:32:33.803646  - {RAMDISK}: 11661510/tftp-deploy-65gj70wz/ramdisk/ramdisk.cpio.gz
  215 17:32:33.803742  - {ROOT_PART}: None
  216 17:32:33.803797  - {ROOT}: None
  217 17:32:33.803851  - {SERVER_IP}: 192.168.201.1
  218 17:32:33.803906  - {TEE}: None
  219 17:32:33.803961  Parsed boot commands:
  220 17:32:33.804014  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 17:32:33.804190  Parsed boot commands: tftpboot 192.168.201.1 11661510/tftp-deploy-65gj70wz/kernel/bzImage 11661510/tftp-deploy-65gj70wz/kernel/cmdline 11661510/tftp-deploy-65gj70wz/ramdisk/ramdisk.cpio.gz
  222 17:32:33.804276  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 17:32:33.804363  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 17:32:33.804454  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 17:32:33.804540  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 17:32:33.804611  Not connected, no need to disconnect.
  227 17:32:33.804685  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 17:32:33.804768  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 17:32:33.804836  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
  230 17:32:33.808852  Setting prompt string to ['lava-test: # ']
  231 17:32:33.809251  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 17:32:33.809359  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 17:32:33.809450  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 17:32:33.809551  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 17:32:33.809775  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
  236 17:32:38.955964  >> Command sent successfully.

  237 17:32:38.966352  Returned 0 in 5 seconds
  238 17:32:39.067624  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 17:32:39.069753  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 17:32:39.070463  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 17:32:39.071055  Setting prompt string to 'Starting depthcharge on Helios...'
  243 17:32:39.071520  Changing prompt to 'Starting depthcharge on Helios...'
  244 17:32:39.071970  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  245 17:32:39.073209  [Enter `^Ec?' for help]

  246 17:32:39.679893  

  247 17:32:39.680407  

  248 17:32:39.690362  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  249 17:32:39.693981  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  250 17:32:39.700201  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  251 17:32:39.703960  CPU: AES supported, TXT NOT supported, VT supported

  252 17:32:39.710015  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  253 17:32:39.714065  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  254 17:32:39.720589  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  255 17:32:39.724290  VBOOT: Loading verstage.

  256 17:32:39.727370  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  257 17:32:39.734549  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  258 17:32:39.737861  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  259 17:32:39.741230  CBFS @ c08000 size 3f8000

  260 17:32:39.747732  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  261 17:32:39.751007  CBFS: Locating 'fallback/verstage'

  262 17:32:39.754427  CBFS: Found @ offset 10fb80 size 1072c

  263 17:32:39.754951  

  264 17:32:39.755294  

  265 17:32:39.767358  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  266 17:32:39.780702  Probing TPM: . done!

  267 17:32:39.783844  TPM ready after 0 ms

  268 17:32:39.787426  Connected to device vid:did:rid of 1ae0:0028:00

  269 17:32:39.797886  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  270 17:32:39.801299  Initialized TPM device CR50 revision 0

  271 17:32:39.845653  tlcl_send_startup: Startup return code is 0

  272 17:32:39.846168  TPM: setup succeeded

  273 17:32:39.858534  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  274 17:32:39.862196  Chrome EC: UHEPI supported

  275 17:32:39.865477  Phase 1

  276 17:32:39.868722  FMAP: area GBB found @ c05000 (12288 bytes)

  277 17:32:39.875135  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  278 17:32:39.878563  Phase 2

  279 17:32:39.879060  Phase 3

  280 17:32:39.881745  FMAP: area GBB found @ c05000 (12288 bytes)

  281 17:32:39.889130  VB2:vb2_report_dev_firmware() This is developer signed firmware

  282 17:32:39.895162  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  283 17:32:39.898498  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  284 17:32:39.905506  VB2:vb2_verify_keyblock() Checking keyblock signature...

  285 17:32:39.921232  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  286 17:32:39.924520  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  287 17:32:39.931108  VB2:vb2_verify_fw_preamble() Verifying preamble.

  288 17:32:39.935759  Phase 4

  289 17:32:39.938974  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  290 17:32:39.945620  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  291 17:32:40.125066  VB2:vb2_rsa_verify_digest() Digest check failed!

  292 17:32:40.131154  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  293 17:32:40.131753  Saving nvdata

  294 17:32:40.134208  Reboot requested (10020007)

  295 17:32:40.137479  board_reset() called!

  296 17:32:40.137906  full_reset() called!

  297 17:32:44.646847  

  298 17:32:44.647338  

  299 17:32:44.656874  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  300 17:32:44.660191  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  301 17:32:44.666205  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  302 17:32:44.669576  CPU: AES supported, TXT NOT supported, VT supported

  303 17:32:44.676587  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  304 17:32:44.679703  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  305 17:32:44.686551  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  306 17:32:44.689415  VBOOT: Loading verstage.

  307 17:32:44.693187  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  308 17:32:44.699871  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  309 17:32:44.706331  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  310 17:32:44.706763  CBFS @ c08000 size 3f8000

  311 17:32:44.712795  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  312 17:32:44.715845  CBFS: Locating 'fallback/verstage'

  313 17:32:44.719449  CBFS: Found @ offset 10fb80 size 1072c

  314 17:32:44.723632  

  315 17:32:44.724198  

  316 17:32:44.733439  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  317 17:32:44.747999  Probing TPM: . done!

  318 17:32:44.751057  TPM ready after 0 ms

  319 17:32:44.754529  Connected to device vid:did:rid of 1ae0:0028:00

  320 17:32:44.764549  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  321 17:32:44.767976  Initialized TPM device CR50 revision 0

  322 17:32:44.812949  tlcl_send_startup: Startup return code is 0

  323 17:32:44.813523  TPM: setup succeeded

  324 17:32:44.825580  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  325 17:32:44.829341  Chrome EC: UHEPI supported

  326 17:32:44.832328  Phase 1

  327 17:32:44.835929  FMAP: area GBB found @ c05000 (12288 bytes)

  328 17:32:44.842464  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  329 17:32:44.849203  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  330 17:32:44.852701  Recovery requested (1009000e)

  331 17:32:44.858030  Saving nvdata

  332 17:32:44.864450  tlcl_extend: response is 0

  333 17:32:44.873255  tlcl_extend: response is 0

  334 17:32:44.880384  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  335 17:32:44.883937  CBFS @ c08000 size 3f8000

  336 17:32:44.889709  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  337 17:32:44.893587  CBFS: Locating 'fallback/romstage'

  338 17:32:44.896739  CBFS: Found @ offset 80 size 145fc

  339 17:32:44.900033  Accumulated console time in verstage 98 ms

  340 17:32:44.900624  

  341 17:32:44.900979  

  342 17:32:44.913386  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  343 17:32:44.920066  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  344 17:32:44.923122  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  345 17:32:44.926103  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  346 17:32:44.932746  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  347 17:32:44.936506  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  348 17:32:44.939532  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  349 17:32:44.942525  TCO_STS:   0000 0000

  350 17:32:44.946510  GEN_PMCON: e0015238 00000200

  351 17:32:44.949645  GBLRST_CAUSE: 00000000 00000000

  352 17:32:44.950185  prev_sleep_state 5

  353 17:32:44.953452  Boot Count incremented to 65676

  354 17:32:44.959800  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  355 17:32:44.962970  CBFS @ c08000 size 3f8000

  356 17:32:44.969738  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  357 17:32:44.970199  CBFS: Locating 'fspm.bin'

  358 17:32:44.976222  CBFS: Found @ offset 5ffc0 size 71000

  359 17:32:44.979601  Chrome EC: UHEPI supported

  360 17:32:44.986186  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  361 17:32:44.989427  Probing TPM:  done!

  362 17:32:44.996854  Connected to device vid:did:rid of 1ae0:0028:00

  363 17:32:45.006256  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  364 17:32:45.012157  Initialized TPM device CR50 revision 0

  365 17:32:45.021493  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  366 17:32:45.028518  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  367 17:32:45.031361  MRC cache found, size 1948

  368 17:32:45.034707  bootmode is set to: 2

  369 17:32:45.037948  PRMRR disabled by config.

  370 17:32:45.038429  SPD INDEX = 1

  371 17:32:45.044166  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  372 17:32:45.047889  CBFS @ c08000 size 3f8000

  373 17:32:45.054179  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  374 17:32:45.054624  CBFS: Locating 'spd.bin'

  375 17:32:45.057296  CBFS: Found @ offset 5fb80 size 400

  376 17:32:45.060932  SPD: module type is LPDDR3

  377 17:32:45.064184  SPD: module part is 

  378 17:32:45.070996  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  379 17:32:45.074186  SPD: device width 4 bits, bus width 8 bits

  380 17:32:45.077424  SPD: module size is 4096 MB (per channel)

  381 17:32:45.081155  memory slot: 0 configuration done.

  382 17:32:45.084294  memory slot: 2 configuration done.

  383 17:32:45.136400  CBMEM:

  384 17:32:45.139071  IMD: root @ 99fff000 254 entries.

  385 17:32:45.142879  IMD: root @ 99ffec00 62 entries.

  386 17:32:45.145917  External stage cache:

  387 17:32:45.149114  IMD: root @ 9abff000 254 entries.

  388 17:32:45.152518  IMD: root @ 9abfec00 62 entries.

  389 17:32:45.155869  Chrome EC: clear events_b mask to 0x0000000020004000

  390 17:32:45.172112  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  391 17:32:45.185335  tlcl_write: response is 0

  392 17:32:45.194179  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  393 17:32:45.201681  MRC: TPM MRC hash updated successfully.

  394 17:32:45.202220  2 DIMMs found

  395 17:32:45.204438  SMM Memory Map

  396 17:32:45.207473  SMRAM       : 0x9a000000 0x1000000

  397 17:32:45.210874   Subregion 0: 0x9a000000 0xa00000

  398 17:32:45.214129   Subregion 1: 0x9aa00000 0x200000

  399 17:32:45.217484   Subregion 2: 0x9ac00000 0x400000

  400 17:32:45.220791  top_of_ram = 0x9a000000

  401 17:32:45.224097  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  402 17:32:45.231110  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  403 17:32:45.233937  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  404 17:32:45.241462  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  405 17:32:45.244462  CBFS @ c08000 size 3f8000

  406 17:32:45.247400  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  407 17:32:45.251199  CBFS: Locating 'fallback/postcar'

  408 17:32:45.257338  CBFS: Found @ offset 107000 size 4b44

  409 17:32:45.260550  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  410 17:32:45.273175  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  411 17:32:45.276789  Processing 180 relocs. Offset value of 0x97c0c000

  412 17:32:45.284962  Accumulated console time in romstage 286 ms

  413 17:32:45.285485  

  414 17:32:45.285933  

  415 17:32:45.294953  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  416 17:32:45.301839  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  417 17:32:45.305118  CBFS @ c08000 size 3f8000

  418 17:32:45.308465  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  419 17:32:45.314592  CBFS: Locating 'fallback/ramstage'

  420 17:32:45.318421  CBFS: Found @ offset 43380 size 1b9e8

  421 17:32:45.324694  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  422 17:32:45.356892  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  423 17:32:45.360092  Processing 3976 relocs. Offset value of 0x98db0000

  424 17:32:45.366836  Accumulated console time in postcar 52 ms

  425 17:32:45.367270  

  426 17:32:45.367613  

  427 17:32:45.376907  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  428 17:32:45.383444  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  429 17:32:45.386568  WARNING: RO_VPD is uninitialized or empty.

  430 17:32:45.390296  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  431 17:32:45.396505  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  432 17:32:45.396975  Normal boot.

  433 17:32:45.403084  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  434 17:32:45.406473  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  435 17:32:45.409611  CBFS @ c08000 size 3f8000

  436 17:32:45.416169  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  437 17:32:45.420078  CBFS: Locating 'cpu_microcode_blob.bin'

  438 17:32:45.423363  CBFS: Found @ offset 14700 size 2ec00

  439 17:32:45.426389  microcode: sig=0x806ec pf=0x4 revision=0xc9

  440 17:32:45.430094  Skip microcode update

  441 17:32:45.436088  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  442 17:32:45.436634  CBFS @ c08000 size 3f8000

  443 17:32:45.443119  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  444 17:32:45.446219  CBFS: Locating 'fsps.bin'

  445 17:32:45.450004  CBFS: Found @ offset d1fc0 size 35000

  446 17:32:45.475014  Detected 4 core, 8 thread CPU.

  447 17:32:45.478597  Setting up SMI for CPU

  448 17:32:45.482279  IED base = 0x9ac00000

  449 17:32:45.482805  IED size = 0x00400000

  450 17:32:45.485343  Will perform SMM setup.

  451 17:32:45.491787  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  452 17:32:45.497955  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  453 17:32:45.501249  Processing 16 relocs. Offset value of 0x00030000

  454 17:32:45.505327  Attempting to start 7 APs

  455 17:32:45.508731  Waiting for 10ms after sending INIT.

  456 17:32:45.525051  Waiting for 1st SIPI to complete...done.

  457 17:32:45.525559  AP: slot 2 apic_id 7.

  458 17:32:45.527972  AP: slot 5 apic_id 6.

  459 17:32:45.531727  AP: slot 4 apic_id 3.

  460 17:32:45.532169  AP: slot 1 apic_id 2.

  461 17:32:45.534861  AP: slot 7 apic_id 4.

  462 17:32:45.538047  AP: slot 6 apic_id 5.

  463 17:32:45.541507  Waiting for 2nd SIPI to complete...done.

  464 17:32:45.544738  AP: slot 3 apic_id 1.

  465 17:32:45.551201  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  466 17:32:45.558217  Processing 13 relocs. Offset value of 0x00038000

  467 17:32:45.561132  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  468 17:32:45.567739  Installing SMM handler to 0x9a000000

  469 17:32:45.574456  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  470 17:32:45.581205  Processing 658 relocs. Offset value of 0x9a010000

  471 17:32:45.588138  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  472 17:32:45.591172  Processing 13 relocs. Offset value of 0x9a008000

  473 17:32:45.597729  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  474 17:32:45.603752  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  475 17:32:45.610746  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  476 17:32:45.614151  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  477 17:32:45.620491  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  478 17:32:45.626977  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  479 17:32:45.630714  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  480 17:32:45.637696  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  481 17:32:45.641320  Clearing SMI status registers

  482 17:32:45.643985  SMI_STS: PM1 

  483 17:32:45.644559  PM1_STS: PWRBTN 

  484 17:32:45.647248  TCO_STS: SECOND_TO 

  485 17:32:45.650951  New SMBASE 0x9a000000

  486 17:32:45.654014  In relocation handler: CPU 0

  487 17:32:45.657455  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  488 17:32:45.660831  Writing SMRR. base = 0x9a000006, mask=0xff000800

  489 17:32:45.663889  Relocation complete.

  490 17:32:45.667473  New SMBASE 0x99fff400

  491 17:32:45.670887  In relocation handler: CPU 3

  492 17:32:45.674013  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  493 17:32:45.677783  Writing SMRR. base = 0x9a000006, mask=0xff000800

  494 17:32:45.680683  Relocation complete.

  495 17:32:45.684098  New SMBASE 0x99ffe800

  496 17:32:45.684527  In relocation handler: CPU 6

  497 17:32:45.690933  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  498 17:32:45.694406  Writing SMRR. base = 0x9a000006, mask=0xff000800

  499 17:32:45.697292  Relocation complete.

  500 17:32:45.697714  New SMBASE 0x99ffe400

  501 17:32:45.700553  In relocation handler: CPU 7

  502 17:32:45.707143  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  503 17:32:45.711009  Writing SMRR. base = 0x9a000006, mask=0xff000800

  504 17:32:45.714250  Relocation complete.

  505 17:32:45.714782  New SMBASE 0x99fff800

  506 17:32:45.717414  In relocation handler: CPU 2

  507 17:32:45.720639  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  508 17:32:45.727282  Writing SMRR. base = 0x9a000006, mask=0xff000800

  509 17:32:45.730789  Relocation complete.

  510 17:32:45.731323  New SMBASE 0x99ffec00

  511 17:32:45.734333  In relocation handler: CPU 5

  512 17:32:45.737245  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  513 17:32:45.743798  Writing SMRR. base = 0x9a000006, mask=0xff000800

  514 17:32:45.746788  Relocation complete.

  515 17:32:45.747220  New SMBASE 0x99fffc00

  516 17:32:45.751009  In relocation handler: CPU 1

  517 17:32:45.753619  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  518 17:32:45.760137  Writing SMRR. base = 0x9a000006, mask=0xff000800

  519 17:32:45.763246  Relocation complete.

  520 17:32:45.763854  New SMBASE 0x99fff000

  521 17:32:45.766884  In relocation handler: CPU 4

  522 17:32:45.769957  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  523 17:32:45.777295  Writing SMRR. base = 0x9a000006, mask=0xff000800

  524 17:32:45.777848  Relocation complete.

  525 17:32:45.780484  Initializing CPU #0

  526 17:32:45.783777  CPU: vendor Intel device 806ec

  527 17:32:45.787146  CPU: family 06, model 8e, stepping 0c

  528 17:32:45.790163  Clearing out pending MCEs

  529 17:32:45.793649  Setting up local APIC...

  530 17:32:45.794105   apic_id: 0x00 done.

  531 17:32:45.796549  Turbo is available but hidden

  532 17:32:45.799932  Turbo is available and visible

  533 17:32:45.803200  VMX status: enabled

  534 17:32:45.806561  IA32_FEATURE_CONTROL status: locked

  535 17:32:45.809889  Skip microcode update

  536 17:32:45.810326  CPU #0 initialized

  537 17:32:45.813212  Initializing CPU #3

  538 17:32:45.816998  Initializing CPU #2

  539 17:32:45.817431  Initializing CPU #5

  540 17:32:45.819762  CPU: vendor Intel device 806ec

  541 17:32:45.822946  CPU: family 06, model 8e, stepping 0c

  542 17:32:45.826268  CPU: vendor Intel device 806ec

  543 17:32:45.830084  CPU: family 06, model 8e, stepping 0c

  544 17:32:45.833285  Clearing out pending MCEs

  545 17:32:45.836549  Clearing out pending MCEs

  546 17:32:45.839976  Setting up local APIC...

  547 17:32:45.840398  Initializing CPU #6

  548 17:32:45.843566  CPU: vendor Intel device 806ec

  549 17:32:45.846737  CPU: family 06, model 8e, stepping 0c

  550 17:32:45.849922  Clearing out pending MCEs

  551 17:32:45.853166  Initializing CPU #4

  552 17:32:45.853595  Initializing CPU #1

  553 17:32:45.856360  CPU: vendor Intel device 806ec

  554 17:32:45.863112  CPU: family 06, model 8e, stepping 0c

  555 17:32:45.866456  CPU: vendor Intel device 806ec

  556 17:32:45.869991  CPU: family 06, model 8e, stepping 0c

  557 17:32:45.870704  Clearing out pending MCEs

  558 17:32:45.872808  Clearing out pending MCEs

  559 17:32:45.876081  Setting up local APIC...

  560 17:32:45.879270  Initializing CPU #7

  561 17:32:45.882492  CPU: vendor Intel device 806ec

  562 17:32:45.886043  CPU: family 06, model 8e, stepping 0c

  563 17:32:45.889213  CPU: vendor Intel device 806ec

  564 17:32:45.892291  CPU: family 06, model 8e, stepping 0c

  565 17:32:45.895700  Clearing out pending MCEs

  566 17:32:45.896130  Clearing out pending MCEs

  567 17:32:45.898870  Setting up local APIC...

  568 17:32:45.902708   apic_id: 0x07 done.

  569 17:32:45.906036  Setting up local APIC...

  570 17:32:45.906630   apic_id: 0x03 done.

  571 17:32:45.908949  Setting up local APIC...

  572 17:32:45.912177  VMX status: enabled

  573 17:32:45.912750   apic_id: 0x05 done.

  574 17:32:45.915596  Setting up local APIC...

  575 17:32:45.918844  IA32_FEATURE_CONTROL status: locked

  576 17:32:45.922033   apic_id: 0x06 done.

  577 17:32:45.922649  Skip microcode update

  578 17:32:45.925392  VMX status: enabled

  579 17:32:45.928640  CPU #2 initialized

  580 17:32:45.931935  IA32_FEATURE_CONTROL status: locked

  581 17:32:45.932357   apic_id: 0x04 done.

  582 17:32:45.935457  Setting up local APIC...

  583 17:32:45.939005  VMX status: enabled

  584 17:32:45.939429   apic_id: 0x02 done.

  585 17:32:45.945509  IA32_FEATURE_CONTROL status: locked

  586 17:32:45.945812  VMX status: enabled

  587 17:32:45.948897  Skip microcode update

  588 17:32:45.952030  IA32_FEATURE_CONTROL status: locked

  589 17:32:45.955087  CPU #4 initialized

  590 17:32:45.955387  Skip microcode update

  591 17:32:45.958880  VMX status: enabled

  592 17:32:45.959227  VMX status: enabled

  593 17:32:45.965024  IA32_FEATURE_CONTROL status: locked

  594 17:32:45.968311  IA32_FEATURE_CONTROL status: locked

  595 17:32:45.968708  Skip microcode update

  596 17:32:45.972116  Skip microcode update

  597 17:32:45.975118  CPU #6 initialized

  598 17:32:45.975418  CPU #7 initialized

  599 17:32:45.978484  Skip microcode update

  600 17:32:45.978907  CPU #1 initialized

  601 17:32:45.982023  CPU #5 initialized

  602 17:32:45.985186   apic_id: 0x01 done.

  603 17:32:45.985636  VMX status: enabled

  604 17:32:45.988545  IA32_FEATURE_CONTROL status: locked

  605 17:32:45.991878  Skip microcode update

  606 17:32:45.995277  CPU #3 initialized

  607 17:32:45.998495  bsp_do_flight_plan done after 455 msecs.

  608 17:32:46.001882  CPU: frequency set to 4200 MHz

  609 17:32:46.002453  Enabling SMIs.

  610 17:32:46.005078  Locking SMM.

  611 17:32:46.018836  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  612 17:32:46.022181  CBFS @ c08000 size 3f8000

  613 17:32:46.028669  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  614 17:32:46.029101  CBFS: Locating 'vbt.bin'

  615 17:32:46.032121  CBFS: Found @ offset 5f5c0 size 499

  616 17:32:46.039171  Found a VBT of 4608 bytes after decompression

  617 17:32:46.224104  Display FSP Version Info HOB

  618 17:32:46.227051  Reference Code - CPU = 9.0.1e.30

  619 17:32:46.230828  uCode Version = 0.0.0.ca

  620 17:32:46.234182  TXT ACM version = ff.ff.ff.ffff

  621 17:32:46.237320  Display FSP Version Info HOB

  622 17:32:46.240513  Reference Code - ME = 9.0.1e.30

  623 17:32:46.243527  MEBx version = 0.0.0.0

  624 17:32:46.247034  ME Firmware Version = Consumer SKU

  625 17:32:46.250605  Display FSP Version Info HOB

  626 17:32:46.253850  Reference Code - CML PCH = 9.0.1e.30

  627 17:32:46.257269  PCH-CRID Status = Disabled

  628 17:32:46.260356  PCH-CRID Original Value = ff.ff.ff.ffff

  629 17:32:46.263380  PCH-CRID New Value = ff.ff.ff.ffff

  630 17:32:46.267071  OPROM - RST - RAID = ff.ff.ff.ffff

  631 17:32:46.270152  ChipsetInit Base Version = ff.ff.ff.ffff

  632 17:32:46.273620  ChipsetInit Oem Version = ff.ff.ff.ffff

  633 17:32:46.276990  Display FSP Version Info HOB

  634 17:32:46.283631  Reference Code - SA - System Agent = 9.0.1e.30

  635 17:32:46.286740  Reference Code - MRC = 0.7.1.6c

  636 17:32:46.290114  SA - PCIe Version = 9.0.1e.30

  637 17:32:46.290540  SA-CRID Status = Disabled

  638 17:32:46.293245  SA-CRID Original Value = 0.0.0.c

  639 17:32:46.296489  SA-CRID New Value = 0.0.0.c

  640 17:32:46.299963  OPROM - VBIOS = ff.ff.ff.ffff

  641 17:32:46.303292  RTC Init

  642 17:32:46.306642  Set power on after power failure.

  643 17:32:46.307244  Disabling Deep S3

  644 17:32:46.309952  Disabling Deep S3

  645 17:32:46.310553  Disabling Deep S4

  646 17:32:46.313049  Disabling Deep S4

  647 17:32:46.316602  Disabling Deep S5

  648 17:32:46.317030  Disabling Deep S5

  649 17:32:46.323317  BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 196 exit 1

  650 17:32:46.323861  Enumerating buses...

  651 17:32:46.329902  Show all devs... Before device enumeration.

  652 17:32:46.330384  Root Device: enabled 1

  653 17:32:46.332885  CPU_CLUSTER: 0: enabled 1

  654 17:32:46.335997  DOMAIN: 0000: enabled 1

  655 17:32:46.339549  APIC: 00: enabled 1

  656 17:32:46.339631  PCI: 00:00.0: enabled 1

  657 17:32:46.342851  PCI: 00:02.0: enabled 1

  658 17:32:46.346302  PCI: 00:04.0: enabled 0

  659 17:32:46.349496  PCI: 00:05.0: enabled 0

  660 17:32:46.349596  PCI: 00:12.0: enabled 1

  661 17:32:46.352633  PCI: 00:12.5: enabled 0

  662 17:32:46.356215  PCI: 00:12.6: enabled 0

  663 17:32:46.359545  PCI: 00:14.0: enabled 1

  664 17:32:46.359632  PCI: 00:14.1: enabled 0

  665 17:32:46.362819  PCI: 00:14.3: enabled 1

  666 17:32:46.365985  PCI: 00:14.5: enabled 0

  667 17:32:46.366088  PCI: 00:15.0: enabled 1

  668 17:32:46.369221  PCI: 00:15.1: enabled 1

  669 17:32:46.372766  PCI: 00:15.2: enabled 0

  670 17:32:46.375990  PCI: 00:15.3: enabled 0

  671 17:32:46.376112  PCI: 00:16.0: enabled 1

  672 17:32:46.379795  PCI: 00:16.1: enabled 0

  673 17:32:46.382935  PCI: 00:16.2: enabled 0

  674 17:32:46.386412  PCI: 00:16.3: enabled 0

  675 17:32:46.386605  PCI: 00:16.4: enabled 0

  676 17:32:46.388914  PCI: 00:16.5: enabled 0

  677 17:32:46.392771  PCI: 00:17.0: enabled 1

  678 17:32:46.395916  PCI: 00:19.0: enabled 1

  679 17:32:46.396119  PCI: 00:19.1: enabled 0

  680 17:32:46.399023  PCI: 00:19.2: enabled 0

  681 17:32:46.402312  PCI: 00:1a.0: enabled 0

  682 17:32:46.402600  PCI: 00:1c.0: enabled 0

  683 17:32:46.405748  PCI: 00:1c.1: enabled 0

  684 17:32:46.409069  PCI: 00:1c.2: enabled 0

  685 17:32:46.412409  PCI: 00:1c.3: enabled 0

  686 17:32:46.412802  PCI: 00:1c.4: enabled 0

  687 17:32:46.415739  PCI: 00:1c.5: enabled 0

  688 17:32:46.419101  PCI: 00:1c.6: enabled 0

  689 17:32:46.422297  PCI: 00:1c.7: enabled 0

  690 17:32:46.422721  PCI: 00:1d.0: enabled 1

  691 17:32:46.426000  PCI: 00:1d.1: enabled 0

  692 17:32:46.428940  PCI: 00:1d.2: enabled 0

  693 17:32:46.432513  PCI: 00:1d.3: enabled 0

  694 17:32:46.432940  PCI: 00:1d.4: enabled 0

  695 17:32:46.435829  PCI: 00:1d.5: enabled 1

  696 17:32:46.438805  PCI: 00:1e.0: enabled 1

  697 17:32:46.442651  PCI: 00:1e.1: enabled 0

  698 17:32:46.443075  PCI: 00:1e.2: enabled 1

  699 17:32:46.445983  PCI: 00:1e.3: enabled 1

  700 17:32:46.448799  PCI: 00:1f.0: enabled 1

  701 17:32:46.449249  PCI: 00:1f.1: enabled 1

  702 17:32:46.452060  PCI: 00:1f.2: enabled 1

  703 17:32:46.455387  PCI: 00:1f.3: enabled 1

  704 17:32:46.458813  PCI: 00:1f.4: enabled 1

  705 17:32:46.459253  PCI: 00:1f.5: enabled 1

  706 17:32:46.462120  PCI: 00:1f.6: enabled 0

  707 17:32:46.465659  USB0 port 0: enabled 1

  708 17:32:46.468738  I2C: 00:15: enabled 1

  709 17:32:46.469179  I2C: 00:5d: enabled 1

  710 17:32:46.472082  GENERIC: 0.0: enabled 1

  711 17:32:46.475229  I2C: 00:1a: enabled 1

  712 17:32:46.475692  I2C: 00:38: enabled 1

  713 17:32:46.479090  I2C: 00:39: enabled 1

  714 17:32:46.482028  I2C: 00:3a: enabled 1

  715 17:32:46.482455  I2C: 00:3b: enabled 1

  716 17:32:46.485092  PCI: 00:00.0: enabled 1

  717 17:32:46.488405  SPI: 00: enabled 1

  718 17:32:46.488827  SPI: 01: enabled 1

  719 17:32:46.491958  PNP: 0c09.0: enabled 1

  720 17:32:46.495271  USB2 port 0: enabled 1

  721 17:32:46.495737  USB2 port 1: enabled 1

  722 17:32:46.498595  USB2 port 2: enabled 0

  723 17:32:46.501781  USB2 port 3: enabled 0

  724 17:32:46.505039  USB2 port 5: enabled 0

  725 17:32:46.505465  USB2 port 6: enabled 1

  726 17:32:46.508130  USB2 port 9: enabled 1

  727 17:32:46.511346  USB3 port 0: enabled 1

  728 17:32:46.511810  USB3 port 1: enabled 1

  729 17:32:46.514713  USB3 port 2: enabled 1

  730 17:32:46.518184  USB3 port 3: enabled 1

  731 17:32:46.521616  USB3 port 4: enabled 0

  732 17:32:46.522037  APIC: 02: enabled 1

  733 17:32:46.524898  APIC: 07: enabled 1

  734 17:32:46.525320  APIC: 01: enabled 1

  735 17:32:46.528110  APIC: 03: enabled 1

  736 17:32:46.531391  APIC: 06: enabled 1

  737 17:32:46.531854  APIC: 05: enabled 1

  738 17:32:46.534457  APIC: 04: enabled 1

  739 17:32:46.537983  Compare with tree...

  740 17:32:46.538404  Root Device: enabled 1

  741 17:32:46.541163   CPU_CLUSTER: 0: enabled 1

  742 17:32:46.544796    APIC: 00: enabled 1

  743 17:32:46.545372    APIC: 02: enabled 1

  744 17:32:46.547894    APIC: 07: enabled 1

  745 17:32:46.551367    APIC: 01: enabled 1

  746 17:32:46.551840    APIC: 03: enabled 1

  747 17:32:46.554681    APIC: 06: enabled 1

  748 17:32:46.557842    APIC: 05: enabled 1

  749 17:32:46.558359    APIC: 04: enabled 1

  750 17:32:46.560914   DOMAIN: 0000: enabled 1

  751 17:32:46.564040    PCI: 00:00.0: enabled 1

  752 17:32:46.567462    PCI: 00:02.0: enabled 1

  753 17:32:46.570629    PCI: 00:04.0: enabled 0

  754 17:32:46.571054    PCI: 00:05.0: enabled 0

  755 17:32:46.574086    PCI: 00:12.0: enabled 1

  756 17:32:46.577669    PCI: 00:12.5: enabled 0

  757 17:32:46.580814    PCI: 00:12.6: enabled 0

  758 17:32:46.584041    PCI: 00:14.0: enabled 1

  759 17:32:46.584523     USB0 port 0: enabled 1

  760 17:32:46.587751      USB2 port 0: enabled 1

  761 17:32:46.590495      USB2 port 1: enabled 1

  762 17:32:46.594160      USB2 port 2: enabled 0

  763 17:32:46.597644      USB2 port 3: enabled 0

  764 17:32:46.600843      USB2 port 5: enabled 0

  765 17:32:46.601314      USB2 port 6: enabled 1

  766 17:32:46.603751      USB2 port 9: enabled 1

  767 17:32:46.607273      USB3 port 0: enabled 1

  768 17:32:46.610578      USB3 port 1: enabled 1

  769 17:32:46.613696      USB3 port 2: enabled 1

  770 17:32:46.614234      USB3 port 3: enabled 1

  771 17:32:46.617280      USB3 port 4: enabled 0

  772 17:32:46.620398    PCI: 00:14.1: enabled 0

  773 17:32:46.623758    PCI: 00:14.3: enabled 1

  774 17:32:46.627048    PCI: 00:14.5: enabled 0

  775 17:32:46.630335    PCI: 00:15.0: enabled 1

  776 17:32:46.631047     I2C: 00:15: enabled 1

  777 17:32:46.633765    PCI: 00:15.1: enabled 1

  778 17:32:46.637526     I2C: 00:5d: enabled 1

  779 17:32:46.640216     GENERIC: 0.0: enabled 1

  780 17:32:46.640642    PCI: 00:15.2: enabled 0

  781 17:32:46.643330    PCI: 00:15.3: enabled 0

  782 17:32:46.646961    PCI: 00:16.0: enabled 1

  783 17:32:46.650016    PCI: 00:16.1: enabled 0

  784 17:32:46.653476    PCI: 00:16.2: enabled 0

  785 17:32:46.653908    PCI: 00:16.3: enabled 0

  786 17:32:46.656487    PCI: 00:16.4: enabled 0

  787 17:32:46.660140    PCI: 00:16.5: enabled 0

  788 17:32:46.663594    PCI: 00:17.0: enabled 1

  789 17:32:46.666982    PCI: 00:19.0: enabled 1

  790 17:32:46.667430     I2C: 00:1a: enabled 1

  791 17:32:46.670307     I2C: 00:38: enabled 1

  792 17:32:46.673101     I2C: 00:39: enabled 1

  793 17:32:46.677137     I2C: 00:3a: enabled 1

  794 17:32:46.677570     I2C: 00:3b: enabled 1

  795 17:32:46.679755    PCI: 00:19.1: enabled 0

  796 17:32:46.683097    PCI: 00:19.2: enabled 0

  797 17:32:46.686665    PCI: 00:1a.0: enabled 0

  798 17:32:46.689637    PCI: 00:1c.0: enabled 0

  799 17:32:46.690069    PCI: 00:1c.1: enabled 0

  800 17:32:46.693219    PCI: 00:1c.2: enabled 0

  801 17:32:46.697069    PCI: 00:1c.3: enabled 0

  802 17:32:46.700077    PCI: 00:1c.4: enabled 0

  803 17:32:46.702876    PCI: 00:1c.5: enabled 0

  804 17:32:46.703307    PCI: 00:1c.6: enabled 0

  805 17:32:46.706690    PCI: 00:1c.7: enabled 0

  806 17:32:46.710131    PCI: 00:1d.0: enabled 1

  807 17:32:46.713097    PCI: 00:1d.1: enabled 0

  808 17:32:46.716182    PCI: 00:1d.2: enabled 0

  809 17:32:46.716615    PCI: 00:1d.3: enabled 0

  810 17:32:46.719630    PCI: 00:1d.4: enabled 0

  811 17:32:46.723071    PCI: 00:1d.5: enabled 1

  812 17:32:46.726492     PCI: 00:00.0: enabled 1

  813 17:32:46.729233    PCI: 00:1e.0: enabled 1

  814 17:32:46.729665    PCI: 00:1e.1: enabled 0

  815 17:32:46.732690    PCI: 00:1e.2: enabled 1

  816 17:32:46.736342     SPI: 00: enabled 1

  817 17:32:46.739282    PCI: 00:1e.3: enabled 1

  818 17:32:46.739746     SPI: 01: enabled 1

  819 17:32:46.742940    PCI: 00:1f.0: enabled 1

  820 17:32:46.746374     PNP: 0c09.0: enabled 1

  821 17:32:46.749679    PCI: 00:1f.1: enabled 1

  822 17:32:46.750228    PCI: 00:1f.2: enabled 1

  823 17:32:46.752931    PCI: 00:1f.3: enabled 1

  824 17:32:46.756178    PCI: 00:1f.4: enabled 1

  825 17:32:46.759018    PCI: 00:1f.5: enabled 1

  826 17:32:46.762972    PCI: 00:1f.6: enabled 0

  827 17:32:46.763406  Root Device scanning...

  828 17:32:46.766096  scan_static_bus for Root Device

  829 17:32:46.769053  CPU_CLUSTER: 0 enabled

  830 17:32:46.772601  DOMAIN: 0000 enabled

  831 17:32:46.775818  DOMAIN: 0000 scanning...

  832 17:32:46.776250  PCI: pci_scan_bus for bus 00

  833 17:32:46.779171  PCI: 00:00.0 [8086/0000] ops

  834 17:32:46.782564  PCI: 00:00.0 [8086/9b61] enabled

  835 17:32:46.785888  PCI: 00:02.0 [8086/0000] bus ops

  836 17:32:46.789077  PCI: 00:02.0 [8086/9b41] enabled

  837 17:32:46.792354  PCI: 00:04.0 [8086/1903] disabled

  838 17:32:46.795734  PCI: 00:08.0 [8086/1911] enabled

  839 17:32:46.799070  PCI: 00:12.0 [8086/02f9] enabled

  840 17:32:46.802724  PCI: 00:14.0 [8086/0000] bus ops

  841 17:32:46.806171  PCI: 00:14.0 [8086/02ed] enabled

  842 17:32:46.809171  PCI: 00:14.2 [8086/02ef] enabled

  843 17:32:46.812534  PCI: 00:14.3 [8086/02f0] enabled

  844 17:32:46.815933  PCI: 00:15.0 [8086/0000] bus ops

  845 17:32:46.819568  PCI: 00:15.0 [8086/02e8] enabled

  846 17:32:46.822942  PCI: 00:15.1 [8086/0000] bus ops

  847 17:32:46.826098  PCI: 00:15.1 [8086/02e9] enabled

  848 17:32:46.828813  PCI: 00:16.0 [8086/0000] ops

  849 17:32:46.832370  PCI: 00:16.0 [8086/02e0] enabled

  850 17:32:46.835741  PCI: 00:17.0 [8086/0000] ops

  851 17:32:46.839527  PCI: 00:17.0 [8086/02d3] enabled

  852 17:32:46.842323  PCI: 00:19.0 [8086/0000] bus ops

  853 17:32:46.846144  PCI: 00:19.0 [8086/02c5] enabled

  854 17:32:46.848874  PCI: 00:1d.0 [8086/0000] bus ops

  855 17:32:46.852773  PCI: 00:1d.0 [8086/02b0] enabled

  856 17:32:46.859124  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  857 17:32:46.862182  PCI: 00:1e.0 [8086/0000] ops

  858 17:32:46.865661  PCI: 00:1e.0 [8086/02a8] enabled

  859 17:32:46.869255  PCI: 00:1e.2 [8086/0000] bus ops

  860 17:32:46.872039  PCI: 00:1e.2 [8086/02aa] enabled

  861 17:32:46.875739  PCI: 00:1e.3 [8086/0000] bus ops

  862 17:32:46.879533  PCI: 00:1e.3 [8086/02ab] enabled

  863 17:32:46.882346  PCI: 00:1f.0 [8086/0000] bus ops

  864 17:32:46.885238  PCI: 00:1f.0 [8086/0284] enabled

  865 17:32:46.892069  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  866 17:32:46.895331  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  867 17:32:46.898916  PCI: 00:1f.3 [8086/0000] bus ops

  868 17:32:46.902283  PCI: 00:1f.3 [8086/02c8] enabled

  869 17:32:46.905824  PCI: 00:1f.4 [8086/0000] bus ops

  870 17:32:46.908665  PCI: 00:1f.4 [8086/02a3] enabled

  871 17:32:46.911766  PCI: 00:1f.5 [8086/0000] bus ops

  872 17:32:46.915328  PCI: 00:1f.5 [8086/02a4] enabled

  873 17:32:46.918390  PCI: Leftover static devices:

  874 17:32:46.922024  PCI: 00:05.0

  875 17:32:46.922568  PCI: 00:12.5

  876 17:32:46.922918  PCI: 00:12.6

  877 17:32:46.925060  PCI: 00:14.1

  878 17:32:46.925491  PCI: 00:14.5

  879 17:32:46.928420  PCI: 00:15.2

  880 17:32:46.928973  PCI: 00:15.3

  881 17:32:46.929326  PCI: 00:16.1

  882 17:32:46.931782  PCI: 00:16.2

  883 17:32:46.932214  PCI: 00:16.3

  884 17:32:46.935115  PCI: 00:16.4

  885 17:32:46.935543  PCI: 00:16.5

  886 17:32:46.938368  PCI: 00:19.1

  887 17:32:46.938800  PCI: 00:19.2

  888 17:32:46.939141  PCI: 00:1a.0

  889 17:32:46.941504  PCI: 00:1c.0

  890 17:32:46.941937  PCI: 00:1c.1

  891 17:32:46.945249  PCI: 00:1c.2

  892 17:32:46.945705  PCI: 00:1c.3

  893 17:32:46.946070  PCI: 00:1c.4

  894 17:32:46.948102  PCI: 00:1c.5

  895 17:32:46.948534  PCI: 00:1c.6

  896 17:32:46.951733  PCI: 00:1c.7

  897 17:32:46.952182  PCI: 00:1d.1

  898 17:32:46.952549  PCI: 00:1d.2

  899 17:32:46.955341  PCI: 00:1d.3

  900 17:32:46.955831  PCI: 00:1d.4

  901 17:32:46.958527  PCI: 00:1d.5

  902 17:32:46.958972  PCI: 00:1e.1

  903 17:32:46.961404  PCI: 00:1f.1

  904 17:32:46.961836  PCI: 00:1f.2

  905 17:32:46.962360  PCI: 00:1f.6

  906 17:32:46.965032  PCI: Check your devicetree.cb.

  907 17:32:46.968170  PCI: 00:02.0 scanning...

  908 17:32:46.971458  scan_generic_bus for PCI: 00:02.0

  909 17:32:46.974707  scan_generic_bus for PCI: 00:02.0 done

  910 17:32:46.981839  scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs

  911 17:32:46.984735  PCI: 00:14.0 scanning...

  912 17:32:46.988441  scan_static_bus for PCI: 00:14.0

  913 17:32:46.988874  USB0 port 0 enabled

  914 17:32:46.991223  USB0 port 0 scanning...

  915 17:32:46.994817  scan_static_bus for USB0 port 0

  916 17:32:46.998104  USB2 port 0 enabled

  917 17:32:46.998537  USB2 port 1 enabled

  918 17:32:47.002052  USB2 port 2 disabled

  919 17:32:47.004687  USB2 port 3 disabled

  920 17:32:47.005131  USB2 port 5 disabled

  921 17:32:47.007963  USB2 port 6 enabled

  922 17:32:47.011326  USB2 port 9 enabled

  923 17:32:47.011788  USB3 port 0 enabled

  924 17:32:47.014960  USB3 port 1 enabled

  925 17:32:47.018008  USB3 port 2 enabled

  926 17:32:47.018439  USB3 port 3 enabled

  927 17:32:47.021170  USB3 port 4 disabled

  928 17:32:47.024782  USB2 port 0 scanning...

  929 17:32:47.027799  scan_static_bus for USB2 port 0

  930 17:32:47.031028  scan_static_bus for USB2 port 0 done

  931 17:32:47.034319  scan_bus: scanning of bus USB2 port 0 took 9702 usecs

  932 17:32:47.037758  USB2 port 1 scanning...

  933 17:32:47.040978  scan_static_bus for USB2 port 1

  934 17:32:47.044152  scan_static_bus for USB2 port 1 done

  935 17:32:47.051285  scan_bus: scanning of bus USB2 port 1 took 9701 usecs

  936 17:32:47.054535  USB2 port 6 scanning...

  937 17:32:47.058099  scan_static_bus for USB2 port 6

  938 17:32:47.060905  scan_static_bus for USB2 port 6 done

  939 17:32:47.064536  scan_bus: scanning of bus USB2 port 6 took 9695 usecs

  940 17:32:47.067591  USB2 port 9 scanning...

  941 17:32:47.071187  scan_static_bus for USB2 port 9

  942 17:32:47.074106  scan_static_bus for USB2 port 9 done

  943 17:32:47.081363  scan_bus: scanning of bus USB2 port 9 took 9704 usecs

  944 17:32:47.083999  USB3 port 0 scanning...

  945 17:32:47.087373  scan_static_bus for USB3 port 0

  946 17:32:47.090814  scan_static_bus for USB3 port 0 done

  947 17:32:47.093987  scan_bus: scanning of bus USB3 port 0 took 9697 usecs

  948 17:32:47.097781  USB3 port 1 scanning...

  949 17:32:47.101103  scan_static_bus for USB3 port 1

  950 17:32:47.104223  scan_static_bus for USB3 port 1 done

  951 17:32:47.110762  scan_bus: scanning of bus USB3 port 1 took 9708 usecs

  952 17:32:47.114318  USB3 port 2 scanning...

  953 17:32:47.117571  scan_static_bus for USB3 port 2

  954 17:32:47.120959  scan_static_bus for USB3 port 2 done

  955 17:32:47.124278  scan_bus: scanning of bus USB3 port 2 took 9703 usecs

  956 17:32:47.127521  USB3 port 3 scanning...

  957 17:32:47.130842  scan_static_bus for USB3 port 3

  958 17:32:47.134371  scan_static_bus for USB3 port 3 done

  959 17:32:47.140530  scan_bus: scanning of bus USB3 port 3 took 9688 usecs

  960 17:32:47.143814  scan_static_bus for USB0 port 0 done

  961 17:32:47.150468  scan_bus: scanning of bus USB0 port 0 took 155319 usecs

  962 17:32:47.154039  scan_static_bus for PCI: 00:14.0 done

  963 17:32:47.160832  scan_bus: scanning of bus PCI: 00:14.0 took 172932 usecs

  964 17:32:47.161265  PCI: 00:15.0 scanning...

  965 17:32:47.164222  scan_generic_bus for PCI: 00:15.0

  966 17:32:47.170465  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

  967 17:32:47.173841  scan_generic_bus for PCI: 00:15.0 done

  968 17:32:47.180349  scan_bus: scanning of bus PCI: 00:15.0 took 14296 usecs

  969 17:32:47.180749  PCI: 00:15.1 scanning...

  970 17:32:47.183798  scan_generic_bus for PCI: 00:15.1

  971 17:32:47.190429  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

  972 17:32:47.193418  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

  973 17:32:47.197255  scan_generic_bus for PCI: 00:15.1 done

  974 17:32:47.203918  scan_bus: scanning of bus PCI: 00:15.1 took 18612 usecs

  975 17:32:47.207024  PCI: 00:19.0 scanning...

  976 17:32:47.210082  scan_generic_bus for PCI: 00:19.0

  977 17:32:47.213451  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

  978 17:32:47.217031  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

  979 17:32:47.220477  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

  980 17:32:47.227058  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

  981 17:32:47.230279  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

  982 17:32:47.233076  scan_generic_bus for PCI: 00:19.0 done

  983 17:32:47.239704  scan_bus: scanning of bus PCI: 00:19.0 took 30715 usecs

  984 17:32:47.240105  PCI: 00:1d.0 scanning...

  985 17:32:47.246699  do_pci_scan_bridge for PCI: 00:1d.0

  986 17:32:47.247170  PCI: pci_scan_bus for bus 01

  987 17:32:47.250233  PCI: 01:00.0 [1c5c/1327] enabled

  988 17:32:47.257829  Enabling Common Clock Configuration

  989 17:32:47.260149  L1 Sub-State supported from root port 29

  990 17:32:47.263459  L1 Sub-State Support = 0xf

  991 17:32:47.266669  CommonModeRestoreTime = 0x28

  992 17:32:47.269945  Power On Value = 0x16, Power On Scale = 0x0

  993 17:32:47.270378  ASPM: Enabled L1

  994 17:32:47.276741  scan_bus: scanning of bus PCI: 00:1d.0 took 32780 usecs

  995 17:32:47.280096  PCI: 00:1e.2 scanning...

  996 17:32:47.283233  scan_generic_bus for PCI: 00:1e.2

  997 17:32:47.286629  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

  998 17:32:47.289861  scan_generic_bus for PCI: 00:1e.2 done

  999 17:32:47.296865  scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs

 1000 17:32:47.300055  PCI: 00:1e.3 scanning...

 1001 17:32:47.303711  scan_generic_bus for PCI: 00:1e.3

 1002 17:32:47.307151  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1003 17:32:47.309726  scan_generic_bus for PCI: 00:1e.3 done

 1004 17:32:47.317024  scan_bus: scanning of bus PCI: 00:1e.3 took 13997 usecs

 1005 17:32:47.320137  PCI: 00:1f.0 scanning...

 1006 17:32:47.323416  scan_static_bus for PCI: 00:1f.0

 1007 17:32:47.323934  PNP: 0c09.0 enabled

 1008 17:32:47.326571  scan_static_bus for PCI: 00:1f.0 done

 1009 17:32:47.333140  scan_bus: scanning of bus PCI: 00:1f.0 took 12063 usecs

 1010 17:32:47.336218  PCI: 00:1f.3 scanning...

 1011 17:32:47.343244  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1012 17:32:47.343817  PCI: 00:1f.4 scanning...

 1013 17:32:47.349770  scan_generic_bus for PCI: 00:1f.4

 1014 17:32:47.353019  scan_generic_bus for PCI: 00:1f.4 done

 1015 17:32:47.356355  scan_bus: scanning of bus PCI: 00:1f.4 took 10192 usecs

 1016 17:32:47.360006  PCI: 00:1f.5 scanning...

 1017 17:32:47.363208  scan_generic_bus for PCI: 00:1f.5

 1018 17:32:47.366728  scan_generic_bus for PCI: 00:1f.5 done

 1019 17:32:47.373367  scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs

 1020 17:32:47.379840  scan_bus: scanning of bus DOMAIN: 0000 took 604879 usecs

 1021 17:32:47.382909  scan_static_bus for Root Device done

 1022 17:32:47.389252  scan_bus: scanning of bus Root Device took 624756 usecs

 1023 17:32:47.389744  done

 1024 17:32:47.392627  Chrome EC: UHEPI supported

 1025 17:32:47.399087  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1026 17:32:47.403129  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1027 17:32:47.409547  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1028 17:32:47.416342  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1029 17:32:47.420183  SPI flash protection: WPSW=0 SRP0=0

 1030 17:32:47.426849  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1031 17:32:47.429935  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1032 17:32:47.433591  found VGA at PCI: 00:02.0

 1033 17:32:47.436735  Setting up VGA for PCI: 00:02.0

 1034 17:32:47.443349  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1035 17:32:47.446595  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1036 17:32:47.450413  Allocating resources...

 1037 17:32:47.453143  Reading resources...

 1038 17:32:47.456459  Root Device read_resources bus 0 link: 0

 1039 17:32:47.459866  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1040 17:32:47.466184  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1041 17:32:47.469301  DOMAIN: 0000 read_resources bus 0 link: 0

 1042 17:32:47.477110  PCI: 00:14.0 read_resources bus 0 link: 0

 1043 17:32:47.480060  USB0 port 0 read_resources bus 0 link: 0

 1044 17:32:47.488311  USB0 port 0 read_resources bus 0 link: 0 done

 1045 17:32:47.491313  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1046 17:32:47.499337  PCI: 00:15.0 read_resources bus 1 link: 0

 1047 17:32:47.502598  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1048 17:32:47.509316  PCI: 00:15.1 read_resources bus 2 link: 0

 1049 17:32:47.512366  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1050 17:32:47.519853  PCI: 00:19.0 read_resources bus 3 link: 0

 1051 17:32:47.526533  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1052 17:32:47.530291  PCI: 00:1d.0 read_resources bus 1 link: 0

 1053 17:32:47.536579  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1054 17:32:47.540288  PCI: 00:1e.2 read_resources bus 4 link: 0

 1055 17:32:47.546375  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1056 17:32:47.549912  PCI: 00:1e.3 read_resources bus 5 link: 0

 1057 17:32:47.556700  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1058 17:32:47.559773  PCI: 00:1f.0 read_resources bus 0 link: 0

 1059 17:32:47.566389  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1060 17:32:47.572806  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1061 17:32:47.576197  Root Device read_resources bus 0 link: 0 done

 1062 17:32:47.579416  Done reading resources.

 1063 17:32:47.582933  Show resources in subtree (Root Device)...After reading.

 1064 17:32:47.589131   Root Device child on link 0 CPU_CLUSTER: 0

 1065 17:32:47.592621    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1066 17:32:47.593040     APIC: 00

 1067 17:32:47.595792     APIC: 02

 1068 17:32:47.596228     APIC: 07

 1069 17:32:47.599571     APIC: 01

 1070 17:32:47.600130     APIC: 03

 1071 17:32:47.600472     APIC: 06

 1072 17:32:47.603202     APIC: 05

 1073 17:32:47.603799     APIC: 04

 1074 17:32:47.606066    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1075 17:32:47.658798    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1076 17:32:47.659515    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1077 17:32:47.660157     PCI: 00:00.0

 1078 17:32:47.661198     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1079 17:32:47.661825     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1080 17:32:47.662322     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1081 17:32:47.675713     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1082 17:32:47.679012     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1083 17:32:47.686050     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1084 17:32:47.692478     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1085 17:32:47.702016     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1086 17:32:47.712219     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1087 17:32:47.722070     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1088 17:32:47.731634     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1089 17:32:47.742261     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1090 17:32:47.748630     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1091 17:32:47.758259     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1092 17:32:47.768290     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1093 17:32:47.778621     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1094 17:32:47.779149     PCI: 00:02.0

 1095 17:32:47.791589     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1096 17:32:47.801813     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1097 17:32:47.808159     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1098 17:32:47.811223     PCI: 00:04.0

 1099 17:32:47.811679     PCI: 00:08.0

 1100 17:32:47.821546     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1101 17:32:47.824473     PCI: 00:12.0

 1102 17:32:47.834226     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1103 17:32:47.838182     PCI: 00:14.0 child on link 0 USB0 port 0

 1104 17:32:47.847171     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1105 17:32:47.850844      USB0 port 0 child on link 0 USB2 port 0

 1106 17:32:47.854718       USB2 port 0

 1107 17:32:47.855238       USB2 port 1

 1108 17:32:47.857594       USB2 port 2

 1109 17:32:47.858021       USB2 port 3

 1110 17:32:47.860729       USB2 port 5

 1111 17:32:47.863955       USB2 port 6

 1112 17:32:47.864377       USB2 port 9

 1113 17:32:47.867455       USB3 port 0

 1114 17:32:47.868045       USB3 port 1

 1115 17:32:47.870498       USB3 port 2

 1116 17:32:47.870917       USB3 port 3

 1117 17:32:47.874441       USB3 port 4

 1118 17:32:47.874968     PCI: 00:14.2

 1119 17:32:47.884008     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1120 17:32:47.894342     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1121 17:32:47.897404     PCI: 00:14.3

 1122 17:32:47.907098     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1123 17:32:47.910411     PCI: 00:15.0 child on link 0 I2C: 01:15

 1124 17:32:47.920360     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1125 17:32:47.920870      I2C: 01:15

 1126 17:32:47.927180     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1127 17:32:47.936949     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1128 17:32:47.937473      I2C: 02:5d

 1129 17:32:47.940362      GENERIC: 0.0

 1130 17:32:47.940876     PCI: 00:16.0

 1131 17:32:47.950554     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1132 17:32:47.953797     PCI: 00:17.0

 1133 17:32:47.963128     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1134 17:32:47.970132     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1135 17:32:47.979937     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1136 17:32:47.986458     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1137 17:32:47.996566     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1138 17:32:48.003524     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1139 17:32:48.009307     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1140 17:32:48.019802     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1141 17:32:48.020323      I2C: 03:1a

 1142 17:32:48.023231      I2C: 03:38

 1143 17:32:48.023795      I2C: 03:39

 1144 17:32:48.026340      I2C: 03:3a

 1145 17:32:48.026868      I2C: 03:3b

 1146 17:32:48.029858     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1147 17:32:48.039511     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1148 17:32:48.049454     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1149 17:32:48.059429     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1150 17:32:48.059897      PCI: 01:00.0

 1151 17:32:48.069118      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1152 17:32:48.072358     PCI: 00:1e.0

 1153 17:32:48.083059     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1154 17:32:48.092159     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1155 17:32:48.095721     PCI: 00:1e.2 child on link 0 SPI: 00

 1156 17:32:48.105963     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1157 17:32:48.108791      SPI: 00

 1158 17:32:48.112411     PCI: 00:1e.3 child on link 0 SPI: 01

 1159 17:32:48.122363     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1160 17:32:48.122886      SPI: 01

 1161 17:32:48.128947     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1162 17:32:48.135709     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1163 17:32:48.145554     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1164 17:32:48.146074      PNP: 0c09.0

 1165 17:32:48.155849      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1166 17:32:48.158497     PCI: 00:1f.3

 1167 17:32:48.168362     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1168 17:32:48.178535     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1169 17:32:48.179056     PCI: 00:1f.4

 1170 17:32:48.188250     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1171 17:32:48.198269     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1172 17:32:48.198702     PCI: 00:1f.5

 1173 17:32:48.208380     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1174 17:32:48.214540  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1175 17:32:48.221592  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1176 17:32:48.228081  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1177 17:32:48.231603  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1178 17:32:48.234992  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1179 17:32:48.237975  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1180 17:32:48.241287  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1181 17:32:48.248246  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1182 17:32:48.254931  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1183 17:32:48.264772  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1184 17:32:48.271316  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1185 17:32:48.277738  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1186 17:32:48.284528  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1187 17:32:48.291173  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1188 17:32:48.294082  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1189 17:32:48.300855  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1190 17:32:48.304250  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1191 17:32:48.310569  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1192 17:32:48.313756  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1193 17:32:48.320402  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1194 17:32:48.324392  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1195 17:32:48.330860  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1196 17:32:48.333746  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1197 17:32:48.340520  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1198 17:32:48.343988  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1199 17:32:48.350474  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1200 17:32:48.354108  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1201 17:32:48.357416  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1202 17:32:48.363767  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1203 17:32:48.367500  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1204 17:32:48.373487  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1205 17:32:48.376589  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1206 17:32:48.383381  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1207 17:32:48.386365  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1208 17:32:48.393367  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1209 17:32:48.396389  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1210 17:32:48.403064  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1211 17:32:48.409557  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1212 17:32:48.412822  avoid_fixed_resources: DOMAIN: 0000

 1213 17:32:48.419766  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1214 17:32:48.426638  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1215 17:32:48.432550  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1216 17:32:48.443183  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1217 17:32:48.449381  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1218 17:32:48.456171  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1219 17:32:48.465553  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1220 17:32:48.472151  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1221 17:32:48.479049  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1222 17:32:48.488853  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1223 17:32:48.495546  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1224 17:32:48.502577  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1225 17:32:48.505919  Setting resources...

 1226 17:32:48.508642  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1227 17:32:48.515028  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1228 17:32:48.518709  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1229 17:32:48.521985  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1230 17:32:48.525638  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1231 17:32:48.532028  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1232 17:32:48.538848  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1233 17:32:48.544850  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1234 17:32:48.551979  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1235 17:32:48.558486  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1236 17:32:48.561593  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1237 17:32:48.568258  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1238 17:32:48.571915  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1239 17:32:48.578577  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1240 17:32:48.582101  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1241 17:32:48.588361  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1242 17:32:48.591691  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1243 17:32:48.598218  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1244 17:32:48.601545  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1245 17:32:48.608031  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1246 17:32:48.611443  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1247 17:32:48.614838  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1248 17:32:48.621182  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1249 17:32:48.624651  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1250 17:32:48.631485  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1251 17:32:48.634734  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1252 17:32:48.640897  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1253 17:32:48.644222  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1254 17:32:48.651118  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1255 17:32:48.653980  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1256 17:32:48.660875  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1257 17:32:48.664483  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1258 17:32:48.671031  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1259 17:32:48.680891  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1260 17:32:48.687152  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1261 17:32:48.693811  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1262 17:32:48.700489  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1263 17:32:48.707159  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1264 17:32:48.710493  Root Device assign_resources, bus 0 link: 0

 1265 17:32:48.717302  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1266 17:32:48.723721  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1267 17:32:48.733886  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1268 17:32:48.740233  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1269 17:32:48.750197  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1270 17:32:48.756943  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1271 17:32:48.767235  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1272 17:32:48.770049  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1273 17:32:48.773725  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1274 17:32:48.783443  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1275 17:32:48.789926  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1276 17:32:48.799780  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1277 17:32:48.806326  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1278 17:32:48.812953  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1279 17:32:48.816401  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1280 17:32:48.826403  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1281 17:32:48.829655  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1282 17:32:48.833143  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1283 17:32:48.842832  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1284 17:32:48.849637  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1285 17:32:48.859586  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1286 17:32:48.865980  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1287 17:32:48.872548  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1288 17:32:48.882849  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1289 17:32:48.889505  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1290 17:32:48.896092  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1291 17:32:48.902328  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1292 17:32:48.905996  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1293 17:32:48.915586  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1294 17:32:48.925852  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1295 17:32:48.932371  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1296 17:32:48.935633  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1297 17:32:48.945654  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1298 17:32:48.949078  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1299 17:32:48.959371  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1300 17:32:48.965395  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1301 17:32:48.972330  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1302 17:32:48.975719  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1303 17:32:48.985228  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1304 17:32:48.988792  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1305 17:32:48.991856  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1306 17:32:48.998442  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1307 17:32:49.001838  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1308 17:32:49.008486  LPC: Trying to open IO window from 800 size 1ff

 1309 17:32:49.015356  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1310 17:32:49.025097  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1311 17:32:49.032111  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1312 17:32:49.042040  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1313 17:32:49.045610  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1314 17:32:49.052215  Root Device assign_resources, bus 0 link: 0

 1315 17:32:49.052652  Done setting resources.

 1316 17:32:49.058198  Show resources in subtree (Root Device)...After assigning values.

 1317 17:32:49.065252   Root Device child on link 0 CPU_CLUSTER: 0

 1318 17:32:49.068667    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1319 17:32:49.069244     APIC: 00

 1320 17:32:49.071977     APIC: 02

 1321 17:32:49.072524     APIC: 07

 1322 17:32:49.073072     APIC: 01

 1323 17:32:49.075210     APIC: 03

 1324 17:32:49.075798     APIC: 06

 1325 17:32:49.078525     APIC: 05

 1326 17:32:49.078971     APIC: 04

 1327 17:32:49.081858    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1328 17:32:49.091766    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1329 17:32:49.101430    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1330 17:32:49.105194     PCI: 00:00.0

 1331 17:32:49.114877     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1332 17:32:49.124663     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1333 17:32:49.134398     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1334 17:32:49.141642     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1335 17:32:49.151151     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1336 17:32:49.160897     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1337 17:32:49.170791     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1338 17:32:49.180621     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1339 17:32:49.190218     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1340 17:32:49.196635     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1341 17:32:49.206738     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1342 17:32:49.216734     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1343 17:32:49.226099     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1344 17:32:49.236533     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1345 17:32:49.246045     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1346 17:32:49.252665     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1347 17:32:49.256666     PCI: 00:02.0

 1348 17:32:49.266075     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1349 17:32:49.275794     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1350 17:32:49.285749     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1351 17:32:49.289065     PCI: 00:04.0

 1352 17:32:49.289139     PCI: 00:08.0

 1353 17:32:49.299034     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1354 17:32:49.302353     PCI: 00:12.0

 1355 17:32:49.312223     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1356 17:32:49.315198     PCI: 00:14.0 child on link 0 USB0 port 0

 1357 17:32:49.325359     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1358 17:32:49.331607      USB0 port 0 child on link 0 USB2 port 0

 1359 17:32:49.331748       USB2 port 0

 1360 17:32:49.334913       USB2 port 1

 1361 17:32:49.335013       USB2 port 2

 1362 17:32:49.338196       USB2 port 3

 1363 17:32:49.338269       USB2 port 5

 1364 17:32:49.341498       USB2 port 6

 1365 17:32:49.341599       USB2 port 9

 1366 17:32:49.345357       USB3 port 0

 1367 17:32:49.348548       USB3 port 1

 1368 17:32:49.348623       USB3 port 2

 1369 17:32:49.351791       USB3 port 3

 1370 17:32:49.351865       USB3 port 4

 1371 17:32:49.354934     PCI: 00:14.2

 1372 17:32:49.364957     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1373 17:32:49.374872     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1374 17:32:49.374949     PCI: 00:14.3

 1375 17:32:49.384493     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1376 17:32:49.391575     PCI: 00:15.0 child on link 0 I2C: 01:15

 1377 17:32:49.400956     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1378 17:32:49.401058      I2C: 01:15

 1379 17:32:49.407635     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1380 17:32:49.417920     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1381 17:32:49.417999      I2C: 02:5d

 1382 17:32:49.421066      GENERIC: 0.0

 1383 17:32:49.421138     PCI: 00:16.0

 1384 17:32:49.431287     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1385 17:32:49.434447     PCI: 00:17.0

 1386 17:32:49.444269     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1387 17:32:49.453995     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1388 17:32:49.464266     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1389 17:32:49.474159     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1390 17:32:49.480778     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1391 17:32:49.490779     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1392 17:32:49.496885     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1393 17:32:49.506953     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1394 17:32:49.507044      I2C: 03:1a

 1395 17:32:49.510148      I2C: 03:38

 1396 17:32:49.510247      I2C: 03:39

 1397 17:32:49.513827      I2C: 03:3a

 1398 17:32:49.513934      I2C: 03:3b

 1399 17:32:49.520286     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1400 17:32:49.526804     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1401 17:32:49.536840     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1402 17:32:49.549961     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1403 17:32:49.550042      PCI: 01:00.0

 1404 17:32:49.560121      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1405 17:32:49.563709     PCI: 00:1e.0

 1406 17:32:49.573084     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1407 17:32:49.583094     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1408 17:32:49.586385     PCI: 00:1e.2 child on link 0 SPI: 00

 1409 17:32:49.596184     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1410 17:32:49.599552      SPI: 00

 1411 17:32:49.603182     PCI: 00:1e.3 child on link 0 SPI: 01

 1412 17:32:49.612834     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1413 17:32:49.616223      SPI: 01

 1414 17:32:49.619382     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1415 17:32:49.629549     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1416 17:32:49.636107     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1417 17:32:49.639107      PNP: 0c09.0

 1418 17:32:49.645663      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1419 17:32:49.649026     PCI: 00:1f.3

 1420 17:32:49.659253     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1421 17:32:49.668881     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1422 17:32:49.672098     PCI: 00:1f.4

 1423 17:32:49.678722     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1424 17:32:49.692263     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1425 17:32:49.692342     PCI: 00:1f.5

 1426 17:32:49.702290     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1427 17:32:49.705067  Done allocating resources.

 1428 17:32:49.711584  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1429 17:32:49.711727  Enabling resources...

 1430 17:32:49.719230  PCI: 00:00.0 subsystem <- 8086/9b61

 1431 17:32:49.719312  PCI: 00:00.0 cmd <- 06

 1432 17:32:49.722727  PCI: 00:02.0 subsystem <- 8086/9b41

 1433 17:32:49.725999  PCI: 00:02.0 cmd <- 03

 1434 17:32:49.729099  PCI: 00:08.0 cmd <- 06

 1435 17:32:49.732731  PCI: 00:12.0 subsystem <- 8086/02f9

 1436 17:32:49.736159  PCI: 00:12.0 cmd <- 02

 1437 17:32:49.738999  PCI: 00:14.0 subsystem <- 8086/02ed

 1438 17:32:49.742260  PCI: 00:14.0 cmd <- 02

 1439 17:32:49.746080  PCI: 00:14.2 cmd <- 02

 1440 17:32:49.749135  PCI: 00:14.3 subsystem <- 8086/02f0

 1441 17:32:49.749243  PCI: 00:14.3 cmd <- 02

 1442 17:32:49.755719  PCI: 00:15.0 subsystem <- 8086/02e8

 1443 17:32:49.755811  PCI: 00:15.0 cmd <- 02

 1444 17:32:49.758974  PCI: 00:15.1 subsystem <- 8086/02e9

 1445 17:32:49.762289  PCI: 00:15.1 cmd <- 02

 1446 17:32:49.765502  PCI: 00:16.0 subsystem <- 8086/02e0

 1447 17:32:49.769125  PCI: 00:16.0 cmd <- 02

 1448 17:32:49.772232  PCI: 00:17.0 subsystem <- 8086/02d3

 1449 17:32:49.775498  PCI: 00:17.0 cmd <- 03

 1450 17:32:49.778720  PCI: 00:19.0 subsystem <- 8086/02c5

 1451 17:32:49.782476  PCI: 00:19.0 cmd <- 02

 1452 17:32:49.785708  PCI: 00:1d.0 bridge ctrl <- 0013

 1453 17:32:49.788779  PCI: 00:1d.0 subsystem <- 8086/02b0

 1454 17:32:49.792224  PCI: 00:1d.0 cmd <- 06

 1455 17:32:49.795917  PCI: 00:1e.0 subsystem <- 8086/02a8

 1456 17:32:49.798580  PCI: 00:1e.0 cmd <- 06

 1457 17:32:49.801862  PCI: 00:1e.2 subsystem <- 8086/02aa

 1458 17:32:49.805253  PCI: 00:1e.2 cmd <- 06

 1459 17:32:49.808618  PCI: 00:1e.3 subsystem <- 8086/02ab

 1460 17:32:49.808691  PCI: 00:1e.3 cmd <- 02

 1461 17:32:49.815712  PCI: 00:1f.0 subsystem <- 8086/0284

 1462 17:32:49.815790  PCI: 00:1f.0 cmd <- 407

 1463 17:32:49.822303  PCI: 00:1f.3 subsystem <- 8086/02c8

 1464 17:32:49.822402  PCI: 00:1f.3 cmd <- 02

 1465 17:32:49.825665  PCI: 00:1f.4 subsystem <- 8086/02a3

 1466 17:32:49.828838  PCI: 00:1f.4 cmd <- 03

 1467 17:32:49.831956  PCI: 00:1f.5 subsystem <- 8086/02a4

 1468 17:32:49.835424  PCI: 00:1f.5 cmd <- 406

 1469 17:32:49.844143  PCI: 01:00.0 cmd <- 02

 1470 17:32:49.849332  done.

 1471 17:32:49.862925  ME: Version: 14.0.39.1367

 1472 17:32:49.869368  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12

 1473 17:32:49.872895  Initializing devices...

 1474 17:32:49.872997  Root Device init ...

 1475 17:32:49.879454  Chrome EC: Set SMI mask to 0x0000000000000000

 1476 17:32:49.882702  Chrome EC: clear events_b mask to 0x0000000000000000

 1477 17:32:49.889185  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1478 17:32:49.895750  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1479 17:32:49.902450  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1480 17:32:49.905944  Chrome EC: Set WAKE mask to 0x0000000000000000

 1481 17:32:49.909039  Root Device init finished in 35177 usecs

 1482 17:32:49.912415  CPU_CLUSTER: 0 init ...

 1483 17:32:49.918903  CPU_CLUSTER: 0 init finished in 2448 usecs

 1484 17:32:49.923576  PCI: 00:00.0 init ...

 1485 17:32:49.926426  CPU TDP: 15 Watts

 1486 17:32:49.929806  CPU PL2 = 64 Watts

 1487 17:32:49.933142  PCI: 00:00.0 init finished in 7079 usecs

 1488 17:32:49.936460  PCI: 00:02.0 init ...

 1489 17:32:49.939838  PCI: 00:02.0 init finished in 2253 usecs

 1490 17:32:49.943051  PCI: 00:08.0 init ...

 1491 17:32:49.946723  PCI: 00:08.0 init finished in 2251 usecs

 1492 17:32:49.949684  PCI: 00:12.0 init ...

 1493 17:32:49.953200  PCI: 00:12.0 init finished in 2252 usecs

 1494 17:32:49.956432  PCI: 00:14.0 init ...

 1495 17:32:49.959929  PCI: 00:14.0 init finished in 2251 usecs

 1496 17:32:49.963147  PCI: 00:14.2 init ...

 1497 17:32:49.966374  PCI: 00:14.2 init finished in 2251 usecs

 1498 17:32:49.969565  PCI: 00:14.3 init ...

 1499 17:32:49.973144  PCI: 00:14.3 init finished in 2270 usecs

 1500 17:32:49.976151  PCI: 00:15.0 init ...

 1501 17:32:49.979831  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1502 17:32:49.983298  PCI: 00:15.0 init finished in 5969 usecs

 1503 17:32:49.986225  PCI: 00:15.1 init ...

 1504 17:32:49.989848  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1505 17:32:49.993035  PCI: 00:15.1 init finished in 5968 usecs

 1506 17:32:49.997015  PCI: 00:16.0 init ...

 1507 17:32:49.999632  PCI: 00:16.0 init finished in 2243 usecs

 1508 17:32:50.003540  PCI: 00:19.0 init ...

 1509 17:32:50.006939  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1510 17:32:50.013957  PCI: 00:19.0 init finished in 5974 usecs

 1511 17:32:50.014059  PCI: 00:1d.0 init ...

 1512 17:32:50.016859  Initializing PCH PCIe bridge.

 1513 17:32:50.020229  PCI: 00:1d.0 init finished in 5285 usecs

 1514 17:32:50.025414  PCI: 00:1f.0 init ...

 1515 17:32:50.028730  IOAPIC: Initializing IOAPIC at 0xfec00000

 1516 17:32:50.035398  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1517 17:32:50.035502  IOAPIC: ID = 0x02

 1518 17:32:50.038732  IOAPIC: Dumping registers

 1519 17:32:50.042042    reg 0x0000: 0x02000000

 1520 17:32:50.045329    reg 0x0001: 0x00770020

 1521 17:32:50.045401    reg 0x0002: 0x00000000

 1522 17:32:50.052082  PCI: 00:1f.0 init finished in 23537 usecs

 1523 17:32:50.055205  PCI: 00:1f.4 init ...

 1524 17:32:50.058611  PCI: 00:1f.4 init finished in 2263 usecs

 1525 17:32:50.069333  PCI: 01:00.0 init ...

 1526 17:32:50.072693  PCI: 01:00.0 init finished in 2244 usecs

 1527 17:32:50.077089  PNP: 0c09.0 init ...

 1528 17:32:50.080536  Google Chrome EC uptime: 11.097 seconds

 1529 17:32:50.086983  Google Chrome AP resets since EC boot: 0

 1530 17:32:50.090527  Google Chrome most recent AP reset causes:

 1531 17:32:50.096653  Google Chrome EC reset flags at last EC boot: reset-pin

 1532 17:32:50.099937  PNP: 0c09.0 init finished in 20607 usecs

 1533 17:32:50.103529  Devices initialized

 1534 17:32:50.106858  Show all devs... After init.

 1535 17:32:50.106936  Root Device: enabled 1

 1536 17:32:50.110191  CPU_CLUSTER: 0: enabled 1

 1537 17:32:50.113754  DOMAIN: 0000: enabled 1

 1538 17:32:50.113856  APIC: 00: enabled 1

 1539 17:32:50.117148  PCI: 00:00.0: enabled 1

 1540 17:32:50.119753  PCI: 00:02.0: enabled 1

 1541 17:32:50.123681  PCI: 00:04.0: enabled 0

 1542 17:32:50.123755  PCI: 00:05.0: enabled 0

 1543 17:32:50.126796  PCI: 00:12.0: enabled 1

 1544 17:32:50.129790  PCI: 00:12.5: enabled 0

 1545 17:32:50.133179  PCI: 00:12.6: enabled 0

 1546 17:32:50.133279  PCI: 00:14.0: enabled 1

 1547 17:32:50.136624  PCI: 00:14.1: enabled 0

 1548 17:32:50.139826  PCI: 00:14.3: enabled 1

 1549 17:32:50.139902  PCI: 00:14.5: enabled 0

 1550 17:32:50.143105  PCI: 00:15.0: enabled 1

 1551 17:32:50.146502  PCI: 00:15.1: enabled 1

 1552 17:32:50.149907  PCI: 00:15.2: enabled 0

 1553 17:32:50.149981  PCI: 00:15.3: enabled 0

 1554 17:32:50.153103  PCI: 00:16.0: enabled 1

 1555 17:32:50.156432  PCI: 00:16.1: enabled 0

 1556 17:32:50.159561  PCI: 00:16.2: enabled 0

 1557 17:32:50.159699  PCI: 00:16.3: enabled 0

 1558 17:32:50.162853  PCI: 00:16.4: enabled 0

 1559 17:32:50.166273  PCI: 00:16.5: enabled 0

 1560 17:32:50.169570  PCI: 00:17.0: enabled 1

 1561 17:32:50.169648  PCI: 00:19.0: enabled 1

 1562 17:32:50.172943  PCI: 00:19.1: enabled 0

 1563 17:32:50.176164  PCI: 00:19.2: enabled 0

 1564 17:32:50.176238  PCI: 00:1a.0: enabled 0

 1565 17:32:50.179340  PCI: 00:1c.0: enabled 0

 1566 17:32:50.183066  PCI: 00:1c.1: enabled 0

 1567 17:32:50.186428  PCI: 00:1c.2: enabled 0

 1568 17:32:50.186526  PCI: 00:1c.3: enabled 0

 1569 17:32:50.189528  PCI: 00:1c.4: enabled 0

 1570 17:32:50.192532  PCI: 00:1c.5: enabled 0

 1571 17:32:50.196104  PCI: 00:1c.6: enabled 0

 1572 17:32:50.196196  PCI: 00:1c.7: enabled 0

 1573 17:32:50.199357  PCI: 00:1d.0: enabled 1

 1574 17:32:50.202401  PCI: 00:1d.1: enabled 0

 1575 17:32:50.206193  PCI: 00:1d.2: enabled 0

 1576 17:32:50.206299  PCI: 00:1d.3: enabled 0

 1577 17:32:50.209409  PCI: 00:1d.4: enabled 0

 1578 17:32:50.212293  PCI: 00:1d.5: enabled 0

 1579 17:32:50.215927  PCI: 00:1e.0: enabled 1

 1580 17:32:50.215999  PCI: 00:1e.1: enabled 0

 1581 17:32:50.219399  PCI: 00:1e.2: enabled 1

 1582 17:32:50.222373  PCI: 00:1e.3: enabled 1

 1583 17:32:50.222466  PCI: 00:1f.0: enabled 1

 1584 17:32:50.225560  PCI: 00:1f.1: enabled 0

 1585 17:32:50.229087  PCI: 00:1f.2: enabled 0

 1586 17:32:50.232291  PCI: 00:1f.3: enabled 1

 1587 17:32:50.232373  PCI: 00:1f.4: enabled 1

 1588 17:32:50.235564  PCI: 00:1f.5: enabled 1

 1589 17:32:50.239297  PCI: 00:1f.6: enabled 0

 1590 17:32:50.242342  USB0 port 0: enabled 1

 1591 17:32:50.242440  I2C: 01:15: enabled 1

 1592 17:32:50.245419  I2C: 02:5d: enabled 1

 1593 17:32:50.249084  GENERIC: 0.0: enabled 1

 1594 17:32:50.249167  I2C: 03:1a: enabled 1

 1595 17:32:50.252072  I2C: 03:38: enabled 1

 1596 17:32:50.255480  I2C: 03:39: enabled 1

 1597 17:32:50.255592  I2C: 03:3a: enabled 1

 1598 17:32:50.258807  I2C: 03:3b: enabled 1

 1599 17:32:50.261978  PCI: 00:00.0: enabled 1

 1600 17:32:50.262084  SPI: 00: enabled 1

 1601 17:32:50.265970  SPI: 01: enabled 1

 1602 17:32:50.268622  PNP: 0c09.0: enabled 1

 1603 17:32:50.268694  USB2 port 0: enabled 1

 1604 17:32:50.272018  USB2 port 1: enabled 1

 1605 17:32:50.275235  USB2 port 2: enabled 0

 1606 17:32:50.275338  USB2 port 3: enabled 0

 1607 17:32:50.278552  USB2 port 5: enabled 0

 1608 17:32:50.282405  USB2 port 6: enabled 1

 1609 17:32:50.285573  USB2 port 9: enabled 1

 1610 17:32:50.285643  USB3 port 0: enabled 1

 1611 17:32:50.288780  USB3 port 1: enabled 1

 1612 17:32:50.291821  USB3 port 2: enabled 1

 1613 17:32:50.291889  USB3 port 3: enabled 1

 1614 17:32:50.295029  USB3 port 4: enabled 0

 1615 17:32:50.298393  APIC: 02: enabled 1

 1616 17:32:50.298489  APIC: 07: enabled 1

 1617 17:32:50.302131  APIC: 01: enabled 1

 1618 17:32:50.305225  APIC: 03: enabled 1

 1619 17:32:50.305299  APIC: 06: enabled 1

 1620 17:32:50.308720  APIC: 05: enabled 1

 1621 17:32:50.308822  APIC: 04: enabled 1

 1622 17:32:50.311627  PCI: 00:08.0: enabled 1

 1623 17:32:50.315248  PCI: 00:14.2: enabled 1

 1624 17:32:50.318405  PCI: 01:00.0: enabled 1

 1625 17:32:50.322375  Disabling ACPI via APMC:

 1626 17:32:50.322472  done.

 1627 17:32:50.328942  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1628 17:32:50.331903  ELOG: NV offset 0xaf0000 size 0x4000

 1629 17:32:50.338588  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1630 17:32:50.344822  ELOG: Event(17) added with size 13 at 2023-10-02 17:31:18 UTC

 1631 17:32:50.351992  POST: Unexpected post code in previous boot: 0x73

 1632 17:32:50.358278  ELOG: Event(A3) added with size 11 at 2023-10-02 17:31:18 UTC

 1633 17:32:50.364765  ELOG: Event(A6) added with size 13 at 2023-10-02 17:31:18 UTC

 1634 17:32:50.371485  ELOG: Event(92) added with size 9 at 2023-10-02 17:31:18 UTC

 1635 17:32:50.374803  ELOG: Event(93) added with size 9 at 2023-10-02 17:31:18 UTC

 1636 17:32:50.381512  ELOG: Event(9A) added with size 9 at 2023-10-02 17:31:18 UTC

 1637 17:32:50.388285  ELOG: Event(9E) added with size 10 at 2023-10-02 17:31:18 UTC

 1638 17:32:50.394997  ELOG: Event(9F) added with size 14 at 2023-10-02 17:31:18 UTC

 1639 17:32:50.401930  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1640 17:32:50.408159  ELOG: Event(A1) added with size 10 at 2023-10-02 17:31:18 UTC

 1641 17:32:50.414601  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1642 17:32:50.421250  ELOG: Event(A0) added with size 9 at 2023-10-02 17:31:18 UTC

 1643 17:32:50.424840  elog_add_boot_reason: Logged dev mode boot

 1644 17:32:50.427963  Finalize devices...

 1645 17:32:50.431398  PCI: 00:17.0 final

 1646 17:32:50.431470  Devices finalized

 1647 17:32:50.437662  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1648 17:32:50.440929  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1649 17:32:50.447543  ME: HFSTS1                  : 0x90000245

 1650 17:32:50.451195  ME: HFSTS2                  : 0x3B850126

 1651 17:32:50.454777  ME: HFSTS3                  : 0x00000020

 1652 17:32:50.457678  ME: HFSTS4                  : 0x00004800

 1653 17:32:50.461137  ME: HFSTS5                  : 0x00000000

 1654 17:32:50.467715  ME: HFSTS6                  : 0x40400006

 1655 17:32:50.470843  ME: Manufacturing Mode      : NO

 1656 17:32:50.474349  ME: FW Partition Table      : OK

 1657 17:32:50.477498  ME: Bringup Loader Failure  : NO

 1658 17:32:50.480894  ME: Firmware Init Complete  : YES

 1659 17:32:50.484145  ME: Boot Options Present    : NO

 1660 17:32:50.487530  ME: Update In Progress      : NO

 1661 17:32:50.490872  ME: D0i3 Support            : YES

 1662 17:32:50.494229  ME: Low Power State Enabled : NO

 1663 17:32:50.497557  ME: CPU Replaced            : NO

 1664 17:32:50.500817  ME: CPU Replacement Valid   : YES

 1665 17:32:50.504026  ME: Current Working State   : 5

 1666 17:32:50.507680  ME: Current Operation State : 1

 1667 17:32:50.510890  ME: Current Operation Mode  : 0

 1668 17:32:50.514193  ME: Error Code              : 0

 1669 17:32:50.517566  ME: CPU Debug Disabled      : YES

 1670 17:32:50.520909  ME: TXT Support             : NO

 1671 17:32:50.524195  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1672 17:32:50.530423  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1673 17:32:50.533986  CBFS @ c08000 size 3f8000

 1674 17:32:50.540507  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1675 17:32:50.544051  CBFS: Locating 'fallback/dsdt.aml'

 1676 17:32:50.546957  CBFS: Found @ offset 10bb80 size 3fa5

 1677 17:32:50.550383  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1678 17:32:50.553895  CBFS @ c08000 size 3f8000

 1679 17:32:50.560286  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1680 17:32:50.564047  CBFS: Locating 'fallback/slic'

 1681 17:32:50.567078  CBFS: 'fallback/slic' not found.

 1682 17:32:50.573529  ACPI: Writing ACPI tables at 99b3e000.

 1683 17:32:50.573607  ACPI:    * FACS

 1684 17:32:50.576870  ACPI:    * DSDT

 1685 17:32:50.580088  Ramoops buffer: 0x100000@0x99a3d000.

 1686 17:32:50.583752  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1687 17:32:50.590424  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1688 17:32:50.593801  Google Chrome EC: version:

 1689 17:32:50.596487  	ro: helios_v2.0.2659-56403530b

 1690 17:32:50.599900  	rw: helios_v2.0.2849-c41de27e7d

 1691 17:32:50.599977    running image: 1

 1692 17:32:50.604521  ACPI:    * FADT

 1693 17:32:50.604618  SCI is IRQ9

 1694 17:32:50.610532  ACPI: added table 1/32, length now 40

 1695 17:32:50.610634  ACPI:     * SSDT

 1696 17:32:50.614185  Found 1 CPU(s) with 8 core(s) each.

 1697 17:32:50.617218  Error: Could not locate 'wifi_sar' in VPD.

 1698 17:32:50.623889  Checking CBFS for default SAR values

 1699 17:32:50.627157  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1700 17:32:50.630498  CBFS @ c08000 size 3f8000

 1701 17:32:50.637066  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1702 17:32:50.640261  CBFS: Locating 'wifi_sar_defaults.hex'

 1703 17:32:50.644024  CBFS: Found @ offset 5fac0 size 77

 1704 17:32:50.647106  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1705 17:32:50.653607  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1706 17:32:50.657248  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1707 17:32:50.663477  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1708 17:32:50.667084  failed to find key in VPD: dsm_calib_r0_0

 1709 17:32:50.676989  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1710 17:32:50.680488  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1711 17:32:50.683424  failed to find key in VPD: dsm_calib_r0_1

 1712 17:32:50.693347  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1713 17:32:50.699845  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1714 17:32:50.703217  failed to find key in VPD: dsm_calib_r0_2

 1715 17:32:50.713302  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1716 17:32:50.716565  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1717 17:32:50.723045  failed to find key in VPD: dsm_calib_r0_3

 1718 17:32:50.729846  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1719 17:32:50.736448  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1720 17:32:50.739730  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1721 17:32:50.742929  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1722 17:32:50.747023  EC returned error result code 1

 1723 17:32:50.750610  EC returned error result code 1

 1724 17:32:50.754422  EC returned error result code 1

 1725 17:32:50.761011  PS2K: Bad resp from EC. Vivaldi disabled!

 1726 17:32:50.764854  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1727 17:32:50.770955  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1728 17:32:50.778083  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1729 17:32:50.781059  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1730 17:32:50.787598  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1731 17:32:50.794058  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1732 17:32:50.797960  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1733 17:32:50.804393  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1734 17:32:50.807425  ACPI: added table 2/32, length now 44

 1735 17:32:50.810800  ACPI:    * MCFG

 1736 17:32:50.814017  ACPI: added table 3/32, length now 48

 1737 17:32:50.817343  ACPI:    * TPM2

 1738 17:32:50.817442  TPM2 log created at 99a2d000

 1739 17:32:50.824118  ACPI: added table 4/32, length now 52

 1740 17:32:50.824193  ACPI:    * MADT

 1741 17:32:50.824256  SCI is IRQ9

 1742 17:32:50.831130  ACPI: added table 5/32, length now 56

 1743 17:32:50.831208  current = 99b43ac0

 1744 17:32:50.834137  ACPI:    * DMAR

 1745 17:32:50.837285  ACPI: added table 6/32, length now 60

 1746 17:32:50.840614  ACPI:    * IGD OpRegion

 1747 17:32:50.840690  GMA: Found VBT in CBFS

 1748 17:32:50.843954  GMA: Found valid VBT in CBFS

 1749 17:32:50.847209  ACPI: added table 7/32, length now 64

 1750 17:32:50.850493  ACPI:    * HPET

 1751 17:32:50.853713  ACPI: added table 8/32, length now 68

 1752 17:32:50.853814  ACPI: done.

 1753 17:32:50.857473  ACPI tables: 31744 bytes.

 1754 17:32:50.860684  smbios_write_tables: 99a2c000

 1755 17:32:50.863946  EC returned error result code 3

 1756 17:32:50.867239  Couldn't obtain OEM name from CBI

 1757 17:32:50.870635  Create SMBIOS type 17

 1758 17:32:50.873933  PCI: 00:00.0 (Intel Cannonlake)

 1759 17:32:50.877208  PCI: 00:14.3 (Intel WiFi)

 1760 17:32:50.880559  SMBIOS tables: 939 bytes.

 1761 17:32:50.883995  Writing table forward entry at 0x00000500

 1762 17:32:50.890325  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1763 17:32:50.893576  Writing coreboot table at 0x99b62000

 1764 17:32:50.900214   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1765 17:32:50.903598   1. 0000000000001000-000000000009ffff: RAM

 1766 17:32:50.906602   2. 00000000000a0000-00000000000fffff: RESERVED

 1767 17:32:50.913155   3. 0000000000100000-0000000099a2bfff: RAM

 1768 17:32:50.920078   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1769 17:32:50.923512   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1770 17:32:50.930089   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1771 17:32:50.933342   7. 000000009a000000-000000009f7fffff: RESERVED

 1772 17:32:50.939753   8. 00000000e0000000-00000000efffffff: RESERVED

 1773 17:32:50.942739   9. 00000000fc000000-00000000fc000fff: RESERVED

 1774 17:32:50.949941  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1775 17:32:50.953187  11. 00000000fed10000-00000000fed17fff: RESERVED

 1776 17:32:50.955922  12. 00000000fed80000-00000000fed83fff: RESERVED

 1777 17:32:50.963097  13. 00000000fed90000-00000000fed91fff: RESERVED

 1778 17:32:50.966487  14. 00000000feda0000-00000000feda1fff: RESERVED

 1779 17:32:50.972775  15. 0000000100000000-000000045e7fffff: RAM

 1780 17:32:50.975908  Graphics framebuffer located at 0xc0000000

 1781 17:32:50.979178  Passing 5 GPIOs to payload:

 1782 17:32:50.982427              NAME |       PORT | POLARITY |     VALUE

 1783 17:32:50.989371     write protect |  undefined |     high |       low

 1784 17:32:50.996134               lid |  undefined |     high |      high

 1785 17:32:50.999372             power |  undefined |     high |       low

 1786 17:32:51.006112             oprom |  undefined |     high |       low

 1787 17:32:51.009125          EC in RW | 0x000000cb |     high |       low

 1788 17:32:51.012742  Board ID: 4

 1789 17:32:51.016059  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1790 17:32:51.018889  CBFS @ c08000 size 3f8000

 1791 17:32:51.025482  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1792 17:32:51.032432  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87

 1793 17:32:51.032510  coreboot table: 1492 bytes.

 1794 17:32:51.036030  IMD ROOT    0. 99fff000 00001000

 1795 17:32:51.038960  IMD SMALL   1. 99ffe000 00001000

 1796 17:32:51.042330  FSP MEMORY  2. 99c4e000 003b0000

 1797 17:32:51.045550  CONSOLE     3. 99c2e000 00020000

 1798 17:32:51.048757  FMAP        4. 99c2d000 0000054e

 1799 17:32:51.052217  TIME STAMP  5. 99c2c000 00000910

 1800 17:32:51.055615  VBOOT WORK  6. 99c18000 00014000

 1801 17:32:51.058880  MRC DATA    7. 99c16000 00001958

 1802 17:32:51.062146  ROMSTG STCK 8. 99c15000 00001000

 1803 17:32:51.065480  AFTER CAR   9. 99c0b000 0000a000

 1804 17:32:51.068924  RAMSTAGE   10. 99baf000 0005c000

 1805 17:32:51.072126  REFCODE    11. 99b7a000 00035000

 1806 17:32:51.075452  SMM BACKUP 12. 99b6a000 00010000

 1807 17:32:51.078640  COREBOOT   13. 99b62000 00008000

 1808 17:32:51.082266  ACPI       14. 99b3e000 00024000

 1809 17:32:51.085461  ACPI GNVS  15. 99b3d000 00001000

 1810 17:32:51.088691  RAMOOPS    16. 99a3d000 00100000

 1811 17:32:51.092084  TPM2 TCGLOG17. 99a2d000 00010000

 1812 17:32:51.095369  SMBIOS     18. 99a2c000 00000800

 1813 17:32:51.099161  IMD small region:

 1814 17:32:51.101964    IMD ROOT    0. 99ffec00 00000400

 1815 17:32:51.105590    FSP RUNTIME 1. 99ffebe0 00000004

 1816 17:32:51.108813    EC HOSTEVENT 2. 99ffebc0 00000008

 1817 17:32:51.112187    POWER STATE 3. 99ffeb80 00000040

 1818 17:32:51.115650    ROMSTAGE    4. 99ffeb60 00000004

 1819 17:32:51.118844    MEM INFO    5. 99ffe9a0 000001b9

 1820 17:32:51.124994    VPD         6. 99ffe920 0000006c

 1821 17:32:51.125098  MTRR: Physical address space:

 1822 17:32:51.131945  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1823 17:32:51.138556  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1824 17:32:51.144920  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1825 17:32:51.151528  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1826 17:32:51.158456  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1827 17:32:51.164994  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1828 17:32:51.171400  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1829 17:32:51.174748  MTRR: Fixed MSR 0x250 0x0606060606060606

 1830 17:32:51.178032  MTRR: Fixed MSR 0x258 0x0606060606060606

 1831 17:32:51.181304  MTRR: Fixed MSR 0x259 0x0000000000000000

 1832 17:32:51.187814  MTRR: Fixed MSR 0x268 0x0606060606060606

 1833 17:32:51.191487  MTRR: Fixed MSR 0x269 0x0606060606060606

 1834 17:32:51.194545  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1835 17:32:51.197936  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1836 17:32:51.204372  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1837 17:32:51.207592  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1838 17:32:51.211282  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1839 17:32:51.214524  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1840 17:32:51.217826  call enable_fixed_mtrr()

 1841 17:32:51.221157  CPU physical address size: 39 bits

 1842 17:32:51.227736  MTRR: default type WB/UC MTRR counts: 6/8.

 1843 17:32:51.231018  MTRR: WB selected as default type.

 1844 17:32:51.237466  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1845 17:32:51.240988  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1846 17:32:51.247406  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1847 17:32:51.254587  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1848 17:32:51.260730  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1849 17:32:51.267577  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1850 17:32:51.270696  MTRR: Fixed MSR 0x250 0x0606060606060606

 1851 17:32:51.277701  MTRR: Fixed MSR 0x258 0x0606060606060606

 1852 17:32:51.280957  MTRR: Fixed MSR 0x259 0x0000000000000000

 1853 17:32:51.284474  MTRR: Fixed MSR 0x268 0x0606060606060606

 1854 17:32:51.287070  MTRR: Fixed MSR 0x269 0x0606060606060606

 1855 17:32:51.294314  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1856 17:32:51.297527  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1857 17:32:51.300554  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1858 17:32:51.303617  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1859 17:32:51.310600  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1860 17:32:51.313723  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1861 17:32:51.313811  

 1862 17:32:51.313933  MTRR check

 1863 17:32:51.317374  Fixed MTRRs   : Enabled

 1864 17:32:51.320553  Variable MTRRs: Enabled

 1865 17:32:51.320634  

 1866 17:32:51.323934  call enable_fixed_mtrr()

 1867 17:32:51.327252  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1868 17:32:51.330463  CPU physical address size: 39 bits

 1869 17:32:51.337197  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1870 17:32:51.340610  CBFS @ c08000 size 3f8000

 1871 17:32:51.343952  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1872 17:32:51.347281  CBFS: Locating 'fallback/payload'

 1873 17:32:51.354174  MTRR: Fixed MSR 0x250 0x0606060606060606

 1874 17:32:51.356889  MTRR: Fixed MSR 0x258 0x0606060606060606

 1875 17:32:51.360720  MTRR: Fixed MSR 0x259 0x0000000000000000

 1876 17:32:51.364095  MTRR: Fixed MSR 0x268 0x0606060606060606

 1877 17:32:51.370632  MTRR: Fixed MSR 0x269 0x0606060606060606

 1878 17:32:51.373766  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1879 17:32:51.376811  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1880 17:32:51.380240  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1881 17:32:51.386932  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1882 17:32:51.390016  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1883 17:32:51.393605  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1884 17:32:51.397073  MTRR: Fixed MSR 0x250 0x0606060606060606

 1885 17:32:51.403616  MTRR: Fixed MSR 0x258 0x0606060606060606

 1886 17:32:51.407029  MTRR: Fixed MSR 0x259 0x0000000000000000

 1887 17:32:51.410175  MTRR: Fixed MSR 0x268 0x0606060606060606

 1888 17:32:51.413642  MTRR: Fixed MSR 0x269 0x0606060606060606

 1889 17:32:51.420239  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1890 17:32:51.423466  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1891 17:32:51.426580  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1892 17:32:51.429826  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1893 17:32:51.433060  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1894 17:32:51.439596  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1895 17:32:51.443565  call enable_fixed_mtrr()

 1896 17:32:51.443671  call enable_fixed_mtrr()

 1897 17:32:51.446308  CPU physical address size: 39 bits

 1898 17:32:51.452928  CPU physical address size: 39 bits

 1899 17:32:51.456343  CBFS: Found @ offset 1c96c0 size 3f798

 1900 17:32:51.459631  MTRR: Fixed MSR 0x250 0x0606060606060606

 1901 17:32:51.462761  MTRR: Fixed MSR 0x258 0x0606060606060606

 1902 17:32:51.466365  MTRR: Fixed MSR 0x259 0x0000000000000000

 1903 17:32:51.472933  MTRR: Fixed MSR 0x268 0x0606060606060606

 1904 17:32:51.476389  MTRR: Fixed MSR 0x269 0x0606060606060606

 1905 17:32:51.479606  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1906 17:32:51.483003  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1907 17:32:51.489603  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1908 17:32:51.492863  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1909 17:32:51.496081  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1910 17:32:51.499607  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1911 17:32:51.506312  MTRR: Fixed MSR 0x250 0x0606060606060606

 1912 17:32:51.506419  call enable_fixed_mtrr()

 1913 17:32:51.513200  MTRR: Fixed MSR 0x258 0x0606060606060606

 1914 17:32:51.516170  MTRR: Fixed MSR 0x259 0x0000000000000000

 1915 17:32:51.519851  MTRR: Fixed MSR 0x268 0x0606060606060606

 1916 17:32:51.522873  MTRR: Fixed MSR 0x269 0x0606060606060606

 1917 17:32:51.529169  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1918 17:32:51.532944  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1919 17:32:51.536134  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1920 17:32:51.539354  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1921 17:32:51.542676  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1922 17:32:51.549112  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1923 17:32:51.552467  CPU physical address size: 39 bits

 1924 17:32:51.555876  call enable_fixed_mtrr()

 1925 17:32:51.559249  Checking segment from ROM address 0xffdd16f8

 1926 17:32:51.562566  CPU physical address size: 39 bits

 1927 17:32:51.565905  MTRR: Fixed MSR 0x250 0x0606060606060606

 1928 17:32:51.572550  MTRR: Fixed MSR 0x250 0x0606060606060606

 1929 17:32:51.575736  MTRR: Fixed MSR 0x258 0x0606060606060606

 1930 17:32:51.578775  MTRR: Fixed MSR 0x259 0x0000000000000000

 1931 17:32:51.582159  MTRR: Fixed MSR 0x268 0x0606060606060606

 1932 17:32:51.588645  MTRR: Fixed MSR 0x269 0x0606060606060606

 1933 17:32:51.592008  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1934 17:32:51.595860  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1935 17:32:51.598582  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1936 17:32:51.605182  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1937 17:32:51.608421  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1938 17:32:51.612383  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1939 17:32:51.615428  MTRR: Fixed MSR 0x258 0x0606060606060606

 1940 17:32:51.621901  MTRR: Fixed MSR 0x259 0x0000000000000000

 1941 17:32:51.625296  MTRR: Fixed MSR 0x268 0x0606060606060606

 1942 17:32:51.628435  MTRR: Fixed MSR 0x269 0x0606060606060606

 1943 17:32:51.631994  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1944 17:32:51.638496  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1945 17:32:51.641763  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1946 17:32:51.645239  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1947 17:32:51.648794  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1948 17:32:51.651440  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1949 17:32:51.654828  call enable_fixed_mtrr()

 1950 17:32:51.658135  call enable_fixed_mtrr()

 1951 17:32:51.661582  CPU physical address size: 39 bits

 1952 17:32:51.664679  CPU physical address size: 39 bits

 1953 17:32:51.671256  Checking segment from ROM address 0xffdd1714

 1954 17:32:51.674664  Loading segment from ROM address 0xffdd16f8

 1955 17:32:51.677929    code (compression=0)

 1956 17:32:51.684647    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1957 17:32:51.694679  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1958 17:32:51.698226  it's not compressed!

 1959 17:32:51.788807  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1960 17:32:51.795505  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1961 17:32:51.798726  Loading segment from ROM address 0xffdd1714

 1962 17:32:51.801793    Entry Point 0x30000000

 1963 17:32:51.804946  Loaded segments

 1964 17:32:51.810934  Finalizing chipset.

 1965 17:32:51.814379  Finalizing SMM.

 1966 17:32:51.817800  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 1967 17:32:51.820988  mp_park_aps done after 0 msecs.

 1968 17:32:51.827623  Jumping to boot code at 30000000(99b62000)

 1969 17:32:51.833737  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 1970 17:32:51.833819  

 1971 17:32:51.833883  

 1972 17:32:51.833942  

 1973 17:32:51.837121  Starting depthcharge on Helios...

 1974 17:32:51.837201  

 1975 17:32:51.837543  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 1976 17:32:51.837642  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 1977 17:32:51.837723  Setting prompt string to ['hatch:']
 1978 17:32:51.837799  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 1979 17:32:51.847446  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1980 17:32:51.847529  

 1981 17:32:51.853887  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1982 17:32:51.853969  

 1983 17:32:51.860459  board_setup: Info: eMMC controller not present; skipping

 1984 17:32:51.860541  

 1985 17:32:51.863940  New NVMe Controller 0x30053ac0 @ 00:1d:00

 1986 17:32:51.864022  

 1987 17:32:51.870177  board_setup: Info: SDHCI controller not present; skipping

 1988 17:32:51.870259  

 1989 17:32:51.876659  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 1990 17:32:51.876744  

 1991 17:32:51.876809  Wipe memory regions:

 1992 17:32:51.876889  

 1993 17:32:51.879984  	[0x00000000001000, 0x000000000a0000)

 1994 17:32:51.880066  

 1995 17:32:51.883934  	[0x00000000100000, 0x00000030000000)

 1996 17:32:51.949843  

 1997 17:32:51.953034  	[0x00000030657430, 0x00000099a2c000)

 1998 17:32:52.090448  

 1999 17:32:52.093450  	[0x00000100000000, 0x0000045e800000)

 2000 17:32:53.475393  

 2001 17:32:53.475532  R8152: Initializing

 2002 17:32:53.475600  

 2003 17:32:53.478759  Version 9 (ocp_data = 6010)

 2004 17:32:53.483354  

 2005 17:32:53.483435  R8152: Done initializing

 2006 17:32:53.483501  

 2007 17:32:53.485990  Adding net device

 2008 17:32:53.968821  

 2009 17:32:53.968988  R8152: Initializing

 2010 17:32:53.969076  

 2011 17:32:53.972541  Version 6 (ocp_data = 5c30)

 2012 17:32:53.972612  

 2013 17:32:53.975540  R8152: Done initializing

 2014 17:32:53.975650  

 2015 17:32:53.978958  net_add_device: Attemp to include the same device

 2016 17:32:53.982695  

 2017 17:32:53.989504  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2018 17:32:53.989605  

 2019 17:32:53.989704  

 2020 17:32:53.989792  

 2021 17:32:53.990108  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2023 17:32:54.090527  hatch: tftpboot 192.168.201.1 11661510/tftp-deploy-65gj70wz/kernel/bzImage 11661510/tftp-deploy-65gj70wz/kernel/cmdline 11661510/tftp-deploy-65gj70wz/ramdisk/ramdisk.cpio.gz

 2024 17:32:54.090694  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2025 17:32:54.090806  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2026 17:32:54.095499  tftpboot 192.168.201.1 11661510/tftp-deploy-65gj70wz/kernel/bzIploy-65gj70wz/kernel/cmdline 11661510/tftp-deploy-65gj70wz/ramdisk/ramdisk.cpio.gz

 2027 17:32:54.095586  

 2028 17:32:54.095661  Waiting for link

 2029 17:32:54.295934  

 2030 17:32:54.296063  done.

 2031 17:32:54.296132  

 2032 17:32:54.296193  MAC: 00:24:32:50:19:be

 2033 17:32:54.296251  

 2034 17:32:54.299145  Sending DHCP discover... done.

 2035 17:32:54.299228  

 2036 17:32:54.303044  Waiting for reply... done.

 2037 17:32:54.303125  

 2038 17:32:54.306229  Sending DHCP request... done.

 2039 17:32:54.306311  

 2040 17:32:54.312795  Waiting for reply... done.

 2041 17:32:54.312877  

 2042 17:32:54.312942  My ip is 192.168.201.15

 2043 17:32:54.313003  

 2044 17:32:54.315828  The DHCP server ip is 192.168.201.1

 2045 17:32:54.315910  

 2046 17:32:54.322767  TFTP server IP predefined by user: 192.168.201.1

 2047 17:32:54.322885  

 2048 17:32:54.329099  Bootfile predefined by user: 11661510/tftp-deploy-65gj70wz/kernel/bzImage

 2049 17:32:54.329177  

 2050 17:32:54.332742  Sending tftp read request... done.

 2051 17:32:54.332851  

 2052 17:32:54.335822  Waiting for the transfer... 

 2053 17:32:54.335926  

 2054 17:32:54.878846  00000000 ################################################################

 2055 17:32:54.878988  

 2056 17:32:55.416235  00080000 ################################################################

 2057 17:32:55.416370  

 2058 17:32:55.959564  00100000 ################################################################

 2059 17:32:55.959733  

 2060 17:32:56.504329  00180000 ################################################################

 2061 17:32:56.504476  

 2062 17:32:57.047175  00200000 ################################################################

 2063 17:32:57.047323  

 2064 17:32:57.590795  00280000 ################################################################

 2065 17:32:57.590970  

 2066 17:32:58.184653  00300000 ################################################################

 2067 17:32:58.184813  

 2068 17:32:58.741336  00380000 ################################################################

 2069 17:32:58.741516  

 2070 17:32:59.277047  00400000 ################################################################

 2071 17:32:59.277208  

 2072 17:33:00.689564  00480000 ################################################################

 2073 17:33:00.689778  

 2074 17:33:00.689910  00500000 ################################################################

 2075 17:33:00.690040  

 2076 17:33:00.856005  00580000 ################################################################

 2077 17:33:00.856159  

 2078 17:33:01.446782  00600000 ################################################################

 2079 17:33:01.447321  

 2080 17:33:02.162309  00680000 ################################################################

 2081 17:33:02.162844  

 2082 17:33:02.817867  00700000 ################################################################

 2083 17:33:02.818394  

 2084 17:33:03.525733  00780000 ################################################################

 2085 17:33:03.526236  

 2086 17:33:03.663276  00800000 ############# done.

 2087 17:33:03.663869  

 2088 17:33:03.666246  The bootfile was 8490896 bytes long.

 2089 17:33:03.666675  

 2090 17:33:03.669606  Sending tftp read request... done.

 2091 17:33:03.670060  

 2092 17:33:03.672825  Waiting for the transfer... 

 2093 17:33:03.673282  

 2094 17:33:04.340255  00000000 ################################################################

 2095 17:33:04.340775  

 2096 17:33:05.008671  00080000 ################################################################

 2097 17:33:05.009167  

 2098 17:33:05.679433  00100000 ################################################################

 2099 17:33:05.680029  

 2100 17:33:06.360092  00180000 ################################################################

 2101 17:33:06.360585  

 2102 17:33:07.026748  00200000 ################################################################

 2103 17:33:07.027245  

 2104 17:33:07.718856  00280000 ################################################################

 2105 17:33:07.719381  

 2106 17:33:08.427200  00300000 ################################################################

 2107 17:33:08.427776  

 2108 17:33:09.040157  00380000 ################################################################

 2109 17:33:09.040301  

 2110 17:33:09.609812  00400000 ################################################################

 2111 17:33:09.609982  

 2112 17:33:10.239774  00480000 ################################################################

 2113 17:33:10.239921  

 2114 17:33:10.858814  00500000 ################################################################

 2115 17:33:10.858987  

 2116 17:33:11.507407  00580000 ################################################################

 2117 17:33:11.508215  

 2118 17:33:12.191438  00600000 ################################################################

 2119 17:33:12.191981  

 2120 17:33:12.760383  00680000 ################################################################

 2121 17:33:12.760532  

 2122 17:33:13.405943  00700000 ################################################################

 2123 17:33:13.406439  

 2124 17:33:13.996025  00780000 ################################################################

 2125 17:33:13.996159  

 2126 17:33:14.457241  00800000 ####################################################### done.

 2127 17:33:14.457379  

 2128 17:33:14.461263  Sending tftp read request... done.

 2129 17:33:14.461350  

 2130 17:33:14.464222  Waiting for the transfer... 

 2131 17:33:14.464339  

 2132 17:33:14.464436  00000000 # done.

 2133 17:33:14.464508  

 2134 17:33:14.473900  Command line loaded dynamically from TFTP file: 11661510/tftp-deploy-65gj70wz/kernel/cmdline

 2135 17:33:14.474016  

 2136 17:33:14.494405  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2137 17:33:14.494573  

 2138 17:33:14.500915  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2139 17:33:14.504808  

 2140 17:33:14.507512  Shutting down all USB controllers.

 2141 17:33:14.507808  

 2142 17:33:14.508009  Removing current net device

 2143 17:33:14.511560  

 2144 17:33:14.511901  Finalizing coreboot

 2145 17:33:14.512154  

 2146 17:33:14.518355  Exiting depthcharge with code 4 at timestamp: 30055795

 2147 17:33:14.518749  

 2148 17:33:14.519063  

 2149 17:33:14.519360  Starting kernel ...

 2150 17:33:14.519678  

 2151 17:33:14.520026  

 2152 17:33:14.521368  end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
 2153 17:33:14.521882  start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
 2154 17:33:14.522266  Setting prompt string to ['Linux version [0-9]']
 2155 17:33:14.522617  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2156 17:33:14.522966  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2158 17:37:33.522100  end: 2.2.5 auto-login-action (duration 00:04:19) [common]
 2160 17:37:33.522355  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
 2162 17:37:33.522520  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2165 17:37:33.522783  end: 2 depthcharge-action (duration 00:05:00) [common]
 2167 17:37:33.523008  Cleaning after the job
 2168 17:37:33.523106  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11661510/tftp-deploy-65gj70wz/ramdisk
 2169 17:37:33.524390  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11661510/tftp-deploy-65gj70wz/kernel
 2170 17:37:33.525711  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11661510/tftp-deploy-65gj70wz/modules
 2171 17:37:33.526224  start: 5.1 power-off (timeout 00:00:30) [common]
 2172 17:37:33.526392  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
 2173 17:37:33.605216  >> Command sent successfully.

 2174 17:37:33.608111  Returned 0 in 0 seconds
 2175 17:37:33.708474  end: 5.1 power-off (duration 00:00:00) [common]
 2177 17:37:33.708823  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2178 17:37:33.709089  Listened to connection for namespace 'common' for up to 1s
 2180 17:37:33.709473  Listened to connection for namespace 'common' for up to 1s
 2181 17:37:34.710005  Finalising connection for namespace 'common'
 2182 17:37:34.710175  Disconnecting from shell: Finalise
 2183 17:37:34.710253  
 2184 17:37:34.810578  end: 5.2 read-feedback (duration 00:00:01) [common]
 2185 17:37:34.810726  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11661510
 2186 17:37:34.827948  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11661510
 2187 17:37:34.828112  JobError: Your job cannot terminate cleanly.