Boot log: asus-cx9400-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 17:17:22.972950 lava-dispatcher, installed at version: 2023.08
2 17:17:22.973163 start: 0 validate
3 17:17:22.973291 Start time: 2023-10-02 17:17:22.973283+00:00 (UTC)
4 17:17:22.973401 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:17:22.973532 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:17:23.245143 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:17:23.245906 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1779-g48d33e0df7175%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:17:23.516180 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:17:23.516430 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1779-g48d33e0df7175%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:17:27.536984 validate duration: 4.56
12 17:17:27.538412 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:17:27.539064 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:17:27.539624 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:17:27.540295 Not decompressing ramdisk as can be used compressed.
16 17:17:27.540780 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:17:27.541154 saving as /var/lib/lava/dispatcher/tmp/11661468/tftp-deploy-27_944sv/ramdisk/rootfs.cpio.gz
18 17:17:27.541525 total size: 8418130 (8 MB)
19 17:17:28.046693 progress 0 % (0 MB)
20 17:17:28.060481 progress 5 % (0 MB)
21 17:17:28.073732 progress 10 % (0 MB)
22 17:17:28.084115 progress 15 % (1 MB)
23 17:17:28.090303 progress 20 % (1 MB)
24 17:17:28.095185 progress 25 % (2 MB)
25 17:17:28.099447 progress 30 % (2 MB)
26 17:17:28.102906 progress 35 % (2 MB)
27 17:17:28.106228 progress 40 % (3 MB)
28 17:17:28.109402 progress 45 % (3 MB)
29 17:17:28.112367 progress 50 % (4 MB)
30 17:17:28.115085 progress 55 % (4 MB)
31 17:17:28.117644 progress 60 % (4 MB)
32 17:17:28.119889 progress 65 % (5 MB)
33 17:17:28.122197 progress 70 % (5 MB)
34 17:17:28.124483 progress 75 % (6 MB)
35 17:17:28.126738 progress 80 % (6 MB)
36 17:17:28.128953 progress 85 % (6 MB)
37 17:17:28.131173 progress 90 % (7 MB)
38 17:17:28.133388 progress 95 % (7 MB)
39 17:17:28.135462 progress 100 % (8 MB)
40 17:17:28.135693 8 MB downloaded in 0.59 s (13.51 MB/s)
41 17:17:28.135848 end: 1.1.1 http-download (duration 00:00:01) [common]
43 17:17:28.136086 end: 1.1 download-retry (duration 00:00:01) [common]
44 17:17:28.136173 start: 1.2 download-retry (timeout 00:09:59) [common]
45 17:17:28.136259 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 17:17:28.136403 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1779-g48d33e0df7175/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:17:28.136474 saving as /var/lib/lava/dispatcher/tmp/11661468/tftp-deploy-27_944sv/kernel/bzImage
48 17:17:28.136535 total size: 8490896 (8 MB)
49 17:17:28.136596 No compression specified
50 17:17:28.137725 progress 0 % (0 MB)
51 17:17:28.139953 progress 5 % (0 MB)
52 17:17:28.142212 progress 10 % (0 MB)
53 17:17:28.144513 progress 15 % (1 MB)
54 17:17:28.146772 progress 20 % (1 MB)
55 17:17:28.149018 progress 25 % (2 MB)
56 17:17:28.151307 progress 30 % (2 MB)
57 17:17:28.153560 progress 35 % (2 MB)
58 17:17:28.155814 progress 40 % (3 MB)
59 17:17:28.158067 progress 45 % (3 MB)
60 17:17:28.160345 progress 50 % (4 MB)
61 17:17:28.162573 progress 55 % (4 MB)
62 17:17:28.164803 progress 60 % (4 MB)
63 17:17:28.167042 progress 65 % (5 MB)
64 17:17:28.169242 progress 70 % (5 MB)
65 17:17:28.171462 progress 75 % (6 MB)
66 17:17:28.173657 progress 80 % (6 MB)
67 17:17:28.175877 progress 85 % (6 MB)
68 17:17:28.178083 progress 90 % (7 MB)
69 17:17:28.180372 progress 95 % (7 MB)
70 17:17:28.182611 progress 100 % (8 MB)
71 17:17:28.182729 8 MB downloaded in 0.05 s (175.31 MB/s)
72 17:17:28.182882 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:17:28.183111 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:17:28.183196 start: 1.3 download-retry (timeout 00:09:59) [common]
76 17:17:28.183280 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 17:17:28.183427 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1779-g48d33e0df7175/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:17:28.183499 saving as /var/lib/lava/dispatcher/tmp/11661468/tftp-deploy-27_944sv/modules/modules.tar
79 17:17:28.183560 total size: 250800 (0 MB)
80 17:17:28.183621 Using unxz to decompress xz
81 17:17:28.187718 progress 13 % (0 MB)
82 17:17:28.188129 progress 26 % (0 MB)
83 17:17:28.188361 progress 39 % (0 MB)
84 17:17:28.189782 progress 52 % (0 MB)
85 17:17:28.191789 progress 65 % (0 MB)
86 17:17:28.193693 progress 78 % (0 MB)
87 17:17:28.195529 progress 91 % (0 MB)
88 17:17:28.197558 progress 100 % (0 MB)
89 17:17:28.203121 0 MB downloaded in 0.02 s (12.23 MB/s)
90 17:17:28.203354 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:17:28.203619 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:17:28.203718 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 17:17:28.203816 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 17:17:28.203899 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:17:28.203987 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 17:17:28.204215 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e
98 17:17:28.204355 makedir: /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin
99 17:17:28.204466 makedir: /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/tests
100 17:17:28.204569 makedir: /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/results
101 17:17:28.204689 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-add-keys
102 17:17:28.204835 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-add-sources
103 17:17:28.204968 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-background-process-start
104 17:17:28.205099 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-background-process-stop
105 17:17:28.205226 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-common-functions
106 17:17:28.205352 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-echo-ipv4
107 17:17:28.205478 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-install-packages
108 17:17:28.205605 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-installed-packages
109 17:17:28.205730 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-os-build
110 17:17:28.205858 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-probe-channel
111 17:17:28.205990 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-probe-ip
112 17:17:28.206116 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-target-ip
113 17:17:28.206242 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-target-mac
114 17:17:28.206367 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-target-storage
115 17:17:28.206497 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-test-case
116 17:17:28.206651 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-test-event
117 17:17:28.206806 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-test-feedback
118 17:17:28.206947 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-test-raise
119 17:17:28.207076 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-test-reference
120 17:17:28.207205 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-test-runner
121 17:17:28.207330 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-test-set
122 17:17:28.207461 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-test-shell
123 17:17:28.207591 Updating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-install-packages (oe)
124 17:17:28.207744 Updating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/bin/lava-installed-packages (oe)
125 17:17:28.207867 Creating /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/environment
126 17:17:28.207967 LAVA metadata
127 17:17:28.208042 - LAVA_JOB_ID=11661468
128 17:17:28.208106 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:17:28.208211 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 17:17:28.208278 skipped lava-vland-overlay
131 17:17:28.208355 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:17:28.208434 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 17:17:28.208500 skipped lava-multinode-overlay
134 17:17:28.208575 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:17:28.208655 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 17:17:28.208729 Loading test definitions
137 17:17:28.208822 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 17:17:28.208898 Using /lava-11661468 at stage 0
139 17:17:28.209233 uuid=11661468_1.4.2.3.1 testdef=None
140 17:17:28.209322 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:17:28.209406 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 17:17:28.209952 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:17:28.210173 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 17:17:28.210860 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:17:28.211091 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 17:17:28.211720 runner path: /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/0/tests/0_dmesg test_uuid 11661468_1.4.2.3.1
149 17:17:28.211877 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:17:28.212105 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 17:17:28.212177 Using /lava-11661468 at stage 1
153 17:17:28.212484 uuid=11661468_1.4.2.3.5 testdef=None
154 17:17:28.212572 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:17:28.212656 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 17:17:28.213132 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:17:28.213352 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 17:17:28.214001 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:17:28.214228 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 17:17:28.214908 runner path: /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/1/tests/1_bootrr test_uuid 11661468_1.4.2.3.5
163 17:17:28.215062 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:17:28.215266 Creating lava-test-runner.conf files
166 17:17:28.215328 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/0 for stage 0
167 17:17:28.215422 - 0_dmesg
168 17:17:28.215501 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11661468/lava-overlay-c4s11w8e/lava-11661468/1 for stage 1
169 17:17:28.215593 - 1_bootrr
170 17:17:28.215689 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:17:28.215775 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 17:17:28.224452 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:17:28.224560 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 17:17:28.224646 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:17:28.224731 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:17:28.224817 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 17:17:28.477615 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:17:28.478012 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 17:17:28.478130 extracting modules file /var/lib/lava/dispatcher/tmp/11661468/tftp-deploy-27_944sv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11661468/extract-overlay-ramdisk-ca5fp2am/ramdisk
180 17:17:28.491859 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:17:28.491979 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 17:17:28.492066 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11661468/compress-overlay-h3174nqo/overlay-1.4.2.4.tar.gz to ramdisk
183 17:17:28.492138 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11661468/compress-overlay-h3174nqo/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11661468/extract-overlay-ramdisk-ca5fp2am/ramdisk
184 17:17:28.501262 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:17:28.501377 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 17:17:28.501468 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:17:28.501559 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 17:17:28.501639 Building ramdisk /var/lib/lava/dispatcher/tmp/11661468/extract-overlay-ramdisk-ca5fp2am/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11661468/extract-overlay-ramdisk-ca5fp2am/ramdisk
189 17:17:28.632158 >> 49788 blocks
190 17:17:29.459269 rename /var/lib/lava/dispatcher/tmp/11661468/extract-overlay-ramdisk-ca5fp2am/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11661468/tftp-deploy-27_944sv/ramdisk/ramdisk.cpio.gz
191 17:17:29.459718 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:17:29.459840 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 17:17:29.459942 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 17:17:29.460037 No mkimage arch provided, not using FIT.
195 17:17:29.460126 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:17:29.460243 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:17:29.460349 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:17:29.460439 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 17:17:29.460517 No LXC device requested
200 17:17:29.460594 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:17:29.460683 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 17:17:29.460763 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:17:29.460842 Checking files for TFTP limit of 4294967296 bytes.
204 17:17:29.461250 end: 1 tftp-deploy (duration 00:00:02) [common]
205 17:17:29.461353 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:17:29.461443 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:17:29.461562 substitutions:
208 17:17:29.461656 - {DTB}: None
209 17:17:29.461717 - {INITRD}: 11661468/tftp-deploy-27_944sv/ramdisk/ramdisk.cpio.gz
210 17:17:29.461776 - {KERNEL}: 11661468/tftp-deploy-27_944sv/kernel/bzImage
211 17:17:29.461832 - {LAVA_MAC}: None
212 17:17:29.461888 - {PRESEED_CONFIG}: None
213 17:17:29.461943 - {PRESEED_LOCAL}: None
214 17:17:29.461997 - {RAMDISK}: 11661468/tftp-deploy-27_944sv/ramdisk/ramdisk.cpio.gz
215 17:17:29.462051 - {ROOT_PART}: None
216 17:17:29.462105 - {ROOT}: None
217 17:17:29.462157 - {SERVER_IP}: 192.168.201.1
218 17:17:29.462210 - {TEE}: None
219 17:17:29.462263 Parsed boot commands:
220 17:17:29.462318 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:17:29.462491 Parsed boot commands: tftpboot 192.168.201.1 11661468/tftp-deploy-27_944sv/kernel/bzImage 11661468/tftp-deploy-27_944sv/kernel/cmdline 11661468/tftp-deploy-27_944sv/ramdisk/ramdisk.cpio.gz
222 17:17:29.462576 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:17:29.462662 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:17:29.462752 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:17:29.462914 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:17:29.462988 Not connected, no need to disconnect.
227 17:17:29.463062 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:17:29.463171 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:17:29.463237 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-2'
230 17:17:29.467025 Setting prompt string to ['lava-test: # ']
231 17:17:29.467387 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:17:29.467493 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:17:29.467588 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:17:29.467723 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:17:29.467954 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
236 17:17:34.623989 >> Command sent successfully.
237 17:17:34.635706 Returned 0 in 5 seconds
238 17:17:34.737092 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 17:17:34.738972 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 17:17:34.739523 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 17:17:34.740031 Setting prompt string to 'Starting depthcharge on Voema...'
243 17:17:34.740430 Changing prompt to 'Starting depthcharge on Voema...'
244 17:17:34.740834 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 17:17:34.742110 [Enter `^Ec?' for help]
246 17:17:36.331929
247 17:17:36.332558
248 17:17:36.341569 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 17:17:36.347991 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 17:17:36.351526 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 17:17:36.354884 CPU: AES supported, TXT NOT supported, VT supported
252 17:17:36.361921 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 17:17:36.368527 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 17:17:36.371252 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 17:17:36.374678 VBOOT: Loading verstage.
256 17:17:36.381404 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 17:17:36.384784 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 17:17:36.388019 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 17:17:36.398549 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 17:17:36.405349 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 17:17:36.405823
262 17:17:36.406196
263 17:17:36.418179 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 17:17:36.432587 Probing TPM: . done!
265 17:17:36.435546 TPM ready after 0 ms
266 17:17:36.439184 Connected to device vid:did:rid of 1ae0:0028:00
267 17:17:36.450192 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
268 17:17:36.456781 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 17:17:36.460132 Initialized TPM device CR50 revision 0
270 17:17:36.512018 tlcl_send_startup: Startup return code is 0
271 17:17:36.512602 TPM: setup succeeded
272 17:17:36.527163 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 17:17:36.541417 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 17:17:36.554519 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 17:17:36.564491 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 17:17:36.567616 Chrome EC: UHEPI supported
277 17:17:36.571187 Phase 1
278 17:17:36.574218 FMAP: area GBB found @ 1805000 (458752 bytes)
279 17:17:36.584494 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 17:17:36.590704 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 17:17:36.597312 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 17:17:36.604119 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 17:17:36.607636 Recovery requested (1009000e)
284 17:17:36.611182 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 17:17:36.622470 tlcl_extend: response is 0
286 17:17:36.629057 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 17:17:36.639440 tlcl_extend: response is 0
288 17:17:36.645760 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 17:17:36.651996 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 17:17:36.658894 BS: verstage times (exec / console): total (unknown) / 142 ms
291 17:17:36.659372
292 17:17:36.659744
293 17:17:36.672021 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 17:17:36.678624 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 17:17:36.682008 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 17:17:36.685376 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 17:17:36.691908 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 17:17:36.695487 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 17:17:36.698828 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 17:17:36.701985 TCO_STS: 0000 0000
301 17:17:36.705384 GEN_PMCON: d0015038 00002200
302 17:17:36.708709 GBLRST_CAUSE: 00000000 00000000
303 17:17:36.709181 HPR_CAUSE0: 00000000
304 17:17:36.711977 prev_sleep_state 5
305 17:17:36.715306 Boot Count incremented to 24227
306 17:17:36.721617 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 17:17:36.728827 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 17:17:36.738618 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 17:17:36.745144 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 17:17:36.748681 Chrome EC: UHEPI supported
311 17:17:36.754941 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 17:17:36.766035 Probing TPM: done!
313 17:17:36.772729 Connected to device vid:did:rid of 1ae0:0028:00
314 17:17:36.782906 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
315 17:17:36.792517 Initialized TPM device CR50 revision 0
316 17:17:36.802409 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 17:17:36.808676 MRC: Hash idx 0x100b comparison successful.
318 17:17:36.812022 MRC cache found, size faa8
319 17:17:36.812512 bootmode is set to: 2
320 17:17:36.815613 SPD index = 0
321 17:17:36.822143 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 17:17:36.825542 SPD: module type is LPDDR4X
323 17:17:36.828716 SPD: module part number is MT53E512M64D4NW-046
324 17:17:36.835854 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 17:17:36.842236 SPD: device width 16 bits, bus width 16 bits
326 17:17:36.845634 SPD: module size is 1024 MB (per channel)
327 17:17:37.277512 CBMEM:
328 17:17:37.280527 IMD: root @ 0x76fff000 254 entries.
329 17:17:37.284223 IMD: root @ 0x76ffec00 62 entries.
330 17:17:37.287133 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 17:17:37.293559 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 17:17:37.296838 External stage cache:
333 17:17:37.300479 IMD: root @ 0x7b3ff000 254 entries.
334 17:17:37.303453 IMD: root @ 0x7b3fec00 62 entries.
335 17:17:37.319242 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 17:17:37.325454 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 17:17:37.332062 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 17:17:37.346685 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 17:17:37.353103 cse_lite: Skip switching to RW in the recovery path
340 17:17:37.353672 8 DIMMs found
341 17:17:37.354061 SMM Memory Map
342 17:17:37.359933 SMRAM : 0x7b000000 0x800000
343 17:17:37.363460 Subregion 0: 0x7b000000 0x200000
344 17:17:37.366150 Subregion 1: 0x7b200000 0x200000
345 17:17:37.370404 Subregion 2: 0x7b400000 0x400000
346 17:17:37.371060 top_of_ram = 0x77000000
347 17:17:37.376912 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 17:17:37.380235 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 17:17:37.387303 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 17:17:37.390577 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 17:17:37.400537 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 17:17:37.406697 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 17:17:37.417119 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 17:17:37.419760 Processing 211 relocs. Offset value of 0x74c0b000
355 17:17:37.429160 BS: romstage times (exec / console): total (unknown) / 277 ms
356 17:17:37.435201
357 17:17:37.435773
358 17:17:37.445410 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 17:17:37.448824 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 17:17:37.458833 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 17:17:37.465025 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 17:17:37.472229 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 17:17:37.478163 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 17:17:37.525773 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 17:17:37.531744 Processing 5008 relocs. Offset value of 0x75d98000
366 17:17:37.535279 BS: postcar times (exec / console): total (unknown) / 59 ms
367 17:17:37.538437
368 17:17:37.539069
369 17:17:37.548201 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 17:17:37.548830 Normal boot
371 17:17:37.551642 FW_CONFIG value is 0x804c02
372 17:17:37.555459 PCI: 00:07.0 disabled by fw_config
373 17:17:37.558306 PCI: 00:07.1 disabled by fw_config
374 17:17:37.562270 PCI: 00:0d.2 disabled by fw_config
375 17:17:37.565767 PCI: 00:1c.7 disabled by fw_config
376 17:17:37.572015 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 17:17:37.578437 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 17:17:37.581969 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 17:17:37.585390 GENERIC: 0.0 disabled by fw_config
380 17:17:37.588935 GENERIC: 1.0 disabled by fw_config
381 17:17:37.595275 fw_config match found: DB_USB=USB3_ACTIVE
382 17:17:37.598657 fw_config match found: DB_USB=USB3_ACTIVE
383 17:17:37.602005 fw_config match found: DB_USB=USB3_ACTIVE
384 17:17:37.605356 fw_config match found: DB_USB=USB3_ACTIVE
385 17:17:37.612229 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 17:17:37.618663 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 17:17:37.628557 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 17:17:37.635074 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 17:17:37.638283 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 17:17:37.645344 microcode: Update skipped, already up-to-date
391 17:17:37.651518 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 17:17:37.678834 Detected 4 core, 8 thread CPU.
393 17:17:37.682606 Setting up SMI for CPU
394 17:17:37.685501 IED base = 0x7b400000
395 17:17:37.686075 IED size = 0x00400000
396 17:17:37.688587 Will perform SMM setup.
397 17:17:37.695383 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 17:17:37.701881 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 17:17:37.708544 Processing 16 relocs. Offset value of 0x00030000
400 17:17:37.711668 Attempting to start 7 APs
401 17:17:37.715244 Waiting for 10ms after sending INIT.
402 17:17:37.731079 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 17:17:37.734001 AP: slot 7 apic_id 6.
404 17:17:37.737458 AP: slot 3 apic_id 7.
405 17:17:37.737931 AP: slot 2 apic_id 3.
406 17:17:37.740913 AP: slot 6 apic_id 2.
407 17:17:37.744050 AP: slot 5 apic_id 4.
408 17:17:37.744658 done.
409 17:17:37.745042 AP: slot 4 apic_id 5.
410 17:17:37.750917 Waiting for 2nd SIPI to complete...done.
411 17:17:37.757356 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 17:17:37.764128 Processing 13 relocs. Offset value of 0x00038000
413 17:17:37.767590 Unable to locate Global NVS
414 17:17:37.773918 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 17:17:37.777285 Installing permanent SMM handler to 0x7b000000
416 17:17:37.787288 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 17:17:37.790597 Processing 794 relocs. Offset value of 0x7b010000
418 17:17:37.800526 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 17:17:37.803725 Processing 13 relocs. Offset value of 0x7b008000
420 17:17:37.810050 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 17:17:37.817069 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 17:17:37.823431 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 17:17:37.826750 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 17:17:37.833469 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 17:17:37.839877 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 17:17:37.847224 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 17:17:37.849822 Unable to locate Global NVS
428 17:17:37.856892 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 17:17:37.860437 Clearing SMI status registers
430 17:17:37.861072 SMI_STS: PM1
431 17:17:37.862996 PM1_STS: PWRBTN
432 17:17:37.869815 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 17:17:37.872932 In relocation handler: CPU 0
434 17:17:37.876300 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 17:17:37.883105 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 17:17:37.885833 Relocation complete.
437 17:17:37.892780 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 17:17:37.896097 In relocation handler: CPU 1
439 17:17:37.899337 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 17:17:37.902821 Relocation complete.
441 17:17:37.909046 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
442 17:17:37.912625 In relocation handler: CPU 6
443 17:17:37.915929 New SMBASE=0x7affe800 IEDBASE=0x7b400000
444 17:17:37.918843 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 17:17:37.922313 Relocation complete.
446 17:17:37.929060 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
447 17:17:37.932543 In relocation handler: CPU 2
448 17:17:37.935634 New SMBASE=0x7afff800 IEDBASE=0x7b400000
449 17:17:37.938940 Relocation complete.
450 17:17:37.945945 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
451 17:17:37.949496 In relocation handler: CPU 3
452 17:17:37.952311 New SMBASE=0x7afff400 IEDBASE=0x7b400000
453 17:17:37.955826 Relocation complete.
454 17:17:37.962314 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
455 17:17:37.965619 In relocation handler: CPU 7
456 17:17:37.968979 New SMBASE=0x7affe400 IEDBASE=0x7b400000
457 17:17:37.975063 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 17:17:37.975619 Relocation complete.
459 17:17:37.985542 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
460 17:17:37.988544 In relocation handler: CPU 4
461 17:17:37.991757 New SMBASE=0x7afff000 IEDBASE=0x7b400000
462 17:17:37.992324 Relocation complete.
463 17:17:38.002049 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
464 17:17:38.005251 In relocation handler: CPU 5
465 17:17:38.008243 New SMBASE=0x7affec00 IEDBASE=0x7b400000
466 17:17:38.011599 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 17:17:38.015060 Relocation complete.
468 17:17:38.018616 Initializing CPU #0
469 17:17:38.021415 CPU: vendor Intel device 806c1
470 17:17:38.024975 CPU: family 06, model 8c, stepping 01
471 17:17:38.028642 Clearing out pending MCEs
472 17:17:38.029278 Setting up local APIC...
473 17:17:38.031353 apic_id: 0x00 done.
474 17:17:38.035180 Turbo is available but hidden
475 17:17:38.039433 Turbo is available and visible
476 17:17:38.042857 microcode: Update skipped, already up-to-date
477 17:17:38.043343 CPU #0 initialized
478 17:17:38.046347 Initializing CPU #3
479 17:17:38.050251 Initializing CPU #7
480 17:17:38.053082 CPU: vendor Intel device 806c1
481 17:17:38.056591 CPU: family 06, model 8c, stepping 01
482 17:17:38.060135 CPU: vendor Intel device 806c1
483 17:17:38.062834 CPU: family 06, model 8c, stepping 01
484 17:17:38.066675 Clearing out pending MCEs
485 17:17:38.067292 Clearing out pending MCEs
486 17:17:38.069631 Setting up local APIC...
487 17:17:38.073173 Initializing CPU #6
488 17:17:38.073740 Initializing CPU #2
489 17:17:38.076715 CPU: vendor Intel device 806c1
490 17:17:38.079531 CPU: family 06, model 8c, stepping 01
491 17:17:38.083278 Initializing CPU #5
492 17:17:38.086687 Initializing CPU #4
493 17:17:38.089694 CPU: vendor Intel device 806c1
494 17:17:38.092957 CPU: family 06, model 8c, stepping 01
495 17:17:38.096412 CPU: vendor Intel device 806c1
496 17:17:38.099328 CPU: family 06, model 8c, stepping 01
497 17:17:38.102832 Clearing out pending MCEs
498 17:17:38.103535 Clearing out pending MCEs
499 17:17:38.106114 Setting up local APIC...
500 17:17:38.109560 Initializing CPU #1
501 17:17:38.112953 apic_id: 0x07 done.
502 17:17:38.113423 Setting up local APIC...
503 17:17:38.115963 Clearing out pending MCEs
504 17:17:38.119396 CPU: vendor Intel device 806c1
505 17:17:38.122685 CPU: family 06, model 8c, stepping 01
506 17:17:38.125858 Setting up local APIC...
507 17:17:38.129335 microcode: Update skipped, already up-to-date
508 17:17:38.132865 apic_id: 0x06 done.
509 17:17:38.136113 CPU #3 initialized
510 17:17:38.139717 microcode: Update skipped, already up-to-date
511 17:17:38.143138 CPU: vendor Intel device 806c1
512 17:17:38.146313 CPU: family 06, model 8c, stepping 01
513 17:17:38.149330 Setting up local APIC...
514 17:17:38.152907 Clearing out pending MCEs
515 17:17:38.153475 apic_id: 0x02 done.
516 17:17:38.155646 Setting up local APIC...
517 17:17:38.159493 Clearing out pending MCEs
518 17:17:38.160060 CPU #7 initialized
519 17:17:38.162930 apic_id: 0x03 done.
520 17:17:38.165597 microcode: Update skipped, already up-to-date
521 17:17:38.172897 microcode: Update skipped, already up-to-date
522 17:17:38.173462 CPU #6 initialized
523 17:17:38.175610 CPU #2 initialized
524 17:17:38.179146 Setting up local APIC...
525 17:17:38.179610 apic_id: 0x04 done.
526 17:17:38.182881 apic_id: 0x05 done.
527 17:17:38.185590 microcode: Update skipped, already up-to-date
528 17:17:38.192777 microcode: Update skipped, already up-to-date
529 17:17:38.193344 CPU #5 initialized
530 17:17:38.195395 CPU #4 initialized
531 17:17:38.199024 apic_id: 0x01 done.
532 17:17:38.202502 microcode: Update skipped, already up-to-date
533 17:17:38.205541 CPU #1 initialized
534 17:17:38.208785 bsp_do_flight_plan done after 455 msecs.
535 17:17:38.212268 CPU: frequency set to 4000 MHz
536 17:17:38.212736 Enabling SMIs.
537 17:17:38.218566 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 17:17:38.236068 SATAXPCIE1 indicates PCIe NVMe is present
539 17:17:38.239307 Probing TPM: done!
540 17:17:38.242680 Connected to device vid:did:rid of 1ae0:0028:00
541 17:17:38.252912 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
542 17:17:38.256257 Initialized TPM device CR50 revision 0
543 17:17:38.259486 Enabling S0i3.4
544 17:17:38.266013 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 17:17:38.269587 Found a VBT of 8704 bytes after decompression
546 17:17:38.276078 cse_lite: CSE RO boot. HybridStorageMode disabled
547 17:17:38.283063 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 17:17:38.359003 FSPS returned 0
549 17:17:38.361942 Executing Phase 1 of FspMultiPhaseSiInit
550 17:17:38.372187 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 17:17:38.375699 port C0 DISC req: usage 1 usb3 1 usb2 5
552 17:17:38.378439 Raw Buffer output 0 00000511
553 17:17:38.381893 Raw Buffer output 1 00000000
554 17:17:38.385502 pmc_send_ipc_cmd succeeded
555 17:17:38.392670 port C1 DISC req: usage 1 usb3 2 usb2 3
556 17:17:38.393237 Raw Buffer output 0 00000321
557 17:17:38.395388 Raw Buffer output 1 00000000
558 17:17:38.399649 pmc_send_ipc_cmd succeeded
559 17:17:38.404882 Detected 4 core, 8 thread CPU.
560 17:17:38.408381 Detected 4 core, 8 thread CPU.
561 17:17:38.642278 Display FSP Version Info HOB
562 17:17:38.645758 Reference Code - CPU = a.0.4c.31
563 17:17:38.649225 uCode Version = 0.0.0.86
564 17:17:38.652641 TXT ACM version = ff.ff.ff.ffff
565 17:17:38.655232 Reference Code - ME = a.0.4c.31
566 17:17:38.658610 MEBx version = 0.0.0.0
567 17:17:38.662493 ME Firmware Version = Consumer SKU
568 17:17:38.665715 Reference Code - PCH = a.0.4c.31
569 17:17:38.669162 PCH-CRID Status = Disabled
570 17:17:38.672095 PCH-CRID Original Value = ff.ff.ff.ffff
571 17:17:38.675674 PCH-CRID New Value = ff.ff.ff.ffff
572 17:17:38.678881 OPROM - RST - RAID = ff.ff.ff.ffff
573 17:17:38.682362 PCH Hsio Version = 4.0.0.0
574 17:17:38.685378 Reference Code - SA - System Agent = a.0.4c.31
575 17:17:38.688919 Reference Code - MRC = 2.0.0.1
576 17:17:38.692109 SA - PCIe Version = a.0.4c.31
577 17:17:38.695610 SA-CRID Status = Disabled
578 17:17:38.698872 SA-CRID Original Value = 0.0.0.1
579 17:17:38.701877 SA-CRID New Value = 0.0.0.1
580 17:17:38.705050 OPROM - VBIOS = ff.ff.ff.ffff
581 17:17:38.708505 IO Manageability Engine FW Version = 11.1.4.0
582 17:17:38.711894 PHY Build Version = 0.0.0.e0
583 17:17:38.715528 Thunderbolt(TM) FW Version = 0.0.0.0
584 17:17:38.722054 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 17:17:38.725054 ITSS IRQ Polarities Before:
586 17:17:38.725527 IPC0: 0xffffffff
587 17:17:38.728374 IPC1: 0xffffffff
588 17:17:38.728842 IPC2: 0xffffffff
589 17:17:38.731868 IPC3: 0xffffffff
590 17:17:38.735369 ITSS IRQ Polarities After:
591 17:17:38.735839 IPC0: 0xffffffff
592 17:17:38.738879 IPC1: 0xffffffff
593 17:17:38.739348 IPC2: 0xffffffff
594 17:17:38.741651 IPC3: 0xffffffff
595 17:17:38.745312 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 17:17:38.758514 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 17:17:38.768424 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 17:17:38.781428 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 17:17:38.788440 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 17:17:38.788921 Enumerating buses...
601 17:17:38.794686 Show all devs... Before device enumeration.
602 17:17:38.798434 Root Device: enabled 1
603 17:17:38.798970 DOMAIN: 0000: enabled 1
604 17:17:38.801386 CPU_CLUSTER: 0: enabled 1
605 17:17:38.804991 PCI: 00:00.0: enabled 1
606 17:17:38.808255 PCI: 00:02.0: enabled 1
607 17:17:38.808727 PCI: 00:04.0: enabled 1
608 17:17:38.811565 PCI: 00:05.0: enabled 1
609 17:17:38.814872 PCI: 00:06.0: enabled 0
610 17:17:38.815348 PCI: 00:07.0: enabled 0
611 17:17:38.818356 PCI: 00:07.1: enabled 0
612 17:17:38.821315 PCI: 00:07.2: enabled 0
613 17:17:38.824829 PCI: 00:07.3: enabled 0
614 17:17:38.825317 PCI: 00:08.0: enabled 1
615 17:17:38.828482 PCI: 00:09.0: enabled 0
616 17:17:38.831442 PCI: 00:0a.0: enabled 0
617 17:17:38.835011 PCI: 00:0d.0: enabled 1
618 17:17:38.835571 PCI: 00:0d.1: enabled 0
619 17:17:38.838219 PCI: 00:0d.2: enabled 0
620 17:17:38.841721 PCI: 00:0d.3: enabled 0
621 17:17:38.844914 PCI: 00:0e.0: enabled 0
622 17:17:38.845492 PCI: 00:10.2: enabled 1
623 17:17:38.848330 PCI: 00:10.6: enabled 0
624 17:17:38.851653 PCI: 00:10.7: enabled 0
625 17:17:38.854463 PCI: 00:12.0: enabled 0
626 17:17:38.855019 PCI: 00:12.6: enabled 0
627 17:17:38.857723 PCI: 00:13.0: enabled 0
628 17:17:38.861187 PCI: 00:14.0: enabled 1
629 17:17:38.861666 PCI: 00:14.1: enabled 0
630 17:17:38.864822 PCI: 00:14.2: enabled 1
631 17:17:38.868202 PCI: 00:14.3: enabled 1
632 17:17:38.871081 PCI: 00:15.0: enabled 1
633 17:17:38.871703 PCI: 00:15.1: enabled 1
634 17:17:38.874514 PCI: 00:15.2: enabled 1
635 17:17:38.877357 PCI: 00:15.3: enabled 1
636 17:17:38.880847 PCI: 00:16.0: enabled 1
637 17:17:38.881314 PCI: 00:16.1: enabled 0
638 17:17:38.884324 PCI: 00:16.2: enabled 0
639 17:17:38.887651 PCI: 00:16.3: enabled 0
640 17:17:38.890992 PCI: 00:16.4: enabled 0
641 17:17:38.891551 PCI: 00:16.5: enabled 0
642 17:17:38.894253 PCI: 00:17.0: enabled 1
643 17:17:38.897553 PCI: 00:19.0: enabled 0
644 17:17:38.900923 PCI: 00:19.1: enabled 1
645 17:17:38.901391 PCI: 00:19.2: enabled 0
646 17:17:38.904215 PCI: 00:1c.0: enabled 1
647 17:17:38.907843 PCI: 00:1c.1: enabled 0
648 17:17:38.910835 PCI: 00:1c.2: enabled 0
649 17:17:38.911309 PCI: 00:1c.3: enabled 0
650 17:17:38.913685 PCI: 00:1c.4: enabled 0
651 17:17:38.917013 PCI: 00:1c.5: enabled 0
652 17:17:38.921146 PCI: 00:1c.6: enabled 1
653 17:17:38.921712 PCI: 00:1c.7: enabled 0
654 17:17:38.923772 PCI: 00:1d.0: enabled 1
655 17:17:38.927073 PCI: 00:1d.1: enabled 0
656 17:17:38.927590 PCI: 00:1d.2: enabled 1
657 17:17:38.930641 PCI: 00:1d.3: enabled 0
658 17:17:38.934318 PCI: 00:1e.0: enabled 1
659 17:17:38.937660 PCI: 00:1e.1: enabled 0
660 17:17:38.938242 PCI: 00:1e.2: enabled 1
661 17:17:38.940295 PCI: 00:1e.3: enabled 1
662 17:17:38.944083 PCI: 00:1f.0: enabled 1
663 17:17:38.947655 PCI: 00:1f.1: enabled 0
664 17:17:38.948220 PCI: 00:1f.2: enabled 1
665 17:17:38.951029 PCI: 00:1f.3: enabled 1
666 17:17:38.953922 PCI: 00:1f.4: enabled 0
667 17:17:38.957096 PCI: 00:1f.5: enabled 1
668 17:17:38.957564 PCI: 00:1f.6: enabled 0
669 17:17:38.960865 PCI: 00:1f.7: enabled 0
670 17:17:38.964108 APIC: 00: enabled 1
671 17:17:38.964676 GENERIC: 0.0: enabled 1
672 17:17:38.967146 GENERIC: 0.0: enabled 1
673 17:17:38.970095 GENERIC: 1.0: enabled 1
674 17:17:38.974091 GENERIC: 0.0: enabled 1
675 17:17:38.974658 GENERIC: 1.0: enabled 1
676 17:17:38.977045 USB0 port 0: enabled 1
677 17:17:38.980207 GENERIC: 0.0: enabled 1
678 17:17:38.983715 USB0 port 0: enabled 1
679 17:17:38.984431 GENERIC: 0.0: enabled 1
680 17:17:38.986548 I2C: 00:1a: enabled 1
681 17:17:38.990193 I2C: 00:31: enabled 1
682 17:17:38.990743 I2C: 00:32: enabled 1
683 17:17:38.993644 I2C: 00:10: enabled 1
684 17:17:38.996649 I2C: 00:15: enabled 1
685 17:17:38.997118 GENERIC: 0.0: enabled 0
686 17:17:39.000513 GENERIC: 1.0: enabled 0
687 17:17:39.003664 GENERIC: 0.0: enabled 1
688 17:17:39.004132 SPI: 00: enabled 1
689 17:17:39.006384 SPI: 00: enabled 1
690 17:17:39.009789 PNP: 0c09.0: enabled 1
691 17:17:39.013148 GENERIC: 0.0: enabled 1
692 17:17:39.013654 USB3 port 0: enabled 1
693 17:17:39.016757 USB3 port 1: enabled 1
694 17:17:39.020191 USB3 port 2: enabled 0
695 17:17:39.020760 USB3 port 3: enabled 0
696 17:17:39.023317 USB2 port 0: enabled 0
697 17:17:39.026165 USB2 port 1: enabled 1
698 17:17:39.026591 USB2 port 2: enabled 1
699 17:17:39.029795 USB2 port 3: enabled 0
700 17:17:39.033489 USB2 port 4: enabled 1
701 17:17:39.037028 USB2 port 5: enabled 0
702 17:17:39.037594 USB2 port 6: enabled 0
703 17:17:39.040067 USB2 port 7: enabled 0
704 17:17:39.042839 USB2 port 8: enabled 0
705 17:17:39.043337 USB2 port 9: enabled 0
706 17:17:39.046387 USB3 port 0: enabled 0
707 17:17:39.049553 USB3 port 1: enabled 1
708 17:17:39.053176 USB3 port 2: enabled 0
709 17:17:39.053741 USB3 port 3: enabled 0
710 17:17:39.056013 GENERIC: 0.0: enabled 1
711 17:17:39.059387 GENERIC: 1.0: enabled 1
712 17:17:39.059871 APIC: 01: enabled 1
713 17:17:39.062978 APIC: 03: enabled 1
714 17:17:39.066522 APIC: 07: enabled 1
715 17:17:39.067149 APIC: 05: enabled 1
716 17:17:39.069875 APIC: 04: enabled 1
717 17:17:39.070440 APIC: 02: enabled 1
718 17:17:39.073233 APIC: 06: enabled 1
719 17:17:39.075967 Compare with tree...
720 17:17:39.076535 Root Device: enabled 1
721 17:17:39.079641 DOMAIN: 0000: enabled 1
722 17:17:39.083167 PCI: 00:00.0: enabled 1
723 17:17:39.086635 PCI: 00:02.0: enabled 1
724 17:17:39.089496 PCI: 00:04.0: enabled 1
725 17:17:39.090059 GENERIC: 0.0: enabled 1
726 17:17:39.093052 PCI: 00:05.0: enabled 1
727 17:17:39.095845 PCI: 00:06.0: enabled 0
728 17:17:39.099629 PCI: 00:07.0: enabled 0
729 17:17:39.103152 GENERIC: 0.0: enabled 1
730 17:17:39.103718 PCI: 00:07.1: enabled 0
731 17:17:39.105803 GENERIC: 1.0: enabled 1
732 17:17:39.109208 PCI: 00:07.2: enabled 0
733 17:17:39.112573 GENERIC: 0.0: enabled 1
734 17:17:39.116181 PCI: 00:07.3: enabled 0
735 17:17:39.119265 GENERIC: 1.0: enabled 1
736 17:17:39.119833 PCI: 00:08.0: enabled 1
737 17:17:39.122617 PCI: 00:09.0: enabled 0
738 17:17:39.125814 PCI: 00:0a.0: enabled 0
739 17:17:39.129096 PCI: 00:0d.0: enabled 1
740 17:17:39.129568 USB0 port 0: enabled 1
741 17:17:39.132504 USB3 port 0: enabled 1
742 17:17:39.135785 USB3 port 1: enabled 1
743 17:17:39.138635 USB3 port 2: enabled 0
744 17:17:39.142266 USB3 port 3: enabled 0
745 17:17:39.145538 PCI: 00:0d.1: enabled 0
746 17:17:39.146105 PCI: 00:0d.2: enabled 0
747 17:17:39.148788 GENERIC: 0.0: enabled 1
748 17:17:39.152445 PCI: 00:0d.3: enabled 0
749 17:17:39.155513 PCI: 00:0e.0: enabled 0
750 17:17:39.158579 PCI: 00:10.2: enabled 1
751 17:17:39.159147 PCI: 00:10.6: enabled 0
752 17:17:39.162082 PCI: 00:10.7: enabled 0
753 17:17:39.165372 PCI: 00:12.0: enabled 0
754 17:17:39.168661 PCI: 00:12.6: enabled 0
755 17:17:39.172435 PCI: 00:13.0: enabled 0
756 17:17:39.173004 PCI: 00:14.0: enabled 1
757 17:17:39.175182 USB0 port 0: enabled 1
758 17:17:39.178863 USB2 port 0: enabled 0
759 17:17:39.181786 USB2 port 1: enabled 1
760 17:17:39.185197 USB2 port 2: enabled 1
761 17:17:39.188972 USB2 port 3: enabled 0
762 17:17:39.189534 USB2 port 4: enabled 1
763 17:17:39.192337 USB2 port 5: enabled 0
764 17:17:39.195503 USB2 port 6: enabled 0
765 17:17:39.198886 USB2 port 7: enabled 0
766 17:17:39.201978 USB2 port 8: enabled 0
767 17:17:39.202547 USB2 port 9: enabled 0
768 17:17:39.205429 USB3 port 0: enabled 0
769 17:17:39.208365 USB3 port 1: enabled 1
770 17:17:39.211529 USB3 port 2: enabled 0
771 17:17:39.214907 USB3 port 3: enabled 0
772 17:17:39.218466 PCI: 00:14.1: enabled 0
773 17:17:39.219092 PCI: 00:14.2: enabled 1
774 17:17:39.222050 PCI: 00:14.3: enabled 1
775 17:17:39.225127 GENERIC: 0.0: enabled 1
776 17:17:39.228227 PCI: 00:15.0: enabled 1
777 17:17:39.231734 I2C: 00:1a: enabled 1
778 17:17:39.232297 I2C: 00:31: enabled 1
779 17:17:39.235312 I2C: 00:32: enabled 1
780 17:17:39.238697 PCI: 00:15.1: enabled 1
781 17:17:39.241863 I2C: 00:10: enabled 1
782 17:17:39.242426 PCI: 00:15.2: enabled 1
783 17:17:39.244930 PCI: 00:15.3: enabled 1
784 17:17:39.248288 PCI: 00:16.0: enabled 1
785 17:17:39.251746 PCI: 00:16.1: enabled 0
786 17:17:39.254938 PCI: 00:16.2: enabled 0
787 17:17:39.255505 PCI: 00:16.3: enabled 0
788 17:17:39.257983 PCI: 00:16.4: enabled 0
789 17:17:39.261566 PCI: 00:16.5: enabled 0
790 17:17:39.264869 PCI: 00:17.0: enabled 1
791 17:17:39.268846 PCI: 00:19.0: enabled 0
792 17:17:39.269441 PCI: 00:19.1: enabled 1
793 17:17:39.271198 I2C: 00:15: enabled 1
794 17:17:39.274596 PCI: 00:19.2: enabled 0
795 17:17:39.278328 PCI: 00:1d.0: enabled 1
796 17:17:39.281030 GENERIC: 0.0: enabled 1
797 17:17:39.281504 PCI: 00:1e.0: enabled 1
798 17:17:39.331254 PCI: 00:1e.1: enabled 0
799 17:17:39.331833 PCI: 00:1e.2: enabled 1
800 17:17:39.332349 SPI: 00: enabled 1
801 17:17:39.332710 PCI: 00:1e.3: enabled 1
802 17:17:39.333048 SPI: 00: enabled 1
803 17:17:39.333377 PCI: 00:1f.0: enabled 1
804 17:17:39.333698 PNP: 0c09.0: enabled 1
805 17:17:39.334013 PCI: 00:1f.1: enabled 0
806 17:17:39.334324 PCI: 00:1f.2: enabled 1
807 17:17:39.334635 GENERIC: 0.0: enabled 1
808 17:17:39.335007 GENERIC: 0.0: enabled 1
809 17:17:39.335358 GENERIC: 1.0: enabled 1
810 17:17:39.336059 PCI: 00:1f.3: enabled 1
811 17:17:39.336464 PCI: 00:1f.4: enabled 0
812 17:17:39.336788 PCI: 00:1f.5: enabled 1
813 17:17:39.337115 PCI: 00:1f.6: enabled 0
814 17:17:39.337587 PCI: 00:1f.7: enabled 0
815 17:17:39.338073 CPU_CLUSTER: 0: enabled 1
816 17:17:39.338441 APIC: 00: enabled 1
817 17:17:39.347668 APIC: 01: enabled 1
818 17:17:39.348314 APIC: 03: enabled 1
819 17:17:39.348701 APIC: 07: enabled 1
820 17:17:39.349051 APIC: 05: enabled 1
821 17:17:39.349384 APIC: 04: enabled 1
822 17:17:39.353726 APIC: 02: enabled 1
823 17:17:39.354325 APIC: 06: enabled 1
824 17:17:39.354701 Root Device scanning...
825 17:17:39.356636 scan_static_bus for Root Device
826 17:17:39.357106 DOMAIN: 0000 enabled
827 17:17:39.360074 CPU_CLUSTER: 0 enabled
828 17:17:39.363627 DOMAIN: 0000 scanning...
829 17:17:39.366429 PCI: pci_scan_bus for bus 00
830 17:17:39.370066 PCI: 00:00.0 [8086/0000] ops
831 17:17:39.373303 PCI: 00:00.0 [8086/9a12] enabled
832 17:17:39.376837 PCI: 00:02.0 [8086/0000] bus ops
833 17:17:39.379879 PCI: 00:02.0 [8086/9a40] enabled
834 17:17:39.383428 PCI: 00:04.0 [8086/0000] bus ops
835 17:17:39.386449 PCI: 00:04.0 [8086/9a03] enabled
836 17:17:39.389577 PCI: 00:05.0 [8086/9a19] enabled
837 17:17:39.393485 PCI: 00:07.0 [0000/0000] hidden
838 17:17:39.396599 PCI: 00:08.0 [8086/9a11] enabled
839 17:17:39.399841 PCI: 00:0a.0 [8086/9a0d] disabled
840 17:17:39.402811 PCI: 00:0d.0 [8086/0000] bus ops
841 17:17:39.406583 PCI: 00:0d.0 [8086/9a13] enabled
842 17:17:39.409850 PCI: 00:14.0 [8086/0000] bus ops
843 17:17:39.412788 PCI: 00:14.0 [8086/a0ed] enabled
844 17:17:39.416251 PCI: 00:14.2 [8086/a0ef] enabled
845 17:17:39.419849 PCI: 00:14.3 [8086/0000] bus ops
846 17:17:39.422619 PCI: 00:14.3 [8086/a0f0] enabled
847 17:17:39.425928 PCI: 00:15.0 [8086/0000] bus ops
848 17:17:39.429536 PCI: 00:15.0 [8086/a0e8] enabled
849 17:17:39.433099 PCI: 00:15.1 [8086/0000] bus ops
850 17:17:39.436095 PCI: 00:15.1 [8086/a0e9] enabled
851 17:17:39.439371 PCI: 00:15.2 [8086/0000] bus ops
852 17:17:39.443238 PCI: 00:15.2 [8086/a0ea] enabled
853 17:17:39.446116 PCI: 00:15.3 [8086/0000] bus ops
854 17:17:39.449306 PCI: 00:15.3 [8086/a0eb] enabled
855 17:17:39.453049 PCI: 00:16.0 [8086/0000] ops
856 17:17:39.455784 PCI: 00:16.0 [8086/a0e0] enabled
857 17:17:39.459319 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 17:17:39.462877 PCI: 00:19.0 [8086/0000] bus ops
859 17:17:39.465918 PCI: 00:19.0 [8086/a0c5] disabled
860 17:17:39.469264 PCI: 00:19.1 [8086/0000] bus ops
861 17:17:39.472880 PCI: 00:19.1 [8086/a0c6] enabled
862 17:17:39.475873 PCI: 00:1d.0 [8086/0000] bus ops
863 17:17:39.478732 PCI: 00:1d.0 [8086/a0b0] enabled
864 17:17:39.482070 PCI: 00:1e.0 [8086/0000] ops
865 17:17:39.485361 PCI: 00:1e.0 [8086/a0a8] enabled
866 17:17:39.488794 PCI: 00:1e.2 [8086/0000] bus ops
867 17:17:39.492256 PCI: 00:1e.2 [8086/a0aa] enabled
868 17:17:39.495600 PCI: 00:1e.3 [8086/0000] bus ops
869 17:17:39.499040 PCI: 00:1e.3 [8086/a0ab] enabled
870 17:17:39.502269 PCI: 00:1f.0 [8086/0000] bus ops
871 17:17:39.505511 PCI: 00:1f.0 [8086/a087] enabled
872 17:17:39.508934 RTC Init
873 17:17:39.512156 Set power on after power failure.
874 17:17:39.512623 Disabling Deep S3
875 17:17:39.515323 Disabling Deep S3
876 17:17:39.518961 Disabling Deep S4
877 17:17:39.519431 Disabling Deep S4
878 17:17:39.521814 Disabling Deep S5
879 17:17:39.522275 Disabling Deep S5
880 17:17:39.525375 PCI: 00:1f.2 [0000/0000] hidden
881 17:17:39.528723 PCI: 00:1f.3 [8086/0000] bus ops
882 17:17:39.532344 PCI: 00:1f.3 [8086/a0c8] enabled
883 17:17:39.535329 PCI: 00:1f.5 [8086/0000] bus ops
884 17:17:39.538936 PCI: 00:1f.5 [8086/a0a4] enabled
885 17:17:39.542353 PCI: Leftover static devices:
886 17:17:39.545225 PCI: 00:10.2
887 17:17:39.545830 PCI: 00:10.6
888 17:17:39.546203 PCI: 00:10.7
889 17:17:39.548771 PCI: 00:06.0
890 17:17:39.549334 PCI: 00:07.1
891 17:17:39.552212 PCI: 00:07.2
892 17:17:39.552769 PCI: 00:07.3
893 17:17:39.555176 PCI: 00:09.0
894 17:17:39.555735 PCI: 00:0d.1
895 17:17:39.556106 PCI: 00:0d.2
896 17:17:39.558272 PCI: 00:0d.3
897 17:17:39.558844 PCI: 00:0e.0
898 17:17:39.561872 PCI: 00:12.0
899 17:17:39.562333 PCI: 00:12.6
900 17:17:39.562700 PCI: 00:13.0
901 17:17:39.564785 PCI: 00:14.1
902 17:17:39.565244 PCI: 00:16.1
903 17:17:39.568334 PCI: 00:16.2
904 17:17:39.568794 PCI: 00:16.3
905 17:17:39.569160 PCI: 00:16.4
906 17:17:39.571711 PCI: 00:16.5
907 17:17:39.572182 PCI: 00:17.0
908 17:17:39.575211 PCI: 00:19.2
909 17:17:39.575676 PCI: 00:1e.1
910 17:17:39.578375 PCI: 00:1f.1
911 17:17:39.578886 PCI: 00:1f.4
912 17:17:39.579261 PCI: 00:1f.6
913 17:17:39.581598 PCI: 00:1f.7
914 17:17:39.585358 PCI: Check your devicetree.cb.
915 17:17:39.588016 PCI: 00:02.0 scanning...
916 17:17:39.591617 scan_generic_bus for PCI: 00:02.0
917 17:17:39.594695 scan_generic_bus for PCI: 00:02.0 done
918 17:17:39.598113 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 17:17:39.601506 PCI: 00:04.0 scanning...
920 17:17:39.604792 scan_generic_bus for PCI: 00:04.0
921 17:17:39.608038 GENERIC: 0.0 enabled
922 17:17:39.614646 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 17:17:39.618060 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 17:17:39.621380 PCI: 00:0d.0 scanning...
925 17:17:39.624690 scan_static_bus for PCI: 00:0d.0
926 17:17:39.625159 USB0 port 0 enabled
927 17:17:39.627812 USB0 port 0 scanning...
928 17:17:39.631097 scan_static_bus for USB0 port 0
929 17:17:39.634467 USB3 port 0 enabled
930 17:17:39.637746 USB3 port 1 enabled
931 17:17:39.638451 USB3 port 2 disabled
932 17:17:39.641277 USB3 port 3 disabled
933 17:17:39.644201 USB3 port 0 scanning...
934 17:17:39.647685 scan_static_bus for USB3 port 0
935 17:17:39.651249 scan_static_bus for USB3 port 0 done
936 17:17:39.654023 scan_bus: bus USB3 port 0 finished in 6 msecs
937 17:17:39.657418 USB3 port 1 scanning...
938 17:17:39.660923 scan_static_bus for USB3 port 1
939 17:17:39.664346 scan_static_bus for USB3 port 1 done
940 17:17:39.667329 scan_bus: bus USB3 port 1 finished in 6 msecs
941 17:17:39.674462 scan_static_bus for USB0 port 0 done
942 17:17:39.677243 scan_bus: bus USB0 port 0 finished in 43 msecs
943 17:17:39.680826 scan_static_bus for PCI: 00:0d.0 done
944 17:17:39.687380 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 17:17:39.688060 PCI: 00:14.0 scanning...
946 17:17:39.690699 scan_static_bus for PCI: 00:14.0
947 17:17:39.693792 USB0 port 0 enabled
948 17:17:39.697323 USB0 port 0 scanning...
949 17:17:39.700631 scan_static_bus for USB0 port 0
950 17:17:39.701136 USB2 port 0 disabled
951 17:17:39.703915 USB2 port 1 enabled
952 17:17:39.707297 USB2 port 2 enabled
953 17:17:39.707764 USB2 port 3 disabled
954 17:17:39.710901 USB2 port 4 enabled
955 17:17:39.713746 USB2 port 5 disabled
956 17:17:39.714217 USB2 port 6 disabled
957 17:17:39.717153 USB2 port 7 disabled
958 17:17:39.717623 USB2 port 8 disabled
959 17:17:39.720832 USB2 port 9 disabled
960 17:17:39.724167 USB3 port 0 disabled
961 17:17:39.724636 USB3 port 1 enabled
962 17:17:39.727032 USB3 port 2 disabled
963 17:17:39.730539 USB3 port 3 disabled
964 17:17:39.731119 USB2 port 1 scanning...
965 17:17:39.733799 scan_static_bus for USB2 port 1
966 17:17:39.740390 scan_static_bus for USB2 port 1 done
967 17:17:39.744044 scan_bus: bus USB2 port 1 finished in 6 msecs
968 17:17:39.747441 USB2 port 2 scanning...
969 17:17:39.750520 scan_static_bus for USB2 port 2
970 17:17:39.753985 scan_static_bus for USB2 port 2 done
971 17:17:39.756929 scan_bus: bus USB2 port 2 finished in 6 msecs
972 17:17:39.760471 USB2 port 4 scanning...
973 17:17:39.763339 scan_static_bus for USB2 port 4
974 17:17:39.766848 scan_static_bus for USB2 port 4 done
975 17:17:39.773561 scan_bus: bus USB2 port 4 finished in 6 msecs
976 17:17:39.773895 USB3 port 1 scanning...
977 17:17:39.776993 scan_static_bus for USB3 port 1
978 17:17:39.780067 scan_static_bus for USB3 port 1 done
979 17:17:39.786849 scan_bus: bus USB3 port 1 finished in 6 msecs
980 17:17:39.790729 scan_static_bus for USB0 port 0 done
981 17:17:39.793831 scan_bus: bus USB0 port 0 finished in 93 msecs
982 17:17:39.800767 scan_static_bus for PCI: 00:14.0 done
983 17:17:39.803819 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
984 17:17:39.806944 PCI: 00:14.3 scanning...
985 17:17:39.810096 scan_static_bus for PCI: 00:14.3
986 17:17:39.810569 GENERIC: 0.0 enabled
987 17:17:39.816959 scan_static_bus for PCI: 00:14.3 done
988 17:17:39.819883 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 17:17:39.823558 PCI: 00:15.0 scanning...
990 17:17:39.826715 scan_static_bus for PCI: 00:15.0
991 17:17:39.827279 I2C: 00:1a enabled
992 17:17:39.829832 I2C: 00:31 enabled
993 17:17:39.833170 I2C: 00:32 enabled
994 17:17:39.836833 scan_static_bus for PCI: 00:15.0 done
995 17:17:39.840421 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
996 17:17:39.843098 PCI: 00:15.1 scanning...
997 17:17:39.846802 scan_static_bus for PCI: 00:15.1
998 17:17:39.849933 I2C: 00:10 enabled
999 17:17:39.853391 scan_static_bus for PCI: 00:15.1 done
1000 17:17:39.856439 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 17:17:39.859957 PCI: 00:15.2 scanning...
1002 17:17:39.863029 scan_static_bus for PCI: 00:15.2
1003 17:17:39.866410 scan_static_bus for PCI: 00:15.2 done
1004 17:17:39.870717 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 17:17:39.874563 PCI: 00:15.3 scanning...
1006 17:17:39.877931 scan_static_bus for PCI: 00:15.3
1007 17:17:39.880954 scan_static_bus for PCI: 00:15.3 done
1008 17:17:39.887319 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 17:17:39.887968 PCI: 00:19.1 scanning...
1010 17:17:39.890831 scan_static_bus for PCI: 00:19.1
1011 17:17:39.894331 I2C: 00:15 enabled
1012 17:17:39.897365 scan_static_bus for PCI: 00:19.1 done
1013 17:17:39.904482 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 17:17:39.905131 PCI: 00:1d.0 scanning...
1015 17:17:39.910738 do_pci_scan_bridge for PCI: 00:1d.0
1016 17:17:39.911479 PCI: pci_scan_bus for bus 01
1017 17:17:39.914273 PCI: 01:00.0 [1c5c/174a] enabled
1018 17:17:39.917502 GENERIC: 0.0 enabled
1019 17:17:39.920947 Enabling Common Clock Configuration
1020 17:17:39.927293 L1 Sub-State supported from root port 29
1021 17:17:39.927761 L1 Sub-State Support = 0xf
1022 17:17:39.931083 CommonModeRestoreTime = 0x28
1023 17:17:39.937314 Power On Value = 0x16, Power On Scale = 0x0
1024 17:17:39.937990 ASPM: Enabled L1
1025 17:17:39.940589 PCIe: Max_Payload_Size adjusted to 128
1026 17:17:39.947340 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 17:17:39.950729 PCI: 00:1e.2 scanning...
1028 17:17:39.953944 scan_generic_bus for PCI: 00:1e.2
1029 17:17:39.954597 SPI: 00 enabled
1030 17:17:39.960350 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 17:17:39.963761 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 17:17:39.966968 PCI: 00:1e.3 scanning...
1033 17:17:39.970470 scan_generic_bus for PCI: 00:1e.3
1034 17:17:39.973517 SPI: 00 enabled
1035 17:17:39.980643 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 17:17:39.983617 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 17:17:39.987189 PCI: 00:1f.0 scanning...
1038 17:17:39.990404 scan_static_bus for PCI: 00:1f.0
1039 17:17:39.993504 PNP: 0c09.0 enabled
1040 17:17:39.994087 PNP: 0c09.0 scanning...
1041 17:17:39.996930 scan_static_bus for PNP: 0c09.0
1042 17:17:39.999977 scan_static_bus for PNP: 0c09.0 done
1043 17:17:40.007025 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 17:17:40.010509 scan_static_bus for PCI: 00:1f.0 done
1045 17:17:40.013127 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 17:17:40.016694 PCI: 00:1f.2 scanning...
1047 17:17:40.020230 scan_static_bus for PCI: 00:1f.2
1048 17:17:40.023528 GENERIC: 0.0 enabled
1049 17:17:40.026613 GENERIC: 0.0 scanning...
1050 17:17:40.029616 scan_static_bus for GENERIC: 0.0
1051 17:17:40.030141 GENERIC: 0.0 enabled
1052 17:17:40.033037 GENERIC: 1.0 enabled
1053 17:17:40.036442 scan_static_bus for GENERIC: 0.0 done
1054 17:17:40.043370 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 17:17:40.046488 scan_static_bus for PCI: 00:1f.2 done
1056 17:17:40.049910 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 17:17:40.053292 PCI: 00:1f.3 scanning...
1058 17:17:40.056766 scan_static_bus for PCI: 00:1f.3
1059 17:17:40.059655 scan_static_bus for PCI: 00:1f.3 done
1060 17:17:40.066353 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 17:17:40.066808 PCI: 00:1f.5 scanning...
1062 17:17:40.073552 scan_generic_bus for PCI: 00:1f.5
1063 17:17:40.077031 scan_generic_bus for PCI: 00:1f.5 done
1064 17:17:40.079815 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 17:17:40.086803 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 17:17:40.089764 scan_static_bus for Root Device done
1067 17:17:40.093248 scan_bus: bus Root Device finished in 737 msecs
1068 17:17:40.093810 done
1069 17:17:40.100138 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 17:17:40.103215 Chrome EC: UHEPI supported
1071 17:17:40.109621 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 17:17:40.116296 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 17:17:40.119651 SPI flash protection: WPSW=1 SRP0=0
1074 17:17:40.123514 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 17:17:40.129880 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 17:17:40.133213 found VGA at PCI: 00:02.0
1077 17:17:40.136141 Setting up VGA for PCI: 00:02.0
1078 17:17:40.142974 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 17:17:40.146056 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 17:17:40.149217 Allocating resources...
1081 17:17:40.149674 Reading resources...
1082 17:17:40.156354 Root Device read_resources bus 0 link: 0
1083 17:17:40.159326 DOMAIN: 0000 read_resources bus 0 link: 0
1084 17:17:40.165890 PCI: 00:04.0 read_resources bus 1 link: 0
1085 17:17:40.169328 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 17:17:40.175937 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 17:17:40.179528 USB0 port 0 read_resources bus 0 link: 0
1088 17:17:40.186109 USB0 port 0 read_resources bus 0 link: 0 done
1089 17:17:40.189192 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 17:17:40.192646 PCI: 00:14.0 read_resources bus 0 link: 0
1091 17:17:40.199255 USB0 port 0 read_resources bus 0 link: 0
1092 17:17:40.202721 USB0 port 0 read_resources bus 0 link: 0 done
1093 17:17:40.209064 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 17:17:40.212479 PCI: 00:14.3 read_resources bus 0 link: 0
1095 17:17:40.218734 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 17:17:40.222256 PCI: 00:15.0 read_resources bus 0 link: 0
1097 17:17:40.229179 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 17:17:40.232866 PCI: 00:15.1 read_resources bus 0 link: 0
1099 17:17:40.239448 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 17:17:40.242893 PCI: 00:19.1 read_resources bus 0 link: 0
1101 17:17:40.249584 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 17:17:40.253027 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 17:17:40.259621 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 17:17:40.262761 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 17:17:40.269696 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 17:17:40.273064 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 17:17:40.279409 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 17:17:40.282691 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 17:17:40.289110 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 17:17:40.292653 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 17:17:40.296102 GENERIC: 0.0 read_resources bus 0 link: 0
1112 17:17:40.303428 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 17:17:40.306301 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 17:17:40.313373 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 17:17:40.317055 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 17:17:40.324083 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 17:17:40.326613 Root Device read_resources bus 0 link: 0 done
1118 17:17:40.330178 Done reading resources.
1119 17:17:40.336886 Show resources in subtree (Root Device)...After reading.
1120 17:17:40.339727 Root Device child on link 0 DOMAIN: 0000
1121 17:17:40.343121 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 17:17:40.353140 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 17:17:40.363218 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 17:17:40.366560 PCI: 00:00.0
1125 17:17:40.376361 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 17:17:40.383469 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 17:17:40.393304 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 17:17:40.402923 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 17:17:40.412792 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 17:17:40.422836 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 17:17:40.432981 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 17:17:40.439645 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 17:17:40.449121 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 17:17:40.459592 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 17:17:40.469189 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 17:17:40.479141 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 17:17:40.485964 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 17:17:40.496156 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 17:17:40.505787 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 17:17:40.516139 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 17:17:40.526118 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 17:17:40.535728 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 17:17:40.545848 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 17:17:40.552144 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 17:17:40.555184 PCI: 00:02.0
1146 17:17:40.565374 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 17:17:40.575036 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 17:17:40.584992 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 17:17:40.588295 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 17:17:40.598416 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 17:17:40.601779 GENERIC: 0.0
1152 17:17:40.602373 PCI: 00:05.0
1153 17:17:40.611519 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 17:17:40.618199 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 17:17:40.618663 GENERIC: 0.0
1156 17:17:40.621902 PCI: 00:08.0
1157 17:17:40.631763 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 17:17:40.632283 PCI: 00:0a.0
1159 17:17:40.637890 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 17:17:40.648401 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 17:17:40.651667 USB0 port 0 child on link 0 USB3 port 0
1162 17:17:40.652232 USB3 port 0
1163 17:17:40.655130 USB3 port 1
1164 17:17:40.655697 USB3 port 2
1165 17:17:40.658468 USB3 port 3
1166 17:17:40.661725 PCI: 00:14.0 child on link 0 USB0 port 0
1167 17:17:40.671313 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 17:17:40.678258 USB0 port 0 child on link 0 USB2 port 0
1169 17:17:40.678850 USB2 port 0
1170 17:17:40.681135 USB2 port 1
1171 17:17:40.681595 USB2 port 2
1172 17:17:40.684330 USB2 port 3
1173 17:17:40.684787 USB2 port 4
1174 17:17:40.687530 USB2 port 5
1175 17:17:40.687986 USB2 port 6
1176 17:17:40.691251 USB2 port 7
1177 17:17:40.694208 USB2 port 8
1178 17:17:40.694668 USB2 port 9
1179 17:17:40.697778 USB3 port 0
1180 17:17:40.698234 USB3 port 1
1181 17:17:40.701008 USB3 port 2
1182 17:17:40.701500 USB3 port 3
1183 17:17:40.704292 PCI: 00:14.2
1184 17:17:40.713889 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 17:17:40.724220 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 17:17:40.727028 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 17:17:40.737244 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 17:17:40.740437 GENERIC: 0.0
1189 17:17:40.743852 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 17:17:40.754169 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 17:17:40.754749 I2C: 00:1a
1192 17:17:40.757563 I2C: 00:31
1193 17:17:40.758138 I2C: 00:32
1194 17:17:40.764005 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 17:17:40.774009 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 17:17:40.774576 I2C: 00:10
1197 17:17:40.776861 PCI: 00:15.2
1198 17:17:40.787236 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 17:17:40.787712 PCI: 00:15.3
1200 17:17:40.797209 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 17:17:40.800163 PCI: 00:16.0
1202 17:17:40.810287 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 17:17:40.810754 PCI: 00:19.0
1204 17:17:40.813185 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 17:17:40.823741 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 17:17:40.826543 I2C: 00:15
1207 17:17:40.830256 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 17:17:40.840142 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 17:17:40.849982 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 17:17:40.859833 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 17:17:40.860387 GENERIC: 0.0
1212 17:17:40.863720 PCI: 01:00.0
1213 17:17:40.872893 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 17:17:40.882972 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 17:17:40.889896 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 17:17:40.892882 PCI: 00:1e.0
1217 17:17:40.902843 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 17:17:40.906113 PCI: 00:1e.2 child on link 0 SPI: 00
1219 17:17:40.915976 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 17:17:40.919469 SPI: 00
1221 17:17:40.922797 PCI: 00:1e.3 child on link 0 SPI: 00
1222 17:17:40.932356 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 17:17:40.932926 SPI: 00
1224 17:17:40.939009 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 17:17:40.945733 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 17:17:40.949085 PNP: 0c09.0
1227 17:17:40.958704 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 17:17:40.962298 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 17:17:40.972428 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 17:17:40.982301 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 17:17:40.985539 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 17:17:40.986101 GENERIC: 0.0
1233 17:17:40.988921 GENERIC: 1.0
1234 17:17:40.991930 PCI: 00:1f.3
1235 17:17:41.002267 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 17:17:41.011960 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 17:17:41.012512 PCI: 00:1f.5
1238 17:17:41.022047 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 17:17:41.025547 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 17:17:41.028670 APIC: 00
1241 17:17:41.029149 APIC: 01
1242 17:17:41.029517 APIC: 03
1243 17:17:41.032206 APIC: 07
1244 17:17:41.032666 APIC: 05
1245 17:17:41.033032 APIC: 04
1246 17:17:41.035014 APIC: 02
1247 17:17:41.035472 APIC: 06
1248 17:17:41.045102 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 17:17:41.048793 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 17:17:41.055417 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 17:17:41.061892 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 17:17:41.065333 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 17:17:41.071561 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 17:17:41.075263 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 17:17:41.081493 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 17:17:41.088458 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 17:17:41.098294 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 17:17:41.104433 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 17:17:41.111087 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 17:17:41.118198 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 17:17:41.124281 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 17:17:41.131282 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 17:17:41.134168 DOMAIN: 0000: Resource ranges:
1264 17:17:41.141181 * Base: 1000, Size: 800, Tag: 100
1265 17:17:41.144066 * Base: 1900, Size: e700, Tag: 100
1266 17:17:41.147459 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 17:17:41.154483 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 17:17:41.160754 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 17:17:41.170663 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 17:17:41.177236 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 17:17:41.184300 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 17:17:41.193954 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 17:17:41.200414 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 17:17:41.207082 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 17:17:41.217376 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 17:17:41.223834 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 17:17:41.230827 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 17:17:41.240613 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 17:17:41.246578 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 17:17:41.253257 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 17:17:41.263261 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 17:17:41.270053 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 17:17:41.276953 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 17:17:41.286443 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 17:17:41.293342 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 17:17:41.299557 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 17:17:41.309882 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 17:17:41.316217 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 17:17:41.323625 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 17:17:41.333045 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 17:17:41.336503 DOMAIN: 0000: Resource ranges:
1292 17:17:41.340011 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 17:17:41.343028 * Base: d0000000, Size: 28000000, Tag: 200
1294 17:17:41.346533 * Base: fa000000, Size: 1000000, Tag: 200
1295 17:17:41.353116 * Base: fb001000, Size: 2fff000, Tag: 200
1296 17:17:41.356597 * Base: fe010000, Size: 2e000, Tag: 200
1297 17:17:41.359488 * Base: fe03f000, Size: d41000, Tag: 200
1298 17:17:41.362724 * Base: fed88000, Size: 8000, Tag: 200
1299 17:17:41.369542 * Base: fed93000, Size: d000, Tag: 200
1300 17:17:41.372662 * Base: feda2000, Size: 1e000, Tag: 200
1301 17:17:41.375826 * Base: fede0000, Size: 1220000, Tag: 200
1302 17:17:41.382463 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 17:17:41.389103 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 17:17:41.395783 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 17:17:41.402387 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 17:17:41.409351 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 17:17:41.415735 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 17:17:41.422353 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 17:17:41.428816 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 17:17:41.435288 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 17:17:41.441933 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 17:17:41.449069 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 17:17:41.455197 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 17:17:41.462355 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 17:17:41.468898 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 17:17:41.474869 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 17:17:41.481478 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 17:17:41.488354 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 17:17:41.495054 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 17:17:41.501804 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 17:17:41.508017 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 17:17:41.514741 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 17:17:41.522151 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 17:17:41.528485 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 17:17:41.534650 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 17:17:41.544947 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 17:17:41.547733 PCI: 00:1d.0: Resource ranges:
1328 17:17:41.551348 * Base: 7fc00000, Size: 100000, Tag: 200
1329 17:17:41.558119 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 17:17:41.564526 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 17:17:41.570808 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 17:17:41.577814 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 17:17:41.587840 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 17:17:41.591092 Root Device assign_resources, bus 0 link: 0
1335 17:17:41.594378 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 17:17:41.604094 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 17:17:41.610801 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 17:17:41.620705 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 17:17:41.627025 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 17:17:41.633531 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 17:17:41.637041 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 17:17:41.647159 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 17:17:41.653751 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 17:17:41.663650 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 17:17:41.666562 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 17:17:41.669999 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 17:17:41.679765 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 17:17:41.683197 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 17:17:41.689550 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 17:17:41.696495 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 17:17:41.706412 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 17:17:41.713259 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 17:17:41.716634 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 17:17:41.723068 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 17:17:41.729344 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 17:17:41.736529 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 17:17:41.739446 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 17:17:41.749672 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 17:17:41.752474 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 17:17:41.756067 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 17:17:41.766265 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 17:17:41.772251 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 17:17:41.782840 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 17:17:41.789621 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 17:17:41.796070 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 17:17:41.799017 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 17:17:41.808657 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 17:17:41.819243 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 17:17:41.825370 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 17:17:41.832228 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 17:17:41.839012 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 17:17:41.848847 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 17:17:41.855632 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 17:17:41.858839 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 17:17:41.868942 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 17:17:41.871886 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 17:17:41.878436 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 17:17:41.885361 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 17:17:41.891494 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 17:17:41.894875 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 17:17:41.898295 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 17:17:41.905406 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 17:17:41.908987 LPC: Trying to open IO window from 800 size 1ff
1384 17:17:41.918600 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 17:17:41.925045 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 17:17:41.934968 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 17:17:41.938303 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 17:17:41.944806 Root Device assign_resources, bus 0 link: 0
1389 17:17:41.945264 Done setting resources.
1390 17:17:41.951406 Show resources in subtree (Root Device)...After assigning values.
1391 17:17:41.958277 Root Device child on link 0 DOMAIN: 0000
1392 17:17:41.961754 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 17:17:41.971436 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 17:17:41.981531 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 17:17:41.982098 PCI: 00:00.0
1396 17:17:41.991586 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 17:17:42.001708 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 17:17:42.011502 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 17:17:42.021484 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 17:17:42.027976 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 17:17:42.037693 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 17:17:42.047581 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 17:17:42.057888 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 17:17:42.067478 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 17:17:42.077814 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 17:17:42.084100 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 17:17:42.094031 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 17:17:42.104213 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 17:17:42.114193 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 17:17:42.120541 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 17:17:42.130978 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 17:17:42.140761 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 17:17:42.150456 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 17:17:42.160374 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 17:17:42.170760 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 17:17:42.171360 PCI: 00:02.0
1417 17:17:42.184098 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 17:17:42.193737 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 17:17:42.203760 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 17:17:42.206896 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 17:17:42.216780 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 17:17:42.220194 GENERIC: 0.0
1423 17:17:42.220692 PCI: 00:05.0
1424 17:17:42.230529 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 17:17:42.236927 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 17:17:42.237489 GENERIC: 0.0
1427 17:17:42.240077 PCI: 00:08.0
1428 17:17:42.250017 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 17:17:42.250482 PCI: 00:0a.0
1430 17:17:42.257111 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 17:17:42.266458 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 17:17:42.270099 USB0 port 0 child on link 0 USB3 port 0
1433 17:17:42.272809 USB3 port 0
1434 17:17:42.273281 USB3 port 1
1435 17:17:42.276359 USB3 port 2
1436 17:17:42.276976 USB3 port 3
1437 17:17:42.283469 PCI: 00:14.0 child on link 0 USB0 port 0
1438 17:17:42.292944 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 17:17:42.296537 USB0 port 0 child on link 0 USB2 port 0
1440 17:17:42.299742 USB2 port 0
1441 17:17:42.300200 USB2 port 1
1442 17:17:42.302698 USB2 port 2
1443 17:17:42.303198 USB2 port 3
1444 17:17:42.306211 USB2 port 4
1445 17:17:42.306666 USB2 port 5
1446 17:17:42.309751 USB2 port 6
1447 17:17:42.310205 USB2 port 7
1448 17:17:42.312663 USB2 port 8
1449 17:17:42.316158 USB2 port 9
1450 17:17:42.316613 USB3 port 0
1451 17:17:42.319238 USB3 port 1
1452 17:17:42.319691 USB3 port 2
1453 17:17:42.322831 USB3 port 3
1454 17:17:42.323292 PCI: 00:14.2
1455 17:17:42.332558 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 17:17:42.342595 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 17:17:42.349436 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 17:17:42.359053 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 17:17:42.359518 GENERIC: 0.0
1460 17:17:42.365999 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 17:17:42.376038 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 17:17:42.376580 I2C: 00:1a
1463 17:17:42.378923 I2C: 00:31
1464 17:17:42.379380 I2C: 00:32
1465 17:17:42.385949 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 17:17:42.395727 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 17:17:42.396462 I2C: 00:10
1468 17:17:42.398829 PCI: 00:15.2
1469 17:17:42.408790 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 17:17:42.409250 PCI: 00:15.3
1471 17:17:42.419053 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 17:17:42.422195 PCI: 00:16.0
1473 17:17:42.432274 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 17:17:42.435088 PCI: 00:19.0
1475 17:17:42.438912 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 17:17:42.448361 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 17:17:42.448914 I2C: 00:15
1478 17:17:42.455372 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 17:17:42.465218 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 17:17:42.475308 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 17:17:42.485222 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 17:17:42.488278 GENERIC: 0.0
1483 17:17:42.488866 PCI: 01:00.0
1484 17:17:42.498600 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 17:17:42.511859 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 17:17:42.521775 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 17:17:42.522335 PCI: 00:1e.0
1488 17:17:42.534888 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 17:17:42.538189 PCI: 00:1e.2 child on link 0 SPI: 00
1490 17:17:42.548154 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 17:17:42.548712 SPI: 00
1492 17:17:42.554273 PCI: 00:1e.3 child on link 0 SPI: 00
1493 17:17:42.564240 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 17:17:42.564796 SPI: 00
1495 17:17:42.567492 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 17:17:42.577775 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 17:17:42.581177 PNP: 0c09.0
1498 17:17:42.587600 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 17:17:42.594182 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 17:17:42.601150 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 17:17:42.610851 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 17:17:42.617088 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 17:17:42.617549 GENERIC: 0.0
1504 17:17:42.620766 GENERIC: 1.0
1505 17:17:42.621253 PCI: 00:1f.3
1506 17:17:42.630726 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 17:17:42.643858 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 17:17:42.644408 PCI: 00:1f.5
1509 17:17:42.653903 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 17:17:42.656976 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 17:17:42.660351 APIC: 00
1512 17:17:42.660806 APIC: 01
1513 17:17:42.663410 APIC: 03
1514 17:17:42.663865 APIC: 07
1515 17:17:42.664228 APIC: 05
1516 17:17:42.666649 APIC: 04
1517 17:17:42.667164 APIC: 02
1518 17:17:42.670081 APIC: 06
1519 17:17:42.670539 Done allocating resources.
1520 17:17:42.676885 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 17:17:42.683712 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 17:17:42.686992 Configure GPIOs for I2S audio on UP4.
1523 17:17:42.694071 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 17:17:42.697231 Enabling resources...
1525 17:17:42.700497 PCI: 00:00.0 subsystem <- 8086/9a12
1526 17:17:42.703645 PCI: 00:00.0 cmd <- 06
1527 17:17:42.707338 PCI: 00:02.0 subsystem <- 8086/9a40
1528 17:17:42.710864 PCI: 00:02.0 cmd <- 03
1529 17:17:42.713661 PCI: 00:04.0 subsystem <- 8086/9a03
1530 17:17:42.717074 PCI: 00:04.0 cmd <- 02
1531 17:17:42.719887 PCI: 00:05.0 subsystem <- 8086/9a19
1532 17:17:42.720344 PCI: 00:05.0 cmd <- 02
1533 17:17:42.726998 PCI: 00:08.0 subsystem <- 8086/9a11
1534 17:17:42.727467 PCI: 00:08.0 cmd <- 06
1535 17:17:42.730327 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 17:17:42.733610 PCI: 00:0d.0 cmd <- 02
1537 17:17:42.736682 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 17:17:42.740370 PCI: 00:14.0 cmd <- 02
1539 17:17:42.744107 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 17:17:42.746660 PCI: 00:14.2 cmd <- 02
1541 17:17:42.750350 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 17:17:42.753297 PCI: 00:14.3 cmd <- 02
1543 17:17:42.756451 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 17:17:42.759513 PCI: 00:15.0 cmd <- 02
1545 17:17:42.763387 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 17:17:42.766900 PCI: 00:15.1 cmd <- 02
1547 17:17:42.770069 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 17:17:42.770615 PCI: 00:15.2 cmd <- 02
1549 17:17:42.776777 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 17:17:42.777535 PCI: 00:15.3 cmd <- 02
1551 17:17:42.779728 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 17:17:42.783144 PCI: 00:16.0 cmd <- 02
1553 17:17:42.786703 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 17:17:42.790460 PCI: 00:19.1 cmd <- 02
1555 17:17:42.793352 PCI: 00:1d.0 bridge ctrl <- 0013
1556 17:17:42.796529 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 17:17:42.800255 PCI: 00:1d.0 cmd <- 06
1558 17:17:42.803321 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 17:17:42.806738 PCI: 00:1e.0 cmd <- 06
1560 17:17:42.809945 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 17:17:42.813316 PCI: 00:1e.2 cmd <- 06
1562 17:17:42.816453 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 17:17:42.819954 PCI: 00:1e.3 cmd <- 02
1564 17:17:42.823048 PCI: 00:1f.0 subsystem <- 8086/a087
1565 17:17:42.823606 PCI: 00:1f.0 cmd <- 407
1566 17:17:42.829898 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 17:17:42.830449 PCI: 00:1f.3 cmd <- 02
1568 17:17:42.833209 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 17:17:42.836579 PCI: 00:1f.5 cmd <- 406
1570 17:17:42.841756 PCI: 01:00.0 cmd <- 02
1571 17:17:42.845865 done.
1572 17:17:42.849278 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 17:17:42.852570 Initializing devices...
1574 17:17:42.855727 Root Device init
1575 17:17:42.859036 Chrome EC: Set SMI mask to 0x0000000000000000
1576 17:17:42.865515 Chrome EC: clear events_b mask to 0x0000000000000000
1577 17:17:42.872658 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 17:17:42.875276 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 17:17:42.882384 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 17:17:42.889103 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 17:17:42.892279 fw_config match found: DB_USB=USB3_ACTIVE
1582 17:17:42.899215 Configure Right Type-C port orientation for retimer
1583 17:17:42.902009 Root Device init finished in 43 msecs
1584 17:17:42.905502 PCI: 00:00.0 init
1585 17:17:42.908921 CPU TDP = 9 Watts
1586 17:17:42.909488 CPU PL1 = 9 Watts
1587 17:17:42.911950 CPU PL2 = 40 Watts
1588 17:17:42.912410 CPU PL4 = 83 Watts
1589 17:17:42.918868 PCI: 00:00.0 init finished in 8 msecs
1590 17:17:42.919329 PCI: 00:02.0 init
1591 17:17:42.922098 GMA: Found VBT in CBFS
1592 17:17:42.925413 GMA: Found valid VBT in CBFS
1593 17:17:42.931714 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 17:17:42.938525 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 17:17:42.942330 PCI: 00:02.0 init finished in 18 msecs
1596 17:17:42.944819 PCI: 00:05.0 init
1597 17:17:42.948579 PCI: 00:05.0 init finished in 0 msecs
1598 17:17:42.951573 PCI: 00:08.0 init
1599 17:17:42.955048 PCI: 00:08.0 init finished in 0 msecs
1600 17:17:42.958605 PCI: 00:14.0 init
1601 17:17:42.961800 PCI: 00:14.0 init finished in 0 msecs
1602 17:17:42.962447 PCI: 00:14.2 init
1603 17:17:42.968188 PCI: 00:14.2 init finished in 0 msecs
1604 17:17:42.968756 PCI: 00:15.0 init
1605 17:17:42.971670 I2C bus 0 version 0x3230302a
1606 17:17:42.974911 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 17:17:42.981267 PCI: 00:15.0 init finished in 6 msecs
1608 17:17:42.981774 PCI: 00:15.1 init
1609 17:17:42.984560 I2C bus 1 version 0x3230302a
1610 17:17:42.988341 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 17:17:42.991133 PCI: 00:15.1 init finished in 6 msecs
1612 17:17:42.994605 PCI: 00:15.2 init
1613 17:17:42.997995 I2C bus 2 version 0x3230302a
1614 17:17:43.001408 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 17:17:43.004483 PCI: 00:15.2 init finished in 6 msecs
1616 17:17:43.007928 PCI: 00:15.3 init
1617 17:17:43.011518 I2C bus 3 version 0x3230302a
1618 17:17:43.014375 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 17:17:43.017709 PCI: 00:15.3 init finished in 6 msecs
1620 17:17:43.021304 PCI: 00:16.0 init
1621 17:17:43.024149 PCI: 00:16.0 init finished in 0 msecs
1622 17:17:43.027865 PCI: 00:19.1 init
1623 17:17:43.028448 I2C bus 5 version 0x3230302a
1624 17:17:43.034094 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 17:17:43.037484 PCI: 00:19.1 init finished in 6 msecs
1626 17:17:43.038136 PCI: 00:1d.0 init
1627 17:17:43.040923 Initializing PCH PCIe bridge.
1628 17:17:43.044431 PCI: 00:1d.0 init finished in 3 msecs
1629 17:17:43.049009 PCI: 00:1f.0 init
1630 17:17:43.052703 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 17:17:43.058830 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 17:17:43.059390 IOAPIC: ID = 0x02
1633 17:17:43.061848 IOAPIC: Dumping registers
1634 17:17:43.065342 reg 0x0000: 0x02000000
1635 17:17:43.068559 reg 0x0001: 0x00770020
1636 17:17:43.069047 reg 0x0002: 0x00000000
1637 17:17:43.075489 PCI: 00:1f.0 init finished in 21 msecs
1638 17:17:43.075949 PCI: 00:1f.2 init
1639 17:17:43.078596 Disabling ACPI via APMC.
1640 17:17:43.082169 APMC done.
1641 17:17:43.085342 PCI: 00:1f.2 init finished in 5 msecs
1642 17:17:43.097283 PCI: 01:00.0 init
1643 17:17:43.100853 PCI: 01:00.0 init finished in 0 msecs
1644 17:17:43.103533 PNP: 0c09.0 init
1645 17:17:43.106952 Google Chrome EC uptime: 8.354 seconds
1646 17:17:43.113817 Google Chrome AP resets since EC boot: 1
1647 17:17:43.117533 Google Chrome most recent AP reset causes:
1648 17:17:43.120217 0.346: 32775 shutdown: entering G3
1649 17:17:43.127482 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 17:17:43.130072 PNP: 0c09.0 init finished in 22 msecs
1651 17:17:43.136046 Devices initialized
1652 17:17:43.139490 Show all devs... After init.
1653 17:17:43.143231 Root Device: enabled 1
1654 17:17:43.143791 DOMAIN: 0000: enabled 1
1655 17:17:43.145940 CPU_CLUSTER: 0: enabled 1
1656 17:17:43.149701 PCI: 00:00.0: enabled 1
1657 17:17:43.152387 PCI: 00:02.0: enabled 1
1658 17:17:43.153039 PCI: 00:04.0: enabled 1
1659 17:17:43.155650 PCI: 00:05.0: enabled 1
1660 17:17:43.159568 PCI: 00:06.0: enabled 0
1661 17:17:43.162982 PCI: 00:07.0: enabled 0
1662 17:17:43.163534 PCI: 00:07.1: enabled 0
1663 17:17:43.166116 PCI: 00:07.2: enabled 0
1664 17:17:43.169372 PCI: 00:07.3: enabled 0
1665 17:17:43.172725 PCI: 00:08.0: enabled 1
1666 17:17:43.173281 PCI: 00:09.0: enabled 0
1667 17:17:43.175794 PCI: 00:0a.0: enabled 0
1668 17:17:43.179414 PCI: 00:0d.0: enabled 1
1669 17:17:43.182423 PCI: 00:0d.1: enabled 0
1670 17:17:43.183010 PCI: 00:0d.2: enabled 0
1671 17:17:43.185896 PCI: 00:0d.3: enabled 0
1672 17:17:43.189172 PCI: 00:0e.0: enabled 0
1673 17:17:43.189727 PCI: 00:10.2: enabled 1
1674 17:17:43.192060 PCI: 00:10.6: enabled 0
1675 17:17:43.195426 PCI: 00:10.7: enabled 0
1676 17:17:43.199042 PCI: 00:12.0: enabled 0
1677 17:17:43.199497 PCI: 00:12.6: enabled 0
1678 17:17:43.202175 PCI: 00:13.0: enabled 0
1679 17:17:43.205533 PCI: 00:14.0: enabled 1
1680 17:17:43.208875 PCI: 00:14.1: enabled 0
1681 17:17:43.209333 PCI: 00:14.2: enabled 1
1682 17:17:43.212077 PCI: 00:14.3: enabled 1
1683 17:17:43.215861 PCI: 00:15.0: enabled 1
1684 17:17:43.218817 PCI: 00:15.1: enabled 1
1685 17:17:43.219329 PCI: 00:15.2: enabled 1
1686 17:17:43.222299 PCI: 00:15.3: enabled 1
1687 17:17:43.225951 PCI: 00:16.0: enabled 1
1688 17:17:43.229057 PCI: 00:16.1: enabled 0
1689 17:17:43.229613 PCI: 00:16.2: enabled 0
1690 17:17:43.232427 PCI: 00:16.3: enabled 0
1691 17:17:43.235501 PCI: 00:16.4: enabled 0
1692 17:17:43.235956 PCI: 00:16.5: enabled 0
1693 17:17:43.238822 PCI: 00:17.0: enabled 0
1694 17:17:43.242535 PCI: 00:19.0: enabled 0
1695 17:17:43.245260 PCI: 00:19.1: enabled 1
1696 17:17:43.245711 PCI: 00:19.2: enabled 0
1697 17:17:43.249345 PCI: 00:1c.0: enabled 1
1698 17:17:43.252045 PCI: 00:1c.1: enabled 0
1699 17:17:43.255766 PCI: 00:1c.2: enabled 0
1700 17:17:43.256327 PCI: 00:1c.3: enabled 0
1701 17:17:43.258859 PCI: 00:1c.4: enabled 0
1702 17:17:43.262088 PCI: 00:1c.5: enabled 0
1703 17:17:43.265408 PCI: 00:1c.6: enabled 1
1704 17:17:43.266031 PCI: 00:1c.7: enabled 0
1705 17:17:43.268907 PCI: 00:1d.0: enabled 1
1706 17:17:43.272234 PCI: 00:1d.1: enabled 0
1707 17:17:43.272788 PCI: 00:1d.2: enabled 1
1708 17:17:43.275757 PCI: 00:1d.3: enabled 0
1709 17:17:43.278421 PCI: 00:1e.0: enabled 1
1710 17:17:43.281964 PCI: 00:1e.1: enabled 0
1711 17:17:43.282532 PCI: 00:1e.2: enabled 1
1712 17:17:43.285589 PCI: 00:1e.3: enabled 1
1713 17:17:43.289087 PCI: 00:1f.0: enabled 1
1714 17:17:43.291738 PCI: 00:1f.1: enabled 0
1715 17:17:43.292197 PCI: 00:1f.2: enabled 1
1716 17:17:43.295522 PCI: 00:1f.3: enabled 1
1717 17:17:43.298731 PCI: 00:1f.4: enabled 0
1718 17:17:43.302134 PCI: 00:1f.5: enabled 1
1719 17:17:43.302682 PCI: 00:1f.6: enabled 0
1720 17:17:43.305050 PCI: 00:1f.7: enabled 0
1721 17:17:43.308226 APIC: 00: enabled 1
1722 17:17:43.308696 GENERIC: 0.0: enabled 1
1723 17:17:43.311821 GENERIC: 0.0: enabled 1
1724 17:17:43.315087 GENERIC: 1.0: enabled 1
1725 17:17:43.318340 GENERIC: 0.0: enabled 1
1726 17:17:43.318853 GENERIC: 1.0: enabled 1
1727 17:17:43.322177 USB0 port 0: enabled 1
1728 17:17:43.324973 GENERIC: 0.0: enabled 1
1729 17:17:43.325429 USB0 port 0: enabled 1
1730 17:17:43.328571 GENERIC: 0.0: enabled 1
1731 17:17:43.332014 I2C: 00:1a: enabled 1
1732 17:17:43.334860 I2C: 00:31: enabled 1
1733 17:17:43.335320 I2C: 00:32: enabled 1
1734 17:17:43.338339 I2C: 00:10: enabled 1
1735 17:17:43.342229 I2C: 00:15: enabled 1
1736 17:17:43.342826 GENERIC: 0.0: enabled 0
1737 17:17:43.344751 GENERIC: 1.0: enabled 0
1738 17:17:43.348259 GENERIC: 0.0: enabled 1
1739 17:17:43.348716 SPI: 00: enabled 1
1740 17:17:43.351690 SPI: 00: enabled 1
1741 17:17:43.354991 PNP: 0c09.0: enabled 1
1742 17:17:43.355445 GENERIC: 0.0: enabled 1
1743 17:17:43.358403 USB3 port 0: enabled 1
1744 17:17:43.361389 USB3 port 1: enabled 1
1745 17:17:43.364751 USB3 port 2: enabled 0
1746 17:17:43.365207 USB3 port 3: enabled 0
1747 17:17:43.368322 USB2 port 0: enabled 0
1748 17:17:43.371824 USB2 port 1: enabled 1
1749 17:17:43.372299 USB2 port 2: enabled 1
1750 17:17:43.374552 USB2 port 3: enabled 0
1751 17:17:43.377910 USB2 port 4: enabled 1
1752 17:17:43.378362 USB2 port 5: enabled 0
1753 17:17:43.381339 USB2 port 6: enabled 0
1754 17:17:43.384897 USB2 port 7: enabled 0
1755 17:17:43.388224 USB2 port 8: enabled 0
1756 17:17:43.388681 USB2 port 9: enabled 0
1757 17:17:43.391553 USB3 port 0: enabled 0
1758 17:17:43.394649 USB3 port 1: enabled 1
1759 17:17:43.395169 USB3 port 2: enabled 0
1760 17:17:43.398064 USB3 port 3: enabled 0
1761 17:17:43.401699 GENERIC: 0.0: enabled 1
1762 17:17:43.404545 GENERIC: 1.0: enabled 1
1763 17:17:43.405000 APIC: 01: enabled 1
1764 17:17:43.407824 APIC: 03: enabled 1
1765 17:17:43.408515 APIC: 07: enabled 1
1766 17:17:43.411221 APIC: 05: enabled 1
1767 17:17:43.414459 APIC: 04: enabled 1
1768 17:17:43.414987 APIC: 02: enabled 1
1769 17:17:43.417796 APIC: 06: enabled 1
1770 17:17:43.421240 PCI: 01:00.0: enabled 1
1771 17:17:43.424693 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1772 17:17:43.431261 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 17:17:43.434338 ELOG: NV offset 0xf30000 size 0x1000
1774 17:17:43.441253 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 17:17:43.447606 ELOG: Event(17) added with size 13 at 2023-10-02 17:17:42 UTC
1776 17:17:43.454561 ELOG: Event(92) added with size 9 at 2023-10-02 17:17:42 UTC
1777 17:17:43.460765 ELOG: Event(93) added with size 9 at 2023-10-02 17:17:42 UTC
1778 17:17:43.467474 ELOG: Event(9E) added with size 10 at 2023-10-02 17:17:42 UTC
1779 17:17:43.474481 ELOG: Event(9F) added with size 14 at 2023-10-02 17:17:42 UTC
1780 17:17:43.480687 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 17:17:43.487716 ELOG: Event(A1) added with size 10 at 2023-10-02 17:17:42 UTC
1782 17:17:43.493906 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1783 17:17:43.500682 ELOG: Event(A0) added with size 9 at 2023-10-02 17:17:42 UTC
1784 17:17:43.504016 elog_add_boot_reason: Logged dev mode boot
1785 17:17:43.510162 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1786 17:17:43.510680 Finalize devices...
1787 17:17:43.513708 Devices finalized
1788 17:17:43.520169 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1789 17:17:43.524373 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1790 17:17:43.530157 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1791 17:17:43.533757 ME: HFSTS1 : 0x80030055
1792 17:17:43.540282 ME: HFSTS2 : 0x30280116
1793 17:17:43.543475 ME: HFSTS3 : 0x00000050
1794 17:17:43.546554 ME: HFSTS4 : 0x00004000
1795 17:17:43.553392 ME: HFSTS5 : 0x00000000
1796 17:17:43.556807 ME: HFSTS6 : 0x00400006
1797 17:17:43.560147 ME: Manufacturing Mode : YES
1798 17:17:43.563437 ME: SPI Protection Mode Enabled : NO
1799 17:17:43.569725 ME: FW Partition Table : OK
1800 17:17:43.573151 ME: Bringup Loader Failure : NO
1801 17:17:43.576571 ME: Firmware Init Complete : NO
1802 17:17:43.579677 ME: Boot Options Present : NO
1803 17:17:43.583645 ME: Update In Progress : NO
1804 17:17:43.586859 ME: D0i3 Support : YES
1805 17:17:43.589739 ME: Low Power State Enabled : NO
1806 17:17:43.593349 ME: CPU Replaced : YES
1807 17:17:43.600095 ME: CPU Replacement Valid : YES
1808 17:17:43.603257 ME: Current Working State : 5
1809 17:17:43.606652 ME: Current Operation State : 1
1810 17:17:43.610129 ME: Current Operation Mode : 3
1811 17:17:43.613062 ME: Error Code : 0
1812 17:17:43.616462 ME: Enhanced Debug Mode : NO
1813 17:17:43.619990 ME: CPU Debug Disabled : YES
1814 17:17:43.623052 ME: TXT Support : NO
1815 17:17:43.629823 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1816 17:17:43.636215 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1817 17:17:43.639618 CBFS: 'fallback/slic' not found.
1818 17:17:43.646944 ACPI: Writing ACPI tables at 76b01000.
1819 17:17:43.647511 ACPI: * FACS
1820 17:17:43.649495 ACPI: * DSDT
1821 17:17:43.652829 Ramoops buffer: 0x100000@0x76a00000.
1822 17:17:43.656194 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1823 17:17:43.662845 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1824 17:17:43.666187 Google Chrome EC: version:
1825 17:17:43.669871 ro: voema_v2.0.7540-147f8d37d1
1826 17:17:43.672890 rw: voema_v2.0.7540-147f8d37d1
1827 17:17:43.673349 running image: 2
1828 17:17:43.679241 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1829 17:17:43.684258 ACPI: * FADT
1830 17:17:43.684716 SCI is IRQ9
1831 17:17:43.691027 ACPI: added table 1/32, length now 40
1832 17:17:43.691489 ACPI: * SSDT
1833 17:17:43.693906 Found 1 CPU(s) with 8 core(s) each.
1834 17:17:43.700995 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1835 17:17:43.703744 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1836 17:17:43.707128 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1837 17:17:43.710882 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1838 17:17:43.717179 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1839 17:17:43.723811 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1840 17:17:43.727408 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1841 17:17:43.733953 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1842 17:17:43.740607 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1843 17:17:43.743743 \_SB.PCI0.RP09: Added StorageD3Enable property
1844 17:17:43.747099 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1845 17:17:43.754012 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1846 17:17:43.760806 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1847 17:17:43.764161 PS2K: Passing 80 keymaps to kernel
1848 17:17:43.770880 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1849 17:17:43.777639 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1850 17:17:43.784091 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1851 17:17:43.791145 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1852 17:17:43.797835 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1853 17:17:43.804214 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1854 17:17:43.811148 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1855 17:17:43.817126 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1856 17:17:43.820957 ACPI: added table 2/32, length now 44
1857 17:17:43.823716 ACPI: * MCFG
1858 17:17:43.827157 ACPI: added table 3/32, length now 48
1859 17:17:43.827623 ACPI: * TPM2
1860 17:17:43.830529 TPM2 log created at 0x769f0000
1861 17:17:43.834041 ACPI: added table 4/32, length now 52
1862 17:17:43.837552 ACPI: * MADT
1863 17:17:43.838010 SCI is IRQ9
1864 17:17:43.840330 ACPI: added table 5/32, length now 56
1865 17:17:43.843804 current = 76b09850
1866 17:17:43.844258 ACPI: * DMAR
1867 17:17:43.850485 ACPI: added table 6/32, length now 60
1868 17:17:43.853695 ACPI: added table 7/32, length now 64
1869 17:17:43.854154 ACPI: * HPET
1870 17:17:43.857169 ACPI: added table 8/32, length now 68
1871 17:17:43.860622 ACPI: done.
1872 17:17:43.863417 ACPI tables: 35216 bytes.
1873 17:17:43.863737 smbios_write_tables: 769ef000
1874 17:17:43.866802 EC returned error result code 3
1875 17:17:43.870382 Couldn't obtain OEM name from CBI
1876 17:17:43.874145 Create SMBIOS type 16
1877 17:17:43.877770 Create SMBIOS type 17
1878 17:17:43.881047 GENERIC: 0.0 (WIFI Device)
1879 17:17:43.884260 SMBIOS tables: 1750 bytes.
1880 17:17:43.887683 Writing table forward entry at 0x00000500
1881 17:17:43.894219 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1882 17:17:43.897634 Writing coreboot table at 0x76b25000
1883 17:17:43.904236 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1884 17:17:43.907856 1. 0000000000001000-000000000009ffff: RAM
1885 17:17:43.910755 2. 00000000000a0000-00000000000fffff: RESERVED
1886 17:17:43.917155 3. 0000000000100000-00000000769eefff: RAM
1887 17:17:43.921122 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1888 17:17:43.927228 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1889 17:17:43.934156 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1890 17:17:43.937777 7. 0000000077000000-000000007fbfffff: RESERVED
1891 17:17:43.944268 8. 00000000c0000000-00000000cfffffff: RESERVED
1892 17:17:43.947477 9. 00000000f8000000-00000000f9ffffff: RESERVED
1893 17:17:43.950448 10. 00000000fb000000-00000000fb000fff: RESERVED
1894 17:17:43.957504 11. 00000000fe000000-00000000fe00ffff: RESERVED
1895 17:17:43.960899 12. 00000000fed80000-00000000fed87fff: RESERVED
1896 17:17:43.967478 13. 00000000fed90000-00000000fed92fff: RESERVED
1897 17:17:43.970597 14. 00000000feda0000-00000000feda1fff: RESERVED
1898 17:17:43.977175 15. 00000000fedc0000-00000000feddffff: RESERVED
1899 17:17:43.980404 16. 0000000100000000-00000002803fffff: RAM
1900 17:17:43.983572 Passing 4 GPIOs to payload:
1901 17:17:43.987229 NAME | PORT | POLARITY | VALUE
1902 17:17:43.994002 lid | undefined | high | high
1903 17:17:44.000376 power | undefined | high | low
1904 17:17:44.003760 oprom | undefined | high | low
1905 17:17:44.010506 EC in RW | 0x000000e5 | high | high
1906 17:17:44.017183 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 421
1907 17:17:44.017650 coreboot table: 1576 bytes.
1908 17:17:44.023108 IMD ROOT 0. 0x76fff000 0x00001000
1909 17:17:44.026680 IMD SMALL 1. 0x76ffe000 0x00001000
1910 17:17:44.030091 FSP MEMORY 2. 0x76c4e000 0x003b0000
1911 17:17:44.033704 VPD 3. 0x76c4d000 0x00000367
1912 17:17:44.036915 RO MCACHE 4. 0x76c4c000 0x00000fdc
1913 17:17:44.039830 CONSOLE 5. 0x76c2c000 0x00020000
1914 17:17:44.043366 FMAP 6. 0x76c2b000 0x00000578
1915 17:17:44.050607 TIME STAMP 7. 0x76c2a000 0x00000910
1916 17:17:44.053238 VBOOT WORK 8. 0x76c16000 0x00014000
1917 17:17:44.056959 ROMSTG STCK 9. 0x76c15000 0x00001000
1918 17:17:44.060415 AFTER CAR 10. 0x76c0a000 0x0000b000
1919 17:17:44.063243 RAMSTAGE 11. 0x76b97000 0x00073000
1920 17:17:44.066460 REFCODE 12. 0x76b42000 0x00055000
1921 17:17:44.069850 SMM BACKUP 13. 0x76b32000 0x00010000
1922 17:17:44.073646 4f444749 14. 0x76b30000 0x00002000
1923 17:17:44.076373 EXT VBT15. 0x76b2d000 0x0000219f
1924 17:17:44.083554 COREBOOT 16. 0x76b25000 0x00008000
1925 17:17:44.086281 ACPI 17. 0x76b01000 0x00024000
1926 17:17:44.089515 ACPI GNVS 18. 0x76b00000 0x00001000
1927 17:17:44.093207 RAMOOPS 19. 0x76a00000 0x00100000
1928 17:17:44.096648 TPM2 TCGLOG20. 0x769f0000 0x00010000
1929 17:17:44.099515 SMBIOS 21. 0x769ef000 0x00000800
1930 17:17:44.102998 IMD small region:
1931 17:17:44.106310 IMD ROOT 0. 0x76ffec00 0x00000400
1932 17:17:44.109812 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1933 17:17:44.112933 POWER STATE 2. 0x76ffeb80 0x00000044
1934 17:17:44.116267 ROMSTAGE 3. 0x76ffeb60 0x00000004
1935 17:17:44.122707 MEM INFO 4. 0x76ffe980 0x000001e0
1936 17:17:44.126235 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1937 17:17:44.130085 MTRR: Physical address space:
1938 17:17:44.135864 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1939 17:17:44.142354 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1940 17:17:44.149560 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1941 17:17:44.155861 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1942 17:17:44.162360 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1943 17:17:44.169448 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1944 17:17:44.175434 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1945 17:17:44.178857 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 17:17:44.182323 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 17:17:44.185633 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 17:17:44.191982 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 17:17:44.195340 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 17:17:44.199081 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 17:17:44.202508 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 17:17:44.205836 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 17:17:44.212228 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 17:17:44.215628 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 17:17:44.218755 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 17:17:44.222513 call enable_fixed_mtrr()
1957 17:17:44.225731 CPU physical address size: 39 bits
1958 17:17:44.232449 MTRR: default type WB/UC MTRR counts: 6/6.
1959 17:17:44.235529 MTRR: UC selected as default type.
1960 17:17:44.242471 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1961 17:17:44.245769 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1962 17:17:44.252575 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1963 17:17:44.258703 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1964 17:17:44.265669 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1965 17:17:44.272296 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1966 17:17:44.272874
1967 17:17:44.275716 MTRR check
1968 17:17:44.278570 Fixed MTRRs : Enabled
1969 17:17:44.279073 Variable MTRRs: Enabled
1970 17:17:44.279443
1971 17:17:44.285350 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 17:17:44.288820 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 17:17:44.291797 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 17:17:44.295254 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 17:17:44.298653 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 17:17:44.305239 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 17:17:44.308687 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 17:17:44.312041 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 17:17:44.315318 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 17:17:44.321597 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 17:17:44.325514 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 17:17:44.328826 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 17:17:44.331463 call enable_fixed_mtrr()
1984 17:17:44.334950 MTRR: Fixed MSR 0x258 0x0606060606060606
1985 17:17:44.341877 MTRR: Fixed MSR 0x259 0x0000000000000000
1986 17:17:44.344782 MTRR: Fixed MSR 0x268 0x0606060606060606
1987 17:17:44.348341 MTRR: Fixed MSR 0x269 0x0606060606060606
1988 17:17:44.351602 MTRR: Fixed MSR 0x26a 0x0606060606060606
1989 17:17:44.358449 MTRR: Fixed MSR 0x26b 0x0606060606060606
1990 17:17:44.361901 MTRR: Fixed MSR 0x26c 0x0606060606060606
1991 17:17:44.364912 MTRR: Fixed MSR 0x26d 0x0606060606060606
1992 17:17:44.368373 MTRR: Fixed MSR 0x26e 0x0606060606060606
1993 17:17:44.375038 MTRR: Fixed MSR 0x26f 0x0606060606060606
1994 17:17:44.378098 CPU physical address size: 39 bits
1995 17:17:44.381746 call enable_fixed_mtrr()
1996 17:17:44.387939 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1997 17:17:44.391525 MTRR: Fixed MSR 0x250 0x0606060606060606
1998 17:17:44.395457 Checking cr50 for pending updates
1999 17:17:44.398975 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 17:17:44.402373 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 17:17:44.408917 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 17:17:44.412484 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 17:17:44.415717 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 17:17:44.419082 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 17:17:44.422669 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 17:17:44.429162 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 17:17:44.432785 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 17:17:44.435598 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 17:17:44.439466 Reading cr50 TPM mode
2010 17:17:44.443583 call enable_fixed_mtrr()
2011 17:17:44.446662 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 17:17:44.449633 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 17:17:44.452897 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 17:17:44.459562 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 17:17:44.463434 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 17:17:44.466413 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 17:17:44.469694 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 17:17:44.476384 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 17:17:44.479631 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 17:17:44.483116 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 17:17:44.486597 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 17:17:44.489634 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 17:17:44.496780 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 17:17:44.499350 call enable_fixed_mtrr()
2025 17:17:44.502662 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 17:17:44.506509 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 17:17:44.509700 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 17:17:44.516372 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 17:17:44.519263 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 17:17:44.522867 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 17:17:44.526064 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 17:17:44.533251 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 17:17:44.535844 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 17:17:44.539318 CPU physical address size: 39 bits
2035 17:17:44.543466 call enable_fixed_mtrr()
2036 17:17:44.549979 BS: BS_PAYLOAD_LOAD entry times (exec / console): 50 / 7 ms
2037 17:17:44.553399 CPU physical address size: 39 bits
2038 17:17:44.563193 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2039 17:17:44.566492 CPU physical address size: 39 bits
2040 17:17:44.569693 CPU physical address size: 39 bits
2041 17:17:44.572967 Checking segment from ROM address 0xffc02b38
2042 17:17:44.576220 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 17:17:44.582894 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 17:17:44.585862 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 17:17:44.589739 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 17:17:44.592499 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 17:17:44.599150 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 17:17:44.602492 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 17:17:44.606298 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 17:17:44.609702 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 17:17:44.616007 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 17:17:44.619211 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 17:17:44.622371 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 17:17:44.629225 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 17:17:44.629688 call enable_fixed_mtrr()
2056 17:17:44.635521 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 17:17:44.638929 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 17:17:44.642557 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 17:17:44.645879 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 17:17:44.652575 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 17:17:44.655866 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 17:17:44.658736 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 17:17:44.662155 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 17:17:44.668597 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 17:17:44.671986 CPU physical address size: 39 bits
2066 17:17:44.675295 call enable_fixed_mtrr()
2067 17:17:44.678496 Checking segment from ROM address 0xffc02b54
2068 17:17:44.681859 CPU physical address size: 39 bits
2069 17:17:44.688509 Loading segment from ROM address 0xffc02b38
2070 17:17:44.688979 code (compression=0)
2071 17:17:44.698727 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2072 17:17:44.708577 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2073 17:17:44.709154 it's not compressed!
2074 17:17:44.848501 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2075 17:17:44.855318 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2076 17:17:44.862192 Loading segment from ROM address 0xffc02b54
2077 17:17:44.862753 Entry Point 0x30000000
2078 17:17:44.865082 Loaded segments
2079 17:17:44.871922 BS: BS_PAYLOAD_LOAD run times (exec / console): 251 / 64 ms
2080 17:17:44.915232 Finalizing chipset.
2081 17:17:44.917695 Finalizing SMM.
2082 17:17:44.918156 APMC done.
2083 17:17:44.924600 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2084 17:17:44.928129 mp_park_aps done after 0 msecs.
2085 17:17:44.931297 Jumping to boot code at 0x30000000(0x76b25000)
2086 17:17:44.941148 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2087 17:17:44.941719
2088 17:17:44.942093
2089 17:17:44.944683
2090 17:17:44.945247 Starting depthcharge on Voema...
2091 17:17:44.946434 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2092 17:17:44.947018 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2093 17:17:44.947473 Setting prompt string to ['volteer:']
2094 17:17:44.947899 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2095 17:17:44.948679
2096 17:17:44.954234 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2097 17:17:44.954802
2098 17:17:44.960524 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2099 17:17:44.960991
2100 17:17:44.967726 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2101 17:17:44.968288
2102 17:17:44.970509 Failed to find eMMC card reader
2103 17:17:44.971001
2104 17:17:44.971373 Wipe memory regions:
2105 17:17:44.973957
2106 17:17:44.977590 [0x00000000001000, 0x000000000a0000)
2107 17:17:44.978156
2108 17:17:44.980417 [0x00000000100000, 0x00000030000000)
2109 17:17:45.006040
2110 17:17:45.009044 [0x00000032662db0, 0x000000769ef000)
2111 17:17:45.045179
2112 17:17:45.048690 [0x00000100000000, 0x00000280400000)
2113 17:17:45.250350
2114 17:17:45.253885 ec_init: CrosEC protocol v3 supported (256, 256)
2115 17:17:45.254454
2116 17:17:45.260266 update_port_state: port C0 state: usb enable 1 mux conn 0
2117 17:17:45.260837
2118 17:17:45.269856 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2119 17:17:45.270418
2120 17:17:45.276857 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2121 17:17:45.277428
2122 17:17:45.280051 send_conn_disc_msg: pmc_send_cmd succeeded
2123 17:17:45.711670
2124 17:17:45.712241 R8152: Initializing
2125 17:17:45.712621
2126 17:17:45.714106 Version 6 (ocp_data = 5c30)
2127 17:17:45.714567
2128 17:17:45.717827 R8152: Done initializing
2129 17:17:45.718388
2130 17:17:45.720482 Adding net device
2131 17:17:46.024559
2132 17:17:46.027826 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2133 17:17:46.028297
2134 17:17:46.028704
2135 17:17:46.029239
2136 17:17:46.031485 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 17:17:46.132852 volteer: tftpboot 192.168.201.1 11661468/tftp-deploy-27_944sv/kernel/bzImage 11661468/tftp-deploy-27_944sv/kernel/cmdline 11661468/tftp-deploy-27_944sv/ramdisk/ramdisk.cpio.gz
2139 17:17:46.133519 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2140 17:17:46.134000 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2141 17:17:46.138535 tftpboot 192.168.201.1 11661468/tftp-deploy-27_944sv/kernel/bzIploy-27_944sv/kernel/cmdline 11661468/tftp-deploy-27_944sv/ramdisk/ramdisk.cpio.gz
2142 17:17:46.138644
2143 17:17:46.138737 Waiting for link
2144 17:17:46.342135
2145 17:17:46.342699 done.
2146 17:17:46.343110
2147 17:17:46.343460 MAC: 00:24:32:30:79:06
2148 17:17:46.343798
2149 17:17:46.344901 Sending DHCP discover... done.
2150 17:17:46.345362
2151 17:17:46.348396 Waiting for reply... done.
2152 17:17:46.348962
2153 17:17:46.353049 Sending DHCP request... done.
2154 17:17:46.353511
2155 17:17:46.358929 Waiting for reply... done.
2156 17:17:46.359559
2157 17:17:46.359941 My ip is 192.168.201.23
2158 17:17:46.360290
2159 17:17:46.362035 The DHCP server ip is 192.168.201.1
2160 17:17:46.365405
2161 17:17:46.368288 TFTP server IP predefined by user: 192.168.201.1
2162 17:17:46.368758
2163 17:17:46.375369 Bootfile predefined by user: 11661468/tftp-deploy-27_944sv/kernel/bzImage
2164 17:17:46.375835
2165 17:17:46.378388 Sending tftp read request... done.
2166 17:17:46.378887
2167 17:17:46.387657 Waiting for the transfer...
2168 17:17:46.388124
2169 17:17:47.108391 00000000 ################################################################
2170 17:17:47.108978
2171 17:17:47.818140 00080000 ################################################################
2172 17:17:47.818730
2173 17:17:48.548596 00100000 ################################################################
2174 17:17:48.549124
2175 17:17:49.262303 00180000 ################################################################
2176 17:17:49.262880
2177 17:17:49.968493 00200000 ################################################################
2178 17:17:49.969019
2179 17:17:50.676073 00280000 ################################################################
2180 17:17:50.676641
2181 17:17:51.364700 00300000 ################################################################
2182 17:17:51.365320
2183 17:17:52.089002 00380000 ################################################################
2184 17:17:52.089613
2185 17:17:52.793957 00400000 ################################################################
2186 17:17:52.794526
2187 17:17:53.502963 00480000 ################################################################
2188 17:17:53.503155
2189 17:17:54.181024 00500000 ################################################################
2190 17:17:54.181603
2191 17:17:54.894613 00580000 ################################################################
2192 17:17:54.895254
2193 17:17:55.608367 00600000 ################################################################
2194 17:17:55.609009
2195 17:17:56.304223 00680000 ################################################################
2196 17:17:56.304805
2197 17:17:57.015231 00700000 ################################################################
2198 17:17:57.015812
2199 17:17:57.724498 00780000 ################################################################
2200 17:17:57.725042
2201 17:17:57.862503 00800000 ############# done.
2202 17:17:57.863132
2203 17:17:57.866023 The bootfile was 8490896 bytes long.
2204 17:17:57.866493
2205 17:17:57.869014 Sending tftp read request... done.
2206 17:17:57.869489
2207 17:17:57.872394 Waiting for the transfer...
2208 17:17:57.872851
2209 17:17:58.533252 00000000 ################################################################
2210 17:17:58.533864
2211 17:17:59.234432 00080000 ################################################################
2212 17:17:59.235256
2213 17:17:59.936480 00100000 ################################################################
2214 17:17:59.937060
2215 17:18:00.603883 00180000 ################################################################
2216 17:18:00.604453
2217 17:18:01.297671 00200000 ################################################################
2218 17:18:01.298422
2219 17:18:01.991480 00280000 ################################################################
2220 17:18:01.992042
2221 17:18:02.709426 00300000 ################################################################
2222 17:18:02.709940
2223 17:18:03.390448 00380000 ################################################################
2224 17:18:03.391020
2225 17:18:04.094881 00400000 ################################################################
2226 17:18:04.095439
2227 17:18:04.797217 00480000 ################################################################
2228 17:18:04.797765
2229 17:18:05.527203 00500000 ################################################################
2230 17:18:05.527810
2231 17:18:06.217178 00580000 ################################################################
2232 17:18:06.217523
2233 17:18:06.917813 00600000 ################################################################
2234 17:18:06.918453
2235 17:18:07.635112 00680000 ################################################################
2236 17:18:07.635671
2237 17:18:08.350337 00700000 ################################################################
2238 17:18:08.350953
2239 17:18:09.046162 00780000 ################################################################
2240 17:18:09.046719
2241 17:18:09.621452 00800000 #################################################### done.
2242 17:18:09.621979
2243 17:18:09.624855 Sending tftp read request... done.
2244 17:18:09.625336
2245 17:18:09.627705 Waiting for the transfer...
2246 17:18:09.628187
2247 17:18:09.628669 00000000 # done.
2248 17:18:09.629141
2249 17:18:09.637949 Command line loaded dynamically from TFTP file: 11661468/tftp-deploy-27_944sv/kernel/cmdline
2250 17:18:09.638533
2251 17:18:09.654254 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2252 17:18:09.658970
2253 17:18:09.661748 Shutting down all USB controllers.
2254 17:18:09.662322
2255 17:18:09.662836 Removing current net device
2256 17:18:09.663306
2257 17:18:09.665088 Finalizing coreboot
2258 17:18:09.665566
2259 17:18:09.671654 Exiting depthcharge with code 4 at timestamp: 33381210
2260 17:18:09.672244
2261 17:18:09.672734
2262 17:18:09.673196 Starting kernel ...
2263 17:18:09.673643
2264 17:18:09.674088
2265 17:18:09.675619 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2266 17:18:09.676219 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2267 17:18:09.676684 Setting prompt string to ['Linux version [0-9]']
2268 17:18:09.677279 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2269 17:18:09.677752 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2271 17:22:29.677152 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2273 17:22:29.678916 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2275 17:22:29.680310 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2278 17:22:29.682531 end: 2 depthcharge-action (duration 00:05:00) [common]
2280 17:22:29.683940 Cleaning after the job
2281 17:22:29.684412 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11661468/tftp-deploy-27_944sv/ramdisk
2282 17:22:29.691086 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11661468/tftp-deploy-27_944sv/kernel
2283 17:22:29.700298 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11661468/tftp-deploy-27_944sv/modules
2284 17:22:29.702868 start: 5.1 power-off (timeout 00:00:30) [common]
2285 17:22:29.704220 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2286 17:22:29.806568 >> Command sent successfully.
2287 17:22:29.813247 Returned 0 in 0 seconds
2288 17:22:29.914499 end: 5.1 power-off (duration 00:00:00) [common]
2290 17:22:29.916230 start: 5.2 read-feedback (timeout 00:10:00) [common]
2291 17:22:29.917606 Listened to connection for namespace 'common' for up to 1s
2292 17:22:30.918211 Finalising connection for namespace 'common'
2293 17:22:30.918930 Disconnecting from shell: Finalise
2294 17:22:30.919364
2295 17:22:31.020399 end: 5.2 read-feedback (duration 00:00:01) [common]
2296 17:22:31.021019 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11661468
2297 17:22:31.072766 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11661468
2298 17:22:31.072973 JobError: Your job cannot terminate cleanly.