Boot log: asus-cx9400-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 17:17:24.622808 lava-dispatcher, installed at version: 2023.08
2 17:17:24.623032 start: 0 validate
3 17:17:24.623169 Start time: 2023-10-02 17:17:24.623161+00:00 (UTC)
4 17:17:24.623294 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:17:24.623434 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 17:17:24.892367 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:17:24.892567 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1779-g48d33e0df7175%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:17:25.160032 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:17:25.160757 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1779-g48d33e0df7175%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:17:28.415821 validate duration: 3.79
12 17:17:28.417222 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:17:28.417797 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:17:28.418270 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:17:28.418852 Not decompressing ramdisk as can be used compressed.
16 17:17:28.419295 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 17:17:28.419619 saving as /var/lib/lava/dispatcher/tmp/11661453/tftp-deploy-9lyb9j5p/ramdisk/rootfs.cpio.gz
18 17:17:28.419936 total size: 35760064 (34 MB)
19 17:17:28.943165 progress 0 % (0 MB)
20 17:17:28.956868 progress 5 % (1 MB)
21 17:17:28.967240 progress 10 % (3 MB)
22 17:17:28.977449 progress 15 % (5 MB)
23 17:17:28.987885 progress 20 % (6 MB)
24 17:17:28.998122 progress 25 % (8 MB)
25 17:17:29.008571 progress 30 % (10 MB)
26 17:17:29.018756 progress 35 % (11 MB)
27 17:17:29.029209 progress 40 % (13 MB)
28 17:17:29.039679 progress 45 % (15 MB)
29 17:17:29.049985 progress 50 % (17 MB)
30 17:17:29.060411 progress 55 % (18 MB)
31 17:17:29.070620 progress 60 % (20 MB)
32 17:17:29.081085 progress 65 % (22 MB)
33 17:17:29.091280 progress 70 % (23 MB)
34 17:17:29.101677 progress 75 % (25 MB)
35 17:17:29.112150 progress 80 % (27 MB)
36 17:17:29.122355 progress 85 % (29 MB)
37 17:17:29.132682 progress 90 % (30 MB)
38 17:17:29.142795 progress 95 % (32 MB)
39 17:17:29.153038 progress 100 % (34 MB)
40 17:17:29.153211 34 MB downloaded in 0.73 s (46.51 MB/s)
41 17:17:29.153391 end: 1.1.1 http-download (duration 00:00:01) [common]
43 17:17:29.153659 end: 1.1 download-retry (duration 00:00:01) [common]
44 17:17:29.153755 start: 1.2 download-retry (timeout 00:09:59) [common]
45 17:17:29.153848 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 17:17:29.153997 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1779-g48d33e0df7175/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:17:29.154077 saving as /var/lib/lava/dispatcher/tmp/11661453/tftp-deploy-9lyb9j5p/kernel/bzImage
48 17:17:29.154145 total size: 8490896 (8 MB)
49 17:17:29.154212 No compression specified
50 17:17:29.155432 progress 0 % (0 MB)
51 17:17:29.157839 progress 5 % (0 MB)
52 17:17:29.160397 progress 10 % (0 MB)
53 17:17:29.162930 progress 15 % (1 MB)
54 17:17:29.165462 progress 20 % (1 MB)
55 17:17:29.167987 progress 25 % (2 MB)
56 17:17:29.170523 progress 30 % (2 MB)
57 17:17:29.173073 progress 35 % (2 MB)
58 17:17:29.175598 progress 40 % (3 MB)
59 17:17:29.178142 progress 45 % (3 MB)
60 17:17:29.180755 progress 50 % (4 MB)
61 17:17:29.183277 progress 55 % (4 MB)
62 17:17:29.185772 progress 60 % (4 MB)
63 17:17:29.188261 progress 65 % (5 MB)
64 17:17:29.190746 progress 70 % (5 MB)
65 17:17:29.193232 progress 75 % (6 MB)
66 17:17:29.195715 progress 80 % (6 MB)
67 17:17:29.198233 progress 85 % (6 MB)
68 17:17:29.200704 progress 90 % (7 MB)
69 17:17:29.203192 progress 95 % (7 MB)
70 17:17:29.205708 progress 100 % (8 MB)
71 17:17:29.205839 8 MB downloaded in 0.05 s (156.66 MB/s)
72 17:17:29.206001 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:17:29.206267 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:17:29.206385 start: 1.3 download-retry (timeout 00:09:59) [common]
76 17:17:29.206484 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 17:17:29.206637 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1779-g48d33e0df7175/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:17:29.206719 saving as /var/lib/lava/dispatcher/tmp/11661453/tftp-deploy-9lyb9j5p/modules/modules.tar
79 17:17:29.206789 total size: 250800 (0 MB)
80 17:17:29.206859 Using unxz to decompress xz
81 17:17:29.211520 progress 13 % (0 MB)
82 17:17:29.211979 progress 26 % (0 MB)
83 17:17:29.212243 progress 39 % (0 MB)
84 17:17:29.214039 progress 52 % (0 MB)
85 17:17:29.216149 progress 65 % (0 MB)
86 17:17:29.218238 progress 78 % (0 MB)
87 17:17:29.220233 progress 91 % (0 MB)
88 17:17:29.222411 progress 100 % (0 MB)
89 17:17:29.228426 0 MB downloaded in 0.02 s (11.06 MB/s)
90 17:17:29.228707 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:17:29.229021 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:17:29.229130 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 17:17:29.229244 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 17:17:29.229340 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:17:29.229440 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 17:17:29.229674 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn
98 17:17:29.229824 makedir: /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin
99 17:17:29.229943 makedir: /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/tests
100 17:17:29.230052 makedir: /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/results
101 17:17:29.230179 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-add-keys
102 17:17:29.230341 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-add-sources
103 17:17:29.230490 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-background-process-start
104 17:17:29.230637 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-background-process-stop
105 17:17:29.230783 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-common-functions
106 17:17:29.230927 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-echo-ipv4
107 17:17:29.231069 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-install-packages
108 17:17:29.231212 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-installed-packages
109 17:17:29.231354 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-os-build
110 17:17:29.231496 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-probe-channel
111 17:17:29.231638 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-probe-ip
112 17:17:29.231782 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-target-ip
113 17:17:29.231927 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-target-mac
114 17:17:29.232068 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-target-storage
115 17:17:29.232216 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-test-case
116 17:17:29.232357 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-test-event
117 17:17:29.232496 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-test-feedback
118 17:17:29.232639 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-test-raise
119 17:17:29.232782 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-test-reference
120 17:17:29.232928 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-test-runner
121 17:17:29.233074 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-test-set
122 17:17:29.233217 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-test-shell
123 17:17:29.233362 Updating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-install-packages (oe)
124 17:17:29.233533 Updating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/bin/lava-installed-packages (oe)
125 17:17:29.233671 Creating /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/environment
126 17:17:29.233783 LAVA metadata
127 17:17:29.233865 - LAVA_JOB_ID=11661453
128 17:17:29.233935 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:17:29.234047 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 17:17:29.234123 skipped lava-vland-overlay
131 17:17:29.234206 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:17:29.234298 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 17:17:29.234367 skipped lava-multinode-overlay
134 17:17:29.234448 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:17:29.234537 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 17:17:29.234624 Loading test definitions
137 17:17:29.234731 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 17:17:29.234816 Using /lava-11661453 at stage 0
139 17:17:29.235171 uuid=11661453_1.4.2.3.1 testdef=None
140 17:17:29.235272 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:17:29.235370 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 17:17:29.235952 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:17:29.236194 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 17:17:29.236897 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:17:29.237154 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 17:17:29.237824 runner path: /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/0/tests/0_cros-ec test_uuid 11661453_1.4.2.3.1
149 17:17:29.238002 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:17:29.238229 Creating lava-test-runner.conf files
152 17:17:29.238299 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11661453/lava-overlay-gqoc1itn/lava-11661453/0 for stage 0
153 17:17:29.238398 - 0_cros-ec
154 17:17:29.238506 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 17:17:29.238605 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
156 17:17:29.246116 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 17:17:29.246239 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
158 17:17:29.246335 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 17:17:29.246439 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 17:17:29.246562 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
161 17:17:30.397643 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 17:17:30.398063 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
163 17:17:30.398193 extracting modules file /var/lib/lava/dispatcher/tmp/11661453/tftp-deploy-9lyb9j5p/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11661453/extract-overlay-ramdisk-h4lopmui/ramdisk
164 17:17:30.414409 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 17:17:30.414568 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
166 17:17:30.414669 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11661453/compress-overlay-wh3570gm/overlay-1.4.2.4.tar.gz to ramdisk
167 17:17:30.414746 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11661453/compress-overlay-wh3570gm/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11661453/extract-overlay-ramdisk-h4lopmui/ramdisk
168 17:17:30.422934 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 17:17:30.423066 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
170 17:17:30.423169 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 17:17:30.423266 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
172 17:17:30.423356 Building ramdisk /var/lib/lava/dispatcher/tmp/11661453/extract-overlay-ramdisk-h4lopmui/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11661453/extract-overlay-ramdisk-h4lopmui/ramdisk
173 17:17:30.977190 >> 184082 blocks
174 17:17:34.918607 rename /var/lib/lava/dispatcher/tmp/11661453/extract-overlay-ramdisk-h4lopmui/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11661453/tftp-deploy-9lyb9j5p/ramdisk/ramdisk.cpio.gz
175 17:17:34.919096 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 17:17:34.919224 start: 1.4.8 prepare-kernel (timeout 00:09:53) [common]
177 17:17:34.919327 start: 1.4.8.1 prepare-fit (timeout 00:09:53) [common]
178 17:17:34.919436 No mkimage arch provided, not using FIT.
179 17:17:34.919534 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 17:17:34.919627 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 17:17:34.919745 end: 1.4 prepare-tftp-overlay (duration 00:00:06) [common]
182 17:17:34.919848 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:53) [common]
183 17:17:34.919938 No LXC device requested
184 17:17:34.920024 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 17:17:34.920125 start: 1.6 deploy-device-env (timeout 00:09:53) [common]
186 17:17:34.920212 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 17:17:34.920294 Checking files for TFTP limit of 4294967296 bytes.
188 17:17:34.920740 end: 1 tftp-deploy (duration 00:00:07) [common]
189 17:17:34.920895 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 17:17:34.920999 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 17:17:34.921130 substitutions:
192 17:17:34.921201 - {DTB}: None
193 17:17:34.921270 - {INITRD}: 11661453/tftp-deploy-9lyb9j5p/ramdisk/ramdisk.cpio.gz
194 17:17:34.921334 - {KERNEL}: 11661453/tftp-deploy-9lyb9j5p/kernel/bzImage
195 17:17:34.921396 - {LAVA_MAC}: None
196 17:17:34.921456 - {PRESEED_CONFIG}: None
197 17:17:34.921515 - {PRESEED_LOCAL}: None
198 17:17:34.921575 - {RAMDISK}: 11661453/tftp-deploy-9lyb9j5p/ramdisk/ramdisk.cpio.gz
199 17:17:34.921634 - {ROOT_PART}: None
200 17:17:34.921693 - {ROOT}: None
201 17:17:34.921751 - {SERVER_IP}: 192.168.201.1
202 17:17:34.921810 - {TEE}: None
203 17:17:34.921867 Parsed boot commands:
204 17:17:34.921927 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 17:17:34.922116 Parsed boot commands: tftpboot 192.168.201.1 11661453/tftp-deploy-9lyb9j5p/kernel/bzImage 11661453/tftp-deploy-9lyb9j5p/kernel/cmdline 11661453/tftp-deploy-9lyb9j5p/ramdisk/ramdisk.cpio.gz
206 17:17:34.922210 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 17:17:34.922298 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 17:17:34.922397 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 17:17:34.922490 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 17:17:34.922567 Not connected, no need to disconnect.
211 17:17:34.922648 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 17:17:34.922731 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 17:17:34.922807 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-4'
214 17:17:34.927149 Setting prompt string to ['lava-test: # ']
215 17:17:34.927554 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 17:17:34.927668 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 17:17:34.927777 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 17:17:34.927893 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 17:17:34.928151 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=reboot'
220 17:17:40.079146 >> Command sent successfully.
221 17:17:40.088857 Returned 0 in 5 seconds
222 17:17:40.189890 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 17:17:40.191378 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 17:17:40.191864 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 17:17:40.192289 Setting prompt string to 'Starting depthcharge on Voema...'
227 17:17:40.192615 Changing prompt to 'Starting depthcharge on Voema...'
228 17:17:40.193048 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 17:17:40.194206 [Enter `^Ec?' for help]
230 17:17:41.784455
231 17:17:41.785020
232 17:17:41.794464 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 17:17:41.798213 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
234 17:17:41.804489 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 17:17:41.808180 CPU: AES supported, TXT NOT supported, VT supported
236 17:17:41.814564 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 17:17:41.820777 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 17:17:41.824536 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 17:17:41.827956 VBOOT: Loading verstage.
240 17:17:41.831684 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 17:17:41.837711 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 17:17:41.840957 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 17:17:41.851692 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 17:17:41.858355 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 17:17:41.858753
246 17:17:41.859057
247 17:17:41.871587 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 17:17:41.885197 Probing TPM: . done!
249 17:17:41.888838 TPM ready after 0 ms
250 17:17:41.892445 Connected to device vid:did:rid of 1ae0:0028:00
251 17:17:41.903804 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
252 17:17:41.910211 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 17:17:41.913516 Initialized TPM device CR50 revision 0
254 17:17:41.963780 tlcl_send_startup: Startup return code is 0
255 17:17:41.964314 TPM: setup succeeded
256 17:17:41.979346 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 17:17:41.993245 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 17:17:42.006419 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 17:17:42.016663 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 17:17:42.020170 Chrome EC: UHEPI supported
261 17:17:42.023708 Phase 1
262 17:17:42.026231 FMAP: area GBB found @ 1805000 (458752 bytes)
263 17:17:42.036432 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 17:17:42.043150 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 17:17:42.049870 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 17:17:42.056113 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 17:17:42.059381 Recovery requested (1009000e)
268 17:17:42.062865 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 17:17:42.074106 tlcl_extend: response is 0
270 17:17:42.080776 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 17:17:42.091213 tlcl_extend: response is 0
272 17:17:42.098026 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 17:17:42.104705 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 17:17:42.110869 BS: verstage times (exec / console): total (unknown) / 142 ms
275 17:17:42.111327
276 17:17:42.111664
277 17:17:42.124387 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 17:17:42.130862 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 17:17:42.134287 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 17:17:42.137333 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 17:17:42.143937 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 17:17:42.147389 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 17:17:42.151257 gpe0_sts[3]: 00080000 gpe0_en[3]: 00092000
284 17:17:42.154635 TCO_STS: 0000 0000
285 17:17:42.157266 GEN_PMCON: d0015038 00002200
286 17:17:42.160822 GBLRST_CAUSE: 00000000 00000000
287 17:17:42.161210 HPR_CAUSE0: 00000000
288 17:17:42.163761 prev_sleep_state 5
289 17:17:42.167336 Boot Count incremented to 29401
290 17:17:42.174587 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 17:17:42.180550 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 17:17:42.187201 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 17:17:42.193888 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 17:17:42.199316 Chrome EC: UHEPI supported
295 17:17:42.205496 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 17:17:42.218363 Probing TPM: done!
297 17:17:42.226281 Connected to device vid:did:rid of 1ae0:0028:00
298 17:17:42.233792 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
299 17:17:42.243423 Initialized TPM device CR50 revision 0
300 17:17:42.253432 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 17:17:42.259872 MRC: Hash idx 0x100b comparison successful.
302 17:17:42.262904 MRC cache found, size faa8
303 17:17:42.263329 bootmode is set to: 2
304 17:17:42.266552 SPD index = 0
305 17:17:42.273121 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 17:17:42.276413 SPD: module type is LPDDR4X
307 17:17:42.279965 SPD: module part number is MT53E512M64D4NW-046
308 17:17:42.286364 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
309 17:17:42.289606 SPD: device width 16 bits, bus width 16 bits
310 17:17:42.296442 SPD: module size is 1024 MB (per channel)
311 17:17:42.728405 CBMEM:
312 17:17:42.731918 IMD: root @ 0x76fff000 254 entries.
313 17:17:42.735238 IMD: root @ 0x76ffec00 62 entries.
314 17:17:42.738197 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 17:17:42.744970 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 17:17:42.748409 External stage cache:
317 17:17:42.751528 IMD: root @ 0x7b3ff000 254 entries.
318 17:17:42.755128 IMD: root @ 0x7b3fec00 62 entries.
319 17:17:42.770219 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 17:17:42.777058 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 17:17:42.783454 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 17:17:42.797413 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 17:17:42.804485 cse_lite: Skip switching to RW in the recovery path
324 17:17:42.805027 8 DIMMs found
325 17:17:42.805378 SMM Memory Map
326 17:17:42.808473 SMRAM : 0x7b000000 0x800000
327 17:17:42.811367 Subregion 0: 0x7b000000 0x200000
328 17:17:42.814918 Subregion 1: 0x7b200000 0x200000
329 17:17:42.818247 Subregion 2: 0x7b400000 0x400000
330 17:17:42.821974 top_of_ram = 0x77000000
331 17:17:42.828410 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 17:17:42.831813 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 17:17:42.838459 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 17:17:42.841321 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 17:17:42.851692 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 17:17:42.857934 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 17:17:42.867719 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 17:17:42.870927 Processing 211 relocs. Offset value of 0x74c0b000
339 17:17:42.880229 BS: romstage times (exec / console): total (unknown) / 277 ms
340 17:17:42.886477
341 17:17:42.886973
342 17:17:42.896350 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 17:17:42.900058 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 17:17:42.909604 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 17:17:42.916626 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 17:17:42.923267 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 17:17:42.929406 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 17:17:42.976929 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 17:17:42.983643 Processing 5008 relocs. Offset value of 0x75d98000
350 17:17:42.986414 BS: postcar times (exec / console): total (unknown) / 59 ms
351 17:17:42.989996
352 17:17:42.990481
353 17:17:42.999798 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 17:17:43.000338 Normal boot
355 17:17:43.003581 FW_CONFIG value is 0x804c02
356 17:17:43.006892 PCI: 00:07.0 disabled by fw_config
357 17:17:43.010104 PCI: 00:07.1 disabled by fw_config
358 17:17:43.013623 PCI: 00:0d.2 disabled by fw_config
359 17:17:43.017133 PCI: 00:1c.7 disabled by fw_config
360 17:17:43.023459 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 17:17:43.030147 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 17:17:43.033620 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 17:17:43.036474 GENERIC: 0.0 disabled by fw_config
364 17:17:43.040346 GENERIC: 1.0 disabled by fw_config
365 17:17:43.047141 fw_config match found: DB_USB=USB3_ACTIVE
366 17:17:43.049933 fw_config match found: DB_USB=USB3_ACTIVE
367 17:17:43.053280 fw_config match found: DB_USB=USB3_ACTIVE
368 17:17:43.056621 fw_config match found: DB_USB=USB3_ACTIVE
369 17:17:43.063478 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 17:17:43.070069 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 17:17:43.077221 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 17:17:43.086613 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 17:17:43.089928 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 17:17:43.096702 microcode: Update skipped, already up-to-date
375 17:17:43.103544 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 17:17:43.130391 Detected 4 core, 8 thread CPU.
377 17:17:43.133205 Setting up SMI for CPU
378 17:17:43.136901 IED base = 0x7b400000
379 17:17:43.137421 IED size = 0x00400000
380 17:17:43.140305 Will perform SMM setup.
381 17:17:43.146404 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
382 17:17:43.153609 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 17:17:43.160386 Processing 16 relocs. Offset value of 0x00030000
384 17:17:43.163994 Attempting to start 7 APs
385 17:17:43.167008 Waiting for 10ms after sending INIT.
386 17:17:43.182329 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
387 17:17:43.182808 done.
388 17:17:43.185488 AP: slot 4 apic_id 7.
389 17:17:43.188568 AP: slot 5 apic_id 6.
390 17:17:43.189201 AP: slot 3 apic_id 5.
391 17:17:43.192167 AP: slot 7 apic_id 4.
392 17:17:43.195855 AP: slot 2 apic_id 2.
393 17:17:43.196278 AP: slot 6 apic_id 3.
394 17:17:43.201451 Waiting for 2nd SIPI to complete...done.
395 17:17:43.208285 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 17:17:43.215304 Processing 13 relocs. Offset value of 0x00038000
397 17:17:43.215471 Unable to locate Global NVS
398 17:17:43.224959 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 17:17:43.228471 Installing permanent SMM handler to 0x7b000000
400 17:17:43.238350 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 17:17:43.241997 Processing 794 relocs. Offset value of 0x7b010000
402 17:17:43.251508 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 17:17:43.254991 Processing 13 relocs. Offset value of 0x7b008000
404 17:17:43.261468 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 17:17:43.268715 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 17:17:43.271880 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 17:17:43.278751 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 17:17:43.285352 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 17:17:43.291567 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 17:17:43.298278 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 17:17:43.298787 Unable to locate Global NVS
412 17:17:43.308090 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 17:17:43.311672 Clearing SMI status registers
414 17:17:43.314994 SMI_STS: GPE0 PM1
415 17:17:43.315415 PM1_STS: PWRBTN
416 17:17:43.317769 GPE0 STD STS:
417 17:17:43.324930 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
418 17:17:43.327883 In relocation handler: CPU 0
419 17:17:43.331484 New SMBASE=0x7b000000 IEDBASE=0x7b400000
420 17:17:43.334952 Writing SMRR. base = 0x7b000006, mask=0xff800c00
421 17:17:43.338483 Relocation complete.
422 17:17:43.344641 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
423 17:17:43.348459 In relocation handler: CPU 1
424 17:17:43.351601 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
425 17:17:43.355007 Relocation complete.
426 17:17:43.361739 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
427 17:17:43.364883 In relocation handler: CPU 7
428 17:17:43.368068 New SMBASE=0x7affe400 IEDBASE=0x7b400000
429 17:17:43.374558 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 17:17:43.374986 Relocation complete.
431 17:17:43.384775 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
432 17:17:43.385333 In relocation handler: CPU 3
433 17:17:43.391860 New SMBASE=0x7afff400 IEDBASE=0x7b400000
434 17:17:43.392383 Relocation complete.
435 17:17:43.401485 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
436 17:17:43.402006 In relocation handler: CPU 5
437 17:17:43.408104 New SMBASE=0x7affec00 IEDBASE=0x7b400000
438 17:17:43.411407 Writing SMRR. base = 0x7b000006, mask=0xff800c00
439 17:17:43.414732 Relocation complete.
440 17:17:43.421429 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
441 17:17:43.424752 In relocation handler: CPU 4
442 17:17:43.428359 New SMBASE=0x7afff000 IEDBASE=0x7b400000
443 17:17:43.431181 Relocation complete.
444 17:17:43.438189 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
445 17:17:43.441471 In relocation handler: CPU 6
446 17:17:43.444538 New SMBASE=0x7affe800 IEDBASE=0x7b400000
447 17:17:43.448133 Relocation complete.
448 17:17:43.454855 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
449 17:17:43.458679 In relocation handler: CPU 2
450 17:17:43.461149 New SMBASE=0x7afff800 IEDBASE=0x7b400000
451 17:17:43.464766 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 17:17:43.468312 Relocation complete.
453 17:17:43.471563 Initializing CPU #0
454 17:17:43.475860 CPU: vendor Intel device 806c1
455 17:17:43.479102 CPU: family 06, model 8c, stepping 01
456 17:17:43.479667 Clearing out pending MCEs
457 17:17:43.482647 Setting up local APIC...
458 17:17:43.486011 apic_id: 0x00 done.
459 17:17:43.489189 Turbo is available but hidden
460 17:17:43.492623 Turbo is available and visible
461 17:17:43.495610 microcode: Update skipped, already up-to-date
462 17:17:43.499225 CPU #0 initialized
463 17:17:43.499602 Initializing CPU #5
464 17:17:43.502544 Initializing CPU #4
465 17:17:43.505627 CPU: vendor Intel device 806c1
466 17:17:43.509213 CPU: family 06, model 8c, stepping 01
467 17:17:43.512416 CPU: vendor Intel device 806c1
468 17:17:43.515497 CPU: family 06, model 8c, stepping 01
469 17:17:43.519149 Clearing out pending MCEs
470 17:17:43.522550 Clearing out pending MCEs
471 17:17:43.522931 Setting up local APIC...
472 17:17:43.525584 Initializing CPU #3
473 17:17:43.529189 Initializing CPU #7
474 17:17:43.532399 CPU: vendor Intel device 806c1
475 17:17:43.535940 CPU: family 06, model 8c, stepping 01
476 17:17:43.536334 Initializing CPU #1
477 17:17:43.539249 Clearing out pending MCEs
478 17:17:43.542469 CPU: vendor Intel device 806c1
479 17:17:43.545727 CPU: family 06, model 8c, stepping 01
480 17:17:43.548909 Setting up local APIC...
481 17:17:43.552166 Setting up local APIC...
482 17:17:43.552544 Initializing CPU #6
483 17:17:43.555603 Initializing CPU #2
484 17:17:43.559221 CPU: vendor Intel device 806c1
485 17:17:43.562668 CPU: family 06, model 8c, stepping 01
486 17:17:43.565331 CPU: vendor Intel device 806c1
487 17:17:43.568874 CPU: family 06, model 8c, stepping 01
488 17:17:43.572300 Clearing out pending MCEs
489 17:17:43.576089 Clearing out pending MCEs
490 17:17:43.576567 apic_id: 0x05 done.
491 17:17:43.579212 Setting up local APIC...
492 17:17:43.582589 Setting up local APIC...
493 17:17:43.585421 apic_id: 0x07 done.
494 17:17:43.585922 apic_id: 0x06 done.
495 17:17:43.592306 microcode: Update skipped, already up-to-date
496 17:17:43.595865 microcode: Update skipped, already up-to-date
497 17:17:43.598793 CPU #4 initialized
498 17:17:43.599277 CPU #5 initialized
499 17:17:43.602327 apic_id: 0x04 done.
500 17:17:43.605543 microcode: Update skipped, already up-to-date
501 17:17:43.612086 microcode: Update skipped, already up-to-date
502 17:17:43.612571 CPU #3 initialized
503 17:17:43.615442 CPU #7 initialized
504 17:17:43.619100 CPU: vendor Intel device 806c1
505 17:17:43.622157 CPU: family 06, model 8c, stepping 01
506 17:17:43.622874 apic_id: 0x03 done.
507 17:17:43.625429 Clearing out pending MCEs
508 17:17:43.631738 microcode: Update skipped, already up-to-date
509 17:17:43.632125 Setting up local APIC...
510 17:17:43.635192 CPU #6 initialized
511 17:17:43.639261 apic_id: 0x02 done.
512 17:17:43.639748 Clearing out pending MCEs
513 17:17:43.645412 microcode: Update skipped, already up-to-date
514 17:17:43.648857 Setting up local APIC...
515 17:17:43.649382 CPU #2 initialized
516 17:17:43.651901 apic_id: 0x01 done.
517 17:17:43.655885 microcode: Update skipped, already up-to-date
518 17:17:43.658878 CPU #1 initialized
519 17:17:43.661974 bsp_do_flight_plan done after 457 msecs.
520 17:17:43.665166 CPU: frequency set to 4000 MHz
521 17:17:43.668501 Enabling SMIs.
522 17:17:43.671830 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 319 ms
523 17:17:43.689522 SATAXPCIE1 indicates PCIe NVMe is present
524 17:17:43.692966 Probing TPM: done!
525 17:17:43.696347 Connected to device vid:did:rid of 1ae0:0028:00
526 17:17:43.706884 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
527 17:17:43.710225 Initialized TPM device CR50 revision 0
528 17:17:43.713264 Enabling S0i3.4
529 17:17:43.720286 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
530 17:17:43.723128 Found a VBT of 8704 bytes after decompression
531 17:17:43.730129 cse_lite: CSE RO boot. HybridStorageMode disabled
532 17:17:43.736740 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
533 17:17:43.812470 FSPS returned 0
534 17:17:43.816076 Executing Phase 1 of FspMultiPhaseSiInit
535 17:17:43.825785 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
536 17:17:43.829711 port C0 DISC req: usage 1 usb3 1 usb2 5
537 17:17:43.832295 Raw Buffer output 0 00000511
538 17:17:43.836006 Raw Buffer output 1 00000000
539 17:17:43.839893 pmc_send_ipc_cmd succeeded
540 17:17:43.846330 port C1 DISC req: usage 1 usb3 2 usb2 3
541 17:17:43.846854 Raw Buffer output 0 00000321
542 17:17:43.849507 Raw Buffer output 1 00000000
543 17:17:43.853505 pmc_send_ipc_cmd succeeded
544 17:17:43.858995 Detected 4 core, 8 thread CPU.
545 17:17:43.861743 Detected 4 core, 8 thread CPU.
546 17:17:44.095987 Display FSP Version Info HOB
547 17:17:44.099024 Reference Code - CPU = a.0.4c.31
548 17:17:44.102479 uCode Version = 0.0.0.86
549 17:17:44.105711 TXT ACM version = ff.ff.ff.ffff
550 17:17:44.109346 Reference Code - ME = a.0.4c.31
551 17:17:44.113001 MEBx version = 0.0.0.0
552 17:17:44.115713 ME Firmware Version = Consumer SKU
553 17:17:44.119480 Reference Code - PCH = a.0.4c.31
554 17:17:44.122384 PCH-CRID Status = Disabled
555 17:17:44.126048 PCH-CRID Original Value = ff.ff.ff.ffff
556 17:17:44.129007 PCH-CRID New Value = ff.ff.ff.ffff
557 17:17:44.132479 OPROM - RST - RAID = ff.ff.ff.ffff
558 17:17:44.135940 PCH Hsio Version = 4.0.0.0
559 17:17:44.139071 Reference Code - SA - System Agent = a.0.4c.31
560 17:17:44.142315 Reference Code - MRC = 2.0.0.1
561 17:17:44.145941 SA - PCIe Version = a.0.4c.31
562 17:17:44.148963 SA-CRID Status = Disabled
563 17:17:44.152523 SA-CRID Original Value = 0.0.0.1
564 17:17:44.155803 SA-CRID New Value = 0.0.0.1
565 17:17:44.159204 OPROM - VBIOS = ff.ff.ff.ffff
566 17:17:44.162829 IO Manageability Engine FW Version = 11.1.4.0
567 17:17:44.166011 PHY Build Version = 0.0.0.e0
568 17:17:44.169438 Thunderbolt(TM) FW Version = 0.0.0.0
569 17:17:44.175898 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
570 17:17:44.179227 ITSS IRQ Polarities Before:
571 17:17:44.179740 IPC0: 0xffffffff
572 17:17:44.182301 IPC1: 0xffffffff
573 17:17:44.182756 IPC2: 0xffffffff
574 17:17:44.186209 IPC3: 0xffffffff
575 17:17:44.189564 ITSS IRQ Polarities After:
576 17:17:44.189951 IPC0: 0xffffffff
577 17:17:44.192527 IPC1: 0xffffffff
578 17:17:44.193084 IPC2: 0xffffffff
579 17:17:44.196291 IPC3: 0xffffffff
580 17:17:44.199498 Found PCIe Root Port #9 at PCI: 00:1d.0.
581 17:17:44.212547 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
582 17:17:44.222867 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
583 17:17:44.235681 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
584 17:17:44.242888 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
585 17:17:44.243385 Enumerating buses...
586 17:17:44.249482 Show all devs... Before device enumeration.
587 17:17:44.249971 Root Device: enabled 1
588 17:17:44.252401 DOMAIN: 0000: enabled 1
589 17:17:44.255733 CPU_CLUSTER: 0: enabled 1
590 17:17:44.259513 PCI: 00:00.0: enabled 1
591 17:17:44.260003 PCI: 00:02.0: enabled 1
592 17:17:44.262094 PCI: 00:04.0: enabled 1
593 17:17:44.266041 PCI: 00:05.0: enabled 1
594 17:17:44.269500 PCI: 00:06.0: enabled 0
595 17:17:44.269982 PCI: 00:07.0: enabled 0
596 17:17:44.272124 PCI: 00:07.1: enabled 0
597 17:17:44.275956 PCI: 00:07.2: enabled 0
598 17:17:44.278966 PCI: 00:07.3: enabled 0
599 17:17:44.279348 PCI: 00:08.0: enabled 1
600 17:17:44.282315 PCI: 00:09.0: enabled 0
601 17:17:44.285536 PCI: 00:0a.0: enabled 0
602 17:17:44.285914 PCI: 00:0d.0: enabled 1
603 17:17:44.288943 PCI: 00:0d.1: enabled 0
604 17:17:44.292296 PCI: 00:0d.2: enabled 0
605 17:17:44.295587 PCI: 00:0d.3: enabled 0
606 17:17:44.296063 PCI: 00:0e.0: enabled 0
607 17:17:44.299023 PCI: 00:10.2: enabled 1
608 17:17:44.302429 PCI: 00:10.6: enabled 0
609 17:17:44.305319 PCI: 00:10.7: enabled 0
610 17:17:44.305698 PCI: 00:12.0: enabled 0
611 17:17:44.309252 PCI: 00:12.6: enabled 0
612 17:17:44.312032 PCI: 00:13.0: enabled 0
613 17:17:44.315642 PCI: 00:14.0: enabled 1
614 17:17:44.316126 PCI: 00:14.1: enabled 0
615 17:17:44.318968 PCI: 00:14.2: enabled 1
616 17:17:44.321982 PCI: 00:14.3: enabled 1
617 17:17:44.325725 PCI: 00:15.0: enabled 1
618 17:17:44.326113 PCI: 00:15.1: enabled 1
619 17:17:44.328946 PCI: 00:15.2: enabled 1
620 17:17:44.332282 PCI: 00:15.3: enabled 1
621 17:17:44.332669 PCI: 00:16.0: enabled 1
622 17:17:44.335724 PCI: 00:16.1: enabled 0
623 17:17:44.339359 PCI: 00:16.2: enabled 0
624 17:17:44.342831 PCI: 00:16.3: enabled 0
625 17:17:44.343354 PCI: 00:16.4: enabled 0
626 17:17:44.345537 PCI: 00:16.5: enabled 0
627 17:17:44.349454 PCI: 00:17.0: enabled 1
628 17:17:44.352159 PCI: 00:19.0: enabled 0
629 17:17:44.352637 PCI: 00:19.1: enabled 1
630 17:17:44.355887 PCI: 00:19.2: enabled 0
631 17:17:44.359318 PCI: 00:1c.0: enabled 1
632 17:17:44.362435 PCI: 00:1c.1: enabled 0
633 17:17:44.362978 PCI: 00:1c.2: enabled 0
634 17:17:44.365136 PCI: 00:1c.3: enabled 0
635 17:17:44.368473 PCI: 00:1c.4: enabled 0
636 17:17:44.372135 PCI: 00:1c.5: enabled 0
637 17:17:44.372661 PCI: 00:1c.6: enabled 1
638 17:17:44.375737 PCI: 00:1c.7: enabled 0
639 17:17:44.378367 PCI: 00:1d.0: enabled 1
640 17:17:44.378793 PCI: 00:1d.1: enabled 0
641 17:17:44.381763 PCI: 00:1d.2: enabled 1
642 17:17:44.385266 PCI: 00:1d.3: enabled 0
643 17:17:44.388419 PCI: 00:1e.0: enabled 1
644 17:17:44.388835 PCI: 00:1e.1: enabled 0
645 17:17:44.391932 PCI: 00:1e.2: enabled 1
646 17:17:44.394800 PCI: 00:1e.3: enabled 1
647 17:17:44.398349 PCI: 00:1f.0: enabled 1
648 17:17:44.398737 PCI: 00:1f.1: enabled 0
649 17:17:44.401637 PCI: 00:1f.2: enabled 1
650 17:17:44.404903 PCI: 00:1f.3: enabled 1
651 17:17:44.408403 PCI: 00:1f.4: enabled 0
652 17:17:44.408831 PCI: 00:1f.5: enabled 1
653 17:17:44.411532 PCI: 00:1f.6: enabled 0
654 17:17:44.415046 PCI: 00:1f.7: enabled 0
655 17:17:44.415528 APIC: 00: enabled 1
656 17:17:44.418580 GENERIC: 0.0: enabled 1
657 17:17:44.421217 GENERIC: 0.0: enabled 1
658 17:17:44.424666 GENERIC: 1.0: enabled 1
659 17:17:44.425174 GENERIC: 0.0: enabled 1
660 17:17:44.428113 GENERIC: 1.0: enabled 1
661 17:17:44.431259 USB0 port 0: enabled 1
662 17:17:44.435038 GENERIC: 0.0: enabled 1
663 17:17:44.435448 USB0 port 0: enabled 1
664 17:17:44.437975 GENERIC: 0.0: enabled 1
665 17:17:44.441364 I2C: 00:1a: enabled 1
666 17:17:44.441771 I2C: 00:31: enabled 1
667 17:17:44.444601 I2C: 00:32: enabled 1
668 17:17:44.448034 I2C: 00:10: enabled 1
669 17:17:44.448447 I2C: 00:15: enabled 1
670 17:17:44.451507 GENERIC: 0.0: enabled 0
671 17:17:44.454543 GENERIC: 1.0: enabled 0
672 17:17:44.458094 GENERIC: 0.0: enabled 1
673 17:17:44.458506 SPI: 00: enabled 1
674 17:17:44.461625 SPI: 00: enabled 1
675 17:17:44.462019 PNP: 0c09.0: enabled 1
676 17:17:44.464965 GENERIC: 0.0: enabled 1
677 17:17:44.467782 USB3 port 0: enabled 1
678 17:17:44.471438 USB3 port 1: enabled 1
679 17:17:44.471842 USB3 port 2: enabled 0
680 17:17:44.474792 USB3 port 3: enabled 0
681 17:17:44.478194 USB2 port 0: enabled 0
682 17:17:44.478557 USB2 port 1: enabled 1
683 17:17:44.481224 USB2 port 2: enabled 1
684 17:17:44.484673 USB2 port 3: enabled 0
685 17:17:44.488173 USB2 port 4: enabled 1
686 17:17:44.488565 USB2 port 5: enabled 0
687 17:17:44.491003 USB2 port 6: enabled 0
688 17:17:44.494963 USB2 port 7: enabled 0
689 17:17:44.495411 USB2 port 8: enabled 0
690 17:17:44.497855 USB2 port 9: enabled 0
691 17:17:44.501161 USB3 port 0: enabled 0
692 17:17:44.501551 USB3 port 1: enabled 1
693 17:17:44.505110 USB3 port 2: enabled 0
694 17:17:44.507752 USB3 port 3: enabled 0
695 17:17:44.511302 GENERIC: 0.0: enabled 1
696 17:17:44.511505 GENERIC: 1.0: enabled 1
697 17:17:44.514275 APIC: 01: enabled 1
698 17:17:44.517626 APIC: 02: enabled 1
699 17:17:44.517793 APIC: 05: enabled 1
700 17:17:44.521135 APIC: 07: enabled 1
701 17:17:44.521279 APIC: 06: enabled 1
702 17:17:44.524316 APIC: 03: enabled 1
703 17:17:44.527843 APIC: 04: enabled 1
704 17:17:44.527971 Compare with tree...
705 17:17:44.530596 Root Device: enabled 1
706 17:17:44.534208 DOMAIN: 0000: enabled 1
707 17:17:44.537549 PCI: 00:00.0: enabled 1
708 17:17:44.537654 PCI: 00:02.0: enabled 1
709 17:17:44.541023 PCI: 00:04.0: enabled 1
710 17:17:44.544041 GENERIC: 0.0: enabled 1
711 17:17:44.547453 PCI: 00:05.0: enabled 1
712 17:17:44.550820 PCI: 00:06.0: enabled 0
713 17:17:44.550961 PCI: 00:07.0: enabled 0
714 17:17:44.553891 GENERIC: 0.0: enabled 1
715 17:17:44.557624 PCI: 00:07.1: enabled 0
716 17:17:44.560512 GENERIC: 1.0: enabled 1
717 17:17:44.564086 PCI: 00:07.2: enabled 0
718 17:17:44.564220 GENERIC: 0.0: enabled 1
719 17:17:44.567149 PCI: 00:07.3: enabled 0
720 17:17:44.570643 GENERIC: 1.0: enabled 1
721 17:17:44.573991 PCI: 00:08.0: enabled 1
722 17:17:44.577186 PCI: 00:09.0: enabled 0
723 17:17:44.577318 PCI: 00:0a.0: enabled 0
724 17:17:44.580808 PCI: 00:0d.0: enabled 1
725 17:17:44.583914 USB0 port 0: enabled 1
726 17:17:44.587072 USB3 port 0: enabled 1
727 17:17:44.590447 USB3 port 1: enabled 1
728 17:17:44.590581 USB3 port 2: enabled 0
729 17:17:44.593880 USB3 port 3: enabled 0
730 17:17:44.597346 PCI: 00:0d.1: enabled 0
731 17:17:44.600866 PCI: 00:0d.2: enabled 0
732 17:17:44.603762 GENERIC: 0.0: enabled 1
733 17:17:44.607168 PCI: 00:0d.3: enabled 0
734 17:17:44.607305 PCI: 00:0e.0: enabled 0
735 17:17:44.610478 PCI: 00:10.2: enabled 1
736 17:17:44.614177 PCI: 00:10.6: enabled 0
737 17:17:44.617037 PCI: 00:10.7: enabled 0
738 17:17:44.617172 PCI: 00:12.0: enabled 0
739 17:17:44.620578 PCI: 00:12.6: enabled 0
740 17:17:44.624013 PCI: 00:13.0: enabled 0
741 17:17:44.626931 PCI: 00:14.0: enabled 1
742 17:17:44.630999 USB0 port 0: enabled 1
743 17:17:44.631168 USB2 port 0: enabled 0
744 17:17:44.633565 USB2 port 1: enabled 1
745 17:17:44.637148 USB2 port 2: enabled 1
746 17:17:44.640775 USB2 port 3: enabled 0
747 17:17:44.643705 USB2 port 4: enabled 1
748 17:17:44.646923 USB2 port 5: enabled 0
749 17:17:44.647070 USB2 port 6: enabled 0
750 17:17:44.650214 USB2 port 7: enabled 0
751 17:17:44.653428 USB2 port 8: enabled 0
752 17:17:44.656890 USB2 port 9: enabled 0
753 17:17:44.660358 USB3 port 0: enabled 0
754 17:17:44.663972 USB3 port 1: enabled 1
755 17:17:44.664114 USB3 port 2: enabled 0
756 17:17:44.666824 USB3 port 3: enabled 0
757 17:17:44.670573 PCI: 00:14.1: enabled 0
758 17:17:44.673920 PCI: 00:14.2: enabled 1
759 17:17:44.676910 PCI: 00:14.3: enabled 1
760 17:17:44.677079 GENERIC: 0.0: enabled 1
761 17:17:44.680507 PCI: 00:15.0: enabled 1
762 17:17:44.683332 I2C: 00:1a: enabled 1
763 17:17:44.686963 I2C: 00:31: enabled 1
764 17:17:44.687126 I2C: 00:32: enabled 1
765 17:17:44.690357 PCI: 00:15.1: enabled 1
766 17:17:44.693415 I2C: 00:10: enabled 1
767 17:17:44.697108 PCI: 00:15.2: enabled 1
768 17:17:44.700232 PCI: 00:15.3: enabled 1
769 17:17:44.700367 PCI: 00:16.0: enabled 1
770 17:17:44.703401 PCI: 00:16.1: enabled 0
771 17:17:44.706834 PCI: 00:16.2: enabled 0
772 17:17:44.710042 PCI: 00:16.3: enabled 0
773 17:17:44.713565 PCI: 00:16.4: enabled 0
774 17:17:44.713740 PCI: 00:16.5: enabled 0
775 17:17:44.717743 PCI: 00:17.0: enabled 1
776 17:17:44.721283 PCI: 00:19.0: enabled 0
777 17:17:44.721418 PCI: 00:19.1: enabled 1
778 17:17:44.724873 I2C: 00:15: enabled 1
779 17:17:44.727871 PCI: 00:19.2: enabled 0
780 17:17:44.731190 PCI: 00:1d.0: enabled 1
781 17:17:44.734699 GENERIC: 0.0: enabled 1
782 17:17:44.734822 PCI: 00:1e.0: enabled 1
783 17:17:44.738106 PCI: 00:1e.1: enabled 0
784 17:17:44.741475 PCI: 00:1e.2: enabled 1
785 17:17:44.791491 SPI: 00: enabled 1
786 17:17:44.791661 PCI: 00:1e.3: enabled 1
787 17:17:44.791749 SPI: 00: enabled 1
788 17:17:44.791831 PCI: 00:1f.0: enabled 1
789 17:17:44.791908 PNP: 0c09.0: enabled 1
790 17:17:44.792195 PCI: 00:1f.1: enabled 0
791 17:17:44.792281 PCI: 00:1f.2: enabled 1
792 17:17:44.792357 GENERIC: 0.0: enabled 1
793 17:17:44.792431 GENERIC: 0.0: enabled 1
794 17:17:44.792504 GENERIC: 1.0: enabled 1
795 17:17:44.792613 PCI: 00:1f.3: enabled 1
796 17:17:44.792736 PCI: 00:1f.4: enabled 0
797 17:17:44.793232 PCI: 00:1f.5: enabled 1
798 17:17:44.793339 PCI: 00:1f.6: enabled 0
799 17:17:44.793424 PCI: 00:1f.7: enabled 0
800 17:17:44.793700 CPU_CLUSTER: 0: enabled 1
801 17:17:44.793788 APIC: 00: enabled 1
802 17:17:44.794507 APIC: 01: enabled 1
803 17:17:44.794614 APIC: 02: enabled 1
804 17:17:44.794712 APIC: 05: enabled 1
805 17:17:44.800588 APIC: 07: enabled 1
806 17:17:44.800715 APIC: 06: enabled 1
807 17:17:44.800830 APIC: 03: enabled 1
808 17:17:44.803586 APIC: 04: enabled 1
809 17:17:44.803727 Root Device scanning...
810 17:17:44.807095 scan_static_bus for Root Device
811 17:17:44.810236 DOMAIN: 0000 enabled
812 17:17:44.813811 CPU_CLUSTER: 0 enabled
813 17:17:44.816844 DOMAIN: 0000 scanning...
814 17:17:44.820192 PCI: pci_scan_bus for bus 00
815 17:17:44.820383 PCI: 00:00.0 [8086/0000] ops
816 17:17:44.823614 PCI: 00:00.0 [8086/9a12] enabled
817 17:17:44.827311 PCI: 00:02.0 [8086/0000] bus ops
818 17:17:44.830223 PCI: 00:02.0 [8086/9a40] enabled
819 17:17:44.834390 PCI: 00:04.0 [8086/0000] bus ops
820 17:17:44.837348 PCI: 00:04.0 [8086/9a03] enabled
821 17:17:44.840083 PCI: 00:05.0 [8086/9a19] enabled
822 17:17:44.843923 PCI: 00:07.0 [0000/0000] hidden
823 17:17:44.846897 PCI: 00:08.0 [8086/9a11] enabled
824 17:17:44.850601 PCI: 00:0a.0 [8086/9a0d] disabled
825 17:17:44.853830 PCI: 00:0d.0 [8086/0000] bus ops
826 17:17:44.857177 PCI: 00:0d.0 [8086/9a13] enabled
827 17:17:44.860328 PCI: 00:14.0 [8086/0000] bus ops
828 17:17:44.863730 PCI: 00:14.0 [8086/a0ed] enabled
829 17:17:44.867281 PCI: 00:14.2 [8086/a0ef] enabled
830 17:17:44.870605 PCI: 00:14.3 [8086/0000] bus ops
831 17:17:44.873653 PCI: 00:14.3 [8086/a0f0] enabled
832 17:17:44.877354 PCI: 00:15.0 [8086/0000] bus ops
833 17:17:44.880625 PCI: 00:15.0 [8086/a0e8] enabled
834 17:17:44.884017 PCI: 00:15.1 [8086/0000] bus ops
835 17:17:44.887465 PCI: 00:15.1 [8086/a0e9] enabled
836 17:17:44.890200 PCI: 00:15.2 [8086/0000] bus ops
837 17:17:44.893665 PCI: 00:15.2 [8086/a0ea] enabled
838 17:17:44.897243 PCI: 00:15.3 [8086/0000] bus ops
839 17:17:44.900161 PCI: 00:15.3 [8086/a0eb] enabled
840 17:17:44.903700 PCI: 00:16.0 [8086/0000] ops
841 17:17:44.907276 PCI: 00:16.0 [8086/a0e0] enabled
842 17:17:44.913833 PCI: Static device PCI: 00:17.0 not found, disabling it.
843 17:17:44.917330 PCI: 00:19.0 [8086/0000] bus ops
844 17:17:44.920677 PCI: 00:19.0 [8086/a0c5] disabled
845 17:17:44.923841 PCI: 00:19.1 [8086/0000] bus ops
846 17:17:44.927108 PCI: 00:19.1 [8086/a0c6] enabled
847 17:17:44.930369 PCI: 00:1d.0 [8086/0000] bus ops
848 17:17:44.934029 PCI: 00:1d.0 [8086/a0b0] enabled
849 17:17:44.937179 PCI: 00:1e.0 [8086/0000] ops
850 17:17:44.940513 PCI: 00:1e.0 [8086/a0a8] enabled
851 17:17:44.943846 PCI: 00:1e.2 [8086/0000] bus ops
852 17:17:44.947239 PCI: 00:1e.2 [8086/a0aa] enabled
853 17:17:44.950399 PCI: 00:1e.3 [8086/0000] bus ops
854 17:17:44.953942 PCI: 00:1e.3 [8086/a0ab] enabled
855 17:17:44.956768 PCI: 00:1f.0 [8086/0000] bus ops
856 17:17:44.960090 PCI: 00:1f.0 [8086/a087] enabled
857 17:17:44.960507 RTC Init
858 17:17:44.963808 Set power on after power failure.
859 17:17:44.967050 Disabling Deep S3
860 17:17:44.970159 Disabling Deep S3
861 17:17:44.970584 Disabling Deep S4
862 17:17:44.973636 Disabling Deep S4
863 17:17:44.973982 Disabling Deep S5
864 17:17:44.976946 Disabling Deep S5
865 17:17:44.980540 PCI: 00:1f.2 [0000/0000] hidden
866 17:17:44.983872 PCI: 00:1f.3 [8086/0000] bus ops
867 17:17:44.987041 PCI: 00:1f.3 [8086/a0c8] enabled
868 17:17:44.990210 PCI: 00:1f.5 [8086/0000] bus ops
869 17:17:44.993527 PCI: 00:1f.5 [8086/a0a4] enabled
870 17:17:44.997131 PCI: Leftover static devices:
871 17:17:44.997481 PCI: 00:10.2
872 17:17:45.000506 PCI: 00:10.6
873 17:17:45.000893 PCI: 00:10.7
874 17:17:45.001180 PCI: 00:06.0
875 17:17:45.003488 PCI: 00:07.1
876 17:17:45.003840 PCI: 00:07.2
877 17:17:45.006964 PCI: 00:07.3
878 17:17:45.007449 PCI: 00:09.0
879 17:17:45.007974 PCI: 00:0d.1
880 17:17:45.010462 PCI: 00:0d.2
881 17:17:45.010936 PCI: 00:0d.3
882 17:17:45.013336 PCI: 00:0e.0
883 17:17:45.013842 PCI: 00:12.0
884 17:17:45.017011 PCI: 00:12.6
885 17:17:45.017361 PCI: 00:13.0
886 17:17:45.017640 PCI: 00:14.1
887 17:17:45.020844 PCI: 00:16.1
888 17:17:45.021301 PCI: 00:16.2
889 17:17:45.023655 PCI: 00:16.3
890 17:17:45.024007 PCI: 00:16.4
891 17:17:45.024285 PCI: 00:16.5
892 17:17:45.027247 PCI: 00:17.0
893 17:17:45.027595 PCI: 00:19.2
894 17:17:45.030050 PCI: 00:1e.1
895 17:17:45.030400 PCI: 00:1f.1
896 17:17:45.030693 PCI: 00:1f.4
897 17:17:45.033332 PCI: 00:1f.6
898 17:17:45.033681 PCI: 00:1f.7
899 17:17:45.036906 PCI: Check your devicetree.cb.
900 17:17:45.040582 PCI: 00:02.0 scanning...
901 17:17:45.043653 scan_generic_bus for PCI: 00:02.0
902 17:17:45.046933 scan_generic_bus for PCI: 00:02.0 done
903 17:17:45.053689 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
904 17:17:45.054094 PCI: 00:04.0 scanning...
905 17:17:45.059986 scan_generic_bus for PCI: 00:04.0
906 17:17:45.060339 GENERIC: 0.0 enabled
907 17:17:45.067476 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
908 17:17:45.070262 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
909 17:17:45.073557 PCI: 00:0d.0 scanning...
910 17:17:45.077032 scan_static_bus for PCI: 00:0d.0
911 17:17:45.080496 USB0 port 0 enabled
912 17:17:45.083617 USB0 port 0 scanning...
913 17:17:45.087207 scan_static_bus for USB0 port 0
914 17:17:45.087558 USB3 port 0 enabled
915 17:17:45.090158 USB3 port 1 enabled
916 17:17:45.093497 USB3 port 2 disabled
917 17:17:45.093846 USB3 port 3 disabled
918 17:17:45.096875 USB3 port 0 scanning...
919 17:17:45.100205 scan_static_bus for USB3 port 0
920 17:17:45.103559 scan_static_bus for USB3 port 0 done
921 17:17:45.106484 scan_bus: bus USB3 port 0 finished in 6 msecs
922 17:17:45.110091 USB3 port 1 scanning...
923 17:17:45.113219 scan_static_bus for USB3 port 1
924 17:17:45.117039 scan_static_bus for USB3 port 1 done
925 17:17:45.123598 scan_bus: bus USB3 port 1 finished in 6 msecs
926 17:17:45.126562 scan_static_bus for USB0 port 0 done
927 17:17:45.130111 scan_bus: bus USB0 port 0 finished in 43 msecs
928 17:17:45.133600 scan_static_bus for PCI: 00:0d.0 done
929 17:17:45.139904 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
930 17:17:45.143330 PCI: 00:14.0 scanning...
931 17:17:45.146829 scan_static_bus for PCI: 00:14.0
932 17:17:45.147187 USB0 port 0 enabled
933 17:17:45.149873 USB0 port 0 scanning...
934 17:17:45.153358 scan_static_bus for USB0 port 0
935 17:17:45.156597 USB2 port 0 disabled
936 17:17:45.156989 USB2 port 1 enabled
937 17:17:45.160096 USB2 port 2 enabled
938 17:17:45.163326 USB2 port 3 disabled
939 17:17:45.163681 USB2 port 4 enabled
940 17:17:45.166350 USB2 port 5 disabled
941 17:17:45.169548 USB2 port 6 disabled
942 17:17:45.169903 USB2 port 7 disabled
943 17:17:45.173575 USB2 port 8 disabled
944 17:17:45.173928 USB2 port 9 disabled
945 17:17:45.176241 USB3 port 0 disabled
946 17:17:45.180070 USB3 port 1 enabled
947 17:17:45.180423 USB3 port 2 disabled
948 17:17:45.183030 USB3 port 3 disabled
949 17:17:45.186519 USB2 port 1 scanning...
950 17:17:45.189972 scan_static_bus for USB2 port 1
951 17:17:45.193013 scan_static_bus for USB2 port 1 done
952 17:17:45.196610 scan_bus: bus USB2 port 1 finished in 6 msecs
953 17:17:45.199583 USB2 port 2 scanning...
954 17:17:45.203078 scan_static_bus for USB2 port 2
955 17:17:45.206516 scan_static_bus for USB2 port 2 done
956 17:17:45.213380 scan_bus: bus USB2 port 2 finished in 6 msecs
957 17:17:45.213734 USB2 port 4 scanning...
958 17:17:45.216877 scan_static_bus for USB2 port 4
959 17:17:45.219733 scan_static_bus for USB2 port 4 done
960 17:17:45.226720 scan_bus: bus USB2 port 4 finished in 6 msecs
961 17:17:45.229543 USB3 port 1 scanning...
962 17:17:45.233047 scan_static_bus for USB3 port 1
963 17:17:45.236557 scan_static_bus for USB3 port 1 done
964 17:17:45.239567 scan_bus: bus USB3 port 1 finished in 6 msecs
965 17:17:45.243158 scan_static_bus for USB0 port 0 done
966 17:17:45.249734 scan_bus: bus USB0 port 0 finished in 93 msecs
967 17:17:45.252882 scan_static_bus for PCI: 00:14.0 done
968 17:17:45.256364 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
969 17:17:45.259926 PCI: 00:14.3 scanning...
970 17:17:45.262688 scan_static_bus for PCI: 00:14.3
971 17:17:45.265976 GENERIC: 0.0 enabled
972 17:17:45.269645 scan_static_bus for PCI: 00:14.3 done
973 17:17:45.272881 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
974 17:17:45.276150 PCI: 00:15.0 scanning...
975 17:17:45.279600 scan_static_bus for PCI: 00:15.0
976 17:17:45.282816 I2C: 00:1a enabled
977 17:17:45.283173 I2C: 00:31 enabled
978 17:17:45.286140 I2C: 00:32 enabled
979 17:17:45.289383 scan_static_bus for PCI: 00:15.0 done
980 17:17:45.292957 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
981 17:17:45.297006 PCI: 00:15.1 scanning...
982 17:17:45.299836 scan_static_bus for PCI: 00:15.1
983 17:17:45.303712 I2C: 00:10 enabled
984 17:17:45.306733 scan_static_bus for PCI: 00:15.1 done
985 17:17:45.310033 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
986 17:17:45.313609 PCI: 00:15.2 scanning...
987 17:17:45.316630 scan_static_bus for PCI: 00:15.2
988 17:17:45.320121 scan_static_bus for PCI: 00:15.2 done
989 17:17:45.326890 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
990 17:17:45.327390 PCI: 00:15.3 scanning...
991 17:17:45.329875 scan_static_bus for PCI: 00:15.3
992 17:17:45.337172 scan_static_bus for PCI: 00:15.3 done
993 17:17:45.340157 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
994 17:17:45.343589 PCI: 00:19.1 scanning...
995 17:17:45.346604 scan_static_bus for PCI: 00:19.1
996 17:17:45.346988 I2C: 00:15 enabled
997 17:17:45.353701 scan_static_bus for PCI: 00:19.1 done
998 17:17:45.356758 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
999 17:17:45.360179 PCI: 00:1d.0 scanning...
1000 17:17:45.363270 do_pci_scan_bridge for PCI: 00:1d.0
1001 17:17:45.367050 PCI: pci_scan_bus for bus 01
1002 17:17:45.370028 PCI: 01:00.0 [1c5c/174a] enabled
1003 17:17:45.373321 GENERIC: 0.0 enabled
1004 17:17:45.376597 Enabling Common Clock Configuration
1005 17:17:45.380329 L1 Sub-State supported from root port 29
1006 17:17:45.383324 L1 Sub-State Support = 0xf
1007 17:17:45.386579 CommonModeRestoreTime = 0x28
1008 17:17:45.390118 Power On Value = 0x16, Power On Scale = 0x0
1009 17:17:45.390474 ASPM: Enabled L1
1010 17:17:45.396892 PCIe: Max_Payload_Size adjusted to 128
1011 17:17:45.399903 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1012 17:17:45.403364 PCI: 00:1e.2 scanning...
1013 17:17:45.406862 scan_generic_bus for PCI: 00:1e.2
1014 17:17:45.407210 SPI: 00 enabled
1015 17:17:45.413288 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1016 17:17:45.420044 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1017 17:17:45.420511 PCI: 00:1e.3 scanning...
1018 17:17:45.427281 scan_generic_bus for PCI: 00:1e.3
1019 17:17:45.427857 SPI: 00 enabled
1020 17:17:45.433478 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1021 17:17:45.436607 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1022 17:17:45.440302 PCI: 00:1f.0 scanning...
1023 17:17:45.443409 scan_static_bus for PCI: 00:1f.0
1024 17:17:45.446848 PNP: 0c09.0 enabled
1025 17:17:45.447222 PNP: 0c09.0 scanning...
1026 17:17:45.450379 scan_static_bus for PNP: 0c09.0
1027 17:17:45.457163 scan_static_bus for PNP: 0c09.0 done
1028 17:17:45.460079 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1029 17:17:45.463525 scan_static_bus for PCI: 00:1f.0 done
1030 17:17:45.470290 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1031 17:17:45.470791 PCI: 00:1f.2 scanning...
1032 17:17:45.473333 scan_static_bus for PCI: 00:1f.2
1033 17:17:45.476993 GENERIC: 0.0 enabled
1034 17:17:45.480586 GENERIC: 0.0 scanning...
1035 17:17:45.483719 scan_static_bus for GENERIC: 0.0
1036 17:17:45.484092 GENERIC: 0.0 enabled
1037 17:17:45.487090 GENERIC: 1.0 enabled
1038 17:17:45.490138 scan_static_bus for GENERIC: 0.0 done
1039 17:17:45.497065 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1040 17:17:45.500287 scan_static_bus for PCI: 00:1f.2 done
1041 17:17:45.503220 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1042 17:17:45.506862 PCI: 00:1f.3 scanning...
1043 17:17:45.510139 scan_static_bus for PCI: 00:1f.3
1044 17:17:45.513373 scan_static_bus for PCI: 00:1f.3 done
1045 17:17:45.520115 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1046 17:17:45.520637 PCI: 00:1f.5 scanning...
1047 17:17:45.527012 scan_generic_bus for PCI: 00:1f.5
1048 17:17:45.530055 scan_generic_bus for PCI: 00:1f.5 done
1049 17:17:45.533308 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1050 17:17:45.540416 scan_bus: bus DOMAIN: 0000 finished in 718 msecs
1051 17:17:45.543457 scan_static_bus for Root Device done
1052 17:17:45.547571 scan_bus: bus Root Device finished in 737 msecs
1053 17:17:45.548135 done
1054 17:17:45.553523 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1055 17:17:45.556992 Chrome EC: UHEPI supported
1056 17:17:45.563869 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1057 17:17:45.570153 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1058 17:17:45.573605 SPI flash protection: WPSW=1 SRP0=0
1059 17:17:45.580444 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1060 17:17:45.583295 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1061 17:17:45.586789 found VGA at PCI: 00:02.0
1062 17:17:45.590238 Setting up VGA for PCI: 00:02.0
1063 17:17:45.596752 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1064 17:17:45.599804 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1065 17:17:45.603678 Allocating resources...
1066 17:17:45.606507 Reading resources...
1067 17:17:45.610161 Root Device read_resources bus 0 link: 0
1068 17:17:45.613121 DOMAIN: 0000 read_resources bus 0 link: 0
1069 17:17:45.619943 PCI: 00:04.0 read_resources bus 1 link: 0
1070 17:17:45.623409 PCI: 00:04.0 read_resources bus 1 link: 0 done
1071 17:17:45.629626 PCI: 00:0d.0 read_resources bus 0 link: 0
1072 17:17:45.633236 USB0 port 0 read_resources bus 0 link: 0
1073 17:17:45.640027 USB0 port 0 read_resources bus 0 link: 0 done
1074 17:17:45.643083 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1075 17:17:45.646435 PCI: 00:14.0 read_resources bus 0 link: 0
1076 17:17:45.653562 USB0 port 0 read_resources bus 0 link: 0
1077 17:17:45.656376 USB0 port 0 read_resources bus 0 link: 0 done
1078 17:17:45.663289 PCI: 00:14.0 read_resources bus 0 link: 0 done
1079 17:17:45.666727 PCI: 00:14.3 read_resources bus 0 link: 0
1080 17:17:45.673092 PCI: 00:14.3 read_resources bus 0 link: 0 done
1081 17:17:45.676580 PCI: 00:15.0 read_resources bus 0 link: 0
1082 17:17:45.683290 PCI: 00:15.0 read_resources bus 0 link: 0 done
1083 17:17:45.686579 PCI: 00:15.1 read_resources bus 0 link: 0
1084 17:17:45.693321 PCI: 00:15.1 read_resources bus 0 link: 0 done
1085 17:17:45.696828 PCI: 00:19.1 read_resources bus 0 link: 0
1086 17:17:45.703500 PCI: 00:19.1 read_resources bus 0 link: 0 done
1087 17:17:45.707287 PCI: 00:1d.0 read_resources bus 1 link: 0
1088 17:17:45.714010 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1089 17:17:45.716960 PCI: 00:1e.2 read_resources bus 2 link: 0
1090 17:17:45.723616 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1091 17:17:45.726858 PCI: 00:1e.3 read_resources bus 3 link: 0
1092 17:17:45.734226 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1093 17:17:45.737209 PCI: 00:1f.0 read_resources bus 0 link: 0
1094 17:17:45.743505 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1095 17:17:45.747023 PCI: 00:1f.2 read_resources bus 0 link: 0
1096 17:17:45.750048 GENERIC: 0.0 read_resources bus 0 link: 0
1097 17:17:45.757586 GENERIC: 0.0 read_resources bus 0 link: 0 done
1098 17:17:45.760594 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1099 17:17:45.767939 DOMAIN: 0000 read_resources bus 0 link: 0 done
1100 17:17:45.771309 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1101 17:17:45.778282 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1102 17:17:45.781280 Root Device read_resources bus 0 link: 0 done
1103 17:17:45.784560 Done reading resources.
1104 17:17:45.791452 Show resources in subtree (Root Device)...After reading.
1105 17:17:45.794258 Root Device child on link 0 DOMAIN: 0000
1106 17:17:45.797762 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1107 17:17:45.807653 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1108 17:17:45.817548 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1109 17:17:45.821111 PCI: 00:00.0
1110 17:17:45.831310 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1111 17:17:45.837894 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1112 17:17:45.847696 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1113 17:17:45.857501 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1114 17:17:45.867499 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1115 17:17:45.877663 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1116 17:17:45.884126 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1117 17:17:45.894361 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1118 17:17:45.904299 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1119 17:17:45.914212 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1120 17:17:45.924077 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1121 17:17:45.933677 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1122 17:17:45.940198 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1123 17:17:45.950307 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1124 17:17:45.960270 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1125 17:17:45.970574 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1126 17:17:45.980155 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1127 17:17:45.990256 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1128 17:17:45.996817 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1129 17:17:46.006920 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1130 17:17:46.010456 PCI: 00:02.0
1131 17:17:46.020274 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 17:17:46.030271 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1133 17:17:46.039950 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1134 17:17:46.043319 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1135 17:17:46.053412 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1136 17:17:46.053562 GENERIC: 0.0
1137 17:17:46.056875 PCI: 00:05.0
1138 17:17:46.066701 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1139 17:17:46.069921 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1140 17:17:46.073644 GENERIC: 0.0
1141 17:17:46.073732 PCI: 00:08.0
1142 17:17:46.083398 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1143 17:17:46.086510 PCI: 00:0a.0
1144 17:17:46.089697 PCI: 00:0d.0 child on link 0 USB0 port 0
1145 17:17:46.099974 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1146 17:17:46.106452 USB0 port 0 child on link 0 USB3 port 0
1147 17:17:46.106568 USB3 port 0
1148 17:17:46.110131 USB3 port 1
1149 17:17:46.110212 USB3 port 2
1150 17:17:46.113168 USB3 port 3
1151 17:17:46.116665 PCI: 00:14.0 child on link 0 USB0 port 0
1152 17:17:46.126650 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1153 17:17:46.129622 USB0 port 0 child on link 0 USB2 port 0
1154 17:17:46.133145 USB2 port 0
1155 17:17:46.136178 USB2 port 1
1156 17:17:46.136260 USB2 port 2
1157 17:17:46.139547 USB2 port 3
1158 17:17:46.139656 USB2 port 4
1159 17:17:46.143424 USB2 port 5
1160 17:17:46.143533 USB2 port 6
1161 17:17:46.146526 USB2 port 7
1162 17:17:46.146632 USB2 port 8
1163 17:17:46.149823 USB2 port 9
1164 17:17:46.149900 USB3 port 0
1165 17:17:46.152924 USB3 port 1
1166 17:17:46.153037 USB3 port 2
1167 17:17:46.156494 USB3 port 3
1168 17:17:46.156604 PCI: 00:14.2
1169 17:17:46.166250 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1170 17:17:46.176088 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1171 17:17:46.182865 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1172 17:17:46.192701 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1173 17:17:46.192829 GENERIC: 0.0
1174 17:17:46.199550 PCI: 00:15.0 child on link 0 I2C: 00:1a
1175 17:17:46.209326 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 17:17:46.209422 I2C: 00:1a
1177 17:17:46.212780 I2C: 00:31
1178 17:17:46.212867 I2C: 00:32
1179 17:17:46.216380 PCI: 00:15.1 child on link 0 I2C: 00:10
1180 17:17:46.226303 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 17:17:46.229051 I2C: 00:10
1182 17:17:46.229135 PCI: 00:15.2
1183 17:17:46.239189 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 17:17:46.242834 PCI: 00:15.3
1185 17:17:46.252402 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 17:17:46.252516 PCI: 00:16.0
1187 17:17:46.262645 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1188 17:17:46.266200 PCI: 00:19.0
1189 17:17:46.269108 PCI: 00:19.1 child on link 0 I2C: 00:15
1190 17:17:46.278904 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 17:17:46.282241 I2C: 00:15
1192 17:17:46.286050 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1193 17:17:46.295656 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1194 17:17:46.302065 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1195 17:17:46.312366 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1196 17:17:46.315509 GENERIC: 0.0
1197 17:17:46.315593 PCI: 01:00.0
1198 17:17:46.325348 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1199 17:17:46.335177 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1200 17:17:46.345642 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1201 17:17:46.345737 PCI: 00:1e.0
1202 17:17:46.359150 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1203 17:17:46.361996 PCI: 00:1e.2 child on link 0 SPI: 00
1204 17:17:46.371676 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1205 17:17:46.371789 SPI: 00
1206 17:17:46.378359 PCI: 00:1e.3 child on link 0 SPI: 00
1207 17:17:46.388242 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 17:17:46.388330 SPI: 00
1209 17:17:46.391616 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1210 17:17:46.401790 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1211 17:17:46.401883 PNP: 0c09.0
1212 17:17:46.411559 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1213 17:17:46.414990 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1214 17:17:46.425213 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1215 17:17:46.434789 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1216 17:17:46.438531 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1217 17:17:46.441514 GENERIC: 0.0
1218 17:17:46.441605 GENERIC: 1.0
1219 17:17:46.445140 PCI: 00:1f.3
1220 17:17:46.455075 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 17:17:46.464684 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1222 17:17:46.468149 PCI: 00:1f.5
1223 17:17:46.475152 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1224 17:17:46.481615 CPU_CLUSTER: 0 child on link 0 APIC: 00
1225 17:17:46.481706 APIC: 00
1226 17:17:46.481778 APIC: 01
1227 17:17:46.485145 APIC: 02
1228 17:17:46.485235 APIC: 05
1229 17:17:46.485306 APIC: 07
1230 17:17:46.488568 APIC: 06
1231 17:17:46.488658 APIC: 03
1232 17:17:46.491497 APIC: 04
1233 17:17:46.498322 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1234 17:17:46.504595 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1235 17:17:46.511248 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1236 17:17:46.514726 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1237 17:17:46.521381 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 17:17:46.525018 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1239 17:17:46.527773 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1240 17:17:46.534711 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1241 17:17:46.544630 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 17:17:46.551155 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 17:17:46.557655 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1244 17:17:46.564687 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1245 17:17:46.571235 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1246 17:17:46.577663 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1247 17:17:46.587971 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1248 17:17:46.590913 DOMAIN: 0000: Resource ranges:
1249 17:17:46.594351 * Base: 1000, Size: 800, Tag: 100
1250 17:17:46.597690 * Base: 1900, Size: e700, Tag: 100
1251 17:17:46.601050 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1252 17:17:46.607358 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1253 17:17:46.617531 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1254 17:17:46.624126 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1255 17:17:46.630590 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1256 17:17:46.640478 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1257 17:17:46.647492 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1258 17:17:46.653987 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1259 17:17:46.660916 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1260 17:17:46.670588 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1261 17:17:46.677731 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1262 17:17:46.684216 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1263 17:17:46.694087 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1264 17:17:46.700504 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1265 17:17:46.707445 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1266 17:17:46.717112 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1267 17:17:46.724010 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1268 17:17:46.730567 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1269 17:17:46.740403 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1270 17:17:46.746938 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1271 17:17:46.753418 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1272 17:17:46.763632 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1273 17:17:46.770121 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1274 17:17:46.776952 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1275 17:17:46.787005 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1276 17:17:46.790150 DOMAIN: 0000: Resource ranges:
1277 17:17:46.793614 * Base: 7fc00000, Size: 40400000, Tag: 200
1278 17:17:46.796516 * Base: d0000000, Size: 28000000, Tag: 200
1279 17:17:46.803260 * Base: fa000000, Size: 1000000, Tag: 200
1280 17:17:46.806773 * Base: fb001000, Size: 2fff000, Tag: 200
1281 17:17:46.810285 * Base: fe010000, Size: 2e000, Tag: 200
1282 17:17:46.813175 * Base: fe03f000, Size: d41000, Tag: 200
1283 17:17:46.819800 * Base: fed88000, Size: 8000, Tag: 200
1284 17:17:46.823129 * Base: fed93000, Size: d000, Tag: 200
1285 17:17:46.826814 * Base: feda2000, Size: 1e000, Tag: 200
1286 17:17:46.829884 * Base: fede0000, Size: 1220000, Tag: 200
1287 17:17:46.836627 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1288 17:17:46.843642 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1289 17:17:46.850087 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1290 17:17:46.856641 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1291 17:17:46.863200 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1292 17:17:46.870009 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1293 17:17:46.876896 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1294 17:17:46.883082 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1295 17:17:46.889655 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1296 17:17:46.896133 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1297 17:17:46.902977 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1298 17:17:46.909540 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1299 17:17:46.916454 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1300 17:17:46.923187 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1301 17:17:46.929433 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1302 17:17:46.935947 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1303 17:17:46.942484 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1304 17:17:46.949157 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1305 17:17:46.956196 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1306 17:17:46.962803 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1307 17:17:46.969567 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1308 17:17:46.976186 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1309 17:17:46.982646 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1310 17:17:46.989258 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1311 17:17:46.999202 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1312 17:17:46.999293 PCI: 00:1d.0: Resource ranges:
1313 17:17:47.005665 * Base: 7fc00000, Size: 100000, Tag: 200
1314 17:17:47.012468 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1315 17:17:47.018912 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1316 17:17:47.025913 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1317 17:17:47.032678 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1318 17:17:47.039151 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1319 17:17:47.046040 Root Device assign_resources, bus 0 link: 0
1320 17:17:47.048763 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 17:17:47.059286 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1322 17:17:47.065649 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1323 17:17:47.075618 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1324 17:17:47.082328 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1325 17:17:47.085913 PCI: 00:04.0 assign_resources, bus 1 link: 0
1326 17:17:47.092259 PCI: 00:04.0 assign_resources, bus 1 link: 0
1327 17:17:47.098758 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1328 17:17:47.108628 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1329 17:17:47.115639 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1330 17:17:47.122218 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1331 17:17:47.125149 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1332 17:17:47.135277 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1333 17:17:47.138504 PCI: 00:14.0 assign_resources, bus 0 link: 0
1334 17:17:47.142180 PCI: 00:14.0 assign_resources, bus 0 link: 0
1335 17:17:47.152260 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1336 17:17:47.158957 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1337 17:17:47.168621 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1338 17:17:47.171777 PCI: 00:14.3 assign_resources, bus 0 link: 0
1339 17:17:47.175195 PCI: 00:14.3 assign_resources, bus 0 link: 0
1340 17:17:47.185423 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1341 17:17:47.189078 PCI: 00:15.0 assign_resources, bus 0 link: 0
1342 17:17:47.195638 PCI: 00:15.0 assign_resources, bus 0 link: 0
1343 17:17:47.202160 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1344 17:17:47.205268 PCI: 00:15.1 assign_resources, bus 0 link: 0
1345 17:17:47.212462 PCI: 00:15.1 assign_resources, bus 0 link: 0
1346 17:17:47.218984 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1347 17:17:47.229355 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1348 17:17:47.235428 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1349 17:17:47.245550 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1350 17:17:47.248938 PCI: 00:19.1 assign_resources, bus 0 link: 0
1351 17:17:47.255596 PCI: 00:19.1 assign_resources, bus 0 link: 0
1352 17:17:47.262230 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1353 17:17:47.272293 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1354 17:17:47.282329 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1355 17:17:47.285607 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1356 17:17:47.295683 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1357 17:17:47.301876 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1358 17:17:47.309065 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1359 17:17:47.315523 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1360 17:17:47.322324 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1361 17:17:47.328829 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1362 17:17:47.331780 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1363 17:17:47.342033 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1364 17:17:47.345039 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1365 17:17:47.348514 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1366 17:17:47.355402 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1367 17:17:47.358340 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1368 17:17:47.365250 LPC: Trying to open IO window from 800 size 1ff
1369 17:17:47.371650 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1370 17:17:47.381630 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1371 17:17:47.388308 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1372 17:17:47.394743 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 17:17:47.398064 Root Device assign_resources, bus 0 link: 0
1374 17:17:47.401353 Done setting resources.
1375 17:17:47.408010 Show resources in subtree (Root Device)...After assigning values.
1376 17:17:47.411681 Root Device child on link 0 DOMAIN: 0000
1377 17:17:47.414772 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1378 17:17:47.424848 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1379 17:17:47.434994 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1380 17:17:47.435361 PCI: 00:00.0
1381 17:17:47.444642 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1382 17:17:47.454713 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1383 17:17:47.464345 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1384 17:17:47.475015 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1385 17:17:47.484237 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1386 17:17:47.494437 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1387 17:17:47.500957 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1388 17:17:47.511276 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1389 17:17:47.521059 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1390 17:17:47.531621 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1391 17:17:47.540880 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1392 17:17:47.551138 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1393 17:17:47.557212 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1394 17:17:47.567564 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1395 17:17:47.577425 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1396 17:17:47.587489 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1397 17:17:47.597299 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1398 17:17:47.607339 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1399 17:17:47.613804 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1400 17:17:47.623866 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1401 17:17:47.627052 PCI: 00:02.0
1402 17:17:47.637234 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1403 17:17:47.646852 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1404 17:17:47.656982 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1405 17:17:47.660462 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1406 17:17:47.670605 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1407 17:17:47.673455 GENERIC: 0.0
1408 17:17:47.676669 PCI: 00:05.0
1409 17:17:47.686859 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1410 17:17:47.690374 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1411 17:17:47.693470 GENERIC: 0.0
1412 17:17:47.693826 PCI: 00:08.0
1413 17:17:47.703390 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1414 17:17:47.706899 PCI: 00:0a.0
1415 17:17:47.709933 PCI: 00:0d.0 child on link 0 USB0 port 0
1416 17:17:47.720179 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1417 17:17:47.726865 USB0 port 0 child on link 0 USB3 port 0
1418 17:17:47.727216 USB3 port 0
1419 17:17:47.729747 USB3 port 1
1420 17:17:47.730051 USB3 port 2
1421 17:17:47.733217 USB3 port 3
1422 17:17:47.736650 PCI: 00:14.0 child on link 0 USB0 port 0
1423 17:17:47.746562 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1424 17:17:47.750106 USB0 port 0 child on link 0 USB2 port 0
1425 17:17:47.752982 USB2 port 0
1426 17:17:47.756439 USB2 port 1
1427 17:17:47.756808 USB2 port 2
1428 17:17:47.759965 USB2 port 3
1429 17:17:47.760314 USB2 port 4
1430 17:17:47.763055 USB2 port 5
1431 17:17:47.763402 USB2 port 6
1432 17:17:47.766696 USB2 port 7
1433 17:17:47.767071 USB2 port 8
1434 17:17:47.770115 USB2 port 9
1435 17:17:47.770458 USB3 port 0
1436 17:17:47.773252 USB3 port 1
1437 17:17:47.773598 USB3 port 2
1438 17:17:47.776883 USB3 port 3
1439 17:17:47.777230 PCI: 00:14.2
1440 17:17:47.786835 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1441 17:17:47.799991 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1442 17:17:47.803401 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1443 17:17:47.813064 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1444 17:17:47.816674 GENERIC: 0.0
1445 17:17:47.819635 PCI: 00:15.0 child on link 0 I2C: 00:1a
1446 17:17:47.829454 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1447 17:17:47.829805 I2C: 00:1a
1448 17:17:47.833399 I2C: 00:31
1449 17:17:47.833748 I2C: 00:32
1450 17:17:47.839495 PCI: 00:15.1 child on link 0 I2C: 00:10
1451 17:17:47.850034 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1452 17:17:47.850389 I2C: 00:10
1453 17:17:47.852953 PCI: 00:15.2
1454 17:17:47.862979 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1455 17:17:47.863329 PCI: 00:15.3
1456 17:17:47.876604 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1457 17:17:47.876995 PCI: 00:16.0
1458 17:17:47.886232 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1459 17:17:47.889582 PCI: 00:19.0
1460 17:17:47.892990 PCI: 00:19.1 child on link 0 I2C: 00:15
1461 17:17:47.903028 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1462 17:17:47.903472 I2C: 00:15
1463 17:17:47.909511 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1464 17:17:47.919384 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1465 17:17:47.929792 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1466 17:17:47.939430 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1467 17:17:47.942987 GENERIC: 0.0
1468 17:17:47.943359 PCI: 01:00.0
1469 17:17:47.956226 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1470 17:17:47.966181 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1471 17:17:47.976420 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1472 17:17:47.976772 PCI: 00:1e.0
1473 17:17:47.988858 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1474 17:17:47.992498 PCI: 00:1e.2 child on link 0 SPI: 00
1475 17:17:48.002424 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1476 17:17:48.002775 SPI: 00
1477 17:17:48.009390 PCI: 00:1e.3 child on link 0 SPI: 00
1478 17:17:48.019042 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1479 17:17:48.019395 SPI: 00
1480 17:17:48.022246 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1481 17:17:48.032349 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1482 17:17:48.032700 PNP: 0c09.0
1483 17:17:48.042122 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1484 17:17:48.045742 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1485 17:17:48.055570 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1486 17:17:48.065523 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1487 17:17:48.068963 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1488 17:17:48.072173 GENERIC: 0.0
1489 17:17:48.075680 GENERIC: 1.0
1490 17:17:48.076029 PCI: 00:1f.3
1491 17:17:48.085529 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1492 17:17:48.095126 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1493 17:17:48.098753 PCI: 00:1f.5
1494 17:17:48.108395 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1495 17:17:48.111572 CPU_CLUSTER: 0 child on link 0 APIC: 00
1496 17:17:48.115005 APIC: 00
1497 17:17:48.115094 APIC: 01
1498 17:17:48.115165 APIC: 02
1499 17:17:48.118641 APIC: 05
1500 17:17:48.118730 APIC: 07
1501 17:17:48.121682 APIC: 06
1502 17:17:48.121771 APIC: 03
1503 17:17:48.121842 APIC: 04
1504 17:17:48.125161 Done allocating resources.
1505 17:17:48.131593 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1506 17:17:48.138611 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1507 17:17:48.141862 Configure GPIOs for I2S audio on UP4.
1508 17:17:48.148503 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1509 17:17:48.151448 Enabling resources...
1510 17:17:48.155196 PCI: 00:00.0 subsystem <- 8086/9a12
1511 17:17:48.158503 PCI: 00:00.0 cmd <- 06
1512 17:17:48.161431 PCI: 00:02.0 subsystem <- 8086/9a40
1513 17:17:48.165329 PCI: 00:02.0 cmd <- 03
1514 17:17:48.168459 PCI: 00:04.0 subsystem <- 8086/9a03
1515 17:17:48.168582 PCI: 00:04.0 cmd <- 02
1516 17:17:48.175276 PCI: 00:05.0 subsystem <- 8086/9a19
1517 17:17:48.175366 PCI: 00:05.0 cmd <- 02
1518 17:17:48.178946 PCI: 00:08.0 subsystem <- 8086/9a11
1519 17:17:48.181791 PCI: 00:08.0 cmd <- 06
1520 17:17:48.185085 PCI: 00:0d.0 subsystem <- 8086/9a13
1521 17:17:48.188685 PCI: 00:0d.0 cmd <- 02
1522 17:17:48.191714 PCI: 00:14.0 subsystem <- 8086/a0ed
1523 17:17:48.195423 PCI: 00:14.0 cmd <- 02
1524 17:17:48.198533 PCI: 00:14.2 subsystem <- 8086/a0ef
1525 17:17:48.201378 PCI: 00:14.2 cmd <- 02
1526 17:17:48.204996 PCI: 00:14.3 subsystem <- 8086/a0f0
1527 17:17:48.208668 PCI: 00:14.3 cmd <- 02
1528 17:17:48.211717 PCI: 00:15.0 subsystem <- 8086/a0e8
1529 17:17:48.211832 PCI: 00:15.0 cmd <- 02
1530 17:17:48.218699 PCI: 00:15.1 subsystem <- 8086/a0e9
1531 17:17:48.218826 PCI: 00:15.1 cmd <- 02
1532 17:17:48.222117 PCI: 00:15.2 subsystem <- 8086/a0ea
1533 17:17:48.225049 PCI: 00:15.2 cmd <- 02
1534 17:17:48.228573 PCI: 00:15.3 subsystem <- 8086/a0eb
1535 17:17:48.231533 PCI: 00:15.3 cmd <- 02
1536 17:17:48.235086 PCI: 00:16.0 subsystem <- 8086/a0e0
1537 17:17:48.238468 PCI: 00:16.0 cmd <- 02
1538 17:17:48.242059 PCI: 00:19.1 subsystem <- 8086/a0c6
1539 17:17:48.245075 PCI: 00:19.1 cmd <- 02
1540 17:17:48.248417 PCI: 00:1d.0 bridge ctrl <- 0013
1541 17:17:48.251752 PCI: 00:1d.0 subsystem <- 8086/a0b0
1542 17:17:48.254969 PCI: 00:1d.0 cmd <- 06
1543 17:17:48.258646 PCI: 00:1e.0 subsystem <- 8086/a0a8
1544 17:17:48.261618 PCI: 00:1e.0 cmd <- 06
1545 17:17:48.265173 PCI: 00:1e.2 subsystem <- 8086/a0aa
1546 17:17:48.265519 PCI: 00:1e.2 cmd <- 06
1547 17:17:48.271579 PCI: 00:1e.3 subsystem <- 8086/a0ab
1548 17:17:48.271942 PCI: 00:1e.3 cmd <- 02
1549 17:17:48.275431 PCI: 00:1f.0 subsystem <- 8086/a087
1550 17:17:48.278347 PCI: 00:1f.0 cmd <- 407
1551 17:17:48.281628 PCI: 00:1f.3 subsystem <- 8086/a0c8
1552 17:17:48.284882 PCI: 00:1f.3 cmd <- 02
1553 17:17:48.288205 PCI: 00:1f.5 subsystem <- 8086/a0a4
1554 17:17:48.291548 PCI: 00:1f.5 cmd <- 406
1555 17:17:48.295946 PCI: 01:00.0 cmd <- 02
1556 17:17:48.300721 done.
1557 17:17:48.303675 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1558 17:17:48.307323 Initializing devices...
1559 17:17:48.310398 Root Device init
1560 17:17:48.314058 Chrome EC: Set SMI mask to 0x0000000000000000
1561 17:17:48.320083 Chrome EC: clear events_b mask to 0x0000000000000000
1562 17:17:48.327026 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1563 17:17:48.330147 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1564 17:17:48.336873 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1565 17:17:48.343587 Chrome EC: Set WAKE mask to 0x0000000000000000
1566 17:17:48.347211 fw_config match found: DB_USB=USB3_ACTIVE
1567 17:17:48.353856 Configure Right Type-C port orientation for retimer
1568 17:17:48.356960 Root Device init finished in 42 msecs
1569 17:17:48.359910 PCI: 00:00.0 init
1570 17:17:48.360297 CPU TDP = 9 Watts
1571 17:17:48.363182 CPU PL1 = 9 Watts
1572 17:17:48.366418 CPU PL2 = 40 Watts
1573 17:17:48.366764 CPU PL4 = 83 Watts
1574 17:17:48.370171 PCI: 00:00.0 init finished in 8 msecs
1575 17:17:48.373260 PCI: 00:02.0 init
1576 17:17:48.376665 GMA: Found VBT in CBFS
1577 17:17:48.380012 GMA: Found valid VBT in CBFS
1578 17:17:48.383176 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1579 17:17:48.393581 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1580 17:17:48.396359 PCI: 00:02.0 init finished in 18 msecs
1581 17:17:48.399723 PCI: 00:05.0 init
1582 17:17:48.403318 PCI: 00:05.0 init finished in 0 msecs
1583 17:17:48.403757 PCI: 00:08.0 init
1584 17:17:48.409795 PCI: 00:08.0 init finished in 0 msecs
1585 17:17:48.410159 PCI: 00:14.0 init
1586 17:17:48.416356 PCI: 00:14.0 init finished in 0 msecs
1587 17:17:48.416811 PCI: 00:14.2 init
1588 17:17:48.419807 PCI: 00:14.2 init finished in 0 msecs
1589 17:17:48.423500 PCI: 00:15.0 init
1590 17:17:48.426692 I2C bus 0 version 0x3230302a
1591 17:17:48.430173 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1592 17:17:48.433060 PCI: 00:15.0 init finished in 6 msecs
1593 17:17:48.436521 PCI: 00:15.1 init
1594 17:17:48.440016 I2C bus 1 version 0x3230302a
1595 17:17:48.443525 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1596 17:17:48.446514 PCI: 00:15.1 init finished in 6 msecs
1597 17:17:48.449858 PCI: 00:15.2 init
1598 17:17:48.453538 I2C bus 2 version 0x3230302a
1599 17:17:48.456464 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1600 17:17:48.460084 PCI: 00:15.2 init finished in 6 msecs
1601 17:17:48.460429 PCI: 00:15.3 init
1602 17:17:48.463174 I2C bus 3 version 0x3230302a
1603 17:17:48.466651 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1604 17:17:48.473370 PCI: 00:15.3 init finished in 6 msecs
1605 17:17:48.473747 PCI: 00:16.0 init
1606 17:17:48.476666 PCI: 00:16.0 init finished in 0 msecs
1607 17:17:48.480249 PCI: 00:19.1 init
1608 17:17:48.483331 I2C bus 5 version 0x3230302a
1609 17:17:48.486535 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1610 17:17:48.490181 PCI: 00:19.1 init finished in 6 msecs
1611 17:17:48.493624 PCI: 00:1d.0 init
1612 17:17:48.497053 Initializing PCH PCIe bridge.
1613 17:17:48.499929 PCI: 00:1d.0 init finished in 3 msecs
1614 17:17:48.503548 PCI: 00:1f.0 init
1615 17:17:48.506697 IOAPIC: Initializing IOAPIC at 0xfec00000
1616 17:17:48.510180 IOAPIC: Bootstrap Processor Local APIC = 0x00
1617 17:17:48.513444 IOAPIC: ID = 0x02
1618 17:17:48.517120 IOAPIC: Dumping registers
1619 17:17:48.519960 reg 0x0000: 0x02000000
1620 17:17:48.520355 reg 0x0001: 0x00770020
1621 17:17:48.523796 reg 0x0002: 0x00000000
1622 17:17:48.526783 PCI: 00:1f.0 init finished in 21 msecs
1623 17:17:48.529935 PCI: 00:1f.2 init
1624 17:17:48.533439 Disabling ACPI via APMC.
1625 17:17:48.537120 APMC done.
1626 17:17:48.540542 PCI: 00:1f.2 init finished in 6 msecs
1627 17:17:48.552614 PCI: 01:00.0 init
1628 17:17:48.555675 PCI: 01:00.0 init finished in 0 msecs
1629 17:17:48.558636 PNP: 0c09.0 init
1630 17:17:48.565859 Google Chrome EC uptime: 8.401 seconds
1631 17:17:48.568870 Google Chrome AP resets since EC boot: 1
1632 17:17:48.572424 Google Chrome most recent AP reset causes:
1633 17:17:48.575636 0.349: 32775 shutdown: entering G3
1634 17:17:48.582079 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1635 17:17:48.585600 PNP: 0c09.0 init finished in 24 msecs
1636 17:17:48.592540 Devices initialized
1637 17:17:48.595772 Show all devs... After init.
1638 17:17:48.598915 Root Device: enabled 1
1639 17:17:48.599289 DOMAIN: 0000: enabled 1
1640 17:17:48.602543 CPU_CLUSTER: 0: enabled 1
1641 17:17:48.605514 PCI: 00:00.0: enabled 1
1642 17:17:48.608728 PCI: 00:02.0: enabled 1
1643 17:17:48.609134 PCI: 00:04.0: enabled 1
1644 17:17:48.612301 PCI: 00:05.0: enabled 1
1645 17:17:48.615470 PCI: 00:06.0: enabled 0
1646 17:17:48.619060 PCI: 00:07.0: enabled 0
1647 17:17:48.619498 PCI: 00:07.1: enabled 0
1648 17:17:48.622301 PCI: 00:07.2: enabled 0
1649 17:17:48.626083 PCI: 00:07.3: enabled 0
1650 17:17:48.628899 PCI: 00:08.0: enabled 1
1651 17:17:48.629278 PCI: 00:09.0: enabled 0
1652 17:17:48.632533 PCI: 00:0a.0: enabled 0
1653 17:17:48.635620 PCI: 00:0d.0: enabled 1
1654 17:17:48.635989 PCI: 00:0d.1: enabled 0
1655 17:17:48.638956 PCI: 00:0d.2: enabled 0
1656 17:17:48.641930 PCI: 00:0d.3: enabled 0
1657 17:17:48.645542 PCI: 00:0e.0: enabled 0
1658 17:17:48.645915 PCI: 00:10.2: enabled 1
1659 17:17:48.648572 PCI: 00:10.6: enabled 0
1660 17:17:48.652096 PCI: 00:10.7: enabled 0
1661 17:17:48.655508 PCI: 00:12.0: enabled 0
1662 17:17:48.655879 PCI: 00:12.6: enabled 0
1663 17:17:48.658819 PCI: 00:13.0: enabled 0
1664 17:17:48.661881 PCI: 00:14.0: enabled 1
1665 17:17:48.665262 PCI: 00:14.1: enabled 0
1666 17:17:48.665632 PCI: 00:14.2: enabled 1
1667 17:17:48.668516 PCI: 00:14.3: enabled 1
1668 17:17:48.671865 PCI: 00:15.0: enabled 1
1669 17:17:48.675557 PCI: 00:15.1: enabled 1
1670 17:17:48.675930 PCI: 00:15.2: enabled 1
1671 17:17:48.678534 PCI: 00:15.3: enabled 1
1672 17:17:48.682117 PCI: 00:16.0: enabled 1
1673 17:17:48.682491 PCI: 00:16.1: enabled 0
1674 17:17:48.685250 PCI: 00:16.2: enabled 0
1675 17:17:48.688696 PCI: 00:16.3: enabled 0
1676 17:17:48.692112 PCI: 00:16.4: enabled 0
1677 17:17:48.692459 PCI: 00:16.5: enabled 0
1678 17:17:48.695056 PCI: 00:17.0: enabled 0
1679 17:17:48.698428 PCI: 00:19.0: enabled 0
1680 17:17:48.701733 PCI: 00:19.1: enabled 1
1681 17:17:48.702088 PCI: 00:19.2: enabled 0
1682 17:17:48.705171 PCI: 00:1c.0: enabled 1
1683 17:17:48.708838 PCI: 00:1c.1: enabled 0
1684 17:17:48.711879 PCI: 00:1c.2: enabled 0
1685 17:17:48.712226 PCI: 00:1c.3: enabled 0
1686 17:17:48.715316 PCI: 00:1c.4: enabled 0
1687 17:17:48.718666 PCI: 00:1c.5: enabled 0
1688 17:17:48.719041 PCI: 00:1c.6: enabled 1
1689 17:17:48.721549 PCI: 00:1c.7: enabled 0
1690 17:17:48.725149 PCI: 00:1d.0: enabled 1
1691 17:17:48.728423 PCI: 00:1d.1: enabled 0
1692 17:17:48.728768 PCI: 00:1d.2: enabled 1
1693 17:17:48.732156 PCI: 00:1d.3: enabled 0
1694 17:17:48.735048 PCI: 00:1e.0: enabled 1
1695 17:17:48.738688 PCI: 00:1e.1: enabled 0
1696 17:17:48.739095 PCI: 00:1e.2: enabled 1
1697 17:17:48.741702 PCI: 00:1e.3: enabled 1
1698 17:17:48.745636 PCI: 00:1f.0: enabled 1
1699 17:17:48.748222 PCI: 00:1f.1: enabled 0
1700 17:17:48.748715 PCI: 00:1f.2: enabled 1
1701 17:17:48.751796 PCI: 00:1f.3: enabled 1
1702 17:17:48.754899 PCI: 00:1f.4: enabled 0
1703 17:17:48.755277 PCI: 00:1f.5: enabled 1
1704 17:17:48.758343 PCI: 00:1f.6: enabled 0
1705 17:17:48.762036 PCI: 00:1f.7: enabled 0
1706 17:17:48.764823 APIC: 00: enabled 1
1707 17:17:48.765200 GENERIC: 0.0: enabled 1
1708 17:17:48.768166 GENERIC: 0.0: enabled 1
1709 17:17:48.771802 GENERIC: 1.0: enabled 1
1710 17:17:48.775058 GENERIC: 0.0: enabled 1
1711 17:17:48.775434 GENERIC: 1.0: enabled 1
1712 17:17:48.778169 USB0 port 0: enabled 1
1713 17:17:48.781779 GENERIC: 0.0: enabled 1
1714 17:17:48.782159 USB0 port 0: enabled 1
1715 17:17:48.784777 GENERIC: 0.0: enabled 1
1716 17:17:48.788339 I2C: 00:1a: enabled 1
1717 17:17:48.788690 I2C: 00:31: enabled 1
1718 17:17:48.791331 I2C: 00:32: enabled 1
1719 17:17:48.795125 I2C: 00:10: enabled 1
1720 17:17:48.798546 I2C: 00:15: enabled 1
1721 17:17:48.799023 GENERIC: 0.0: enabled 0
1722 17:17:48.801338 GENERIC: 1.0: enabled 0
1723 17:17:48.804744 GENERIC: 0.0: enabled 1
1724 17:17:48.805159 SPI: 00: enabled 1
1725 17:17:48.808333 SPI: 00: enabled 1
1726 17:17:48.811965 PNP: 0c09.0: enabled 1
1727 17:17:48.812341 GENERIC: 0.0: enabled 1
1728 17:17:48.814997 USB3 port 0: enabled 1
1729 17:17:48.818241 USB3 port 1: enabled 1
1730 17:17:48.818616 USB3 port 2: enabled 0
1731 17:17:48.821588 USB3 port 3: enabled 0
1732 17:17:48.824840 USB2 port 0: enabled 0
1733 17:17:48.828400 USB2 port 1: enabled 1
1734 17:17:48.828775 USB2 port 2: enabled 1
1735 17:17:48.831309 USB2 port 3: enabled 0
1736 17:17:48.834844 USB2 port 4: enabled 1
1737 17:17:48.835218 USB2 port 5: enabled 0
1738 17:17:48.838185 USB2 port 6: enabled 0
1739 17:17:48.841370 USB2 port 7: enabled 0
1740 17:17:48.844963 USB2 port 8: enabled 0
1741 17:17:48.845337 USB2 port 9: enabled 0
1742 17:17:48.847957 USB3 port 0: enabled 0
1743 17:17:48.851538 USB3 port 1: enabled 1
1744 17:17:48.852054 USB3 port 2: enabled 0
1745 17:17:48.854631 USB3 port 3: enabled 0
1746 17:17:48.858045 GENERIC: 0.0: enabled 1
1747 17:17:48.861572 GENERIC: 1.0: enabled 1
1748 17:17:48.861919 APIC: 01: enabled 1
1749 17:17:48.864722 APIC: 02: enabled 1
1750 17:17:48.865100 APIC: 05: enabled 1
1751 17:17:48.868187 APIC: 07: enabled 1
1752 17:17:48.871045 APIC: 06: enabled 1
1753 17:17:48.871395 APIC: 03: enabled 1
1754 17:17:48.874621 APIC: 04: enabled 1
1755 17:17:48.878149 PCI: 01:00.0: enabled 1
1756 17:17:48.881497 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1757 17:17:48.888100 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1758 17:17:48.891263 ELOG: NV offset 0xf30000 size 0x1000
1759 17:17:48.897644 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1760 17:17:48.904579 ELOG: Event(17) added with size 13 at 2023-10-02 17:17:49 UTC
1761 17:17:48.910915 ELOG: Event(92) added with size 9 at 2023-10-02 17:17:49 UTC
1762 17:17:48.917416 ELOG: Event(93) added with size 9 at 2023-10-02 17:17:49 UTC
1763 17:17:48.924613 ELOG: Event(9E) added with size 10 at 2023-10-02 17:17:49 UTC
1764 17:17:48.930838 ELOG: Event(9F) added with size 14 at 2023-10-02 17:17:49 UTC
1765 17:17:48.937862 ELOG: Event(9F) added with size 14 at 2023-10-02 17:17:49 UTC
1766 17:17:48.941186 BS: BS_DEV_INIT exit times (exec / console): 3 / 51 ms
1767 17:17:48.947937 ELOG: Event(A1) added with size 10 at 2023-10-02 17:17:49 UTC
1768 17:17:48.954465 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1769 17:17:48.960843 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1770 17:17:48.961193 Finalize devices...
1771 17:17:48.964533 Devices finalized
1772 17:17:48.971222 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1773 17:17:48.974115 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1774 17:17:48.981108 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1775 17:17:48.984133 ME: HFSTS1 : 0x80030055
1776 17:17:48.990496 ME: HFSTS2 : 0x30280116
1777 17:17:48.993995 ME: HFSTS3 : 0x00000050
1778 17:17:48.997268 ME: HFSTS4 : 0x00004000
1779 17:17:49.003890 ME: HFSTS5 : 0x00000000
1780 17:17:49.007171 ME: HFSTS6 : 0x00400006
1781 17:17:49.010874 ME: Manufacturing Mode : YES
1782 17:17:49.014024 ME: SPI Protection Mode Enabled : NO
1783 17:17:49.020210 ME: FW Partition Table : OK
1784 17:17:49.024070 ME: Bringup Loader Failure : NO
1785 17:17:49.026992 ME: Firmware Init Complete : NO
1786 17:17:49.030262 ME: Boot Options Present : NO
1787 17:17:49.033582 ME: Update In Progress : NO
1788 17:17:49.037049 ME: D0i3 Support : YES
1789 17:17:49.040450 ME: Low Power State Enabled : NO
1790 17:17:49.047191 ME: CPU Replaced : YES
1791 17:17:49.050784 ME: CPU Replacement Valid : YES
1792 17:17:49.053653 ME: Current Working State : 5
1793 17:17:49.056470 ME: Current Operation State : 1
1794 17:17:49.060178 ME: Current Operation Mode : 3
1795 17:17:49.063664 ME: Error Code : 0
1796 17:17:49.066704 ME: Enhanced Debug Mode : NO
1797 17:17:49.070355 ME: CPU Debug Disabled : YES
1798 17:17:49.073418 ME: TXT Support : NO
1799 17:17:49.079862 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1800 17:17:49.089896 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1801 17:17:49.093422 CBFS: 'fallback/slic' not found.
1802 17:17:49.096519 ACPI: Writing ACPI tables at 76b01000.
1803 17:17:49.096938 ACPI: * FACS
1804 17:17:49.100116 ACPI: * DSDT
1805 17:17:49.103127 Ramoops buffer: 0x100000@0x76a00000.
1806 17:17:49.106657 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1807 17:17:49.113052 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1808 17:17:49.116305 Google Chrome EC: version:
1809 17:17:49.119633 ro: voema_v2.0.7540-147f8d37d1
1810 17:17:49.122779 rw: voema_v2.0.7540-147f8d37d1
1811 17:17:49.123158 running image: 2
1812 17:17:49.129482 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1813 17:17:49.134834 ACPI: * FADT
1814 17:17:49.135324 SCI is IRQ9
1815 17:17:49.141126 ACPI: added table 1/32, length now 40
1816 17:17:49.141528 ACPI: * SSDT
1817 17:17:49.144631 Found 1 CPU(s) with 8 core(s) each.
1818 17:17:49.150736 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1819 17:17:49.154552 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1820 17:17:49.157604 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1821 17:17:49.160704 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1822 17:17:49.167323 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1823 17:17:49.174343 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1824 17:17:49.177460 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1825 17:17:49.184499 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1826 17:17:49.191020 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1827 17:17:49.194475 \_SB.PCI0.RP09: Added StorageD3Enable property
1828 17:17:49.197532 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1829 17:17:49.204085 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1830 17:17:49.210677 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1831 17:17:49.214473 PS2K: Passing 80 keymaps to kernel
1832 17:17:49.220722 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1833 17:17:49.227254 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1834 17:17:49.233925 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1835 17:17:49.240743 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1836 17:17:49.247243 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1837 17:17:49.253985 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1838 17:17:49.257402 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1839 17:17:49.263921 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1840 17:17:49.270349 ACPI: added table 2/32, length now 44
1841 17:17:49.270729 ACPI: * MCFG
1842 17:17:49.273811 ACPI: added table 3/32, length now 48
1843 17:17:49.277424 ACPI: * TPM2
1844 17:17:49.280317 TPM2 log created at 0x769f0000
1845 17:17:49.283789 ACPI: added table 4/32, length now 52
1846 17:17:49.284131 ACPI: * MADT
1847 17:17:49.286895 SCI is IRQ9
1848 17:17:49.290332 ACPI: added table 5/32, length now 56
1849 17:17:49.290715 current = 76b09850
1850 17:17:49.293889 ACPI: * DMAR
1851 17:17:49.296754 ACPI: added table 6/32, length now 60
1852 17:17:49.300276 ACPI: added table 7/32, length now 64
1853 17:17:49.303778 ACPI: * HPET
1854 17:17:49.306788 ACPI: added table 8/32, length now 68
1855 17:17:49.307168 ACPI: done.
1856 17:17:49.310569 ACPI tables: 35216 bytes.
1857 17:17:49.313540 smbios_write_tables: 769ef000
1858 17:17:49.317112 EC returned error result code 3
1859 17:17:49.320071 Couldn't obtain OEM name from CBI
1860 17:17:49.324192 Create SMBIOS type 16
1861 17:17:49.327300 Create SMBIOS type 17
1862 17:17:49.330762 GENERIC: 0.0 (WIFI Device)
1863 17:17:49.331038 SMBIOS tables: 1750 bytes.
1864 17:17:49.336989 Writing table forward entry at 0x00000500
1865 17:17:49.343685 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1866 17:17:49.347451 Writing coreboot table at 0x76b25000
1867 17:17:49.353835 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1868 17:17:49.357229 1. 0000000000001000-000000000009ffff: RAM
1869 17:17:49.360569 2. 00000000000a0000-00000000000fffff: RESERVED
1870 17:17:49.367229 3. 0000000000100000-00000000769eefff: RAM
1871 17:17:49.370252 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1872 17:17:49.377241 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1873 17:17:49.383571 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1874 17:17:49.387372 7. 0000000077000000-000000007fbfffff: RESERVED
1875 17:17:49.390268 8. 00000000c0000000-00000000cfffffff: RESERVED
1876 17:17:49.396851 9. 00000000f8000000-00000000f9ffffff: RESERVED
1877 17:17:49.400330 10. 00000000fb000000-00000000fb000fff: RESERVED
1878 17:17:49.406920 11. 00000000fe000000-00000000fe00ffff: RESERVED
1879 17:17:49.410011 12. 00000000fed80000-00000000fed87fff: RESERVED
1880 17:17:49.416823 13. 00000000fed90000-00000000fed92fff: RESERVED
1881 17:17:49.420375 14. 00000000feda0000-00000000feda1fff: RESERVED
1882 17:17:49.426975 15. 00000000fedc0000-00000000feddffff: RESERVED
1883 17:17:49.430032 16. 0000000100000000-00000002803fffff: RAM
1884 17:17:49.433504 Passing 4 GPIOs to payload:
1885 17:17:49.437230 NAME | PORT | POLARITY | VALUE
1886 17:17:49.443986 lid | undefined | high | high
1887 17:17:49.446868 power | undefined | high | low
1888 17:17:49.453381 oprom | undefined | high | low
1889 17:17:49.460323 EC in RW | 0x000000e5 | high | high
1890 17:17:49.466774 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum ff1b
1891 17:17:49.467156 coreboot table: 1576 bytes.
1892 17:17:49.470591 IMD ROOT 0. 0x76fff000 0x00001000
1893 17:17:49.476860 IMD SMALL 1. 0x76ffe000 0x00001000
1894 17:17:49.480655 FSP MEMORY 2. 0x76c4e000 0x003b0000
1895 17:17:49.483785 VPD 3. 0x76c4d000 0x00000367
1896 17:17:49.487103 RO MCACHE 4. 0x76c4c000 0x00000fdc
1897 17:17:49.490239 CONSOLE 5. 0x76c2c000 0x00020000
1898 17:17:49.493318 FMAP 6. 0x76c2b000 0x00000578
1899 17:17:49.496869 TIME STAMP 7. 0x76c2a000 0x00000910
1900 17:17:49.500645 VBOOT WORK 8. 0x76c16000 0x00014000
1901 17:17:49.507179 ROMSTG STCK 9. 0x76c15000 0x00001000
1902 17:17:49.510216 AFTER CAR 10. 0x76c0a000 0x0000b000
1903 17:17:49.513847 RAMSTAGE 11. 0x76b97000 0x00073000
1904 17:17:49.516767 REFCODE 12. 0x76b42000 0x00055000
1905 17:17:49.520439 SMM BACKUP 13. 0x76b32000 0x00010000
1906 17:17:49.523634 4f444749 14. 0x76b30000 0x00002000
1907 17:17:49.526959 EXT VBT15. 0x76b2d000 0x0000219f
1908 17:17:49.529905 COREBOOT 16. 0x76b25000 0x00008000
1909 17:17:49.533736 ACPI 17. 0x76b01000 0x00024000
1910 17:17:49.536771 ACPI GNVS 18. 0x76b00000 0x00001000
1911 17:17:49.544000 RAMOOPS 19. 0x76a00000 0x00100000
1912 17:17:49.546896 TPM2 TCGLOG20. 0x769f0000 0x00010000
1913 17:17:49.550370 SMBIOS 21. 0x769ef000 0x00000800
1914 17:17:49.550865 IMD small region:
1915 17:17:49.556974 IMD ROOT 0. 0x76ffec00 0x00000400
1916 17:17:49.560611 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1917 17:17:49.563603 POWER STATE 2. 0x76ffeb80 0x00000044
1918 17:17:49.567112 ROMSTAGE 3. 0x76ffeb60 0x00000004
1919 17:17:49.570615 MEM INFO 4. 0x76ffe980 0x000001e0
1920 17:17:49.577197 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1921 17:17:49.580517 MTRR: Physical address space:
1922 17:17:49.586957 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1923 17:17:49.593689 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1924 17:17:49.599946 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1925 17:17:49.603826 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1926 17:17:49.610552 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1927 17:17:49.616481 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1928 17:17:49.623522 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1929 17:17:49.627341 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 17:17:49.633622 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 17:17:49.636623 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 17:17:49.640204 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 17:17:49.643374 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 17:17:49.649892 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 17:17:49.653514 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 17:17:49.656556 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 17:17:49.659731 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 17:17:49.666283 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 17:17:49.669788 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 17:17:49.672830 call enable_fixed_mtrr()
1941 17:17:49.676276 CPU physical address size: 39 bits
1942 17:17:49.679945 MTRR: default type WB/UC MTRR counts: 6/6.
1943 17:17:49.682975 MTRR: UC selected as default type.
1944 17:17:49.689846 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1945 17:17:49.696650 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1946 17:17:49.703373 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1947 17:17:49.709887 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1948 17:17:49.716619 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1949 17:17:49.722719 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1950 17:17:49.726013 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 17:17:49.729738 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 17:17:49.736161 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 17:17:49.739645 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 17:17:49.742751 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 17:17:49.746307 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 17:17:49.752766 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 17:17:49.755746 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 17:17:49.759378 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 17:17:49.762903 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 17:17:49.769178 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 17:17:49.769559
1962 17:17:49.769861 MTRR check
1963 17:17:49.772727 call enable_fixed_mtrr()
1964 17:17:49.776214 Fixed MTRRs : Enabled
1965 17:17:49.779123 Variable MTRRs: Enabled
1966 17:17:49.779504
1967 17:17:49.782686 CPU physical address size: 39 bits
1968 17:17:49.789271 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
1969 17:17:49.792269 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 17:17:49.796060 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 17:17:49.802663 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 17:17:49.805916 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 17:17:49.808929 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 17:17:49.812092 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 17:17:49.818735 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 17:17:49.822056 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 17:17:49.825478 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 17:17:49.829020 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 17:17:49.831943 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 17:17:49.839419 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 17:17:49.842124 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 17:17:49.848766 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 17:17:49.849172 call enable_fixed_mtrr()
1984 17:17:49.855449 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 17:17:49.858918 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 17:17:49.861573 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 17:17:49.865305 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 17:17:49.868697 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 17:17:49.874952 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 17:17:49.878332 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 17:17:49.881926 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 17:17:49.884759 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 17:17:49.891874 CPU physical address size: 39 bits
1994 17:17:49.894855 call enable_fixed_mtrr()
1995 17:17:49.898562 MTRR: Fixed MSR 0x258 0x0606060606060606
1996 17:17:49.901420 MTRR: Fixed MSR 0x250 0x0606060606060606
1997 17:17:49.908371 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 17:17:49.911741 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 17:17:49.915045 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 17:17:49.918451 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 17:17:49.924620 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 17:17:49.928287 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 17:17:49.931550 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 17:17:49.935005 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 17:17:49.941508 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 17:17:49.945216 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 17:17:49.948446 call enable_fixed_mtrr()
2008 17:17:49.951078 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 17:17:49.954381 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 17:17:49.961028 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 17:17:49.964517 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 17:17:49.967667 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 17:17:49.971320 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 17:17:49.977652 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 17:17:49.981259 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 17:17:49.984630 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 17:17:49.987582 CPU physical address size: 39 bits
2018 17:17:49.991626 call enable_fixed_mtrr()
2019 17:17:49.996514 Checking cr50 for pending updates
2020 17:17:50.000145 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 17:17:50.003063 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 17:17:50.010212 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 17:17:50.013227 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 17:17:50.016778 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 17:17:50.020054 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 17:17:50.023273 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 17:17:50.029793 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 17:17:50.033021 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 17:17:50.036966 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 17:17:50.039978 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 17:17:50.046330 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 17:17:50.049718 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 17:17:50.053415 call enable_fixed_mtrr()
2034 17:17:50.056262 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 17:17:50.059712 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 17:17:50.066516 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 17:17:50.069435 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 17:17:50.073019 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 17:17:50.076682 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 17:17:50.082607 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 17:17:50.086138 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 17:17:50.089521 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 17:17:50.092433 CPU physical address size: 39 bits
2044 17:17:50.099575 call enable_fixed_mtrr()
2045 17:17:50.102487 CPU physical address size: 39 bits
2046 17:17:50.106038 CPU physical address size: 39 bits
2047 17:17:50.109514 CPU physical address size: 39 bits
2048 17:17:50.109887 Reading cr50 TPM mode
2049 17:17:50.120375 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2050 17:17:50.130899 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2051 17:17:50.134027 Checking segment from ROM address 0xffc02b38
2052 17:17:50.137452 Checking segment from ROM address 0xffc02b54
2053 17:17:50.144209 Loading segment from ROM address 0xffc02b38
2054 17:17:50.144588 code (compression=0)
2055 17:17:50.154418 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2056 17:17:50.160890 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2057 17:17:50.163710 it's not compressed!
2058 17:17:50.302935 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2059 17:17:50.310032 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2060 17:17:50.316732 Loading segment from ROM address 0xffc02b54
2061 17:17:50.317269 Entry Point 0x30000000
2062 17:17:50.319627 Loaded segments
2063 17:17:50.326140 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2064 17:17:50.369498 Finalizing chipset.
2065 17:17:50.372723 Finalizing SMM.
2066 17:17:50.373162 APMC done.
2067 17:17:50.379013 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2068 17:17:50.382537 mp_park_aps done after 0 msecs.
2069 17:17:50.385872 Jumping to boot code at 0x30000000(0x76b25000)
2070 17:17:50.395710 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2071 17:17:50.396098
2072 17:17:50.396403
2073 17:17:50.396687
2074 17:17:50.399346 Starting depthcharge on Voema...
2075 17:17:50.399846
2076 17:17:50.400950 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2077 17:17:50.401405 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2078 17:17:50.401779 Setting prompt string to ['volteer:']
2079 17:17:50.402158 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2080 17:17:50.409314 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2081 17:17:50.409788
2082 17:17:50.415948 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2083 17:17:50.416334
2084 17:17:50.419009 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2085 17:17:50.422583
2086 17:17:50.425590 Failed to find eMMC card reader
2087 17:17:50.425974
2088 17:17:50.426275 Wipe memory regions:
2089 17:17:50.426556
2090 17:17:50.432077 [0x00000000001000, 0x000000000a0000)
2091 17:17:50.432459
2092 17:17:50.435711 [0x00000000100000, 0x00000030000000)
2093 17:17:50.461625
2094 17:17:50.464780 [0x00000032662db0, 0x000000769ef000)
2095 17:17:50.500277
2096 17:17:50.503976 [0x00000100000000, 0x00000280400000)
2097 17:17:50.702992
2098 17:17:50.706101 ec_init: CrosEC protocol v3 supported (256, 256)
2099 17:17:50.706558
2100 17:17:50.712824 update_port_state: port C0 state: usb enable 1 mux conn 0
2101 17:17:50.713213
2102 17:17:50.719366 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2103 17:17:50.723779
2104 17:17:50.726956 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2105 17:17:50.727340
2106 17:17:50.730648 send_conn_disc_msg: pmc_send_cmd succeeded
2107 17:17:51.162071
2108 17:17:51.162736 R8152: Initializing
2109 17:17:51.163166
2110 17:17:51.165448 Version 6 (ocp_data = 5c30)
2111 17:17:51.165867
2112 17:17:51.168575 R8152: Done initializing
2113 17:17:51.169069
2114 17:17:51.171885 Adding net device
2115 17:17:51.473782
2116 17:17:51.476907 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2117 17:17:51.477307
2118 17:17:51.477650
2119 17:17:51.478099
2120 17:17:51.481103 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2122 17:17:51.582221 volteer: tftpboot 192.168.201.1 11661453/tftp-deploy-9lyb9j5p/kernel/bzImage 11661453/tftp-deploy-9lyb9j5p/kernel/cmdline 11661453/tftp-deploy-9lyb9j5p/ramdisk/ramdisk.cpio.gz
2123 17:17:51.582759 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2124 17:17:51.583163 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2125 17:17:51.587645 tftpboot 192.168.201.1 11661453/tftp-deploy-9lyb9j5p/kernel/bzIploy-9lyb9j5p/kernel/cmdline 11661453/tftp-deploy-9lyb9j5p/ramdisk/ramdisk.cpio.gz
2126 17:17:51.588157
2127 17:17:51.588469 Waiting for link
2128 17:17:51.790699
2129 17:17:51.791166 done.
2130 17:17:51.791488
2131 17:17:51.791782 MAC: 00:24:32:30:7b:87
2132 17:17:51.792113
2133 17:17:51.793838 Sending DHCP discover... done.
2134 17:17:51.794239
2135 17:17:51.797136 Waiting for reply... done.
2136 17:17:51.797549
2137 17:17:51.800276 Sending DHCP request... done.
2138 17:17:51.800727
2139 17:17:51.807378 Waiting for reply... done.
2140 17:17:51.807782
2141 17:17:51.808085 My ip is 192.168.201.19
2142 17:17:51.808396
2143 17:17:51.810700 The DHCP server ip is 192.168.201.1
2144 17:17:51.814392
2145 17:17:51.817373 TFTP server IP predefined by user: 192.168.201.1
2146 17:17:51.817862
2147 17:17:51.824275 Bootfile predefined by user: 11661453/tftp-deploy-9lyb9j5p/kernel/bzImage
2148 17:17:51.824662
2149 17:17:51.827363 Sending tftp read request... done.
2150 17:17:51.827865
2151 17:17:51.836433 Waiting for the transfer...
2152 17:17:51.836935
2153 17:17:52.479724 00000000 ################################################################
2154 17:17:52.479871
2155 17:17:53.068790 00080000 ################################################################
2156 17:17:53.068968
2157 17:17:53.638673 00100000 ################################################################
2158 17:17:53.638816
2159 17:17:54.217608 00180000 ################################################################
2160 17:17:54.217745
2161 17:17:54.804431 00200000 ################################################################
2162 17:17:54.804574
2163 17:17:55.370269 00280000 ################################################################
2164 17:17:55.370415
2165 17:17:55.927490 00300000 ################################################################
2166 17:17:55.927632
2167 17:17:56.498949 00380000 ################################################################
2168 17:17:56.499092
2169 17:17:57.069347 00400000 ################################################################
2170 17:17:57.069491
2171 17:17:57.710963 00480000 ################################################################
2172 17:17:57.711101
2173 17:17:58.297277 00500000 ################################################################
2174 17:17:58.297421
2175 17:17:58.883980 00580000 ################################################################
2176 17:17:58.884120
2177 17:17:59.483140 00600000 ################################################################
2178 17:17:59.483279
2179 17:18:00.052428 00680000 ################################################################
2180 17:18:00.052573
2181 17:18:00.623452 00700000 ################################################################
2182 17:18:00.623603
2183 17:18:01.218998 00780000 ################################################################
2184 17:18:01.219152
2185 17:18:01.339219 00800000 ############# done.
2186 17:18:01.339353
2187 17:18:01.343166 The bootfile was 8490896 bytes long.
2188 17:18:01.343579
2189 17:18:01.346143 Sending tftp read request... done.
2190 17:18:01.346579
2191 17:18:01.349658 Waiting for the transfer...
2192 17:18:01.350099
2193 17:18:02.028477 00000000 ################################################################
2194 17:18:02.029193
2195 17:18:02.626627 00080000 ################################################################
2196 17:18:02.626775
2197 17:18:03.216272 00100000 ################################################################
2198 17:18:03.216423
2199 17:18:03.782714 00180000 ################################################################
2200 17:18:03.782908
2201 17:18:04.337465 00200000 ################################################################
2202 17:18:04.337640
2203 17:18:04.872304 00280000 ################################################################
2204 17:18:04.872484
2205 17:18:05.446195 00300000 ################################################################
2206 17:18:05.446353
2207 17:18:05.999608 00380000 ################################################################
2208 17:18:05.999775
2209 17:18:06.554009 00400000 ################################################################
2210 17:18:06.554183
2211 17:18:07.124417 00480000 ################################################################
2212 17:18:07.124588
2213 17:18:07.684293 00500000 ################################################################
2214 17:18:07.684434
2215 17:18:08.279305 00580000 ################################################################
2216 17:18:08.279461
2217 17:18:08.828026 00600000 ################################################################
2218 17:18:08.828187
2219 17:18:09.395034 00680000 ################################################################
2220 17:18:09.395193
2221 17:18:09.945854 00700000 ################################################################
2222 17:18:09.946011
2223 17:18:10.491303 00780000 ################################################################
2224 17:18:10.491450
2225 17:18:11.042230 00800000 ################################################################
2226 17:18:11.042373
2227 17:18:11.619022 00880000 ################################################################
2228 17:18:11.619160
2229 17:18:12.165558 00900000 ################################################################
2230 17:18:12.165739
2231 17:18:12.696733 00980000 ################################################################
2232 17:18:12.696895
2233 17:18:13.254728 00a00000 ################################################################
2234 17:18:13.254870
2235 17:18:13.796313 00a80000 ################################################################
2236 17:18:13.796488
2237 17:18:14.339412 00b00000 ################################################################
2238 17:18:14.339564
2239 17:18:14.875249 00b80000 ################################################################
2240 17:18:14.875403
2241 17:18:15.419648 00c00000 ################################################################
2242 17:18:15.419804
2243 17:18:15.968015 00c80000 ################################################################
2244 17:18:15.968162
2245 17:18:16.510395 00d00000 ################################################################
2246 17:18:16.510537
2247 17:18:17.103904 00d80000 ################################################################
2248 17:18:17.104091
2249 17:18:17.769698 00e00000 ################################################################
2250 17:18:17.770204
2251 17:18:18.433699 00e80000 ################################################################
2252 17:18:18.433846
2253 17:18:19.061417 00f00000 ################################################################
2254 17:18:19.062137
2255 17:18:19.727127 00f80000 ################################################################
2256 17:18:19.727691
2257 17:18:20.391915 01000000 ################################################################
2258 17:18:20.392428
2259 17:18:20.951769 01080000 ################################################################
2260 17:18:20.951924
2261 17:18:21.509250 01100000 ################################################################
2262 17:18:21.509409
2263 17:18:22.144721 01180000 ################################################################
2264 17:18:22.145273
2265 17:18:22.833883 01200000 ################################################################
2266 17:18:22.834391
2267 17:18:23.527930 01280000 ################################################################
2268 17:18:23.528466
2269 17:18:24.222492 01300000 ################################################################
2270 17:18:24.222999
2271 17:18:24.907712 01380000 ################################################################
2272 17:18:24.908221
2273 17:18:25.602567 01400000 ################################################################
2274 17:18:25.603174
2275 17:18:26.303881 01480000 ################################################################
2276 17:18:26.304389
2277 17:18:26.997107 01500000 ################################################################
2278 17:18:26.997783
2279 17:18:27.697500 01580000 ################################################################
2280 17:18:27.697986
2281 17:18:28.386642 01600000 ################################################################
2282 17:18:28.387143
2283 17:18:29.075848 01680000 ################################################################
2284 17:18:29.076339
2285 17:18:29.755831 01700000 ################################################################
2286 17:18:29.756336
2287 17:18:30.399079 01780000 ################################################################
2288 17:18:30.399669
2289 17:18:31.062918 01800000 ################################################################
2290 17:18:31.063062
2291 17:18:31.656642 01880000 ################################################################
2292 17:18:31.656833
2293 17:18:32.290318 01900000 ################################################################
2294 17:18:32.290806
2295 17:18:32.975315 01980000 ################################################################
2296 17:18:32.975809
2297 17:18:33.661323 01a00000 ################################################################
2298 17:18:33.661804
2299 17:18:34.329465 01a80000 ################################################################
2300 17:18:34.330044
2301 17:18:34.951206 01b00000 ################################################################
2302 17:18:34.951362
2303 17:18:35.524470 01b80000 ################################################################
2304 17:18:35.524623
2305 17:18:36.102305 01c00000 ################################################################
2306 17:18:36.102465
2307 17:18:36.780516 01c80000 ################################################################
2308 17:18:36.780669
2309 17:18:37.390435 01d00000 ################################################################
2310 17:18:37.390589
2311 17:18:37.976038 01d80000 ################################################################
2312 17:18:37.976177
2313 17:18:38.584729 01e00000 ################################################################
2314 17:18:38.584896
2315 17:18:39.186902 01e80000 ################################################################
2316 17:18:39.187051
2317 17:18:39.858726 01f00000 ################################################################
2318 17:18:39.859219
2319 17:18:40.537327 01f80000 ################################################################
2320 17:18:40.537872
2321 17:18:41.220046 02000000 ################################################################
2322 17:18:41.220547
2323 17:18:41.904042 02080000 ################################################################
2324 17:18:41.904546
2325 17:18:42.573103 02100000 ################################################################
2326 17:18:42.573599
2327 17:18:43.248212 02180000 ################################################################
2328 17:18:43.248698
2329 17:18:43.804329 02200000 #################################################### done.
2330 17:18:43.804922
2331 17:18:43.807528 Sending tftp read request... done.
2332 17:18:43.807940
2333 17:18:43.811009 Waiting for the transfer...
2334 17:18:43.811424
2335 17:18:43.811758 00000000 # done.
2336 17:18:43.812078
2337 17:18:43.821102 Command line loaded dynamically from TFTP file: 11661453/tftp-deploy-9lyb9j5p/kernel/cmdline
2338 17:18:43.821519
2339 17:18:43.837331 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2340 17:18:43.843258
2341 17:18:43.847080 Shutting down all USB controllers.
2342 17:18:43.847586
2343 17:18:43.847917 Removing current net device
2344 17:18:43.848227
2345 17:18:43.849680 Finalizing coreboot
2346 17:18:43.850030
2347 17:18:43.857035 Exiting depthcharge with code 4 at timestamp: 62125584
2348 17:18:43.857539
2349 17:18:43.857864
2350 17:18:43.858171 Starting kernel ...
2351 17:18:43.858466
2352 17:18:43.858752
2353 17:18:43.860442 end: 2.2.4 bootloader-commands (duration 00:00:53) [common]
2354 17:18:43.860942 start: 2.2.5 auto-login-action (timeout 00:03:51) [common]
2355 17:18:43.861313 Setting prompt string to ['Linux version [0-9]']
2356 17:18:43.861662 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2357 17:18:43.862004 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2359 17:22:34.861890 end: 2.2.5 auto-login-action (duration 00:03:51) [common]
2361 17:22:34.862871 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 231 seconds'
2363 17:22:34.863655 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2366 17:22:34.864956 end: 2 depthcharge-action (duration 00:05:00) [common]
2368 17:22:34.866033 Cleaning after the job
2369 17:22:34.866455 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11661453/tftp-deploy-9lyb9j5p/ramdisk
2370 17:22:34.886797 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11661453/tftp-deploy-9lyb9j5p/kernel
2371 17:22:34.892076 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11661453/tftp-deploy-9lyb9j5p/modules
2372 17:22:34.893209 start: 4.1 power-off (timeout 00:00:30) [common]
2373 17:22:34.893724 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=off'
2374 17:22:34.986386 >> Command sent successfully.
2375 17:22:34.994449 Returned 0 in 0 seconds
2376 17:22:35.095707 end: 4.1 power-off (duration 00:00:00) [common]
2378 17:22:35.097167 start: 4.2 read-feedback (timeout 00:10:00) [common]
2379 17:22:35.098349 Listened to connection for namespace 'common' for up to 1s
2380 17:22:36.099028 Finalising connection for namespace 'common'
2381 17:22:36.099741 Disconnecting from shell: Finalise
2382 17:22:36.100228
2383 17:22:36.201293 end: 4.2 read-feedback (duration 00:00:01) [common]
2384 17:22:36.201808 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11661453
2385 17:22:36.336450 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11661453
2386 17:22:36.336661 JobError: Your job cannot terminate cleanly.