Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 05:28:40.971038 lava-dispatcher, installed at version: 2023.08
2 05:28:40.971196 start: 0 validate
3 05:28:40.971299 Start time: 2023-11-05 05:28:40.971292+00:00 (UTC)
4 05:28:40.971400 Validating that http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz exists
5 05:28:41.238992 Validating that http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1872-g0dd3085de20bc/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage exists
6 05:28:41.373723 Validating that http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1872-g0dd3085de20bc/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz exists
7 05:28:41.514621 validate duration: 0.54
9 05:28:41.515011 start: 1 tftp-deploy (timeout 00:10:00) [common]
10 05:28:41.515125 start: 1.1 download-retry (timeout 00:10:00) [common]
11 05:28:41.515213 start: 1.1.1 http-download (timeout 00:10:00) [common]
12 05:28:41.515349 Not decompressing ramdisk as can be used compressed.
13 05:28:41.515436 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
14 05:28:41.515497 saving as /var/lib/lava/dispatcher/tmp/11947781/tftp-deploy-sxj4rmey/ramdisk/rootfs.cpio.gz
15 05:28:41.515563 total size: 8418130 (8 MB)
16 05:28:41.783576 progress 0 % (0 MB)
17 05:28:42.185177 progress 5 % (0 MB)
18 05:28:42.322691 progress 10 % (0 MB)
19 05:28:42.715730 progress 15 % (1 MB)
20 05:28:42.723850 progress 20 % (1 MB)
21 05:28:42.814916 progress 25 % (2 MB)
22 05:28:43.064702 progress 30 % (2 MB)
23 05:28:43.072822 progress 35 % (2 MB)
24 05:28:43.078615 progress 40 % (3 MB)
25 05:28:43.082252 progress 45 % (3 MB)
26 05:28:43.084543 progress 50 % (4 MB)
27 05:28:43.290425 progress 55 % (4 MB)
28 05:28:43.298494 progress 60 % (4 MB)
29 05:28:43.304469 progress 65 % (5 MB)
30 05:28:43.394703 progress 70 % (5 MB)
31 05:28:43.647375 progress 75 % (6 MB)
32 05:28:43.655129 progress 80 % (6 MB)
33 05:28:43.778927 progress 85 % (6 MB)
34 05:28:43.917764 progress 90 % (7 MB)
35 05:28:44.050436 progress 95 % (7 MB)
36 05:28:44.175848 progress 100 % (8 MB)
37 05:28:44.176820 8 MB downloaded in 2.66 s (3.02 MB/s)
38 05:28:44.177412 end: 1.1.1 http-download (duration 00:00:03) [common]
40 05:28:44.178337 end: 1.1 download-retry (duration 00:00:03) [common]
41 05:28:44.178655 start: 1.2 download-retry (timeout 00:09:57) [common]
42 05:28:44.178976 start: 1.2.1 http-download (timeout 00:09:57) [common]
43 05:28:44.179452 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1872-g0dd3085de20bc/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
44 05:28:44.179745 saving as /var/lib/lava/dispatcher/tmp/11947781/tftp-deploy-sxj4rmey/kernel/bzImage
45 05:28:44.180023 total size: 8576912 (8 MB)
46 05:28:44.180256 No compression specified
47 05:28:44.316599 progress 0 % (0 MB)
48 05:28:44.450248 progress 5 % (0 MB)
49 05:28:44.719875 progress 10 % (0 MB)
50 05:28:44.803692 progress 15 % (1 MB)
51 05:28:44.862368 progress 20 % (1 MB)
52 05:28:45.115308 progress 25 % (2 MB)
53 05:28:45.257134 progress 30 % (2 MB)
54 05:28:45.394830 progress 35 % (2 MB)
55 05:28:45.595345 progress 40 % (3 MB)
56 05:28:45.790442 progress 45 % (3 MB)
57 05:28:45.927581 progress 50 % (4 MB)
58 05:28:46.064027 progress 55 % (4 MB)
59 05:28:46.311848 progress 60 % (4 MB)
60 05:28:46.453675 progress 65 % (5 MB)
61 05:28:46.662740 progress 70 % (5 MB)
62 05:28:46.834128 progress 75 % (6 MB)
63 05:28:46.994863 progress 80 % (6 MB)
64 05:28:47.254667 progress 85 % (6 MB)
65 05:28:47.435827 progress 90 % (7 MB)
66 05:28:47.862846 progress 95 % (7 MB)
67 05:28:47.997549 progress 100 % (8 MB)
68 05:28:47.998410 8 MB downloaded in 3.82 s (2.14 MB/s)
69 05:28:47.998967 end: 1.2.1 http-download (duration 00:00:04) [common]
71 05:28:47.999913 end: 1.2 download-retry (duration 00:00:04) [common]
72 05:28:48.000236 start: 1.3 download-retry (timeout 00:09:54) [common]
73 05:28:48.000542 start: 1.3.1 http-download (timeout 00:09:54) [common]
74 05:28:48.001171 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1872-g0dd3085de20bc/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
75 05:28:48.001508 saving as /var/lib/lava/dispatcher/tmp/11947781/tftp-deploy-sxj4rmey/modules/modules.tar
76 05:28:48.001741 total size: 250932 (0 MB)
77 05:28:48.001968 Using unxz to decompress xz
78 05:28:48.150895 progress 13 % (0 MB)
79 05:28:48.152279 progress 26 % (0 MB)
80 05:28:48.153139 progress 39 % (0 MB)
81 05:28:48.158416 progress 52 % (0 MB)
82 05:28:48.160067 progress 65 % (0 MB)
83 05:28:48.283472 progress 78 % (0 MB)
84 05:28:48.288692 progress 91 % (0 MB)
85 05:28:48.289146 progress 100 % (0 MB)
86 05:28:48.291941 0 MB downloaded in 0.29 s (0.82 MB/s)
87 05:28:48.292170 end: 1.3.1 http-download (duration 00:00:00) [common]
89 05:28:48.292414 end: 1.3 download-retry (duration 00:00:00) [common]
90 05:28:48.292493 start: 1.4 prepare-tftp-overlay (timeout 00:09:53) [common]
91 05:28:48.292573 start: 1.4.1 extract-nfsrootfs (timeout 00:09:53) [common]
92 05:28:48.292641 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
93 05:28:48.292712 start: 1.4.2 lava-overlay (timeout 00:09:53) [common]
94 05:28:48.292898 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i
95 05:28:48.293026 makedir: /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin
96 05:28:48.293131 makedir: /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/tests
97 05:28:48.293216 makedir: /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/results
98 05:28:48.293318 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-add-keys
99 05:28:48.293454 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-add-sources
100 05:28:48.293568 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-background-process-start
101 05:28:48.293682 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-background-process-stop
102 05:28:48.293792 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-common-functions
103 05:28:48.293900 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-echo-ipv4
104 05:28:48.293996 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-install-packages
105 05:28:48.294090 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-installed-packages
106 05:28:48.294185 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-os-build
107 05:28:48.294287 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-probe-channel
108 05:28:48.294380 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-probe-ip
109 05:28:48.294473 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-target-ip
110 05:28:48.294567 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-target-mac
111 05:28:48.294722 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-target-storage
112 05:28:48.294883 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-test-case
113 05:28:48.294980 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-test-event
114 05:28:48.295122 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-test-feedback
115 05:28:48.295220 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-test-raise
116 05:28:48.295316 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-test-reference
117 05:28:48.295414 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-test-runner
118 05:28:48.295509 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-test-set
119 05:28:48.295605 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-test-shell
120 05:28:48.295708 Updating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-install-packages (oe)
121 05:28:48.295853 Updating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/bin/lava-installed-packages (oe)
122 05:28:48.295950 Creating /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/environment
123 05:28:48.296032 LAVA metadata
124 05:28:48.296091 - LAVA_JOB_ID=11947781
125 05:28:48.296141 - LAVA_DISPATCHER_IP=10.108.97.116
126 05:28:48.296224 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:53) [common]
127 05:28:48.296281 skipped lava-vland-overlay
128 05:28:48.296343 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
129 05:28:48.296406 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:53) [common]
130 05:28:48.296457 skipped lava-multinode-overlay
131 05:28:48.296512 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
132 05:28:48.296574 start: 1.4.2.3 test-definition (timeout 00:09:53) [common]
133 05:28:48.296634 Loading test definitions
134 05:28:48.296706 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:53) [common]
135 05:28:48.296766 Using /lava-11947781 at stage 0
136 05:28:48.297011 uuid=11947781_1.4.2.3.1 testdef=None
137 05:28:48.297085 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
138 05:28:48.297163 start: 1.4.2.3.2 test-overlay (timeout 00:09:53) [common]
139 05:28:48.297584 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
141 05:28:48.297812 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:53) [common]
142 05:28:48.298331 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
144 05:28:48.298518 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:53) [common]
145 05:28:48.299038 runner path: /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/0/tests/0_dmesg test_uuid 11947781_1.4.2.3.1
146 05:28:48.299160 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
148 05:28:48.299341 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:53) [common]
149 05:28:48.299396 Using /lava-11947781 at stage 1
150 05:28:48.299621 uuid=11947781_1.4.2.3.5 testdef=None
151 05:28:48.299690 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
152 05:28:48.299753 start: 1.4.2.3.6 test-overlay (timeout 00:09:53) [common]
153 05:28:48.300165 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
155 05:28:48.300409 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:53) [common]
156 05:28:48.300973 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
158 05:28:48.301159 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:53) [common]
159 05:28:48.301643 runner path: /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/1/tests/1_bootrr test_uuid 11947781_1.4.2.3.5
160 05:28:48.301761 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
162 05:28:48.301927 Creating lava-test-runner.conf files
163 05:28:48.301974 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/0 for stage 0
164 05:28:48.302042 - 0_dmesg
165 05:28:48.302106 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11947781/lava-overlay-ext_v67i/lava-11947781/1 for stage 1
166 05:28:48.302177 - 1_bootrr
167 05:28:48.302253 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
168 05:28:48.302321 start: 1.4.2.4 compress-overlay (timeout 00:09:53) [common]
169 05:28:48.309100 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
170 05:28:48.309197 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:53) [common]
171 05:28:48.309270 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
172 05:28:48.309338 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
173 05:28:48.309406 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:53) [common]
174 05:28:48.480536 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
175 05:28:48.480815 start: 1.4.4 extract-modules (timeout 00:09:53) [common]
176 05:28:48.480971 extracting modules file /var/lib/lava/dispatcher/tmp/11947781/tftp-deploy-sxj4rmey/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11947781/extract-overlay-ramdisk-zomsv_on/ramdisk
177 05:28:48.489888 end: 1.4.4 extract-modules (duration 00:00:00) [common]
178 05:28:48.490015 start: 1.4.5 apply-overlay-tftp (timeout 00:09:53) [common]
179 05:28:48.490095 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11947781/compress-overlay-kfc3kklt/overlay-1.4.2.4.tar.gz to ramdisk
180 05:28:48.490154 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11947781/compress-overlay-kfc3kklt/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11947781/extract-overlay-ramdisk-zomsv_on/ramdisk
181 05:28:48.496495 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
182 05:28:48.496595 start: 1.4.6 configure-preseed-file (timeout 00:09:53) [common]
183 05:28:48.496674 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
184 05:28:48.496791 start: 1.4.7 compress-ramdisk (timeout 00:09:53) [common]
185 05:28:48.496873 Building ramdisk /var/lib/lava/dispatcher/tmp/11947781/extract-overlay-ramdisk-zomsv_on/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11947781/extract-overlay-ramdisk-zomsv_on/ramdisk
186 05:28:48.565972 >> 49788 blocks
187 05:28:49.307573 rename /var/lib/lava/dispatcher/tmp/11947781/extract-overlay-ramdisk-zomsv_on/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11947781/tftp-deploy-sxj4rmey/ramdisk/ramdisk.cpio.gz
188 05:28:49.307915 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
189 05:28:49.308015 start: 1.4.8 prepare-kernel (timeout 00:09:52) [common]
190 05:28:49.308094 start: 1.4.8.1 prepare-fit (timeout 00:09:52) [common]
191 05:28:49.308171 No mkimage arch provided, not using FIT.
192 05:28:49.308239 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
193 05:28:49.308302 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
194 05:28:49.308395 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
195 05:28:49.308468 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:52) [common]
196 05:28:49.308536 No LXC device requested
197 05:28:49.308601 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
198 05:28:49.308670 start: 1.6 deploy-device-env (timeout 00:09:52) [common]
199 05:28:49.308738 end: 1.6 deploy-device-env (duration 00:00:00) [common]
200 05:28:49.308796 Checking files for TFTP limit of 4294967296 bytes.
201 05:28:49.309115 end: 1 tftp-deploy (duration 00:00:08) [common]
202 05:28:49.309195 start: 2 depthcharge-action (timeout 00:05:00) [common]
203 05:28:49.309279 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
204 05:28:49.309855 substitutions:
205 05:28:49.309931 - {DTB}: None
206 05:28:49.309989 - {INITRD}: 11947781/tftp-deploy-sxj4rmey/ramdisk/ramdisk.cpio.gz
207 05:28:49.310036 - {KERNEL}: 11947781/tftp-deploy-sxj4rmey/kernel/bzImage
208 05:28:49.310081 - {LAVA_MAC}: None
209 05:28:49.310125 - {PRESEED_CONFIG}: None
210 05:28:49.310169 - {PRESEED_LOCAL}: None
211 05:28:49.310214 - {RAMDISK}: 11947781/tftp-deploy-sxj4rmey/ramdisk/ramdisk.cpio.gz
212 05:28:49.310259 - {ROOT_PART}: None
213 05:28:49.310304 - {ROOT}: None
214 05:28:49.310350 - {SERVER_IP}: 10.108.97.116
215 05:28:49.310395 - {TEE}: None
216 05:28:49.310439 Parsed boot commands:
217 05:28:49.310483 - tftpboot 10.108.97.116 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
218 05:28:49.311031 Parsed boot commands: tftpboot 10.108.97.116 11947781/tftp-deploy-sxj4rmey/kernel/bzImage 11947781/tftp-deploy-sxj4rmey/kernel/cmdline 11947781/tftp-deploy-sxj4rmey/ramdisk/ramdisk.cpio.gz
219 05:28:49.311118 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
220 05:28:49.311196 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
221 05:28:49.311277 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
222 05:28:49.311343 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
223 05:28:49.311397 Not connected, no need to disconnect.
224 05:28:49.311455 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
225 05:28:49.311516 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
226 05:28:49.311572 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-15'
227 05:28:49.314524 Setting prompt string to ['lava-test: # ']
228 05:28:49.314796 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
229 05:28:49.314888 end: 2.2.1 reset-connection (duration 00:00:00) [common]
230 05:28:49.314970 start: 2.2.2 reset-device (timeout 00:05:00) [common]
231 05:28:49.315050 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
232 05:28:49.315209 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-15' '--port=1' '--command=reboot'
233 05:28:54.457347 >> Command sent successfully.
234 05:28:54.459512 Returned 0 in 5 seconds
235 05:28:54.560132 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
237 05:28:54.561240 end: 2.2.2 reset-device (duration 00:00:05) [common]
238 05:28:54.561581 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
239 05:28:54.561868 Setting prompt string to 'Starting depthcharge on Voema...'
240 05:28:54.562109 Changing prompt to 'Starting depthcharge on Voema...'
241 05:28:54.562343 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
242 05:28:54.563214 [Enter `^Ec?' for help]
243 05:28:56.133937 22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
244 05:28:56.140720 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
245 05:28:56.144076 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
246 05:28:56.147933 CPU: AES supported, TXT NOT supported, VT supported
247 05:28:56.155250 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
248 05:28:56.158955 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
249 05:28:56.165875 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
250 05:28:56.169205 VBOOT: Loading verstage.
251 05:28:56.172851 FMAP: Found "FLASH" version 1.1 at 0x1804000.
252 05:28:56.175577 FMAP: base = 0x0 size = 0x2000000 #areas = 32
253 05:28:56.183050 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
254 05:28:56.189856 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
255 05:28:56.200255 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
256 05:28:56.200829
257 05:28:56.201169
258 05:28:56.209743 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
259 05:28:56.225534 Probing TPM: . done!
260 05:28:56.228936 TPM ready after 0 ms
261 05:28:56.231880 Connected to device vid:did:rid of 1ae0:0028:00
262 05:28:56.243312 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
263 05:28:56.250159 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
264 05:28:56.253221 Initialized TPM device CR50 revision 0
265 05:28:56.303593 tlcl_send_startup: Startup return code is 0
266 05:28:56.304130 TPM: setup succeeded
267 05:28:56.318151 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 05:28:56.332083 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 05:28:56.344729 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
270 05:28:56.355004 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
271 05:28:56.358384 Chrome EC: UHEPI supported
272 05:28:56.361932 Phase 1
273 05:28:56.365056 FMAP: area GBB found @ 1805000 (458752 bytes)
274 05:28:56.371700 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 05:28:56.382278 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
276 05:28:56.388352 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
277 05:28:56.395430 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
278 05:28:56.398234 Recovery requested (1009000e)
279 05:28:56.402235 TPM: Extending digest for VBOOT: boot mode into PCR 0
280 05:28:56.413367 tlcl_extend: response is 0
281 05:28:56.420517 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
282 05:28:56.429864 tlcl_extend: response is 0
283 05:28:56.436342 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
284 05:28:56.442749 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
285 05:28:56.449723 BS: verstage times (exec / console): total (unknown) / 142 ms
286 05:28:56.449804
287 05:28:56.449859
288 05:28:56.463188 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
289 05:28:56.466184 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
290 05:28:56.473768 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
291 05:28:56.476899 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
292 05:28:56.480588 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
293 05:28:56.487053 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
294 05:28:56.490483 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
295 05:28:56.493678 TCO_STS: 0000 0000
296 05:28:56.497049 GEN_PMCON: d0015038 00002200
297 05:28:56.500364 GBLRST_CAUSE: 00000000 00000000
298 05:28:56.500722 HPR_CAUSE0: 00000000
299 05:28:56.503725 prev_sleep_state 5
300 05:28:56.507259 Boot Count incremented to 4308
301 05:28:56.514048 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 05:28:56.520438 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 05:28:56.526953 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 05:28:56.533667 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
305 05:28:56.536920 Chrome EC: UHEPI supported
306 05:28:56.544040 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
307 05:28:56.556451 Probing TPM: done!
308 05:28:56.562916 Connected to device vid:did:rid of 1ae0:0028:00
309 05:28:56.573011 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
310 05:28:56.576748 Initialized TPM device CR50 revision 0
311 05:28:56.591122 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
312 05:28:56.597967 MRC: Hash idx 0x100b comparison successful.
313 05:28:56.601153 MRC cache found, size faa8
314 05:28:56.601510 bootmode is set to: 2
315 05:28:56.604654 SPD index = 2
316 05:28:56.611580 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
317 05:28:56.614612 SPD: module type is LPDDR4X
318 05:28:56.617810 SPD: module part number is MT53D1G64D4NW-046
319 05:28:56.624630 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
320 05:28:56.628278 SPD: device width 16 bits, bus width 16 bits
321 05:28:56.634426 SPD: module size is 2048 MB (per channel)
322 05:28:57.064053 CBMEM:
323 05:28:57.067924 IMD: root @ 0x76fff000 254 entries.
324 05:28:57.071195 IMD: root @ 0x76ffec00 62 entries.
325 05:28:57.074500 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
326 05:28:57.081304 FMAP: area RW_VPD found @ f35000 (8192 bytes)
327 05:28:57.084157 External stage cache:
328 05:28:57.087380 IMD: root @ 0x7b3ff000 254 entries.
329 05:28:57.090614 IMD: root @ 0x7b3fec00 62 entries.
330 05:28:57.105230 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
331 05:28:57.111912 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
332 05:28:57.118724 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
333 05:28:57.133046 MRC: 'RECOVERY_MRC_CACHE' does not need update.
334 05:28:57.139216 cse_lite: Skip switching to RW in the recovery path
335 05:28:57.139619 8 DIMMs found
336 05:28:57.139915 SMM Memory Map
337 05:28:57.142700 SMRAM : 0x7b000000 0x800000
338 05:28:57.148967 Subregion 0: 0x7b000000 0x200000
339 05:28:57.152489 Subregion 1: 0x7b200000 0x200000
340 05:28:57.155869 Subregion 2: 0x7b400000 0x400000
341 05:28:57.156231 top_of_ram = 0x77000000
342 05:28:57.162219 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
343 05:28:57.169172 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
344 05:28:57.172050 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
345 05:28:57.179507 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 05:28:57.185794 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
347 05:28:57.192729 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
348 05:28:57.202423 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
349 05:28:57.206000 Processing 211 relocs. Offset value of 0x74c0b000
350 05:28:57.215124 BS: romstage times (exec / console): total (unknown) / 276 ms
351 05:28:57.220775
352 05:28:57.221170
353 05:28:57.229370 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
354 05:28:57.235467 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
355 05:28:57.242489 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
356 05:28:57.249327 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
357 05:28:57.259457 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
358 05:28:57.262477 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
359 05:28:57.307999 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
360 05:28:57.314528 Processing 5008 relocs. Offset value of 0x75d98000
361 05:28:57.318102 BS: postcar times (exec / console): total (unknown) / 59 ms
362 05:28:57.321228
363 05:28:57.321586
364 05:28:57.331322 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
365 05:28:57.331833 Normal boot
366 05:28:57.335064 FW_CONFIG value is 0x804c02
367 05:28:57.337807 PCI: 00:07.0 disabled by fw_config
368 05:28:57.341523 PCI: 00:07.1 disabled by fw_config
369 05:28:57.345188 PCI: 00:0d.2 disabled by fw_config
370 05:28:57.348219 PCI: 00:1c.7 disabled by fw_config
371 05:28:57.354888 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 05:28:57.360984 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 05:28:57.364215 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
374 05:28:57.367636 GENERIC: 0.0 disabled by fw_config
375 05:28:57.374358 GENERIC: 1.0 disabled by fw_config
376 05:28:57.378349 fw_config match found: DB_USB=USB3_ACTIVE
377 05:28:57.381162 fw_config match found: DB_USB=USB3_ACTIVE
378 05:28:57.384443 fw_config match found: DB_USB=USB3_ACTIVE
379 05:28:57.391277 fw_config match found: DB_USB=USB3_ACTIVE
380 05:28:57.394497 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
381 05:28:57.401577 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
382 05:28:57.410801 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
383 05:28:57.418144 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
384 05:28:57.421502 microcode: sig=0x806c1 pf=0x80 revision=0x86
385 05:28:57.428789 microcode: Update skipped, already up-to-date
386 05:28:57.434401 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
387 05:28:57.461843 Detected 4 core, 8 thread CPU.
388 05:28:57.464821 Setting up SMI for CPU
389 05:28:57.468215 IED base = 0x7b400000
390 05:28:57.468666 IED size = 0x00400000
391 05:28:57.471671 Will perform SMM setup.
392 05:28:57.478265 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
393 05:28:57.485332 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
394 05:28:57.491581 Processing 16 relocs. Offset value of 0x00030000
395 05:28:57.494934 Attempting to start 7 APs
396 05:28:57.498067 Waiting for 10ms after sending INIT.
397 05:28:57.513602 Waiting for 1st SIPI to complete...done.
398 05:28:57.514058 AP: slot 6 apic_id 4.
399 05:28:57.516922 AP: slot 2 apic_id 5.
400 05:28:57.520232 AP: slot 7 apic_id 2.
401 05:28:57.520605 AP: slot 3 apic_id 3.
402 05:28:57.523462 AP: slot 5 apic_id 6.
403 05:28:57.527052 AP: slot 4 apic_id 7.
404 05:28:57.527563 AP: slot 1 apic_id 1.
405 05:28:57.533563 Waiting for 2nd SIPI to complete...done.
406 05:28:57.539894 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
407 05:28:57.546713 Processing 13 relocs. Offset value of 0x00038000
408 05:28:57.547079 Unable to locate Global NVS
409 05:28:57.557271 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
410 05:28:57.560465 Installing permanent SMM handler to 0x7b000000
411 05:28:57.569915 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
412 05:28:57.573408 Processing 794 relocs. Offset value of 0x7b010000
413 05:28:57.580043 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
414 05:28:57.586512 Processing 13 relocs. Offset value of 0x7b008000
415 05:28:57.593965 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
416 05:28:57.600524 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
417 05:28:57.603573 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
418 05:28:57.610074 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
419 05:28:57.616600 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
420 05:28:57.623273 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
421 05:28:57.626829 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
422 05:28:57.630163 Unable to locate Global NVS
423 05:28:57.636373 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
424 05:28:57.641073 Clearing SMI status registers
425 05:28:57.644549 SMI_STS: PM1
426 05:28:57.644633 PM1_STS: PWRBTN
427 05:28:57.654276 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
428 05:28:57.654642 In relocation handler: CPU 0
429 05:28:57.661257 New SMBASE=0x7b000000 IEDBASE=0x7b400000
430 05:28:57.664210 Writing SMRR. base = 0x7b000006, mask=0xff800c00
431 05:28:57.667634 Relocation complete.
432 05:28:57.674845 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
433 05:28:57.677947 In relocation handler: CPU 1
434 05:28:57.681243 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
435 05:28:57.684586 Relocation complete.
436 05:28:57.691467 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
437 05:28:57.695295 In relocation handler: CPU 3
438 05:28:57.698055 New SMBASE=0x7afff400 IEDBASE=0x7b400000
439 05:28:57.701452 Relocation complete.
440 05:28:57.708244 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
441 05:28:57.711689 In relocation handler: CPU 7
442 05:28:57.714926 New SMBASE=0x7affe400 IEDBASE=0x7b400000
443 05:28:57.718101 Writing SMRR. base = 0x7b000006, mask=0xff800c00
444 05:28:57.721362 Relocation complete.
445 05:28:57.728399 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
446 05:28:57.731560 In relocation handler: CPU 6
447 05:28:57.734782 New SMBASE=0x7affe800 IEDBASE=0x7b400000
448 05:28:57.741334 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 05:28:57.744536 Relocation complete.
450 05:28:57.751262 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
451 05:28:57.754522 In relocation handler: CPU 2
452 05:28:57.757637 New SMBASE=0x7afff800 IEDBASE=0x7b400000
453 05:28:57.758072 Relocation complete.
454 05:28:57.767667 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
455 05:28:57.771249 In relocation handler: CPU 5
456 05:28:57.774442 New SMBASE=0x7affec00 IEDBASE=0x7b400000
457 05:28:57.777662 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 05:28:57.781229 Relocation complete.
459 05:28:57.787752 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
460 05:28:57.791117 In relocation handler: CPU 4
461 05:28:57.794442 New SMBASE=0x7afff000 IEDBASE=0x7b400000
462 05:28:57.797978 Relocation complete.
463 05:28:57.798333 Initializing CPU #0
464 05:28:57.801326 CPU: vendor Intel device 806c1
465 05:28:57.807923 CPU: family 06, model 8c, stepping 01
466 05:28:57.808417 Clearing out pending MCEs
467 05:28:57.811261 Setting up local APIC...
468 05:28:57.815046 apic_id: 0x00 done.
469 05:28:57.818229 Turbo is available but hidden
470 05:28:57.821736 Turbo is available and visible
471 05:28:57.825024 microcode: Update skipped, already up-to-date
472 05:28:57.827714 CPU #0 initialized
473 05:28:57.828055 Initializing CPU #5
474 05:28:57.831179 Initializing CPU #4
475 05:28:57.834797 CPU: vendor Intel device 806c1
476 05:28:57.838171 CPU: family 06, model 8c, stepping 01
477 05:28:57.841550 CPU: vendor Intel device 806c1
478 05:28:57.844763 CPU: family 06, model 8c, stepping 01
479 05:28:57.847809 Clearing out pending MCEs
480 05:28:57.851132 Clearing out pending MCEs
481 05:28:57.851454 Setting up local APIC...
482 05:28:57.854740 Initializing CPU #6
483 05:28:57.858413 Initializing CPU #2
484 05:28:57.861569 CPU: vendor Intel device 806c1
485 05:28:57.864642 CPU: family 06, model 8c, stepping 01
486 05:28:57.868040 CPU: vendor Intel device 806c1
487 05:28:57.871261 CPU: family 06, model 8c, stepping 01
488 05:28:57.874873 Clearing out pending MCEs
489 05:28:57.875329 Clearing out pending MCEs
490 05:28:57.878069 Setting up local APIC...
491 05:28:57.881380 apic_id: 0x06 done.
492 05:28:57.884709 Setting up local APIC...
493 05:28:57.885125 apic_id: 0x04 done.
494 05:28:57.888045 Setting up local APIC...
495 05:28:57.892311 Initializing CPU #7
496 05:28:57.892750 Initializing CPU #3
497 05:28:57.895823 CPU: vendor Intel device 806c1
498 05:28:57.899253 CPU: family 06, model 8c, stepping 01
499 05:28:57.902212 microcode: Update skipped, already up-to-date
500 05:28:57.905651 CPU: vendor Intel device 806c1
501 05:28:57.909272 CPU: family 06, model 8c, stepping 01
502 05:28:57.912701 Clearing out pending MCEs
503 05:28:57.919145 microcode: Update skipped, already up-to-date
504 05:28:57.919512 apic_id: 0x07 done.
505 05:28:57.922701 CPU #5 initialized
506 05:28:57.926035 microcode: Update skipped, already up-to-date
507 05:28:57.929211 CPU #6 initialized
508 05:28:57.929577 apic_id: 0x05 done.
509 05:28:57.932647 Initializing CPU #1
510 05:28:57.935938 CPU #4 initialized
511 05:28:57.936282 CPU: vendor Intel device 806c1
512 05:28:57.942570 CPU: family 06, model 8c, stepping 01
513 05:28:57.943016 Clearing out pending MCEs
514 05:28:57.949586 microcode: Update skipped, already up-to-date
515 05:28:57.952665 Clearing out pending MCEs
516 05:28:57.953054 Setting up local APIC...
517 05:28:57.956063 Setting up local APIC...
518 05:28:57.959713 apic_id: 0x02 done.
519 05:28:57.962944 Setting up local APIC...
520 05:28:57.963392 apic_id: 0x01 done.
521 05:28:57.965726 CPU #2 initialized
522 05:28:57.969229 microcode: Update skipped, already up-to-date
523 05:28:57.972775 apic_id: 0x03 done.
524 05:28:57.973128 CPU #7 initialized
525 05:28:57.979289 microcode: Update skipped, already up-to-date
526 05:28:57.982523 microcode: Update skipped, already up-to-date
527 05:28:57.985953 CPU #3 initialized
528 05:28:57.986341 CPU #1 initialized
529 05:28:57.989533 bsp_do_flight_plan done after 454 msecs.
530 05:28:57.992884 CPU: frequency set to 4400 MHz
531 05:28:57.996126 Enabling SMIs.
532 05:28:58.002497 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
533 05:28:58.018178 SATAXPCIE1 indicates PCIe NVMe is present
534 05:28:58.021447 Probing TPM: done!
535 05:28:58.024912 Connected to device vid:did:rid of 1ae0:0028:00
536 05:28:58.035059 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
537 05:28:58.038506 Initialized TPM device CR50 revision 0
538 05:28:58.041747 Enabling S0i3.4
539 05:28:58.048929 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
540 05:28:58.052872 Found a VBT of 8704 bytes after decompression
541 05:28:58.058522 cse_lite: CSE RO boot. HybridStorageMode disabled
542 05:28:58.065974 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
543 05:28:58.139959 FSPS returned 0
544 05:28:58.143163 Executing Phase 1 of FspMultiPhaseSiInit
545 05:28:58.153757 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
546 05:28:58.156614 port C0 DISC req: usage 1 usb3 1 usb2 5
547 05:28:58.159610 Raw Buffer output 0 00000511
548 05:28:58.162924 Raw Buffer output 1 00000000
549 05:28:58.166731 pmc_send_ipc_cmd succeeded
550 05:28:58.170287 port C1 DISC req: usage 1 usb3 2 usb2 3
551 05:28:58.173536 Raw Buffer output 0 00000321
552 05:28:58.177401 Raw Buffer output 1 00000000
553 05:28:58.181075 pmc_send_ipc_cmd succeeded
554 05:28:58.186405 Detected 4 core, 8 thread CPU.
555 05:28:58.189659 Detected 4 core, 8 thread CPU.
556 05:28:58.390166 Display FSP Version Info HOB
557 05:28:58.393949 Reference Code - CPU = a.0.4c.31
558 05:28:58.397087 uCode Version = 0.0.0.86
559 05:28:58.400143 TXT ACM version = ff.ff.ff.ffff
560 05:28:58.403594 Reference Code - ME = a.0.4c.31
561 05:28:58.406870 MEBx version = 0.0.0.0
562 05:28:58.410260 ME Firmware Version = Consumer SKU
563 05:28:58.413375 Reference Code - PCH = a.0.4c.31
564 05:28:58.416605 PCH-CRID Status = Disabled
565 05:28:58.419852 PCH-CRID Original Value = ff.ff.ff.ffff
566 05:28:58.423277 PCH-CRID New Value = ff.ff.ff.ffff
567 05:28:58.426357 OPROM - RST - RAID = ff.ff.ff.ffff
568 05:28:58.430128 PCH Hsio Version = 4.0.0.0
569 05:28:58.433455 Reference Code - SA - System Agent = a.0.4c.31
570 05:28:58.436643 Reference Code - MRC = 2.0.0.1
571 05:28:58.439952 SA - PCIe Version = a.0.4c.31
572 05:28:58.443507 SA-CRID Status = Disabled
573 05:28:58.447530 SA-CRID Original Value = 0.0.0.1
574 05:28:58.450178 SA-CRID New Value = 0.0.0.1
575 05:28:58.453268 OPROM - VBIOS = ff.ff.ff.ffff
576 05:28:58.456662 IO Manageability Engine FW Version = 11.1.4.0
577 05:28:58.459839 PHY Build Version = 0.0.0.e0
578 05:28:58.463321 Thunderbolt(TM) FW Version = 0.0.0.0
579 05:28:58.470694 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
580 05:28:58.471120 ITSS IRQ Polarities Before:
581 05:28:58.475256 IPC0: 0xffffffff
582 05:28:58.475608 IPC1: 0xffffffff
583 05:28:58.478022 IPC2: 0xffffffff
584 05:28:58.478098 IPC3: 0xffffffff
585 05:28:58.481328 ITSS IRQ Polarities After:
586 05:28:58.484662 IPC0: 0xffffffff
587 05:28:58.485012 IPC1: 0xffffffff
588 05:28:58.487790 IPC2: 0xffffffff
589 05:28:58.488233 IPC3: 0xffffffff
590 05:28:58.494678 Found PCIe Root Port #9 at PCI: 00:1d.0.
591 05:28:58.504885 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
592 05:28:58.518155 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
593 05:28:58.528188 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
594 05:28:58.534489 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
595 05:28:58.538007 Enumerating buses...
596 05:28:58.540829 Show all devs... Before device enumeration.
597 05:28:58.544374 Root Device: enabled 1
598 05:28:58.547495 DOMAIN: 0000: enabled 1
599 05:28:58.550673 CPU_CLUSTER: 0: enabled 1
600 05:28:58.550751 PCI: 00:00.0: enabled 1
601 05:28:58.553989 PCI: 00:02.0: enabled 1
602 05:28:58.557372 PCI: 00:04.0: enabled 1
603 05:28:58.557459 PCI: 00:05.0: enabled 1
604 05:28:58.560761 PCI: 00:06.0: enabled 0
605 05:28:58.564219 PCI: 00:07.0: enabled 0
606 05:28:58.567669 PCI: 00:07.1: enabled 0
607 05:28:58.567747 PCI: 00:07.2: enabled 0
608 05:28:58.570925 PCI: 00:07.3: enabled 0
609 05:28:58.574769 PCI: 00:08.0: enabled 1
610 05:28:58.577773 PCI: 00:09.0: enabled 0
611 05:28:58.578197 PCI: 00:0a.0: enabled 0
612 05:28:58.581055 PCI: 00:0d.0: enabled 1
613 05:28:58.584841 PCI: 00:0d.1: enabled 0
614 05:28:58.587527 PCI: 00:0d.2: enabled 0
615 05:28:58.587910 PCI: 00:0d.3: enabled 0
616 05:28:58.591018 PCI: 00:0e.0: enabled 0
617 05:28:58.594582 PCI: 00:10.2: enabled 1
618 05:28:58.598242 PCI: 00:10.6: enabled 0
619 05:28:58.598610 PCI: 00:10.7: enabled 0
620 05:28:58.600550 PCI: 00:12.0: enabled 0
621 05:28:58.603965 PCI: 00:12.6: enabled 0
622 05:28:58.604031 PCI: 00:13.0: enabled 0
623 05:28:58.607393 PCI: 00:14.0: enabled 1
624 05:28:58.610728 PCI: 00:14.1: enabled 0
625 05:28:58.614103 PCI: 00:14.2: enabled 1
626 05:28:58.614164 PCI: 00:14.3: enabled 1
627 05:28:58.617193 PCI: 00:15.0: enabled 1
628 05:28:58.620624 PCI: 00:15.1: enabled 1
629 05:28:58.624036 PCI: 00:15.2: enabled 1
630 05:28:58.624109 PCI: 00:15.3: enabled 1
631 05:28:58.627091 PCI: 00:16.0: enabled 1
632 05:28:58.630568 PCI: 00:16.1: enabled 0
633 05:28:58.633949 PCI: 00:16.2: enabled 0
634 05:28:58.634029 PCI: 00:16.3: enabled 0
635 05:28:58.637737 PCI: 00:16.4: enabled 0
636 05:28:58.640536 PCI: 00:16.5: enabled 0
637 05:28:58.640814 PCI: 00:17.0: enabled 1
638 05:28:58.644502 PCI: 00:19.0: enabled 0
639 05:28:58.647579 PCI: 00:19.1: enabled 1
640 05:28:58.650992 PCI: 00:19.2: enabled 0
641 05:28:58.651082 PCI: 00:1c.0: enabled 1
642 05:28:58.654275 PCI: 00:1c.1: enabled 0
643 05:28:58.657516 PCI: 00:1c.2: enabled 0
644 05:28:58.661241 PCI: 00:1c.3: enabled 0
645 05:28:58.661652 PCI: 00:1c.4: enabled 0
646 05:28:58.664136 PCI: 00:1c.5: enabled 0
647 05:28:58.667543 PCI: 00:1c.6: enabled 1
648 05:28:58.667955 PCI: 00:1c.7: enabled 0
649 05:28:58.670743 PCI: 00:1d.0: enabled 1
650 05:28:58.674209 PCI: 00:1d.1: enabled 0
651 05:28:58.678062 PCI: 00:1d.2: enabled 1
652 05:28:58.678531 PCI: 00:1d.3: enabled 0
653 05:28:58.681453 PCI: 00:1e.0: enabled 1
654 05:28:58.684612 PCI: 00:1e.1: enabled 0
655 05:28:58.687540 PCI: 00:1e.2: enabled 1
656 05:28:58.687617 PCI: 00:1e.3: enabled 1
657 05:28:58.690940 PCI: 00:1f.0: enabled 1
658 05:28:58.694223 PCI: 00:1f.1: enabled 0
659 05:28:58.694300 PCI: 00:1f.2: enabled 1
660 05:28:58.697744 PCI: 00:1f.3: enabled 1
661 05:28:58.701185 PCI: 00:1f.4: enabled 0
662 05:28:58.704297 PCI: 00:1f.5: enabled 1
663 05:28:58.704372 PCI: 00:1f.6: enabled 0
664 05:28:58.707611 PCI: 00:1f.7: enabled 0
665 05:28:58.711105 APIC: 00: enabled 1
666 05:28:58.714300 GENERIC: 0.0: enabled 1
667 05:28:58.714760 GENERIC: 0.0: enabled 1
668 05:28:58.717639 GENERIC: 1.0: enabled 1
669 05:28:58.721320 GENERIC: 0.0: enabled 1
670 05:28:58.721674 GENERIC: 1.0: enabled 1
671 05:28:58.724308 USB0 port 0: enabled 1
672 05:28:58.727470 GENERIC: 0.0: enabled 1
673 05:28:58.730992 USB0 port 0: enabled 1
674 05:28:58.731443 GENERIC: 0.0: enabled 1
675 05:28:58.734405 I2C: 00:1a: enabled 1
676 05:28:58.737539 I2C: 00:31: enabled 1
677 05:28:58.737890 I2C: 00:32: enabled 1
678 05:28:58.740676 I2C: 00:10: enabled 1
679 05:28:58.744050 I2C: 00:15: enabled 1
680 05:28:58.744141 GENERIC: 0.0: enabled 0
681 05:28:58.748200 GENERIC: 1.0: enabled 0
682 05:28:58.750745 GENERIC: 0.0: enabled 1
683 05:28:58.754222 SPI: 00: enabled 1
684 05:28:58.754504 SPI: 00: enabled 1
685 05:28:58.757896 PNP: 0c09.0: enabled 1
686 05:28:58.761070 GENERIC: 0.0: enabled 1
687 05:28:58.761432 USB3 port 0: enabled 1
688 05:28:58.764400 USB3 port 1: enabled 1
689 05:28:58.767321 USB3 port 2: enabled 0
690 05:28:58.767396 USB3 port 3: enabled 0
691 05:28:58.771577 USB2 port 0: enabled 0
692 05:28:58.774046 USB2 port 1: enabled 1
693 05:28:58.774455 USB2 port 2: enabled 1
694 05:28:58.777517 USB2 port 3: enabled 0
695 05:28:58.780995 USB2 port 4: enabled 1
696 05:28:58.784050 USB2 port 5: enabled 0
697 05:28:58.784127 USB2 port 6: enabled 0
698 05:28:58.787382 USB2 port 7: enabled 0
699 05:28:58.790710 USB2 port 8: enabled 0
700 05:28:58.790880 USB2 port 9: enabled 0
701 05:28:58.794426 USB3 port 0: enabled 0
702 05:28:58.797661 USB3 port 1: enabled 1
703 05:28:58.801035 USB3 port 2: enabled 0
704 05:28:58.801478 USB3 port 3: enabled 0
705 05:28:58.803989 GENERIC: 0.0: enabled 1
706 05:28:58.807391 GENERIC: 1.0: enabled 1
707 05:28:58.807748 APIC: 01: enabled 1
708 05:28:58.810868 APIC: 05: enabled 1
709 05:28:58.814382 APIC: 03: enabled 1
710 05:28:58.814764 APIC: 07: enabled 1
711 05:28:58.817238 APIC: 06: enabled 1
712 05:28:58.817589 APIC: 04: enabled 1
713 05:28:58.820354 APIC: 02: enabled 1
714 05:28:58.823589 Compare with tree...
715 05:28:58.823667 Root Device: enabled 1
716 05:28:58.827019 DOMAIN: 0000: enabled 1
717 05:28:58.831082 PCI: 00:00.0: enabled 1
718 05:28:58.834434 PCI: 00:02.0: enabled 1
719 05:28:58.834900 PCI: 00:04.0: enabled 1
720 05:28:58.837700 GENERIC: 0.0: enabled 1
721 05:28:58.840367 PCI: 00:05.0: enabled 1
722 05:28:58.844158 PCI: 00:06.0: enabled 0
723 05:28:58.847267 PCI: 00:07.0: enabled 0
724 05:28:58.851030 GENERIC: 0.0: enabled 1
725 05:28:58.851491 PCI: 00:07.1: enabled 0
726 05:28:58.853818 GENERIC: 1.0: enabled 1
727 05:28:58.857452 PCI: 00:07.2: enabled 0
728 05:28:58.860639 GENERIC: 0.0: enabled 1
729 05:28:58.863829 PCI: 00:07.3: enabled 0
730 05:28:58.864156 GENERIC: 1.0: enabled 1
731 05:28:58.867296 PCI: 00:08.0: enabled 1
732 05:28:58.870675 PCI: 00:09.0: enabled 0
733 05:28:58.874182 PCI: 00:0a.0: enabled 0
734 05:28:58.877531 PCI: 00:0d.0: enabled 1
735 05:28:58.877885 USB0 port 0: enabled 1
736 05:28:58.880773 USB3 port 0: enabled 1
737 05:28:58.884463 USB3 port 1: enabled 1
738 05:28:58.887347 USB3 port 2: enabled 0
739 05:28:58.890503 USB3 port 3: enabled 0
740 05:28:58.890865 PCI: 00:0d.1: enabled 0
741 05:28:58.894112 PCI: 00:0d.2: enabled 0
742 05:28:58.897257 GENERIC: 0.0: enabled 1
743 05:28:58.900461 PCI: 00:0d.3: enabled 0
744 05:28:58.903839 PCI: 00:0e.0: enabled 0
745 05:28:58.904194 PCI: 00:10.2: enabled 1
746 05:28:58.907384 PCI: 00:10.6: enabled 0
747 05:28:58.911020 PCI: 00:10.7: enabled 0
748 05:28:58.914071 PCI: 00:12.0: enabled 0
749 05:28:58.917321 PCI: 00:12.6: enabled 0
750 05:28:58.917399 PCI: 00:13.0: enabled 0
751 05:28:58.920833 PCI: 00:14.0: enabled 1
752 05:28:58.924024 USB0 port 0: enabled 1
753 05:28:58.927348 USB2 port 0: enabled 0
754 05:28:58.930682 USB2 port 1: enabled 1
755 05:28:58.931116 USB2 port 2: enabled 1
756 05:28:58.934041 USB2 port 3: enabled 0
757 05:28:58.937769 USB2 port 4: enabled 1
758 05:28:58.940462 USB2 port 5: enabled 0
759 05:28:58.944062 USB2 port 6: enabled 0
760 05:28:58.944414 USB2 port 7: enabled 0
761 05:28:58.947122 USB2 port 8: enabled 0
762 05:28:58.950777 USB2 port 9: enabled 0
763 05:28:58.954024 USB3 port 0: enabled 0
764 05:28:58.956956 USB3 port 1: enabled 1
765 05:28:58.960710 USB3 port 2: enabled 0
766 05:28:58.960789 USB3 port 3: enabled 0
767 05:28:58.963746 PCI: 00:14.1: enabled 0
768 05:28:58.967456 PCI: 00:14.2: enabled 1
769 05:28:58.970850 PCI: 00:14.3: enabled 1
770 05:28:58.973925 GENERIC: 0.0: enabled 1
771 05:28:58.974320 PCI: 00:15.0: enabled 1
772 05:28:58.977538 I2C: 00:1a: enabled 1
773 05:28:58.980459 I2C: 00:31: enabled 1
774 05:28:58.984123 I2C: 00:32: enabled 1
775 05:28:58.984480 PCI: 00:15.1: enabled 1
776 05:28:58.987253 I2C: 00:10: enabled 1
777 05:28:58.990706 PCI: 00:15.2: enabled 1
778 05:28:58.994924 PCI: 00:15.3: enabled 1
779 05:28:58.997348 PCI: 00:16.0: enabled 1
780 05:28:58.997721 PCI: 00:16.1: enabled 0
781 05:28:59.000524 PCI: 00:16.2: enabled 0
782 05:28:59.004091 PCI: 00:16.3: enabled 0
783 05:28:59.007298 PCI: 00:16.4: enabled 0
784 05:28:59.010355 PCI: 00:16.5: enabled 0
785 05:28:59.010445 PCI: 00:17.0: enabled 1
786 05:28:59.014097 PCI: 00:19.0: enabled 0
787 05:28:59.017404 PCI: 00:19.1: enabled 1
788 05:28:59.020571 I2C: 00:15: enabled 1
789 05:28:59.020921 PCI: 00:19.2: enabled 0
790 05:28:59.023617 PCI: 00:1d.0: enabled 1
791 05:28:59.027097 GENERIC: 0.0: enabled 1
792 05:28:59.030130 PCI: 00:1e.0: enabled 1
793 05:28:59.033673 PCI: 00:1e.1: enabled 0
794 05:28:59.033747 PCI: 00:1e.2: enabled 1
795 05:28:59.036859 SPI: 00: enabled 1
796 05:28:59.040414 PCI: 00:1e.3: enabled 1
797 05:28:59.043389 SPI: 00: enabled 1
798 05:28:59.043482 PCI: 00:1f.0: enabled 1
799 05:28:59.046982 PNP: 0c09.0: enabled 1
800 05:28:59.050222 PCI: 00:1f.1: enabled 0
801 05:28:59.053840 PCI: 00:1f.2: enabled 1
802 05:28:59.057066 GENERIC: 0.0: enabled 1
803 05:28:59.057420 GENERIC: 0.0: enabled 1
804 05:28:59.060376 GENERIC: 1.0: enabled 1
805 05:28:59.063694 PCI: 00:1f.3: enabled 1
806 05:28:59.067432 PCI: 00:1f.4: enabled 0
807 05:28:59.070291 PCI: 00:1f.5: enabled 1
808 05:28:59.070663 PCI: 00:1f.6: enabled 0
809 05:28:59.073903 PCI: 00:1f.7: enabled 0
810 05:28:59.077200 CPU_CLUSTER: 0: enabled 1
811 05:28:59.080240 APIC: 00: enabled 1
812 05:28:59.080591 APIC: 01: enabled 1
813 05:28:59.083561 APIC: 05: enabled 1
814 05:28:59.086743 APIC: 03: enabled 1
815 05:28:59.086820 APIC: 07: enabled 1
816 05:28:59.090135 APIC: 06: enabled 1
817 05:28:59.142240 APIC: 04: enabled 1
818 05:28:59.142776 APIC: 02: enabled 1
819 05:28:59.143063 Root Device scanning...
820 05:28:59.143620 scan_static_bus for Root Device
821 05:28:59.143940 DOMAIN: 0000 enabled
822 05:28:59.144181 CPU_CLUSTER: 0 enabled
823 05:28:59.144407 DOMAIN: 0000 scanning...
824 05:28:59.144629 PCI: pci_scan_bus for bus 00
825 05:28:59.144857 PCI: 00:00.0 [8086/0000] ops
826 05:28:59.145083 PCI: 00:00.0 [8086/9a12] enabled
827 05:28:59.145307 PCI: 00:02.0 [8086/0000] bus ops
828 05:28:59.145533 PCI: 00:02.0 [8086/9a40] enabled
829 05:28:59.145754 PCI: 00:04.0 [8086/0000] bus ops
830 05:28:59.145976 PCI: 00:04.0 [8086/9a03] enabled
831 05:28:59.146195 PCI: 00:05.0 [8086/9a19] enabled
832 05:28:59.146459 PCI: 00:07.0 [0000/0000] hidden
833 05:28:59.146696 PCI: 00:08.0 [8086/9a11] enabled
834 05:28:59.192622 PCI: 00:0a.0 [8086/9a0d] disabled
835 05:28:59.193128 PCI: 00:0d.0 [8086/0000] bus ops
836 05:28:59.193393 PCI: 00:0d.0 [8086/9a13] enabled
837 05:28:59.193612 PCI: 00:14.0 [8086/0000] bus ops
838 05:28:59.194105 PCI: 00:14.0 [8086/a0ed] enabled
839 05:28:59.194343 PCI: 00:14.2 [8086/a0ef] enabled
840 05:28:59.194553 PCI: 00:14.3 [8086/0000] bus ops
841 05:28:59.194761 PCI: 00:14.3 [8086/a0f0] enabled
842 05:28:59.194978 PCI: 00:15.0 [8086/0000] bus ops
843 05:28:59.195250 PCI: 00:15.0 [8086/a0e8] enabled
844 05:28:59.195468 PCI: 00:15.1 [8086/0000] bus ops
845 05:28:59.195673 PCI: 00:15.1 [8086/a0e9] enabled
846 05:28:59.195924 PCI: 00:15.2 [8086/0000] bus ops
847 05:28:59.196138 PCI: 00:15.2 [8086/a0ea] enabled
848 05:28:59.196342 PCI: 00:15.3 [8086/0000] bus ops
849 05:28:59.205242 PCI: 00:15.3 [8086/a0eb] enabled
850 05:28:59.205933 PCI: 00:16.0 [8086/0000] ops
851 05:28:59.206387 PCI: 00:16.0 [8086/a0e0] enabled
852 05:28:59.208546 PCI: Static device PCI: 00:17.0 not found, disabling it.
853 05:28:59.211838 PCI: 00:19.0 [8086/0000] bus ops
854 05:28:59.215001 PCI: 00:19.0 [8086/a0c5] disabled
855 05:28:59.218156 PCI: 00:19.1 [8086/0000] bus ops
856 05:28:59.221400 PCI: 00:19.1 [8086/a0c6] enabled
857 05:28:59.225078 PCI: 00:1d.0 [8086/0000] bus ops
858 05:28:59.228473 PCI: 00:1d.0 [8086/a0b0] enabled
859 05:28:59.231502 PCI: 00:1e.0 [8086/0000] ops
860 05:28:59.235262 PCI: 00:1e.0 [8086/a0a8] enabled
861 05:28:59.238797 PCI: 00:1e.2 [8086/0000] bus ops
862 05:28:59.241751 PCI: 00:1e.2 [8086/a0aa] enabled
863 05:28:59.245200 PCI: 00:1e.3 [8086/0000] bus ops
864 05:28:59.248278 PCI: 00:1e.3 [8086/a0ab] enabled
865 05:28:59.251564 PCI: 00:1f.0 [8086/0000] bus ops
866 05:28:59.254979 PCI: 00:1f.0 [8086/a087] enabled
867 05:28:59.255298 RTC Init
868 05:28:59.258337 Set power on after power failure.
869 05:28:59.262582 Disabling Deep S3
870 05:28:59.263049 Disabling Deep S3
871 05:28:59.265183 Disabling Deep S4
872 05:28:59.265572 Disabling Deep S4
873 05:28:59.268290 Disabling Deep S5
874 05:28:59.268601 Disabling Deep S5
875 05:28:59.271470 PCI: 00:1f.2 [0000/0000] hidden
876 05:28:59.275114 PCI: 00:1f.3 [8086/0000] bus ops
877 05:28:59.278345 PCI: 00:1f.3 [8086/a0c8] enabled
878 05:28:59.282167 PCI: 00:1f.5 [8086/0000] bus ops
879 05:28:59.285559 PCI: 00:1f.5 [8086/a0a4] enabled
880 05:28:59.288399 PCI: Leftover static devices:
881 05:28:59.292077 PCI: 00:10.2
882 05:28:59.292532 PCI: 00:10.6
883 05:28:59.295375 PCI: 00:10.7
884 05:28:59.295697 PCI: 00:06.0
885 05:28:59.295974 PCI: 00:07.1
886 05:28:59.298315 PCI: 00:07.2
887 05:28:59.298588 PCI: 00:07.3
888 05:28:59.302055 PCI: 00:09.0
889 05:28:59.302517 PCI: 00:0d.1
890 05:28:59.305135 PCI: 00:0d.2
891 05:28:59.305495 PCI: 00:0d.3
892 05:28:59.305746 PCI: 00:0e.0
893 05:28:59.308242 PCI: 00:12.0
894 05:28:59.308638 PCI: 00:12.6
895 05:28:59.311737 PCI: 00:13.0
896 05:28:59.312107 PCI: 00:14.1
897 05:28:59.312360 PCI: 00:16.1
898 05:28:59.315151 PCI: 00:16.2
899 05:28:59.315500 PCI: 00:16.3
900 05:28:59.317996 PCI: 00:16.4
901 05:28:59.318378 PCI: 00:16.5
902 05:28:59.318623 PCI: 00:17.0
903 05:28:59.321278 PCI: 00:19.2
904 05:28:59.321547 PCI: 00:1e.1
905 05:28:59.325116 PCI: 00:1f.1
906 05:28:59.325467 PCI: 00:1f.4
907 05:28:59.328423 PCI: 00:1f.6
908 05:28:59.328773 PCI: 00:1f.7
909 05:28:59.331390 PCI: Check your devicetree.cb.
910 05:28:59.334603 PCI: 00:02.0 scanning...
911 05:28:59.338312 scan_generic_bus for PCI: 00:02.0
912 05:28:59.341386 scan_generic_bus for PCI: 00:02.0 done
913 05:28:59.344910 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
914 05:28:59.348285 PCI: 00:04.0 scanning...
915 05:28:59.351406 scan_generic_bus for PCI: 00:04.0
916 05:28:59.354690 GENERIC: 0.0 enabled
917 05:28:59.361143 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
918 05:28:59.364597 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
919 05:28:59.367689 PCI: 00:0d.0 scanning...
920 05:28:59.371326 scan_static_bus for PCI: 00:0d.0
921 05:28:59.374701 USB0 port 0 enabled
922 05:28:59.374785 USB0 port 0 scanning...
923 05:28:59.377948 scan_static_bus for USB0 port 0
924 05:28:59.381790 USB3 port 0 enabled
925 05:28:59.385090 USB3 port 1 enabled
926 05:28:59.385561 USB3 port 2 disabled
927 05:28:59.388260 USB3 port 3 disabled
928 05:28:59.391740 USB3 port 0 scanning...
929 05:28:59.395362 scan_static_bus for USB3 port 0
930 05:28:59.398480 scan_static_bus for USB3 port 0 done
931 05:28:59.401931 scan_bus: bus USB3 port 0 finished in 6 msecs
932 05:28:59.405032 USB3 port 1 scanning...
933 05:28:59.408434 scan_static_bus for USB3 port 1
934 05:28:59.411430 scan_static_bus for USB3 port 1 done
935 05:28:59.415111 scan_bus: bus USB3 port 1 finished in 6 msecs
936 05:28:59.418412 scan_static_bus for USB0 port 0 done
937 05:28:59.424747 scan_bus: bus USB0 port 0 finished in 43 msecs
938 05:28:59.427899 scan_static_bus for PCI: 00:0d.0 done
939 05:28:59.431491 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
940 05:28:59.434922 PCI: 00:14.0 scanning...
941 05:28:59.438329 scan_static_bus for PCI: 00:14.0
942 05:28:59.441516 USB0 port 0 enabled
943 05:28:59.444855 USB0 port 0 scanning...
944 05:28:59.447830 scan_static_bus for USB0 port 0
945 05:28:59.447920 USB2 port 0 disabled
946 05:28:59.451145 USB2 port 1 enabled
947 05:28:59.454370 USB2 port 2 enabled
948 05:28:59.454444 USB2 port 3 disabled
949 05:28:59.457633 USB2 port 4 enabled
950 05:28:59.457722 USB2 port 5 disabled
951 05:28:59.461905 USB2 port 6 disabled
952 05:28:59.465843 USB2 port 7 disabled
953 05:28:59.466314 USB2 port 8 disabled
954 05:28:59.467829 USB2 port 9 disabled
955 05:28:59.471387 USB3 port 0 disabled
956 05:28:59.471739 USB3 port 1 enabled
957 05:28:59.474782 USB3 port 2 disabled
958 05:28:59.477683 USB3 port 3 disabled
959 05:28:59.477772 USB2 port 1 scanning...
960 05:28:59.480961 scan_static_bus for USB2 port 1
961 05:28:59.484185 scan_static_bus for USB2 port 1 done
962 05:28:59.490894 scan_bus: bus USB2 port 1 finished in 6 msecs
963 05:28:59.494299 USB2 port 2 scanning...
964 05:28:59.498039 scan_static_bus for USB2 port 2
965 05:28:59.501176 scan_static_bus for USB2 port 2 done
966 05:28:59.504417 scan_bus: bus USB2 port 2 finished in 6 msecs
967 05:28:59.507660 USB2 port 4 scanning...
968 05:28:59.510912 scan_static_bus for USB2 port 4
969 05:28:59.514879 scan_static_bus for USB2 port 4 done
970 05:28:59.517798 scan_bus: bus USB2 port 4 finished in 6 msecs
971 05:28:59.521530 USB3 port 1 scanning...
972 05:28:59.524742 scan_static_bus for USB3 port 1
973 05:28:59.527700 scan_static_bus for USB3 port 1 done
974 05:28:59.534598 scan_bus: bus USB3 port 1 finished in 6 msecs
975 05:28:59.538361 scan_static_bus for USB0 port 0 done
976 05:28:59.541056 scan_bus: bus USB0 port 0 finished in 93 msecs
977 05:28:59.545146 scan_static_bus for PCI: 00:14.0 done
978 05:28:59.551264 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
979 05:28:59.551689 PCI: 00:14.3 scanning...
980 05:28:59.554903 scan_static_bus for PCI: 00:14.3
981 05:28:59.558080 GENERIC: 0.0 enabled
982 05:28:59.561695 scan_static_bus for PCI: 00:14.3 done
983 05:28:59.568132 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
984 05:28:59.568479 PCI: 00:15.0 scanning...
985 05:28:59.571603 scan_static_bus for PCI: 00:15.0
986 05:28:59.575074 I2C: 00:1a enabled
987 05:28:59.578141 I2C: 00:31 enabled
988 05:28:59.578222 I2C: 00:32 enabled
989 05:28:59.581255 scan_static_bus for PCI: 00:15.0 done
990 05:28:59.588043 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
991 05:28:59.591562 PCI: 00:15.1 scanning...
992 05:28:59.595145 scan_static_bus for PCI: 00:15.1
993 05:28:59.595577 I2C: 00:10 enabled
994 05:28:59.598042 scan_static_bus for PCI: 00:15.1 done
995 05:28:59.605193 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
996 05:28:59.608054 PCI: 00:15.2 scanning...
997 05:28:59.611180 scan_static_bus for PCI: 00:15.2
998 05:28:59.614593 scan_static_bus for PCI: 00:15.2 done
999 05:28:59.618012 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1000 05:28:59.621019 PCI: 00:15.3 scanning...
1001 05:28:59.623959 scan_static_bus for PCI: 00:15.3
1002 05:28:59.627354 scan_static_bus for PCI: 00:15.3 done
1003 05:28:59.634357 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1004 05:28:59.634432 PCI: 00:19.1 scanning...
1005 05:28:59.637515 scan_static_bus for PCI: 00:19.1
1006 05:28:59.641392 I2C: 00:15 enabled
1007 05:28:59.644681 scan_static_bus for PCI: 00:19.1 done
1008 05:28:59.650999 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1009 05:28:59.651350 PCI: 00:1d.0 scanning...
1010 05:28:59.657240 do_pci_scan_bridge for PCI: 00:1d.0
1011 05:28:59.660777 PCI: pci_scan_bus for bus 01
1012 05:28:59.663876 PCI: 01:00.0 [15b7/5009] enabled
1013 05:28:59.664249 GENERIC: 0.0 enabled
1014 05:28:59.667456 Enabling Common Clock Configuration
1015 05:28:59.673897 L1 Sub-State supported from root port 29
1016 05:28:59.673976 L1 Sub-State Support = 0x5
1017 05:28:59.677138 CommonModeRestoreTime = 0x28
1018 05:28:59.684237 Power On Value = 0x16, Power On Scale = 0x0
1019 05:28:59.684620 ASPM: Enabled L1
1020 05:28:59.687328 PCIe: Max_Payload_Size adjusted to 128
1021 05:28:59.693831 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1022 05:28:59.697129 PCI: 00:1e.2 scanning...
1023 05:28:59.700228 scan_generic_bus for PCI: 00:1e.2
1024 05:28:59.700348 SPI: 00 enabled
1025 05:28:59.706953 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1026 05:28:59.709987 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1027 05:28:59.713558 PCI: 00:1e.3 scanning...
1028 05:28:59.717666 scan_generic_bus for PCI: 00:1e.3
1029 05:28:59.721424 SPI: 00 enabled
1030 05:28:59.724501 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1031 05:28:59.731458 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1032 05:28:59.735020 PCI: 00:1f.0 scanning...
1033 05:28:59.738063 scan_static_bus for PCI: 00:1f.0
1034 05:28:59.738554 PNP: 0c09.0 enabled
1035 05:28:59.741110 PNP: 0c09.0 scanning...
1036 05:28:59.744280 scan_static_bus for PNP: 0c09.0
1037 05:28:59.747416 scan_static_bus for PNP: 0c09.0 done
1038 05:28:59.754255 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1039 05:28:59.757703 scan_static_bus for PCI: 00:1f.0 done
1040 05:28:59.760753 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1041 05:28:59.764359 PCI: 00:1f.2 scanning...
1042 05:28:59.767530 scan_static_bus for PCI: 00:1f.2
1043 05:28:59.770992 GENERIC: 0.0 enabled
1044 05:28:59.771067 GENERIC: 0.0 scanning...
1045 05:28:59.774442 scan_static_bus for GENERIC: 0.0
1046 05:28:59.777773 GENERIC: 0.0 enabled
1047 05:28:59.781119 GENERIC: 1.0 enabled
1048 05:28:59.784253 scan_static_bus for GENERIC: 0.0 done
1049 05:28:59.788543 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1050 05:28:59.791099 scan_static_bus for PCI: 00:1f.2 done
1051 05:28:59.798241 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1052 05:28:59.801118 PCI: 00:1f.3 scanning...
1053 05:28:59.804550 scan_static_bus for PCI: 00:1f.3
1054 05:28:59.807637 scan_static_bus for PCI: 00:1f.3 done
1055 05:28:59.810630 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1056 05:28:59.814002 PCI: 00:1f.5 scanning...
1057 05:28:59.818194 scan_generic_bus for PCI: 00:1f.5
1058 05:28:59.820827 scan_generic_bus for PCI: 00:1f.5 done
1059 05:28:59.827518 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1060 05:28:59.831069 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1061 05:28:59.834144 scan_static_bus for Root Device done
1062 05:28:59.840845 scan_bus: bus Root Device finished in 735 msecs
1063 05:28:59.840925 done
1064 05:28:59.847722 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1065 05:28:59.851146 Chrome EC: UHEPI supported
1066 05:28:59.857449 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1067 05:28:59.864327 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1068 05:28:59.867426 SPI flash protection: WPSW=1 SRP0=0
1069 05:28:59.871243 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1070 05:28:59.877639 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1071 05:28:59.881092 found VGA at PCI: 00:02.0
1072 05:28:59.884504 Setting up VGA for PCI: 00:02.0
1073 05:28:59.887420 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1074 05:28:59.893966 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1075 05:28:59.894044 Allocating resources...
1076 05:28:59.897344 Reading resources...
1077 05:28:59.900981 Root Device read_resources bus 0 link: 0
1078 05:28:59.907623 DOMAIN: 0000 read_resources bus 0 link: 0
1079 05:28:59.910485 PCI: 00:04.0 read_resources bus 1 link: 0
1080 05:28:59.918034 PCI: 00:04.0 read_resources bus 1 link: 0 done
1081 05:28:59.920976 PCI: 00:0d.0 read_resources bus 0 link: 0
1082 05:28:59.923811 USB0 port 0 read_resources bus 0 link: 0
1083 05:28:59.931355 USB0 port 0 read_resources bus 0 link: 0 done
1084 05:28:59.934675 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1085 05:28:59.941079 PCI: 00:14.0 read_resources bus 0 link: 0
1086 05:28:59.944824 USB0 port 0 read_resources bus 0 link: 0
1087 05:28:59.951632 USB0 port 0 read_resources bus 0 link: 0 done
1088 05:28:59.954961 PCI: 00:14.0 read_resources bus 0 link: 0 done
1089 05:28:59.960974 PCI: 00:14.3 read_resources bus 0 link: 0
1090 05:28:59.964664 PCI: 00:14.3 read_resources bus 0 link: 0 done
1091 05:28:59.971130 PCI: 00:15.0 read_resources bus 0 link: 0
1092 05:28:59.974491 PCI: 00:15.0 read_resources bus 0 link: 0 done
1093 05:28:59.981559 PCI: 00:15.1 read_resources bus 0 link: 0
1094 05:28:59.984441 PCI: 00:15.1 read_resources bus 0 link: 0 done
1095 05:28:59.991245 PCI: 00:19.1 read_resources bus 0 link: 0
1096 05:28:59.994803 PCI: 00:19.1 read_resources bus 0 link: 0 done
1097 05:29:00.001401 PCI: 00:1d.0 read_resources bus 1 link: 0
1098 05:29:00.004666 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1099 05:29:00.011229 PCI: 00:1e.2 read_resources bus 2 link: 0
1100 05:29:00.014459 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1101 05:29:00.021081 PCI: 00:1e.3 read_resources bus 3 link: 0
1102 05:29:00.024463 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1103 05:29:00.031083 PCI: 00:1f.0 read_resources bus 0 link: 0
1104 05:29:00.034518 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1105 05:29:00.038422 PCI: 00:1f.2 read_resources bus 0 link: 0
1106 05:29:00.044430 GENERIC: 0.0 read_resources bus 0 link: 0
1107 05:29:00.048196 GENERIC: 0.0 read_resources bus 0 link: 0 done
1108 05:29:00.054696 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1109 05:29:00.061096 DOMAIN: 0000 read_resources bus 0 link: 0 done
1110 05:29:00.064719 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1111 05:29:00.070822 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1112 05:29:00.073898 Root Device read_resources bus 0 link: 0 done
1113 05:29:00.077954 Done reading resources.
1114 05:29:00.081121 Show resources in subtree (Root Device)...After reading.
1115 05:29:00.087826 Root Device child on link 0 DOMAIN: 0000
1116 05:29:00.090889 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1117 05:29:00.101043 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1118 05:29:00.110762 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1119 05:29:00.111168 PCI: 00:00.0
1120 05:29:00.120470 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1121 05:29:00.131130 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1122 05:29:00.140269 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1123 05:29:00.150055 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1124 05:29:00.159880 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1125 05:29:00.166916 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1126 05:29:00.177325 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1127 05:29:00.186629 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1128 05:29:00.196881 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1129 05:29:00.206584 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1130 05:29:00.216940 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1131 05:29:00.223065 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1132 05:29:00.232889 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1133 05:29:00.242749 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1134 05:29:00.253112 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1135 05:29:00.262832 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1136 05:29:00.272542 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1137 05:29:00.279758 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1138 05:29:00.289255 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1139 05:29:00.299567 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1140 05:29:00.303030 PCI: 00:02.0
1141 05:29:00.312728 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1142 05:29:00.322521 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1143 05:29:00.329173 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1144 05:29:00.335528 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1145 05:29:00.345526 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1146 05:29:00.345912 GENERIC: 0.0
1147 05:29:00.348947 PCI: 00:05.0
1148 05:29:00.359223 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1149 05:29:00.361963 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1150 05:29:00.365451 GENERIC: 0.0
1151 05:29:00.365805 PCI: 00:08.0
1152 05:29:00.375016 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1153 05:29:00.378671 PCI: 00:0a.0
1154 05:29:00.382132 PCI: 00:0d.0 child on link 0 USB0 port 0
1155 05:29:00.392336 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 05:29:00.398926 USB0 port 0 child on link 0 USB3 port 0
1157 05:29:00.399493 USB3 port 0
1158 05:29:00.401975 USB3 port 1
1159 05:29:00.402494 USB3 port 2
1160 05:29:00.405419 USB3 port 3
1161 05:29:00.408959 PCI: 00:14.0 child on link 0 USB0 port 0
1162 05:29:00.418222 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 05:29:00.421855 USB0 port 0 child on link 0 USB2 port 0
1164 05:29:00.425388 USB2 port 0
1165 05:29:00.425562 USB2 port 1
1166 05:29:00.428943 USB2 port 2
1167 05:29:00.429395 USB2 port 3
1168 05:29:00.431905 USB2 port 4
1169 05:29:00.435455 USB2 port 5
1170 05:29:00.436019 USB2 port 6
1171 05:29:00.438823 USB2 port 7
1172 05:29:00.439267 USB2 port 8
1173 05:29:00.442126 USB2 port 9
1174 05:29:00.442598 USB3 port 0
1175 05:29:00.445297 USB3 port 1
1176 05:29:00.445840 USB3 port 2
1177 05:29:00.448573 USB3 port 3
1178 05:29:00.448929 PCI: 00:14.2
1179 05:29:00.458534 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1180 05:29:00.468537 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1181 05:29:00.475029 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1182 05:29:00.485457 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1183 05:29:00.485774 GENERIC: 0.0
1184 05:29:00.488245 PCI: 00:15.0 child on link 0 I2C: 00:1a
1185 05:29:00.498049 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 05:29:00.501609 I2C: 00:1a
1187 05:29:00.501684 I2C: 00:31
1188 05:29:00.504803 I2C: 00:32
1189 05:29:00.508476 PCI: 00:15.1 child on link 0 I2C: 00:10
1190 05:29:00.518659 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 05:29:00.521652 I2C: 00:10
1192 05:29:00.522082 PCI: 00:15.2
1193 05:29:00.531819 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 05:29:00.535086 PCI: 00:15.3
1195 05:29:00.544992 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 05:29:00.545291 PCI: 00:16.0
1197 05:29:00.555543 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 05:29:00.555628 PCI: 00:19.0
1199 05:29:00.561652 PCI: 00:19.1 child on link 0 I2C: 00:15
1200 05:29:00.571524 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 05:29:00.571885 I2C: 00:15
1202 05:29:00.578558 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1203 05:29:00.585498 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1204 05:29:00.595086 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1205 05:29:00.605380 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1206 05:29:00.606040 GENERIC: 0.0
1207 05:29:00.608443 PCI: 01:00.0
1208 05:29:00.618366 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1209 05:29:00.628343 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1210 05:29:00.628776 PCI: 00:1e.0
1211 05:29:00.641500 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 05:29:00.644648 PCI: 00:1e.2 child on link 0 SPI: 00
1213 05:29:00.655093 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 05:29:00.655452 SPI: 00
1215 05:29:00.661512 PCI: 00:1e.3 child on link 0 SPI: 00
1216 05:29:00.671651 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 05:29:00.672085 SPI: 00
1218 05:29:00.674943 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 05:29:00.684656 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 05:29:00.684743 PNP: 0c09.0
1221 05:29:00.695104 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1222 05:29:00.698840 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1223 05:29:00.708336 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 05:29:00.718069 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1225 05:29:00.722030 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1226 05:29:00.724915 GENERIC: 0.0
1227 05:29:00.725333 GENERIC: 1.0
1228 05:29:00.727913 PCI: 00:1f.3
1229 05:29:00.738210 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 05:29:00.748476 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1231 05:29:00.748831 PCI: 00:1f.5
1232 05:29:00.758196 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1233 05:29:00.761592 CPU_CLUSTER: 0 child on link 0 APIC: 00
1234 05:29:00.764777 APIC: 00
1235 05:29:00.765093 APIC: 01
1236 05:29:00.768315 APIC: 05
1237 05:29:00.768661 APIC: 03
1238 05:29:00.768905 APIC: 07
1239 05:29:00.771573 APIC: 06
1240 05:29:00.771917 APIC: 04
1241 05:29:00.774368 APIC: 02
1242 05:29:00.781817 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1243 05:29:00.788290 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1244 05:29:00.791530 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1245 05:29:00.798590 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1246 05:29:00.801320 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1247 05:29:00.808031 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1248 05:29:00.814864 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1249 05:29:00.821390 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1250 05:29:00.828156 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1251 05:29:00.837997 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1252 05:29:00.841215 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1253 05:29:00.851733 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1254 05:29:00.858283 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1255 05:29:00.864700 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1256 05:29:00.867612 DOMAIN: 0000: Resource ranges:
1257 05:29:00.871749 * Base: 1000, Size: 800, Tag: 100
1258 05:29:00.874517 * Base: 1900, Size: e700, Tag: 100
1259 05:29:00.881254 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1260 05:29:00.887818 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1261 05:29:00.894239 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1262 05:29:00.900998 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1263 05:29:00.911387 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1264 05:29:00.917517 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1265 05:29:00.924502 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1266 05:29:00.934310 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1267 05:29:00.940592 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1268 05:29:00.946840 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1269 05:29:00.957044 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1270 05:29:00.963685 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1271 05:29:00.970472 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1272 05:29:00.980560 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1273 05:29:00.987134 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1274 05:29:00.993522 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1275 05:29:01.003485 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1276 05:29:01.010338 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1277 05:29:01.016952 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1278 05:29:01.026549 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1279 05:29:01.033428 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1280 05:29:01.039650 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1281 05:29:01.049820 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1282 05:29:01.057448 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1283 05:29:01.063076 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1284 05:29:01.066530 DOMAIN: 0000: Resource ranges:
1285 05:29:01.073075 * Base: 7fc00000, Size: 40400000, Tag: 200
1286 05:29:01.076125 * Base: d0000000, Size: 28000000, Tag: 200
1287 05:29:01.079159 * Base: fa000000, Size: 1000000, Tag: 200
1288 05:29:01.085880 * Base: fb001000, Size: 2fff000, Tag: 200
1289 05:29:01.089435 * Base: fe010000, Size: 2e000, Tag: 200
1290 05:29:01.092537 * Base: fe03f000, Size: d41000, Tag: 200
1291 05:29:01.096650 * Base: fed88000, Size: 8000, Tag: 200
1292 05:29:01.099345 * Base: fed93000, Size: d000, Tag: 200
1293 05:29:01.106372 * Base: feda2000, Size: 1e000, Tag: 200
1294 05:29:01.109819 * Base: fede0000, Size: 1220000, Tag: 200
1295 05:29:01.112829 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1296 05:29:01.122954 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1297 05:29:01.129994 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1298 05:29:01.136743 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1299 05:29:01.143008 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1300 05:29:01.149492 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1301 05:29:01.155656 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1302 05:29:01.162362 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1303 05:29:01.169292 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1304 05:29:01.175637 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1305 05:29:01.182863 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1306 05:29:01.189368 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1307 05:29:01.195685 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1308 05:29:01.202070 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1309 05:29:01.209230 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1310 05:29:01.215417 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1311 05:29:01.222510 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1312 05:29:01.229280 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1313 05:29:01.235534 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1314 05:29:01.242618 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1315 05:29:01.249387 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1316 05:29:01.256192 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1317 05:29:01.262334 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1318 05:29:01.269058 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1319 05:29:01.275331 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1320 05:29:01.278719 PCI: 00:1d.0: Resource ranges:
1321 05:29:01.282363 * Base: 7fc00000, Size: 100000, Tag: 200
1322 05:29:01.288967 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1323 05:29:01.295452 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1324 05:29:01.305212 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1325 05:29:01.311727 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1326 05:29:01.315959 Root Device assign_resources, bus 0 link: 0
1327 05:29:01.322488 DOMAIN: 0000 assign_resources, bus 0 link: 0
1328 05:29:01.328670 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1329 05:29:01.338403 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1330 05:29:01.344786 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1331 05:29:01.354838 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1332 05:29:01.358355 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 05:29:01.361801 PCI: 00:04.0 assign_resources, bus 1 link: 0
1334 05:29:01.372458 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1335 05:29:01.378718 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1336 05:29:01.389106 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1337 05:29:01.392229 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 05:29:01.399016 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1339 05:29:01.405699 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1340 05:29:01.409006 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 05:29:01.415522 PCI: 00:14.0 assign_resources, bus 0 link: 0
1342 05:29:01.421780 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1343 05:29:01.431759 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1344 05:29:01.438981 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1345 05:29:01.445342 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 05:29:01.448532 PCI: 00:14.3 assign_resources, bus 0 link: 0
1347 05:29:01.455353 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1348 05:29:01.462108 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 05:29:01.465190 PCI: 00:15.0 assign_resources, bus 0 link: 0
1350 05:29:01.475049 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1351 05:29:01.478407 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 05:29:01.482052 PCI: 00:15.1 assign_resources, bus 0 link: 0
1353 05:29:01.491641 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1354 05:29:01.498844 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1355 05:29:01.508978 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1356 05:29:01.515600 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1357 05:29:01.522197 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 05:29:01.525357 PCI: 00:19.1 assign_resources, bus 0 link: 0
1359 05:29:01.535666 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1360 05:29:01.544951 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1361 05:29:01.551724 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1362 05:29:01.558416 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1363 05:29:01.565031 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1364 05:29:01.571631 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1365 05:29:01.578309 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1366 05:29:01.585596 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1367 05:29:01.592317 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 05:29:01.595283 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1369 05:29:01.605391 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1370 05:29:01.608468 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 05:29:01.611552 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1372 05:29:01.618158 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 05:29:01.621769 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1374 05:29:01.628622 LPC: Trying to open IO window from 800 size 1ff
1375 05:29:01.635127 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1376 05:29:01.645010 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1377 05:29:01.651650 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1378 05:29:01.658592 DOMAIN: 0000 assign_resources, bus 0 link: 0
1379 05:29:01.661707 Root Device assign_resources, bus 0 link: 0
1380 05:29:01.664846 Done setting resources.
1381 05:29:01.671301 Show resources in subtree (Root Device)...After assigning values.
1382 05:29:01.674883 Root Device child on link 0 DOMAIN: 0000
1383 05:29:01.678494 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1384 05:29:01.688185 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1385 05:29:01.698210 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1386 05:29:01.698295 PCI: 00:00.0
1387 05:29:01.708126 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1388 05:29:01.719103 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1389 05:29:01.728420 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1390 05:29:01.738396 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1391 05:29:01.748105 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1392 05:29:01.758097 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1393 05:29:01.764952 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1394 05:29:01.775510 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1395 05:29:01.784868 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1396 05:29:01.794982 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1397 05:29:01.805001 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1398 05:29:01.811599 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1399 05:29:01.821698 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1400 05:29:01.831677 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1401 05:29:01.842042 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1402 05:29:01.851898 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1403 05:29:01.861590 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1404 05:29:01.868114 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1405 05:29:01.878014 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1406 05:29:01.889219 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1407 05:29:01.891866 PCI: 00:02.0
1408 05:29:01.901151 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1409 05:29:01.911710 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1410 05:29:01.921627 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1411 05:29:01.924922 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1412 05:29:01.934737 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1413 05:29:01.938184 GENERIC: 0.0
1414 05:29:01.938274 PCI: 00:05.0
1415 05:29:01.948133 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1416 05:29:01.954848 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1417 05:29:01.954930 GENERIC: 0.0
1418 05:29:01.958329 PCI: 00:08.0
1419 05:29:01.967790 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1420 05:29:01.968157 PCI: 00:0a.0
1421 05:29:01.974901 PCI: 00:0d.0 child on link 0 USB0 port 0
1422 05:29:01.984789 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1423 05:29:01.988129 USB0 port 0 child on link 0 USB3 port 0
1424 05:29:01.991420 USB3 port 0
1425 05:29:01.991904 USB3 port 1
1426 05:29:01.994618 USB3 port 2
1427 05:29:01.994971 USB3 port 3
1428 05:29:02.001238 PCI: 00:14.0 child on link 0 USB0 port 0
1429 05:29:02.011287 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1430 05:29:02.014339 USB0 port 0 child on link 0 USB2 port 0
1431 05:29:02.017891 USB2 port 0
1432 05:29:02.018235 USB2 port 1
1433 05:29:02.021358 USB2 port 2
1434 05:29:02.021809 USB2 port 3
1435 05:29:02.025106 USB2 port 4
1436 05:29:02.025556 USB2 port 5
1437 05:29:02.027817 USB2 port 6
1438 05:29:02.028171 USB2 port 7
1439 05:29:02.031395 USB2 port 8
1440 05:29:02.031955 USB2 port 9
1441 05:29:02.034573 USB3 port 0
1442 05:29:02.034925 USB3 port 1
1443 05:29:02.038326 USB3 port 2
1444 05:29:02.041169 USB3 port 3
1445 05:29:02.041518 PCI: 00:14.2
1446 05:29:02.051595 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1447 05:29:02.061257 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1448 05:29:02.067824 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1449 05:29:02.077997 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1450 05:29:02.078465 GENERIC: 0.0
1451 05:29:02.081198 PCI: 00:15.0 child on link 0 I2C: 00:1a
1452 05:29:02.094352 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1453 05:29:02.094772 I2C: 00:1a
1454 05:29:02.097835 I2C: 00:31
1455 05:29:02.098184 I2C: 00:32
1456 05:29:02.101199 PCI: 00:15.1 child on link 0 I2C: 00:10
1457 05:29:02.111153 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1458 05:29:02.115102 I2C: 00:10
1459 05:29:02.115564 PCI: 00:15.2
1460 05:29:02.124662 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1461 05:29:02.127837 PCI: 00:15.3
1462 05:29:02.137610 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1463 05:29:02.141040 PCI: 00:16.0
1464 05:29:02.151272 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1465 05:29:02.151364 PCI: 00:19.0
1466 05:29:02.154424 PCI: 00:19.1 child on link 0 I2C: 00:15
1467 05:29:02.167542 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1468 05:29:02.168065 I2C: 00:15
1469 05:29:02.171615 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1470 05:29:02.181413 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1471 05:29:02.194438 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1472 05:29:02.204099 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1473 05:29:02.204176 GENERIC: 0.0
1474 05:29:02.207626 PCI: 01:00.0
1475 05:29:02.217638 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1476 05:29:02.227572 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1477 05:29:02.230821 PCI: 00:1e.0
1478 05:29:02.241374 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1479 05:29:02.244423 PCI: 00:1e.2 child on link 0 SPI: 00
1480 05:29:02.254807 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1481 05:29:02.257763 SPI: 00
1482 05:29:02.260945 PCI: 00:1e.3 child on link 0 SPI: 00
1483 05:29:02.270940 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1484 05:29:02.271371 SPI: 00
1485 05:29:02.277560 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1486 05:29:02.284371 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1487 05:29:02.287837 PNP: 0c09.0
1488 05:29:02.294402 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1489 05:29:02.301311 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1490 05:29:02.311466 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1491 05:29:02.317834 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1492 05:29:02.324348 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1493 05:29:02.324701 GENERIC: 0.0
1494 05:29:02.327988 GENERIC: 1.0
1495 05:29:02.328428 PCI: 00:1f.3
1496 05:29:02.337532 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1497 05:29:02.350577 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1498 05:29:02.350659 PCI: 00:1f.5
1499 05:29:02.360466 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1500 05:29:02.363960 CPU_CLUSTER: 0 child on link 0 APIC: 00
1501 05:29:02.367232 APIC: 00
1502 05:29:02.367310 APIC: 01
1503 05:29:02.370754 APIC: 05
1504 05:29:02.370843 APIC: 03
1505 05:29:02.370905 APIC: 07
1506 05:29:02.374576 APIC: 06
1507 05:29:02.375047 APIC: 04
1508 05:29:02.377854 APIC: 02
1509 05:29:02.378315 Done allocating resources.
1510 05:29:02.384272 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1511 05:29:02.390794 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1512 05:29:02.394081 Configure GPIOs for I2S audio on UP4.
1513 05:29:02.400559 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1514 05:29:02.404131 Enabling resources...
1515 05:29:02.407614 PCI: 00:00.0 subsystem <- 8086/9a12
1516 05:29:02.410777 PCI: 00:00.0 cmd <- 06
1517 05:29:02.414067 PCI: 00:02.0 subsystem <- 8086/9a40
1518 05:29:02.417670 PCI: 00:02.0 cmd <- 03
1519 05:29:02.421293 PCI: 00:04.0 subsystem <- 8086/9a03
1520 05:29:02.421713 PCI: 00:04.0 cmd <- 02
1521 05:29:02.428097 PCI: 00:05.0 subsystem <- 8086/9a19
1522 05:29:02.428580 PCI: 00:05.0 cmd <- 02
1523 05:29:02.431251 PCI: 00:08.0 subsystem <- 8086/9a11
1524 05:29:02.434517 PCI: 00:08.0 cmd <- 06
1525 05:29:02.438385 PCI: 00:0d.0 subsystem <- 8086/9a13
1526 05:29:02.441395 PCI: 00:0d.0 cmd <- 02
1527 05:29:02.444327 PCI: 00:14.0 subsystem <- 8086/a0ed
1528 05:29:02.447556 PCI: 00:14.0 cmd <- 02
1529 05:29:02.451094 PCI: 00:14.2 subsystem <- 8086/a0ef
1530 05:29:02.454649 PCI: 00:14.2 cmd <- 02
1531 05:29:02.457884 PCI: 00:14.3 subsystem <- 8086/a0f0
1532 05:29:02.461338 PCI: 00:14.3 cmd <- 02
1533 05:29:02.464376 PCI: 00:15.0 subsystem <- 8086/a0e8
1534 05:29:02.464453 PCI: 00:15.0 cmd <- 02
1535 05:29:02.471343 PCI: 00:15.1 subsystem <- 8086/a0e9
1536 05:29:02.471446 PCI: 00:15.1 cmd <- 02
1537 05:29:02.474179 PCI: 00:15.2 subsystem <- 8086/a0ea
1538 05:29:02.477364 PCI: 00:15.2 cmd <- 02
1539 05:29:02.480854 PCI: 00:15.3 subsystem <- 8086/a0eb
1540 05:29:02.484508 PCI: 00:15.3 cmd <- 02
1541 05:29:02.487487 PCI: 00:16.0 subsystem <- 8086/a0e0
1542 05:29:02.490861 PCI: 00:16.0 cmd <- 02
1543 05:29:02.494772 PCI: 00:19.1 subsystem <- 8086/a0c6
1544 05:29:02.497617 PCI: 00:19.1 cmd <- 02
1545 05:29:02.501049 PCI: 00:1d.0 bridge ctrl <- 0013
1546 05:29:02.504361 PCI: 00:1d.0 subsystem <- 8086/a0b0
1547 05:29:02.507751 PCI: 00:1d.0 cmd <- 06
1548 05:29:02.511156 PCI: 00:1e.0 subsystem <- 8086/a0a8
1549 05:29:02.511578 PCI: 00:1e.0 cmd <- 06
1550 05:29:02.517981 PCI: 00:1e.2 subsystem <- 8086/a0aa
1551 05:29:02.518414 PCI: 00:1e.2 cmd <- 06
1552 05:29:02.521640 PCI: 00:1e.3 subsystem <- 8086/a0ab
1553 05:29:02.524762 PCI: 00:1e.3 cmd <- 02
1554 05:29:02.527882 PCI: 00:1f.0 subsystem <- 8086/a087
1555 05:29:02.531137 PCI: 00:1f.0 cmd <- 407
1556 05:29:02.534570 PCI: 00:1f.3 subsystem <- 8086/a0c8
1557 05:29:02.537962 PCI: 00:1f.3 cmd <- 02
1558 05:29:02.541183 PCI: 00:1f.5 subsystem <- 8086/a0a4
1559 05:29:02.544413 PCI: 00:1f.5 cmd <- 406
1560 05:29:02.547767 PCI: 01:00.0 cmd <- 02
1561 05:29:02.552493 done.
1562 05:29:02.556200 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1563 05:29:02.559318 Initializing devices...
1564 05:29:02.562537 Root Device init
1565 05:29:02.565777 Chrome EC: Set SMI mask to 0x0000000000000000
1566 05:29:02.572968 Chrome EC: clear events_b mask to 0x0000000000000000
1567 05:29:02.579450 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1568 05:29:02.582574 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1569 05:29:02.588946 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1570 05:29:02.596133 Chrome EC: Set WAKE mask to 0x0000000000000000
1571 05:29:02.598982 fw_config match found: DB_USB=USB3_ACTIVE
1572 05:29:02.605579 Configure Right Type-C port orientation for retimer
1573 05:29:02.608892 Root Device init finished in 42 msecs
1574 05:29:02.612357 PCI: 00:00.0 init
1575 05:29:02.612702 CPU TDP = 9 Watts
1576 05:29:02.615573 CPU PL1 = 9 Watts
1577 05:29:02.619205 CPU PL2 = 40 Watts
1578 05:29:02.619704 CPU PL4 = 83 Watts
1579 05:29:02.622713 PCI: 00:00.0 init finished in 8 msecs
1580 05:29:02.626076 PCI: 00:02.0 init
1581 05:29:02.629710 GMA: Found VBT in CBFS
1582 05:29:02.630203 GMA: Found valid VBT in CBFS
1583 05:29:02.636170 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1584 05:29:02.642802 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1585 05:29:02.649069 PCI: 00:02.0 init finished in 18 msecs
1586 05:29:02.649680 PCI: 00:05.0 init
1587 05:29:02.655691 PCI: 00:05.0 init finished in 0 msecs
1588 05:29:02.656105 PCI: 00:08.0 init
1589 05:29:02.658948 PCI: 00:08.0 init finished in 0 msecs
1590 05:29:02.662738 PCI: 00:14.0 init
1591 05:29:02.666605 PCI: 00:14.0 init finished in 0 msecs
1592 05:29:02.669270 PCI: 00:14.2 init
1593 05:29:02.672862 PCI: 00:14.2 init finished in 0 msecs
1594 05:29:02.676454 PCI: 00:15.0 init
1595 05:29:02.679645 I2C bus 0 version 0x3230302a
1596 05:29:02.683236 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1597 05:29:02.686608 PCI: 00:15.0 init finished in 6 msecs
1598 05:29:02.690030 PCI: 00:15.1 init
1599 05:29:02.690490 I2C bus 1 version 0x3230302a
1600 05:29:02.696415 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1601 05:29:02.699471 PCI: 00:15.1 init finished in 6 msecs
1602 05:29:02.699789 PCI: 00:15.2 init
1603 05:29:02.703189 I2C bus 2 version 0x3230302a
1604 05:29:02.706708 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1605 05:29:02.709850 PCI: 00:15.2 init finished in 6 msecs
1606 05:29:02.713309 PCI: 00:15.3 init
1607 05:29:02.716512 I2C bus 3 version 0x3230302a
1608 05:29:02.720058 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1609 05:29:02.723196 PCI: 00:15.3 init finished in 6 msecs
1610 05:29:02.726627 PCI: 00:16.0 init
1611 05:29:02.729889 PCI: 00:16.0 init finished in 0 msecs
1612 05:29:02.733181 PCI: 00:19.1 init
1613 05:29:02.736616 I2C bus 5 version 0x3230302a
1614 05:29:02.740116 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1615 05:29:02.743267 PCI: 00:19.1 init finished in 6 msecs
1616 05:29:02.743642 PCI: 00:1d.0 init
1617 05:29:02.746291 Initializing PCH PCIe bridge.
1618 05:29:02.753065 PCI: 00:1d.0 init finished in 3 msecs
1619 05:29:02.753140 PCI: 00:1f.0 init
1620 05:29:02.760603 IOAPIC: Initializing IOAPIC at 0xfec00000
1621 05:29:02.763158 IOAPIC: Bootstrap Processor Local APIC = 0x00
1622 05:29:02.766891 IOAPIC: ID = 0x02
1623 05:29:02.767350 IOAPIC: Dumping registers
1624 05:29:02.769664 reg 0x0000: 0x02000000
1625 05:29:02.773294 reg 0x0001: 0x00770020
1626 05:29:02.776774 reg 0x0002: 0x00000000
1627 05:29:02.779980 PCI: 00:1f.0 init finished in 21 msecs
1628 05:29:02.783045 PCI: 00:1f.2 init
1629 05:29:02.783441 Disabling ACPI via APMC.
1630 05:29:02.787819 APMC done.
1631 05:29:02.791255 PCI: 00:1f.2 init finished in 5 msecs
1632 05:29:02.803021 PCI: 01:00.0 init
1633 05:29:02.805998 PCI: 01:00.0 init finished in 0 msecs
1634 05:29:02.809487 PNP: 0c09.0 init
1635 05:29:02.812619 Google Chrome EC uptime: 8.265 seconds
1636 05:29:02.819420 Google Chrome AP resets since EC boot: 1
1637 05:29:02.823036 Google Chrome most recent AP reset causes:
1638 05:29:02.826029 0.453: 32775 shutdown: entering G3
1639 05:29:02.833177 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1640 05:29:02.836456 PNP: 0c09.0 init finished in 22 msecs
1641 05:29:02.841864 Devices initialized
1642 05:29:02.845112 Show all devs... After init.
1643 05:29:02.848069 Root Device: enabled 1
1644 05:29:02.848412 DOMAIN: 0000: enabled 1
1645 05:29:02.851373 CPU_CLUSTER: 0: enabled 1
1646 05:29:02.854819 PCI: 00:00.0: enabled 1
1647 05:29:02.858779 PCI: 00:02.0: enabled 1
1648 05:29:02.859271 PCI: 00:04.0: enabled 1
1649 05:29:02.861572 PCI: 00:05.0: enabled 1
1650 05:29:02.864606 PCI: 00:06.0: enabled 0
1651 05:29:02.868180 PCI: 00:07.0: enabled 0
1652 05:29:02.868456 PCI: 00:07.1: enabled 0
1653 05:29:02.871359 PCI: 00:07.2: enabled 0
1654 05:29:02.874387 PCI: 00:07.3: enabled 0
1655 05:29:02.877914 PCI: 00:08.0: enabled 1
1656 05:29:02.877991 PCI: 00:09.0: enabled 0
1657 05:29:02.881315 PCI: 00:0a.0: enabled 0
1658 05:29:02.884930 PCI: 00:0d.0: enabled 1
1659 05:29:02.885005 PCI: 00:0d.1: enabled 0
1660 05:29:02.887786 PCI: 00:0d.2: enabled 0
1661 05:29:02.891330 PCI: 00:0d.3: enabled 0
1662 05:29:02.894813 PCI: 00:0e.0: enabled 0
1663 05:29:02.895094 PCI: 00:10.2: enabled 1
1664 05:29:02.898365 PCI: 00:10.6: enabled 0
1665 05:29:02.901981 PCI: 00:10.7: enabled 0
1666 05:29:02.904846 PCI: 00:12.0: enabled 0
1667 05:29:02.905204 PCI: 00:12.6: enabled 0
1668 05:29:02.908387 PCI: 00:13.0: enabled 0
1669 05:29:02.911718 PCI: 00:14.0: enabled 1
1670 05:29:02.914781 PCI: 00:14.1: enabled 0
1671 05:29:02.915222 PCI: 00:14.2: enabled 1
1672 05:29:02.917956 PCI: 00:14.3: enabled 1
1673 05:29:02.921287 PCI: 00:15.0: enabled 1
1674 05:29:02.925148 PCI: 00:15.1: enabled 1
1675 05:29:02.925619 PCI: 00:15.2: enabled 1
1676 05:29:02.928049 PCI: 00:15.3: enabled 1
1677 05:29:02.931346 PCI: 00:16.0: enabled 1
1678 05:29:02.931701 PCI: 00:16.1: enabled 0
1679 05:29:02.934768 PCI: 00:16.2: enabled 0
1680 05:29:02.937931 PCI: 00:16.3: enabled 0
1681 05:29:02.941508 PCI: 00:16.4: enabled 0
1682 05:29:02.941666 PCI: 00:16.5: enabled 0
1683 05:29:02.944370 PCI: 00:17.0: enabled 0
1684 05:29:02.947715 PCI: 00:19.0: enabled 0
1685 05:29:02.951171 PCI: 00:19.1: enabled 1
1686 05:29:02.951261 PCI: 00:19.2: enabled 0
1687 05:29:02.955145 PCI: 00:1c.0: enabled 1
1688 05:29:02.958092 PCI: 00:1c.1: enabled 0
1689 05:29:02.958443 PCI: 00:1c.2: enabled 0
1690 05:29:02.961385 PCI: 00:1c.3: enabled 0
1691 05:29:02.964991 PCI: 00:1c.4: enabled 0
1692 05:29:02.967839 PCI: 00:1c.5: enabled 0
1693 05:29:02.968193 PCI: 00:1c.6: enabled 1
1694 05:29:02.971220 PCI: 00:1c.7: enabled 0
1695 05:29:02.975327 PCI: 00:1d.0: enabled 1
1696 05:29:02.978631 PCI: 00:1d.1: enabled 0
1697 05:29:02.979085 PCI: 00:1d.2: enabled 1
1698 05:29:02.981931 PCI: 00:1d.3: enabled 0
1699 05:29:02.984947 PCI: 00:1e.0: enabled 1
1700 05:29:02.985302 PCI: 00:1e.1: enabled 0
1701 05:29:02.988261 PCI: 00:1e.2: enabled 1
1702 05:29:02.991417 PCI: 00:1e.3: enabled 1
1703 05:29:02.994776 PCI: 00:1f.0: enabled 1
1704 05:29:02.995127 PCI: 00:1f.1: enabled 0
1705 05:29:02.998284 PCI: 00:1f.2: enabled 1
1706 05:29:03.001943 PCI: 00:1f.3: enabled 1
1707 05:29:03.004898 PCI: 00:1f.4: enabled 0
1708 05:29:03.005251 PCI: 00:1f.5: enabled 1
1709 05:29:03.008183 PCI: 00:1f.6: enabled 0
1710 05:29:03.011276 PCI: 00:1f.7: enabled 0
1711 05:29:03.011353 APIC: 00: enabled 1
1712 05:29:03.014482 GENERIC: 0.0: enabled 1
1713 05:29:03.018153 GENERIC: 0.0: enabled 1
1714 05:29:03.021966 GENERIC: 1.0: enabled 1
1715 05:29:03.022097 GENERIC: 0.0: enabled 1
1716 05:29:03.024861 GENERIC: 1.0: enabled 1
1717 05:29:03.028392 USB0 port 0: enabled 1
1718 05:29:03.031612 GENERIC: 0.0: enabled 1
1719 05:29:03.031695 USB0 port 0: enabled 1
1720 05:29:03.034845 GENERIC: 0.0: enabled 1
1721 05:29:03.038406 I2C: 00:1a: enabled 1
1722 05:29:03.038866 I2C: 00:31: enabled 1
1723 05:29:03.041871 I2C: 00:32: enabled 1
1724 05:29:03.044802 I2C: 00:10: enabled 1
1725 05:29:03.045164 I2C: 00:15: enabled 1
1726 05:29:03.048006 GENERIC: 0.0: enabled 0
1727 05:29:03.051515 GENERIC: 1.0: enabled 0
1728 05:29:03.054800 GENERIC: 0.0: enabled 1
1729 05:29:03.055153 SPI: 00: enabled 1
1730 05:29:03.058348 SPI: 00: enabled 1
1731 05:29:03.058802 PNP: 0c09.0: enabled 1
1732 05:29:03.061632 GENERIC: 0.0: enabled 1
1733 05:29:03.064654 USB3 port 0: enabled 1
1734 05:29:03.068105 USB3 port 1: enabled 1
1735 05:29:03.068459 USB3 port 2: enabled 0
1736 05:29:03.071284 USB3 port 3: enabled 0
1737 05:29:03.074684 USB2 port 0: enabled 0
1738 05:29:03.074928 USB2 port 1: enabled 1
1739 05:29:03.078205 USB2 port 2: enabled 1
1740 05:29:03.081737 USB2 port 3: enabled 0
1741 05:29:03.082171 USB2 port 4: enabled 1
1742 05:29:03.085440 USB2 port 5: enabled 0
1743 05:29:03.087835 USB2 port 6: enabled 0
1744 05:29:03.090984 USB2 port 7: enabled 0
1745 05:29:03.091334 USB2 port 8: enabled 0
1746 05:29:03.094972 USB2 port 9: enabled 0
1747 05:29:03.097832 USB3 port 0: enabled 0
1748 05:29:03.098122 USB3 port 1: enabled 1
1749 05:29:03.101241 USB3 port 2: enabled 0
1750 05:29:03.104961 USB3 port 3: enabled 0
1751 05:29:03.108440 GENERIC: 0.0: enabled 1
1752 05:29:03.108903 GENERIC: 1.0: enabled 1
1753 05:29:03.111564 APIC: 01: enabled 1
1754 05:29:03.114864 APIC: 05: enabled 1
1755 05:29:03.115381 APIC: 03: enabled 1
1756 05:29:03.118037 APIC: 07: enabled 1
1757 05:29:03.118381 APIC: 06: enabled 1
1758 05:29:03.121624 APIC: 04: enabled 1
1759 05:29:03.124937 APIC: 02: enabled 1
1760 05:29:03.125420 PCI: 01:00.0: enabled 1
1761 05:29:03.131025 BS: BS_DEV_INIT run times (exec / console): 28 / 540 ms
1762 05:29:03.135260 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1763 05:29:03.140977 ELOG: NV offset 0xf30000 size 0x1000
1764 05:29:03.147555 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1765 05:29:03.154823 ELOG: Event(17) added with size 13 at 2023-11-05 05:29:03 UTC
1766 05:29:03.161117 ELOG: Event(92) added with size 9 at 2023-11-05 05:29:03 UTC
1767 05:29:03.168075 ELOG: Event(93) added with size 9 at 2023-11-05 05:29:03 UTC
1768 05:29:03.174444 ELOG: Event(9E) added with size 10 at 2023-11-05 05:29:03 UTC
1769 05:29:03.180968 ELOG: Event(9F) added with size 14 at 2023-11-05 05:29:03 UTC
1770 05:29:03.184113 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1771 05:29:03.191134 ELOG: Event(A1) added with size 10 at 2023-11-05 05:29:03 UTC
1772 05:29:03.197522 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1773 05:29:03.204279 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1774 05:29:03.204658 Finalize devices...
1775 05:29:03.207322 Devices finalized
1776 05:29:03.214759 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1777 05:29:03.217817 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1778 05:29:03.224226 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1779 05:29:03.227562 ME: HFSTS1 : 0x80030055
1780 05:29:03.234471 ME: HFSTS2 : 0x30280116
1781 05:29:03.237829 ME: HFSTS3 : 0x00000050
1782 05:29:03.241684 ME: HFSTS4 : 0x00004000
1783 05:29:03.247848 ME: HFSTS5 : 0x00000000
1784 05:29:03.251453 ME: HFSTS6 : 0x40400006
1785 05:29:03.254419 ME: Manufacturing Mode : YES
1786 05:29:03.257878 ME: SPI Protection Mode Enabled : NO
1787 05:29:03.260784 ME: FW Partition Table : OK
1788 05:29:03.264261 ME: Bringup Loader Failure : NO
1789 05:29:03.270667 ME: Firmware Init Complete : NO
1790 05:29:03.274066 ME: Boot Options Present : NO
1791 05:29:03.277345 ME: Update In Progress : NO
1792 05:29:03.280345 ME: D0i3 Support : YES
1793 05:29:03.283607 ME: Low Power State Enabled : NO
1794 05:29:03.287291 ME: CPU Replaced : YES
1795 05:29:03.290692 ME: CPU Replacement Valid : YES
1796 05:29:03.294065 ME: Current Working State : 5
1797 05:29:03.301282 ME: Current Operation State : 1
1798 05:29:03.304271 ME: Current Operation Mode : 3
1799 05:29:03.307924 ME: Error Code : 0
1800 05:29:03.310706 ME: Enhanced Debug Mode : NO
1801 05:29:03.313727 ME: CPU Debug Disabled : YES
1802 05:29:03.317114 ME: TXT Support : NO
1803 05:29:03.323704 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1804 05:29:03.330658 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1805 05:29:03.333749 CBFS: 'fallback/slic' not found.
1806 05:29:03.336560 ACPI: Writing ACPI tables at 76b01000.
1807 05:29:03.340676 ACPI: * FACS
1808 05:29:03.340745 ACPI: * DSDT
1809 05:29:03.347376 Ramoops buffer: 0x100000@0x76a00000.
1810 05:29:03.350407 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1811 05:29:03.353480 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1812 05:29:03.357493 Google Chrome EC: version:
1813 05:29:03.362317 ro: voema_v2.0.10114-a447f03e46
1814 05:29:03.364739 rw: voema_v2.0.10132-7b2059e3bc
1815 05:29:03.367695 running image: 2
1816 05:29:03.374190 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1817 05:29:03.378024 ACPI: * FADT
1818 05:29:03.378573 SCI is IRQ9
1819 05:29:03.381263 ACPI: added table 1/32, length now 40
1820 05:29:03.384153 ACPI: * SSDT
1821 05:29:03.387539 Found 1 CPU(s) with 8 core(s) each.
1822 05:29:03.390828 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1823 05:29:03.397586 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1824 05:29:03.400911 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1825 05:29:03.404258 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1826 05:29:03.410682 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1827 05:29:03.418298 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1828 05:29:03.420937 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1829 05:29:03.427527 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1830 05:29:03.434243 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1831 05:29:03.437576 \_SB.PCI0.RP09: Added StorageD3Enable property
1832 05:29:03.440720 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1833 05:29:03.447452 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1834 05:29:03.454771 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1835 05:29:03.458047 PS2K: Passing 80 keymaps to kernel
1836 05:29:03.464074 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1837 05:29:03.470967 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1838 05:29:03.477833 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1839 05:29:03.484427 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1840 05:29:03.490702 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1841 05:29:03.497280 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1842 05:29:03.500899 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1843 05:29:03.507709 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1844 05:29:03.514206 ACPI: added table 2/32, length now 44
1845 05:29:03.514684 ACPI: * MCFG
1846 05:29:03.517673 ACPI: added table 3/32, length now 48
1847 05:29:03.520825 ACPI: * TPM2
1848 05:29:03.523998 TPM2 log created at 0x769f0000
1849 05:29:03.527106 ACPI: added table 4/32, length now 52
1850 05:29:03.527487 ACPI: * MADT
1851 05:29:03.530687 SCI is IRQ9
1852 05:29:03.534538 ACPI: added table 5/32, length now 56
1853 05:29:03.534988 current = 76b09850
1854 05:29:03.537120 ACPI: * DMAR
1855 05:29:03.540786 ACPI: added table 6/32, length now 60
1856 05:29:03.543913 ACPI: added table 7/32, length now 64
1857 05:29:03.547033 ACPI: * HPET
1858 05:29:03.551351 ACPI: added table 8/32, length now 68
1859 05:29:03.551672 ACPI: done.
1860 05:29:03.553864 ACPI tables: 35216 bytes.
1861 05:29:03.557527 smbios_write_tables: 769ef000
1862 05:29:03.560431 EC returned error result code 3
1863 05:29:03.564266 Couldn't obtain OEM name from CBI
1864 05:29:03.567884 Create SMBIOS type 16
1865 05:29:03.571259 Create SMBIOS type 17
1866 05:29:03.574323 GENERIC: 0.0 (WIFI Device)
1867 05:29:03.574686 SMBIOS tables: 1734 bytes.
1868 05:29:03.581004 Writing table forward entry at 0x00000500
1869 05:29:03.588066 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1870 05:29:03.591110 Writing coreboot table at 0x76b25000
1871 05:29:03.594710 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1872 05:29:03.601030 1. 0000000000001000-000000000009ffff: RAM
1873 05:29:03.604372 2. 00000000000a0000-00000000000fffff: RESERVED
1874 05:29:03.608201 3. 0000000000100000-00000000769eefff: RAM
1875 05:29:03.614386 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1876 05:29:03.621309 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1877 05:29:03.628153 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1878 05:29:03.631347 7. 0000000077000000-000000007fbfffff: RESERVED
1879 05:29:03.634511 8. 00000000c0000000-00000000cfffffff: RESERVED
1880 05:29:03.641189 9. 00000000f8000000-00000000f9ffffff: RESERVED
1881 05:29:03.644372 10. 00000000fb000000-00000000fb000fff: RESERVED
1882 05:29:03.651074 11. 00000000fe000000-00000000fe00ffff: RESERVED
1883 05:29:03.654743 12. 00000000fed80000-00000000fed87fff: RESERVED
1884 05:29:03.661282 13. 00000000fed90000-00000000fed92fff: RESERVED
1885 05:29:03.664333 14. 00000000feda0000-00000000feda1fff: RESERVED
1886 05:29:03.667710 15. 00000000fedc0000-00000000feddffff: RESERVED
1887 05:29:03.674286 16. 0000000100000000-00000004803fffff: RAM
1888 05:29:03.677447 Passing 4 GPIOs to payload:
1889 05:29:03.680778 NAME | PORT | POLARITY | VALUE
1890 05:29:03.687159 lid | undefined | high | high
1891 05:29:03.690956 power | undefined | high | low
1892 05:29:03.698088 oprom | undefined | high | low
1893 05:29:03.704534 EC in RW | 0x000000e5 | high | high
1894 05:29:03.707837 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 13cd
1895 05:29:03.710869 coreboot table: 1576 bytes.
1896 05:29:03.714071 IMD ROOT 0. 0x76fff000 0x00001000
1897 05:29:03.721198 IMD SMALL 1. 0x76ffe000 0x00001000
1898 05:29:03.724324 FSP MEMORY 2. 0x76c4e000 0x003b0000
1899 05:29:03.727289 VPD 3. 0x76c4d000 0x00000367
1900 05:29:03.730810 RO MCACHE 4. 0x76c4c000 0x00000fdc
1901 05:29:03.734193 CONSOLE 5. 0x76c2c000 0x00020000
1902 05:29:03.737592 FMAP 6. 0x76c2b000 0x00000578
1903 05:29:03.741147 TIME STAMP 7. 0x76c2a000 0x00000910
1904 05:29:03.744140 VBOOT WORK 8. 0x76c16000 0x00014000
1905 05:29:03.747422 ROMSTG STCK 9. 0x76c15000 0x00001000
1906 05:29:03.753987 AFTER CAR 10. 0x76c0a000 0x0000b000
1907 05:29:03.757677 RAMSTAGE 11. 0x76b97000 0x00073000
1908 05:29:03.761229 REFCODE 12. 0x76b42000 0x00055000
1909 05:29:03.764804 SMM BACKUP 13. 0x76b32000 0x00010000
1910 05:29:03.768066 4f444749 14. 0x76b30000 0x00002000
1911 05:29:03.770859 EXT VBT15. 0x76b2d000 0x0000219f
1912 05:29:03.774352 COREBOOT 16. 0x76b25000 0x00008000
1913 05:29:03.777673 ACPI 17. 0x76b01000 0x00024000
1914 05:29:03.780854 ACPI GNVS 18. 0x76b00000 0x00001000
1915 05:29:03.787113 RAMOOPS 19. 0x76a00000 0x00100000
1916 05:29:03.790871 TPM2 TCGLOG20. 0x769f0000 0x00010000
1917 05:29:03.794104 SMBIOS 21. 0x769ef000 0x00000800
1918 05:29:03.794450 IMD small region:
1919 05:29:03.801123 IMD ROOT 0. 0x76ffec00 0x00000400
1920 05:29:03.804553 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1921 05:29:03.807458 POWER STATE 2. 0x76ffeb80 0x00000044
1922 05:29:03.810950 ROMSTAGE 3. 0x76ffeb60 0x00000004
1923 05:29:03.814123 MEM INFO 4. 0x76ffe980 0x000001e0
1924 05:29:03.820907 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1925 05:29:03.823958 MTRR: Physical address space:
1926 05:29:03.831148 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1927 05:29:03.837677 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1928 05:29:03.844143 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1929 05:29:03.847334 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1930 05:29:03.854235 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1931 05:29:03.860610 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1932 05:29:03.867365 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1933 05:29:03.870975 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 05:29:03.877279 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 05:29:03.881173 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 05:29:03.884301 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 05:29:03.887579 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 05:29:03.890476 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 05:29:03.897789 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 05:29:03.900633 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 05:29:03.904284 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 05:29:03.907573 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 05:29:03.914440 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 05:29:03.917819 call enable_fixed_mtrr()
1945 05:29:03.921013 CPU physical address size: 39 bits
1946 05:29:03.924312 MTRR: default type WB/UC MTRR counts: 6/7.
1947 05:29:03.927412 MTRR: WB selected as default type.
1948 05:29:03.934423 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1949 05:29:03.940920 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1950 05:29:03.947607 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1951 05:29:03.953943 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1952 05:29:03.961302 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1953 05:29:03.967488 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1954 05:29:03.967948
1955 05:29:03.971214 MTRR check
1956 05:29:03.971702 Fixed MTRRs : Enabled
1957 05:29:03.973931 Variable MTRRs: Enabled
1958 05:29:03.974448
1959 05:29:03.977319 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 05:29:03.984032 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 05:29:03.987098 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 05:29:03.990802 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 05:29:03.994032 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 05:29:04.000390 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 05:29:04.003955 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 05:29:04.007386 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 05:29:04.010605 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 05:29:04.017508 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 05:29:04.020554 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 05:29:04.026665 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 05:29:04.027262 call enable_fixed_mtrr()
1972 05:29:04.033790 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 05:29:04.037444 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 05:29:04.040574 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 05:29:04.043787 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 05:29:04.050092 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 05:29:04.053807 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 05:29:04.057604 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 05:29:04.060508 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 05:29:04.064351 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 05:29:04.070465 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 05:29:04.073923 CPU physical address size: 39 bits
1983 05:29:04.078301 call enable_fixed_mtrr()
1984 05:29:04.081775 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 05:29:04.088285 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 05:29:04.091537 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 05:29:04.094930 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 05:29:04.098494 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 05:29:04.105403 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 05:29:04.108671 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 05:29:04.111589 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 05:29:04.114818 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 05:29:04.121865 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 05:29:04.125000 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 05:29:04.128010 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 05:29:04.135339 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 05:29:04.138758 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 05:29:04.141893 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 05:29:04.145421 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 05:29:04.151845 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 05:29:04.155299 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 05:29:04.158725 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 05:29:04.161946 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 05:29:04.169086 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 05:29:04.171620 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 05:29:04.175228 call enable_fixed_mtrr()
2007 05:29:04.178985 call enable_fixed_mtrr()
2008 05:29:04.181609 CPU physical address size: 39 bits
2009 05:29:04.185506 CPU physical address size: 39 bits
2010 05:29:04.189528 CPU physical address size: 39 bits
2011 05:29:04.195612 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 05:29:04.199092 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 05:29:04.202245 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 05:29:04.205868 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 05:29:04.212880 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 05:29:04.215844 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 05:29:04.219300 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 05:29:04.222437 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 05:29:04.229095 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 05:29:04.232175 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 05:29:04.235608 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 05:29:04.238768 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 05:29:04.247234 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 05:29:04.247705 call enable_fixed_mtrr()
2025 05:29:04.254107 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 05:29:04.256981 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 05:29:04.260765 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 05:29:04.263919 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 05:29:04.270254 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 05:29:04.274211 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 05:29:04.276814 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 05:29:04.280642 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 05:29:04.286822 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 05:29:04.290225 CPU physical address size: 39 bits
2035 05:29:04.294875 call enable_fixed_mtrr()
2036 05:29:04.298264 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 05:29:04.305460 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2038 05:29:04.308271 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 05:29:04.314816 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 05:29:04.318364 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 05:29:04.321635 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 05:29:04.325288 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 05:29:04.331786 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 05:29:04.334739 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 05:29:04.337918 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 05:29:04.341407 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 05:29:04.348164 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 05:29:04.352586 Checking cr50 for pending updates
2049 05:29:04.356632 call enable_fixed_mtrr()
2050 05:29:04.360327 CPU physical address size: 39 bits
2051 05:29:04.360683 Reading cr50 TPM mode
2052 05:29:04.363640 CPU physical address size: 39 bits
2053 05:29:04.372708 BS: BS_PAYLOAD_LOAD entry times (exec / console): 54 / 8 ms
2054 05:29:04.382535 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2055 05:29:04.385691 Checking segment from ROM address 0xffc02b38
2056 05:29:04.389023 Checking segment from ROM address 0xffc02b54
2057 05:29:04.395471 Loading segment from ROM address 0xffc02b38
2058 05:29:04.395849 code (compression=0)
2059 05:29:04.406265 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2060 05:29:04.412437 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2061 05:29:04.415822 it's not compressed!
2062 05:29:04.560462 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2063 05:29:04.567256 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2064 05:29:04.574045 Loading segment from ROM address 0xffc02b54
2065 05:29:04.577258 Entry Point 0x30000000
2066 05:29:04.577773 Loaded segments
2067 05:29:04.583690 BS: BS_PAYLOAD_LOAD run times (exec / console): 141 / 63 ms
2068 05:29:04.629339 Finalizing chipset.
2069 05:29:04.632142 Finalizing SMM.
2070 05:29:04.632431 APMC done.
2071 05:29:04.638966 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2072 05:29:04.642293 mp_park_aps done after 0 msecs.
2073 05:29:04.645272 Jumping to boot code at 0x30000000(0x76b25000)
2074 05:29:04.655783 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2075 05:29:04.656255
2076 05:29:04.656507
2077 05:29:04.656727
2078 05:29:04.659071 Starting depthcharge on Voema...
2079 05:29:04.659534
2080 05:29:04.660407 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2081 05:29:04.660769 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2082 05:29:04.661060 Setting prompt string to ['volteer:']
2083 05:29:04.661327 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2084 05:29:04.669544 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2085 05:29:04.670009
2086 05:29:04.675785 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2087 05:29:04.676284
2088 05:29:04.679055 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2089 05:29:04.683207
2090 05:29:04.683679 Failed to find eMMC card reader
2091 05:29:04.684020
2092 05:29:04.686532 Wipe memory regions:
2093 05:29:04.686913
2094 05:29:04.690368 [0x00000000001000, 0x000000000a0000)
2095 05:29:04.690829
2096 05:29:04.693309 [0x00000000100000, 0x00000030000000)
2097 05:29:04.730909
2098 05:29:04.734213 [0x00000032662db0, 0x000000769ef000)
2099 05:29:04.783816
2100 05:29:04.787465 [0x00000100000000, 0x00000480400000)
2101 05:29:05.477107
2102 05:29:05.480021 ec_init: CrosEC protocol v3 supported (256, 256)
2103 05:29:05.912032
2104 05:29:05.912172 R8152: Initializing
2105 05:29:05.912262
2106 05:29:05.914914 Version 9 (ocp_data = 6010)
2107 05:29:05.914985
2108 05:29:05.918520 R8152: Done initializing
2109 05:29:05.918586
2110 05:29:05.921358 Adding net device
2111 05:29:06.222499
2112 05:29:06.226202 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2113 05:29:06.226300
2114 05:29:06.226353
2115 05:29:06.226408
2116 05:29:06.229304 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2118 05:29:06.329678 volteer: tftpboot 10.108.97.116 11947781/tftp-deploy-sxj4rmey/kernel/bzImage 11947781/tftp-deploy-sxj4rmey/kernel/cmdline 11947781/tftp-deploy-sxj4rmey/ramdisk/ramdisk.cpio.gz
2119 05:29:06.329856 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2120 05:29:06.329944 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2121 05:29:06.333877 tftpboot 10.108.97.116 11947781/tftp-deploy-sxj4rmey/kernel/bzIploy-sxj4rmey/kernel/cmdline 11947781/tftp-deploy-sxj4rmey/ramdisk/ramdisk.cpio.gz
2122 05:29:06.333950
2123 05:29:06.334000 Waiting for link
2124 05:29:06.536672
2125 05:29:06.536811 done.
2126 05:29:06.536873
2127 05:29:06.536923 MAC: 00:e0:4c:68:05:16
2128 05:29:06.536971
2129 05:29:06.540260 Sending DHCP discover... done.
2130 05:29:06.540337
2131 05:29:06.543679 Waiting for reply... done.
2132 05:29:06.543763
2133 05:29:06.548478 Sending DHCP request... done.
2134 05:29:06.548561
2135 05:29:06.557063 Waiting for reply... done.
2136 05:29:06.557142
2137 05:29:06.557196 My ip is 192.168.201.10
2138 05:29:06.557243
2139 05:29:06.560293 The DHCP server ip is 192.168.201.1
2140 05:29:06.563499
2141 05:29:06.566727 TFTP server IP predefined by user: 10.108.97.116
2142 05:29:06.566820
2143 05:29:06.573349 Bootfile predefined by user: 11947781/tftp-deploy-sxj4rmey/kernel/bzImage
2144 05:29:06.573424
2145 05:29:06.576982 Sending tftp read request... done.
2146 05:29:06.577056
2147 05:29:06.579912 Waiting for the transfer...
2148 05:29:06.580036
2149 05:29:06.804287 00000000 ################################################################
2150 05:29:06.804435
2151 05:29:07.026853 00080000 ################################################################
2152 05:29:07.026982
2153 05:29:07.249683 00100000 ################################################################
2154 05:29:07.249815
2155 05:29:07.470939 00180000 ################################################################
2156 05:29:07.471094
2157 05:29:07.691930 00200000 ################################################################
2158 05:29:07.692132
2159 05:29:07.913665 00280000 ################################################################
2160 05:29:07.913808
2161 05:29:08.134778 00300000 ################################################################
2162 05:29:08.134925
2163 05:29:08.357124 00380000 ################################################################
2164 05:29:08.357274
2165 05:29:08.578185 00400000 ################################################################
2166 05:29:08.578321
2167 05:29:08.798727 00480000 ################################################################
2168 05:29:08.798878
2169 05:29:09.019726 00500000 ################################################################
2170 05:29:09.019878
2171 05:29:09.240612 00580000 ################################################################
2172 05:29:09.240745
2173 05:29:09.461586 00600000 ################################################################
2174 05:29:09.461729
2175 05:29:09.682995 00680000 ################################################################
2176 05:29:09.683134
2177 05:29:09.904537 00700000 ################################################################
2178 05:29:09.904671
2179 05:29:10.125438 00780000 ################################################################
2180 05:29:10.125579
2181 05:29:10.205624 00800000 ####################### done.
2182 05:29:10.205764
2183 05:29:10.209042 The bootfile was 8576912 bytes long.
2184 05:29:10.209130
2185 05:29:10.212481 Sending tftp read request... done.
2186 05:29:10.212549
2187 05:29:10.215382 Waiting for the transfer...
2188 05:29:10.215443
2189 05:29:10.437991 00000000 ################################################################
2190 05:29:10.438127
2191 05:29:10.663246 00080000 ################################################################
2192 05:29:10.663393
2193 05:29:10.886169 00100000 ################################################################
2194 05:29:10.886318
2195 05:29:11.109316 00180000 ################################################################
2196 05:29:11.109475
2197 05:29:11.332372 00200000 ################################################################
2198 05:29:11.332516
2199 05:29:11.555821 00280000 ################################################################
2200 05:29:11.555950
2201 05:29:11.777881 00300000 ################################################################
2202 05:29:11.778023
2203 05:29:11.998693 00380000 ################################################################
2204 05:29:11.998842
2205 05:29:12.220638 00400000 ################################################################
2206 05:29:12.220790
2207 05:29:12.441751 00480000 ################################################################
2208 05:29:12.441897
2209 05:29:12.663437 00500000 ################################################################
2210 05:29:12.663585
2211 05:29:12.885134 00580000 ################################################################
2212 05:29:12.885271
2213 05:29:13.106263 00600000 ################################################################
2214 05:29:13.106391
2215 05:29:13.328249 00680000 ################################################################
2216 05:29:13.328382
2217 05:29:13.551061 00700000 ################################################################
2218 05:29:13.551190
2219 05:29:13.773529 00780000 ################################################################
2220 05:29:13.773670
2221 05:29:13.957380 00800000 ###################################################### done.
2222 05:29:13.957521
2223 05:29:13.960544 Sending tftp read request... done.
2224 05:29:13.960615
2225 05:29:13.963948 Waiting for the transfer...
2226 05:29:13.964043
2227 05:29:13.964103 00000000 # done.
2228 05:29:13.964156
2229 05:29:13.973902 Command line loaded dynamically from TFTP file: 11947781/tftp-deploy-sxj4rmey/kernel/cmdline
2230 05:29:13.973984
2231 05:29:13.990762 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=10.108.97.116
2232 05:29:13.995941
2233 05:29:13.999427 Shutting down all USB controllers.
2234 05:29:13.999503
2235 05:29:13.999555 Removing current net device
2236 05:29:13.999603
2237 05:29:14.002642 Finalizing coreboot
2238 05:29:14.002717
2239 05:29:14.009262 Exiting depthcharge with code 4 at timestamp: 17911268
2240 05:29:14.009337
2241 05:29:14.009391
2242 05:29:14.009438 Starting kernel ...
2243 05:29:14.009483
2244 05:29:14.009527
2245 05:29:14.009849 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2246 05:29:14.009926 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
2247 05:29:14.009987 Setting prompt string to ['Linux version [0-9]']
2248 05:29:14.010038 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2249 05:29:14.010089 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2251 05:33:49.010819 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
2253 05:33:49.012131 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
2255 05:33:49.013084 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2258 05:33:49.014486 end: 2 depthcharge-action (duration 00:05:00) [common]
2260 05:33:49.014684 Cleaning after the job
2261 05:33:49.014755 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11947781/tftp-deploy-sxj4rmey/ramdisk
2262 05:33:49.015711 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11947781/tftp-deploy-sxj4rmey/kernel
2263 05:33:49.016667 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11947781/tftp-deploy-sxj4rmey/modules
2264 05:33:49.016929 start: 5.1 power-off (timeout 00:00:30) [common]
2265 05:33:49.017066 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-15' '--port=1' '--command=off'
2266 05:33:49.097608 >> Command sent successfully.
2267 05:33:49.105617 Returned 0 in 0 seconds
2268 05:33:49.206680 end: 5.1 power-off (duration 00:00:00) [common]
2270 05:33:49.207972 start: 5.2 read-feedback (timeout 00:10:00) [common]
2271 05:33:49.208979 Listened to connection for namespace 'common' for up to 1s
2272 05:33:50.209778 Finalising connection for namespace 'common'
2273 05:33:50.210373 Disconnecting from shell: Finalise
2274 05:33:50.210708
2275 05:33:50.311596 end: 5.2 read-feedback (duration 00:00:01) [common]
2276 05:33:50.312148 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11947781
2277 05:33:50.324873 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11947781
2278 05:33:50.325014 JobError: Your job cannot terminate cleanly.