Boot log: acer-cb317-1h-c3z6-dedede
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 06:42:16.286817 lava-dispatcher, installed at version: 2023.10
2 06:42:16.287030 start: 0 validate
3 06:42:16.287168 Start time: 2023-12-07 06:42:16.287161+00:00 (UTC)
4 06:42:16.287297 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:42:16.287429 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 06:42:16.547150 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:42:16.547337 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1987-g9e48fc479c400%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:42:19.549517 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:42:19.550321 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1987-g9e48fc479c400%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 06:42:19.818504 validate duration: 3.53
12 06:42:19.819967 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 06:42:19.820508 start: 1.1 download-retry (timeout 00:10:00) [common]
14 06:42:19.820987 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 06:42:19.821615 Not decompressing ramdisk as can be used compressed.
16 06:42:19.822108 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 06:42:19.822467 saving as /var/lib/lava/dispatcher/tmp/12205520/tftp-deploy-ry50sqyo/ramdisk/rootfs.cpio.gz
18 06:42:19.822870 total size: 8418130 (8 MB)
19 06:42:20.326575 progress 0 % (0 MB)
20 06:42:20.332559 progress 5 % (0 MB)
21 06:42:20.334824 progress 10 % (0 MB)
22 06:42:20.337047 progress 15 % (1 MB)
23 06:42:20.339307 progress 20 % (1 MB)
24 06:42:20.341518 progress 25 % (2 MB)
25 06:42:20.343906 progress 30 % (2 MB)
26 06:42:20.345965 progress 35 % (2 MB)
27 06:42:20.348237 progress 40 % (3 MB)
28 06:42:20.350589 progress 45 % (3 MB)
29 06:42:20.352870 progress 50 % (4 MB)
30 06:42:20.355110 progress 55 % (4 MB)
31 06:42:20.357301 progress 60 % (4 MB)
32 06:42:20.359389 progress 65 % (5 MB)
33 06:42:20.361634 progress 70 % (5 MB)
34 06:42:20.363879 progress 75 % (6 MB)
35 06:42:20.366075 progress 80 % (6 MB)
36 06:42:20.368301 progress 85 % (6 MB)
37 06:42:20.370537 progress 90 % (7 MB)
38 06:42:20.372757 progress 95 % (7 MB)
39 06:42:20.374826 progress 100 % (8 MB)
40 06:42:20.375052 8 MB downloaded in 0.55 s (14.54 MB/s)
41 06:42:20.375210 end: 1.1.1 http-download (duration 00:00:01) [common]
43 06:42:20.375445 end: 1.1 download-retry (duration 00:00:01) [common]
44 06:42:20.375532 start: 1.2 download-retry (timeout 00:09:59) [common]
45 06:42:20.375615 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 06:42:20.375753 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1987-g9e48fc479c400/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 06:42:20.375827 saving as /var/lib/lava/dispatcher/tmp/12205520/tftp-deploy-ry50sqyo/kernel/bzImage
48 06:42:20.375887 total size: 8576912 (8 MB)
49 06:42:20.375947 No compression specified
50 06:42:20.377039 progress 0 % (0 MB)
51 06:42:20.379360 progress 5 % (0 MB)
52 06:42:20.381593 progress 10 % (0 MB)
53 06:42:20.383820 progress 15 % (1 MB)
54 06:42:20.386042 progress 20 % (1 MB)
55 06:42:20.388303 progress 25 % (2 MB)
56 06:42:20.390648 progress 30 % (2 MB)
57 06:42:20.392924 progress 35 % (2 MB)
58 06:42:20.395170 progress 40 % (3 MB)
59 06:42:20.397456 progress 45 % (3 MB)
60 06:42:20.399730 progress 50 % (4 MB)
61 06:42:20.401934 progress 55 % (4 MB)
62 06:42:20.404316 progress 60 % (4 MB)
63 06:42:20.406487 progress 65 % (5 MB)
64 06:42:20.408660 progress 70 % (5 MB)
65 06:42:20.410887 progress 75 % (6 MB)
66 06:42:20.413373 progress 80 % (6 MB)
67 06:42:20.415753 progress 85 % (6 MB)
68 06:42:20.418152 progress 90 % (7 MB)
69 06:42:20.420523 progress 95 % (7 MB)
70 06:42:20.422955 progress 100 % (8 MB)
71 06:42:20.423159 8 MB downloaded in 0.05 s (173.04 MB/s)
72 06:42:20.423301 end: 1.2.1 http-download (duration 00:00:00) [common]
74 06:42:20.423531 end: 1.2 download-retry (duration 00:00:00) [common]
75 06:42:20.423619 start: 1.3 download-retry (timeout 00:09:59) [common]
76 06:42:20.423710 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 06:42:20.423844 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1987-g9e48fc479c400/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 06:42:20.423917 saving as /var/lib/lava/dispatcher/tmp/12205520/tftp-deploy-ry50sqyo/modules/modules.tar
79 06:42:20.423977 total size: 250916 (0 MB)
80 06:42:20.424039 Using unxz to decompress xz
81 06:42:20.428454 progress 13 % (0 MB)
82 06:42:20.428883 progress 26 % (0 MB)
83 06:42:20.429119 progress 39 % (0 MB)
84 06:42:20.430787 progress 52 % (0 MB)
85 06:42:20.432683 progress 65 % (0 MB)
86 06:42:20.434525 progress 78 % (0 MB)
87 06:42:20.436318 progress 91 % (0 MB)
88 06:42:20.438196 progress 100 % (0 MB)
89 06:42:20.443667 0 MB downloaded in 0.02 s (12.16 MB/s)
90 06:42:20.443904 end: 1.3.1 http-download (duration 00:00:00) [common]
92 06:42:20.444163 end: 1.3 download-retry (duration 00:00:00) [common]
93 06:42:20.444254 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 06:42:20.444349 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 06:42:20.444429 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 06:42:20.444513 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 06:42:20.444725 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9
98 06:42:20.444858 makedir: /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin
99 06:42:20.444979 makedir: /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/tests
100 06:42:20.445090 makedir: /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/results
101 06:42:20.445205 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-add-keys
102 06:42:20.445350 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-add-sources
103 06:42:20.445482 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-background-process-start
104 06:42:20.445614 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-background-process-stop
105 06:42:20.445740 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-common-functions
106 06:42:20.445865 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-echo-ipv4
107 06:42:20.445989 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-install-packages
108 06:42:20.446113 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-installed-packages
109 06:42:20.446236 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-os-build
110 06:42:20.446365 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-probe-channel
111 06:42:20.446489 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-probe-ip
112 06:42:20.446613 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-target-ip
113 06:42:20.446799 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-target-mac
114 06:42:20.446970 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-target-storage
115 06:42:20.447194 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-test-case
116 06:42:20.447321 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-test-event
117 06:42:20.447446 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-test-feedback
118 06:42:20.447571 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-test-raise
119 06:42:20.447699 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-test-reference
120 06:42:20.447829 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-test-runner
121 06:42:20.447953 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-test-set
122 06:42:20.448078 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-test-shell
123 06:42:20.448208 Updating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-install-packages (oe)
124 06:42:20.448361 Updating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/bin/lava-installed-packages (oe)
125 06:42:20.448484 Creating /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/environment
126 06:42:20.448584 LAVA metadata
127 06:42:20.448658 - LAVA_JOB_ID=12205520
128 06:42:20.448724 - LAVA_DISPATCHER_IP=192.168.201.1
129 06:42:20.448825 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 06:42:20.448895 skipped lava-vland-overlay
131 06:42:20.448969 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 06:42:20.449047 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 06:42:20.449109 skipped lava-multinode-overlay
134 06:42:20.449180 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 06:42:20.449261 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 06:42:20.449333 Loading test definitions
137 06:42:20.449426 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 06:42:20.449501 Using /lava-12205520 at stage 0
139 06:42:20.449818 uuid=12205520_1.4.2.3.1 testdef=None
140 06:42:20.449908 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 06:42:20.449993 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 06:42:20.450776 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 06:42:20.450998 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 06:42:20.451664 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 06:42:20.451899 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 06:42:20.452522 runner path: /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/0/tests/0_dmesg test_uuid 12205520_1.4.2.3.1
149 06:42:20.452680 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 06:42:20.452900 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 06:42:20.452971 Using /lava-12205520 at stage 1
153 06:42:20.453271 uuid=12205520_1.4.2.3.5 testdef=None
154 06:42:20.453358 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 06:42:20.453440 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 06:42:20.453913 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 06:42:20.454125 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 06:42:20.454829 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 06:42:20.455053 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 06:42:20.455922 runner path: /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/1/tests/1_bootrr test_uuid 12205520_1.4.2.3.5
163 06:42:20.456076 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 06:42:20.456513 Creating lava-test-runner.conf files
166 06:42:20.456578 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/0 for stage 0
167 06:42:20.456668 - 0_dmesg
168 06:42:20.456749 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12205520/lava-overlay-zvc5agd9/lava-12205520/1 for stage 1
169 06:42:20.456877 - 1_bootrr
170 06:42:20.456973 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 06:42:20.457058 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 06:42:20.465845 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 06:42:20.465949 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 06:42:20.466033 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 06:42:20.466119 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 06:42:20.466202 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 06:42:20.717932 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 06:42:20.718298 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 06:42:20.718481 extracting modules file /var/lib/lava/dispatcher/tmp/12205520/tftp-deploy-ry50sqyo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12205520/extract-overlay-ramdisk-i16if2hx/ramdisk
180 06:42:20.731953 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 06:42:20.732109 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 06:42:20.732236 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12205520/compress-overlay-caoejk0h/overlay-1.4.2.4.tar.gz to ramdisk
183 06:42:20.732342 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12205520/compress-overlay-caoejk0h/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12205520/extract-overlay-ramdisk-i16if2hx/ramdisk
184 06:42:20.741697 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 06:42:20.741844 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 06:42:20.741943 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 06:42:20.742032 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 06:42:20.742116 Building ramdisk /var/lib/lava/dispatcher/tmp/12205520/extract-overlay-ramdisk-i16if2hx/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12205520/extract-overlay-ramdisk-i16if2hx/ramdisk
189 06:42:20.893952 >> 49788 blocks
190 06:42:21.768526 rename /var/lib/lava/dispatcher/tmp/12205520/extract-overlay-ramdisk-i16if2hx/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12205520/tftp-deploy-ry50sqyo/ramdisk/ramdisk.cpio.gz
191 06:42:21.768970 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 06:42:21.769098 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 06:42:21.769203 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 06:42:21.769304 No mkimage arch provided, not using FIT.
195 06:42:21.769398 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 06:42:21.769489 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 06:42:21.769594 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 06:42:21.769689 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 06:42:21.769772 No LXC device requested
200 06:42:21.769900 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 06:42:21.770024 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 06:42:21.770109 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 06:42:21.770183 Checking files for TFTP limit of 4294967296 bytes.
204 06:42:21.770677 end: 1 tftp-deploy (duration 00:00:02) [common]
205 06:42:21.770783 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 06:42:21.770875 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 06:42:21.770998 substitutions:
208 06:42:21.771066 - {DTB}: None
209 06:42:21.771129 - {INITRD}: 12205520/tftp-deploy-ry50sqyo/ramdisk/ramdisk.cpio.gz
210 06:42:21.771188 - {KERNEL}: 12205520/tftp-deploy-ry50sqyo/kernel/bzImage
211 06:42:21.771246 - {LAVA_MAC}: None
212 06:42:21.771303 - {PRESEED_CONFIG}: None
213 06:42:21.771359 - {PRESEED_LOCAL}: None
214 06:42:21.771413 - {RAMDISK}: 12205520/tftp-deploy-ry50sqyo/ramdisk/ramdisk.cpio.gz
215 06:42:21.771467 - {ROOT_PART}: None
216 06:42:21.771521 - {ROOT}: None
217 06:42:21.771582 - {SERVER_IP}: 192.168.201.1
218 06:42:21.771638 - {TEE}: None
219 06:42:21.771692 Parsed boot commands:
220 06:42:21.771745 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 06:42:21.771928 Parsed boot commands: tftpboot 192.168.201.1 12205520/tftp-deploy-ry50sqyo/kernel/bzImage 12205520/tftp-deploy-ry50sqyo/kernel/cmdline 12205520/tftp-deploy-ry50sqyo/ramdisk/ramdisk.cpio.gz
222 06:42:21.772020 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 06:42:21.772103 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 06:42:21.772201 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 06:42:21.772333 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 06:42:21.772431 Not connected, no need to disconnect.
227 06:42:21.772518 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 06:42:21.772606 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 06:42:21.772677 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-9'
230 06:42:21.776801 Setting prompt string to ['lava-test: # ']
231 06:42:21.777199 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 06:42:21.777347 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 06:42:21.777473 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 06:42:21.777566 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 06:42:21.777762 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-9' '--port=1' '--command=reboot'
236 06:42:26.912961 >> Command sent successfully.
237 06:42:26.915950 Returned 0 in 5 seconds
238 06:42:27.016407 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 06:42:27.016875 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 06:42:27.017023 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 06:42:27.017153 Setting prompt string to 'Starting depthcharge on Magolor...'
243 06:42:27.017259 Changing prompt to 'Starting depthcharge on Magolor...'
244 06:42:27.017372 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 06:42:27.017755 [Enter `^Ec?' for help]
246 06:42:28.159846
247 06:42:28.160038
248 06:42:28.170760 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 06:42:28.173523 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 06:42:28.177110 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 06:42:28.183956 CPU: AES supported, TXT NOT supported, VT supported
252 06:42:28.187400 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 06:42:28.193490 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 06:42:28.197047 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 06:42:28.200248 VBOOT: Loading verstage.
256 06:42:28.206738 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 06:42:28.210368 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 06:42:28.217064 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 06:42:28.220532 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 06:42:28.224385
261 06:42:28.224469
262 06:42:28.234443 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 06:42:28.248180 Probing TPM: . done!
264 06:42:28.251485 TPM ready after 0 ms
265 06:42:28.254978 Connected to device vid:did:rid of 1ae0:0028:00
266 06:42:28.266745 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
267 06:42:28.273197 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 06:42:28.328431 Initialized TPM device CR50 revision 0
269 06:42:28.337825 tlcl_send_startup: Startup return code is 0
270 06:42:28.337962 TPM: setup succeeded
271 06:42:28.353535 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 06:42:28.367811 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 06:42:28.383572 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 06:42:28.395470 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 06:42:28.399092 Chrome EC: UHEPI supported
276 06:42:28.399228 Phase 1
277 06:42:28.405464 FMAP: area GBB found @ c05000 (12288 bytes)
278 06:42:28.412720 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 06:42:28.415744 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 06:42:28.419811 Recovery requested (1009000e)
281 06:42:28.426124 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 06:42:28.436595 tlcl_extend: response is 0
283 06:42:28.442722 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 06:42:28.451922 tlcl_extend: response is 0
285 06:42:28.458522 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 06:42:28.461820 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 06:42:28.468678 BS: verstage times (exec / console): total (unknown) / 124 ms
288 06:42:28.468772
289 06:42:28.472406
290 06:42:28.479257 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 06:42:28.486346 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 06:42:28.492643 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 06:42:28.496620 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 06:42:28.499830 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 06:42:28.506026 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 06:42:28.509529 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
297 06:42:28.513040 TCO_STS: 0000 0001
298 06:42:28.513128 GEN_PMCON: d0015038 00002200
299 06:42:28.516326 GBLRST_CAUSE: 00000000 00000000
300 06:42:28.519713 prev_sleep_state 5
301 06:42:28.523029 Boot Count incremented to 7274
302 06:42:28.529410 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 06:42:28.533227 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 06:42:28.536656 Chrome EC: UHEPI supported
305 06:42:28.542749 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 06:42:28.549240 Probing TPM: done!
307 06:42:28.555692 Connected to device vid:did:rid of 1ae0:0028:00
308 06:42:28.565601 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
309 06:42:28.576070 Initialized TPM device CR50 revision 0
310 06:42:28.586745 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 06:42:28.593937 MRC: Hash idx 0x100b comparison successful.
312 06:42:28.594042 MRC cache found, size 5458
313 06:42:28.597469 bootmode is set to: 2
314 06:42:28.600666 SPD INDEX = 0
315 06:42:28.603951 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 06:42:28.607451 SPD: module type is LPDDR4X
317 06:42:28.610835 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 06:42:28.617136 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 06:42:28.623732 SPD: device width 16 bits, bus width 32 bits
320 06:42:28.626985 SPD: module size is 4096 MB (per channel)
321 06:42:28.630794 meminit_channels: DRAM half-populated
322 06:42:28.712278 CBMEM:
323 06:42:28.715196 IMD: root @ 0x76fff000 254 entries.
324 06:42:28.718585 IMD: root @ 0x76ffec00 62 entries.
325 06:42:28.722011 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 06:42:28.728333 WARNING: RO_VPD is uninitialized or empty.
327 06:42:28.731751 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 06:42:28.735492 External stage cache:
329 06:42:28.738972 IMD: root @ 0x7b3ff000 254 entries.
330 06:42:28.742400 IMD: root @ 0x7b3fec00 62 entries.
331 06:42:28.752635 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 06:42:28.758924 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 06:42:28.765620 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 06:42:28.773799 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 06:42:28.777680 cse_lite: Skip switching to RW in the recovery path
336 06:42:28.780450 1 DIMMs found
337 06:42:28.780579 SMM Memory Map
338 06:42:28.783438 SMRAM : 0x7b000000 0x800000
339 06:42:28.786718 Subregion 0: 0x7b000000 0x200000
340 06:42:28.790196 Subregion 1: 0x7b200000 0x200000
341 06:42:28.793535 Subregion 2: 0x7b400000 0x400000
342 06:42:28.796922 top_of_ram = 0x77000000
343 06:42:28.803365 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 06:42:28.807023 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 06:42:28.813553 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 06:42:28.817021 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 06:42:28.823779 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 06:42:28.835623 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 06:42:28.841946 Processing 188 relocs. Offset value of 0x74c0e000
350 06:42:28.848555 BS: romstage times (exec / console): total (unknown) / 255 ms
351 06:42:28.853272
352 06:42:28.853371
353 06:42:28.863596 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 06:42:28.870331 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 06:42:28.873286 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 06:42:28.879783 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 06:42:28.935646 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 06:42:28.942214 Processing 4805 relocs. Offset value of 0x75da8000
359 06:42:28.945700 BS: postcar times (exec / console): total (unknown) / 42 ms
360 06:42:28.949185
361 06:42:28.949282
362 06:42:28.958770 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 06:42:28.958889 Normal boot
364 06:42:28.962427 EC returned error result code 3
365 06:42:28.966206 FW_CONFIG value is 0x204
366 06:42:28.969238 GENERIC: 0.0 disabled by fw_config
367 06:42:28.976055 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 06:42:28.979850 I2C: 00:10 disabled by fw_config
369 06:42:28.982427 I2C: 00:10 disabled by fw_config
370 06:42:28.985604 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 06:42:28.992532 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 06:42:28.995699 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 06:42:29.002042 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 06:42:29.005678 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 06:42:29.008912 I2C: 00:10 disabled by fw_config
376 06:42:29.015787 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 06:42:29.022457 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 06:42:29.025474 I2C: 00:1a disabled by fw_config
379 06:42:29.029075 I2C: 00:1a disabled by fw_config
380 06:42:29.035356 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 06:42:29.038494 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 06:42:29.042155 GENERIC: 0.0 disabled by fw_config
383 06:42:29.048687 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 06:42:29.052201 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 06:42:29.058656 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 06:42:29.061853 microcode: Update skipped, already up-to-date
387 06:42:29.068422 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 06:42:29.094425 Detected 2 core, 2 thread CPU.
389 06:42:29.097847 Setting up SMI for CPU
390 06:42:29.100971 IED base = 0x7b400000
391 06:42:29.101058 IED size = 0x00400000
392 06:42:29.104008 Will perform SMM setup.
393 06:42:29.107574 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 06:42:29.117265 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 06:42:29.120799 Processing 16 relocs. Offset value of 0x00030000
396 06:42:29.124820 Attempting to start 1 APs
397 06:42:29.128125 Waiting for 10ms after sending INIT.
398 06:42:29.144633 Waiting for 1st SIPI to complete...done.
399 06:42:29.144751 AP: slot 1 apic_id 2.
400 06:42:29.150609 Waiting for 2nd SIPI to complete...done.
401 06:42:29.157357 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 06:42:29.164583 Processing 13 relocs. Offset value of 0x00038000
403 06:42:29.164699 Unable to locate Global NVS
404 06:42:29.174130 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 06:42:29.177431 Installing permanent SMM handler to 0x7b000000
406 06:42:29.187625 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 06:42:29.190343 Processing 704 relocs. Offset value of 0x7b010000
408 06:42:29.200655 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 06:42:29.203694 Processing 13 relocs. Offset value of 0x7b008000
410 06:42:29.210746 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 06:42:29.213459 Unable to locate Global NVS
412 06:42:29.220050 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 06:42:29.223510 Clearing SMI status registers
414 06:42:29.223742 SMI_STS: PM1
415 06:42:29.226524 PM1_STS: PWRBTN
416 06:42:29.226609 TCO_STS: INTRD_DET
417 06:42:29.230052 GPE0 STD STS:
418 06:42:29.236837 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
419 06:42:29.239944 In relocation handler: CPU 0
420 06:42:29.243342 New SMBASE=0x7b000000 IEDBASE=0x7b400000
421 06:42:29.250050 Writing SMRR. base = 0x7b000006, mask=0xff800800
422 06:42:29.250162 Relocation complete.
423 06:42:29.257407 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
424 06:42:29.261415 In relocation handler: CPU 1
425 06:42:29.264524 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
426 06:42:29.271328 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 06:42:29.271495 Relocation complete.
428 06:42:29.274146 Initializing CPU #0
429 06:42:29.277959 CPU: vendor Intel device 906c0
430 06:42:29.281025 CPU: family 06, model 9c, stepping 00
431 06:42:29.284239 Clearing out pending MCEs
432 06:42:29.287629 Setting up local APIC...
433 06:42:29.287761 apic_id: 0x00 done.
434 06:42:29.290823 Turbo is available but hidden
435 06:42:29.294329 Turbo is available and visible
436 06:42:29.301198 microcode: Update skipped, already up-to-date
437 06:42:29.301379 CPU #0 initialized
438 06:42:29.304433 Initializing CPU #1
439 06:42:29.307144 CPU: vendor Intel device 906c0
440 06:42:29.310771 CPU: family 06, model 9c, stepping 00
441 06:42:29.313921 Clearing out pending MCEs
442 06:42:29.317316 Setting up local APIC...
443 06:42:29.317446 apic_id: 0x02 done.
444 06:42:29.323850 microcode: Update skipped, already up-to-date
445 06:42:29.323986 CPU #1 initialized
446 06:42:29.327111 bsp_do_flight_plan done after 175 msecs.
447 06:42:29.330630 CPU: frequency set to 2800 MHz
448 06:42:29.334227 Enabling SMIs.
449 06:42:29.340246 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 288 ms
450 06:42:29.350058 Probing TPM: done!
451 06:42:29.356450 Connected to device vid:did:rid of 1ae0:0028:00
452 06:42:29.367451 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
453 06:42:29.369884 Initialized TPM device CR50 revision 0
454 06:42:29.373226 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
455 06:42:29.380422 Found a VBT of 7680 bytes after decompression
456 06:42:29.386895 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 06:42:29.422931 Detected 2 core, 2 thread CPU.
458 06:42:29.425538 Detected 2 core, 2 thread CPU.
459 06:42:29.788536 Display FSP Version Info HOB
460 06:42:29.791929 Reference Code - CPU = 8.7.22.30
461 06:42:29.795359 uCode Version = 24.0.0.1f
462 06:42:29.798602 TXT ACM version = ff.ff.ff.ffff
463 06:42:29.801702 Reference Code - ME = 8.7.22.30
464 06:42:29.805705 MEBx version = 0.0.0.0
465 06:42:29.808835 ME Firmware Version = Consumer SKU
466 06:42:29.811922 Reference Code - PCH = 8.7.22.30
467 06:42:29.815349 PCH-CRID Status = Disabled
468 06:42:29.818277 PCH-CRID Original Value = ff.ff.ff.ffff
469 06:42:29.821935 PCH-CRID New Value = ff.ff.ff.ffff
470 06:42:29.825609 OPROM - RST - RAID = ff.ff.ff.ffff
471 06:42:29.828275 PCH Hsio Version = 4.0.0.0
472 06:42:29.831806 Reference Code - SA - System Agent = 8.7.22.30
473 06:42:29.834991 Reference Code - MRC = 0.0.4.68
474 06:42:29.840259 SA - PCIe Version = 8.7.22.30
475 06:42:29.842547 SA-CRID Status = Disabled
476 06:42:29.845952 SA-CRID Original Value = 0.0.0.0
477 06:42:29.846143 SA-CRID New Value = 0.0.0.0
478 06:42:29.849190 OPROM - VBIOS = ff.ff.ff.ffff
479 06:42:29.856436 IO Manageability Engine FW Version = ff.ff.ff.ffff
480 06:42:29.859806 PHY Build Version = ff.ff.ff.ffff
481 06:42:29.863007 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
482 06:42:29.869814 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
483 06:42:29.873072 ITSS IRQ Polarities Before:
484 06:42:29.873257 IPC0: 0xffffffff
485 06:42:29.876132 IPC1: 0xffffffff
486 06:42:29.876293 IPC2: 0xffffffff
487 06:42:29.879863 IPC3: 0xffffffff
488 06:42:29.883151 ITSS IRQ Polarities After:
489 06:42:29.883331 IPC0: 0xffffffff
490 06:42:29.886292 IPC1: 0xffffffff
491 06:42:29.886446 IPC2: 0xffffffff
492 06:42:29.890503 IPC3: 0xffffffff
493 06:42:29.899205 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
494 06:42:29.905895 BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
495 06:42:29.909182 Enumerating buses...
496 06:42:29.912597 Show all devs... Before device enumeration.
497 06:42:29.915954 Root Device: enabled 1
498 06:42:29.918900 CPU_CLUSTER: 0: enabled 1
499 06:42:29.922307 DOMAIN: 0000: enabled 1
500 06:42:29.922454 PCI: 00:00.0: enabled 1
501 06:42:29.926063 PCI: 00:02.0: enabled 1
502 06:42:29.929554 PCI: 00:04.0: enabled 1
503 06:42:29.932497 PCI: 00:05.0: enabled 1
504 06:42:29.932660 PCI: 00:09.0: enabled 0
505 06:42:29.935722 PCI: 00:12.6: enabled 0
506 06:42:29.938818 PCI: 00:14.0: enabled 1
507 06:42:29.938967 PCI: 00:14.1: enabled 0
508 06:42:29.942225 PCI: 00:14.2: enabled 0
509 06:42:29.945540 PCI: 00:14.3: enabled 1
510 06:42:29.948848 PCI: 00:14.5: enabled 1
511 06:42:29.949015 PCI: 00:15.0: enabled 1
512 06:42:29.952485 PCI: 00:15.1: enabled 1
513 06:42:29.956084 PCI: 00:15.2: enabled 1
514 06:42:29.959086 PCI: 00:15.3: enabled 1
515 06:42:29.959265 PCI: 00:16.0: enabled 1
516 06:42:29.961866 PCI: 00:16.1: enabled 0
517 06:42:29.965460 PCI: 00:16.4: enabled 0
518 06:42:29.968484 PCI: 00:16.5: enabled 0
519 06:42:29.968656 PCI: 00:17.0: enabled 0
520 06:42:29.972110 PCI: 00:19.0: enabled 1
521 06:42:29.975374 PCI: 00:19.1: enabled 0
522 06:42:29.978428 PCI: 00:19.2: enabled 1
523 06:42:29.978608 PCI: 00:1a.0: enabled 1
524 06:42:29.981957 PCI: 00:1c.0: enabled 0
525 06:42:29.985390 PCI: 00:1c.1: enabled 0
526 06:42:29.985574 PCI: 00:1c.2: enabled 0
527 06:42:29.988744 PCI: 00:1c.3: enabled 0
528 06:42:29.992526 PCI: 00:1c.4: enabled 0
529 06:42:29.995303 PCI: 00:1c.5: enabled 0
530 06:42:29.995480 PCI: 00:1c.6: enabled 0
531 06:42:29.998589 PCI: 00:1c.7: enabled 1
532 06:42:30.002528 PCI: 00:1e.0: enabled 0
533 06:42:30.004987 PCI: 00:1e.1: enabled 0
534 06:42:30.005089 PCI: 00:1e.2: enabled 1
535 06:42:30.008307 PCI: 00:1e.3: enabled 0
536 06:42:30.012094 PCI: 00:1f.0: enabled 1
537 06:42:30.015190 PCI: 00:1f.1: enabled 1
538 06:42:30.015284 PCI: 00:1f.2: enabled 1
539 06:42:30.018495 PCI: 00:1f.3: enabled 1
540 06:42:30.021625 PCI: 00:1f.4: enabled 0
541 06:42:30.021722 PCI: 00:1f.5: enabled 1
542 06:42:30.025169 PCI: 00:1f.7: enabled 0
543 06:42:30.028326 GENERIC: 0.0: enabled 1
544 06:42:30.031804 GENERIC: 0.0: enabled 1
545 06:42:30.031901 USB0 port 0: enabled 1
546 06:42:30.034905 GENERIC: 0.0: enabled 1
547 06:42:30.038169 I2C: 00:2c: enabled 1
548 06:42:30.038292 I2C: 00:15: enabled 1
549 06:42:30.041748 GENERIC: 0.0: enabled 0
550 06:42:30.045334 I2C: 00:15: enabled 1
551 06:42:30.048136 I2C: 00:10: enabled 0
552 06:42:30.048236 I2C: 00:10: enabled 0
553 06:42:30.051672 I2C: 00:2c: enabled 1
554 06:42:30.054905 I2C: 00:40: enabled 1
555 06:42:30.055011 I2C: 00:10: enabled 1
556 06:42:30.058097 I2C: 00:39: enabled 1
557 06:42:30.061707 I2C: 00:36: enabled 1
558 06:42:30.061812 I2C: 00:10: enabled 0
559 06:42:30.064972 I2C: 00:0c: enabled 1
560 06:42:30.068321 I2C: 00:50: enabled 1
561 06:42:30.068416 I2C: 00:1a: enabled 1
562 06:42:30.071661 I2C: 00:1a: enabled 0
563 06:42:30.075599 I2C: 00:1a: enabled 0
564 06:42:30.075685 I2C: 00:28: enabled 1
565 06:42:30.078051 I2C: 00:29: enabled 1
566 06:42:30.081534 PCI: 00:00.0: enabled 1
567 06:42:30.081625 SPI: 00: enabled 1
568 06:42:30.084633 PNP: 0c09.0: enabled 1
569 06:42:30.088151 GENERIC: 0.0: enabled 0
570 06:42:30.088236 USB2 port 0: enabled 1
571 06:42:30.091068 USB2 port 1: enabled 1
572 06:42:30.094832 USB2 port 2: enabled 1
573 06:42:30.098214 USB2 port 3: enabled 1
574 06:42:30.098298 USB2 port 4: enabled 0
575 06:42:30.101212 USB2 port 5: enabled 1
576 06:42:30.104371 USB2 port 6: enabled 0
577 06:42:30.104455 USB2 port 7: enabled 1
578 06:42:30.108240 USB3 port 0: enabled 1
579 06:42:30.111953 USB3 port 1: enabled 1
580 06:42:30.114554 USB3 port 2: enabled 1
581 06:42:30.114645 USB3 port 3: enabled 1
582 06:42:30.117621 APIC: 00: enabled 1
583 06:42:30.117702 APIC: 02: enabled 1
584 06:42:30.120993 Compare with tree...
585 06:42:30.124693 Root Device: enabled 1
586 06:42:30.127537 CPU_CLUSTER: 0: enabled 1
587 06:42:30.127619 APIC: 00: enabled 1
588 06:42:30.131033 APIC: 02: enabled 1
589 06:42:30.134205 DOMAIN: 0000: enabled 1
590 06:42:30.137396 PCI: 00:00.0: enabled 1
591 06:42:30.137486 PCI: 00:02.0: enabled 1
592 06:42:30.140860 PCI: 00:04.0: enabled 1
593 06:42:30.144443 GENERIC: 0.0: enabled 1
594 06:42:30.147289 PCI: 00:05.0: enabled 1
595 06:42:30.151202 GENERIC: 0.0: enabled 1
596 06:42:30.151285 PCI: 00:09.0: enabled 0
597 06:42:30.153927 PCI: 00:12.6: enabled 0
598 06:42:30.157596 PCI: 00:14.0: enabled 1
599 06:42:30.160725 USB0 port 0: enabled 1
600 06:42:30.164154 USB2 port 0: enabled 1
601 06:42:30.164245 USB2 port 1: enabled 1
602 06:42:30.167444 USB2 port 2: enabled 1
603 06:42:30.170739 USB2 port 3: enabled 1
604 06:42:30.173723 USB2 port 4: enabled 0
605 06:42:30.177387 USB2 port 5: enabled 1
606 06:42:30.180723 USB2 port 6: enabled 0
607 06:42:30.180807 USB2 port 7: enabled 1
608 06:42:30.183786 USB3 port 0: enabled 1
609 06:42:30.187137 USB3 port 1: enabled 1
610 06:42:30.190361 USB3 port 2: enabled 1
611 06:42:30.193705 USB3 port 3: enabled 1
612 06:42:30.193790 PCI: 00:14.1: enabled 0
613 06:42:30.197702 PCI: 00:14.2: enabled 0
614 06:42:30.200168 PCI: 00:14.3: enabled 1
615 06:42:30.203671 GENERIC: 0.0: enabled 1
616 06:42:30.207232 PCI: 00:14.5: enabled 1
617 06:42:30.207320 PCI: 00:15.0: enabled 1
618 06:42:30.210813 I2C: 00:2c: enabled 1
619 06:42:30.213417 I2C: 00:15: enabled 1
620 06:42:30.216734 PCI: 00:15.1: enabled 1
621 06:42:30.220233 PCI: 00:15.2: enabled 1
622 06:42:30.220321 GENERIC: 0.0: enabled 0
623 06:42:30.223677 I2C: 00:15: enabled 1
624 06:42:30.226829 I2C: 00:10: enabled 0
625 06:42:30.230611 I2C: 00:10: enabled 0
626 06:42:30.230742 I2C: 00:2c: enabled 1
627 06:42:30.233356 I2C: 00:40: enabled 1
628 06:42:30.237183 I2C: 00:10: enabled 1
629 06:42:30.239976 I2C: 00:39: enabled 1
630 06:42:30.243116 PCI: 00:15.3: enabled 1
631 06:42:30.243199 I2C: 00:36: enabled 1
632 06:42:30.246854 I2C: 00:10: enabled 0
633 06:42:30.249796 I2C: 00:0c: enabled 1
634 06:42:30.253027 I2C: 00:50: enabled 1
635 06:42:30.253114 PCI: 00:16.0: enabled 1
636 06:42:30.256879 PCI: 00:16.1: enabled 0
637 06:42:30.259922 PCI: 00:16.4: enabled 0
638 06:42:30.263518 PCI: 00:16.5: enabled 0
639 06:42:30.266632 PCI: 00:17.0: enabled 0
640 06:42:30.266736 PCI: 00:19.0: enabled 1
641 06:42:30.270269 I2C: 00:1a: enabled 1
642 06:42:30.272952 I2C: 00:1a: enabled 0
643 06:42:30.276314 I2C: 00:1a: enabled 0
644 06:42:30.276400 I2C: 00:28: enabled 1
645 06:42:30.279739 I2C: 00:29: enabled 1
646 06:42:30.283087 PCI: 00:19.1: enabled 0
647 06:42:30.286542 PCI: 00:19.2: enabled 1
648 06:42:30.289625 PCI: 00:1a.0: enabled 1
649 06:42:30.289711 PCI: 00:1e.0: enabled 0
650 06:42:30.293095 PCI: 00:1e.1: enabled 0
651 06:42:30.296410 PCI: 00:1e.2: enabled 1
652 06:42:30.299817 SPI: 00: enabled 1
653 06:42:30.299905 PCI: 00:1e.3: enabled 0
654 06:42:30.302669 PCI: 00:1f.0: enabled 1
655 06:42:30.306213 PNP: 0c09.0: enabled 1
656 06:42:30.309206 PCI: 00:1f.1: enabled 1
657 06:42:30.312549 PCI: 00:1f.2: enabled 1
658 06:42:30.312637 PCI: 00:1f.3: enabled 1
659 06:42:30.316162 GENERIC: 0.0: enabled 0
660 06:42:30.319433 PCI: 00:1f.4: enabled 0
661 06:42:30.322723 PCI: 00:1f.5: enabled 1
662 06:42:30.326492 PCI: 00:1f.7: enabled 0
663 06:42:30.326605 Root Device scanning...
664 06:42:30.329245 scan_static_bus for Root Device
665 06:42:30.332448 CPU_CLUSTER: 0 enabled
666 06:42:30.335885 DOMAIN: 0000 enabled
667 06:42:30.336015 DOMAIN: 0000 scanning...
668 06:42:30.339663 PCI: pci_scan_bus for bus 00
669 06:42:30.342705 PCI: 00:00.0 [8086/0000] ops
670 06:42:30.346143 PCI: 00:00.0 [8086/4e22] enabled
671 06:42:30.349046 PCI: 00:02.0 [8086/0000] bus ops
672 06:42:30.352681 PCI: 00:02.0 [8086/4e55] enabled
673 06:42:30.355923 PCI: 00:04.0 [8086/0000] bus ops
674 06:42:30.358924 PCI: 00:04.0 [8086/4e03] enabled
675 06:42:30.362663 PCI: 00:05.0 [8086/0000] bus ops
676 06:42:30.366041 PCI: 00:05.0 [8086/4e19] enabled
677 06:42:30.369432 PCI: 00:08.0 [8086/4e11] enabled
678 06:42:30.373365 PCI: 00:14.0 [8086/0000] bus ops
679 06:42:30.375844 PCI: 00:14.0 [8086/4ded] enabled
680 06:42:30.378833 PCI: 00:14.2 [8086/4def] disabled
681 06:42:30.382268 PCI: 00:14.3 [8086/0000] bus ops
682 06:42:30.385750 PCI: 00:14.3 [8086/4df0] enabled
683 06:42:30.389458 PCI: 00:14.5 [8086/0000] ops
684 06:42:30.392575 PCI: 00:14.5 [8086/4df8] enabled
685 06:42:30.395539 PCI: 00:15.0 [8086/0000] bus ops
686 06:42:30.398602 PCI: 00:15.0 [8086/4de8] enabled
687 06:42:30.402861 PCI: 00:15.1 [8086/0000] bus ops
688 06:42:30.405337 PCI: 00:15.1 [8086/4de9] enabled
689 06:42:30.409103 PCI: 00:15.2 [8086/0000] bus ops
690 06:42:30.412016 PCI: 00:15.2 [8086/4dea] enabled
691 06:42:30.415498 PCI: 00:15.3 [8086/0000] bus ops
692 06:42:30.419106 PCI: 00:15.3 [8086/4deb] enabled
693 06:42:30.422089 PCI: 00:16.0 [8086/0000] ops
694 06:42:30.425746 PCI: 00:16.0 [8086/4de0] enabled
695 06:42:30.429101 PCI: 00:19.0 [8086/0000] bus ops
696 06:42:30.432817 PCI: 00:19.0 [8086/4dc5] enabled
697 06:42:30.435704 PCI: 00:19.2 [8086/0000] ops
698 06:42:30.438681 PCI: 00:19.2 [8086/4dc7] enabled
699 06:42:30.441931 PCI: 00:1a.0 [8086/0000] ops
700 06:42:30.445305 PCI: 00:1a.0 [8086/4dc4] enabled
701 06:42:30.449419 PCI: 00:1e.0 [8086/0000] ops
702 06:42:30.451906 PCI: 00:1e.0 [8086/4da8] disabled
703 06:42:30.455869 PCI: 00:1e.2 [8086/0000] bus ops
704 06:42:30.458744 PCI: 00:1e.2 [8086/4daa] enabled
705 06:42:30.462026 PCI: 00:1f.0 [8086/0000] bus ops
706 06:42:30.465948 PCI: 00:1f.0 [8086/4d87] enabled
707 06:42:30.468494 PCI: Static device PCI: 00:1f.1 not found, disabling it.
708 06:42:30.471956 RTC Init
709 06:42:30.475127 Set power on after power failure.
710 06:42:30.475234 Disabling Deep S3
711 06:42:30.478812 Disabling Deep S3
712 06:42:30.481606 Disabling Deep S4
713 06:42:30.481712 Disabling Deep S4
714 06:42:30.484993 Disabling Deep S5
715 06:42:30.485097 Disabling Deep S5
716 06:42:30.488725 PCI: 00:1f.2 [0000/0000] hidden
717 06:42:30.491597 PCI: 00:1f.3 [8086/0000] bus ops
718 06:42:30.495096 PCI: 00:1f.3 [8086/4dc8] enabled
719 06:42:30.498116 PCI: 00:1f.5 [8086/0000] bus ops
720 06:42:30.501662 PCI: 00:1f.5 [8086/4da4] enabled
721 06:42:30.504855 PCI: Leftover static devices:
722 06:42:30.508194 PCI: 00:12.6
723 06:42:30.508301 PCI: 00:09.0
724 06:42:30.508393 PCI: 00:14.1
725 06:42:30.511880 PCI: 00:16.1
726 06:42:30.511986 PCI: 00:16.4
727 06:42:30.514883 PCI: 00:16.5
728 06:42:30.514986 PCI: 00:17.0
729 06:42:30.515076 PCI: 00:19.1
730 06:42:30.518131 PCI: 00:1e.1
731 06:42:30.518239 PCI: 00:1e.3
732 06:42:30.522254 PCI: 00:1f.1
733 06:42:30.522356 PCI: 00:1f.4
734 06:42:30.522448 PCI: 00:1f.7
735 06:42:30.526301 PCI: Check your devicetree.cb.
736 06:42:30.529904 PCI: 00:02.0 scanning...
737 06:42:30.532111 scan_generic_bus for PCI: 00:02.0
738 06:42:30.535704 scan_generic_bus for PCI: 00:02.0 done
739 06:42:30.542229 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
740 06:42:30.542349 PCI: 00:04.0 scanning...
741 06:42:30.545541 scan_generic_bus for PCI: 00:04.0
742 06:42:30.549255 GENERIC: 0.0 enabled
743 06:42:30.555375 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
744 06:42:30.558769 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
745 06:42:30.561774 PCI: 00:05.0 scanning...
746 06:42:30.565290 scan_generic_bus for PCI: 00:05.0
747 06:42:30.568852 GENERIC: 0.0 enabled
748 06:42:30.575542 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
749 06:42:30.578726 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
750 06:42:30.582041 PCI: 00:14.0 scanning...
751 06:42:30.585598 scan_static_bus for PCI: 00:14.0
752 06:42:30.585708 USB0 port 0 enabled
753 06:42:30.588349 USB0 port 0 scanning...
754 06:42:30.591751 scan_static_bus for USB0 port 0
755 06:42:30.595763 USB2 port 0 enabled
756 06:42:30.595873 USB2 port 1 enabled
757 06:42:30.598555 USB2 port 2 enabled
758 06:42:30.601638 USB2 port 3 enabled
759 06:42:30.601743 USB2 port 4 disabled
760 06:42:30.605297 USB2 port 5 enabled
761 06:42:30.608348 USB2 port 6 disabled
762 06:42:30.608457 USB2 port 7 enabled
763 06:42:30.611725 USB3 port 0 enabled
764 06:42:30.611829 USB3 port 1 enabled
765 06:42:30.614841 USB3 port 2 enabled
766 06:42:30.618321 USB3 port 3 enabled
767 06:42:30.618424 USB2 port 0 scanning...
768 06:42:30.621764 scan_static_bus for USB2 port 0
769 06:42:30.628231 scan_static_bus for USB2 port 0 done
770 06:42:30.631420 scan_bus: bus USB2 port 0 finished in 6 msecs
771 06:42:30.634956 USB2 port 1 scanning...
772 06:42:30.638138 scan_static_bus for USB2 port 1
773 06:42:30.642128 scan_static_bus for USB2 port 1 done
774 06:42:30.645163 scan_bus: bus USB2 port 1 finished in 6 msecs
775 06:42:30.648453 USB2 port 2 scanning...
776 06:42:30.651382 scan_static_bus for USB2 port 2
777 06:42:30.655563 scan_static_bus for USB2 port 2 done
778 06:42:30.658223 scan_bus: bus USB2 port 2 finished in 6 msecs
779 06:42:30.661767 USB2 port 3 scanning...
780 06:42:30.664648 scan_static_bus for USB2 port 3
781 06:42:30.668028 scan_static_bus for USB2 port 3 done
782 06:42:30.674983 scan_bus: bus USB2 port 3 finished in 6 msecs
783 06:42:30.675072 USB2 port 5 scanning...
784 06:42:30.678275 scan_static_bus for USB2 port 5
785 06:42:30.684717 scan_static_bus for USB2 port 5 done
786 06:42:30.687887 scan_bus: bus USB2 port 5 finished in 6 msecs
787 06:42:30.691791 USB2 port 7 scanning...
788 06:42:30.694543 scan_static_bus for USB2 port 7
789 06:42:30.697768 scan_static_bus for USB2 port 7 done
790 06:42:30.700965 scan_bus: bus USB2 port 7 finished in 6 msecs
791 06:42:30.704892 USB3 port 0 scanning...
792 06:42:30.708308 scan_static_bus for USB3 port 0
793 06:42:30.710845 scan_static_bus for USB3 port 0 done
794 06:42:30.714152 scan_bus: bus USB3 port 0 finished in 6 msecs
795 06:42:30.717529 USB3 port 1 scanning...
796 06:42:30.721076 scan_static_bus for USB3 port 1
797 06:42:30.724751 scan_static_bus for USB3 port 1 done
798 06:42:30.730567 scan_bus: bus USB3 port 1 finished in 6 msecs
799 06:42:30.730679 USB3 port 2 scanning...
800 06:42:30.734293 scan_static_bus for USB3 port 2
801 06:42:30.741289 scan_static_bus for USB3 port 2 done
802 06:42:30.744145 scan_bus: bus USB3 port 2 finished in 6 msecs
803 06:42:30.747535 USB3 port 3 scanning...
804 06:42:30.751181 scan_static_bus for USB3 port 3
805 06:42:30.754010 scan_static_bus for USB3 port 3 done
806 06:42:30.757823 scan_bus: bus USB3 port 3 finished in 6 msecs
807 06:42:30.760784 scan_static_bus for USB0 port 0 done
808 06:42:30.767586 scan_bus: bus USB0 port 0 finished in 172 msecs
809 06:42:30.770524 scan_static_bus for PCI: 00:14.0 done
810 06:42:30.774243 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
811 06:42:30.777455 PCI: 00:14.3 scanning...
812 06:42:30.781055 scan_static_bus for PCI: 00:14.3
813 06:42:30.784279 GENERIC: 0.0 enabled
814 06:42:30.787355 scan_static_bus for PCI: 00:14.3 done
815 06:42:30.791018 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
816 06:42:30.794116 PCI: 00:15.0 scanning...
817 06:42:30.797853 scan_static_bus for PCI: 00:15.0
818 06:42:30.800425 I2C: 00:2c enabled
819 06:42:30.800510 I2C: 00:15 enabled
820 06:42:30.803795 scan_static_bus for PCI: 00:15.0 done
821 06:42:30.810468 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
822 06:42:30.814222 PCI: 00:15.1 scanning...
823 06:42:30.818073 scan_static_bus for PCI: 00:15.1
824 06:42:30.820573 scan_static_bus for PCI: 00:15.1 done
825 06:42:30.823541 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
826 06:42:30.826981 PCI: 00:15.2 scanning...
827 06:42:30.830504 scan_static_bus for PCI: 00:15.2
828 06:42:30.833746 GENERIC: 0.0 disabled
829 06:42:30.833834 I2C: 00:15 enabled
830 06:42:30.837619 I2C: 00:10 disabled
831 06:42:30.840293 I2C: 00:10 disabled
832 06:42:30.840376 I2C: 00:2c enabled
833 06:42:30.843536 I2C: 00:40 enabled
834 06:42:30.843618 I2C: 00:10 enabled
835 06:42:30.846905 I2C: 00:39 enabled
836 06:42:30.850208 scan_static_bus for PCI: 00:15.2 done
837 06:42:30.856815 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
838 06:42:30.856900 PCI: 00:15.3 scanning...
839 06:42:30.859945 scan_static_bus for PCI: 00:15.3
840 06:42:30.863246 I2C: 00:36 enabled
841 06:42:30.866454 I2C: 00:10 disabled
842 06:42:30.866599 I2C: 00:0c enabled
843 06:42:30.870075 I2C: 00:50 enabled
844 06:42:30.873111 scan_static_bus for PCI: 00:15.3 done
845 06:42:30.876935 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
846 06:42:30.879860 PCI: 00:19.0 scanning...
847 06:42:30.883091 scan_static_bus for PCI: 00:19.0
848 06:42:30.886608 I2C: 00:1a enabled
849 06:42:30.886802 I2C: 00:1a disabled
850 06:42:30.889731 I2C: 00:1a disabled
851 06:42:30.893024 I2C: 00:28 enabled
852 06:42:30.893182 I2C: 00:29 enabled
853 06:42:30.896423 scan_static_bus for PCI: 00:19.0 done
854 06:42:30.902915 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
855 06:42:30.906537 PCI: 00:1e.2 scanning...
856 06:42:30.910091 scan_generic_bus for PCI: 00:1e.2
857 06:42:30.910229 SPI: 00 enabled
858 06:42:30.916401 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
859 06:42:30.919452 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
860 06:42:30.923478 PCI: 00:1f.0 scanning...
861 06:42:30.926572 scan_static_bus for PCI: 00:1f.0
862 06:42:30.929614 PNP: 0c09.0 enabled
863 06:42:30.932691 PNP: 0c09.0 scanning...
864 06:42:30.936112 scan_static_bus for PNP: 0c09.0
865 06:42:30.939736 scan_static_bus for PNP: 0c09.0 done
866 06:42:30.942788 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
867 06:42:30.946103 scan_static_bus for PCI: 00:1f.0 done
868 06:42:30.952812 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
869 06:42:30.952934 PCI: 00:1f.3 scanning...
870 06:42:30.956137 scan_static_bus for PCI: 00:1f.3
871 06:42:30.959447 GENERIC: 0.0 disabled
872 06:42:30.962476 scan_static_bus for PCI: 00:1f.3 done
873 06:42:30.969283 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
874 06:42:30.969394 PCI: 00:1f.5 scanning...
875 06:42:30.976322 scan_generic_bus for PCI: 00:1f.5
876 06:42:30.979102 scan_generic_bus for PCI: 00:1f.5 done
877 06:42:30.982508 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
878 06:42:30.989064 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
879 06:42:30.992470 scan_static_bus for Root Device done
880 06:42:30.995883 scan_bus: bus Root Device finished in 664 msecs
881 06:42:30.995978 done
882 06:42:31.002877 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1084 ms
883 06:42:31.005898 Chrome EC: UHEPI supported
884 06:42:31.012745 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
885 06:42:31.018929 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
886 06:42:31.022301 SPI flash protection: WPSW=0 SRP0=0
887 06:42:31.025870 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
888 06:42:31.032316 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
889 06:42:31.035574 found VGA at PCI: 00:02.0
890 06:42:31.039181 Setting up VGA for PCI: 00:02.0
891 06:42:31.042065 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
892 06:42:31.049037 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
893 06:42:31.052390 Allocating resources...
894 06:42:31.052477 Reading resources...
895 06:42:31.058540 Root Device read_resources bus 0 link: 0
896 06:42:31.062113 CPU_CLUSTER: 0 read_resources bus 0 link: 0
897 06:42:31.065049 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
898 06:42:31.072135 DOMAIN: 0000 read_resources bus 0 link: 0
899 06:42:31.075234 PCI: 00:04.0 read_resources bus 1 link: 0
900 06:42:31.082263 PCI: 00:04.0 read_resources bus 1 link: 0 done
901 06:42:31.085471 PCI: 00:05.0 read_resources bus 2 link: 0
902 06:42:31.091973 PCI: 00:05.0 read_resources bus 2 link: 0 done
903 06:42:31.094919 PCI: 00:14.0 read_resources bus 0 link: 0
904 06:42:31.098606 USB0 port 0 read_resources bus 0 link: 0
905 06:42:31.107953 USB0 port 0 read_resources bus 0 link: 0 done
906 06:42:31.110897 PCI: 00:14.0 read_resources bus 0 link: 0 done
907 06:42:31.166796 PCI: 00:14.3 read_resources bus 0 link: 0
908 06:42:31.167519 PCI: 00:14.3 read_resources bus 0 link: 0 done
909 06:42:31.167610 PCI: 00:15.0 read_resources bus 0 link: 0
910 06:42:31.167859 PCI: 00:15.0 read_resources bus 0 link: 0 done
911 06:42:31.168111 PCI: 00:15.2 read_resources bus 0 link: 0
912 06:42:31.168186 PCI: 00:15.2 read_resources bus 0 link: 0 done
913 06:42:31.168250 PCI: 00:15.3 read_resources bus 0 link: 0
914 06:42:31.168501 PCI: 00:15.3 read_resources bus 0 link: 0 done
915 06:42:31.168942 PCI: 00:19.0 read_resources bus 0 link: 0
916 06:42:31.169025 PCI: 00:19.0 read_resources bus 0 link: 0 done
917 06:42:31.169341 PCI: 00:1e.2 read_resources bus 3 link: 0
918 06:42:31.210804 PCI: 00:1e.2 read_resources bus 3 link: 0 done
919 06:42:31.210963 PCI: 00:1f.0 read_resources bus 0 link: 0
920 06:42:31.211050 PCI: 00:1f.0 read_resources bus 0 link: 0 done
921 06:42:31.211336 PCI: 00:1f.3 read_resources bus 0 link: 0
922 06:42:31.211593 PCI: 00:1f.3 read_resources bus 0 link: 0 done
923 06:42:31.211662 DOMAIN: 0000 read_resources bus 0 link: 0 done
924 06:42:31.212325 Root Device read_resources bus 0 link: 0 done
925 06:42:31.213035 Done reading resources.
926 06:42:31.213122 Show resources in subtree (Root Device)...After reading.
927 06:42:31.216649 Root Device child on link 0 CPU_CLUSTER: 0
928 06:42:31.219582 CPU_CLUSTER: 0 child on link 0 APIC: 00
929 06:42:31.219689 APIC: 00
930 06:42:31.219773 APIC: 02
931 06:42:31.222991 DOMAIN: 0000 child on link 0 PCI: 00:00.0
932 06:42:31.232750 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
933 06:42:31.242868 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
934 06:42:31.242976 PCI: 00:00.0
935 06:42:31.252466 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
936 06:42:31.262540 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
937 06:42:31.272388 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
938 06:42:31.282694 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
939 06:42:31.289045 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
940 06:42:31.299246 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
941 06:42:31.308675 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
942 06:42:31.318567 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
943 06:42:31.328558 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
944 06:42:31.338552 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
945 06:42:31.345362 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
946 06:42:31.355395 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
947 06:42:31.364912 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
948 06:42:31.374806 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
949 06:42:31.381433 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
950 06:42:31.391215 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
951 06:42:31.401437 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
952 06:42:31.411085 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
953 06:42:31.420970 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
954 06:42:31.421061 PCI: 00:02.0
955 06:42:31.434302 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
956 06:42:31.444187 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
957 06:42:31.451013 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
958 06:42:31.457177 PCI: 00:04.0 child on link 0 GENERIC: 0.0
959 06:42:31.467025 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
960 06:42:31.467120 GENERIC: 0.0
961 06:42:31.470456 PCI: 00:05.0 child on link 0 GENERIC: 0.0
962 06:42:31.484416 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 06:42:31.484500 GENERIC: 0.0
964 06:42:31.487315 PCI: 00:08.0
965 06:42:31.496779 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
966 06:42:31.500514 PCI: 00:14.0 child on link 0 USB0 port 0
967 06:42:31.509983 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
968 06:42:31.513631 USB0 port 0 child on link 0 USB2 port 0
969 06:42:31.516592 USB2 port 0
970 06:42:31.516673 USB2 port 1
971 06:42:31.520078 USB2 port 2
972 06:42:31.520160 USB2 port 3
973 06:42:31.523388 USB2 port 4
974 06:42:31.523469 USB2 port 5
975 06:42:31.526987 USB2 port 6
976 06:42:31.530298 USB2 port 7
977 06:42:31.530379 USB3 port 0
978 06:42:31.533836 USB3 port 1
979 06:42:31.533916 USB3 port 2
980 06:42:31.536848 USB3 port 3
981 06:42:31.536929 PCI: 00:14.2
982 06:42:31.539767 PCI: 00:14.3 child on link 0 GENERIC: 0.0
983 06:42:31.549816 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
984 06:42:31.553032 GENERIC: 0.0
985 06:42:31.556443 PCI: 00:14.5
986 06:42:31.566221 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 06:42:31.569923 PCI: 00:15.0 child on link 0 I2C: 00:2c
988 06:42:31.579888 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 06:42:31.579974 I2C: 00:2c
990 06:42:31.583141 I2C: 00:15
991 06:42:31.583223 PCI: 00:15.1
992 06:42:31.592868 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 06:42:31.599528 PCI: 00:15.2 child on link 0 GENERIC: 0.0
994 06:42:31.609496 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 06:42:31.609579 GENERIC: 0.0
996 06:42:31.612607 I2C: 00:15
997 06:42:31.612689 I2C: 00:10
998 06:42:31.615898 I2C: 00:10
999 06:42:31.615979 I2C: 00:2c
1000 06:42:31.616043 I2C: 00:40
1001 06:42:31.619549 I2C: 00:10
1002 06:42:31.619630 I2C: 00:39
1003 06:42:31.625967 PCI: 00:15.3 child on link 0 I2C: 00:36
1004 06:42:31.635768 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 06:42:31.635852 I2C: 00:36
1006 06:42:31.639388 I2C: 00:10
1007 06:42:31.639469 I2C: 00:0c
1008 06:42:31.642487 I2C: 00:50
1009 06:42:31.642567 PCI: 00:16.0
1010 06:42:31.652328 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 06:42:31.655922 PCI: 00:19.0 child on link 0 I2C: 00:1a
1012 06:42:31.666197 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 06:42:31.669172 I2C: 00:1a
1014 06:42:31.669257 I2C: 00:1a
1015 06:42:31.672284 I2C: 00:1a
1016 06:42:31.672364 I2C: 00:28
1017 06:42:31.675701 I2C: 00:29
1018 06:42:31.675781 PCI: 00:19.2
1019 06:42:31.688770 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1020 06:42:31.698936 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1021 06:42:31.699018 PCI: 00:1a.0
1022 06:42:31.708808 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 06:42:31.711967 PCI: 00:1e.0
1024 06:42:31.715799 PCI: 00:1e.2 child on link 0 SPI: 00
1025 06:42:31.725107 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 06:42:31.725224 SPI: 00
1027 06:42:31.728362 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1028 06:42:31.738909 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1029 06:42:31.741819 PNP: 0c09.0
1030 06:42:31.748538 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1031 06:42:31.752044 PCI: 00:1f.2
1032 06:42:31.761964 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1033 06:42:31.768326 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1034 06:42:31.774523 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1035 06:42:31.785470 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1036 06:42:31.792686 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1037 06:42:31.796130 GENERIC: 0.0
1038 06:42:31.796213 PCI: 00:1f.5
1039 06:42:31.805660 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1040 06:42:31.812378 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1041 06:42:31.822232 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1042 06:42:31.825597 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1043 06:42:31.835636 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1044 06:42:31.842490 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1045 06:42:31.848683 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1046 06:42:31.852502 DOMAIN: 0000: Resource ranges:
1047 06:42:31.855958 * Base: 1000, Size: 800, Tag: 100
1048 06:42:31.858657 * Base: 1900, Size: e700, Tag: 100
1049 06:42:31.865340 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1050 06:42:31.871646 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1051 06:42:31.878541 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1052 06:42:31.885339 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1053 06:42:31.895525 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1054 06:42:31.902118 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1055 06:42:31.908304 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1056 06:42:31.918502 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1057 06:42:31.924895 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1058 06:42:31.931117 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1059 06:42:31.941472 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1060 06:42:31.947783 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1061 06:42:31.954369 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1062 06:42:31.963927 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1063 06:42:31.971073 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1064 06:42:31.977448 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1065 06:42:31.987449 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1066 06:42:31.993918 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1067 06:42:32.000865 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1068 06:42:32.010304 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1069 06:42:32.017043 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1070 06:42:32.023613 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1071 06:42:32.033522 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1072 06:42:32.040473 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1073 06:42:32.043717 DOMAIN: 0000: Resource ranges:
1074 06:42:32.047738 * Base: 7fc00000, Size: 40400000, Tag: 200
1075 06:42:32.053654 * Base: d0000000, Size: 2b000000, Tag: 200
1076 06:42:32.056659 * Base: fb001000, Size: 2fff000, Tag: 200
1077 06:42:32.059919 * Base: fe010000, Size: 22000, Tag: 200
1078 06:42:32.063703 * Base: fe033000, Size: a4d000, Tag: 200
1079 06:42:32.069823 * Base: fea88000, Size: 2f8000, Tag: 200
1080 06:42:32.073377 * Base: fed88000, Size: 8000, Tag: 200
1081 06:42:32.076367 * Base: fed93000, Size: d000, Tag: 200
1082 06:42:32.079810 * Base: feda2000, Size: 125e000, Tag: 200
1083 06:42:32.086814 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1084 06:42:32.093319 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1085 06:42:32.099733 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1086 06:42:32.106775 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1087 06:42:32.113087 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1088 06:42:32.119568 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1089 06:42:32.126355 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1090 06:42:32.132614 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1091 06:42:32.139505 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1092 06:42:32.145833 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1093 06:42:32.152649 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1094 06:42:32.159383 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1095 06:42:32.165862 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1096 06:42:32.172165 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1097 06:42:32.179822 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1098 06:42:32.185762 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1099 06:42:32.192292 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1100 06:42:32.199509 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1101 06:42:32.205363 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1102 06:42:32.212325 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1103 06:42:32.219239 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1104 06:42:32.225239 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1105 06:42:32.231881 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1106 06:42:32.238413 Root Device assign_resources, bus 0 link: 0
1107 06:42:32.241613 DOMAIN: 0000 assign_resources, bus 0 link: 0
1108 06:42:32.251807 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1109 06:42:32.258404 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1110 06:42:32.265002 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1111 06:42:32.274730 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1112 06:42:32.278254 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 06:42:32.284851 PCI: 00:04.0 assign_resources, bus 1 link: 0
1114 06:42:32.291065 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1115 06:42:32.294387 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 06:42:32.301236 PCI: 00:05.0 assign_resources, bus 2 link: 0
1117 06:42:32.308000 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1118 06:42:32.317354 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1119 06:42:32.320825 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 06:42:32.327862 PCI: 00:14.0 assign_resources, bus 0 link: 0
1121 06:42:32.334203 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1122 06:42:32.337724 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 06:42:32.343981 PCI: 00:14.3 assign_resources, bus 0 link: 0
1124 06:42:32.350579 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1125 06:42:32.360423 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1126 06:42:32.363769 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 06:42:32.368032 PCI: 00:15.0 assign_resources, bus 0 link: 0
1128 06:42:32.377492 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1129 06:42:32.384408 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1130 06:42:32.390801 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 06:42:32.394169 PCI: 00:15.2 assign_resources, bus 0 link: 0
1132 06:42:32.404125 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1133 06:42:32.407315 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 06:42:32.410495 PCI: 00:15.3 assign_resources, bus 0 link: 0
1135 06:42:32.420415 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1136 06:42:32.427062 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1137 06:42:32.430530 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 06:42:32.437198 PCI: 00:19.0 assign_resources, bus 0 link: 0
1139 06:42:32.443769 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1140 06:42:32.453961 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1141 06:42:32.460817 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1142 06:42:32.467178 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 06:42:32.470488 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1144 06:42:32.473715 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 06:42:32.480504 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1146 06:42:32.483793 LPC: Trying to open IO window from 800 size 1ff
1147 06:42:32.493482 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1148 06:42:32.500828 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1149 06:42:32.506635 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 06:42:32.510633 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1151 06:42:32.516657 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1152 06:42:32.523449 DOMAIN: 0000 assign_resources, bus 0 link: 0
1153 06:42:32.526727 Root Device assign_resources, bus 0 link: 0
1154 06:42:32.530584 Done setting resources.
1155 06:42:32.536904 Show resources in subtree (Root Device)...After assigning values.
1156 06:42:32.540252 Root Device child on link 0 CPU_CLUSTER: 0
1157 06:42:32.543309 CPU_CLUSTER: 0 child on link 0 APIC: 00
1158 06:42:32.546719 APIC: 00
1159 06:42:32.546811 APIC: 02
1160 06:42:32.553278 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1161 06:42:32.559787 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1162 06:42:32.570111 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1163 06:42:32.573565 PCI: 00:00.0
1164 06:42:32.582970 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1165 06:42:32.590399 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1166 06:42:32.599883 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1167 06:42:32.609507 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1168 06:42:32.619573 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1169 06:42:32.629632 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1170 06:42:32.639686 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1171 06:42:32.645722 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1172 06:42:32.655904 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1173 06:42:32.665789 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1174 06:42:32.675799 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1175 06:42:32.685894 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1176 06:42:32.692091 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1177 06:42:32.702271 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1178 06:42:32.711779 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1179 06:42:32.721980 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1180 06:42:32.732038 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1181 06:42:32.742189 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1182 06:42:32.748304 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1183 06:42:32.752016 PCI: 00:02.0
1184 06:42:32.761793 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1185 06:42:32.771410 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1186 06:42:32.781697 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1187 06:42:32.784627 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1188 06:42:32.798183 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1189 06:42:32.798328 GENERIC: 0.0
1190 06:42:32.801306 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1191 06:42:32.814808 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1192 06:42:32.814953 GENERIC: 0.0
1193 06:42:32.817960 PCI: 00:08.0
1194 06:42:32.827977 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1195 06:42:32.830871 PCI: 00:14.0 child on link 0 USB0 port 0
1196 06:42:32.840944 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1197 06:42:32.847417 USB0 port 0 child on link 0 USB2 port 0
1198 06:42:32.847544 USB2 port 0
1199 06:42:32.850687 USB2 port 1
1200 06:42:32.850776 USB2 port 2
1201 06:42:32.854570 USB2 port 3
1202 06:42:32.854722 USB2 port 4
1203 06:42:32.857671 USB2 port 5
1204 06:42:32.857755 USB2 port 6
1205 06:42:32.860856 USB2 port 7
1206 06:42:32.860940 USB3 port 0
1207 06:42:32.864147 USB3 port 1
1208 06:42:32.864274 USB3 port 2
1209 06:42:32.867654 USB3 port 3
1210 06:42:32.867786 PCI: 00:14.2
1211 06:42:32.874383 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1212 06:42:32.883869 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1213 06:42:32.884020 GENERIC: 0.0
1214 06:42:32.887419 PCI: 00:14.5
1215 06:42:32.897250 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1216 06:42:32.900775 PCI: 00:15.0 child on link 0 I2C: 00:2c
1217 06:42:32.910428 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1218 06:42:32.914517 I2C: 00:2c
1219 06:42:32.914666 I2C: 00:15
1220 06:42:32.916968 PCI: 00:15.1
1221 06:42:32.927018 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1222 06:42:32.930153 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1223 06:42:32.943330 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1224 06:42:32.943423 GENERIC: 0.0
1225 06:42:32.943509 I2C: 00:15
1226 06:42:32.947067 I2C: 00:10
1227 06:42:32.947151 I2C: 00:10
1228 06:42:32.950515 I2C: 00:2c
1229 06:42:32.950650 I2C: 00:40
1230 06:42:32.953265 I2C: 00:10
1231 06:42:32.953381 I2C: 00:39
1232 06:42:32.960343 PCI: 00:15.3 child on link 0 I2C: 00:36
1233 06:42:32.969868 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1234 06:42:32.969963 I2C: 00:36
1235 06:42:32.973131 I2C: 00:10
1236 06:42:32.973212 I2C: 00:0c
1237 06:42:32.976545 I2C: 00:50
1238 06:42:32.976626 PCI: 00:16.0
1239 06:42:32.986501 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1240 06:42:32.993353 PCI: 00:19.0 child on link 0 I2C: 00:1a
1241 06:42:33.003227 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1242 06:42:33.003338 I2C: 00:1a
1243 06:42:33.006573 I2C: 00:1a
1244 06:42:33.006698 I2C: 00:1a
1245 06:42:33.010008 I2C: 00:28
1246 06:42:33.010113 I2C: 00:29
1247 06:42:33.010201 PCI: 00:19.2
1248 06:42:33.023430 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 06:42:33.033066 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1250 06:42:33.033216 PCI: 00:1a.0
1251 06:42:33.046362 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1252 06:42:33.046511 PCI: 00:1e.0
1253 06:42:33.049584 PCI: 00:1e.2 child on link 0 SPI: 00
1254 06:42:33.059305 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1255 06:42:33.062916 SPI: 00
1256 06:42:33.066348 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1257 06:42:33.076164 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1258 06:42:33.076259 PNP: 0c09.0
1259 06:42:33.086025 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1260 06:42:33.086107 PCI: 00:1f.2
1261 06:42:33.095745 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1262 06:42:33.105716 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1263 06:42:33.109219 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1264 06:42:33.119080 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1265 06:42:33.132242 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1266 06:42:33.132356 GENERIC: 0.0
1267 06:42:33.135423 PCI: 00:1f.5
1268 06:42:33.145457 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1269 06:42:33.145557 Done allocating resources.
1270 06:42:33.152031 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2094 ms
1271 06:42:33.155127 Enabling resources...
1272 06:42:33.158585 PCI: 00:00.0 subsystem <- 8086/4e22
1273 06:42:33.161870 PCI: 00:00.0 cmd <- 06
1274 06:42:33.165241 PCI: 00:02.0 subsystem <- 8086/4e55
1275 06:42:33.168397 PCI: 00:02.0 cmd <- 03
1276 06:42:33.171938 PCI: 00:04.0 subsystem <- 8086/4e03
1277 06:42:33.175737 PCI: 00:04.0 cmd <- 02
1278 06:42:33.179040 PCI: 00:05.0 bridge ctrl <- 0003
1279 06:42:33.181919 PCI: 00:05.0 subsystem <- 8086/4e19
1280 06:42:33.185412 PCI: 00:05.0 cmd <- 02
1281 06:42:33.185777 PCI: 00:08.0 cmd <- 06
1282 06:42:33.191835 PCI: 00:14.0 subsystem <- 8086/4ded
1283 06:42:33.192193 PCI: 00:14.0 cmd <- 02
1284 06:42:33.195119 PCI: 00:14.3 subsystem <- 8086/4df0
1285 06:42:33.198541 PCI: 00:14.3 cmd <- 02
1286 06:42:33.201945 PCI: 00:14.5 subsystem <- 8086/4df8
1287 06:42:33.205516 PCI: 00:14.5 cmd <- 06
1288 06:42:33.208327 PCI: 00:15.0 subsystem <- 8086/4de8
1289 06:42:33.212343 PCI: 00:15.0 cmd <- 02
1290 06:42:33.215252 PCI: 00:15.1 subsystem <- 8086/4de9
1291 06:42:33.218696 PCI: 00:15.1 cmd <- 02
1292 06:42:33.222208 PCI: 00:15.2 subsystem <- 8086/4dea
1293 06:42:33.225103 PCI: 00:15.2 cmd <- 02
1294 06:42:33.228371 PCI: 00:15.3 subsystem <- 8086/4deb
1295 06:42:33.228731 PCI: 00:15.3 cmd <- 02
1296 06:42:33.231730 PCI: 00:16.0 subsystem <- 8086/4de0
1297 06:42:33.235053 PCI: 00:16.0 cmd <- 02
1298 06:42:33.238613 PCI: 00:19.0 subsystem <- 8086/4dc5
1299 06:42:33.241451 PCI: 00:19.0 cmd <- 02
1300 06:42:33.245255 PCI: 00:19.2 subsystem <- 8086/4dc7
1301 06:42:33.248535 PCI: 00:19.2 cmd <- 06
1302 06:42:33.251480 PCI: 00:1a.0 subsystem <- 8086/4dc4
1303 06:42:33.254832 PCI: 00:1a.0 cmd <- 06
1304 06:42:33.258070 PCI: 00:1e.2 subsystem <- 8086/4daa
1305 06:42:33.261493 PCI: 00:1e.2 cmd <- 06
1306 06:42:33.264567 PCI: 00:1f.0 subsystem <- 8086/4d87
1307 06:42:33.264938 PCI: 00:1f.0 cmd <- 407
1308 06:42:33.271181 PCI: 00:1f.3 subsystem <- 8086/4dc8
1309 06:42:33.271553 PCI: 00:1f.3 cmd <- 02
1310 06:42:33.274706 PCI: 00:1f.5 subsystem <- 8086/4da4
1311 06:42:33.278544 PCI: 00:1f.5 cmd <- 406
1312 06:42:33.282882 done.
1313 06:42:33.286186 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1314 06:42:33.289661 Initializing devices...
1315 06:42:33.293036 Root Device init
1316 06:42:33.293512 mainboard: EC init
1317 06:42:33.299492 Chrome EC: Set SMI mask to 0x0000000000000000
1318 06:42:33.302773 Chrome EC: clear events_b mask to 0x0000000000000000
1319 06:42:33.309910 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1320 06:42:33.316159 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1321 06:42:33.322911 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1322 06:42:33.325896 Chrome EC: Set WAKE mask to 0x0000000000000000
1323 06:42:33.333348 Root Device init finished in 36 msecs
1324 06:42:33.336881 PCI: 00:00.0 init
1325 06:42:33.337315 CPU TDP = 6 Watts
1326 06:42:33.339756 CPU PL1 = 7 Watts
1327 06:42:33.343401 CPU PL2 = 12 Watts
1328 06:42:33.346661 PCI: 00:00.0 init finished in 6 msecs
1329 06:42:33.347081 PCI: 00:02.0 init
1330 06:42:33.349730 GMA: Found VBT in CBFS
1331 06:42:33.353058 GMA: Found valid VBT in CBFS
1332 06:42:33.359589 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1333 06:42:33.366268 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1334 06:42:33.369684 PCI: 00:02.0 init finished in 18 msecs
1335 06:42:33.372888 PCI: 00:08.0 init
1336 06:42:33.376375 PCI: 00:08.0 init finished in 0 msecs
1337 06:42:33.379427 PCI: 00:14.0 init
1338 06:42:33.382575 XHCI: Updated LFPS sampling OFF time to 9 ms
1339 06:42:33.386211 PCI: 00:14.0 init finished in 4 msecs
1340 06:42:33.389572 PCI: 00:15.0 init
1341 06:42:33.392790 I2C bus 0 version 0x3230302a
1342 06:42:33.395989 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1343 06:42:33.399071 PCI: 00:15.0 init finished in 6 msecs
1344 06:42:33.402404 PCI: 00:15.1 init
1345 06:42:33.405930 I2C bus 1 version 0x3230302a
1346 06:42:33.409148 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1347 06:42:33.412743 PCI: 00:15.1 init finished in 6 msecs
1348 06:42:33.415961 PCI: 00:15.2 init
1349 06:42:33.416346 I2C bus 2 version 0x3230302a
1350 06:42:33.422382 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1351 06:42:33.426391 PCI: 00:15.2 init finished in 6 msecs
1352 06:42:33.426804 PCI: 00:15.3 init
1353 06:42:33.429052 I2C bus 3 version 0x3230302a
1354 06:42:33.432775 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1355 06:42:33.436453 PCI: 00:15.3 init finished in 6 msecs
1356 06:42:33.439154 PCI: 00:16.0 init
1357 06:42:33.442722 PCI: 00:16.0 init finished in 0 msecs
1358 06:42:33.446214 PCI: 00:19.0 init
1359 06:42:33.449384 I2C bus 4 version 0x3230302a
1360 06:42:33.452759 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1361 06:42:33.455887 PCI: 00:19.0 init finished in 6 msecs
1362 06:42:33.459511 PCI: 00:1a.0 init
1363 06:42:33.462873 PCI: 00:1a.0 init finished in 0 msecs
1364 06:42:33.466444 PCI: 00:1f.0 init
1365 06:42:33.468934 IOAPIC: Initializing IOAPIC at 0xfec00000
1366 06:42:33.472863 IOAPIC: Bootstrap Processor Local APIC = 0x00
1367 06:42:33.475726 IOAPIC: ID = 0x02
1368 06:42:33.479113 IOAPIC: Dumping registers
1369 06:42:33.479499 reg 0x0000: 0x02000000
1370 06:42:33.482654 reg 0x0001: 0x00770020
1371 06:42:33.485808 reg 0x0002: 0x00000000
1372 06:42:33.489214 PCI: 00:1f.0 init finished in 21 msecs
1373 06:42:33.492550 PCI: 00:1f.2 init
1374 06:42:33.493041 Disabling ACPI via APMC.
1375 06:42:33.499201 APMC done.
1376 06:42:33.502779 PCI: 00:1f.2 init finished in 6 msecs
1377 06:42:33.513268 PNP: 0c09.0 init
1378 06:42:33.519473 Google Chrome EC uptime: 6.516 seconds
1379 06:42:33.523481 Google Chrome AP resets since EC boot: 0
1380 06:42:33.526252 Google Chrome most recent AP reset causes:
1381 06:42:33.533043 Google Chrome EC reset flags at last EC boot: reset-pin
1382 06:42:33.536288 PNP: 0c09.0 init finished in 19 msecs
1383 06:42:33.539655 Devices initialized
1384 06:42:33.543305 Show all devs... After init.
1385 06:42:33.543681 Root Device: enabled 1
1386 06:42:33.546177 CPU_CLUSTER: 0: enabled 1
1387 06:42:33.549657 DOMAIN: 0000: enabled 1
1388 06:42:33.552763 PCI: 00:00.0: enabled 1
1389 06:42:33.553154 PCI: 00:02.0: enabled 1
1390 06:42:33.556676 PCI: 00:04.0: enabled 1
1391 06:42:33.560049 PCI: 00:05.0: enabled 1
1392 06:42:33.560517 PCI: 00:09.0: enabled 0
1393 06:42:33.562905 PCI: 00:12.6: enabled 0
1394 06:42:33.566650 PCI: 00:14.0: enabled 1
1395 06:42:33.569763 PCI: 00:14.1: enabled 0
1396 06:42:33.570260 PCI: 00:14.2: enabled 0
1397 06:42:33.573066 PCI: 00:14.3: enabled 1
1398 06:42:33.576201 PCI: 00:14.5: enabled 1
1399 06:42:33.579422 PCI: 00:15.0: enabled 1
1400 06:42:33.579803 PCI: 00:15.1: enabled 1
1401 06:42:33.582570 PCI: 00:15.2: enabled 1
1402 06:42:33.585773 PCI: 00:15.3: enabled 1
1403 06:42:33.589628 PCI: 00:16.0: enabled 1
1404 06:42:33.590107 PCI: 00:16.1: enabled 0
1405 06:42:33.592870 PCI: 00:16.4: enabled 0
1406 06:42:33.595978 PCI: 00:16.5: enabled 0
1407 06:42:33.596361 PCI: 00:17.0: enabled 0
1408 06:42:33.599636 PCI: 00:19.0: enabled 1
1409 06:42:33.603211 PCI: 00:19.1: enabled 0
1410 06:42:33.605997 PCI: 00:19.2: enabled 1
1411 06:42:33.606526 PCI: 00:1a.0: enabled 1
1412 06:42:33.609069 PCI: 00:1c.0: enabled 0
1413 06:42:33.612735 PCI: 00:1c.1: enabled 0
1414 06:42:33.616015 PCI: 00:1c.2: enabled 0
1415 06:42:33.616527 PCI: 00:1c.3: enabled 0
1416 06:42:33.619249 PCI: 00:1c.4: enabled 0
1417 06:42:33.622148 PCI: 00:1c.5: enabled 0
1418 06:42:33.625887 PCI: 00:1c.6: enabled 0
1419 06:42:33.626400 PCI: 00:1c.7: enabled 1
1420 06:42:33.629292 PCI: 00:1e.0: enabled 0
1421 06:42:33.632559 PCI: 00:1e.1: enabled 0
1422 06:42:33.635920 PCI: 00:1e.2: enabled 1
1423 06:42:33.636429 PCI: 00:1e.3: enabled 0
1424 06:42:33.638686 PCI: 00:1f.0: enabled 1
1425 06:42:33.642665 PCI: 00:1f.1: enabled 0
1426 06:42:33.643177 PCI: 00:1f.2: enabled 1
1427 06:42:33.645746 PCI: 00:1f.3: enabled 1
1428 06:42:33.648755 PCI: 00:1f.4: enabled 0
1429 06:42:33.652155 PCI: 00:1f.5: enabled 1
1430 06:42:33.652577 PCI: 00:1f.7: enabled 0
1431 06:42:33.655874 GENERIC: 0.0: enabled 1
1432 06:42:33.658727 GENERIC: 0.0: enabled 1
1433 06:42:33.662205 USB0 port 0: enabled 1
1434 06:42:33.662760 GENERIC: 0.0: enabled 1
1435 06:42:33.665072 I2C: 00:2c: enabled 1
1436 06:42:33.668497 I2C: 00:15: enabled 1
1437 06:42:33.668912 GENERIC: 0.0: enabled 0
1438 06:42:33.671809 I2C: 00:15: enabled 1
1439 06:42:33.675303 I2C: 00:10: enabled 0
1440 06:42:33.675718 I2C: 00:10: enabled 0
1441 06:42:33.678561 I2C: 00:2c: enabled 1
1442 06:42:33.681894 I2C: 00:40: enabled 1
1443 06:42:33.682435 I2C: 00:10: enabled 1
1444 06:42:33.684896 I2C: 00:39: enabled 1
1445 06:42:33.688463 I2C: 00:36: enabled 1
1446 06:42:33.688977 I2C: 00:10: enabled 0
1447 06:42:33.692117 I2C: 00:0c: enabled 1
1448 06:42:33.695456 I2C: 00:50: enabled 1
1449 06:42:33.698220 I2C: 00:1a: enabled 1
1450 06:42:33.698672 I2C: 00:1a: enabled 0
1451 06:42:33.701623 I2C: 00:1a: enabled 0
1452 06:42:33.705458 I2C: 00:28: enabled 1
1453 06:42:33.705973 I2C: 00:29: enabled 1
1454 06:42:33.708467 PCI: 00:00.0: enabled 1
1455 06:42:33.711630 SPI: 00: enabled 1
1456 06:42:33.712039 PNP: 0c09.0: enabled 1
1457 06:42:33.715000 GENERIC: 0.0: enabled 0
1458 06:42:33.717941 USB2 port 0: enabled 1
1459 06:42:33.718353 USB2 port 1: enabled 1
1460 06:42:33.721563 USB2 port 2: enabled 1
1461 06:42:33.724619 USB2 port 3: enabled 1
1462 06:42:33.727854 USB2 port 4: enabled 0
1463 06:42:33.728266 USB2 port 5: enabled 1
1464 06:42:33.731159 USB2 port 6: enabled 0
1465 06:42:33.734829 USB2 port 7: enabled 1
1466 06:42:33.735322 USB3 port 0: enabled 1
1467 06:42:33.737816 USB3 port 1: enabled 1
1468 06:42:33.741232 USB3 port 2: enabled 1
1469 06:42:33.741641 USB3 port 3: enabled 1
1470 06:42:33.745187 APIC: 00: enabled 1
1471 06:42:33.747920 APIC: 02: enabled 1
1472 06:42:33.748433 PCI: 00:08.0: enabled 1
1473 06:42:33.755088 BS: BS_DEV_INIT run times (exec / console): 25 / 437 ms
1474 06:42:33.761195 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1475 06:42:33.764767 ELOG: NV offset 0xbfa000 size 0x1000
1476 06:42:33.771241 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1477 06:42:33.777992 ELOG: Event(17) added with size 13 at 2023-12-07 06:42:33 UTC
1478 06:42:33.784362 ELOG: Event(92) added with size 9 at 2023-12-07 06:42:34 UTC
1479 06:42:33.791062 ELOG: Event(93) added with size 9 at 2023-12-07 06:42:34 UTC
1480 06:42:33.797803 ELOG: Event(9E) added with size 10 at 2023-12-07 06:42:34 UTC
1481 06:42:33.804068 ELOG: Event(9F) added with size 14 at 2023-12-07 06:42:34 UTC
1482 06:42:33.807130 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1483 06:42:33.814501 ELOG: Event(A1) added with size 10 at 2023-12-07 06:42:34 UTC
1484 06:42:33.820695 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1485 06:42:33.827547 ELOG: Event(A0) added with size 9 at 2023-12-07 06:42:34 UTC
1486 06:42:33.833974 elog_add_boot_reason: Logged dev mode boot
1487 06:42:33.837200 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1488 06:42:33.840637 Finalize devices...
1489 06:42:33.844203 Devices finalized
1490 06:42:33.847320 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1491 06:42:33.853375 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1492 06:42:33.860271 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1493 06:42:33.863407 ME: HFSTS1 : 0x80030045
1494 06:42:33.866752 ME: HFSTS2 : 0x30280136
1495 06:42:33.870515 ME: HFSTS3 : 0x00000050
1496 06:42:33.874190 ME: HFSTS4 : 0x00004000
1497 06:42:33.880030 ME: HFSTS5 : 0x00000000
1498 06:42:33.883239 ME: HFSTS6 : 0x40400006
1499 06:42:33.886479 ME: Manufacturing Mode : NO
1500 06:42:33.890186 ME: FW Partition Table : OK
1501 06:42:33.893580 ME: Bringup Loader Failure : NO
1502 06:42:33.896446 ME: Firmware Init Complete : NO
1503 06:42:33.899952 ME: Boot Options Present : NO
1504 06:42:33.902960 ME: Update In Progress : NO
1505 06:42:33.906514 ME: D0i3 Support : YES
1506 06:42:33.910002 ME: Low Power State Enabled : NO
1507 06:42:33.913136 ME: CPU Replaced : YES
1508 06:42:33.916176 ME: CPU Replacement Valid : YES
1509 06:42:33.920146 ME: Current Working State : 5
1510 06:42:33.922757 ME: Current Operation State : 1
1511 06:42:33.926706 ME: Current Operation Mode : 3
1512 06:42:33.929677 ME: Error Code : 0
1513 06:42:33.933120 ME: CPU Debug Disabled : YES
1514 06:42:33.935988 ME: TXT Support : NO
1515 06:42:33.942582 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1516 06:42:33.946115 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1517 06:42:33.953341 ACPI: Writing ACPI tables at 76b27000.
1518 06:42:33.953832 ACPI: * FACS
1519 06:42:33.956777 ACPI: * DSDT
1520 06:42:33.960290 Ramoops buffer: 0x100000@0x76a26000.
1521 06:42:33.963193 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1522 06:42:33.969736 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1523 06:42:33.972925 Google Chrome EC: version:
1524 06:42:33.976316 ro: magolor_1.1.9999-103b6f9
1525 06:42:33.976733 rw: magolor_1.1.9999-103b6f9
1526 06:42:33.979799 running image: 1
1527 06:42:33.986556 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1528 06:42:33.989604 ACPI: * FADT
1529 06:42:33.990016 SCI is IRQ9
1530 06:42:33.993043 ACPI: added table 1/32, length now 40
1531 06:42:33.995978 ACPI: * SSDT
1532 06:42:33.999754 Found 1 CPU(s) with 2 core(s) each.
1533 06:42:34.003067 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1534 06:42:34.009472 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1535 06:42:34.012756 Could not locate 'wifi_sar' in VPD.
1536 06:42:34.016001 Checking CBFS for default SAR values
1537 06:42:34.022702 wifi_sar_defaults.hex has bad len in CBFS
1538 06:42:34.025787 failed from getting SAR limits!
1539 06:42:34.029709 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1540 06:42:34.032814 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1541 06:42:34.039007 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1542 06:42:34.042322 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1543 06:42:34.049377 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1544 06:42:34.055805 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1545 06:42:34.059708 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1546 06:42:34.065703 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1547 06:42:34.072723 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1548 06:42:34.075549 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1549 06:42:34.082446 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1550 06:42:34.088983 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1551 06:42:34.092019 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1552 06:42:34.098889 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1553 06:42:34.102423 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1554 06:42:34.109257 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1555 06:42:34.113659 PS2K: Passing 101 keymaps to kernel
1556 06:42:34.119832 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1557 06:42:34.126088 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1558 06:42:34.129124 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1559 06:42:34.135966 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1560 06:42:34.139114 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1561 06:42:34.145702 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1562 06:42:34.152400 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1563 06:42:34.159313 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1564 06:42:34.163267 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1565 06:42:34.169517 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1566 06:42:34.172922 ACPI: added table 2/32, length now 44
1567 06:42:34.175985 ACPI: * MCFG
1568 06:42:34.179098 ACPI: added table 3/32, length now 48
1569 06:42:34.179522 ACPI: * TPM2
1570 06:42:34.182346 TPM2 log created at 0x76a16000
1571 06:42:34.185893 ACPI: added table 4/32, length now 52
1572 06:42:34.189231 ACPI: * MADT
1573 06:42:34.189645 SCI is IRQ9
1574 06:42:34.192471 ACPI: added table 5/32, length now 56
1575 06:42:34.195393 current = 76b2d580
1576 06:42:34.199037 ACPI: * DMAR
1577 06:42:34.202470 ACPI: added table 6/32, length now 60
1578 06:42:34.205754 ACPI: added table 7/32, length now 64
1579 06:42:34.206169 ACPI: * HPET
1580 06:42:34.208809 ACPI: added table 8/32, length now 68
1581 06:42:34.212315 ACPI: done.
1582 06:42:34.215454 ACPI tables: 26304 bytes.
1583 06:42:34.218599 smbios_write_tables: 76a15000
1584 06:42:34.222336 EC returned error result code 3
1585 06:42:34.225676 Couldn't obtain OEM name from CBI
1586 06:42:34.229293 Create SMBIOS type 16
1587 06:42:34.232460 Create SMBIOS type 17
1588 06:42:34.232953 GENERIC: 0.0 (WIFI Device)
1589 06:42:34.235160 SMBIOS tables: 913 bytes.
1590 06:42:34.238510 Writing table forward entry at 0x00000500
1591 06:42:34.245124 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1592 06:42:34.248916 Writing coreboot table at 0x76b4b000
1593 06:42:34.255250 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1594 06:42:34.262173 1. 0000000000001000-000000000009ffff: RAM
1595 06:42:34.265541 2. 00000000000a0000-00000000000fffff: RESERVED
1596 06:42:34.268310 3. 0000000000100000-0000000076a14fff: RAM
1597 06:42:34.275793 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1598 06:42:34.281740 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1599 06:42:34.285691 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1600 06:42:34.291129 7. 0000000077000000-000000007fbfffff: RESERVED
1601 06:42:34.294575 8. 00000000c0000000-00000000cfffffff: RESERVED
1602 06:42:34.301816 9. 00000000fb000000-00000000fb000fff: RESERVED
1603 06:42:34.304540 10. 00000000fe000000-00000000fe00ffff: RESERVED
1604 06:42:34.308100 11. 00000000fea80000-00000000fea87fff: RESERVED
1605 06:42:34.314708 12. 00000000fed80000-00000000fed87fff: RESERVED
1606 06:42:34.317902 13. 00000000fed90000-00000000fed92fff: RESERVED
1607 06:42:34.324818 14. 00000000feda0000-00000000feda1fff: RESERVED
1608 06:42:34.328087 15. 0000000100000000-00000001803fffff: RAM
1609 06:42:34.331266 Passing 4 GPIOs to payload:
1610 06:42:34.338267 NAME | PORT | POLARITY | VALUE
1611 06:42:34.341325 lid | undefined | high | high
1612 06:42:34.348141 power | undefined | high | low
1613 06:42:34.350938 oprom | undefined | high | low
1614 06:42:34.357465 EC in RW | 0x000000b9 | high | low
1615 06:42:34.364077 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum a608
1616 06:42:34.367543 coreboot table: 1504 bytes.
1617 06:42:34.371379 IMD ROOT 0. 0x76fff000 0x00001000
1618 06:42:34.374110 IMD SMALL 1. 0x76ffe000 0x00001000
1619 06:42:34.377603 FSP MEMORY 2. 0x76c4e000 0x003b0000
1620 06:42:34.381485 CONSOLE 3. 0x76c2e000 0x00020000
1621 06:42:34.384010 FMAP 4. 0x76c2d000 0x00000578
1622 06:42:34.387441 TIME STAMP 5. 0x76c2c000 0x00000910
1623 06:42:34.390577 VBOOT WORK 6. 0x76c18000 0x00014000
1624 06:42:34.397495 ROMSTG STCK 7. 0x76c17000 0x00001000
1625 06:42:34.400370 AFTER CAR 8. 0x76c0d000 0x0000a000
1626 06:42:34.403579 RAMSTAGE 9. 0x76ba7000 0x00066000
1627 06:42:34.407167 REFCODE 10. 0x76b67000 0x00040000
1628 06:42:34.410734 SMM BACKUP 11. 0x76b57000 0x00010000
1629 06:42:34.413655 4f444749 12. 0x76b55000 0x00002000
1630 06:42:34.417294 EXT VBT13. 0x76b53000 0x00001c43
1631 06:42:34.421214 COREBOOT 14. 0x76b4b000 0x00008000
1632 06:42:34.423644 ACPI 15. 0x76b27000 0x00024000
1633 06:42:34.430436 ACPI GNVS 16. 0x76b26000 0x00001000
1634 06:42:34.433740 RAMOOPS 17. 0x76a26000 0x00100000
1635 06:42:34.437203 TPM2 TCGLOG18. 0x76a16000 0x00010000
1636 06:42:34.440773 SMBIOS 19. 0x76a15000 0x00000800
1637 06:42:34.441186 IMD small region:
1638 06:42:34.447499 IMD ROOT 0. 0x76ffec00 0x00000400
1639 06:42:34.450153 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1640 06:42:34.454015 VPD 2. 0x76ffeb80 0x00000058
1641 06:42:34.457100 POWER STATE 3. 0x76ffeb40 0x00000040
1642 06:42:34.460382 ROMSTAGE 4. 0x76ffeb20 0x00000004
1643 06:42:34.466685 MEM INFO 5. 0x76ffe940 0x000001e0
1644 06:42:34.470054 BS: BS_WRITE_TABLES run times (exec / console): 7 / 516 ms
1645 06:42:34.473744 MTRR: Physical address space:
1646 06:42:34.480107 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1647 06:42:34.487129 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1648 06:42:34.493138 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1649 06:42:34.500167 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1650 06:42:34.506408 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1651 06:42:34.510250 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1652 06:42:34.516882 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1653 06:42:34.523300 MTRR: Fixed MSR 0x250 0x0606060606060606
1654 06:42:34.527288 MTRR: Fixed MSR 0x258 0x0606060606060606
1655 06:42:34.530099 MTRR: Fixed MSR 0x259 0x0000000000000000
1656 06:42:34.533948 MTRR: Fixed MSR 0x268 0x0606060606060606
1657 06:42:34.536459 MTRR: Fixed MSR 0x269 0x0606060606060606
1658 06:42:34.543379 MTRR: Fixed MSR 0x26a 0x0606060606060606
1659 06:42:34.546455 MTRR: Fixed MSR 0x26b 0x0606060606060606
1660 06:42:34.549771 MTRR: Fixed MSR 0x26c 0x0606060606060606
1661 06:42:34.553034 MTRR: Fixed MSR 0x26d 0x0606060606060606
1662 06:42:34.560241 MTRR: Fixed MSR 0x26e 0x0606060606060606
1663 06:42:34.563921 MTRR: Fixed MSR 0x26f 0x0606060606060606
1664 06:42:34.566803 call enable_fixed_mtrr()
1665 06:42:34.570042 CPU physical address size: 39 bits
1666 06:42:34.572947 MTRR: default type WB/UC MTRR counts: 6/5.
1667 06:42:34.576498 MTRR: UC selected as default type.
1668 06:42:34.582905 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1669 06:42:34.589948 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1670 06:42:34.596196 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1671 06:42:34.603308 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1672 06:42:34.609656 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1673 06:42:34.610115
1674 06:42:34.610513 MTRR check
1675 06:42:34.613103 Fixed MTRRs : Enabled
1676 06:42:34.616235 Variable MTRRs: Enabled
1677 06:42:34.616859
1678 06:42:34.619486 MTRR: Fixed MSR 0x250 0x0606060606060606
1679 06:42:34.622661 MTRR: Fixed MSR 0x258 0x0606060606060606
1680 06:42:34.626099 MTRR: Fixed MSR 0x259 0x0000000000000000
1681 06:42:34.632396 MTRR: Fixed MSR 0x268 0x0606060606060606
1682 06:42:34.636071 MTRR: Fixed MSR 0x269 0x0606060606060606
1683 06:42:34.639499 MTRR: Fixed MSR 0x26a 0x0606060606060606
1684 06:42:34.642326 MTRR: Fixed MSR 0x26b 0x0606060606060606
1685 06:42:34.649067 MTRR: Fixed MSR 0x26c 0x0606060606060606
1686 06:42:34.651940 MTRR: Fixed MSR 0x26d 0x0606060606060606
1687 06:42:34.655165 MTRR: Fixed MSR 0x26e 0x0606060606060606
1688 06:42:34.658774 MTRR: Fixed MSR 0x26f 0x0606060606060606
1689 06:42:34.665590 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1690 06:42:34.668827 call enable_fixed_mtrr()
1691 06:42:34.672114 Checking cr50 for pending updates
1692 06:42:34.676900 CPU physical address size: 39 bits
1693 06:42:34.679094 Reading cr50 TPM mode
1694 06:42:34.688523 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1695 06:42:34.696288 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1696 06:42:34.699330 Checking segment from ROM address 0xfff9d5b8
1697 06:42:34.706173 Checking segment from ROM address 0xfff9d5d4
1698 06:42:34.709286 Loading segment from ROM address 0xfff9d5b8
1699 06:42:34.712557 code (compression=0)
1700 06:42:34.719056 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1701 06:42:34.729099 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1702 06:42:34.732383 it's not compressed!
1703 06:42:34.858302 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1704 06:42:34.864436 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1705 06:42:34.872320 Loading segment from ROM address 0xfff9d5d4
1706 06:42:34.875660 Entry Point 0x30000000
1707 06:42:34.876073 Loaded segments
1708 06:42:34.881991 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1709 06:42:34.898762 Finalizing chipset.
1710 06:42:34.901752 Finalizing SMM.
1711 06:42:34.902165 APMC done.
1712 06:42:34.908084 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1713 06:42:34.911568 mp_park_aps done after 0 msecs.
1714 06:42:34.915113 Jumping to boot code at 0x30000000(0x76b4b000)
1715 06:42:34.924906 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1716 06:42:34.925406
1717 06:42:34.925736
1718 06:42:34.926041
1719 06:42:34.928566 Starting depthcharge on Magolor...
1720 06:42:34.928978
1721 06:42:34.929969 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1722 06:42:34.930454 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1723 06:42:34.930908 Setting prompt string to ['dedede:']
1724 06:42:34.931322 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1725 06:42:34.938381 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1726 06:42:34.939090
1727 06:42:34.944712 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1728 06:42:34.945130
1729 06:42:34.948106 fw_config match found: AUDIO_AMP=UNPROVISIONED
1730 06:42:34.948523
1731 06:42:34.950995 Wipe memory regions:
1732 06:42:34.951406
1733 06:42:34.954520 [0x00000000001000, 0x000000000a0000)
1734 06:42:34.954970
1735 06:42:34.958738 [0x00000000100000, 0x00000030000000)
1736 06:42:35.086557
1737 06:42:35.090326 [0x00000031062170, 0x00000076a15000)
1738 06:42:35.259381
1739 06:42:35.262275 [0x00000100000000, 0x00000180400000)
1740 06:42:36.325297
1741 06:42:36.325789 R8152: Initializing
1742 06:42:36.326127
1743 06:42:36.328727 Version 9 (ocp_data = 6010)
1744 06:42:36.329143
1745 06:42:36.332030 R8152: Done initializing
1746 06:42:36.332445
1747 06:42:36.335641 Adding net device
1748 06:42:36.336151
1749 06:42:36.338571 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1750 06:42:36.339234
1751 06:42:36.342048
1752 06:42:36.342463
1753 06:42:36.343279 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1755 06:42:36.444545 dedede: tftpboot 192.168.201.1 12205520/tftp-deploy-ry50sqyo/kernel/bzImage 12205520/tftp-deploy-ry50sqyo/kernel/cmdline 12205520/tftp-deploy-ry50sqyo/ramdisk/ramdisk.cpio.gz
1756 06:42:36.445139 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1757 06:42:36.445763 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1758 06:42:36.450490 tftpboot 192.168.201.1 12205520/tftp-deploy-ry50sqyo/kernel/bzIploy-ry50sqyo/kernel/cmdline 12205520/tftp-deploy-ry50sqyo/ramdisk/ramdisk.cpio.gz
1759 06:42:36.450956
1760 06:42:36.451207 Waiting for link
1761 06:42:36.652251
1762 06:42:36.652756 done.
1763 06:42:36.653090
1764 06:42:36.653399 MAC: 00:e0:4c:72:3d:b7
1765 06:42:36.653704
1766 06:42:36.655443 Sending DHCP discover... done.
1767 06:42:36.655857
1768 06:42:36.658607 Waiting for reply... done.
1769 06:42:36.659065
1770 06:42:36.662025 Sending DHCP request... done.
1771 06:42:36.662499
1772 06:42:36.668411 Waiting for reply... done.
1773 06:42:36.668830
1774 06:42:36.669169 My ip is 192.168.201.22
1775 06:42:36.669643
1776 06:42:36.671894 The DHCP server ip is 192.168.201.1
1777 06:42:36.672313
1778 06:42:36.678786 TFTP server IP predefined by user: 192.168.201.1
1779 06:42:36.679207
1780 06:42:36.685463 Bootfile predefined by user: 12205520/tftp-deploy-ry50sqyo/kernel/bzImage
1781 06:42:36.685963
1782 06:42:36.688936 Sending tftp read request... done.
1783 06:42:36.689528
1784 06:42:36.697204 Waiting for the transfer...
1785 06:42:36.697794
1786 06:42:36.997816 00000000 ################################################################
1787 06:42:36.997988
1788 06:42:37.264483 00080000 ################################################################
1789 06:42:37.264642
1790 06:42:37.520013 00100000 ################################################################
1791 06:42:37.520157
1792 06:42:37.775508 00180000 ################################################################
1793 06:42:37.775691
1794 06:42:38.031821 00200000 ################################################################
1795 06:42:38.031958
1796 06:42:38.288809 00280000 ################################################################
1797 06:42:38.288987
1798 06:42:38.571031 00300000 ################################################################
1799 06:42:38.571195
1800 06:42:38.849860 00380000 ################################################################
1801 06:42:38.849998
1802 06:42:39.118353 00400000 ################################################################
1803 06:42:39.118491
1804 06:42:39.376375 00480000 ################################################################
1805 06:42:39.376526
1806 06:42:39.637738 00500000 ################################################################
1807 06:42:39.637932
1808 06:42:39.898268 00580000 ################################################################
1809 06:42:39.898415
1810 06:42:40.154606 00600000 ################################################################
1811 06:42:40.154754
1812 06:42:40.409994 00680000 ################################################################
1813 06:42:40.410147
1814 06:42:40.664417 00700000 ################################################################
1815 06:42:40.664551
1816 06:42:40.925264 00780000 ################################################################
1817 06:42:40.925416
1818 06:42:41.024450 00800000 ####################### done.
1819 06:42:41.024588
1820 06:42:41.027149 The bootfile was 8576912 bytes long.
1821 06:42:41.027247
1822 06:42:41.030592 Sending tftp read request... done.
1823 06:42:41.030740
1824 06:42:41.034165 Waiting for the transfer...
1825 06:42:41.034250
1826 06:42:41.321372 00000000 ################################################################
1827 06:42:41.321544
1828 06:42:41.626434 00080000 ################################################################
1829 06:42:41.626570
1830 06:42:41.931412 00100000 ################################################################
1831 06:42:41.931542
1832 06:42:42.220533 00180000 ################################################################
1833 06:42:42.220663
1834 06:42:42.487490 00200000 ################################################################
1835 06:42:42.487620
1836 06:42:42.760998 00280000 ################################################################
1837 06:42:42.761149
1838 06:42:43.034056 00300000 ################################################################
1839 06:42:43.034202
1840 06:42:43.300842 00380000 ################################################################
1841 06:42:43.300976
1842 06:42:43.589920 00400000 ################################################################
1843 06:42:43.590121
1844 06:42:43.850550 00480000 ################################################################
1845 06:42:43.850713
1846 06:42:44.112370 00500000 ################################################################
1847 06:42:44.112500
1848 06:42:44.373541 00580000 ################################################################
1849 06:42:44.373673
1850 06:42:44.634568 00600000 ################################################################
1851 06:42:44.634735
1852 06:42:44.896009 00680000 ################################################################
1853 06:42:44.896148
1854 06:42:45.158357 00700000 ################################################################
1855 06:42:45.158488
1856 06:42:45.437551 00780000 ################################################################
1857 06:42:45.437713
1858 06:42:45.672944 00800000 ##################################################### done.
1859 06:42:45.673084
1860 06:42:45.675999 Sending tftp read request... done.
1861 06:42:45.676085
1862 06:42:45.680133 Waiting for the transfer...
1863 06:42:45.680218
1864 06:42:45.683046 00000000 # done.
1865 06:42:45.683131
1866 06:42:45.689441 Command line loaded dynamically from TFTP file: 12205520/tftp-deploy-ry50sqyo/kernel/cmdline
1867 06:42:45.689525
1868 06:42:45.705836 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1869 06:42:45.705922
1870 06:42:45.709449 ec_init: CrosEC protocol v3 supported (256, 256)
1871 06:42:45.717579
1872 06:42:45.720790 Shutting down all USB controllers.
1873 06:42:45.720871
1874 06:42:45.720935 Removing current net device
1875 06:42:45.720994
1876 06:42:45.723869 Finalizing coreboot
1877 06:42:45.723950
1878 06:42:45.730386 Exiting depthcharge with code 4 at timestamp: 17608146
1879 06:42:45.730467
1880 06:42:45.730530
1881 06:42:45.730590 Starting kernel ...
1882 06:42:45.730690
1883 06:42:45.730747
1884 06:42:45.731112 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
1885 06:42:45.731207 start: 2.2.5 auto-login-action (timeout 00:04:36) [common]
1886 06:42:45.731279 Setting prompt string to ['Linux version [0-9]']
1887 06:42:45.731344 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1888 06:42:45.731410 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1890 06:47:21.732146 end: 2.2.5 auto-login-action (duration 00:04:36) [common]
1892 06:47:21.733223 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 276 seconds'
1894 06:47:21.734057 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1897 06:47:21.735451 end: 2 depthcharge-action (duration 00:05:00) [common]
1899 06:47:21.736643 Cleaning after the job
1900 06:47:21.737005 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12205520/tftp-deploy-ry50sqyo/ramdisk
1901 06:47:21.738248 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12205520/tftp-deploy-ry50sqyo/kernel
1902 06:47:21.739721 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12205520/tftp-deploy-ry50sqyo/modules
1903 06:47:21.740048 start: 5.1 power-off (timeout 00:00:30) [common]
1904 06:47:21.740203 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-9' '--port=1' '--command=off'
1905 06:47:21.818927 >> Command sent successfully.
1906 06:47:21.824248 Returned 0 in 0 seconds
1907 06:47:21.925219 end: 5.1 power-off (duration 00:00:00) [common]
1909 06:47:21.926802 start: 5.2 read-feedback (timeout 00:10:00) [common]
1910 06:47:21.928136 Listened to connection for namespace 'common' for up to 1s
1912 06:47:21.929490 Listened to connection for namespace 'common' for up to 1s
1913 06:47:22.928662 Finalising connection for namespace 'common'
1914 06:47:22.929394 Disconnecting from shell: Finalise
1915 06:47:22.929839
1916 06:47:23.030878 end: 5.2 read-feedback (duration 00:00:01) [common]
1917 06:47:23.031493 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12205520
1918 06:47:23.084323 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12205520
1919 06:47:23.084515 JobError: Your job cannot terminate cleanly.