Boot log: acer-chromebox-cxi5-brask
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 06:42:22.850742 lava-dispatcher, installed at version: 2023.10
2 06:42:22.850994 start: 0 validate
3 06:42:22.851123 Start time: 2023-12-07 06:42:22.851116+00:00 (UTC)
4 06:42:22.851241 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:42:22.851367 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 06:42:23.123173 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:42:23.123927 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1987-g9e48fc479c400%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:42:23.387854 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:42:23.388617 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 06:42:25.987358 Using caching service: 'http://localhost/cache/?uri=%s'
11 06:42:25.988141 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1987-g9e48fc479c400%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 06:42:26.257753 validate duration: 3.41
14 06:42:26.259178 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 06:42:26.259746 start: 1.1 download-retry (timeout 00:10:00) [common]
16 06:42:26.260250 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 06:42:26.260883 Not decompressing ramdisk as can be used compressed.
18 06:42:26.261347 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 06:42:26.261708 saving as /var/lib/lava/dispatcher/tmp/12205572/tftp-deploy-u0jeq3_g/ramdisk/initrd.cpio.gz
20 06:42:26.262071 total size: 5432690 (5 MB)
21 06:42:26.767926 progress 0 % (0 MB)
22 06:42:26.772963 progress 5 % (0 MB)
23 06:42:26.774363 progress 10 % (0 MB)
24 06:42:26.775800 progress 15 % (0 MB)
25 06:42:26.777360 progress 20 % (1 MB)
26 06:42:26.778757 progress 25 % (1 MB)
27 06:42:26.780467 progress 30 % (1 MB)
28 06:42:26.782000 progress 35 % (1 MB)
29 06:42:26.783403 progress 40 % (2 MB)
30 06:42:26.784771 progress 45 % (2 MB)
31 06:42:26.786158 progress 50 % (2 MB)
32 06:42:26.787716 progress 55 % (2 MB)
33 06:42:26.789079 progress 60 % (3 MB)
34 06:42:26.790438 progress 65 % (3 MB)
35 06:42:26.791982 progress 70 % (3 MB)
36 06:42:26.793343 progress 75 % (3 MB)
37 06:42:26.794699 progress 80 % (4 MB)
38 06:42:26.796064 progress 85 % (4 MB)
39 06:42:26.797583 progress 90 % (4 MB)
40 06:42:26.798949 progress 95 % (4 MB)
41 06:42:26.800330 progress 100 % (5 MB)
42 06:42:26.800536 5 MB downloaded in 0.54 s (9.62 MB/s)
43 06:42:26.800698 end: 1.1.1 http-download (duration 00:00:01) [common]
45 06:42:26.800941 end: 1.1 download-retry (duration 00:00:01) [common]
46 06:42:26.801026 start: 1.2 download-retry (timeout 00:09:59) [common]
47 06:42:26.801111 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 06:42:26.801245 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1987-g9e48fc479c400/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 06:42:26.801319 saving as /var/lib/lava/dispatcher/tmp/12205572/tftp-deploy-u0jeq3_g/kernel/bzImage
50 06:42:26.801379 total size: 8576912 (8 MB)
51 06:42:26.801440 No compression specified
52 06:42:26.802575 progress 0 % (0 MB)
53 06:42:26.804872 progress 5 % (0 MB)
54 06:42:26.807152 progress 10 % (0 MB)
55 06:42:26.809357 progress 15 % (1 MB)
56 06:42:26.811565 progress 20 % (1 MB)
57 06:42:26.813778 progress 25 % (2 MB)
58 06:42:26.815989 progress 30 % (2 MB)
59 06:42:26.818190 progress 35 % (2 MB)
60 06:42:26.820401 progress 40 % (3 MB)
61 06:42:26.822608 progress 45 % (3 MB)
62 06:42:26.824820 progress 50 % (4 MB)
63 06:42:26.827021 progress 55 % (4 MB)
64 06:42:26.829337 progress 60 % (4 MB)
65 06:42:26.831539 progress 65 % (5 MB)
66 06:42:26.833721 progress 70 % (5 MB)
67 06:42:26.835920 progress 75 % (6 MB)
68 06:42:26.838194 progress 80 % (6 MB)
69 06:42:26.840444 progress 85 % (6 MB)
70 06:42:26.842651 progress 90 % (7 MB)
71 06:42:26.844888 progress 95 % (7 MB)
72 06:42:26.847136 progress 100 % (8 MB)
73 06:42:26.847338 8 MB downloaded in 0.05 s (177.99 MB/s)
74 06:42:26.847480 end: 1.2.1 http-download (duration 00:00:00) [common]
76 06:42:26.847713 end: 1.2 download-retry (duration 00:00:00) [common]
77 06:42:26.847800 start: 1.3 download-retry (timeout 00:09:59) [common]
78 06:42:26.847890 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 06:42:26.848025 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 06:42:26.848094 saving as /var/lib/lava/dispatcher/tmp/12205572/tftp-deploy-u0jeq3_g/nfsrootfs/full.rootfs.tar
81 06:42:26.848155 total size: 133380384 (127 MB)
82 06:42:26.848217 Using unxz to decompress xz
83 06:42:26.852234 progress 0 % (0 MB)
84 06:42:27.186638 progress 5 % (6 MB)
85 06:42:27.532196 progress 10 % (12 MB)
86 06:42:27.815151 progress 15 % (19 MB)
87 06:42:27.998032 progress 20 % (25 MB)
88 06:42:28.237169 progress 25 % (31 MB)
89 06:42:28.574112 progress 30 % (38 MB)
90 06:42:28.910976 progress 35 % (44 MB)
91 06:42:29.305910 progress 40 % (50 MB)
92 06:42:29.686786 progress 45 % (57 MB)
93 06:42:30.040086 progress 50 % (63 MB)
94 06:42:30.409840 progress 55 % (69 MB)
95 06:42:30.765250 progress 60 % (76 MB)
96 06:42:31.124671 progress 65 % (82 MB)
97 06:42:31.482431 progress 70 % (89 MB)
98 06:42:31.842571 progress 75 % (95 MB)
99 06:42:32.272167 progress 80 % (101 MB)
100 06:42:32.698070 progress 85 % (108 MB)
101 06:42:32.961871 progress 90 % (114 MB)
102 06:42:33.306342 progress 95 % (120 MB)
103 06:42:33.695540 progress 100 % (127 MB)
104 06:42:33.700828 127 MB downloaded in 6.85 s (18.56 MB/s)
105 06:42:33.701076 end: 1.3.1 http-download (duration 00:00:07) [common]
107 06:42:33.701344 end: 1.3 download-retry (duration 00:00:07) [common]
108 06:42:33.701436 start: 1.4 download-retry (timeout 00:09:53) [common]
109 06:42:33.701524 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 06:42:33.701679 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1987-g9e48fc479c400/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 06:42:33.701777 saving as /var/lib/lava/dispatcher/tmp/12205572/tftp-deploy-u0jeq3_g/modules/modules.tar
112 06:42:33.701910 total size: 250916 (0 MB)
113 06:42:33.702023 Using unxz to decompress xz
114 06:42:33.706011 progress 13 % (0 MB)
115 06:42:33.706406 progress 26 % (0 MB)
116 06:42:33.706640 progress 39 % (0 MB)
117 06:42:33.708221 progress 52 % (0 MB)
118 06:42:33.710070 progress 65 % (0 MB)
119 06:42:33.711931 progress 78 % (0 MB)
120 06:42:33.713659 progress 91 % (0 MB)
121 06:42:33.715601 progress 100 % (0 MB)
122 06:42:33.720865 0 MB downloaded in 0.02 s (12.63 MB/s)
123 06:42:33.721089 end: 1.4.1 http-download (duration 00:00:00) [common]
125 06:42:33.721347 end: 1.4 download-retry (duration 00:00:00) [common]
126 06:42:33.721444 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 06:42:33.721545 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 06:42:35.819409 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12205572/extract-nfsrootfs-vvo09hke
129 06:42:35.819616 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 06:42:35.819716 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 06:42:35.819875 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1
132 06:42:35.820005 makedir: /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin
133 06:42:35.820109 makedir: /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/tests
134 06:42:35.820208 makedir: /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/results
135 06:42:35.820310 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-add-keys
136 06:42:35.820454 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-add-sources
137 06:42:35.820590 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-background-process-start
138 06:42:35.820721 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-background-process-stop
139 06:42:35.820849 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-common-functions
140 06:42:35.820977 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-echo-ipv4
141 06:42:35.821105 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-install-packages
142 06:42:35.821232 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-installed-packages
143 06:42:35.821359 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-os-build
144 06:42:35.821486 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-probe-channel
145 06:42:35.821614 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-probe-ip
146 06:42:35.821740 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-target-ip
147 06:42:35.821867 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-target-mac
148 06:42:35.821992 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-target-storage
149 06:42:35.822121 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-test-case
150 06:42:35.822250 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-test-event
151 06:42:35.822377 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-test-feedback
152 06:42:35.822502 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-test-raise
153 06:42:35.822630 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-test-reference
154 06:42:35.822823 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-test-runner
155 06:42:35.822954 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-test-set
156 06:42:35.823113 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-test-shell
157 06:42:35.823244 Updating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-install-packages (oe)
158 06:42:35.823400 Updating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/bin/lava-installed-packages (oe)
159 06:42:35.823525 Creating /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/environment
160 06:42:35.823623 LAVA metadata
161 06:42:35.823695 - LAVA_JOB_ID=12205572
162 06:42:35.823760 - LAVA_DISPATCHER_IP=192.168.201.1
163 06:42:35.823862 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 06:42:35.823931 skipped lava-vland-overlay
165 06:42:35.824006 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 06:42:35.824086 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 06:42:35.824148 skipped lava-multinode-overlay
168 06:42:35.824220 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 06:42:35.824299 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 06:42:35.824372 Loading test definitions
171 06:42:35.824463 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 06:42:35.824533 Using /lava-12205572 at stage 0
173 06:42:35.824914 uuid=12205572_1.5.2.3.1 testdef=None
174 06:42:35.825002 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 06:42:35.825087 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 06:42:35.825588 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 06:42:35.825807 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 06:42:35.826437 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 06:42:35.826695 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 06:42:35.827344 runner path: /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/0/tests/0_dmesg test_uuid 12205572_1.5.2.3.1
183 06:42:35.827498 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 06:42:35.827720 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 06:42:35.827791 Using /lava-12205572 at stage 1
187 06:42:35.828088 uuid=12205572_1.5.2.3.5 testdef=None
188 06:42:35.828175 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 06:42:35.828260 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 06:42:35.828718 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 06:42:35.828930 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 06:42:35.829560 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 06:42:35.829787 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 06:42:35.830404 runner path: /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/1/tests/1_bootrr test_uuid 12205572_1.5.2.3.5
197 06:42:35.830555 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 06:42:35.830878 Creating lava-test-runner.conf files
200 06:42:35.830974 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/0 for stage 0
201 06:42:35.831067 - 0_dmesg
202 06:42:35.831148 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12205572/lava-overlay-hqh__rg1/lava-12205572/1 for stage 1
203 06:42:35.831240 - 1_bootrr
204 06:42:35.831335 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 06:42:35.831420 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 06:42:35.838598 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 06:42:35.838742 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 06:42:35.838881 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 06:42:35.838966 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 06:42:35.839052 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 06:42:35.970738 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 06:42:35.971179 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 06:42:35.971291 extracting modules file /var/lib/lava/dispatcher/tmp/12205572/tftp-deploy-u0jeq3_g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12205572/extract-nfsrootfs-vvo09hke
214 06:42:35.984397 extracting modules file /var/lib/lava/dispatcher/tmp/12205572/tftp-deploy-u0jeq3_g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12205572/extract-overlay-ramdisk-fdmvftsf/ramdisk
215 06:42:35.997649 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 06:42:35.997771 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 06:42:35.997861 [common] Applying overlay to NFS
218 06:42:35.997935 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12205572/compress-overlay-ch652ydp/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12205572/extract-nfsrootfs-vvo09hke
219 06:42:36.005805 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 06:42:36.005913 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 06:42:36.006003 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 06:42:36.006091 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 06:42:36.006171 Building ramdisk /var/lib/lava/dispatcher/tmp/12205572/extract-overlay-ramdisk-fdmvftsf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12205572/extract-overlay-ramdisk-fdmvftsf/ramdisk
224 06:42:36.071615 >> 26160 blocks
225 06:42:36.592048 rename /var/lib/lava/dispatcher/tmp/12205572/extract-overlay-ramdisk-fdmvftsf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12205572/tftp-deploy-u0jeq3_g/ramdisk/ramdisk.cpio.gz
226 06:42:36.592494 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 06:42:36.592657 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 06:42:36.592806 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 06:42:36.592900 No mkimage arch provided, not using FIT.
230 06:42:36.592986 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 06:42:36.593067 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 06:42:36.593175 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 06:42:36.593267 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 06:42:36.593348 No LXC device requested
235 06:42:36.593426 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 06:42:36.593514 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 06:42:36.593599 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 06:42:36.593672 Checking files for TFTP limit of 4294967296 bytes.
239 06:42:36.594063 end: 1 tftp-deploy (duration 00:00:10) [common]
240 06:42:36.594167 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 06:42:36.594253 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 06:42:36.594376 substitutions:
243 06:42:36.594442 - {DTB}: None
244 06:42:36.594504 - {INITRD}: 12205572/tftp-deploy-u0jeq3_g/ramdisk/ramdisk.cpio.gz
245 06:42:36.594565 - {KERNEL}: 12205572/tftp-deploy-u0jeq3_g/kernel/bzImage
246 06:42:36.594623 - {LAVA_MAC}: None
247 06:42:36.594679 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12205572/extract-nfsrootfs-vvo09hke
248 06:42:36.594735 - {NFS_SERVER_IP}: 192.168.201.1
249 06:42:36.594798 - {PRESEED_CONFIG}: None
250 06:42:36.594854 - {PRESEED_LOCAL}: None
251 06:42:36.594908 - {RAMDISK}: 12205572/tftp-deploy-u0jeq3_g/ramdisk/ramdisk.cpio.gz
252 06:42:36.594963 - {ROOT_PART}: None
253 06:42:36.595017 - {ROOT}: None
254 06:42:36.595071 - {SERVER_IP}: 192.168.201.1
255 06:42:36.595124 - {TEE}: None
256 06:42:36.595177 Parsed boot commands:
257 06:42:36.595231 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 06:42:36.595408 Parsed boot commands: tftpboot 192.168.201.1 12205572/tftp-deploy-u0jeq3_g/kernel/bzImage 12205572/tftp-deploy-u0jeq3_g/kernel/cmdline 12205572/tftp-deploy-u0jeq3_g/ramdisk/ramdisk.cpio.gz
259 06:42:36.595500 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 06:42:36.595587 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 06:42:36.595682 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 06:42:36.595766 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 06:42:36.595836 Not connected, no need to disconnect.
264 06:42:36.595909 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 06:42:36.595994 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 06:42:36.596063 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi5-brask-cbg-0'
267 06:42:36.599728 Setting prompt string to ['lava-test: # ']
268 06:42:36.600062 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 06:42:36.600167 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 06:42:36.600264 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 06:42:36.600378 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 06:42:36.600639 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi5-brask-cbg-0' '--port=1' '--command=reboot'
273 06:42:41.750345 >> Command sent successfully.
274 06:42:41.761133 Returned 0 in 5 seconds
275 06:42:41.862623 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 06:42:41.864230 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 06:42:41.864836 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 06:42:41.865338 Setting prompt string to 'Starting depthcharge on Moli...'
280 06:42:41.865720 Changing prompt to 'Starting depthcharge on Moli...'
281 06:42:41.866101 depthcharge-start: Wait for prompt Starting depthcharge on Moli... (timeout 00:05:00)
282 06:42:41.867221 [Enter `^Ec?' for help]
283 06:42:43.071104
284 06:42:43.071746
285 06:42:43.081008 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 bootblock starting (log level: 8)...
286 06:42:43.084034 CPU: Intel(R) Celeron(R) 7305
287 06:42:43.087906 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
288 06:42:43.094091 CPU: AES supported, TXT NOT supported, VT supported
289 06:42:43.101256 Cache: Level 3: Associativity = 8 Partitions = 1 Line Size = 64 Sets = 16384
290 06:42:43.104272 Cache size = 8 MiB
291 06:42:43.107043 MCH: device id 4619 (rev 04) is Alderlake-P
292 06:42:43.113756 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
293 06:42:43.117375 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
294 06:42:43.121129 VBOOT: Loading verstage.
295 06:42:43.124262 FMAP: Found "FLASH" version 1.1 at 0x1804000.
296 06:42:43.131207 FMAP: base = 0x0 size = 0x2000000 #areas = 37
297 06:42:43.134511 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 06:42:43.145094 CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes
299 06:42:43.151273 CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908
300 06:42:43.151854
301 06:42:43.152236
302 06:42:43.164150 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 verstage starting (log level: 8)...
303 06:42:43.167706 Probing TPM I2C: I2C bus 1 version 0x3230302a
304 06:42:43.174807 DW I2C bus 1 at 0xfe022000 (400 KHz)
305 06:42:43.175433 done! DID_VID 0x00281ae0
306 06:42:43.178414 TPM ready after 0 ms
307 06:42:43.182068 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
308 06:42:43.195667 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9
309 06:42:43.201595 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
310 06:42:43.251826 tlcl_send_startup: Startup return code is 0
311 06:42:43.252406 TPM: setup succeeded
312 06:42:43.275132 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
313 06:42:43.296440 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
314 06:42:43.300388 Chrome EC: UHEPI supported
315 06:42:43.303423 Reading cr50 boot mode
316 06:42:43.318197 Cr50 says boot_mode is VERIFIED_RW(0x00).
317 06:42:43.318814 Phase 1
318 06:42:43.325035 FMAP: area GBB found @ 1805000 (458752 bytes)
319 06:42:43.331435 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
320 06:42:43.338314 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
321 06:42:43.344765 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 06:42:43.345283 Phase 2
323 06:42:43.348098 Phase 3
324 06:42:43.351698 FMAP: area GBB found @ 1805000 (458752 bytes)
325 06:42:43.358591 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
326 06:42:43.362357 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
327 06:42:43.368249 VB2:vb2_verify_keyblock() Checking keyblock signature...
328 06:42:43.374998 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
329 06:42:43.381640 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
330 06:42:43.391629 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
331 06:42:43.404519 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
332 06:42:43.407800 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
333 06:42:43.414572 VB2:vb2_verify_fw_preamble() Verifying preamble.
334 06:42:43.421334 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
335 06:42:43.427797 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
336 06:42:43.434725 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
337 06:42:43.439326 Phase 4
338 06:42:43.442174 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
339 06:42:43.448886 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
340 06:42:43.677204 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
341 06:42:43.683720 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
342 06:42:43.687466 Saving vboot hash.
343 06:42:43.693952 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
344 06:42:43.709903 tlcl_extend: response is 0
345 06:42:43.716408 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
346 06:42:43.722972 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
347 06:42:43.737944 tlcl_extend: response is 0
348 06:42:43.744369 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
349 06:42:43.762864 tlcl_lock_nv_write: response is 0
350 06:42:43.780964 tlcl_lock_nv_write: response is 0
351 06:42:43.781546 Slot B is selected
352 06:42:43.787195 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
353 06:42:43.793937 CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes
354 06:42:43.800755 CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600
355 06:42:43.806928 BS: verstage times (exec / console): total (unknown) / 260 ms
356 06:42:43.807497
357 06:42:43.807881
358 06:42:43.817103 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 romstage starting (log level: 8)...
359 06:42:43.820622 Google Chrome EC: version:
360 06:42:43.823595 ro: moli_v2.0.19454-8a70cbdcf0
361 06:42:43.826818 rw: moli_v2.0.22464-d4ba27cabb
362 06:42:43.829938 running image: 2
363 06:42:43.832978 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
364 06:42:43.842935 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
365 06:42:43.849752 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
366 06:42:43.856654 CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc
367 06:42:43.866692 VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
368 06:42:43.876942 VB2:check_ec_hash() Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
369 06:42:43.880003 EC took 940us to calculate image hash
370 06:42:43.890137 VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
371 06:42:43.893458 VB2:sync_ec() select_rw=RW(active)
372 06:42:43.901556 EC returned error result code 1
373 06:42:43.905304 PARAM_LIMIT_POWER not supported by EC.
374 06:42:43.911685 Waited 7370us to clear limit power flag.
375 06:42:43.914902 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 06:42:43.918339 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 06:42:43.926253 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
378 06:42:43.930217 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
379 06:42:43.932949 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
380 06:42:43.933516 TCO_STS: 0000 0000
381 06:42:43.936459 GEN_PMCON: d0015038 00002200
382 06:42:43.939723 GBLRST_CAUSE: 00000000 00000000
383 06:42:43.943451 HPR_CAUSE0: 00000000
384 06:42:43.946295 prev_sleep_state 5
385 06:42:43.949703 Abort disabling TXT, as CPU is not TXT capable.
386 06:42:43.956675 cse_lite: Number of partitions = 3
387 06:42:43.959899 cse_lite: Current partition = RO
388 06:42:43.960469 cse_lite: Next partition = RO
389 06:42:43.963565 cse_lite: Flags = 0x7
390 06:42:43.970463 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff)
391 06:42:43.980008 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff)
392 06:42:43.983804 FMAP: area SI_ME found @ 1000 (5238784 bytes)
393 06:42:43.990373 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
394 06:42:43.997584 cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000
395 06:42:44.003726 CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4
396 06:42:44.006890 cse_lite: CSE CBFS RW version : 16.1.25.2049
397 06:42:44.010234 CSE Sub-partition update not required
398 06:42:44.016874 cse_lite: Set Boot Partition Info Command (RW)
399 06:42:44.020267 HECI: Global Reset(Type:1) Command
400 06:42:45.436257
401 06:42:45.436794
402 06:42:45.446182 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 bootblock starting (log level: 8)...
403 06:42:45.449103 CPU: Intel(R) Celeron(R) 7305
404 06:42:45.452510 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
405 06:42:45.458952 CPU: AES supported, TXT NOT supported, VT supported
406 06:42:45.465779 Cache: Level 3: Associativity = 8 Partitions = 1 Line Size = 64 Sets = 16384
407 06:42:45.469255 Cache size = 8 MiB
408 06:42:45.472692 MCH: device id 4619 (rev 04) is Alderlake-P
409 06:42:45.479028 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
410 06:42:45.482372 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
411 06:42:45.486074 VBOOT: Loading verstage.
412 06:42:45.489482 FMAP: Found "FLASH" version 1.1 at 0x1804000.
413 06:42:45.495791 FMAP: base = 0x0 size = 0x2000000 #areas = 37
414 06:42:45.499391 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
415 06:42:45.509264 CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes
416 06:42:45.515806 CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908
417 06:42:45.516268
418 06:42:45.516730
419 06:42:45.529136 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 verstage starting (log level: 8)...
420 06:42:45.535732 Probing TPM I2C: I2C bus 1 version 0x3230302a
421 06:42:45.539366 DW I2C bus 1 at 0xfe022000 (400 KHz)
422 06:42:45.542584 done! DID_VID 0x00281ae0
423 06:42:45.543173 TPM ready after 0 ms
424 06:42:45.549106 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
425 06:42:45.560032 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9
426 06:42:45.566719 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
427 06:42:45.612944 tlcl_send_startup: Startup return code is 0
428 06:42:45.613488 TPM: setup succeeded
429 06:42:45.633680 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
430 06:42:45.655411 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
431 06:42:45.659155 Chrome EC: UHEPI supported
432 06:42:45.662552 Reading cr50 boot mode
433 06:42:45.677206 Cr50 says boot_mode is VERIFIED_RW(0x00).
434 06:42:45.677753 Phase 1
435 06:42:45.683896 FMAP: area GBB found @ 1805000 (458752 bytes)
436 06:42:45.690627 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
437 06:42:45.697234 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
438 06:42:45.703700 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
439 06:42:45.704245 Phase 2
440 06:42:45.707424 Phase 3
441 06:42:45.710738 FMAP: area GBB found @ 1805000 (458752 bytes)
442 06:42:45.717233 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
443 06:42:45.720683 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
444 06:42:45.727414 VB2:vb2_verify_keyblock() Checking keyblock signature...
445 06:42:45.734083 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
446 06:42:45.741216 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
447 06:42:45.747773 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
448 06:42:45.764254 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
449 06:42:45.767804 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
450 06:42:45.774559 VB2:vb2_verify_fw_preamble() Verifying preamble.
451 06:42:45.777786 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
452 06:42:45.787678 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
453 06:42:45.794271 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
454 06:42:45.797644 Phase 4
455 06:42:45.800775 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
456 06:42:45.807624 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
457 06:42:46.035707 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
458 06:42:46.042640 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
459 06:42:46.045883 Saving vboot hash.
460 06:42:46.052681 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
461 06:42:46.069007 tlcl_extend: response is 0
462 06:42:46.075629 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
463 06:42:46.082440 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
464 06:42:46.096299 tlcl_extend: response is 0
465 06:42:46.103000 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
466 06:42:46.121771 tlcl_lock_nv_write: response is 0
467 06:42:46.138972 tlcl_lock_nv_write: response is 0
468 06:42:46.139486 Slot B is selected
469 06:42:46.146336 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
470 06:42:46.152361 CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes
471 06:42:46.159358 CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600
472 06:42:46.165760 BS: verstage times (exec / console): total (unknown) / 260 ms
473 06:42:46.166294
474 06:42:46.166642
475 06:42:46.175762 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 romstage starting (log level: 8)...
476 06:42:46.179328 Google Chrome EC: version:
477 06:42:46.182609 ro: moli_v2.0.19454-8a70cbdcf0
478 06:42:46.186000 rw: moli_v2.0.22464-d4ba27cabb
479 06:42:46.189258 running image: 2
480 06:42:46.192633 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
481 06:42:46.202661 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
482 06:42:46.209280 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
483 06:42:46.215434 CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc
484 06:42:46.226000 VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
485 06:42:46.235675 VB2:check_ec_hash() Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
486 06:42:46.239254 EC took 952us to calculate image hash
487 06:42:46.249031 VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
488 06:42:46.252003 VB2:sync_ec() select_rw=RW(active)
489 06:42:46.260731 EC returned error result code 1
490 06:42:46.264093 PARAM_LIMIT_POWER not supported by EC.
491 06:42:46.270936 Waited 7369us to clear limit power flag.
492 06:42:46.274058 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
493 06:42:46.277453 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
494 06:42:46.284043 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
495 06:42:46.287727 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
496 06:42:46.290928 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
497 06:42:46.294341 TCO_STS: 0000 0000
498 06:42:46.297636 GEN_PMCON: d1001038 00002200
499 06:42:46.300918 GBLRST_CAUSE: 00000040 00000000
500 06:42:46.301494 HPR_CAUSE0: 00000000
501 06:42:46.303596 prev_sleep_state 5
502 06:42:46.307174 Abort disabling TXT, as CPU is not TXT capable.
503 06:42:46.315396 cse_lite: Number of partitions = 3
504 06:42:46.318836 cse_lite: Current partition = RW
505 06:42:46.319273 cse_lite: Next partition = RW
506 06:42:46.322304 cse_lite: Flags = 0x7
507 06:42:46.329561 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff)
508 06:42:46.339158 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff)
509 06:42:46.342749 FMAP: area SI_ME found @ 1000 (5238784 bytes)
510 06:42:46.349069 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
511 06:42:46.355717 cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000
512 06:42:46.362105 CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4
513 06:42:46.365817 cse_lite: CSE CBFS RW version : 16.1.25.2049
514 06:42:46.369122 CSE Sub-partition update not required
515 06:42:46.374271 Boot Count incremented to 1715
516 06:42:46.380655 CBFS: Found 'fspm.bin' @0x7efc0 size 0xc0000 in mcache @0xfef87868
517 06:42:46.387185 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
518 06:42:46.400742 Probing TPM I2C: done! DID_VID 0x00281ae0
519 06:42:46.404251 Locality already claimed
520 06:42:46.407424 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
521 06:42:46.427462 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
522 06:42:46.433816 MRC: Hash idx 0x100d comparison successful.
523 06:42:46.434269 MRC cache found, size f6c8
524 06:42:46.437750 bootmode is set to: 2
525 06:42:46.441319 FW_CONFIG value from CBI is 0x64
526 06:42:46.447597 fw_config match found: STORAGE=STORAGE_EMMC
527 06:42:46.450925 FMAP: area RW_SPD_CACHE found @ f28000 (4096 bytes)
528 06:42:46.454338 SPD_CACHE: cache found, size 0x1000
529 06:42:46.460920 SPD_CACHE: DIMM0 is the same
530 06:42:46.464111 No memory dimm at address 51
531 06:42:46.467432 SPD_CACHE: DIMM1 is not present
532 06:42:46.470923 No memory dimm at address 52
533 06:42:46.474334 SPD_CACHE: DIMM2 is not present
534 06:42:46.477413 No memory dimm at address 53
535 06:42:46.480682 SPD_CACHE: DIMM3 is not present
536 06:42:46.483887 Use the SPD cache data
537 06:42:46.487416 SPD: module type is DDR4
538 06:42:46.490498 SPD: module part number is M471A5244CB0-CWE
539 06:42:46.497508 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
540 06:42:46.501131 SPD: device width 16 bits, bus width 64 bits
541 06:42:46.503892 SPD: module size is 4096 MB (per channel)
542 06:42:46.557782 CBMEM:
543 06:42:46.561182 IMD: root @ 0x76fff000 254 entries.
544 06:42:46.564313 IMD: root @ 0x76ffec00 62 entries.
545 06:42:46.573808 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
546 06:42:46.576908 FMAP: area RW_VPD found @ f29000 (8192 bytes)
547 06:42:46.580355 RW_VPD is uninitialized or empty.
548 06:42:46.587214 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
549 06:42:46.590449 External stage cache:
550 06:42:46.593762 IMD: root @ 0x7bbff000 254 entries.
551 06:42:46.597253 IMD: root @ 0x7bbfec00 62 entries.
552 06:42:46.604525 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
553 06:42:46.610890 MRC: Checking cached data update for 'RW_MRC_CACHE'.
554 06:42:46.614410 MRC: 'RW_MRC_CACHE' does not need update.
555 06:42:46.615035 1 DIMMs found
556 06:42:46.617445 SMM Memory Map
557 06:42:46.620841 SMRAM : 0x7b800000 0x800000
558 06:42:46.624364 Subregion 0: 0x7b800000 0x200000
559 06:42:46.627574 Subregion 1: 0x7ba00000 0x200000
560 06:42:46.630945 Subregion 2: 0x7bc00000 0x400000
561 06:42:46.634411 top_of_ram = 0x77000000
562 06:42:46.637963 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
563 06:42:46.644190 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
564 06:42:46.651498 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
565 06:42:46.654330 MTRR Range: Start=ff000000 End=0 (Size 1000000)
566 06:42:46.654893 Normal boot
567 06:42:46.664372 CBFS: Found 'fallback/postcar' @0x186040 size 0x5e9c in mcache @0xfef878dc
568 06:42:46.674242 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x5aa8 memsize: 0xae60
569 06:42:46.677415 Processing 237 relocs. Offset value of 0x74ab9000
570 06:42:46.681186 CLFLUSH [0x76ab9000, 0x76ac3e60]
571 06:42:46.684245 CLFLUSH [0x76abea80, 0x76abea84]
572 06:42:46.694713 BS: romstage times (exec / console): total (unknown) / 418 ms
573 06:42:46.698298 CLFLUSH [0x76ab8000, 0x77000000]
574 06:42:46.708284 CLFLUSH [0x7ba00000, 0x7bc00000]
575 06:42:46.719565
576 06:42:46.720123
577 06:42:46.730171 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 postcar starting (log level: 8)...
578 06:42:46.730722 Normal boot
579 06:42:46.736435 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
580 06:42:46.743443 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
581 06:42:46.749768 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
582 06:42:46.756987 CBFS: Found 'fallback/ramstage' @0x537c0 size 0x25581 in mcache @0x76add0b0
583 06:42:46.807908 Loading module at 0x76a2e000 with entry 0x76a2e000. filesize: 0x53100 memsize: 0x89b50
584 06:42:46.814360 Processing 5882 relocs. Offset value of 0x72a2e000
585 06:42:46.817362 BS: postcar times (exec / console): total (unknown) / 54 ms
586 06:42:46.817800
587 06:42:46.820962
588 06:42:46.831522 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 ramstage starting (log level: 8)...
589 06:42:46.834359 Reserving BERT start 76a1d000, size 10000
590 06:42:46.834825 Normal boot
591 06:42:46.841222 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
592 06:42:46.847414 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
593 06:42:46.854470 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
594 06:42:46.861018 FMAP: area RW_VPD found @ f29000 (8192 bytes)
595 06:42:46.864436 Google Chrome EC: version:
596 06:42:46.867650 ro: moli_v2.0.19454-8a70cbdcf0
597 06:42:46.871158 rw: moli_v2.0.22464-d4ba27cabb
598 06:42:46.871689 running image: 2
599 06:42:46.874823 ACPI _SWS is PM1 Index 8 GPE Index -1
600 06:42:46.880820 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
601 06:42:46.884071 FW_CONFIG value from CBI is 0x64
602 06:42:46.887684 PCI: 00:06.0 disabled by fw_config
603 06:42:46.894153 fw_config match found: STORAGE=STORAGE_EMMC
604 06:42:46.897143 fw_config match found: STORAGE=STORAGE_EMMC
605 06:42:46.904233 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
606 06:42:46.910963 CBFS: Found 'cpu_microcode_blob.bin' @0x1e380 size 0x35400 in mcache @0x76add080
607 06:42:46.914413 microcode: sig=0x906a4 pf=0x80 revision=0x423
608 06:42:46.920969 microcode: Update skipped, already up-to-date
609 06:42:46.927691 CBFS: Found 'fsps.bin' @0x13f000 size 0x46fd9 in mcache @0x76add2a8
610 06:42:46.959350 Detected 5 core, 5 thread CPU.
611 06:42:46.962670 Setting up SMI for CPU
612 06:42:46.965965 IED base = 0x7bc00000
613 06:42:46.966495 IED size = 0x00400000
614 06:42:46.969143 Will perform SMM setup.
615 06:42:46.972968 CPU: Intel(R) Celeron(R) 7305.
616 06:42:46.975928 LAPIC 0x0 in XAPIC mode.
617 06:42:46.982754 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
618 06:42:46.989545 Processing 18 relocs. Offset value of 0x00030000
619 06:42:46.992922 Attempting to start 4 APs
620 06:42:46.996730 Waiting for 10ms after sending INIT.
621 06:42:47.009729 Waiting for SIPI to complete...
622 06:42:47.013328 done.
623 06:42:47.013857 LAPIC 0x16 in XAPIC mode.
624 06:42:47.015948 Waiting for SIPI to complete...
625 06:42:47.019478 done.
626 06:42:47.020011 LAPIC 0x10 in XAPIC mode.
627 06:42:47.022692 LAPIC 0x12 in XAPIC mode.
628 06:42:47.029793 AP: slot 3 apic_id 10, MCU rev: 0x00000423
629 06:42:47.030325 LAPIC 0x14 in XAPIC mode.
630 06:42:47.036200 AP: slot 4 apic_id 12, MCU rev: 0x00000423
631 06:42:47.039058 AP: slot 2 apic_id 16, MCU rev: 0x00000423
632 06:42:47.042939 AP: slot 1 apic_id 14, MCU rev: 0x00000423
633 06:42:47.046450 smm_setup_relocation_handler: enter
634 06:42:47.049377 smm_setup_relocation_handler: exit
635 06:42:47.059387 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
636 06:42:47.062557 Processing 11 relocs. Offset value of 0x00038000
637 06:42:47.069089 smm_module_setup_stub: stack_top = 0x7b802800
638 06:42:47.072666 smm_module_setup_stub: per cpu stack_size = 0x800
639 06:42:47.079381 smm_module_setup_stub: runtime.start32_offset = 0x4c
640 06:42:47.082449 smm_module_setup_stub: runtime.smm_size = 0x10000
641 06:42:47.088955 SMM Module: stub loaded at 38000. Will call 0x76a5220d
642 06:42:47.092605 Installing permanent SMM handler to 0x7b800000
643 06:42:47.095631 FX_SAVE [0x7b9ff600-0x7ba00000]
644 06:42:47.102510 HANDLER [0x7b9f6000-0x7b9ff528]
645 06:42:47.103068
646 06:42:47.103416 CPU 0
647 06:42:47.105804 ss0 [0x7b9f5c00-0x7b9f6000]
648 06:42:47.109305 stub0 [0x7b9ee000-0x7b9ee208]
649 06:42:47.109839
650 06:42:47.110187 CPU 1
651 06:42:47.112598 ss1 [0x7b9f5800-0x7b9f5c00]
652 06:42:47.119054 stub1 [0x7b9edc00-0x7b9ede08]
653 06:42:47.119507
654 06:42:47.119895 CPU 2
655 06:42:47.122579 ss2 [0x7b9f5400-0x7b9f5800]
656 06:42:47.125931 stub2 [0x7b9ed800-0x7b9eda08]
657 06:42:47.126460
658 06:42:47.126853 CPU 3
659 06:42:47.129277 ss3 [0x7b9f5000-0x7b9f5400]
660 06:42:47.135718 stub3 [0x7b9ed400-0x7b9ed608]
661 06:42:47.136261
662 06:42:47.136607 CPU 4
663 06:42:47.138842 ss4 [0x7b9f4c00-0x7b9f5000]
664 06:42:47.142523 stub4 [0x7b9ed000-0x7b9ed208]
665 06:42:47.143129
666 06:42:47.145890 stacks [0x7b800000-0x7b802800]
667 06:42:47.155764 Loading module at 0x7b9f6000 with entry 0x7b9f6d5c. filesize: 0x4408 memsize: 0x9528
668 06:42:47.159744 Processing 255 relocs. Offset value of 0x7b9f6000
669 06:42:47.169191 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
670 06:42:47.172537 Processing 11 relocs. Offset value of 0x7b9ee000
671 06:42:47.179330 smm_module_setup_stub: stack_top = 0x7b802800
672 06:42:47.182520 smm_module_setup_stub: per cpu stack_size = 0x800
673 06:42:47.188970 smm_module_setup_stub: runtime.start32_offset = 0x4c
674 06:42:47.192339 smm_module_setup_stub: runtime.smm_size = 0x200000
675 06:42:47.198873 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
676 06:42:47.205173 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
677 06:42:47.211866 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
678 06:42:47.218591 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
679 06:42:47.222194 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
680 06:42:47.229021 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
681 06:42:47.235722 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
682 06:42:47.242334 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
683 06:42:47.248894 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5c
684 06:42:47.253232 Clearing SMI status registers
685 06:42:47.255944 SMI_STS: PM1
686 06:42:47.256427 PM1_STS: WAK PWRBTN
687 06:42:47.266501 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
688 06:42:47.269833 In relocation handler: CPU 0
689 06:42:47.273230 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
690 06:42:47.276698 Writing SMRR. base = 0x7b800006, mask=0xff800c00
691 06:42:47.279451 Relocation complete.
692 06:42:47.286574 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
693 06:42:47.289921 In relocation handler: CPU 3
694 06:42:47.292964 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
695 06:42:47.299975 Writing SMRR. base = 0x7b800006, mask=0xff800c00
696 06:42:47.300508 Relocation complete.
697 06:42:47.306447 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
698 06:42:47.309745 In relocation handler: CPU 1
699 06:42:47.313341 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
700 06:42:47.319430 Writing SMRR. base = 0x7b800006, mask=0xff800c00
701 06:42:47.323150 Relocation complete.
702 06:42:47.329605 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
703 06:42:47.332986 In relocation handler: CPU 2
704 06:42:47.336409 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
705 06:42:47.339721 Writing SMRR. base = 0x7b800006, mask=0xff800c00
706 06:42:47.343120 Relocation complete.
707 06:42:47.349674 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
708 06:42:47.353267 In relocation handler: CPU 4
709 06:42:47.356512 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
710 06:42:47.362943 Writing SMRR. base = 0x7b800006, mask=0xff800c00
711 06:42:47.363518 Relocation complete.
712 06:42:47.366323 Initializing CPU #0
713 06:42:47.370103 CPU: vendor Intel device 906a4
714 06:42:47.373427 CPU: family 06, model 9a, stepping 04
715 06:42:47.376451 Clearing out pending MCEs
716 06:42:47.379728 cpu: energy policy set to 7
717 06:42:47.380302 Turbo is unavailable
718 06:42:47.386457 microcode: Update skipped, already up-to-date
719 06:42:47.387058 CPU #0 initialized
720 06:42:47.389642 Initializing CPU #4
721 06:42:47.392786 Initializing CPU #3
722 06:42:47.396331 CPU: vendor Intel device 906a4
723 06:42:47.399701 CPU: family 06, model 9a, stepping 04
724 06:42:47.400230 Initializing CPU #2
725 06:42:47.402720 CPU: vendor Intel device 906a4
726 06:42:47.406463 CPU: family 06, model 9a, stepping 04
727 06:42:47.409676 Initializing CPU #1
728 06:42:47.413094 Clearing out pending MCEs
729 06:42:47.416284 Clearing out pending MCEs
730 06:42:47.419516 CPU: vendor Intel device 906a4
731 06:42:47.422998 CPU: family 06, model 9a, stepping 04
732 06:42:47.423524 cpu: energy policy set to 7
733 06:42:47.426666 CPU: vendor Intel device 906a4
734 06:42:47.433298 CPU: family 06, model 9a, stepping 04
735 06:42:47.433873 cpu: energy policy set to 7
736 06:42:47.439380 microcode: Update skipped, already up-to-date
737 06:42:47.439856 CPU #4 initialized
738 06:42:47.442505 Clearing out pending MCEs
739 06:42:47.446156 Clearing out pending MCEs
740 06:42:47.449428 microcode: Update skipped, already up-to-date
741 06:42:47.452590 CPU #3 initialized
742 06:42:47.456269 cpu: energy policy set to 7
743 06:42:47.459255 cpu: energy policy set to 7
744 06:42:47.462839 microcode: Update skipped, already up-to-date
745 06:42:47.466431 CPU #2 initialized
746 06:42:47.469658 microcode: Update skipped, already up-to-date
747 06:42:47.473121 CPU #1 initialized
748 06:42:47.476483 bsp_do_flight_plan done after 453 msecs.
749 06:42:47.477014 Enabling SMIs.
750 06:42:47.483094 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 244 / 352 ms
751 06:42:47.500204 Overriding PL2 (55) PsysPL2 (90) Psys_Pmax (214)
752 06:42:47.506306 Overriding power limits PL1(mW) (15000, 15000) PL2(mW) (55000, 55000) PL4 (123)
753 06:42:47.513081 Probing TPM I2C: done! DID_VID 0x00281ae0
754 06:42:47.516042 Locality already claimed
755 06:42:47.519533 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
756 06:42:47.530733 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9
757 06:42:47.533964 Enabling GPIO PM b/c CR50 has long IRQ pulse support
758 06:42:47.540488 fw_config match found: AUDIO=NAU88L25B_I2S
759 06:42:47.543948 CBFS: Found 'vbt.bin' @0x7e980 size 0x4eb in mcache @0x76add1c4
760 06:42:47.550815 Found a VBT of 8704 bytes after decompression
761 06:42:47.551363 PsysPmax = 214W
762 06:42:47.553900 PCI 1.0, PIN A, using IRQ #16
763 06:42:47.557317 PCI 2.0, PIN A, using IRQ #17
764 06:42:47.560342 PCI 4.0, PIN A, using IRQ #18
765 06:42:47.563948 PCI 5.0, PIN A, using IRQ #16
766 06:42:47.567334 PCI 6.0, PIN A, using IRQ #16
767 06:42:47.570653 PCI 6.2, PIN C, using IRQ #18
768 06:42:47.573949 PCI 7.0, PIN A, using IRQ #19
769 06:42:47.577313 PCI 7.1, PIN B, using IRQ #20
770 06:42:47.580391 PCI 7.2, PIN C, using IRQ #21
771 06:42:47.583690 PCI 7.3, PIN D, using IRQ #22
772 06:42:47.587149 PCI 8.0, PIN A, using IRQ #23
773 06:42:47.590649 PCI D.0, PIN A, using IRQ #17
774 06:42:47.593829 PCI D.1, PIN B, using IRQ #19
775 06:42:47.597394 PCI 10.0, PIN A, using IRQ #24
776 06:42:47.600824 PCI 10.1, PIN B, using IRQ #25
777 06:42:47.601398 PCI 10.6, PIN C, using IRQ #20
778 06:42:47.603951 PCI 10.7, PIN D, using IRQ #21
779 06:42:47.607346 PCI 11.0, PIN A, using IRQ #26
780 06:42:47.610497 PCI 11.1, PIN B, using IRQ #27
781 06:42:47.613904 PCI 11.2, PIN C, using IRQ #28
782 06:42:47.617236 PCI 11.3, PIN D, using IRQ #29
783 06:42:47.620294 PCI 12.0, PIN A, using IRQ #30
784 06:42:47.624517 PCI 12.6, PIN B, using IRQ #31
785 06:42:47.627126 PCI 12.7, PIN C, using IRQ #22
786 06:42:47.630203 PCI 13.0, PIN A, using IRQ #32
787 06:42:47.633948 PCI 13.1, PIN B, using IRQ #33
788 06:42:47.636922 PCI 13.2, PIN C, using IRQ #34
789 06:42:47.640403 PCI 13.3, PIN D, using IRQ #35
790 06:42:47.643671 PCI 14.0, PIN B, using IRQ #23
791 06:42:47.647142 PCI 14.1, PIN A, using IRQ #36
792 06:42:47.650868 PCI 14.3, PIN C, using IRQ #17
793 06:42:47.653748 PCI 15.0, PIN A, using IRQ #37
794 06:42:47.654332 PCI 15.1, PIN B, using IRQ #38
795 06:42:47.657403 PCI 15.2, PIN C, using IRQ #39
796 06:42:47.660624 PCI 15.3, PIN D, using IRQ #40
797 06:42:47.663426 PCI 16.0, PIN A, using IRQ #18
798 06:42:47.667085 PCI 16.1, PIN B, using IRQ #19
799 06:42:47.670502 PCI 16.2, PIN C, using IRQ #20
800 06:42:47.673752 PCI 16.3, PIN D, using IRQ #21
801 06:42:47.677319 PCI 16.4, PIN A, using IRQ #18
802 06:42:47.680142 PCI 16.5, PIN B, using IRQ #19
803 06:42:47.684099 PCI 17.0, PIN A, using IRQ #22
804 06:42:47.686942 PCI 19.0, PIN A, using IRQ #41
805 06:42:47.690365 PCI 19.1, PIN B, using IRQ #42
806 06:42:47.693667 PCI 19.2, PIN C, using IRQ #43
807 06:42:47.696856 PCI 1C.0, PIN A, using IRQ #16
808 06:42:47.700211 PCI 1C.1, PIN B, using IRQ #17
809 06:42:47.703505 PCI 1C.2, PIN C, using IRQ #18
810 06:42:47.706813 PCI 1C.3, PIN D, using IRQ #19
811 06:42:47.707401 PCI 1C.4, PIN A, using IRQ #16
812 06:42:47.709872 PCI 1C.5, PIN B, using IRQ #17
813 06:42:47.713229 PCI 1C.6, PIN C, using IRQ #18
814 06:42:47.716597 PCI 1C.7, PIN D, using IRQ #19
815 06:42:47.719818 PCI 1D.0, PIN A, using IRQ #16
816 06:42:47.723689 PCI 1D.1, PIN B, using IRQ #17
817 06:42:47.726608 PCI 1D.2, PIN C, using IRQ #18
818 06:42:47.730155 PCI 1D.3, PIN D, using IRQ #19
819 06:42:47.733812 PCI 1E.0, PIN A, using IRQ #23
820 06:42:47.736613 PCI 1E.1, PIN B, using IRQ #20
821 06:42:47.740274 PCI 1E.2, PIN C, using IRQ #44
822 06:42:47.743801 PCI 1E.3, PIN D, using IRQ #45
823 06:42:47.746749 PCI 1F.3, PIN B, using IRQ #22
824 06:42:47.750022 PCI 1F.4, PIN C, using IRQ #23
825 06:42:47.753468 PCI 1F.6, PIN D, using IRQ #20
826 06:42:47.756815 PCI 1F.7, PIN A, using IRQ #21
827 06:42:47.759790 IRQ: Using dynamically assigned PCI IO-APIC IRQs
828 06:42:47.767162 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
829 06:42:47.825064 FSPS returned 0
830 06:42:47.828541 Executing Phase 1 of FspMultiPhaseSiInit
831 06:42:47.838941 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
832 06:42:47.842197 port C0 DISC req: usage 1 usb3 1 usb2 1
833 06:42:47.844959 Raw Buffer output 0 00000111
834 06:42:47.848493 Raw Buffer output 1 00000000
835 06:42:47.852367 pmc_send_ipc_cmd succeeded
836 06:42:47.859171 port C1 DISC req: usage 1 usb3 3 usb2 3
837 06:42:47.859758 Raw Buffer output 0 00000331
838 06:42:47.862355 Raw Buffer output 1 00000000
839 06:42:47.866510 pmc_send_ipc_cmd succeeded
840 06:42:47.873038 AP Mode Entry enabled, skip waiting for DisplayPort connection
841 06:42:47.879154 Detected 5 core, 5 thread CPU.
842 06:42:47.882580 Detected 5 core, 5 thread CPU.
843 06:42:47.887213 Detected 5 core, 5 thread CPU.
844 06:42:47.890957 Detected 5 core, 5 thread CPU.
845 06:42:47.894099 Detected 5 core, 5 thread CPU.
846 06:42:47.897636 Detected 5 core, 5 thread CPU.
847 06:42:47.900876 Detected 5 core, 5 thread CPU.
848 06:42:47.904114 Detected 5 core, 5 thread CPU.
849 06:42:47.907722 Detected 5 core, 5 thread CPU.
850 06:42:47.911030 Detected 5 core, 5 thread CPU.
851 06:42:47.914509 Detected 5 core, 5 thread CPU.
852 06:42:47.917545 Detected 5 core, 5 thread CPU.
853 06:42:47.920878 Detected 5 core, 5 thread CPU.
854 06:42:47.924521 Detected 5 core, 5 thread CPU.
855 06:42:47.927786 Detected 5 core, 5 thread CPU.
856 06:42:47.930897 Detected 5 core, 5 thread CPU.
857 06:42:48.029151 Detected 5 core, 5 thread CPU.
858 06:42:48.032531 Detected 5 core, 5 thread CPU.
859 06:42:48.035708 Detected 5 core, 5 thread CPU.
860 06:42:48.039135 Detected 5 core, 5 thread CPU.
861 06:42:48.042893 Detected 5 core, 5 thread CPU.
862 06:42:48.046002 Detected 5 core, 5 thread CPU.
863 06:42:48.049352 Detected 5 core, 5 thread CPU.
864 06:42:48.052458 Detected 5 core, 5 thread CPU.
865 06:42:48.055455 Detected 5 core, 5 thread CPU.
866 06:42:48.059523 Detected 5 core, 5 thread CPU.
867 06:42:48.062832 Detected 5 core, 5 thread CPU.
868 06:42:48.065861 Detected 5 core, 5 thread CPU.
869 06:42:48.069222 Detected 5 core, 5 thread CPU.
870 06:42:48.072598 Detected 5 core, 5 thread CPU.
871 06:42:48.075788 Display FSP Version Info HOB
872 06:42:48.079377 Reference Code - CPU = c.0.65.70
873 06:42:48.079950 uCode Version = 0.0.4.23
874 06:42:48.082373 TXT ACM version = ff.ff.ff.ffff
875 06:42:48.085968 Reference Code - ME = c.0.65.70
876 06:42:48.089208 MEBx version = 0.0.0.0
877 06:42:48.092250 ME Firmware Version = Lite SKU
878 06:42:48.095780 Reference Code - PCH = c.0.65.70
879 06:42:48.099739 PCH-CRID Status = Disabled
880 06:42:48.102815 PCH-CRID Original Value = ff.ff.ff.ffff
881 06:42:48.106053 PCH-CRID New Value = ff.ff.ff.ffff
882 06:42:48.109755 OPROM - RST - RAID = ff.ff.ff.ffff
883 06:42:48.112519 PCH Hsio Version = 4.0.0.0
884 06:42:48.115820 Reference Code - SA - System Agent = c.0.65.70
885 06:42:48.119269 Reference Code - MRC = 0.0.3.80
886 06:42:48.122455 SA - PCIe Version = c.0.65.70
887 06:42:48.126049 SA-CRID Status = Disabled
888 06:42:48.129090 SA-CRID Original Value = 0.0.0.4
889 06:42:48.133011 SA-CRID New Value = 0.0.0.4
890 06:42:48.136495 OPROM - VBIOS = ff.ff.ff.ffff
891 06:42:48.139334 IO Manageability Engine FW Version = 24.0.4.0
892 06:42:48.143034 PHY Build Version = 0.0.0.2016
893 06:42:48.146006 Thunderbolt(TM) FW Version = 11.5.0.0
894 06:42:48.153368 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
895 06:42:48.155989 Found PCIe Root Port #7 at PCI: 00:1c.0.
896 06:42:48.162433 Found PCIe Root Port #8 at PCI: 00:1c.7.
897 06:42:48.166148 Found PCIe Root Port #12 at PCI: 00:1d.0.
898 06:42:48.175892 pcie_rp_update_dev: Couldn't find PCIe Root Port #6 (originally PCI: 00:1c.5) which was enabled in devicetree, removing.
899 06:42:48.186086 Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.
900 06:42:48.192743 Remapping PCIe Root Port #12 from PCI: 00:1d.3 to new function number 0.
901 06:42:48.195492 Found PCIe Root Port #1 at PCI: 00:07.0.
902 06:42:48.199236 Found PCIe Root Port #2 at PCI: 00:07.1.
903 06:42:48.202891 Found PCIe Root Port #3 at PCI: 00:07.2.
904 06:42:48.205866 Sending EOP early from SoC
905 06:42:48.209346 HECI: Sending End-of-Post
906 06:42:48.215634 BS: BS_DEV_INIT_CHIPS run times (exec / console): 180 / 545 ms
907 06:42:48.218889 Enumerating buses...
908 06:42:48.222225 Show all devs... Before device enumeration.
909 06:42:48.225610 Root Device: enabled 1
910 06:42:48.226208 CPU_CLUSTER: 0: enabled 1
911 06:42:48.228743 DOMAIN: 0000: enabled 1
912 06:42:48.232780 GPIO: 0: enabled 1
913 06:42:48.235740 PCI: 00:00.0: enabled 1
914 06:42:48.236293 PCI: 00:01.0: enabled 0
915 06:42:48.239519 PCI: 00:01.1: enabled 0
916 06:42:48.242341 PCI: 00:02.0: enabled 1
917 06:42:48.242929 PCI: 00:04.0: enabled 1
918 06:42:48.245878 PCI: 00:05.0: enabled 0
919 06:42:48.249274 PCI: 00:06.0: enabled 0
920 06:42:48.252344 PCI: 00:06.2: enabled 0
921 06:42:48.252889 PCI: 00:07.0: enabled 1
922 06:42:48.255634 PCI: 00:07.1: enabled 1
923 06:42:48.258939 PCI: 00:07.2: enabled 1
924 06:42:48.262447 PCI: 00:07.3: enabled 0
925 06:42:48.262920 PCI: 00:08.0: enabled 0
926 06:42:48.266187 PCI: 00:09.0: enabled 0
927 06:42:48.269152 PCI: 00:0a.0: enabled 1
928 06:42:48.272405 PCI: 00:0d.0: enabled 1
929 06:42:48.272946 PCI: 00:0d.1: enabled 0
930 06:42:48.275322 PCI: 00:0d.2: enabled 1
931 06:42:48.279627 PCI: 00:0d.3: enabled 1
932 06:42:48.280172 PCI: 00:0e.0: enabled 0
933 06:42:48.282281 PCI: 00:10.0: enabled 0
934 06:42:48.285529 PCI: 00:10.1: enabled 0
935 06:42:48.289046 PCI: 00:10.6: enabled 0
936 06:42:48.289591 PCI: 00:10.7: enabled 0
937 06:42:48.292494 PCI: 00:12.0: enabled 0
938 06:42:48.295776 PCI: 00:12.6: enabled 0
939 06:42:48.299476 PCI: 00:12.7: enabled 0
940 06:42:48.300020 PCI: 00:13.0: enabled 0
941 06:42:48.302540 PCI: 00:14.0: enabled 1
942 06:42:48.305291 PCI: 00:14.1: enabled 0
943 06:42:48.308861 PCI: 00:14.2: enabled 1
944 06:42:48.309402 PCI: 00:14.3: enabled 1
945 06:42:48.312232 PCI: 00:15.0: enabled 1
946 06:42:48.315781 PCI: 00:15.1: enabled 1
947 06:42:48.316320 PCI: 00:15.2: enabled 0
948 06:42:48.318592 PCI: 00:15.3: enabled 0
949 06:42:48.321984 PCI: 00:16.0: enabled 1
950 06:42:48.325752 PCI: 00:16.1: enabled 0
951 06:42:48.326331 PCI: 00:16.2: enabled 0
952 06:42:48.329063 PCI: 00:16.3: enabled 0
953 06:42:48.332314 PCI: 00:16.4: enabled 0
954 06:42:48.335475 PCI: 00:16.5: enabled 0
955 06:42:48.335999 PCI: 00:17.0: enabled 1
956 06:42:48.338544 PCI: 00:19.0: enabled 0
957 06:42:48.342171 PCI: 00:19.1: enabled 0
958 06:42:48.345467 PCI: 00:19.2: enabled 0
959 06:42:48.345994 PCI: 00:1a.0: enabled 0
960 06:42:48.348541 PCI: 00:1c.0: enabled 0
961 06:42:48.352305 PCI: 00:1c.1: enabled 0
962 06:42:48.352825 PCI: 00:1c.2: enabled 0
963 06:42:48.355964 PCI: 00:1c.3: enabled 0
964 06:42:48.359020 PCI: 00:1c.4: enabled 0
965 06:42:48.362467 PCI: 00:1c.5: enabled 1
966 06:42:48.363040 PCI: 00:1c.0: enabled 1
967 06:42:48.365655 PCI: 00:1c.7: enabled 1
968 06:42:48.368885 PCI: 00:1d.0: enabled 0
969 06:42:48.372621 PCI: 00:1d.1: enabled 0
970 06:42:48.373148 PCI: 00:1d.2: enabled 0
971 06:42:48.375471 PCI: 00:1d.0: enabled 1
972 06:42:48.378814 PCI: 00:1e.0: enabled 1
973 06:42:48.382513 PCI: 00:1e.1: enabled 0
974 06:42:48.383080 PCI: 00:1e.2: enabled 0
975 06:42:48.385730 PCI: 00:1e.3: enabled 1
976 06:42:48.389193 PCI: 00:1f.0: enabled 1
977 06:42:48.389720 PCI: 00:1f.1: enabled 0
978 06:42:48.392454 PCI: 00:1f.2: enabled 1
979 06:42:48.395598 PCI: 00:1f.3: enabled 1
980 06:42:48.398942 PCI: 00:1f.4: enabled 1
981 06:42:48.399470 PCI: 00:1f.5: enabled 1
982 06:42:48.402295 PCI: 00:1f.6: enabled 0
983 06:42:48.405552 PCI: 00:1f.7: enabled 0
984 06:42:48.408804 GENERIC: 0.0: enabled 1
985 06:42:48.409334 GENERIC: 0.0: enabled 1
986 06:42:48.412116 GENERIC: 1.0: enabled 1
987 06:42:48.462094 GENERIC: 0.0: enabled 1
988 06:42:48.462641 GENERIC: 1.0: enabled 1
989 06:42:48.463019 USB0 port 0: enabled 1
990 06:42:48.463695 GENERIC: 0.0: enabled 1
991 06:42:48.464056 GENERIC: 0.0: enabled 1
992 06:42:48.464365 USB0 port 0: enabled 1
993 06:42:48.464660 GENERIC: 0.0: enabled 1
994 06:42:48.464950 I2C: 00:1a: enabled 1
995 06:42:48.465235 I2C: 00:50: enabled 1
996 06:42:48.465518 PCI: 00:00.0: enabled 1
997 06:42:48.465799 PCI: 00:00.0: enabled 1
998 06:42:48.466075 GENERIC: 0.0: enabled 1
999 06:42:48.466352 GENERIC: 0.0: enabled 1
1000 06:42:48.466628 PNP: 0c09.0: enabled 1
1001 06:42:48.466933 GENERIC: 0.0: enabled 1
1002 06:42:48.467209 USB3 port 0: enabled 1
1003 06:42:48.467483 USB3 port 1: enabled 0
1004 06:42:48.467758 USB3 port 2: enabled 1
1005 06:42:48.468028 USB3 port 3: enabled 0
1006 06:42:48.468300 USB2 port 0: enabled 1
1007 06:42:48.468572 USB2 port 1: enabled 0
1008 06:42:48.483693 USB2 port 2: enabled 1
1009 06:42:48.484246 USB2 port 3: enabled 1
1010 06:42:48.484598 USB2 port 4: enabled 1
1011 06:42:48.484921 USB2 port 5: enabled 1
1012 06:42:48.485230 USB2 port 6: enabled 1
1013 06:42:48.485875 USB2 port 7: enabled 1
1014 06:42:48.486201 USB2 port 8: enabled 0
1015 06:42:48.486503 USB2 port 9: enabled 1
1016 06:42:48.486881 USB3 port 0: enabled 1
1017 06:42:48.487194 USB3 port 1: enabled 1
1018 06:42:48.487482 USB3 port 2: enabled 1
1019 06:42:48.490239 USB3 port 3: enabled 1
1020 06:42:48.493697 GENERIC: 0.0: enabled 1
1021 06:42:48.494221 GENERIC: 1.0: enabled 1
1022 06:42:48.497069 APIC: 00: enabled 1
1023 06:42:48.500098 APIC: 14: enabled 1
1024 06:42:48.500670 APIC: 16: enabled 1
1025 06:42:48.503590 APIC: 10: enabled 1
1026 06:42:48.506923 APIC: 12: enabled 1
1027 06:42:48.507442 Compare with tree...
1028 06:42:48.510220 Root Device: enabled 1
1029 06:42:48.514070 CPU_CLUSTER: 0: enabled 1
1030 06:42:48.514591 APIC: 00: enabled 1
1031 06:42:48.517106 APIC: 14: enabled 1
1032 06:42:48.519898 APIC: 16: enabled 1
1033 06:42:48.520390 APIC: 10: enabled 1
1034 06:42:48.523107 APIC: 12: enabled 1
1035 06:42:48.526808 DOMAIN: 0000: enabled 1
1036 06:42:48.530105 GPIO: 0: enabled 1
1037 06:42:48.530524 PCI: 00:00.0: enabled 1
1038 06:42:48.533517 PCI: 00:01.0: enabled 0
1039 06:42:48.536946 PCI: 00:01.1: enabled 0
1040 06:42:48.540016 PCI: 00:02.0: enabled 1
1041 06:42:48.543603 PCI: 00:04.0: enabled 1
1042 06:42:48.544125 GENERIC: 0.0: enabled 1
1043 06:42:48.547226 PCI: 00:05.0: enabled 0
1044 06:42:48.549749 PCI: 00:06.0: enabled 0
1045 06:42:48.553328 PCI: 00:06.2: enabled 0
1046 06:42:48.553748 PCI: 00:07.0: enabled 1
1047 06:42:48.556890 GENERIC: 0.0: enabled 1
1048 06:42:48.560206 PCI: 00:07.1: enabled 1
1049 06:42:48.563532 GENERIC: 1.0: enabled 1
1050 06:42:48.566822 PCI: 00:07.2: enabled 1
1051 06:42:48.569720 GENERIC: 0.0: enabled 1
1052 06:42:48.570140 PCI: 00:08.0: enabled 0
1053 06:42:48.573684 PCI: 00:09.0: enabled 0
1054 06:42:48.576599 PCI: 00:0a.0: enabled 1
1055 06:42:48.579945 PCI: 00:0d.0: enabled 1
1056 06:42:48.583093 USB0 port 0: enabled 1
1057 06:42:48.583529 USB3 port 0: enabled 1
1058 06:42:48.587623 USB3 port 1: enabled 0
1059 06:42:48.590203 USB3 port 2: enabled 1
1060 06:42:48.593221 USB3 port 3: enabled 0
1061 06:42:48.596491 PCI: 00:0d.1: enabled 0
1062 06:42:48.597031 PCI: 00:0d.2: enabled 1
1063 06:42:48.599686 GENERIC: 0.0: enabled 1
1064 06:42:48.603364 PCI: 00:0d.3: enabled 1
1065 06:42:48.606837 GENERIC: 0.0: enabled 1
1066 06:42:48.609984 PCI: 00:0e.0: enabled 0
1067 06:42:48.610516 PCI: 00:10.0: enabled 0
1068 06:42:48.613235 PCI: 00:10.1: enabled 0
1069 06:42:48.616367 PCI: 00:10.6: enabled 0
1070 06:42:48.619468 PCI: 00:10.7: enabled 0
1071 06:42:48.623110 PCI: 00:12.0: enabled 0
1072 06:42:48.623595 PCI: 00:12.6: enabled 0
1073 06:42:48.626181 PCI: 00:12.7: enabled 0
1074 06:42:48.629458 PCI: 00:13.0: enabled 0
1075 06:42:48.633271 PCI: 00:14.0: enabled 1
1076 06:42:48.636365 USB0 port 0: enabled 1
1077 06:42:48.636888 USB2 port 0: enabled 1
1078 06:42:48.640081 USB2 port 1: enabled 0
1079 06:42:48.643315 USB2 port 2: enabled 1
1080 06:42:48.646431 USB2 port 3: enabled 1
1081 06:42:48.649917 USB2 port 4: enabled 1
1082 06:42:48.650441 USB2 port 5: enabled 1
1083 06:42:48.653536 USB2 port 6: enabled 1
1084 06:42:48.656552 USB2 port 7: enabled 1
1085 06:42:48.660056 USB2 port 8: enabled 0
1086 06:42:48.663331 USB2 port 9: enabled 1
1087 06:42:48.666433 USB3 port 0: enabled 1
1088 06:42:48.666888 USB3 port 1: enabled 1
1089 06:42:48.669439 USB3 port 2: enabled 1
1090 06:42:48.672928 USB3 port 3: enabled 1
1091 06:42:48.676135 PCI: 00:14.1: enabled 0
1092 06:42:48.679845 PCI: 00:14.2: enabled 1
1093 06:42:48.680385 PCI: 00:14.3: enabled 1
1094 06:42:48.682878 GENERIC: 0.0: enabled 1
1095 06:42:48.686216 PCI: 00:15.0: enabled 1
1096 06:42:48.689860 I2C: 00:1a: enabled 1
1097 06:42:48.693193 PCI: 00:15.1: enabled 1
1098 06:42:48.693760 I2C: 00:50: enabled 1
1099 06:42:48.696455 PCI: 00:15.2: enabled 0
1100 06:42:48.699633 PCI: 00:15.3: enabled 0
1101 06:42:48.702982 PCI: 00:16.0: enabled 1
1102 06:42:48.706192 PCI: 00:16.1: enabled 0
1103 06:42:48.706610 PCI: 00:16.2: enabled 0
1104 06:42:48.709819 PCI: 00:16.3: enabled 0
1105 06:42:48.712950 PCI: 00:16.4: enabled 0
1106 06:42:48.716215 PCI: 00:16.5: enabled 0
1107 06:42:48.719368 PCI: 00:17.0: enabled 1
1108 06:42:48.719918 PCI: 00:19.0: enabled 0
1109 06:42:48.723099 PCI: 00:19.1: enabled 0
1110 06:42:48.726266 PCI: 00:19.2: enabled 0
1111 06:42:48.729848 PCI: 00:1a.0: enabled 0
1112 06:42:48.730370 PCI: 00:1c.0: enabled 1
1113 06:42:48.732625 PCI: 00:00.0: enabled 1
1114 06:42:48.736185 PCI: 00:1c.7: enabled 1
1115 06:42:48.739736 GENERIC: 0.0: enabled 1
1116 06:42:48.742804 PCI: 00:1d.0: enabled 1
1117 06:42:48.746462 GENERIC: 0.0: enabled 1
1118 06:42:48.747015 PCI: 00:1e.0: enabled 1
1119 06:42:48.749719 PCI: 00:1e.1: enabled 0
1120 06:42:48.753063 PCI: 00:1e.2: enabled 0
1121 06:42:48.756465 PCI: 00:1e.3: enabled 1
1122 06:42:48.756983 PCI: 00:1f.0: enabled 1
1123 06:42:48.759717 PNP: 0c09.0: enabled 1
1124 06:42:48.762943 PCI: 00:1f.1: enabled 0
1125 06:42:48.766388 PCI: 00:1f.2: enabled 1
1126 06:42:48.769573 GENERIC: 0.0: enabled 1
1127 06:42:48.773222 GENERIC: 0.0: enabled 1
1128 06:42:48.773786 GENERIC: 1.0: enabled 1
1129 06:42:48.775907 PCI: 00:1f.3: enabled 1
1130 06:42:48.779965 PCI: 00:1f.4: enabled 1
1131 06:42:48.783038 PCI: 00:1f.5: enabled 1
1132 06:42:48.786060 PCI: 00:1f.6: enabled 0
1133 06:42:48.786576 PCI: 00:1f.7: enabled 0
1134 06:42:48.789643 Root Device scanning...
1135 06:42:48.792419 scan_static_bus for Root Device
1136 06:42:48.796581 CPU_CLUSTER: 0 enabled
1137 06:42:48.797102 DOMAIN: 0000 enabled
1138 06:42:48.799455 DOMAIN: 0000 scanning...
1139 06:42:48.803165 PCI: pci_scan_bus for bus 00
1140 06:42:48.806143 PCI: 00:00.0 [8086/0000] ops
1141 06:42:48.809512 PCI: 00:00.0 [8086/4619] enabled
1142 06:42:48.812902 PCI: 00:02.0 [8086/0000] bus ops
1143 06:42:48.816130 PCI: 00:02.0 [8086/46b3] enabled
1144 06:42:48.819501 PCI: 00:04.0 [8086/0000] bus ops
1145 06:42:48.822392 PCI: 00:04.0 [8086/461d] enabled
1146 06:42:48.825767 PCI: 00:07.0 subordinate bus PCI Express
1147 06:42:48.829623 PCI: 00:07.0 hot-plug capable
1148 06:42:48.832497 PCI: 00:07.0 [8086/466e] enabled
1149 06:42:48.835927 PCI: 00:07.1 subordinate bus PCI Express
1150 06:42:48.839105 PCI: 00:07.1 hot-plug capable
1151 06:42:48.843170 PCI: 00:07.1 [8086/463f] enabled
1152 06:42:48.845762 PCI: 00:07.2 subordinate bus PCI Express
1153 06:42:48.849556 PCI: 00:07.2 hot-plug capable
1154 06:42:48.852421 PCI: 00:07.2 [8086/462f] enabled
1155 06:42:48.855949 PCI: 00:08.0 [8086/464f] disabled
1156 06:42:48.859736 PCI: 00:0a.0 [8086/467d] enabled
1157 06:42:48.862767 PCI: 00:0d.0 [8086/0000] bus ops
1158 06:42:48.866564 PCI: 00:0d.0 [8086/461e] enabled
1159 06:42:48.870035 PCI: 00:0d.2 [8086/0000] bus ops
1160 06:42:48.873159 PCI: 00:0d.2 [8086/463e] enabled
1161 06:42:48.876417 PCI: 00:0d.3 [8086/0000] bus ops
1162 06:42:48.879358 PCI: 00:0d.3 [8086/466d] enabled
1163 06:42:48.883472 PCI: 00:14.0 [8086/0000] bus ops
1164 06:42:48.886024 PCI: 00:14.0 [8086/51ed] enabled
1165 06:42:48.889350 PCI: 00:14.2 [8086/51ef] enabled
1166 06:42:48.892440 PCI: 00:14.3 [8086/0000] bus ops
1167 06:42:48.896095 PCI: 00:14.3 [8086/51f0] enabled
1168 06:42:48.899456 PCI: 00:15.0 [8086/0000] bus ops
1169 06:42:48.902375 PCI: 00:15.0 [8086/51e8] enabled
1170 06:42:48.906118 PCI: 00:15.1 [8086/0000] bus ops
1171 06:42:48.909058 PCI: 00:15.1 [8086/51e9] enabled
1172 06:42:48.913029 PCI: 00:16.0 [8086/0000] ops
1173 06:42:48.916242 PCI: 00:16.0 [8086/51e0] enabled
1174 06:42:48.922742 PCI: Static device PCI: 00:17.0 not found, disabling it.
1175 06:42:48.926112 PCI: 00:1c.0 [8086/0000] bus ops
1176 06:42:48.929876 PCI: 00:1c.0 [8086/51be] enabled
1177 06:42:48.932658 PCI: 00:1c.7 [8086/0000] bus ops
1178 06:42:48.936267 PCI: 00:1c.7 [8086/51bf] enabled
1179 06:42:48.939424 PCI: 00:1d.0 [8086/0000] bus ops
1180 06:42:48.942649 PCI: 00:1d.0 [8086/51b3] enabled
1181 06:42:48.945730 PCI: 00:1e.0 [8086/0000] ops
1182 06:42:48.948898 PCI: 00:1e.0 [8086/51a8] enabled
1183 06:42:48.952374 PCI: 00:1e.3 [8086/0000] bus ops
1184 06:42:48.955763 PCI: 00:1e.3 [8086/51ab] enabled
1185 06:42:48.958900 PCI: 00:1f.0 [8086/0000] bus ops
1186 06:42:48.962551 PCI: 00:1f.0 [8086/5182] enabled
1187 06:42:48.962719 RTC Init
1188 06:42:48.965941 Set power on after power failure.
1189 06:42:48.969231 Disabling Deep S3
1190 06:42:48.973135 Disabling Deep S3
1191 06:42:48.973309 Disabling Deep S4
1192 06:42:48.975829 Disabling Deep S4
1193 06:42:48.976011 Disabling Deep S5
1194 06:42:48.978904 Disabling Deep S5
1195 06:42:48.982464 PCI: 00:1f.2 [0000/0000] hidden
1196 06:42:48.986353 PCI: 00:1f.3 [8086/0000] bus ops
1197 06:42:48.989334 PCI: 00:1f.3 [8086/51c8] enabled
1198 06:42:48.992664 PCI: 00:1f.4 [8086/0000] bus ops
1199 06:42:48.996240 PCI: 00:1f.4 [8086/51a3] enabled
1200 06:42:48.999687 PCI: 00:1f.5 [8086/0000] bus ops
1201 06:42:49.003350 PCI: 00:1f.5 [8086/51a4] enabled
1202 06:42:49.003951 GPIO: 0 enabled
1203 06:42:49.006065 PCI: Leftover static devices:
1204 06:42:49.009145 PCI: 00:01.0
1205 06:42:49.009579 PCI: 00:01.1
1206 06:42:49.010020 PCI: 00:05.0
1207 06:42:49.012934 PCI: 00:06.0
1208 06:42:49.013466 PCI: 00:06.2
1209 06:42:49.016439 PCI: 00:09.0
1210 06:42:49.016998 PCI: 00:0d.1
1211 06:42:49.017447 PCI: 00:0e.0
1212 06:42:49.019289 PCI: 00:10.0
1213 06:42:49.019721 PCI: 00:10.1
1214 06:42:49.022867 PCI: 00:10.6
1215 06:42:49.023287 PCI: 00:10.7
1216 06:42:49.026049 PCI: 00:12.0
1217 06:42:49.026567 PCI: 00:12.6
1218 06:42:49.026938 PCI: 00:12.7
1219 06:42:49.029586 PCI: 00:13.0
1220 06:42:49.030097 PCI: 00:14.1
1221 06:42:49.032862 PCI: 00:15.2
1222 06:42:49.033285 PCI: 00:15.3
1223 06:42:49.033619 PCI: 00:16.1
1224 06:42:49.036137 PCI: 00:16.2
1225 06:42:49.036657 PCI: 00:16.3
1226 06:42:49.039419 PCI: 00:16.4
1227 06:42:49.039937 PCI: 00:16.5
1228 06:42:49.040273 PCI: 00:17.0
1229 06:42:49.042980 PCI: 00:19.0
1230 06:42:49.043493 PCI: 00:19.1
1231 06:42:49.046146 PCI: 00:19.2
1232 06:42:49.046666 PCI: 00:1a.0
1233 06:42:49.049605 PCI: 00:1e.1
1234 06:42:49.050125 PCI: 00:1e.2
1235 06:42:49.050465 PCI: 00:1f.1
1236 06:42:49.052860 PCI: 00:1f.6
1237 06:42:49.053651 PCI: 00:1f.7
1238 06:42:49.056009 PCI: Check your devicetree.cb.
1239 06:42:49.059623 PCI: 00:02.0 scanning...
1240 06:42:49.063070 scan_generic_bus for PCI: 00:02.0
1241 06:42:49.066145 scan_generic_bus for PCI: 00:02.0 done
1242 06:42:49.069587 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1243 06:42:49.072956 PCI: 00:04.0 scanning...
1244 06:42:49.075767 scan_generic_bus for PCI: 00:04.0
1245 06:42:49.079079 GENERIC: 0.0 enabled
1246 06:42:49.085774 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1247 06:42:49.089339 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1248 06:42:49.092880 PCI: 00:07.0 scanning...
1249 06:42:49.095909 do_pci_scan_bridge for PCI: 00:07.0
1250 06:42:49.099643 PCI: pci_scan_bus for bus 01
1251 06:42:49.102900 GENERIC: 0.0 enabled
1252 06:42:49.105940 scan_bus: bus PCI: 00:07.0 finished in 8 msecs
1253 06:42:49.109331 PCI: 00:07.1 scanning...
1254 06:42:49.112751 do_pci_scan_bridge for PCI: 00:07.1
1255 06:42:49.115893 PCI: pci_scan_bus for bus 2c
1256 06:42:49.116431 GENERIC: 1.0 enabled
1257 06:42:49.122213 scan_bus: bus PCI: 00:07.1 finished in 8 msecs
1258 06:42:49.125808 PCI: 00:07.2 scanning...
1259 06:42:49.129307 do_pci_scan_bridge for PCI: 00:07.2
1260 06:42:49.129842 PCI: pci_scan_bus for bus 57
1261 06:42:49.132783 GENERIC: 0.0 enabled
1262 06:42:49.140270 scan_bus: bus PCI: 00:07.2 finished in 8 msecs
1263 06:42:49.140805 PCI: 00:0d.0 scanning...
1264 06:42:49.142355 scan_static_bus for PCI: 00:0d.0
1265 06:42:49.146011 USB0 port 0 enabled
1266 06:42:49.149525 USB0 port 0 scanning...
1267 06:42:49.152879 scan_static_bus for USB0 port 0
1268 06:42:49.153416 USB3 port 0 enabled
1269 06:42:49.155890 USB3 port 1 disabled
1270 06:42:49.156425 USB3 port 2 enabled
1271 06:42:49.159072 USB3 port 3 disabled
1272 06:42:49.162752 USB3 port 0 scanning...
1273 06:42:49.166478 scan_static_bus for USB3 port 0
1274 06:42:49.169458 scan_static_bus for USB3 port 0 done
1275 06:42:49.172411 scan_bus: bus USB3 port 0 finished in 6 msecs
1276 06:42:49.176090 USB3 port 2 scanning...
1277 06:42:49.179099 scan_static_bus for USB3 port 2
1278 06:42:49.182578 scan_static_bus for USB3 port 2 done
1279 06:42:49.189358 scan_bus: bus USB3 port 2 finished in 6 msecs
1280 06:42:49.192848 scan_static_bus for USB0 port 0 done
1281 06:42:49.196206 scan_bus: bus USB0 port 0 finished in 43 msecs
1282 06:42:49.199636 scan_static_bus for PCI: 00:0d.0 done
1283 06:42:49.206115 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1284 06:42:49.206635 PCI: 00:0d.2 scanning...
1285 06:42:49.209459 scan_generic_bus for PCI: 00:0d.2
1286 06:42:49.212844 GENERIC: 0.0 enabled
1287 06:42:49.219358 bus: PCI: 00:0d.2[0]->scan_generic_bus for PCI: 00:0d.2 done
1288 06:42:49.222092 scan_bus: bus PCI: 00:0d.2 finished in 11 msecs
1289 06:42:49.225485 PCI: 00:0d.3 scanning...
1290 06:42:49.229438 scan_generic_bus for PCI: 00:0d.3
1291 06:42:49.232292 GENERIC: 0.0 enabled
1292 06:42:49.238835 bus: PCI: 00:0d.3[0]->scan_generic_bus for PCI: 00:0d.3 done
1293 06:42:49.242752 scan_bus: bus PCI: 00:0d.3 finished in 11 msecs
1294 06:42:49.245643 PCI: 00:14.0 scanning...
1295 06:42:49.249256 scan_static_bus for PCI: 00:14.0
1296 06:42:49.249793 USB0 port 0 enabled
1297 06:42:49.252793 USB0 port 0 scanning...
1298 06:42:49.255658 scan_static_bus for USB0 port 0
1299 06:42:49.259735 USB2 port 0 enabled
1300 06:42:49.260270 USB2 port 1 disabled
1301 06:42:49.262234 USB2 port 2 enabled
1302 06:42:49.265830 USB2 port 3 enabled
1303 06:42:49.266362 USB2 port 4 enabled
1304 06:42:49.269027 USB2 port 5 enabled
1305 06:42:49.269563 USB2 port 6 enabled
1306 06:42:49.272462 USB2 port 7 enabled
1307 06:42:49.275754 USB2 port 8 disabled
1308 06:42:49.276290 USB2 port 9 enabled
1309 06:42:49.278882 USB3 port 0 enabled
1310 06:42:49.282498 USB3 port 1 enabled
1311 06:42:49.283087 USB3 port 2 enabled
1312 06:42:49.285788 USB3 port 3 enabled
1313 06:42:49.288909 USB2 port 0 scanning...
1314 06:42:49.289344 scan_static_bus for USB2 port 0
1315 06:42:49.295840 scan_static_bus for USB2 port 0 done
1316 06:42:49.299214 scan_bus: bus USB2 port 0 finished in 6 msecs
1317 06:42:49.302460 USB2 port 2 scanning...
1318 06:42:49.306029 scan_static_bus for USB2 port 2
1319 06:42:49.309108 scan_static_bus for USB2 port 2 done
1320 06:42:49.312428 scan_bus: bus USB2 port 2 finished in 6 msecs
1321 06:42:49.315928 USB2 port 3 scanning...
1322 06:42:49.318729 scan_static_bus for USB2 port 3
1323 06:42:49.322108 scan_static_bus for USB2 port 3 done
1324 06:42:49.325587 scan_bus: bus USB2 port 3 finished in 6 msecs
1325 06:42:49.329033 USB2 port 4 scanning...
1326 06:42:49.332454 scan_static_bus for USB2 port 4
1327 06:42:49.335304 scan_static_bus for USB2 port 4 done
1328 06:42:49.342407 scan_bus: bus USB2 port 4 finished in 6 msecs
1329 06:42:49.342975 USB2 port 5 scanning...
1330 06:42:49.345573 scan_static_bus for USB2 port 5
1331 06:42:49.349347 scan_static_bus for USB2 port 5 done
1332 06:42:49.355556 scan_bus: bus USB2 port 5 finished in 6 msecs
1333 06:42:49.358636 USB2 port 6 scanning...
1334 06:42:49.359135 scan_static_bus for USB2 port 6
1335 06:42:49.365753 scan_static_bus for USB2 port 6 done
1336 06:42:49.368616 scan_bus: bus USB2 port 6 finished in 6 msecs
1337 06:42:49.372275 USB2 port 7 scanning...
1338 06:42:49.375353 scan_static_bus for USB2 port 7
1339 06:42:49.378848 scan_static_bus for USB2 port 7 done
1340 06:42:49.382236 scan_bus: bus USB2 port 7 finished in 6 msecs
1341 06:42:49.385298 USB2 port 9 scanning...
1342 06:42:49.388813 scan_static_bus for USB2 port 9
1343 06:42:49.392291 scan_static_bus for USB2 port 9 done
1344 06:42:49.395361 scan_bus: bus USB2 port 9 finished in 6 msecs
1345 06:42:49.398592 USB3 port 0 scanning...
1346 06:42:49.401989 scan_static_bus for USB3 port 0
1347 06:42:49.405138 scan_static_bus for USB3 port 0 done
1348 06:42:49.411951 scan_bus: bus USB3 port 0 finished in 6 msecs
1349 06:42:49.412482 USB3 port 1 scanning...
1350 06:42:49.415298 scan_static_bus for USB3 port 1
1351 06:42:49.419030 scan_static_bus for USB3 port 1 done
1352 06:42:49.424855 scan_bus: bus USB3 port 1 finished in 6 msecs
1353 06:42:49.428582 USB3 port 2 scanning...
1354 06:42:49.431955 scan_static_bus for USB3 port 2
1355 06:42:49.435300 scan_static_bus for USB3 port 2 done
1356 06:42:49.438317 scan_bus: bus USB3 port 2 finished in 6 msecs
1357 06:42:49.441713 USB3 port 3 scanning...
1358 06:42:49.445198 scan_static_bus for USB3 port 3
1359 06:42:49.448574 scan_static_bus for USB3 port 3 done
1360 06:42:49.451746 scan_bus: bus USB3 port 3 finished in 6 msecs
1361 06:42:49.455258 scan_static_bus for USB0 port 0 done
1362 06:42:49.461800 scan_bus: bus USB0 port 0 finished in 203 msecs
1363 06:42:49.465135 scan_static_bus for PCI: 00:14.0 done
1364 06:42:49.468402 scan_bus: bus PCI: 00:14.0 finished in 219 msecs
1365 06:42:49.471865 PCI: 00:14.3 scanning...
1366 06:42:49.474756 scan_static_bus for PCI: 00:14.3
1367 06:42:49.478706 GENERIC: 0.0 enabled
1368 06:42:49.481763 scan_static_bus for PCI: 00:14.3 done
1369 06:42:49.485392 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1370 06:42:49.488474 PCI: 00:15.0 scanning...
1371 06:42:49.491583 scan_static_bus for PCI: 00:15.0
1372 06:42:49.494975 I2C: 00:1a enabled
1373 06:42:49.498405 scan_static_bus for PCI: 00:15.0 done
1374 06:42:49.501476 scan_bus: bus PCI: 00:15.0 finished in 9 msecs
1375 06:42:49.505718 PCI: 00:15.1 scanning...
1376 06:42:49.508217 scan_static_bus for PCI: 00:15.1
1377 06:42:49.511529 I2C: 00:50 enabled
1378 06:42:49.515199 scan_static_bus for PCI: 00:15.1 done
1379 06:42:49.518306 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1380 06:42:49.521755 PCI: 00:1c.0 scanning...
1381 06:42:49.524472 do_pci_scan_bridge for PCI: 00:1c.0
1382 06:42:49.528204 PCI: pci_scan_bus for bus 82
1383 06:42:49.531884 PCI: 82:00.0 [10ec/0000] ops
1384 06:42:49.535203 PCI: 82:00.0 [10ec/8168] enabled
1385 06:42:49.538384 Enabling Common Clock Configuration
1386 06:42:49.541590 L1 Sub-State supported from root port 28
1387 06:42:49.545019 L1 Sub-State Support = 0xf
1388 06:42:49.548140 CommonModeRestoreTime = 0x96
1389 06:42:49.551510 Power On Value = 0xf, Power On Scale = 0x1
1390 06:42:49.554560 ASPM: Enabled L1
1391 06:42:49.557966 PCIe: Max_Payload_Size adjusted to 128
1392 06:42:49.561780 PCI: 82:00.0: Enabled LTR
1393 06:42:49.564860 PCI: 82:00.0: Programmed LTR max latencies
1394 06:42:49.568238 scan_bus: bus PCI: 00:1c.0 finished in 43 msecs
1395 06:42:49.571500 PCI: 00:1c.7 scanning...
1396 06:42:49.574933 do_pci_scan_bridge for PCI: 00:1c.7
1397 06:42:49.578218 PCI: pci_scan_bus for bus 83
1398 06:42:49.581626 PCI: 83:00.0 [17a0/9755] enabled
1399 06:42:49.585088 GENERIC: 0.0 enabled
1400 06:42:49.588482 Enabling Common Clock Configuration
1401 06:42:49.591372 L1 Sub-State supported from root port 28
1402 06:42:49.595112 L1 Sub-State Support = 0xf
1403 06:42:49.598463 CommonModeRestoreTime = 0xff
1404 06:42:49.601818 Power On Value = 0x1f, Power On Scale = 0x2
1405 06:42:49.605268 ASPM: Enabled L0s and L1
1406 06:42:49.608581 PCIe: Max_Payload_Size adjusted to 128
1407 06:42:49.611463 PCI: 83:00.0: Enabled LTR
1408 06:42:49.615227 PCI: 83:00.0: Programmed LTR max latencies
1409 06:42:49.621637 scan_bus: bus PCI: 00:1c.7 finished in 43 msecs
1410 06:42:49.622367 PCI: 00:1d.0 scanning...
1411 06:42:49.625374 do_pci_scan_bridge for PCI: 00:1d.0
1412 06:42:49.628828 PCI: pci_scan_bus for bus 84
1413 06:42:49.632395 PCI: 84:00.0 [1217/8760] enabled
1414 06:42:49.635088 GENERIC: 0.0 enabled
1415 06:42:49.638540 L1 Sub-State supported from root port 29
1416 06:42:49.641712 L1 Sub-State Support = 0xa
1417 06:42:49.645855 CommonModeRestoreTime = 0x78
1418 06:42:49.648993 Power On Value = 0x16, Power On Scale = 0x0
1419 06:42:49.651969 ASPM: Enabled L1
1420 06:42:49.655041 PCIe: Max_Payload_Size adjusted to 128
1421 06:42:49.658589 PCI: 84:00.0: Enabled LTR
1422 06:42:49.662154 PCI: 84:00.0: Programmed LTR max latencies
1423 06:42:49.664955 scan_bus: bus PCI: 00:1d.0 finished in 38 msecs
1424 06:42:49.668567 PCI: 00:1e.3 scanning...
1425 06:42:49.672340 scan_generic_bus for PCI: 00:1e.3
1426 06:42:49.675434 scan_generic_bus for PCI: 00:1e.3 done
1427 06:42:49.682024 scan_bus: bus PCI: 00:1e.3 finished in 7 msecs
1428 06:42:49.685516 PCI: 00:1f.0 scanning...
1429 06:42:49.688821 scan_static_bus for PCI: 00:1f.0
1430 06:42:49.689343 PNP: 0c09.0 enabled
1431 06:42:49.692248 PNP: 0c09.0 scanning...
1432 06:42:49.695447 scan_static_bus for PNP: 0c09.0
1433 06:42:49.698229 scan_static_bus for PNP: 0c09.0 done
1434 06:42:49.702212 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1435 06:42:49.705453 scan_static_bus for PCI: 00:1f.0 done
1436 06:42:49.712523 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1437 06:42:49.715121 PCI: 00:1f.2 scanning...
1438 06:42:49.719403 scan_static_bus for PCI: 00:1f.2
1439 06:42:49.719921 GENERIC: 0.0 enabled
1440 06:42:49.721858 GENERIC: 0.0 scanning...
1441 06:42:49.724802 scan_static_bus for GENERIC: 0.0
1442 06:42:49.728333 GENERIC: 0.0 enabled
1443 06:42:49.728852 GENERIC: 1.0 enabled
1444 06:42:49.734841 scan_static_bus for GENERIC: 0.0 done
1445 06:42:49.738203 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1446 06:42:49.741804 scan_static_bus for PCI: 00:1f.2 done
1447 06:42:49.748717 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1448 06:42:49.749240 PCI: 00:1f.3 scanning...
1449 06:42:49.751601 scan_static_bus for PCI: 00:1f.3
1450 06:42:49.755471 scan_static_bus for PCI: 00:1f.3 done
1451 06:42:49.761909 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1452 06:42:49.765003 PCI: 00:1f.4 scanning...
1453 06:42:49.768529 scan_generic_bus for PCI: 00:1f.4
1454 06:42:49.771630 scan_generic_bus for PCI: 00:1f.4 done
1455 06:42:49.774863 scan_bus: bus PCI: 00:1f.4 finished in 7 msecs
1456 06:42:49.777897 PCI: 00:1f.5 scanning...
1457 06:42:49.781391 scan_generic_bus for PCI: 00:1f.5
1458 06:42:49.784925 scan_generic_bus for PCI: 00:1f.5 done
1459 06:42:49.791453 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1460 06:42:49.794634 scan_bus: bus DOMAIN: 0000 finished in 990 msecs
1461 06:42:49.798358 scan_static_bus for Root Device done
1462 06:42:49.804946 scan_bus: bus Root Device finished in 1009 msecs
1463 06:42:49.805469 done
1464 06:42:49.811144 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1586 ms
1465 06:42:49.817652 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1466 06:42:49.821116 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1467 06:42:49.824100 SPI flash protection: WPSW=0 SRP0=1
1468 06:42:49.831310 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1469 06:42:49.837818 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1470 06:42:49.838341 found VGA at PCI: 00:02.0
1471 06:42:49.840960 Setting up VGA for PCI: 00:02.0
1472 06:42:49.847664 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1473 06:42:49.854041 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1474 06:42:49.854569 Allocating resources...
1475 06:42:49.858034 Reading resources...
1476 06:42:49.861319 Root Device read_resources bus 0 link: 0
1477 06:42:49.864385 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1478 06:42:49.871090 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1479 06:42:49.874205 DOMAIN: 0000 read_resources bus 0 link: 0
1480 06:42:49.881430 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1481 06:42:49.887746 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1482 06:42:49.894061 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1483 06:42:49.900919 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1484 06:42:49.907210 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1485 06:42:49.913999 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1486 06:42:49.917442 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1487 06:42:49.923899 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1488 06:42:49.930145 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1489 06:42:49.937584 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1490 06:42:49.944099 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1491 06:42:49.950492 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1492 06:42:49.957437 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1493 06:42:49.963743 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1494 06:42:49.970337 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1495 06:42:49.977222 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1496 06:42:49.983868 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1497 06:42:49.990285 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1498 06:42:49.993523 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1499 06:42:50.000586 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1500 06:42:50.006763 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1501 06:42:50.009887 PCI: 00:04.0 read_resources bus 1 link: 0
1502 06:42:50.017006 PCI: 00:04.0 read_resources bus 1 link: 0 done
1503 06:42:50.019814 PCI: 00:07.0 read_resources bus 1 link: 0
1504 06:42:50.026426 PCI: 00:07.0 read_resources bus 1 link: 0 done
1505 06:42:50.030147 PCI: 00:07.1 read_resources bus 44 link: 0
1506 06:42:50.033569 PCI: 00:07.1 read_resources bus 44 link: 0 done
1507 06:42:50.040008 PCI: 00:07.2 read_resources bus 87 link: 0
1508 06:42:50.043765 PCI: 00:07.2 read_resources bus 87 link: 0 done
1509 06:42:50.047420 PCI: 00:0d.0 read_resources bus 0 link: 0
1510 06:42:50.053429 USB0 port 0 read_resources bus 0 link: 0
1511 06:42:50.056619 USB0 port 0 read_resources bus 0 link: 0 done
1512 06:42:50.059711 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1513 06:42:50.066906 PCI: 00:0d.2 read_resources bus 2 link: 0
1514 06:42:50.070088 PCI: 00:0d.2 read_resources bus 2 link: 0 done
1515 06:42:50.073159 PCI: 00:0d.3 read_resources bus 3 link: 0
1516 06:42:50.079723 PCI: 00:0d.3 read_resources bus 3 link: 0 done
1517 06:42:50.083236 PCI: 00:14.0 read_resources bus 0 link: 0
1518 06:42:50.086817 USB0 port 0 read_resources bus 0 link: 0
1519 06:42:50.093151 USB0 port 0 read_resources bus 0 link: 0 done
1520 06:42:50.096575 PCI: 00:14.0 read_resources bus 0 link: 0 done
1521 06:42:50.099756 PCI: 00:14.3 read_resources bus 0 link: 0
1522 06:42:50.106546 PCI: 00:14.3 read_resources bus 0 link: 0 done
1523 06:42:50.109685 PCI: 00:15.0 read_resources bus 0 link: 0
1524 06:42:50.117126 PCI: 00:15.0 read_resources bus 0 link: 0 done
1525 06:42:50.119501 PCI: 00:15.1 read_resources bus 0 link: 0
1526 06:42:50.122736 PCI: 00:15.1 read_resources bus 0 link: 0 done
1527 06:42:50.129499 PCI: 00:1c.0 read_resources bus 130 link: 0
1528 06:42:50.133026 PCI: 00:1c.0 read_resources bus 130 link: 0 done
1529 06:42:50.136491 PCI: 00:1c.7 read_resources bus 131 link: 0
1530 06:42:50.143390 PCI: 00:1c.7 read_resources bus 131 link: 0 done
1531 06:42:50.146682 PCI: 00:1d.0 read_resources bus 132 link: 0
1532 06:42:50.153172 PCI: 00:1d.0 read_resources bus 132 link: 0 done
1533 06:42:50.156459 PCI: 00:1f.0 read_resources bus 0 link: 0
1534 06:42:50.162852 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1535 06:42:50.166644 PCI: 00:1f.2 read_resources bus 0 link: 0
1536 06:42:50.170168 GENERIC: 0.0 read_resources bus 0 link: 0
1537 06:42:50.176365 GENERIC: 0.0 read_resources bus 0 link: 0 done
1538 06:42:50.179697 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1539 06:42:50.183187 DOMAIN: 0000 read_resources bus 0 link: 0 done
1540 06:42:50.189628 Root Device read_resources bus 0 link: 0 done
1541 06:42:50.193234 Done reading resources.
1542 06:42:50.196458 Show resources in subtree (Root Device)...After reading.
1543 06:42:50.203223 Root Device child on link 0 CPU_CLUSTER: 0
1544 06:42:50.206421 CPU_CLUSTER: 0 child on link 0 APIC: 00
1545 06:42:50.207023 APIC: 00
1546 06:42:50.209852 APIC: 14
1547 06:42:50.210317 APIC: 16
1548 06:42:50.210681 APIC: 10
1549 06:42:50.213111 APIC: 12
1550 06:42:50.216060 DOMAIN: 0000 child on link 0 GPIO: 0
1551 06:42:50.225842 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1552 06:42:50.236212 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1553 06:42:50.236751 GPIO: 0
1554 06:42:50.239517 PCI: 00:00.0
1555 06:42:50.245389 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1556 06:42:50.255718 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1557 06:42:50.265591 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1558 06:42:50.275863 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1559 06:42:50.285574 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1560 06:42:50.295950 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1561 06:42:50.302491 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1562 06:42:50.312618 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1563 06:42:50.322426 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1564 06:42:50.332376 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1565 06:42:50.342477 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1566 06:42:50.352514 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1567 06:42:50.361953 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1568 06:42:50.368824 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1569 06:42:50.379013 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1570 06:42:50.388795 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1571 06:42:50.398937 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1572 06:42:50.408754 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1573 06:42:50.419087 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1574 06:42:50.428876 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1575 06:42:50.438925 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1576 06:42:50.445721 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1577 06:42:50.455319 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1578 06:42:50.465285 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1579 06:42:50.474978 PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1580 06:42:50.485384 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1581 06:42:50.494694 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1582 06:42:50.504886 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1583 06:42:50.505440 PCI: 00:02.0
1584 06:42:50.515181 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1585 06:42:50.524745 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1586 06:42:50.534979 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1587 06:42:50.538194 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1588 06:42:50.548379 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1589 06:42:50.551561 GENERIC: 0.0
1590 06:42:50.554872 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1591 06:42:50.564593 PCI: 00:07.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1592 06:42:50.575152 PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1593 06:42:50.581447 PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1594 06:42:50.584835 GENERIC: 0.0
1595 06:42:50.585429 NONE
1596 06:42:50.594688 NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
1597 06:42:50.604710 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
1598 06:42:50.611276 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
1599 06:42:50.618577 PCI: 00:07.1 child on link 0 GENERIC: 1.0
1600 06:42:50.624404 PCI: 00:07.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1601 06:42:50.634976 PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1602 06:42:50.644947 PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1603 06:42:50.645522 GENERIC: 1.0
1604 06:42:50.648132 NONE
1605 06:42:50.654734 NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
1606 06:42:50.664867 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
1607 06:42:50.675201 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
1608 06:42:50.678292 PCI: 00:07.2 child on link 0 GENERIC: 0.0
1609 06:42:50.688243 PCI: 00:07.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1610 06:42:50.698266 PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1611 06:42:50.704838 PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1612 06:42:50.708070 GENERIC: 0.0
1613 06:42:50.708661 NONE
1614 06:42:50.717864 NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
1615 06:42:50.727817 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
1616 06:42:50.735035 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
1617 06:42:50.738371 PCI: 00:08.0
1618 06:42:50.739054 PCI: 00:0a.0
1619 06:42:50.748099 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1620 06:42:50.754523 PCI: 00:0d.0 child on link 0 USB0 port 0
1621 06:42:50.764602 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1622 06:42:50.767539 USB0 port 0 child on link 0 USB3 port 0
1623 06:42:50.768011 USB3 port 0
1624 06:42:50.771174 USB3 port 1
1625 06:42:50.775001 USB3 port 2
1626 06:42:50.775520 USB3 port 3
1627 06:42:50.777862 PCI: 00:0d.2 child on link 0 GENERIC: 0.0
1628 06:42:50.788107 PCI: 00:0d.2 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
1629 06:42:50.798034 PCI: 00:0d.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1630 06:42:50.801290 GENERIC: 0.0
1631 06:42:50.804385 PCI: 00:0d.3 child on link 0 GENERIC: 0.0
1632 06:42:50.814524 PCI: 00:0d.3 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
1633 06:42:50.824044 PCI: 00:0d.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1634 06:42:50.827513 GENERIC: 0.0
1635 06:42:50.830740 PCI: 00:14.0 child on link 0 USB0 port 0
1636 06:42:50.841173 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1637 06:42:50.844583 USB0 port 0 child on link 0 USB2 port 0
1638 06:42:50.847756 USB2 port 0
1639 06:42:50.851508 USB2 port 1
1640 06:42:50.852109 USB2 port 2
1641 06:42:50.854644 USB2 port 3
1642 06:42:50.855259 USB2 port 4
1643 06:42:50.857812 USB2 port 5
1644 06:42:50.858420 USB2 port 6
1645 06:42:50.861125 USB2 port 7
1646 06:42:50.861685 USB2 port 8
1647 06:42:50.864358 USB2 port 9
1648 06:42:50.864821 USB3 port 0
1649 06:42:50.867767 USB3 port 1
1650 06:42:50.868323 USB3 port 2
1651 06:42:50.871334 USB3 port 3
1652 06:42:50.871855 PCI: 00:14.2
1653 06:42:50.881133 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1654 06:42:50.891045 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1655 06:42:50.898037 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1656 06:42:50.908207 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1657 06:42:50.908778 GENERIC: 0.0
1658 06:42:50.914433 PCI: 00:15.0 child on link 0 I2C: 00:1a
1659 06:42:50.924300 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1660 06:42:50.924926 I2C: 00:1a
1661 06:42:50.928187 PCI: 00:15.1 child on link 0 I2C: 00:50
1662 06:42:50.937610 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1663 06:42:50.941213 I2C: 00:50
1664 06:42:50.941761 PCI: 00:16.0
1665 06:42:50.951263 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1666 06:42:50.958409 PCI: 00:1c.0 child on link 0 PCI: 82:00.0
1667 06:42:50.964453 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1668 06:42:50.974617 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1669 06:42:50.984499 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1670 06:42:50.985067 PCI: 82:00.0
1671 06:42:50.994122 PCI: 82:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
1672 06:42:51.004351 PCI: 82:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1673 06:42:51.014328 PCI: 82:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
1674 06:42:51.017991 PCI: 00:1c.7 child on link 0 GENERIC: 0.0
1675 06:42:51.027109 PCI: 00:1c.7 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1676 06:42:51.037573 PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1677 06:42:51.047412 PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1678 06:42:51.047977 GENERIC: 0.0
1679 06:42:51.050536 PCI: 83:00.0
1680 06:42:51.060749 PCI: 83:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1681 06:42:51.063774 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1682 06:42:51.073913 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1683 06:42:51.083750 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1684 06:42:51.090392 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1685 06:42:51.094172 GENERIC: 0.0
1686 06:42:51.094736 PCI: 84:00.0
1687 06:42:51.103742 PCI: 84:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1688 06:42:51.107413 PCI: 00:1e.0
1689 06:42:51.117323 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1690 06:42:51.120293 PCI: 00:1e.3
1691 06:42:51.129952 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1692 06:42:51.133530 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1693 06:42:51.143668 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1694 06:42:51.144191 PNP: 0c09.0
1695 06:42:51.153206 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1696 06:42:51.157052 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1697 06:42:51.166453 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1698 06:42:51.176910 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1699 06:42:51.180463 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1700 06:42:51.182927 GENERIC: 0.0
1701 06:42:51.183395 GENERIC: 1.0
1702 06:42:51.186600 PCI: 00:1f.3
1703 06:42:51.196774 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1704 06:42:51.206260 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1705 06:42:51.206818 PCI: 00:1f.4
1706 06:42:51.216355 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1707 06:42:51.226266 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1708 06:42:51.229670 PCI: 00:1f.5
1709 06:42:51.236393 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1710 06:42:51.246753 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1711 06:42:51.249986 PCI: 00:07.0 io: size: 0 align: 12 gran: 12 limit: ffff
1712 06:42:51.253150 NONE 18 * [0x0 - 0x1fff] io
1713 06:42:51.259850 PCI: 00:07.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
1714 06:42:51.266281 PCI: 00:07.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1715 06:42:51.269537 NONE 10 * [0x0 - 0xc1fffff] mem
1716 06:42:51.276527 PCI: 00:07.0 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
1717 06:42:51.282720 PCI: 00:07.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1718 06:42:51.289447 NONE 14 * [0x0 - 0x1bffffff] prefmem
1719 06:42:51.296235 PCI: 00:07.0 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
1720 06:42:51.303385 PCI: 00:07.1 io: size: 0 align: 12 gran: 12 limit: ffff
1721 06:42:51.306283 NONE 18 * [0x0 - 0x1fff] io
1722 06:42:51.312666 PCI: 00:07.1 io: size: 2000 align: 12 gran: 12 limit: ffff done
1723 06:42:51.319649 PCI: 00:07.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1724 06:42:51.323121 NONE 10 * [0x0 - 0xc1fffff] mem
1725 06:42:51.329139 PCI: 00:07.1 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
1726 06:42:51.336071 PCI: 00:07.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1727 06:42:51.339547 NONE 14 * [0x0 - 0x1bffffff] prefmem
1728 06:42:51.349592 PCI: 00:07.1 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
1729 06:42:51.355865 PCI: 00:07.2 io: size: 0 align: 12 gran: 12 limit: ffff
1730 06:42:51.356387 NONE 18 * [0x0 - 0x1fff] io
1731 06:42:51.362745 PCI: 00:07.2 io: size: 2000 align: 12 gran: 12 limit: ffff done
1732 06:42:51.369393 PCI: 00:07.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1733 06:42:51.372044 NONE 10 * [0x0 - 0xc1fffff] mem
1734 06:42:51.382432 PCI: 00:07.2 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
1735 06:42:51.389157 PCI: 00:07.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1736 06:42:51.392090 NONE 14 * [0x0 - 0x1bffffff] prefmem
1737 06:42:51.402155 PCI: 00:07.2 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
1738 06:42:51.405556 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
1739 06:42:51.408794 PCI: 82:00.0 10 * [0x0 - 0xff] io
1740 06:42:51.415301 PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
1741 06:42:51.421824 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1742 06:42:51.425294 PCI: 82:00.0 20 * [0x0 - 0x3fff] mem
1743 06:42:51.431958 PCI: 82:00.0 18 * [0x4000 - 0x4fff] mem
1744 06:42:51.438341 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1745 06:42:51.445703 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1746 06:42:51.452069 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1747 06:42:51.459232 PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff
1748 06:42:51.465946 PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff done
1749 06:42:51.471470 PCI: 00:1c.7 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1750 06:42:51.475508 PCI: 83:00.0 10 * [0x0 - 0xfff] mem
1751 06:42:51.481829 PCI: 00:1c.7 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1752 06:42:51.488776 PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1753 06:42:51.498693 PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1754 06:42:51.501565 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1755 06:42:51.508282 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1756 06:42:51.514725 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1757 06:42:51.517986 PCI: 84:00.0 10 * [0x0 - 0x3fff] mem
1758 06:42:51.524834 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1759 06:42:51.534868 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1760 06:42:51.541691 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1761 06:42:51.548224 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1762 06:42:51.554665 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1763 06:42:51.561533 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1764 06:42:51.571195 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1765 06:42:51.577626 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1766 06:42:51.584878 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1767 06:42:51.587711 DOMAIN: 0000: Resource ranges:
1768 06:42:51.591772 * Base: 1000, Size: 800, Tag: 100
1769 06:42:51.594244 * Base: 1900, Size: d6a0, Tag: 100
1770 06:42:51.597902 * Base: efc0, Size: 1040, Tag: 100
1771 06:42:51.604653 PCI: 00:07.0 1c * [0x2000 - 0x3fff] limit: 3fff io
1772 06:42:51.611376 PCI: 00:07.1 1c * [0x4000 - 0x5fff] limit: 5fff io
1773 06:42:51.614178 PCI: 00:07.2 1c * [0x6000 - 0x7fff] limit: 7fff io
1774 06:42:51.621027 PCI: 00:1c.0 1c * [0x8000 - 0x8fff] limit: 8fff io
1775 06:42:51.624774 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1776 06:42:51.630821 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1777 06:42:51.637534 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1778 06:42:51.647664 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1779 06:42:51.654416 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1780 06:42:51.661119 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1781 06:42:51.670879 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1782 06:42:51.677645 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1783 06:42:51.684236 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1784 06:42:51.694269 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1785 06:42:51.700668 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1786 06:42:51.707457 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1787 06:42:51.717380 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1788 06:42:51.723758 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1789 06:42:51.730687 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1790 06:42:51.741019 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1791 06:42:51.747189 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1792 06:42:51.753556 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1793 06:42:51.763443 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1794 06:42:51.770325 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1795 06:42:51.777055 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1796 06:42:51.786946 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1797 06:42:51.793718 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1798 06:42:51.799819 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1799 06:42:51.810003 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1800 06:42:51.816524 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1801 06:42:51.823579 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1802 06:42:51.832989 update_constraints: PCI: 00:00.0 18 base 100000000 limit 17fbfffff mem (fixed)
1803 06:42:51.839843 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1804 06:42:51.846515 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1805 06:42:51.856387 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1806 06:42:51.863152 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1807 06:42:51.869548 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1808 06:42:51.872826 DOMAIN: 0000: Resource ranges:
1809 06:42:51.879442 * Base: 80400000, Size: 3fc00000, Tag: 200
1810 06:42:51.882649 * Base: d0000000, Size: 28000000, Tag: 200
1811 06:42:51.886259 * Base: fa000000, Size: 1000000, Tag: 200
1812 06:42:51.889502 * Base: fb001000, Size: 17ff000, Tag: 200
1813 06:42:51.896515 * Base: fe800000, Size: 300000, Tag: 200
1814 06:42:51.899539 * Base: feb80000, Size: 80000, Tag: 200
1815 06:42:51.902557 * Base: fed00000, Size: 40000, Tag: 200
1816 06:42:51.906175 * Base: fed70000, Size: 10000, Tag: 200
1817 06:42:51.912592 * Base: fed88000, Size: 8000, Tag: 200
1818 06:42:51.916515 * Base: fed93000, Size: d000, Tag: 200
1819 06:42:51.919754 * Base: feda2000, Size: 1e000, Tag: 200
1820 06:42:51.922612 * Base: fede0000, Size: 1220000, Tag: 200
1821 06:42:51.929082 * Base: 17fc00000, Size: 7e80400000, Tag: 100200
1822 06:42:51.936138 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1823 06:42:51.942873 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1824 06:42:51.949421 PCI: 00:07.0 20 * [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem
1825 06:42:51.955757 PCI: 00:07.1 20 * [0xa0000000 - 0xac1fffff] limit: ac1fffff mem
1826 06:42:51.962153 PCI: 00:07.2 20 * [0xac200000 - 0xb83fffff] limit: b83fffff mem
1827 06:42:51.969146 PCI: 00:1c.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1828 06:42:51.975459 PCI: 00:1c.7 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1829 06:42:51.982228 PCI: 00:1d.0 20 * [0x80600000 - 0x806fffff] limit: 806fffff mem
1830 06:42:51.988760 PCI: 00:1f.3 20 * [0x80700000 - 0x807fffff] limit: 807fffff mem
1831 06:42:51.995121 PCI: 00:0d.2 10 * [0x80800000 - 0x8083ffff] limit: 8083ffff mem
1832 06:42:52.001894 PCI: 00:0d.3 10 * [0x80840000 - 0x8087ffff] limit: 8087ffff mem
1833 06:42:52.008673 PCI: 00:04.0 10 * [0x80880000 - 0x8089ffff] limit: 8089ffff mem
1834 06:42:52.015441 PCI: 00:0d.0 10 * [0x808a0000 - 0x808affff] limit: 808affff mem
1835 06:42:52.021941 PCI: 00:14.0 10 * [0x808b0000 - 0x808bffff] limit: 808bffff mem
1836 06:42:52.028468 PCI: 00:0a.0 10 * [0x808c0000 - 0x808c7fff] limit: 808c7fff mem
1837 06:42:52.035493 PCI: 00:14.2 10 * [0x808c8000 - 0x808cbfff] limit: 808cbfff mem
1838 06:42:52.042137 PCI: 00:14.3 10 * [0x808cc000 - 0x808cffff] limit: 808cffff mem
1839 06:42:52.048487 PCI: 00:1f.3 10 * [0x808d0000 - 0x808d3fff] limit: 808d3fff mem
1840 06:42:52.055220 PCI: 00:0d.2 18 * [0x808d4000 - 0x808d4fff] limit: 808d4fff mem
1841 06:42:52.061993 PCI: 00:0d.3 18 * [0x808d5000 - 0x808d5fff] limit: 808d5fff mem
1842 06:42:52.068501 PCI: 00:14.2 18 * [0x808d6000 - 0x808d6fff] limit: 808d6fff mem
1843 06:42:52.075016 PCI: 00:15.0 10 * [0x808d7000 - 0x808d7fff] limit: 808d7fff mem
1844 06:42:52.081953 PCI: 00:15.1 10 * [0x808d8000 - 0x808d8fff] limit: 808d8fff mem
1845 06:42:52.088397 PCI: 00:16.0 10 * [0x808d9000 - 0x808d9fff] limit: 808d9fff mem
1846 06:42:52.095020 PCI: 00:1e.3 10 * [0x808da000 - 0x808dafff] limit: 808dafff mem
1847 06:42:52.101802 PCI: 00:1f.5 10 * [0x808db000 - 0x808dbfff] limit: 808dbfff mem
1848 06:42:52.108271 PCI: 00:1f.4 10 * [0x808dc000 - 0x808dc0ff] limit: 808dc0ff mem
1849 06:42:52.114897 PCI: 00:07.0 24 * [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem
1850 06:42:52.121418 PCI: 00:07.1 24 * [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem
1851 06:42:52.130962 PCI: 00:07.2 24 * [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem
1852 06:42:52.138235 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1853 06:42:52.145197 PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff
1854 06:42:52.148013 PCI: 00:07.0: Resource ranges:
1855 06:42:52.151146 * Base: 2000, Size: 2000, Tag: 100
1856 06:42:52.154500 NONE 18 * [0x2000 - 0x3fff] limit: 3fff io
1857 06:42:52.164569 PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done
1858 06:42:52.171496 PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff
1859 06:42:52.174586 PCI: 00:07.0: Resource ranges:
1860 06:42:52.181190 * Base: 17fc00000, Size: 1c000000, Tag: 1200
1861 06:42:52.187731 NONE 14 * [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem
1862 06:42:52.194335 PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff done
1863 06:42:52.204345 PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff
1864 06:42:52.207677 PCI: 00:07.0: Resource ranges:
1865 06:42:52.210994 * Base: 82000000, Size: c200000, Tag: 200
1866 06:42:52.217429 NONE 10 * [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem
1867 06:42:52.224498 PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff done
1868 06:42:52.233901 PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff
1869 06:42:52.237131 PCI: 00:07.1: Resource ranges:
1870 06:42:52.240744 * Base: 4000, Size: 2000, Tag: 100
1871 06:42:52.243817 NONE 18 * [0x4000 - 0x5fff] limit: 5fff io
1872 06:42:52.250257 PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff done
1873 06:42:52.260274 PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff
1874 06:42:52.263258 PCI: 00:07.1: Resource ranges:
1875 06:42:52.266979 * Base: 19bc00000, Size: 1c000000, Tag: 1200
1876 06:42:52.273563 NONE 14 * [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem
1877 06:42:52.283642 PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff done
1878 06:42:52.290143 PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff
1879 06:42:52.293587 PCI: 00:07.1: Resource ranges:
1880 06:42:52.300274 * Base: a0000000, Size: c200000, Tag: 200
1881 06:42:52.306935 NONE 10 * [0xa0000000 - 0xac1fffff] limit: ac1fffff mem
1882 06:42:52.313622 PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff done
1883 06:42:52.320306 PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff
1884 06:42:52.323484 PCI: 00:07.2: Resource ranges:
1885 06:42:52.327028 * Base: 6000, Size: 2000, Tag: 100
1886 06:42:52.333730 NONE 18 * [0x6000 - 0x7fff] limit: 7fff io
1887 06:42:52.340509 PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff done
1888 06:42:52.350240 PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff
1889 06:42:52.353789 PCI: 00:07.2: Resource ranges:
1890 06:42:52.356736 * Base: 1b7c00000, Size: 1c000000, Tag: 1200
1891 06:42:52.363439 NONE 14 * [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem
1892 06:42:52.373322 PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff done
1893 06:42:52.379938 PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff
1894 06:42:52.383041 PCI: 00:07.2: Resource ranges:
1895 06:42:52.386889 * Base: ac200000, Size: c200000, Tag: 200
1896 06:42:52.393449 NONE 10 * [0xac200000 - 0xb83fffff] limit: b83fffff mem
1897 06:42:52.403713 PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff done
1898 06:42:52.409777 PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff
1899 06:42:52.413374 PCI: 00:1c.0: Resource ranges:
1900 06:42:52.416622 * Base: 8000, Size: 1000, Tag: 100
1901 06:42:52.419759 PCI: 82:00.0 10 * [0x8000 - 0x80ff] limit: 80ff io
1902 06:42:52.429445 PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff done
1903 06:42:52.436470 PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1904 06:42:52.439681 PCI: 00:1c.0: Resource ranges:
1905 06:42:52.442927 * Base: 80400000, Size: 100000, Tag: 200
1906 06:42:52.449616 PCI: 82:00.0 20 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1907 06:42:52.456510 PCI: 82:00.0 18 * [0x80404000 - 0x80404fff] limit: 80404fff mem
1908 06:42:52.466189 PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1909 06:42:52.472575 PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff
1910 06:42:52.475806 PCI: 00:1c.7: Resource ranges:
1911 06:42:52.482749 * Base: 80500000, Size: 100000, Tag: 200
1912 06:42:52.489297 PCI: 83:00.0 10 * [0x80500000 - 0x80500fff] limit: 80500fff mem
1913 06:42:52.495629 PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff done
1914 06:42:52.505755 PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff
1915 06:42:52.509314 PCI: 00:1d.0: Resource ranges:
1916 06:42:52.512674 * Base: 80600000, Size: 100000, Tag: 200
1917 06:42:52.519335 PCI: 84:00.0 10 * [0x80600000 - 0x80603fff] limit: 80603fff mem
1918 06:42:52.525856 PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff done
1919 06:42:52.535388 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1920 06:42:52.538552 Root Device assign_resources, bus 0 link: 0
1921 06:42:52.541942 DOMAIN: 0000 assign_resources, bus 0 link: 0
1922 06:42:52.552192 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1923 06:42:52.558878 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1924 06:42:52.565840 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1925 06:42:52.575764 PCI: 00:04.0 10 <- [0x0080880000 - 0x008089ffff] size 0x00020000 gran 0x11 mem64
1926 06:42:52.578875 PCI: 00:04.0 assign_resources, bus 1 link: 0
1927 06:42:52.585783 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1928 06:42:52.591840 PCI: 00:07.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 01 io
1929 06:42:52.601664 PCI: 00:07.0 24 <- [0x017fc00000 - 0x019bbfffff] size 0x1c000000 gran 0x14 bus 01 prefmem
1930 06:42:52.609054 PCI: 00:07.0 20 <- [0x0082000000 - 0x008e1fffff] size 0x0c200000 gran 0x14 bus 01 mem
1931 06:42:52.617375 PCI: 00:07.0 assign_resources, bus 1 link: 0
1932 06:42:52.618493 PCI: 00:07.0 assign_resources, bus 1 link: 0 done
1933 06:42:52.628343 PCI: 00:07.1 1c <- [0x0000004000 - 0x0000005fff] size 0x00002000 gran 0x0c bus 2c io
1934 06:42:52.638816 PCI: 00:07.1 24 <- [0x019bc00000 - 0x01b7bfffff] size 0x1c000000 gran 0x14 bus 2c prefmem
1935 06:42:52.645262 PCI: 00:07.1 20 <- [0x00a0000000 - 0x00ac1fffff] size 0x0c200000 gran 0x14 bus 2c mem
1936 06:42:52.651732 PCI: 00:07.1 assign_resources, bus 44 link: 0
1937 06:42:52.655298 PCI: 00:07.1 assign_resources, bus 44 link: 0 done
1938 06:42:52.665251 PCI: 00:07.2 1c <- [0x0000006000 - 0x0000007fff] size 0x00002000 gran 0x0c bus 57 io
1939 06:42:52.671511 PCI: 00:07.2 24 <- [0x01b7c00000 - 0x01d3bfffff] size 0x1c000000 gran 0x14 bus 57 prefmem
1940 06:42:52.681708 PCI: 00:07.2 20 <- [0x00ac200000 - 0x00b83fffff] size 0x0c200000 gran 0x14 bus 57 mem
1941 06:42:52.685086 PCI: 00:07.2 assign_resources, bus 87 link: 0
1942 06:42:52.691282 PCI: 00:07.2 assign_resources, bus 87 link: 0 done
1943 06:42:52.697937 PCI: 00:0a.0 10 <- [0x00808c0000 - 0x00808c7fff] size 0x00008000 gran 0x0f mem64
1944 06:42:52.708014 PCI: 00:0d.0 10 <- [0x00808a0000 - 0x00808affff] size 0x00010000 gran 0x10 mem64
1945 06:42:52.711398 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1946 06:42:52.714594 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1947 06:42:52.724655 PCI: 00:0d.2 10 <- [0x0080800000 - 0x008083ffff] size 0x00040000 gran 0x12 mem64
1948 06:42:52.730958 PCI: 00:0d.2 18 <- [0x00808d4000 - 0x00808d4fff] size 0x00001000 gran 0x0c mem64
1949 06:42:52.737792 PCI: 00:0d.2 assign_resources, bus 2 link: 0
1950 06:42:52.740920 PCI: 00:0d.2 assign_resources, bus 2 link: 0 done
1951 06:42:52.751252 PCI: 00:0d.3 10 <- [0x0080840000 - 0x008087ffff] size 0x00040000 gran 0x12 mem64
1952 06:42:52.757850 PCI: 00:0d.3 18 <- [0x00808d5000 - 0x00808d5fff] size 0x00001000 gran 0x0c mem64
1953 06:42:52.761366 PCI: 00:0d.3 assign_resources, bus 3 link: 0
1954 06:42:52.768004 PCI: 00:0d.3 assign_resources, bus 3 link: 0 done
1955 06:42:52.774371 PCI: 00:14.0 10 <- [0x00808b0000 - 0x00808bffff] size 0x00010000 gran 0x10 mem64
1956 06:42:52.780768 PCI: 00:14.0 assign_resources, bus 0 link: 0
1957 06:42:52.784263 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1958 06:42:52.794222 PCI: 00:14.2 10 <- [0x00808c8000 - 0x00808cbfff] size 0x00004000 gran 0x0e mem64
1959 06:42:52.800998 PCI: 00:14.2 18 <- [0x00808d6000 - 0x00808d6fff] size 0x00001000 gran 0x0c mem64
1960 06:42:52.807552 PCI: 00:14.3 10 <- [0x00808cc000 - 0x00808cffff] size 0x00004000 gran 0x0e mem64
1961 06:42:52.814034 PCI: 00:14.3 assign_resources, bus 0 link: 0
1962 06:42:52.817365 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1963 06:42:52.827465 PCI: 00:15.0 10 <- [0x00808d7000 - 0x00808d7fff] size 0x00001000 gran 0x0c mem64
1964 06:42:52.830585 PCI: 00:15.0 assign_resources, bus 0 link: 0
1965 06:42:52.833827 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1966 06:42:52.844290 PCI: 00:15.1 10 <- [0x00808d8000 - 0x00808d8fff] size 0x00001000 gran 0x0c mem64
1967 06:42:52.847176 PCI: 00:15.1 assign_resources, bus 0 link: 0
1968 06:42:52.853772 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1969 06:42:52.860311 PCI: 00:16.0 10 <- [0x00808d9000 - 0x00808d9fff] size 0x00001000 gran 0x0c mem64
1970 06:42:52.870360 PCI: 00:1c.0 1c <- [0x0000008000 - 0x0000008fff] size 0x00001000 gran 0x0c bus 82 io
1971 06:42:52.880175 PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 82 prefmem
1972 06:42:52.887112 PCI: 00:1c.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 82 mem
1973 06:42:52.893759 PCI: 00:1c.0 assign_resources, bus 130 link: 0
1974 06:42:52.900138 PCI: 82:00.0 10 <- [0x0000008000 - 0x00000080ff] size 0x00000100 gran 0x08 io
1975 06:42:52.906893 PCI: 82:00.0 18 <- [0x0080404000 - 0x0080404fff] size 0x00001000 gran 0x0c mem64
1976 06:42:52.916756 PCI: 82:00.0 20 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1977 06:42:52.920038 PCI: 00:1c.0 assign_resources, bus 130 link: 0 done
1978 06:42:52.929948 PCI: 00:1c.7 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 83 io
1979 06:42:52.940003 PCI: 00:1c.7 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 83 prefmem
1980 06:42:52.950007 PCI: 00:1c.7 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 bus 83 mem
1981 06:42:52.953126 PCI: 00:1c.7 assign_resources, bus 131 link: 0
1982 06:42:52.959800 PCI: 83:00.0 10 <- [0x0080500000 - 0x0080500fff] size 0x00001000 gran 0x0c mem
1983 06:42:52.966512 PCI: 00:1c.7 assign_resources, bus 131 link: 0 done
1984 06:42:52.972994 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 84 io
1985 06:42:52.982519 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 84 prefmem
1986 06:42:52.992865 PCI: 00:1d.0 20 <- [0x0080600000 - 0x00806fffff] size 0x00100000 gran 0x14 bus 84 mem
1987 06:42:52.996034 PCI: 00:1d.0 assign_resources, bus 132 link: 0
1988 06:42:53.006317 PCI: 84:00.0 10 <- [0x0080600000 - 0x0080603fff] size 0x00004000 gran 0x0e mem64
1989 06:42:53.009695 PCI: 00:1d.0 assign_resources, bus 132 link: 0 done
1990 06:42:53.019442 PCI: 00:1e.3 10 <- [0x00808da000 - 0x00808dafff] size 0x00001000 gran 0x0c mem64
1991 06:42:53.022876 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1992 06:42:53.029365 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1993 06:42:53.032512 LPC: Trying to open IO window from 800 size 1ff
1994 06:42:53.042914 PCI: 00:1f.3 10 <- [0x00808d0000 - 0x00808d3fff] size 0x00004000 gran 0x0e mem64
1995 06:42:53.049313 PCI: 00:1f.3 20 <- [0x0080700000 - 0x00807fffff] size 0x00100000 gran 0x14 mem64
1996 06:42:53.055921 PCI: 00:1f.4 10 <- [0x00808dc000 - 0x00808dc0ff] size 0x00000100 gran 0x08 mem64
1997 06:42:53.065962 PCI: 00:1f.5 10 <- [0x00808db000 - 0x00808dbfff] size 0x00001000 gran 0x0c mem
1998 06:42:53.069058 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1999 06:42:53.076005 Root Device assign_resources, bus 0 link: 0 done
2000 06:42:53.076525 Done setting resources.
2001 06:42:53.082057 Show resources in subtree (Root Device)...After assigning values.
2002 06:42:53.089150 Root Device child on link 0 CPU_CLUSTER: 0
2003 06:42:53.092589 CPU_CLUSTER: 0 child on link 0 APIC: 00
2004 06:42:53.093110 APIC: 00
2005 06:42:53.095581 APIC: 14
2006 06:42:53.096022 APIC: 16
2007 06:42:53.098969 APIC: 10
2008 06:42:53.099496 APIC: 12
2009 06:42:53.102325 DOMAIN: 0000 child on link 0 GPIO: 0
2010 06:42:53.112546 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
2011 06:42:53.122015 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
2012 06:42:53.122582 GPIO: 0
2013 06:42:53.125474 PCI: 00:00.0
2014 06:42:53.135091 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
2015 06:42:53.142557 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
2016 06:42:53.152145 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
2017 06:42:53.161769 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
2018 06:42:53.171718 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
2019 06:42:53.181367 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
2020 06:42:53.191679 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
2021 06:42:53.201429 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
2022 06:42:53.208137 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
2023 06:42:53.218279 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
2024 06:42:53.228030 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
2025 06:42:53.237989 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
2026 06:42:53.248238 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
2027 06:42:53.258073 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
2028 06:42:53.264600 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
2029 06:42:53.274530 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
2030 06:42:53.284245 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
2031 06:42:53.294343 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
2032 06:42:53.304341 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
2033 06:42:53.314381 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
2034 06:42:53.324059 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
2035 06:42:53.334249 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
2036 06:42:53.340714 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
2037 06:42:53.351022 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
2038 06:42:53.360583 PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
2039 06:42:53.371161 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
2040 06:42:53.380906 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
2041 06:42:53.390407 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
2042 06:42:53.391004 PCI: 00:02.0
2043 06:42:53.404031 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
2044 06:42:53.413802 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
2045 06:42:53.423741 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
2046 06:42:53.426971 PCI: 00:04.0 child on link 0 GENERIC: 0.0
2047 06:42:53.436652 PCI: 00:04.0 resource base 80880000 size 20000 align 17 gran 17 limit 8089ffff flags 60000201 index 10
2048 06:42:53.439997 GENERIC: 0.0
2049 06:42:53.443857 PCI: 00:07.0 child on link 0 GENERIC: 0.0
2050 06:42:53.453475 PCI: 00:07.0 resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 60080102 index 1c
2051 06:42:53.463392 PCI: 00:07.0 resource base 17fc00000 size 1c000000 align 20 gran 20 limit 19bbfffff flags 60181202 index 24
2052 06:42:53.473286 PCI: 00:07.0 resource base 82000000 size c200000 align 20 gran 20 limit 8e1fffff flags 60080202 index 20
2053 06:42:53.476454 GENERIC: 0.0
2054 06:42:53.476879 NONE
2055 06:42:53.486540 NONE resource base 82000000 size c200000 align 12 gran 12 limit 8e1fffff flags 40000200 index 10
2056 06:42:53.496733 NONE resource base 17fc00000 size 1c000000 align 12 gran 12 limit 19bbfffff flags 40101200 index 14
2057 06:42:53.506528 NONE resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 40000100 index 18
2058 06:42:53.509832 PCI: 00:07.1 child on link 0 GENERIC: 1.0
2059 06:42:53.519965 PCI: 00:07.1 resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 60080102 index 1c
2060 06:42:53.529734 PCI: 00:07.1 resource base 19bc00000 size 1c000000 align 20 gran 20 limit 1b7bfffff flags 60181202 index 24
2061 06:42:53.542581 PCI: 00:07.1 resource base a0000000 size c200000 align 20 gran 20 limit ac1fffff flags 60080202 index 20
2062 06:42:53.543135 GENERIC: 1.0
2063 06:42:53.545932 NONE
2064 06:42:53.556086 NONE resource base a0000000 size c200000 align 12 gran 12 limit ac1fffff flags 40000200 index 10
2065 06:42:53.566265 NONE resource base 19bc00000 size 1c000000 align 12 gran 12 limit 1b7bfffff flags 40101200 index 14
2066 06:42:53.572586 NONE resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 40000100 index 18
2067 06:42:53.579523 PCI: 00:07.2 child on link 0 GENERIC: 0.0
2068 06:42:53.589307 PCI: 00:07.2 resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 60080102 index 1c
2069 06:42:53.599523 PCI: 00:07.2 resource base 1b7c00000 size 1c000000 align 20 gran 20 limit 1d3bfffff flags 60181202 index 24
2070 06:42:53.609121 PCI: 00:07.2 resource base ac200000 size c200000 align 20 gran 20 limit b83fffff flags 60080202 index 20
2071 06:42:53.612764 GENERIC: 0.0
2072 06:42:53.613290 NONE
2073 06:42:53.622300 NONE resource base ac200000 size c200000 align 12 gran 12 limit b83fffff flags 40000200 index 10
2074 06:42:53.632522 NONE resource base 1b7c00000 size 1c000000 align 12 gran 12 limit 1d3bfffff flags 40101200 index 14
2075 06:42:53.642329 NONE resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 40000100 index 18
2076 06:42:53.642902 PCI: 00:08.0
2077 06:42:53.645755 PCI: 00:0a.0
2078 06:42:53.656881 PCI: 00:0a.0 resource base 808c0000 size 8000 align 15 gran 15 limit 808c7fff flags 60000201 index 10
2079 06:42:53.658560 PCI: 00:0d.0 child on link 0 USB0 port 0
2080 06:42:53.669087 PCI: 00:0d.0 resource base 808a0000 size 10000 align 16 gran 16 limit 808affff flags 60000201 index 10
2081 06:42:53.675461 USB0 port 0 child on link 0 USB3 port 0
2082 06:42:53.676035 USB3 port 0
2083 06:42:53.678688 USB3 port 1
2084 06:42:53.679161 USB3 port 2
2085 06:42:53.682269 USB3 port 3
2086 06:42:53.685391 PCI: 00:0d.2 child on link 0 GENERIC: 0.0
2087 06:42:53.695404 PCI: 00:0d.2 resource base 80800000 size 40000 align 18 gran 18 limit 8083ffff flags 60000201 index 10
2088 06:42:53.705257 PCI: 00:0d.2 resource base 808d4000 size 1000 align 12 gran 12 limit 808d4fff flags 60000201 index 18
2089 06:42:53.708431 GENERIC: 0.0
2090 06:42:53.711894 PCI: 00:0d.3 child on link 0 GENERIC: 0.0
2091 06:42:53.721912 PCI: 00:0d.3 resource base 80840000 size 40000 align 18 gran 18 limit 8087ffff flags 60000201 index 10
2092 06:42:53.734797 PCI: 00:0d.3 resource base 808d5000 size 1000 align 12 gran 12 limit 808d5fff flags 60000201 index 18
2093 06:42:53.735439 GENERIC: 0.0
2094 06:42:53.738132 PCI: 00:14.0 child on link 0 USB0 port 0
2095 06:42:53.751682 PCI: 00:14.0 resource base 808b0000 size 10000 align 16 gran 16 limit 808bffff flags 60000201 index 10
2096 06:42:53.755328 USB0 port 0 child on link 0 USB2 port 0
2097 06:42:53.755847 USB2 port 0
2098 06:42:53.757926 USB2 port 1
2099 06:42:53.758355 USB2 port 2
2100 06:42:53.761350 USB2 port 3
2101 06:42:53.761776 USB2 port 4
2102 06:42:53.765355 USB2 port 5
2103 06:42:53.768089 USB2 port 6
2104 06:42:53.768518 USB2 port 7
2105 06:42:53.771687 USB2 port 8
2106 06:42:53.772210 USB2 port 9
2107 06:42:53.774936 USB3 port 0
2108 06:42:53.775360 USB3 port 1
2109 06:42:53.778398 USB3 port 2
2110 06:42:53.778989 USB3 port 3
2111 06:42:53.781703 PCI: 00:14.2
2112 06:42:53.791306 PCI: 00:14.2 resource base 808c8000 size 4000 align 14 gran 14 limit 808cbfff flags 60000201 index 10
2113 06:42:53.801610 PCI: 00:14.2 resource base 808d6000 size 1000 align 12 gran 12 limit 808d6fff flags 60000201 index 18
2114 06:42:53.804960 PCI: 00:14.3 child on link 0 GENERIC: 0.0
2115 06:42:53.814700 PCI: 00:14.3 resource base 808cc000 size 4000 align 14 gran 14 limit 808cffff flags 60000201 index 10
2116 06:42:53.818460 GENERIC: 0.0
2117 06:42:53.821836 PCI: 00:15.0 child on link 0 I2C: 00:1a
2118 06:42:53.832789 PCI: 00:15.0 resource base 808d7000 size 1000 align 12 gran 12 limit 808d7fff flags 60000201 index 10
2119 06:42:53.833349 I2C: 00:1a
2120 06:42:53.837325 PCI: 00:15.1 child on link 0 I2C: 00:50
2121 06:42:53.848239 PCI: 00:15.1 resource base 808d8000 size 1000 align 12 gran 12 limit 808d8fff flags 60000201 index 10
2122 06:42:53.852411 I2C: 00:50
2123 06:42:53.852984 PCI: 00:16.0
2124 06:42:53.862807 PCI: 00:16.0 resource base 808d9000 size 1000 align 12 gran 12 limit 808d9fff flags 60000201 index 10
2125 06:42:53.867356 PCI: 00:1c.0 child on link 0 PCI: 82:00.0
2126 06:42:53.877661 PCI: 00:1c.0 resource base 8000 size 1000 align 12 gran 12 limit 8fff flags 60080102 index 1c
2127 06:42:53.887502 PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
2128 06:42:53.897590 PCI: 00:1c.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
2129 06:42:53.900605 PCI: 82:00.0
2130 06:42:53.910379 PCI: 82:00.0 resource base 8000 size 100 align 8 gran 8 limit 80ff flags 60000100 index 10
2131 06:42:53.920684 PCI: 82:00.0 resource base 80404000 size 1000 align 12 gran 12 limit 80404fff flags 60000201 index 18
2132 06:42:53.930668 PCI: 82:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 20
2133 06:42:53.933590 PCI: 00:1c.7 child on link 0 GENERIC: 0.0
2134 06:42:53.943684 PCI: 00:1c.7 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
2135 06:42:53.956883 PCI: 00:1c.7 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
2136 06:42:53.966754 PCI: 00:1c.7 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60080202 index 20
2137 06:42:53.967362 GENERIC: 0.0
2138 06:42:53.970090 PCI: 83:00.0
2139 06:42:53.980235 PCI: 83:00.0 resource base 80500000 size 1000 align 12 gran 12 limit 80500fff flags 60000200 index 10
2140 06:42:53.983665 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
2141 06:42:53.993323 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
2142 06:42:54.006822 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
2143 06:42:54.016615 PCI: 00:1d.0 resource base 80600000 size 100000 align 20 gran 20 limit 806fffff flags 60080202 index 20
2144 06:42:54.017187 GENERIC: 0.0
2145 06:42:54.019748 PCI: 84:00.0
2146 06:42:54.029848 PCI: 84:00.0 resource base 80600000 size 4000 align 14 gran 14 limit 80603fff flags 60000201 index 10
2147 06:42:54.032968 PCI: 00:1e.0
2148 06:42:54.043732 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
2149 06:42:54.044301 PCI: 00:1e.3
2150 06:42:54.056650 PCI: 00:1e.3 resource base 808da000 size 1000 align 12 gran 12 limit 808dafff flags 60000201 index 10
2151 06:42:54.060151 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
2152 06:42:54.069825 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
2153 06:42:54.070401 PNP: 0c09.0
2154 06:42:54.080112 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
2155 06:42:54.083458 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
2156 06:42:54.093203 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
2157 06:42:54.103037 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
2158 06:42:54.106553 GENERIC: 0.0 child on link 0 GENERIC: 0.0
2159 06:42:54.109881 GENERIC: 0.0
2160 06:42:54.110453 GENERIC: 1.0
2161 06:42:54.113329 PCI: 00:1f.3
2162 06:42:54.123142 PCI: 00:1f.3 resource base 808d0000 size 4000 align 14 gran 14 limit 808d3fff flags 60000201 index 10
2163 06:42:54.132842 PCI: 00:1f.3 resource base 80700000 size 100000 align 20 gran 20 limit 807fffff flags 60000201 index 20
2164 06:42:54.133423 PCI: 00:1f.4
2165 06:42:54.146129 PCI: 00:1f.4 resource base 808dc000 size 100 align 12 gran 8 limit 808dc0ff flags 60000201 index 10
2166 06:42:54.152534 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
2167 06:42:54.156233 PCI: 00:1f.5
2168 06:42:54.166824 PCI: 00:1f.5 resource base 808db000 size 1000 align 12 gran 12 limit 808dbfff flags 60000200 index 10
2169 06:42:54.169592 Done allocating resources.
2170 06:42:54.175777 BS: BS_DEV_RESOURCES run times (exec / console): 5 / 4328 ms
2171 06:42:54.179326 coreboot skipped calling FSP notify phase: 00000020.
2172 06:42:54.182637 fw_config match found: AUDIO=NAU88L25B_I2S
2173 06:42:54.189654 BT offload enabled over I2S with NAU88L25B
2174 06:42:54.195686 BS: BS_DEV_ENABLE entry times (exec / console): 1 / 14 ms
2175 06:42:54.196161 Enabling resources...
2176 06:42:54.202890 PCI: 00:00.0 subsystem <- 8086/4619
2177 06:42:54.203397 PCI: 00:00.0 cmd <- 06
2178 06:42:54.205768 PCI: 00:02.0 subsystem <- 8086/46b3
2179 06:42:54.209306 PCI: 00:02.0 cmd <- 03
2180 06:42:54.212770 PCI: 00:04.0 subsystem <- 8086/461d
2181 06:42:54.215870 PCI: 00:04.0 cmd <- 02
2182 06:42:54.219441 PCI: 00:07.0 bridge ctrl <- 0013
2183 06:42:54.222413 PCI: 00:07.0 cmd <- 07
2184 06:42:54.226033 PCI: 00:07.1 bridge ctrl <- 0013
2185 06:42:54.226555 PCI: 00:07.1 cmd <- 07
2186 06:42:54.229550 PCI: 00:07.2 bridge ctrl <- 0013
2187 06:42:54.231966 PCI: 00:07.2 cmd <- 07
2188 06:42:54.235690 PCI: 00:0a.0 subsystem <- 8086/467d
2189 06:42:54.239316 PCI: 00:0a.0 cmd <- 02
2190 06:42:54.242149 PCI: 00:0d.0 subsystem <- 8086/461e
2191 06:42:54.245723 PCI: 00:0d.0 cmd <- 02
2192 06:42:54.249145 PCI: 00:0d.2 subsystem <- 8086/463e
2193 06:42:54.249665 PCI: 00:0d.2 cmd <- 02
2194 06:42:54.255398 PCI: 00:0d.3 subsystem <- 8086/466d
2195 06:42:54.255825 PCI: 00:0d.3 cmd <- 02
2196 06:42:54.258565 PCI: 00:14.0 subsystem <- 8086/51ed
2197 06:42:54.261991 PCI: 00:14.0 cmd <- 02
2198 06:42:54.265371 PCI: 00:14.2 subsystem <- 8086/51ef
2199 06:42:54.268556 PCI: 00:14.2 cmd <- 02
2200 06:42:54.272281 PCI: 00:14.3 subsystem <- 8086/51f0
2201 06:42:54.275198 PCI: 00:14.3 cmd <- 02
2202 06:42:54.278891 PCI: 00:15.0 subsystem <- 8086/51e8
2203 06:42:54.279322 PCI: 00:15.0 cmd <- 02
2204 06:42:54.286137 PCI: 00:15.1 subsystem <- 8086/51e9
2205 06:42:54.286657 PCI: 00:15.1 cmd <- 06
2206 06:42:54.288783 PCI: 00:16.0 subsystem <- 8086/51e0
2207 06:42:54.292120 PCI: 00:16.0 cmd <- 02
2208 06:42:54.295507 PCI: 00:1c.0 bridge ctrl <- 0013
2209 06:42:54.298922 PCI: 00:1c.0 subsystem <- 8086/51be
2210 06:42:54.302067 PCI: 00:1c.0 cmd <- 07
2211 06:42:54.305543 PCI: 00:1c.7 bridge ctrl <- 0013
2212 06:42:54.308881 PCI: 00:1c.7 subsystem <- 8086/51bf
2213 06:42:54.312115 PCI: 00:1c.7 cmd <- 06
2214 06:42:54.315841 PCI: 00:1d.0 bridge ctrl <- 0013
2215 06:42:54.318646 PCI: 00:1d.0 subsystem <- 8086/51b3
2216 06:42:54.319114 PCI: 00:1d.0 cmd <- 06
2217 06:42:54.325387 PCI: 00:1e.0 subsystem <- 8086/51a8
2218 06:42:54.325908 PCI: 00:1e.0 cmd <- 06
2219 06:42:54.328467 PCI: 00:1e.3 subsystem <- 8086/51ab
2220 06:42:54.331756 PCI: 00:1e.3 cmd <- 02
2221 06:42:54.334938 PCI: 00:1f.0 subsystem <- 8086/5182
2222 06:42:54.338856 PCI: 00:1f.0 cmd <- 407
2223 06:42:54.342348 PCI: 00:1f.3 subsystem <- 8086/51c8
2224 06:42:54.345441 PCI: 00:1f.3 cmd <- 02
2225 06:42:54.348606 PCI: 00:1f.4 subsystem <- 8086/51a3
2226 06:42:54.352018 PCI: 00:1f.4 cmd <- 03
2227 06:42:54.355389 PCI: 00:1f.5 subsystem <- 8086/51a4
2228 06:42:54.355933 PCI: 00:1f.5 cmd <- 406
2229 06:42:54.358489 PCI: 82:00.0 cmd <- 03
2230 06:42:54.361843 PCI: 83:00.0 cmd <- 06
2231 06:42:54.362351 PCI: 84:00.0 cmd <- 02
2232 06:42:54.364970 done.
2233 06:42:54.368166 BS: BS_DEV_ENABLE run times (exec / console): 1 / 168 ms
2234 06:42:54.371352 ME: Version: Unavailable
2235 06:42:54.378326 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
2236 06:42:54.381547 Initializing devices...
2237 06:42:54.382060 Root Device init
2238 06:42:54.384875 mainboard: EC init
2239 06:42:54.387991 Chrome EC: Set SMI mask to 0x0000000000000000
2240 06:42:54.391430 Chrome EC: UHEPI supported
2241 06:42:54.397934 Chrome EC: clear events_b mask to 0x0000000000000000
2242 06:42:54.405005 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004
2243 06:42:54.408335 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004
2244 06:42:54.414751 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000008080004
2245 06:42:54.421719 Chrome EC: Set WAKE mask to 0x0000000000000000
2246 06:42:54.424659 Root Device init finished in 38 msecs
2247 06:42:54.425223 PCI: 00:00.0 init
2248 06:42:54.428082 CPU TDP = 15 Watts
2249 06:42:54.431787 CPU PL1 = 55 Watts
2250 06:42:54.432544 CPU PL2 = 55 Watts
2251 06:42:54.434632 CPU PsysPL2 = 90 Watts
2252 06:42:54.438030 CPU PL4 = 123 Watts
2253 06:42:54.441467 PCI: 00:00.0 init finished in 10 msecs
2254 06:42:54.442033 PCI: 00:02.0 init
2255 06:42:54.444668 GMA: Found VBT in CBFS
2256 06:42:54.448101 GMA: Found valid VBT in CBFS
2257 06:42:54.451330 Graphics hand-off block not found
2258 06:42:54.454680 PCI: 00:02.0 init finished in 8 msecs
2259 06:42:54.457863 PCI: 00:0a.0 init
2260 06:42:54.461216 PCI: 00:0a.0 init finished in 0 msecs
2261 06:42:54.461687 PCI: 00:14.0 init
2262 06:42:54.464474 PCI: 00:14.0 init finished in 0 msecs
2263 06:42:54.467771 PCI: 00:14.2 init
2264 06:42:54.470894 PCI: 00:14.2 init finished in 0 msecs
2265 06:42:54.474333 PCI: 00:15.0 init
2266 06:42:54.477728 I2C bus 0 version 0x3230302a
2267 06:42:54.480838 DW I2C bus 0 at 0x808d7000 (400 KHz)
2268 06:42:54.484213 PCI: 00:15.0 init finished in 6 msecs
2269 06:42:54.484634 PCI: 00:15.1 init
2270 06:42:54.487999 I2C bus 1 version 0x3230302a
2271 06:42:54.491019 DW I2C bus 1 at 0x808d8000 (400 KHz)
2272 06:42:54.497395 PCI: 00:15.1 init finished in 6 msecs
2273 06:42:54.497908 PCI: 00:16.0 init
2274 06:42:54.501069 PCI: 00:16.0 init finished in 0 msecs
2275 06:42:54.504504 PCI: 00:1c.0 init
2276 06:42:54.507776 Initializing PCH PCIe bridge.
2277 06:42:54.510862 PCI: 00:1c.0 init finished in 3 msecs
2278 06:42:54.514275 PCI: 00:1c.7 init
2279 06:42:54.514836 Initializing PCH PCIe bridge.
2280 06:42:54.521028 PCI: 00:1c.7 init finished in 3 msecs
2281 06:42:54.521612 PCI: 00:1d.0 init
2282 06:42:54.524378 Initializing PCH PCIe bridge.
2283 06:42:54.527745 PCI: 00:1d.0 init finished in 3 msecs
2284 06:42:54.531024 PCI: 00:1f.0 init
2285 06:42:54.533771 IOAPIC: Initializing IOAPIC at 0xfec00000
2286 06:42:54.537305 IOAPIC: ID = 0x02
2287 06:42:54.537728 IOAPIC: Dumping registers
2288 06:42:54.540901 reg 0x0000: 0x02000000
2289 06:42:54.544275 reg 0x0001: 0x00770020
2290 06:42:54.547400 reg 0x0002: 0x00000000
2291 06:42:54.547922 IOAPIC: 120 interrupts
2292 06:42:54.554353 IOAPIC: Clearing IOAPIC at 0xfec00000
2293 06:42:54.557499 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2294 06:42:54.560697 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2295 06:42:54.567681 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2296 06:42:54.570760 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2297 06:42:54.577426 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2298 06:42:54.580366 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2299 06:42:54.587535 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2300 06:42:54.590464 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2301 06:42:54.597386 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2302 06:42:54.600563 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2303 06:42:54.604345 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2304 06:42:54.610972 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2305 06:42:54.614201 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2306 06:42:54.620817 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2307 06:42:54.623732 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2308 06:42:54.629983 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2309 06:42:54.633228 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2310 06:42:54.640774 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2311 06:42:54.643685 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2312 06:42:54.647019 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2313 06:42:54.653289 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2314 06:42:54.657157 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2315 06:42:54.663946 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2316 06:42:54.666824 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2317 06:42:54.673672 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2318 06:42:54.676859 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2319 06:42:54.683567 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2320 06:42:54.686663 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2321 06:42:54.690212 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2322 06:42:54.696469 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2323 06:42:54.699912 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2324 06:42:54.706844 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2325 06:42:54.710352 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2326 06:42:54.716591 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2327 06:42:54.720186 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2328 06:42:54.726872 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2329 06:42:54.730058 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2330 06:42:54.732883 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2331 06:42:54.739729 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2332 06:42:54.743143 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2333 06:42:54.749325 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2334 06:42:54.752888 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2335 06:42:54.759735 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2336 06:42:54.763085 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2337 06:42:54.769800 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2338 06:42:54.773076 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2339 06:42:54.776326 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2340 06:42:54.782943 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2341 06:42:54.786229 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2342 06:42:54.793093 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2343 06:42:54.795849 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2344 06:42:54.802452 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2345 06:42:54.806319 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2346 06:42:54.812653 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2347 06:42:54.815825 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2348 06:42:54.819460 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2349 06:42:54.826668 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2350 06:42:54.829272 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2351 06:42:54.836140 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2352 06:42:54.839326 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2353 06:42:54.846035 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2354 06:42:54.849410 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2355 06:42:54.855767 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2356 06:42:54.859185 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2357 06:42:54.862668 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2358 06:42:54.869179 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2359 06:42:54.872284 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2360 06:42:54.879188 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2361 06:42:54.882407 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2362 06:42:54.888930 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2363 06:42:54.892680 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2364 06:42:54.895730 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2365 06:42:54.902524 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2366 06:42:54.905822 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2367 06:42:54.912238 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2368 06:42:54.915698 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2369 06:42:54.922460 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2370 06:42:54.925551 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2371 06:42:54.932520 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2372 06:42:54.935320 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2373 06:42:54.938954 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2374 06:42:54.945530 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2375 06:42:54.949147 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2376 06:42:54.955665 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2377 06:42:54.958816 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2378 06:42:54.965413 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2379 06:42:54.968745 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2380 06:42:54.975631 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2381 06:42:54.978684 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2382 06:42:54.982024 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2383 06:42:54.988679 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2384 06:42:54.991919 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2385 06:42:54.998516 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2386 06:42:55.001833 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2387 06:42:55.008522 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2388 06:42:55.012048 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2389 06:42:55.018469 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2390 06:42:55.021841 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2391 06:42:55.025270 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2392 06:42:55.031731 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2393 06:42:55.035258 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2394 06:42:55.041800 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2395 06:42:55.045587 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2396 06:42:55.051721 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2397 06:42:55.055275 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2398 06:42:55.058809 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2399 06:42:55.065396 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2400 06:42:55.068652 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2401 06:42:55.075227 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2402 06:42:55.078561 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2403 06:42:55.084992 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2404 06:42:55.088444 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2405 06:42:55.095171 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2406 06:42:55.098736 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2407 06:42:55.101682 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2408 06:42:55.108265 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2409 06:42:55.111476 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2410 06:42:55.118083 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2411 06:42:55.121690 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2412 06:42:55.128483 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2413 06:42:55.131368 IOAPIC: Bootstrap Processor Local APIC = 0x00
2414 06:42:55.134492 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2415 06:42:55.141854 PCI: 00:1f.0 init finished in 606 msecs
2416 06:42:55.142280 PCI: 00:1f.2 init
2417 06:42:55.145042 apm_control: Disabling ACPI.
2418 06:42:55.149362 APMC done.
2419 06:42:55.152874 PCI: 00:1f.2 init finished in 6 msecs
2420 06:42:55.156118 PCI: 00:1f.3 init
2421 06:42:55.159601 PCI: 00:1f.3 init finished in 0 msecs
2422 06:42:55.160176 PCI: 00:1f.4 init
2423 06:42:55.162642 PCI: 00:1f.4 init finished in 0 msecs
2424 06:42:55.165961 PCI: 82:00.0 init
2425 06:42:55.169277 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
2426 06:42:55.172868 Located 'ethernet_mac0' in VPD
2427 06:42:55.176199 r8168: Resetting NIC...done
2428 06:42:55.179708 r8168: Programming MAC Address...done
2429 06:42:55.182952 r8168: Customized LED 0x482
2430 06:42:55.186407 r8168: read back LED setting as 0x482
2431 06:42:55.192813 PCI: 82:00.0 init finished in 21 msecs
2432 06:42:55.193384 PCI: 83:00.0 init
2433 06:42:55.196287 PCI: 83:00.0 init finished in 0 msecs
2434 06:42:55.199711 PCI: 84:00.0 init
2435 06:42:55.202550 PCI: 84:00.0 init finished in 0 msecs
2436 06:42:55.206202 PNP: 0c09.0 init
2437 06:42:55.209774 Google Chrome EC uptime: 13.438 seconds
2438 06:42:55.212773 Google Chrome AP resets since EC boot: 1
2439 06:42:55.215880 Google Chrome most recent AP reset causes:
2440 06:42:55.222741 0.313: 32775 shutdown: entering G3
2441 06:42:55.229694 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2442 06:42:55.232286 PNP: 0c09.0 init finished in 23 msecs
2443 06:42:55.232758 GENERIC: 0.0 init
2444 06:42:55.235367 GENERIC: 0.0 init finished in 0 msecs
2445 06:42:55.239009 GENERIC: 1.0 init
2446 06:42:55.242231 GENERIC: 1.0 init finished in 0 msecs
2447 06:42:55.245686 Devices initialized
2448 06:42:55.248821 Show all devs... After init.
2449 06:42:55.249242 Root Device: enabled 1
2450 06:42:55.252184 CPU_CLUSTER: 0: enabled 1
2451 06:42:55.255572 DOMAIN: 0000: enabled 1
2452 06:42:55.255993 GPIO: 0: enabled 1
2453 06:42:55.258835 PCI: 00:00.0: enabled 1
2454 06:42:55.262070 PCI: 00:01.0: enabled 0
2455 06:42:55.265564 PCI: 00:01.1: enabled 0
2456 06:42:55.265964 PCI: 00:02.0: enabled 1
2457 06:42:55.269222 PCI: 00:04.0: enabled 1
2458 06:42:55.272617 PCI: 00:05.0: enabled 0
2459 06:42:55.275428 PCI: 00:06.0: enabled 0
2460 06:42:55.275826 PCI: 00:06.2: enabled 0
2461 06:42:55.279582 PCI: 00:07.0: enabled 1
2462 06:42:55.283045 PCI: 00:07.1: enabled 1
2463 06:42:55.283452 PCI: 00:07.2: enabled 1
2464 06:42:55.286000 PCI: 00:07.3: enabled 0
2465 06:42:55.289319 PCI: 00:08.0: enabled 0
2466 06:42:55.292214 PCI: 00:09.0: enabled 0
2467 06:42:55.292614 PCI: 00:0a.0: enabled 1
2468 06:42:55.295849 PCI: 00:0d.0: enabled 1
2469 06:42:55.299170 PCI: 00:0d.1: enabled 0
2470 06:42:55.302125 PCI: 00:0d.2: enabled 1
2471 06:42:55.302588 PCI: 00:0d.3: enabled 1
2472 06:42:55.305567 PCI: 00:0e.0: enabled 0
2473 06:42:55.308789 PCI: 00:10.0: enabled 0
2474 06:42:55.312702 PCI: 00:10.1: enabled 0
2475 06:42:55.313227 PCI: 00:10.6: enabled 0
2476 06:42:55.315746 PCI: 00:10.7: enabled 0
2477 06:42:55.319459 PCI: 00:12.0: enabled 0
2478 06:42:55.322361 PCI: 00:12.6: enabled 0
2479 06:42:55.322991 PCI: 00:12.7: enabled 0
2480 06:42:55.325770 PCI: 00:13.0: enabled 0
2481 06:42:55.329042 PCI: 00:14.0: enabled 1
2482 06:42:55.329610 PCI: 00:14.1: enabled 0
2483 06:42:55.332025 PCI: 00:14.2: enabled 1
2484 06:42:55.335746 PCI: 00:14.3: enabled 1
2485 06:42:55.339007 PCI: 00:15.0: enabled 1
2486 06:42:55.339647 PCI: 00:15.1: enabled 1
2487 06:42:55.342256 PCI: 00:15.2: enabled 0
2488 06:42:55.345612 PCI: 00:15.3: enabled 0
2489 06:42:55.348630 PCI: 00:16.0: enabled 1
2490 06:42:55.349207 PCI: 00:16.1: enabled 0
2491 06:42:55.352118 PCI: 00:16.2: enabled 0
2492 06:42:55.355812 PCI: 00:16.3: enabled 0
2493 06:42:55.358647 PCI: 00:16.4: enabled 0
2494 06:42:55.359254 PCI: 00:16.5: enabled 0
2495 06:42:55.362630 PCI: 00:17.0: enabled 0
2496 06:42:55.365286 PCI: 00:19.0: enabled 0
2497 06:42:55.368553 PCI: 00:19.1: enabled 0
2498 06:42:55.369118 PCI: 00:19.2: enabled 0
2499 06:42:55.372415 PCI: 00:1a.0: enabled 0
2500 06:42:55.375184 PCI: 00:1c.0: enabled 0
2501 06:42:55.378334 PCI: 00:1c.1: enabled 0
2502 06:42:55.378940 PCI: 00:1c.2: enabled 0
2503 06:42:55.382154 PCI: 00:1c.3: enabled 0
2504 06:42:55.385022 PCI: 00:1c.4: enabled 0
2505 06:42:55.385584 PCI: 00:1c.5: enabled 1
2506 06:42:55.388633 PCI: 00:1c.0: enabled 1
2507 06:42:55.391680 PCI: 00:1c.7: enabled 1
2508 06:42:55.395121 PCI: 00:1d.0: enabled 0
2509 06:42:55.395684 PCI: 00:1d.1: enabled 0
2510 06:42:55.398586 PCI: 00:1d.2: enabled 0
2511 06:42:55.401339 PCI: 00:1d.0: enabled 1
2512 06:42:55.405130 PCI: 00:1e.0: enabled 1
2513 06:42:55.405710 PCI: 00:1e.1: enabled 0
2514 06:42:55.408807 PCI: 00:1e.2: enabled 0
2515 06:42:55.411986 PCI: 00:1e.3: enabled 1
2516 06:42:55.414944 PCI: 00:1f.0: enabled 1
2517 06:42:55.415509 PCI: 00:1f.1: enabled 0
2518 06:42:55.418395 PCI: 00:1f.2: enabled 1
2519 06:42:55.421922 PCI: 00:1f.3: enabled 1
2520 06:42:55.422491 PCI: 00:1f.4: enabled 1
2521 06:42:55.425222 PCI: 00:1f.5: enabled 1
2522 06:42:55.428587 PCI: 00:1f.6: enabled 0
2523 06:42:55.431510 PCI: 00:1f.7: enabled 0
2524 06:42:55.432079 GENERIC: 0.0: enabled 1
2525 06:42:55.434407 GENERIC: 0.0: enabled 1
2526 06:42:55.437702 GENERIC: 1.0: enabled 1
2527 06:42:55.441536 GENERIC: 0.0: enabled 1
2528 06:42:55.442000 GENERIC: 1.0: enabled 1
2529 06:42:55.444842 USB0 port 0: enabled 1
2530 06:42:55.448488 GENERIC: 0.0: enabled 1
2531 06:42:55.451436 GENERIC: 0.0: enabled 1
2532 06:42:55.452001 USB0 port 0: enabled 1
2533 06:42:55.455105 GENERIC: 0.0: enabled 1
2534 06:42:55.458098 I2C: 00:1a: enabled 1
2535 06:42:55.458667 I2C: 00:50: enabled 1
2536 06:42:55.461705 PCI: 00:00.0: enabled 1
2537 06:42:55.465087 PCI: 82:00.0: enabled 1
2538 06:42:55.467788 GENERIC: 0.0: enabled 1
2539 06:42:55.468459 GENERIC: 0.0: enabled 1
2540 06:42:55.471386 PNP: 0c09.0: enabled 1
2541 06:42:55.474598 GENERIC: 0.0: enabled 1
2542 06:42:55.475220 USB3 port 0: enabled 1
2543 06:42:55.478137 USB3 port 1: enabled 0
2544 06:42:55.481716 USB3 port 2: enabled 1
2545 06:42:55.484595 USB3 port 3: enabled 0
2546 06:42:55.485328 USB2 port 0: enabled 1
2547 06:42:55.487654 USB2 port 1: enabled 0
2548 06:42:55.491246 USB2 port 2: enabled 1
2549 06:42:55.491813 USB2 port 3: enabled 1
2550 06:42:55.494411 USB2 port 4: enabled 1
2551 06:42:55.497538 USB2 port 5: enabled 1
2552 06:42:55.501274 USB2 port 6: enabled 1
2553 06:42:55.501866 USB2 port 7: enabled 1
2554 06:42:55.504782 USB2 port 8: enabled 0
2555 06:42:55.507651 USB2 port 9: enabled 1
2556 06:42:55.508139 USB3 port 0: enabled 1
2557 06:42:55.510936 USB3 port 1: enabled 1
2558 06:42:55.514365 USB3 port 2: enabled 1
2559 06:42:55.515002 USB3 port 3: enabled 1
2560 06:42:55.517805 GENERIC: 0.0: enabled 1
2561 06:42:55.521074 GENERIC: 1.0: enabled 1
2562 06:42:55.524352 APIC: 00: enabled 1
2563 06:42:55.524941 APIC: 14: enabled 1
2564 06:42:55.528136 APIC: 16: enabled 1
2565 06:42:55.528721 APIC: 10: enabled 1
2566 06:42:55.531512 APIC: 12: enabled 1
2567 06:42:55.534156 NONE: enabled 1
2568 06:42:55.534928 NONE: enabled 1
2569 06:42:55.537607 NONE: enabled 1
2570 06:42:55.538251 PCI: 83:00.0: enabled 1
2571 06:42:55.541155 PCI: 84:00.0: enabled 1
2572 06:42:55.547393 BS: BS_DEV_INIT run times (exec / console): 6 / 1157 ms
2573 06:42:55.551329 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2574 06:42:55.554201 ELOG: NV offset 0xf20000 size 0x4000
2575 06:42:55.562953 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2576 06:42:55.569085 ELOG: Event(17) added with size 13 at 2023-12-07 06:42:55 UTC
2577 06:42:55.576183 ELOG: Event(9E) added with size 10 at 2023-12-07 06:42:55 UTC
2578 06:42:55.582655 ELOG: Event(9F) added with size 14 at 2023-12-07 06:42:55 UTC
2579 06:42:55.589114 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2580 06:42:55.595374 ELOG: Event(A0) added with size 9 at 2023-12-07 06:42:55 UTC
2581 06:42:55.599193 elog_add_boot_reason: Logged dev mode boot
2582 06:42:55.605623 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2583 06:42:55.606198 Finalize devices...
2584 06:42:55.609008 PCI: 00:16.0 final
2585 06:42:55.612641 CSE RW Firmware Version: 16.1.25.2049
2586 06:42:55.615392 PCI: 00:1f.2 final
2587 06:42:55.615855 PCI: 00:1f.4 final
2588 06:42:55.618758 GENERIC: 0.0 final
2589 06:42:55.625622 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2590 06:42:55.626211 GENERIC: 1.0 final
2591 06:42:55.632164 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2592 06:42:55.635481 Devices finalized
2593 06:42:55.638934 BS: BS_POST_DEVICE run times (exec / console): 0 / 30 ms
2594 06:42:55.645512 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2595 06:42:55.652546 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2596 06:42:55.655475 ME: HFSTS1 : 0x90000245
2597 06:42:55.658938 ME: HFSTS2 : 0x32850116
2598 06:42:55.665738 ME: HFSTS3 : 0x00000050
2599 06:42:55.668783 ME: HFSTS4 : 0x00004000
2600 06:42:55.675581 ME: HFSTS5 : 0x00000000
2601 06:42:55.678893 ME: HFSTS6 : 0x40600006
2602 06:42:55.682007 ME: Manufacturing Mode : NO
2603 06:42:55.685756 ME: SPI Protection Mode Enabled : YES
2604 06:42:55.688853 ME: FPFs Committed : YES
2605 06:42:55.691780 ME: Manufacturing Vars Locked : YES
2606 06:42:55.698550 ME: FW Partition Table : OK
2607 06:42:55.701989 ME: Bringup Loader Failure : NO
2608 06:42:55.704717 ME: Firmware Init Complete : YES
2609 06:42:55.708724 ME: Boot Options Present : NO
2610 06:42:55.711744 ME: Update In Progress : NO
2611 06:42:55.715476 ME: D0i3 Support : YES
2612 06:42:55.718405 ME: Low Power State Enabled : NO
2613 06:42:55.722373 ME: CPU Replaced : YES
2614 06:42:55.728290 ME: CPU Replacement Valid : YES
2615 06:42:55.731676 ME: Current Working State : 5
2616 06:42:55.734905 ME: Current Operation State : 1
2617 06:42:55.737847 ME: Current Operation Mode : 0
2618 06:42:55.741514 ME: Error Code : 0
2619 06:42:55.745045 ME: Enhanced Debug Mode : NO
2620 06:42:55.748143 ME: CPU Debug Disabled : YES
2621 06:42:55.751495 ME: TXT Support : NO
2622 06:42:55.755156 ME: WP for RO is enabled : YES
2623 06:42:55.761659 ME: RO write protection scope - Start=0x1000, End=0x1A6FFF
2624 06:42:55.768328 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2625 06:42:55.771251 Ramoops buffer: 0x100000@0x76898000.
2626 06:42:55.778357 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2627 06:42:55.785223 CBFS: Found 'fallback/dsdt.aml' @0x799c0 size 0x4f3a in mcache @0x76add16c
2628 06:42:55.787986 CBFS: 'fallback/slic' not found.
2629 06:42:55.791457 ACPI: Writing ACPI tables at 7686c000.
2630 06:42:55.795092 ACPI: * FACS
2631 06:42:55.795653 ACPI: * DSDT
2632 06:42:55.801638 PCI space above 4GB MMIO is at 0x17fc00000, len = 0x7e80400000
2633 06:42:55.805987 ACPI: * FADT
2634 06:42:55.806613 SCI is IRQ9
2635 06:42:55.813209 ACPI: added table 1/32, length now 40
2636 06:42:55.813778 ACPI: * SSDT
2637 06:42:55.819493 Found 1 CPU(s) with 5/5 physical/logical core(s) each.
2638 06:42:55.822963 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2639 06:42:55.829713 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2640 06:42:55.833232 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2641 06:42:55.839290 \_SB.PCI0.TRP0: Intel USB4 PCIe Root Port at PCI: 00:07.0
2642 06:42:55.842614 \_SB.PCI0.TRP1: Intel USB4 PCIe Root Port at PCI: 00:07.1
2643 06:42:55.849581 \_SB.PCI0.TRP2: Intel USB4 PCIe Root Port at PCI: 00:07.2
2644 06:42:55.852929 USB Type-C 0 mapped to EC port 0
2645 06:42:55.859393 usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0
2646 06:42:55.862434 \_SB.PCI0.TDM0.HR: Intel USB4 Retimer at GENERIC: 0.0
2647 06:42:55.866261 USB Type-C 2 mapped to EC port 1
2648 06:42:55.872967 usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0
2649 06:42:55.879153 \_SB.PCI0.TDM1.HR: Intel USB4 Retimer at GENERIC: 0.0
2650 06:42:55.882911 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2651 06:42:55.889320 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2652 06:42:55.892615 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2653 06:42:55.899533 \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 82:00.0
2654 06:42:55.905693 \_SB.PCI0.RP08: Enable RTD3 for PCI: 00:1c.7 (Intel PCIe Runtime D3)
2655 06:42:55.912736 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
2656 06:42:55.916460 \_SB.PCI0.RP09: Added StorageD3Enable property
2657 06:42:55.920458 EC returned error result code 1
2658 06:42:55.927115 PS2K: Bad resp from EC. Vivaldi disabled!
2659 06:42:55.933720 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2660 06:42:55.940397 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C2 (MLB) at USB3 port 2
2661 06:42:55.947159 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2662 06:42:55.953620 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C2 (MLB) at USB2 port 2
2663 06:42:55.960218 \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Port A4 (MLB) at USB2 port 3
2664 06:42:55.963340 \_SB.PCI0.XHCI.RHUB.HS05: USB2 NFC at USB2 port 4
2665 06:42:55.970092 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Port A3 (MLB) at USB2 port 5
2666 06:42:55.976880 \_SB.PCI0.XHCI.RHUB.HS07: USB2 Type-A Port A2 (MLB) at USB2 port 6
2667 06:42:55.983080 \_SB.PCI0.XHCI.RHUB.HS08: USB2 Type-A Port A1 (MLB) at USB2 port 7
2668 06:42:55.990636 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2669 06:42:55.996751 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A1 (MLB) at USB3 port 0
2670 06:42:56.003199 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A2 (MLB) at USB3 port 1
2671 06:42:56.010009 \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Port A3 (MLB) at USB3 port 2
2672 06:42:56.016708 \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-A Port A4 (MLB) at USB3 port 3
2673 06:42:56.023253 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2674 06:42:56.030262 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2675 06:42:56.033328 ACPI: added table 2/32, length now 44
2676 06:42:56.033890 ACPI: * MCFG
2677 06:42:56.039773 ACPI: added table 3/32, length now 48
2678 06:42:56.040328 ACPI: * TPM2
2679 06:42:56.043386 TPM2 log created at 0x7685c000
2680 06:42:56.046475 ACPI: added table 4/32, length now 52
2681 06:42:56.049896 ACPI: * LPIT
2682 06:42:56.053319 ACPI: added table 5/32, length now 56
2683 06:42:56.053885 ACPI: * MADT
2684 06:42:56.056417 SCI is IRQ9
2685 06:42:56.059983 ACPI: added table 6/32, length now 60
2686 06:42:56.063452 cmd_reg from pmc_make_ipc_cmd 1052838
2687 06:42:56.069678 CL PMC desc table: numb of regions is 0x2 at addr 0x808ca1bc
2688 06:42:56.076390 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2689 06:42:56.083046 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2690 06:42:56.086304 PMC CrashLog size in discovery mode: 0xC00
2691 06:42:56.089712 cpu crashlog bar addr: 0x808C0000
2692 06:42:56.092920 cpu discovery table offset: 0x6030
2693 06:42:56.096327 cpu_crashlog_discovery_table buffer count: 0x3
2694 06:42:56.102819 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2695 06:42:56.109617 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2696 06:42:56.116719 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2697 06:42:56.123153 PMC crashLog size in discovery mode : 0xC00
2698 06:42:56.129551 Invalid data 0x0 at offset 0x2200 from addr 0x808c8000 of PMC SRAM.
2699 06:42:56.132884 discover mode PMC crashlog size adjusted to: 0x200
2700 06:42:56.138967 Invalid data 0x0 at offset 0x3e00 from addr 0x808c8000 of PMC SRAM.
2701 06:42:56.145799 discover mode PMC crashlog size adjusted to: 0x0
2702 06:42:56.149320 m_cpu_crashLog_size : 0x3480 bytes
2703 06:42:56.152387 CPU crashLog present.
2704 06:42:56.155760 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2705 06:42:56.162447 Invalid data 0x0 at offset 0x0 from addr 0x808c0000 of telemetry SRAM.
2706 06:42:56.165759 current = 76875cf0
2707 06:42:56.166184 ACPI: * DMAR
2708 06:42:56.169334 ACPI: added table 7/32, length now 64
2709 06:42:56.176129 ACPI: added table 8/32, length now 68
2710 06:42:56.176647 ACPI: * HPET
2711 06:42:56.179058 ACPI: added table 9/32, length now 72
2712 06:42:56.182611 ACPI: done.
2713 06:42:56.183181 ACPI tables: 40480 bytes.
2714 06:42:56.185691 smbios_write_tables: 76856000
2715 06:42:56.190115 EC returned error result code 3
2716 06:42:56.193637 Couldn't obtain OEM name from CBI
2717 06:42:56.197225 Create SMBIOS type 16
2718 06:42:56.200465 Create SMBIOS type 17
2719 06:42:56.203375 Create SMBIOS type 20
2720 06:42:56.203803 GENERIC: 0.0 (WIFI Device)
2721 06:42:56.206647 SMBIOS tables: 982 bytes.
2722 06:42:56.210144 Writing table forward entry at 0x00000500
2723 06:42:56.216935 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 8955
2724 06:42:56.220331 Writing coreboot table at 0x76890000
2725 06:42:56.226725 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2726 06:42:56.233563 1. 0000000000001000-000000000009ffff: RAM
2727 06:42:56.236470 2. 00000000000a0000-00000000000fffff: RESERVED
2728 06:42:56.240045 3. 0000000000100000-0000000076855fff: RAM
2729 06:42:56.246702 4. 0000000076856000-0000000076a2dfff: CONFIGURATION TABLES
2730 06:42:56.249921 5. 0000000076a2e000-0000000076ab7fff: RAMSTAGE
2731 06:42:56.256648 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2732 06:42:56.263333 7. 0000000077000000-00000000803fffff: RESERVED
2733 06:42:56.266678 8. 00000000c0000000-00000000cfffffff: RESERVED
2734 06:42:56.273372 9. 00000000f8000000-00000000f9ffffff: RESERVED
2735 06:42:56.276519 10. 00000000fb000000-00000000fb000fff: RESERVED
2736 06:42:56.283164 11. 00000000fc800000-00000000fe7fffff: RESERVED
2737 06:42:56.286870 12. 00000000feb00000-00000000feb7ffff: RESERVED
2738 06:42:56.290095 13. 00000000fec00000-00000000fecfffff: RESERVED
2739 06:42:56.296323 14. 00000000fed40000-00000000fed6ffff: RESERVED
2740 06:42:56.299863 15. 00000000fed80000-00000000fed87fff: RESERVED
2741 06:42:56.306434 16. 00000000fed90000-00000000fed92fff: RESERVED
2742 06:42:56.309859 17. 00000000feda0000-00000000feda1fff: RESERVED
2743 06:42:56.316403 18. 00000000fedc0000-00000000feddffff: RESERVED
2744 06:42:56.319649 19. 0000000100000000-000000017fbfffff: RAM
2745 06:42:56.323283 Passing 4 GPIOs to payload:
2746 06:42:56.326240 NAME | PORT | POLARITY | VALUE
2747 06:42:56.333171 lid | undefined | high | high
2748 06:42:56.339202 power | undefined | high | low
2749 06:42:56.342480 oprom | undefined | high | low
2750 06:42:56.349351 EC in RW | 0x00000151 | high | high
2751 06:42:56.349868 Board ID: 3
2752 06:42:56.352465 FW config: 0x64
2753 06:42:56.359599 Wrote coreboot table at: 0x76890000, 0x6e4 bytes, checksum 329e
2754 06:42:56.360117 coreboot table: 1788 bytes.
2755 06:42:56.365966 IMD ROOT 0. 0x76fff000 0x00001000
2756 06:42:56.369118 IMD SMALL 1. 0x76ffe000 0x00001000
2757 06:42:56.372517 FSP MEMORY 2. 0x76afe000 0x00500000
2758 06:42:56.376221 CONSOLE 3. 0x76ade000 0x00020000
2759 06:42:56.379059 RW MCACHE 4. 0x76add000 0x00000464
2760 06:42:56.382764 RO MCACHE 5. 0x76adc000 0x00001000
2761 06:42:56.386014 FMAP 6. 0x76adb000 0x0000064a
2762 06:42:56.389425 TIME STAMP 7. 0x76ada000 0x00000910
2763 06:42:56.396326 VBOOT WORK 8. 0x76ac6000 0x00014000
2764 06:42:56.399088 MEM INFO 9. 0x76ac5000 0x000003b8
2765 06:42:56.402579 ROMSTG STCK10. 0x76ac4000 0x00001000
2766 06:42:56.406020 AFTER CAR 11. 0x76ab8000 0x0000c000
2767 06:42:56.409125 RAMSTAGE 12. 0x76a2d000 0x0008b000
2768 06:42:56.412875 ACPI BERT 13. 0x76a1d000 0x00010000
2769 06:42:56.415598 CHROMEOS NVS14. 0x76a1c000 0x00000f00
2770 06:42:56.419224 REFCODE 15. 0x769ad000 0x0006f000
2771 06:42:56.425915 SMM BACKUP 16. 0x7699d000 0x00010000
2772 06:42:56.429364 IGD OPREGION17. 0x76998000 0x000041fd
2773 06:42:56.432551 RAMOOPS 18. 0x76898000 0x00100000
2774 06:42:56.435455 COREBOOT 19. 0x76890000 0x00008000
2775 06:42:56.439228 ACPI 20. 0x7686c000 0x00024000
2776 06:42:56.442217 TPM2 TCGLOG21. 0x7685c000 0x00010000
2777 06:42:56.445672 PMC CRASHLOG22. 0x7685b000 0x00000c00
2778 06:42:56.452437 CPU CRASHLOG23. 0x76857000 0x00003480
2779 06:42:56.455958 SMBIOS 24. 0x76856000 0x00001000
2780 06:42:56.456481 IMD small region:
2781 06:42:56.458630 IMD ROOT 0. 0x76ffec00 0x00000400
2782 06:42:56.465686 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2783 06:42:56.469031 VPD 2. 0x76ffeba0 0x00000032
2784 06:42:56.472105 CSE SPECIFIC INFORMATION 3. 0x76ffeb80 0x00000020
2785 06:42:56.478644 POWER STATE 4. 0x76ffeb20 0x00000044
2786 06:42:56.482197 ROMSTAGE 5. 0x76ffeb00 0x00000004
2787 06:42:56.485704 ACPI GNVS 6. 0x76ffeaa0 0x00000048
2788 06:42:56.489163 TYPE_C INFO 7. 0x76ffea80 0x0000000c
2789 06:42:56.495907 BS: BS_WRITE_TABLES run times (exec / console): 7 / 704 ms
2790 06:42:56.499065 MTRR: Physical address space:
2791 06:42:56.505610 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2792 06:42:56.509083 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2793 06:42:56.515486 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2794 06:42:56.522267 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2795 06:42:56.528678 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2796 06:42:56.535617 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2797 06:42:56.542149 0x0000000100000000 - 0x000000017fc00000 size 0x7fc00000 type 6
2798 06:42:56.548874 0x000000017fc00000 - 0x00000001d3c00000 size 0x54000000 type 0
2799 06:42:56.551926 MTRR: Fixed MSR 0x250 0x0606060606060606
2800 06:42:56.555428 MTRR: Fixed MSR 0x258 0x0606060606060606
2801 06:42:56.558763 MTRR: Fixed MSR 0x259 0x0000000000000000
2802 06:42:56.565478 MTRR: Fixed MSR 0x268 0x0606060606060606
2803 06:42:56.568529 MTRR: Fixed MSR 0x269 0x0606060606060606
2804 06:42:56.572092 MTRR: Fixed MSR 0x26a 0x0606060606060606
2805 06:42:56.575055 MTRR: Fixed MSR 0x26b 0x0606060606060606
2806 06:42:56.582190 MTRR: Fixed MSR 0x26c 0x0606060606060606
2807 06:42:56.585176 MTRR: Fixed MSR 0x26d 0x0606060606060606
2808 06:42:56.588712 MTRR: Fixed MSR 0x26e 0x0606060606060606
2809 06:42:56.591720 MTRR: Fixed MSR 0x26f 0x0606060606060606
2810 06:42:56.595085 call enable_fixed_mtrr()
2811 06:42:56.598604 CPU physical address size: 39 bits
2812 06:42:56.605070 MTRR: default type WB/UC MTRR counts: 13/6.
2813 06:42:56.608139 MTRR: UC selected as default type.
2814 06:42:56.611997 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2815 06:42:56.618066 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2816 06:42:56.625253 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2817 06:42:56.631625 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2818 06:42:56.637946 MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6
2819 06:42:56.644868 MTRR: 5 base 0x000000017fc00000 mask 0x0000007fffc00000 type 0
2820 06:42:56.648728 MTRR: Fixed MSR 0x250 0x0606060606060606
2821 06:42:56.651938 MTRR: Fixed MSR 0x258 0x0606060606060606
2822 06:42:56.658435 MTRR: Fixed MSR 0x259 0x0000000000000000
2823 06:42:56.661761 MTRR: Fixed MSR 0x268 0x0606060606060606
2824 06:42:56.664873 MTRR: Fixed MSR 0x269 0x0606060606060606
2825 06:42:56.668419 MTRR: Fixed MSR 0x26a 0x0606060606060606
2826 06:42:56.674722 MTRR: Fixed MSR 0x26b 0x0606060606060606
2827 06:42:56.678177 MTRR: Fixed MSR 0x26c 0x0606060606060606
2828 06:42:56.681865 MTRR: Fixed MSR 0x26d 0x0606060606060606
2829 06:42:56.685068 MTRR: Fixed MSR 0x26e 0x0606060606060606
2830 06:42:56.688097 MTRR: Fixed MSR 0x26f 0x0606060606060606
2831 06:42:56.694998 MTRR: Fixed MSR 0x250 0x0606060606060606
2832 06:42:56.698368 MTRR: Fixed MSR 0x258 0x0606060606060606
2833 06:42:56.701510 MTRR: Fixed MSR 0x259 0x0000000000000000
2834 06:42:56.704514 MTRR: Fixed MSR 0x268 0x0606060606060606
2835 06:42:56.711442 MTRR: Fixed MSR 0x269 0x0606060606060606
2836 06:42:56.714454 MTRR: Fixed MSR 0x26a 0x0606060606060606
2837 06:42:56.717894 MTRR: Fixed MSR 0x26b 0x0606060606060606
2838 06:42:56.721091 MTRR: Fixed MSR 0x26c 0x0606060606060606
2839 06:42:56.727781 MTRR: Fixed MSR 0x26d 0x0606060606060606
2840 06:42:56.731444 MTRR: Fixed MSR 0x26e 0x0606060606060606
2841 06:42:56.734580 MTRR: Fixed MSR 0x26f 0x0606060606060606
2842 06:42:56.737756 MTRR: Fixed MSR 0x250 0x0606060606060606
2843 06:42:56.744558 MTRR: Fixed MSR 0x258 0x0606060606060606
2844 06:42:56.748441 MTRR: Fixed MSR 0x259 0x0000000000000000
2845 06:42:56.750914 MTRR: Fixed MSR 0x268 0x0606060606060606
2846 06:42:56.754717 MTRR: Fixed MSR 0x269 0x0606060606060606
2847 06:42:56.758088 MTRR: Fixed MSR 0x26a 0x0606060606060606
2848 06:42:56.764396 MTRR: Fixed MSR 0x26b 0x0606060606060606
2849 06:42:56.767834 MTRR: Fixed MSR 0x26c 0x0606060606060606
2850 06:42:56.771163 MTRR: Fixed MSR 0x26d 0x0606060606060606
2851 06:42:56.774387 MTRR: Fixed MSR 0x26e 0x0606060606060606
2852 06:42:56.781705 MTRR: Fixed MSR 0x26f 0x0606060606060606
2853 06:42:56.782270 call enable_fixed_mtrr()
2854 06:42:56.787641 MTRR: Fixed MSR 0x250 0x0606060606060606
2855 06:42:56.791149 MTRR: Fixed MSR 0x258 0x0606060606060606
2856 06:42:56.794324 MTRR: Fixed MSR 0x259 0x0000000000000000
2857 06:42:56.797793 MTRR: Fixed MSR 0x268 0x0606060606060606
2858 06:42:56.804154 MTRR: Fixed MSR 0x269 0x0606060606060606
2859 06:42:56.807378 MTRR: Fixed MSR 0x26a 0x0606060606060606
2860 06:42:56.811241 MTRR: Fixed MSR 0x26b 0x0606060606060606
2861 06:42:56.814212 MTRR: Fixed MSR 0x26c 0x0606060606060606
2862 06:42:56.821033 MTRR: Fixed MSR 0x26d 0x0606060606060606
2863 06:42:56.824189 MTRR: Fixed MSR 0x26e 0x0606060606060606
2864 06:42:56.827234 MTRR: Fixed MSR 0x26f 0x0606060606060606
2865 06:42:56.830559 call enable_fixed_mtrr()
2866 06:42:56.834068 call enable_fixed_mtrr()
2867 06:42:56.834536 call enable_fixed_mtrr()
2868 06:42:56.837205 CPU physical address size: 39 bits
2869 06:42:56.840899 CPU physical address size: 39 bits
2870 06:42:56.843794 CPU physical address size: 39 bits
2871 06:42:56.850536 CPU physical address size: 39 bits
2872 06:42:56.851218
2873 06:42:56.851575 MTRR check
2874 06:42:56.853915 Fixed MTRRs : Enabled
2875 06:42:56.854341 Variable MTRRs: Enabled
2876 06:42:56.857961
2877 06:42:56.860878 BS: BS_WRITE_TABLES exit times (exec / console): 141 / 156 ms
2878 06:42:56.863801 Checking cr50 for pending updates
2879 06:42:56.876752 Reading cr50 TPM mode
2880 06:42:56.891749 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2881 06:42:56.901876 CBFS: Found 'fallback/payload' @0x1e0380 size 0x2425e in mcache @0x76add434
2882 06:42:56.904861 Checking segment from ROM address 0xff1f03ac
2883 06:42:56.908494 Checking segment from ROM address 0xff1f03c8
2884 06:42:56.914886 Loading segment from ROM address 0xff1f03ac
2885 06:42:56.915435 code (compression=1)
2886 06:42:56.924757 New segment dstaddr 0x30000000 memsize 0x2665e30 srcaddr 0xff1f03e4 filesize 0x24226
2887 06:42:56.931607 Loading Segment: addr: 0x30000000 memsz: 0x0000000002665e30 filesz: 0x0000000000024226
2888 06:42:56.935295 using LZMA
2889 06:42:56.978935 [ 0x30000000, 3004e1a8, 0x32665e30) <- ff1f03e4
2890 06:42:56.985606 Clearing Segment: addr: 0x000000003004e1a8 memsz: 0x0000000002617c88
2891 06:42:56.996867 Loading segment from ROM address 0xff1f03c8
2892 06:42:56.999803 Entry Point 0x30000000
2893 06:42:57.000365 Loaded segments
2894 06:42:57.006268 BS: BS_PAYLOAD_LOAD run times (exec / console): 46 / 62 ms
2895 06:42:57.009866 coreboot skipped calling FSP notify phase: 00000040.
2896 06:42:57.016629 coreboot skipped calling FSP notify phase: 000000f0.
2897 06:42:57.023477 BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms
2898 06:42:57.024041 Finalizing chipset.
2899 06:42:57.026415 apm_control: Finalizing SMM.
2900 06:42:57.029745 APMC done.
2901 06:42:57.033296 CSE: EOP requested action: continue boot
2902 06:42:57.036252 HECI: CSE device 16.1 is disabled
2903 06:42:57.039680 HECI: CSE device 16.2 is disabled
2904 06:42:57.042825 HECI: CSE device 16.3 is disabled
2905 06:42:57.046182 HECI: CSE device 16.4 is disabled
2906 06:42:57.049713 HECI: CSE device 16.5 is disabled
2907 06:42:57.056609 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 27 ms
2908 06:42:57.060318 mp_park_aps done after 0 msecs.
2909 06:42:57.063479 Jumping to boot code at 0x30000000(0x76890000)
2910 06:42:57.073163 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2911 06:42:57.078535
2912 06:42:57.079101
2913 06:42:57.079448
2914 06:42:57.081633 Starting depthcharge on Moli...
2915 06:42:57.082087
2916 06:42:57.083392 end: 2.2.3 depthcharge-start (duration 00:00:15) [common]
2917 06:42:57.083913 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2918 06:42:57.084323 Setting prompt string to ['brask:']
2919 06:42:57.084743 bootloader-commands: Wait for prompt ['brask:'] (timeout 00:04:40)
2920 06:42:57.088445 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2921 06:42:57.088974
2922 06:42:57.094913 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2923 06:42:57.095498
2924 06:42:57.101821 Looking for NVMe Controller 0x30062398 @ 00:06:00
2925 06:42:57.102343
2926 06:42:57.105617 Looking for NVMe Controller 0x30062440 @ 00:1d:00
2927 06:42:57.106136
2928 06:42:57.108565 Wipe memory regions:
2929 06:42:57.109088
2930 06:42:57.111642 [0x00000000001000, 0x000000000a0000)
2931 06:42:57.112162
2932 06:42:57.114890 [0x00000000100000, 0x00000030000000)
2933 06:42:57.483221
2934 06:42:57.486336 [0x00000032665e30, 0x00000076856000)
2935 06:42:58.007894
2936 06:42:58.010819 [0x00000100000000, 0x0000017fc00000)
2937 06:42:58.989102
2938 06:42:58.991901 ec_init: CrosEC protocol v3 supported (256, 256)
2939 06:42:59.424643
2940 06:42:59.425207 R8152: Initializing
2941 06:42:59.425586
2942 06:42:59.427255 Version 9 (ocp_data = 6010)
2943 06:42:59.427724
2944 06:42:59.430631 R8152: Done initializing
2945 06:42:59.431248
2946 06:42:59.434019 Adding net device
2947 06:42:59.734733
2948 06:42:59.737989 [firmware-brya-14505.B-collabora] Sep 8 2023 15:56:17
2949 06:42:59.738568
2950 06:42:59.738988
2951 06:42:59.739340
2952 06:42:59.740218 Setting prompt string to ['brask:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2954 06:42:59.841914 brask: tftpboot 192.168.201.1 12205572/tftp-deploy-u0jeq3_g/kernel/bzImage 12205572/tftp-deploy-u0jeq3_g/kernel/cmdline 12205572/tftp-deploy-u0jeq3_g/ramdisk/ramdisk.cpio.gz
2955 06:42:59.842574 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2956 06:42:59.843109 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2957 06:42:59.847870 tftpboot 192.168.201.1 12205572/tftp-deploy-u0jeq3_g/kernel/bzIploy-u0jeq3_g/kernel/cmdline 12205572/tftp-deploy-u0jeq3_g/ramdisk/ramdisk.cpio.gz
2958 06:42:59.848353
2959 06:42:59.848724 Waiting for link
2960 06:43:00.050161
2961 06:43:00.050712 done.
2962 06:43:00.051127
2963 06:43:00.051762 MAC: 00:e0:4c:68:04:b6
2964 06:43:00.052195
2965 06:43:00.053581 Sending DHCP discover... done.
2966 06:43:00.054048
2967 06:43:00.056819 Waiting for reply... done.
2968 06:43:00.057642
2969 06:43:00.060075 Sending DHCP request... done.
2970 06:43:00.060545
2971 06:43:00.067272 Waiting for reply... done.
2972 06:43:00.067835
2973 06:43:00.068202 My ip is 192.168.201.186
2974 06:43:00.068547
2975 06:43:00.073867 The DHCP server ip is 192.168.201.1
2976 06:43:00.074432
2977 06:43:00.077204 TFTP server IP predefined by user: 192.168.201.1
2978 06:43:00.077770
2979 06:43:00.083646 Bootfile predefined by user: 12205572/tftp-deploy-u0jeq3_g/kernel/bzImage
2980 06:43:00.084212
2981 06:43:00.087322 Sending tftp read request... done.
2982 06:43:00.087814
2983 06:43:00.096081 Waiting for the transfer...
2984 06:43:00.096685
2985 06:43:00.371113 00000000 ################################################################
2986 06:43:00.371248
2987 06:43:00.662581 00080000 ################################################################
2988 06:43:00.662728
2989 06:43:00.936337 00100000 ################################################################
2990 06:43:00.936454
2991 06:43:01.203338 00180000 ################################################################
2992 06:43:01.203560
2993 06:43:01.486000 00200000 ################################################################
2994 06:43:01.486112
2995 06:43:01.756136 00280000 ################################################################
2996 06:43:01.756244
2997 06:43:02.026907 00300000 ################################################################
2998 06:43:02.027025
2999 06:43:02.306676 00380000 ################################################################
3000 06:43:02.306850
3001 06:43:02.568515 00400000 ################################################################
3002 06:43:02.568627
3003 06:43:02.859897 00480000 ################################################################
3004 06:43:02.860013
3005 06:43:03.136875 00500000 ################################################################
3006 06:43:03.136992
3007 06:43:03.385909 00580000 ################################################################
3008 06:43:03.386077
3009 06:43:03.659437 00600000 ################################################################
3010 06:43:03.659614
3011 06:43:03.913503 00680000 ################################################################
3012 06:43:03.913629
3013 06:43:04.187138 00700000 ################################################################
3014 06:43:04.187284
3015 06:43:04.453294 00780000 ################################################################
3016 06:43:04.453413
3017 06:43:04.558806 00800000 ####################### done.
3018 06:43:04.558915
3019 06:43:04.562154 The bootfile was 8576912 bytes long.
3020 06:43:04.562242
3021 06:43:04.565844 Sending tftp read request... done.
3022 06:43:04.566020
3023 06:43:04.568761 Waiting for the transfer...
3024 06:43:04.568868
3025 06:43:04.871077 00000000 ################################################################
3026 06:43:04.871207
3027 06:43:05.160039 00080000 ################################################################
3028 06:43:05.160260
3029 06:43:05.463263 00100000 ################################################################
3030 06:43:05.463399
3031 06:43:05.758258 00180000 ################################################################
3032 06:43:05.758401
3033 06:43:06.054623 00200000 ################################################################
3034 06:43:06.054740
3035 06:43:06.333145 00280000 ################################################################
3036 06:43:06.333264
3037 06:43:06.621420 00300000 ################################################################
3038 06:43:06.621534
3039 06:43:06.912835 00380000 ################################################################
3040 06:43:06.912953
3041 06:43:07.206443 00400000 ################################################################
3042 06:43:07.206567
3043 06:43:07.484986 00480000 ################################################################
3044 06:43:07.485109
3045 06:43:07.794718 00500000 ################################################################ done.
3046 06:43:07.794847
3047 06:43:07.798110 Sending tftp read request... done.
3048 06:43:07.798199
3049 06:43:07.801587 Waiting for the transfer...
3050 06:43:07.801681
3051 06:43:07.801756 00000000 # done.
3052 06:43:07.801829
3053 06:43:07.811543 Command line loaded dynamically from TFTP file: 12205572/tftp-deploy-u0jeq3_g/kernel/cmdline
3054 06:43:07.811736
3055 06:43:07.834587 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12205572/extract-nfsrootfs-vvo09hke,tcp,hard ip=dhcp tftpserverip=192.168.201.1
3056 06:43:07.843136
3057 06:43:07.845996 Shutting down all USB controllers.
3058 06:43:07.846284
3059 06:43:07.846453 Removing current net device
3060 06:43:07.846609
3061 06:43:07.849368 Finalizing coreboot
3062 06:43:07.849695
3063 06:43:07.855760 Exiting depthcharge with code 4 at timestamp: 22443605
3064 06:43:07.856238
3065 06:43:07.856626
3066 06:43:07.856870 Starting kernel ...
3067 06:43:07.857090
3068 06:43:07.857298
3069 06:43:07.858142 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
3070 06:43:07.858485 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
3071 06:43:07.858746 Setting prompt string to ['Linux version [0-9]']
3072 06:43:07.859137 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
3073 06:43:07.859545 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
3075 06:47:36.859551 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
3077 06:47:36.860640 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
3079 06:47:36.861506 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
3082 06:47:36.862932 end: 2 depthcharge-action (duration 00:05:00) [common]
3084 06:47:36.864153 Cleaning after the job
3085 06:47:36.864555 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12205572/tftp-deploy-u0jeq3_g/ramdisk
3086 06:47:36.865451 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12205572/tftp-deploy-u0jeq3_g/kernel
3087 06:47:36.866737 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12205572/tftp-deploy-u0jeq3_g/nfsrootfs
3088 06:47:36.934715 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12205572/tftp-deploy-u0jeq3_g/modules
3089 06:47:36.935332 start: 5.1 power-off (timeout 00:00:30) [common]
3090 06:47:36.935498 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi5-brask-cbg-0' '--port=1' '--command=off'
3091 06:47:37.014730 >> Command sent successfully.
3092 06:47:37.025485 Returned 0 in 0 seconds
3093 06:47:37.126924 end: 5.1 power-off (duration 00:00:00) [common]
3095 06:47:37.128424 start: 5.2 read-feedback (timeout 00:10:00) [common]
3096 06:47:37.129729 Listened to connection for namespace 'common' for up to 1s
3097 06:47:38.130399 Finalising connection for namespace 'common'
3098 06:47:38.131109 Disconnecting from shell: Finalise
3099 06:47:38.131541
3100 06:47:38.232597 end: 5.2 read-feedback (duration 00:00:01) [common]
3101 06:47:38.233247 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12205572
3102 06:47:38.530952 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12205572
3103 06:47:38.531144 JobError: Your job cannot terminate cleanly.